2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
56 #include <asm/trampoline.h>
59 #include <asm/pgtable.h>
60 #include <asm/tlbflush.h>
63 #include <asm/genapic.h>
64 #include <linux/mc146818rtc.h>
66 #include <mach_apic.h>
67 #include <mach_wakecpu.h>
68 #include <smpboot_hooks.h>
71 * FIXME: For x86_64, those are defined in other files. But moving them here,
72 * would make the setup areas dependent on smp, which is a loss. When we
73 * integrate apic between arches, we can probably do a better job, but
74 * right now, they'll stay here -- glommer
77 /* which logical CPU number maps to which CPU (physical APIC ID) */
78 u16 x86_cpu_to_apicid_init
[NR_CPUS
] __initdata
=
79 { [0 ... NR_CPUS
-1] = BAD_APICID
};
80 void *x86_cpu_to_apicid_early_ptr
;
82 u16 x86_bios_cpu_apicid_init
[NR_CPUS
] __initdata
83 = { [0 ... NR_CPUS
-1] = BAD_APICID
};
84 void *x86_bios_cpu_apicid_early_ptr
;
87 u8 apicid_2_node
[MAX_APICID
];
88 static int low_mappings
;
91 /* State of each CPU */
92 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
94 /* Store all idle threads, this can be reused instead of creating
95 * a new thread. Also avoids complicated thread destroy functionality
98 #ifdef CONFIG_HOTPLUG_CPU
100 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
101 * removed after init for !CONFIG_HOTPLUG_CPU.
103 static DEFINE_PER_CPU(struct task_struct
*, idle_thread_array
);
104 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
105 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
107 struct task_struct
*idle_thread_array
[NR_CPUS
] __cpuinitdata
;
108 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
109 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
112 /* Number of siblings per CPU package */
113 int smp_num_siblings
= 1;
114 EXPORT_SYMBOL(smp_num_siblings
);
116 /* Last level cache ID of each logical CPU */
117 DEFINE_PER_CPU(u16
, cpu_llc_id
) = BAD_APICID
;
119 /* bitmap of online cpus */
120 cpumask_t cpu_online_map __read_mostly
;
121 EXPORT_SYMBOL(cpu_online_map
);
123 cpumask_t cpu_callin_map
;
124 cpumask_t cpu_callout_map
;
125 cpumask_t cpu_possible_map
;
126 EXPORT_SYMBOL(cpu_possible_map
);
128 /* representing HT siblings of each logical CPU */
129 DEFINE_PER_CPU(cpumask_t
, cpu_sibling_map
);
130 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
132 /* representing HT and core siblings of each logical CPU */
133 DEFINE_PER_CPU(cpumask_t
, cpu_core_map
);
134 EXPORT_PER_CPU_SYMBOL(cpu_core_map
);
136 /* Per CPU bogomips and other parameters */
137 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86
, cpu_info
);
138 EXPORT_PER_CPU_SYMBOL(cpu_info
);
140 static atomic_t init_deasserted
;
142 static int boot_cpu_logical_apicid
;
144 /* representing cpus for which sibling maps can be computed */
145 static cpumask_t cpu_sibling_setup_map
;
147 /* Set if we find a B stepping CPU */
148 int __cpuinitdata smp_b_stepping
;
150 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
152 /* which logical CPUs are on which nodes */
153 cpumask_t node_to_cpumask_map
[MAX_NUMNODES
] __read_mostly
=
154 { [0 ... MAX_NUMNODES
-1] = CPU_MASK_NONE
};
155 EXPORT_SYMBOL(node_to_cpumask_map
);
156 /* which node each logical CPU is on */
157 int cpu_to_node_map
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = 0 };
158 EXPORT_SYMBOL(cpu_to_node_map
);
160 /* set up a mapping between cpu and node. */
161 static void map_cpu_to_node(int cpu
, int node
)
163 printk(KERN_INFO
"Mapping cpu %d to node %d\n", cpu
, node
);
164 cpu_set(cpu
, node_to_cpumask_map
[node
]);
165 cpu_to_node_map
[cpu
] = node
;
168 /* undo a mapping between cpu and node. */
169 static void unmap_cpu_to_node(int cpu
)
173 printk(KERN_INFO
"Unmapping cpu %d from all nodes\n", cpu
);
174 for (node
= 0; node
< MAX_NUMNODES
; node
++)
175 cpu_clear(cpu
, node_to_cpumask_map
[node
]);
176 cpu_to_node_map
[cpu
] = 0;
178 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
179 #define map_cpu_to_node(cpu, node) ({})
180 #define unmap_cpu_to_node(cpu) ({})
184 u8 cpu_2_logical_apicid
[NR_CPUS
] __read_mostly
=
185 { [0 ... NR_CPUS
-1] = BAD_APICID
};
187 static void map_cpu_to_logical_apicid(void)
189 int cpu
= smp_processor_id();
190 int apicid
= logical_smp_processor_id();
191 int node
= apicid_to_node(apicid
);
193 if (!node_online(node
))
194 node
= first_online_node
;
196 cpu_2_logical_apicid
[cpu
] = apicid
;
197 map_cpu_to_node(cpu
, node
);
200 static void unmap_cpu_to_logical_apicid(int cpu
)
202 cpu_2_logical_apicid
[cpu
] = BAD_APICID
;
203 unmap_cpu_to_node(cpu
);
206 #define unmap_cpu_to_logical_apicid(cpu) do {} while (0)
207 #define map_cpu_to_logical_apicid() do {} while (0)
211 * Report back to the Boot Processor.
214 static void __cpuinit
smp_callin(void)
217 unsigned long timeout
;
220 * If waken up by an INIT in an 82489DX configuration
221 * we may get here before an INIT-deassert IPI reaches
222 * our local APIC. We have to wait for the IPI or we'll
223 * lock up on an APIC access.
225 wait_for_init_deassert(&init_deasserted
);
228 * (This works even if the APIC is not enabled.)
230 phys_id
= GET_APIC_ID(read_apic_id());
231 cpuid
= smp_processor_id();
232 if (cpu_isset(cpuid
, cpu_callin_map
)) {
233 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__
,
236 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
239 * STARTUP IPIs are fragile beasts as they might sometimes
240 * trigger some glue motherboard logic. Complete APIC bus
241 * silence for 1 second, this overestimates the time the
242 * boot CPU is spending to send the up to 2 STARTUP IPIs
243 * by a factor of two. This should be enough.
247 * Waiting 2s total for startup (udelay is not yet working)
249 timeout
= jiffies
+ 2*HZ
;
250 while (time_before(jiffies
, timeout
)) {
252 * Has the boot CPU finished it's STARTUP sequence?
254 if (cpu_isset(cpuid
, cpu_callout_map
))
259 if (!time_before(jiffies
, timeout
)) {
260 panic("%s: CPU%d started up but did not get a callout!\n",
265 * the boot CPU has finished the init stage and is spinning
266 * on callin_map until we finish. We are free to set up this
267 * CPU, first the APIC. (this is probably redundant on most
271 Dprintk("CALLIN, before setup_local_APIC().\n");
272 smp_callin_clear_local_apic();
274 end_local_APIC_setup();
275 map_cpu_to_logical_apicid();
280 * Need to enable IRQs because it can take longer and then
281 * the NMI watchdog might kill us.
286 Dprintk("Stack at about %p\n", &cpuid
);
289 * Save our processor parameters
291 smp_store_cpu_info(cpuid
);
294 * Allow the master to continue.
296 cpu_set(cpuid
, cpu_callin_map
);
300 * Activate a secondary processor.
302 static void __cpuinit
start_secondary(void *unused
)
305 * Don't put *anything* before cpu_init(), SMP booting is too
306 * fragile that we want to limit the things done here to the
307 * most necessary things.
316 /* otherwise gcc will move up smp_processor_id before the cpu_init */
319 * Check TSC synchronization with the BP:
321 check_tsc_sync_target();
323 if (nmi_watchdog
== NMI_IO_APIC
) {
324 disable_8259A_irq(0);
325 enable_NMI_through_LVT0();
335 /* This must be done before setting cpu_online_map */
336 set_cpu_sibling_map(raw_smp_processor_id());
340 * We need to hold call_lock, so there is no inconsistency
341 * between the time smp_call_function() determines number of
342 * IPI recipients, and the time when the determination is made
343 * for which cpus receive the IPI. Holding this
344 * lock helps us to not include this cpu in a currently in progress
345 * smp_call_function().
347 lock_ipi_call_lock();
349 spin_lock(&vector_lock
);
351 /* Setup the per cpu irq handling data structures */
352 __setup_vector_irq(smp_processor_id());
354 * Allow the master to continue.
356 spin_unlock(&vector_lock
);
358 cpu_set(smp_processor_id(), cpu_online_map
);
359 unlock_ipi_call_lock();
360 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
362 setup_secondary_clock();
370 * Everything has been set up for the secondary
371 * CPUs - they just need to reload everything
372 * from the task structure
373 * This function must not return.
375 void __devinit
initialize_secondary(void)
378 * We don't actually need to load the full TSS,
379 * basically just the stack pointer and the ip.
386 :"m" (current
->thread
.sp
), "m" (current
->thread
.ip
));
390 static void __cpuinit
smp_apply_quirks(struct cpuinfo_x86
*c
)
394 * Mask B, Pentium, but not Pentium MMX
396 if (c
->x86_vendor
== X86_VENDOR_INTEL
&&
398 c
->x86_mask
>= 1 && c
->x86_mask
<= 4 &&
401 * Remember we have B step Pentia with bugs
406 * Certain Athlons might work (for various values of 'work') in SMP
407 * but they are not certified as MP capable.
409 if ((c
->x86_vendor
== X86_VENDOR_AMD
) && (c
->x86
== 6)) {
411 if (num_possible_cpus() == 1)
414 /* Athlon 660/661 is valid. */
415 if ((c
->x86_model
== 6) && ((c
->x86_mask
== 0) ||
419 /* Duron 670 is valid */
420 if ((c
->x86_model
== 7) && (c
->x86_mask
== 0))
424 * Athlon 662, Duron 671, and Athlon >model 7 have capability
425 * bit. It's worth noting that the A5 stepping (662) of some
426 * Athlon XP's have the MP bit set.
427 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
430 if (((c
->x86_model
== 6) && (c
->x86_mask
>= 2)) ||
431 ((c
->x86_model
== 7) && (c
->x86_mask
>= 1)) ||
436 /* If we get here, not a certified SMP capable AMD system. */
437 add_taint(TAINT_UNSAFE_SMP
);
445 static void __cpuinit
smp_checks(void)
448 printk(KERN_WARNING
"WARNING: SMP operation may be unreliable"
449 "with B stepping processors.\n");
452 * Don't taint if we are running SMP kernel on a single non-MP
455 if (tainted
& TAINT_UNSAFE_SMP
) {
456 if (num_online_cpus())
457 printk(KERN_INFO
"WARNING: This combination of AMD"
458 "processors is not suitable for SMP.\n");
460 tainted
&= ~TAINT_UNSAFE_SMP
;
465 * The bootstrap kernel entry code has set these up. Save them for
469 void __cpuinit
smp_store_cpu_info(int id
)
471 struct cpuinfo_x86
*c
= &cpu_data(id
);
476 identify_secondary_cpu(c
);
481 void __cpuinit
set_cpu_sibling_map(int cpu
)
484 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
486 cpu_set(cpu
, cpu_sibling_setup_map
);
488 if (smp_num_siblings
> 1) {
489 for_each_cpu_mask(i
, cpu_sibling_setup_map
) {
490 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
&&
491 c
->cpu_core_id
== cpu_data(i
).cpu_core_id
) {
492 cpu_set(i
, per_cpu(cpu_sibling_map
, cpu
));
493 cpu_set(cpu
, per_cpu(cpu_sibling_map
, i
));
494 cpu_set(i
, per_cpu(cpu_core_map
, cpu
));
495 cpu_set(cpu
, per_cpu(cpu_core_map
, i
));
496 cpu_set(i
, c
->llc_shared_map
);
497 cpu_set(cpu
, cpu_data(i
).llc_shared_map
);
501 cpu_set(cpu
, per_cpu(cpu_sibling_map
, cpu
));
504 cpu_set(cpu
, c
->llc_shared_map
);
506 if (current_cpu_data
.x86_max_cores
== 1) {
507 per_cpu(cpu_core_map
, cpu
) = per_cpu(cpu_sibling_map
, cpu
);
512 for_each_cpu_mask(i
, cpu_sibling_setup_map
) {
513 if (per_cpu(cpu_llc_id
, cpu
) != BAD_APICID
&&
514 per_cpu(cpu_llc_id
, cpu
) == per_cpu(cpu_llc_id
, i
)) {
515 cpu_set(i
, c
->llc_shared_map
);
516 cpu_set(cpu
, cpu_data(i
).llc_shared_map
);
518 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
) {
519 cpu_set(i
, per_cpu(cpu_core_map
, cpu
));
520 cpu_set(cpu
, per_cpu(cpu_core_map
, i
));
522 * Does this new cpu bringup a new core?
524 if (cpus_weight(per_cpu(cpu_sibling_map
, cpu
)) == 1) {
526 * for each core in package, increment
527 * the booted_cores for this new cpu
529 if (first_cpu(per_cpu(cpu_sibling_map
, i
)) == i
)
532 * increment the core count for all
533 * the other cpus in this package
536 cpu_data(i
).booted_cores
++;
537 } else if (i
!= cpu
&& !c
->booted_cores
)
538 c
->booted_cores
= cpu_data(i
).booted_cores
;
543 /* maps the cpu to the sched domain representing multi-core */
544 cpumask_t
cpu_coregroup_map(int cpu
)
546 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
548 * For perf, we return last level cache shared map.
549 * And for power savings, we return cpu_core_map
551 if (sched_mc_power_savings
|| sched_smt_power_savings
)
552 return per_cpu(cpu_core_map
, cpu
);
554 return c
->llc_shared_map
;
559 * We are called very early to get the low memory for the
560 * SMP bootup trampoline page.
562 void __init
smp_alloc_memory(void)
564 trampoline_base
= alloc_bootmem_low_pages(PAGE_SIZE
);
566 * Has to be in very low memory so we can execute
569 if (__pa(trampoline_base
) >= 0x9F000)
574 static void impress_friends(void)
577 unsigned long bogosum
= 0;
579 * Allow the user to impress friends.
581 Dprintk("Before bogomips.\n");
582 for_each_possible_cpu(cpu
)
583 if (cpu_isset(cpu
, cpu_callout_map
))
584 bogosum
+= cpu_data(cpu
).loops_per_jiffy
;
586 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
589 (bogosum
/(5000/HZ
))%100);
591 Dprintk("Before bogocount - setting activated=1.\n");
594 static inline void __inquire_remote_apic(int apicid
)
596 unsigned i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
597 char *names
[] = { "ID", "VERSION", "SPIV" };
601 printk(KERN_INFO
"Inquiring remote APIC #%d...\n", apicid
);
603 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
604 printk(KERN_INFO
"... APIC #%d %s: ", apicid
, names
[i
]);
609 status
= safe_apic_wait_icr_idle();
612 "a previous APIC delivery may have failed\n");
614 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(apicid
));
615 apic_write_around(APIC_ICR
, APIC_DM_REMRD
| regs
[i
]);
620 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
621 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
624 case APIC_ICR_RR_VALID
:
625 status
= apic_read(APIC_RRR
);
626 printk(KERN_CONT
"%08x\n", status
);
629 printk(KERN_CONT
"failed\n");
634 #ifdef WAKE_SECONDARY_VIA_NMI
636 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
637 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
638 * won't ... remember to clear down the APIC, etc later.
641 wakeup_secondary_cpu(int logical_apicid
, unsigned long start_eip
)
643 unsigned long send_status
, accept_status
= 0;
647 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(logical_apicid
));
649 /* Boot on the stack */
650 /* Kick the second */
651 apic_write_around(APIC_ICR
, APIC_DM_NMI
| APIC_DEST_LOGICAL
);
653 Dprintk("Waiting for send to finish...\n");
654 send_status
= safe_apic_wait_icr_idle();
657 * Give the other CPU some time to accept the IPI.
661 * Due to the Pentium erratum 3AP.
663 maxlvt
= lapic_get_maxlvt();
665 apic_read_around(APIC_SPIV
);
666 apic_write(APIC_ESR
, 0);
668 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
669 Dprintk("NMI sent.\n");
672 printk(KERN_ERR
"APIC never delivered???\n");
674 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
676 return (send_status
| accept_status
);
678 #endif /* WAKE_SECONDARY_VIA_NMI */
680 #ifdef WAKE_SECONDARY_VIA_INIT
682 wakeup_secondary_cpu(int phys_apicid
, unsigned long start_eip
)
684 unsigned long send_status
, accept_status
= 0;
685 int maxlvt
, num_starts
, j
;
687 if (get_uv_system_type() == UV_NON_UNIQUE_APIC
) {
688 send_status
= uv_wakeup_secondary(phys_apicid
, start_eip
);
689 atomic_set(&init_deasserted
, 1);
694 * Be paranoid about clearing APIC errors.
696 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
697 apic_read_around(APIC_SPIV
);
698 apic_write(APIC_ESR
, 0);
702 Dprintk("Asserting INIT.\n");
705 * Turn INIT on target chip
707 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
712 apic_write_around(APIC_ICR
, APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
715 Dprintk("Waiting for send to finish...\n");
716 send_status
= safe_apic_wait_icr_idle();
720 Dprintk("Deasserting INIT.\n");
723 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
726 apic_write_around(APIC_ICR
, APIC_INT_LEVELTRIG
| APIC_DM_INIT
);
728 Dprintk("Waiting for send to finish...\n");
729 send_status
= safe_apic_wait_icr_idle();
732 atomic_set(&init_deasserted
, 1);
735 * Should we send STARTUP IPIs ?
737 * Determine this based on the APIC version.
738 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
740 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
746 * Paravirt / VMI wants a startup IPI hook here to set up the
747 * target processor state.
749 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
751 (unsigned long)init_rsp
);
753 (unsigned long)stack_start
.sp
);
757 * Run STARTUP IPI loop.
759 Dprintk("#startup loops: %d.\n", num_starts
);
761 maxlvt
= lapic_get_maxlvt();
763 for (j
= 1; j
<= num_starts
; j
++) {
764 Dprintk("Sending STARTUP #%d.\n", j
);
765 apic_read_around(APIC_SPIV
);
766 apic_write(APIC_ESR
, 0);
768 Dprintk("After apic_write.\n");
775 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
777 /* Boot on the stack */
778 /* Kick the second */
779 apic_write_around(APIC_ICR
, APIC_DM_STARTUP
780 | (start_eip
>> 12));
783 * Give the other CPU some time to accept the IPI.
787 Dprintk("Startup point 1.\n");
789 Dprintk("Waiting for send to finish...\n");
790 send_status
= safe_apic_wait_icr_idle();
793 * Give the other CPU some time to accept the IPI.
797 * Due to the Pentium erratum 3AP.
800 apic_read_around(APIC_SPIV
);
801 apic_write(APIC_ESR
, 0);
803 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
804 if (send_status
|| accept_status
)
807 Dprintk("After Startup.\n");
810 printk(KERN_ERR
"APIC never delivered???\n");
812 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
814 return (send_status
| accept_status
);
816 #endif /* WAKE_SECONDARY_VIA_INIT */
819 struct work_struct work
;
820 struct task_struct
*idle
;
821 struct completion done
;
825 static void __cpuinit
do_fork_idle(struct work_struct
*work
)
827 struct create_idle
*c_idle
=
828 container_of(work
, struct create_idle
, work
);
830 c_idle
->idle
= fork_idle(c_idle
->cpu
);
831 complete(&c_idle
->done
);
834 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
836 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
837 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
838 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
841 unsigned long boot_error
= 0;
843 unsigned long start_ip
;
844 unsigned short nmi_high
= 0, nmi_low
= 0;
845 struct create_idle c_idle
= {
847 .done
= COMPLETION_INITIALIZER_ONSTACK(c_idle
.done
),
849 INIT_WORK(&c_idle
.work
, do_fork_idle
);
851 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
852 if (!cpu_gdt_descr
[cpu
].address
&&
853 !(cpu_gdt_descr
[cpu
].address
= get_zeroed_page(GFP_KERNEL
))) {
854 printk(KERN_ERR
"Failed to allocate GDT for CPU %d\n", cpu
);
858 /* Allocate node local memory for AP pdas */
859 if (cpu_pda(cpu
) == &boot_cpu_pda
[cpu
]) {
860 struct x8664_pda
*newpda
, *pda
;
861 int node
= cpu_to_node(cpu
);
863 newpda
= kmalloc_node(sizeof(struct x8664_pda
), GFP_ATOMIC
,
866 memcpy(newpda
, pda
, sizeof(struct x8664_pda
));
867 cpu_pda(cpu
) = newpda
;
870 "Could not allocate node local PDA for CPU %d on node %d\n",
875 alternatives_smp_switch(1);
877 c_idle
.idle
= get_idle_for_cpu(cpu
);
880 * We can't use kernel_thread since we must avoid to
881 * reschedule the child.
884 c_idle
.idle
->thread
.sp
= (unsigned long) (((struct pt_regs
*)
885 (THREAD_SIZE
+ task_stack_page(c_idle
.idle
))) - 1);
886 init_idle(c_idle
.idle
, cpu
);
890 if (!keventd_up() || current_is_keventd())
891 c_idle
.work
.func(&c_idle
.work
);
893 schedule_work(&c_idle
.work
);
894 wait_for_completion(&c_idle
.done
);
897 if (IS_ERR(c_idle
.idle
)) {
898 printk("failed fork for CPU %d\n", cpu
);
899 return PTR_ERR(c_idle
.idle
);
902 set_idle_for_cpu(cpu
, c_idle
.idle
);
905 per_cpu(current_task
, cpu
) = c_idle
.idle
;
907 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
908 c_idle
.idle
->thread
.ip
= (unsigned long) start_secondary
;
909 /* Stack for startup_32 can be just as for start_secondary onwards */
910 stack_start
.sp
= (void *) c_idle
.idle
->thread
.sp
;
913 cpu_pda(cpu
)->pcurrent
= c_idle
.idle
;
914 init_rsp
= c_idle
.idle
->thread
.sp
;
915 load_sp0(&per_cpu(init_tss
, cpu
), &c_idle
.idle
->thread
);
916 initial_code
= (unsigned long)start_secondary
;
917 clear_tsk_thread_flag(c_idle
.idle
, TIF_FORK
);
920 /* start_ip had better be page-aligned! */
921 start_ip
= setup_trampoline();
923 /* So we see what's up */
924 printk(KERN_INFO
"Booting processor %d/%d ip %lx\n",
925 cpu
, apicid
, start_ip
);
928 * This grunge runs the startup process for
929 * the targeted processor.
932 atomic_set(&init_deasserted
, 0);
934 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
936 Dprintk("Setting warm reset code and vector.\n");
938 store_NMI_vector(&nmi_high
, &nmi_low
);
940 smpboot_setup_warm_reset_vector(start_ip
);
942 * Be paranoid about clearing APIC errors.
944 apic_write(APIC_ESR
, 0);
949 * Starting actual IPI sequence...
951 boot_error
= wakeup_secondary_cpu(apicid
, start_ip
);
955 * allow APs to start initializing.
957 Dprintk("Before Callout %d.\n", cpu
);
958 cpu_set(cpu
, cpu_callout_map
);
959 Dprintk("After Callout %d.\n", cpu
);
962 * Wait 5s total for a response
964 for (timeout
= 0; timeout
< 50000; timeout
++) {
965 if (cpu_isset(cpu
, cpu_callin_map
))
966 break; /* It has booted */
970 if (cpu_isset(cpu
, cpu_callin_map
)) {
971 /* number CPUs logically, starting from 1 (BSP is 0) */
973 printk(KERN_INFO
"CPU%d: ", cpu
);
974 print_cpu_info(&cpu_data(cpu
));
975 Dprintk("CPU has booted.\n");
978 if (*((volatile unsigned char *)trampoline_base
)
980 /* trampoline started but...? */
981 printk(KERN_ERR
"Stuck ??\n");
983 /* trampoline code not run */
984 printk(KERN_ERR
"Not responding.\n");
985 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
)
986 inquire_remote_apic(apicid
);
991 /* Try to put things back the way they were before ... */
992 unmap_cpu_to_logical_apicid(cpu
);
994 clear_node_cpumask(cpu
); /* was set by numa_add_cpu */
996 cpu_clear(cpu
, cpu_callout_map
); /* was set by do_boot_cpu() */
997 cpu_clear(cpu
, cpu_initialized
); /* was set by cpu_init() */
998 cpu_clear(cpu
, cpu_present_map
);
999 per_cpu(x86_cpu_to_apicid
, cpu
) = BAD_APICID
;
1002 /* mark "stuck" area as not stuck */
1003 *((volatile unsigned long *)trampoline_base
) = 0;
1006 * Cleanup possible dangling ends...
1008 smpboot_restore_warm_reset_vector();
1013 int __cpuinit
native_cpu_up(unsigned int cpu
)
1015 int apicid
= cpu_present_to_apicid(cpu
);
1016 unsigned long flags
;
1019 WARN_ON(irqs_disabled());
1021 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu
);
1023 if (apicid
== BAD_APICID
|| apicid
== boot_cpu_physical_apicid
||
1024 !physid_isset(apicid
, phys_cpu_present_map
)) {
1025 printk(KERN_ERR
"%s: bad cpu %d\n", __func__
, cpu
);
1030 * Already booted CPU?
1032 if (cpu_isset(cpu
, cpu_callin_map
)) {
1033 Dprintk("do_boot_cpu %d Already started\n", cpu
);
1038 * Save current MTRR state in case it was changed since early boot
1039 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
1043 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
1045 #ifdef CONFIG_X86_32
1046 /* init low mem mapping */
1047 clone_pgd_range(swapper_pg_dir
, swapper_pg_dir
+ KERNEL_PGD_BOUNDARY
,
1048 min_t(unsigned long, KERNEL_PGD_PTRS
, KERNEL_PGD_BOUNDARY
));
1052 err
= do_boot_cpu(apicid
, cpu
);
1057 err
= do_boot_cpu(apicid
, cpu
);
1060 Dprintk("do_boot_cpu failed %d\n", err
);
1065 * Check TSC synchronization with the AP (keep irqs disabled
1068 local_irq_save(flags
);
1069 check_tsc_sync_source(cpu
);
1070 local_irq_restore(flags
);
1072 while (!cpu_online(cpu
)) {
1074 touch_nmi_watchdog();
1081 * Fall back to non SMP mode after errors.
1083 * RED-PEN audit/test this more. I bet there is more state messed up here.
1085 static __init
void disable_smp(void)
1087 cpu_present_map
= cpumask_of_cpu(0);
1088 cpu_possible_map
= cpumask_of_cpu(0);
1089 #ifdef CONFIG_X86_32
1090 smpboot_clear_io_apic_irqs();
1092 if (smp_found_config
)
1093 phys_cpu_present_map
=
1094 physid_mask_of_physid(boot_cpu_physical_apicid
);
1096 phys_cpu_present_map
= physid_mask_of_physid(0);
1097 map_cpu_to_logical_apicid();
1098 cpu_set(0, per_cpu(cpu_sibling_map
, 0));
1099 cpu_set(0, per_cpu(cpu_core_map
, 0));
1103 * Various sanity checks.
1105 static int __init
smp_sanity_check(unsigned max_cpus
)
1108 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map
)) {
1109 printk(KERN_WARNING
"weird, boot CPU (#%d) not listed"
1110 "by the BIOS.\n", hard_smp_processor_id());
1111 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1115 * If we couldn't find an SMP configuration at boot time,
1116 * get out of here now!
1118 if (!smp_found_config
&& !acpi_lapic
) {
1120 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
1122 if (APIC_init_uniprocessor())
1123 printk(KERN_NOTICE
"Local APIC not detected."
1124 " Using dummy APIC emulation.\n");
1129 * Should not be necessary because the MP table should list the boot
1130 * CPU too, but we do it for the sake of robustness anyway.
1132 if (!check_phys_apicid_present(boot_cpu_physical_apicid
)) {
1134 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1135 boot_cpu_physical_apicid
);
1136 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1141 * If we couldn't find a local APIC, then get out of here now!
1143 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) &&
1145 printk(KERN_ERR
"BIOS bug, local APIC #%d not detected!...\n",
1146 boot_cpu_physical_apicid
);
1147 printk(KERN_ERR
"... forcing use of dummy APIC emulation."
1148 "(tell your hw vendor)\n");
1149 smpboot_clear_io_apic();
1153 verify_local_APIC();
1156 * If SMP should be disabled, then really disable it!
1159 printk(KERN_INFO
"SMP mode deactivated.\n");
1160 smpboot_clear_io_apic();
1162 localise_nmi_watchdog();
1164 #ifdef CONFIG_X86_32
1168 end_local_APIC_setup();
1175 static void __init
smp_cpu_index_default(void)
1178 struct cpuinfo_x86
*c
;
1180 for_each_possible_cpu(i
) {
1182 /* mark all to hotplug */
1183 c
->cpu_index
= NR_CPUS
;
1188 * Prepare for SMP bootup. The MP table or ACPI has been read
1189 * earlier. Just do some sanity checking here and enable APIC mode.
1191 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
1194 nmi_watchdog_default();
1195 smp_cpu_index_default();
1196 current_cpu_data
= boot_cpu_data
;
1197 cpu_callin_map
= cpumask_of_cpu(0);
1200 * Setup boot CPU information
1202 smp_store_cpu_info(0); /* Final full version of the data */
1203 boot_cpu_logical_apicid
= logical_smp_processor_id();
1204 current_thread_info()->cpu
= 0; /* needed? */
1205 set_cpu_sibling_map(0);
1207 if (smp_sanity_check(max_cpus
) < 0) {
1208 printk(KERN_INFO
"SMP disabled\n");
1214 if (GET_APIC_ID(read_apic_id()) != boot_cpu_physical_apicid
) {
1215 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1216 GET_APIC_ID(read_apic_id()), boot_cpu_physical_apicid
);
1217 /* Or can we switch back to PIC here? */
1221 #ifdef CONFIG_X86_32
1225 * Switch from PIC to APIC mode.
1229 #ifdef CONFIG_X86_64
1231 * Enable IO APIC before setting up error vector
1233 if (!skip_ioapic_setup
&& nr_ioapics
)
1236 end_local_APIC_setup();
1238 map_cpu_to_logical_apicid();
1240 setup_portio_remap();
1242 smpboot_setup_io_apic();
1244 * Set up local APIC timer on boot CPU.
1247 printk(KERN_INFO
"CPU%d: ", 0);
1248 print_cpu_info(&cpu_data(0));
1254 * Early setup to make printk work.
1256 void __init
native_smp_prepare_boot_cpu(void)
1258 int me
= smp_processor_id();
1259 #ifdef CONFIG_X86_32
1261 switch_to_new_gdt();
1263 /* already set me in cpu_online_map in boot_cpu_init() */
1264 cpu_set(me
, cpu_callout_map
);
1265 per_cpu(cpu_state
, me
) = CPU_ONLINE
;
1268 void __init
native_smp_cpus_done(unsigned int max_cpus
)
1270 Dprintk("Boot done.\n");
1274 #ifdef CONFIG_X86_IO_APIC
1275 setup_ioapic_dest();
1277 check_nmi_watchdog();
1280 #ifdef CONFIG_HOTPLUG_CPU
1282 # ifdef CONFIG_X86_32
1283 void cpu_exit_clear(void)
1285 int cpu
= raw_smp_processor_id();
1292 cpu_clear(cpu
, cpu_callout_map
);
1293 cpu_clear(cpu
, cpu_callin_map
);
1295 unmap_cpu_to_logical_apicid(cpu
);
1297 # endif /* CONFIG_X86_32 */
1299 static void remove_siblinginfo(int cpu
)
1302 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
1304 for_each_cpu_mask(sibling
, per_cpu(cpu_core_map
, cpu
)) {
1305 cpu_clear(cpu
, per_cpu(cpu_core_map
, sibling
));
1307 * last thread sibling in this cpu core going down
1309 if (cpus_weight(per_cpu(cpu_sibling_map
, cpu
)) == 1)
1310 cpu_data(sibling
).booted_cores
--;
1313 for_each_cpu_mask(sibling
, per_cpu(cpu_sibling_map
, cpu
))
1314 cpu_clear(cpu
, per_cpu(cpu_sibling_map
, sibling
));
1315 cpus_clear(per_cpu(cpu_sibling_map
, cpu
));
1316 cpus_clear(per_cpu(cpu_core_map
, cpu
));
1317 c
->phys_proc_id
= 0;
1319 cpu_clear(cpu
, cpu_sibling_setup_map
);
1322 static int additional_cpus __initdata
= -1;
1324 static __init
int setup_additional_cpus(char *s
)
1326 return s
&& get_option(&s
, &additional_cpus
) ? 0 : -EINVAL
;
1328 early_param("additional_cpus", setup_additional_cpus
);
1331 * cpu_possible_map should be static, it cannot change as cpu's
1332 * are onlined, or offlined. The reason is per-cpu data-structures
1333 * are allocated by some modules at init time, and dont expect to
1334 * do this dynamically on cpu arrival/departure.
1335 * cpu_present_map on the other hand can change dynamically.
1336 * In case when cpu_hotplug is not compiled, then we resort to current
1337 * behaviour, which is cpu_possible == cpu_present.
1340 * Three ways to find out the number of additional hotplug CPUs:
1341 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1342 * - The user can overwrite it with additional_cpus=NUM
1343 * - Otherwise don't reserve additional CPUs.
1344 * We do this because additional CPUs waste a lot of memory.
1347 __init
void prefill_possible_map(void)
1352 if (additional_cpus
== -1) {
1353 if (disabled_cpus
> 0)
1354 additional_cpus
= disabled_cpus
;
1356 additional_cpus
= 0;
1358 possible
= num_processors
+ additional_cpus
;
1359 if (possible
> NR_CPUS
)
1362 printk(KERN_INFO
"SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1363 possible
, max_t(int, possible
- num_processors
, 0));
1365 for (i
= 0; i
< possible
; i
++)
1366 cpu_set(i
, cpu_possible_map
);
1369 static void __ref
remove_cpu_from_maps(int cpu
)
1371 cpu_clear(cpu
, cpu_online_map
);
1372 #ifdef CONFIG_X86_64
1373 cpu_clear(cpu
, cpu_callout_map
);
1374 cpu_clear(cpu
, cpu_callin_map
);
1375 /* was set by cpu_init() */
1376 clear_bit(cpu
, (unsigned long *)&cpu_initialized
);
1377 clear_node_cpumask(cpu
);
1381 int __cpu_disable(void)
1383 int cpu
= smp_processor_id();
1386 * Perhaps use cpufreq to drop frequency, but that could go
1387 * into generic code.
1389 * We won't take down the boot processor on i386 due to some
1390 * interrupts only being able to be serviced by the BSP.
1391 * Especially so if we're not using an IOAPIC -zwane
1396 if (nmi_watchdog
== NMI_LOCAL_APIC
)
1397 stop_apic_nmi_watchdog(NULL
);
1402 * Allow any queued timer interrupts to get serviced
1403 * This is only a temporary solution until we cleanup
1404 * fixup_irqs as we do for IA64.
1409 local_irq_disable();
1410 remove_siblinginfo(cpu
);
1412 /* It's now safe to remove this processor from the online map */
1413 remove_cpu_from_maps(cpu
);
1414 fixup_irqs(cpu_online_map
);
1418 void __cpu_die(unsigned int cpu
)
1420 /* We don't do anything here: idle task is faking death itself. */
1423 for (i
= 0; i
< 10; i
++) {
1424 /* They ack this in play_dead by setting CPU_DEAD */
1425 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
) {
1426 printk(KERN_INFO
"CPU %d is now offline\n", cpu
);
1427 if (1 == num_online_cpus())
1428 alternatives_smp_switch(0);
1433 printk(KERN_ERR
"CPU %u didn't die...\n", cpu
);
1435 #else /* ... !CONFIG_HOTPLUG_CPU */
1436 int __cpu_disable(void)
1441 void __cpu_die(unsigned int cpu
)
1443 /* We said "no" in __cpu_disable */
1449 * If the BIOS enumerates physical processors before logical,
1450 * maxcpus=N at enumeration-time can be used to disable HT.
1452 static int __init
parse_maxcpus(char *arg
)
1454 extern unsigned int maxcpus
;
1456 maxcpus
= simple_strtoul(arg
, NULL
, 0);
1459 early_param("maxcpus", parse_maxcpus
);