2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
56 #include <asm/trampoline.h>
59 #include <asm/pgtable.h>
60 #include <asm/tlbflush.h>
64 #include <asm/setup.h>
65 #include <asm/uv/uv.h>
66 #include <linux/mc146818rtc.h>
68 #include <asm/smpboot_hooks.h>
71 u8 apicid_2_node
[MAX_APICID
];
72 static int low_mappings
;
75 /* State of each CPU */
76 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
78 /* Store all idle threads, this can be reused instead of creating
79 * a new thread. Also avoids complicated thread destroy functionality
82 #ifdef CONFIG_HOTPLUG_CPU
84 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
85 * removed after init for !CONFIG_HOTPLUG_CPU.
87 static DEFINE_PER_CPU(struct task_struct
*, idle_thread_array
);
88 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
89 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
91 static struct task_struct
*idle_thread_array
[NR_CPUS
] __cpuinitdata
;
92 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
93 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
96 /* Number of siblings per CPU package */
97 int smp_num_siblings
= 1;
98 EXPORT_SYMBOL(smp_num_siblings
);
100 /* Last level cache ID of each logical CPU */
101 DEFINE_PER_CPU(u16
, cpu_llc_id
) = BAD_APICID
;
103 /* representing HT siblings of each logical CPU */
104 DEFINE_PER_CPU(cpumask_var_t
, cpu_sibling_map
);
105 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
107 /* representing HT and core siblings of each logical CPU */
108 DEFINE_PER_CPU(cpumask_var_t
, cpu_core_map
);
109 EXPORT_PER_CPU_SYMBOL(cpu_core_map
);
111 /* Per CPU bogomips and other parameters */
112 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86
, cpu_info
);
113 EXPORT_PER_CPU_SYMBOL(cpu_info
);
115 atomic_t init_deasserted
;
117 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
118 /* which node each logical CPU is on */
119 int cpu_to_node_map
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = 0 };
120 EXPORT_SYMBOL(cpu_to_node_map
);
122 /* set up a mapping between cpu and node. */
123 static void map_cpu_to_node(int cpu
, int node
)
125 printk(KERN_INFO
"Mapping cpu %d to node %d\n", cpu
, node
);
126 cpumask_set_cpu(cpu
, &node_to_cpumask_map
[node
]);
127 cpu_to_node_map
[cpu
] = node
;
130 /* undo a mapping between cpu and node. */
131 static void unmap_cpu_to_node(int cpu
)
135 printk(KERN_INFO
"Unmapping cpu %d from all nodes\n", cpu
);
136 for (node
= 0; node
< MAX_NUMNODES
; node
++)
137 cpumask_clear_cpu(cpu
, &node_to_cpumask_map
[node
]);
138 cpu_to_node_map
[cpu
] = 0;
140 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
141 #define map_cpu_to_node(cpu, node) ({})
142 #define unmap_cpu_to_node(cpu) ({})
146 static int boot_cpu_logical_apicid
;
148 u8 cpu_2_logical_apicid
[NR_CPUS
] __read_mostly
=
149 { [0 ... NR_CPUS
-1] = BAD_APICID
};
151 static void map_cpu_to_logical_apicid(void)
153 int cpu
= smp_processor_id();
154 int apicid
= logical_smp_processor_id();
155 int node
= apic
->apicid_to_node(apicid
);
157 if (!node_online(node
))
158 node
= first_online_node
;
160 cpu_2_logical_apicid
[cpu
] = apicid
;
161 map_cpu_to_node(cpu
, node
);
164 void numa_remove_cpu(int cpu
)
166 cpu_2_logical_apicid
[cpu
] = BAD_APICID
;
167 unmap_cpu_to_node(cpu
);
170 #define map_cpu_to_logical_apicid() do {} while (0)
174 * Report back to the Boot Processor.
177 static void __cpuinit
smp_callin(void)
180 unsigned long timeout
;
183 * If waken up by an INIT in an 82489DX configuration
184 * we may get here before an INIT-deassert IPI reaches
185 * our local APIC. We have to wait for the IPI or we'll
186 * lock up on an APIC access.
188 if (apic
->wait_for_init_deassert
)
189 apic
->wait_for_init_deassert(&init_deasserted
);
192 * (This works even if the APIC is not enabled.)
194 phys_id
= read_apic_id();
195 cpuid
= smp_processor_id();
196 if (cpumask_test_cpu(cpuid
, cpu_callin_mask
)) {
197 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__
,
200 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
203 * STARTUP IPIs are fragile beasts as they might sometimes
204 * trigger some glue motherboard logic. Complete APIC bus
205 * silence for 1 second, this overestimates the time the
206 * boot CPU is spending to send the up to 2 STARTUP IPIs
207 * by a factor of two. This should be enough.
211 * Waiting 2s total for startup (udelay is not yet working)
213 timeout
= jiffies
+ 2*HZ
;
214 while (time_before(jiffies
, timeout
)) {
216 * Has the boot CPU finished it's STARTUP sequence?
218 if (cpumask_test_cpu(cpuid
, cpu_callout_mask
))
223 if (!time_before(jiffies
, timeout
)) {
224 panic("%s: CPU%d started up but did not get a callout!\n",
229 * the boot CPU has finished the init stage and is spinning
230 * on callin_map until we finish. We are free to set up this
231 * CPU, first the APIC. (this is probably redundant on most
235 pr_debug("CALLIN, before setup_local_APIC().\n");
236 if (apic
->smp_callin_clear_local_apic
)
237 apic
->smp_callin_clear_local_apic();
239 end_local_APIC_setup();
240 map_cpu_to_logical_apicid();
242 notify_cpu_starting(cpuid
);
246 * Need to enable IRQs because it can take longer and then
247 * the NMI watchdog might kill us.
252 pr_debug("Stack at about %p\n", &cpuid
);
255 * Save our processor parameters
257 smp_store_cpu_info(cpuid
);
260 * Allow the master to continue.
262 cpumask_set_cpu(cpuid
, cpu_callin_mask
);
266 * Activate a secondary processor.
268 notrace
static void __cpuinit
start_secondary(void *unused
)
271 * Don't put *anything* before cpu_init(), SMP booting is too
272 * fragile that we want to limit the things done here to the
273 * most necessary things.
280 /* otherwise gcc will move up smp_processor_id before the cpu_init */
283 * Check TSC synchronization with the BP:
285 check_tsc_sync_target();
287 if (nmi_watchdog
== NMI_IO_APIC
) {
288 disable_8259A_irq(0);
289 enable_NMI_through_LVT0();
299 /* This must be done before setting cpu_online_map */
300 set_cpu_sibling_map(raw_smp_processor_id());
304 * We need to hold call_lock, so there is no inconsistency
305 * between the time smp_call_function() determines number of
306 * IPI recipients, and the time when the determination is made
307 * for which cpus receive the IPI. Holding this
308 * lock helps us to not include this cpu in a currently in progress
309 * smp_call_function().
311 * We need to hold vector_lock so there the set of online cpus
312 * does not change while we are assigning vectors to cpus. Holding
313 * this lock ensures we don't half assign or remove an irq from a cpu.
317 __setup_vector_irq(smp_processor_id());
318 set_cpu_online(smp_processor_id(), true);
319 unlock_vector_lock();
321 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
323 /* enable local interrupts */
326 setup_secondary_clock();
333 * The bootstrap kernel entry code has set these up. Save them for
337 void __cpuinit
smp_store_cpu_info(int id
)
339 struct cpuinfo_x86
*c
= &cpu_data(id
);
344 identify_secondary_cpu(c
);
348 void __cpuinit
set_cpu_sibling_map(int cpu
)
351 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
353 cpumask_set_cpu(cpu
, cpu_sibling_setup_mask
);
355 if (smp_num_siblings
> 1) {
356 for_each_cpu(i
, cpu_sibling_setup_mask
) {
357 struct cpuinfo_x86
*o
= &cpu_data(i
);
359 if (c
->phys_proc_id
== o
->phys_proc_id
&&
360 c
->cpu_core_id
== o
->cpu_core_id
) {
361 cpumask_set_cpu(i
, cpu_sibling_mask(cpu
));
362 cpumask_set_cpu(cpu
, cpu_sibling_mask(i
));
363 cpumask_set_cpu(i
, cpu_core_mask(cpu
));
364 cpumask_set_cpu(cpu
, cpu_core_mask(i
));
365 cpumask_set_cpu(i
, &c
->llc_shared_map
);
366 cpumask_set_cpu(cpu
, &o
->llc_shared_map
);
370 cpumask_set_cpu(cpu
, cpu_sibling_mask(cpu
));
373 cpumask_set_cpu(cpu
, &c
->llc_shared_map
);
375 if (current_cpu_data
.x86_max_cores
== 1) {
376 cpumask_copy(cpu_core_mask(cpu
), cpu_sibling_mask(cpu
));
381 for_each_cpu(i
, cpu_sibling_setup_mask
) {
382 if (per_cpu(cpu_llc_id
, cpu
) != BAD_APICID
&&
383 per_cpu(cpu_llc_id
, cpu
) == per_cpu(cpu_llc_id
, i
)) {
384 cpumask_set_cpu(i
, &c
->llc_shared_map
);
385 cpumask_set_cpu(cpu
, &cpu_data(i
).llc_shared_map
);
387 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
) {
388 cpumask_set_cpu(i
, cpu_core_mask(cpu
));
389 cpumask_set_cpu(cpu
, cpu_core_mask(i
));
391 * Does this new cpu bringup a new core?
393 if (cpumask_weight(cpu_sibling_mask(cpu
)) == 1) {
395 * for each core in package, increment
396 * the booted_cores for this new cpu
398 if (cpumask_first(cpu_sibling_mask(i
)) == i
)
401 * increment the core count for all
402 * the other cpus in this package
405 cpu_data(i
).booted_cores
++;
406 } else if (i
!= cpu
&& !c
->booted_cores
)
407 c
->booted_cores
= cpu_data(i
).booted_cores
;
412 /* maps the cpu to the sched domain representing multi-core */
413 const struct cpumask
*cpu_coregroup_mask(int cpu
)
415 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
417 * For perf, we return last level cache shared map.
418 * And for power savings, we return cpu_core_map
420 if (sched_mc_power_savings
|| sched_smt_power_savings
)
421 return cpu_core_mask(cpu
);
423 return &c
->llc_shared_map
;
426 static void impress_friends(void)
429 unsigned long bogosum
= 0;
431 * Allow the user to impress friends.
433 pr_debug("Before bogomips.\n");
434 for_each_possible_cpu(cpu
)
435 if (cpumask_test_cpu(cpu
, cpu_callout_mask
))
436 bogosum
+= cpu_data(cpu
).loops_per_jiffy
;
438 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
441 (bogosum
/(5000/HZ
))%100);
443 pr_debug("Before bogocount - setting activated=1.\n");
446 void __inquire_remote_apic(int apicid
)
448 unsigned i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
449 char *names
[] = { "ID", "VERSION", "SPIV" };
453 printk(KERN_INFO
"Inquiring remote APIC 0x%x...\n", apicid
);
455 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
456 printk(KERN_INFO
"... APIC 0x%x %s: ", apicid
, names
[i
]);
461 status
= safe_apic_wait_icr_idle();
464 "a previous APIC delivery may have failed\n");
466 apic_icr_write(APIC_DM_REMRD
| regs
[i
], apicid
);
471 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
472 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
475 case APIC_ICR_RR_VALID
:
476 status
= apic_read(APIC_RRR
);
477 printk(KERN_CONT
"%08x\n", status
);
480 printk(KERN_CONT
"failed\n");
486 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
487 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
488 * won't ... remember to clear down the APIC, etc later.
491 wakeup_secondary_cpu_via_nmi(int logical_apicid
, unsigned long start_eip
)
493 unsigned long send_status
, accept_status
= 0;
497 /* Boot on the stack */
498 /* Kick the second */
499 apic_icr_write(APIC_DM_NMI
| apic
->dest_logical
, logical_apicid
);
501 pr_debug("Waiting for send to finish...\n");
502 send_status
= safe_apic_wait_icr_idle();
505 * Give the other CPU some time to accept the IPI.
508 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
509 maxlvt
= lapic_get_maxlvt();
510 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
511 apic_write(APIC_ESR
, 0);
512 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
514 pr_debug("NMI sent.\n");
517 printk(KERN_ERR
"APIC never delivered???\n");
519 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
521 return (send_status
| accept_status
);
525 wakeup_secondary_cpu_via_init(int phys_apicid
, unsigned long start_eip
)
527 unsigned long send_status
, accept_status
= 0;
528 int maxlvt
, num_starts
, j
;
530 maxlvt
= lapic_get_maxlvt();
533 * Be paranoid about clearing APIC errors.
535 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
536 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
537 apic_write(APIC_ESR
, 0);
541 pr_debug("Asserting INIT.\n");
544 * Turn INIT on target chip
549 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
| APIC_DM_INIT
,
552 pr_debug("Waiting for send to finish...\n");
553 send_status
= safe_apic_wait_icr_idle();
557 pr_debug("Deasserting INIT.\n");
561 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_DM_INIT
, phys_apicid
);
563 pr_debug("Waiting for send to finish...\n");
564 send_status
= safe_apic_wait_icr_idle();
567 atomic_set(&init_deasserted
, 1);
570 * Should we send STARTUP IPIs ?
572 * Determine this based on the APIC version.
573 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
575 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
581 * Paravirt / VMI wants a startup IPI hook here to set up the
582 * target processor state.
584 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
585 (unsigned long)stack_start
.sp
);
588 * Run STARTUP IPI loop.
590 pr_debug("#startup loops: %d.\n", num_starts
);
592 for (j
= 1; j
<= num_starts
; j
++) {
593 pr_debug("Sending STARTUP #%d.\n", j
);
594 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
595 apic_write(APIC_ESR
, 0);
597 pr_debug("After apic_write.\n");
604 /* Boot on the stack */
605 /* Kick the second */
606 apic_icr_write(APIC_DM_STARTUP
| (start_eip
>> 12),
610 * Give the other CPU some time to accept the IPI.
614 pr_debug("Startup point 1.\n");
616 pr_debug("Waiting for send to finish...\n");
617 send_status
= safe_apic_wait_icr_idle();
620 * Give the other CPU some time to accept the IPI.
623 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
624 apic_write(APIC_ESR
, 0);
625 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
626 if (send_status
|| accept_status
)
629 pr_debug("After Startup.\n");
632 printk(KERN_ERR
"APIC never delivered???\n");
634 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
636 return (send_status
| accept_status
);
640 struct work_struct work
;
641 struct task_struct
*idle
;
642 struct completion done
;
646 static void __cpuinit
do_fork_idle(struct work_struct
*work
)
648 struct create_idle
*c_idle
=
649 container_of(work
, struct create_idle
, work
);
651 c_idle
->idle
= fork_idle(c_idle
->cpu
);
652 complete(&c_idle
->done
);
656 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
657 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
658 * Returns zero if CPU booted OK, else error code from
659 * ->wakeup_secondary_cpu.
661 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
663 unsigned long boot_error
= 0;
664 unsigned long start_ip
;
666 struct create_idle c_idle
= {
668 .done
= COMPLETION_INITIALIZER_ONSTACK(c_idle
.done
),
671 INIT_WORK(&c_idle
.work
, do_fork_idle
);
673 alternatives_smp_switch(1);
675 c_idle
.idle
= get_idle_for_cpu(cpu
);
678 * We can't use kernel_thread since we must avoid to
679 * reschedule the child.
682 c_idle
.idle
->thread
.sp
= (unsigned long) (((struct pt_regs
*)
683 (THREAD_SIZE
+ task_stack_page(c_idle
.idle
))) - 1);
684 init_idle(c_idle
.idle
, cpu
);
688 if (!keventd_up() || current_is_keventd())
689 c_idle
.work
.func(&c_idle
.work
);
691 schedule_work(&c_idle
.work
);
692 wait_for_completion(&c_idle
.done
);
695 if (IS_ERR(c_idle
.idle
)) {
696 printk("failed fork for CPU %d\n", cpu
);
697 return PTR_ERR(c_idle
.idle
);
700 set_idle_for_cpu(cpu
, c_idle
.idle
);
702 per_cpu(current_task
, cpu
) = c_idle
.idle
;
704 /* Stack for startup_32 can be just as for start_secondary onwards */
707 clear_tsk_thread_flag(c_idle
.idle
, TIF_FORK
);
708 initial_gs
= per_cpu_offset(cpu
);
709 per_cpu(kernel_stack
, cpu
) =
710 (unsigned long)task_stack_page(c_idle
.idle
) -
711 KERNEL_STACK_OFFSET
+ THREAD_SIZE
;
713 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
714 initial_code
= (unsigned long)start_secondary
;
715 stack_start
.sp
= (void *) c_idle
.idle
->thread
.sp
;
717 /* start_ip had better be page-aligned! */
718 start_ip
= setup_trampoline();
720 /* So we see what's up */
721 printk(KERN_INFO
"Booting processor %d APIC 0x%x ip 0x%lx\n",
722 cpu
, apicid
, start_ip
);
725 * This grunge runs the startup process for
726 * the targeted processor.
729 atomic_set(&init_deasserted
, 0);
731 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
733 pr_debug("Setting warm reset code and vector.\n");
735 smpboot_setup_warm_reset_vector(start_ip
);
737 * Be paranoid about clearing APIC errors.
739 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
740 apic_write(APIC_ESR
, 0);
746 * Kick the secondary CPU. Use the method in the APIC driver
747 * if it's defined - or use an INIT boot APIC message otherwise:
749 if (apic
->wakeup_secondary_cpu
)
750 boot_error
= apic
->wakeup_secondary_cpu(apicid
, start_ip
);
752 boot_error
= wakeup_secondary_cpu_via_init(apicid
, start_ip
);
756 * allow APs to start initializing.
758 pr_debug("Before Callout %d.\n", cpu
);
759 cpumask_set_cpu(cpu
, cpu_callout_mask
);
760 pr_debug("After Callout %d.\n", cpu
);
763 * Wait 5s total for a response
765 for (timeout
= 0; timeout
< 50000; timeout
++) {
766 if (cpumask_test_cpu(cpu
, cpu_callin_mask
))
767 break; /* It has booted */
771 if (cpumask_test_cpu(cpu
, cpu_callin_mask
)) {
772 /* number CPUs logically, starting from 1 (BSP is 0) */
774 printk(KERN_INFO
"CPU%d: ", cpu
);
775 print_cpu_info(&cpu_data(cpu
));
776 pr_debug("CPU has booted.\n");
779 if (*((volatile unsigned char *)trampoline_base
)
781 /* trampoline started but...? */
782 printk(KERN_ERR
"Stuck ??\n");
784 /* trampoline code not run */
785 printk(KERN_ERR
"Not responding.\n");
786 if (apic
->inquire_remote_apic
)
787 apic
->inquire_remote_apic(apicid
);
792 /* Try to put things back the way they were before ... */
793 numa_remove_cpu(cpu
); /* was set by numa_add_cpu */
795 /* was set by do_boot_cpu() */
796 cpumask_clear_cpu(cpu
, cpu_callout_mask
);
798 /* was set by cpu_init() */
799 cpumask_clear_cpu(cpu
, cpu_initialized_mask
);
801 set_cpu_present(cpu
, false);
802 per_cpu(x86_cpu_to_apicid
, cpu
) = BAD_APICID
;
805 /* mark "stuck" area as not stuck */
806 *((volatile unsigned long *)trampoline_base
) = 0;
809 * Cleanup possible dangling ends...
811 smpboot_restore_warm_reset_vector();
816 int __cpuinit
native_cpu_up(unsigned int cpu
)
818 int apicid
= apic
->cpu_present_to_apicid(cpu
);
822 WARN_ON(irqs_disabled());
824 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu
);
826 if (apicid
== BAD_APICID
|| apicid
== boot_cpu_physical_apicid
||
827 !physid_isset(apicid
, phys_cpu_present_map
)) {
828 printk(KERN_ERR
"%s: bad cpu %d\n", __func__
, cpu
);
833 * Already booted CPU?
835 if (cpumask_test_cpu(cpu
, cpu_callin_mask
)) {
836 pr_debug("do_boot_cpu %d Already started\n", cpu
);
841 * Save current MTRR state in case it was changed since early boot
842 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
846 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
849 /* init low mem mapping */
850 clone_pgd_range(swapper_pg_dir
, swapper_pg_dir
+ KERNEL_PGD_BOUNDARY
,
851 min_t(unsigned long, KERNEL_PGD_PTRS
, KERNEL_PGD_BOUNDARY
));
855 err
= do_boot_cpu(apicid
, cpu
);
860 err
= do_boot_cpu(apicid
, cpu
);
863 pr_debug("do_boot_cpu failed %d\n", err
);
868 * Check TSC synchronization with the AP (keep irqs disabled
871 local_irq_save(flags
);
872 check_tsc_sync_source(cpu
);
873 local_irq_restore(flags
);
875 while (!cpu_online(cpu
)) {
877 touch_nmi_watchdog();
884 * Fall back to non SMP mode after errors.
886 * RED-PEN audit/test this more. I bet there is more state messed up here.
888 static __init
void disable_smp(void)
890 /* use the read/write pointers to the present and possible maps */
891 cpumask_copy(&cpu_present_map
, cpumask_of(0));
892 cpumask_copy(&cpu_possible_map
, cpumask_of(0));
893 smpboot_clear_io_apic_irqs();
895 if (smp_found_config
)
896 physid_set_mask_of_physid(boot_cpu_physical_apicid
, &phys_cpu_present_map
);
898 physid_set_mask_of_physid(0, &phys_cpu_present_map
);
899 map_cpu_to_logical_apicid();
900 cpumask_set_cpu(0, cpu_sibling_mask(0));
901 cpumask_set_cpu(0, cpu_core_mask(0));
905 * Various sanity checks.
907 static int __init
smp_sanity_check(unsigned max_cpus
)
911 #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
912 if (def_to_bigsmp
&& nr_cpu_ids
> 8) {
917 "More than 8 CPUs detected - skipping them.\n"
918 "Use CONFIG_X86_BIGSMP.\n");
921 for_each_present_cpu(cpu
) {
923 set_cpu_present(cpu
, false);
928 for_each_possible_cpu(cpu
) {
930 set_cpu_possible(cpu
, false);
938 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map
)) {
940 "weird, boot CPU (#%d) not listed by the BIOS.\n",
941 hard_smp_processor_id());
943 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
947 * If we couldn't find an SMP configuration at boot time,
948 * get out of here now!
950 if (!smp_found_config
&& !acpi_lapic
) {
952 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
954 if (APIC_init_uniprocessor())
955 printk(KERN_NOTICE
"Local APIC not detected."
956 " Using dummy APIC emulation.\n");
961 * Should not be necessary because the MP table should list the boot
962 * CPU too, but we do it for the sake of robustness anyway.
964 if (!apic
->check_phys_apicid_present(boot_cpu_physical_apicid
)) {
966 "weird, boot CPU (#%d) not listed by the BIOS.\n",
967 boot_cpu_physical_apicid
);
968 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
973 * If we couldn't find a local APIC, then get out of here now!
975 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) &&
977 printk(KERN_ERR
"BIOS bug, local APIC #%d not detected!...\n",
978 boot_cpu_physical_apicid
);
979 printk(KERN_ERR
"... forcing use of dummy APIC emulation."
980 "(tell your hw vendor)\n");
981 smpboot_clear_io_apic();
982 arch_disable_smp_support();
989 * If SMP should be disabled, then really disable it!
992 printk(KERN_INFO
"SMP mode deactivated.\n");
993 smpboot_clear_io_apic();
995 localise_nmi_watchdog();
999 end_local_APIC_setup();
1006 static void __init
smp_cpu_index_default(void)
1009 struct cpuinfo_x86
*c
;
1011 for_each_possible_cpu(i
) {
1013 /* mark all to hotplug */
1014 c
->cpu_index
= nr_cpu_ids
;
1019 * Prepare for SMP bootup. The MP table or ACPI has been read
1020 * earlier. Just do some sanity checking here and enable APIC mode.
1022 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
1027 smp_cpu_index_default();
1028 current_cpu_data
= boot_cpu_data
;
1029 cpumask_copy(cpu_callin_mask
, cpumask_of(0));
1032 * Setup boot CPU information
1034 smp_store_cpu_info(0); /* Final full version of the data */
1035 #ifdef CONFIG_X86_32
1036 boot_cpu_logical_apicid
= logical_smp_processor_id();
1038 current_thread_info()->cpu
= 0; /* needed? */
1039 for_each_possible_cpu(i
) {
1040 alloc_cpumask_var(&per_cpu(cpu_sibling_map
, i
), GFP_KERNEL
);
1041 alloc_cpumask_var(&per_cpu(cpu_core_map
, i
), GFP_KERNEL
);
1042 cpumask_clear(per_cpu(cpu_core_map
, i
));
1043 cpumask_clear(per_cpu(cpu_sibling_map
, i
));
1045 set_cpu_sibling_map(0);
1048 #ifdef CONFIG_X86_64
1049 default_setup_apic_routing();
1052 if (smp_sanity_check(max_cpus
) < 0) {
1053 printk(KERN_INFO
"SMP disabled\n");
1059 if (read_apic_id() != boot_cpu_physical_apicid
) {
1060 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1061 read_apic_id(), boot_cpu_physical_apicid
);
1062 /* Or can we switch back to PIC here? */
1069 * Switch from PIC to APIC mode.
1074 * Enable IO APIC before setting up error vector
1076 if (!skip_ioapic_setup
&& nr_ioapics
)
1079 end_local_APIC_setup();
1081 map_cpu_to_logical_apicid();
1083 if (apic
->setup_portio_remap
)
1084 apic
->setup_portio_remap();
1086 smpboot_setup_io_apic();
1088 * Set up local APIC timer on boot CPU.
1091 printk(KERN_INFO
"CPU%d: ", 0);
1092 print_cpu_info(&cpu_data(0));
1101 * Early setup to make printk work.
1103 void __init
native_smp_prepare_boot_cpu(void)
1105 int me
= smp_processor_id();
1106 switch_to_new_gdt(me
);
1107 /* already set me in cpu_online_mask in boot_cpu_init() */
1108 cpumask_set_cpu(me
, cpu_callout_mask
);
1109 per_cpu(cpu_state
, me
) = CPU_ONLINE
;
1112 void __init
native_smp_cpus_done(unsigned int max_cpus
)
1114 pr_debug("Boot done.\n");
1117 #ifdef CONFIG_X86_IO_APIC
1118 setup_ioapic_dest();
1120 check_nmi_watchdog();
1123 static int __initdata setup_possible_cpus
= -1;
1124 static int __init
_setup_possible_cpus(char *str
)
1126 get_option(&str
, &setup_possible_cpus
);
1129 early_param("possible_cpus", _setup_possible_cpus
);
1133 * cpu_possible_map should be static, it cannot change as cpu's
1134 * are onlined, or offlined. The reason is per-cpu data-structures
1135 * are allocated by some modules at init time, and dont expect to
1136 * do this dynamically on cpu arrival/departure.
1137 * cpu_present_map on the other hand can change dynamically.
1138 * In case when cpu_hotplug is not compiled, then we resort to current
1139 * behaviour, which is cpu_possible == cpu_present.
1142 * Three ways to find out the number of additional hotplug CPUs:
1143 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1144 * - The user can overwrite it with possible_cpus=NUM
1145 * - Otherwise don't reserve additional CPUs.
1146 * We do this because additional CPUs waste a lot of memory.
1149 __init
void prefill_possible_map(void)
1153 /* no processor from mptable or madt */
1154 if (!num_processors
)
1157 if (setup_possible_cpus
== -1)
1158 possible
= num_processors
+ disabled_cpus
;
1160 possible
= setup_possible_cpus
;
1162 total_cpus
= max_t(int, possible
, num_processors
+ disabled_cpus
);
1164 if (possible
> CONFIG_NR_CPUS
) {
1166 "%d Processors exceeds NR_CPUS limit of %d\n",
1167 possible
, CONFIG_NR_CPUS
);
1168 possible
= CONFIG_NR_CPUS
;
1171 printk(KERN_INFO
"SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1172 possible
, max_t(int, possible
- num_processors
, 0));
1174 for (i
= 0; i
< possible
; i
++)
1175 set_cpu_possible(i
, true);
1177 nr_cpu_ids
= possible
;
1180 #ifdef CONFIG_HOTPLUG_CPU
1182 static void remove_siblinginfo(int cpu
)
1185 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
1187 for_each_cpu(sibling
, cpu_core_mask(cpu
)) {
1188 cpumask_clear_cpu(cpu
, cpu_core_mask(sibling
));
1190 * last thread sibling in this cpu core going down
1192 if (cpumask_weight(cpu_sibling_mask(cpu
)) == 1)
1193 cpu_data(sibling
).booted_cores
--;
1196 for_each_cpu(sibling
, cpu_sibling_mask(cpu
))
1197 cpumask_clear_cpu(cpu
, cpu_sibling_mask(sibling
));
1198 cpumask_clear(cpu_sibling_mask(cpu
));
1199 cpumask_clear(cpu_core_mask(cpu
));
1200 c
->phys_proc_id
= 0;
1202 cpumask_clear_cpu(cpu
, cpu_sibling_setup_mask
);
1205 static void __ref
remove_cpu_from_maps(int cpu
)
1207 set_cpu_online(cpu
, false);
1208 cpumask_clear_cpu(cpu
, cpu_callout_mask
);
1209 cpumask_clear_cpu(cpu
, cpu_callin_mask
);
1210 /* was set by cpu_init() */
1211 cpumask_clear_cpu(cpu
, cpu_initialized_mask
);
1212 numa_remove_cpu(cpu
);
1215 void cpu_disable_common(void)
1217 int cpu
= smp_processor_id();
1220 * Allow any queued timer interrupts to get serviced
1221 * This is only a temporary solution until we cleanup
1222 * fixup_irqs as we do for IA64.
1227 local_irq_disable();
1228 remove_siblinginfo(cpu
);
1230 /* It's now safe to remove this processor from the online map */
1232 remove_cpu_from_maps(cpu
);
1233 unlock_vector_lock();
1237 int native_cpu_disable(void)
1239 int cpu
= smp_processor_id();
1242 * Perhaps use cpufreq to drop frequency, but that could go
1243 * into generic code.
1245 * We won't take down the boot processor on i386 due to some
1246 * interrupts only being able to be serviced by the BSP.
1247 * Especially so if we're not using an IOAPIC -zwane
1252 if (nmi_watchdog
== NMI_LOCAL_APIC
)
1253 stop_apic_nmi_watchdog(NULL
);
1256 cpu_disable_common();
1260 void native_cpu_die(unsigned int cpu
)
1262 /* We don't do anything here: idle task is faking death itself. */
1265 for (i
= 0; i
< 10; i
++) {
1266 /* They ack this in play_dead by setting CPU_DEAD */
1267 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
) {
1268 printk(KERN_INFO
"CPU %d is now offline\n", cpu
);
1269 if (1 == num_online_cpus())
1270 alternatives_smp_switch(0);
1275 printk(KERN_ERR
"CPU %u didn't die...\n", cpu
);
1278 void play_dead_common(void)
1281 reset_lazy_tlbstate();
1282 irq_ctx_exit(raw_smp_processor_id());
1283 c1e_remove_cpu(raw_smp_processor_id());
1287 __get_cpu_var(cpu_state
) = CPU_DEAD
;
1290 * With physical CPU hotplug, we should halt the cpu
1292 local_irq_disable();
1295 void native_play_dead(void)
1301 #else /* ... !CONFIG_HOTPLUG_CPU */
1302 int native_cpu_disable(void)
1307 void native_cpu_die(unsigned int cpu
)
1309 /* We said "no" in __cpu_disable */
1313 void native_play_dead(void)