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x86: Undo return-thunk damage
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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * ld script for the x86 kernel
4 *
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6 *
7 * Modernisation, unification and other changes and fixes:
8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
9 *
10 *
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
16 */
17
18 #ifdef CONFIG_X86_32
19 #define LOAD_OFFSET __PAGE_OFFSET
20 #else
21 #define LOAD_OFFSET __START_KERNEL_map
22 #endif
23
24 #define RUNTIME_DISCARD_EXIT
25 #define EMITS_PT_NOTE
26 #define RO_EXCEPTION_TABLE_ALIGN 16
27
28 #include <asm-generic/vmlinux.lds.h>
29 #include <asm/asm-offsets.h>
30 #include <asm/thread_info.h>
31 #include <asm/page_types.h>
32 #include <asm/orc_lookup.h>
33 #include <asm/cache.h>
34 #include <asm/boot.h>
35
36 #undef i386 /* in case the preprocessor is a 32bit one */
37
38 OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT)
39
40 #ifdef CONFIG_X86_32
41 OUTPUT_ARCH(i386)
42 ENTRY(phys_startup_32)
43 #else
44 OUTPUT_ARCH(i386:x86-64)
45 ENTRY(phys_startup_64)
46 #endif
47
48 jiffies = jiffies_64;
49
50 #if defined(CONFIG_X86_64)
51 /*
52 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
53 * boundaries spanning kernel text, rodata and data sections.
54 *
55 * However, kernel identity mappings will have different RWX permissions
56 * to the pages mapping to text and to the pages padding (which are freed) the
57 * text section. Hence kernel identity mappings will be broken to smaller
58 * pages. For 64-bit, kernel text and kernel identity mappings are different,
59 * so we can enable protection checks as well as retain 2MB large page
60 * mappings for kernel text.
61 */
62 #define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
63
64 #define X86_ALIGN_RODATA_END \
65 . = ALIGN(HPAGE_SIZE); \
66 __end_rodata_hpage_align = .; \
67 __end_rodata_aligned = .;
68
69 #define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
70 #define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
71
72 /*
73 * This section contains data which will be mapped as decrypted. Memory
74 * encryption operates on a page basis. Make this section PMD-aligned
75 * to avoid splitting the pages while mapping the section early.
76 *
77 * Note: We use a separate section so that only this section gets
78 * decrypted to avoid exposing more than we wish.
79 */
80 #define BSS_DECRYPTED \
81 . = ALIGN(PMD_SIZE); \
82 __start_bss_decrypted = .; \
83 *(.bss..decrypted); \
84 . = ALIGN(PAGE_SIZE); \
85 __start_bss_decrypted_unused = .; \
86 . = ALIGN(PMD_SIZE); \
87 __end_bss_decrypted = .; \
88
89 #else
90
91 #define X86_ALIGN_RODATA_BEGIN
92 #define X86_ALIGN_RODATA_END \
93 . = ALIGN(PAGE_SIZE); \
94 __end_rodata_aligned = .;
95
96 #define ALIGN_ENTRY_TEXT_BEGIN
97 #define ALIGN_ENTRY_TEXT_END
98 #define BSS_DECRYPTED
99
100 #endif
101
102 PHDRS {
103 text PT_LOAD FLAGS(5); /* R_E */
104 data PT_LOAD FLAGS(6); /* RW_ */
105 #ifdef CONFIG_X86_64
106 #ifdef CONFIG_SMP
107 percpu PT_LOAD FLAGS(6); /* RW_ */
108 #endif
109 init PT_LOAD FLAGS(7); /* RWE */
110 #endif
111 note PT_NOTE FLAGS(0); /* ___ */
112 }
113
114 SECTIONS
115 {
116 #ifdef CONFIG_X86_32
117 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
118 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
119 #else
120 . = __START_KERNEL;
121 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
122 #endif
123
124 /* Text and read-only data */
125 .text : AT(ADDR(.text) - LOAD_OFFSET) {
126 _text = .;
127 _stext = .;
128 /* bootstrapping code */
129 HEAD_TEXT
130 TEXT_TEXT
131 SCHED_TEXT
132 CPUIDLE_TEXT
133 LOCK_TEXT
134 KPROBES_TEXT
135 ALIGN_ENTRY_TEXT_BEGIN
136 ENTRY_TEXT
137 ALIGN_ENTRY_TEXT_END
138 SOFTIRQENTRY_TEXT
139 STATIC_CALL_TEXT
140 *(.fixup)
141 *(.gnu.warning)
142
143 #ifdef CONFIG_RETPOLINE
144 __indirect_thunk_start = .;
145 *(.text.__x86.indirect_thunk)
146 __indirect_thunk_end = .;
147 #endif
148 } :text =0xcccc
149
150 /* End of text section, which should occupy whole number of pages */
151 _etext = .;
152 . = ALIGN(PAGE_SIZE);
153
154 X86_ALIGN_RODATA_BEGIN
155 RO_DATA(PAGE_SIZE)
156 X86_ALIGN_RODATA_END
157
158 /* Data */
159 .data : AT(ADDR(.data) - LOAD_OFFSET) {
160 /* Start of data section */
161 _sdata = .;
162
163 /* init_task */
164 INIT_TASK_DATA(THREAD_SIZE)
165
166 #ifdef CONFIG_X86_32
167 /* 32 bit has nosave before _edata */
168 NOSAVE_DATA
169 #endif
170
171 PAGE_ALIGNED_DATA(PAGE_SIZE)
172
173 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
174
175 DATA_DATA
176 CONSTRUCTORS
177
178 /* rarely changed data like cpu maps */
179 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
180
181 /* End of data section */
182 _edata = .;
183 } :data
184
185 BUG_TABLE
186
187 ORC_UNWIND_TABLE
188
189 . = ALIGN(PAGE_SIZE);
190 __vvar_page = .;
191
192 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
193 /* work around gold bug 13023 */
194 __vvar_beginning_hack = .;
195
196 /* Place all vvars at the offsets in asm/vvar.h. */
197 #define EMIT_VVAR(name, offset) \
198 . = __vvar_beginning_hack + offset; \
199 *(.vvar_ ## name)
200 #include <asm/vvar.h>
201 #undef EMIT_VVAR
202
203 /*
204 * Pad the rest of the page with zeros. Otherwise the loader
205 * can leave garbage here.
206 */
207 . = __vvar_beginning_hack + PAGE_SIZE;
208 } :data
209
210 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
211
212 /* Init code and data - will be freed after init */
213 . = ALIGN(PAGE_SIZE);
214 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
215 __init_begin = .; /* paired with __init_end */
216 }
217
218 #if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
219 /*
220 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
221 * output PHDR, so the next output section - .init.text - should
222 * start another segment - init.
223 */
224 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
225 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
226 "per-CPU data too large - increase CONFIG_PHYSICAL_START")
227 #endif
228
229 INIT_TEXT_SECTION(PAGE_SIZE)
230 #ifdef CONFIG_X86_64
231 :init
232 #endif
233
234 /*
235 * Section for code used exclusively before alternatives are run. All
236 * references to such code must be patched out by alternatives, normally
237 * by using X86_FEATURE_ALWAYS CPU feature bit.
238 *
239 * See static_cpu_has() for an example.
240 */
241 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
242 *(.altinstr_aux)
243 }
244
245 INIT_DATA_SECTION(16)
246
247 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
248 __x86_cpu_dev_start = .;
249 *(.x86_cpu_dev.init)
250 __x86_cpu_dev_end = .;
251 }
252
253 #ifdef CONFIG_X86_INTEL_MID
254 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
255 LOAD_OFFSET) {
256 __x86_intel_mid_dev_start = .;
257 *(.x86_intel_mid_dev.init)
258 __x86_intel_mid_dev_end = .;
259 }
260 #endif
261
262 /*
263 * start address and size of operations which during runtime
264 * can be patched with virtualization friendly instructions or
265 * baremetal native ones. Think page table operations.
266 * Details in paravirt_types.h
267 */
268 . = ALIGN(8);
269 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
270 __parainstructions = .;
271 *(.parainstructions)
272 __parainstructions_end = .;
273 }
274
275 #ifdef CONFIG_RETPOLINE
276 /*
277 * List of instructions that call/jmp/jcc to retpoline thunks
278 * __x86_indirect_thunk_*(). These instructions can be patched along
279 * with alternatives, after which the section can be freed.
280 */
281 . = ALIGN(8);
282 .retpoline_sites : AT(ADDR(.retpoline_sites) - LOAD_OFFSET) {
283 __retpoline_sites = .;
284 *(.retpoline_sites)
285 __retpoline_sites_end = .;
286 }
287
288 . = ALIGN(8);
289 .return_sites : AT(ADDR(.return_sites) - LOAD_OFFSET) {
290 __return_sites = .;
291 *(.return_sites)
292 __return_sites_end = .;
293 }
294 #endif
295
296 /*
297 * struct alt_inst entries. From the header (alternative.h):
298 * "Alternative instructions for different CPU types or capabilities"
299 * Think locking instructions on spinlocks.
300 */
301 . = ALIGN(8);
302 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
303 __alt_instructions = .;
304 *(.altinstructions)
305 __alt_instructions_end = .;
306 }
307
308 /*
309 * And here are the replacement instructions. The linker sticks
310 * them as binary blobs. The .altinstructions has enough data to
311 * get the address and the length of them to patch the kernel safely.
312 */
313 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
314 *(.altinstr_replacement)
315 }
316
317 /*
318 * struct iommu_table_entry entries are injected in this section.
319 * It is an array of IOMMUs which during run time gets sorted depending
320 * on its dependency order. After rootfs_initcall is complete
321 * this section can be safely removed.
322 */
323 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) {
324 __iommu_table = .;
325 *(.iommu_table)
326 __iommu_table_end = .;
327 }
328
329 . = ALIGN(8);
330 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
331 __apicdrivers = .;
332 *(.apicdrivers);
333 __apicdrivers_end = .;
334 }
335
336 . = ALIGN(8);
337 /*
338 * .exit.text is discarded at runtime, not link time, to deal with
339 * references from .altinstructions
340 */
341 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
342 EXIT_TEXT
343 }
344
345 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
346 EXIT_DATA
347 }
348
349 #if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
350 PERCPU_SECTION(INTERNODE_CACHE_BYTES)
351 #endif
352
353 . = ALIGN(PAGE_SIZE);
354
355 /* freed after init ends here */
356 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
357 __init_end = .;
358 }
359
360 /*
361 * smp_locks might be freed after init
362 * start/end must be page aligned
363 */
364 . = ALIGN(PAGE_SIZE);
365 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
366 __smp_locks = .;
367 *(.smp_locks)
368 . = ALIGN(PAGE_SIZE);
369 __smp_locks_end = .;
370 }
371
372 #ifdef CONFIG_X86_64
373 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
374 NOSAVE_DATA
375 }
376 #endif
377
378 /* BSS */
379 . = ALIGN(PAGE_SIZE);
380 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
381 __bss_start = .;
382 *(.bss..page_aligned)
383 . = ALIGN(PAGE_SIZE);
384 *(BSS_MAIN)
385 BSS_DECRYPTED
386 . = ALIGN(PAGE_SIZE);
387 __bss_stop = .;
388 }
389
390 /*
391 * The memory occupied from _text to here, __end_of_kernel_reserve, is
392 * automatically reserved in setup_arch(). Anything after here must be
393 * explicitly reserved using memblock_reserve() or it will be discarded
394 * and treated as available memory.
395 */
396 __end_of_kernel_reserve = .;
397
398 . = ALIGN(PAGE_SIZE);
399 .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
400 __brk_base = .;
401 . += 64 * 1024; /* 64k alignment slop space */
402 *(.brk_reservation) /* areas brk users have reserved */
403 __brk_limit = .;
404 }
405
406 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
407 _end = .;
408
409 #ifdef CONFIG_AMD_MEM_ENCRYPT
410 /*
411 * Early scratch/workarea section: Lives outside of the kernel proper
412 * (_text - _end).
413 *
414 * Resides after _end because even though the .brk section is after
415 * __end_of_kernel_reserve, the .brk section is later reserved as a
416 * part of the kernel. Since it is located after __end_of_kernel_reserve
417 * it will be discarded and become part of the available memory. As
418 * such, it can only be used by very early boot code and must not be
419 * needed afterwards.
420 *
421 * Currently used by SME for performing in-place encryption of the
422 * kernel during boot. Resides on a 2MB boundary to simplify the
423 * pagetable setup used for SME in-place encryption.
424 */
425 . = ALIGN(HPAGE_SIZE);
426 .init.scratch : AT(ADDR(.init.scratch) - LOAD_OFFSET) {
427 __init_scratch_begin = .;
428 *(.init.scratch)
429 . = ALIGN(HPAGE_SIZE);
430 __init_scratch_end = .;
431 }
432 #endif
433
434 STABS_DEBUG
435 DWARF_DEBUG
436 ELF_DETAILS
437
438 DISCARDS
439
440 /*
441 * Make sure that the .got.plt is either completely empty or it
442 * contains only the lazy dispatch entries.
443 */
444 .got.plt (INFO) : { *(.got.plt) }
445 ASSERT(SIZEOF(.got.plt) == 0 ||
446 #ifdef CONFIG_X86_64
447 SIZEOF(.got.plt) == 0x18,
448 #else
449 SIZEOF(.got.plt) == 0xc,
450 #endif
451 "Unexpected GOT/PLT entries detected!")
452
453 /*
454 * Sections that should stay zero sized, which is safer to
455 * explicitly check instead of blindly discarding.
456 */
457 .got : {
458 *(.got) *(.igot.*)
459 }
460 ASSERT(SIZEOF(.got) == 0, "Unexpected GOT entries detected!")
461
462 .plt : {
463 *(.plt) *(.plt.*) *(.iplt)
464 }
465 ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!")
466
467 .rel.dyn : {
468 *(.rel.*) *(.rel_*)
469 }
470 ASSERT(SIZEOF(.rel.dyn) == 0, "Unexpected run-time relocations (.rel) detected!")
471
472 .rela.dyn : {
473 *(.rela.*) *(.rela_*)
474 }
475 ASSERT(SIZEOF(.rela.dyn) == 0, "Unexpected run-time relocations (.rela) detected!")
476 }
477
478 /*
479 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
480 */
481 . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
482 "kernel image bigger than KERNEL_IMAGE_SIZE");
483
484 #ifdef CONFIG_X86_64
485 /*
486 * Per-cpu symbols which need to be offset from __per_cpu_load
487 * for the boot processor.
488 */
489 #define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load
490 INIT_PER_CPU(gdt_page);
491 INIT_PER_CPU(fixed_percpu_data);
492 INIT_PER_CPU(irq_stack_backing_store);
493
494 #ifdef CONFIG_SMP
495 . = ASSERT((fixed_percpu_data == 0),
496 "fixed_percpu_data is not at start of per-cpu area");
497 #endif
498
499 #endif /* CONFIG_X86_64 */
500
501 #ifdef CONFIG_KEXEC_CORE
502 #include <asm/kexec.h>
503
504 . = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
505 "kexec control code size is too big");
506 #endif
507