arch/x86/kernel/x86_init.c

   1 /*
   2  * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
   3  *
   4  *  For licencing details see kernel-base/COPYING
   5  */
   6 #include <linux/init.h>
   7 #include <linux/ioport.h>
   8 #include <linux/export.h>
   9 #include <linux/pci.h>
  10
  11 #include <asm/bios_ebda.h>
  12 #include <asm/paravirt.h>
  13 #include <asm/pci_x86.h>
  14 #include <asm/mpspec.h>
  15 #include <asm/setup.h>
  16 #include <asm/apic.h>
  17 #include <asm/e820/api.h>
  18 #include <asm/time.h>
  19 #include <asm/irq.h>
  20 #include <asm/io_apic.h>
  21 #include <asm/hpet.h>
  22 #include <asm/pat.h>
  23 #include <asm/tsc.h>
  24 #include <asm/iommu.h>
  25 #include <asm/mach_traps.h>
  26
  27 void x86_init_noop(void) { }
  28 void __init x86_init_uint_noop(unsigned int unused) { }
  29 int __init iommu_init_noop(void) { return 0; }
  30 void iommu_shutdown_noop(void) { }
  31 bool __init bool_x86_init_noop(void) { return false; }
  32 void x86_op_int_noop(int cpu) { }
  33
  34 /*
  35  * The platform setup functions are preset with the default functions
  36  * for standard PC hardware.
  37  */
  38 struct x86_init_ops x86_init __initdata = {
  39
  40         .resources = {
  41                 .probe_roms             = probe_roms,
  42                 .reserve_resources      = reserve_standard_io_resources,
  43                 .memory_setup           = e820__memory_setup_default,
  44         },
  45
  46         .mpparse = {
  47                 .mpc_record             = x86_init_uint_noop,
  48                 .setup_ioapic_ids       = x86_init_noop,
  49                 .mpc_apic_id            = default_mpc_apic_id,
  50                 .smp_read_mpc_oem       = default_smp_read_mpc_oem,
  51                 .mpc_oem_bus_info       = default_mpc_oem_bus_info,
  52                 .find_smp_config        = default_find_smp_config,
  53                 .get_smp_config         = default_get_smp_config,
  54         },
  55
  56         .irqs = {
  57                 .pre_vector_init        = init_ISA_irqs,
  58                 .intr_init              = native_init_IRQ,
  59                 .trap_init              = x86_init_noop,
  60                 .intr_mode_init         = apic_intr_mode_init
  61         },
  62
  63         .oem = {
  64                 .arch_setup             = x86_init_noop,
  65                 .banner                 = default_banner,
  66         },
  67
  68         .paging = {
  69                 .pagetable_init         = native_pagetable_init,
  70         },
  71
  72         .timers = {
  73                 .setup_percpu_clockev   = setup_boot_APIC_clock,
  74                 .timer_init             = hpet_time_init,
  75                 .wallclock_init         = x86_init_noop,
  76         },
  77
  78         .iommu = {
  79                 .iommu_init             = iommu_init_noop,
  80         },
  81
  82         .pci = {
  83                 .init                   = x86_default_pci_init,
  84                 .init_irq               = x86_default_pci_init_irq,
  85                 .fixup_irqs             = x86_default_pci_fixup_irqs,
  86         },
  87
  88         .hyper = {
  89                 .init_platform          = x86_init_noop,
  90                 .guest_late_init        = x86_init_noop,
  91                 .x2apic_available       = bool_x86_init_noop,
  92                 .init_mem_mapping       = x86_init_noop,
  93         },
  94 };
  95
  96 struct x86_cpuinit_ops x86_cpuinit = {
  97         .early_percpu_clock_init        = x86_init_noop,
  98         .setup_percpu_clockev           = setup_secondary_APIC_clock,
  99 };
 100
 101 static void default_nmi_init(void) { };
 102
 103 struct x86_platform_ops x86_platform __ro_after_init = {
 104         .calibrate_cpu                  = native_calibrate_cpu,
 105         .calibrate_tsc                  = native_calibrate_tsc,
 106         .get_wallclock                  = mach_get_cmos_time,
 107         .set_wallclock                  = mach_set_rtc_mmss,
 108         .iommu_shutdown                 = iommu_shutdown_noop,
 109         .is_untracked_pat_range         = is_ISA_range,
 110         .nmi_init                       = default_nmi_init,
 111         .get_nmi_reason                 = default_get_nmi_reason,
 112         .save_sched_clock_state         = tsc_save_sched_clock_state,
 113         .restore_sched_clock_state      = tsc_restore_sched_clock_state,
 114         .hyper.pin_vcpu                 = x86_op_int_noop,
 115 };
 116
 117 EXPORT_SYMBOL_GPL(x86_platform);
 118
 119 #if defined(CONFIG_PCI_MSI)
 120 struct x86_msi_ops x86_msi __ro_after_init = {
 121         .setup_msi_irqs         = native_setup_msi_irqs,
 122         .teardown_msi_irq       = native_teardown_msi_irq,
 123         .teardown_msi_irqs      = default_teardown_msi_irqs,
 124         .restore_msi_irqs       = default_restore_msi_irqs,
 125 };
 126
 127 /* MSI arch specific hooks */
 128 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 129 {
 130         return x86_msi.setup_msi_irqs(dev, nvec, type);
 131 }
 132
 133 void arch_teardown_msi_irqs(struct pci_dev *dev)
 134 {
 135         x86_msi.teardown_msi_irqs(dev);
 136 }
 137
 138 void arch_teardown_msi_irq(unsigned int irq)
 139 {
 140         x86_msi.teardown_msi_irq(irq);
 141 }
 142
 143 void arch_restore_msi_irqs(struct pci_dev *dev)
 144 {
 145         x86_msi.restore_msi_irqs(dev);
 146 }
 147 #endif
 148
 149 struct x86_io_apic_ops x86_io_apic_ops __ro_after_init = {
 150         .read                   = native_io_apic_read,
 151         .disable                = native_disable_io_apic,
 152 };