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1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 * cpuid support routines
4 *
5 * derived from arch/x86/kvm/x86.c
6 *
7 * Copyright 2011 Red Hat, Inc. and/or its affiliates.
8 * Copyright IBM Corporation, 2008
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2. See
11 * the COPYING file in the top-level directory.
12 *
13 */
14
15 #include <linux/kvm_host.h>
16 #include <linux/export.h>
17 #include <linux/vmalloc.h>
18 #include <linux/uaccess.h>
19 #include <linux/sched/stat.h>
20
21 #include <asm/processor.h>
22 #include <asm/user.h>
23 #include <asm/fpu/xstate.h>
24 #include "cpuid.h"
25 #include "lapic.h"
26 #include "mmu.h"
27 #include "trace.h"
28 #include "pmu.h"
29
30 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
31 {
32 int feature_bit = 0;
33 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
34
35 xstate_bv &= XFEATURE_MASK_EXTEND;
36 while (xstate_bv) {
37 if (xstate_bv & 0x1) {
38 u32 eax, ebx, ecx, edx, offset;
39 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
40 offset = compacted ? ret : ebx;
41 ret = max(ret, offset + eax);
42 }
43
44 xstate_bv >>= 1;
45 feature_bit++;
46 }
47
48 return ret;
49 }
50
51 bool kvm_mpx_supported(void)
52 {
53 return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
54 && kvm_x86_ops->mpx_supported());
55 }
56 EXPORT_SYMBOL_GPL(kvm_mpx_supported);
57
58 u64 kvm_supported_xcr0(void)
59 {
60 u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
61
62 if (!kvm_mpx_supported())
63 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
64
65 return xcr0;
66 }
67
68 #define F(x) bit(X86_FEATURE_##x)
69
70 int kvm_update_cpuid(struct kvm_vcpu *vcpu)
71 {
72 struct kvm_cpuid_entry2 *best;
73 struct kvm_lapic *apic = vcpu->arch.apic;
74
75 best = kvm_find_cpuid_entry(vcpu, 1, 0);
76 if (!best)
77 return 0;
78
79 /* Update OSXSAVE bit */
80 if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
81 best->ecx &= ~F(OSXSAVE);
82 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
83 best->ecx |= F(OSXSAVE);
84 }
85
86 best->edx &= ~F(APIC);
87 if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
88 best->edx |= F(APIC);
89
90 if (apic) {
91 if (best->ecx & F(TSC_DEADLINE_TIMER))
92 apic->lapic_timer.timer_mode_mask = 3 << 17;
93 else
94 apic->lapic_timer.timer_mode_mask = 1 << 17;
95 }
96
97 best = kvm_find_cpuid_entry(vcpu, 7, 0);
98 if (best) {
99 /* Update OSPKE bit */
100 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
101 best->ecx &= ~F(OSPKE);
102 if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
103 best->ecx |= F(OSPKE);
104 }
105 }
106
107 best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
108 if (!best) {
109 vcpu->arch.guest_supported_xcr0 = 0;
110 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
111 } else {
112 vcpu->arch.guest_supported_xcr0 =
113 (best->eax | ((u64)best->edx << 32)) &
114 kvm_supported_xcr0();
115 vcpu->arch.guest_xstate_size = best->ebx =
116 xstate_required_size(vcpu->arch.xcr0, false);
117 }
118
119 best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
120 if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
121 best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
122
123 /*
124 * The existing code assumes virtual address is 48-bit or 57-bit in the
125 * canonical address checks; exit if it is ever changed.
126 */
127 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
128 if (best) {
129 int vaddr_bits = (best->eax & 0xff00) >> 8;
130
131 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
132 return -EINVAL;
133 }
134
135 best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0);
136 if (kvm_hlt_in_guest(vcpu->kvm) && best &&
137 (best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
138 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
139
140 /* Update physical-address width */
141 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
142 kvm_mmu_reset_context(vcpu);
143
144 kvm_pmu_refresh(vcpu);
145 return 0;
146 }
147
148 static int is_efer_nx(void)
149 {
150 unsigned long long efer = 0;
151
152 rdmsrl_safe(MSR_EFER, &efer);
153 return efer & EFER_NX;
154 }
155
156 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
157 {
158 int i;
159 struct kvm_cpuid_entry2 *e, *entry;
160
161 entry = NULL;
162 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
163 e = &vcpu->arch.cpuid_entries[i];
164 if (e->function == 0x80000001) {
165 entry = e;
166 break;
167 }
168 }
169 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
170 entry->edx &= ~F(NX);
171 printk(KERN_INFO "kvm: guest NX capability removed\n");
172 }
173 }
174
175 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
176 {
177 struct kvm_cpuid_entry2 *best;
178
179 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
180 if (!best || best->eax < 0x80000008)
181 goto not_found;
182 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
183 if (best)
184 return best->eax & 0xff;
185 not_found:
186 return 36;
187 }
188 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
189
190 /* when an old userspace process fills a new kernel module */
191 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
192 struct kvm_cpuid *cpuid,
193 struct kvm_cpuid_entry __user *entries)
194 {
195 int r, i;
196 struct kvm_cpuid_entry *cpuid_entries = NULL;
197
198 r = -E2BIG;
199 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
200 goto out;
201 r = -ENOMEM;
202 if (cpuid->nent) {
203 cpuid_entries =
204 vmalloc(array_size(sizeof(struct kvm_cpuid_entry),
205 cpuid->nent));
206 if (!cpuid_entries)
207 goto out;
208 r = -EFAULT;
209 if (copy_from_user(cpuid_entries, entries,
210 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
211 goto out;
212 }
213 for (i = 0; i < cpuid->nent; i++) {
214 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
215 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
216 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
217 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
218 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
219 vcpu->arch.cpuid_entries[i].index = 0;
220 vcpu->arch.cpuid_entries[i].flags = 0;
221 vcpu->arch.cpuid_entries[i].padding[0] = 0;
222 vcpu->arch.cpuid_entries[i].padding[1] = 0;
223 vcpu->arch.cpuid_entries[i].padding[2] = 0;
224 }
225 vcpu->arch.cpuid_nent = cpuid->nent;
226 cpuid_fix_nx_cap(vcpu);
227 kvm_apic_set_version(vcpu);
228 kvm_x86_ops->cpuid_update(vcpu);
229 r = kvm_update_cpuid(vcpu);
230
231 out:
232 vfree(cpuid_entries);
233 return r;
234 }
235
236 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
237 struct kvm_cpuid2 *cpuid,
238 struct kvm_cpuid_entry2 __user *entries)
239 {
240 int r;
241
242 r = -E2BIG;
243 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
244 goto out;
245 r = -EFAULT;
246 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
247 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
248 goto out;
249 vcpu->arch.cpuid_nent = cpuid->nent;
250 kvm_apic_set_version(vcpu);
251 kvm_x86_ops->cpuid_update(vcpu);
252 r = kvm_update_cpuid(vcpu);
253 out:
254 return r;
255 }
256
257 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
258 struct kvm_cpuid2 *cpuid,
259 struct kvm_cpuid_entry2 __user *entries)
260 {
261 int r;
262
263 r = -E2BIG;
264 if (cpuid->nent < vcpu->arch.cpuid_nent)
265 goto out;
266 r = -EFAULT;
267 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
268 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
269 goto out;
270 return 0;
271
272 out:
273 cpuid->nent = vcpu->arch.cpuid_nent;
274 return r;
275 }
276
277 static void cpuid_mask(u32 *word, int wordnum)
278 {
279 *word &= boot_cpu_data.x86_capability[wordnum];
280 }
281
282 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
283 u32 index)
284 {
285 entry->function = function;
286 entry->index = index;
287 cpuid_count(entry->function, entry->index,
288 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
289 entry->flags = 0;
290 }
291
292 static int __do_cpuid_ent_emulated(struct kvm_cpuid_entry2 *entry,
293 u32 func, u32 index, int *nent, int maxnent)
294 {
295 switch (func) {
296 case 0:
297 entry->eax = 7;
298 ++*nent;
299 break;
300 case 1:
301 entry->ecx = F(MOVBE);
302 ++*nent;
303 break;
304 case 7:
305 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
306 if (index == 0)
307 entry->ecx = F(RDPID);
308 ++*nent;
309 default:
310 break;
311 }
312
313 entry->function = func;
314 entry->index = index;
315
316 return 0;
317 }
318
319 static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
320 u32 index, int *nent, int maxnent)
321 {
322 int r;
323 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
324 #ifdef CONFIG_X86_64
325 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
326 ? F(GBPAGES) : 0;
327 unsigned f_lm = F(LM);
328 #else
329 unsigned f_gbpages = 0;
330 unsigned f_lm = 0;
331 #endif
332 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
333 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
334 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
335 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
336 unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
337 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
338 unsigned f_la57 = 0;
339
340 /* cpuid 1.edx */
341 const u32 kvm_cpuid_1_edx_x86_features =
342 F(FPU) | F(VME) | F(DE) | F(PSE) |
343 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
344 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
345 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
346 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
347 0 /* Reserved, DS, ACPI */ | F(MMX) |
348 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
349 0 /* HTT, TM, Reserved, PBE */;
350 /* cpuid 0x80000001.edx */
351 const u32 kvm_cpuid_8000_0001_edx_x86_features =
352 F(FPU) | F(VME) | F(DE) | F(PSE) |
353 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
354 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
355 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
356 F(PAT) | F(PSE36) | 0 /* Reserved */ |
357 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
358 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
359 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
360 /* cpuid 1.ecx */
361 const u32 kvm_cpuid_1_ecx_x86_features =
362 /* NOTE: MONITOR (and MWAIT) are emulated as NOP,
363 * but *not* advertised to guests via CPUID ! */
364 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
365 0 /* DS-CPL, VMX, SMX, EST */ |
366 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
367 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
368 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
369 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
370 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
371 F(F16C) | F(RDRAND);
372 /* cpuid 0x80000001.ecx */
373 const u32 kvm_cpuid_8000_0001_ecx_x86_features =
374 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
375 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
376 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
377 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) |
378 F(TOPOEXT) | F(PERFCTR_CORE);
379
380 /* cpuid 0x80000008.ebx */
381 const u32 kvm_cpuid_8000_0008_ebx_x86_features =
382 F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
383 F(AMD_SSB_NO) | F(AMD_STIBP);
384
385 /* cpuid 0xC0000001.edx */
386 const u32 kvm_cpuid_C000_0001_edx_x86_features =
387 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
388 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
389 F(PMM) | F(PMM_EN);
390
391 /* cpuid 7.0.ebx */
392 const u32 kvm_cpuid_7_0_ebx_x86_features =
393 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
394 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
395 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
396 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
397 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;
398
399 /* cpuid 0xD.1.eax */
400 const u32 kvm_cpuid_D_1_eax_x86_features =
401 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
402
403 /* cpuid 7.0.ecx*/
404 const u32 kvm_cpuid_7_0_ecx_x86_features =
405 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ |
406 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
407 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
408 F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B);
409
410 /* cpuid 7.0.edx*/
411 const u32 kvm_cpuid_7_0_edx_x86_features =
412 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
413 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
414 F(MD_CLEAR);
415
416 /* all calls to cpuid_count() should be made on the same cpu */
417 get_cpu();
418
419 r = -E2BIG;
420
421 if (*nent >= maxnent)
422 goto out;
423
424 do_cpuid_1_ent(entry, function, index);
425 ++*nent;
426
427 switch (function) {
428 case 0:
429 entry->eax = min(entry->eax, (u32)(f_intel_pt ? 0x14 : 0xd));
430 break;
431 case 1:
432 entry->edx &= kvm_cpuid_1_edx_x86_features;
433 cpuid_mask(&entry->edx, CPUID_1_EDX);
434 entry->ecx &= kvm_cpuid_1_ecx_x86_features;
435 cpuid_mask(&entry->ecx, CPUID_1_ECX);
436 /* we support x2apic emulation even if host does not support
437 * it since we emulate x2apic in software */
438 entry->ecx |= F(X2APIC);
439 break;
440 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
441 * may return different values. This forces us to get_cpu() before
442 * issuing the first command, and also to emulate this annoying behavior
443 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
444 case 2: {
445 int t, times = entry->eax & 0xff;
446
447 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
448 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
449 for (t = 1; t < times; ++t) {
450 if (*nent >= maxnent)
451 goto out;
452
453 do_cpuid_1_ent(&entry[t], function, 0);
454 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
455 ++*nent;
456 }
457 break;
458 }
459 /* function 4 has additional index. */
460 case 4: {
461 int i, cache_type;
462
463 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
464 /* read more entries until cache_type is zero */
465 for (i = 1; ; ++i) {
466 if (*nent >= maxnent)
467 goto out;
468
469 cache_type = entry[i - 1].eax & 0x1f;
470 if (!cache_type)
471 break;
472 do_cpuid_1_ent(&entry[i], function, i);
473 entry[i].flags |=
474 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
475 ++*nent;
476 }
477 break;
478 }
479 case 6: /* Thermal management */
480 entry->eax = 0x4; /* allow ARAT */
481 entry->ebx = 0;
482 entry->ecx = 0;
483 entry->edx = 0;
484 break;
485 case 7: {
486 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
487 /* Mask ebx against host capability word 9 */
488 if (index == 0) {
489 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
490 cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
491 // TSC_ADJUST is emulated
492 entry->ebx |= F(TSC_ADJUST);
493 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
494 f_la57 = entry->ecx & F(LA57);
495 cpuid_mask(&entry->ecx, CPUID_7_ECX);
496 /* Set LA57 based on hardware capability. */
497 entry->ecx |= f_la57;
498 entry->ecx |= f_umip;
499 /* PKU is not yet implemented for shadow paging. */
500 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
501 entry->ecx &= ~F(PKU);
502 entry->edx &= kvm_cpuid_7_0_edx_x86_features;
503 cpuid_mask(&entry->edx, CPUID_7_EDX);
504 /*
505 * We emulate ARCH_CAPABILITIES in software even
506 * if the host doesn't support it.
507 */
508 entry->edx |= F(ARCH_CAPABILITIES);
509 } else {
510 entry->ebx = 0;
511 entry->ecx = 0;
512 entry->edx = 0;
513 }
514 entry->eax = 0;
515 break;
516 }
517 case 9:
518 break;
519 case 0xa: { /* Architectural Performance Monitoring */
520 struct x86_pmu_capability cap;
521 union cpuid10_eax eax;
522 union cpuid10_edx edx;
523
524 perf_get_x86_pmu_capability(&cap);
525
526 /*
527 * Only support guest architectural pmu on a host
528 * with architectural pmu.
529 */
530 if (!cap.version)
531 memset(&cap, 0, sizeof(cap));
532
533 eax.split.version_id = min(cap.version, 2);
534 eax.split.num_counters = cap.num_counters_gp;
535 eax.split.bit_width = cap.bit_width_gp;
536 eax.split.mask_length = cap.events_mask_len;
537
538 edx.split.num_counters_fixed = cap.num_counters_fixed;
539 edx.split.bit_width_fixed = cap.bit_width_fixed;
540 edx.split.reserved = 0;
541
542 entry->eax = eax.full;
543 entry->ebx = cap.events_mask;
544 entry->ecx = 0;
545 entry->edx = edx.full;
546 break;
547 }
548 /* function 0xb has additional index. */
549 case 0xb: {
550 int i, level_type;
551
552 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
553 /* read more entries until level_type is zero */
554 for (i = 1; ; ++i) {
555 if (*nent >= maxnent)
556 goto out;
557
558 level_type = entry[i - 1].ecx & 0xff00;
559 if (!level_type)
560 break;
561 do_cpuid_1_ent(&entry[i], function, i);
562 entry[i].flags |=
563 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
564 ++*nent;
565 }
566 break;
567 }
568 case 0xd: {
569 int idx, i;
570 u64 supported = kvm_supported_xcr0();
571
572 entry->eax &= supported;
573 entry->ebx = xstate_required_size(supported, false);
574 entry->ecx = entry->ebx;
575 entry->edx &= supported >> 32;
576 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
577 if (!supported)
578 break;
579
580 for (idx = 1, i = 1; idx < 64; ++idx) {
581 u64 mask = ((u64)1 << idx);
582 if (*nent >= maxnent)
583 goto out;
584
585 do_cpuid_1_ent(&entry[i], function, idx);
586 if (idx == 1) {
587 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
588 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
589 entry[i].ebx = 0;
590 if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
591 entry[i].ebx =
592 xstate_required_size(supported,
593 true);
594 } else {
595 if (entry[i].eax == 0 || !(supported & mask))
596 continue;
597 if (WARN_ON_ONCE(entry[i].ecx & 1))
598 continue;
599 }
600 entry[i].ecx = 0;
601 entry[i].edx = 0;
602 entry[i].flags |=
603 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
604 ++*nent;
605 ++i;
606 }
607 break;
608 }
609 /* Intel PT */
610 case 0x14: {
611 int t, times = entry->eax;
612
613 if (!f_intel_pt)
614 break;
615
616 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
617 for (t = 1; t <= times; ++t) {
618 if (*nent >= maxnent)
619 goto out;
620 do_cpuid_1_ent(&entry[t], function, t);
621 entry[t].flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
622 ++*nent;
623 }
624 break;
625 }
626 case KVM_CPUID_SIGNATURE: {
627 static const char signature[12] = "KVMKVMKVM\0\0";
628 const u32 *sigptr = (const u32 *)signature;
629 entry->eax = KVM_CPUID_FEATURES;
630 entry->ebx = sigptr[0];
631 entry->ecx = sigptr[1];
632 entry->edx = sigptr[2];
633 break;
634 }
635 case KVM_CPUID_FEATURES:
636 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
637 (1 << KVM_FEATURE_NOP_IO_DELAY) |
638 (1 << KVM_FEATURE_CLOCKSOURCE2) |
639 (1 << KVM_FEATURE_ASYNC_PF) |
640 (1 << KVM_FEATURE_PV_EOI) |
641 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
642 (1 << KVM_FEATURE_PV_UNHALT) |
643 (1 << KVM_FEATURE_PV_TLB_FLUSH) |
644 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
645 (1 << KVM_FEATURE_PV_SEND_IPI);
646
647 if (sched_info_on())
648 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
649
650 entry->ebx = 0;
651 entry->ecx = 0;
652 entry->edx = 0;
653 break;
654 case 0x80000000:
655 entry->eax = min(entry->eax, 0x8000001f);
656 break;
657 case 0x80000001:
658 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
659 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
660 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
661 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
662 break;
663 case 0x80000007: /* Advanced power management */
664 /* invariant TSC is CPUID.80000007H:EDX[8] */
665 entry->edx &= (1 << 8);
666 /* mask against host */
667 entry->edx &= boot_cpu_data.x86_power;
668 entry->eax = entry->ebx = entry->ecx = 0;
669 break;
670 case 0x80000008: {
671 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
672 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
673 unsigned phys_as = entry->eax & 0xff;
674
675 if (!g_phys_as)
676 g_phys_as = phys_as;
677 entry->eax = g_phys_as | (virt_as << 8);
678 entry->edx = 0;
679 /*
680 * IBRS, IBPB and VIRT_SSBD aren't necessarily present in
681 * hardware cpuid
682 */
683 if (boot_cpu_has(X86_FEATURE_AMD_IBPB))
684 entry->ebx |= F(AMD_IBPB);
685 if (boot_cpu_has(X86_FEATURE_AMD_IBRS))
686 entry->ebx |= F(AMD_IBRS);
687 if (boot_cpu_has(X86_FEATURE_VIRT_SSBD))
688 entry->ebx |= F(VIRT_SSBD);
689 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
690 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
691 /*
692 * The preference is to use SPEC CTRL MSR instead of the
693 * VIRT_SPEC MSR.
694 */
695 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
696 !boot_cpu_has(X86_FEATURE_AMD_SSBD))
697 entry->ebx |= F(VIRT_SSBD);
698 break;
699 }
700 case 0x80000019:
701 entry->ecx = entry->edx = 0;
702 break;
703 case 0x8000001a:
704 break;
705 case 0x8000001d:
706 break;
707 /*Add support for Centaur's CPUID instruction*/
708 case 0xC0000000:
709 /*Just support up to 0xC0000004 now*/
710 entry->eax = min(entry->eax, 0xC0000004);
711 break;
712 case 0xC0000001:
713 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
714 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
715 break;
716 case 3: /* Processor serial number */
717 case 5: /* MONITOR/MWAIT */
718 case 0xC0000002:
719 case 0xC0000003:
720 case 0xC0000004:
721 default:
722 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
723 break;
724 }
725
726 kvm_x86_ops->set_supported_cpuid(function, entry);
727
728 r = 0;
729
730 out:
731 put_cpu();
732
733 return r;
734 }
735
736 static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 func,
737 u32 idx, int *nent, int maxnent, unsigned int type)
738 {
739 if (type == KVM_GET_EMULATED_CPUID)
740 return __do_cpuid_ent_emulated(entry, func, idx, nent, maxnent);
741
742 return __do_cpuid_ent(entry, func, idx, nent, maxnent);
743 }
744
745 #undef F
746
747 struct kvm_cpuid_param {
748 u32 func;
749 u32 idx;
750 bool has_leaf_count;
751 bool (*qualifier)(const struct kvm_cpuid_param *param);
752 };
753
754 static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
755 {
756 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
757 }
758
759 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
760 __u32 num_entries, unsigned int ioctl_type)
761 {
762 int i;
763 __u32 pad[3];
764
765 if (ioctl_type != KVM_GET_EMULATED_CPUID)
766 return false;
767
768 /*
769 * We want to make sure that ->padding is being passed clean from
770 * userspace in case we want to use it for something in the future.
771 *
772 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
773 * have to give ourselves satisfied only with the emulated side. /me
774 * sheds a tear.
775 */
776 for (i = 0; i < num_entries; i++) {
777 if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
778 return true;
779
780 if (pad[0] || pad[1] || pad[2])
781 return true;
782 }
783 return false;
784 }
785
786 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
787 struct kvm_cpuid_entry2 __user *entries,
788 unsigned int type)
789 {
790 struct kvm_cpuid_entry2 *cpuid_entries;
791 int limit, nent = 0, r = -E2BIG, i;
792 u32 func;
793 static const struct kvm_cpuid_param param[] = {
794 { .func = 0, .has_leaf_count = true },
795 { .func = 0x80000000, .has_leaf_count = true },
796 { .func = 0xC0000000, .qualifier = is_centaur_cpu, .has_leaf_count = true },
797 { .func = KVM_CPUID_SIGNATURE },
798 { .func = KVM_CPUID_FEATURES },
799 };
800
801 if (cpuid->nent < 1)
802 goto out;
803 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
804 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
805
806 if (sanity_check_entries(entries, cpuid->nent, type))
807 return -EINVAL;
808
809 r = -ENOMEM;
810 cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2),
811 cpuid->nent));
812 if (!cpuid_entries)
813 goto out;
814
815 r = 0;
816 for (i = 0; i < ARRAY_SIZE(param); i++) {
817 const struct kvm_cpuid_param *ent = &param[i];
818
819 if (ent->qualifier && !ent->qualifier(ent))
820 continue;
821
822 r = do_cpuid_ent(&cpuid_entries[nent], ent->func, ent->idx,
823 &nent, cpuid->nent, type);
824
825 if (r)
826 goto out_free;
827
828 if (!ent->has_leaf_count)
829 continue;
830
831 limit = cpuid_entries[nent - 1].eax;
832 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
833 r = do_cpuid_ent(&cpuid_entries[nent], func, ent->idx,
834 &nent, cpuid->nent, type);
835
836 if (r)
837 goto out_free;
838 }
839
840 r = -EFAULT;
841 if (copy_to_user(entries, cpuid_entries,
842 nent * sizeof(struct kvm_cpuid_entry2)))
843 goto out_free;
844 cpuid->nent = nent;
845 r = 0;
846
847 out_free:
848 vfree(cpuid_entries);
849 out:
850 return r;
851 }
852
853 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
854 {
855 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
856 struct kvm_cpuid_entry2 *ej;
857 int j = i;
858 int nent = vcpu->arch.cpuid_nent;
859
860 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
861 /* when no next entry is found, the current entry[i] is reselected */
862 do {
863 j = (j + 1) % nent;
864 ej = &vcpu->arch.cpuid_entries[j];
865 } while (ej->function != e->function);
866
867 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
868
869 return j;
870 }
871
872 /* find an entry with matching function, matching index (if needed), and that
873 * should be read next (if it's stateful) */
874 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
875 u32 function, u32 index)
876 {
877 if (e->function != function)
878 return 0;
879 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
880 return 0;
881 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
882 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
883 return 0;
884 return 1;
885 }
886
887 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
888 u32 function, u32 index)
889 {
890 int i;
891 struct kvm_cpuid_entry2 *best = NULL;
892
893 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
894 struct kvm_cpuid_entry2 *e;
895
896 e = &vcpu->arch.cpuid_entries[i];
897 if (is_matching_cpuid_entry(e, function, index)) {
898 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
899 move_to_next_stateful_cpuid_entry(vcpu, i);
900 best = e;
901 break;
902 }
903 }
904 return best;
905 }
906 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
907
908 /*
909 * If no match is found, check whether we exceed the vCPU's limit
910 * and return the content of the highest valid _standard_ leaf instead.
911 * This is to satisfy the CPUID specification.
912 */
913 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
914 u32 function, u32 index)
915 {
916 struct kvm_cpuid_entry2 *maxlevel;
917
918 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
919 if (!maxlevel || maxlevel->eax >= function)
920 return NULL;
921 if (function & 0x80000000) {
922 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
923 if (!maxlevel)
924 return NULL;
925 }
926 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
927 }
928
929 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
930 u32 *ecx, u32 *edx, bool check_limit)
931 {
932 u32 function = *eax, index = *ecx;
933 struct kvm_cpuid_entry2 *best;
934 bool entry_found = true;
935
936 best = kvm_find_cpuid_entry(vcpu, function, index);
937
938 if (!best) {
939 entry_found = false;
940 if (!check_limit)
941 goto out;
942
943 best = check_cpuid_limit(vcpu, function, index);
944 }
945
946 out:
947 if (best) {
948 *eax = best->eax;
949 *ebx = best->ebx;
950 *ecx = best->ecx;
951 *edx = best->edx;
952 } else
953 *eax = *ebx = *ecx = *edx = 0;
954 trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, entry_found);
955 return entry_found;
956 }
957 EXPORT_SYMBOL_GPL(kvm_cpuid);
958
959 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
960 {
961 u32 eax, ebx, ecx, edx;
962
963 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
964 return 1;
965
966 eax = kvm_rax_read(vcpu);
967 ecx = kvm_rcx_read(vcpu);
968 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
969 kvm_rax_write(vcpu, eax);
970 kvm_rbx_write(vcpu, ebx);
971 kvm_rcx_write(vcpu, ecx);
972 kvm_rdx_write(vcpu, edx);
973 return kvm_skip_emulated_instruction(vcpu);
974 }
975 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);