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KVM: x86: fix out-of-bounds write in KVM_GET_EMULATED_CPUID (CVE-2019-19332)
[mirror_ubuntu-bionic-kernel.git] / arch / x86 / kvm / cpuid.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 * cpuid support routines
4 *
5 * derived from arch/x86/kvm/x86.c
6 *
7 * Copyright 2011 Red Hat, Inc. and/or its affiliates.
8 * Copyright IBM Corporation, 2008
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2. See
11 * the COPYING file in the top-level directory.
12 *
13 */
14
15 #include <linux/kvm_host.h>
16 #include <linux/export.h>
17 #include <linux/vmalloc.h>
18 #include <linux/uaccess.h>
19 #include <linux/sched/stat.h>
20
21 #include <asm/processor.h>
22 #include <asm/user.h>
23 #include <asm/fpu/xstate.h>
24 #include "cpuid.h"
25 #include "lapic.h"
26 #include "mmu.h"
27 #include "trace.h"
28 #include "pmu.h"
29
30 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
31 {
32 int feature_bit = 0;
33 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
34
35 xstate_bv &= XFEATURE_MASK_EXTEND;
36 while (xstate_bv) {
37 if (xstate_bv & 0x1) {
38 u32 eax, ebx, ecx, edx, offset;
39 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
40 offset = compacted ? ret : ebx;
41 ret = max(ret, offset + eax);
42 }
43
44 xstate_bv >>= 1;
45 feature_bit++;
46 }
47
48 return ret;
49 }
50
51 bool kvm_mpx_supported(void)
52 {
53 return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
54 && kvm_x86_ops->mpx_supported());
55 }
56 EXPORT_SYMBOL_GPL(kvm_mpx_supported);
57
58 u64 kvm_supported_xcr0(void)
59 {
60 u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
61
62 if (!kvm_mpx_supported())
63 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
64
65 return xcr0;
66 }
67
68 #define F(x) bit(X86_FEATURE_##x)
69
70 /* For scattered features from cpufeatures.h; we currently expose none */
71 #define KF(x) bit(KVM_CPUID_BIT_##x)
72
73 int kvm_update_cpuid(struct kvm_vcpu *vcpu)
74 {
75 struct kvm_cpuid_entry2 *best;
76 struct kvm_lapic *apic = vcpu->arch.apic;
77
78 best = kvm_find_cpuid_entry(vcpu, 1, 0);
79 if (!best)
80 return 0;
81
82 /* Update OSXSAVE bit */
83 if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
84 best->ecx &= ~F(OSXSAVE);
85 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
86 best->ecx |= F(OSXSAVE);
87 }
88
89 best->edx &= ~F(APIC);
90 if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
91 best->edx |= F(APIC);
92
93 if (apic) {
94 if (best->ecx & F(TSC_DEADLINE_TIMER))
95 apic->lapic_timer.timer_mode_mask = 3 << 17;
96 else
97 apic->lapic_timer.timer_mode_mask = 1 << 17;
98 }
99
100 best = kvm_find_cpuid_entry(vcpu, 7, 0);
101 if (best) {
102 /* Update OSPKE bit */
103 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
104 best->ecx &= ~F(OSPKE);
105 if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
106 best->ecx |= F(OSPKE);
107 }
108 }
109
110 best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
111 if (!best) {
112 vcpu->arch.guest_supported_xcr0 = 0;
113 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
114 } else {
115 vcpu->arch.guest_supported_xcr0 =
116 (best->eax | ((u64)best->edx << 32)) &
117 kvm_supported_xcr0();
118 vcpu->arch.guest_xstate_size = best->ebx =
119 xstate_required_size(vcpu->arch.xcr0, false);
120 }
121
122 best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
123 if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
124 best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
125
126 /*
127 * The existing code assumes virtual address is 48-bit or 57-bit in the
128 * canonical address checks; exit if it is ever changed.
129 */
130 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
131 if (best) {
132 int vaddr_bits = (best->eax & 0xff00) >> 8;
133
134 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
135 return -EINVAL;
136 }
137
138 /* Update physical-address width */
139 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
140 kvm_mmu_reset_context(vcpu);
141
142 kvm_pmu_refresh(vcpu);
143 return 0;
144 }
145
146 static int is_efer_nx(void)
147 {
148 unsigned long long efer = 0;
149
150 rdmsrl_safe(MSR_EFER, &efer);
151 return efer & EFER_NX;
152 }
153
154 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
155 {
156 int i;
157 struct kvm_cpuid_entry2 *e, *entry;
158
159 entry = NULL;
160 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
161 e = &vcpu->arch.cpuid_entries[i];
162 if (e->function == 0x80000001) {
163 entry = e;
164 break;
165 }
166 }
167 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
168 entry->edx &= ~F(NX);
169 printk(KERN_INFO "kvm: guest NX capability removed\n");
170 }
171 }
172
173 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
174 {
175 struct kvm_cpuid_entry2 *best;
176
177 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
178 if (!best || best->eax < 0x80000008)
179 goto not_found;
180 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
181 if (best)
182 return best->eax & 0xff;
183 not_found:
184 return 36;
185 }
186 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
187
188 /* when an old userspace process fills a new kernel module */
189 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
190 struct kvm_cpuid *cpuid,
191 struct kvm_cpuid_entry __user *entries)
192 {
193 int r, i;
194 struct kvm_cpuid_entry *cpuid_entries = NULL;
195
196 r = -E2BIG;
197 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
198 goto out;
199 r = -ENOMEM;
200 if (cpuid->nent) {
201 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) *
202 cpuid->nent);
203 if (!cpuid_entries)
204 goto out;
205 r = -EFAULT;
206 if (copy_from_user(cpuid_entries, entries,
207 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
208 goto out;
209 }
210 for (i = 0; i < cpuid->nent; i++) {
211 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
212 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
213 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
214 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
215 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
216 vcpu->arch.cpuid_entries[i].index = 0;
217 vcpu->arch.cpuid_entries[i].flags = 0;
218 vcpu->arch.cpuid_entries[i].padding[0] = 0;
219 vcpu->arch.cpuid_entries[i].padding[1] = 0;
220 vcpu->arch.cpuid_entries[i].padding[2] = 0;
221 }
222 vcpu->arch.cpuid_nent = cpuid->nent;
223 cpuid_fix_nx_cap(vcpu);
224 kvm_apic_set_version(vcpu);
225 kvm_x86_ops->cpuid_update(vcpu);
226 r = kvm_update_cpuid(vcpu);
227
228 out:
229 vfree(cpuid_entries);
230 return r;
231 }
232
233 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
234 struct kvm_cpuid2 *cpuid,
235 struct kvm_cpuid_entry2 __user *entries)
236 {
237 int r;
238
239 r = -E2BIG;
240 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
241 goto out;
242 r = -EFAULT;
243 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
244 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
245 goto out;
246 vcpu->arch.cpuid_nent = cpuid->nent;
247 kvm_apic_set_version(vcpu);
248 kvm_x86_ops->cpuid_update(vcpu);
249 r = kvm_update_cpuid(vcpu);
250 out:
251 return r;
252 }
253
254 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
255 struct kvm_cpuid2 *cpuid,
256 struct kvm_cpuid_entry2 __user *entries)
257 {
258 int r;
259
260 r = -E2BIG;
261 if (cpuid->nent < vcpu->arch.cpuid_nent)
262 goto out;
263 r = -EFAULT;
264 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
265 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
266 goto out;
267 return 0;
268
269 out:
270 cpuid->nent = vcpu->arch.cpuid_nent;
271 return r;
272 }
273
274 static void cpuid_mask(u32 *word, int wordnum)
275 {
276 *word &= boot_cpu_data.x86_capability[wordnum];
277 }
278
279 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
280 u32 index)
281 {
282 entry->function = function;
283 entry->index = index;
284 cpuid_count(entry->function, entry->index,
285 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
286 entry->flags = 0;
287 }
288
289 static int __do_cpuid_ent_emulated(struct kvm_cpuid_entry2 *entry,
290 u32 func, u32 index, int *nent, int maxnent)
291 {
292 switch (func) {
293 case 0:
294 entry->eax = 1; /* only one leaf currently */
295 ++*nent;
296 break;
297 case 1:
298 entry->ecx = F(MOVBE);
299 ++*nent;
300 break;
301 default:
302 break;
303 }
304
305 entry->function = func;
306 entry->index = index;
307
308 return 0;
309 }
310
311 static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
312 u32 index, int *nent, int maxnent)
313 {
314 int r;
315 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
316 #ifdef CONFIG_X86_64
317 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
318 ? F(GBPAGES) : 0;
319 unsigned f_lm = F(LM);
320 #else
321 unsigned f_gbpages = 0;
322 unsigned f_lm = 0;
323 #endif
324 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
325 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
326 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
327 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
328
329 /* cpuid 1.edx */
330 const u32 kvm_cpuid_1_edx_x86_features =
331 F(FPU) | F(VME) | F(DE) | F(PSE) |
332 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
333 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
334 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
335 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
336 0 /* Reserved, DS, ACPI */ | F(MMX) |
337 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
338 0 /* HTT, TM, Reserved, PBE */;
339 /* cpuid 0x80000001.edx */
340 const u32 kvm_cpuid_8000_0001_edx_x86_features =
341 F(FPU) | F(VME) | F(DE) | F(PSE) |
342 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
343 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
344 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
345 F(PAT) | F(PSE36) | 0 /* Reserved */ |
346 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
347 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
348 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
349 /* cpuid 1.ecx */
350 const u32 kvm_cpuid_1_ecx_x86_features =
351 /* NOTE: MONITOR (and MWAIT) are emulated as NOP,
352 * but *not* advertised to guests via CPUID ! */
353 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
354 0 /* DS-CPL, VMX, SMX, EST */ |
355 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
356 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
357 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
358 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
359 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
360 F(F16C) | F(RDRAND);
361 /* cpuid 0x80000001.ecx */
362 const u32 kvm_cpuid_8000_0001_ecx_x86_features =
363 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
364 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
365 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
366 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
367
368 /* cpuid 0x80000008.ebx */
369 const u32 kvm_cpuid_8000_0008_ebx_x86_features =
370 F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
371 F(AMD_SSB_NO) | F(AMD_STIBP);
372
373 /* cpuid 0xC0000001.edx */
374 const u32 kvm_cpuid_C000_0001_edx_x86_features =
375 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
376 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
377 F(PMM) | F(PMM_EN);
378
379 /* cpuid 7.0.ebx */
380 const u32 kvm_cpuid_7_0_ebx_x86_features =
381 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
382 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
383 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
384 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
385 F(SHA_NI) | F(AVX512BW) | F(AVX512VL);
386
387 /* cpuid 0xD.1.eax */
388 const u32 kvm_cpuid_D_1_eax_x86_features =
389 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
390
391 /* cpuid 7.0.ecx*/
392 const u32 kvm_cpuid_7_0_ecx_x86_features =
393 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ |
394 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
395 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG);
396
397 /* cpuid 7.0.edx*/
398 const u32 kvm_cpuid_7_0_edx_x86_features =
399 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
400 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
401 F(MD_CLEAR);
402
403 /* all calls to cpuid_count() should be made on the same cpu */
404 get_cpu();
405
406 r = -E2BIG;
407
408 if (WARN_ON(*nent >= maxnent))
409 goto out;
410
411 do_cpuid_1_ent(entry, function, index);
412 ++*nent;
413
414 switch (function) {
415 case 0:
416 entry->eax = min(entry->eax, (u32)0xd);
417 break;
418 case 1:
419 entry->edx &= kvm_cpuid_1_edx_x86_features;
420 cpuid_mask(&entry->edx, CPUID_1_EDX);
421 entry->ecx &= kvm_cpuid_1_ecx_x86_features;
422 cpuid_mask(&entry->ecx, CPUID_1_ECX);
423 /* we support x2apic emulation even if host does not support
424 * it since we emulate x2apic in software */
425 entry->ecx |= F(X2APIC);
426 break;
427 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
428 * may return different values. This forces us to get_cpu() before
429 * issuing the first command, and also to emulate this annoying behavior
430 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
431 case 2: {
432 int t, times = entry->eax & 0xff;
433
434 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
435 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
436 for (t = 1; t < times; ++t) {
437 if (*nent >= maxnent)
438 goto out;
439
440 do_cpuid_1_ent(&entry[t], function, 0);
441 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
442 ++*nent;
443 }
444 break;
445 }
446 /* function 4 has additional index. */
447 case 4: {
448 int i, cache_type;
449
450 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
451 /* read more entries until cache_type is zero */
452 for (i = 1; ; ++i) {
453 if (*nent >= maxnent)
454 goto out;
455
456 cache_type = entry[i - 1].eax & 0x1f;
457 if (!cache_type)
458 break;
459 do_cpuid_1_ent(&entry[i], function, i);
460 entry[i].flags |=
461 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
462 ++*nent;
463 }
464 break;
465 }
466 case 6: /* Thermal management */
467 entry->eax = 0x4; /* allow ARAT */
468 entry->ebx = 0;
469 entry->ecx = 0;
470 entry->edx = 0;
471 break;
472 case 7: {
473 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
474 /* Mask ebx against host capability word 9 */
475 if (index == 0) {
476 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
477 cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
478 // TSC_ADJUST is emulated
479 entry->ebx |= F(TSC_ADJUST);
480 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
481 cpuid_mask(&entry->ecx, CPUID_7_ECX);
482 /* PKU is not yet implemented for shadow paging. */
483 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
484 entry->ecx &= ~F(PKU);
485
486 entry->edx &= kvm_cpuid_7_0_edx_x86_features;
487 cpuid_mask(&entry->edx, CPUID_7_EDX);
488 if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
489 entry->edx |= F(SPEC_CTRL);
490 if (boot_cpu_has(X86_FEATURE_STIBP))
491 entry->edx |= F(INTEL_STIBP);
492 if (boot_cpu_has(X86_FEATURE_SSBD))
493 entry->edx |= F(SPEC_CTRL_SSBD);
494 /*
495 * We emulate ARCH_CAPABILITIES in software even
496 * if the host doesn't support it.
497 */
498 entry->edx |= F(ARCH_CAPABILITIES);
499 } else {
500 entry->ebx = 0;
501 entry->ecx = 0;
502 entry->edx = 0;
503 }
504 entry->eax = 0;
505 break;
506 }
507 case 9:
508 break;
509 case 0xa: { /* Architectural Performance Monitoring */
510 struct x86_pmu_capability cap;
511 union cpuid10_eax eax;
512 union cpuid10_edx edx;
513
514 perf_get_x86_pmu_capability(&cap);
515
516 /*
517 * Only support guest architectural pmu on a host
518 * with architectural pmu.
519 */
520 if (!cap.version)
521 memset(&cap, 0, sizeof(cap));
522
523 eax.split.version_id = min(cap.version, 2);
524 eax.split.num_counters = cap.num_counters_gp;
525 eax.split.bit_width = cap.bit_width_gp;
526 eax.split.mask_length = cap.events_mask_len;
527
528 edx.split.num_counters_fixed = cap.num_counters_fixed;
529 edx.split.bit_width_fixed = cap.bit_width_fixed;
530 edx.split.reserved = 0;
531
532 entry->eax = eax.full;
533 entry->ebx = cap.events_mask;
534 entry->ecx = 0;
535 entry->edx = edx.full;
536 break;
537 }
538 /* function 0xb has additional index. */
539 case 0xb: {
540 int i, level_type;
541
542 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
543 /* read more entries until level_type is zero */
544 for (i = 1; ; ++i) {
545 if (*nent >= maxnent)
546 goto out;
547
548 level_type = entry[i - 1].ecx & 0xff00;
549 if (!level_type)
550 break;
551 do_cpuid_1_ent(&entry[i], function, i);
552 entry[i].flags |=
553 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
554 ++*nent;
555 }
556 break;
557 }
558 case 0xd: {
559 int idx, i;
560 u64 supported = kvm_supported_xcr0();
561
562 entry->eax &= supported;
563 entry->ebx = xstate_required_size(supported, false);
564 entry->ecx = entry->ebx;
565 entry->edx &= supported >> 32;
566 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
567 if (!supported)
568 break;
569
570 for (idx = 1, i = 1; idx < 64; ++idx) {
571 u64 mask = ((u64)1 << idx);
572 if (*nent >= maxnent)
573 goto out;
574
575 do_cpuid_1_ent(&entry[i], function, idx);
576 if (idx == 1) {
577 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
578 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
579 entry[i].ebx = 0;
580 if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
581 entry[i].ebx =
582 xstate_required_size(supported,
583 true);
584 } else {
585 if (entry[i].eax == 0 || !(supported & mask))
586 continue;
587 if (WARN_ON_ONCE(entry[i].ecx & 1))
588 continue;
589 }
590 entry[i].ecx = 0;
591 entry[i].edx = 0;
592 entry[i].flags |=
593 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
594 ++*nent;
595 ++i;
596 }
597 break;
598 }
599 case KVM_CPUID_SIGNATURE: {
600 static const char signature[12] = "KVMKVMKVM\0\0";
601 const u32 *sigptr = (const u32 *)signature;
602 entry->eax = KVM_CPUID_FEATURES;
603 entry->ebx = sigptr[0];
604 entry->ecx = sigptr[1];
605 entry->edx = sigptr[2];
606 break;
607 }
608 case KVM_CPUID_FEATURES:
609 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
610 (1 << KVM_FEATURE_NOP_IO_DELAY) |
611 (1 << KVM_FEATURE_CLOCKSOURCE2) |
612 (1 << KVM_FEATURE_ASYNC_PF) |
613 (1 << KVM_FEATURE_PV_EOI) |
614 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
615 (1 << KVM_FEATURE_PV_UNHALT) |
616 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT);
617
618 if (sched_info_on())
619 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
620
621 entry->ebx = 0;
622 entry->ecx = 0;
623 entry->edx = 0;
624 break;
625 case 0x80000000:
626 entry->eax = min(entry->eax, 0x8000001a);
627 break;
628 case 0x80000001:
629 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
630 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
631 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
632 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
633 break;
634 case 0x80000007: /* Advanced power management */
635 /* invariant TSC is CPUID.80000007H:EDX[8] */
636 entry->edx &= (1 << 8);
637 /* mask against host */
638 entry->edx &= boot_cpu_data.x86_power;
639 entry->eax = entry->ebx = entry->ecx = 0;
640 break;
641 case 0x80000008: {
642 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
643 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
644 unsigned phys_as = entry->eax & 0xff;
645
646 if (!g_phys_as)
647 g_phys_as = phys_as;
648 entry->eax = g_phys_as | (virt_as << 8);
649 entry->edx = 0;
650 /*
651 * IBRS, IBPB and VIRT_SSBD aren't necessarily present in
652 * hardware cpuid
653 */
654 if (boot_cpu_has(X86_FEATURE_AMD_IBPB))
655 entry->ebx |= F(AMD_IBPB);
656 if (boot_cpu_has(X86_FEATURE_AMD_IBRS))
657 entry->ebx |= F(AMD_IBRS);
658 if (boot_cpu_has(X86_FEATURE_VIRT_SSBD))
659 entry->ebx |= F(VIRT_SSBD);
660 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
661 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
662 /*
663 * The preference is to use SPEC CTRL MSR instead of the
664 * VIRT_SPEC MSR.
665 */
666 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
667 !boot_cpu_has(X86_FEATURE_AMD_SSBD))
668 entry->ebx |= F(VIRT_SSBD);
669 break;
670 }
671 case 0x80000019:
672 entry->ecx = entry->edx = 0;
673 break;
674 case 0x8000001a:
675 break;
676 case 0x8000001d:
677 break;
678 /*Add support for Centaur's CPUID instruction*/
679 case 0xC0000000:
680 /*Just support up to 0xC0000004 now*/
681 entry->eax = min(entry->eax, 0xC0000004);
682 break;
683 case 0xC0000001:
684 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
685 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
686 break;
687 case 3: /* Processor serial number */
688 case 5: /* MONITOR/MWAIT */
689 case 0xC0000002:
690 case 0xC0000003:
691 case 0xC0000004:
692 default:
693 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
694 break;
695 }
696
697 kvm_x86_ops->set_supported_cpuid(function, entry);
698
699 r = 0;
700
701 out:
702 put_cpu();
703
704 return r;
705 }
706
707 static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 func,
708 u32 idx, int *nent, int maxnent, unsigned int type)
709 {
710 if (*nent >= maxnent)
711 return -E2BIG;
712
713 if (type == KVM_GET_EMULATED_CPUID)
714 return __do_cpuid_ent_emulated(entry, func, idx, nent, maxnent);
715
716 return __do_cpuid_ent(entry, func, idx, nent, maxnent);
717 }
718
719 #undef F
720
721 struct kvm_cpuid_param {
722 u32 func;
723 u32 idx;
724 bool has_leaf_count;
725 bool (*qualifier)(const struct kvm_cpuid_param *param);
726 };
727
728 static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
729 {
730 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
731 }
732
733 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
734 __u32 num_entries, unsigned int ioctl_type)
735 {
736 int i;
737 __u32 pad[3];
738
739 if (ioctl_type != KVM_GET_EMULATED_CPUID)
740 return false;
741
742 /*
743 * We want to make sure that ->padding is being passed clean from
744 * userspace in case we want to use it for something in the future.
745 *
746 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
747 * have to give ourselves satisfied only with the emulated side. /me
748 * sheds a tear.
749 */
750 for (i = 0; i < num_entries; i++) {
751 if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
752 return true;
753
754 if (pad[0] || pad[1] || pad[2])
755 return true;
756 }
757 return false;
758 }
759
760 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
761 struct kvm_cpuid_entry2 __user *entries,
762 unsigned int type)
763 {
764 struct kvm_cpuid_entry2 *cpuid_entries;
765 int limit, nent = 0, r = -E2BIG, i;
766 u32 func;
767 static const struct kvm_cpuid_param param[] = {
768 { .func = 0, .has_leaf_count = true },
769 { .func = 0x80000000, .has_leaf_count = true },
770 { .func = 0xC0000000, .qualifier = is_centaur_cpu, .has_leaf_count = true },
771 { .func = KVM_CPUID_SIGNATURE },
772 { .func = KVM_CPUID_FEATURES },
773 };
774
775 if (cpuid->nent < 1)
776 goto out;
777 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
778 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
779
780 if (sanity_check_entries(entries, cpuid->nent, type))
781 return -EINVAL;
782
783 r = -ENOMEM;
784 cpuid_entries = vzalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
785 if (!cpuid_entries)
786 goto out;
787
788 r = 0;
789 for (i = 0; i < ARRAY_SIZE(param); i++) {
790 const struct kvm_cpuid_param *ent = &param[i];
791
792 if (ent->qualifier && !ent->qualifier(ent))
793 continue;
794
795 r = do_cpuid_ent(&cpuid_entries[nent], ent->func, ent->idx,
796 &nent, cpuid->nent, type);
797
798 if (r)
799 goto out_free;
800
801 if (!ent->has_leaf_count)
802 continue;
803
804 limit = cpuid_entries[nent - 1].eax;
805 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
806 r = do_cpuid_ent(&cpuid_entries[nent], func, ent->idx,
807 &nent, cpuid->nent, type);
808
809 if (r)
810 goto out_free;
811 }
812
813 r = -EFAULT;
814 if (copy_to_user(entries, cpuid_entries,
815 nent * sizeof(struct kvm_cpuid_entry2)))
816 goto out_free;
817 cpuid->nent = nent;
818 r = 0;
819
820 out_free:
821 vfree(cpuid_entries);
822 out:
823 return r;
824 }
825
826 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
827 {
828 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
829 struct kvm_cpuid_entry2 *ej;
830 int j = i;
831 int nent = vcpu->arch.cpuid_nent;
832
833 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
834 /* when no next entry is found, the current entry[i] is reselected */
835 do {
836 j = (j + 1) % nent;
837 ej = &vcpu->arch.cpuid_entries[j];
838 } while (ej->function != e->function);
839
840 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
841
842 return j;
843 }
844
845 /* find an entry with matching function, matching index (if needed), and that
846 * should be read next (if it's stateful) */
847 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
848 u32 function, u32 index)
849 {
850 if (e->function != function)
851 return 0;
852 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
853 return 0;
854 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
855 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
856 return 0;
857 return 1;
858 }
859
860 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
861 u32 function, u32 index)
862 {
863 int i;
864 struct kvm_cpuid_entry2 *best = NULL;
865
866 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
867 struct kvm_cpuid_entry2 *e;
868
869 e = &vcpu->arch.cpuid_entries[i];
870 if (is_matching_cpuid_entry(e, function, index)) {
871 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
872 move_to_next_stateful_cpuid_entry(vcpu, i);
873 best = e;
874 break;
875 }
876 }
877 return best;
878 }
879 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
880
881 /*
882 * If no match is found, check whether we exceed the vCPU's limit
883 * and return the content of the highest valid _standard_ leaf instead.
884 * This is to satisfy the CPUID specification.
885 */
886 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
887 u32 function, u32 index)
888 {
889 struct kvm_cpuid_entry2 *maxlevel;
890
891 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
892 if (!maxlevel || maxlevel->eax >= function)
893 return NULL;
894 if (function & 0x80000000) {
895 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
896 if (!maxlevel)
897 return NULL;
898 }
899 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
900 }
901
902 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
903 u32 *ecx, u32 *edx, bool check_limit)
904 {
905 u32 function = *eax, index = *ecx;
906 struct kvm_cpuid_entry2 *best;
907 bool entry_found = true;
908
909 best = kvm_find_cpuid_entry(vcpu, function, index);
910
911 if (!best) {
912 entry_found = false;
913 if (!check_limit)
914 goto out;
915
916 best = check_cpuid_limit(vcpu, function, index);
917 }
918
919 out:
920 if (best) {
921 *eax = best->eax;
922 *ebx = best->ebx;
923 *ecx = best->ecx;
924 *edx = best->edx;
925 } else
926 *eax = *ebx = *ecx = *edx = 0;
927 trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, entry_found);
928 return entry_found;
929 }
930 EXPORT_SYMBOL_GPL(kvm_cpuid);
931
932 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
933 {
934 u32 eax, ebx, ecx, edx;
935
936 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
937 return 1;
938
939 eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
940 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
941 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
942 kvm_register_write(vcpu, VCPU_REGS_RAX, eax);
943 kvm_register_write(vcpu, VCPU_REGS_RBX, ebx);
944 kvm_register_write(vcpu, VCPU_REGS_RCX, ecx);
945 kvm_register_write(vcpu, VCPU_REGS_RDX, edx);
946 return kvm_skip_emulated_instruction(vcpu);
947 }
948 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
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