arch/x86/kvm/lapic.h

   1 #ifndef __KVM_X86_LAPIC_H
   2 #define __KVM_X86_LAPIC_H
   3
   4 #include <kvm/iodev.h>
   5
   6 #include <linux/kvm_host.h>
   7
   8 #define KVM_APIC_INIT           0
   9 #define KVM_APIC_SIPI           1
  10 #define KVM_APIC_LVT_NUM        6
  11
  12 #define KVM_APIC_SHORT_MASK     0xc0000
  13 #define KVM_APIC_DEST_MASK      0x800
  14
  15 struct kvm_timer {
  16         struct hrtimer timer;
  17         s64 period;                             /* unit: ns */
  18         ktime_t target_expiration;
  19         u32 timer_mode;
  20         u32 timer_mode_mask;
  21         u64 tscdeadline;
  22         u64 expired_tscdeadline;
  23         atomic_t pending;                       /* accumulated triggered timers */
  24         bool hv_timer_in_use;
  25 };
  26
  27 struct kvm_lapic {
  28         unsigned long base_address;
  29         struct kvm_io_device dev;
  30         struct kvm_timer lapic_timer;
  31         u32 divide_count;
  32         struct kvm_vcpu *vcpu;
  33         bool sw_enabled;
  34         bool irr_pending;
  35         bool lvt0_in_nmi_mode;
  36         /* Number of bits set in ISR. */
  37         s16 isr_count;
  38         /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
  39         int highest_isr_cache;
  40         /**
  41          * APIC register page.  The layout matches the register layout seen by
  42          * the guest 1:1, because it is accessed by the vmx microcode.
  43          * Note: Only one register, the TPR, is used by the microcode.
  44          */
  45         void *regs;
  46         gpa_t vapic_addr;
  47         struct gfn_to_hva_cache vapic_cache;
  48         unsigned long pending_events;
  49         unsigned int sipi_vector;
  50 };
  51
  52 struct dest_map;
  53
  54 int kvm_create_lapic(struct kvm_vcpu *vcpu);
  55 void kvm_free_lapic(struct kvm_vcpu *vcpu);
  56
  57 int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
  58 int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
  59 int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
  60 void kvm_apic_accept_events(struct kvm_vcpu *vcpu);
  61 void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event);
  62 u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
  63 void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
  64 void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
  65 void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
  66 u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
  67 void kvm_apic_set_version(struct kvm_vcpu *vcpu);
  68 int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val);
  69 int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len,
  70                        void *data);
  71 bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
  72                            int short_hand, unsigned int dest, int dest_mode);
  73
  74 void __kvm_apic_update_irr(u32 *pir, void *regs);
  75 void kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir);
  76 int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
  77                      struct dest_map *dest_map);
  78 int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
  79
  80 bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
  81                 struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map);
  82
  83 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
  84 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
  85 int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
  86 int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
  87 int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
  88
  89 u64 kvm_get_lapic_target_expiration_tsc(struct kvm_vcpu *vcpu);
  90 u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
  91 void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
  92
  93 void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
  94 void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
  95
  96 int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
  97 void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
  98 void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
  99
 100 int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
 101 int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
 102
 103 int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
 104 int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
 105
 106 static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
 107 {
 108         return vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
 109 }
 110
 111 int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
 112 void kvm_lapic_init(void);
 113
 114 #define VEC_POS(v) ((v) & (32 - 1))
 115 #define REG_POS(v) (((v) >> 5) << 4)
 116
 117 static inline void kvm_lapic_set_vector(int vec, void *bitmap)
 118 {
 119         set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
 120 }
 121
 122 static inline void kvm_lapic_set_irr(int vec, struct kvm_lapic *apic)
 123 {
 124         kvm_lapic_set_vector(vec, apic->regs + APIC_IRR);
 125         /*
 126          * irr_pending must be true if any interrupt is pending; set it after
 127          * APIC_IRR to avoid race with apic_clear_irr
 128          */
 129         apic->irr_pending = true;
 130 }
 131
 132 static inline u32 kvm_lapic_get_reg(struct kvm_lapic *apic, int reg_off)
 133 {
 134         return *((u32 *) (apic->regs + reg_off));
 135 }
 136
 137 static inline void kvm_lapic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val)
 138 {
 139         *((u32 *) (apic->regs + reg_off)) = val;
 140 }
 141
 142 extern struct static_key kvm_no_apic_vcpu;
 143
 144 static inline bool lapic_in_kernel(struct kvm_vcpu *vcpu)
 145 {
 146         if (static_key_false(&kvm_no_apic_vcpu))
 147                 return vcpu->arch.apic;
 148         return true;
 149 }
 150
 151 extern struct static_key_deferred apic_hw_disabled;
 152
 153 static inline int kvm_apic_hw_enabled(struct kvm_lapic *apic)
 154 {
 155         if (static_key_false(&apic_hw_disabled.key))
 156                 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
 157         return MSR_IA32_APICBASE_ENABLE;
 158 }
 159
 160 extern struct static_key_deferred apic_sw_disabled;
 161
 162 static inline bool kvm_apic_sw_enabled(struct kvm_lapic *apic)
 163 {
 164         if (static_key_false(&apic_sw_disabled.key))
 165                 return apic->sw_enabled;
 166         return true;
 167 }
 168
 169 static inline bool kvm_apic_present(struct kvm_vcpu *vcpu)
 170 {
 171         return lapic_in_kernel(vcpu) && kvm_apic_hw_enabled(vcpu->arch.apic);
 172 }
 173
 174 static inline int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
 175 {
 176         return kvm_apic_present(vcpu) && kvm_apic_sw_enabled(vcpu->arch.apic);
 177 }
 178
 179 static inline int apic_x2apic_mode(struct kvm_lapic *apic)
 180 {
 181         return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
 182 }
 183
 184 static inline bool kvm_vcpu_apicv_active(struct kvm_vcpu *vcpu)
 185 {
 186         return vcpu->arch.apic && vcpu->arch.apicv_active;
 187 }
 188
 189 static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)
 190 {
 191         return lapic_in_kernel(vcpu) && vcpu->arch.apic->pending_events;
 192 }
 193
 194 static inline bool kvm_lowest_prio_delivery(struct kvm_lapic_irq *irq)
 195 {
 196         return (irq->delivery_mode == APIC_DM_LOWEST ||
 197                         irq->msi_redir_hint);
 198 }
 199
 200 static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)
 201 {
 202         return lapic_in_kernel(vcpu) && test_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
 203 }
 204
 205 static inline u32 kvm_apic_id(struct kvm_lapic *apic)
 206 {
 207         /* To avoid a race between apic_base and following APIC_ID update when
 208          * switching to x2apic_mode, the x2apic mode returns initial x2apic id.
 209          */
 210         if (apic_x2apic_mode(apic))
 211                 return apic->vcpu->vcpu_id;
 212
 213         return kvm_lapic_get_reg(apic, APIC_ID) >> 24;
 214 }
 215
 216 bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
 217
 218 void wait_lapic_expire(struct kvm_vcpu *vcpu);
 219
 220 bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
 221                         struct kvm_vcpu **dest_vcpu);
 222 int kvm_vector_to_index(u32 vector, u32 dest_vcpus,
 223                         const unsigned long *bitmap, u32 bitmap_size);
 224 void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu *vcpu);
 225 void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu);
 226 void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);
 227 bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);
 228 #endif