1 #ifndef __KVM_X86_LAPIC_H
2 #define __KVM_X86_LAPIC_H
6 #include <linux/kvm_host.h>
8 #define KVM_APIC_INIT 0
9 #define KVM_APIC_SIPI 1
10 #define KVM_APIC_LVT_NUM 6
12 #define KVM_APIC_SHORT_MASK 0xc0000
13 #define KVM_APIC_DEST_MASK 0x800
15 #define APIC_BUS_CYCLE_NS 1
16 #define APIC_BUS_FREQUENCY (1000000000ULL / APIC_BUS_CYCLE_NS)
20 s64 period
; /* unit: ns */
21 ktime_t target_expiration
;
25 u64 expired_tscdeadline
;
26 atomic_t pending
; /* accumulated triggered timers */
31 unsigned long base_address
;
32 struct kvm_io_device dev
;
33 struct kvm_timer lapic_timer
;
35 struct kvm_vcpu
*vcpu
;
38 bool lvt0_in_nmi_mode
;
39 /* Number of bits set in ISR. */
41 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
42 int highest_isr_cache
;
44 * APIC register page. The layout matches the register layout seen by
45 * the guest 1:1, because it is accessed by the vmx microcode.
46 * Note: Only one register, the TPR, is used by the microcode.
50 struct gfn_to_hva_cache vapic_cache
;
51 unsigned long pending_events
;
52 unsigned int sipi_vector
;
57 int kvm_create_lapic(struct kvm_vcpu
*vcpu
);
58 void kvm_free_lapic(struct kvm_vcpu
*vcpu
);
60 int kvm_apic_has_interrupt(struct kvm_vcpu
*vcpu
);
61 int kvm_apic_accept_pic_intr(struct kvm_vcpu
*vcpu
);
62 int kvm_get_apic_interrupt(struct kvm_vcpu
*vcpu
);
63 void kvm_apic_accept_events(struct kvm_vcpu
*vcpu
);
64 void kvm_lapic_reset(struct kvm_vcpu
*vcpu
, bool init_event
);
65 u64
kvm_lapic_get_cr8(struct kvm_vcpu
*vcpu
);
66 void kvm_lapic_set_tpr(struct kvm_vcpu
*vcpu
, unsigned long cr8
);
67 void kvm_lapic_set_eoi(struct kvm_vcpu
*vcpu
);
68 void kvm_lapic_set_base(struct kvm_vcpu
*vcpu
, u64 value
);
69 u64
kvm_lapic_get_base(struct kvm_vcpu
*vcpu
);
70 void kvm_apic_set_version(struct kvm_vcpu
*vcpu
);
71 int kvm_lapic_reg_write(struct kvm_lapic
*apic
, u32 reg
, u32 val
);
72 int kvm_lapic_reg_read(struct kvm_lapic
*apic
, u32 offset
, int len
,
74 bool kvm_apic_match_dest(struct kvm_vcpu
*vcpu
, struct kvm_lapic
*source
,
75 int short_hand
, unsigned int dest
, int dest_mode
);
77 int __kvm_apic_update_irr(u32
*pir
, void *regs
);
78 int kvm_apic_update_irr(struct kvm_vcpu
*vcpu
, u32
*pir
);
79 void kvm_apic_update_ppr(struct kvm_vcpu
*vcpu
);
80 int kvm_apic_set_irq(struct kvm_vcpu
*vcpu
, struct kvm_lapic_irq
*irq
,
81 struct dest_map
*dest_map
);
82 int kvm_apic_local_deliver(struct kvm_lapic
*apic
, int lvt_type
);
84 bool kvm_irq_delivery_to_apic_fast(struct kvm
*kvm
, struct kvm_lapic
*src
,
85 struct kvm_lapic_irq
*irq
, int *r
, struct dest_map
*dest_map
);
87 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
);
88 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
);
89 int kvm_apic_get_state(struct kvm_vcpu
*vcpu
, struct kvm_lapic_state
*s
);
90 int kvm_apic_set_state(struct kvm_vcpu
*vcpu
, struct kvm_lapic_state
*s
);
91 int kvm_lapic_find_highest_irr(struct kvm_vcpu
*vcpu
);
93 u64
kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu
*vcpu
);
94 void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu
*vcpu
, u64 data
);
96 void kvm_apic_write_nodecode(struct kvm_vcpu
*vcpu
, u32 offset
);
97 void kvm_apic_set_eoi_accelerated(struct kvm_vcpu
*vcpu
, int vector
);
99 int kvm_lapic_set_vapic_addr(struct kvm_vcpu
*vcpu
, gpa_t vapic_addr
);
100 void kvm_lapic_sync_from_vapic(struct kvm_vcpu
*vcpu
);
101 void kvm_lapic_sync_to_vapic(struct kvm_vcpu
*vcpu
);
103 int kvm_x2apic_msr_write(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
);
104 int kvm_x2apic_msr_read(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*data
);
106 int kvm_hv_vapic_msr_write(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
);
107 int kvm_hv_vapic_msr_read(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*data
);
109 static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu
*vcpu
)
111 return vcpu
->arch
.hyperv
.hv_vapic
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
;
114 int kvm_lapic_enable_pv_eoi(struct kvm_vcpu
*vcpu
, u64 data
);
115 void kvm_lapic_init(void);
116 void kvm_lapic_exit(void);
118 #define VEC_POS(v) ((v) & (32 - 1))
119 #define REG_POS(v) (((v) >> 5) << 4)
121 static inline void kvm_lapic_set_vector(int vec
, void *bitmap
)
123 set_bit(VEC_POS(vec
), (bitmap
) + REG_POS(vec
));
126 static inline void kvm_lapic_set_irr(int vec
, struct kvm_lapic
*apic
)
128 kvm_lapic_set_vector(vec
, apic
->regs
+ APIC_IRR
);
130 * irr_pending must be true if any interrupt is pending; set it after
131 * APIC_IRR to avoid race with apic_clear_irr
133 apic
->irr_pending
= true;
136 static inline u32
kvm_lapic_get_reg(struct kvm_lapic
*apic
, int reg_off
)
138 return *((u32
*) (apic
->regs
+ reg_off
));
141 static inline void kvm_lapic_set_reg(struct kvm_lapic
*apic
, int reg_off
, u32 val
)
143 *((u32
*) (apic
->regs
+ reg_off
)) = val
;
146 extern struct static_key kvm_no_apic_vcpu
;
148 static inline bool lapic_in_kernel(struct kvm_vcpu
*vcpu
)
150 if (static_key_false(&kvm_no_apic_vcpu
))
151 return vcpu
->arch
.apic
;
155 extern struct static_key_deferred apic_hw_disabled
;
157 static inline int kvm_apic_hw_enabled(struct kvm_lapic
*apic
)
159 if (static_key_false(&apic_hw_disabled
.key
))
160 return apic
->vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_ENABLE
;
161 return MSR_IA32_APICBASE_ENABLE
;
164 extern struct static_key_deferred apic_sw_disabled
;
166 static inline bool kvm_apic_sw_enabled(struct kvm_lapic
*apic
)
168 if (static_key_false(&apic_sw_disabled
.key
))
169 return apic
->sw_enabled
;
173 static inline bool kvm_apic_present(struct kvm_vcpu
*vcpu
)
175 return lapic_in_kernel(vcpu
) && kvm_apic_hw_enabled(vcpu
->arch
.apic
);
178 static inline int kvm_lapic_enabled(struct kvm_vcpu
*vcpu
)
180 return kvm_apic_present(vcpu
) && kvm_apic_sw_enabled(vcpu
->arch
.apic
);
183 static inline int apic_x2apic_mode(struct kvm_lapic
*apic
)
185 return apic
->vcpu
->arch
.apic_base
& X2APIC_ENABLE
;
188 static inline bool kvm_vcpu_apicv_active(struct kvm_vcpu
*vcpu
)
190 return vcpu
->arch
.apic
&& vcpu
->arch
.apicv_active
;
193 static inline bool kvm_apic_has_events(struct kvm_vcpu
*vcpu
)
195 return lapic_in_kernel(vcpu
) && vcpu
->arch
.apic
->pending_events
;
198 static inline bool kvm_lowest_prio_delivery(struct kvm_lapic_irq
*irq
)
200 return (irq
->delivery_mode
== APIC_DM_LOWEST
||
201 irq
->msi_redir_hint
);
204 static inline int kvm_lapic_latched_init(struct kvm_vcpu
*vcpu
)
206 return lapic_in_kernel(vcpu
) && test_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
209 bool kvm_apic_pending_eoi(struct kvm_vcpu
*vcpu
, int vector
);
211 void wait_lapic_expire(struct kvm_vcpu
*vcpu
);
213 bool kvm_intr_is_single_vcpu_fast(struct kvm
*kvm
, struct kvm_lapic_irq
*irq
,
214 struct kvm_vcpu
**dest_vcpu
);
215 int kvm_vector_to_index(u32 vector
, u32 dest_vcpus
,
216 const unsigned long *bitmap
, u32 bitmap_size
);
217 void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu
*vcpu
);
218 void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu
*vcpu
);
219 void kvm_lapic_expired_hv_timer(struct kvm_vcpu
*vcpu
);
220 bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu
*vcpu
);
221 void kvm_lapic_restart_hv_timer(struct kvm_vcpu
*vcpu
);