1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
6 * machines without emulation or binary translation.
10 * Copyright (C) 2006 Qumranet, Inc.
11 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Avi Kivity <avi@qumranet.com>
21 #include "mmu_internal.h"
24 #include "kvm_cache_regs.h"
25 #include "kvm_emulate.h"
29 #include <linux/kvm_host.h>
30 #include <linux/types.h>
31 #include <linux/string.h>
33 #include <linux/highmem.h>
34 #include <linux/moduleparam.h>
35 #include <linux/export.h>
36 #include <linux/swap.h>
37 #include <linux/hugetlb.h>
38 #include <linux/compiler.h>
39 #include <linux/srcu.h>
40 #include <linux/slab.h>
41 #include <linux/sched/signal.h>
42 #include <linux/uaccess.h>
43 #include <linux/hash.h>
44 #include <linux/kern_levels.h>
45 #include <linux/kthread.h>
48 #include <asm/memtype.h>
49 #include <asm/cmpxchg.h>
52 #include <asm/kvm_page_track.h>
55 extern bool itlb_multihit_kvm_mitigation
;
57 static int __read_mostly nx_huge_pages
= -1;
58 #ifdef CONFIG_PREEMPT_RT
59 /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */
60 static uint __read_mostly nx_huge_pages_recovery_ratio
= 0;
62 static uint __read_mostly nx_huge_pages_recovery_ratio
= 60;
65 static int set_nx_huge_pages(const char *val
, const struct kernel_param
*kp
);
66 static int set_nx_huge_pages_recovery_ratio(const char *val
, const struct kernel_param
*kp
);
68 static const struct kernel_param_ops nx_huge_pages_ops
= {
69 .set
= set_nx_huge_pages
,
70 .get
= param_get_bool
,
73 static const struct kernel_param_ops nx_huge_pages_recovery_ratio_ops
= {
74 .set
= set_nx_huge_pages_recovery_ratio
,
75 .get
= param_get_uint
,
78 module_param_cb(nx_huge_pages
, &nx_huge_pages_ops
, &nx_huge_pages
, 0644);
79 __MODULE_PARM_TYPE(nx_huge_pages
, "bool");
80 module_param_cb(nx_huge_pages_recovery_ratio
, &nx_huge_pages_recovery_ratio_ops
,
81 &nx_huge_pages_recovery_ratio
, 0644);
82 __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio
, "uint");
84 static bool __read_mostly force_flush_and_sync_on_reuse
;
85 module_param_named(flush_on_reuse
, force_flush_and_sync_on_reuse
, bool, 0644);
88 * When setting this variable to true it enables Two-Dimensional-Paging
89 * where the hardware walks 2 page tables:
90 * 1. the guest-virtual to guest-physical
91 * 2. while doing 1. it walks guest-physical to host-physical
92 * If the hardware supports that we don't need to do shadow paging.
94 bool tdp_enabled
= false;
96 static int max_huge_page_level __read_mostly
;
97 static int max_tdp_level __read_mostly
;
100 AUDIT_PRE_PAGE_FAULT
,
101 AUDIT_POST_PAGE_FAULT
,
103 AUDIT_POST_PTE_WRITE
,
110 module_param(dbg
, bool, 0644);
113 #define PTE_PREFETCH_NUM 8
115 #define PT32_LEVEL_BITS 10
117 #define PT32_LEVEL_SHIFT(level) \
118 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
120 #define PT32_LVL_OFFSET_MASK(level) \
121 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
122 * PT32_LEVEL_BITS))) - 1))
124 #define PT32_INDEX(address, level)\
125 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
128 #define PT32_BASE_ADDR_MASK PAGE_MASK
129 #define PT32_DIR_BASE_ADDR_MASK \
130 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
131 #define PT32_LVL_ADDR_MASK(level) \
132 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
133 * PT32_LEVEL_BITS))) - 1))
135 #include <trace/events/kvm.h>
137 /* make pte_list_desc fit well in cache line */
138 #define PTE_LIST_EXT 3
140 struct pte_list_desc
{
141 u64
*sptes
[PTE_LIST_EXT
];
142 struct pte_list_desc
*more
;
145 struct kvm_shadow_walk_iterator
{
153 #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \
154 for (shadow_walk_init_using_root(&(_walker), (_vcpu), \
156 shadow_walk_okay(&(_walker)); \
157 shadow_walk_next(&(_walker)))
159 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
160 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
161 shadow_walk_okay(&(_walker)); \
162 shadow_walk_next(&(_walker)))
164 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
165 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
166 shadow_walk_okay(&(_walker)) && \
167 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
168 __shadow_walk_next(&(_walker), spte))
170 static struct kmem_cache
*pte_list_desc_cache
;
171 struct kmem_cache
*mmu_page_header_cache
;
172 static struct percpu_counter kvm_total_used_mmu_pages
;
174 static void mmu_spte_set(u64
*sptep
, u64 spte
);
175 static union kvm_mmu_page_role
176 kvm_mmu_calc_root_page_role(struct kvm_vcpu
*vcpu
);
178 #define CREATE_TRACE_POINTS
179 #include "mmutrace.h"
182 static inline bool kvm_available_flush_tlb_with_range(void)
184 return kvm_x86_ops
.tlb_remote_flush_with_range
;
187 static void kvm_flush_remote_tlbs_with_range(struct kvm
*kvm
,
188 struct kvm_tlb_range
*range
)
192 if (range
&& kvm_x86_ops
.tlb_remote_flush_with_range
)
193 ret
= kvm_x86_ops
.tlb_remote_flush_with_range(kvm
, range
);
196 kvm_flush_remote_tlbs(kvm
);
199 void kvm_flush_remote_tlbs_with_address(struct kvm
*kvm
,
200 u64 start_gfn
, u64 pages
)
202 struct kvm_tlb_range range
;
204 range
.start_gfn
= start_gfn
;
207 kvm_flush_remote_tlbs_with_range(kvm
, &range
);
210 bool is_nx_huge_page_enabled(void)
212 return READ_ONCE(nx_huge_pages
);
215 static void mark_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, u64 gfn
,
218 u64 mask
= make_mmio_spte(vcpu
, gfn
, access
);
220 trace_mark_mmio_spte(sptep
, gfn
, mask
);
221 mmu_spte_set(sptep
, mask
);
224 static gfn_t
get_mmio_spte_gfn(u64 spte
)
226 u64 gpa
= spte
& shadow_nonpresent_or_rsvd_lower_gfn_mask
;
228 gpa
|= (spte
>> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN
)
229 & shadow_nonpresent_or_rsvd_mask
;
231 return gpa
>> PAGE_SHIFT
;
234 static unsigned get_mmio_spte_access(u64 spte
)
236 return spte
& shadow_mmio_access_mask
;
239 static bool set_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, gfn_t gfn
,
240 kvm_pfn_t pfn
, unsigned int access
)
242 if (unlikely(is_noslot_pfn(pfn
))) {
243 mark_mmio_spte(vcpu
, sptep
, gfn
, access
);
250 static bool check_mmio_spte(struct kvm_vcpu
*vcpu
, u64 spte
)
252 u64 kvm_gen
, spte_gen
, gen
;
254 gen
= kvm_vcpu_memslots(vcpu
)->generation
;
255 if (unlikely(gen
& KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS
))
258 kvm_gen
= gen
& MMIO_SPTE_GEN_MASK
;
259 spte_gen
= get_mmio_spte_generation(spte
);
261 trace_check_mmio_spte(spte
, kvm_gen
, spte_gen
);
262 return likely(kvm_gen
== spte_gen
);
265 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
266 struct x86_exception
*exception
)
268 /* Check if guest physical address doesn't exceed guest maximum */
269 if (kvm_vcpu_is_illegal_gpa(vcpu
, gpa
)) {
270 exception
->error_code
|= PFERR_RSVD_MASK
;
277 static int is_cpuid_PSE36(void)
282 static int is_nx(struct kvm_vcpu
*vcpu
)
284 return vcpu
->arch
.efer
& EFER_NX
;
287 static gfn_t
pse36_gfn_delta(u32 gpte
)
289 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
291 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
295 static void __set_spte(u64
*sptep
, u64 spte
)
297 WRITE_ONCE(*sptep
, spte
);
300 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
302 WRITE_ONCE(*sptep
, spte
);
305 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
307 return xchg(sptep
, spte
);
310 static u64
__get_spte_lockless(u64
*sptep
)
312 return READ_ONCE(*sptep
);
323 static void count_spte_clear(u64
*sptep
, u64 spte
)
325 struct kvm_mmu_page
*sp
= sptep_to_sp(sptep
);
327 if (is_shadow_present_pte(spte
))
330 /* Ensure the spte is completely set before we increase the count */
332 sp
->clear_spte_count
++;
335 static void __set_spte(u64
*sptep
, u64 spte
)
337 union split_spte
*ssptep
, sspte
;
339 ssptep
= (union split_spte
*)sptep
;
340 sspte
= (union split_spte
)spte
;
342 ssptep
->spte_high
= sspte
.spte_high
;
345 * If we map the spte from nonpresent to present, We should store
346 * the high bits firstly, then set present bit, so cpu can not
347 * fetch this spte while we are setting the spte.
351 WRITE_ONCE(ssptep
->spte_low
, sspte
.spte_low
);
354 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
356 union split_spte
*ssptep
, sspte
;
358 ssptep
= (union split_spte
*)sptep
;
359 sspte
= (union split_spte
)spte
;
361 WRITE_ONCE(ssptep
->spte_low
, sspte
.spte_low
);
364 * If we map the spte from present to nonpresent, we should clear
365 * present bit firstly to avoid vcpu fetch the old high bits.
369 ssptep
->spte_high
= sspte
.spte_high
;
370 count_spte_clear(sptep
, spte
);
373 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
375 union split_spte
*ssptep
, sspte
, orig
;
377 ssptep
= (union split_spte
*)sptep
;
378 sspte
= (union split_spte
)spte
;
380 /* xchg acts as a barrier before the setting of the high bits */
381 orig
.spte_low
= xchg(&ssptep
->spte_low
, sspte
.spte_low
);
382 orig
.spte_high
= ssptep
->spte_high
;
383 ssptep
->spte_high
= sspte
.spte_high
;
384 count_spte_clear(sptep
, spte
);
390 * The idea using the light way get the spte on x86_32 guest is from
391 * gup_get_pte (mm/gup.c).
393 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
394 * coalesces them and we are running out of the MMU lock. Therefore
395 * we need to protect against in-progress updates of the spte.
397 * Reading the spte while an update is in progress may get the old value
398 * for the high part of the spte. The race is fine for a present->non-present
399 * change (because the high part of the spte is ignored for non-present spte),
400 * but for a present->present change we must reread the spte.
402 * All such changes are done in two steps (present->non-present and
403 * non-present->present), hence it is enough to count the number of
404 * present->non-present updates: if it changed while reading the spte,
405 * we might have hit the race. This is done using clear_spte_count.
407 static u64
__get_spte_lockless(u64
*sptep
)
409 struct kvm_mmu_page
*sp
= sptep_to_sp(sptep
);
410 union split_spte spte
, *orig
= (union split_spte
*)sptep
;
414 count
= sp
->clear_spte_count
;
417 spte
.spte_low
= orig
->spte_low
;
420 spte
.spte_high
= orig
->spte_high
;
423 if (unlikely(spte
.spte_low
!= orig
->spte_low
||
424 count
!= sp
->clear_spte_count
))
431 static bool spte_has_volatile_bits(u64 spte
)
433 if (!is_shadow_present_pte(spte
))
437 * Always atomically update spte if it can be updated
438 * out of mmu-lock, it can ensure dirty bit is not lost,
439 * also, it can help us to get a stable is_writable_pte()
440 * to ensure tlb flush is not missed.
442 if (spte_can_locklessly_be_made_writable(spte
) ||
443 is_access_track_spte(spte
))
446 if (spte_ad_enabled(spte
)) {
447 if ((spte
& shadow_accessed_mask
) == 0 ||
448 (is_writable_pte(spte
) && (spte
& shadow_dirty_mask
) == 0))
455 /* Rules for using mmu_spte_set:
456 * Set the sptep from nonpresent to present.
457 * Note: the sptep being assigned *must* be either not present
458 * or in a state where the hardware will not attempt to update
461 static void mmu_spte_set(u64
*sptep
, u64 new_spte
)
463 WARN_ON(is_shadow_present_pte(*sptep
));
464 __set_spte(sptep
, new_spte
);
468 * Update the SPTE (excluding the PFN), but do not track changes in its
469 * accessed/dirty status.
471 static u64
mmu_spte_update_no_track(u64
*sptep
, u64 new_spte
)
473 u64 old_spte
= *sptep
;
475 WARN_ON(!is_shadow_present_pte(new_spte
));
477 if (!is_shadow_present_pte(old_spte
)) {
478 mmu_spte_set(sptep
, new_spte
);
482 if (!spte_has_volatile_bits(old_spte
))
483 __update_clear_spte_fast(sptep
, new_spte
);
485 old_spte
= __update_clear_spte_slow(sptep
, new_spte
);
487 WARN_ON(spte_to_pfn(old_spte
) != spte_to_pfn(new_spte
));
492 /* Rules for using mmu_spte_update:
493 * Update the state bits, it means the mapped pfn is not changed.
495 * Whenever we overwrite a writable spte with a read-only one we
496 * should flush remote TLBs. Otherwise rmap_write_protect
497 * will find a read-only spte, even though the writable spte
498 * might be cached on a CPU's TLB, the return value indicates this
501 * Returns true if the TLB needs to be flushed
503 static bool mmu_spte_update(u64
*sptep
, u64 new_spte
)
506 u64 old_spte
= mmu_spte_update_no_track(sptep
, new_spte
);
508 if (!is_shadow_present_pte(old_spte
))
512 * For the spte updated out of mmu-lock is safe, since
513 * we always atomically update it, see the comments in
514 * spte_has_volatile_bits().
516 if (spte_can_locklessly_be_made_writable(old_spte
) &&
517 !is_writable_pte(new_spte
))
521 * Flush TLB when accessed/dirty states are changed in the page tables,
522 * to guarantee consistency between TLB and page tables.
525 if (is_accessed_spte(old_spte
) && !is_accessed_spte(new_spte
)) {
527 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
530 if (is_dirty_spte(old_spte
) && !is_dirty_spte(new_spte
)) {
532 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
539 * Rules for using mmu_spte_clear_track_bits:
540 * It sets the sptep from present to nonpresent, and track the
541 * state bits, it is used to clear the last level sptep.
542 * Returns non-zero if the PTE was previously valid.
544 static int mmu_spte_clear_track_bits(u64
*sptep
)
547 u64 old_spte
= *sptep
;
549 if (!spte_has_volatile_bits(old_spte
))
550 __update_clear_spte_fast(sptep
, 0ull);
552 old_spte
= __update_clear_spte_slow(sptep
, 0ull);
554 if (!is_shadow_present_pte(old_spte
))
557 pfn
= spte_to_pfn(old_spte
);
560 * KVM does not hold the refcount of the page used by
561 * kvm mmu, before reclaiming the page, we should
562 * unmap it from mmu first.
564 WARN_ON(!kvm_is_reserved_pfn(pfn
) && !page_count(pfn_to_page(pfn
)));
566 if (is_accessed_spte(old_spte
))
567 kvm_set_pfn_accessed(pfn
);
569 if (is_dirty_spte(old_spte
))
570 kvm_set_pfn_dirty(pfn
);
576 * Rules for using mmu_spte_clear_no_track:
577 * Directly clear spte without caring the state bits of sptep,
578 * it is used to set the upper level spte.
580 static void mmu_spte_clear_no_track(u64
*sptep
)
582 __update_clear_spte_fast(sptep
, 0ull);
585 static u64
mmu_spte_get_lockless(u64
*sptep
)
587 return __get_spte_lockless(sptep
);
590 /* Restore an acc-track PTE back to a regular PTE */
591 static u64
restore_acc_track_spte(u64 spte
)
594 u64 saved_bits
= (spte
>> SHADOW_ACC_TRACK_SAVED_BITS_SHIFT
)
595 & SHADOW_ACC_TRACK_SAVED_BITS_MASK
;
597 WARN_ON_ONCE(spte_ad_enabled(spte
));
598 WARN_ON_ONCE(!is_access_track_spte(spte
));
600 new_spte
&= ~shadow_acc_track_mask
;
601 new_spte
&= ~(SHADOW_ACC_TRACK_SAVED_BITS_MASK
<<
602 SHADOW_ACC_TRACK_SAVED_BITS_SHIFT
);
603 new_spte
|= saved_bits
;
608 /* Returns the Accessed status of the PTE and resets it at the same time. */
609 static bool mmu_spte_age(u64
*sptep
)
611 u64 spte
= mmu_spte_get_lockless(sptep
);
613 if (!is_accessed_spte(spte
))
616 if (spte_ad_enabled(spte
)) {
617 clear_bit((ffs(shadow_accessed_mask
) - 1),
618 (unsigned long *)sptep
);
621 * Capture the dirty status of the page, so that it doesn't get
622 * lost when the SPTE is marked for access tracking.
624 if (is_writable_pte(spte
))
625 kvm_set_pfn_dirty(spte_to_pfn(spte
));
627 spte
= mark_spte_for_access_track(spte
);
628 mmu_spte_update_no_track(sptep
, spte
);
634 static void walk_shadow_page_lockless_begin(struct kvm_vcpu
*vcpu
)
637 * Prevent page table teardown by making any free-er wait during
638 * kvm_flush_remote_tlbs() IPI to all active vcpus.
643 * Make sure a following spte read is not reordered ahead of the write
646 smp_store_mb(vcpu
->mode
, READING_SHADOW_PAGE_TABLES
);
649 static void walk_shadow_page_lockless_end(struct kvm_vcpu
*vcpu
)
652 * Make sure the write to vcpu->mode is not reordered in front of
653 * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us
654 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
656 smp_store_release(&vcpu
->mode
, OUTSIDE_GUEST_MODE
);
660 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
, bool maybe_indirect
)
664 /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */
665 r
= kvm_mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
666 1 + PT64_ROOT_MAX_LEVEL
+ PTE_PREFETCH_NUM
);
669 r
= kvm_mmu_topup_memory_cache(&vcpu
->arch
.mmu_shadow_page_cache
,
670 PT64_ROOT_MAX_LEVEL
);
673 if (maybe_indirect
) {
674 r
= kvm_mmu_topup_memory_cache(&vcpu
->arch
.mmu_gfn_array_cache
,
675 PT64_ROOT_MAX_LEVEL
);
679 return kvm_mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
680 PT64_ROOT_MAX_LEVEL
);
683 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
685 kvm_mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
);
686 kvm_mmu_free_memory_cache(&vcpu
->arch
.mmu_shadow_page_cache
);
687 kvm_mmu_free_memory_cache(&vcpu
->arch
.mmu_gfn_array_cache
);
688 kvm_mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
);
691 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
693 return kvm_mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
);
696 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
698 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
701 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
703 if (!sp
->role
.direct
)
704 return sp
->gfns
[index
];
706 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
709 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
711 if (!sp
->role
.direct
) {
712 sp
->gfns
[index
] = gfn
;
716 if (WARN_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
)))
717 pr_err_ratelimited("gfn mismatch under direct page %llx "
718 "(expected %llx, got %llx)\n",
720 kvm_mmu_page_get_gfn(sp
, index
), gfn
);
724 * Return the pointer to the large page information for a given gfn,
725 * handling slots that are not large page aligned.
727 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
728 struct kvm_memory_slot
*slot
,
733 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
734 return &slot
->arch
.lpage_info
[level
- 2][idx
];
737 static void update_gfn_disallow_lpage_count(struct kvm_memory_slot
*slot
,
738 gfn_t gfn
, int count
)
740 struct kvm_lpage_info
*linfo
;
743 for (i
= PG_LEVEL_2M
; i
<= KVM_MAX_HUGEPAGE_LEVEL
; ++i
) {
744 linfo
= lpage_info_slot(gfn
, slot
, i
);
745 linfo
->disallow_lpage
+= count
;
746 WARN_ON(linfo
->disallow_lpage
< 0);
750 void kvm_mmu_gfn_disallow_lpage(struct kvm_memory_slot
*slot
, gfn_t gfn
)
752 update_gfn_disallow_lpage_count(slot
, gfn
, 1);
755 void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot
*slot
, gfn_t gfn
)
757 update_gfn_disallow_lpage_count(slot
, gfn
, -1);
760 static void account_shadowed(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
762 struct kvm_memslots
*slots
;
763 struct kvm_memory_slot
*slot
;
766 kvm
->arch
.indirect_shadow_pages
++;
768 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
769 slot
= __gfn_to_memslot(slots
, gfn
);
771 /* the non-leaf shadow pages are keeping readonly. */
772 if (sp
->role
.level
> PG_LEVEL_4K
)
773 return kvm_slot_page_track_add_page(kvm
, slot
, gfn
,
774 KVM_PAGE_TRACK_WRITE
);
776 kvm_mmu_gfn_disallow_lpage(slot
, gfn
);
779 void account_huge_nx_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
781 if (sp
->lpage_disallowed
)
784 ++kvm
->stat
.nx_lpage_splits
;
785 list_add_tail(&sp
->lpage_disallowed_link
,
786 &kvm
->arch
.lpage_disallowed_mmu_pages
);
787 sp
->lpage_disallowed
= true;
790 static void unaccount_shadowed(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
792 struct kvm_memslots
*slots
;
793 struct kvm_memory_slot
*slot
;
796 kvm
->arch
.indirect_shadow_pages
--;
798 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
799 slot
= __gfn_to_memslot(slots
, gfn
);
800 if (sp
->role
.level
> PG_LEVEL_4K
)
801 return kvm_slot_page_track_remove_page(kvm
, slot
, gfn
,
802 KVM_PAGE_TRACK_WRITE
);
804 kvm_mmu_gfn_allow_lpage(slot
, gfn
);
807 void unaccount_huge_nx_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
809 --kvm
->stat
.nx_lpage_splits
;
810 sp
->lpage_disallowed
= false;
811 list_del(&sp
->lpage_disallowed_link
);
814 static struct kvm_memory_slot
*
815 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
818 struct kvm_memory_slot
*slot
;
820 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
821 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
)
823 if (no_dirty_log
&& kvm_slot_dirty_track_enabled(slot
))
830 * About rmap_head encoding:
832 * If the bit zero of rmap_head->val is clear, then it points to the only spte
833 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
834 * pte_list_desc containing more mappings.
838 * Returns the number of pointers in the rmap chain, not counting the new one.
840 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
841 struct kvm_rmap_head
*rmap_head
)
843 struct pte_list_desc
*desc
;
846 if (!rmap_head
->val
) {
847 rmap_printk("pte_list_add: %p %llx 0->1\n", spte
, *spte
);
848 rmap_head
->val
= (unsigned long)spte
;
849 } else if (!(rmap_head
->val
& 1)) {
850 rmap_printk("pte_list_add: %p %llx 1->many\n", spte
, *spte
);
851 desc
= mmu_alloc_pte_list_desc(vcpu
);
852 desc
->sptes
[0] = (u64
*)rmap_head
->val
;
853 desc
->sptes
[1] = spte
;
854 rmap_head
->val
= (unsigned long)desc
| 1;
857 rmap_printk("pte_list_add: %p %llx many->many\n", spte
, *spte
);
858 desc
= (struct pte_list_desc
*)(rmap_head
->val
& ~1ul);
859 while (desc
->sptes
[PTE_LIST_EXT
-1]) {
860 count
+= PTE_LIST_EXT
;
863 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
869 for (i
= 0; desc
->sptes
[i
]; ++i
)
871 desc
->sptes
[i
] = spte
;
877 pte_list_desc_remove_entry(struct kvm_rmap_head
*rmap_head
,
878 struct pte_list_desc
*desc
, int i
,
879 struct pte_list_desc
*prev_desc
)
883 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
885 desc
->sptes
[i
] = desc
->sptes
[j
];
886 desc
->sptes
[j
] = NULL
;
889 if (!prev_desc
&& !desc
->more
)
893 prev_desc
->more
= desc
->more
;
895 rmap_head
->val
= (unsigned long)desc
->more
| 1;
896 mmu_free_pte_list_desc(desc
);
899 static void __pte_list_remove(u64
*spte
, struct kvm_rmap_head
*rmap_head
)
901 struct pte_list_desc
*desc
;
902 struct pte_list_desc
*prev_desc
;
905 if (!rmap_head
->val
) {
906 pr_err("%s: %p 0->BUG\n", __func__
, spte
);
908 } else if (!(rmap_head
->val
& 1)) {
909 rmap_printk("%s: %p 1->0\n", __func__
, spte
);
910 if ((u64
*)rmap_head
->val
!= spte
) {
911 pr_err("%s: %p 1->BUG\n", __func__
, spte
);
916 rmap_printk("%s: %p many->many\n", __func__
, spte
);
917 desc
= (struct pte_list_desc
*)(rmap_head
->val
& ~1ul);
920 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
) {
921 if (desc
->sptes
[i
] == spte
) {
922 pte_list_desc_remove_entry(rmap_head
,
930 pr_err("%s: %p many->many\n", __func__
, spte
);
935 static void pte_list_remove(struct kvm_rmap_head
*rmap_head
, u64
*sptep
)
937 mmu_spte_clear_track_bits(sptep
);
938 __pte_list_remove(sptep
, rmap_head
);
941 static struct kvm_rmap_head
*__gfn_to_rmap(gfn_t gfn
, int level
,
942 struct kvm_memory_slot
*slot
)
946 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
947 return &slot
->arch
.rmap
[level
- PG_LEVEL_4K
][idx
];
950 static struct kvm_rmap_head
*gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
,
951 struct kvm_mmu_page
*sp
)
953 struct kvm_memslots
*slots
;
954 struct kvm_memory_slot
*slot
;
956 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
957 slot
= __gfn_to_memslot(slots
, gfn
);
958 return __gfn_to_rmap(gfn
, sp
->role
.level
, slot
);
961 static bool rmap_can_add(struct kvm_vcpu
*vcpu
)
963 struct kvm_mmu_memory_cache
*mc
;
965 mc
= &vcpu
->arch
.mmu_pte_list_desc_cache
;
966 return kvm_mmu_memory_cache_nr_free_objects(mc
);
969 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
971 struct kvm_mmu_page
*sp
;
972 struct kvm_rmap_head
*rmap_head
;
974 sp
= sptep_to_sp(spte
);
975 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
976 rmap_head
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
);
977 return pte_list_add(vcpu
, spte
, rmap_head
);
980 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
982 struct kvm_mmu_page
*sp
;
984 struct kvm_rmap_head
*rmap_head
;
986 sp
= sptep_to_sp(spte
);
987 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
988 rmap_head
= gfn_to_rmap(kvm
, gfn
, sp
);
989 __pte_list_remove(spte
, rmap_head
);
993 * Used by the following functions to iterate through the sptes linked by a
994 * rmap. All fields are private and not assumed to be used outside.
996 struct rmap_iterator
{
998 struct pte_list_desc
*desc
; /* holds the sptep if not NULL */
999 int pos
; /* index of the sptep */
1003 * Iteration must be started by this function. This should also be used after
1004 * removing/dropping sptes from the rmap link because in such cases the
1005 * information in the iterator may not be valid.
1007 * Returns sptep if found, NULL otherwise.
1009 static u64
*rmap_get_first(struct kvm_rmap_head
*rmap_head
,
1010 struct rmap_iterator
*iter
)
1014 if (!rmap_head
->val
)
1017 if (!(rmap_head
->val
& 1)) {
1019 sptep
= (u64
*)rmap_head
->val
;
1023 iter
->desc
= (struct pte_list_desc
*)(rmap_head
->val
& ~1ul);
1025 sptep
= iter
->desc
->sptes
[iter
->pos
];
1027 BUG_ON(!is_shadow_present_pte(*sptep
));
1032 * Must be used with a valid iterator: e.g. after rmap_get_first().
1034 * Returns sptep if found, NULL otherwise.
1036 static u64
*rmap_get_next(struct rmap_iterator
*iter
)
1041 if (iter
->pos
< PTE_LIST_EXT
- 1) {
1043 sptep
= iter
->desc
->sptes
[iter
->pos
];
1048 iter
->desc
= iter
->desc
->more
;
1052 /* desc->sptes[0] cannot be NULL */
1053 sptep
= iter
->desc
->sptes
[iter
->pos
];
1060 BUG_ON(!is_shadow_present_pte(*sptep
));
1064 #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \
1065 for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \
1066 _spte_; _spte_ = rmap_get_next(_iter_))
1068 static void drop_spte(struct kvm
*kvm
, u64
*sptep
)
1070 if (mmu_spte_clear_track_bits(sptep
))
1071 rmap_remove(kvm
, sptep
);
1075 static bool __drop_large_spte(struct kvm
*kvm
, u64
*sptep
)
1077 if (is_large_pte(*sptep
)) {
1078 WARN_ON(sptep_to_sp(sptep
)->role
.level
== PG_LEVEL_4K
);
1079 drop_spte(kvm
, sptep
);
1087 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1089 if (__drop_large_spte(vcpu
->kvm
, sptep
)) {
1090 struct kvm_mmu_page
*sp
= sptep_to_sp(sptep
);
1092 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, sp
->gfn
,
1093 KVM_PAGES_PER_HPAGE(sp
->role
.level
));
1098 * Write-protect on the specified @sptep, @pt_protect indicates whether
1099 * spte write-protection is caused by protecting shadow page table.
1101 * Note: write protection is difference between dirty logging and spte
1103 * - for dirty logging, the spte can be set to writable at anytime if
1104 * its dirty bitmap is properly set.
1105 * - for spte protection, the spte can be writable only after unsync-ing
1108 * Return true if tlb need be flushed.
1110 static bool spte_write_protect(u64
*sptep
, bool pt_protect
)
1114 if (!is_writable_pte(spte
) &&
1115 !(pt_protect
&& spte_can_locklessly_be_made_writable(spte
)))
1118 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep
, *sptep
);
1121 spte
&= ~SPTE_MMU_WRITEABLE
;
1122 spte
= spte
& ~PT_WRITABLE_MASK
;
1124 return mmu_spte_update(sptep
, spte
);
1127 static bool __rmap_write_protect(struct kvm
*kvm
,
1128 struct kvm_rmap_head
*rmap_head
,
1132 struct rmap_iterator iter
;
1135 for_each_rmap_spte(rmap_head
, &iter
, sptep
)
1136 flush
|= spte_write_protect(sptep
, pt_protect
);
1141 static bool spte_clear_dirty(u64
*sptep
)
1145 rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep
, *sptep
);
1147 MMU_WARN_ON(!spte_ad_enabled(spte
));
1148 spte
&= ~shadow_dirty_mask
;
1149 return mmu_spte_update(sptep
, spte
);
1152 static bool spte_wrprot_for_clear_dirty(u64
*sptep
)
1154 bool was_writable
= test_and_clear_bit(PT_WRITABLE_SHIFT
,
1155 (unsigned long *)sptep
);
1156 if (was_writable
&& !spte_ad_enabled(*sptep
))
1157 kvm_set_pfn_dirty(spte_to_pfn(*sptep
));
1159 return was_writable
;
1163 * Gets the GFN ready for another round of dirty logging by clearing the
1164 * - D bit on ad-enabled SPTEs, and
1165 * - W bit on ad-disabled SPTEs.
1166 * Returns true iff any D or W bits were cleared.
1168 static bool __rmap_clear_dirty(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
)
1171 struct rmap_iterator iter
;
1174 for_each_rmap_spte(rmap_head
, &iter
, sptep
)
1175 if (spte_ad_need_write_protect(*sptep
))
1176 flush
|= spte_wrprot_for_clear_dirty(sptep
);
1178 flush
|= spte_clear_dirty(sptep
);
1183 static bool spte_set_dirty(u64
*sptep
)
1187 rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep
, *sptep
);
1190 * Similar to the !kvm_x86_ops.slot_disable_log_dirty case,
1191 * do not bother adding back write access to pages marked
1192 * SPTE_AD_WRPROT_ONLY_MASK.
1194 spte
|= shadow_dirty_mask
;
1196 return mmu_spte_update(sptep
, spte
);
1199 static bool __rmap_set_dirty(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
)
1202 struct rmap_iterator iter
;
1205 for_each_rmap_spte(rmap_head
, &iter
, sptep
)
1206 if (spte_ad_enabled(*sptep
))
1207 flush
|= spte_set_dirty(sptep
);
1213 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1214 * @kvm: kvm instance
1215 * @slot: slot to protect
1216 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1217 * @mask: indicates which pages we should protect
1219 * Used when we do not need to care about huge page mappings: e.g. during dirty
1220 * logging we do not have any such mappings.
1222 static void kvm_mmu_write_protect_pt_masked(struct kvm
*kvm
,
1223 struct kvm_memory_slot
*slot
,
1224 gfn_t gfn_offset
, unsigned long mask
)
1226 struct kvm_rmap_head
*rmap_head
;
1228 if (kvm
->arch
.tdp_mmu_enabled
)
1229 kvm_tdp_mmu_clear_dirty_pt_masked(kvm
, slot
,
1230 slot
->base_gfn
+ gfn_offset
, mask
, true);
1232 rmap_head
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1234 __rmap_write_protect(kvm
, rmap_head
, false);
1236 /* clear the first set bit */
1242 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write
1243 * protect the page if the D-bit isn't supported.
1244 * @kvm: kvm instance
1245 * @slot: slot to clear D-bit
1246 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1247 * @mask: indicates which pages we should clear D-bit
1249 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1251 void kvm_mmu_clear_dirty_pt_masked(struct kvm
*kvm
,
1252 struct kvm_memory_slot
*slot
,
1253 gfn_t gfn_offset
, unsigned long mask
)
1255 struct kvm_rmap_head
*rmap_head
;
1257 if (kvm
->arch
.tdp_mmu_enabled
)
1258 kvm_tdp_mmu_clear_dirty_pt_masked(kvm
, slot
,
1259 slot
->base_gfn
+ gfn_offset
, mask
, false);
1261 rmap_head
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1263 __rmap_clear_dirty(kvm
, rmap_head
);
1265 /* clear the first set bit */
1269 EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked
);
1272 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1275 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1276 * enable dirty logging for them.
1278 * Used when we do not need to care about huge page mappings: e.g. during dirty
1279 * logging we do not have any such mappings.
1281 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm
*kvm
,
1282 struct kvm_memory_slot
*slot
,
1283 gfn_t gfn_offset
, unsigned long mask
)
1285 if (kvm_x86_ops
.enable_log_dirty_pt_masked
)
1286 kvm_x86_ops
.enable_log_dirty_pt_masked(kvm
, slot
, gfn_offset
,
1289 kvm_mmu_write_protect_pt_masked(kvm
, slot
, gfn_offset
, mask
);
1292 int kvm_cpu_dirty_log_size(void)
1294 if (kvm_x86_ops
.cpu_dirty_log_size
)
1295 return kvm_x86_ops
.cpu_dirty_log_size();
1300 bool kvm_mmu_slot_gfn_write_protect(struct kvm
*kvm
,
1301 struct kvm_memory_slot
*slot
, u64 gfn
)
1303 struct kvm_rmap_head
*rmap_head
;
1305 bool write_protected
= false;
1307 for (i
= PG_LEVEL_4K
; i
<= KVM_MAX_HUGEPAGE_LEVEL
; ++i
) {
1308 rmap_head
= __gfn_to_rmap(gfn
, i
, slot
);
1309 write_protected
|= __rmap_write_protect(kvm
, rmap_head
, true);
1312 if (kvm
->arch
.tdp_mmu_enabled
)
1314 kvm_tdp_mmu_write_protect_gfn(kvm
, slot
, gfn
);
1316 return write_protected
;
1319 static bool rmap_write_protect(struct kvm_vcpu
*vcpu
, u64 gfn
)
1321 struct kvm_memory_slot
*slot
;
1323 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
1324 return kvm_mmu_slot_gfn_write_protect(vcpu
->kvm
, slot
, gfn
);
1327 static bool kvm_zap_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
)
1330 struct rmap_iterator iter
;
1333 while ((sptep
= rmap_get_first(rmap_head
, &iter
))) {
1334 rmap_printk("%s: spte %p %llx.\n", __func__
, sptep
, *sptep
);
1336 pte_list_remove(rmap_head
, sptep
);
1343 static int kvm_unmap_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1344 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1347 return kvm_zap_rmapp(kvm
, rmap_head
);
1350 static int kvm_set_pte_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1351 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1355 struct rmap_iterator iter
;
1358 pte_t
*ptep
= (pte_t
*)data
;
1361 WARN_ON(pte_huge(*ptep
));
1362 new_pfn
= pte_pfn(*ptep
);
1365 for_each_rmap_spte(rmap_head
, &iter
, sptep
) {
1366 rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n",
1367 sptep
, *sptep
, gfn
, level
);
1371 if (pte_write(*ptep
)) {
1372 pte_list_remove(rmap_head
, sptep
);
1375 new_spte
= kvm_mmu_changed_pte_notifier_make_spte(
1378 mmu_spte_clear_track_bits(sptep
);
1379 mmu_spte_set(sptep
, new_spte
);
1383 if (need_flush
&& kvm_available_flush_tlb_with_range()) {
1384 kvm_flush_remote_tlbs_with_address(kvm
, gfn
, 1);
1391 struct slot_rmap_walk_iterator
{
1393 struct kvm_memory_slot
*slot
;
1399 /* output fields. */
1401 struct kvm_rmap_head
*rmap
;
1404 /* private field. */
1405 struct kvm_rmap_head
*end_rmap
;
1409 rmap_walk_init_level(struct slot_rmap_walk_iterator
*iterator
, int level
)
1411 iterator
->level
= level
;
1412 iterator
->gfn
= iterator
->start_gfn
;
1413 iterator
->rmap
= __gfn_to_rmap(iterator
->gfn
, level
, iterator
->slot
);
1414 iterator
->end_rmap
= __gfn_to_rmap(iterator
->end_gfn
, level
,
1419 slot_rmap_walk_init(struct slot_rmap_walk_iterator
*iterator
,
1420 struct kvm_memory_slot
*slot
, int start_level
,
1421 int end_level
, gfn_t start_gfn
, gfn_t end_gfn
)
1423 iterator
->slot
= slot
;
1424 iterator
->start_level
= start_level
;
1425 iterator
->end_level
= end_level
;
1426 iterator
->start_gfn
= start_gfn
;
1427 iterator
->end_gfn
= end_gfn
;
1429 rmap_walk_init_level(iterator
, iterator
->start_level
);
1432 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator
*iterator
)
1434 return !!iterator
->rmap
;
1437 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator
*iterator
)
1439 if (++iterator
->rmap
<= iterator
->end_rmap
) {
1440 iterator
->gfn
+= (1UL << KVM_HPAGE_GFN_SHIFT(iterator
->level
));
1444 if (++iterator
->level
> iterator
->end_level
) {
1445 iterator
->rmap
= NULL
;
1449 rmap_walk_init_level(iterator
, iterator
->level
);
1452 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1453 _start_gfn, _end_gfn, _iter_) \
1454 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1455 _end_level_, _start_gfn, _end_gfn); \
1456 slot_rmap_walk_okay(_iter_); \
1457 slot_rmap_walk_next(_iter_))
1459 static int kvm_handle_hva_range(struct kvm
*kvm
,
1460 unsigned long start
,
1463 int (*handler
)(struct kvm
*kvm
,
1464 struct kvm_rmap_head
*rmap_head
,
1465 struct kvm_memory_slot
*slot
,
1468 unsigned long data
))
1470 struct kvm_memslots
*slots
;
1471 struct kvm_memory_slot
*memslot
;
1472 struct slot_rmap_walk_iterator iterator
;
1476 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
1477 slots
= __kvm_memslots(kvm
, i
);
1478 kvm_for_each_memslot(memslot
, slots
) {
1479 unsigned long hva_start
, hva_end
;
1480 gfn_t gfn_start
, gfn_end
;
1482 hva_start
= max(start
, memslot
->userspace_addr
);
1483 hva_end
= min(end
, memslot
->userspace_addr
+
1484 (memslot
->npages
<< PAGE_SHIFT
));
1485 if (hva_start
>= hva_end
)
1488 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1489 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1491 gfn_start
= hva_to_gfn_memslot(hva_start
, memslot
);
1492 gfn_end
= hva_to_gfn_memslot(hva_end
+ PAGE_SIZE
- 1, memslot
);
1494 for_each_slot_rmap_range(memslot
, PG_LEVEL_4K
,
1495 KVM_MAX_HUGEPAGE_LEVEL
,
1496 gfn_start
, gfn_end
- 1,
1498 ret
|= handler(kvm
, iterator
.rmap
, memslot
,
1499 iterator
.gfn
, iterator
.level
, data
);
1506 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
1508 int (*handler
)(struct kvm
*kvm
,
1509 struct kvm_rmap_head
*rmap_head
,
1510 struct kvm_memory_slot
*slot
,
1511 gfn_t gfn
, int level
,
1512 unsigned long data
))
1514 return kvm_handle_hva_range(kvm
, hva
, hva
+ 1, data
, handler
);
1517 int kvm_unmap_hva_range(struct kvm
*kvm
, unsigned long start
, unsigned long end
,
1522 r
= kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_unmap_rmapp
);
1524 if (kvm
->arch
.tdp_mmu_enabled
)
1525 r
|= kvm_tdp_mmu_zap_hva_range(kvm
, start
, end
);
1530 int kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
1534 r
= kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
1536 if (kvm
->arch
.tdp_mmu_enabled
)
1537 r
|= kvm_tdp_mmu_set_spte_hva(kvm
, hva
, &pte
);
1542 static int kvm_age_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1543 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1547 struct rmap_iterator iter
;
1550 for_each_rmap_spte(rmap_head
, &iter
, sptep
)
1551 young
|= mmu_spte_age(sptep
);
1553 trace_kvm_age_page(gfn
, level
, slot
, young
);
1557 static int kvm_test_age_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1558 struct kvm_memory_slot
*slot
, gfn_t gfn
,
1559 int level
, unsigned long data
)
1562 struct rmap_iterator iter
;
1564 for_each_rmap_spte(rmap_head
, &iter
, sptep
)
1565 if (is_accessed_spte(*sptep
))
1570 #define RMAP_RECYCLE_THRESHOLD 1000
1572 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1574 struct kvm_rmap_head
*rmap_head
;
1575 struct kvm_mmu_page
*sp
;
1577 sp
= sptep_to_sp(spte
);
1579 rmap_head
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
);
1581 kvm_unmap_rmapp(vcpu
->kvm
, rmap_head
, NULL
, gfn
, sp
->role
.level
, 0);
1582 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, sp
->gfn
,
1583 KVM_PAGES_PER_HPAGE(sp
->role
.level
));
1586 int kvm_age_hva(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1590 young
= kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_age_rmapp
);
1591 if (kvm
->arch
.tdp_mmu_enabled
)
1592 young
|= kvm_tdp_mmu_age_hva_range(kvm
, start
, end
);
1597 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1601 young
= kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1602 if (kvm
->arch
.tdp_mmu_enabled
)
1603 young
|= kvm_tdp_mmu_test_age_hva(kvm
, hva
);
1609 static int is_empty_shadow_page(u64
*spt
)
1614 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1615 if (is_shadow_present_pte(*pos
)) {
1616 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1625 * This value is the sum of all of the kvm instances's
1626 * kvm->arch.n_used_mmu_pages values. We need a global,
1627 * aggregate version in order to make the slab shrinker
1630 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, unsigned long nr
)
1632 kvm
->arch
.n_used_mmu_pages
+= nr
;
1633 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1636 static void kvm_mmu_free_page(struct kvm_mmu_page
*sp
)
1638 MMU_WARN_ON(!is_empty_shadow_page(sp
->spt
));
1639 hlist_del(&sp
->hash_link
);
1640 list_del(&sp
->link
);
1641 free_page((unsigned long)sp
->spt
);
1642 if (!sp
->role
.direct
)
1643 free_page((unsigned long)sp
->gfns
);
1644 kmem_cache_free(mmu_page_header_cache
, sp
);
1647 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1649 return hash_64(gfn
, KVM_MMU_HASH_SHIFT
);
1652 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1653 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1658 pte_list_add(vcpu
, parent_pte
, &sp
->parent_ptes
);
1661 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1664 __pte_list_remove(parent_pte
, &sp
->parent_ptes
);
1667 static void drop_parent_pte(struct kvm_mmu_page
*sp
,
1670 mmu_page_remove_parent_pte(sp
, parent_pte
);
1671 mmu_spte_clear_no_track(parent_pte
);
1674 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
, int direct
)
1676 struct kvm_mmu_page
*sp
;
1678 sp
= kvm_mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
);
1679 sp
->spt
= kvm_mmu_memory_cache_alloc(&vcpu
->arch
.mmu_shadow_page_cache
);
1681 sp
->gfns
= kvm_mmu_memory_cache_alloc(&vcpu
->arch
.mmu_gfn_array_cache
);
1682 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1685 * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages()
1686 * depends on valid pages being added to the head of the list. See
1687 * comments in kvm_zap_obsolete_pages().
1689 sp
->mmu_valid_gen
= vcpu
->kvm
->arch
.mmu_valid_gen
;
1690 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1691 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1695 static void mark_unsync(u64
*spte
);
1696 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1699 struct rmap_iterator iter
;
1701 for_each_rmap_spte(&sp
->parent_ptes
, &iter
, sptep
) {
1706 static void mark_unsync(u64
*spte
)
1708 struct kvm_mmu_page
*sp
;
1711 sp
= sptep_to_sp(spte
);
1712 index
= spte
- sp
->spt
;
1713 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1715 if (sp
->unsync_children
++)
1717 kvm_mmu_mark_parents_unsync(sp
);
1720 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1721 struct kvm_mmu_page
*sp
)
1726 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1727 struct kvm_mmu_page
*sp
, u64
*spte
,
1733 #define KVM_PAGE_ARRAY_NR 16
1735 struct kvm_mmu_pages
{
1736 struct mmu_page_and_offset
{
1737 struct kvm_mmu_page
*sp
;
1739 } page
[KVM_PAGE_ARRAY_NR
];
1743 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1749 for (i
=0; i
< pvec
->nr
; i
++)
1750 if (pvec
->page
[i
].sp
== sp
)
1753 pvec
->page
[pvec
->nr
].sp
= sp
;
1754 pvec
->page
[pvec
->nr
].idx
= idx
;
1756 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1759 static inline void clear_unsync_child_bit(struct kvm_mmu_page
*sp
, int idx
)
1761 --sp
->unsync_children
;
1762 WARN_ON((int)sp
->unsync_children
< 0);
1763 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1766 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1767 struct kvm_mmu_pages
*pvec
)
1769 int i
, ret
, nr_unsync_leaf
= 0;
1771 for_each_set_bit(i
, sp
->unsync_child_bitmap
, 512) {
1772 struct kvm_mmu_page
*child
;
1773 u64 ent
= sp
->spt
[i
];
1775 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
)) {
1776 clear_unsync_child_bit(sp
, i
);
1780 child
= to_shadow_page(ent
& PT64_BASE_ADDR_MASK
);
1782 if (child
->unsync_children
) {
1783 if (mmu_pages_add(pvec
, child
, i
))
1786 ret
= __mmu_unsync_walk(child
, pvec
);
1788 clear_unsync_child_bit(sp
, i
);
1790 } else if (ret
> 0) {
1791 nr_unsync_leaf
+= ret
;
1794 } else if (child
->unsync
) {
1796 if (mmu_pages_add(pvec
, child
, i
))
1799 clear_unsync_child_bit(sp
, i
);
1802 return nr_unsync_leaf
;
1805 #define INVALID_INDEX (-1)
1807 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1808 struct kvm_mmu_pages
*pvec
)
1811 if (!sp
->unsync_children
)
1814 mmu_pages_add(pvec
, sp
, INVALID_INDEX
);
1815 return __mmu_unsync_walk(sp
, pvec
);
1818 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1820 WARN_ON(!sp
->unsync
);
1821 trace_kvm_mmu_sync_page(sp
);
1823 --kvm
->stat
.mmu_unsync
;
1826 static bool kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1827 struct list_head
*invalid_list
);
1828 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1829 struct list_head
*invalid_list
);
1831 #define for_each_valid_sp(_kvm, _sp, _list) \
1832 hlist_for_each_entry(_sp, _list, hash_link) \
1833 if (is_obsolete_sp((_kvm), (_sp))) { \
1836 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1837 for_each_valid_sp(_kvm, _sp, \
1838 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \
1839 if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else
1841 static inline bool is_ept_sp(struct kvm_mmu_page
*sp
)
1843 return sp
->role
.cr0_wp
&& sp
->role
.smap_andnot_wp
;
1846 /* @sp->gfn should be write-protected at the call site */
1847 static bool __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1848 struct list_head
*invalid_list
)
1850 if ((!is_ept_sp(sp
) && sp
->role
.gpte_is_8_bytes
!= !!is_pae(vcpu
)) ||
1851 vcpu
->arch
.mmu
->sync_page(vcpu
, sp
) == 0) {
1852 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1859 static bool kvm_mmu_remote_flush_or_zap(struct kvm
*kvm
,
1860 struct list_head
*invalid_list
,
1863 if (!remote_flush
&& list_empty(invalid_list
))
1866 if (!list_empty(invalid_list
))
1867 kvm_mmu_commit_zap_page(kvm
, invalid_list
);
1869 kvm_flush_remote_tlbs(kvm
);
1873 static void kvm_mmu_flush_or_zap(struct kvm_vcpu
*vcpu
,
1874 struct list_head
*invalid_list
,
1875 bool remote_flush
, bool local_flush
)
1877 if (kvm_mmu_remote_flush_or_zap(vcpu
->kvm
, invalid_list
, remote_flush
))
1881 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1884 #ifdef CONFIG_KVM_MMU_AUDIT
1885 #include "mmu_audit.c"
1887 static void kvm_mmu_audit(struct kvm_vcpu
*vcpu
, int point
) { }
1888 static void mmu_audit_disable(void) { }
1891 static bool is_obsolete_sp(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1893 return sp
->role
.invalid
||
1894 unlikely(sp
->mmu_valid_gen
!= kvm
->arch
.mmu_valid_gen
);
1897 static bool kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1898 struct list_head
*invalid_list
)
1900 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1901 return __kvm_sync_page(vcpu
, sp
, invalid_list
);
1904 /* @gfn should be write-protected at the call site */
1905 static bool kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
1906 struct list_head
*invalid_list
)
1908 struct kvm_mmu_page
*s
;
1911 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
1915 WARN_ON(s
->role
.level
!= PG_LEVEL_4K
);
1916 ret
|= kvm_sync_page(vcpu
, s
, invalid_list
);
1922 struct mmu_page_path
{
1923 struct kvm_mmu_page
*parent
[PT64_ROOT_MAX_LEVEL
];
1924 unsigned int idx
[PT64_ROOT_MAX_LEVEL
];
1927 #define for_each_sp(pvec, sp, parents, i) \
1928 for (i = mmu_pages_first(&pvec, &parents); \
1929 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1930 i = mmu_pages_next(&pvec, &parents, i))
1932 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1933 struct mmu_page_path
*parents
,
1938 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1939 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1940 unsigned idx
= pvec
->page
[n
].idx
;
1941 int level
= sp
->role
.level
;
1943 parents
->idx
[level
-1] = idx
;
1944 if (level
== PG_LEVEL_4K
)
1947 parents
->parent
[level
-2] = sp
;
1953 static int mmu_pages_first(struct kvm_mmu_pages
*pvec
,
1954 struct mmu_page_path
*parents
)
1956 struct kvm_mmu_page
*sp
;
1962 WARN_ON(pvec
->page
[0].idx
!= INVALID_INDEX
);
1964 sp
= pvec
->page
[0].sp
;
1965 level
= sp
->role
.level
;
1966 WARN_ON(level
== PG_LEVEL_4K
);
1968 parents
->parent
[level
-2] = sp
;
1970 /* Also set up a sentinel. Further entries in pvec are all
1971 * children of sp, so this element is never overwritten.
1973 parents
->parent
[level
-1] = NULL
;
1974 return mmu_pages_next(pvec
, parents
, 0);
1977 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1979 struct kvm_mmu_page
*sp
;
1980 unsigned int level
= 0;
1983 unsigned int idx
= parents
->idx
[level
];
1984 sp
= parents
->parent
[level
];
1988 WARN_ON(idx
== INVALID_INDEX
);
1989 clear_unsync_child_bit(sp
, idx
);
1991 } while (!sp
->unsync_children
);
1994 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1995 struct kvm_mmu_page
*parent
)
1998 struct kvm_mmu_page
*sp
;
1999 struct mmu_page_path parents
;
2000 struct kvm_mmu_pages pages
;
2001 LIST_HEAD(invalid_list
);
2004 while (mmu_unsync_walk(parent
, &pages
)) {
2005 bool protected = false;
2007 for_each_sp(pages
, sp
, parents
, i
)
2008 protected |= rmap_write_protect(vcpu
, sp
->gfn
);
2011 kvm_flush_remote_tlbs(vcpu
->kvm
);
2015 for_each_sp(pages
, sp
, parents
, i
) {
2016 flush
|= kvm_sync_page(vcpu
, sp
, &invalid_list
);
2017 mmu_pages_clear_parents(&parents
);
2019 if (need_resched() || spin_needbreak(&vcpu
->kvm
->mmu_lock
)) {
2020 kvm_mmu_flush_or_zap(vcpu
, &invalid_list
, false, flush
);
2021 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
2026 kvm_mmu_flush_or_zap(vcpu
, &invalid_list
, false, flush
);
2029 static void __clear_sp_write_flooding_count(struct kvm_mmu_page
*sp
)
2031 atomic_set(&sp
->write_flooding_count
, 0);
2034 static void clear_sp_write_flooding_count(u64
*spte
)
2036 __clear_sp_write_flooding_count(sptep_to_sp(spte
));
2039 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
2044 unsigned int access
)
2046 bool direct_mmu
= vcpu
->arch
.mmu
->direct_map
;
2047 union kvm_mmu_page_role role
;
2048 struct hlist_head
*sp_list
;
2050 struct kvm_mmu_page
*sp
;
2051 bool need_sync
= false;
2054 LIST_HEAD(invalid_list
);
2056 role
= vcpu
->arch
.mmu
->mmu_role
.base
;
2058 role
.direct
= direct
;
2060 role
.gpte_is_8_bytes
= true;
2061 role
.access
= access
;
2062 if (!direct_mmu
&& vcpu
->arch
.mmu
->root_level
<= PT32_ROOT_LEVEL
) {
2063 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
2064 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
2065 role
.quadrant
= quadrant
;
2068 sp_list
= &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)];
2069 for_each_valid_sp(vcpu
->kvm
, sp
, sp_list
) {
2070 if (sp
->gfn
!= gfn
) {
2075 if (!need_sync
&& sp
->unsync
)
2078 if (sp
->role
.word
!= role
.word
)
2082 goto trace_get_page
;
2085 /* The page is good, but __kvm_sync_page might still end
2086 * up zapping it. If so, break in order to rebuild it.
2088 if (!__kvm_sync_page(vcpu
, sp
, &invalid_list
))
2091 WARN_ON(!list_empty(&invalid_list
));
2092 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
2095 if (sp
->unsync_children
)
2096 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
2098 __clear_sp_write_flooding_count(sp
);
2101 trace_kvm_mmu_get_page(sp
, false);
2105 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
2107 sp
= kvm_mmu_alloc_page(vcpu
, direct
);
2111 hlist_add_head(&sp
->hash_link
, sp_list
);
2114 * we should do write protection before syncing pages
2115 * otherwise the content of the synced shadow page may
2116 * be inconsistent with guest page table.
2118 account_shadowed(vcpu
->kvm
, sp
);
2119 if (level
== PG_LEVEL_4K
&& rmap_write_protect(vcpu
, gfn
))
2120 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, gfn
, 1);
2122 if (level
> PG_LEVEL_4K
&& need_sync
)
2123 flush
|= kvm_sync_pages(vcpu
, gfn
, &invalid_list
);
2125 trace_kvm_mmu_get_page(sp
, true);
2127 kvm_mmu_flush_or_zap(vcpu
, &invalid_list
, false, flush
);
2129 if (collisions
> vcpu
->kvm
->stat
.max_mmu_page_hash_collisions
)
2130 vcpu
->kvm
->stat
.max_mmu_page_hash_collisions
= collisions
;
2134 static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator
*iterator
,
2135 struct kvm_vcpu
*vcpu
, hpa_t root
,
2138 iterator
->addr
= addr
;
2139 iterator
->shadow_addr
= root
;
2140 iterator
->level
= vcpu
->arch
.mmu
->shadow_root_level
;
2142 if (iterator
->level
== PT64_ROOT_4LEVEL
&&
2143 vcpu
->arch
.mmu
->root_level
< PT64_ROOT_4LEVEL
&&
2144 !vcpu
->arch
.mmu
->direct_map
)
2147 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
2149 * prev_root is currently only used for 64-bit hosts. So only
2150 * the active root_hpa is valid here.
2152 BUG_ON(root
!= vcpu
->arch
.mmu
->root_hpa
);
2154 iterator
->shadow_addr
2155 = vcpu
->arch
.mmu
->pae_root
[(addr
>> 30) & 3];
2156 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
2158 if (!iterator
->shadow_addr
)
2159 iterator
->level
= 0;
2163 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
2164 struct kvm_vcpu
*vcpu
, u64 addr
)
2166 shadow_walk_init_using_root(iterator
, vcpu
, vcpu
->arch
.mmu
->root_hpa
,
2170 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
2172 if (iterator
->level
< PG_LEVEL_4K
)
2175 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
2176 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
2180 static void __shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
,
2183 if (is_last_spte(spte
, iterator
->level
)) {
2184 iterator
->level
= 0;
2188 iterator
->shadow_addr
= spte
& PT64_BASE_ADDR_MASK
;
2192 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
2194 __shadow_walk_next(iterator
, *iterator
->sptep
);
2197 static void link_shadow_page(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2198 struct kvm_mmu_page
*sp
)
2202 BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK
!= PT_WRITABLE_MASK
);
2204 spte
= make_nonleaf_spte(sp
->spt
, sp_ad_disabled(sp
));
2206 mmu_spte_set(sptep
, spte
);
2208 mmu_page_add_parent_pte(vcpu
, sp
, sptep
);
2210 if (sp
->unsync_children
|| sp
->unsync
)
2214 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2215 unsigned direct_access
)
2217 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
2218 struct kvm_mmu_page
*child
;
2221 * For the direct sp, if the guest pte's dirty bit
2222 * changed form clean to dirty, it will corrupt the
2223 * sp's access: allow writable in the read-only sp,
2224 * so we should update the spte at this point to get
2225 * a new sp with the correct access.
2227 child
= to_shadow_page(*sptep
& PT64_BASE_ADDR_MASK
);
2228 if (child
->role
.access
== direct_access
)
2231 drop_parent_pte(child
, sptep
);
2232 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, child
->gfn
, 1);
2236 /* Returns the number of zapped non-leaf child shadow pages. */
2237 static int mmu_page_zap_pte(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2238 u64
*spte
, struct list_head
*invalid_list
)
2241 struct kvm_mmu_page
*child
;
2244 if (is_shadow_present_pte(pte
)) {
2245 if (is_last_spte(pte
, sp
->role
.level
)) {
2246 drop_spte(kvm
, spte
);
2247 if (is_large_pte(pte
))
2250 child
= to_shadow_page(pte
& PT64_BASE_ADDR_MASK
);
2251 drop_parent_pte(child
, spte
);
2254 * Recursively zap nested TDP SPs, parentless SPs are
2255 * unlikely to be used again in the near future. This
2256 * avoids retaining a large number of stale nested SPs.
2258 if (tdp_enabled
&& invalid_list
&&
2259 child
->role
.guest_mode
&& !child
->parent_ptes
.val
)
2260 return kvm_mmu_prepare_zap_page(kvm
, child
,
2263 } else if (is_mmio_spte(pte
)) {
2264 mmu_spte_clear_no_track(spte
);
2269 static int kvm_mmu_page_unlink_children(struct kvm
*kvm
,
2270 struct kvm_mmu_page
*sp
,
2271 struct list_head
*invalid_list
)
2276 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2277 zapped
+= mmu_page_zap_pte(kvm
, sp
, sp
->spt
+ i
, invalid_list
);
2282 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2285 struct rmap_iterator iter
;
2287 while ((sptep
= rmap_get_first(&sp
->parent_ptes
, &iter
)))
2288 drop_parent_pte(sp
, sptep
);
2291 static int mmu_zap_unsync_children(struct kvm
*kvm
,
2292 struct kvm_mmu_page
*parent
,
2293 struct list_head
*invalid_list
)
2296 struct mmu_page_path parents
;
2297 struct kvm_mmu_pages pages
;
2299 if (parent
->role
.level
== PG_LEVEL_4K
)
2302 while (mmu_unsync_walk(parent
, &pages
)) {
2303 struct kvm_mmu_page
*sp
;
2305 for_each_sp(pages
, sp
, parents
, i
) {
2306 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2307 mmu_pages_clear_parents(&parents
);
2315 static bool __kvm_mmu_prepare_zap_page(struct kvm
*kvm
,
2316 struct kvm_mmu_page
*sp
,
2317 struct list_head
*invalid_list
,
2322 trace_kvm_mmu_prepare_zap_page(sp
);
2323 ++kvm
->stat
.mmu_shadow_zapped
;
2324 *nr_zapped
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
2325 *nr_zapped
+= kvm_mmu_page_unlink_children(kvm
, sp
, invalid_list
);
2326 kvm_mmu_unlink_parents(kvm
, sp
);
2328 /* Zapping children means active_mmu_pages has become unstable. */
2329 list_unstable
= *nr_zapped
;
2331 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
2332 unaccount_shadowed(kvm
, sp
);
2335 kvm_unlink_unsync_page(kvm
, sp
);
2336 if (!sp
->root_count
) {
2341 * Already invalid pages (previously active roots) are not on
2342 * the active page list. See list_del() in the "else" case of
2345 if (sp
->role
.invalid
)
2346 list_add(&sp
->link
, invalid_list
);
2348 list_move(&sp
->link
, invalid_list
);
2349 kvm_mod_used_mmu_pages(kvm
, -1);
2352 * Remove the active root from the active page list, the root
2353 * will be explicitly freed when the root_count hits zero.
2355 list_del(&sp
->link
);
2358 * Obsolete pages cannot be used on any vCPUs, see the comment
2359 * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also
2360 * treats invalid shadow pages as being obsolete.
2362 if (!is_obsolete_sp(kvm
, sp
))
2363 kvm_reload_remote_mmus(kvm
);
2366 if (sp
->lpage_disallowed
)
2367 unaccount_huge_nx_page(kvm
, sp
);
2369 sp
->role
.invalid
= 1;
2370 return list_unstable
;
2373 static bool kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2374 struct list_head
*invalid_list
)
2378 __kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
, &nr_zapped
);
2382 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
2383 struct list_head
*invalid_list
)
2385 struct kvm_mmu_page
*sp
, *nsp
;
2387 if (list_empty(invalid_list
))
2391 * We need to make sure everyone sees our modifications to
2392 * the page tables and see changes to vcpu->mode here. The barrier
2393 * in the kvm_flush_remote_tlbs() achieves this. This pairs
2394 * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end.
2396 * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit
2397 * guest mode and/or lockless shadow page table walks.
2399 kvm_flush_remote_tlbs(kvm
);
2401 list_for_each_entry_safe(sp
, nsp
, invalid_list
, link
) {
2402 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
2403 kvm_mmu_free_page(sp
);
2407 static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm
*kvm
,
2408 unsigned long nr_to_zap
)
2410 unsigned long total_zapped
= 0;
2411 struct kvm_mmu_page
*sp
, *tmp
;
2412 LIST_HEAD(invalid_list
);
2416 if (list_empty(&kvm
->arch
.active_mmu_pages
))
2420 list_for_each_entry_safe(sp
, tmp
, &kvm
->arch
.active_mmu_pages
, link
) {
2422 * Don't zap active root pages, the page itself can't be freed
2423 * and zapping it will just force vCPUs to realloc and reload.
2428 unstable
= __kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
,
2430 total_zapped
+= nr_zapped
;
2431 if (total_zapped
>= nr_to_zap
)
2438 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2440 kvm
->stat
.mmu_recycled
+= total_zapped
;
2441 return total_zapped
;
2444 static inline unsigned long kvm_mmu_available_pages(struct kvm
*kvm
)
2446 if (kvm
->arch
.n_max_mmu_pages
> kvm
->arch
.n_used_mmu_pages
)
2447 return kvm
->arch
.n_max_mmu_pages
-
2448 kvm
->arch
.n_used_mmu_pages
;
2453 static int make_mmu_pages_available(struct kvm_vcpu
*vcpu
)
2455 unsigned long avail
= kvm_mmu_available_pages(vcpu
->kvm
);
2457 if (likely(avail
>= KVM_MIN_FREE_MMU_PAGES
))
2460 kvm_mmu_zap_oldest_mmu_pages(vcpu
->kvm
, KVM_REFILL_PAGES
- avail
);
2462 if (!kvm_mmu_available_pages(vcpu
->kvm
))
2468 * Changing the number of mmu pages allocated to the vm
2469 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2471 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned long goal_nr_mmu_pages
)
2473 spin_lock(&kvm
->mmu_lock
);
2475 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
2476 kvm_mmu_zap_oldest_mmu_pages(kvm
, kvm
->arch
.n_used_mmu_pages
-
2479 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
2482 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
2484 spin_unlock(&kvm
->mmu_lock
);
2487 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
2489 struct kvm_mmu_page
*sp
;
2490 LIST_HEAD(invalid_list
);
2493 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
2495 spin_lock(&kvm
->mmu_lock
);
2496 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
) {
2497 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
2500 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
2502 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2503 spin_unlock(&kvm
->mmu_lock
);
2507 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page
);
2509 static void kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
2511 trace_kvm_mmu_unsync_page(sp
);
2512 ++vcpu
->kvm
->stat
.mmu_unsync
;
2515 kvm_mmu_mark_parents_unsync(sp
);
2518 bool mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2521 struct kvm_mmu_page
*sp
;
2523 if (kvm_page_track_is_active(vcpu
, gfn
, KVM_PAGE_TRACK_WRITE
))
2526 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
2533 WARN_ON(sp
->role
.level
!= PG_LEVEL_4K
);
2534 kvm_unsync_page(vcpu
, sp
);
2538 * We need to ensure that the marking of unsync pages is visible
2539 * before the SPTE is updated to allow writes because
2540 * kvm_mmu_sync_roots() checks the unsync flags without holding
2541 * the MMU lock and so can race with this. If the SPTE was updated
2542 * before the page had been marked as unsync-ed, something like the
2543 * following could happen:
2546 * ---------------------------------------------------------------------
2547 * 1.2 Host updates SPTE
2549 * 2.1 Guest writes a GPTE for GVA X.
2550 * (GPTE being in the guest page table shadowed
2551 * by the SP from CPU 1.)
2552 * This reads SPTE during the page table walk.
2553 * Since SPTE.W is read as 1, there is no
2556 * 2.2 Guest issues TLB flush.
2557 * That causes a VM Exit.
2559 * 2.3 kvm_mmu_sync_pages() reads sp->unsync.
2560 * Since it is false, so it just returns.
2562 * 2.4 Guest accesses GVA X.
2563 * Since the mapping in the SP was not updated,
2564 * so the old mapping for GVA X incorrectly
2568 * (sp->unsync = true)
2570 * The write barrier below ensures that 1.1 happens before 1.2 and thus
2571 * the situation in 2.4 does not arise. The implicit barrier in 2.2
2572 * pairs with this write barrier.
2579 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2580 unsigned int pte_access
, int level
,
2581 gfn_t gfn
, kvm_pfn_t pfn
, bool speculative
,
2582 bool can_unsync
, bool host_writable
)
2585 struct kvm_mmu_page
*sp
;
2588 if (set_mmio_spte(vcpu
, sptep
, gfn
, pfn
, pte_access
))
2591 sp
= sptep_to_sp(sptep
);
2593 ret
= make_spte(vcpu
, pte_access
, level
, gfn
, pfn
, *sptep
, speculative
,
2594 can_unsync
, host_writable
, sp_ad_disabled(sp
), &spte
);
2596 if (spte
& PT_WRITABLE_MASK
)
2597 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
2600 ret
|= SET_SPTE_SPURIOUS
;
2601 else if (mmu_spte_update(sptep
, spte
))
2602 ret
|= SET_SPTE_NEED_REMOTE_TLB_FLUSH
;
2606 static int mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2607 unsigned int pte_access
, bool write_fault
, int level
,
2608 gfn_t gfn
, kvm_pfn_t pfn
, bool speculative
,
2611 int was_rmapped
= 0;
2614 int ret
= RET_PF_FIXED
;
2617 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__
,
2618 *sptep
, write_fault
, gfn
);
2620 if (is_shadow_present_pte(*sptep
)) {
2622 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2623 * the parent of the now unreachable PTE.
2625 if (level
> PG_LEVEL_4K
&& !is_large_pte(*sptep
)) {
2626 struct kvm_mmu_page
*child
;
2629 child
= to_shadow_page(pte
& PT64_BASE_ADDR_MASK
);
2630 drop_parent_pte(child
, sptep
);
2632 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2633 pgprintk("hfn old %llx new %llx\n",
2634 spte_to_pfn(*sptep
), pfn
);
2635 drop_spte(vcpu
->kvm
, sptep
);
2641 set_spte_ret
= set_spte(vcpu
, sptep
, pte_access
, level
, gfn
, pfn
,
2642 speculative
, true, host_writable
);
2643 if (set_spte_ret
& SET_SPTE_WRITE_PROTECTED_PT
) {
2645 ret
= RET_PF_EMULATE
;
2646 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
2649 if (set_spte_ret
& SET_SPTE_NEED_REMOTE_TLB_FLUSH
|| flush
)
2650 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, gfn
,
2651 KVM_PAGES_PER_HPAGE(level
));
2653 if (unlikely(is_mmio_spte(*sptep
)))
2654 ret
= RET_PF_EMULATE
;
2657 * The fault is fully spurious if and only if the new SPTE and old SPTE
2658 * are identical, and emulation is not required.
2660 if ((set_spte_ret
& SET_SPTE_SPURIOUS
) && ret
== RET_PF_FIXED
) {
2661 WARN_ON_ONCE(!was_rmapped
);
2662 return RET_PF_SPURIOUS
;
2665 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2666 trace_kvm_mmu_set_spte(level
, gfn
, sptep
);
2667 if (!was_rmapped
&& is_large_pte(*sptep
))
2668 ++vcpu
->kvm
->stat
.lpages
;
2670 if (is_shadow_present_pte(*sptep
)) {
2672 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2673 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2674 rmap_recycle(vcpu
, sptep
, gfn
);
2681 static kvm_pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2684 struct kvm_memory_slot
*slot
;
2686 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2688 return KVM_PFN_ERR_FAULT
;
2690 return gfn_to_pfn_memslot_atomic(slot
, gfn
);
2693 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2694 struct kvm_mmu_page
*sp
,
2695 u64
*start
, u64
*end
)
2697 struct page
*pages
[PTE_PREFETCH_NUM
];
2698 struct kvm_memory_slot
*slot
;
2699 unsigned int access
= sp
->role
.access
;
2703 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2704 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
);
2708 ret
= gfn_to_page_many_atomic(slot
, gfn
, pages
, end
- start
);
2712 for (i
= 0; i
< ret
; i
++, gfn
++, start
++) {
2713 mmu_set_spte(vcpu
, start
, access
, false, sp
->role
.level
, gfn
,
2714 page_to_pfn(pages
[i
]), true, true);
2721 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2722 struct kvm_mmu_page
*sp
, u64
*sptep
)
2724 u64
*spte
, *start
= NULL
;
2727 WARN_ON(!sp
->role
.direct
);
2729 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2732 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2733 if (is_shadow_present_pte(*spte
) || spte
== sptep
) {
2736 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2744 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2746 struct kvm_mmu_page
*sp
;
2748 sp
= sptep_to_sp(sptep
);
2751 * Without accessed bits, there's no way to distinguish between
2752 * actually accessed translations and prefetched, so disable pte
2753 * prefetch if accessed bits aren't available.
2755 if (sp_ad_disabled(sp
))
2758 if (sp
->role
.level
> PG_LEVEL_4K
)
2761 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2764 static int host_pfn_mapping_level(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2765 kvm_pfn_t pfn
, struct kvm_memory_slot
*slot
)
2771 if (!PageCompound(pfn_to_page(pfn
)) && !kvm_is_zone_device_pfn(pfn
))
2775 * Note, using the already-retrieved memslot and __gfn_to_hva_memslot()
2776 * is not solely for performance, it's also necessary to avoid the
2777 * "writable" check in __gfn_to_hva_many(), which will always fail on
2778 * read-only memslots due to gfn_to_hva() assuming writes. Earlier
2779 * page fault steps have already verified the guest isn't writing a
2780 * read-only memslot.
2782 hva
= __gfn_to_hva_memslot(slot
, gfn
);
2784 pte
= lookup_address_in_mm(vcpu
->kvm
->mm
, hva
, &level
);
2791 int kvm_mmu_hugepage_adjust(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2792 int max_level
, kvm_pfn_t
*pfnp
,
2793 bool huge_page_disallowed
, int *req_level
)
2795 struct kvm_memory_slot
*slot
;
2796 struct kvm_lpage_info
*linfo
;
2797 kvm_pfn_t pfn
= *pfnp
;
2801 *req_level
= PG_LEVEL_4K
;
2803 if (unlikely(max_level
== PG_LEVEL_4K
))
2806 if (is_error_noslot_pfn(pfn
) || kvm_is_reserved_pfn(pfn
))
2809 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, true);
2813 max_level
= min(max_level
, max_huge_page_level
);
2814 for ( ; max_level
> PG_LEVEL_4K
; max_level
--) {
2815 linfo
= lpage_info_slot(gfn
, slot
, max_level
);
2816 if (!linfo
->disallow_lpage
)
2820 if (max_level
== PG_LEVEL_4K
)
2823 level
= host_pfn_mapping_level(vcpu
, gfn
, pfn
, slot
);
2824 if (level
== PG_LEVEL_4K
)
2827 *req_level
= level
= min(level
, max_level
);
2830 * Enforce the iTLB multihit workaround after capturing the requested
2831 * level, which will be used to do precise, accurate accounting.
2833 if (huge_page_disallowed
)
2837 * mmu_notifier_retry() was successful and mmu_lock is held, so
2838 * the pmd can't be split from under us.
2840 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2841 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2842 *pfnp
= pfn
& ~mask
;
2847 void disallowed_hugepage_adjust(u64 spte
, gfn_t gfn
, int cur_level
,
2848 kvm_pfn_t
*pfnp
, int *goal_levelp
)
2850 int level
= *goal_levelp
;
2852 if (cur_level
== level
&& level
> PG_LEVEL_4K
&&
2853 is_shadow_present_pte(spte
) &&
2854 !is_large_pte(spte
)) {
2856 * A small SPTE exists for this pfn, but FNAME(fetch)
2857 * and __direct_map would like to create a large PTE
2858 * instead: just force them to go down another level,
2859 * patching back for them into pfn the next 9 bits of
2862 u64 page_mask
= KVM_PAGES_PER_HPAGE(level
) -
2863 KVM_PAGES_PER_HPAGE(level
- 1);
2864 *pfnp
|= gfn
& page_mask
;
2869 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 error_code
,
2870 int map_writable
, int max_level
, kvm_pfn_t pfn
,
2871 bool prefault
, bool is_tdp
)
2873 bool nx_huge_page_workaround_enabled
= is_nx_huge_page_enabled();
2874 bool write
= error_code
& PFERR_WRITE_MASK
;
2875 bool exec
= error_code
& PFERR_FETCH_MASK
;
2876 bool huge_page_disallowed
= exec
&& nx_huge_page_workaround_enabled
;
2877 struct kvm_shadow_walk_iterator it
;
2878 struct kvm_mmu_page
*sp
;
2879 int level
, req_level
, ret
;
2880 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
2881 gfn_t base_gfn
= gfn
;
2883 if (WARN_ON(!VALID_PAGE(vcpu
->arch
.mmu
->root_hpa
)))
2884 return RET_PF_RETRY
;
2886 level
= kvm_mmu_hugepage_adjust(vcpu
, gfn
, max_level
, &pfn
,
2887 huge_page_disallowed
, &req_level
);
2889 trace_kvm_mmu_spte_requested(gpa
, level
, pfn
);
2890 for_each_shadow_entry(vcpu
, gpa
, it
) {
2892 * We cannot overwrite existing page tables with an NX
2893 * large page, as the leaf could be executable.
2895 if (nx_huge_page_workaround_enabled
)
2896 disallowed_hugepage_adjust(*it
.sptep
, gfn
, it
.level
,
2899 base_gfn
= gfn
& ~(KVM_PAGES_PER_HPAGE(it
.level
) - 1);
2900 if (it
.level
== level
)
2903 drop_large_spte(vcpu
, it
.sptep
);
2904 if (!is_shadow_present_pte(*it
.sptep
)) {
2905 sp
= kvm_mmu_get_page(vcpu
, base_gfn
, it
.addr
,
2906 it
.level
- 1, true, ACC_ALL
);
2908 link_shadow_page(vcpu
, it
.sptep
, sp
);
2909 if (is_tdp
&& huge_page_disallowed
&&
2910 req_level
>= it
.level
)
2911 account_huge_nx_page(vcpu
->kvm
, sp
);
2915 ret
= mmu_set_spte(vcpu
, it
.sptep
, ACC_ALL
,
2916 write
, level
, base_gfn
, pfn
, prefault
,
2918 if (ret
== RET_PF_SPURIOUS
)
2921 direct_pte_prefetch(vcpu
, it
.sptep
);
2922 ++vcpu
->stat
.pf_fixed
;
2926 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2928 send_sig_mceerr(BUS_MCEERR_AR
, (void __user
*)address
, PAGE_SHIFT
, tsk
);
2931 static int kvm_handle_bad_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
, kvm_pfn_t pfn
)
2934 * Do not cache the mmio info caused by writing the readonly gfn
2935 * into the spte otherwise read access on readonly gfn also can
2936 * caused mmio page fault and treat it as mmio access.
2938 if (pfn
== KVM_PFN_ERR_RO_FAULT
)
2939 return RET_PF_EMULATE
;
2941 if (pfn
== KVM_PFN_ERR_HWPOISON
) {
2942 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu
, gfn
), current
);
2943 return RET_PF_RETRY
;
2949 static bool handle_abnormal_pfn(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
,
2950 kvm_pfn_t pfn
, unsigned int access
,
2953 /* The pfn is invalid, report the error! */
2954 if (unlikely(is_error_pfn(pfn
))) {
2955 *ret_val
= kvm_handle_bad_page(vcpu
, gfn
, pfn
);
2959 if (unlikely(is_noslot_pfn(pfn
)))
2960 vcpu_cache_mmio_info(vcpu
, gva
, gfn
,
2961 access
& shadow_mmio_access_mask
);
2966 static bool page_fault_can_be_fast(u32 error_code
)
2969 * Do not fix the mmio spte with invalid generation number which
2970 * need to be updated by slow page fault path.
2972 if (unlikely(error_code
& PFERR_RSVD_MASK
))
2975 /* See if the page fault is due to an NX violation */
2976 if (unlikely(((error_code
& (PFERR_FETCH_MASK
| PFERR_PRESENT_MASK
))
2977 == (PFERR_FETCH_MASK
| PFERR_PRESENT_MASK
))))
2981 * #PF can be fast if:
2982 * 1. The shadow page table entry is not present, which could mean that
2983 * the fault is potentially caused by access tracking (if enabled).
2984 * 2. The shadow page table entry is present and the fault
2985 * is caused by write-protect, that means we just need change the W
2986 * bit of the spte which can be done out of mmu-lock.
2988 * However, if access tracking is disabled we know that a non-present
2989 * page must be a genuine page fault where we have to create a new SPTE.
2990 * So, if access tracking is disabled, we return true only for write
2991 * accesses to a present page.
2994 return shadow_acc_track_mask
!= 0 ||
2995 ((error_code
& (PFERR_WRITE_MASK
| PFERR_PRESENT_MASK
))
2996 == (PFERR_WRITE_MASK
| PFERR_PRESENT_MASK
));
3000 * Returns true if the SPTE was fixed successfully. Otherwise,
3001 * someone else modified the SPTE from its original value.
3004 fast_pf_fix_direct_spte(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
3005 u64
*sptep
, u64 old_spte
, u64 new_spte
)
3009 WARN_ON(!sp
->role
.direct
);
3012 * Theoretically we could also set dirty bit (and flush TLB) here in
3013 * order to eliminate unnecessary PML logging. See comments in
3014 * set_spte. But fast_page_fault is very unlikely to happen with PML
3015 * enabled, so we do not do this. This might result in the same GPA
3016 * to be logged in PML buffer again when the write really happens, and
3017 * eventually to be called by mark_page_dirty twice. But it's also no
3018 * harm. This also avoids the TLB flush needed after setting dirty bit
3019 * so non-PML cases won't be impacted.
3021 * Compare with set_spte where instead shadow_dirty_mask is set.
3023 if (cmpxchg64(sptep
, old_spte
, new_spte
) != old_spte
)
3026 if (is_writable_pte(new_spte
) && !is_writable_pte(old_spte
)) {
3028 * The gfn of direct spte is stable since it is
3029 * calculated by sp->gfn.
3031 gfn
= kvm_mmu_page_get_gfn(sp
, sptep
- sp
->spt
);
3032 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
3038 static bool is_access_allowed(u32 fault_err_code
, u64 spte
)
3040 if (fault_err_code
& PFERR_FETCH_MASK
)
3041 return is_executable_pte(spte
);
3043 if (fault_err_code
& PFERR_WRITE_MASK
)
3044 return is_writable_pte(spte
);
3046 /* Fault was on Read access */
3047 return spte
& PT_PRESENT_MASK
;
3051 * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS.
3053 static int fast_page_fault(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
3056 struct kvm_shadow_walk_iterator iterator
;
3057 struct kvm_mmu_page
*sp
;
3058 int ret
= RET_PF_INVALID
;
3060 uint retry_count
= 0;
3062 if (!page_fault_can_be_fast(error_code
))
3065 walk_shadow_page_lockless_begin(vcpu
);
3070 for_each_shadow_entry_lockless(vcpu
, cr2_or_gpa
, iterator
, spte
)
3071 if (!is_shadow_present_pte(spte
))
3074 sp
= sptep_to_sp(iterator
.sptep
);
3075 if (!is_last_spte(spte
, sp
->role
.level
))
3079 * Check whether the memory access that caused the fault would
3080 * still cause it if it were to be performed right now. If not,
3081 * then this is a spurious fault caused by TLB lazily flushed,
3082 * or some other CPU has already fixed the PTE after the
3083 * current CPU took the fault.
3085 * Need not check the access of upper level table entries since
3086 * they are always ACC_ALL.
3088 if (is_access_allowed(error_code
, spte
)) {
3089 ret
= RET_PF_SPURIOUS
;
3095 if (is_access_track_spte(spte
))
3096 new_spte
= restore_acc_track_spte(new_spte
);
3099 * Currently, to simplify the code, write-protection can
3100 * be removed in the fast path only if the SPTE was
3101 * write-protected for dirty-logging or access tracking.
3103 if ((error_code
& PFERR_WRITE_MASK
) &&
3104 spte_can_locklessly_be_made_writable(spte
)) {
3105 new_spte
|= PT_WRITABLE_MASK
;
3108 * Do not fix write-permission on the large spte. Since
3109 * we only dirty the first page into the dirty-bitmap in
3110 * fast_pf_fix_direct_spte(), other pages are missed
3111 * if its slot has dirty logging enabled.
3113 * Instead, we let the slow page fault path create a
3114 * normal spte to fix the access.
3116 * See the comments in kvm_arch_commit_memory_region().
3118 if (sp
->role
.level
> PG_LEVEL_4K
)
3122 /* Verify that the fault can be handled in the fast path */
3123 if (new_spte
== spte
||
3124 !is_access_allowed(error_code
, new_spte
))
3128 * Currently, fast page fault only works for direct mapping
3129 * since the gfn is not stable for indirect shadow page. See
3130 * Documentation/virt/kvm/locking.rst to get more detail.
3132 if (fast_pf_fix_direct_spte(vcpu
, sp
, iterator
.sptep
, spte
,
3138 if (++retry_count
> 4) {
3139 printk_once(KERN_WARNING
3140 "kvm: Fast #PF retrying more than 4 times.\n");
3146 trace_fast_page_fault(vcpu
, cr2_or_gpa
, error_code
, iterator
.sptep
,
3148 walk_shadow_page_lockless_end(vcpu
);
3153 static void mmu_free_root_page(struct kvm
*kvm
, hpa_t
*root_hpa
,
3154 struct list_head
*invalid_list
)
3156 struct kvm_mmu_page
*sp
;
3158 if (!VALID_PAGE(*root_hpa
))
3161 sp
= to_shadow_page(*root_hpa
& PT64_BASE_ADDR_MASK
);
3163 if (kvm_mmu_put_root(kvm
, sp
)) {
3164 if (sp
->tdp_mmu_page
)
3165 kvm_tdp_mmu_free_root(kvm
, sp
);
3166 else if (sp
->role
.invalid
)
3167 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
3170 *root_hpa
= INVALID_PAGE
;
3173 /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */
3174 void kvm_mmu_free_roots(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
3175 ulong roots_to_free
)
3177 struct kvm
*kvm
= vcpu
->kvm
;
3179 LIST_HEAD(invalid_list
);
3180 bool free_active_root
= roots_to_free
& KVM_MMU_ROOT_CURRENT
;
3182 BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS
>= BITS_PER_LONG
);
3184 /* Before acquiring the MMU lock, see if we need to do any real work. */
3185 if (!(free_active_root
&& VALID_PAGE(mmu
->root_hpa
))) {
3186 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
3187 if ((roots_to_free
& KVM_MMU_ROOT_PREVIOUS(i
)) &&
3188 VALID_PAGE(mmu
->prev_roots
[i
].hpa
))
3191 if (i
== KVM_MMU_NUM_PREV_ROOTS
)
3195 spin_lock(&kvm
->mmu_lock
);
3197 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
3198 if (roots_to_free
& KVM_MMU_ROOT_PREVIOUS(i
))
3199 mmu_free_root_page(kvm
, &mmu
->prev_roots
[i
].hpa
,
3202 if (free_active_root
) {
3203 if (mmu
->shadow_root_level
>= PT64_ROOT_4LEVEL
&&
3204 (mmu
->root_level
>= PT64_ROOT_4LEVEL
|| mmu
->direct_map
)) {
3205 mmu_free_root_page(kvm
, &mmu
->root_hpa
, &invalid_list
);
3207 for (i
= 0; i
< 4; ++i
)
3208 if (mmu
->pae_root
[i
] != 0)
3209 mmu_free_root_page(kvm
,
3212 mmu
->root_hpa
= INVALID_PAGE
;
3217 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3218 spin_unlock(&kvm
->mmu_lock
);
3220 EXPORT_SYMBOL_GPL(kvm_mmu_free_roots
);
3222 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
3226 if (!kvm_vcpu_is_visible_gfn(vcpu
, root_gfn
)) {
3227 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3234 static hpa_t
mmu_alloc_root(struct kvm_vcpu
*vcpu
, gfn_t gfn
, gva_t gva
,
3235 u8 level
, bool direct
)
3237 struct kvm_mmu_page
*sp
;
3239 spin_lock(&vcpu
->kvm
->mmu_lock
);
3241 if (make_mmu_pages_available(vcpu
)) {
3242 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3243 return INVALID_PAGE
;
3245 sp
= kvm_mmu_get_page(vcpu
, gfn
, gva
, level
, direct
, ACC_ALL
);
3248 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3249 return __pa(sp
->spt
);
3252 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
3254 u8 shadow_root_level
= vcpu
->arch
.mmu
->shadow_root_level
;
3258 if (vcpu
->kvm
->arch
.tdp_mmu_enabled
) {
3259 root
= kvm_tdp_mmu_get_vcpu_root_hpa(vcpu
);
3261 if (!VALID_PAGE(root
))
3263 vcpu
->arch
.mmu
->root_hpa
= root
;
3264 } else if (shadow_root_level
>= PT64_ROOT_4LEVEL
) {
3265 root
= mmu_alloc_root(vcpu
, 0, 0, shadow_root_level
,
3268 if (!VALID_PAGE(root
))
3270 vcpu
->arch
.mmu
->root_hpa
= root
;
3271 } else if (shadow_root_level
== PT32E_ROOT_LEVEL
) {
3272 for (i
= 0; i
< 4; ++i
) {
3273 MMU_WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
->pae_root
[i
]));
3275 root
= mmu_alloc_root(vcpu
, i
<< (30 - PAGE_SHIFT
),
3276 i
<< 30, PT32_ROOT_LEVEL
, true);
3277 if (!VALID_PAGE(root
))
3279 vcpu
->arch
.mmu
->pae_root
[i
] = root
| PT_PRESENT_MASK
;
3281 vcpu
->arch
.mmu
->root_hpa
= __pa(vcpu
->arch
.mmu
->pae_root
);
3285 /* root_pgd is ignored for direct MMUs. */
3286 vcpu
->arch
.mmu
->root_pgd
= 0;
3291 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
3294 gfn_t root_gfn
, root_pgd
;
3298 root_pgd
= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
);
3299 root_gfn
= root_pgd
>> PAGE_SHIFT
;
3301 if (mmu_check_root(vcpu
, root_gfn
))
3305 * Do we shadow a long mode page table? If so we need to
3306 * write-protect the guests page table root.
3308 if (vcpu
->arch
.mmu
->root_level
>= PT64_ROOT_4LEVEL
) {
3309 MMU_WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
->root_hpa
));
3311 root
= mmu_alloc_root(vcpu
, root_gfn
, 0,
3312 vcpu
->arch
.mmu
->shadow_root_level
, false);
3313 if (!VALID_PAGE(root
))
3315 vcpu
->arch
.mmu
->root_hpa
= root
;
3320 * We shadow a 32 bit page table. This may be a legacy 2-level
3321 * or a PAE 3-level page table. In either case we need to be aware that
3322 * the shadow page table may be a PAE or a long mode page table.
3324 pm_mask
= PT_PRESENT_MASK
;
3325 if (vcpu
->arch
.mmu
->shadow_root_level
== PT64_ROOT_4LEVEL
)
3326 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
3328 for (i
= 0; i
< 4; ++i
) {
3329 MMU_WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
->pae_root
[i
]));
3330 if (vcpu
->arch
.mmu
->root_level
== PT32E_ROOT_LEVEL
) {
3331 pdptr
= vcpu
->arch
.mmu
->get_pdptr(vcpu
, i
);
3332 if (!(pdptr
& PT_PRESENT_MASK
)) {
3333 vcpu
->arch
.mmu
->pae_root
[i
] = 0;
3336 root_gfn
= pdptr
>> PAGE_SHIFT
;
3337 if (mmu_check_root(vcpu
, root_gfn
))
3341 root
= mmu_alloc_root(vcpu
, root_gfn
, i
<< 30,
3342 PT32_ROOT_LEVEL
, false);
3343 if (!VALID_PAGE(root
))
3345 vcpu
->arch
.mmu
->pae_root
[i
] = root
| pm_mask
;
3347 vcpu
->arch
.mmu
->root_hpa
= __pa(vcpu
->arch
.mmu
->pae_root
);
3350 * If we shadow a 32 bit page table with a long mode page
3351 * table we enter this path.
3353 if (vcpu
->arch
.mmu
->shadow_root_level
== PT64_ROOT_4LEVEL
) {
3354 if (vcpu
->arch
.mmu
->lm_root
== NULL
) {
3356 * The additional page necessary for this is only
3357 * allocated on demand.
3362 lm_root
= (void*)get_zeroed_page(GFP_KERNEL_ACCOUNT
);
3363 if (lm_root
== NULL
)
3366 lm_root
[0] = __pa(vcpu
->arch
.mmu
->pae_root
) | pm_mask
;
3368 vcpu
->arch
.mmu
->lm_root
= lm_root
;
3371 vcpu
->arch
.mmu
->root_hpa
= __pa(vcpu
->arch
.mmu
->lm_root
);
3375 vcpu
->arch
.mmu
->root_pgd
= root_pgd
;
3380 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
3382 if (vcpu
->arch
.mmu
->direct_map
)
3383 return mmu_alloc_direct_roots(vcpu
);
3385 return mmu_alloc_shadow_roots(vcpu
);
3388 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3391 struct kvm_mmu_page
*sp
;
3393 if (vcpu
->arch
.mmu
->direct_map
)
3396 if (!VALID_PAGE(vcpu
->arch
.mmu
->root_hpa
))
3399 vcpu_clear_mmio_info(vcpu
, MMIO_GVA_ANY
);
3401 if (vcpu
->arch
.mmu
->root_level
>= PT64_ROOT_4LEVEL
) {
3402 hpa_t root
= vcpu
->arch
.mmu
->root_hpa
;
3403 sp
= to_shadow_page(root
);
3406 * Even if another CPU was marking the SP as unsync-ed
3407 * simultaneously, any guest page table changes are not
3408 * guaranteed to be visible anyway until this VCPU issues a TLB
3409 * flush strictly after those changes are made. We only need to
3410 * ensure that the other CPU sets these flags before any actual
3411 * changes to the page tables are made. The comments in
3412 * mmu_need_write_protect() describe what could go wrong if this
3413 * requirement isn't satisfied.
3415 if (!smp_load_acquire(&sp
->unsync
) &&
3416 !smp_load_acquire(&sp
->unsync_children
))
3419 spin_lock(&vcpu
->kvm
->mmu_lock
);
3420 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3422 mmu_sync_children(vcpu
, sp
);
3424 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3425 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3429 spin_lock(&vcpu
->kvm
->mmu_lock
);
3430 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3432 for (i
= 0; i
< 4; ++i
) {
3433 hpa_t root
= vcpu
->arch
.mmu
->pae_root
[i
];
3435 if (root
&& VALID_PAGE(root
)) {
3436 root
&= PT64_BASE_ADDR_MASK
;
3437 sp
= to_shadow_page(root
);
3438 mmu_sync_children(vcpu
, sp
);
3442 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3443 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3445 EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots
);
3447 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gpa_t vaddr
,
3448 u32 access
, struct x86_exception
*exception
)
3451 exception
->error_code
= 0;
3455 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gpa_t vaddr
,
3457 struct x86_exception
*exception
)
3460 exception
->error_code
= 0;
3461 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
, exception
);
3465 __is_rsvd_bits_set(struct rsvd_bits_validate
*rsvd_check
, u64 pte
, int level
)
3467 int bit7
= (pte
>> 7) & 1;
3469 return pte
& rsvd_check
->rsvd_bits_mask
[bit7
][level
-1];
3472 static bool __is_bad_mt_xwr(struct rsvd_bits_validate
*rsvd_check
, u64 pte
)
3474 return rsvd_check
->bad_mt_xwr
& BIT_ULL(pte
& 0x3f);
3477 static bool mmio_info_in_cache(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3480 * A nested guest cannot use the MMIO cache if it is using nested
3481 * page tables, because cr2 is a nGPA while the cache stores GPAs.
3483 if (mmu_is_nested(vcpu
))
3487 return vcpu_match_mmio_gpa(vcpu
, addr
);
3489 return vcpu_match_mmio_gva(vcpu
, addr
);
3493 * Return the level of the lowest level SPTE added to sptes.
3494 * That SPTE may be non-present.
3496 static int get_walk(struct kvm_vcpu
*vcpu
, u64 addr
, u64
*sptes
)
3498 struct kvm_shadow_walk_iterator iterator
;
3499 int leaf
= vcpu
->arch
.mmu
->root_level
;
3503 walk_shadow_page_lockless_begin(vcpu
);
3505 for (shadow_walk_init(&iterator
, vcpu
, addr
);
3506 shadow_walk_okay(&iterator
);
3507 __shadow_walk_next(&iterator
, spte
)) {
3508 leaf
= iterator
.level
;
3509 spte
= mmu_spte_get_lockless(iterator
.sptep
);
3511 sptes
[leaf
- 1] = spte
;
3513 if (!is_shadow_present_pte(spte
))
3518 walk_shadow_page_lockless_end(vcpu
);
3523 /* return true if reserved bit is detected on spte. */
3524 static bool get_mmio_spte(struct kvm_vcpu
*vcpu
, u64 addr
, u64
*sptep
)
3526 u64 sptes
[PT64_ROOT_MAX_LEVEL
];
3527 struct rsvd_bits_validate
*rsvd_check
;
3528 int root
= vcpu
->arch
.mmu
->shadow_root_level
;
3531 bool reserved
= false;
3533 if (!VALID_PAGE(vcpu
->arch
.mmu
->root_hpa
)) {
3538 if (is_tdp_mmu_root(vcpu
->kvm
, vcpu
->arch
.mmu
->root_hpa
))
3539 leaf
= kvm_tdp_mmu_get_walk(vcpu
, addr
, sptes
);
3541 leaf
= get_walk(vcpu
, addr
, sptes
);
3543 rsvd_check
= &vcpu
->arch
.mmu
->shadow_zero_check
;
3545 for (level
= root
; level
>= leaf
; level
--) {
3546 if (!is_shadow_present_pte(sptes
[level
- 1]))
3549 * Use a bitwise-OR instead of a logical-OR to aggregate the
3550 * reserved bit and EPT's invalid memtype/XWR checks to avoid
3551 * adding a Jcc in the loop.
3553 reserved
|= __is_bad_mt_xwr(rsvd_check
, sptes
[level
- 1]) |
3554 __is_rsvd_bits_set(rsvd_check
, sptes
[level
- 1],
3559 pr_err("%s: detect reserved bits on spte, addr 0x%llx, dump hierarchy:\n",
3561 for (level
= root
; level
>= leaf
; level
--)
3562 pr_err("------ spte 0x%llx level %d.\n",
3563 sptes
[level
- 1], level
);
3566 *sptep
= sptes
[leaf
- 1];
3571 static int handle_mmio_page_fault(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3576 if (mmio_info_in_cache(vcpu
, addr
, direct
))
3577 return RET_PF_EMULATE
;
3579 reserved
= get_mmio_spte(vcpu
, addr
, &spte
);
3580 if (WARN_ON(reserved
))
3583 if (is_mmio_spte(spte
)) {
3584 gfn_t gfn
= get_mmio_spte_gfn(spte
);
3585 unsigned int access
= get_mmio_spte_access(spte
);
3587 if (!check_mmio_spte(vcpu
, spte
))
3588 return RET_PF_INVALID
;
3593 trace_handle_mmio_page_fault(addr
, gfn
, access
);
3594 vcpu_cache_mmio_info(vcpu
, addr
, gfn
, access
);
3595 return RET_PF_EMULATE
;
3599 * If the page table is zapped by other cpus, let CPU fault again on
3602 return RET_PF_RETRY
;
3605 static bool page_fault_handle_page_track(struct kvm_vcpu
*vcpu
,
3606 u32 error_code
, gfn_t gfn
)
3608 if (unlikely(error_code
& PFERR_RSVD_MASK
))
3611 if (!(error_code
& PFERR_PRESENT_MASK
) ||
3612 !(error_code
& PFERR_WRITE_MASK
))
3616 * guest is writing the page which is write tracked which can
3617 * not be fixed by page fault handler.
3619 if (kvm_page_track_is_active(vcpu
, gfn
, KVM_PAGE_TRACK_WRITE
))
3625 static void shadow_page_table_clear_flood(struct kvm_vcpu
*vcpu
, gva_t addr
)
3627 struct kvm_shadow_walk_iterator iterator
;
3630 walk_shadow_page_lockless_begin(vcpu
);
3631 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
) {
3632 clear_sp_write_flooding_count(iterator
.sptep
);
3633 if (!is_shadow_present_pte(spte
))
3636 walk_shadow_page_lockless_end(vcpu
);
3639 static bool kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
3642 struct kvm_arch_async_pf arch
;
3644 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
3646 arch
.direct_map
= vcpu
->arch
.mmu
->direct_map
;
3647 arch
.cr3
= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
);
3649 return kvm_setup_async_pf(vcpu
, cr2_or_gpa
,
3650 kvm_vcpu_gfn_to_hva(vcpu
, gfn
), &arch
);
3653 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3654 gpa_t cr2_or_gpa
, kvm_pfn_t
*pfn
, bool write
,
3657 struct kvm_memory_slot
*slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
3660 /* Don't expose private memslots to L2. */
3661 if (is_guest_mode(vcpu
) && !kvm_is_visible_memslot(slot
)) {
3662 *pfn
= KVM_PFN_NOSLOT
;
3668 *pfn
= __gfn_to_pfn_memslot(slot
, gfn
, false, &async
, write
, writable
);
3670 return false; /* *pfn has correct page already */
3672 if (!prefault
&& kvm_can_do_async_pf(vcpu
)) {
3673 trace_kvm_try_async_get_page(cr2_or_gpa
, gfn
);
3674 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
3675 trace_kvm_async_pf_doublefault(cr2_or_gpa
, gfn
);
3676 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
3678 } else if (kvm_arch_setup_async_pf(vcpu
, cr2_or_gpa
, gfn
))
3682 *pfn
= __gfn_to_pfn_memslot(slot
, gfn
, false, NULL
, write
, writable
);
3686 static int direct_page_fault(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 error_code
,
3687 bool prefault
, int max_level
, bool is_tdp
)
3689 bool write
= error_code
& PFERR_WRITE_MASK
;
3692 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3693 unsigned long mmu_seq
;
3697 if (page_fault_handle_page_track(vcpu
, error_code
, gfn
))
3698 return RET_PF_EMULATE
;
3700 if (!is_tdp_mmu_root(vcpu
->kvm
, vcpu
->arch
.mmu
->root_hpa
)) {
3701 r
= fast_page_fault(vcpu
, gpa
, error_code
);
3702 if (r
!= RET_PF_INVALID
)
3706 r
= mmu_topup_memory_caches(vcpu
, false);
3710 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3713 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
3714 return RET_PF_RETRY
;
3716 if (handle_abnormal_pfn(vcpu
, is_tdp
? 0 : gpa
, gfn
, pfn
, ACC_ALL
, &r
))
3720 spin_lock(&vcpu
->kvm
->mmu_lock
);
3721 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3723 r
= make_mmu_pages_available(vcpu
);
3727 if (is_tdp_mmu_root(vcpu
->kvm
, vcpu
->arch
.mmu
->root_hpa
))
3728 r
= kvm_tdp_mmu_map(vcpu
, gpa
, error_code
, map_writable
, max_level
,
3731 r
= __direct_map(vcpu
, gpa
, error_code
, map_writable
, max_level
, pfn
,
3735 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3736 kvm_release_pfn_clean(pfn
);
3740 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3741 u32 error_code
, bool prefault
)
3743 pgprintk("%s: gva %lx error %x\n", __func__
, gpa
, error_code
);
3745 /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */
3746 return direct_page_fault(vcpu
, gpa
& PAGE_MASK
, error_code
, prefault
,
3747 PG_LEVEL_2M
, false);
3750 int kvm_handle_page_fault(struct kvm_vcpu
*vcpu
, u64 error_code
,
3751 u64 fault_address
, char *insn
, int insn_len
)
3754 u32 flags
= vcpu
->arch
.apf
.host_apf_flags
;
3756 #ifndef CONFIG_X86_64
3757 /* A 64-bit CR2 should be impossible on 32-bit KVM. */
3758 if (WARN_ON_ONCE(fault_address
>> 32))
3762 vcpu
->arch
.l1tf_flush_l1d
= true;
3764 trace_kvm_page_fault(fault_address
, error_code
);
3766 if (kvm_event_needs_reinjection(vcpu
))
3767 kvm_mmu_unprotect_page_virt(vcpu
, fault_address
);
3768 r
= kvm_mmu_page_fault(vcpu
, fault_address
, error_code
, insn
,
3770 } else if (flags
& KVM_PV_REASON_PAGE_NOT_PRESENT
) {
3771 vcpu
->arch
.apf
.host_apf_flags
= 0;
3772 local_irq_disable();
3773 kvm_async_pf_task_wait_schedule(fault_address
);
3776 WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags
);
3781 EXPORT_SYMBOL_GPL(kvm_handle_page_fault
);
3783 int kvm_tdp_page_fault(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 error_code
,
3788 for (max_level
= KVM_MAX_HUGEPAGE_LEVEL
;
3789 max_level
> PG_LEVEL_4K
;
3791 int page_num
= KVM_PAGES_PER_HPAGE(max_level
);
3792 gfn_t base
= (gpa
>> PAGE_SHIFT
) & ~(page_num
- 1);
3794 if (kvm_mtrr_check_gfn_range_consistency(vcpu
, base
, page_num
))
3798 return direct_page_fault(vcpu
, gpa
, error_code
, prefault
,
3802 static void nonpaging_init_context(struct kvm_vcpu
*vcpu
,
3803 struct kvm_mmu
*context
)
3805 context
->page_fault
= nonpaging_page_fault
;
3806 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3807 context
->sync_page
= nonpaging_sync_page
;
3808 context
->invlpg
= NULL
;
3809 context
->update_pte
= nonpaging_update_pte
;
3810 context
->root_level
= 0;
3811 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3812 context
->direct_map
= true;
3813 context
->nx
= false;
3816 static inline bool is_root_usable(struct kvm_mmu_root_info
*root
, gpa_t pgd
,
3817 union kvm_mmu_page_role role
)
3819 return (role
.direct
|| pgd
== root
->pgd
) &&
3820 VALID_PAGE(root
->hpa
) && to_shadow_page(root
->hpa
) &&
3821 role
.word
== to_shadow_page(root
->hpa
)->role
.word
;
3825 * Find out if a previously cached root matching the new pgd/role is available.
3826 * The current root is also inserted into the cache.
3827 * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is
3829 * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and
3830 * false is returned. This root should now be freed by the caller.
3832 static bool cached_root_available(struct kvm_vcpu
*vcpu
, gpa_t new_pgd
,
3833 union kvm_mmu_page_role new_role
)
3836 struct kvm_mmu_root_info root
;
3837 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
3839 root
.pgd
= mmu
->root_pgd
;
3840 root
.hpa
= mmu
->root_hpa
;
3842 if (is_root_usable(&root
, new_pgd
, new_role
))
3845 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++) {
3846 swap(root
, mmu
->prev_roots
[i
]);
3848 if (is_root_usable(&root
, new_pgd
, new_role
))
3852 mmu
->root_hpa
= root
.hpa
;
3853 mmu
->root_pgd
= root
.pgd
;
3855 return i
< KVM_MMU_NUM_PREV_ROOTS
;
3858 static bool fast_pgd_switch(struct kvm_vcpu
*vcpu
, gpa_t new_pgd
,
3859 union kvm_mmu_page_role new_role
)
3861 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
3864 * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid
3865 * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs
3866 * later if necessary.
3868 if (mmu
->shadow_root_level
>= PT64_ROOT_4LEVEL
&&
3869 mmu
->root_level
>= PT64_ROOT_4LEVEL
)
3870 return cached_root_available(vcpu
, new_pgd
, new_role
);
3875 static void __kvm_mmu_new_pgd(struct kvm_vcpu
*vcpu
, gpa_t new_pgd
,
3876 union kvm_mmu_page_role new_role
,
3877 bool skip_tlb_flush
, bool skip_mmu_sync
)
3879 if (!fast_pgd_switch(vcpu
, new_pgd
, new_role
)) {
3880 kvm_mmu_free_roots(vcpu
, vcpu
->arch
.mmu
, KVM_MMU_ROOT_CURRENT
);
3885 * It's possible that the cached previous root page is obsolete because
3886 * of a change in the MMU generation number. However, changing the
3887 * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will
3888 * free the root set here and allocate a new one.
3890 kvm_make_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
);
3892 if (!skip_mmu_sync
|| force_flush_and_sync_on_reuse
)
3893 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
3894 if (!skip_tlb_flush
|| force_flush_and_sync_on_reuse
)
3895 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
3898 * The last MMIO access's GVA and GPA are cached in the VCPU. When
3899 * switching to a new CR3, that GVA->GPA mapping may no longer be
3900 * valid. So clear any cached MMIO info even when we don't need to sync
3901 * the shadow page tables.
3903 vcpu_clear_mmio_info(vcpu
, MMIO_GVA_ANY
);
3906 * If this is a direct root page, it doesn't have a write flooding
3907 * count. Otherwise, clear the write flooding count.
3909 if (!new_role
.direct
)
3910 __clear_sp_write_flooding_count(
3911 to_shadow_page(vcpu
->arch
.mmu
->root_hpa
));
3914 void kvm_mmu_new_pgd(struct kvm_vcpu
*vcpu
, gpa_t new_pgd
, bool skip_tlb_flush
,
3917 __kvm_mmu_new_pgd(vcpu
, new_pgd
, kvm_mmu_calc_root_page_role(vcpu
),
3918 skip_tlb_flush
, skip_mmu_sync
);
3920 EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd
);
3922 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
3924 return kvm_read_cr3(vcpu
);
3927 static bool sync_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, gfn_t gfn
,
3928 unsigned int access
, int *nr_present
)
3930 if (unlikely(is_mmio_spte(*sptep
))) {
3931 if (gfn
!= get_mmio_spte_gfn(*sptep
)) {
3932 mmu_spte_clear_no_track(sptep
);
3937 mark_mmio_spte(vcpu
, sptep
, gfn
, access
);
3944 static inline bool is_last_gpte(struct kvm_mmu
*mmu
,
3945 unsigned level
, unsigned gpte
)
3948 * The RHS has bit 7 set iff level < mmu->last_nonleaf_level.
3949 * If it is clear, there are no large pages at this level, so clear
3950 * PT_PAGE_SIZE_MASK in gpte if that is the case.
3952 gpte
&= level
- mmu
->last_nonleaf_level
;
3955 * PG_LEVEL_4K always terminates. The RHS has bit 7 set
3956 * iff level <= PG_LEVEL_4K, which for our purpose means
3957 * level == PG_LEVEL_4K; set PT_PAGE_SIZE_MASK in gpte then.
3959 gpte
|= level
- PG_LEVEL_4K
- 1;
3961 return gpte
& PT_PAGE_SIZE_MASK
;
3964 #define PTTYPE_EPT 18 /* arbitrary */
3965 #define PTTYPE PTTYPE_EPT
3966 #include "paging_tmpl.h"
3970 #include "paging_tmpl.h"
3974 #include "paging_tmpl.h"
3978 __reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
3979 struct rsvd_bits_validate
*rsvd_check
,
3980 int maxphyaddr
, int level
, bool nx
, bool gbpages
,
3983 u64 exb_bit_rsvd
= 0;
3984 u64 gbpages_bit_rsvd
= 0;
3985 u64 nonleaf_bit8_rsvd
= 0;
3987 rsvd_check
->bad_mt_xwr
= 0;
3990 exb_bit_rsvd
= rsvd_bits(63, 63);
3992 gbpages_bit_rsvd
= rsvd_bits(7, 7);
3995 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
3996 * leaf entries) on AMD CPUs only.
3999 nonleaf_bit8_rsvd
= rsvd_bits(8, 8);
4002 case PT32_ROOT_LEVEL
:
4003 /* no rsvd bits for 2 level 4K page table entries */
4004 rsvd_check
->rsvd_bits_mask
[0][1] = 0;
4005 rsvd_check
->rsvd_bits_mask
[0][0] = 0;
4006 rsvd_check
->rsvd_bits_mask
[1][0] =
4007 rsvd_check
->rsvd_bits_mask
[0][0];
4010 rsvd_check
->rsvd_bits_mask
[1][1] = 0;
4014 if (is_cpuid_PSE36())
4015 /* 36bits PSE 4MB page */
4016 rsvd_check
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
4018 /* 32 bits PSE 4MB page */
4019 rsvd_check
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
4021 case PT32E_ROOT_LEVEL
:
4022 rsvd_check
->rsvd_bits_mask
[0][2] =
4023 rsvd_bits(maxphyaddr
, 63) |
4024 rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */
4025 rsvd_check
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
4026 rsvd_bits(maxphyaddr
, 62); /* PDE */
4027 rsvd_check
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
4028 rsvd_bits(maxphyaddr
, 62); /* PTE */
4029 rsvd_check
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
4030 rsvd_bits(maxphyaddr
, 62) |
4031 rsvd_bits(13, 20); /* large page */
4032 rsvd_check
->rsvd_bits_mask
[1][0] =
4033 rsvd_check
->rsvd_bits_mask
[0][0];
4035 case PT64_ROOT_5LEVEL
:
4036 rsvd_check
->rsvd_bits_mask
[0][4] = exb_bit_rsvd
|
4037 nonleaf_bit8_rsvd
| rsvd_bits(7, 7) |
4038 rsvd_bits(maxphyaddr
, 51);
4039 rsvd_check
->rsvd_bits_mask
[1][4] =
4040 rsvd_check
->rsvd_bits_mask
[0][4];
4042 case PT64_ROOT_4LEVEL
:
4043 rsvd_check
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
4044 nonleaf_bit8_rsvd
| rsvd_bits(7, 7) |
4045 rsvd_bits(maxphyaddr
, 51);
4046 rsvd_check
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
4048 rsvd_bits(maxphyaddr
, 51);
4049 rsvd_check
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
4050 rsvd_bits(maxphyaddr
, 51);
4051 rsvd_check
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
4052 rsvd_bits(maxphyaddr
, 51);
4053 rsvd_check
->rsvd_bits_mask
[1][3] =
4054 rsvd_check
->rsvd_bits_mask
[0][3];
4055 rsvd_check
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
4056 gbpages_bit_rsvd
| rsvd_bits(maxphyaddr
, 51) |
4058 rsvd_check
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
4059 rsvd_bits(maxphyaddr
, 51) |
4060 rsvd_bits(13, 20); /* large page */
4061 rsvd_check
->rsvd_bits_mask
[1][0] =
4062 rsvd_check
->rsvd_bits_mask
[0][0];
4067 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
4068 struct kvm_mmu
*context
)
4070 __reset_rsvds_bits_mask(vcpu
, &context
->guest_rsvd_check
,
4071 cpuid_maxphyaddr(vcpu
), context
->root_level
,
4073 guest_cpuid_has(vcpu
, X86_FEATURE_GBPAGES
),
4075 guest_cpuid_is_amd_or_hygon(vcpu
));
4079 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate
*rsvd_check
,
4080 int maxphyaddr
, bool execonly
)
4084 rsvd_check
->rsvd_bits_mask
[0][4] =
4085 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 7);
4086 rsvd_check
->rsvd_bits_mask
[0][3] =
4087 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 7);
4088 rsvd_check
->rsvd_bits_mask
[0][2] =
4089 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
4090 rsvd_check
->rsvd_bits_mask
[0][1] =
4091 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
4092 rsvd_check
->rsvd_bits_mask
[0][0] = rsvd_bits(maxphyaddr
, 51);
4095 rsvd_check
->rsvd_bits_mask
[1][4] = rsvd_check
->rsvd_bits_mask
[0][4];
4096 rsvd_check
->rsvd_bits_mask
[1][3] = rsvd_check
->rsvd_bits_mask
[0][3];
4097 rsvd_check
->rsvd_bits_mask
[1][2] =
4098 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 29);
4099 rsvd_check
->rsvd_bits_mask
[1][1] =
4100 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 20);
4101 rsvd_check
->rsvd_bits_mask
[1][0] = rsvd_check
->rsvd_bits_mask
[0][0];
4103 bad_mt_xwr
= 0xFFull
<< (2 * 8); /* bits 3..5 must not be 2 */
4104 bad_mt_xwr
|= 0xFFull
<< (3 * 8); /* bits 3..5 must not be 3 */
4105 bad_mt_xwr
|= 0xFFull
<< (7 * 8); /* bits 3..5 must not be 7 */
4106 bad_mt_xwr
|= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
4107 bad_mt_xwr
|= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
4109 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
4110 bad_mt_xwr
|= REPEAT_BYTE(1ull << 4);
4112 rsvd_check
->bad_mt_xwr
= bad_mt_xwr
;
4115 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu
*vcpu
,
4116 struct kvm_mmu
*context
, bool execonly
)
4118 __reset_rsvds_bits_mask_ept(&context
->guest_rsvd_check
,
4119 cpuid_maxphyaddr(vcpu
), execonly
);
4123 * the page table on host is the shadow page table for the page
4124 * table in guest or amd nested guest, its mmu features completely
4125 * follow the features in guest.
4128 reset_shadow_zero_bits_mask(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
4130 bool uses_nx
= context
->nx
||
4131 context
->mmu_role
.base
.smep_andnot_wp
;
4132 struct rsvd_bits_validate
*shadow_zero_check
;
4136 * Passing "true" to the last argument is okay; it adds a check
4137 * on bit 8 of the SPTEs which KVM doesn't use anyway.
4139 shadow_zero_check
= &context
->shadow_zero_check
;
4140 __reset_rsvds_bits_mask(vcpu
, shadow_zero_check
,
4142 context
->shadow_root_level
, uses_nx
,
4143 guest_cpuid_has(vcpu
, X86_FEATURE_GBPAGES
),
4144 is_pse(vcpu
), true);
4146 if (!shadow_me_mask
)
4149 for (i
= context
->shadow_root_level
; --i
>= 0;) {
4150 shadow_zero_check
->rsvd_bits_mask
[0][i
] &= ~shadow_me_mask
;
4151 shadow_zero_check
->rsvd_bits_mask
[1][i
] &= ~shadow_me_mask
;
4155 EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask
);
4157 static inline bool boot_cpu_is_amd(void)
4159 WARN_ON_ONCE(!tdp_enabled
);
4160 return shadow_x_mask
== 0;
4164 * the direct page table on host, use as much mmu features as
4165 * possible, however, kvm currently does not do execution-protection.
4168 reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu
*vcpu
,
4169 struct kvm_mmu
*context
)
4171 struct rsvd_bits_validate
*shadow_zero_check
;
4174 shadow_zero_check
= &context
->shadow_zero_check
;
4176 if (boot_cpu_is_amd())
4177 __reset_rsvds_bits_mask(vcpu
, shadow_zero_check
,
4179 context
->shadow_root_level
, false,
4180 boot_cpu_has(X86_FEATURE_GBPAGES
),
4183 __reset_rsvds_bits_mask_ept(shadow_zero_check
,
4187 if (!shadow_me_mask
)
4190 for (i
= context
->shadow_root_level
; --i
>= 0;) {
4191 shadow_zero_check
->rsvd_bits_mask
[0][i
] &= ~shadow_me_mask
;
4192 shadow_zero_check
->rsvd_bits_mask
[1][i
] &= ~shadow_me_mask
;
4197 * as the comments in reset_shadow_zero_bits_mask() except it
4198 * is the shadow page table for intel nested guest.
4201 reset_ept_shadow_zero_bits_mask(struct kvm_vcpu
*vcpu
,
4202 struct kvm_mmu
*context
, bool execonly
)
4204 __reset_rsvds_bits_mask_ept(&context
->shadow_zero_check
,
4205 shadow_phys_bits
, execonly
);
4208 #define BYTE_MASK(access) \
4209 ((1 & (access) ? 2 : 0) | \
4210 (2 & (access) ? 4 : 0) | \
4211 (3 & (access) ? 8 : 0) | \
4212 (4 & (access) ? 16 : 0) | \
4213 (5 & (access) ? 32 : 0) | \
4214 (6 & (access) ? 64 : 0) | \
4215 (7 & (access) ? 128 : 0))
4218 static void update_permission_bitmask(struct kvm_vcpu
*vcpu
,
4219 struct kvm_mmu
*mmu
, bool ept
)
4223 const u8 x
= BYTE_MASK(ACC_EXEC_MASK
);
4224 const u8 w
= BYTE_MASK(ACC_WRITE_MASK
);
4225 const u8 u
= BYTE_MASK(ACC_USER_MASK
);
4227 bool cr4_smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
) != 0;
4228 bool cr4_smap
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMAP
) != 0;
4229 bool cr0_wp
= is_write_protection(vcpu
);
4231 for (byte
= 0; byte
< ARRAY_SIZE(mmu
->permissions
); ++byte
) {
4232 unsigned pfec
= byte
<< 1;
4235 * Each "*f" variable has a 1 bit for each UWX value
4236 * that causes a fault with the given PFEC.
4239 /* Faults from writes to non-writable pages */
4240 u8 wf
= (pfec
& PFERR_WRITE_MASK
) ? (u8
)~w
: 0;
4241 /* Faults from user mode accesses to supervisor pages */
4242 u8 uf
= (pfec
& PFERR_USER_MASK
) ? (u8
)~u
: 0;
4243 /* Faults from fetches of non-executable pages*/
4244 u8 ff
= (pfec
& PFERR_FETCH_MASK
) ? (u8
)~x
: 0;
4245 /* Faults from kernel mode fetches of user pages */
4247 /* Faults from kernel mode accesses of user pages */
4251 /* Faults from kernel mode accesses to user pages */
4252 u8 kf
= (pfec
& PFERR_USER_MASK
) ? 0 : u
;
4254 /* Not really needed: !nx will cause pte.nx to fault */
4258 /* Allow supervisor writes if !cr0.wp */
4260 wf
= (pfec
& PFERR_USER_MASK
) ? wf
: 0;
4262 /* Disallow supervisor fetches of user code if cr4.smep */
4264 smepf
= (pfec
& PFERR_FETCH_MASK
) ? kf
: 0;
4267 * SMAP:kernel-mode data accesses from user-mode
4268 * mappings should fault. A fault is considered
4269 * as a SMAP violation if all of the following
4270 * conditions are true:
4271 * - X86_CR4_SMAP is set in CR4
4272 * - A user page is accessed
4273 * - The access is not a fetch
4274 * - Page fault in kernel mode
4275 * - if CPL = 3 or X86_EFLAGS_AC is clear
4277 * Here, we cover the first three conditions.
4278 * The fourth is computed dynamically in permission_fault();
4279 * PFERR_RSVD_MASK bit will be set in PFEC if the access is
4280 * *not* subject to SMAP restrictions.
4283 smapf
= (pfec
& (PFERR_RSVD_MASK
|PFERR_FETCH_MASK
)) ? 0 : kf
;
4286 mmu
->permissions
[byte
] = ff
| uf
| wf
| smepf
| smapf
;
4291 * PKU is an additional mechanism by which the paging controls access to
4292 * user-mode addresses based on the value in the PKRU register. Protection
4293 * key violations are reported through a bit in the page fault error code.
4294 * Unlike other bits of the error code, the PK bit is not known at the
4295 * call site of e.g. gva_to_gpa; it must be computed directly in
4296 * permission_fault based on two bits of PKRU, on some machine state (CR4,
4297 * CR0, EFER, CPL), and on other bits of the error code and the page tables.
4299 * In particular the following conditions come from the error code, the
4300 * page tables and the machine state:
4301 * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1
4302 * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch)
4303 * - PK is always zero if U=0 in the page tables
4304 * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access.
4306 * The PKRU bitmask caches the result of these four conditions. The error
4307 * code (minus the P bit) and the page table's U bit form an index into the
4308 * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed
4309 * with the two bits of the PKRU register corresponding to the protection key.
4310 * For the first three conditions above the bits will be 00, thus masking
4311 * away both AD and WD. For all reads or if the last condition holds, WD
4312 * only will be masked away.
4314 static void update_pkru_bitmask(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
4325 /* PKEY is enabled only if CR4.PKE and EFER.LMA are both set. */
4326 if (!kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) || !is_long_mode(vcpu
)) {
4331 wp
= is_write_protection(vcpu
);
4333 for (bit
= 0; bit
< ARRAY_SIZE(mmu
->permissions
); ++bit
) {
4334 unsigned pfec
, pkey_bits
;
4335 bool check_pkey
, check_write
, ff
, uf
, wf
, pte_user
;
4338 ff
= pfec
& PFERR_FETCH_MASK
;
4339 uf
= pfec
& PFERR_USER_MASK
;
4340 wf
= pfec
& PFERR_WRITE_MASK
;
4342 /* PFEC.RSVD is replaced by ACC_USER_MASK. */
4343 pte_user
= pfec
& PFERR_RSVD_MASK
;
4346 * Only need to check the access which is not an
4347 * instruction fetch and is to a user page.
4349 check_pkey
= (!ff
&& pte_user
);
4351 * write access is controlled by PKRU if it is a
4352 * user access or CR0.WP = 1.
4354 check_write
= check_pkey
&& wf
&& (uf
|| wp
);
4356 /* PKRU.AD stops both read and write access. */
4357 pkey_bits
= !!check_pkey
;
4358 /* PKRU.WD stops write access. */
4359 pkey_bits
|= (!!check_write
) << 1;
4361 mmu
->pkru_mask
|= (pkey_bits
& 3) << pfec
;
4365 static void update_last_nonleaf_level(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
4367 unsigned root_level
= mmu
->root_level
;
4369 mmu
->last_nonleaf_level
= root_level
;
4370 if (root_level
== PT32_ROOT_LEVEL
&& is_pse(vcpu
))
4371 mmu
->last_nonleaf_level
++;
4374 static void paging64_init_context_common(struct kvm_vcpu
*vcpu
,
4375 struct kvm_mmu
*context
,
4378 context
->nx
= is_nx(vcpu
);
4379 context
->root_level
= level
;
4381 reset_rsvds_bits_mask(vcpu
, context
);
4382 update_permission_bitmask(vcpu
, context
, false);
4383 update_pkru_bitmask(vcpu
, context
, false);
4384 update_last_nonleaf_level(vcpu
, context
);
4386 MMU_WARN_ON(!is_pae(vcpu
));
4387 context
->page_fault
= paging64_page_fault
;
4388 context
->gva_to_gpa
= paging64_gva_to_gpa
;
4389 context
->sync_page
= paging64_sync_page
;
4390 context
->invlpg
= paging64_invlpg
;
4391 context
->update_pte
= paging64_update_pte
;
4392 context
->shadow_root_level
= level
;
4393 context
->direct_map
= false;
4396 static void paging64_init_context(struct kvm_vcpu
*vcpu
,
4397 struct kvm_mmu
*context
)
4399 int root_level
= is_la57_mode(vcpu
) ?
4400 PT64_ROOT_5LEVEL
: PT64_ROOT_4LEVEL
;
4402 paging64_init_context_common(vcpu
, context
, root_level
);
4405 static void paging32_init_context(struct kvm_vcpu
*vcpu
,
4406 struct kvm_mmu
*context
)
4408 context
->nx
= false;
4409 context
->root_level
= PT32_ROOT_LEVEL
;
4411 reset_rsvds_bits_mask(vcpu
, context
);
4412 update_permission_bitmask(vcpu
, context
, false);
4413 update_pkru_bitmask(vcpu
, context
, false);
4414 update_last_nonleaf_level(vcpu
, context
);
4416 context
->page_fault
= paging32_page_fault
;
4417 context
->gva_to_gpa
= paging32_gva_to_gpa
;
4418 context
->sync_page
= paging32_sync_page
;
4419 context
->invlpg
= paging32_invlpg
;
4420 context
->update_pte
= paging32_update_pte
;
4421 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
4422 context
->direct_map
= false;
4425 static void paging32E_init_context(struct kvm_vcpu
*vcpu
,
4426 struct kvm_mmu
*context
)
4428 paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
4431 static union kvm_mmu_extended_role
kvm_calc_mmu_role_ext(struct kvm_vcpu
*vcpu
)
4433 union kvm_mmu_extended_role ext
= {0};
4435 ext
.cr0_pg
= !!is_paging(vcpu
);
4436 ext
.cr4_pae
= !!is_pae(vcpu
);
4437 ext
.cr4_smep
= !!kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
4438 ext
.cr4_smap
= !!kvm_read_cr4_bits(vcpu
, X86_CR4_SMAP
);
4439 ext
.cr4_pse
= !!is_pse(vcpu
);
4440 ext
.cr4_pke
= !!kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
);
4441 ext
.maxphyaddr
= cpuid_maxphyaddr(vcpu
);
4448 static union kvm_mmu_role
kvm_calc_mmu_role_common(struct kvm_vcpu
*vcpu
,
4451 union kvm_mmu_role role
= {0};
4453 role
.base
.access
= ACC_ALL
;
4454 role
.base
.nxe
= !!is_nx(vcpu
);
4455 role
.base
.cr0_wp
= is_write_protection(vcpu
);
4456 role
.base
.smm
= is_smm(vcpu
);
4457 role
.base
.guest_mode
= is_guest_mode(vcpu
);
4462 role
.ext
= kvm_calc_mmu_role_ext(vcpu
);
4467 static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu
*vcpu
)
4469 /* Use 5-level TDP if and only if it's useful/necessary. */
4470 if (max_tdp_level
== 5 && cpuid_maxphyaddr(vcpu
) <= 48)
4473 return max_tdp_level
;
4476 static union kvm_mmu_role
4477 kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu
*vcpu
, bool base_only
)
4479 union kvm_mmu_role role
= kvm_calc_mmu_role_common(vcpu
, base_only
);
4481 role
.base
.ad_disabled
= (shadow_accessed_mask
== 0);
4482 role
.base
.level
= kvm_mmu_get_tdp_level(vcpu
);
4483 role
.base
.direct
= true;
4484 role
.base
.gpte_is_8_bytes
= true;
4489 static void init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
4491 struct kvm_mmu
*context
= &vcpu
->arch
.root_mmu
;
4492 union kvm_mmu_role new_role
=
4493 kvm_calc_tdp_mmu_root_page_role(vcpu
, false);
4495 if (new_role
.as_u64
== context
->mmu_role
.as_u64
)
4498 context
->mmu_role
.as_u64
= new_role
.as_u64
;
4499 context
->page_fault
= kvm_tdp_page_fault
;
4500 context
->sync_page
= nonpaging_sync_page
;
4501 context
->invlpg
= NULL
;
4502 context
->update_pte
= nonpaging_update_pte
;
4503 context
->shadow_root_level
= kvm_mmu_get_tdp_level(vcpu
);
4504 context
->direct_map
= true;
4505 context
->get_guest_pgd
= get_cr3
;
4506 context
->get_pdptr
= kvm_pdptr_read
;
4507 context
->inject_page_fault
= kvm_inject_page_fault
;
4509 if (!is_paging(vcpu
)) {
4510 context
->nx
= false;
4511 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
4512 context
->root_level
= 0;
4513 } else if (is_long_mode(vcpu
)) {
4514 context
->nx
= is_nx(vcpu
);
4515 context
->root_level
= is_la57_mode(vcpu
) ?
4516 PT64_ROOT_5LEVEL
: PT64_ROOT_4LEVEL
;
4517 reset_rsvds_bits_mask(vcpu
, context
);
4518 context
->gva_to_gpa
= paging64_gva_to_gpa
;
4519 } else if (is_pae(vcpu
)) {
4520 context
->nx
= is_nx(vcpu
);
4521 context
->root_level
= PT32E_ROOT_LEVEL
;
4522 reset_rsvds_bits_mask(vcpu
, context
);
4523 context
->gva_to_gpa
= paging64_gva_to_gpa
;
4525 context
->nx
= false;
4526 context
->root_level
= PT32_ROOT_LEVEL
;
4527 reset_rsvds_bits_mask(vcpu
, context
);
4528 context
->gva_to_gpa
= paging32_gva_to_gpa
;
4531 update_permission_bitmask(vcpu
, context
, false);
4532 update_pkru_bitmask(vcpu
, context
, false);
4533 update_last_nonleaf_level(vcpu
, context
);
4534 reset_tdp_shadow_zero_bits_mask(vcpu
, context
);
4537 static union kvm_mmu_role
4538 kvm_calc_shadow_root_page_role_common(struct kvm_vcpu
*vcpu
, bool base_only
)
4540 union kvm_mmu_role role
= kvm_calc_mmu_role_common(vcpu
, base_only
);
4542 role
.base
.smep_andnot_wp
= role
.ext
.cr4_smep
&&
4543 !is_write_protection(vcpu
);
4544 role
.base
.smap_andnot_wp
= role
.ext
.cr4_smap
&&
4545 !is_write_protection(vcpu
);
4546 role
.base
.gpte_is_8_bytes
= !!is_pae(vcpu
);
4551 static union kvm_mmu_role
4552 kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu
*vcpu
, bool base_only
)
4554 union kvm_mmu_role role
=
4555 kvm_calc_shadow_root_page_role_common(vcpu
, base_only
);
4557 role
.base
.direct
= !is_paging(vcpu
);
4559 if (!is_long_mode(vcpu
))
4560 role
.base
.level
= PT32E_ROOT_LEVEL
;
4561 else if (is_la57_mode(vcpu
))
4562 role
.base
.level
= PT64_ROOT_5LEVEL
;
4564 role
.base
.level
= PT64_ROOT_4LEVEL
;
4569 static void shadow_mmu_init_context(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
,
4570 u32 cr0
, u32 cr4
, u32 efer
,
4571 union kvm_mmu_role new_role
)
4573 if (!(cr0
& X86_CR0_PG
))
4574 nonpaging_init_context(vcpu
, context
);
4575 else if (efer
& EFER_LMA
)
4576 paging64_init_context(vcpu
, context
);
4577 else if (cr4
& X86_CR4_PAE
)
4578 paging32E_init_context(vcpu
, context
);
4580 paging32_init_context(vcpu
, context
);
4582 context
->mmu_role
.as_u64
= new_role
.as_u64
;
4583 reset_shadow_zero_bits_mask(vcpu
, context
);
4586 static void kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
, u32 cr0
, u32 cr4
, u32 efer
)
4588 struct kvm_mmu
*context
= &vcpu
->arch
.root_mmu
;
4589 union kvm_mmu_role new_role
=
4590 kvm_calc_shadow_mmu_root_page_role(vcpu
, false);
4592 if (new_role
.as_u64
!= context
->mmu_role
.as_u64
)
4593 shadow_mmu_init_context(vcpu
, context
, cr0
, cr4
, efer
, new_role
);
4596 static union kvm_mmu_role
4597 kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu
*vcpu
)
4599 union kvm_mmu_role role
=
4600 kvm_calc_shadow_root_page_role_common(vcpu
, false);
4602 role
.base
.direct
= false;
4603 role
.base
.level
= kvm_mmu_get_tdp_level(vcpu
);
4608 void kvm_init_shadow_npt_mmu(struct kvm_vcpu
*vcpu
, u32 cr0
, u32 cr4
, u32 efer
,
4611 struct kvm_mmu
*context
= &vcpu
->arch
.guest_mmu
;
4612 union kvm_mmu_role new_role
= kvm_calc_shadow_npt_root_page_role(vcpu
);
4614 context
->shadow_root_level
= new_role
.base
.level
;
4616 __kvm_mmu_new_pgd(vcpu
, nested_cr3
, new_role
.base
, false, false);
4618 if (new_role
.as_u64
!= context
->mmu_role
.as_u64
)
4619 shadow_mmu_init_context(vcpu
, context
, cr0
, cr4
, efer
, new_role
);
4621 EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu
);
4623 static union kvm_mmu_role
4624 kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu
*vcpu
, bool accessed_dirty
,
4625 bool execonly
, u8 level
)
4627 union kvm_mmu_role role
= {0};
4629 /* SMM flag is inherited from root_mmu */
4630 role
.base
.smm
= vcpu
->arch
.root_mmu
.mmu_role
.base
.smm
;
4632 role
.base
.level
= level
;
4633 role
.base
.gpte_is_8_bytes
= true;
4634 role
.base
.direct
= false;
4635 role
.base
.ad_disabled
= !accessed_dirty
;
4636 role
.base
.guest_mode
= true;
4637 role
.base
.access
= ACC_ALL
;
4640 * WP=1 and NOT_WP=1 is an impossible combination, use WP and the
4641 * SMAP variation to denote shadow EPT entries.
4643 role
.base
.cr0_wp
= true;
4644 role
.base
.smap_andnot_wp
= true;
4646 role
.ext
= kvm_calc_mmu_role_ext(vcpu
);
4647 role
.ext
.execonly
= execonly
;
4652 void kvm_init_shadow_ept_mmu(struct kvm_vcpu
*vcpu
, bool execonly
,
4653 bool accessed_dirty
, gpa_t new_eptp
)
4655 struct kvm_mmu
*context
= &vcpu
->arch
.guest_mmu
;
4656 u8 level
= vmx_eptp_page_walk_level(new_eptp
);
4657 union kvm_mmu_role new_role
=
4658 kvm_calc_shadow_ept_root_page_role(vcpu
, accessed_dirty
,
4661 __kvm_mmu_new_pgd(vcpu
, new_eptp
, new_role
.base
, true, true);
4663 if (new_role
.as_u64
== context
->mmu_role
.as_u64
)
4666 context
->shadow_root_level
= level
;
4669 context
->ept_ad
= accessed_dirty
;
4670 context
->page_fault
= ept_page_fault
;
4671 context
->gva_to_gpa
= ept_gva_to_gpa
;
4672 context
->sync_page
= ept_sync_page
;
4673 context
->invlpg
= ept_invlpg
;
4674 context
->update_pte
= ept_update_pte
;
4675 context
->root_level
= level
;
4676 context
->direct_map
= false;
4677 context
->mmu_role
.as_u64
= new_role
.as_u64
;
4679 update_permission_bitmask(vcpu
, context
, true);
4680 update_pkru_bitmask(vcpu
, context
, true);
4681 update_last_nonleaf_level(vcpu
, context
);
4682 reset_rsvds_bits_mask_ept(vcpu
, context
, execonly
);
4683 reset_ept_shadow_zero_bits_mask(vcpu
, context
, execonly
);
4685 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu
);
4687 static void init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
4689 struct kvm_mmu
*context
= &vcpu
->arch
.root_mmu
;
4691 kvm_init_shadow_mmu(vcpu
,
4692 kvm_read_cr0_bits(vcpu
, X86_CR0_PG
),
4693 kvm_read_cr4_bits(vcpu
, X86_CR4_PAE
),
4696 context
->get_guest_pgd
= get_cr3
;
4697 context
->get_pdptr
= kvm_pdptr_read
;
4698 context
->inject_page_fault
= kvm_inject_page_fault
;
4701 static void init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
4703 union kvm_mmu_role new_role
= kvm_calc_mmu_role_common(vcpu
, false);
4704 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
4706 if (new_role
.as_u64
== g_context
->mmu_role
.as_u64
)
4709 g_context
->mmu_role
.as_u64
= new_role
.as_u64
;
4710 g_context
->get_guest_pgd
= get_cr3
;
4711 g_context
->get_pdptr
= kvm_pdptr_read
;
4712 g_context
->inject_page_fault
= kvm_inject_page_fault
;
4715 * L2 page tables are never shadowed, so there is no need to sync
4718 g_context
->invlpg
= NULL
;
4721 * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using
4722 * L1's nested page tables (e.g. EPT12). The nested translation
4723 * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using
4724 * L2's page tables as the first level of translation and L1's
4725 * nested page tables as the second level of translation. Basically
4726 * the gva_to_gpa functions between mmu and nested_mmu are swapped.
4728 if (!is_paging(vcpu
)) {
4729 g_context
->nx
= false;
4730 g_context
->root_level
= 0;
4731 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
4732 } else if (is_long_mode(vcpu
)) {
4733 g_context
->nx
= is_nx(vcpu
);
4734 g_context
->root_level
= is_la57_mode(vcpu
) ?
4735 PT64_ROOT_5LEVEL
: PT64_ROOT_4LEVEL
;
4736 reset_rsvds_bits_mask(vcpu
, g_context
);
4737 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
4738 } else if (is_pae(vcpu
)) {
4739 g_context
->nx
= is_nx(vcpu
);
4740 g_context
->root_level
= PT32E_ROOT_LEVEL
;
4741 reset_rsvds_bits_mask(vcpu
, g_context
);
4742 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
4744 g_context
->nx
= false;
4745 g_context
->root_level
= PT32_ROOT_LEVEL
;
4746 reset_rsvds_bits_mask(vcpu
, g_context
);
4747 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
4750 update_permission_bitmask(vcpu
, g_context
, false);
4751 update_pkru_bitmask(vcpu
, g_context
, false);
4752 update_last_nonleaf_level(vcpu
, g_context
);
4755 void kvm_init_mmu(struct kvm_vcpu
*vcpu
, bool reset_roots
)
4760 vcpu
->arch
.mmu
->root_hpa
= INVALID_PAGE
;
4762 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
4763 vcpu
->arch
.mmu
->prev_roots
[i
] = KVM_MMU_ROOT_INFO_INVALID
;
4766 if (mmu_is_nested(vcpu
))
4767 init_kvm_nested_mmu(vcpu
);
4768 else if (tdp_enabled
)
4769 init_kvm_tdp_mmu(vcpu
);
4771 init_kvm_softmmu(vcpu
);
4773 EXPORT_SYMBOL_GPL(kvm_init_mmu
);
4775 static union kvm_mmu_page_role
4776 kvm_mmu_calc_root_page_role(struct kvm_vcpu
*vcpu
)
4778 union kvm_mmu_role role
;
4781 role
= kvm_calc_tdp_mmu_root_page_role(vcpu
, true);
4783 role
= kvm_calc_shadow_mmu_root_page_role(vcpu
, true);
4788 void kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
4790 kvm_mmu_unload(vcpu
);
4791 kvm_init_mmu(vcpu
, true);
4793 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
4795 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
4799 r
= mmu_topup_memory_caches(vcpu
, !vcpu
->arch
.mmu
->direct_map
);
4802 r
= mmu_alloc_roots(vcpu
);
4803 kvm_mmu_sync_roots(vcpu
);
4806 kvm_mmu_load_pgd(vcpu
);
4807 kvm_x86_ops
.tlb_flush_current(vcpu
);
4811 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
4813 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
4815 kvm_mmu_free_roots(vcpu
, &vcpu
->arch
.root_mmu
, KVM_MMU_ROOTS_ALL
);
4816 WARN_ON(VALID_PAGE(vcpu
->arch
.root_mmu
.root_hpa
));
4817 kvm_mmu_free_roots(vcpu
, &vcpu
->arch
.guest_mmu
, KVM_MMU_ROOTS_ALL
);
4818 WARN_ON(VALID_PAGE(vcpu
->arch
.guest_mmu
.root_hpa
));
4820 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
4822 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
4823 struct kvm_mmu_page
*sp
, u64
*spte
,
4826 if (sp
->role
.level
!= PG_LEVEL_4K
) {
4827 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
4831 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
4832 vcpu
->arch
.mmu
->update_pte(vcpu
, sp
, spte
, new);
4835 static bool need_remote_flush(u64 old
, u64
new)
4837 if (!is_shadow_present_pte(old
))
4839 if (!is_shadow_present_pte(new))
4841 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
4843 old
^= shadow_nx_mask
;
4844 new ^= shadow_nx_mask
;
4845 return (old
& ~new & PT64_PERM_MASK
) != 0;
4848 static u64
mmu_pte_write_fetch_gpte(struct kvm_vcpu
*vcpu
, gpa_t
*gpa
,
4855 * Assume that the pte write on a page table of the same type
4856 * as the current vcpu paging mode since we update the sptes only
4857 * when they have the same mode.
4859 if (is_pae(vcpu
) && *bytes
== 4) {
4860 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
4865 if (*bytes
== 4 || *bytes
== 8) {
4866 r
= kvm_vcpu_read_guest_atomic(vcpu
, *gpa
, &gentry
, *bytes
);
4875 * If we're seeing too many writes to a page, it may no longer be a page table,
4876 * or we may be forking, in which case it is better to unmap the page.
4878 static bool detect_write_flooding(struct kvm_mmu_page
*sp
)
4881 * Skip write-flooding detected for the sp whose level is 1, because
4882 * it can become unsync, then the guest page is not write-protected.
4884 if (sp
->role
.level
== PG_LEVEL_4K
)
4887 atomic_inc(&sp
->write_flooding_count
);
4888 return atomic_read(&sp
->write_flooding_count
) >= 3;
4892 * Misaligned accesses are too much trouble to fix up; also, they usually
4893 * indicate a page is not used as a page table.
4895 static bool detect_write_misaligned(struct kvm_mmu_page
*sp
, gpa_t gpa
,
4898 unsigned offset
, pte_size
, misaligned
;
4900 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4901 gpa
, bytes
, sp
->role
.word
);
4903 offset
= offset_in_page(gpa
);
4904 pte_size
= sp
->role
.gpte_is_8_bytes
? 8 : 4;
4907 * Sometimes, the OS only writes the last one bytes to update status
4908 * bits, for example, in linux, andb instruction is used in clear_bit().
4910 if (!(offset
& (pte_size
- 1)) && bytes
== 1)
4913 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
4914 misaligned
|= bytes
< 4;
4919 static u64
*get_written_sptes(struct kvm_mmu_page
*sp
, gpa_t gpa
, int *nspte
)
4921 unsigned page_offset
, quadrant
;
4925 page_offset
= offset_in_page(gpa
);
4926 level
= sp
->role
.level
;
4928 if (!sp
->role
.gpte_is_8_bytes
) {
4929 page_offset
<<= 1; /* 32->64 */
4931 * A 32-bit pde maps 4MB while the shadow pdes map
4932 * only 2MB. So we need to double the offset again
4933 * and zap two pdes instead of one.
4935 if (level
== PT32_ROOT_LEVEL
) {
4936 page_offset
&= ~7; /* kill rounding error */
4940 quadrant
= page_offset
>> PAGE_SHIFT
;
4941 page_offset
&= ~PAGE_MASK
;
4942 if (quadrant
!= sp
->role
.quadrant
)
4946 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
4951 * Ignore various flags when determining if a SPTE can be immediately
4952 * overwritten for the current MMU.
4953 * - level: explicitly checked in mmu_pte_write_new_pte(), and will never
4954 * match the current MMU role, as MMU's level tracks the root level.
4955 * - access: updated based on the new guest PTE
4956 * - quadrant: handled by get_written_sptes()
4957 * - invalid: always false (loop only walks valid shadow pages)
4959 static const union kvm_mmu_page_role role_ign
= {
4966 static void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4967 const u8
*new, int bytes
,
4968 struct kvm_page_track_notifier_node
*node
)
4970 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
4971 struct kvm_mmu_page
*sp
;
4972 LIST_HEAD(invalid_list
);
4973 u64 entry
, gentry
, *spte
;
4975 bool remote_flush
, local_flush
;
4978 * If we don't have indirect shadow pages, it means no page is
4979 * write-protected, so we can exit simply.
4981 if (!READ_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
4984 remote_flush
= local_flush
= false;
4986 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
4989 * No need to care whether allocation memory is successful
4990 * or not since pte prefetch is skiped if it does not have
4991 * enough objects in the cache.
4993 mmu_topup_memory_caches(vcpu
, true);
4995 spin_lock(&vcpu
->kvm
->mmu_lock
);
4997 gentry
= mmu_pte_write_fetch_gpte(vcpu
, &gpa
, &bytes
);
4999 ++vcpu
->kvm
->stat
.mmu_pte_write
;
5000 kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
5002 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
5003 if (detect_write_misaligned(sp
, gpa
, bytes
) ||
5004 detect_write_flooding(sp
)) {
5005 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
5006 ++vcpu
->kvm
->stat
.mmu_flooded
;
5010 spte
= get_written_sptes(sp
, gpa
, &npte
);
5016 u32 base_role
= vcpu
->arch
.mmu
->mmu_role
.base
.word
;
5019 mmu_page_zap_pte(vcpu
->kvm
, sp
, spte
, NULL
);
5021 !((sp
->role
.word
^ base_role
) & ~role_ign
.word
) &&
5023 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
5024 if (need_remote_flush(entry
, *spte
))
5025 remote_flush
= true;
5029 kvm_mmu_flush_or_zap(vcpu
, &invalid_list
, remote_flush
, local_flush
);
5030 kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
5031 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5034 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
5039 if (vcpu
->arch
.mmu
->direct_map
)
5042 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
5044 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
5048 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
5050 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
, u64 error_code
,
5051 void *insn
, int insn_len
)
5053 int r
, emulation_type
= EMULTYPE_PF
;
5054 bool direct
= vcpu
->arch
.mmu
->direct_map
;
5056 if (WARN_ON(!VALID_PAGE(vcpu
->arch
.mmu
->root_hpa
)))
5057 return RET_PF_RETRY
;
5060 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
5061 r
= handle_mmio_page_fault(vcpu
, cr2_or_gpa
, direct
);
5062 if (r
== RET_PF_EMULATE
)
5066 if (r
== RET_PF_INVALID
) {
5067 r
= kvm_mmu_do_page_fault(vcpu
, cr2_or_gpa
,
5068 lower_32_bits(error_code
), false);
5069 if (WARN_ON_ONCE(r
== RET_PF_INVALID
))
5075 if (r
!= RET_PF_EMULATE
)
5079 * Before emulating the instruction, check if the error code
5080 * was due to a RO violation while translating the guest page.
5081 * This can occur when using nested virtualization with nested
5082 * paging in both guests. If true, we simply unprotect the page
5083 * and resume the guest.
5085 if (vcpu
->arch
.mmu
->direct_map
&&
5086 (error_code
& PFERR_NESTED_GUEST_PAGE
) == PFERR_NESTED_GUEST_PAGE
) {
5087 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(cr2_or_gpa
));
5092 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still
5093 * optimistically try to just unprotect the page and let the processor
5094 * re-execute the instruction that caused the page fault. Do not allow
5095 * retrying MMIO emulation, as it's not only pointless but could also
5096 * cause us to enter an infinite loop because the processor will keep
5097 * faulting on the non-existent MMIO address. Retrying an instruction
5098 * from a nested guest is also pointless and dangerous as we are only
5099 * explicitly shadowing L1's page tables, i.e. unprotecting something
5100 * for L1 isn't going to magically fix whatever issue cause L2 to fail.
5102 if (!mmio_info_in_cache(vcpu
, cr2_or_gpa
, direct
) && !is_guest_mode(vcpu
))
5103 emulation_type
|= EMULTYPE_ALLOW_RETRY_PF
;
5105 return x86_emulate_instruction(vcpu
, cr2_or_gpa
, emulation_type
, insn
,
5108 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
5110 void kvm_mmu_invalidate_gva(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
5111 gva_t gva
, hpa_t root_hpa
)
5115 /* It's actually a GPA for vcpu->arch.guest_mmu. */
5116 if (mmu
!= &vcpu
->arch
.guest_mmu
) {
5117 /* INVLPG on a non-canonical address is a NOP according to the SDM. */
5118 if (is_noncanonical_address(gva
, vcpu
))
5121 kvm_x86_ops
.tlb_flush_gva(vcpu
, gva
);
5127 if (root_hpa
== INVALID_PAGE
) {
5128 mmu
->invlpg(vcpu
, gva
, mmu
->root_hpa
);
5131 * INVLPG is required to invalidate any global mappings for the VA,
5132 * irrespective of PCID. Since it would take us roughly similar amount
5133 * of work to determine whether any of the prev_root mappings of the VA
5134 * is marked global, or to just sync it blindly, so we might as well
5135 * just always sync it.
5137 * Mappings not reachable via the current cr3 or the prev_roots will be
5138 * synced when switching to that cr3, so nothing needs to be done here
5141 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
5142 if (VALID_PAGE(mmu
->prev_roots
[i
].hpa
))
5143 mmu
->invlpg(vcpu
, gva
, mmu
->prev_roots
[i
].hpa
);
5145 mmu
->invlpg(vcpu
, gva
, root_hpa
);
5148 EXPORT_SYMBOL_GPL(kvm_mmu_invalidate_gva
);
5150 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
5152 kvm_mmu_invalidate_gva(vcpu
, vcpu
->arch
.mmu
, gva
, INVALID_PAGE
);
5153 ++vcpu
->stat
.invlpg
;
5155 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
5158 void kvm_mmu_invpcid_gva(struct kvm_vcpu
*vcpu
, gva_t gva
, unsigned long pcid
)
5160 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
5161 bool tlb_flush
= false;
5164 if (pcid
== kvm_get_active_pcid(vcpu
)) {
5165 mmu
->invlpg(vcpu
, gva
, mmu
->root_hpa
);
5169 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++) {
5170 if (VALID_PAGE(mmu
->prev_roots
[i
].hpa
) &&
5171 pcid
== kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
)) {
5172 mmu
->invlpg(vcpu
, gva
, mmu
->prev_roots
[i
].hpa
);
5178 kvm_x86_ops
.tlb_flush_gva(vcpu
, gva
);
5180 ++vcpu
->stat
.invlpg
;
5183 * Mappings not reachable via the current cr3 or the prev_roots will be
5184 * synced when switching to that cr3, so nothing needs to be done here
5188 EXPORT_SYMBOL_GPL(kvm_mmu_invpcid_gva
);
5190 void kvm_configure_mmu(bool enable_tdp
, int tdp_max_root_level
,
5191 int tdp_huge_page_level
)
5193 tdp_enabled
= enable_tdp
;
5194 max_tdp_level
= tdp_max_root_level
;
5197 * max_huge_page_level reflects KVM's MMU capabilities irrespective
5198 * of kernel support, e.g. KVM may be capable of using 1GB pages when
5199 * the kernel is not. But, KVM never creates a page size greater than
5200 * what is used by the kernel for any given HVA, i.e. the kernel's
5201 * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust().
5204 max_huge_page_level
= tdp_huge_page_level
;
5205 else if (boot_cpu_has(X86_FEATURE_GBPAGES
))
5206 max_huge_page_level
= PG_LEVEL_1G
;
5208 max_huge_page_level
= PG_LEVEL_2M
;
5210 EXPORT_SYMBOL_GPL(kvm_configure_mmu
);
5212 /* The return value indicates if tlb flush on all vcpus is needed. */
5213 typedef bool (*slot_level_handler
) (struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
);
5215 /* The caller should hold mmu-lock before calling this function. */
5216 static __always_inline
bool
5217 slot_handle_level_range(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
5218 slot_level_handler fn
, int start_level
, int end_level
,
5219 gfn_t start_gfn
, gfn_t end_gfn
, bool lock_flush_tlb
)
5221 struct slot_rmap_walk_iterator iterator
;
5224 for_each_slot_rmap_range(memslot
, start_level
, end_level
, start_gfn
,
5225 end_gfn
, &iterator
) {
5227 flush
|= fn(kvm
, iterator
.rmap
);
5229 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
)) {
5230 if (flush
&& lock_flush_tlb
) {
5231 kvm_flush_remote_tlbs_with_address(kvm
,
5233 iterator
.gfn
- start_gfn
+ 1);
5236 cond_resched_lock(&kvm
->mmu_lock
);
5240 if (flush
&& lock_flush_tlb
) {
5241 kvm_flush_remote_tlbs_with_address(kvm
, start_gfn
,
5242 end_gfn
- start_gfn
+ 1);
5249 static __always_inline
bool
5250 slot_handle_level(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
5251 slot_level_handler fn
, int start_level
, int end_level
,
5252 bool lock_flush_tlb
)
5254 return slot_handle_level_range(kvm
, memslot
, fn
, start_level
,
5255 end_level
, memslot
->base_gfn
,
5256 memslot
->base_gfn
+ memslot
->npages
- 1,
5260 static __always_inline
bool
5261 slot_handle_all_level(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
5262 slot_level_handler fn
, bool lock_flush_tlb
)
5264 return slot_handle_level(kvm
, memslot
, fn
, PG_LEVEL_4K
,
5265 KVM_MAX_HUGEPAGE_LEVEL
, lock_flush_tlb
);
5268 static __always_inline
bool
5269 slot_handle_large_level(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
5270 slot_level_handler fn
, bool lock_flush_tlb
)
5272 return slot_handle_level(kvm
, memslot
, fn
, PG_LEVEL_4K
+ 1,
5273 KVM_MAX_HUGEPAGE_LEVEL
, lock_flush_tlb
);
5276 static __always_inline
bool
5277 slot_handle_leaf(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
,
5278 slot_level_handler fn
, bool lock_flush_tlb
)
5280 return slot_handle_level(kvm
, memslot
, fn
, PG_LEVEL_4K
,
5281 PG_LEVEL_4K
, lock_flush_tlb
);
5284 static void free_mmu_pages(struct kvm_mmu
*mmu
)
5286 free_page((unsigned long)mmu
->pae_root
);
5287 free_page((unsigned long)mmu
->lm_root
);
5290 static int __kvm_mmu_create(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
5295 mmu
->root_hpa
= INVALID_PAGE
;
5297 mmu
->translate_gpa
= translate_gpa
;
5298 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
5299 mmu
->prev_roots
[i
] = KVM_MMU_ROOT_INFO_INVALID
;
5302 * When using PAE paging, the four PDPTEs are treated as 'root' pages,
5303 * while the PDP table is a per-vCPU construct that's allocated at MMU
5304 * creation. When emulating 32-bit mode, cr3 is only 32 bits even on
5305 * x86_64. Therefore we need to allocate the PDP table in the first
5306 * 4GB of memory, which happens to fit the DMA32 zone. Except for
5307 * SVM's 32-bit NPT support, TDP paging doesn't use PAE paging and can
5308 * skip allocating the PDP table.
5310 if (tdp_enabled
&& kvm_mmu_get_tdp_level(vcpu
) > PT32E_ROOT_LEVEL
)
5313 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_DMA32
);
5317 mmu
->pae_root
= page_address(page
);
5318 for (i
= 0; i
< 4; ++i
)
5319 mmu
->pae_root
[i
] = INVALID_PAGE
;
5324 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
5328 vcpu
->arch
.mmu_pte_list_desc_cache
.kmem_cache
= pte_list_desc_cache
;
5329 vcpu
->arch
.mmu_pte_list_desc_cache
.gfp_zero
= __GFP_ZERO
;
5331 vcpu
->arch
.mmu_page_header_cache
.kmem_cache
= mmu_page_header_cache
;
5332 vcpu
->arch
.mmu_page_header_cache
.gfp_zero
= __GFP_ZERO
;
5334 vcpu
->arch
.mmu_shadow_page_cache
.gfp_zero
= __GFP_ZERO
;
5336 vcpu
->arch
.mmu
= &vcpu
->arch
.root_mmu
;
5337 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.root_mmu
;
5339 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
5341 ret
= __kvm_mmu_create(vcpu
, &vcpu
->arch
.guest_mmu
);
5345 ret
= __kvm_mmu_create(vcpu
, &vcpu
->arch
.root_mmu
);
5347 goto fail_allocate_root
;
5351 free_mmu_pages(&vcpu
->arch
.guest_mmu
);
5355 #define BATCH_ZAP_PAGES 10
5356 static void kvm_zap_obsolete_pages(struct kvm
*kvm
)
5358 struct kvm_mmu_page
*sp
, *node
;
5359 int nr_zapped
, batch
= 0;
5362 list_for_each_entry_safe_reverse(sp
, node
,
5363 &kvm
->arch
.active_mmu_pages
, link
) {
5365 * No obsolete valid page exists before a newly created page
5366 * since active_mmu_pages is a FIFO list.
5368 if (!is_obsolete_sp(kvm
, sp
))
5372 * Invalid pages should never land back on the list of active
5373 * pages. Skip the bogus page, otherwise we'll get stuck in an
5374 * infinite loop if the page gets put back on the list (again).
5376 if (WARN_ON(sp
->role
.invalid
))
5380 * No need to flush the TLB since we're only zapping shadow
5381 * pages with an obsolete generation number and all vCPUS have
5382 * loaded a new root, i.e. the shadow pages being zapped cannot
5383 * be in active use by the guest.
5385 if (batch
>= BATCH_ZAP_PAGES
&&
5386 cond_resched_lock(&kvm
->mmu_lock
)) {
5391 if (__kvm_mmu_prepare_zap_page(kvm
, sp
,
5392 &kvm
->arch
.zapped_obsolete_pages
, &nr_zapped
)) {
5399 * Trigger a remote TLB flush before freeing the page tables to ensure
5400 * KVM is not in the middle of a lockless shadow page table walk, which
5401 * may reference the pages.
5403 kvm_mmu_commit_zap_page(kvm
, &kvm
->arch
.zapped_obsolete_pages
);
5407 * Fast invalidate all shadow pages and use lock-break technique
5408 * to zap obsolete pages.
5410 * It's required when memslot is being deleted or VM is being
5411 * destroyed, in these cases, we should ensure that KVM MMU does
5412 * not use any resource of the being-deleted slot or all slots
5413 * after calling the function.
5415 static void kvm_mmu_zap_all_fast(struct kvm
*kvm
)
5417 lockdep_assert_held(&kvm
->slots_lock
);
5419 spin_lock(&kvm
->mmu_lock
);
5420 trace_kvm_mmu_zap_all_fast(kvm
);
5423 * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is
5424 * held for the entire duration of zapping obsolete pages, it's
5425 * impossible for there to be multiple invalid generations associated
5426 * with *valid* shadow pages at any given time, i.e. there is exactly
5427 * one valid generation and (at most) one invalid generation.
5429 kvm
->arch
.mmu_valid_gen
= kvm
->arch
.mmu_valid_gen
? 0 : 1;
5432 * Notify all vcpus to reload its shadow page table and flush TLB.
5433 * Then all vcpus will switch to new shadow page table with the new
5436 * Note: we need to do this under the protection of mmu_lock,
5437 * otherwise, vcpu would purge shadow page but miss tlb flush.
5439 kvm_reload_remote_mmus(kvm
);
5441 kvm_zap_obsolete_pages(kvm
);
5443 if (kvm
->arch
.tdp_mmu_enabled
)
5444 kvm_tdp_mmu_zap_all(kvm
);
5446 spin_unlock(&kvm
->mmu_lock
);
5449 static bool kvm_has_zapped_obsolete_pages(struct kvm
*kvm
)
5451 return unlikely(!list_empty_careful(&kvm
->arch
.zapped_obsolete_pages
));
5454 static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm
*kvm
,
5455 struct kvm_memory_slot
*slot
,
5456 struct kvm_page_track_notifier_node
*node
)
5458 kvm_mmu_zap_all_fast(kvm
);
5461 void kvm_mmu_init_vm(struct kvm
*kvm
)
5463 struct kvm_page_track_notifier_node
*node
= &kvm
->arch
.mmu_sp_tracker
;
5465 kvm_mmu_init_tdp_mmu(kvm
);
5467 node
->track_write
= kvm_mmu_pte_write
;
5468 node
->track_flush_slot
= kvm_mmu_invalidate_zap_pages_in_memslot
;
5469 kvm_page_track_register_notifier(kvm
, node
);
5472 void kvm_mmu_uninit_vm(struct kvm
*kvm
)
5474 struct kvm_page_track_notifier_node
*node
= &kvm
->arch
.mmu_sp_tracker
;
5476 kvm_page_track_unregister_notifier(kvm
, node
);
5478 kvm_mmu_uninit_tdp_mmu(kvm
);
5481 void kvm_zap_gfn_range(struct kvm
*kvm
, gfn_t gfn_start
, gfn_t gfn_end
)
5483 struct kvm_memslots
*slots
;
5484 struct kvm_memory_slot
*memslot
;
5488 spin_lock(&kvm
->mmu_lock
);
5489 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
5490 slots
= __kvm_memslots(kvm
, i
);
5491 kvm_for_each_memslot(memslot
, slots
) {
5494 start
= max(gfn_start
, memslot
->base_gfn
);
5495 end
= min(gfn_end
, memslot
->base_gfn
+ memslot
->npages
);
5499 slot_handle_level_range(kvm
, memslot
, kvm_zap_rmapp
,
5501 KVM_MAX_HUGEPAGE_LEVEL
,
5502 start
, end
- 1, true);
5506 if (kvm
->arch
.tdp_mmu_enabled
) {
5507 flush
= kvm_tdp_mmu_zap_gfn_range(kvm
, gfn_start
, gfn_end
);
5509 kvm_flush_remote_tlbs(kvm
);
5512 spin_unlock(&kvm
->mmu_lock
);
5515 static bool slot_rmap_write_protect(struct kvm
*kvm
,
5516 struct kvm_rmap_head
*rmap_head
)
5518 return __rmap_write_protect(kvm
, rmap_head
, false);
5521 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
,
5522 struct kvm_memory_slot
*memslot
,
5527 spin_lock(&kvm
->mmu_lock
);
5528 flush
= slot_handle_level(kvm
, memslot
, slot_rmap_write_protect
,
5529 start_level
, KVM_MAX_HUGEPAGE_LEVEL
, false);
5530 if (kvm
->arch
.tdp_mmu_enabled
)
5531 flush
|= kvm_tdp_mmu_wrprot_slot(kvm
, memslot
, PG_LEVEL_4K
);
5532 spin_unlock(&kvm
->mmu_lock
);
5535 * We can flush all the TLBs out of the mmu lock without TLB
5536 * corruption since we just change the spte from writable to
5537 * readonly so that we only need to care the case of changing
5538 * spte from present to present (changing the spte from present
5539 * to nonpresent will flush all the TLBs immediately), in other
5540 * words, the only case we care is mmu_spte_update() where we
5541 * have checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE
5542 * instead of PT_WRITABLE_MASK, that means it does not depend
5543 * on PT_WRITABLE_MASK anymore.
5546 kvm_arch_flush_remote_tlbs_memslot(kvm
, memslot
);
5549 static bool kvm_mmu_zap_collapsible_spte(struct kvm
*kvm
,
5550 struct kvm_rmap_head
*rmap_head
)
5553 struct rmap_iterator iter
;
5554 int need_tlb_flush
= 0;
5556 struct kvm_mmu_page
*sp
;
5559 for_each_rmap_spte(rmap_head
, &iter
, sptep
) {
5560 sp
= sptep_to_sp(sptep
);
5561 pfn
= spte_to_pfn(*sptep
);
5564 * We cannot do huge page mapping for indirect shadow pages,
5565 * which are found on the last rmap (level = 1) when not using
5566 * tdp; such shadow pages are synced with the page table in
5567 * the guest, and the guest page table is using 4K page size
5568 * mapping if the indirect sp has level = 1.
5570 if (sp
->role
.direct
&& !kvm_is_reserved_pfn(pfn
) &&
5571 (kvm_is_zone_device_pfn(pfn
) ||
5572 PageCompound(pfn_to_page(pfn
)))) {
5573 pte_list_remove(rmap_head
, sptep
);
5575 if (kvm_available_flush_tlb_with_range())
5576 kvm_flush_remote_tlbs_with_address(kvm
, sp
->gfn
,
5577 KVM_PAGES_PER_HPAGE(sp
->role
.level
));
5585 return need_tlb_flush
;
5588 void kvm_mmu_zap_collapsible_sptes(struct kvm
*kvm
,
5589 const struct kvm_memory_slot
*memslot
)
5591 /* FIXME: const-ify all uses of struct kvm_memory_slot. */
5592 spin_lock(&kvm
->mmu_lock
);
5593 slot_handle_leaf(kvm
, (struct kvm_memory_slot
*)memslot
,
5594 kvm_mmu_zap_collapsible_spte
, true);
5596 if (kvm
->arch
.tdp_mmu_enabled
)
5597 kvm_tdp_mmu_zap_collapsible_sptes(kvm
, memslot
);
5598 spin_unlock(&kvm
->mmu_lock
);
5601 void kvm_arch_flush_remote_tlbs_memslot(struct kvm
*kvm
,
5602 struct kvm_memory_slot
*memslot
)
5605 * All current use cases for flushing the TLBs for a specific memslot
5606 * are related to dirty logging, and do the TLB flush out of mmu_lock.
5607 * The interaction between the various operations on memslot must be
5608 * serialized by slots_locks to ensure the TLB flush from one operation
5609 * is observed by any other operation on the same memslot.
5611 lockdep_assert_held(&kvm
->slots_lock
);
5612 kvm_flush_remote_tlbs_with_address(kvm
, memslot
->base_gfn
,
5616 void kvm_mmu_slot_leaf_clear_dirty(struct kvm
*kvm
,
5617 struct kvm_memory_slot
*memslot
)
5621 spin_lock(&kvm
->mmu_lock
);
5622 flush
= slot_handle_leaf(kvm
, memslot
, __rmap_clear_dirty
, false);
5623 if (kvm
->arch
.tdp_mmu_enabled
)
5624 flush
|= kvm_tdp_mmu_clear_dirty_slot(kvm
, memslot
);
5625 spin_unlock(&kvm
->mmu_lock
);
5628 * It's also safe to flush TLBs out of mmu lock here as currently this
5629 * function is only used for dirty logging, in which case flushing TLB
5630 * out of mmu lock also guarantees no dirty pages will be lost in
5634 kvm_arch_flush_remote_tlbs_memslot(kvm
, memslot
);
5636 EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty
);
5638 void kvm_mmu_slot_largepage_remove_write_access(struct kvm
*kvm
,
5639 struct kvm_memory_slot
*memslot
)
5643 spin_lock(&kvm
->mmu_lock
);
5644 flush
= slot_handle_large_level(kvm
, memslot
, slot_rmap_write_protect
,
5646 if (kvm
->arch
.tdp_mmu_enabled
)
5647 flush
|= kvm_tdp_mmu_wrprot_slot(kvm
, memslot
, PG_LEVEL_2M
);
5648 spin_unlock(&kvm
->mmu_lock
);
5651 kvm_arch_flush_remote_tlbs_memslot(kvm
, memslot
);
5653 EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access
);
5655 void kvm_mmu_slot_set_dirty(struct kvm
*kvm
,
5656 struct kvm_memory_slot
*memslot
)
5660 spin_lock(&kvm
->mmu_lock
);
5661 flush
= slot_handle_all_level(kvm
, memslot
, __rmap_set_dirty
, false);
5662 if (kvm
->arch
.tdp_mmu_enabled
)
5663 flush
|= kvm_tdp_mmu_slot_set_dirty(kvm
, memslot
);
5664 spin_unlock(&kvm
->mmu_lock
);
5667 kvm_arch_flush_remote_tlbs_memslot(kvm
, memslot
);
5669 EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty
);
5671 void kvm_mmu_zap_all(struct kvm
*kvm
)
5673 struct kvm_mmu_page
*sp
, *node
;
5674 LIST_HEAD(invalid_list
);
5677 spin_lock(&kvm
->mmu_lock
);
5679 list_for_each_entry_safe(sp
, node
, &kvm
->arch
.active_mmu_pages
, link
) {
5680 if (WARN_ON(sp
->role
.invalid
))
5682 if (__kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
, &ign
))
5684 if (cond_resched_lock(&kvm
->mmu_lock
))
5688 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
5690 if (kvm
->arch
.tdp_mmu_enabled
)
5691 kvm_tdp_mmu_zap_all(kvm
);
5693 spin_unlock(&kvm
->mmu_lock
);
5696 void kvm_mmu_invalidate_mmio_sptes(struct kvm
*kvm
, u64 gen
)
5698 WARN_ON(gen
& KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS
);
5700 gen
&= MMIO_SPTE_GEN_MASK
;
5703 * Generation numbers are incremented in multiples of the number of
5704 * address spaces in order to provide unique generations across all
5705 * address spaces. Strip what is effectively the address space
5706 * modifier prior to checking for a wrap of the MMIO generation so
5707 * that a wrap in any address space is detected.
5709 gen
&= ~((u64
)KVM_ADDRESS_SPACE_NUM
- 1);
5712 * The very rare case: if the MMIO generation number has wrapped,
5713 * zap all shadow pages.
5715 if (unlikely(gen
== 0)) {
5716 kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n");
5717 kvm_mmu_zap_all_fast(kvm
);
5721 static unsigned long
5722 mmu_shrink_scan(struct shrinker
*shrink
, struct shrink_control
*sc
)
5725 int nr_to_scan
= sc
->nr_to_scan
;
5726 unsigned long freed
= 0;
5728 mutex_lock(&kvm_lock
);
5730 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5732 LIST_HEAD(invalid_list
);
5735 * Never scan more than sc->nr_to_scan VM instances.
5736 * Will not hit this condition practically since we do not try
5737 * to shrink more than one VM and it is very unlikely to see
5738 * !n_used_mmu_pages so many times.
5743 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
5744 * here. We may skip a VM instance errorneosly, but we do not
5745 * want to shrink a VM that only started to populate its MMU
5748 if (!kvm
->arch
.n_used_mmu_pages
&&
5749 !kvm_has_zapped_obsolete_pages(kvm
))
5752 idx
= srcu_read_lock(&kvm
->srcu
);
5753 spin_lock(&kvm
->mmu_lock
);
5755 if (kvm_has_zapped_obsolete_pages(kvm
)) {
5756 kvm_mmu_commit_zap_page(kvm
,
5757 &kvm
->arch
.zapped_obsolete_pages
);
5761 freed
= kvm_mmu_zap_oldest_mmu_pages(kvm
, sc
->nr_to_scan
);
5764 spin_unlock(&kvm
->mmu_lock
);
5765 srcu_read_unlock(&kvm
->srcu
, idx
);
5768 * unfair on small ones
5769 * per-vm shrinkers cry out
5770 * sadness comes quickly
5772 list_move_tail(&kvm
->vm_list
, &vm_list
);
5776 mutex_unlock(&kvm_lock
);
5780 static unsigned long
5781 mmu_shrink_count(struct shrinker
*shrink
, struct shrink_control
*sc
)
5783 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
5786 static struct shrinker mmu_shrinker
= {
5787 .count_objects
= mmu_shrink_count
,
5788 .scan_objects
= mmu_shrink_scan
,
5789 .seeks
= DEFAULT_SEEKS
* 10,
5792 static void mmu_destroy_caches(void)
5794 kmem_cache_destroy(pte_list_desc_cache
);
5795 kmem_cache_destroy(mmu_page_header_cache
);
5798 static void kvm_set_mmio_spte_mask(void)
5803 * Set a reserved PA bit in MMIO SPTEs to generate page faults with
5804 * PFEC.RSVD=1 on MMIO accesses. 64-bit PTEs (PAE, x86-64, and EPT
5805 * paging) support a maximum of 52 bits of PA, i.e. if the CPU supports
5806 * 52-bit physical addresses then there are no reserved PA bits in the
5807 * PTEs and so the reserved PA approach must be disabled.
5809 if (shadow_phys_bits
< 52)
5810 mask
= BIT_ULL(51) | PT_PRESENT_MASK
;
5814 kvm_mmu_set_mmio_spte_mask(mask
, ACC_WRITE_MASK
| ACC_USER_MASK
);
5817 static bool get_nx_auto_mode(void)
5819 /* Return true when CPU has the bug, and mitigations are ON */
5820 return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT
) && !cpu_mitigations_off();
5823 static void __set_nx_huge_pages(bool val
)
5825 nx_huge_pages
= itlb_multihit_kvm_mitigation
= val
;
5828 static int set_nx_huge_pages(const char *val
, const struct kernel_param
*kp
)
5830 bool old_val
= nx_huge_pages
;
5833 /* In "auto" mode deploy workaround only if CPU has the bug. */
5834 if (sysfs_streq(val
, "off"))
5836 else if (sysfs_streq(val
, "force"))
5838 else if (sysfs_streq(val
, "auto"))
5839 new_val
= get_nx_auto_mode();
5840 else if (strtobool(val
, &new_val
) < 0)
5843 __set_nx_huge_pages(new_val
);
5845 if (new_val
!= old_val
) {
5848 mutex_lock(&kvm_lock
);
5850 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5851 mutex_lock(&kvm
->slots_lock
);
5852 kvm_mmu_zap_all_fast(kvm
);
5853 mutex_unlock(&kvm
->slots_lock
);
5855 wake_up_process(kvm
->arch
.nx_lpage_recovery_thread
);
5857 mutex_unlock(&kvm_lock
);
5863 int kvm_mmu_module_init(void)
5867 if (nx_huge_pages
== -1)
5868 __set_nx_huge_pages(get_nx_auto_mode());
5871 * MMU roles use union aliasing which is, generally speaking, an
5872 * undefined behavior. However, we supposedly know how compilers behave
5873 * and the current status quo is unlikely to change. Guardians below are
5874 * supposed to let us know if the assumption becomes false.
5876 BUILD_BUG_ON(sizeof(union kvm_mmu_page_role
) != sizeof(u32
));
5877 BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role
) != sizeof(u32
));
5878 BUILD_BUG_ON(sizeof(union kvm_mmu_role
) != sizeof(u64
));
5880 kvm_mmu_reset_all_pte_masks();
5882 kvm_set_mmio_spte_mask();
5884 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
5885 sizeof(struct pte_list_desc
),
5886 0, SLAB_ACCOUNT
, NULL
);
5887 if (!pte_list_desc_cache
)
5890 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
5891 sizeof(struct kvm_mmu_page
),
5892 0, SLAB_ACCOUNT
, NULL
);
5893 if (!mmu_page_header_cache
)
5896 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0, GFP_KERNEL
))
5899 ret
= register_shrinker(&mmu_shrinker
);
5906 mmu_destroy_caches();
5911 * Calculate mmu pages needed for kvm.
5913 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm
*kvm
)
5915 unsigned long nr_mmu_pages
;
5916 unsigned long nr_pages
= 0;
5917 struct kvm_memslots
*slots
;
5918 struct kvm_memory_slot
*memslot
;
5921 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
5922 slots
= __kvm_memslots(kvm
, i
);
5924 kvm_for_each_memslot(memslot
, slots
)
5925 nr_pages
+= memslot
->npages
;
5928 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
5929 nr_mmu_pages
= max(nr_mmu_pages
, KVM_MIN_ALLOC_MMU_PAGES
);
5931 return nr_mmu_pages
;
5934 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
5936 kvm_mmu_unload(vcpu
);
5937 free_mmu_pages(&vcpu
->arch
.root_mmu
);
5938 free_mmu_pages(&vcpu
->arch
.guest_mmu
);
5939 mmu_free_memory_caches(vcpu
);
5942 void kvm_mmu_module_exit(void)
5944 mmu_destroy_caches();
5945 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
5946 unregister_shrinker(&mmu_shrinker
);
5947 mmu_audit_disable();
5950 static int set_nx_huge_pages_recovery_ratio(const char *val
, const struct kernel_param
*kp
)
5952 unsigned int old_val
;
5955 old_val
= nx_huge_pages_recovery_ratio
;
5956 err
= param_set_uint(val
, kp
);
5960 if (READ_ONCE(nx_huge_pages
) &&
5961 !old_val
&& nx_huge_pages_recovery_ratio
) {
5964 mutex_lock(&kvm_lock
);
5966 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5967 wake_up_process(kvm
->arch
.nx_lpage_recovery_thread
);
5969 mutex_unlock(&kvm_lock
);
5975 static void kvm_recover_nx_lpages(struct kvm
*kvm
)
5978 struct kvm_mmu_page
*sp
;
5980 LIST_HEAD(invalid_list
);
5983 rcu_idx
= srcu_read_lock(&kvm
->srcu
);
5984 spin_lock(&kvm
->mmu_lock
);
5986 ratio
= READ_ONCE(nx_huge_pages_recovery_ratio
);
5987 to_zap
= ratio
? DIV_ROUND_UP(kvm
->stat
.nx_lpage_splits
, ratio
) : 0;
5988 for ( ; to_zap
; --to_zap
) {
5989 if (list_empty(&kvm
->arch
.lpage_disallowed_mmu_pages
))
5993 * We use a separate list instead of just using active_mmu_pages
5994 * because the number of lpage_disallowed pages is expected to
5995 * be relatively small compared to the total.
5997 sp
= list_first_entry(&kvm
->arch
.lpage_disallowed_mmu_pages
,
5998 struct kvm_mmu_page
,
5999 lpage_disallowed_link
);
6000 WARN_ON_ONCE(!sp
->lpage_disallowed
);
6001 if (sp
->tdp_mmu_page
)
6002 kvm_tdp_mmu_zap_gfn_range(kvm
, sp
->gfn
,
6003 sp
->gfn
+ KVM_PAGES_PER_HPAGE(sp
->role
.level
));
6005 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
6006 WARN_ON_ONCE(sp
->lpage_disallowed
);
6009 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
)) {
6010 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
6011 cond_resched_lock(&kvm
->mmu_lock
);
6014 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
6016 spin_unlock(&kvm
->mmu_lock
);
6017 srcu_read_unlock(&kvm
->srcu
, rcu_idx
);
6020 static long get_nx_lpage_recovery_timeout(u64 start_time
)
6022 return READ_ONCE(nx_huge_pages
) && READ_ONCE(nx_huge_pages_recovery_ratio
)
6023 ? start_time
+ 60 * HZ
- get_jiffies_64()
6024 : MAX_SCHEDULE_TIMEOUT
;
6027 static int kvm_nx_lpage_recovery_worker(struct kvm
*kvm
, uintptr_t data
)
6030 long remaining_time
;
6033 start_time
= get_jiffies_64();
6034 remaining_time
= get_nx_lpage_recovery_timeout(start_time
);
6036 set_current_state(TASK_INTERRUPTIBLE
);
6037 while (!kthread_should_stop() && remaining_time
> 0) {
6038 schedule_timeout(remaining_time
);
6039 remaining_time
= get_nx_lpage_recovery_timeout(start_time
);
6040 set_current_state(TASK_INTERRUPTIBLE
);
6043 set_current_state(TASK_RUNNING
);
6045 if (kthread_should_stop())
6048 kvm_recover_nx_lpages(kvm
);
6052 int kvm_mmu_post_init_vm(struct kvm
*kvm
)
6056 err
= kvm_vm_create_worker_thread(kvm
, kvm_nx_lpage_recovery_worker
, 0,
6057 "kvm-nx-lpage-recovery",
6058 &kvm
->arch
.nx_lpage_recovery_thread
);
6060 kthread_unpark(kvm
->arch
.nx_lpage_recovery_thread
);
6065 void kvm_mmu_pre_destroy_vm(struct kvm
*kvm
)
6067 if (kvm
->arch
.nx_lpage_recovery_thread
)
6068 kthread_stop(kvm
->arch
.nx_lpage_recovery_thread
);