1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
6 * machines without emulation or binary translation.
10 * Copyright (C) 2006 Qumranet, Inc.
11 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Avi Kivity <avi@qumranet.com>
21 #include "mmu_internal.h"
24 #include "kvm_cache_regs.h"
25 #include "kvm_emulate.h"
29 #include <linux/kvm_host.h>
30 #include <linux/types.h>
31 #include <linux/string.h>
33 #include <linux/highmem.h>
34 #include <linux/moduleparam.h>
35 #include <linux/export.h>
36 #include <linux/swap.h>
37 #include <linux/hugetlb.h>
38 #include <linux/compiler.h>
39 #include <linux/srcu.h>
40 #include <linux/slab.h>
41 #include <linux/sched/signal.h>
42 #include <linux/uaccess.h>
43 #include <linux/hash.h>
44 #include <linux/kern_levels.h>
45 #include <linux/kthread.h>
48 #include <asm/memtype.h>
49 #include <asm/cmpxchg.h>
51 #include <asm/set_memory.h>
53 #include <asm/kvm_page_track.h>
58 extern bool itlb_multihit_kvm_mitigation
;
60 int __read_mostly nx_huge_pages
= -1;
61 #ifdef CONFIG_PREEMPT_RT
62 /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */
63 static uint __read_mostly nx_huge_pages_recovery_ratio
= 0;
65 static uint __read_mostly nx_huge_pages_recovery_ratio
= 60;
68 static int set_nx_huge_pages(const char *val
, const struct kernel_param
*kp
);
69 static int set_nx_huge_pages_recovery_ratio(const char *val
, const struct kernel_param
*kp
);
71 static const struct kernel_param_ops nx_huge_pages_ops
= {
72 .set
= set_nx_huge_pages
,
73 .get
= param_get_bool
,
76 static const struct kernel_param_ops nx_huge_pages_recovery_ratio_ops
= {
77 .set
= set_nx_huge_pages_recovery_ratio
,
78 .get
= param_get_uint
,
81 module_param_cb(nx_huge_pages
, &nx_huge_pages_ops
, &nx_huge_pages
, 0644);
82 __MODULE_PARM_TYPE(nx_huge_pages
, "bool");
83 module_param_cb(nx_huge_pages_recovery_ratio
, &nx_huge_pages_recovery_ratio_ops
,
84 &nx_huge_pages_recovery_ratio
, 0644);
85 __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio
, "uint");
87 static bool __read_mostly force_flush_and_sync_on_reuse
;
88 module_param_named(flush_on_reuse
, force_flush_and_sync_on_reuse
, bool, 0644);
91 * When setting this variable to true it enables Two-Dimensional-Paging
92 * where the hardware walks 2 page tables:
93 * 1. the guest-virtual to guest-physical
94 * 2. while doing 1. it walks guest-physical to host-physical
95 * If the hardware supports that we don't need to do shadow paging.
97 bool tdp_enabled
= false;
99 static int max_huge_page_level __read_mostly
;
100 static int max_tdp_level __read_mostly
;
103 AUDIT_PRE_PAGE_FAULT
,
104 AUDIT_POST_PAGE_FAULT
,
106 AUDIT_POST_PTE_WRITE
,
113 module_param(dbg
, bool, 0644);
116 #define PTE_PREFETCH_NUM 8
118 #define PT32_LEVEL_BITS 10
120 #define PT32_LEVEL_SHIFT(level) \
121 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
123 #define PT32_LVL_OFFSET_MASK(level) \
124 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
125 * PT32_LEVEL_BITS))) - 1))
127 #define PT32_INDEX(address, level)\
128 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
131 #define PT32_BASE_ADDR_MASK PAGE_MASK
132 #define PT32_DIR_BASE_ADDR_MASK \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
134 #define PT32_LVL_ADDR_MASK(level) \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
136 * PT32_LEVEL_BITS))) - 1))
138 #include <trace/events/kvm.h>
140 /* make pte_list_desc fit well in cache lines */
141 #define PTE_LIST_EXT 15
143 struct pte_list_desc
{
144 u64
*sptes
[PTE_LIST_EXT
];
145 struct pte_list_desc
*more
;
148 struct kvm_shadow_walk_iterator
{
156 #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \
157 for (shadow_walk_init_using_root(&(_walker), (_vcpu), \
159 shadow_walk_okay(&(_walker)); \
160 shadow_walk_next(&(_walker)))
162 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
163 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
164 shadow_walk_okay(&(_walker)); \
165 shadow_walk_next(&(_walker)))
167 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
168 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
169 shadow_walk_okay(&(_walker)) && \
170 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
171 __shadow_walk_next(&(_walker), spte))
173 static struct kmem_cache
*pte_list_desc_cache
;
174 struct kmem_cache
*mmu_page_header_cache
;
175 static struct percpu_counter kvm_total_used_mmu_pages
;
177 static void mmu_spte_set(u64
*sptep
, u64 spte
);
178 static union kvm_mmu_page_role
179 kvm_mmu_calc_root_page_role(struct kvm_vcpu
*vcpu
);
181 struct kvm_mmu_role_regs
{
182 const unsigned long cr0
;
183 const unsigned long cr4
;
187 #define CREATE_TRACE_POINTS
188 #include "mmutrace.h"
191 * Yes, lot's of underscores. They're a hint that you probably shouldn't be
192 * reading from the role_regs. Once the mmu_role is constructed, it becomes
193 * the single source of truth for the MMU's state.
195 #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \
196 static inline bool ____is_##reg##_##name(struct kvm_mmu_role_regs *regs)\
198 return !!(regs->reg & flag); \
200 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0
, pg
, X86_CR0_PG
);
201 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0
, wp
, X86_CR0_WP
);
202 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4
, pse
, X86_CR4_PSE
);
203 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4
, pae
, X86_CR4_PAE
);
204 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4
, smep
, X86_CR4_SMEP
);
205 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4
, smap
, X86_CR4_SMAP
);
206 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4
, pke
, X86_CR4_PKE
);
207 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4
, la57
, X86_CR4_LA57
);
208 BUILD_MMU_ROLE_REGS_ACCESSOR(efer
, nx
, EFER_NX
);
209 BUILD_MMU_ROLE_REGS_ACCESSOR(efer
, lma
, EFER_LMA
);
212 * The MMU itself (with a valid role) is the single source of truth for the
213 * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The
214 * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1,
215 * and the vCPU may be incorrect/irrelevant.
217 #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \
218 static inline bool is_##reg##_##name(struct kvm_mmu *mmu) \
220 return !!(mmu->mmu_role. base_or_ext . reg##_##name); \
222 BUILD_MMU_ROLE_ACCESSOR(ext
, cr0
, pg
);
223 BUILD_MMU_ROLE_ACCESSOR(base
, cr0
, wp
);
224 BUILD_MMU_ROLE_ACCESSOR(ext
, cr4
, pse
);
225 BUILD_MMU_ROLE_ACCESSOR(ext
, cr4
, pae
);
226 BUILD_MMU_ROLE_ACCESSOR(ext
, cr4
, smep
);
227 BUILD_MMU_ROLE_ACCESSOR(ext
, cr4
, smap
);
228 BUILD_MMU_ROLE_ACCESSOR(ext
, cr4
, pke
);
229 BUILD_MMU_ROLE_ACCESSOR(ext
, cr4
, la57
);
230 BUILD_MMU_ROLE_ACCESSOR(base
, efer
, nx
);
232 static struct kvm_mmu_role_regs
vcpu_to_role_regs(struct kvm_vcpu
*vcpu
)
234 struct kvm_mmu_role_regs regs
= {
235 .cr0
= kvm_read_cr0_bits(vcpu
, KVM_MMU_CR0_ROLE_BITS
),
236 .cr4
= kvm_read_cr4_bits(vcpu
, KVM_MMU_CR4_ROLE_BITS
),
237 .efer
= vcpu
->arch
.efer
,
243 static int role_regs_to_root_level(struct kvm_mmu_role_regs
*regs
)
245 if (!____is_cr0_pg(regs
))
247 else if (____is_efer_lma(regs
))
248 return ____is_cr4_la57(regs
) ? PT64_ROOT_5LEVEL
:
250 else if (____is_cr4_pae(regs
))
251 return PT32E_ROOT_LEVEL
;
253 return PT32_ROOT_LEVEL
;
256 static inline bool kvm_available_flush_tlb_with_range(void)
258 return kvm_x86_ops
.tlb_remote_flush_with_range
;
261 static void kvm_flush_remote_tlbs_with_range(struct kvm
*kvm
,
262 struct kvm_tlb_range
*range
)
266 if (range
&& kvm_x86_ops
.tlb_remote_flush_with_range
)
267 ret
= static_call(kvm_x86_tlb_remote_flush_with_range
)(kvm
, range
);
270 kvm_flush_remote_tlbs(kvm
);
273 void kvm_flush_remote_tlbs_with_address(struct kvm
*kvm
,
274 u64 start_gfn
, u64 pages
)
276 struct kvm_tlb_range range
;
278 range
.start_gfn
= start_gfn
;
281 kvm_flush_remote_tlbs_with_range(kvm
, &range
);
284 static void mark_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, u64 gfn
,
287 u64 spte
= make_mmio_spte(vcpu
, gfn
, access
);
289 trace_mark_mmio_spte(sptep
, gfn
, spte
);
290 mmu_spte_set(sptep
, spte
);
293 static gfn_t
get_mmio_spte_gfn(u64 spte
)
295 u64 gpa
= spte
& shadow_nonpresent_or_rsvd_lower_gfn_mask
;
297 gpa
|= (spte
>> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN
)
298 & shadow_nonpresent_or_rsvd_mask
;
300 return gpa
>> PAGE_SHIFT
;
303 static unsigned get_mmio_spte_access(u64 spte
)
305 return spte
& shadow_mmio_access_mask
;
308 static bool check_mmio_spte(struct kvm_vcpu
*vcpu
, u64 spte
)
310 u64 kvm_gen
, spte_gen
, gen
;
312 gen
= kvm_vcpu_memslots(vcpu
)->generation
;
313 if (unlikely(gen
& KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS
))
316 kvm_gen
= gen
& MMIO_SPTE_GEN_MASK
;
317 spte_gen
= get_mmio_spte_generation(spte
);
319 trace_check_mmio_spte(spte
, kvm_gen
, spte_gen
);
320 return likely(kvm_gen
== spte_gen
);
323 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
324 struct x86_exception
*exception
)
326 /* Check if guest physical address doesn't exceed guest maximum */
327 if (kvm_vcpu_is_illegal_gpa(vcpu
, gpa
)) {
328 exception
->error_code
|= PFERR_RSVD_MASK
;
335 static int is_cpuid_PSE36(void)
340 static gfn_t
pse36_gfn_delta(u32 gpte
)
342 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
344 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
348 static void __set_spte(u64
*sptep
, u64 spte
)
350 WRITE_ONCE(*sptep
, spte
);
353 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
355 WRITE_ONCE(*sptep
, spte
);
358 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
360 return xchg(sptep
, spte
);
363 static u64
__get_spte_lockless(u64
*sptep
)
365 return READ_ONCE(*sptep
);
376 static void count_spte_clear(u64
*sptep
, u64 spte
)
378 struct kvm_mmu_page
*sp
= sptep_to_sp(sptep
);
380 if (is_shadow_present_pte(spte
))
383 /* Ensure the spte is completely set before we increase the count */
385 sp
->clear_spte_count
++;
388 static void __set_spte(u64
*sptep
, u64 spte
)
390 union split_spte
*ssptep
, sspte
;
392 ssptep
= (union split_spte
*)sptep
;
393 sspte
= (union split_spte
)spte
;
395 ssptep
->spte_high
= sspte
.spte_high
;
398 * If we map the spte from nonpresent to present, We should store
399 * the high bits firstly, then set present bit, so cpu can not
400 * fetch this spte while we are setting the spte.
404 WRITE_ONCE(ssptep
->spte_low
, sspte
.spte_low
);
407 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
409 union split_spte
*ssptep
, sspte
;
411 ssptep
= (union split_spte
*)sptep
;
412 sspte
= (union split_spte
)spte
;
414 WRITE_ONCE(ssptep
->spte_low
, sspte
.spte_low
);
417 * If we map the spte from present to nonpresent, we should clear
418 * present bit firstly to avoid vcpu fetch the old high bits.
422 ssptep
->spte_high
= sspte
.spte_high
;
423 count_spte_clear(sptep
, spte
);
426 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
428 union split_spte
*ssptep
, sspte
, orig
;
430 ssptep
= (union split_spte
*)sptep
;
431 sspte
= (union split_spte
)spte
;
433 /* xchg acts as a barrier before the setting of the high bits */
434 orig
.spte_low
= xchg(&ssptep
->spte_low
, sspte
.spte_low
);
435 orig
.spte_high
= ssptep
->spte_high
;
436 ssptep
->spte_high
= sspte
.spte_high
;
437 count_spte_clear(sptep
, spte
);
443 * The idea using the light way get the spte on x86_32 guest is from
444 * gup_get_pte (mm/gup.c).
446 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
447 * coalesces them and we are running out of the MMU lock. Therefore
448 * we need to protect against in-progress updates of the spte.
450 * Reading the spte while an update is in progress may get the old value
451 * for the high part of the spte. The race is fine for a present->non-present
452 * change (because the high part of the spte is ignored for non-present spte),
453 * but for a present->present change we must reread the spte.
455 * All such changes are done in two steps (present->non-present and
456 * non-present->present), hence it is enough to count the number of
457 * present->non-present updates: if it changed while reading the spte,
458 * we might have hit the race. This is done using clear_spte_count.
460 static u64
__get_spte_lockless(u64
*sptep
)
462 struct kvm_mmu_page
*sp
= sptep_to_sp(sptep
);
463 union split_spte spte
, *orig
= (union split_spte
*)sptep
;
467 count
= sp
->clear_spte_count
;
470 spte
.spte_low
= orig
->spte_low
;
473 spte
.spte_high
= orig
->spte_high
;
476 if (unlikely(spte
.spte_low
!= orig
->spte_low
||
477 count
!= sp
->clear_spte_count
))
484 static bool spte_has_volatile_bits(u64 spte
)
486 if (!is_shadow_present_pte(spte
))
490 * Always atomically update spte if it can be updated
491 * out of mmu-lock, it can ensure dirty bit is not lost,
492 * also, it can help us to get a stable is_writable_pte()
493 * to ensure tlb flush is not missed.
495 if (spte_can_locklessly_be_made_writable(spte
) ||
496 is_access_track_spte(spte
))
499 if (spte_ad_enabled(spte
)) {
500 if ((spte
& shadow_accessed_mask
) == 0 ||
501 (is_writable_pte(spte
) && (spte
& shadow_dirty_mask
) == 0))
508 /* Rules for using mmu_spte_set:
509 * Set the sptep from nonpresent to present.
510 * Note: the sptep being assigned *must* be either not present
511 * or in a state where the hardware will not attempt to update
514 static void mmu_spte_set(u64
*sptep
, u64 new_spte
)
516 WARN_ON(is_shadow_present_pte(*sptep
));
517 __set_spte(sptep
, new_spte
);
521 * Update the SPTE (excluding the PFN), but do not track changes in its
522 * accessed/dirty status.
524 static u64
mmu_spte_update_no_track(u64
*sptep
, u64 new_spte
)
526 u64 old_spte
= *sptep
;
528 WARN_ON(!is_shadow_present_pte(new_spte
));
530 if (!is_shadow_present_pte(old_spte
)) {
531 mmu_spte_set(sptep
, new_spte
);
535 if (!spte_has_volatile_bits(old_spte
))
536 __update_clear_spte_fast(sptep
, new_spte
);
538 old_spte
= __update_clear_spte_slow(sptep
, new_spte
);
540 WARN_ON(spte_to_pfn(old_spte
) != spte_to_pfn(new_spte
));
545 /* Rules for using mmu_spte_update:
546 * Update the state bits, it means the mapped pfn is not changed.
548 * Whenever we overwrite a writable spte with a read-only one we
549 * should flush remote TLBs. Otherwise rmap_write_protect
550 * will find a read-only spte, even though the writable spte
551 * might be cached on a CPU's TLB, the return value indicates this
554 * Returns true if the TLB needs to be flushed
556 static bool mmu_spte_update(u64
*sptep
, u64 new_spte
)
559 u64 old_spte
= mmu_spte_update_no_track(sptep
, new_spte
);
561 if (!is_shadow_present_pte(old_spte
))
565 * For the spte updated out of mmu-lock is safe, since
566 * we always atomically update it, see the comments in
567 * spte_has_volatile_bits().
569 if (spte_can_locklessly_be_made_writable(old_spte
) &&
570 !is_writable_pte(new_spte
))
574 * Flush TLB when accessed/dirty states are changed in the page tables,
575 * to guarantee consistency between TLB and page tables.
578 if (is_accessed_spte(old_spte
) && !is_accessed_spte(new_spte
)) {
580 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
583 if (is_dirty_spte(old_spte
) && !is_dirty_spte(new_spte
)) {
585 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
592 * Rules for using mmu_spte_clear_track_bits:
593 * It sets the sptep from present to nonpresent, and track the
594 * state bits, it is used to clear the last level sptep.
595 * Returns the old PTE.
597 static u64
mmu_spte_clear_track_bits(u64
*sptep
)
600 u64 old_spte
= *sptep
;
602 if (!spte_has_volatile_bits(old_spte
))
603 __update_clear_spte_fast(sptep
, 0ull);
605 old_spte
= __update_clear_spte_slow(sptep
, 0ull);
607 if (!is_shadow_present_pte(old_spte
))
610 pfn
= spte_to_pfn(old_spte
);
613 * KVM does not hold the refcount of the page used by
614 * kvm mmu, before reclaiming the page, we should
615 * unmap it from mmu first.
617 WARN_ON(!kvm_is_reserved_pfn(pfn
) && !page_count(pfn_to_page(pfn
)));
619 if (is_accessed_spte(old_spte
))
620 kvm_set_pfn_accessed(pfn
);
622 if (is_dirty_spte(old_spte
))
623 kvm_set_pfn_dirty(pfn
);
629 * Rules for using mmu_spte_clear_no_track:
630 * Directly clear spte without caring the state bits of sptep,
631 * it is used to set the upper level spte.
633 static void mmu_spte_clear_no_track(u64
*sptep
)
635 __update_clear_spte_fast(sptep
, 0ull);
638 static u64
mmu_spte_get_lockless(u64
*sptep
)
640 return __get_spte_lockless(sptep
);
643 /* Restore an acc-track PTE back to a regular PTE */
644 static u64
restore_acc_track_spte(u64 spte
)
647 u64 saved_bits
= (spte
>> SHADOW_ACC_TRACK_SAVED_BITS_SHIFT
)
648 & SHADOW_ACC_TRACK_SAVED_BITS_MASK
;
650 WARN_ON_ONCE(spte_ad_enabled(spte
));
651 WARN_ON_ONCE(!is_access_track_spte(spte
));
653 new_spte
&= ~shadow_acc_track_mask
;
654 new_spte
&= ~(SHADOW_ACC_TRACK_SAVED_BITS_MASK
<<
655 SHADOW_ACC_TRACK_SAVED_BITS_SHIFT
);
656 new_spte
|= saved_bits
;
661 /* Returns the Accessed status of the PTE and resets it at the same time. */
662 static bool mmu_spte_age(u64
*sptep
)
664 u64 spte
= mmu_spte_get_lockless(sptep
);
666 if (!is_accessed_spte(spte
))
669 if (spte_ad_enabled(spte
)) {
670 clear_bit((ffs(shadow_accessed_mask
) - 1),
671 (unsigned long *)sptep
);
674 * Capture the dirty status of the page, so that it doesn't get
675 * lost when the SPTE is marked for access tracking.
677 if (is_writable_pte(spte
))
678 kvm_set_pfn_dirty(spte_to_pfn(spte
));
680 spte
= mark_spte_for_access_track(spte
);
681 mmu_spte_update_no_track(sptep
, spte
);
687 static void walk_shadow_page_lockless_begin(struct kvm_vcpu
*vcpu
)
689 if (is_tdp_mmu(vcpu
->arch
.mmu
)) {
690 kvm_tdp_mmu_walk_lockless_begin();
693 * Prevent page table teardown by making any free-er wait during
694 * kvm_flush_remote_tlbs() IPI to all active vcpus.
699 * Make sure a following spte read is not reordered ahead of the write
702 smp_store_mb(vcpu
->mode
, READING_SHADOW_PAGE_TABLES
);
706 static void walk_shadow_page_lockless_end(struct kvm_vcpu
*vcpu
)
708 if (is_tdp_mmu(vcpu
->arch
.mmu
)) {
709 kvm_tdp_mmu_walk_lockless_end();
712 * Make sure the write to vcpu->mode is not reordered in front of
713 * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us
714 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
716 smp_store_release(&vcpu
->mode
, OUTSIDE_GUEST_MODE
);
721 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
, bool maybe_indirect
)
725 /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */
726 r
= kvm_mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
727 1 + PT64_ROOT_MAX_LEVEL
+ PTE_PREFETCH_NUM
);
730 r
= kvm_mmu_topup_memory_cache(&vcpu
->arch
.mmu_shadow_page_cache
,
731 PT64_ROOT_MAX_LEVEL
);
734 if (maybe_indirect
) {
735 r
= kvm_mmu_topup_memory_cache(&vcpu
->arch
.mmu_gfn_array_cache
,
736 PT64_ROOT_MAX_LEVEL
);
740 return kvm_mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
741 PT64_ROOT_MAX_LEVEL
);
744 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
746 kvm_mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
);
747 kvm_mmu_free_memory_cache(&vcpu
->arch
.mmu_shadow_page_cache
);
748 kvm_mmu_free_memory_cache(&vcpu
->arch
.mmu_gfn_array_cache
);
749 kvm_mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
);
752 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
754 return kvm_mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
);
757 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
759 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
762 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
764 if (!sp
->role
.direct
)
765 return sp
->gfns
[index
];
767 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
770 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
772 if (!sp
->role
.direct
) {
773 sp
->gfns
[index
] = gfn
;
777 if (WARN_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
)))
778 pr_err_ratelimited("gfn mismatch under direct page %llx "
779 "(expected %llx, got %llx)\n",
781 kvm_mmu_page_get_gfn(sp
, index
), gfn
);
785 * Return the pointer to the large page information for a given gfn,
786 * handling slots that are not large page aligned.
788 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
789 const struct kvm_memory_slot
*slot
, int level
)
793 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
794 return &slot
->arch
.lpage_info
[level
- 2][idx
];
797 static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot
*slot
,
798 gfn_t gfn
, int count
)
800 struct kvm_lpage_info
*linfo
;
803 for (i
= PG_LEVEL_2M
; i
<= KVM_MAX_HUGEPAGE_LEVEL
; ++i
) {
804 linfo
= lpage_info_slot(gfn
, slot
, i
);
805 linfo
->disallow_lpage
+= count
;
806 WARN_ON(linfo
->disallow_lpage
< 0);
810 void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot
*slot
, gfn_t gfn
)
812 update_gfn_disallow_lpage_count(slot
, gfn
, 1);
815 void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot
*slot
, gfn_t gfn
)
817 update_gfn_disallow_lpage_count(slot
, gfn
, -1);
820 static void account_shadowed(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
822 struct kvm_memslots
*slots
;
823 struct kvm_memory_slot
*slot
;
826 kvm
->arch
.indirect_shadow_pages
++;
828 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
829 slot
= __gfn_to_memslot(slots
, gfn
);
831 /* the non-leaf shadow pages are keeping readonly. */
832 if (sp
->role
.level
> PG_LEVEL_4K
)
833 return kvm_slot_page_track_add_page(kvm
, slot
, gfn
,
834 KVM_PAGE_TRACK_WRITE
);
836 kvm_mmu_gfn_disallow_lpage(slot
, gfn
);
839 void account_huge_nx_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
841 if (sp
->lpage_disallowed
)
844 ++kvm
->stat
.nx_lpage_splits
;
845 list_add_tail(&sp
->lpage_disallowed_link
,
846 &kvm
->arch
.lpage_disallowed_mmu_pages
);
847 sp
->lpage_disallowed
= true;
850 static void unaccount_shadowed(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
852 struct kvm_memslots
*slots
;
853 struct kvm_memory_slot
*slot
;
856 kvm
->arch
.indirect_shadow_pages
--;
858 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
859 slot
= __gfn_to_memslot(slots
, gfn
);
860 if (sp
->role
.level
> PG_LEVEL_4K
)
861 return kvm_slot_page_track_remove_page(kvm
, slot
, gfn
,
862 KVM_PAGE_TRACK_WRITE
);
864 kvm_mmu_gfn_allow_lpage(slot
, gfn
);
867 void unaccount_huge_nx_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
869 --kvm
->stat
.nx_lpage_splits
;
870 sp
->lpage_disallowed
= false;
871 list_del(&sp
->lpage_disallowed_link
);
874 static struct kvm_memory_slot
*
875 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
878 struct kvm_memory_slot
*slot
;
880 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
881 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
)
883 if (no_dirty_log
&& kvm_slot_dirty_track_enabled(slot
))
890 * About rmap_head encoding:
892 * If the bit zero of rmap_head->val is clear, then it points to the only spte
893 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
894 * pte_list_desc containing more mappings.
898 * Returns the number of pointers in the rmap chain, not counting the new one.
900 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
901 struct kvm_rmap_head
*rmap_head
)
903 struct pte_list_desc
*desc
;
906 if (!rmap_head
->val
) {
907 rmap_printk("%p %llx 0->1\n", spte
, *spte
);
908 rmap_head
->val
= (unsigned long)spte
;
909 } else if (!(rmap_head
->val
& 1)) {
910 rmap_printk("%p %llx 1->many\n", spte
, *spte
);
911 desc
= mmu_alloc_pte_list_desc(vcpu
);
912 desc
->sptes
[0] = (u64
*)rmap_head
->val
;
913 desc
->sptes
[1] = spte
;
914 rmap_head
->val
= (unsigned long)desc
| 1;
917 rmap_printk("%p %llx many->many\n", spte
, *spte
);
918 desc
= (struct pte_list_desc
*)(rmap_head
->val
& ~1ul);
919 while (desc
->sptes
[PTE_LIST_EXT
-1]) {
920 count
+= PTE_LIST_EXT
;
923 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
929 for (i
= 0; desc
->sptes
[i
]; ++i
)
931 desc
->sptes
[i
] = spte
;
937 pte_list_desc_remove_entry(struct kvm_rmap_head
*rmap_head
,
938 struct pte_list_desc
*desc
, int i
,
939 struct pte_list_desc
*prev_desc
)
943 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
945 desc
->sptes
[i
] = desc
->sptes
[j
];
946 desc
->sptes
[j
] = NULL
;
949 if (!prev_desc
&& !desc
->more
)
953 prev_desc
->more
= desc
->more
;
955 rmap_head
->val
= (unsigned long)desc
->more
| 1;
956 mmu_free_pte_list_desc(desc
);
959 static void __pte_list_remove(u64
*spte
, struct kvm_rmap_head
*rmap_head
)
961 struct pte_list_desc
*desc
;
962 struct pte_list_desc
*prev_desc
;
965 if (!rmap_head
->val
) {
966 pr_err("%s: %p 0->BUG\n", __func__
, spte
);
968 } else if (!(rmap_head
->val
& 1)) {
969 rmap_printk("%p 1->0\n", spte
);
970 if ((u64
*)rmap_head
->val
!= spte
) {
971 pr_err("%s: %p 1->BUG\n", __func__
, spte
);
976 rmap_printk("%p many->many\n", spte
);
977 desc
= (struct pte_list_desc
*)(rmap_head
->val
& ~1ul);
980 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
) {
981 if (desc
->sptes
[i
] == spte
) {
982 pte_list_desc_remove_entry(rmap_head
,
990 pr_err("%s: %p many->many\n", __func__
, spte
);
995 static void pte_list_remove(struct kvm_rmap_head
*rmap_head
, u64
*sptep
)
997 mmu_spte_clear_track_bits(sptep
);
998 __pte_list_remove(sptep
, rmap_head
);
1001 static struct kvm_rmap_head
*__gfn_to_rmap(gfn_t gfn
, int level
,
1002 const struct kvm_memory_slot
*slot
)
1006 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
1007 return &slot
->arch
.rmap
[level
- PG_LEVEL_4K
][idx
];
1010 static struct kvm_rmap_head
*gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
,
1011 struct kvm_mmu_page
*sp
)
1013 struct kvm_memslots
*slots
;
1014 struct kvm_memory_slot
*slot
;
1016 slots
= kvm_memslots_for_spte_role(kvm
, sp
->role
);
1017 slot
= __gfn_to_memslot(slots
, gfn
);
1018 return __gfn_to_rmap(gfn
, sp
->role
.level
, slot
);
1021 static bool rmap_can_add(struct kvm_vcpu
*vcpu
)
1023 struct kvm_mmu_memory_cache
*mc
;
1025 mc
= &vcpu
->arch
.mmu_pte_list_desc_cache
;
1026 return kvm_mmu_memory_cache_nr_free_objects(mc
);
1029 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1031 struct kvm_mmu_page
*sp
;
1032 struct kvm_rmap_head
*rmap_head
;
1034 sp
= sptep_to_sp(spte
);
1035 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
1036 rmap_head
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
);
1037 return pte_list_add(vcpu
, spte
, rmap_head
);
1040 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
1042 struct kvm_mmu_page
*sp
;
1044 struct kvm_rmap_head
*rmap_head
;
1046 sp
= sptep_to_sp(spte
);
1047 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
1048 rmap_head
= gfn_to_rmap(kvm
, gfn
, sp
);
1049 __pte_list_remove(spte
, rmap_head
);
1053 * Used by the following functions to iterate through the sptes linked by a
1054 * rmap. All fields are private and not assumed to be used outside.
1056 struct rmap_iterator
{
1057 /* private fields */
1058 struct pte_list_desc
*desc
; /* holds the sptep if not NULL */
1059 int pos
; /* index of the sptep */
1063 * Iteration must be started by this function. This should also be used after
1064 * removing/dropping sptes from the rmap link because in such cases the
1065 * information in the iterator may not be valid.
1067 * Returns sptep if found, NULL otherwise.
1069 static u64
*rmap_get_first(struct kvm_rmap_head
*rmap_head
,
1070 struct rmap_iterator
*iter
)
1074 if (!rmap_head
->val
)
1077 if (!(rmap_head
->val
& 1)) {
1079 sptep
= (u64
*)rmap_head
->val
;
1083 iter
->desc
= (struct pte_list_desc
*)(rmap_head
->val
& ~1ul);
1085 sptep
= iter
->desc
->sptes
[iter
->pos
];
1087 BUG_ON(!is_shadow_present_pte(*sptep
));
1092 * Must be used with a valid iterator: e.g. after rmap_get_first().
1094 * Returns sptep if found, NULL otherwise.
1096 static u64
*rmap_get_next(struct rmap_iterator
*iter
)
1101 if (iter
->pos
< PTE_LIST_EXT
- 1) {
1103 sptep
= iter
->desc
->sptes
[iter
->pos
];
1108 iter
->desc
= iter
->desc
->more
;
1112 /* desc->sptes[0] cannot be NULL */
1113 sptep
= iter
->desc
->sptes
[iter
->pos
];
1120 BUG_ON(!is_shadow_present_pte(*sptep
));
1124 #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \
1125 for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \
1126 _spte_; _spte_ = rmap_get_next(_iter_))
1128 static void drop_spte(struct kvm
*kvm
, u64
*sptep
)
1130 u64 old_spte
= mmu_spte_clear_track_bits(sptep
);
1132 if (is_shadow_present_pte(old_spte
))
1133 rmap_remove(kvm
, sptep
);
1137 static bool __drop_large_spte(struct kvm
*kvm
, u64
*sptep
)
1139 if (is_large_pte(*sptep
)) {
1140 WARN_ON(sptep_to_sp(sptep
)->role
.level
== PG_LEVEL_4K
);
1141 drop_spte(kvm
, sptep
);
1149 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1151 if (__drop_large_spte(vcpu
->kvm
, sptep
)) {
1152 struct kvm_mmu_page
*sp
= sptep_to_sp(sptep
);
1154 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, sp
->gfn
,
1155 KVM_PAGES_PER_HPAGE(sp
->role
.level
));
1160 * Write-protect on the specified @sptep, @pt_protect indicates whether
1161 * spte write-protection is caused by protecting shadow page table.
1163 * Note: write protection is difference between dirty logging and spte
1165 * - for dirty logging, the spte can be set to writable at anytime if
1166 * its dirty bitmap is properly set.
1167 * - for spte protection, the spte can be writable only after unsync-ing
1170 * Return true if tlb need be flushed.
1172 static bool spte_write_protect(u64
*sptep
, bool pt_protect
)
1176 if (!is_writable_pte(spte
) &&
1177 !(pt_protect
&& spte_can_locklessly_be_made_writable(spte
)))
1180 rmap_printk("spte %p %llx\n", sptep
, *sptep
);
1183 spte
&= ~shadow_mmu_writable_mask
;
1184 spte
= spte
& ~PT_WRITABLE_MASK
;
1186 return mmu_spte_update(sptep
, spte
);
1189 static bool __rmap_write_protect(struct kvm
*kvm
,
1190 struct kvm_rmap_head
*rmap_head
,
1194 struct rmap_iterator iter
;
1197 for_each_rmap_spte(rmap_head
, &iter
, sptep
)
1198 flush
|= spte_write_protect(sptep
, pt_protect
);
1203 static bool spte_clear_dirty(u64
*sptep
)
1207 rmap_printk("spte %p %llx\n", sptep
, *sptep
);
1209 MMU_WARN_ON(!spte_ad_enabled(spte
));
1210 spte
&= ~shadow_dirty_mask
;
1211 return mmu_spte_update(sptep
, spte
);
1214 static bool spte_wrprot_for_clear_dirty(u64
*sptep
)
1216 bool was_writable
= test_and_clear_bit(PT_WRITABLE_SHIFT
,
1217 (unsigned long *)sptep
);
1218 if (was_writable
&& !spte_ad_enabled(*sptep
))
1219 kvm_set_pfn_dirty(spte_to_pfn(*sptep
));
1221 return was_writable
;
1225 * Gets the GFN ready for another round of dirty logging by clearing the
1226 * - D bit on ad-enabled SPTEs, and
1227 * - W bit on ad-disabled SPTEs.
1228 * Returns true iff any D or W bits were cleared.
1230 static bool __rmap_clear_dirty(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1231 const struct kvm_memory_slot
*slot
)
1234 struct rmap_iterator iter
;
1237 for_each_rmap_spte(rmap_head
, &iter
, sptep
)
1238 if (spte_ad_need_write_protect(*sptep
))
1239 flush
|= spte_wrprot_for_clear_dirty(sptep
);
1241 flush
|= spte_clear_dirty(sptep
);
1247 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1248 * @kvm: kvm instance
1249 * @slot: slot to protect
1250 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1251 * @mask: indicates which pages we should protect
1253 * Used when we do not need to care about huge page mappings.
1255 static void kvm_mmu_write_protect_pt_masked(struct kvm
*kvm
,
1256 struct kvm_memory_slot
*slot
,
1257 gfn_t gfn_offset
, unsigned long mask
)
1259 struct kvm_rmap_head
*rmap_head
;
1261 if (is_tdp_mmu_enabled(kvm
))
1262 kvm_tdp_mmu_clear_dirty_pt_masked(kvm
, slot
,
1263 slot
->base_gfn
+ gfn_offset
, mask
, true);
1265 if (!kvm_memslots_have_rmaps(kvm
))
1269 rmap_head
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1271 __rmap_write_protect(kvm
, rmap_head
, false);
1273 /* clear the first set bit */
1279 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write
1280 * protect the page if the D-bit isn't supported.
1281 * @kvm: kvm instance
1282 * @slot: slot to clear D-bit
1283 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1284 * @mask: indicates which pages we should clear D-bit
1286 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1288 static void kvm_mmu_clear_dirty_pt_masked(struct kvm
*kvm
,
1289 struct kvm_memory_slot
*slot
,
1290 gfn_t gfn_offset
, unsigned long mask
)
1292 struct kvm_rmap_head
*rmap_head
;
1294 if (is_tdp_mmu_enabled(kvm
))
1295 kvm_tdp_mmu_clear_dirty_pt_masked(kvm
, slot
,
1296 slot
->base_gfn
+ gfn_offset
, mask
, false);
1298 if (!kvm_memslots_have_rmaps(kvm
))
1302 rmap_head
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1304 __rmap_clear_dirty(kvm
, rmap_head
, slot
);
1306 /* clear the first set bit */
1312 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1315 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1316 * enable dirty logging for them.
1318 * We need to care about huge page mappings: e.g. during dirty logging we may
1319 * have such mappings.
1321 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm
*kvm
,
1322 struct kvm_memory_slot
*slot
,
1323 gfn_t gfn_offset
, unsigned long mask
)
1326 * Huge pages are NOT write protected when we start dirty logging in
1327 * initially-all-set mode; must write protect them here so that they
1328 * are split to 4K on the first write.
1330 * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn
1331 * of memslot has no such restriction, so the range can cross two large
1334 if (kvm_dirty_log_manual_protect_and_init_set(kvm
)) {
1335 gfn_t start
= slot
->base_gfn
+ gfn_offset
+ __ffs(mask
);
1336 gfn_t end
= slot
->base_gfn
+ gfn_offset
+ __fls(mask
);
1338 kvm_mmu_slot_gfn_write_protect(kvm
, slot
, start
, PG_LEVEL_2M
);
1340 /* Cross two large pages? */
1341 if (ALIGN(start
<< PAGE_SHIFT
, PMD_SIZE
) !=
1342 ALIGN(end
<< PAGE_SHIFT
, PMD_SIZE
))
1343 kvm_mmu_slot_gfn_write_protect(kvm
, slot
, end
,
1347 /* Now handle 4K PTEs. */
1348 if (kvm_x86_ops
.cpu_dirty_log_size
)
1349 kvm_mmu_clear_dirty_pt_masked(kvm
, slot
, gfn_offset
, mask
);
1351 kvm_mmu_write_protect_pt_masked(kvm
, slot
, gfn_offset
, mask
);
1354 int kvm_cpu_dirty_log_size(void)
1356 return kvm_x86_ops
.cpu_dirty_log_size
;
1359 bool kvm_mmu_slot_gfn_write_protect(struct kvm
*kvm
,
1360 struct kvm_memory_slot
*slot
, u64 gfn
,
1363 struct kvm_rmap_head
*rmap_head
;
1365 bool write_protected
= false;
1367 if (kvm_memslots_have_rmaps(kvm
)) {
1368 for (i
= min_level
; i
<= KVM_MAX_HUGEPAGE_LEVEL
; ++i
) {
1369 rmap_head
= __gfn_to_rmap(gfn
, i
, slot
);
1370 write_protected
|= __rmap_write_protect(kvm
, rmap_head
, true);
1374 if (is_tdp_mmu_enabled(kvm
))
1376 kvm_tdp_mmu_write_protect_gfn(kvm
, slot
, gfn
, min_level
);
1378 return write_protected
;
1381 static bool rmap_write_protect(struct kvm_vcpu
*vcpu
, u64 gfn
)
1383 struct kvm_memory_slot
*slot
;
1385 slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
1386 return kvm_mmu_slot_gfn_write_protect(vcpu
->kvm
, slot
, gfn
, PG_LEVEL_4K
);
1389 static bool kvm_zap_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1390 const struct kvm_memory_slot
*slot
)
1393 struct rmap_iterator iter
;
1396 while ((sptep
= rmap_get_first(rmap_head
, &iter
))) {
1397 rmap_printk("spte %p %llx.\n", sptep
, *sptep
);
1399 pte_list_remove(rmap_head
, sptep
);
1406 static bool kvm_unmap_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1407 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1410 return kvm_zap_rmapp(kvm
, rmap_head
, slot
);
1413 static bool kvm_set_pte_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1414 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1418 struct rmap_iterator iter
;
1423 WARN_ON(pte_huge(pte
));
1424 new_pfn
= pte_pfn(pte
);
1427 for_each_rmap_spte(rmap_head
, &iter
, sptep
) {
1428 rmap_printk("spte %p %llx gfn %llx (%d)\n",
1429 sptep
, *sptep
, gfn
, level
);
1433 if (pte_write(pte
)) {
1434 pte_list_remove(rmap_head
, sptep
);
1437 new_spte
= kvm_mmu_changed_pte_notifier_make_spte(
1440 mmu_spte_clear_track_bits(sptep
);
1441 mmu_spte_set(sptep
, new_spte
);
1445 if (need_flush
&& kvm_available_flush_tlb_with_range()) {
1446 kvm_flush_remote_tlbs_with_address(kvm
, gfn
, 1);
1453 struct slot_rmap_walk_iterator
{
1455 const struct kvm_memory_slot
*slot
;
1461 /* output fields. */
1463 struct kvm_rmap_head
*rmap
;
1466 /* private field. */
1467 struct kvm_rmap_head
*end_rmap
;
1471 rmap_walk_init_level(struct slot_rmap_walk_iterator
*iterator
, int level
)
1473 iterator
->level
= level
;
1474 iterator
->gfn
= iterator
->start_gfn
;
1475 iterator
->rmap
= __gfn_to_rmap(iterator
->gfn
, level
, iterator
->slot
);
1476 iterator
->end_rmap
= __gfn_to_rmap(iterator
->end_gfn
, level
,
1481 slot_rmap_walk_init(struct slot_rmap_walk_iterator
*iterator
,
1482 const struct kvm_memory_slot
*slot
, int start_level
,
1483 int end_level
, gfn_t start_gfn
, gfn_t end_gfn
)
1485 iterator
->slot
= slot
;
1486 iterator
->start_level
= start_level
;
1487 iterator
->end_level
= end_level
;
1488 iterator
->start_gfn
= start_gfn
;
1489 iterator
->end_gfn
= end_gfn
;
1491 rmap_walk_init_level(iterator
, iterator
->start_level
);
1494 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator
*iterator
)
1496 return !!iterator
->rmap
;
1499 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator
*iterator
)
1501 if (++iterator
->rmap
<= iterator
->end_rmap
) {
1502 iterator
->gfn
+= (1UL << KVM_HPAGE_GFN_SHIFT(iterator
->level
));
1506 if (++iterator
->level
> iterator
->end_level
) {
1507 iterator
->rmap
= NULL
;
1511 rmap_walk_init_level(iterator
, iterator
->level
);
1514 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1515 _start_gfn, _end_gfn, _iter_) \
1516 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1517 _end_level_, _start_gfn, _end_gfn); \
1518 slot_rmap_walk_okay(_iter_); \
1519 slot_rmap_walk_next(_iter_))
1521 typedef bool (*rmap_handler_t
)(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1522 struct kvm_memory_slot
*slot
, gfn_t gfn
,
1523 int level
, pte_t pte
);
1525 static __always_inline
bool kvm_handle_gfn_range(struct kvm
*kvm
,
1526 struct kvm_gfn_range
*range
,
1527 rmap_handler_t handler
)
1529 struct slot_rmap_walk_iterator iterator
;
1532 for_each_slot_rmap_range(range
->slot
, PG_LEVEL_4K
, KVM_MAX_HUGEPAGE_LEVEL
,
1533 range
->start
, range
->end
- 1, &iterator
)
1534 ret
|= handler(kvm
, iterator
.rmap
, range
->slot
, iterator
.gfn
,
1535 iterator
.level
, range
->pte
);
1540 bool kvm_unmap_gfn_range(struct kvm
*kvm
, struct kvm_gfn_range
*range
)
1544 if (kvm_memslots_have_rmaps(kvm
))
1545 flush
= kvm_handle_gfn_range(kvm
, range
, kvm_unmap_rmapp
);
1547 if (is_tdp_mmu_enabled(kvm
))
1548 flush
|= kvm_tdp_mmu_unmap_gfn_range(kvm
, range
, flush
);
1553 bool kvm_set_spte_gfn(struct kvm
*kvm
, struct kvm_gfn_range
*range
)
1557 if (kvm_memslots_have_rmaps(kvm
))
1558 flush
= kvm_handle_gfn_range(kvm
, range
, kvm_set_pte_rmapp
);
1560 if (is_tdp_mmu_enabled(kvm
))
1561 flush
|= kvm_tdp_mmu_set_spte_gfn(kvm
, range
);
1566 static bool kvm_age_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1567 struct kvm_memory_slot
*slot
, gfn_t gfn
, int level
,
1571 struct rmap_iterator iter
;
1574 for_each_rmap_spte(rmap_head
, &iter
, sptep
)
1575 young
|= mmu_spte_age(sptep
);
1580 static bool kvm_test_age_rmapp(struct kvm
*kvm
, struct kvm_rmap_head
*rmap_head
,
1581 struct kvm_memory_slot
*slot
, gfn_t gfn
,
1582 int level
, pte_t unused
)
1585 struct rmap_iterator iter
;
1587 for_each_rmap_spte(rmap_head
, &iter
, sptep
)
1588 if (is_accessed_spte(*sptep
))
1593 #define RMAP_RECYCLE_THRESHOLD 1000
1595 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1597 struct kvm_rmap_head
*rmap_head
;
1598 struct kvm_mmu_page
*sp
;
1600 sp
= sptep_to_sp(spte
);
1602 rmap_head
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
);
1604 kvm_unmap_rmapp(vcpu
->kvm
, rmap_head
, NULL
, gfn
, sp
->role
.level
, __pte(0));
1605 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, sp
->gfn
,
1606 KVM_PAGES_PER_HPAGE(sp
->role
.level
));
1609 bool kvm_age_gfn(struct kvm
*kvm
, struct kvm_gfn_range
*range
)
1613 if (kvm_memslots_have_rmaps(kvm
))
1614 young
= kvm_handle_gfn_range(kvm
, range
, kvm_age_rmapp
);
1616 if (is_tdp_mmu_enabled(kvm
))
1617 young
|= kvm_tdp_mmu_age_gfn_range(kvm
, range
);
1622 bool kvm_test_age_gfn(struct kvm
*kvm
, struct kvm_gfn_range
*range
)
1626 if (kvm_memslots_have_rmaps(kvm
))
1627 young
= kvm_handle_gfn_range(kvm
, range
, kvm_test_age_rmapp
);
1629 if (is_tdp_mmu_enabled(kvm
))
1630 young
|= kvm_tdp_mmu_test_age_gfn(kvm
, range
);
1636 static int is_empty_shadow_page(u64
*spt
)
1641 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1642 if (is_shadow_present_pte(*pos
)) {
1643 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1652 * This value is the sum of all of the kvm instances's
1653 * kvm->arch.n_used_mmu_pages values. We need a global,
1654 * aggregate version in order to make the slab shrinker
1657 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, unsigned long nr
)
1659 kvm
->arch
.n_used_mmu_pages
+= nr
;
1660 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1663 static void kvm_mmu_free_page(struct kvm_mmu_page
*sp
)
1665 MMU_WARN_ON(!is_empty_shadow_page(sp
->spt
));
1666 hlist_del(&sp
->hash_link
);
1667 list_del(&sp
->link
);
1668 free_page((unsigned long)sp
->spt
);
1669 if (!sp
->role
.direct
)
1670 free_page((unsigned long)sp
->gfns
);
1671 kmem_cache_free(mmu_page_header_cache
, sp
);
1674 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1676 return hash_64(gfn
, KVM_MMU_HASH_SHIFT
);
1679 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1680 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1685 pte_list_add(vcpu
, parent_pte
, &sp
->parent_ptes
);
1688 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1691 __pte_list_remove(parent_pte
, &sp
->parent_ptes
);
1694 static void drop_parent_pte(struct kvm_mmu_page
*sp
,
1697 mmu_page_remove_parent_pte(sp
, parent_pte
);
1698 mmu_spte_clear_no_track(parent_pte
);
1701 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
, int direct
)
1703 struct kvm_mmu_page
*sp
;
1705 sp
= kvm_mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
);
1706 sp
->spt
= kvm_mmu_memory_cache_alloc(&vcpu
->arch
.mmu_shadow_page_cache
);
1708 sp
->gfns
= kvm_mmu_memory_cache_alloc(&vcpu
->arch
.mmu_gfn_array_cache
);
1709 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1712 * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages()
1713 * depends on valid pages being added to the head of the list. See
1714 * comments in kvm_zap_obsolete_pages().
1716 sp
->mmu_valid_gen
= vcpu
->kvm
->arch
.mmu_valid_gen
;
1717 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1718 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1722 static void mark_unsync(u64
*spte
);
1723 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1726 struct rmap_iterator iter
;
1728 for_each_rmap_spte(&sp
->parent_ptes
, &iter
, sptep
) {
1733 static void mark_unsync(u64
*spte
)
1735 struct kvm_mmu_page
*sp
;
1738 sp
= sptep_to_sp(spte
);
1739 index
= spte
- sp
->spt
;
1740 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1742 if (sp
->unsync_children
++)
1744 kvm_mmu_mark_parents_unsync(sp
);
1747 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1748 struct kvm_mmu_page
*sp
)
1753 #define KVM_PAGE_ARRAY_NR 16
1755 struct kvm_mmu_pages
{
1756 struct mmu_page_and_offset
{
1757 struct kvm_mmu_page
*sp
;
1759 } page
[KVM_PAGE_ARRAY_NR
];
1763 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1769 for (i
=0; i
< pvec
->nr
; i
++)
1770 if (pvec
->page
[i
].sp
== sp
)
1773 pvec
->page
[pvec
->nr
].sp
= sp
;
1774 pvec
->page
[pvec
->nr
].idx
= idx
;
1776 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1779 static inline void clear_unsync_child_bit(struct kvm_mmu_page
*sp
, int idx
)
1781 --sp
->unsync_children
;
1782 WARN_ON((int)sp
->unsync_children
< 0);
1783 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1786 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1787 struct kvm_mmu_pages
*pvec
)
1789 int i
, ret
, nr_unsync_leaf
= 0;
1791 for_each_set_bit(i
, sp
->unsync_child_bitmap
, 512) {
1792 struct kvm_mmu_page
*child
;
1793 u64 ent
= sp
->spt
[i
];
1795 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
)) {
1796 clear_unsync_child_bit(sp
, i
);
1800 child
= to_shadow_page(ent
& PT64_BASE_ADDR_MASK
);
1802 if (child
->unsync_children
) {
1803 if (mmu_pages_add(pvec
, child
, i
))
1806 ret
= __mmu_unsync_walk(child
, pvec
);
1808 clear_unsync_child_bit(sp
, i
);
1810 } else if (ret
> 0) {
1811 nr_unsync_leaf
+= ret
;
1814 } else if (child
->unsync
) {
1816 if (mmu_pages_add(pvec
, child
, i
))
1819 clear_unsync_child_bit(sp
, i
);
1822 return nr_unsync_leaf
;
1825 #define INVALID_INDEX (-1)
1827 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1828 struct kvm_mmu_pages
*pvec
)
1831 if (!sp
->unsync_children
)
1834 mmu_pages_add(pvec
, sp
, INVALID_INDEX
);
1835 return __mmu_unsync_walk(sp
, pvec
);
1838 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1840 WARN_ON(!sp
->unsync
);
1841 trace_kvm_mmu_sync_page(sp
);
1843 --kvm
->stat
.mmu_unsync
;
1846 static bool kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1847 struct list_head
*invalid_list
);
1848 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1849 struct list_head
*invalid_list
);
1851 #define for_each_valid_sp(_kvm, _sp, _list) \
1852 hlist_for_each_entry(_sp, _list, hash_link) \
1853 if (is_obsolete_sp((_kvm), (_sp))) { \
1856 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1857 for_each_valid_sp(_kvm, _sp, \
1858 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \
1859 if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else
1861 static bool kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1862 struct list_head
*invalid_list
)
1864 if (vcpu
->arch
.mmu
->sync_page(vcpu
, sp
) == 0) {
1865 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1872 static bool kvm_mmu_remote_flush_or_zap(struct kvm
*kvm
,
1873 struct list_head
*invalid_list
,
1876 if (!remote_flush
&& list_empty(invalid_list
))
1879 if (!list_empty(invalid_list
))
1880 kvm_mmu_commit_zap_page(kvm
, invalid_list
);
1882 kvm_flush_remote_tlbs(kvm
);
1886 static void kvm_mmu_flush_or_zap(struct kvm_vcpu
*vcpu
,
1887 struct list_head
*invalid_list
,
1888 bool remote_flush
, bool local_flush
)
1890 if (kvm_mmu_remote_flush_or_zap(vcpu
->kvm
, invalid_list
, remote_flush
))
1894 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1897 #ifdef CONFIG_KVM_MMU_AUDIT
1898 #include "mmu_audit.c"
1900 static void kvm_mmu_audit(struct kvm_vcpu
*vcpu
, int point
) { }
1901 static void mmu_audit_disable(void) { }
1904 static bool is_obsolete_sp(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1906 return sp
->role
.invalid
||
1907 unlikely(sp
->mmu_valid_gen
!= kvm
->arch
.mmu_valid_gen
);
1910 struct mmu_page_path
{
1911 struct kvm_mmu_page
*parent
[PT64_ROOT_MAX_LEVEL
];
1912 unsigned int idx
[PT64_ROOT_MAX_LEVEL
];
1915 #define for_each_sp(pvec, sp, parents, i) \
1916 for (i = mmu_pages_first(&pvec, &parents); \
1917 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1918 i = mmu_pages_next(&pvec, &parents, i))
1920 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1921 struct mmu_page_path
*parents
,
1926 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1927 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1928 unsigned idx
= pvec
->page
[n
].idx
;
1929 int level
= sp
->role
.level
;
1931 parents
->idx
[level
-1] = idx
;
1932 if (level
== PG_LEVEL_4K
)
1935 parents
->parent
[level
-2] = sp
;
1941 static int mmu_pages_first(struct kvm_mmu_pages
*pvec
,
1942 struct mmu_page_path
*parents
)
1944 struct kvm_mmu_page
*sp
;
1950 WARN_ON(pvec
->page
[0].idx
!= INVALID_INDEX
);
1952 sp
= pvec
->page
[0].sp
;
1953 level
= sp
->role
.level
;
1954 WARN_ON(level
== PG_LEVEL_4K
);
1956 parents
->parent
[level
-2] = sp
;
1958 /* Also set up a sentinel. Further entries in pvec are all
1959 * children of sp, so this element is never overwritten.
1961 parents
->parent
[level
-1] = NULL
;
1962 return mmu_pages_next(pvec
, parents
, 0);
1965 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1967 struct kvm_mmu_page
*sp
;
1968 unsigned int level
= 0;
1971 unsigned int idx
= parents
->idx
[level
];
1972 sp
= parents
->parent
[level
];
1976 WARN_ON(idx
== INVALID_INDEX
);
1977 clear_unsync_child_bit(sp
, idx
);
1979 } while (!sp
->unsync_children
);
1982 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1983 struct kvm_mmu_page
*parent
)
1986 struct kvm_mmu_page
*sp
;
1987 struct mmu_page_path parents
;
1988 struct kvm_mmu_pages pages
;
1989 LIST_HEAD(invalid_list
);
1992 while (mmu_unsync_walk(parent
, &pages
)) {
1993 bool protected = false;
1995 for_each_sp(pages
, sp
, parents
, i
)
1996 protected |= rmap_write_protect(vcpu
, sp
->gfn
);
1999 kvm_flush_remote_tlbs(vcpu
->kvm
);
2003 for_each_sp(pages
, sp
, parents
, i
) {
2004 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
2005 flush
|= kvm_sync_page(vcpu
, sp
, &invalid_list
);
2006 mmu_pages_clear_parents(&parents
);
2008 if (need_resched() || rwlock_needbreak(&vcpu
->kvm
->mmu_lock
)) {
2009 kvm_mmu_flush_or_zap(vcpu
, &invalid_list
, false, flush
);
2010 cond_resched_rwlock_write(&vcpu
->kvm
->mmu_lock
);
2015 kvm_mmu_flush_or_zap(vcpu
, &invalid_list
, false, flush
);
2018 static void __clear_sp_write_flooding_count(struct kvm_mmu_page
*sp
)
2020 atomic_set(&sp
->write_flooding_count
, 0);
2023 static void clear_sp_write_flooding_count(u64
*spte
)
2025 __clear_sp_write_flooding_count(sptep_to_sp(spte
));
2028 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
2033 unsigned int access
)
2035 bool direct_mmu
= vcpu
->arch
.mmu
->direct_map
;
2036 union kvm_mmu_page_role role
;
2037 struct hlist_head
*sp_list
;
2039 struct kvm_mmu_page
*sp
;
2041 LIST_HEAD(invalid_list
);
2043 role
= vcpu
->arch
.mmu
->mmu_role
.base
;
2045 role
.direct
= direct
;
2047 role
.gpte_is_8_bytes
= true;
2048 role
.access
= access
;
2049 if (!direct_mmu
&& vcpu
->arch
.mmu
->root_level
<= PT32_ROOT_LEVEL
) {
2050 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
2051 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
2052 role
.quadrant
= quadrant
;
2055 sp_list
= &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)];
2056 for_each_valid_sp(vcpu
->kvm
, sp
, sp_list
) {
2057 if (sp
->gfn
!= gfn
) {
2062 if (sp
->role
.word
!= role
.word
) {
2064 * If the guest is creating an upper-level page, zap
2065 * unsync pages for the same gfn. While it's possible
2066 * the guest is using recursive page tables, in all
2067 * likelihood the guest has stopped using the unsync
2068 * page and is installing a completely unrelated page.
2069 * Unsync pages must not be left as is, because the new
2070 * upper-level page will be write-protected.
2072 if (level
> PG_LEVEL_4K
&& sp
->unsync
)
2073 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
2079 goto trace_get_page
;
2083 * The page is good, but is stale. kvm_sync_page does
2084 * get the latest guest state, but (unlike mmu_unsync_children)
2085 * it doesn't write-protect the page or mark it synchronized!
2086 * This way the validity of the mapping is ensured, but the
2087 * overhead of write protection is not incurred until the
2088 * guest invalidates the TLB mapping. This allows multiple
2089 * SPs for a single gfn to be unsync.
2091 * If the sync fails, the page is zapped. If so, break
2092 * in order to rebuild it.
2094 if (!kvm_sync_page(vcpu
, sp
, &invalid_list
))
2097 WARN_ON(!list_empty(&invalid_list
));
2098 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
2101 if (sp
->unsync_children
)
2102 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
2104 __clear_sp_write_flooding_count(sp
);
2107 trace_kvm_mmu_get_page(sp
, false);
2111 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
2113 sp
= kvm_mmu_alloc_page(vcpu
, direct
);
2117 hlist_add_head(&sp
->hash_link
, sp_list
);
2119 account_shadowed(vcpu
->kvm
, sp
);
2120 if (level
== PG_LEVEL_4K
&& rmap_write_protect(vcpu
, gfn
))
2121 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, gfn
, 1);
2123 trace_kvm_mmu_get_page(sp
, true);
2125 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2127 if (collisions
> vcpu
->kvm
->stat
.max_mmu_page_hash_collisions
)
2128 vcpu
->kvm
->stat
.max_mmu_page_hash_collisions
= collisions
;
2132 static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator
*iterator
,
2133 struct kvm_vcpu
*vcpu
, hpa_t root
,
2136 iterator
->addr
= addr
;
2137 iterator
->shadow_addr
= root
;
2138 iterator
->level
= vcpu
->arch
.mmu
->shadow_root_level
;
2140 if (iterator
->level
== PT64_ROOT_4LEVEL
&&
2141 vcpu
->arch
.mmu
->root_level
< PT64_ROOT_4LEVEL
&&
2142 !vcpu
->arch
.mmu
->direct_map
)
2145 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
2147 * prev_root is currently only used for 64-bit hosts. So only
2148 * the active root_hpa is valid here.
2150 BUG_ON(root
!= vcpu
->arch
.mmu
->root_hpa
);
2152 iterator
->shadow_addr
2153 = vcpu
->arch
.mmu
->pae_root
[(addr
>> 30) & 3];
2154 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
2156 if (!iterator
->shadow_addr
)
2157 iterator
->level
= 0;
2161 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
2162 struct kvm_vcpu
*vcpu
, u64 addr
)
2164 shadow_walk_init_using_root(iterator
, vcpu
, vcpu
->arch
.mmu
->root_hpa
,
2168 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
2170 if (iterator
->level
< PG_LEVEL_4K
)
2173 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
2174 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
2178 static void __shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
,
2181 if (is_last_spte(spte
, iterator
->level
)) {
2182 iterator
->level
= 0;
2186 iterator
->shadow_addr
= spte
& PT64_BASE_ADDR_MASK
;
2190 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
2192 __shadow_walk_next(iterator
, *iterator
->sptep
);
2195 static void link_shadow_page(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2196 struct kvm_mmu_page
*sp
)
2200 BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK
!= PT_WRITABLE_MASK
);
2202 spte
= make_nonleaf_spte(sp
->spt
, sp_ad_disabled(sp
));
2204 mmu_spte_set(sptep
, spte
);
2206 mmu_page_add_parent_pte(vcpu
, sp
, sptep
);
2208 if (sp
->unsync_children
|| sp
->unsync
)
2212 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2213 unsigned direct_access
)
2215 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
2216 struct kvm_mmu_page
*child
;
2219 * For the direct sp, if the guest pte's dirty bit
2220 * changed form clean to dirty, it will corrupt the
2221 * sp's access: allow writable in the read-only sp,
2222 * so we should update the spte at this point to get
2223 * a new sp with the correct access.
2225 child
= to_shadow_page(*sptep
& PT64_BASE_ADDR_MASK
);
2226 if (child
->role
.access
== direct_access
)
2229 drop_parent_pte(child
, sptep
);
2230 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, child
->gfn
, 1);
2234 /* Returns the number of zapped non-leaf child shadow pages. */
2235 static int mmu_page_zap_pte(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2236 u64
*spte
, struct list_head
*invalid_list
)
2239 struct kvm_mmu_page
*child
;
2242 if (is_shadow_present_pte(pte
)) {
2243 if (is_last_spte(pte
, sp
->role
.level
)) {
2244 drop_spte(kvm
, spte
);
2245 if (is_large_pte(pte
))
2248 child
= to_shadow_page(pte
& PT64_BASE_ADDR_MASK
);
2249 drop_parent_pte(child
, spte
);
2252 * Recursively zap nested TDP SPs, parentless SPs are
2253 * unlikely to be used again in the near future. This
2254 * avoids retaining a large number of stale nested SPs.
2256 if (tdp_enabled
&& invalid_list
&&
2257 child
->role
.guest_mode
&& !child
->parent_ptes
.val
)
2258 return kvm_mmu_prepare_zap_page(kvm
, child
,
2261 } else if (is_mmio_spte(pte
)) {
2262 mmu_spte_clear_no_track(spte
);
2267 static int kvm_mmu_page_unlink_children(struct kvm
*kvm
,
2268 struct kvm_mmu_page
*sp
,
2269 struct list_head
*invalid_list
)
2274 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2275 zapped
+= mmu_page_zap_pte(kvm
, sp
, sp
->spt
+ i
, invalid_list
);
2280 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2283 struct rmap_iterator iter
;
2285 while ((sptep
= rmap_get_first(&sp
->parent_ptes
, &iter
)))
2286 drop_parent_pte(sp
, sptep
);
2289 static int mmu_zap_unsync_children(struct kvm
*kvm
,
2290 struct kvm_mmu_page
*parent
,
2291 struct list_head
*invalid_list
)
2294 struct mmu_page_path parents
;
2295 struct kvm_mmu_pages pages
;
2297 if (parent
->role
.level
== PG_LEVEL_4K
)
2300 while (mmu_unsync_walk(parent
, &pages
)) {
2301 struct kvm_mmu_page
*sp
;
2303 for_each_sp(pages
, sp
, parents
, i
) {
2304 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2305 mmu_pages_clear_parents(&parents
);
2313 static bool __kvm_mmu_prepare_zap_page(struct kvm
*kvm
,
2314 struct kvm_mmu_page
*sp
,
2315 struct list_head
*invalid_list
,
2320 trace_kvm_mmu_prepare_zap_page(sp
);
2321 ++kvm
->stat
.mmu_shadow_zapped
;
2322 *nr_zapped
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
2323 *nr_zapped
+= kvm_mmu_page_unlink_children(kvm
, sp
, invalid_list
);
2324 kvm_mmu_unlink_parents(kvm
, sp
);
2326 /* Zapping children means active_mmu_pages has become unstable. */
2327 list_unstable
= *nr_zapped
;
2329 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
2330 unaccount_shadowed(kvm
, sp
);
2333 kvm_unlink_unsync_page(kvm
, sp
);
2334 if (!sp
->root_count
) {
2339 * Already invalid pages (previously active roots) are not on
2340 * the active page list. See list_del() in the "else" case of
2343 if (sp
->role
.invalid
)
2344 list_add(&sp
->link
, invalid_list
);
2346 list_move(&sp
->link
, invalid_list
);
2347 kvm_mod_used_mmu_pages(kvm
, -1);
2350 * Remove the active root from the active page list, the root
2351 * will be explicitly freed when the root_count hits zero.
2353 list_del(&sp
->link
);
2356 * Obsolete pages cannot be used on any vCPUs, see the comment
2357 * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also
2358 * treats invalid shadow pages as being obsolete.
2360 if (!is_obsolete_sp(kvm
, sp
))
2361 kvm_reload_remote_mmus(kvm
);
2364 if (sp
->lpage_disallowed
)
2365 unaccount_huge_nx_page(kvm
, sp
);
2367 sp
->role
.invalid
= 1;
2368 return list_unstable
;
2371 static bool kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2372 struct list_head
*invalid_list
)
2376 __kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
, &nr_zapped
);
2380 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
2381 struct list_head
*invalid_list
)
2383 struct kvm_mmu_page
*sp
, *nsp
;
2385 if (list_empty(invalid_list
))
2389 * We need to make sure everyone sees our modifications to
2390 * the page tables and see changes to vcpu->mode here. The barrier
2391 * in the kvm_flush_remote_tlbs() achieves this. This pairs
2392 * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end.
2394 * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit
2395 * guest mode and/or lockless shadow page table walks.
2397 kvm_flush_remote_tlbs(kvm
);
2399 list_for_each_entry_safe(sp
, nsp
, invalid_list
, link
) {
2400 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
2401 kvm_mmu_free_page(sp
);
2405 static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm
*kvm
,
2406 unsigned long nr_to_zap
)
2408 unsigned long total_zapped
= 0;
2409 struct kvm_mmu_page
*sp
, *tmp
;
2410 LIST_HEAD(invalid_list
);
2414 if (list_empty(&kvm
->arch
.active_mmu_pages
))
2418 list_for_each_entry_safe_reverse(sp
, tmp
, &kvm
->arch
.active_mmu_pages
, link
) {
2420 * Don't zap active root pages, the page itself can't be freed
2421 * and zapping it will just force vCPUs to realloc and reload.
2426 unstable
= __kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
,
2428 total_zapped
+= nr_zapped
;
2429 if (total_zapped
>= nr_to_zap
)
2436 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2438 kvm
->stat
.mmu_recycled
+= total_zapped
;
2439 return total_zapped
;
2442 static inline unsigned long kvm_mmu_available_pages(struct kvm
*kvm
)
2444 if (kvm
->arch
.n_max_mmu_pages
> kvm
->arch
.n_used_mmu_pages
)
2445 return kvm
->arch
.n_max_mmu_pages
-
2446 kvm
->arch
.n_used_mmu_pages
;
2451 static int make_mmu_pages_available(struct kvm_vcpu
*vcpu
)
2453 unsigned long avail
= kvm_mmu_available_pages(vcpu
->kvm
);
2455 if (likely(avail
>= KVM_MIN_FREE_MMU_PAGES
))
2458 kvm_mmu_zap_oldest_mmu_pages(vcpu
->kvm
, KVM_REFILL_PAGES
- avail
);
2461 * Note, this check is intentionally soft, it only guarantees that one
2462 * page is available, while the caller may end up allocating as many as
2463 * four pages, e.g. for PAE roots or for 5-level paging. Temporarily
2464 * exceeding the (arbitrary by default) limit will not harm the host,
2465 * being too aggressive may unnecessarily kill the guest, and getting an
2466 * exact count is far more trouble than it's worth, especially in the
2469 if (!kvm_mmu_available_pages(vcpu
->kvm
))
2475 * Changing the number of mmu pages allocated to the vm
2476 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2478 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned long goal_nr_mmu_pages
)
2480 write_lock(&kvm
->mmu_lock
);
2482 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
2483 kvm_mmu_zap_oldest_mmu_pages(kvm
, kvm
->arch
.n_used_mmu_pages
-
2486 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
2489 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
2491 write_unlock(&kvm
->mmu_lock
);
2494 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
2496 struct kvm_mmu_page
*sp
;
2497 LIST_HEAD(invalid_list
);
2500 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
2502 write_lock(&kvm
->mmu_lock
);
2503 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
) {
2504 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
2507 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
2509 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2510 write_unlock(&kvm
->mmu_lock
);
2515 static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
2520 if (vcpu
->arch
.mmu
->direct_map
)
2523 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
2525 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2530 static void kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
2532 trace_kvm_mmu_unsync_page(sp
);
2533 ++vcpu
->kvm
->stat
.mmu_unsync
;
2536 kvm_mmu_mark_parents_unsync(sp
);
2540 * Attempt to unsync any shadow pages that can be reached by the specified gfn,
2541 * KVM is creating a writable mapping for said gfn. Returns 0 if all pages
2542 * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must
2543 * be write-protected.
2545 int mmu_try_to_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
, bool can_unsync
)
2547 struct kvm_mmu_page
*sp
;
2550 * Force write-protection if the page is being tracked. Note, the page
2551 * track machinery is used to write-protect upper-level shadow pages,
2552 * i.e. this guards the role.level == 4K assertion below!
2554 if (kvm_page_track_is_active(vcpu
, gfn
, KVM_PAGE_TRACK_WRITE
))
2558 * The page is not write-tracked, mark existing shadow pages unsync
2559 * unless KVM is synchronizing an unsync SP (can_unsync = false). In
2560 * that case, KVM must complete emulation of the guest TLB flush before
2561 * allowing shadow pages to become unsync (writable by the guest).
2563 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
2570 WARN_ON(sp
->role
.level
!= PG_LEVEL_4K
);
2571 kvm_unsync_page(vcpu
, sp
);
2575 * We need to ensure that the marking of unsync pages is visible
2576 * before the SPTE is updated to allow writes because
2577 * kvm_mmu_sync_roots() checks the unsync flags without holding
2578 * the MMU lock and so can race with this. If the SPTE was updated
2579 * before the page had been marked as unsync-ed, something like the
2580 * following could happen:
2583 * ---------------------------------------------------------------------
2584 * 1.2 Host updates SPTE
2586 * 2.1 Guest writes a GPTE for GVA X.
2587 * (GPTE being in the guest page table shadowed
2588 * by the SP from CPU 1.)
2589 * This reads SPTE during the page table walk.
2590 * Since SPTE.W is read as 1, there is no
2593 * 2.2 Guest issues TLB flush.
2594 * That causes a VM Exit.
2596 * 2.3 Walking of unsync pages sees sp->unsync is
2597 * false and skips the page.
2599 * 2.4 Guest accesses GVA X.
2600 * Since the mapping in the SP was not updated,
2601 * so the old mapping for GVA X incorrectly
2605 * (sp->unsync = true)
2607 * The write barrier below ensures that 1.1 happens before 1.2 and thus
2608 * the situation in 2.4 does not arise. The implicit barrier in 2.2
2609 * pairs with this write barrier.
2616 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2617 unsigned int pte_access
, int level
,
2618 gfn_t gfn
, kvm_pfn_t pfn
, bool speculative
,
2619 bool can_unsync
, bool host_writable
)
2622 struct kvm_mmu_page
*sp
;
2625 sp
= sptep_to_sp(sptep
);
2627 ret
= make_spte(vcpu
, pte_access
, level
, gfn
, pfn
, *sptep
, speculative
,
2628 can_unsync
, host_writable
, sp_ad_disabled(sp
), &spte
);
2630 if (spte
& PT_WRITABLE_MASK
)
2631 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
2634 ret
|= SET_SPTE_SPURIOUS
;
2635 else if (mmu_spte_update(sptep
, spte
))
2636 ret
|= SET_SPTE_NEED_REMOTE_TLB_FLUSH
;
2640 static int mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2641 unsigned int pte_access
, bool write_fault
, int level
,
2642 gfn_t gfn
, kvm_pfn_t pfn
, bool speculative
,
2645 int was_rmapped
= 0;
2648 int ret
= RET_PF_FIXED
;
2651 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__
,
2652 *sptep
, write_fault
, gfn
);
2654 if (unlikely(is_noslot_pfn(pfn
))) {
2655 mark_mmio_spte(vcpu
, sptep
, gfn
, pte_access
);
2656 return RET_PF_EMULATE
;
2659 if (is_shadow_present_pte(*sptep
)) {
2661 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2662 * the parent of the now unreachable PTE.
2664 if (level
> PG_LEVEL_4K
&& !is_large_pte(*sptep
)) {
2665 struct kvm_mmu_page
*child
;
2668 child
= to_shadow_page(pte
& PT64_BASE_ADDR_MASK
);
2669 drop_parent_pte(child
, sptep
);
2671 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2672 pgprintk("hfn old %llx new %llx\n",
2673 spte_to_pfn(*sptep
), pfn
);
2674 drop_spte(vcpu
->kvm
, sptep
);
2680 set_spte_ret
= set_spte(vcpu
, sptep
, pte_access
, level
, gfn
, pfn
,
2681 speculative
, true, host_writable
);
2682 if (set_spte_ret
& SET_SPTE_WRITE_PROTECTED_PT
) {
2684 ret
= RET_PF_EMULATE
;
2685 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
2688 if (set_spte_ret
& SET_SPTE_NEED_REMOTE_TLB_FLUSH
|| flush
)
2689 kvm_flush_remote_tlbs_with_address(vcpu
->kvm
, gfn
,
2690 KVM_PAGES_PER_HPAGE(level
));
2693 * The fault is fully spurious if and only if the new SPTE and old SPTE
2694 * are identical, and emulation is not required.
2696 if ((set_spte_ret
& SET_SPTE_SPURIOUS
) && ret
== RET_PF_FIXED
) {
2697 WARN_ON_ONCE(!was_rmapped
);
2698 return RET_PF_SPURIOUS
;
2701 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2702 trace_kvm_mmu_set_spte(level
, gfn
, sptep
);
2703 if (!was_rmapped
&& is_large_pte(*sptep
))
2704 ++vcpu
->kvm
->stat
.lpages
;
2706 if (is_shadow_present_pte(*sptep
)) {
2708 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2709 if (rmap_count
> vcpu
->kvm
->stat
.max_mmu_rmap_size
)
2710 vcpu
->kvm
->stat
.max_mmu_rmap_size
= rmap_count
;
2711 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2712 rmap_recycle(vcpu
, sptep
, gfn
);
2719 static kvm_pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2722 struct kvm_memory_slot
*slot
;
2724 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2726 return KVM_PFN_ERR_FAULT
;
2728 return gfn_to_pfn_memslot_atomic(slot
, gfn
);
2731 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2732 struct kvm_mmu_page
*sp
,
2733 u64
*start
, u64
*end
)
2735 struct page
*pages
[PTE_PREFETCH_NUM
];
2736 struct kvm_memory_slot
*slot
;
2737 unsigned int access
= sp
->role
.access
;
2741 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2742 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
);
2746 ret
= gfn_to_page_many_atomic(slot
, gfn
, pages
, end
- start
);
2750 for (i
= 0; i
< ret
; i
++, gfn
++, start
++) {
2751 mmu_set_spte(vcpu
, start
, access
, false, sp
->role
.level
, gfn
,
2752 page_to_pfn(pages
[i
]), true, true);
2759 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2760 struct kvm_mmu_page
*sp
, u64
*sptep
)
2762 u64
*spte
, *start
= NULL
;
2765 WARN_ON(!sp
->role
.direct
);
2767 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2770 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2771 if (is_shadow_present_pte(*spte
) || spte
== sptep
) {
2774 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2782 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2784 struct kvm_mmu_page
*sp
;
2786 sp
= sptep_to_sp(sptep
);
2789 * Without accessed bits, there's no way to distinguish between
2790 * actually accessed translations and prefetched, so disable pte
2791 * prefetch if accessed bits aren't available.
2793 if (sp_ad_disabled(sp
))
2796 if (sp
->role
.level
> PG_LEVEL_4K
)
2800 * If addresses are being invalidated, skip prefetching to avoid
2801 * accidentally prefetching those addresses.
2803 if (unlikely(vcpu
->kvm
->mmu_notifier_count
))
2806 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2809 static int host_pfn_mapping_level(struct kvm
*kvm
, gfn_t gfn
, kvm_pfn_t pfn
,
2810 const struct kvm_memory_slot
*slot
)
2816 if (!PageCompound(pfn_to_page(pfn
)) && !kvm_is_zone_device_pfn(pfn
))
2820 * Note, using the already-retrieved memslot and __gfn_to_hva_memslot()
2821 * is not solely for performance, it's also necessary to avoid the
2822 * "writable" check in __gfn_to_hva_many(), which will always fail on
2823 * read-only memslots due to gfn_to_hva() assuming writes. Earlier
2824 * page fault steps have already verified the guest isn't writing a
2825 * read-only memslot.
2827 hva
= __gfn_to_hva_memslot(slot
, gfn
);
2829 pte
= lookup_address_in_mm(kvm
->mm
, hva
, &level
);
2836 int kvm_mmu_max_mapping_level(struct kvm
*kvm
,
2837 const struct kvm_memory_slot
*slot
, gfn_t gfn
,
2838 kvm_pfn_t pfn
, int max_level
)
2840 struct kvm_lpage_info
*linfo
;
2842 max_level
= min(max_level
, max_huge_page_level
);
2843 for ( ; max_level
> PG_LEVEL_4K
; max_level
--) {
2844 linfo
= lpage_info_slot(gfn
, slot
, max_level
);
2845 if (!linfo
->disallow_lpage
)
2849 if (max_level
== PG_LEVEL_4K
)
2852 return host_pfn_mapping_level(kvm
, gfn
, pfn
, slot
);
2855 int kvm_mmu_hugepage_adjust(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2856 int max_level
, kvm_pfn_t
*pfnp
,
2857 bool huge_page_disallowed
, int *req_level
)
2859 struct kvm_memory_slot
*slot
;
2860 kvm_pfn_t pfn
= *pfnp
;
2864 *req_level
= PG_LEVEL_4K
;
2866 if (unlikely(max_level
== PG_LEVEL_4K
))
2869 if (is_error_noslot_pfn(pfn
) || kvm_is_reserved_pfn(pfn
))
2872 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, true);
2876 level
= kvm_mmu_max_mapping_level(vcpu
->kvm
, slot
, gfn
, pfn
, max_level
);
2877 if (level
== PG_LEVEL_4K
)
2880 *req_level
= level
= min(level
, max_level
);
2883 * Enforce the iTLB multihit workaround after capturing the requested
2884 * level, which will be used to do precise, accurate accounting.
2886 if (huge_page_disallowed
)
2890 * mmu_notifier_retry() was successful and mmu_lock is held, so
2891 * the pmd can't be split from under us.
2893 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2894 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2895 *pfnp
= pfn
& ~mask
;
2900 void disallowed_hugepage_adjust(u64 spte
, gfn_t gfn
, int cur_level
,
2901 kvm_pfn_t
*pfnp
, int *goal_levelp
)
2903 int level
= *goal_levelp
;
2905 if (cur_level
== level
&& level
> PG_LEVEL_4K
&&
2906 is_shadow_present_pte(spte
) &&
2907 !is_large_pte(spte
)) {
2909 * A small SPTE exists for this pfn, but FNAME(fetch)
2910 * and __direct_map would like to create a large PTE
2911 * instead: just force them to go down another level,
2912 * patching back for them into pfn the next 9 bits of
2915 u64 page_mask
= KVM_PAGES_PER_HPAGE(level
) -
2916 KVM_PAGES_PER_HPAGE(level
- 1);
2917 *pfnp
|= gfn
& page_mask
;
2922 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 error_code
,
2923 int map_writable
, int max_level
, kvm_pfn_t pfn
,
2924 bool prefault
, bool is_tdp
)
2926 bool nx_huge_page_workaround_enabled
= is_nx_huge_page_enabled();
2927 bool write
= error_code
& PFERR_WRITE_MASK
;
2928 bool exec
= error_code
& PFERR_FETCH_MASK
;
2929 bool huge_page_disallowed
= exec
&& nx_huge_page_workaround_enabled
;
2930 struct kvm_shadow_walk_iterator it
;
2931 struct kvm_mmu_page
*sp
;
2932 int level
, req_level
, ret
;
2933 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
2934 gfn_t base_gfn
= gfn
;
2936 level
= kvm_mmu_hugepage_adjust(vcpu
, gfn
, max_level
, &pfn
,
2937 huge_page_disallowed
, &req_level
);
2939 trace_kvm_mmu_spte_requested(gpa
, level
, pfn
);
2940 for_each_shadow_entry(vcpu
, gpa
, it
) {
2942 * We cannot overwrite existing page tables with an NX
2943 * large page, as the leaf could be executable.
2945 if (nx_huge_page_workaround_enabled
)
2946 disallowed_hugepage_adjust(*it
.sptep
, gfn
, it
.level
,
2949 base_gfn
= gfn
& ~(KVM_PAGES_PER_HPAGE(it
.level
) - 1);
2950 if (it
.level
== level
)
2953 drop_large_spte(vcpu
, it
.sptep
);
2954 if (is_shadow_present_pte(*it
.sptep
))
2957 sp
= kvm_mmu_get_page(vcpu
, base_gfn
, it
.addr
,
2958 it
.level
- 1, true, ACC_ALL
);
2960 link_shadow_page(vcpu
, it
.sptep
, sp
);
2961 if (is_tdp
&& huge_page_disallowed
&&
2962 req_level
>= it
.level
)
2963 account_huge_nx_page(vcpu
->kvm
, sp
);
2966 ret
= mmu_set_spte(vcpu
, it
.sptep
, ACC_ALL
,
2967 write
, level
, base_gfn
, pfn
, prefault
,
2969 if (ret
== RET_PF_SPURIOUS
)
2972 direct_pte_prefetch(vcpu
, it
.sptep
);
2973 ++vcpu
->stat
.pf_fixed
;
2977 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2979 send_sig_mceerr(BUS_MCEERR_AR
, (void __user
*)address
, PAGE_SHIFT
, tsk
);
2982 static int kvm_handle_bad_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
, kvm_pfn_t pfn
)
2985 * Do not cache the mmio info caused by writing the readonly gfn
2986 * into the spte otherwise read access on readonly gfn also can
2987 * caused mmio page fault and treat it as mmio access.
2989 if (pfn
== KVM_PFN_ERR_RO_FAULT
)
2990 return RET_PF_EMULATE
;
2992 if (pfn
== KVM_PFN_ERR_HWPOISON
) {
2993 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu
, gfn
), current
);
2994 return RET_PF_RETRY
;
3000 static bool handle_abnormal_pfn(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
,
3001 kvm_pfn_t pfn
, unsigned int access
,
3004 /* The pfn is invalid, report the error! */
3005 if (unlikely(is_error_pfn(pfn
))) {
3006 *ret_val
= kvm_handle_bad_page(vcpu
, gfn
, pfn
);
3010 if (unlikely(is_noslot_pfn(pfn
))) {
3011 vcpu_cache_mmio_info(vcpu
, gva
, gfn
,
3012 access
& shadow_mmio_access_mask
);
3014 * If MMIO caching is disabled, emulate immediately without
3015 * touching the shadow page tables as attempting to install an
3016 * MMIO SPTE will just be an expensive nop.
3018 if (unlikely(!shadow_mmio_value
)) {
3019 *ret_val
= RET_PF_EMULATE
;
3027 static bool page_fault_can_be_fast(u32 error_code
)
3030 * Do not fix the mmio spte with invalid generation number which
3031 * need to be updated by slow page fault path.
3033 if (unlikely(error_code
& PFERR_RSVD_MASK
))
3036 /* See if the page fault is due to an NX violation */
3037 if (unlikely(((error_code
& (PFERR_FETCH_MASK
| PFERR_PRESENT_MASK
))
3038 == (PFERR_FETCH_MASK
| PFERR_PRESENT_MASK
))))
3042 * #PF can be fast if:
3043 * 1. The shadow page table entry is not present, which could mean that
3044 * the fault is potentially caused by access tracking (if enabled).
3045 * 2. The shadow page table entry is present and the fault
3046 * is caused by write-protect, that means we just need change the W
3047 * bit of the spte which can be done out of mmu-lock.
3049 * However, if access tracking is disabled we know that a non-present
3050 * page must be a genuine page fault where we have to create a new SPTE.
3051 * So, if access tracking is disabled, we return true only for write
3052 * accesses to a present page.
3055 return shadow_acc_track_mask
!= 0 ||
3056 ((error_code
& (PFERR_WRITE_MASK
| PFERR_PRESENT_MASK
))
3057 == (PFERR_WRITE_MASK
| PFERR_PRESENT_MASK
));
3061 * Returns true if the SPTE was fixed successfully. Otherwise,
3062 * someone else modified the SPTE from its original value.
3065 fast_pf_fix_direct_spte(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
3066 u64
*sptep
, u64 old_spte
, u64 new_spte
)
3070 WARN_ON(!sp
->role
.direct
);
3073 * Theoretically we could also set dirty bit (and flush TLB) here in
3074 * order to eliminate unnecessary PML logging. See comments in
3075 * set_spte. But fast_page_fault is very unlikely to happen with PML
3076 * enabled, so we do not do this. This might result in the same GPA
3077 * to be logged in PML buffer again when the write really happens, and
3078 * eventually to be called by mark_page_dirty twice. But it's also no
3079 * harm. This also avoids the TLB flush needed after setting dirty bit
3080 * so non-PML cases won't be impacted.
3082 * Compare with set_spte where instead shadow_dirty_mask is set.
3084 if (cmpxchg64(sptep
, old_spte
, new_spte
) != old_spte
)
3087 if (is_writable_pte(new_spte
) && !is_writable_pte(old_spte
)) {
3089 * The gfn of direct spte is stable since it is
3090 * calculated by sp->gfn.
3092 gfn
= kvm_mmu_page_get_gfn(sp
, sptep
- sp
->spt
);
3093 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
3099 static bool is_access_allowed(u32 fault_err_code
, u64 spte
)
3101 if (fault_err_code
& PFERR_FETCH_MASK
)
3102 return is_executable_pte(spte
);
3104 if (fault_err_code
& PFERR_WRITE_MASK
)
3105 return is_writable_pte(spte
);
3107 /* Fault was on Read access */
3108 return spte
& PT_PRESENT_MASK
;
3112 * Returns the last level spte pointer of the shadow page walk for the given
3113 * gpa, and sets *spte to the spte value. This spte may be non-preset. If no
3114 * walk could be performed, returns NULL and *spte does not contain valid data.
3117 * - Must be called between walk_shadow_page_lockless_{begin,end}.
3118 * - The returned sptep must not be used after walk_shadow_page_lockless_end.
3120 static u64
*fast_pf_get_last_sptep(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u64
*spte
)
3122 struct kvm_shadow_walk_iterator iterator
;
3126 for_each_shadow_entry_lockless(vcpu
, gpa
, iterator
, old_spte
) {
3127 sptep
= iterator
.sptep
;
3130 if (!is_shadow_present_pte(old_spte
))
3138 * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS.
3140 static int fast_page_fault(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 error_code
)
3142 struct kvm_mmu_page
*sp
;
3143 int ret
= RET_PF_INVALID
;
3146 uint retry_count
= 0;
3148 if (!page_fault_can_be_fast(error_code
))
3151 walk_shadow_page_lockless_begin(vcpu
);
3156 if (is_tdp_mmu(vcpu
->arch
.mmu
))
3157 sptep
= kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu
, gpa
, &spte
);
3159 sptep
= fast_pf_get_last_sptep(vcpu
, gpa
, &spte
);
3161 if (!is_shadow_present_pte(spte
))
3164 sp
= sptep_to_sp(sptep
);
3165 if (!is_last_spte(spte
, sp
->role
.level
))
3169 * Check whether the memory access that caused the fault would
3170 * still cause it if it were to be performed right now. If not,
3171 * then this is a spurious fault caused by TLB lazily flushed,
3172 * or some other CPU has already fixed the PTE after the
3173 * current CPU took the fault.
3175 * Need not check the access of upper level table entries since
3176 * they are always ACC_ALL.
3178 if (is_access_allowed(error_code
, spte
)) {
3179 ret
= RET_PF_SPURIOUS
;
3185 if (is_access_track_spte(spte
))
3186 new_spte
= restore_acc_track_spte(new_spte
);
3189 * Currently, to simplify the code, write-protection can
3190 * be removed in the fast path only if the SPTE was
3191 * write-protected for dirty-logging or access tracking.
3193 if ((error_code
& PFERR_WRITE_MASK
) &&
3194 spte_can_locklessly_be_made_writable(spte
)) {
3195 new_spte
|= PT_WRITABLE_MASK
;
3198 * Do not fix write-permission on the large spte. Since
3199 * we only dirty the first page into the dirty-bitmap in
3200 * fast_pf_fix_direct_spte(), other pages are missed
3201 * if its slot has dirty logging enabled.
3203 * Instead, we let the slow page fault path create a
3204 * normal spte to fix the access.
3206 * See the comments in kvm_arch_commit_memory_region().
3208 if (sp
->role
.level
> PG_LEVEL_4K
)
3212 /* Verify that the fault can be handled in the fast path */
3213 if (new_spte
== spte
||
3214 !is_access_allowed(error_code
, new_spte
))
3218 * Currently, fast page fault only works for direct mapping
3219 * since the gfn is not stable for indirect shadow page. See
3220 * Documentation/virt/kvm/locking.rst to get more detail.
3222 if (fast_pf_fix_direct_spte(vcpu
, sp
, sptep
, spte
, new_spte
)) {
3227 if (++retry_count
> 4) {
3228 printk_once(KERN_WARNING
3229 "kvm: Fast #PF retrying more than 4 times.\n");
3235 trace_fast_page_fault(vcpu
, gpa
, error_code
, sptep
, spte
, ret
);
3236 walk_shadow_page_lockless_end(vcpu
);
3241 static void mmu_free_root_page(struct kvm
*kvm
, hpa_t
*root_hpa
,
3242 struct list_head
*invalid_list
)
3244 struct kvm_mmu_page
*sp
;
3246 if (!VALID_PAGE(*root_hpa
))
3249 sp
= to_shadow_page(*root_hpa
& PT64_BASE_ADDR_MASK
);
3251 if (is_tdp_mmu_page(sp
))
3252 kvm_tdp_mmu_put_root(kvm
, sp
, false);
3253 else if (!--sp
->root_count
&& sp
->role
.invalid
)
3254 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
3256 *root_hpa
= INVALID_PAGE
;
3259 /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */
3260 void kvm_mmu_free_roots(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
3261 ulong roots_to_free
)
3263 struct kvm
*kvm
= vcpu
->kvm
;
3265 LIST_HEAD(invalid_list
);
3266 bool free_active_root
= roots_to_free
& KVM_MMU_ROOT_CURRENT
;
3268 BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS
>= BITS_PER_LONG
);
3270 /* Before acquiring the MMU lock, see if we need to do any real work. */
3271 if (!(free_active_root
&& VALID_PAGE(mmu
->root_hpa
))) {
3272 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
3273 if ((roots_to_free
& KVM_MMU_ROOT_PREVIOUS(i
)) &&
3274 VALID_PAGE(mmu
->prev_roots
[i
].hpa
))
3277 if (i
== KVM_MMU_NUM_PREV_ROOTS
)
3281 write_lock(&kvm
->mmu_lock
);
3283 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
3284 if (roots_to_free
& KVM_MMU_ROOT_PREVIOUS(i
))
3285 mmu_free_root_page(kvm
, &mmu
->prev_roots
[i
].hpa
,
3288 if (free_active_root
) {
3289 if (mmu
->shadow_root_level
>= PT64_ROOT_4LEVEL
&&
3290 (mmu
->root_level
>= PT64_ROOT_4LEVEL
|| mmu
->direct_map
)) {
3291 mmu_free_root_page(kvm
, &mmu
->root_hpa
, &invalid_list
);
3292 } else if (mmu
->pae_root
) {
3293 for (i
= 0; i
< 4; ++i
) {
3294 if (!IS_VALID_PAE_ROOT(mmu
->pae_root
[i
]))
3297 mmu_free_root_page(kvm
, &mmu
->pae_root
[i
],
3299 mmu
->pae_root
[i
] = INVALID_PAE_ROOT
;
3302 mmu
->root_hpa
= INVALID_PAGE
;
3306 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3307 write_unlock(&kvm
->mmu_lock
);
3309 EXPORT_SYMBOL_GPL(kvm_mmu_free_roots
);
3311 void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
3313 unsigned long roots_to_free
= 0;
3318 * This should not be called while L2 is active, L2 can't invalidate
3319 * _only_ its own roots, e.g. INVVPID unconditionally exits.
3321 WARN_ON_ONCE(mmu
->mmu_role
.base
.guest_mode
);
3323 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++) {
3324 root_hpa
= mmu
->prev_roots
[i
].hpa
;
3325 if (!VALID_PAGE(root_hpa
))
3328 if (!to_shadow_page(root_hpa
) ||
3329 to_shadow_page(root_hpa
)->role
.guest_mode
)
3330 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
3333 kvm_mmu_free_roots(vcpu
, mmu
, roots_to_free
);
3335 EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots
);
3338 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
3342 if (!kvm_vcpu_is_visible_gfn(vcpu
, root_gfn
)) {
3343 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3350 static hpa_t
mmu_alloc_root(struct kvm_vcpu
*vcpu
, gfn_t gfn
, gva_t gva
,
3351 u8 level
, bool direct
)
3353 struct kvm_mmu_page
*sp
;
3355 sp
= kvm_mmu_get_page(vcpu
, gfn
, gva
, level
, direct
, ACC_ALL
);
3358 return __pa(sp
->spt
);
3361 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
3363 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
3364 u8 shadow_root_level
= mmu
->shadow_root_level
;
3369 write_lock(&vcpu
->kvm
->mmu_lock
);
3370 r
= make_mmu_pages_available(vcpu
);
3374 if (is_tdp_mmu_enabled(vcpu
->kvm
)) {
3375 root
= kvm_tdp_mmu_get_vcpu_root_hpa(vcpu
);
3376 mmu
->root_hpa
= root
;
3377 } else if (shadow_root_level
>= PT64_ROOT_4LEVEL
) {
3378 root
= mmu_alloc_root(vcpu
, 0, 0, shadow_root_level
, true);
3379 mmu
->root_hpa
= root
;
3380 } else if (shadow_root_level
== PT32E_ROOT_LEVEL
) {
3381 if (WARN_ON_ONCE(!mmu
->pae_root
)) {
3386 for (i
= 0; i
< 4; ++i
) {
3387 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu
->pae_root
[i
]));
3389 root
= mmu_alloc_root(vcpu
, i
<< (30 - PAGE_SHIFT
),
3390 i
<< 30, PT32_ROOT_LEVEL
, true);
3391 mmu
->pae_root
[i
] = root
| PT_PRESENT_MASK
|
3394 mmu
->root_hpa
= __pa(mmu
->pae_root
);
3396 WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level
);
3401 /* root_pgd is ignored for direct MMUs. */
3404 write_unlock(&vcpu
->kvm
->mmu_lock
);
3408 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
3410 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
3411 u64 pdptrs
[4], pm_mask
;
3412 gfn_t root_gfn
, root_pgd
;
3417 root_pgd
= mmu
->get_guest_pgd(vcpu
);
3418 root_gfn
= root_pgd
>> PAGE_SHIFT
;
3420 if (mmu_check_root(vcpu
, root_gfn
))
3424 * On SVM, reading PDPTRs might access guest memory, which might fault
3425 * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock.
3427 if (mmu
->root_level
== PT32E_ROOT_LEVEL
) {
3428 for (i
= 0; i
< 4; ++i
) {
3429 pdptrs
[i
] = mmu
->get_pdptr(vcpu
, i
);
3430 if (!(pdptrs
[i
] & PT_PRESENT_MASK
))
3433 if (mmu_check_root(vcpu
, pdptrs
[i
] >> PAGE_SHIFT
))
3438 r
= alloc_all_memslots_rmaps(vcpu
->kvm
);
3442 write_lock(&vcpu
->kvm
->mmu_lock
);
3443 r
= make_mmu_pages_available(vcpu
);
3448 * Do we shadow a long mode page table? If so we need to
3449 * write-protect the guests page table root.
3451 if (mmu
->root_level
>= PT64_ROOT_4LEVEL
) {
3452 root
= mmu_alloc_root(vcpu
, root_gfn
, 0,
3453 mmu
->shadow_root_level
, false);
3454 mmu
->root_hpa
= root
;
3458 if (WARN_ON_ONCE(!mmu
->pae_root
)) {
3464 * We shadow a 32 bit page table. This may be a legacy 2-level
3465 * or a PAE 3-level page table. In either case we need to be aware that
3466 * the shadow page table may be a PAE or a long mode page table.
3468 pm_mask
= PT_PRESENT_MASK
| shadow_me_mask
;
3469 if (mmu
->shadow_root_level
== PT64_ROOT_4LEVEL
) {
3470 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
3472 if (WARN_ON_ONCE(!mmu
->pml4_root
)) {
3477 mmu
->pml4_root
[0] = __pa(mmu
->pae_root
) | pm_mask
;
3480 for (i
= 0; i
< 4; ++i
) {
3481 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu
->pae_root
[i
]));
3483 if (mmu
->root_level
== PT32E_ROOT_LEVEL
) {
3484 if (!(pdptrs
[i
] & PT_PRESENT_MASK
)) {
3485 mmu
->pae_root
[i
] = INVALID_PAE_ROOT
;
3488 root_gfn
= pdptrs
[i
] >> PAGE_SHIFT
;
3491 root
= mmu_alloc_root(vcpu
, root_gfn
, i
<< 30,
3492 PT32_ROOT_LEVEL
, false);
3493 mmu
->pae_root
[i
] = root
| pm_mask
;
3496 if (mmu
->shadow_root_level
== PT64_ROOT_4LEVEL
)
3497 mmu
->root_hpa
= __pa(mmu
->pml4_root
);
3499 mmu
->root_hpa
= __pa(mmu
->pae_root
);
3502 mmu
->root_pgd
= root_pgd
;
3504 write_unlock(&vcpu
->kvm
->mmu_lock
);
3509 static int mmu_alloc_special_roots(struct kvm_vcpu
*vcpu
)
3511 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
3512 u64
*pml4_root
, *pae_root
;
3515 * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP
3516 * tables are allocated and initialized at root creation as there is no
3517 * equivalent level in the guest's NPT to shadow. Allocate the tables
3518 * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare.
3520 if (mmu
->direct_map
|| mmu
->root_level
>= PT64_ROOT_4LEVEL
||
3521 mmu
->shadow_root_level
< PT64_ROOT_4LEVEL
)
3525 * This mess only works with 4-level paging and needs to be updated to
3526 * work with 5-level paging.
3528 if (WARN_ON_ONCE(mmu
->shadow_root_level
!= PT64_ROOT_4LEVEL
))
3531 if (mmu
->pae_root
&& mmu
->pml4_root
)
3535 * The special roots should always be allocated in concert. Yell and
3536 * bail if KVM ends up in a state where only one of the roots is valid.
3538 if (WARN_ON_ONCE(!tdp_enabled
|| mmu
->pae_root
|| mmu
->pml4_root
))
3542 * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and
3543 * doesn't need to be decrypted.
3545 pae_root
= (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT
);
3549 pml4_root
= (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT
);
3551 free_page((unsigned long)pae_root
);
3555 mmu
->pae_root
= pae_root
;
3556 mmu
->pml4_root
= pml4_root
;
3561 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3564 struct kvm_mmu_page
*sp
;
3566 if (vcpu
->arch
.mmu
->direct_map
)
3569 if (!VALID_PAGE(vcpu
->arch
.mmu
->root_hpa
))
3572 vcpu_clear_mmio_info(vcpu
, MMIO_GVA_ANY
);
3574 if (vcpu
->arch
.mmu
->root_level
>= PT64_ROOT_4LEVEL
) {
3575 hpa_t root
= vcpu
->arch
.mmu
->root_hpa
;
3576 sp
= to_shadow_page(root
);
3579 * Even if another CPU was marking the SP as unsync-ed
3580 * simultaneously, any guest page table changes are not
3581 * guaranteed to be visible anyway until this VCPU issues a TLB
3582 * flush strictly after those changes are made. We only need to
3583 * ensure that the other CPU sets these flags before any actual
3584 * changes to the page tables are made. The comments in
3585 * mmu_try_to_unsync_pages() describe what could go wrong if
3586 * this requirement isn't satisfied.
3588 if (!smp_load_acquire(&sp
->unsync
) &&
3589 !smp_load_acquire(&sp
->unsync_children
))
3592 write_lock(&vcpu
->kvm
->mmu_lock
);
3593 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3595 mmu_sync_children(vcpu
, sp
);
3597 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3598 write_unlock(&vcpu
->kvm
->mmu_lock
);
3602 write_lock(&vcpu
->kvm
->mmu_lock
);
3603 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3605 for (i
= 0; i
< 4; ++i
) {
3606 hpa_t root
= vcpu
->arch
.mmu
->pae_root
[i
];
3608 if (IS_VALID_PAE_ROOT(root
)) {
3609 root
&= PT64_BASE_ADDR_MASK
;
3610 sp
= to_shadow_page(root
);
3611 mmu_sync_children(vcpu
, sp
);
3615 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3616 write_unlock(&vcpu
->kvm
->mmu_lock
);
3619 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gpa_t vaddr
,
3620 u32 access
, struct x86_exception
*exception
)
3623 exception
->error_code
= 0;
3627 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gpa_t vaddr
,
3629 struct x86_exception
*exception
)
3632 exception
->error_code
= 0;
3633 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
, exception
);
3636 static bool mmio_info_in_cache(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3639 * A nested guest cannot use the MMIO cache if it is using nested
3640 * page tables, because cr2 is a nGPA while the cache stores GPAs.
3642 if (mmu_is_nested(vcpu
))
3646 return vcpu_match_mmio_gpa(vcpu
, addr
);
3648 return vcpu_match_mmio_gva(vcpu
, addr
);
3652 * Return the level of the lowest level SPTE added to sptes.
3653 * That SPTE may be non-present.
3655 * Must be called between walk_shadow_page_lockless_{begin,end}.
3657 static int get_walk(struct kvm_vcpu
*vcpu
, u64 addr
, u64
*sptes
, int *root_level
)
3659 struct kvm_shadow_walk_iterator iterator
;
3663 for (shadow_walk_init(&iterator
, vcpu
, addr
),
3664 *root_level
= iterator
.level
;
3665 shadow_walk_okay(&iterator
);
3666 __shadow_walk_next(&iterator
, spte
)) {
3667 leaf
= iterator
.level
;
3668 spte
= mmu_spte_get_lockless(iterator
.sptep
);
3672 if (!is_shadow_present_pte(spte
))
3679 /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */
3680 static bool get_mmio_spte(struct kvm_vcpu
*vcpu
, u64 addr
, u64
*sptep
)
3682 u64 sptes
[PT64_ROOT_MAX_LEVEL
+ 1];
3683 struct rsvd_bits_validate
*rsvd_check
;
3684 int root
, leaf
, level
;
3685 bool reserved
= false;
3687 walk_shadow_page_lockless_begin(vcpu
);
3689 if (is_tdp_mmu(vcpu
->arch
.mmu
))
3690 leaf
= kvm_tdp_mmu_get_walk(vcpu
, addr
, sptes
, &root
);
3692 leaf
= get_walk(vcpu
, addr
, sptes
, &root
);
3694 walk_shadow_page_lockless_end(vcpu
);
3696 if (unlikely(leaf
< 0)) {
3701 *sptep
= sptes
[leaf
];
3704 * Skip reserved bits checks on the terminal leaf if it's not a valid
3705 * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by
3706 * design, always have reserved bits set. The purpose of the checks is
3707 * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs.
3709 if (!is_shadow_present_pte(sptes
[leaf
]))
3712 rsvd_check
= &vcpu
->arch
.mmu
->shadow_zero_check
;
3714 for (level
= root
; level
>= leaf
; level
--)
3715 reserved
|= is_rsvd_spte(rsvd_check
, sptes
[level
], level
);
3718 pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n",
3720 for (level
= root
; level
>= leaf
; level
--)
3721 pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx",
3722 sptes
[level
], level
,
3723 get_rsvd_bits(rsvd_check
, sptes
[level
], level
));
3729 static int handle_mmio_page_fault(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3734 if (mmio_info_in_cache(vcpu
, addr
, direct
))
3735 return RET_PF_EMULATE
;
3737 reserved
= get_mmio_spte(vcpu
, addr
, &spte
);
3738 if (WARN_ON(reserved
))
3741 if (is_mmio_spte(spte
)) {
3742 gfn_t gfn
= get_mmio_spte_gfn(spte
);
3743 unsigned int access
= get_mmio_spte_access(spte
);
3745 if (!check_mmio_spte(vcpu
, spte
))
3746 return RET_PF_INVALID
;
3751 trace_handle_mmio_page_fault(addr
, gfn
, access
);
3752 vcpu_cache_mmio_info(vcpu
, addr
, gfn
, access
);
3753 return RET_PF_EMULATE
;
3757 * If the page table is zapped by other cpus, let CPU fault again on
3760 return RET_PF_RETRY
;
3763 static bool page_fault_handle_page_track(struct kvm_vcpu
*vcpu
,
3764 u32 error_code
, gfn_t gfn
)
3766 if (unlikely(error_code
& PFERR_RSVD_MASK
))
3769 if (!(error_code
& PFERR_PRESENT_MASK
) ||
3770 !(error_code
& PFERR_WRITE_MASK
))
3774 * guest is writing the page which is write tracked which can
3775 * not be fixed by page fault handler.
3777 if (kvm_page_track_is_active(vcpu
, gfn
, KVM_PAGE_TRACK_WRITE
))
3783 static void shadow_page_table_clear_flood(struct kvm_vcpu
*vcpu
, gva_t addr
)
3785 struct kvm_shadow_walk_iterator iterator
;
3788 walk_shadow_page_lockless_begin(vcpu
);
3789 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
) {
3790 clear_sp_write_flooding_count(iterator
.sptep
);
3791 if (!is_shadow_present_pte(spte
))
3794 walk_shadow_page_lockless_end(vcpu
);
3797 static bool kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
3800 struct kvm_arch_async_pf arch
;
3802 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
3804 arch
.direct_map
= vcpu
->arch
.mmu
->direct_map
;
3805 arch
.cr3
= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
);
3807 return kvm_setup_async_pf(vcpu
, cr2_or_gpa
,
3808 kvm_vcpu_gfn_to_hva(vcpu
, gfn
), &arch
);
3811 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3812 gpa_t cr2_or_gpa
, kvm_pfn_t
*pfn
, hva_t
*hva
,
3813 bool write
, bool *writable
)
3815 struct kvm_memory_slot
*slot
= kvm_vcpu_gfn_to_memslot(vcpu
, gfn
);
3819 * Retry the page fault if the gfn hit a memslot that is being deleted
3820 * or moved. This ensures any existing SPTEs for the old memslot will
3821 * be zapped before KVM inserts a new MMIO SPTE for the gfn.
3823 if (slot
&& (slot
->flags
& KVM_MEMSLOT_INVALID
))
3826 /* Don't expose private memslots to L2. */
3827 if (is_guest_mode(vcpu
) && !kvm_is_visible_memslot(slot
)) {
3828 *pfn
= KVM_PFN_NOSLOT
;
3834 *pfn
= __gfn_to_pfn_memslot(slot
, gfn
, false, &async
,
3835 write
, writable
, hva
);
3837 return false; /* *pfn has correct page already */
3839 if (!prefault
&& kvm_can_do_async_pf(vcpu
)) {
3840 trace_kvm_try_async_get_page(cr2_or_gpa
, gfn
);
3841 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
3842 trace_kvm_async_pf_doublefault(cr2_or_gpa
, gfn
);
3843 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
3845 } else if (kvm_arch_setup_async_pf(vcpu
, cr2_or_gpa
, gfn
))
3849 *pfn
= __gfn_to_pfn_memslot(slot
, gfn
, false, NULL
,
3850 write
, writable
, hva
);
3854 static int direct_page_fault(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 error_code
,
3855 bool prefault
, int max_level
, bool is_tdp
)
3857 bool is_tdp_mmu_fault
= is_tdp_mmu(vcpu
->arch
.mmu
);
3858 bool write
= error_code
& PFERR_WRITE_MASK
;
3861 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3862 unsigned long mmu_seq
;
3867 if (page_fault_handle_page_track(vcpu
, error_code
, gfn
))
3868 return RET_PF_EMULATE
;
3870 r
= fast_page_fault(vcpu
, gpa
, error_code
);
3871 if (r
!= RET_PF_INVALID
)
3874 r
= mmu_topup_memory_caches(vcpu
, false);
3878 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3881 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, &hva
,
3882 write
, &map_writable
))
3883 return RET_PF_RETRY
;
3885 if (handle_abnormal_pfn(vcpu
, is_tdp
? 0 : gpa
, gfn
, pfn
, ACC_ALL
, &r
))
3890 if (is_tdp_mmu_fault
)
3891 read_lock(&vcpu
->kvm
->mmu_lock
);
3893 write_lock(&vcpu
->kvm
->mmu_lock
);
3895 if (!is_noslot_pfn(pfn
) && mmu_notifier_retry_hva(vcpu
->kvm
, mmu_seq
, hva
))
3897 r
= make_mmu_pages_available(vcpu
);
3901 if (is_tdp_mmu_fault
)
3902 r
= kvm_tdp_mmu_map(vcpu
, gpa
, error_code
, map_writable
, max_level
,
3905 r
= __direct_map(vcpu
, gpa
, error_code
, map_writable
, max_level
, pfn
,
3909 if (is_tdp_mmu_fault
)
3910 read_unlock(&vcpu
->kvm
->mmu_lock
);
3912 write_unlock(&vcpu
->kvm
->mmu_lock
);
3913 kvm_release_pfn_clean(pfn
);
3917 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3918 u32 error_code
, bool prefault
)
3920 pgprintk("%s: gva %lx error %x\n", __func__
, gpa
, error_code
);
3922 /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */
3923 return direct_page_fault(vcpu
, gpa
& PAGE_MASK
, error_code
, prefault
,
3924 PG_LEVEL_2M
, false);
3927 int kvm_handle_page_fault(struct kvm_vcpu
*vcpu
, u64 error_code
,
3928 u64 fault_address
, char *insn
, int insn_len
)
3931 u32 flags
= vcpu
->arch
.apf
.host_apf_flags
;
3933 #ifndef CONFIG_X86_64
3934 /* A 64-bit CR2 should be impossible on 32-bit KVM. */
3935 if (WARN_ON_ONCE(fault_address
>> 32))
3939 vcpu
->arch
.l1tf_flush_l1d
= true;
3941 trace_kvm_page_fault(fault_address
, error_code
);
3943 if (kvm_event_needs_reinjection(vcpu
))
3944 kvm_mmu_unprotect_page_virt(vcpu
, fault_address
);
3945 r
= kvm_mmu_page_fault(vcpu
, fault_address
, error_code
, insn
,
3947 } else if (flags
& KVM_PV_REASON_PAGE_NOT_PRESENT
) {
3948 vcpu
->arch
.apf
.host_apf_flags
= 0;
3949 local_irq_disable();
3950 kvm_async_pf_task_wait_schedule(fault_address
);
3953 WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags
);
3958 EXPORT_SYMBOL_GPL(kvm_handle_page_fault
);
3960 int kvm_tdp_page_fault(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 error_code
,
3965 for (max_level
= KVM_MAX_HUGEPAGE_LEVEL
;
3966 max_level
> PG_LEVEL_4K
;
3968 int page_num
= KVM_PAGES_PER_HPAGE(max_level
);
3969 gfn_t base
= (gpa
>> PAGE_SHIFT
) & ~(page_num
- 1);
3971 if (kvm_mtrr_check_gfn_range_consistency(vcpu
, base
, page_num
))
3975 return direct_page_fault(vcpu
, gpa
, error_code
, prefault
,
3979 static void nonpaging_init_context(struct kvm_mmu
*context
)
3981 context
->page_fault
= nonpaging_page_fault
;
3982 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3983 context
->sync_page
= nonpaging_sync_page
;
3984 context
->invlpg
= NULL
;
3985 context
->direct_map
= true;
3988 static inline bool is_root_usable(struct kvm_mmu_root_info
*root
, gpa_t pgd
,
3989 union kvm_mmu_page_role role
)
3991 return (role
.direct
|| pgd
== root
->pgd
) &&
3992 VALID_PAGE(root
->hpa
) && to_shadow_page(root
->hpa
) &&
3993 role
.word
== to_shadow_page(root
->hpa
)->role
.word
;
3997 * Find out if a previously cached root matching the new pgd/role is available.
3998 * The current root is also inserted into the cache.
3999 * If a matching root was found, it is assigned to kvm_mmu->root_hpa and true is
4001 * Otherwise, the LRU root from the cache is assigned to kvm_mmu->root_hpa and
4002 * false is returned. This root should now be freed by the caller.
4004 static bool cached_root_available(struct kvm_vcpu
*vcpu
, gpa_t new_pgd
,
4005 union kvm_mmu_page_role new_role
)
4008 struct kvm_mmu_root_info root
;
4009 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
4011 root
.pgd
= mmu
->root_pgd
;
4012 root
.hpa
= mmu
->root_hpa
;
4014 if (is_root_usable(&root
, new_pgd
, new_role
))
4017 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++) {
4018 swap(root
, mmu
->prev_roots
[i
]);
4020 if (is_root_usable(&root
, new_pgd
, new_role
))
4024 mmu
->root_hpa
= root
.hpa
;
4025 mmu
->root_pgd
= root
.pgd
;
4027 return i
< KVM_MMU_NUM_PREV_ROOTS
;
4030 static bool fast_pgd_switch(struct kvm_vcpu
*vcpu
, gpa_t new_pgd
,
4031 union kvm_mmu_page_role new_role
)
4033 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
4036 * For now, limit the fast switch to 64-bit hosts+VMs in order to avoid
4037 * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs
4038 * later if necessary.
4040 if (mmu
->shadow_root_level
>= PT64_ROOT_4LEVEL
&&
4041 mmu
->root_level
>= PT64_ROOT_4LEVEL
)
4042 return cached_root_available(vcpu
, new_pgd
, new_role
);
4047 static void __kvm_mmu_new_pgd(struct kvm_vcpu
*vcpu
, gpa_t new_pgd
,
4048 union kvm_mmu_page_role new_role
)
4050 if (!fast_pgd_switch(vcpu
, new_pgd
, new_role
)) {
4051 kvm_mmu_free_roots(vcpu
, vcpu
->arch
.mmu
, KVM_MMU_ROOT_CURRENT
);
4056 * It's possible that the cached previous root page is obsolete because
4057 * of a change in the MMU generation number. However, changing the
4058 * generation number is accompanied by KVM_REQ_MMU_RELOAD, which will
4059 * free the root set here and allocate a new one.
4061 kvm_make_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
);
4063 if (force_flush_and_sync_on_reuse
) {
4064 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
4065 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
4069 * The last MMIO access's GVA and GPA are cached in the VCPU. When
4070 * switching to a new CR3, that GVA->GPA mapping may no longer be
4071 * valid. So clear any cached MMIO info even when we don't need to sync
4072 * the shadow page tables.
4074 vcpu_clear_mmio_info(vcpu
, MMIO_GVA_ANY
);
4077 * If this is a direct root page, it doesn't have a write flooding
4078 * count. Otherwise, clear the write flooding count.
4080 if (!new_role
.direct
)
4081 __clear_sp_write_flooding_count(
4082 to_shadow_page(vcpu
->arch
.mmu
->root_hpa
));
4085 void kvm_mmu_new_pgd(struct kvm_vcpu
*vcpu
, gpa_t new_pgd
)
4087 __kvm_mmu_new_pgd(vcpu
, new_pgd
, kvm_mmu_calc_root_page_role(vcpu
));
4089 EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd
);
4091 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
4093 return kvm_read_cr3(vcpu
);
4096 static bool sync_mmio_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, gfn_t gfn
,
4097 unsigned int access
, int *nr_present
)
4099 if (unlikely(is_mmio_spte(*sptep
))) {
4100 if (gfn
!= get_mmio_spte_gfn(*sptep
)) {
4101 mmu_spte_clear_no_track(sptep
);
4106 mark_mmio_spte(vcpu
, sptep
, gfn
, access
);
4113 #define PTTYPE_EPT 18 /* arbitrary */
4114 #define PTTYPE PTTYPE_EPT
4115 #include "paging_tmpl.h"
4119 #include "paging_tmpl.h"
4123 #include "paging_tmpl.h"
4127 __reset_rsvds_bits_mask(struct rsvd_bits_validate
*rsvd_check
,
4128 u64 pa_bits_rsvd
, int level
, bool nx
, bool gbpages
,
4131 u64 gbpages_bit_rsvd
= 0;
4132 u64 nonleaf_bit8_rsvd
= 0;
4135 rsvd_check
->bad_mt_xwr
= 0;
4138 gbpages_bit_rsvd
= rsvd_bits(7, 7);
4140 if (level
== PT32E_ROOT_LEVEL
)
4141 high_bits_rsvd
= pa_bits_rsvd
& rsvd_bits(0, 62);
4143 high_bits_rsvd
= pa_bits_rsvd
& rsvd_bits(0, 51);
4145 /* Note, NX doesn't exist in PDPTEs, this is handled below. */
4147 high_bits_rsvd
|= rsvd_bits(63, 63);
4150 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
4151 * leaf entries) on AMD CPUs only.
4154 nonleaf_bit8_rsvd
= rsvd_bits(8, 8);
4157 case PT32_ROOT_LEVEL
:
4158 /* no rsvd bits for 2 level 4K page table entries */
4159 rsvd_check
->rsvd_bits_mask
[0][1] = 0;
4160 rsvd_check
->rsvd_bits_mask
[0][0] = 0;
4161 rsvd_check
->rsvd_bits_mask
[1][0] =
4162 rsvd_check
->rsvd_bits_mask
[0][0];
4165 rsvd_check
->rsvd_bits_mask
[1][1] = 0;
4169 if (is_cpuid_PSE36())
4170 /* 36bits PSE 4MB page */
4171 rsvd_check
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
4173 /* 32 bits PSE 4MB page */
4174 rsvd_check
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
4176 case PT32E_ROOT_LEVEL
:
4177 rsvd_check
->rsvd_bits_mask
[0][2] = rsvd_bits(63, 63) |
4180 rsvd_bits(1, 2); /* PDPTE */
4181 rsvd_check
->rsvd_bits_mask
[0][1] = high_bits_rsvd
; /* PDE */
4182 rsvd_check
->rsvd_bits_mask
[0][0] = high_bits_rsvd
; /* PTE */
4183 rsvd_check
->rsvd_bits_mask
[1][1] = high_bits_rsvd
|
4184 rsvd_bits(13, 20); /* large page */
4185 rsvd_check
->rsvd_bits_mask
[1][0] =
4186 rsvd_check
->rsvd_bits_mask
[0][0];
4188 case PT64_ROOT_5LEVEL
:
4189 rsvd_check
->rsvd_bits_mask
[0][4] = high_bits_rsvd
|
4192 rsvd_check
->rsvd_bits_mask
[1][4] =
4193 rsvd_check
->rsvd_bits_mask
[0][4];
4195 case PT64_ROOT_4LEVEL
:
4196 rsvd_check
->rsvd_bits_mask
[0][3] = high_bits_rsvd
|
4199 rsvd_check
->rsvd_bits_mask
[0][2] = high_bits_rsvd
|
4201 rsvd_check
->rsvd_bits_mask
[0][1] = high_bits_rsvd
;
4202 rsvd_check
->rsvd_bits_mask
[0][0] = high_bits_rsvd
;
4203 rsvd_check
->rsvd_bits_mask
[1][3] =
4204 rsvd_check
->rsvd_bits_mask
[0][3];
4205 rsvd_check
->rsvd_bits_mask
[1][2] = high_bits_rsvd
|
4208 rsvd_check
->rsvd_bits_mask
[1][1] = high_bits_rsvd
|
4209 rsvd_bits(13, 20); /* large page */
4210 rsvd_check
->rsvd_bits_mask
[1][0] =
4211 rsvd_check
->rsvd_bits_mask
[0][0];
4216 static bool guest_can_use_gbpages(struct kvm_vcpu
*vcpu
)
4219 * If TDP is enabled, let the guest use GBPAGES if they're supported in
4220 * hardware. The hardware page walker doesn't let KVM disable GBPAGES,
4221 * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA
4222 * walk for performance and complexity reasons. Not to mention KVM
4223 * _can't_ solve the problem because GVA->GPA walks aren't visible to
4224 * KVM once a TDP translation is installed. Mimic hardware behavior so
4225 * that KVM's is at least consistent, i.e. doesn't randomly inject #PF.
4227 return tdp_enabled
? boot_cpu_has(X86_FEATURE_GBPAGES
) :
4228 guest_cpuid_has(vcpu
, X86_FEATURE_GBPAGES
);
4231 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
4232 struct kvm_mmu
*context
)
4234 __reset_rsvds_bits_mask(&context
->guest_rsvd_check
,
4235 vcpu
->arch
.reserved_gpa_bits
,
4236 context
->root_level
, is_efer_nx(context
),
4237 guest_can_use_gbpages(vcpu
),
4238 is_cr4_pse(context
),
4239 guest_cpuid_is_amd_or_hygon(vcpu
));
4243 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate
*rsvd_check
,
4244 u64 pa_bits_rsvd
, bool execonly
)
4246 u64 high_bits_rsvd
= pa_bits_rsvd
& rsvd_bits(0, 51);
4249 rsvd_check
->rsvd_bits_mask
[0][4] = high_bits_rsvd
| rsvd_bits(3, 7);
4250 rsvd_check
->rsvd_bits_mask
[0][3] = high_bits_rsvd
| rsvd_bits(3, 7);
4251 rsvd_check
->rsvd_bits_mask
[0][2] = high_bits_rsvd
| rsvd_bits(3, 6);
4252 rsvd_check
->rsvd_bits_mask
[0][1] = high_bits_rsvd
| rsvd_bits(3, 6);
4253 rsvd_check
->rsvd_bits_mask
[0][0] = high_bits_rsvd
;
4256 rsvd_check
->rsvd_bits_mask
[1][4] = rsvd_check
->rsvd_bits_mask
[0][4];
4257 rsvd_check
->rsvd_bits_mask
[1][3] = rsvd_check
->rsvd_bits_mask
[0][3];
4258 rsvd_check
->rsvd_bits_mask
[1][2] = high_bits_rsvd
| rsvd_bits(12, 29);
4259 rsvd_check
->rsvd_bits_mask
[1][1] = high_bits_rsvd
| rsvd_bits(12, 20);
4260 rsvd_check
->rsvd_bits_mask
[1][0] = rsvd_check
->rsvd_bits_mask
[0][0];
4262 bad_mt_xwr
= 0xFFull
<< (2 * 8); /* bits 3..5 must not be 2 */
4263 bad_mt_xwr
|= 0xFFull
<< (3 * 8); /* bits 3..5 must not be 3 */
4264 bad_mt_xwr
|= 0xFFull
<< (7 * 8); /* bits 3..5 must not be 7 */
4265 bad_mt_xwr
|= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
4266 bad_mt_xwr
|= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
4268 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
4269 bad_mt_xwr
|= REPEAT_BYTE(1ull << 4);
4271 rsvd_check
->bad_mt_xwr
= bad_mt_xwr
;
4274 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu
*vcpu
,
4275 struct kvm_mmu
*context
, bool execonly
)
4277 __reset_rsvds_bits_mask_ept(&context
->guest_rsvd_check
,
4278 vcpu
->arch
.reserved_gpa_bits
, execonly
);
4281 static inline u64
reserved_hpa_bits(void)
4283 return rsvd_bits(shadow_phys_bits
, 63);
4287 * the page table on host is the shadow page table for the page
4288 * table in guest or amd nested guest, its mmu features completely
4289 * follow the features in guest.
4291 static void reset_shadow_zero_bits_mask(struct kvm_vcpu
*vcpu
,
4292 struct kvm_mmu
*context
)
4295 * KVM uses NX when TDP is disabled to handle a variety of scenarios,
4296 * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and
4297 * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0.
4298 * The iTLB multi-hit workaround can be toggled at any time, so assume
4299 * NX can be used by any non-nested shadow MMU to avoid having to reset
4300 * MMU contexts. Note, KVM forces EFER.NX=1 when TDP is disabled.
4302 bool uses_nx
= is_efer_nx(context
) || !tdp_enabled
;
4304 /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */
4306 /* KVM doesn't use 2-level page tables for the shadow MMU. */
4307 bool is_pse
= false;
4308 struct rsvd_bits_validate
*shadow_zero_check
;
4311 WARN_ON_ONCE(context
->shadow_root_level
< PT32E_ROOT_LEVEL
);
4313 shadow_zero_check
= &context
->shadow_zero_check
;
4314 __reset_rsvds_bits_mask(shadow_zero_check
, reserved_hpa_bits(),
4315 context
->shadow_root_level
, uses_nx
,
4316 guest_can_use_gbpages(vcpu
), is_pse
, is_amd
);
4318 if (!shadow_me_mask
)
4321 for (i
= context
->shadow_root_level
; --i
>= 0;) {
4322 shadow_zero_check
->rsvd_bits_mask
[0][i
] &= ~shadow_me_mask
;
4323 shadow_zero_check
->rsvd_bits_mask
[1][i
] &= ~shadow_me_mask
;
4328 static inline bool boot_cpu_is_amd(void)
4330 WARN_ON_ONCE(!tdp_enabled
);
4331 return shadow_x_mask
== 0;
4335 * the direct page table on host, use as much mmu features as
4336 * possible, however, kvm currently does not do execution-protection.
4339 reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu
*vcpu
,
4340 struct kvm_mmu
*context
)
4342 struct rsvd_bits_validate
*shadow_zero_check
;
4345 shadow_zero_check
= &context
->shadow_zero_check
;
4347 if (boot_cpu_is_amd())
4348 __reset_rsvds_bits_mask(shadow_zero_check
, reserved_hpa_bits(),
4349 context
->shadow_root_level
, false,
4350 boot_cpu_has(X86_FEATURE_GBPAGES
),
4353 __reset_rsvds_bits_mask_ept(shadow_zero_check
,
4354 reserved_hpa_bits(), false);
4356 if (!shadow_me_mask
)
4359 for (i
= context
->shadow_root_level
; --i
>= 0;) {
4360 shadow_zero_check
->rsvd_bits_mask
[0][i
] &= ~shadow_me_mask
;
4361 shadow_zero_check
->rsvd_bits_mask
[1][i
] &= ~shadow_me_mask
;
4366 * as the comments in reset_shadow_zero_bits_mask() except it
4367 * is the shadow page table for intel nested guest.
4370 reset_ept_shadow_zero_bits_mask(struct kvm_vcpu
*vcpu
,
4371 struct kvm_mmu
*context
, bool execonly
)
4373 __reset_rsvds_bits_mask_ept(&context
->shadow_zero_check
,
4374 reserved_hpa_bits(), execonly
);
4377 #define BYTE_MASK(access) \
4378 ((1 & (access) ? 2 : 0) | \
4379 (2 & (access) ? 4 : 0) | \
4380 (3 & (access) ? 8 : 0) | \
4381 (4 & (access) ? 16 : 0) | \
4382 (5 & (access) ? 32 : 0) | \
4383 (6 & (access) ? 64 : 0) | \
4384 (7 & (access) ? 128 : 0))
4387 static void update_permission_bitmask(struct kvm_mmu
*mmu
, bool ept
)
4391 const u8 x
= BYTE_MASK(ACC_EXEC_MASK
);
4392 const u8 w
= BYTE_MASK(ACC_WRITE_MASK
);
4393 const u8 u
= BYTE_MASK(ACC_USER_MASK
);
4395 bool cr4_smep
= is_cr4_smep(mmu
);
4396 bool cr4_smap
= is_cr4_smap(mmu
);
4397 bool cr0_wp
= is_cr0_wp(mmu
);
4398 bool efer_nx
= is_efer_nx(mmu
);
4400 for (byte
= 0; byte
< ARRAY_SIZE(mmu
->permissions
); ++byte
) {
4401 unsigned pfec
= byte
<< 1;
4404 * Each "*f" variable has a 1 bit for each UWX value
4405 * that causes a fault with the given PFEC.
4408 /* Faults from writes to non-writable pages */
4409 u8 wf
= (pfec
& PFERR_WRITE_MASK
) ? (u8
)~w
: 0;
4410 /* Faults from user mode accesses to supervisor pages */
4411 u8 uf
= (pfec
& PFERR_USER_MASK
) ? (u8
)~u
: 0;
4412 /* Faults from fetches of non-executable pages*/
4413 u8 ff
= (pfec
& PFERR_FETCH_MASK
) ? (u8
)~x
: 0;
4414 /* Faults from kernel mode fetches of user pages */
4416 /* Faults from kernel mode accesses of user pages */
4420 /* Faults from kernel mode accesses to user pages */
4421 u8 kf
= (pfec
& PFERR_USER_MASK
) ? 0 : u
;
4423 /* Not really needed: !nx will cause pte.nx to fault */
4427 /* Allow supervisor writes if !cr0.wp */
4429 wf
= (pfec
& PFERR_USER_MASK
) ? wf
: 0;
4431 /* Disallow supervisor fetches of user code if cr4.smep */
4433 smepf
= (pfec
& PFERR_FETCH_MASK
) ? kf
: 0;
4436 * SMAP:kernel-mode data accesses from user-mode
4437 * mappings should fault. A fault is considered
4438 * as a SMAP violation if all of the following
4439 * conditions are true:
4440 * - X86_CR4_SMAP is set in CR4
4441 * - A user page is accessed
4442 * - The access is not a fetch
4443 * - Page fault in kernel mode
4444 * - if CPL = 3 or X86_EFLAGS_AC is clear
4446 * Here, we cover the first three conditions.
4447 * The fourth is computed dynamically in permission_fault();
4448 * PFERR_RSVD_MASK bit will be set in PFEC if the access is
4449 * *not* subject to SMAP restrictions.
4452 smapf
= (pfec
& (PFERR_RSVD_MASK
|PFERR_FETCH_MASK
)) ? 0 : kf
;
4455 mmu
->permissions
[byte
] = ff
| uf
| wf
| smepf
| smapf
;
4460 * PKU is an additional mechanism by which the paging controls access to
4461 * user-mode addresses based on the value in the PKRU register. Protection
4462 * key violations are reported through a bit in the page fault error code.
4463 * Unlike other bits of the error code, the PK bit is not known at the
4464 * call site of e.g. gva_to_gpa; it must be computed directly in
4465 * permission_fault based on two bits of PKRU, on some machine state (CR4,
4466 * CR0, EFER, CPL), and on other bits of the error code and the page tables.
4468 * In particular the following conditions come from the error code, the
4469 * page tables and the machine state:
4470 * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1
4471 * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch)
4472 * - PK is always zero if U=0 in the page tables
4473 * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access.
4475 * The PKRU bitmask caches the result of these four conditions. The error
4476 * code (minus the P bit) and the page table's U bit form an index into the
4477 * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed
4478 * with the two bits of the PKRU register corresponding to the protection key.
4479 * For the first three conditions above the bits will be 00, thus masking
4480 * away both AD and WD. For all reads or if the last condition holds, WD
4481 * only will be masked away.
4483 static void update_pkru_bitmask(struct kvm_mmu
*mmu
)
4488 if (!is_cr4_pke(mmu
)) {
4493 wp
= is_cr0_wp(mmu
);
4495 for (bit
= 0; bit
< ARRAY_SIZE(mmu
->permissions
); ++bit
) {
4496 unsigned pfec
, pkey_bits
;
4497 bool check_pkey
, check_write
, ff
, uf
, wf
, pte_user
;
4500 ff
= pfec
& PFERR_FETCH_MASK
;
4501 uf
= pfec
& PFERR_USER_MASK
;
4502 wf
= pfec
& PFERR_WRITE_MASK
;
4504 /* PFEC.RSVD is replaced by ACC_USER_MASK. */
4505 pte_user
= pfec
& PFERR_RSVD_MASK
;
4508 * Only need to check the access which is not an
4509 * instruction fetch and is to a user page.
4511 check_pkey
= (!ff
&& pte_user
);
4513 * write access is controlled by PKRU if it is a
4514 * user access or CR0.WP = 1.
4516 check_write
= check_pkey
&& wf
&& (uf
|| wp
);
4518 /* PKRU.AD stops both read and write access. */
4519 pkey_bits
= !!check_pkey
;
4520 /* PKRU.WD stops write access. */
4521 pkey_bits
|= (!!check_write
) << 1;
4523 mmu
->pkru_mask
|= (pkey_bits
& 3) << pfec
;
4527 static void reset_guest_paging_metadata(struct kvm_vcpu
*vcpu
,
4528 struct kvm_mmu
*mmu
)
4530 if (!is_cr0_pg(mmu
))
4533 reset_rsvds_bits_mask(vcpu
, mmu
);
4534 update_permission_bitmask(mmu
, false);
4535 update_pkru_bitmask(mmu
);
4538 static void paging64_init_context(struct kvm_mmu
*context
)
4540 context
->page_fault
= paging64_page_fault
;
4541 context
->gva_to_gpa
= paging64_gva_to_gpa
;
4542 context
->sync_page
= paging64_sync_page
;
4543 context
->invlpg
= paging64_invlpg
;
4544 context
->direct_map
= false;
4547 static void paging32_init_context(struct kvm_mmu
*context
)
4549 context
->page_fault
= paging32_page_fault
;
4550 context
->gva_to_gpa
= paging32_gva_to_gpa
;
4551 context
->sync_page
= paging32_sync_page
;
4552 context
->invlpg
= paging32_invlpg
;
4553 context
->direct_map
= false;
4556 static union kvm_mmu_extended_role
kvm_calc_mmu_role_ext(struct kvm_vcpu
*vcpu
,
4557 struct kvm_mmu_role_regs
*regs
)
4559 union kvm_mmu_extended_role ext
= {0};
4561 if (____is_cr0_pg(regs
)) {
4563 ext
.cr4_pae
= ____is_cr4_pae(regs
);
4564 ext
.cr4_smep
= ____is_cr4_smep(regs
);
4565 ext
.cr4_smap
= ____is_cr4_smap(regs
);
4566 ext
.cr4_pse
= ____is_cr4_pse(regs
);
4568 /* PKEY and LA57 are active iff long mode is active. */
4569 ext
.cr4_pke
= ____is_efer_lma(regs
) && ____is_cr4_pke(regs
);
4570 ext
.cr4_la57
= ____is_efer_lma(regs
) && ____is_cr4_la57(regs
);
4578 static union kvm_mmu_role
kvm_calc_mmu_role_common(struct kvm_vcpu
*vcpu
,
4579 struct kvm_mmu_role_regs
*regs
,
4582 union kvm_mmu_role role
= {0};
4584 role
.base
.access
= ACC_ALL
;
4585 if (____is_cr0_pg(regs
)) {
4586 role
.base
.efer_nx
= ____is_efer_nx(regs
);
4587 role
.base
.cr0_wp
= ____is_cr0_wp(regs
);
4589 role
.base
.smm
= is_smm(vcpu
);
4590 role
.base
.guest_mode
= is_guest_mode(vcpu
);
4595 role
.ext
= kvm_calc_mmu_role_ext(vcpu
, regs
);
4600 static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu
*vcpu
)
4602 /* Use 5-level TDP if and only if it's useful/necessary. */
4603 if (max_tdp_level
== 5 && cpuid_maxphyaddr(vcpu
) <= 48)
4606 return max_tdp_level
;
4609 static union kvm_mmu_role
4610 kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu
*vcpu
,
4611 struct kvm_mmu_role_regs
*regs
, bool base_only
)
4613 union kvm_mmu_role role
= kvm_calc_mmu_role_common(vcpu
, regs
, base_only
);
4615 role
.base
.ad_disabled
= (shadow_accessed_mask
== 0);
4616 role
.base
.level
= kvm_mmu_get_tdp_level(vcpu
);
4617 role
.base
.direct
= true;
4618 role
.base
.gpte_is_8_bytes
= true;
4623 static void init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
4625 struct kvm_mmu
*context
= &vcpu
->arch
.root_mmu
;
4626 struct kvm_mmu_role_regs regs
= vcpu_to_role_regs(vcpu
);
4627 union kvm_mmu_role new_role
=
4628 kvm_calc_tdp_mmu_root_page_role(vcpu
, ®s
, false);
4630 if (new_role
.as_u64
== context
->mmu_role
.as_u64
)
4633 context
->mmu_role
.as_u64
= new_role
.as_u64
;
4634 context
->page_fault
= kvm_tdp_page_fault
;
4635 context
->sync_page
= nonpaging_sync_page
;
4636 context
->invlpg
= NULL
;
4637 context
->shadow_root_level
= kvm_mmu_get_tdp_level(vcpu
);
4638 context
->direct_map
= true;
4639 context
->get_guest_pgd
= get_cr3
;
4640 context
->get_pdptr
= kvm_pdptr_read
;
4641 context
->inject_page_fault
= kvm_inject_page_fault
;
4642 context
->root_level
= role_regs_to_root_level(®s
);
4644 if (!is_cr0_pg(context
))
4645 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
4646 else if (is_cr4_pae(context
))
4647 context
->gva_to_gpa
= paging64_gva_to_gpa
;
4649 context
->gva_to_gpa
= paging32_gva_to_gpa
;
4651 reset_guest_paging_metadata(vcpu
, context
);
4652 reset_tdp_shadow_zero_bits_mask(vcpu
, context
);
4655 static union kvm_mmu_role
4656 kvm_calc_shadow_root_page_role_common(struct kvm_vcpu
*vcpu
,
4657 struct kvm_mmu_role_regs
*regs
, bool base_only
)
4659 union kvm_mmu_role role
= kvm_calc_mmu_role_common(vcpu
, regs
, base_only
);
4661 role
.base
.smep_andnot_wp
= role
.ext
.cr4_smep
&& !____is_cr0_wp(regs
);
4662 role
.base
.smap_andnot_wp
= role
.ext
.cr4_smap
&& !____is_cr0_wp(regs
);
4663 role
.base
.gpte_is_8_bytes
= ____is_cr0_pg(regs
) && ____is_cr4_pae(regs
);
4668 static union kvm_mmu_role
4669 kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu
*vcpu
,
4670 struct kvm_mmu_role_regs
*regs
, bool base_only
)
4672 union kvm_mmu_role role
=
4673 kvm_calc_shadow_root_page_role_common(vcpu
, regs
, base_only
);
4675 role
.base
.direct
= !____is_cr0_pg(regs
);
4677 if (!____is_efer_lma(regs
))
4678 role
.base
.level
= PT32E_ROOT_LEVEL
;
4679 else if (____is_cr4_la57(regs
))
4680 role
.base
.level
= PT64_ROOT_5LEVEL
;
4682 role
.base
.level
= PT64_ROOT_4LEVEL
;
4687 static void shadow_mmu_init_context(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
,
4688 struct kvm_mmu_role_regs
*regs
,
4689 union kvm_mmu_role new_role
)
4691 if (new_role
.as_u64
== context
->mmu_role
.as_u64
)
4694 context
->mmu_role
.as_u64
= new_role
.as_u64
;
4696 if (!is_cr0_pg(context
))
4697 nonpaging_init_context(context
);
4698 else if (is_cr4_pae(context
))
4699 paging64_init_context(context
);
4701 paging32_init_context(context
);
4702 context
->root_level
= role_regs_to_root_level(regs
);
4704 reset_guest_paging_metadata(vcpu
, context
);
4705 context
->shadow_root_level
= new_role
.base
.level
;
4707 reset_shadow_zero_bits_mask(vcpu
, context
);
4710 static void kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
,
4711 struct kvm_mmu_role_regs
*regs
)
4713 struct kvm_mmu
*context
= &vcpu
->arch
.root_mmu
;
4714 union kvm_mmu_role new_role
=
4715 kvm_calc_shadow_mmu_root_page_role(vcpu
, regs
, false);
4717 shadow_mmu_init_context(vcpu
, context
, regs
, new_role
);
4720 static union kvm_mmu_role
4721 kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu
*vcpu
,
4722 struct kvm_mmu_role_regs
*regs
)
4724 union kvm_mmu_role role
=
4725 kvm_calc_shadow_root_page_role_common(vcpu
, regs
, false);
4727 role
.base
.direct
= false;
4728 role
.base
.level
= kvm_mmu_get_tdp_level(vcpu
);
4733 void kvm_init_shadow_npt_mmu(struct kvm_vcpu
*vcpu
, unsigned long cr0
,
4734 unsigned long cr4
, u64 efer
, gpa_t nested_cr3
)
4736 struct kvm_mmu
*context
= &vcpu
->arch
.guest_mmu
;
4737 struct kvm_mmu_role_regs regs
= {
4742 union kvm_mmu_role new_role
;
4744 new_role
= kvm_calc_shadow_npt_root_page_role(vcpu
, ®s
);
4746 __kvm_mmu_new_pgd(vcpu
, nested_cr3
, new_role
.base
);
4748 shadow_mmu_init_context(vcpu
, context
, ®s
, new_role
);
4750 EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu
);
4752 static union kvm_mmu_role
4753 kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu
*vcpu
, bool accessed_dirty
,
4754 bool execonly
, u8 level
)
4756 union kvm_mmu_role role
= {0};
4758 /* SMM flag is inherited from root_mmu */
4759 role
.base
.smm
= vcpu
->arch
.root_mmu
.mmu_role
.base
.smm
;
4761 role
.base
.level
= level
;
4762 role
.base
.gpte_is_8_bytes
= true;
4763 role
.base
.direct
= false;
4764 role
.base
.ad_disabled
= !accessed_dirty
;
4765 role
.base
.guest_mode
= true;
4766 role
.base
.access
= ACC_ALL
;
4768 /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */
4770 role
.ext
.execonly
= execonly
;
4776 void kvm_init_shadow_ept_mmu(struct kvm_vcpu
*vcpu
, bool execonly
,
4777 bool accessed_dirty
, gpa_t new_eptp
)
4779 struct kvm_mmu
*context
= &vcpu
->arch
.guest_mmu
;
4780 u8 level
= vmx_eptp_page_walk_level(new_eptp
);
4781 union kvm_mmu_role new_role
=
4782 kvm_calc_shadow_ept_root_page_role(vcpu
, accessed_dirty
,
4785 __kvm_mmu_new_pgd(vcpu
, new_eptp
, new_role
.base
);
4787 if (new_role
.as_u64
== context
->mmu_role
.as_u64
)
4790 context
->mmu_role
.as_u64
= new_role
.as_u64
;
4792 context
->shadow_root_level
= level
;
4794 context
->ept_ad
= accessed_dirty
;
4795 context
->page_fault
= ept_page_fault
;
4796 context
->gva_to_gpa
= ept_gva_to_gpa
;
4797 context
->sync_page
= ept_sync_page
;
4798 context
->invlpg
= ept_invlpg
;
4799 context
->root_level
= level
;
4800 context
->direct_map
= false;
4802 update_permission_bitmask(context
, true);
4803 update_pkru_bitmask(context
);
4804 reset_rsvds_bits_mask_ept(vcpu
, context
, execonly
);
4805 reset_ept_shadow_zero_bits_mask(vcpu
, context
, execonly
);
4807 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu
);
4809 static void init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
4811 struct kvm_mmu
*context
= &vcpu
->arch
.root_mmu
;
4812 struct kvm_mmu_role_regs regs
= vcpu_to_role_regs(vcpu
);
4814 kvm_init_shadow_mmu(vcpu
, ®s
);
4816 context
->get_guest_pgd
= get_cr3
;
4817 context
->get_pdptr
= kvm_pdptr_read
;
4818 context
->inject_page_fault
= kvm_inject_page_fault
;
4821 static union kvm_mmu_role
4822 kvm_calc_nested_mmu_role(struct kvm_vcpu
*vcpu
, struct kvm_mmu_role_regs
*regs
)
4824 union kvm_mmu_role role
;
4826 role
= kvm_calc_shadow_root_page_role_common(vcpu
, regs
, false);
4829 * Nested MMUs are used only for walking L2's gva->gpa, they never have
4830 * shadow pages of their own and so "direct" has no meaning. Set it
4831 * to "true" to try to detect bogus usage of the nested MMU.
4833 role
.base
.direct
= true;
4834 role
.base
.level
= role_regs_to_root_level(regs
);
4838 static void init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
4840 struct kvm_mmu_role_regs regs
= vcpu_to_role_regs(vcpu
);
4841 union kvm_mmu_role new_role
= kvm_calc_nested_mmu_role(vcpu
, ®s
);
4842 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
4844 if (new_role
.as_u64
== g_context
->mmu_role
.as_u64
)
4847 g_context
->mmu_role
.as_u64
= new_role
.as_u64
;
4848 g_context
->get_guest_pgd
= get_cr3
;
4849 g_context
->get_pdptr
= kvm_pdptr_read
;
4850 g_context
->inject_page_fault
= kvm_inject_page_fault
;
4851 g_context
->root_level
= new_role
.base
.level
;
4854 * L2 page tables are never shadowed, so there is no need to sync
4857 g_context
->invlpg
= NULL
;
4860 * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using
4861 * L1's nested page tables (e.g. EPT12). The nested translation
4862 * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using
4863 * L2's page tables as the first level of translation and L1's
4864 * nested page tables as the second level of translation. Basically
4865 * the gva_to_gpa functions between mmu and nested_mmu are swapped.
4867 if (!is_paging(vcpu
))
4868 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
4869 else if (is_long_mode(vcpu
))
4870 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
4871 else if (is_pae(vcpu
))
4872 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
4874 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
4876 reset_guest_paging_metadata(vcpu
, g_context
);
4879 void kvm_init_mmu(struct kvm_vcpu
*vcpu
)
4881 if (mmu_is_nested(vcpu
))
4882 init_kvm_nested_mmu(vcpu
);
4883 else if (tdp_enabled
)
4884 init_kvm_tdp_mmu(vcpu
);
4886 init_kvm_softmmu(vcpu
);
4888 EXPORT_SYMBOL_GPL(kvm_init_mmu
);
4890 static union kvm_mmu_page_role
4891 kvm_mmu_calc_root_page_role(struct kvm_vcpu
*vcpu
)
4893 struct kvm_mmu_role_regs regs
= vcpu_to_role_regs(vcpu
);
4894 union kvm_mmu_role role
;
4897 role
= kvm_calc_tdp_mmu_root_page_role(vcpu
, ®s
, true);
4899 role
= kvm_calc_shadow_mmu_root_page_role(vcpu
, ®s
, true);
4904 void kvm_mmu_after_set_cpuid(struct kvm_vcpu
*vcpu
)
4907 * Invalidate all MMU roles to force them to reinitialize as CPUID
4908 * information is factored into reserved bit calculations.
4910 vcpu
->arch
.root_mmu
.mmu_role
.ext
.valid
= 0;
4911 vcpu
->arch
.guest_mmu
.mmu_role
.ext
.valid
= 0;
4912 vcpu
->arch
.nested_mmu
.mmu_role
.ext
.valid
= 0;
4913 kvm_mmu_reset_context(vcpu
);
4916 * KVM does not correctly handle changing guest CPUID after KVM_RUN, as
4917 * MAXPHYADDR, GBPAGES support, AMD reserved bit behavior, etc.. aren't
4918 * tracked in kvm_mmu_page_role. As a result, KVM may miss guest page
4919 * faults due to reusing SPs/SPTEs. Alert userspace, but otherwise
4920 * sweep the problem under the rug.
4922 * KVM's horrific CPUID ABI makes the problem all but impossible to
4923 * solve, as correctly handling multiple vCPU models (with respect to
4924 * paging and physical address properties) in a single VM would require
4925 * tracking all relevant CPUID information in kvm_mmu_page_role. That
4926 * is very undesirable as it would double the memory requirements for
4927 * gfn_track (see struct kvm_mmu_page_role comments), and in practice
4928 * no sane VMM mucks with the core vCPU model on the fly.
4930 if (vcpu
->arch
.last_vmentry_cpu
!= -1) {
4931 pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} after KVM_RUN may cause guest instability\n");
4932 pr_warn_ratelimited("KVM: KVM_SET_CPUID{,2} will fail after KVM_RUN starting with Linux 5.16\n");
4936 void kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
4938 kvm_mmu_unload(vcpu
);
4941 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
4943 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
4947 r
= mmu_topup_memory_caches(vcpu
, !vcpu
->arch
.mmu
->direct_map
);
4950 r
= mmu_alloc_special_roots(vcpu
);
4953 if (vcpu
->arch
.mmu
->direct_map
)
4954 r
= mmu_alloc_direct_roots(vcpu
);
4956 r
= mmu_alloc_shadow_roots(vcpu
);
4960 kvm_mmu_sync_roots(vcpu
);
4962 kvm_mmu_load_pgd(vcpu
);
4963 static_call(kvm_x86_tlb_flush_current
)(vcpu
);
4968 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
4970 kvm_mmu_free_roots(vcpu
, &vcpu
->arch
.root_mmu
, KVM_MMU_ROOTS_ALL
);
4971 WARN_ON(VALID_PAGE(vcpu
->arch
.root_mmu
.root_hpa
));
4972 kvm_mmu_free_roots(vcpu
, &vcpu
->arch
.guest_mmu
, KVM_MMU_ROOTS_ALL
);
4973 WARN_ON(VALID_PAGE(vcpu
->arch
.guest_mmu
.root_hpa
));
4976 static bool need_remote_flush(u64 old
, u64
new)
4978 if (!is_shadow_present_pte(old
))
4980 if (!is_shadow_present_pte(new))
4982 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
4984 old
^= shadow_nx_mask
;
4985 new ^= shadow_nx_mask
;
4986 return (old
& ~new & PT64_PERM_MASK
) != 0;
4989 static u64
mmu_pte_write_fetch_gpte(struct kvm_vcpu
*vcpu
, gpa_t
*gpa
,
4996 * Assume that the pte write on a page table of the same type
4997 * as the current vcpu paging mode since we update the sptes only
4998 * when they have the same mode.
5000 if (is_pae(vcpu
) && *bytes
== 4) {
5001 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
5006 if (*bytes
== 4 || *bytes
== 8) {
5007 r
= kvm_vcpu_read_guest_atomic(vcpu
, *gpa
, &gentry
, *bytes
);
5016 * If we're seeing too many writes to a page, it may no longer be a page table,
5017 * or we may be forking, in which case it is better to unmap the page.
5019 static bool detect_write_flooding(struct kvm_mmu_page
*sp
)
5022 * Skip write-flooding detected for the sp whose level is 1, because
5023 * it can become unsync, then the guest page is not write-protected.
5025 if (sp
->role
.level
== PG_LEVEL_4K
)
5028 atomic_inc(&sp
->write_flooding_count
);
5029 return atomic_read(&sp
->write_flooding_count
) >= 3;
5033 * Misaligned accesses are too much trouble to fix up; also, they usually
5034 * indicate a page is not used as a page table.
5036 static bool detect_write_misaligned(struct kvm_mmu_page
*sp
, gpa_t gpa
,
5039 unsigned offset
, pte_size
, misaligned
;
5041 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
5042 gpa
, bytes
, sp
->role
.word
);
5044 offset
= offset_in_page(gpa
);
5045 pte_size
= sp
->role
.gpte_is_8_bytes
? 8 : 4;
5048 * Sometimes, the OS only writes the last one bytes to update status
5049 * bits, for example, in linux, andb instruction is used in clear_bit().
5051 if (!(offset
& (pte_size
- 1)) && bytes
== 1)
5054 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
5055 misaligned
|= bytes
< 4;
5060 static u64
*get_written_sptes(struct kvm_mmu_page
*sp
, gpa_t gpa
, int *nspte
)
5062 unsigned page_offset
, quadrant
;
5066 page_offset
= offset_in_page(gpa
);
5067 level
= sp
->role
.level
;
5069 if (!sp
->role
.gpte_is_8_bytes
) {
5070 page_offset
<<= 1; /* 32->64 */
5072 * A 32-bit pde maps 4MB while the shadow pdes map
5073 * only 2MB. So we need to double the offset again
5074 * and zap two pdes instead of one.
5076 if (level
== PT32_ROOT_LEVEL
) {
5077 page_offset
&= ~7; /* kill rounding error */
5081 quadrant
= page_offset
>> PAGE_SHIFT
;
5082 page_offset
&= ~PAGE_MASK
;
5083 if (quadrant
!= sp
->role
.quadrant
)
5087 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
5091 static void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5092 const u8
*new, int bytes
,
5093 struct kvm_page_track_notifier_node
*node
)
5095 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
5096 struct kvm_mmu_page
*sp
;
5097 LIST_HEAD(invalid_list
);
5098 u64 entry
, gentry
, *spte
;
5100 bool remote_flush
, local_flush
;
5103 * If we don't have indirect shadow pages, it means no page is
5104 * write-protected, so we can exit simply.
5106 if (!READ_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
5109 remote_flush
= local_flush
= false;
5111 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
5114 * No need to care whether allocation memory is successful
5115 * or not since pte prefetch is skipped if it does not have
5116 * enough objects in the cache.
5118 mmu_topup_memory_caches(vcpu
, true);
5120 write_lock(&vcpu
->kvm
->mmu_lock
);
5122 gentry
= mmu_pte_write_fetch_gpte(vcpu
, &gpa
, &bytes
);
5124 ++vcpu
->kvm
->stat
.mmu_pte_write
;
5125 kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
5127 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
5128 if (detect_write_misaligned(sp
, gpa
, bytes
) ||
5129 detect_write_flooding(sp
)) {
5130 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
5131 ++vcpu
->kvm
->stat
.mmu_flooded
;
5135 spte
= get_written_sptes(sp
, gpa
, &npte
);
5142 mmu_page_zap_pte(vcpu
->kvm
, sp
, spte
, NULL
);
5143 if (gentry
&& sp
->role
.level
!= PG_LEVEL_4K
)
5144 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
5145 if (need_remote_flush(entry
, *spte
))
5146 remote_flush
= true;
5150 kvm_mmu_flush_or_zap(vcpu
, &invalid_list
, remote_flush
, local_flush
);
5151 kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
5152 write_unlock(&vcpu
->kvm
->mmu_lock
);
5155 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
, u64 error_code
,
5156 void *insn
, int insn_len
)
5158 int r
, emulation_type
= EMULTYPE_PF
;
5159 bool direct
= vcpu
->arch
.mmu
->direct_map
;
5161 if (WARN_ON(!VALID_PAGE(vcpu
->arch
.mmu
->root_hpa
)))
5162 return RET_PF_RETRY
;
5165 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
5166 r
= handle_mmio_page_fault(vcpu
, cr2_or_gpa
, direct
);
5167 if (r
== RET_PF_EMULATE
)
5171 if (r
== RET_PF_INVALID
) {
5172 r
= kvm_mmu_do_page_fault(vcpu
, cr2_or_gpa
,
5173 lower_32_bits(error_code
), false);
5174 if (KVM_BUG_ON(r
== RET_PF_INVALID
, vcpu
->kvm
))
5180 if (r
!= RET_PF_EMULATE
)
5184 * Before emulating the instruction, check if the error code
5185 * was due to a RO violation while translating the guest page.
5186 * This can occur when using nested virtualization with nested
5187 * paging in both guests. If true, we simply unprotect the page
5188 * and resume the guest.
5190 if (vcpu
->arch
.mmu
->direct_map
&&
5191 (error_code
& PFERR_NESTED_GUEST_PAGE
) == PFERR_NESTED_GUEST_PAGE
) {
5192 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(cr2_or_gpa
));
5197 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still
5198 * optimistically try to just unprotect the page and let the processor
5199 * re-execute the instruction that caused the page fault. Do not allow
5200 * retrying MMIO emulation, as it's not only pointless but could also
5201 * cause us to enter an infinite loop because the processor will keep
5202 * faulting on the non-existent MMIO address. Retrying an instruction
5203 * from a nested guest is also pointless and dangerous as we are only
5204 * explicitly shadowing L1's page tables, i.e. unprotecting something
5205 * for L1 isn't going to magically fix whatever issue cause L2 to fail.
5207 if (!mmio_info_in_cache(vcpu
, cr2_or_gpa
, direct
) && !is_guest_mode(vcpu
))
5208 emulation_type
|= EMULTYPE_ALLOW_RETRY_PF
;
5210 return x86_emulate_instruction(vcpu
, cr2_or_gpa
, emulation_type
, insn
,
5213 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
5215 void kvm_mmu_invalidate_gva(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
5216 gva_t gva
, hpa_t root_hpa
)
5220 /* It's actually a GPA for vcpu->arch.guest_mmu. */
5221 if (mmu
!= &vcpu
->arch
.guest_mmu
) {
5222 /* INVLPG on a non-canonical address is a NOP according to the SDM. */
5223 if (is_noncanonical_address(gva
, vcpu
))
5226 static_call(kvm_x86_tlb_flush_gva
)(vcpu
, gva
);
5232 if (root_hpa
== INVALID_PAGE
) {
5233 mmu
->invlpg(vcpu
, gva
, mmu
->root_hpa
);
5236 * INVLPG is required to invalidate any global mappings for the VA,
5237 * irrespective of PCID. Since it would take us roughly similar amount
5238 * of work to determine whether any of the prev_root mappings of the VA
5239 * is marked global, or to just sync it blindly, so we might as well
5240 * just always sync it.
5242 * Mappings not reachable via the current cr3 or the prev_roots will be
5243 * synced when switching to that cr3, so nothing needs to be done here
5246 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
5247 if (VALID_PAGE(mmu
->prev_roots
[i
].hpa
))
5248 mmu
->invlpg(vcpu
, gva
, mmu
->prev_roots
[i
].hpa
);
5250 mmu
->invlpg(vcpu
, gva
, root_hpa
);
5254 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
5256 kvm_mmu_invalidate_gva(vcpu
, vcpu
->arch
.mmu
, gva
, INVALID_PAGE
);
5257 ++vcpu
->stat
.invlpg
;
5259 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
5262 void kvm_mmu_invpcid_gva(struct kvm_vcpu
*vcpu
, gva_t gva
, unsigned long pcid
)
5264 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
5265 bool tlb_flush
= false;
5268 if (pcid
== kvm_get_active_pcid(vcpu
)) {
5269 mmu
->invlpg(vcpu
, gva
, mmu
->root_hpa
);
5273 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++) {
5274 if (VALID_PAGE(mmu
->prev_roots
[i
].hpa
) &&
5275 pcid
== kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
)) {
5276 mmu
->invlpg(vcpu
, gva
, mmu
->prev_roots
[i
].hpa
);
5282 static_call(kvm_x86_tlb_flush_gva
)(vcpu
, gva
);
5284 ++vcpu
->stat
.invlpg
;
5287 * Mappings not reachable via the current cr3 or the prev_roots will be
5288 * synced when switching to that cr3, so nothing needs to be done here
5293 void kvm_configure_mmu(bool enable_tdp
, int tdp_max_root_level
,
5294 int tdp_huge_page_level
)
5296 tdp_enabled
= enable_tdp
;
5297 max_tdp_level
= tdp_max_root_level
;
5300 * max_huge_page_level reflects KVM's MMU capabilities irrespective
5301 * of kernel support, e.g. KVM may be capable of using 1GB pages when
5302 * the kernel is not. But, KVM never creates a page size greater than
5303 * what is used by the kernel for any given HVA, i.e. the kernel's
5304 * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust().
5307 max_huge_page_level
= tdp_huge_page_level
;
5308 else if (boot_cpu_has(X86_FEATURE_GBPAGES
))
5309 max_huge_page_level
= PG_LEVEL_1G
;
5311 max_huge_page_level
= PG_LEVEL_2M
;
5313 EXPORT_SYMBOL_GPL(kvm_configure_mmu
);
5315 /* The return value indicates if tlb flush on all vcpus is needed. */
5316 typedef bool (*slot_level_handler
) (struct kvm
*kvm
,
5317 struct kvm_rmap_head
*rmap_head
,
5318 const struct kvm_memory_slot
*slot
);
5320 /* The caller should hold mmu-lock before calling this function. */
5321 static __always_inline
bool
5322 slot_handle_level_range(struct kvm
*kvm
, const struct kvm_memory_slot
*memslot
,
5323 slot_level_handler fn
, int start_level
, int end_level
,
5324 gfn_t start_gfn
, gfn_t end_gfn
, bool flush_on_yield
,
5327 struct slot_rmap_walk_iterator iterator
;
5329 for_each_slot_rmap_range(memslot
, start_level
, end_level
, start_gfn
,
5330 end_gfn
, &iterator
) {
5332 flush
|= fn(kvm
, iterator
.rmap
, memslot
);
5334 if (need_resched() || rwlock_needbreak(&kvm
->mmu_lock
)) {
5335 if (flush
&& flush_on_yield
) {
5336 kvm_flush_remote_tlbs_with_address(kvm
,
5338 iterator
.gfn
- start_gfn
+ 1);
5341 cond_resched_rwlock_write(&kvm
->mmu_lock
);
5348 static __always_inline
bool
5349 slot_handle_level(struct kvm
*kvm
, const struct kvm_memory_slot
*memslot
,
5350 slot_level_handler fn
, int start_level
, int end_level
,
5351 bool flush_on_yield
)
5353 return slot_handle_level_range(kvm
, memslot
, fn
, start_level
,
5354 end_level
, memslot
->base_gfn
,
5355 memslot
->base_gfn
+ memslot
->npages
- 1,
5356 flush_on_yield
, false);
5359 static __always_inline
bool
5360 slot_handle_leaf(struct kvm
*kvm
, const struct kvm_memory_slot
*memslot
,
5361 slot_level_handler fn
, bool flush_on_yield
)
5363 return slot_handle_level(kvm
, memslot
, fn
, PG_LEVEL_4K
,
5364 PG_LEVEL_4K
, flush_on_yield
);
5367 static void free_mmu_pages(struct kvm_mmu
*mmu
)
5369 if (!tdp_enabled
&& mmu
->pae_root
)
5370 set_memory_encrypted((unsigned long)mmu
->pae_root
, 1);
5371 free_page((unsigned long)mmu
->pae_root
);
5372 free_page((unsigned long)mmu
->pml4_root
);
5375 static int __kvm_mmu_create(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
5380 mmu
->root_hpa
= INVALID_PAGE
;
5382 mmu
->translate_gpa
= translate_gpa
;
5383 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
5384 mmu
->prev_roots
[i
] = KVM_MMU_ROOT_INFO_INVALID
;
5387 * When using PAE paging, the four PDPTEs are treated as 'root' pages,
5388 * while the PDP table is a per-vCPU construct that's allocated at MMU
5389 * creation. When emulating 32-bit mode, cr3 is only 32 bits even on
5390 * x86_64. Therefore we need to allocate the PDP table in the first
5391 * 4GB of memory, which happens to fit the DMA32 zone. TDP paging
5392 * generally doesn't use PAE paging and can skip allocating the PDP
5393 * table. The main exception, handled here, is SVM's 32-bit NPT. The
5394 * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit
5395 * KVM; that horror is handled on-demand by mmu_alloc_shadow_roots().
5397 if (tdp_enabled
&& kvm_mmu_get_tdp_level(vcpu
) > PT32E_ROOT_LEVEL
)
5400 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_DMA32
);
5404 mmu
->pae_root
= page_address(page
);
5407 * CR3 is only 32 bits when PAE paging is used, thus it's impossible to
5408 * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so
5409 * that KVM's writes and the CPU's reads get along. Note, this is
5410 * only necessary when using shadow paging, as 64-bit NPT can get at
5411 * the C-bit even when shadowing 32-bit NPT, and SME isn't supported
5412 * by 32-bit kernels (when KVM itself uses 32-bit NPT).
5415 set_memory_decrypted((unsigned long)mmu
->pae_root
, 1);
5417 WARN_ON_ONCE(shadow_me_mask
);
5419 for (i
= 0; i
< 4; ++i
)
5420 mmu
->pae_root
[i
] = INVALID_PAE_ROOT
;
5425 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
5429 vcpu
->arch
.mmu_pte_list_desc_cache
.kmem_cache
= pte_list_desc_cache
;
5430 vcpu
->arch
.mmu_pte_list_desc_cache
.gfp_zero
= __GFP_ZERO
;
5432 vcpu
->arch
.mmu_page_header_cache
.kmem_cache
= mmu_page_header_cache
;
5433 vcpu
->arch
.mmu_page_header_cache
.gfp_zero
= __GFP_ZERO
;
5435 vcpu
->arch
.mmu_shadow_page_cache
.gfp_zero
= __GFP_ZERO
;
5437 vcpu
->arch
.mmu
= &vcpu
->arch
.root_mmu
;
5438 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.root_mmu
;
5440 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
5442 ret
= __kvm_mmu_create(vcpu
, &vcpu
->arch
.guest_mmu
);
5446 ret
= __kvm_mmu_create(vcpu
, &vcpu
->arch
.root_mmu
);
5448 goto fail_allocate_root
;
5452 free_mmu_pages(&vcpu
->arch
.guest_mmu
);
5456 #define BATCH_ZAP_PAGES 10
5457 static void kvm_zap_obsolete_pages(struct kvm
*kvm
)
5459 struct kvm_mmu_page
*sp
, *node
;
5460 int nr_zapped
, batch
= 0;
5463 list_for_each_entry_safe_reverse(sp
, node
,
5464 &kvm
->arch
.active_mmu_pages
, link
) {
5466 * No obsolete valid page exists before a newly created page
5467 * since active_mmu_pages is a FIFO list.
5469 if (!is_obsolete_sp(kvm
, sp
))
5473 * Invalid pages should never land back on the list of active
5474 * pages. Skip the bogus page, otherwise we'll get stuck in an
5475 * infinite loop if the page gets put back on the list (again).
5477 if (WARN_ON(sp
->role
.invalid
))
5481 * No need to flush the TLB since we're only zapping shadow
5482 * pages with an obsolete generation number and all vCPUS have
5483 * loaded a new root, i.e. the shadow pages being zapped cannot
5484 * be in active use by the guest.
5486 if (batch
>= BATCH_ZAP_PAGES
&&
5487 cond_resched_rwlock_write(&kvm
->mmu_lock
)) {
5492 if (__kvm_mmu_prepare_zap_page(kvm
, sp
,
5493 &kvm
->arch
.zapped_obsolete_pages
, &nr_zapped
)) {
5500 * Trigger a remote TLB flush before freeing the page tables to ensure
5501 * KVM is not in the middle of a lockless shadow page table walk, which
5502 * may reference the pages.
5504 kvm_mmu_commit_zap_page(kvm
, &kvm
->arch
.zapped_obsolete_pages
);
5508 * Fast invalidate all shadow pages and use lock-break technique
5509 * to zap obsolete pages.
5511 * It's required when memslot is being deleted or VM is being
5512 * destroyed, in these cases, we should ensure that KVM MMU does
5513 * not use any resource of the being-deleted slot or all slots
5514 * after calling the function.
5516 static void kvm_mmu_zap_all_fast(struct kvm
*kvm
)
5518 lockdep_assert_held(&kvm
->slots_lock
);
5520 write_lock(&kvm
->mmu_lock
);
5521 trace_kvm_mmu_zap_all_fast(kvm
);
5524 * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is
5525 * held for the entire duration of zapping obsolete pages, it's
5526 * impossible for there to be multiple invalid generations associated
5527 * with *valid* shadow pages at any given time, i.e. there is exactly
5528 * one valid generation and (at most) one invalid generation.
5530 kvm
->arch
.mmu_valid_gen
= kvm
->arch
.mmu_valid_gen
? 0 : 1;
5532 /* In order to ensure all threads see this change when
5533 * handling the MMU reload signal, this must happen in the
5534 * same critical section as kvm_reload_remote_mmus, and
5535 * before kvm_zap_obsolete_pages as kvm_zap_obsolete_pages
5536 * could drop the MMU lock and yield.
5538 if (is_tdp_mmu_enabled(kvm
))
5539 kvm_tdp_mmu_invalidate_all_roots(kvm
);
5542 * Notify all vcpus to reload its shadow page table and flush TLB.
5543 * Then all vcpus will switch to new shadow page table with the new
5546 * Note: we need to do this under the protection of mmu_lock,
5547 * otherwise, vcpu would purge shadow page but miss tlb flush.
5549 kvm_reload_remote_mmus(kvm
);
5551 kvm_zap_obsolete_pages(kvm
);
5553 write_unlock(&kvm
->mmu_lock
);
5555 if (is_tdp_mmu_enabled(kvm
)) {
5556 read_lock(&kvm
->mmu_lock
);
5557 kvm_tdp_mmu_zap_invalidated_roots(kvm
);
5558 read_unlock(&kvm
->mmu_lock
);
5562 static bool kvm_has_zapped_obsolete_pages(struct kvm
*kvm
)
5564 return unlikely(!list_empty_careful(&kvm
->arch
.zapped_obsolete_pages
));
5567 static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm
*kvm
,
5568 struct kvm_memory_slot
*slot
,
5569 struct kvm_page_track_notifier_node
*node
)
5571 kvm_mmu_zap_all_fast(kvm
);
5574 void kvm_mmu_init_vm(struct kvm
*kvm
)
5576 struct kvm_page_track_notifier_node
*node
= &kvm
->arch
.mmu_sp_tracker
;
5578 if (!kvm_mmu_init_tdp_mmu(kvm
))
5580 * No smp_load/store wrappers needed here as we are in
5581 * VM init and there cannot be any memslots / other threads
5582 * accessing this struct kvm yet.
5584 kvm
->arch
.memslots_have_rmaps
= true;
5586 node
->track_write
= kvm_mmu_pte_write
;
5587 node
->track_flush_slot
= kvm_mmu_invalidate_zap_pages_in_memslot
;
5588 kvm_page_track_register_notifier(kvm
, node
);
5591 void kvm_mmu_uninit_vm(struct kvm
*kvm
)
5593 struct kvm_page_track_notifier_node
*node
= &kvm
->arch
.mmu_sp_tracker
;
5595 kvm_page_track_unregister_notifier(kvm
, node
);
5597 kvm_mmu_uninit_tdp_mmu(kvm
);
5600 void kvm_zap_gfn_range(struct kvm
*kvm
, gfn_t gfn_start
, gfn_t gfn_end
)
5602 struct kvm_memslots
*slots
;
5603 struct kvm_memory_slot
*memslot
;
5607 if (kvm_memslots_have_rmaps(kvm
)) {
5608 write_lock(&kvm
->mmu_lock
);
5609 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
5610 slots
= __kvm_memslots(kvm
, i
);
5611 kvm_for_each_memslot(memslot
, slots
) {
5614 start
= max(gfn_start
, memslot
->base_gfn
);
5615 end
= min(gfn_end
, memslot
->base_gfn
+ memslot
->npages
);
5619 flush
= slot_handle_level_range(kvm
,
5620 (const struct kvm_memory_slot
*) memslot
,
5621 kvm_zap_rmapp
, PG_LEVEL_4K
,
5622 KVM_MAX_HUGEPAGE_LEVEL
, start
,
5623 end
- 1, true, flush
);
5627 kvm_flush_remote_tlbs_with_address(kvm
, gfn_start
, gfn_end
);
5628 write_unlock(&kvm
->mmu_lock
);
5631 if (is_tdp_mmu_enabled(kvm
)) {
5634 read_lock(&kvm
->mmu_lock
);
5635 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++)
5636 flush
= kvm_tdp_mmu_zap_gfn_range(kvm
, i
, gfn_start
,
5637 gfn_end
, flush
, true);
5639 kvm_flush_remote_tlbs_with_address(kvm
, gfn_start
,
5642 read_unlock(&kvm
->mmu_lock
);
5646 static bool slot_rmap_write_protect(struct kvm
*kvm
,
5647 struct kvm_rmap_head
*rmap_head
,
5648 const struct kvm_memory_slot
*slot
)
5650 return __rmap_write_protect(kvm
, rmap_head
, false);
5653 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
,
5654 const struct kvm_memory_slot
*memslot
,
5659 if (kvm_memslots_have_rmaps(kvm
)) {
5660 write_lock(&kvm
->mmu_lock
);
5661 flush
= slot_handle_level(kvm
, memslot
, slot_rmap_write_protect
,
5662 start_level
, KVM_MAX_HUGEPAGE_LEVEL
,
5664 write_unlock(&kvm
->mmu_lock
);
5667 if (is_tdp_mmu_enabled(kvm
)) {
5668 read_lock(&kvm
->mmu_lock
);
5669 flush
|= kvm_tdp_mmu_wrprot_slot(kvm
, memslot
, start_level
);
5670 read_unlock(&kvm
->mmu_lock
);
5674 * We can flush all the TLBs out of the mmu lock without TLB
5675 * corruption since we just change the spte from writable to
5676 * readonly so that we only need to care the case of changing
5677 * spte from present to present (changing the spte from present
5678 * to nonpresent will flush all the TLBs immediately), in other
5679 * words, the only case we care is mmu_spte_update() where we
5680 * have checked Host-writable | MMU-writable instead of
5681 * PT_WRITABLE_MASK, that means it does not depend on PT_WRITABLE_MASK
5685 kvm_arch_flush_remote_tlbs_memslot(kvm
, memslot
);
5688 static bool kvm_mmu_zap_collapsible_spte(struct kvm
*kvm
,
5689 struct kvm_rmap_head
*rmap_head
,
5690 const struct kvm_memory_slot
*slot
)
5693 struct rmap_iterator iter
;
5694 int need_tlb_flush
= 0;
5696 struct kvm_mmu_page
*sp
;
5699 for_each_rmap_spte(rmap_head
, &iter
, sptep
) {
5700 sp
= sptep_to_sp(sptep
);
5701 pfn
= spte_to_pfn(*sptep
);
5704 * We cannot do huge page mapping for indirect shadow pages,
5705 * which are found on the last rmap (level = 1) when not using
5706 * tdp; such shadow pages are synced with the page table in
5707 * the guest, and the guest page table is using 4K page size
5708 * mapping if the indirect sp has level = 1.
5710 if (sp
->role
.direct
&& !kvm_is_reserved_pfn(pfn
) &&
5711 sp
->role
.level
< kvm_mmu_max_mapping_level(kvm
, slot
, sp
->gfn
,
5712 pfn
, PG_LEVEL_NUM
)) {
5713 pte_list_remove(rmap_head
, sptep
);
5715 if (kvm_available_flush_tlb_with_range())
5716 kvm_flush_remote_tlbs_with_address(kvm
, sp
->gfn
,
5717 KVM_PAGES_PER_HPAGE(sp
->role
.level
));
5725 return need_tlb_flush
;
5728 void kvm_mmu_zap_collapsible_sptes(struct kvm
*kvm
,
5729 const struct kvm_memory_slot
*slot
)
5733 if (kvm_memslots_have_rmaps(kvm
)) {
5734 write_lock(&kvm
->mmu_lock
);
5735 flush
= slot_handle_leaf(kvm
, slot
, kvm_mmu_zap_collapsible_spte
, true);
5737 kvm_arch_flush_remote_tlbs_memslot(kvm
, slot
);
5738 write_unlock(&kvm
->mmu_lock
);
5741 if (is_tdp_mmu_enabled(kvm
)) {
5742 read_lock(&kvm
->mmu_lock
);
5743 flush
= kvm_tdp_mmu_zap_collapsible_sptes(kvm
, slot
, flush
);
5745 kvm_arch_flush_remote_tlbs_memslot(kvm
, slot
);
5746 read_unlock(&kvm
->mmu_lock
);
5750 void kvm_arch_flush_remote_tlbs_memslot(struct kvm
*kvm
,
5751 const struct kvm_memory_slot
*memslot
)
5754 * All current use cases for flushing the TLBs for a specific memslot
5755 * related to dirty logging, and many do the TLB flush out of mmu_lock.
5756 * The interaction between the various operations on memslot must be
5757 * serialized by slots_locks to ensure the TLB flush from one operation
5758 * is observed by any other operation on the same memslot.
5760 lockdep_assert_held(&kvm
->slots_lock
);
5761 kvm_flush_remote_tlbs_with_address(kvm
, memslot
->base_gfn
,
5765 void kvm_mmu_slot_leaf_clear_dirty(struct kvm
*kvm
,
5766 const struct kvm_memory_slot
*memslot
)
5770 if (kvm_memslots_have_rmaps(kvm
)) {
5771 write_lock(&kvm
->mmu_lock
);
5772 flush
= slot_handle_leaf(kvm
, memslot
, __rmap_clear_dirty
,
5774 write_unlock(&kvm
->mmu_lock
);
5777 if (is_tdp_mmu_enabled(kvm
)) {
5778 read_lock(&kvm
->mmu_lock
);
5779 flush
|= kvm_tdp_mmu_clear_dirty_slot(kvm
, memslot
);
5780 read_unlock(&kvm
->mmu_lock
);
5784 * It's also safe to flush TLBs out of mmu lock here as currently this
5785 * function is only used for dirty logging, in which case flushing TLB
5786 * out of mmu lock also guarantees no dirty pages will be lost in
5790 kvm_arch_flush_remote_tlbs_memslot(kvm
, memslot
);
5793 void kvm_mmu_zap_all(struct kvm
*kvm
)
5795 struct kvm_mmu_page
*sp
, *node
;
5796 LIST_HEAD(invalid_list
);
5799 write_lock(&kvm
->mmu_lock
);
5801 list_for_each_entry_safe(sp
, node
, &kvm
->arch
.active_mmu_pages
, link
) {
5802 if (WARN_ON(sp
->role
.invalid
))
5804 if (__kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
, &ign
))
5806 if (cond_resched_rwlock_write(&kvm
->mmu_lock
))
5810 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
5812 if (is_tdp_mmu_enabled(kvm
))
5813 kvm_tdp_mmu_zap_all(kvm
);
5815 write_unlock(&kvm
->mmu_lock
);
5818 void kvm_mmu_invalidate_mmio_sptes(struct kvm
*kvm
, u64 gen
)
5820 WARN_ON(gen
& KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS
);
5822 gen
&= MMIO_SPTE_GEN_MASK
;
5825 * Generation numbers are incremented in multiples of the number of
5826 * address spaces in order to provide unique generations across all
5827 * address spaces. Strip what is effectively the address space
5828 * modifier prior to checking for a wrap of the MMIO generation so
5829 * that a wrap in any address space is detected.
5831 gen
&= ~((u64
)KVM_ADDRESS_SPACE_NUM
- 1);
5834 * The very rare case: if the MMIO generation number has wrapped,
5835 * zap all shadow pages.
5837 if (unlikely(gen
== 0)) {
5838 kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n");
5839 kvm_mmu_zap_all_fast(kvm
);
5843 static unsigned long
5844 mmu_shrink_scan(struct shrinker
*shrink
, struct shrink_control
*sc
)
5847 int nr_to_scan
= sc
->nr_to_scan
;
5848 unsigned long freed
= 0;
5850 mutex_lock(&kvm_lock
);
5852 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5854 LIST_HEAD(invalid_list
);
5857 * Never scan more than sc->nr_to_scan VM instances.
5858 * Will not hit this condition practically since we do not try
5859 * to shrink more than one VM and it is very unlikely to see
5860 * !n_used_mmu_pages so many times.
5865 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
5866 * here. We may skip a VM instance errorneosly, but we do not
5867 * want to shrink a VM that only started to populate its MMU
5870 if (!kvm
->arch
.n_used_mmu_pages
&&
5871 !kvm_has_zapped_obsolete_pages(kvm
))
5874 idx
= srcu_read_lock(&kvm
->srcu
);
5875 write_lock(&kvm
->mmu_lock
);
5877 if (kvm_has_zapped_obsolete_pages(kvm
)) {
5878 kvm_mmu_commit_zap_page(kvm
,
5879 &kvm
->arch
.zapped_obsolete_pages
);
5883 freed
= kvm_mmu_zap_oldest_mmu_pages(kvm
, sc
->nr_to_scan
);
5886 write_unlock(&kvm
->mmu_lock
);
5887 srcu_read_unlock(&kvm
->srcu
, idx
);
5890 * unfair on small ones
5891 * per-vm shrinkers cry out
5892 * sadness comes quickly
5894 list_move_tail(&kvm
->vm_list
, &vm_list
);
5898 mutex_unlock(&kvm_lock
);
5902 static unsigned long
5903 mmu_shrink_count(struct shrinker
*shrink
, struct shrink_control
*sc
)
5905 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
5908 static struct shrinker mmu_shrinker
= {
5909 .count_objects
= mmu_shrink_count
,
5910 .scan_objects
= mmu_shrink_scan
,
5911 .seeks
= DEFAULT_SEEKS
* 10,
5914 static void mmu_destroy_caches(void)
5916 kmem_cache_destroy(pte_list_desc_cache
);
5917 kmem_cache_destroy(mmu_page_header_cache
);
5920 static bool get_nx_auto_mode(void)
5922 /* Return true when CPU has the bug, and mitigations are ON */
5923 return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT
) && !cpu_mitigations_off();
5926 static void __set_nx_huge_pages(bool val
)
5928 nx_huge_pages
= itlb_multihit_kvm_mitigation
= val
;
5931 static int set_nx_huge_pages(const char *val
, const struct kernel_param
*kp
)
5933 bool old_val
= nx_huge_pages
;
5936 /* In "auto" mode deploy workaround only if CPU has the bug. */
5937 if (sysfs_streq(val
, "off"))
5939 else if (sysfs_streq(val
, "force"))
5941 else if (sysfs_streq(val
, "auto"))
5942 new_val
= get_nx_auto_mode();
5943 else if (strtobool(val
, &new_val
) < 0)
5946 __set_nx_huge_pages(new_val
);
5948 if (new_val
!= old_val
) {
5951 mutex_lock(&kvm_lock
);
5953 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5954 mutex_lock(&kvm
->slots_lock
);
5955 kvm_mmu_zap_all_fast(kvm
);
5956 mutex_unlock(&kvm
->slots_lock
);
5958 wake_up_process(kvm
->arch
.nx_lpage_recovery_thread
);
5960 mutex_unlock(&kvm_lock
);
5966 int kvm_mmu_module_init(void)
5970 if (nx_huge_pages
== -1)
5971 __set_nx_huge_pages(get_nx_auto_mode());
5974 * MMU roles use union aliasing which is, generally speaking, an
5975 * undefined behavior. However, we supposedly know how compilers behave
5976 * and the current status quo is unlikely to change. Guardians below are
5977 * supposed to let us know if the assumption becomes false.
5979 BUILD_BUG_ON(sizeof(union kvm_mmu_page_role
) != sizeof(u32
));
5980 BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role
) != sizeof(u32
));
5981 BUILD_BUG_ON(sizeof(union kvm_mmu_role
) != sizeof(u64
));
5983 kvm_mmu_reset_all_pte_masks();
5985 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
5986 sizeof(struct pte_list_desc
),
5987 0, SLAB_ACCOUNT
, NULL
);
5988 if (!pte_list_desc_cache
)
5991 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
5992 sizeof(struct kvm_mmu_page
),
5993 0, SLAB_ACCOUNT
, NULL
);
5994 if (!mmu_page_header_cache
)
5997 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0, GFP_KERNEL
))
6000 ret
= register_shrinker(&mmu_shrinker
);
6007 mmu_destroy_caches();
6012 * Calculate mmu pages needed for kvm.
6014 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm
*kvm
)
6016 unsigned long nr_mmu_pages
;
6017 unsigned long nr_pages
= 0;
6018 struct kvm_memslots
*slots
;
6019 struct kvm_memory_slot
*memslot
;
6022 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
6023 slots
= __kvm_memslots(kvm
, i
);
6025 kvm_for_each_memslot(memslot
, slots
)
6026 nr_pages
+= memslot
->npages
;
6029 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
6030 nr_mmu_pages
= max(nr_mmu_pages
, KVM_MIN_ALLOC_MMU_PAGES
);
6032 return nr_mmu_pages
;
6035 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
6037 kvm_mmu_unload(vcpu
);
6038 free_mmu_pages(&vcpu
->arch
.root_mmu
);
6039 free_mmu_pages(&vcpu
->arch
.guest_mmu
);
6040 mmu_free_memory_caches(vcpu
);
6043 void kvm_mmu_module_exit(void)
6045 mmu_destroy_caches();
6046 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
6047 unregister_shrinker(&mmu_shrinker
);
6048 mmu_audit_disable();
6051 static int set_nx_huge_pages_recovery_ratio(const char *val
, const struct kernel_param
*kp
)
6053 unsigned int old_val
;
6056 old_val
= nx_huge_pages_recovery_ratio
;
6057 err
= param_set_uint(val
, kp
);
6061 if (READ_ONCE(nx_huge_pages
) &&
6062 !old_val
&& nx_huge_pages_recovery_ratio
) {
6065 mutex_lock(&kvm_lock
);
6067 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6068 wake_up_process(kvm
->arch
.nx_lpage_recovery_thread
);
6070 mutex_unlock(&kvm_lock
);
6076 static void kvm_recover_nx_lpages(struct kvm
*kvm
)
6078 unsigned long nx_lpage_splits
= kvm
->stat
.nx_lpage_splits
;
6080 struct kvm_mmu_page
*sp
;
6082 LIST_HEAD(invalid_list
);
6086 rcu_idx
= srcu_read_lock(&kvm
->srcu
);
6087 write_lock(&kvm
->mmu_lock
);
6089 ratio
= READ_ONCE(nx_huge_pages_recovery_ratio
);
6090 to_zap
= ratio
? DIV_ROUND_UP(nx_lpage_splits
, ratio
) : 0;
6091 for ( ; to_zap
; --to_zap
) {
6092 if (list_empty(&kvm
->arch
.lpage_disallowed_mmu_pages
))
6096 * We use a separate list instead of just using active_mmu_pages
6097 * because the number of lpage_disallowed pages is expected to
6098 * be relatively small compared to the total.
6100 sp
= list_first_entry(&kvm
->arch
.lpage_disallowed_mmu_pages
,
6101 struct kvm_mmu_page
,
6102 lpage_disallowed_link
);
6103 WARN_ON_ONCE(!sp
->lpage_disallowed
);
6104 if (is_tdp_mmu_page(sp
)) {
6105 flush
|= kvm_tdp_mmu_zap_sp(kvm
, sp
);
6107 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
6108 WARN_ON_ONCE(sp
->lpage_disallowed
);
6111 if (need_resched() || rwlock_needbreak(&kvm
->mmu_lock
)) {
6112 kvm_mmu_remote_flush_or_zap(kvm
, &invalid_list
, flush
);
6113 cond_resched_rwlock_write(&kvm
->mmu_lock
);
6117 kvm_mmu_remote_flush_or_zap(kvm
, &invalid_list
, flush
);
6119 write_unlock(&kvm
->mmu_lock
);
6120 srcu_read_unlock(&kvm
->srcu
, rcu_idx
);
6123 static long get_nx_lpage_recovery_timeout(u64 start_time
)
6125 return READ_ONCE(nx_huge_pages
) && READ_ONCE(nx_huge_pages_recovery_ratio
)
6126 ? start_time
+ 60 * HZ
- get_jiffies_64()
6127 : MAX_SCHEDULE_TIMEOUT
;
6130 static int kvm_nx_lpage_recovery_worker(struct kvm
*kvm
, uintptr_t data
)
6133 long remaining_time
;
6136 start_time
= get_jiffies_64();
6137 remaining_time
= get_nx_lpage_recovery_timeout(start_time
);
6139 set_current_state(TASK_INTERRUPTIBLE
);
6140 while (!kthread_should_stop() && remaining_time
> 0) {
6141 schedule_timeout(remaining_time
);
6142 remaining_time
= get_nx_lpage_recovery_timeout(start_time
);
6143 set_current_state(TASK_INTERRUPTIBLE
);
6146 set_current_state(TASK_RUNNING
);
6148 if (kthread_should_stop())
6151 kvm_recover_nx_lpages(kvm
);
6155 int kvm_mmu_post_init_vm(struct kvm
*kvm
)
6159 err
= kvm_vm_create_worker_thread(kvm
, kvm_nx_lpage_recovery_worker
, 0,
6160 "kvm-nx-lpage-recovery",
6161 &kvm
->arch
.nx_lpage_recovery_thread
);
6163 kthread_unpark(kvm
->arch
.nx_lpage_recovery_thread
);
6168 void kvm_mmu_pre_destroy_vm(struct kvm
*kvm
)
6170 if (kvm
->arch
.nx_lpage_recovery_thread
)
6171 kthread_stop(kvm
->arch
.nx_lpage_recovery_thread
);