2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
26 #include <linux/kvm_host.h>
27 #include <linux/types.h>
28 #include <linux/string.h>
30 #include <linux/highmem.h>
31 #include <linux/module.h>
32 #include <linux/swap.h>
33 #include <linux/hugetlb.h>
34 #include <linux/compiler.h>
35 #include <linux/srcu.h>
36 #include <linux/slab.h>
37 #include <linux/uaccess.h>
40 #include <asm/cmpxchg.h>
45 * When setting this variable to true it enables Two-Dimensional-Paging
46 * where the hardware walks 2 page tables:
47 * 1. the guest-virtual to guest-physical
48 * 2. while doing 1. it walks guest-physical to host-physical
49 * If the hardware supports that we don't need to do shadow paging.
51 bool tdp_enabled
= false;
55 AUDIT_POST_PAGE_FAULT
,
66 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
67 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define pgprintk(x...) do { } while (0)
72 #define rmap_printk(x...) do { } while (0)
78 module_param(dbg
, bool, 0644);
82 #define ASSERT(x) do { } while (0)
86 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
87 __FILE__, __LINE__, #x); \
91 #define PTE_PREFETCH_NUM 8
93 #define PT_FIRST_AVAIL_BITS_SHIFT 10
94 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
96 #define PT64_LEVEL_BITS 9
98 #define PT64_LEVEL_SHIFT(level) \
99 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101 #define PT64_INDEX(address, level)\
102 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105 #define PT32_LEVEL_BITS 10
107 #define PT32_LEVEL_SHIFT(level) \
108 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
110 #define PT32_LVL_OFFSET_MASK(level) \
111 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
112 * PT32_LEVEL_BITS))) - 1))
114 #define PT32_INDEX(address, level)\
115 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
118 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
119 #define PT64_DIR_BASE_ADDR_MASK \
120 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
121 #define PT64_LVL_ADDR_MASK(level) \
122 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
123 * PT64_LEVEL_BITS))) - 1))
124 #define PT64_LVL_OFFSET_MASK(level) \
125 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
126 * PT64_LEVEL_BITS))) - 1))
128 #define PT32_BASE_ADDR_MASK PAGE_MASK
129 #define PT32_DIR_BASE_ADDR_MASK \
130 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
131 #define PT32_LVL_ADDR_MASK(level) \
132 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
133 * PT32_LEVEL_BITS))) - 1))
135 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
138 #define ACC_EXEC_MASK 1
139 #define ACC_WRITE_MASK PT_WRITABLE_MASK
140 #define ACC_USER_MASK PT_USER_MASK
141 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
143 #include <trace/events/kvm.h>
145 #define CREATE_TRACE_POINTS
146 #include "mmutrace.h"
148 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
149 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
151 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
153 /* make pte_list_desc fit well in cache line */
154 #define PTE_LIST_EXT 3
156 struct pte_list_desc
{
157 u64
*sptes
[PTE_LIST_EXT
];
158 struct pte_list_desc
*more
;
161 struct kvm_shadow_walk_iterator
{
169 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
170 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
171 shadow_walk_okay(&(_walker)); \
172 shadow_walk_next(&(_walker)))
174 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)) && \
177 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
178 __shadow_walk_next(&(_walker), spte))
180 static struct kmem_cache
*pte_list_desc_cache
;
181 static struct kmem_cache
*mmu_page_header_cache
;
182 static struct percpu_counter kvm_total_used_mmu_pages
;
184 static u64 __read_mostly shadow_nx_mask
;
185 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
186 static u64 __read_mostly shadow_user_mask
;
187 static u64 __read_mostly shadow_accessed_mask
;
188 static u64 __read_mostly shadow_dirty_mask
;
189 static u64 __read_mostly shadow_mmio_mask
;
191 static void mmu_spte_set(u64
*sptep
, u64 spte
);
192 static void mmu_free_roots(struct kvm_vcpu
*vcpu
);
194 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask
)
196 shadow_mmio_mask
= mmio_mask
;
198 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask
);
200 static void mark_mmio_spte(u64
*sptep
, u64 gfn
, unsigned access
)
202 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
204 access
&= ACC_WRITE_MASK
| ACC_USER_MASK
;
206 sp
->mmio_cached
= true;
207 trace_mark_mmio_spte(sptep
, gfn
, access
);
208 mmu_spte_set(sptep
, shadow_mmio_mask
| access
| gfn
<< PAGE_SHIFT
);
211 static bool is_mmio_spte(u64 spte
)
213 return (spte
& shadow_mmio_mask
) == shadow_mmio_mask
;
216 static gfn_t
get_mmio_spte_gfn(u64 spte
)
218 return (spte
& ~shadow_mmio_mask
) >> PAGE_SHIFT
;
221 static unsigned get_mmio_spte_access(u64 spte
)
223 return (spte
& ~shadow_mmio_mask
) & ~PAGE_MASK
;
226 static bool set_mmio_spte(u64
*sptep
, gfn_t gfn
, pfn_t pfn
, unsigned access
)
228 if (unlikely(is_noslot_pfn(pfn
))) {
229 mark_mmio_spte(sptep
, gfn
, access
);
236 static inline u64
rsvd_bits(int s
, int e
)
238 return ((1ULL << (e
- s
+ 1)) - 1) << s
;
241 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
242 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
244 shadow_user_mask
= user_mask
;
245 shadow_accessed_mask
= accessed_mask
;
246 shadow_dirty_mask
= dirty_mask
;
247 shadow_nx_mask
= nx_mask
;
248 shadow_x_mask
= x_mask
;
250 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
252 static int is_cpuid_PSE36(void)
257 static int is_nx(struct kvm_vcpu
*vcpu
)
259 return vcpu
->arch
.efer
& EFER_NX
;
262 static int is_shadow_present_pte(u64 pte
)
264 return pte
& PT_PRESENT_MASK
&& !is_mmio_spte(pte
);
267 static int is_large_pte(u64 pte
)
269 return pte
& PT_PAGE_SIZE_MASK
;
272 static int is_dirty_gpte(unsigned long pte
)
274 return pte
& PT_DIRTY_MASK
;
277 static int is_rmap_spte(u64 pte
)
279 return is_shadow_present_pte(pte
);
282 static int is_last_spte(u64 pte
, int level
)
284 if (level
== PT_PAGE_TABLE_LEVEL
)
286 if (is_large_pte(pte
))
291 static pfn_t
spte_to_pfn(u64 pte
)
293 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
296 static gfn_t
pse36_gfn_delta(u32 gpte
)
298 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
300 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
304 static void __set_spte(u64
*sptep
, u64 spte
)
309 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
314 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
316 return xchg(sptep
, spte
);
319 static u64
__get_spte_lockless(u64
*sptep
)
321 return ACCESS_ONCE(*sptep
);
324 static bool __check_direct_spte_mmio_pf(u64 spte
)
326 /* It is valid if the spte is zapped. */
338 static void count_spte_clear(u64
*sptep
, u64 spte
)
340 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
342 if (is_shadow_present_pte(spte
))
345 /* Ensure the spte is completely set before we increase the count */
347 sp
->clear_spte_count
++;
350 static void __set_spte(u64
*sptep
, u64 spte
)
352 union split_spte
*ssptep
, sspte
;
354 ssptep
= (union split_spte
*)sptep
;
355 sspte
= (union split_spte
)spte
;
357 ssptep
->spte_high
= sspte
.spte_high
;
360 * If we map the spte from nonpresent to present, We should store
361 * the high bits firstly, then set present bit, so cpu can not
362 * fetch this spte while we are setting the spte.
366 ssptep
->spte_low
= sspte
.spte_low
;
369 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
371 union split_spte
*ssptep
, sspte
;
373 ssptep
= (union split_spte
*)sptep
;
374 sspte
= (union split_spte
)spte
;
376 ssptep
->spte_low
= sspte
.spte_low
;
379 * If we map the spte from present to nonpresent, we should clear
380 * present bit firstly to avoid vcpu fetch the old high bits.
384 ssptep
->spte_high
= sspte
.spte_high
;
385 count_spte_clear(sptep
, spte
);
388 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
390 union split_spte
*ssptep
, sspte
, orig
;
392 ssptep
= (union split_spte
*)sptep
;
393 sspte
= (union split_spte
)spte
;
395 /* xchg acts as a barrier before the setting of the high bits */
396 orig
.spte_low
= xchg(&ssptep
->spte_low
, sspte
.spte_low
);
397 orig
.spte_high
= ssptep
->spte_high
;
398 ssptep
->spte_high
= sspte
.spte_high
;
399 count_spte_clear(sptep
, spte
);
405 * The idea using the light way get the spte on x86_32 guest is from
406 * gup_get_pte(arch/x86/mm/gup.c).
407 * The difference is we can not catch the spte tlb flush if we leave
408 * guest mode, so we emulate it by increase clear_spte_count when spte
411 static u64
__get_spte_lockless(u64
*sptep
)
413 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
414 union split_spte spte
, *orig
= (union split_spte
*)sptep
;
418 count
= sp
->clear_spte_count
;
421 spte
.spte_low
= orig
->spte_low
;
424 spte
.spte_high
= orig
->spte_high
;
427 if (unlikely(spte
.spte_low
!= orig
->spte_low
||
428 count
!= sp
->clear_spte_count
))
434 static bool __check_direct_spte_mmio_pf(u64 spte
)
436 union split_spte sspte
= (union split_spte
)spte
;
437 u32 high_mmio_mask
= shadow_mmio_mask
>> 32;
439 /* It is valid if the spte is zapped. */
443 /* It is valid if the spte is being zapped. */
444 if (sspte
.spte_low
== 0ull &&
445 (sspte
.spte_high
& high_mmio_mask
) == high_mmio_mask
)
452 static bool spte_is_locklessly_modifiable(u64 spte
)
454 return (spte
& (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
)) ==
455 (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
);
458 static bool spte_has_volatile_bits(u64 spte
)
461 * Always atomicly update spte if it can be updated
462 * out of mmu-lock, it can ensure dirty bit is not lost,
463 * also, it can help us to get a stable is_writable_pte()
464 * to ensure tlb flush is not missed.
466 if (spte_is_locklessly_modifiable(spte
))
469 if (!shadow_accessed_mask
)
472 if (!is_shadow_present_pte(spte
))
475 if ((spte
& shadow_accessed_mask
) &&
476 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
482 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
484 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
487 /* Rules for using mmu_spte_set:
488 * Set the sptep from nonpresent to present.
489 * Note: the sptep being assigned *must* be either not present
490 * or in a state where the hardware will not attempt to update
493 static void mmu_spte_set(u64
*sptep
, u64 new_spte
)
495 WARN_ON(is_shadow_present_pte(*sptep
));
496 __set_spte(sptep
, new_spte
);
499 /* Rules for using mmu_spte_update:
500 * Update the state bits, it means the mapped pfn is not changged.
502 * Whenever we overwrite a writable spte with a read-only one we
503 * should flush remote TLBs. Otherwise rmap_write_protect
504 * will find a read-only spte, even though the writable spte
505 * might be cached on a CPU's TLB, the return value indicates this
508 static bool mmu_spte_update(u64
*sptep
, u64 new_spte
)
510 u64 old_spte
= *sptep
;
513 WARN_ON(!is_rmap_spte(new_spte
));
515 if (!is_shadow_present_pte(old_spte
)) {
516 mmu_spte_set(sptep
, new_spte
);
520 if (!spte_has_volatile_bits(old_spte
))
521 __update_clear_spte_fast(sptep
, new_spte
);
523 old_spte
= __update_clear_spte_slow(sptep
, new_spte
);
526 * For the spte updated out of mmu-lock is safe, since
527 * we always atomicly update it, see the comments in
528 * spte_has_volatile_bits().
530 if (is_writable_pte(old_spte
) && !is_writable_pte(new_spte
))
533 if (!shadow_accessed_mask
)
536 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
537 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
538 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
539 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
545 * Rules for using mmu_spte_clear_track_bits:
546 * It sets the sptep from present to nonpresent, and track the
547 * state bits, it is used to clear the last level sptep.
549 static int mmu_spte_clear_track_bits(u64
*sptep
)
552 u64 old_spte
= *sptep
;
554 if (!spte_has_volatile_bits(old_spte
))
555 __update_clear_spte_fast(sptep
, 0ull);
557 old_spte
= __update_clear_spte_slow(sptep
, 0ull);
559 if (!is_rmap_spte(old_spte
))
562 pfn
= spte_to_pfn(old_spte
);
565 * KVM does not hold the refcount of the page used by
566 * kvm mmu, before reclaiming the page, we should
567 * unmap it from mmu first.
569 WARN_ON(!kvm_is_mmio_pfn(pfn
) && !page_count(pfn_to_page(pfn
)));
571 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
572 kvm_set_pfn_accessed(pfn
);
573 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
574 kvm_set_pfn_dirty(pfn
);
579 * Rules for using mmu_spte_clear_no_track:
580 * Directly clear spte without caring the state bits of sptep,
581 * it is used to set the upper level spte.
583 static void mmu_spte_clear_no_track(u64
*sptep
)
585 __update_clear_spte_fast(sptep
, 0ull);
588 static u64
mmu_spte_get_lockless(u64
*sptep
)
590 return __get_spte_lockless(sptep
);
593 static void walk_shadow_page_lockless_begin(struct kvm_vcpu
*vcpu
)
596 * Prevent page table teardown by making any free-er wait during
597 * kvm_flush_remote_tlbs() IPI to all active vcpus.
600 vcpu
->mode
= READING_SHADOW_PAGE_TABLES
;
602 * Make sure a following spte read is not reordered ahead of the write
608 static void walk_shadow_page_lockless_end(struct kvm_vcpu
*vcpu
)
611 * Make sure the write to vcpu->mode is not reordered in front of
612 * reads to sptes. If it does, kvm_commit_zap_page() can see us
613 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
616 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
620 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
621 struct kmem_cache
*base_cache
, int min
)
625 if (cache
->nobjs
>= min
)
627 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
628 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
631 cache
->objects
[cache
->nobjs
++] = obj
;
636 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache
*cache
)
641 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
642 struct kmem_cache
*cache
)
645 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
648 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
653 if (cache
->nobjs
>= min
)
655 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
656 page
= (void *)__get_free_page(GFP_KERNEL
);
659 cache
->objects
[cache
->nobjs
++] = page
;
664 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
667 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
670 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
674 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
675 pte_list_desc_cache
, 8 + PTE_PREFETCH_NUM
);
678 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
681 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
682 mmu_page_header_cache
, 4);
687 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
689 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
690 pte_list_desc_cache
);
691 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
692 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
693 mmu_page_header_cache
);
696 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
)
701 p
= mc
->objects
[--mc
->nobjs
];
705 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
707 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
);
710 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
712 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
715 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
717 if (!sp
->role
.direct
)
718 return sp
->gfns
[index
];
720 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
723 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
726 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
728 sp
->gfns
[index
] = gfn
;
732 * Return the pointer to the large page information for a given gfn,
733 * handling slots that are not large page aligned.
735 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
736 struct kvm_memory_slot
*slot
,
741 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
742 return &slot
->arch
.lpage_info
[level
- 2][idx
];
745 static void account_shadowed(struct kvm
*kvm
, gfn_t gfn
)
747 struct kvm_memory_slot
*slot
;
748 struct kvm_lpage_info
*linfo
;
751 slot
= gfn_to_memslot(kvm
, gfn
);
752 for (i
= PT_DIRECTORY_LEVEL
;
753 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
754 linfo
= lpage_info_slot(gfn
, slot
, i
);
755 linfo
->write_count
+= 1;
757 kvm
->arch
.indirect_shadow_pages
++;
760 static void unaccount_shadowed(struct kvm
*kvm
, gfn_t gfn
)
762 struct kvm_memory_slot
*slot
;
763 struct kvm_lpage_info
*linfo
;
766 slot
= gfn_to_memslot(kvm
, gfn
);
767 for (i
= PT_DIRECTORY_LEVEL
;
768 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
769 linfo
= lpage_info_slot(gfn
, slot
, i
);
770 linfo
->write_count
-= 1;
771 WARN_ON(linfo
->write_count
< 0);
773 kvm
->arch
.indirect_shadow_pages
--;
776 static int has_wrprotected_page(struct kvm
*kvm
,
780 struct kvm_memory_slot
*slot
;
781 struct kvm_lpage_info
*linfo
;
783 slot
= gfn_to_memslot(kvm
, gfn
);
785 linfo
= lpage_info_slot(gfn
, slot
, level
);
786 return linfo
->write_count
;
792 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
794 unsigned long page_size
;
797 page_size
= kvm_host_page_size(kvm
, gfn
);
799 for (i
= PT_PAGE_TABLE_LEVEL
;
800 i
< (PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
); ++i
) {
801 if (page_size
>= KVM_HPAGE_SIZE(i
))
810 static struct kvm_memory_slot
*
811 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
814 struct kvm_memory_slot
*slot
;
816 slot
= gfn_to_memslot(vcpu
->kvm
, gfn
);
817 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
818 (no_dirty_log
&& slot
->dirty_bitmap
))
824 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
826 return !gfn_to_memslot_dirty_bitmap(vcpu
, large_gfn
, true);
829 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
831 int host_level
, level
, max_level
;
833 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
835 if (host_level
== PT_PAGE_TABLE_LEVEL
)
838 max_level
= min(kvm_x86_ops
->get_lpage_level(), host_level
);
840 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
841 if (has_wrprotected_page(vcpu
->kvm
, large_gfn
, level
))
848 * Pte mapping structures:
850 * If pte_list bit zero is zero, then pte_list point to the spte.
852 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
853 * pte_list_desc containing more mappings.
855 * Returns the number of pte entries before the spte was added or zero if
856 * the spte was not added.
859 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
860 unsigned long *pte_list
)
862 struct pte_list_desc
*desc
;
866 rmap_printk("pte_list_add: %p %llx 0->1\n", spte
, *spte
);
867 *pte_list
= (unsigned long)spte
;
868 } else if (!(*pte_list
& 1)) {
869 rmap_printk("pte_list_add: %p %llx 1->many\n", spte
, *spte
);
870 desc
= mmu_alloc_pte_list_desc(vcpu
);
871 desc
->sptes
[0] = (u64
*)*pte_list
;
872 desc
->sptes
[1] = spte
;
873 *pte_list
= (unsigned long)desc
| 1;
876 rmap_printk("pte_list_add: %p %llx many->many\n", spte
, *spte
);
877 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
878 while (desc
->sptes
[PTE_LIST_EXT
-1] && desc
->more
) {
880 count
+= PTE_LIST_EXT
;
882 if (desc
->sptes
[PTE_LIST_EXT
-1]) {
883 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
886 for (i
= 0; desc
->sptes
[i
]; ++i
)
888 desc
->sptes
[i
] = spte
;
894 pte_list_desc_remove_entry(unsigned long *pte_list
, struct pte_list_desc
*desc
,
895 int i
, struct pte_list_desc
*prev_desc
)
899 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
901 desc
->sptes
[i
] = desc
->sptes
[j
];
902 desc
->sptes
[j
] = NULL
;
905 if (!prev_desc
&& !desc
->more
)
906 *pte_list
= (unsigned long)desc
->sptes
[0];
909 prev_desc
->more
= desc
->more
;
911 *pte_list
= (unsigned long)desc
->more
| 1;
912 mmu_free_pte_list_desc(desc
);
915 static void pte_list_remove(u64
*spte
, unsigned long *pte_list
)
917 struct pte_list_desc
*desc
;
918 struct pte_list_desc
*prev_desc
;
922 printk(KERN_ERR
"pte_list_remove: %p 0->BUG\n", spte
);
924 } else if (!(*pte_list
& 1)) {
925 rmap_printk("pte_list_remove: %p 1->0\n", spte
);
926 if ((u64
*)*pte_list
!= spte
) {
927 printk(KERN_ERR
"pte_list_remove: %p 1->BUG\n", spte
);
932 rmap_printk("pte_list_remove: %p many->many\n", spte
);
933 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
936 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
937 if (desc
->sptes
[i
] == spte
) {
938 pte_list_desc_remove_entry(pte_list
,
946 pr_err("pte_list_remove: %p many->many\n", spte
);
951 typedef void (*pte_list_walk_fn
) (u64
*spte
);
952 static void pte_list_walk(unsigned long *pte_list
, pte_list_walk_fn fn
)
954 struct pte_list_desc
*desc
;
960 if (!(*pte_list
& 1))
961 return fn((u64
*)*pte_list
);
963 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
965 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
971 static unsigned long *__gfn_to_rmap(gfn_t gfn
, int level
,
972 struct kvm_memory_slot
*slot
)
976 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
977 return &slot
->arch
.rmap
[level
- PT_PAGE_TABLE_LEVEL
][idx
];
981 * Take gfn and return the reverse mapping to it.
983 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, int level
)
985 struct kvm_memory_slot
*slot
;
987 slot
= gfn_to_memslot(kvm
, gfn
);
988 return __gfn_to_rmap(gfn
, level
, slot
);
991 static bool rmap_can_add(struct kvm_vcpu
*vcpu
)
993 struct kvm_mmu_memory_cache
*cache
;
995 cache
= &vcpu
->arch
.mmu_pte_list_desc_cache
;
996 return mmu_memory_cache_free_objects(cache
);
999 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1001 struct kvm_mmu_page
*sp
;
1002 unsigned long *rmapp
;
1004 sp
= page_header(__pa(spte
));
1005 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
1006 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1007 return pte_list_add(vcpu
, spte
, rmapp
);
1010 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
1012 struct kvm_mmu_page
*sp
;
1014 unsigned long *rmapp
;
1016 sp
= page_header(__pa(spte
));
1017 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
1018 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
->role
.level
);
1019 pte_list_remove(spte
, rmapp
);
1023 * Used by the following functions to iterate through the sptes linked by a
1024 * rmap. All fields are private and not assumed to be used outside.
1026 struct rmap_iterator
{
1027 /* private fields */
1028 struct pte_list_desc
*desc
; /* holds the sptep if not NULL */
1029 int pos
; /* index of the sptep */
1033 * Iteration must be started by this function. This should also be used after
1034 * removing/dropping sptes from the rmap link because in such cases the
1035 * information in the itererator may not be valid.
1037 * Returns sptep if found, NULL otherwise.
1039 static u64
*rmap_get_first(unsigned long rmap
, struct rmap_iterator
*iter
)
1049 iter
->desc
= (struct pte_list_desc
*)(rmap
& ~1ul);
1051 return iter
->desc
->sptes
[iter
->pos
];
1055 * Must be used with a valid iterator: e.g. after rmap_get_first().
1057 * Returns sptep if found, NULL otherwise.
1059 static u64
*rmap_get_next(struct rmap_iterator
*iter
)
1062 if (iter
->pos
< PTE_LIST_EXT
- 1) {
1066 sptep
= iter
->desc
->sptes
[iter
->pos
];
1071 iter
->desc
= iter
->desc
->more
;
1075 /* desc->sptes[0] cannot be NULL */
1076 return iter
->desc
->sptes
[iter
->pos
];
1083 static void drop_spte(struct kvm
*kvm
, u64
*sptep
)
1085 if (mmu_spte_clear_track_bits(sptep
))
1086 rmap_remove(kvm
, sptep
);
1090 static bool __drop_large_spte(struct kvm
*kvm
, u64
*sptep
)
1092 if (is_large_pte(*sptep
)) {
1093 WARN_ON(page_header(__pa(sptep
))->role
.level
==
1094 PT_PAGE_TABLE_LEVEL
);
1095 drop_spte(kvm
, sptep
);
1103 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1105 if (__drop_large_spte(vcpu
->kvm
, sptep
))
1106 kvm_flush_remote_tlbs(vcpu
->kvm
);
1110 * Write-protect on the specified @sptep, @pt_protect indicates whether
1111 * spte writ-protection is caused by protecting shadow page table.
1112 * @flush indicates whether tlb need be flushed.
1114 * Note: write protection is difference between drity logging and spte
1116 * - for dirty logging, the spte can be set to writable at anytime if
1117 * its dirty bitmap is properly set.
1118 * - for spte protection, the spte can be writable only after unsync-ing
1121 * Return true if the spte is dropped.
1124 spte_write_protect(struct kvm
*kvm
, u64
*sptep
, bool *flush
, bool pt_protect
)
1128 if (!is_writable_pte(spte
) &&
1129 !(pt_protect
&& spte_is_locklessly_modifiable(spte
)))
1132 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep
, *sptep
);
1134 if (__drop_large_spte(kvm
, sptep
)) {
1140 spte
&= ~SPTE_MMU_WRITEABLE
;
1141 spte
= spte
& ~PT_WRITABLE_MASK
;
1143 *flush
|= mmu_spte_update(sptep
, spte
);
1147 static bool __rmap_write_protect(struct kvm
*kvm
, unsigned long *rmapp
,
1151 struct rmap_iterator iter
;
1154 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1155 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1156 if (spte_write_protect(kvm
, sptep
, &flush
, pt_protect
)) {
1157 sptep
= rmap_get_first(*rmapp
, &iter
);
1161 sptep
= rmap_get_next(&iter
);
1168 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1169 * @kvm: kvm instance
1170 * @slot: slot to protect
1171 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1172 * @mask: indicates which pages we should protect
1174 * Used when we do not need to care about huge page mappings: e.g. during dirty
1175 * logging we do not have any such mappings.
1177 void kvm_mmu_write_protect_pt_masked(struct kvm
*kvm
,
1178 struct kvm_memory_slot
*slot
,
1179 gfn_t gfn_offset
, unsigned long mask
)
1181 unsigned long *rmapp
;
1184 rmapp
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1185 PT_PAGE_TABLE_LEVEL
, slot
);
1186 __rmap_write_protect(kvm
, rmapp
, false);
1188 /* clear the first set bit */
1193 static bool rmap_write_protect(struct kvm
*kvm
, u64 gfn
)
1195 struct kvm_memory_slot
*slot
;
1196 unsigned long *rmapp
;
1198 bool write_protected
= false;
1200 slot
= gfn_to_memslot(kvm
, gfn
);
1202 for (i
= PT_PAGE_TABLE_LEVEL
;
1203 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
1204 rmapp
= __gfn_to_rmap(gfn
, i
, slot
);
1205 write_protected
|= __rmap_write_protect(kvm
, rmapp
, true);
1208 return write_protected
;
1211 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1212 struct kvm_memory_slot
*slot
, unsigned long data
)
1215 struct rmap_iterator iter
;
1216 int need_tlb_flush
= 0;
1218 while ((sptep
= rmap_get_first(*rmapp
, &iter
))) {
1219 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1220 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", sptep
, *sptep
);
1222 drop_spte(kvm
, sptep
);
1226 return need_tlb_flush
;
1229 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1230 struct kvm_memory_slot
*slot
, unsigned long data
)
1233 struct rmap_iterator iter
;
1236 pte_t
*ptep
= (pte_t
*)data
;
1239 WARN_ON(pte_huge(*ptep
));
1240 new_pfn
= pte_pfn(*ptep
);
1242 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1243 BUG_ON(!is_shadow_present_pte(*sptep
));
1244 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", sptep
, *sptep
);
1248 if (pte_write(*ptep
)) {
1249 drop_spte(kvm
, sptep
);
1250 sptep
= rmap_get_first(*rmapp
, &iter
);
1252 new_spte
= *sptep
& ~PT64_BASE_ADDR_MASK
;
1253 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
1255 new_spte
&= ~PT_WRITABLE_MASK
;
1256 new_spte
&= ~SPTE_HOST_WRITEABLE
;
1257 new_spte
&= ~shadow_accessed_mask
;
1259 mmu_spte_clear_track_bits(sptep
);
1260 mmu_spte_set(sptep
, new_spte
);
1261 sptep
= rmap_get_next(&iter
);
1266 kvm_flush_remote_tlbs(kvm
);
1271 static int kvm_handle_hva_range(struct kvm
*kvm
,
1272 unsigned long start
,
1275 int (*handler
)(struct kvm
*kvm
,
1276 unsigned long *rmapp
,
1277 struct kvm_memory_slot
*slot
,
1278 unsigned long data
))
1282 struct kvm_memslots
*slots
;
1283 struct kvm_memory_slot
*memslot
;
1285 slots
= kvm_memslots(kvm
);
1287 kvm_for_each_memslot(memslot
, slots
) {
1288 unsigned long hva_start
, hva_end
;
1289 gfn_t gfn_start
, gfn_end
;
1291 hva_start
= max(start
, memslot
->userspace_addr
);
1292 hva_end
= min(end
, memslot
->userspace_addr
+
1293 (memslot
->npages
<< PAGE_SHIFT
));
1294 if (hva_start
>= hva_end
)
1297 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1298 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1300 gfn_start
= hva_to_gfn_memslot(hva_start
, memslot
);
1301 gfn_end
= hva_to_gfn_memslot(hva_end
+ PAGE_SIZE
- 1, memslot
);
1303 for (j
= PT_PAGE_TABLE_LEVEL
;
1304 j
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++j
) {
1305 unsigned long idx
, idx_end
;
1306 unsigned long *rmapp
;
1309 * {idx(page_j) | page_j intersects with
1310 * [hva_start, hva_end)} = {idx, idx+1, ..., idx_end}.
1312 idx
= gfn_to_index(gfn_start
, memslot
->base_gfn
, j
);
1313 idx_end
= gfn_to_index(gfn_end
- 1, memslot
->base_gfn
, j
);
1315 rmapp
= __gfn_to_rmap(gfn_start
, j
, memslot
);
1317 for (; idx
<= idx_end
; ++idx
)
1318 ret
|= handler(kvm
, rmapp
++, memslot
, data
);
1325 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
1327 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
1328 struct kvm_memory_slot
*slot
,
1329 unsigned long data
))
1331 return kvm_handle_hva_range(kvm
, hva
, hva
+ 1, data
, handler
);
1334 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
1336 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
1339 int kvm_unmap_hva_range(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1341 return kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_unmap_rmapp
);
1344 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
1346 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
1349 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1350 struct kvm_memory_slot
*slot
, unsigned long data
)
1353 struct rmap_iterator
uninitialized_var(iter
);
1357 * In case of absence of EPT Access and Dirty Bits supports,
1358 * emulate the accessed bit for EPT, by checking if this page has
1359 * an EPT mapping, and clearing it if it does. On the next access,
1360 * a new EPT mapping will be established.
1361 * This has some overhead, but not as much as the cost of swapping
1362 * out actively used pages or breaking up actively used hugepages.
1364 if (!shadow_accessed_mask
) {
1365 young
= kvm_unmap_rmapp(kvm
, rmapp
, slot
, data
);
1369 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1370 sptep
= rmap_get_next(&iter
)) {
1371 BUG_ON(!is_shadow_present_pte(*sptep
));
1373 if (*sptep
& shadow_accessed_mask
) {
1375 clear_bit((ffs(shadow_accessed_mask
) - 1),
1376 (unsigned long *)sptep
);
1380 /* @data has hva passed to kvm_age_hva(). */
1381 trace_kvm_age_page(data
, slot
, young
);
1385 static int kvm_test_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1386 struct kvm_memory_slot
*slot
, unsigned long data
)
1389 struct rmap_iterator iter
;
1393 * If there's no access bit in the secondary pte set by the
1394 * hardware it's up to gup-fast/gup to set the access bit in
1395 * the primary pte or in the page structure.
1397 if (!shadow_accessed_mask
)
1400 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1401 sptep
= rmap_get_next(&iter
)) {
1402 BUG_ON(!is_shadow_present_pte(*sptep
));
1404 if (*sptep
& shadow_accessed_mask
) {
1413 #define RMAP_RECYCLE_THRESHOLD 1000
1415 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1417 unsigned long *rmapp
;
1418 struct kvm_mmu_page
*sp
;
1420 sp
= page_header(__pa(spte
));
1422 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1424 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, NULL
, 0);
1425 kvm_flush_remote_tlbs(vcpu
->kvm
);
1428 int kvm_age_hva(struct kvm
*kvm
, unsigned long hva
)
1430 return kvm_handle_hva(kvm
, hva
, hva
, kvm_age_rmapp
);
1433 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1435 return kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1439 static int is_empty_shadow_page(u64
*spt
)
1444 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1445 if (is_shadow_present_pte(*pos
)) {
1446 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1455 * This value is the sum of all of the kvm instances's
1456 * kvm->arch.n_used_mmu_pages values. We need a global,
1457 * aggregate version in order to make the slab shrinker
1460 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
1462 kvm
->arch
.n_used_mmu_pages
+= nr
;
1463 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1466 static void kvm_mmu_free_page(struct kvm_mmu_page
*sp
)
1468 ASSERT(is_empty_shadow_page(sp
->spt
));
1469 hlist_del(&sp
->hash_link
);
1470 list_del(&sp
->link
);
1471 free_page((unsigned long)sp
->spt
);
1472 if (!sp
->role
.direct
)
1473 free_page((unsigned long)sp
->gfns
);
1474 kmem_cache_free(mmu_page_header_cache
, sp
);
1477 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1479 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1482 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1483 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1488 pte_list_add(vcpu
, parent_pte
, &sp
->parent_ptes
);
1491 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1494 pte_list_remove(parent_pte
, &sp
->parent_ptes
);
1497 static void drop_parent_pte(struct kvm_mmu_page
*sp
,
1500 mmu_page_remove_parent_pte(sp
, parent_pte
);
1501 mmu_spte_clear_no_track(parent_pte
);
1504 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1505 u64
*parent_pte
, int direct
)
1507 struct kvm_mmu_page
*sp
;
1509 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
);
1510 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1512 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1513 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1516 * The active_mmu_pages list is the FIFO list, do not move the
1517 * page until it is zapped. kvm_zap_obsolete_pages depends on
1518 * this feature. See the comments in kvm_zap_obsolete_pages().
1520 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1521 sp
->parent_ptes
= 0;
1522 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1523 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1527 static void mark_unsync(u64
*spte
);
1528 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1530 pte_list_walk(&sp
->parent_ptes
, mark_unsync
);
1533 static void mark_unsync(u64
*spte
)
1535 struct kvm_mmu_page
*sp
;
1538 sp
= page_header(__pa(spte
));
1539 index
= spte
- sp
->spt
;
1540 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1542 if (sp
->unsync_children
++)
1544 kvm_mmu_mark_parents_unsync(sp
);
1547 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1548 struct kvm_mmu_page
*sp
)
1553 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1557 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1558 struct kvm_mmu_page
*sp
, u64
*spte
,
1564 #define KVM_PAGE_ARRAY_NR 16
1566 struct kvm_mmu_pages
{
1567 struct mmu_page_and_offset
{
1568 struct kvm_mmu_page
*sp
;
1570 } page
[KVM_PAGE_ARRAY_NR
];
1574 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1580 for (i
=0; i
< pvec
->nr
; i
++)
1581 if (pvec
->page
[i
].sp
== sp
)
1584 pvec
->page
[pvec
->nr
].sp
= sp
;
1585 pvec
->page
[pvec
->nr
].idx
= idx
;
1587 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1590 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1591 struct kvm_mmu_pages
*pvec
)
1593 int i
, ret
, nr_unsync_leaf
= 0;
1595 for_each_set_bit(i
, sp
->unsync_child_bitmap
, 512) {
1596 struct kvm_mmu_page
*child
;
1597 u64 ent
= sp
->spt
[i
];
1599 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1600 goto clear_child_bitmap
;
1602 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1604 if (child
->unsync_children
) {
1605 if (mmu_pages_add(pvec
, child
, i
))
1608 ret
= __mmu_unsync_walk(child
, pvec
);
1610 goto clear_child_bitmap
;
1612 nr_unsync_leaf
+= ret
;
1615 } else if (child
->unsync
) {
1617 if (mmu_pages_add(pvec
, child
, i
))
1620 goto clear_child_bitmap
;
1625 __clear_bit(i
, sp
->unsync_child_bitmap
);
1626 sp
->unsync_children
--;
1627 WARN_ON((int)sp
->unsync_children
< 0);
1631 return nr_unsync_leaf
;
1634 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1635 struct kvm_mmu_pages
*pvec
)
1637 if (!sp
->unsync_children
)
1640 mmu_pages_add(pvec
, sp
, 0);
1641 return __mmu_unsync_walk(sp
, pvec
);
1644 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1646 WARN_ON(!sp
->unsync
);
1647 trace_kvm_mmu_sync_page(sp
);
1649 --kvm
->stat
.mmu_unsync
;
1652 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1653 struct list_head
*invalid_list
);
1654 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1655 struct list_head
*invalid_list
);
1657 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1658 hlist_for_each_entry(_sp, \
1659 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1660 if ((_sp)->gfn != (_gfn)) {} else
1662 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1663 for_each_gfn_sp(_kvm, _sp, _gfn) \
1664 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1666 /* @sp->gfn should be write-protected at the call site */
1667 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1668 struct list_head
*invalid_list
, bool clear_unsync
)
1670 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1671 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1676 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1678 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1679 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1683 kvm_mmu_flush_tlb(vcpu
);
1687 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1688 struct kvm_mmu_page
*sp
)
1690 LIST_HEAD(invalid_list
);
1693 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1695 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1700 #ifdef CONFIG_KVM_MMU_AUDIT
1701 #include "mmu_audit.c"
1703 static void kvm_mmu_audit(struct kvm_vcpu
*vcpu
, int point
) { }
1704 static void mmu_audit_disable(void) { }
1707 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1708 struct list_head
*invalid_list
)
1710 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1713 /* @gfn should be write-protected at the call site */
1714 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1716 struct kvm_mmu_page
*s
;
1717 LIST_HEAD(invalid_list
);
1720 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
1724 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1725 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1726 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1727 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1728 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1734 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1736 kvm_mmu_flush_tlb(vcpu
);
1739 struct mmu_page_path
{
1740 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1741 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1744 #define for_each_sp(pvec, sp, parents, i) \
1745 for (i = mmu_pages_next(&pvec, &parents, -1), \
1746 sp = pvec.page[i].sp; \
1747 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1748 i = mmu_pages_next(&pvec, &parents, i))
1750 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1751 struct mmu_page_path
*parents
,
1756 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1757 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1759 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1760 parents
->idx
[0] = pvec
->page
[n
].idx
;
1764 parents
->parent
[sp
->role
.level
-2] = sp
;
1765 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1771 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1773 struct kvm_mmu_page
*sp
;
1774 unsigned int level
= 0;
1777 unsigned int idx
= parents
->idx
[level
];
1779 sp
= parents
->parent
[level
];
1783 --sp
->unsync_children
;
1784 WARN_ON((int)sp
->unsync_children
< 0);
1785 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1787 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
1790 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
1791 struct mmu_page_path
*parents
,
1792 struct kvm_mmu_pages
*pvec
)
1794 parents
->parent
[parent
->role
.level
-1] = NULL
;
1798 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1799 struct kvm_mmu_page
*parent
)
1802 struct kvm_mmu_page
*sp
;
1803 struct mmu_page_path parents
;
1804 struct kvm_mmu_pages pages
;
1805 LIST_HEAD(invalid_list
);
1807 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1808 while (mmu_unsync_walk(parent
, &pages
)) {
1809 bool protected = false;
1811 for_each_sp(pages
, sp
, parents
, i
)
1812 protected |= rmap_write_protect(vcpu
->kvm
, sp
->gfn
);
1815 kvm_flush_remote_tlbs(vcpu
->kvm
);
1817 for_each_sp(pages
, sp
, parents
, i
) {
1818 kvm_sync_page(vcpu
, sp
, &invalid_list
);
1819 mmu_pages_clear_parents(&parents
);
1821 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1822 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
1823 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1827 static void init_shadow_page_table(struct kvm_mmu_page
*sp
)
1831 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
1835 static void __clear_sp_write_flooding_count(struct kvm_mmu_page
*sp
)
1837 sp
->write_flooding_count
= 0;
1840 static void clear_sp_write_flooding_count(u64
*spte
)
1842 struct kvm_mmu_page
*sp
= page_header(__pa(spte
));
1844 __clear_sp_write_flooding_count(sp
);
1847 static bool is_obsolete_sp(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1849 return unlikely(sp
->mmu_valid_gen
!= kvm
->arch
.mmu_valid_gen
);
1852 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
1860 union kvm_mmu_page_role role
;
1862 struct kvm_mmu_page
*sp
;
1863 bool need_sync
= false;
1865 role
= vcpu
->arch
.mmu
.base_role
;
1867 role
.direct
= direct
;
1870 role
.access
= access
;
1871 if (!vcpu
->arch
.mmu
.direct_map
1872 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
1873 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
1874 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
1875 role
.quadrant
= quadrant
;
1877 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
) {
1878 if (is_obsolete_sp(vcpu
->kvm
, sp
))
1881 if (!need_sync
&& sp
->unsync
)
1884 if (sp
->role
.word
!= role
.word
)
1887 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
1890 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1891 if (sp
->unsync_children
) {
1892 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1893 kvm_mmu_mark_parents_unsync(sp
);
1894 } else if (sp
->unsync
)
1895 kvm_mmu_mark_parents_unsync(sp
);
1897 __clear_sp_write_flooding_count(sp
);
1898 trace_kvm_mmu_get_page(sp
, false);
1901 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
1902 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
1907 hlist_add_head(&sp
->hash_link
,
1908 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
1910 if (rmap_write_protect(vcpu
->kvm
, gfn
))
1911 kvm_flush_remote_tlbs(vcpu
->kvm
);
1912 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
1913 kvm_sync_pages(vcpu
, gfn
);
1915 account_shadowed(vcpu
->kvm
, gfn
);
1917 sp
->mmu_valid_gen
= vcpu
->kvm
->arch
.mmu_valid_gen
;
1918 init_shadow_page_table(sp
);
1919 trace_kvm_mmu_get_page(sp
, true);
1923 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
1924 struct kvm_vcpu
*vcpu
, u64 addr
)
1926 iterator
->addr
= addr
;
1927 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
1928 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
1930 if (iterator
->level
== PT64_ROOT_LEVEL
&&
1931 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
1932 !vcpu
->arch
.mmu
.direct_map
)
1935 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
1936 iterator
->shadow_addr
1937 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
1938 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
1940 if (!iterator
->shadow_addr
)
1941 iterator
->level
= 0;
1945 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
1947 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
1950 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
1951 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
1955 static void __shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
,
1958 if (is_last_spte(spte
, iterator
->level
)) {
1959 iterator
->level
= 0;
1963 iterator
->shadow_addr
= spte
& PT64_BASE_ADDR_MASK
;
1967 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
1969 return __shadow_walk_next(iterator
, *iterator
->sptep
);
1972 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
)
1976 spte
= __pa(sp
->spt
) | PT_PRESENT_MASK
| PT_WRITABLE_MASK
|
1977 shadow_user_mask
| shadow_x_mask
| shadow_accessed_mask
;
1979 mmu_spte_set(sptep
, spte
);
1982 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
1983 unsigned direct_access
)
1985 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
1986 struct kvm_mmu_page
*child
;
1989 * For the direct sp, if the guest pte's dirty bit
1990 * changed form clean to dirty, it will corrupt the
1991 * sp's access: allow writable in the read-only sp,
1992 * so we should update the spte at this point to get
1993 * a new sp with the correct access.
1995 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
1996 if (child
->role
.access
== direct_access
)
1999 drop_parent_pte(child
, sptep
);
2000 kvm_flush_remote_tlbs(vcpu
->kvm
);
2004 static bool mmu_page_zap_pte(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2008 struct kvm_mmu_page
*child
;
2011 if (is_shadow_present_pte(pte
)) {
2012 if (is_last_spte(pte
, sp
->role
.level
)) {
2013 drop_spte(kvm
, spte
);
2014 if (is_large_pte(pte
))
2017 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2018 drop_parent_pte(child
, spte
);
2023 if (is_mmio_spte(pte
))
2024 mmu_spte_clear_no_track(spte
);
2029 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
2030 struct kvm_mmu_page
*sp
)
2034 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2035 mmu_page_zap_pte(kvm
, sp
, sp
->spt
+ i
);
2038 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
2040 mmu_page_remove_parent_pte(sp
, parent_pte
);
2043 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2046 struct rmap_iterator iter
;
2048 while ((sptep
= rmap_get_first(sp
->parent_ptes
, &iter
)))
2049 drop_parent_pte(sp
, sptep
);
2052 static int mmu_zap_unsync_children(struct kvm
*kvm
,
2053 struct kvm_mmu_page
*parent
,
2054 struct list_head
*invalid_list
)
2057 struct mmu_page_path parents
;
2058 struct kvm_mmu_pages pages
;
2060 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
2063 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2064 while (mmu_unsync_walk(parent
, &pages
)) {
2065 struct kvm_mmu_page
*sp
;
2067 for_each_sp(pages
, sp
, parents
, i
) {
2068 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2069 mmu_pages_clear_parents(&parents
);
2072 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2078 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2079 struct list_head
*invalid_list
)
2083 trace_kvm_mmu_prepare_zap_page(sp
);
2084 ++kvm
->stat
.mmu_shadow_zapped
;
2085 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
2086 kvm_mmu_page_unlink_children(kvm
, sp
);
2087 kvm_mmu_unlink_parents(kvm
, sp
);
2089 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
2090 unaccount_shadowed(kvm
, sp
->gfn
);
2093 kvm_unlink_unsync_page(kvm
, sp
);
2094 if (!sp
->root_count
) {
2097 list_move(&sp
->link
, invalid_list
);
2098 kvm_mod_used_mmu_pages(kvm
, -1);
2100 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
2101 kvm_reload_remote_mmus(kvm
);
2104 sp
->role
.invalid
= 1;
2108 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
2109 struct list_head
*invalid_list
)
2111 struct kvm_mmu_page
*sp
, *nsp
;
2113 if (list_empty(invalid_list
))
2117 * wmb: make sure everyone sees our modifications to the page tables
2118 * rmb: make sure we see changes to vcpu->mode
2123 * Wait for all vcpus to exit guest mode and/or lockless shadow
2126 kvm_flush_remote_tlbs(kvm
);
2128 list_for_each_entry_safe(sp
, nsp
, invalid_list
, link
) {
2129 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
2130 kvm_mmu_free_page(sp
);
2134 static bool prepare_zap_oldest_mmu_page(struct kvm
*kvm
,
2135 struct list_head
*invalid_list
)
2137 struct kvm_mmu_page
*sp
;
2139 if (list_empty(&kvm
->arch
.active_mmu_pages
))
2142 sp
= list_entry(kvm
->arch
.active_mmu_pages
.prev
,
2143 struct kvm_mmu_page
, link
);
2144 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2150 * Changing the number of mmu pages allocated to the vm
2151 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2153 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
2155 LIST_HEAD(invalid_list
);
2157 spin_lock(&kvm
->mmu_lock
);
2159 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
2160 /* Need to free some mmu pages to achieve the goal. */
2161 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
)
2162 if (!prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
2165 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2166 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
2169 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
2171 spin_unlock(&kvm
->mmu_lock
);
2174 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
2176 struct kvm_mmu_page
*sp
;
2177 LIST_HEAD(invalid_list
);
2180 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
2182 spin_lock(&kvm
->mmu_lock
);
2183 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
) {
2184 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
2187 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
2189 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2190 spin_unlock(&kvm
->mmu_lock
);
2194 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page
);
2197 * The function is based on mtrr_type_lookup() in
2198 * arch/x86/kernel/cpu/mtrr/generic.c
2200 static int get_mtrr_type(struct mtrr_state_type
*mtrr_state
,
2205 u8 prev_match
, curr_match
;
2206 int num_var_ranges
= KVM_NR_VAR_MTRR
;
2208 if (!mtrr_state
->enabled
)
2211 /* Make end inclusive end, instead of exclusive */
2214 /* Look in fixed ranges. Just return the type as per start */
2215 if (mtrr_state
->have_fixed
&& (start
< 0x100000)) {
2218 if (start
< 0x80000) {
2220 idx
+= (start
>> 16);
2221 return mtrr_state
->fixed_ranges
[idx
];
2222 } else if (start
< 0xC0000) {
2224 idx
+= ((start
- 0x80000) >> 14);
2225 return mtrr_state
->fixed_ranges
[idx
];
2226 } else if (start
< 0x1000000) {
2228 idx
+= ((start
- 0xC0000) >> 12);
2229 return mtrr_state
->fixed_ranges
[idx
];
2234 * Look in variable ranges
2235 * Look of multiple ranges matching this address and pick type
2236 * as per MTRR precedence
2238 if (!(mtrr_state
->enabled
& 2))
2239 return mtrr_state
->def_type
;
2242 for (i
= 0; i
< num_var_ranges
; ++i
) {
2243 unsigned short start_state
, end_state
;
2245 if (!(mtrr_state
->var_ranges
[i
].mask_lo
& (1 << 11)))
2248 base
= (((u64
)mtrr_state
->var_ranges
[i
].base_hi
) << 32) +
2249 (mtrr_state
->var_ranges
[i
].base_lo
& PAGE_MASK
);
2250 mask
= (((u64
)mtrr_state
->var_ranges
[i
].mask_hi
) << 32) +
2251 (mtrr_state
->var_ranges
[i
].mask_lo
& PAGE_MASK
);
2253 start_state
= ((start
& mask
) == (base
& mask
));
2254 end_state
= ((end
& mask
) == (base
& mask
));
2255 if (start_state
!= end_state
)
2258 if ((start
& mask
) != (base
& mask
))
2261 curr_match
= mtrr_state
->var_ranges
[i
].base_lo
& 0xff;
2262 if (prev_match
== 0xFF) {
2263 prev_match
= curr_match
;
2267 if (prev_match
== MTRR_TYPE_UNCACHABLE
||
2268 curr_match
== MTRR_TYPE_UNCACHABLE
)
2269 return MTRR_TYPE_UNCACHABLE
;
2271 if ((prev_match
== MTRR_TYPE_WRBACK
&&
2272 curr_match
== MTRR_TYPE_WRTHROUGH
) ||
2273 (prev_match
== MTRR_TYPE_WRTHROUGH
&&
2274 curr_match
== MTRR_TYPE_WRBACK
)) {
2275 prev_match
= MTRR_TYPE_WRTHROUGH
;
2276 curr_match
= MTRR_TYPE_WRTHROUGH
;
2279 if (prev_match
!= curr_match
)
2280 return MTRR_TYPE_UNCACHABLE
;
2283 if (prev_match
!= 0xFF)
2286 return mtrr_state
->def_type
;
2289 u8
kvm_get_guest_memory_type(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2293 mtrr
= get_mtrr_type(&vcpu
->arch
.mtrr_state
, gfn
<< PAGE_SHIFT
,
2294 (gfn
<< PAGE_SHIFT
) + PAGE_SIZE
);
2295 if (mtrr
== 0xfe || mtrr
== 0xff)
2296 mtrr
= MTRR_TYPE_WRBACK
;
2299 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type
);
2301 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
2303 trace_kvm_mmu_unsync_page(sp
);
2304 ++vcpu
->kvm
->stat
.mmu_unsync
;
2307 kvm_mmu_mark_parents_unsync(sp
);
2310 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2312 struct kvm_mmu_page
*s
;
2314 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2317 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
2318 __kvm_unsync_page(vcpu
, s
);
2322 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2325 struct kvm_mmu_page
*s
;
2326 bool need_unsync
= false;
2328 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2332 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
2339 kvm_unsync_pages(vcpu
, gfn
);
2343 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2344 unsigned pte_access
, int level
,
2345 gfn_t gfn
, pfn_t pfn
, bool speculative
,
2346 bool can_unsync
, bool host_writable
)
2351 if (set_mmio_spte(sptep
, gfn
, pfn
, pte_access
))
2354 spte
= PT_PRESENT_MASK
;
2356 spte
|= shadow_accessed_mask
;
2358 if (pte_access
& ACC_EXEC_MASK
)
2359 spte
|= shadow_x_mask
;
2361 spte
|= shadow_nx_mask
;
2363 if (pte_access
& ACC_USER_MASK
)
2364 spte
|= shadow_user_mask
;
2366 if (level
> PT_PAGE_TABLE_LEVEL
)
2367 spte
|= PT_PAGE_SIZE_MASK
;
2369 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
2370 kvm_is_mmio_pfn(pfn
));
2373 spte
|= SPTE_HOST_WRITEABLE
;
2375 pte_access
&= ~ACC_WRITE_MASK
;
2377 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
2379 if (pte_access
& ACC_WRITE_MASK
) {
2382 * Other vcpu creates new sp in the window between
2383 * mapping_level() and acquiring mmu-lock. We can
2384 * allow guest to retry the access, the mapping can
2385 * be fixed if guest refault.
2387 if (level
> PT_PAGE_TABLE_LEVEL
&&
2388 has_wrprotected_page(vcpu
->kvm
, gfn
, level
))
2391 spte
|= PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
;
2394 * Optimization: for pte sync, if spte was writable the hash
2395 * lookup is unnecessary (and expensive). Write protection
2396 * is responsibility of mmu_get_page / kvm_sync_page.
2397 * Same reasoning can be applied to dirty page accounting.
2399 if (!can_unsync
&& is_writable_pte(*sptep
))
2402 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2403 pgprintk("%s: found shadow page for %llx, marking ro\n",
2406 pte_access
&= ~ACC_WRITE_MASK
;
2407 spte
&= ~(PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
);
2411 if (pte_access
& ACC_WRITE_MASK
)
2412 mark_page_dirty(vcpu
->kvm
, gfn
);
2415 if (mmu_spte_update(sptep
, spte
))
2416 kvm_flush_remote_tlbs(vcpu
->kvm
);
2421 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2422 unsigned pte_access
, int write_fault
, int *emulate
,
2423 int level
, gfn_t gfn
, pfn_t pfn
, bool speculative
,
2426 int was_rmapped
= 0;
2429 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__
,
2430 *sptep
, write_fault
, gfn
);
2432 if (is_rmap_spte(*sptep
)) {
2434 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2435 * the parent of the now unreachable PTE.
2437 if (level
> PT_PAGE_TABLE_LEVEL
&&
2438 !is_large_pte(*sptep
)) {
2439 struct kvm_mmu_page
*child
;
2442 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2443 drop_parent_pte(child
, sptep
);
2444 kvm_flush_remote_tlbs(vcpu
->kvm
);
2445 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2446 pgprintk("hfn old %llx new %llx\n",
2447 spte_to_pfn(*sptep
), pfn
);
2448 drop_spte(vcpu
->kvm
, sptep
);
2449 kvm_flush_remote_tlbs(vcpu
->kvm
);
2454 if (set_spte(vcpu
, sptep
, pte_access
, level
, gfn
, pfn
, speculative
,
2455 true, host_writable
)) {
2458 kvm_mmu_flush_tlb(vcpu
);
2461 if (unlikely(is_mmio_spte(*sptep
) && emulate
))
2464 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2465 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2466 is_large_pte(*sptep
)? "2MB" : "4kB",
2467 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2469 if (!was_rmapped
&& is_large_pte(*sptep
))
2470 ++vcpu
->kvm
->stat
.lpages
;
2472 if (is_shadow_present_pte(*sptep
)) {
2474 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2475 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2476 rmap_recycle(vcpu
, sptep
, gfn
);
2480 kvm_release_pfn_clean(pfn
);
2483 static void nonpaging_new_cr3(struct kvm_vcpu
*vcpu
)
2485 mmu_free_roots(vcpu
);
2488 static bool is_rsvd_bits_set(struct kvm_mmu
*mmu
, u64 gpte
, int level
)
2492 bit7
= (gpte
>> 7) & 1;
2493 return (gpte
& mmu
->rsvd_bits_mask
[bit7
][level
-1]) != 0;
2496 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2499 struct kvm_memory_slot
*slot
;
2501 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2503 return KVM_PFN_ERR_FAULT
;
2505 return gfn_to_pfn_memslot_atomic(slot
, gfn
);
2508 static bool prefetch_invalid_gpte(struct kvm_vcpu
*vcpu
,
2509 struct kvm_mmu_page
*sp
, u64
*spte
,
2512 if (is_rsvd_bits_set(&vcpu
->arch
.mmu
, gpte
, PT_PAGE_TABLE_LEVEL
))
2515 if (!is_present_gpte(gpte
))
2518 if (!(gpte
& PT_ACCESSED_MASK
))
2524 drop_spte(vcpu
->kvm
, spte
);
2528 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2529 struct kvm_mmu_page
*sp
,
2530 u64
*start
, u64
*end
)
2532 struct page
*pages
[PTE_PREFETCH_NUM
];
2533 unsigned access
= sp
->role
.access
;
2537 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2538 if (!gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
))
2541 ret
= gfn_to_page_many_atomic(vcpu
->kvm
, gfn
, pages
, end
- start
);
2545 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2546 mmu_set_spte(vcpu
, start
, access
, 0, NULL
,
2547 sp
->role
.level
, gfn
, page_to_pfn(pages
[i
]),
2553 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2554 struct kvm_mmu_page
*sp
, u64
*sptep
)
2556 u64
*spte
, *start
= NULL
;
2559 WARN_ON(!sp
->role
.direct
);
2561 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2564 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2565 if (is_shadow_present_pte(*spte
) || spte
== sptep
) {
2568 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2576 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2578 struct kvm_mmu_page
*sp
;
2581 * Since it's no accessed bit on EPT, it's no way to
2582 * distinguish between actually accessed translations
2583 * and prefetched, so disable pte prefetch if EPT is
2586 if (!shadow_accessed_mask
)
2589 sp
= page_header(__pa(sptep
));
2590 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2593 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2596 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2597 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2600 struct kvm_shadow_walk_iterator iterator
;
2601 struct kvm_mmu_page
*sp
;
2605 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2606 if (iterator
.level
== level
) {
2607 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
,
2608 write
, &emulate
, level
, gfn
, pfn
,
2609 prefault
, map_writable
);
2610 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2611 ++vcpu
->stat
.pf_fixed
;
2615 if (!is_shadow_present_pte(*iterator
.sptep
)) {
2616 u64 base_addr
= iterator
.addr
;
2618 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2619 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2620 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2622 1, ACC_ALL
, iterator
.sptep
);
2624 link_shadow_page(iterator
.sptep
, sp
);
2630 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2634 info
.si_signo
= SIGBUS
;
2636 info
.si_code
= BUS_MCEERR_AR
;
2637 info
.si_addr
= (void __user
*)address
;
2638 info
.si_addr_lsb
= PAGE_SHIFT
;
2640 send_sig_info(SIGBUS
, &info
, tsk
);
2643 static int kvm_handle_bad_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
, pfn_t pfn
)
2646 * Do not cache the mmio info caused by writing the readonly gfn
2647 * into the spte otherwise read access on readonly gfn also can
2648 * caused mmio page fault and treat it as mmio access.
2649 * Return 1 to tell kvm to emulate it.
2651 if (pfn
== KVM_PFN_ERR_RO_FAULT
)
2654 if (pfn
== KVM_PFN_ERR_HWPOISON
) {
2655 kvm_send_hwpoison_signal(gfn_to_hva(vcpu
->kvm
, gfn
), current
);
2662 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2663 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2667 int level
= *levelp
;
2670 * Check if it's a transparent hugepage. If this would be an
2671 * hugetlbfs page, level wouldn't be set to
2672 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2675 if (!is_error_noslot_pfn(pfn
) && !kvm_is_mmio_pfn(pfn
) &&
2676 level
== PT_PAGE_TABLE_LEVEL
&&
2677 PageTransCompound(pfn_to_page(pfn
)) &&
2678 !has_wrprotected_page(vcpu
->kvm
, gfn
, PT_DIRECTORY_LEVEL
)) {
2681 * mmu_notifier_retry was successful and we hold the
2682 * mmu_lock here, so the pmd can't become splitting
2683 * from under us, and in turn
2684 * __split_huge_page_refcount() can't run from under
2685 * us and we can safely transfer the refcount from
2686 * PG_tail to PG_head as we switch the pfn to tail to
2689 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2690 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2691 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2695 kvm_release_pfn_clean(pfn
);
2703 static bool handle_abnormal_pfn(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
,
2704 pfn_t pfn
, unsigned access
, int *ret_val
)
2708 /* The pfn is invalid, report the error! */
2709 if (unlikely(is_error_pfn(pfn
))) {
2710 *ret_val
= kvm_handle_bad_page(vcpu
, gfn
, pfn
);
2714 if (unlikely(is_noslot_pfn(pfn
)))
2715 vcpu_cache_mmio_info(vcpu
, gva
, gfn
, access
);
2722 static bool page_fault_can_be_fast(struct kvm_vcpu
*vcpu
, u32 error_code
)
2725 * #PF can be fast only if the shadow page table is present and it
2726 * is caused by write-protect, that means we just need change the
2727 * W bit of the spte which can be done out of mmu-lock.
2729 if (!(error_code
& PFERR_PRESENT_MASK
) ||
2730 !(error_code
& PFERR_WRITE_MASK
))
2737 fast_pf_fix_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, u64 spte
)
2739 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
2742 WARN_ON(!sp
->role
.direct
);
2745 * The gfn of direct spte is stable since it is calculated
2748 gfn
= kvm_mmu_page_get_gfn(sp
, sptep
- sp
->spt
);
2750 if (cmpxchg64(sptep
, spte
, spte
| PT_WRITABLE_MASK
) == spte
)
2751 mark_page_dirty(vcpu
->kvm
, gfn
);
2758 * - true: let the vcpu to access on the same address again.
2759 * - false: let the real page fault path to fix it.
2761 static bool fast_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
, int level
,
2764 struct kvm_shadow_walk_iterator iterator
;
2768 if (!page_fault_can_be_fast(vcpu
, error_code
))
2771 walk_shadow_page_lockless_begin(vcpu
);
2772 for_each_shadow_entry_lockless(vcpu
, gva
, iterator
, spte
)
2773 if (!is_shadow_present_pte(spte
) || iterator
.level
< level
)
2777 * If the mapping has been changed, let the vcpu fault on the
2778 * same address again.
2780 if (!is_rmap_spte(spte
)) {
2785 if (!is_last_spte(spte
, level
))
2789 * Check if it is a spurious fault caused by TLB lazily flushed.
2791 * Need not check the access of upper level table entries since
2792 * they are always ACC_ALL.
2794 if (is_writable_pte(spte
)) {
2800 * Currently, to simplify the code, only the spte write-protected
2801 * by dirty-log can be fast fixed.
2803 if (!spte_is_locklessly_modifiable(spte
))
2807 * Currently, fast page fault only works for direct mapping since
2808 * the gfn is not stable for indirect shadow page.
2809 * See Documentation/virtual/kvm/locking.txt to get more detail.
2811 ret
= fast_pf_fix_direct_spte(vcpu
, iterator
.sptep
, spte
);
2813 trace_fast_page_fault(vcpu
, gva
, error_code
, iterator
.sptep
,
2815 walk_shadow_page_lockless_end(vcpu
);
2820 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2821 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
2822 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
);
2824 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, u32 error_code
,
2825 gfn_t gfn
, bool prefault
)
2831 unsigned long mmu_seq
;
2832 bool map_writable
, write
= error_code
& PFERR_WRITE_MASK
;
2834 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2835 if (likely(!force_pt_level
)) {
2836 level
= mapping_level(vcpu
, gfn
);
2838 * This path builds a PAE pagetable - so we can map
2839 * 2mb pages at maximum. Therefore check if the level
2840 * is larger than that.
2842 if (level
> PT_DIRECTORY_LEVEL
)
2843 level
= PT_DIRECTORY_LEVEL
;
2845 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2847 level
= PT_PAGE_TABLE_LEVEL
;
2849 if (fast_page_fault(vcpu
, v
, level
, error_code
))
2852 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2855 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
2858 if (handle_abnormal_pfn(vcpu
, v
, gfn
, pfn
, ACC_ALL
, &r
))
2861 spin_lock(&vcpu
->kvm
->mmu_lock
);
2862 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
2864 make_mmu_pages_available(vcpu
);
2865 if (likely(!force_pt_level
))
2866 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2867 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
2869 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2875 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2876 kvm_release_pfn_clean(pfn
);
2881 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
2884 struct kvm_mmu_page
*sp
;
2885 LIST_HEAD(invalid_list
);
2887 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2890 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
2891 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
2892 vcpu
->arch
.mmu
.direct_map
)) {
2893 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2895 spin_lock(&vcpu
->kvm
->mmu_lock
);
2896 sp
= page_header(root
);
2898 if (!sp
->root_count
&& sp
->role
.invalid
) {
2899 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
2900 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2902 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2903 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2907 spin_lock(&vcpu
->kvm
->mmu_lock
);
2908 for (i
= 0; i
< 4; ++i
) {
2909 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2912 root
&= PT64_BASE_ADDR_MASK
;
2913 sp
= page_header(root
);
2915 if (!sp
->root_count
&& sp
->role
.invalid
)
2916 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
2919 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
2921 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2922 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2923 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2926 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
2930 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
2931 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2938 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
2940 struct kvm_mmu_page
*sp
;
2943 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2944 spin_lock(&vcpu
->kvm
->mmu_lock
);
2945 make_mmu_pages_available(vcpu
);
2946 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
2949 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2950 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
2951 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
2952 for (i
= 0; i
< 4; ++i
) {
2953 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2955 ASSERT(!VALID_PAGE(root
));
2956 spin_lock(&vcpu
->kvm
->mmu_lock
);
2957 make_mmu_pages_available(vcpu
);
2958 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
2960 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
2962 root
= __pa(sp
->spt
);
2964 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2965 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
2967 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2974 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
2976 struct kvm_mmu_page
*sp
;
2981 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
2983 if (mmu_check_root(vcpu
, root_gfn
))
2987 * Do we shadow a long mode page table? If so we need to
2988 * write-protect the guests page table root.
2990 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2991 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2993 ASSERT(!VALID_PAGE(root
));
2995 spin_lock(&vcpu
->kvm
->mmu_lock
);
2996 make_mmu_pages_available(vcpu
);
2997 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
2999 root
= __pa(sp
->spt
);
3001 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3002 vcpu
->arch
.mmu
.root_hpa
= root
;
3007 * We shadow a 32 bit page table. This may be a legacy 2-level
3008 * or a PAE 3-level page table. In either case we need to be aware that
3009 * the shadow page table may be a PAE or a long mode page table.
3011 pm_mask
= PT_PRESENT_MASK
;
3012 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
3013 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
3015 for (i
= 0; i
< 4; ++i
) {
3016 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3018 ASSERT(!VALID_PAGE(root
));
3019 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
3020 pdptr
= vcpu
->arch
.mmu
.get_pdptr(vcpu
, i
);
3021 if (!is_present_gpte(pdptr
)) {
3022 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
3025 root_gfn
= pdptr
>> PAGE_SHIFT
;
3026 if (mmu_check_root(vcpu
, root_gfn
))
3029 spin_lock(&vcpu
->kvm
->mmu_lock
);
3030 make_mmu_pages_available(vcpu
);
3031 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
3034 root
= __pa(sp
->spt
);
3036 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3038 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
3040 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3043 * If we shadow a 32 bit page table with a long mode page
3044 * table we enter this path.
3046 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3047 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
3049 * The additional page necessary for this is only
3050 * allocated on demand.
3055 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
3056 if (lm_root
== NULL
)
3059 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
3061 vcpu
->arch
.mmu
.lm_root
= lm_root
;
3064 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
3070 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
3072 if (vcpu
->arch
.mmu
.direct_map
)
3073 return mmu_alloc_direct_roots(vcpu
);
3075 return mmu_alloc_shadow_roots(vcpu
);
3078 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3081 struct kvm_mmu_page
*sp
;
3083 if (vcpu
->arch
.mmu
.direct_map
)
3086 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3089 vcpu_clear_mmio_info(vcpu
, ~0ul);
3090 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3091 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3092 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3093 sp
= page_header(root
);
3094 mmu_sync_children(vcpu
, sp
);
3095 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3098 for (i
= 0; i
< 4; ++i
) {
3099 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3101 if (root
&& VALID_PAGE(root
)) {
3102 root
&= PT64_BASE_ADDR_MASK
;
3103 sp
= page_header(root
);
3104 mmu_sync_children(vcpu
, sp
);
3107 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3110 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3112 spin_lock(&vcpu
->kvm
->mmu_lock
);
3113 mmu_sync_roots(vcpu
);
3114 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3117 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3118 u32 access
, struct x86_exception
*exception
)
3121 exception
->error_code
= 0;
3125 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3127 struct x86_exception
*exception
)
3130 exception
->error_code
= 0;
3131 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
);
3134 static bool quickly_check_mmio_pf(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3137 return vcpu_match_mmio_gpa(vcpu
, addr
);
3139 return vcpu_match_mmio_gva(vcpu
, addr
);
3144 * On direct hosts, the last spte is only allows two states
3145 * for mmio page fault:
3146 * - It is the mmio spte
3147 * - It is zapped or it is being zapped.
3149 * This function completely checks the spte when the last spte
3150 * is not the mmio spte.
3152 static bool check_direct_spte_mmio_pf(u64 spte
)
3154 return __check_direct_spte_mmio_pf(spte
);
3157 static u64
walk_shadow_page_get_mmio_spte(struct kvm_vcpu
*vcpu
, u64 addr
)
3159 struct kvm_shadow_walk_iterator iterator
;
3162 walk_shadow_page_lockless_begin(vcpu
);
3163 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
)
3164 if (!is_shadow_present_pte(spte
))
3166 walk_shadow_page_lockless_end(vcpu
);
3172 * If it is a real mmio page fault, return 1 and emulat the instruction
3173 * directly, return 0 to let CPU fault again on the address, -1 is
3174 * returned if bug is detected.
3176 int handle_mmio_page_fault_common(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3180 if (quickly_check_mmio_pf(vcpu
, addr
, direct
))
3183 spte
= walk_shadow_page_get_mmio_spte(vcpu
, addr
);
3185 if (is_mmio_spte(spte
)) {
3186 gfn_t gfn
= get_mmio_spte_gfn(spte
);
3187 unsigned access
= get_mmio_spte_access(spte
);
3192 trace_handle_mmio_page_fault(addr
, gfn
, access
);
3193 vcpu_cache_mmio_info(vcpu
, addr
, gfn
, access
);
3198 * It's ok if the gva is remapped by other cpus on shadow guest,
3199 * it's a BUG if the gfn is not a mmio page.
3201 if (direct
&& !check_direct_spte_mmio_pf(spte
))
3205 * If the page table is zapped by other cpus, let CPU fault again on
3210 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common
);
3212 static int handle_mmio_page_fault(struct kvm_vcpu
*vcpu
, u64 addr
,
3213 u32 error_code
, bool direct
)
3217 ret
= handle_mmio_page_fault_common(vcpu
, addr
, direct
);
3222 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
3223 u32 error_code
, bool prefault
)
3228 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
3230 if (unlikely(error_code
& PFERR_RSVD_MASK
))
3231 return handle_mmio_page_fault(vcpu
, gva
, error_code
, true);
3233 r
= mmu_topup_memory_caches(vcpu
);
3238 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3240 gfn
= gva
>> PAGE_SHIFT
;
3242 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
3243 error_code
, gfn
, prefault
);
3246 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
3248 struct kvm_arch_async_pf arch
;
3250 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
3252 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
3253 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
3255 return kvm_setup_async_pf(vcpu
, gva
, gfn
, &arch
);
3258 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
3260 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
) ||
3261 kvm_event_needs_reinjection(vcpu
)))
3264 return kvm_x86_ops
->interrupt_allowed(vcpu
);
3267 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3268 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
3272 *pfn
= gfn_to_pfn_async(vcpu
->kvm
, gfn
, &async
, write
, writable
);
3275 return false; /* *pfn has correct page already */
3277 if (!prefault
&& can_do_async_pf(vcpu
)) {
3278 trace_kvm_try_async_get_page(gva
, gfn
);
3279 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
3280 trace_kvm_async_pf_doublefault(gva
, gfn
);
3281 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
3283 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
3287 *pfn
= gfn_to_pfn_prot(vcpu
->kvm
, gfn
, write
, writable
);
3292 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
3299 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3300 unsigned long mmu_seq
;
3301 int write
= error_code
& PFERR_WRITE_MASK
;
3305 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3307 if (unlikely(error_code
& PFERR_RSVD_MASK
))
3308 return handle_mmio_page_fault(vcpu
, gpa
, error_code
, true);
3310 r
= mmu_topup_memory_caches(vcpu
);
3314 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
3315 if (likely(!force_pt_level
)) {
3316 level
= mapping_level(vcpu
, gfn
);
3317 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
3319 level
= PT_PAGE_TABLE_LEVEL
;
3321 if (fast_page_fault(vcpu
, gpa
, level
, error_code
))
3324 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3327 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
3330 if (handle_abnormal_pfn(vcpu
, 0, gfn
, pfn
, ACC_ALL
, &r
))
3333 spin_lock(&vcpu
->kvm
->mmu_lock
);
3334 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3336 make_mmu_pages_available(vcpu
);
3337 if (likely(!force_pt_level
))
3338 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3339 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
3340 level
, gfn
, pfn
, prefault
);
3341 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3346 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3347 kvm_release_pfn_clean(pfn
);
3351 static void nonpaging_free(struct kvm_vcpu
*vcpu
)
3353 mmu_free_roots(vcpu
);
3356 static int nonpaging_init_context(struct kvm_vcpu
*vcpu
,
3357 struct kvm_mmu
*context
)
3359 context
->new_cr3
= nonpaging_new_cr3
;
3360 context
->page_fault
= nonpaging_page_fault
;
3361 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3362 context
->free
= nonpaging_free
;
3363 context
->sync_page
= nonpaging_sync_page
;
3364 context
->invlpg
= nonpaging_invlpg
;
3365 context
->update_pte
= nonpaging_update_pte
;
3366 context
->root_level
= 0;
3367 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3368 context
->root_hpa
= INVALID_PAGE
;
3369 context
->direct_map
= true;
3370 context
->nx
= false;
3374 void kvm_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
3376 ++vcpu
->stat
.tlb_flush
;
3377 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
3380 static void paging_new_cr3(struct kvm_vcpu
*vcpu
)
3382 pgprintk("%s: cr3 %lx\n", __func__
, kvm_read_cr3(vcpu
));
3383 mmu_free_roots(vcpu
);
3386 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
3388 return kvm_read_cr3(vcpu
);
3391 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
3392 struct x86_exception
*fault
)
3394 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
3397 static void paging_free(struct kvm_vcpu
*vcpu
)
3399 nonpaging_free(vcpu
);
3402 static inline void protect_clean_gpte(unsigned *access
, unsigned gpte
)
3406 BUILD_BUG_ON(PT_WRITABLE_MASK
!= ACC_WRITE_MASK
);
3408 mask
= (unsigned)~ACC_WRITE_MASK
;
3409 /* Allow write access to dirty gptes */
3410 mask
|= (gpte
>> (PT_DIRTY_SHIFT
- PT_WRITABLE_SHIFT
)) & PT_WRITABLE_MASK
;
3414 static bool sync_mmio_spte(u64
*sptep
, gfn_t gfn
, unsigned access
,
3417 if (unlikely(is_mmio_spte(*sptep
))) {
3418 if (gfn
!= get_mmio_spte_gfn(*sptep
)) {
3419 mmu_spte_clear_no_track(sptep
);
3424 mark_mmio_spte(sptep
, gfn
, access
);
3431 static inline unsigned gpte_access(struct kvm_vcpu
*vcpu
, u64 gpte
)
3435 access
= (gpte
& (PT_WRITABLE_MASK
| PT_USER_MASK
)) | ACC_EXEC_MASK
;
3436 access
&= ~(gpte
>> PT64_NX_SHIFT
);
3441 static inline bool is_last_gpte(struct kvm_mmu
*mmu
, unsigned level
, unsigned gpte
)
3446 index
|= (gpte
& PT_PAGE_SIZE_MASK
) >> (PT_PAGE_SIZE_SHIFT
- 2);
3447 return mmu
->last_pte_bitmap
& (1 << index
);
3451 #include "paging_tmpl.h"
3455 #include "paging_tmpl.h"
3458 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
3459 struct kvm_mmu
*context
)
3461 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
3462 u64 exb_bit_rsvd
= 0;
3465 exb_bit_rsvd
= rsvd_bits(63, 63);
3466 switch (context
->root_level
) {
3467 case PT32_ROOT_LEVEL
:
3468 /* no rsvd bits for 2 level 4K page table entries */
3469 context
->rsvd_bits_mask
[0][1] = 0;
3470 context
->rsvd_bits_mask
[0][0] = 0;
3471 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3473 if (!is_pse(vcpu
)) {
3474 context
->rsvd_bits_mask
[1][1] = 0;
3478 if (is_cpuid_PSE36())
3479 /* 36bits PSE 4MB page */
3480 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
3482 /* 32 bits PSE 4MB page */
3483 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
3485 case PT32E_ROOT_LEVEL
:
3486 context
->rsvd_bits_mask
[0][2] =
3487 rsvd_bits(maxphyaddr
, 63) |
3488 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
3489 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3490 rsvd_bits(maxphyaddr
, 62); /* PDE */
3491 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3492 rsvd_bits(maxphyaddr
, 62); /* PTE */
3493 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3494 rsvd_bits(maxphyaddr
, 62) |
3495 rsvd_bits(13, 20); /* large page */
3496 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3498 case PT64_ROOT_LEVEL
:
3499 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
3500 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
3501 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
3502 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
3503 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3504 rsvd_bits(maxphyaddr
, 51);
3505 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3506 rsvd_bits(maxphyaddr
, 51);
3507 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
3508 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
3509 rsvd_bits(maxphyaddr
, 51) |
3511 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3512 rsvd_bits(maxphyaddr
, 51) |
3513 rsvd_bits(13, 20); /* large page */
3514 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3519 static void update_permission_bitmask(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
3521 unsigned bit
, byte
, pfec
;
3523 bool fault
, x
, w
, u
, wf
, uf
, ff
, smep
;
3525 smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3526 for (byte
= 0; byte
< ARRAY_SIZE(mmu
->permissions
); ++byte
) {
3529 wf
= pfec
& PFERR_WRITE_MASK
;
3530 uf
= pfec
& PFERR_USER_MASK
;
3531 ff
= pfec
& PFERR_FETCH_MASK
;
3532 for (bit
= 0; bit
< 8; ++bit
) {
3533 x
= bit
& ACC_EXEC_MASK
;
3534 w
= bit
& ACC_WRITE_MASK
;
3535 u
= bit
& ACC_USER_MASK
;
3537 /* Not really needed: !nx will cause pte.nx to fault */
3539 /* Allow supervisor writes if !cr0.wp */
3540 w
|= !is_write_protection(vcpu
) && !uf
;
3541 /* Disallow supervisor fetches of user code if cr4.smep */
3542 x
&= !(smep
&& u
&& !uf
);
3544 fault
= (ff
&& !x
) || (uf
&& !u
) || (wf
&& !w
);
3545 map
|= fault
<< bit
;
3547 mmu
->permissions
[byte
] = map
;
3551 static void update_last_pte_bitmap(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
3554 unsigned level
, root_level
= mmu
->root_level
;
3555 const unsigned ps_set_index
= 1 << 2; /* bit 2 of index: ps */
3557 if (root_level
== PT32E_ROOT_LEVEL
)
3559 /* PT_PAGE_TABLE_LEVEL always terminates */
3560 map
= 1 | (1 << ps_set_index
);
3561 for (level
= PT_DIRECTORY_LEVEL
; level
<= root_level
; ++level
) {
3562 if (level
<= PT_PDPE_LEVEL
3563 && (mmu
->root_level
>= PT32E_ROOT_LEVEL
|| is_pse(vcpu
)))
3564 map
|= 1 << (ps_set_index
| (level
- 1));
3566 mmu
->last_pte_bitmap
= map
;
3569 static int paging64_init_context_common(struct kvm_vcpu
*vcpu
,
3570 struct kvm_mmu
*context
,
3573 context
->nx
= is_nx(vcpu
);
3574 context
->root_level
= level
;
3576 reset_rsvds_bits_mask(vcpu
, context
);
3577 update_permission_bitmask(vcpu
, context
);
3578 update_last_pte_bitmap(vcpu
, context
);
3580 ASSERT(is_pae(vcpu
));
3581 context
->new_cr3
= paging_new_cr3
;
3582 context
->page_fault
= paging64_page_fault
;
3583 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3584 context
->sync_page
= paging64_sync_page
;
3585 context
->invlpg
= paging64_invlpg
;
3586 context
->update_pte
= paging64_update_pte
;
3587 context
->free
= paging_free
;
3588 context
->shadow_root_level
= level
;
3589 context
->root_hpa
= INVALID_PAGE
;
3590 context
->direct_map
= false;
3594 static int paging64_init_context(struct kvm_vcpu
*vcpu
,
3595 struct kvm_mmu
*context
)
3597 return paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
3600 static int paging32_init_context(struct kvm_vcpu
*vcpu
,
3601 struct kvm_mmu
*context
)
3603 context
->nx
= false;
3604 context
->root_level
= PT32_ROOT_LEVEL
;
3606 reset_rsvds_bits_mask(vcpu
, context
);
3607 update_permission_bitmask(vcpu
, context
);
3608 update_last_pte_bitmap(vcpu
, context
);
3610 context
->new_cr3
= paging_new_cr3
;
3611 context
->page_fault
= paging32_page_fault
;
3612 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3613 context
->free
= paging_free
;
3614 context
->sync_page
= paging32_sync_page
;
3615 context
->invlpg
= paging32_invlpg
;
3616 context
->update_pte
= paging32_update_pte
;
3617 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3618 context
->root_hpa
= INVALID_PAGE
;
3619 context
->direct_map
= false;
3623 static int paging32E_init_context(struct kvm_vcpu
*vcpu
,
3624 struct kvm_mmu
*context
)
3626 return paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
3629 static int init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
3631 struct kvm_mmu
*context
= vcpu
->arch
.walk_mmu
;
3633 context
->base_role
.word
= 0;
3634 context
->new_cr3
= nonpaging_new_cr3
;
3635 context
->page_fault
= tdp_page_fault
;
3636 context
->free
= nonpaging_free
;
3637 context
->sync_page
= nonpaging_sync_page
;
3638 context
->invlpg
= nonpaging_invlpg
;
3639 context
->update_pte
= nonpaging_update_pte
;
3640 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3641 context
->root_hpa
= INVALID_PAGE
;
3642 context
->direct_map
= true;
3643 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
3644 context
->get_cr3
= get_cr3
;
3645 context
->get_pdptr
= kvm_pdptr_read
;
3646 context
->inject_page_fault
= kvm_inject_page_fault
;
3648 if (!is_paging(vcpu
)) {
3649 context
->nx
= false;
3650 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3651 context
->root_level
= 0;
3652 } else if (is_long_mode(vcpu
)) {
3653 context
->nx
= is_nx(vcpu
);
3654 context
->root_level
= PT64_ROOT_LEVEL
;
3655 reset_rsvds_bits_mask(vcpu
, context
);
3656 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3657 } else if (is_pae(vcpu
)) {
3658 context
->nx
= is_nx(vcpu
);
3659 context
->root_level
= PT32E_ROOT_LEVEL
;
3660 reset_rsvds_bits_mask(vcpu
, context
);
3661 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3663 context
->nx
= false;
3664 context
->root_level
= PT32_ROOT_LEVEL
;
3665 reset_rsvds_bits_mask(vcpu
, context
);
3666 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3669 update_permission_bitmask(vcpu
, context
);
3670 update_last_pte_bitmap(vcpu
, context
);
3675 int kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
3678 bool smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3680 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3682 if (!is_paging(vcpu
))
3683 r
= nonpaging_init_context(vcpu
, context
);
3684 else if (is_long_mode(vcpu
))
3685 r
= paging64_init_context(vcpu
, context
);
3686 else if (is_pae(vcpu
))
3687 r
= paging32E_init_context(vcpu
, context
);
3689 r
= paging32_init_context(vcpu
, context
);
3691 vcpu
->arch
.mmu
.base_role
.nxe
= is_nx(vcpu
);
3692 vcpu
->arch
.mmu
.base_role
.cr4_pae
= !!is_pae(vcpu
);
3693 vcpu
->arch
.mmu
.base_role
.cr0_wp
= is_write_protection(vcpu
);
3694 vcpu
->arch
.mmu
.base_role
.smep_andnot_wp
3695 = smep
&& !is_write_protection(vcpu
);
3699 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
3701 static int init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
3703 int r
= kvm_init_shadow_mmu(vcpu
, vcpu
->arch
.walk_mmu
);
3705 vcpu
->arch
.walk_mmu
->set_cr3
= kvm_x86_ops
->set_cr3
;
3706 vcpu
->arch
.walk_mmu
->get_cr3
= get_cr3
;
3707 vcpu
->arch
.walk_mmu
->get_pdptr
= kvm_pdptr_read
;
3708 vcpu
->arch
.walk_mmu
->inject_page_fault
= kvm_inject_page_fault
;
3713 static int init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
3715 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
3717 g_context
->get_cr3
= get_cr3
;
3718 g_context
->get_pdptr
= kvm_pdptr_read
;
3719 g_context
->inject_page_fault
= kvm_inject_page_fault
;
3722 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3723 * translation of l2_gpa to l1_gpa addresses is done using the
3724 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3725 * functions between mmu and nested_mmu are swapped.
3727 if (!is_paging(vcpu
)) {
3728 g_context
->nx
= false;
3729 g_context
->root_level
= 0;
3730 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
3731 } else if (is_long_mode(vcpu
)) {
3732 g_context
->nx
= is_nx(vcpu
);
3733 g_context
->root_level
= PT64_ROOT_LEVEL
;
3734 reset_rsvds_bits_mask(vcpu
, g_context
);
3735 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3736 } else if (is_pae(vcpu
)) {
3737 g_context
->nx
= is_nx(vcpu
);
3738 g_context
->root_level
= PT32E_ROOT_LEVEL
;
3739 reset_rsvds_bits_mask(vcpu
, g_context
);
3740 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3742 g_context
->nx
= false;
3743 g_context
->root_level
= PT32_ROOT_LEVEL
;
3744 reset_rsvds_bits_mask(vcpu
, g_context
);
3745 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
3748 update_permission_bitmask(vcpu
, g_context
);
3749 update_last_pte_bitmap(vcpu
, g_context
);
3754 static int init_kvm_mmu(struct kvm_vcpu
*vcpu
)
3756 if (mmu_is_nested(vcpu
))
3757 return init_kvm_nested_mmu(vcpu
);
3758 else if (tdp_enabled
)
3759 return init_kvm_tdp_mmu(vcpu
);
3761 return init_kvm_softmmu(vcpu
);
3764 static void destroy_kvm_mmu(struct kvm_vcpu
*vcpu
)
3767 if (VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3768 /* mmu.free() should set root_hpa = INVALID_PAGE */
3769 vcpu
->arch
.mmu
.free(vcpu
);
3772 int kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
3774 destroy_kvm_mmu(vcpu
);
3775 return init_kvm_mmu(vcpu
);
3777 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
3779 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
3783 r
= mmu_topup_memory_caches(vcpu
);
3786 r
= mmu_alloc_roots(vcpu
);
3787 kvm_mmu_sync_roots(vcpu
);
3790 /* set_cr3() should ensure TLB has been flushed */
3791 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
3795 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
3797 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
3799 mmu_free_roots(vcpu
);
3801 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
3803 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
3804 struct kvm_mmu_page
*sp
, u64
*spte
,
3807 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
3808 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
3812 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
3813 vcpu
->arch
.mmu
.update_pte(vcpu
, sp
, spte
, new);
3816 static bool need_remote_flush(u64 old
, u64
new)
3818 if (!is_shadow_present_pte(old
))
3820 if (!is_shadow_present_pte(new))
3822 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
3824 old
^= PT64_NX_MASK
;
3825 new ^= PT64_NX_MASK
;
3826 return (old
& ~new & PT64_PERM_MASK
) != 0;
3829 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
3830 bool remote_flush
, bool local_flush
)
3836 kvm_flush_remote_tlbs(vcpu
->kvm
);
3837 else if (local_flush
)
3838 kvm_mmu_flush_tlb(vcpu
);
3841 static u64
mmu_pte_write_fetch_gpte(struct kvm_vcpu
*vcpu
, gpa_t
*gpa
,
3842 const u8
*new, int *bytes
)
3848 * Assume that the pte write on a page table of the same type
3849 * as the current vcpu paging mode since we update the sptes only
3850 * when they have the same mode.
3852 if (is_pae(vcpu
) && *bytes
== 4) {
3853 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3856 r
= kvm_read_guest(vcpu
->kvm
, *gpa
, &gentry
, 8);
3859 new = (const u8
*)&gentry
;
3864 gentry
= *(const u32
*)new;
3867 gentry
= *(const u64
*)new;
3878 * If we're seeing too many writes to a page, it may no longer be a page table,
3879 * or we may be forking, in which case it is better to unmap the page.
3881 static bool detect_write_flooding(struct kvm_mmu_page
*sp
)
3884 * Skip write-flooding detected for the sp whose level is 1, because
3885 * it can become unsync, then the guest page is not write-protected.
3887 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
)
3890 return ++sp
->write_flooding_count
>= 3;
3894 * Misaligned accesses are too much trouble to fix up; also, they usually
3895 * indicate a page is not used as a page table.
3897 static bool detect_write_misaligned(struct kvm_mmu_page
*sp
, gpa_t gpa
,
3900 unsigned offset
, pte_size
, misaligned
;
3902 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3903 gpa
, bytes
, sp
->role
.word
);
3905 offset
= offset_in_page(gpa
);
3906 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
3909 * Sometimes, the OS only writes the last one bytes to update status
3910 * bits, for example, in linux, andb instruction is used in clear_bit().
3912 if (!(offset
& (pte_size
- 1)) && bytes
== 1)
3915 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
3916 misaligned
|= bytes
< 4;
3921 static u64
*get_written_sptes(struct kvm_mmu_page
*sp
, gpa_t gpa
, int *nspte
)
3923 unsigned page_offset
, quadrant
;
3927 page_offset
= offset_in_page(gpa
);
3928 level
= sp
->role
.level
;
3930 if (!sp
->role
.cr4_pae
) {
3931 page_offset
<<= 1; /* 32->64 */
3933 * A 32-bit pde maps 4MB while the shadow pdes map
3934 * only 2MB. So we need to double the offset again
3935 * and zap two pdes instead of one.
3937 if (level
== PT32_ROOT_LEVEL
) {
3938 page_offset
&= ~7; /* kill rounding error */
3942 quadrant
= page_offset
>> PAGE_SHIFT
;
3943 page_offset
&= ~PAGE_MASK
;
3944 if (quadrant
!= sp
->role
.quadrant
)
3948 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
3952 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3953 const u8
*new, int bytes
)
3955 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3956 union kvm_mmu_page_role mask
= { .word
= 0 };
3957 struct kvm_mmu_page
*sp
;
3958 LIST_HEAD(invalid_list
);
3959 u64 entry
, gentry
, *spte
;
3961 bool remote_flush
, local_flush
, zap_page
;
3964 * If we don't have indirect shadow pages, it means no page is
3965 * write-protected, so we can exit simply.
3967 if (!ACCESS_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
3970 zap_page
= remote_flush
= local_flush
= false;
3972 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
3974 gentry
= mmu_pte_write_fetch_gpte(vcpu
, &gpa
, new, &bytes
);
3977 * No need to care whether allocation memory is successful
3978 * or not since pte prefetch is skiped if it does not have
3979 * enough objects in the cache.
3981 mmu_topup_memory_caches(vcpu
);
3983 spin_lock(&vcpu
->kvm
->mmu_lock
);
3984 ++vcpu
->kvm
->stat
.mmu_pte_write
;
3985 kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
3987 mask
.cr0_wp
= mask
.cr4_pae
= mask
.nxe
= 1;
3988 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
3989 if (detect_write_misaligned(sp
, gpa
, bytes
) ||
3990 detect_write_flooding(sp
)) {
3991 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3993 ++vcpu
->kvm
->stat
.mmu_flooded
;
3997 spte
= get_written_sptes(sp
, gpa
, &npte
);
4004 mmu_page_zap_pte(vcpu
->kvm
, sp
, spte
);
4006 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
4007 & mask
.word
) && rmap_can_add(vcpu
))
4008 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
4009 if (need_remote_flush(entry
, *spte
))
4010 remote_flush
= true;
4014 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
4015 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4016 kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
4017 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4020 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
4025 if (vcpu
->arch
.mmu
.direct_map
)
4028 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
4030 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4034 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
4036 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
)
4038 LIST_HEAD(invalid_list
);
4040 if (likely(kvm_mmu_available_pages(vcpu
->kvm
) >= KVM_MIN_FREE_MMU_PAGES
))
4043 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
) {
4044 if (!prepare_zap_oldest_mmu_page(vcpu
->kvm
, &invalid_list
))
4047 ++vcpu
->kvm
->stat
.mmu_recycled
;
4049 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4052 static bool is_mmio_page_fault(struct kvm_vcpu
*vcpu
, gva_t addr
)
4054 if (vcpu
->arch
.mmu
.direct_map
|| mmu_is_nested(vcpu
))
4055 return vcpu_match_mmio_gpa(vcpu
, addr
);
4057 return vcpu_match_mmio_gva(vcpu
, addr
);
4060 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
4061 void *insn
, int insn_len
)
4063 int r
, emulation_type
= EMULTYPE_RETRY
;
4064 enum emulation_result er
;
4066 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
4075 if (is_mmio_page_fault(vcpu
, cr2
))
4078 er
= x86_emulate_instruction(vcpu
, cr2
, emulation_type
, insn
, insn_len
);
4083 case EMULATE_DO_MMIO
:
4084 ++vcpu
->stat
.mmio_exits
;
4094 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
4096 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
4098 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
4099 kvm_mmu_flush_tlb(vcpu
);
4100 ++vcpu
->stat
.invlpg
;
4102 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
4104 void kvm_enable_tdp(void)
4108 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
4110 void kvm_disable_tdp(void)
4112 tdp_enabled
= false;
4114 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
4116 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
4118 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
4119 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
4120 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
4123 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
4131 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4132 * Therefore we need to allocate shadow page tables in the first
4133 * 4GB of memory, which happens to fit the DMA32 zone.
4135 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
4139 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
4140 for (i
= 0; i
< 4; ++i
)
4141 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
4146 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
4150 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
4151 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4152 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
4153 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
4155 return alloc_mmu_pages(vcpu
);
4158 int kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
4161 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
4163 return init_kvm_mmu(vcpu
);
4166 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
, int slot
)
4168 struct kvm_memory_slot
*memslot
;
4172 memslot
= id_to_memslot(kvm
->memslots
, slot
);
4173 last_gfn
= memslot
->base_gfn
+ memslot
->npages
- 1;
4175 spin_lock(&kvm
->mmu_lock
);
4177 for (i
= PT_PAGE_TABLE_LEVEL
;
4178 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
4179 unsigned long *rmapp
;
4180 unsigned long last_index
, index
;
4182 rmapp
= memslot
->arch
.rmap
[i
- PT_PAGE_TABLE_LEVEL
];
4183 last_index
= gfn_to_index(last_gfn
, memslot
->base_gfn
, i
);
4185 for (index
= 0; index
<= last_index
; ++index
, ++rmapp
) {
4187 __rmap_write_protect(kvm
, rmapp
, false);
4189 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
)) {
4190 kvm_flush_remote_tlbs(kvm
);
4191 cond_resched_lock(&kvm
->mmu_lock
);
4196 kvm_flush_remote_tlbs(kvm
);
4197 spin_unlock(&kvm
->mmu_lock
);
4200 static void kvm_zap_obsolete_pages(struct kvm
*kvm
)
4202 struct kvm_mmu_page
*sp
, *node
;
4203 LIST_HEAD(invalid_list
);
4206 list_for_each_entry_safe_reverse(sp
, node
,
4207 &kvm
->arch
.active_mmu_pages
, link
) {
4209 * No obsolete page exists before new created page since
4210 * active_mmu_pages is the FIFO list.
4212 if (!is_obsolete_sp(kvm
, sp
))
4216 * Do not repeatedly zap a root page to avoid unnecessary
4217 * KVM_REQ_MMU_RELOAD, otherwise we may not be able to
4220 * call vcpu_enter_guest():
4221 * 1): handle KVM_REQ_MMU_RELOAD
4222 * and require mmu-lock to
4225 * 1): zap root page and
4226 * send KVM_REQ_MMU_RELOAD
4228 * 2): if (cond_resched_lock(mmu-lock))
4230 * 2): hold mmu-lock and load mmu
4232 * 3): see KVM_REQ_MMU_RELOAD bit
4233 * on vcpu->requests is set
4234 * then return 1 to call
4235 * vcpu_enter_guest() again.
4238 * Since we are reversely walking the list and the invalid
4239 * list will be moved to the head, skip the invalid page
4240 * can help us to avoid the infinity list walking.
4242 if (sp
->role
.invalid
)
4245 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
)) {
4246 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
4247 cond_resched_lock(&kvm
->mmu_lock
);
4251 if (kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
))
4255 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
4259 * Fast invalidate all shadow pages and use lock-break technique
4260 * to zap obsolete pages.
4262 * It's required when memslot is being deleted or VM is being
4263 * destroyed, in these cases, we should ensure that KVM MMU does
4264 * not use any resource of the being-deleted slot or all slots
4265 * after calling the function.
4267 void kvm_mmu_invalidate_zap_all_pages(struct kvm
*kvm
)
4269 spin_lock(&kvm
->mmu_lock
);
4270 trace_kvm_mmu_invalidate_zap_all_pages(kvm
);
4271 kvm
->arch
.mmu_valid_gen
++;
4273 kvm_zap_obsolete_pages(kvm
);
4274 spin_unlock(&kvm
->mmu_lock
);
4277 void kvm_mmu_zap_mmio_sptes(struct kvm
*kvm
)
4279 struct kvm_mmu_page
*sp
, *node
;
4280 LIST_HEAD(invalid_list
);
4282 spin_lock(&kvm
->mmu_lock
);
4284 list_for_each_entry_safe(sp
, node
, &kvm
->arch
.active_mmu_pages
, link
) {
4285 if (!sp
->mmio_cached
)
4287 if (kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
))
4291 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
4292 spin_unlock(&kvm
->mmu_lock
);
4295 static int mmu_shrink(struct shrinker
*shrink
, struct shrink_control
*sc
)
4298 int nr_to_scan
= sc
->nr_to_scan
;
4300 if (nr_to_scan
== 0)
4303 raw_spin_lock(&kvm_lock
);
4305 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4307 LIST_HEAD(invalid_list
);
4310 * Never scan more than sc->nr_to_scan VM instances.
4311 * Will not hit this condition practically since we do not try
4312 * to shrink more than one VM and it is very unlikely to see
4313 * !n_used_mmu_pages so many times.
4318 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4319 * here. We may skip a VM instance errorneosly, but we do not
4320 * want to shrink a VM that only started to populate its MMU
4323 if (!kvm
->arch
.n_used_mmu_pages
)
4326 idx
= srcu_read_lock(&kvm
->srcu
);
4327 spin_lock(&kvm
->mmu_lock
);
4329 prepare_zap_oldest_mmu_page(kvm
, &invalid_list
);
4330 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
4332 spin_unlock(&kvm
->mmu_lock
);
4333 srcu_read_unlock(&kvm
->srcu
, idx
);
4335 list_move_tail(&kvm
->vm_list
, &vm_list
);
4339 raw_spin_unlock(&kvm_lock
);
4342 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
4345 static struct shrinker mmu_shrinker
= {
4346 .shrink
= mmu_shrink
,
4347 .seeks
= DEFAULT_SEEKS
* 10,
4350 static void mmu_destroy_caches(void)
4352 if (pte_list_desc_cache
)
4353 kmem_cache_destroy(pte_list_desc_cache
);
4354 if (mmu_page_header_cache
)
4355 kmem_cache_destroy(mmu_page_header_cache
);
4358 int kvm_mmu_module_init(void)
4360 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
4361 sizeof(struct pte_list_desc
),
4363 if (!pte_list_desc_cache
)
4366 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
4367 sizeof(struct kvm_mmu_page
),
4369 if (!mmu_page_header_cache
)
4372 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0))
4375 register_shrinker(&mmu_shrinker
);
4380 mmu_destroy_caches();
4385 * Caculate mmu pages needed for kvm.
4387 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
4389 unsigned int nr_mmu_pages
;
4390 unsigned int nr_pages
= 0;
4391 struct kvm_memslots
*slots
;
4392 struct kvm_memory_slot
*memslot
;
4394 slots
= kvm_memslots(kvm
);
4396 kvm_for_each_memslot(memslot
, slots
)
4397 nr_pages
+= memslot
->npages
;
4399 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
4400 nr_mmu_pages
= max(nr_mmu_pages
,
4401 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
4403 return nr_mmu_pages
;
4406 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
4408 struct kvm_shadow_walk_iterator iterator
;
4412 walk_shadow_page_lockless_begin(vcpu
);
4413 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
) {
4414 sptes
[iterator
.level
-1] = spte
;
4416 if (!is_shadow_present_pte(spte
))
4419 walk_shadow_page_lockless_end(vcpu
);
4423 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
4425 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
4429 destroy_kvm_mmu(vcpu
);
4430 free_mmu_pages(vcpu
);
4431 mmu_free_memory_caches(vcpu
);
4434 void kvm_mmu_module_exit(void)
4436 mmu_destroy_caches();
4437 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
4438 unregister_shrinker(&mmu_shrinker
);
4439 mmu_audit_disable();