2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
26 #include <linux/kvm_host.h>
27 #include <linux/types.h>
28 #include <linux/string.h>
30 #include <linux/highmem.h>
31 #include <linux/module.h>
32 #include <linux/swap.h>
33 #include <linux/hugetlb.h>
34 #include <linux/compiler.h>
35 #include <linux/srcu.h>
36 #include <linux/slab.h>
37 #include <linux/uaccess.h>
40 #include <asm/cmpxchg.h>
45 * When setting this variable to true it enables Two-Dimensional-Paging
46 * where the hardware walks 2 page tables:
47 * 1. the guest-virtual to guest-physical
48 * 2. while doing 1. it walks guest-physical to host-physical
49 * If the hardware supports that we don't need to do shadow paging.
51 bool tdp_enabled
= false;
55 AUDIT_POST_PAGE_FAULT
,
66 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
67 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define pgprintk(x...) do { } while (0)
72 #define rmap_printk(x...) do { } while (0)
78 module_param(dbg
, bool, 0644);
82 #define ASSERT(x) do { } while (0)
86 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
87 __FILE__, __LINE__, #x); \
91 #define PTE_PREFETCH_NUM 8
93 #define PT_FIRST_AVAIL_BITS_SHIFT 10
94 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
96 #define PT64_LEVEL_BITS 9
98 #define PT64_LEVEL_SHIFT(level) \
99 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101 #define PT64_INDEX(address, level)\
102 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105 #define PT32_LEVEL_BITS 10
107 #define PT32_LEVEL_SHIFT(level) \
108 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
110 #define PT32_LVL_OFFSET_MASK(level) \
111 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
112 * PT32_LEVEL_BITS))) - 1))
114 #define PT32_INDEX(address, level)\
115 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
118 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
119 #define PT64_DIR_BASE_ADDR_MASK \
120 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
121 #define PT64_LVL_ADDR_MASK(level) \
122 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
123 * PT64_LEVEL_BITS))) - 1))
124 #define PT64_LVL_OFFSET_MASK(level) \
125 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
126 * PT64_LEVEL_BITS))) - 1))
128 #define PT32_BASE_ADDR_MASK PAGE_MASK
129 #define PT32_DIR_BASE_ADDR_MASK \
130 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
131 #define PT32_LVL_ADDR_MASK(level) \
132 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
133 * PT32_LEVEL_BITS))) - 1))
135 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
136 | shadow_x_mask | shadow_nx_mask)
138 #define ACC_EXEC_MASK 1
139 #define ACC_WRITE_MASK PT_WRITABLE_MASK
140 #define ACC_USER_MASK PT_USER_MASK
141 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
143 #include <trace/events/kvm.h>
145 #define CREATE_TRACE_POINTS
146 #include "mmutrace.h"
148 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
149 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
151 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
153 /* make pte_list_desc fit well in cache line */
154 #define PTE_LIST_EXT 3
156 struct pte_list_desc
{
157 u64
*sptes
[PTE_LIST_EXT
];
158 struct pte_list_desc
*more
;
161 struct kvm_shadow_walk_iterator
{
169 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
170 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
171 shadow_walk_okay(&(_walker)); \
172 shadow_walk_next(&(_walker)))
174 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)) && \
177 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
178 __shadow_walk_next(&(_walker), spte))
180 static struct kmem_cache
*pte_list_desc_cache
;
181 static struct kmem_cache
*mmu_page_header_cache
;
182 static struct percpu_counter kvm_total_used_mmu_pages
;
184 static u64 __read_mostly shadow_nx_mask
;
185 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
186 static u64 __read_mostly shadow_user_mask
;
187 static u64 __read_mostly shadow_accessed_mask
;
188 static u64 __read_mostly shadow_dirty_mask
;
189 static u64 __read_mostly shadow_mmio_mask
;
191 static void mmu_spte_set(u64
*sptep
, u64 spte
);
192 static void mmu_free_roots(struct kvm_vcpu
*vcpu
);
194 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask
)
196 shadow_mmio_mask
= mmio_mask
;
198 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask
);
201 * spte bits of bit 3 ~ bit 11 are used as low 9 bits of generation number,
202 * the bits of bits 52 ~ bit 61 are used as high 10 bits of generation
205 #define MMIO_SPTE_GEN_LOW_SHIFT 3
206 #define MMIO_SPTE_GEN_HIGH_SHIFT 52
208 #define MMIO_GEN_SHIFT 19
209 #define MMIO_GEN_LOW_SHIFT 9
210 #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 1)
211 #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1)
212 #define MMIO_MAX_GEN ((1 << MMIO_GEN_SHIFT) - 1)
214 static u64
generation_mmio_spte_mask(unsigned int gen
)
218 WARN_ON(gen
> MMIO_MAX_GEN
);
220 mask
= (gen
& MMIO_GEN_LOW_MASK
) << MMIO_SPTE_GEN_LOW_SHIFT
;
221 mask
|= ((u64
)gen
>> MMIO_GEN_LOW_SHIFT
) << MMIO_SPTE_GEN_HIGH_SHIFT
;
225 static unsigned int get_mmio_spte_generation(u64 spte
)
229 spte
&= ~shadow_mmio_mask
;
231 gen
= (spte
>> MMIO_SPTE_GEN_LOW_SHIFT
) & MMIO_GEN_LOW_MASK
;
232 gen
|= (spte
>> MMIO_SPTE_GEN_HIGH_SHIFT
) << MMIO_GEN_LOW_SHIFT
;
236 static unsigned int kvm_current_mmio_generation(struct kvm
*kvm
)
239 * Init kvm generation close to MMIO_MAX_GEN to easily test the
240 * code of handling generation number wrap-around.
242 return (kvm_memslots(kvm
)->generation
+
243 MMIO_MAX_GEN
- 150) & MMIO_GEN_MASK
;
246 static void mark_mmio_spte(struct kvm
*kvm
, u64
*sptep
, u64 gfn
,
249 unsigned int gen
= kvm_current_mmio_generation(kvm
);
250 u64 mask
= generation_mmio_spte_mask(gen
);
252 access
&= ACC_WRITE_MASK
| ACC_USER_MASK
;
253 mask
|= shadow_mmio_mask
| access
| gfn
<< PAGE_SHIFT
;
255 trace_mark_mmio_spte(sptep
, gfn
, access
, gen
);
256 mmu_spte_set(sptep
, mask
);
259 static bool is_mmio_spte(u64 spte
)
261 return (spte
& shadow_mmio_mask
) == shadow_mmio_mask
;
264 static gfn_t
get_mmio_spte_gfn(u64 spte
)
266 u64 mask
= generation_mmio_spte_mask(MMIO_MAX_GEN
) | shadow_mmio_mask
;
267 return (spte
& ~mask
) >> PAGE_SHIFT
;
270 static unsigned get_mmio_spte_access(u64 spte
)
272 u64 mask
= generation_mmio_spte_mask(MMIO_MAX_GEN
) | shadow_mmio_mask
;
273 return (spte
& ~mask
) & ~PAGE_MASK
;
276 static bool set_mmio_spte(struct kvm
*kvm
, u64
*sptep
, gfn_t gfn
,
277 pfn_t pfn
, unsigned access
)
279 if (unlikely(is_noslot_pfn(pfn
))) {
280 mark_mmio_spte(kvm
, sptep
, gfn
, access
);
287 static bool check_mmio_spte(struct kvm
*kvm
, u64 spte
)
289 unsigned int kvm_gen
, spte_gen
;
291 kvm_gen
= kvm_current_mmio_generation(kvm
);
292 spte_gen
= get_mmio_spte_generation(spte
);
294 trace_check_mmio_spte(spte
, kvm_gen
, spte_gen
);
295 return likely(kvm_gen
== spte_gen
);
298 static inline u64
rsvd_bits(int s
, int e
)
300 return ((1ULL << (e
- s
+ 1)) - 1) << s
;
303 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
304 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
306 shadow_user_mask
= user_mask
;
307 shadow_accessed_mask
= accessed_mask
;
308 shadow_dirty_mask
= dirty_mask
;
309 shadow_nx_mask
= nx_mask
;
310 shadow_x_mask
= x_mask
;
312 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
314 static int is_cpuid_PSE36(void)
319 static int is_nx(struct kvm_vcpu
*vcpu
)
321 return vcpu
->arch
.efer
& EFER_NX
;
324 static int is_shadow_present_pte(u64 pte
)
326 return pte
& PT_PRESENT_MASK
&& !is_mmio_spte(pte
);
329 static int is_large_pte(u64 pte
)
331 return pte
& PT_PAGE_SIZE_MASK
;
334 static int is_rmap_spte(u64 pte
)
336 return is_shadow_present_pte(pte
);
339 static int is_last_spte(u64 pte
, int level
)
341 if (level
== PT_PAGE_TABLE_LEVEL
)
343 if (is_large_pte(pte
))
348 static pfn_t
spte_to_pfn(u64 pte
)
350 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
353 static gfn_t
pse36_gfn_delta(u32 gpte
)
355 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
357 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
361 static void __set_spte(u64
*sptep
, u64 spte
)
366 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
371 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
373 return xchg(sptep
, spte
);
376 static u64
__get_spte_lockless(u64
*sptep
)
378 return ACCESS_ONCE(*sptep
);
381 static bool __check_direct_spte_mmio_pf(u64 spte
)
383 /* It is valid if the spte is zapped. */
395 static void count_spte_clear(u64
*sptep
, u64 spte
)
397 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
399 if (is_shadow_present_pte(spte
))
402 /* Ensure the spte is completely set before we increase the count */
404 sp
->clear_spte_count
++;
407 static void __set_spte(u64
*sptep
, u64 spte
)
409 union split_spte
*ssptep
, sspte
;
411 ssptep
= (union split_spte
*)sptep
;
412 sspte
= (union split_spte
)spte
;
414 ssptep
->spte_high
= sspte
.spte_high
;
417 * If we map the spte from nonpresent to present, We should store
418 * the high bits firstly, then set present bit, so cpu can not
419 * fetch this spte while we are setting the spte.
423 ssptep
->spte_low
= sspte
.spte_low
;
426 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
428 union split_spte
*ssptep
, sspte
;
430 ssptep
= (union split_spte
*)sptep
;
431 sspte
= (union split_spte
)spte
;
433 ssptep
->spte_low
= sspte
.spte_low
;
436 * If we map the spte from present to nonpresent, we should clear
437 * present bit firstly to avoid vcpu fetch the old high bits.
441 ssptep
->spte_high
= sspte
.spte_high
;
442 count_spte_clear(sptep
, spte
);
445 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
447 union split_spte
*ssptep
, sspte
, orig
;
449 ssptep
= (union split_spte
*)sptep
;
450 sspte
= (union split_spte
)spte
;
452 /* xchg acts as a barrier before the setting of the high bits */
453 orig
.spte_low
= xchg(&ssptep
->spte_low
, sspte
.spte_low
);
454 orig
.spte_high
= ssptep
->spte_high
;
455 ssptep
->spte_high
= sspte
.spte_high
;
456 count_spte_clear(sptep
, spte
);
462 * The idea using the light way get the spte on x86_32 guest is from
463 * gup_get_pte(arch/x86/mm/gup.c).
465 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
466 * coalesces them and we are running out of the MMU lock. Therefore
467 * we need to protect against in-progress updates of the spte.
469 * Reading the spte while an update is in progress may get the old value
470 * for the high part of the spte. The race is fine for a present->non-present
471 * change (because the high part of the spte is ignored for non-present spte),
472 * but for a present->present change we must reread the spte.
474 * All such changes are done in two steps (present->non-present and
475 * non-present->present), hence it is enough to count the number of
476 * present->non-present updates: if it changed while reading the spte,
477 * we might have hit the race. This is done using clear_spte_count.
479 static u64
__get_spte_lockless(u64
*sptep
)
481 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
482 union split_spte spte
, *orig
= (union split_spte
*)sptep
;
486 count
= sp
->clear_spte_count
;
489 spte
.spte_low
= orig
->spte_low
;
492 spte
.spte_high
= orig
->spte_high
;
495 if (unlikely(spte
.spte_low
!= orig
->spte_low
||
496 count
!= sp
->clear_spte_count
))
502 static bool __check_direct_spte_mmio_pf(u64 spte
)
504 union split_spte sspte
= (union split_spte
)spte
;
505 u32 high_mmio_mask
= shadow_mmio_mask
>> 32;
507 /* It is valid if the spte is zapped. */
511 /* It is valid if the spte is being zapped. */
512 if (sspte
.spte_low
== 0ull &&
513 (sspte
.spte_high
& high_mmio_mask
) == high_mmio_mask
)
520 static bool spte_is_locklessly_modifiable(u64 spte
)
522 return (spte
& (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
)) ==
523 (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
);
526 static bool spte_has_volatile_bits(u64 spte
)
529 * Always atomicly update spte if it can be updated
530 * out of mmu-lock, it can ensure dirty bit is not lost,
531 * also, it can help us to get a stable is_writable_pte()
532 * to ensure tlb flush is not missed.
534 if (spte_is_locklessly_modifiable(spte
))
537 if (!shadow_accessed_mask
)
540 if (!is_shadow_present_pte(spte
))
543 if ((spte
& shadow_accessed_mask
) &&
544 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
550 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
552 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
555 /* Rules for using mmu_spte_set:
556 * Set the sptep from nonpresent to present.
557 * Note: the sptep being assigned *must* be either not present
558 * or in a state where the hardware will not attempt to update
561 static void mmu_spte_set(u64
*sptep
, u64 new_spte
)
563 WARN_ON(is_shadow_present_pte(*sptep
));
564 __set_spte(sptep
, new_spte
);
567 /* Rules for using mmu_spte_update:
568 * Update the state bits, it means the mapped pfn is not changged.
570 * Whenever we overwrite a writable spte with a read-only one we
571 * should flush remote TLBs. Otherwise rmap_write_protect
572 * will find a read-only spte, even though the writable spte
573 * might be cached on a CPU's TLB, the return value indicates this
576 static bool mmu_spte_update(u64
*sptep
, u64 new_spte
)
578 u64 old_spte
= *sptep
;
581 WARN_ON(!is_rmap_spte(new_spte
));
583 if (!is_shadow_present_pte(old_spte
)) {
584 mmu_spte_set(sptep
, new_spte
);
588 if (!spte_has_volatile_bits(old_spte
))
589 __update_clear_spte_fast(sptep
, new_spte
);
591 old_spte
= __update_clear_spte_slow(sptep
, new_spte
);
594 * For the spte updated out of mmu-lock is safe, since
595 * we always atomicly update it, see the comments in
596 * spte_has_volatile_bits().
598 if (is_writable_pte(old_spte
) && !is_writable_pte(new_spte
))
601 if (!shadow_accessed_mask
)
604 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
605 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
606 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
607 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
613 * Rules for using mmu_spte_clear_track_bits:
614 * It sets the sptep from present to nonpresent, and track the
615 * state bits, it is used to clear the last level sptep.
617 static int mmu_spte_clear_track_bits(u64
*sptep
)
620 u64 old_spte
= *sptep
;
622 if (!spte_has_volatile_bits(old_spte
))
623 __update_clear_spte_fast(sptep
, 0ull);
625 old_spte
= __update_clear_spte_slow(sptep
, 0ull);
627 if (!is_rmap_spte(old_spte
))
630 pfn
= spte_to_pfn(old_spte
);
633 * KVM does not hold the refcount of the page used by
634 * kvm mmu, before reclaiming the page, we should
635 * unmap it from mmu first.
637 WARN_ON(!kvm_is_mmio_pfn(pfn
) && !page_count(pfn_to_page(pfn
)));
639 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
640 kvm_set_pfn_accessed(pfn
);
641 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
642 kvm_set_pfn_dirty(pfn
);
647 * Rules for using mmu_spte_clear_no_track:
648 * Directly clear spte without caring the state bits of sptep,
649 * it is used to set the upper level spte.
651 static void mmu_spte_clear_no_track(u64
*sptep
)
653 __update_clear_spte_fast(sptep
, 0ull);
656 static u64
mmu_spte_get_lockless(u64
*sptep
)
658 return __get_spte_lockless(sptep
);
661 static void walk_shadow_page_lockless_begin(struct kvm_vcpu
*vcpu
)
664 * Prevent page table teardown by making any free-er wait during
665 * kvm_flush_remote_tlbs() IPI to all active vcpus.
668 vcpu
->mode
= READING_SHADOW_PAGE_TABLES
;
670 * Make sure a following spte read is not reordered ahead of the write
676 static void walk_shadow_page_lockless_end(struct kvm_vcpu
*vcpu
)
679 * Make sure the write to vcpu->mode is not reordered in front of
680 * reads to sptes. If it does, kvm_commit_zap_page() can see us
681 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
684 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
688 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
689 struct kmem_cache
*base_cache
, int min
)
693 if (cache
->nobjs
>= min
)
695 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
696 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
699 cache
->objects
[cache
->nobjs
++] = obj
;
704 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache
*cache
)
709 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
710 struct kmem_cache
*cache
)
713 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
716 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
721 if (cache
->nobjs
>= min
)
723 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
724 page
= (void *)__get_free_page(GFP_KERNEL
);
727 cache
->objects
[cache
->nobjs
++] = page
;
732 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
735 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
738 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
742 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
743 pte_list_desc_cache
, 8 + PTE_PREFETCH_NUM
);
746 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
749 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
750 mmu_page_header_cache
, 4);
755 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
757 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
758 pte_list_desc_cache
);
759 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
760 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
761 mmu_page_header_cache
);
764 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
)
769 p
= mc
->objects
[--mc
->nobjs
];
773 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
775 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
);
778 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
780 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
783 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
785 if (!sp
->role
.direct
)
786 return sp
->gfns
[index
];
788 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
791 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
794 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
796 sp
->gfns
[index
] = gfn
;
800 * Return the pointer to the large page information for a given gfn,
801 * handling slots that are not large page aligned.
803 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
804 struct kvm_memory_slot
*slot
,
809 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
810 return &slot
->arch
.lpage_info
[level
- 2][idx
];
813 static void account_shadowed(struct kvm
*kvm
, gfn_t gfn
)
815 struct kvm_memory_slot
*slot
;
816 struct kvm_lpage_info
*linfo
;
819 slot
= gfn_to_memslot(kvm
, gfn
);
820 for (i
= PT_DIRECTORY_LEVEL
;
821 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
822 linfo
= lpage_info_slot(gfn
, slot
, i
);
823 linfo
->write_count
+= 1;
825 kvm
->arch
.indirect_shadow_pages
++;
828 static void unaccount_shadowed(struct kvm
*kvm
, gfn_t gfn
)
830 struct kvm_memory_slot
*slot
;
831 struct kvm_lpage_info
*linfo
;
834 slot
= gfn_to_memslot(kvm
, gfn
);
835 for (i
= PT_DIRECTORY_LEVEL
;
836 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
837 linfo
= lpage_info_slot(gfn
, slot
, i
);
838 linfo
->write_count
-= 1;
839 WARN_ON(linfo
->write_count
< 0);
841 kvm
->arch
.indirect_shadow_pages
--;
844 static int has_wrprotected_page(struct kvm
*kvm
,
848 struct kvm_memory_slot
*slot
;
849 struct kvm_lpage_info
*linfo
;
851 slot
= gfn_to_memslot(kvm
, gfn
);
853 linfo
= lpage_info_slot(gfn
, slot
, level
);
854 return linfo
->write_count
;
860 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
862 unsigned long page_size
;
865 page_size
= kvm_host_page_size(kvm
, gfn
);
867 for (i
= PT_PAGE_TABLE_LEVEL
;
868 i
< (PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
); ++i
) {
869 if (page_size
>= KVM_HPAGE_SIZE(i
))
878 static struct kvm_memory_slot
*
879 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
882 struct kvm_memory_slot
*slot
;
884 slot
= gfn_to_memslot(vcpu
->kvm
, gfn
);
885 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
886 (no_dirty_log
&& slot
->dirty_bitmap
))
892 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
894 return !gfn_to_memslot_dirty_bitmap(vcpu
, large_gfn
, true);
897 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
899 int host_level
, level
, max_level
;
901 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
903 if (host_level
== PT_PAGE_TABLE_LEVEL
)
906 max_level
= min(kvm_x86_ops
->get_lpage_level(), host_level
);
908 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
909 if (has_wrprotected_page(vcpu
->kvm
, large_gfn
, level
))
916 * Pte mapping structures:
918 * If pte_list bit zero is zero, then pte_list point to the spte.
920 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
921 * pte_list_desc containing more mappings.
923 * Returns the number of pte entries before the spte was added or zero if
924 * the spte was not added.
927 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
928 unsigned long *pte_list
)
930 struct pte_list_desc
*desc
;
934 rmap_printk("pte_list_add: %p %llx 0->1\n", spte
, *spte
);
935 *pte_list
= (unsigned long)spte
;
936 } else if (!(*pte_list
& 1)) {
937 rmap_printk("pte_list_add: %p %llx 1->many\n", spte
, *spte
);
938 desc
= mmu_alloc_pte_list_desc(vcpu
);
939 desc
->sptes
[0] = (u64
*)*pte_list
;
940 desc
->sptes
[1] = spte
;
941 *pte_list
= (unsigned long)desc
| 1;
944 rmap_printk("pte_list_add: %p %llx many->many\n", spte
, *spte
);
945 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
946 while (desc
->sptes
[PTE_LIST_EXT
-1] && desc
->more
) {
948 count
+= PTE_LIST_EXT
;
950 if (desc
->sptes
[PTE_LIST_EXT
-1]) {
951 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
954 for (i
= 0; desc
->sptes
[i
]; ++i
)
956 desc
->sptes
[i
] = spte
;
962 pte_list_desc_remove_entry(unsigned long *pte_list
, struct pte_list_desc
*desc
,
963 int i
, struct pte_list_desc
*prev_desc
)
967 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
969 desc
->sptes
[i
] = desc
->sptes
[j
];
970 desc
->sptes
[j
] = NULL
;
973 if (!prev_desc
&& !desc
->more
)
974 *pte_list
= (unsigned long)desc
->sptes
[0];
977 prev_desc
->more
= desc
->more
;
979 *pte_list
= (unsigned long)desc
->more
| 1;
980 mmu_free_pte_list_desc(desc
);
983 static void pte_list_remove(u64
*spte
, unsigned long *pte_list
)
985 struct pte_list_desc
*desc
;
986 struct pte_list_desc
*prev_desc
;
990 printk(KERN_ERR
"pte_list_remove: %p 0->BUG\n", spte
);
992 } else if (!(*pte_list
& 1)) {
993 rmap_printk("pte_list_remove: %p 1->0\n", spte
);
994 if ((u64
*)*pte_list
!= spte
) {
995 printk(KERN_ERR
"pte_list_remove: %p 1->BUG\n", spte
);
1000 rmap_printk("pte_list_remove: %p many->many\n", spte
);
1001 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
1004 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
1005 if (desc
->sptes
[i
] == spte
) {
1006 pte_list_desc_remove_entry(pte_list
,
1014 pr_err("pte_list_remove: %p many->many\n", spte
);
1019 typedef void (*pte_list_walk_fn
) (u64
*spte
);
1020 static void pte_list_walk(unsigned long *pte_list
, pte_list_walk_fn fn
)
1022 struct pte_list_desc
*desc
;
1028 if (!(*pte_list
& 1))
1029 return fn((u64
*)*pte_list
);
1031 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
1033 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
1039 static unsigned long *__gfn_to_rmap(gfn_t gfn
, int level
,
1040 struct kvm_memory_slot
*slot
)
1044 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
1045 return &slot
->arch
.rmap
[level
- PT_PAGE_TABLE_LEVEL
][idx
];
1049 * Take gfn and return the reverse mapping to it.
1051 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, int level
)
1053 struct kvm_memory_slot
*slot
;
1055 slot
= gfn_to_memslot(kvm
, gfn
);
1056 return __gfn_to_rmap(gfn
, level
, slot
);
1059 static bool rmap_can_add(struct kvm_vcpu
*vcpu
)
1061 struct kvm_mmu_memory_cache
*cache
;
1063 cache
= &vcpu
->arch
.mmu_pte_list_desc_cache
;
1064 return mmu_memory_cache_free_objects(cache
);
1067 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1069 struct kvm_mmu_page
*sp
;
1070 unsigned long *rmapp
;
1072 sp
= page_header(__pa(spte
));
1073 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
1074 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1075 return pte_list_add(vcpu
, spte
, rmapp
);
1078 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
1080 struct kvm_mmu_page
*sp
;
1082 unsigned long *rmapp
;
1084 sp
= page_header(__pa(spte
));
1085 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
1086 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
->role
.level
);
1087 pte_list_remove(spte
, rmapp
);
1091 * Used by the following functions to iterate through the sptes linked by a
1092 * rmap. All fields are private and not assumed to be used outside.
1094 struct rmap_iterator
{
1095 /* private fields */
1096 struct pte_list_desc
*desc
; /* holds the sptep if not NULL */
1097 int pos
; /* index of the sptep */
1101 * Iteration must be started by this function. This should also be used after
1102 * removing/dropping sptes from the rmap link because in such cases the
1103 * information in the itererator may not be valid.
1105 * Returns sptep if found, NULL otherwise.
1107 static u64
*rmap_get_first(unsigned long rmap
, struct rmap_iterator
*iter
)
1117 iter
->desc
= (struct pte_list_desc
*)(rmap
& ~1ul);
1119 return iter
->desc
->sptes
[iter
->pos
];
1123 * Must be used with a valid iterator: e.g. after rmap_get_first().
1125 * Returns sptep if found, NULL otherwise.
1127 static u64
*rmap_get_next(struct rmap_iterator
*iter
)
1130 if (iter
->pos
< PTE_LIST_EXT
- 1) {
1134 sptep
= iter
->desc
->sptes
[iter
->pos
];
1139 iter
->desc
= iter
->desc
->more
;
1143 /* desc->sptes[0] cannot be NULL */
1144 return iter
->desc
->sptes
[iter
->pos
];
1151 static void drop_spte(struct kvm
*kvm
, u64
*sptep
)
1153 if (mmu_spte_clear_track_bits(sptep
))
1154 rmap_remove(kvm
, sptep
);
1158 static bool __drop_large_spte(struct kvm
*kvm
, u64
*sptep
)
1160 if (is_large_pte(*sptep
)) {
1161 WARN_ON(page_header(__pa(sptep
))->role
.level
==
1162 PT_PAGE_TABLE_LEVEL
);
1163 drop_spte(kvm
, sptep
);
1171 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1173 if (__drop_large_spte(vcpu
->kvm
, sptep
))
1174 kvm_flush_remote_tlbs(vcpu
->kvm
);
1178 * Write-protect on the specified @sptep, @pt_protect indicates whether
1179 * spte writ-protection is caused by protecting shadow page table.
1180 * @flush indicates whether tlb need be flushed.
1182 * Note: write protection is difference between drity logging and spte
1184 * - for dirty logging, the spte can be set to writable at anytime if
1185 * its dirty bitmap is properly set.
1186 * - for spte protection, the spte can be writable only after unsync-ing
1189 * Return true if the spte is dropped.
1192 spte_write_protect(struct kvm
*kvm
, u64
*sptep
, bool *flush
, bool pt_protect
)
1196 if (!is_writable_pte(spte
) &&
1197 !(pt_protect
&& spte_is_locklessly_modifiable(spte
)))
1200 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep
, *sptep
);
1202 if (__drop_large_spte(kvm
, sptep
)) {
1208 spte
&= ~SPTE_MMU_WRITEABLE
;
1209 spte
= spte
& ~PT_WRITABLE_MASK
;
1211 *flush
|= mmu_spte_update(sptep
, spte
);
1215 static bool __rmap_write_protect(struct kvm
*kvm
, unsigned long *rmapp
,
1219 struct rmap_iterator iter
;
1222 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1223 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1224 if (spte_write_protect(kvm
, sptep
, &flush
, pt_protect
)) {
1225 sptep
= rmap_get_first(*rmapp
, &iter
);
1229 sptep
= rmap_get_next(&iter
);
1236 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1237 * @kvm: kvm instance
1238 * @slot: slot to protect
1239 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1240 * @mask: indicates which pages we should protect
1242 * Used when we do not need to care about huge page mappings: e.g. during dirty
1243 * logging we do not have any such mappings.
1245 void kvm_mmu_write_protect_pt_masked(struct kvm
*kvm
,
1246 struct kvm_memory_slot
*slot
,
1247 gfn_t gfn_offset
, unsigned long mask
)
1249 unsigned long *rmapp
;
1252 rmapp
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1253 PT_PAGE_TABLE_LEVEL
, slot
);
1254 __rmap_write_protect(kvm
, rmapp
, false);
1256 /* clear the first set bit */
1261 static bool rmap_write_protect(struct kvm
*kvm
, u64 gfn
)
1263 struct kvm_memory_slot
*slot
;
1264 unsigned long *rmapp
;
1266 bool write_protected
= false;
1268 slot
= gfn_to_memslot(kvm
, gfn
);
1270 for (i
= PT_PAGE_TABLE_LEVEL
;
1271 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
1272 rmapp
= __gfn_to_rmap(gfn
, i
, slot
);
1273 write_protected
|= __rmap_write_protect(kvm
, rmapp
, true);
1276 return write_protected
;
1279 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1280 struct kvm_memory_slot
*slot
, unsigned long data
)
1283 struct rmap_iterator iter
;
1284 int need_tlb_flush
= 0;
1286 while ((sptep
= rmap_get_first(*rmapp
, &iter
))) {
1287 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1288 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", sptep
, *sptep
);
1290 drop_spte(kvm
, sptep
);
1294 return need_tlb_flush
;
1297 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1298 struct kvm_memory_slot
*slot
, unsigned long data
)
1301 struct rmap_iterator iter
;
1304 pte_t
*ptep
= (pte_t
*)data
;
1307 WARN_ON(pte_huge(*ptep
));
1308 new_pfn
= pte_pfn(*ptep
);
1310 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1311 BUG_ON(!is_shadow_present_pte(*sptep
));
1312 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", sptep
, *sptep
);
1316 if (pte_write(*ptep
)) {
1317 drop_spte(kvm
, sptep
);
1318 sptep
= rmap_get_first(*rmapp
, &iter
);
1320 new_spte
= *sptep
& ~PT64_BASE_ADDR_MASK
;
1321 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
1323 new_spte
&= ~PT_WRITABLE_MASK
;
1324 new_spte
&= ~SPTE_HOST_WRITEABLE
;
1325 new_spte
&= ~shadow_accessed_mask
;
1327 mmu_spte_clear_track_bits(sptep
);
1328 mmu_spte_set(sptep
, new_spte
);
1329 sptep
= rmap_get_next(&iter
);
1334 kvm_flush_remote_tlbs(kvm
);
1339 static int kvm_handle_hva_range(struct kvm
*kvm
,
1340 unsigned long start
,
1343 int (*handler
)(struct kvm
*kvm
,
1344 unsigned long *rmapp
,
1345 struct kvm_memory_slot
*slot
,
1346 unsigned long data
))
1350 struct kvm_memslots
*slots
;
1351 struct kvm_memory_slot
*memslot
;
1353 slots
= kvm_memslots(kvm
);
1355 kvm_for_each_memslot(memslot
, slots
) {
1356 unsigned long hva_start
, hva_end
;
1357 gfn_t gfn_start
, gfn_end
;
1359 hva_start
= max(start
, memslot
->userspace_addr
);
1360 hva_end
= min(end
, memslot
->userspace_addr
+
1361 (memslot
->npages
<< PAGE_SHIFT
));
1362 if (hva_start
>= hva_end
)
1365 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1366 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1368 gfn_start
= hva_to_gfn_memslot(hva_start
, memslot
);
1369 gfn_end
= hva_to_gfn_memslot(hva_end
+ PAGE_SIZE
- 1, memslot
);
1371 for (j
= PT_PAGE_TABLE_LEVEL
;
1372 j
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++j
) {
1373 unsigned long idx
, idx_end
;
1374 unsigned long *rmapp
;
1377 * {idx(page_j) | page_j intersects with
1378 * [hva_start, hva_end)} = {idx, idx+1, ..., idx_end}.
1380 idx
= gfn_to_index(gfn_start
, memslot
->base_gfn
, j
);
1381 idx_end
= gfn_to_index(gfn_end
- 1, memslot
->base_gfn
, j
);
1383 rmapp
= __gfn_to_rmap(gfn_start
, j
, memslot
);
1385 for (; idx
<= idx_end
; ++idx
)
1386 ret
|= handler(kvm
, rmapp
++, memslot
, data
);
1393 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
1395 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
1396 struct kvm_memory_slot
*slot
,
1397 unsigned long data
))
1399 return kvm_handle_hva_range(kvm
, hva
, hva
+ 1, data
, handler
);
1402 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
1404 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
1407 int kvm_unmap_hva_range(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1409 return kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_unmap_rmapp
);
1412 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
1414 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
1417 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1418 struct kvm_memory_slot
*slot
, unsigned long data
)
1421 struct rmap_iterator
uninitialized_var(iter
);
1425 * In case of absence of EPT Access and Dirty Bits supports,
1426 * emulate the accessed bit for EPT, by checking if this page has
1427 * an EPT mapping, and clearing it if it does. On the next access,
1428 * a new EPT mapping will be established.
1429 * This has some overhead, but not as much as the cost of swapping
1430 * out actively used pages or breaking up actively used hugepages.
1432 if (!shadow_accessed_mask
) {
1433 young
= kvm_unmap_rmapp(kvm
, rmapp
, slot
, data
);
1437 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1438 sptep
= rmap_get_next(&iter
)) {
1439 BUG_ON(!is_shadow_present_pte(*sptep
));
1441 if (*sptep
& shadow_accessed_mask
) {
1443 clear_bit((ffs(shadow_accessed_mask
) - 1),
1444 (unsigned long *)sptep
);
1448 /* @data has hva passed to kvm_age_hva(). */
1449 trace_kvm_age_page(data
, slot
, young
);
1453 static int kvm_test_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1454 struct kvm_memory_slot
*slot
, unsigned long data
)
1457 struct rmap_iterator iter
;
1461 * If there's no access bit in the secondary pte set by the
1462 * hardware it's up to gup-fast/gup to set the access bit in
1463 * the primary pte or in the page structure.
1465 if (!shadow_accessed_mask
)
1468 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1469 sptep
= rmap_get_next(&iter
)) {
1470 BUG_ON(!is_shadow_present_pte(*sptep
));
1472 if (*sptep
& shadow_accessed_mask
) {
1481 #define RMAP_RECYCLE_THRESHOLD 1000
1483 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1485 unsigned long *rmapp
;
1486 struct kvm_mmu_page
*sp
;
1488 sp
= page_header(__pa(spte
));
1490 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1492 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, NULL
, 0);
1493 kvm_flush_remote_tlbs(vcpu
->kvm
);
1496 int kvm_age_hva(struct kvm
*kvm
, unsigned long hva
)
1498 return kvm_handle_hva(kvm
, hva
, hva
, kvm_age_rmapp
);
1501 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1503 return kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1507 static int is_empty_shadow_page(u64
*spt
)
1512 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1513 if (is_shadow_present_pte(*pos
)) {
1514 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1523 * This value is the sum of all of the kvm instances's
1524 * kvm->arch.n_used_mmu_pages values. We need a global,
1525 * aggregate version in order to make the slab shrinker
1528 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
1530 kvm
->arch
.n_used_mmu_pages
+= nr
;
1531 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1534 static void kvm_mmu_free_page(struct kvm_mmu_page
*sp
)
1536 ASSERT(is_empty_shadow_page(sp
->spt
));
1537 hlist_del(&sp
->hash_link
);
1538 list_del(&sp
->link
);
1539 free_page((unsigned long)sp
->spt
);
1540 if (!sp
->role
.direct
)
1541 free_page((unsigned long)sp
->gfns
);
1542 kmem_cache_free(mmu_page_header_cache
, sp
);
1545 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1547 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1550 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1551 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1556 pte_list_add(vcpu
, parent_pte
, &sp
->parent_ptes
);
1559 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1562 pte_list_remove(parent_pte
, &sp
->parent_ptes
);
1565 static void drop_parent_pte(struct kvm_mmu_page
*sp
,
1568 mmu_page_remove_parent_pte(sp
, parent_pte
);
1569 mmu_spte_clear_no_track(parent_pte
);
1572 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1573 u64
*parent_pte
, int direct
)
1575 struct kvm_mmu_page
*sp
;
1577 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
);
1578 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1580 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1581 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1584 * The active_mmu_pages list is the FIFO list, do not move the
1585 * page until it is zapped. kvm_zap_obsolete_pages depends on
1586 * this feature. See the comments in kvm_zap_obsolete_pages().
1588 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1589 sp
->parent_ptes
= 0;
1590 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1591 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1595 static void mark_unsync(u64
*spte
);
1596 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1598 pte_list_walk(&sp
->parent_ptes
, mark_unsync
);
1601 static void mark_unsync(u64
*spte
)
1603 struct kvm_mmu_page
*sp
;
1606 sp
= page_header(__pa(spte
));
1607 index
= spte
- sp
->spt
;
1608 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1610 if (sp
->unsync_children
++)
1612 kvm_mmu_mark_parents_unsync(sp
);
1615 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1616 struct kvm_mmu_page
*sp
)
1621 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1625 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1626 struct kvm_mmu_page
*sp
, u64
*spte
,
1632 #define KVM_PAGE_ARRAY_NR 16
1634 struct kvm_mmu_pages
{
1635 struct mmu_page_and_offset
{
1636 struct kvm_mmu_page
*sp
;
1638 } page
[KVM_PAGE_ARRAY_NR
];
1642 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1648 for (i
=0; i
< pvec
->nr
; i
++)
1649 if (pvec
->page
[i
].sp
== sp
)
1652 pvec
->page
[pvec
->nr
].sp
= sp
;
1653 pvec
->page
[pvec
->nr
].idx
= idx
;
1655 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1658 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1659 struct kvm_mmu_pages
*pvec
)
1661 int i
, ret
, nr_unsync_leaf
= 0;
1663 for_each_set_bit(i
, sp
->unsync_child_bitmap
, 512) {
1664 struct kvm_mmu_page
*child
;
1665 u64 ent
= sp
->spt
[i
];
1667 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1668 goto clear_child_bitmap
;
1670 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1672 if (child
->unsync_children
) {
1673 if (mmu_pages_add(pvec
, child
, i
))
1676 ret
= __mmu_unsync_walk(child
, pvec
);
1678 goto clear_child_bitmap
;
1680 nr_unsync_leaf
+= ret
;
1683 } else if (child
->unsync
) {
1685 if (mmu_pages_add(pvec
, child
, i
))
1688 goto clear_child_bitmap
;
1693 __clear_bit(i
, sp
->unsync_child_bitmap
);
1694 sp
->unsync_children
--;
1695 WARN_ON((int)sp
->unsync_children
< 0);
1699 return nr_unsync_leaf
;
1702 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1703 struct kvm_mmu_pages
*pvec
)
1705 if (!sp
->unsync_children
)
1708 mmu_pages_add(pvec
, sp
, 0);
1709 return __mmu_unsync_walk(sp
, pvec
);
1712 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1714 WARN_ON(!sp
->unsync
);
1715 trace_kvm_mmu_sync_page(sp
);
1717 --kvm
->stat
.mmu_unsync
;
1720 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1721 struct list_head
*invalid_list
);
1722 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1723 struct list_head
*invalid_list
);
1726 * NOTE: we should pay more attention on the zapped-obsolete page
1727 * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1728 * since it has been deleted from active_mmu_pages but still can be found
1731 * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1732 * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1733 * all the obsolete pages.
1735 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1736 hlist_for_each_entry(_sp, \
1737 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1738 if ((_sp)->gfn != (_gfn)) {} else
1740 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1741 for_each_gfn_sp(_kvm, _sp, _gfn) \
1742 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1744 /* @sp->gfn should be write-protected at the call site */
1745 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1746 struct list_head
*invalid_list
, bool clear_unsync
)
1748 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1749 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1754 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1756 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1757 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1761 kvm_mmu_flush_tlb(vcpu
);
1765 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1766 struct kvm_mmu_page
*sp
)
1768 LIST_HEAD(invalid_list
);
1771 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1773 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1778 #ifdef CONFIG_KVM_MMU_AUDIT
1779 #include "mmu_audit.c"
1781 static void kvm_mmu_audit(struct kvm_vcpu
*vcpu
, int point
) { }
1782 static void mmu_audit_disable(void) { }
1785 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1786 struct list_head
*invalid_list
)
1788 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1791 /* @gfn should be write-protected at the call site */
1792 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1794 struct kvm_mmu_page
*s
;
1795 LIST_HEAD(invalid_list
);
1798 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
1802 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1803 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1804 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1805 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1806 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1812 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1814 kvm_mmu_flush_tlb(vcpu
);
1817 struct mmu_page_path
{
1818 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1819 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1822 #define for_each_sp(pvec, sp, parents, i) \
1823 for (i = mmu_pages_next(&pvec, &parents, -1), \
1824 sp = pvec.page[i].sp; \
1825 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1826 i = mmu_pages_next(&pvec, &parents, i))
1828 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1829 struct mmu_page_path
*parents
,
1834 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1835 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1837 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1838 parents
->idx
[0] = pvec
->page
[n
].idx
;
1842 parents
->parent
[sp
->role
.level
-2] = sp
;
1843 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1849 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1851 struct kvm_mmu_page
*sp
;
1852 unsigned int level
= 0;
1855 unsigned int idx
= parents
->idx
[level
];
1857 sp
= parents
->parent
[level
];
1861 --sp
->unsync_children
;
1862 WARN_ON((int)sp
->unsync_children
< 0);
1863 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1865 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
1868 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
1869 struct mmu_page_path
*parents
,
1870 struct kvm_mmu_pages
*pvec
)
1872 parents
->parent
[parent
->role
.level
-1] = NULL
;
1876 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1877 struct kvm_mmu_page
*parent
)
1880 struct kvm_mmu_page
*sp
;
1881 struct mmu_page_path parents
;
1882 struct kvm_mmu_pages pages
;
1883 LIST_HEAD(invalid_list
);
1885 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1886 while (mmu_unsync_walk(parent
, &pages
)) {
1887 bool protected = false;
1889 for_each_sp(pages
, sp
, parents
, i
)
1890 protected |= rmap_write_protect(vcpu
->kvm
, sp
->gfn
);
1893 kvm_flush_remote_tlbs(vcpu
->kvm
);
1895 for_each_sp(pages
, sp
, parents
, i
) {
1896 kvm_sync_page(vcpu
, sp
, &invalid_list
);
1897 mmu_pages_clear_parents(&parents
);
1899 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1900 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
1901 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1905 static void init_shadow_page_table(struct kvm_mmu_page
*sp
)
1909 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
1913 static void __clear_sp_write_flooding_count(struct kvm_mmu_page
*sp
)
1915 sp
->write_flooding_count
= 0;
1918 static void clear_sp_write_flooding_count(u64
*spte
)
1920 struct kvm_mmu_page
*sp
= page_header(__pa(spte
));
1922 __clear_sp_write_flooding_count(sp
);
1925 static bool is_obsolete_sp(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1927 return unlikely(sp
->mmu_valid_gen
!= kvm
->arch
.mmu_valid_gen
);
1930 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
1938 union kvm_mmu_page_role role
;
1940 struct kvm_mmu_page
*sp
;
1941 bool need_sync
= false;
1943 role
= vcpu
->arch
.mmu
.base_role
;
1945 role
.direct
= direct
;
1948 role
.access
= access
;
1949 if (!vcpu
->arch
.mmu
.direct_map
1950 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
1951 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
1952 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
1953 role
.quadrant
= quadrant
;
1955 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
) {
1956 if (is_obsolete_sp(vcpu
->kvm
, sp
))
1959 if (!need_sync
&& sp
->unsync
)
1962 if (sp
->role
.word
!= role
.word
)
1965 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
1968 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1969 if (sp
->unsync_children
) {
1970 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1971 kvm_mmu_mark_parents_unsync(sp
);
1972 } else if (sp
->unsync
)
1973 kvm_mmu_mark_parents_unsync(sp
);
1975 __clear_sp_write_flooding_count(sp
);
1976 trace_kvm_mmu_get_page(sp
, false);
1979 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
1980 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
1985 hlist_add_head(&sp
->hash_link
,
1986 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
1988 if (rmap_write_protect(vcpu
->kvm
, gfn
))
1989 kvm_flush_remote_tlbs(vcpu
->kvm
);
1990 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
1991 kvm_sync_pages(vcpu
, gfn
);
1993 account_shadowed(vcpu
->kvm
, gfn
);
1995 sp
->mmu_valid_gen
= vcpu
->kvm
->arch
.mmu_valid_gen
;
1996 init_shadow_page_table(sp
);
1997 trace_kvm_mmu_get_page(sp
, true);
2001 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
2002 struct kvm_vcpu
*vcpu
, u64 addr
)
2004 iterator
->addr
= addr
;
2005 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
2006 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
2008 if (iterator
->level
== PT64_ROOT_LEVEL
&&
2009 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
2010 !vcpu
->arch
.mmu
.direct_map
)
2013 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
2014 iterator
->shadow_addr
2015 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
2016 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
2018 if (!iterator
->shadow_addr
)
2019 iterator
->level
= 0;
2023 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
2025 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
2028 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
2029 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
2033 static void __shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
,
2036 if (is_last_spte(spte
, iterator
->level
)) {
2037 iterator
->level
= 0;
2041 iterator
->shadow_addr
= spte
& PT64_BASE_ADDR_MASK
;
2045 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
2047 return __shadow_walk_next(iterator
, *iterator
->sptep
);
2050 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
, bool accessed
)
2054 BUILD_BUG_ON(VMX_EPT_READABLE_MASK
!= PT_PRESENT_MASK
||
2055 VMX_EPT_WRITABLE_MASK
!= PT_WRITABLE_MASK
);
2057 spte
= __pa(sp
->spt
) | PT_PRESENT_MASK
| PT_WRITABLE_MASK
|
2058 shadow_user_mask
| shadow_x_mask
;
2061 spte
|= shadow_accessed_mask
;
2063 mmu_spte_set(sptep
, spte
);
2066 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2067 unsigned direct_access
)
2069 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
2070 struct kvm_mmu_page
*child
;
2073 * For the direct sp, if the guest pte's dirty bit
2074 * changed form clean to dirty, it will corrupt the
2075 * sp's access: allow writable in the read-only sp,
2076 * so we should update the spte at this point to get
2077 * a new sp with the correct access.
2079 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
2080 if (child
->role
.access
== direct_access
)
2083 drop_parent_pte(child
, sptep
);
2084 kvm_flush_remote_tlbs(vcpu
->kvm
);
2088 static bool mmu_page_zap_pte(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2092 struct kvm_mmu_page
*child
;
2095 if (is_shadow_present_pte(pte
)) {
2096 if (is_last_spte(pte
, sp
->role
.level
)) {
2097 drop_spte(kvm
, spte
);
2098 if (is_large_pte(pte
))
2101 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2102 drop_parent_pte(child
, spte
);
2107 if (is_mmio_spte(pte
))
2108 mmu_spte_clear_no_track(spte
);
2113 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
2114 struct kvm_mmu_page
*sp
)
2118 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2119 mmu_page_zap_pte(kvm
, sp
, sp
->spt
+ i
);
2122 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
2124 mmu_page_remove_parent_pte(sp
, parent_pte
);
2127 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2130 struct rmap_iterator iter
;
2132 while ((sptep
= rmap_get_first(sp
->parent_ptes
, &iter
)))
2133 drop_parent_pte(sp
, sptep
);
2136 static int mmu_zap_unsync_children(struct kvm
*kvm
,
2137 struct kvm_mmu_page
*parent
,
2138 struct list_head
*invalid_list
)
2141 struct mmu_page_path parents
;
2142 struct kvm_mmu_pages pages
;
2144 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
2147 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2148 while (mmu_unsync_walk(parent
, &pages
)) {
2149 struct kvm_mmu_page
*sp
;
2151 for_each_sp(pages
, sp
, parents
, i
) {
2152 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2153 mmu_pages_clear_parents(&parents
);
2156 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2162 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2163 struct list_head
*invalid_list
)
2167 trace_kvm_mmu_prepare_zap_page(sp
);
2168 ++kvm
->stat
.mmu_shadow_zapped
;
2169 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
2170 kvm_mmu_page_unlink_children(kvm
, sp
);
2171 kvm_mmu_unlink_parents(kvm
, sp
);
2173 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
2174 unaccount_shadowed(kvm
, sp
->gfn
);
2177 kvm_unlink_unsync_page(kvm
, sp
);
2178 if (!sp
->root_count
) {
2181 list_move(&sp
->link
, invalid_list
);
2182 kvm_mod_used_mmu_pages(kvm
, -1);
2184 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
2187 * The obsolete pages can not be used on any vcpus.
2188 * See the comments in kvm_mmu_invalidate_zap_all_pages().
2190 if (!sp
->role
.invalid
&& !is_obsolete_sp(kvm
, sp
))
2191 kvm_reload_remote_mmus(kvm
);
2194 sp
->role
.invalid
= 1;
2198 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
2199 struct list_head
*invalid_list
)
2201 struct kvm_mmu_page
*sp
, *nsp
;
2203 if (list_empty(invalid_list
))
2207 * wmb: make sure everyone sees our modifications to the page tables
2208 * rmb: make sure we see changes to vcpu->mode
2213 * Wait for all vcpus to exit guest mode and/or lockless shadow
2216 kvm_flush_remote_tlbs(kvm
);
2218 list_for_each_entry_safe(sp
, nsp
, invalid_list
, link
) {
2219 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
2220 kvm_mmu_free_page(sp
);
2224 static bool prepare_zap_oldest_mmu_page(struct kvm
*kvm
,
2225 struct list_head
*invalid_list
)
2227 struct kvm_mmu_page
*sp
;
2229 if (list_empty(&kvm
->arch
.active_mmu_pages
))
2232 sp
= list_entry(kvm
->arch
.active_mmu_pages
.prev
,
2233 struct kvm_mmu_page
, link
);
2234 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2240 * Changing the number of mmu pages allocated to the vm
2241 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2243 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
2245 LIST_HEAD(invalid_list
);
2247 spin_lock(&kvm
->mmu_lock
);
2249 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
2250 /* Need to free some mmu pages to achieve the goal. */
2251 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
)
2252 if (!prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
2255 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2256 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
2259 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
2261 spin_unlock(&kvm
->mmu_lock
);
2264 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
2266 struct kvm_mmu_page
*sp
;
2267 LIST_HEAD(invalid_list
);
2270 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
2272 spin_lock(&kvm
->mmu_lock
);
2273 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
) {
2274 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
2277 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
2279 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2280 spin_unlock(&kvm
->mmu_lock
);
2284 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page
);
2287 * The function is based on mtrr_type_lookup() in
2288 * arch/x86/kernel/cpu/mtrr/generic.c
2290 static int get_mtrr_type(struct mtrr_state_type
*mtrr_state
,
2295 u8 prev_match
, curr_match
;
2296 int num_var_ranges
= KVM_NR_VAR_MTRR
;
2298 if (!mtrr_state
->enabled
)
2301 /* Make end inclusive end, instead of exclusive */
2304 /* Look in fixed ranges. Just return the type as per start */
2305 if (mtrr_state
->have_fixed
&& (start
< 0x100000)) {
2308 if (start
< 0x80000) {
2310 idx
+= (start
>> 16);
2311 return mtrr_state
->fixed_ranges
[idx
];
2312 } else if (start
< 0xC0000) {
2314 idx
+= ((start
- 0x80000) >> 14);
2315 return mtrr_state
->fixed_ranges
[idx
];
2316 } else if (start
< 0x1000000) {
2318 idx
+= ((start
- 0xC0000) >> 12);
2319 return mtrr_state
->fixed_ranges
[idx
];
2324 * Look in variable ranges
2325 * Look of multiple ranges matching this address and pick type
2326 * as per MTRR precedence
2328 if (!(mtrr_state
->enabled
& 2))
2329 return mtrr_state
->def_type
;
2332 for (i
= 0; i
< num_var_ranges
; ++i
) {
2333 unsigned short start_state
, end_state
;
2335 if (!(mtrr_state
->var_ranges
[i
].mask_lo
& (1 << 11)))
2338 base
= (((u64
)mtrr_state
->var_ranges
[i
].base_hi
) << 32) +
2339 (mtrr_state
->var_ranges
[i
].base_lo
& PAGE_MASK
);
2340 mask
= (((u64
)mtrr_state
->var_ranges
[i
].mask_hi
) << 32) +
2341 (mtrr_state
->var_ranges
[i
].mask_lo
& PAGE_MASK
);
2343 start_state
= ((start
& mask
) == (base
& mask
));
2344 end_state
= ((end
& mask
) == (base
& mask
));
2345 if (start_state
!= end_state
)
2348 if ((start
& mask
) != (base
& mask
))
2351 curr_match
= mtrr_state
->var_ranges
[i
].base_lo
& 0xff;
2352 if (prev_match
== 0xFF) {
2353 prev_match
= curr_match
;
2357 if (prev_match
== MTRR_TYPE_UNCACHABLE
||
2358 curr_match
== MTRR_TYPE_UNCACHABLE
)
2359 return MTRR_TYPE_UNCACHABLE
;
2361 if ((prev_match
== MTRR_TYPE_WRBACK
&&
2362 curr_match
== MTRR_TYPE_WRTHROUGH
) ||
2363 (prev_match
== MTRR_TYPE_WRTHROUGH
&&
2364 curr_match
== MTRR_TYPE_WRBACK
)) {
2365 prev_match
= MTRR_TYPE_WRTHROUGH
;
2366 curr_match
= MTRR_TYPE_WRTHROUGH
;
2369 if (prev_match
!= curr_match
)
2370 return MTRR_TYPE_UNCACHABLE
;
2373 if (prev_match
!= 0xFF)
2376 return mtrr_state
->def_type
;
2379 u8
kvm_get_guest_memory_type(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2383 mtrr
= get_mtrr_type(&vcpu
->arch
.mtrr_state
, gfn
<< PAGE_SHIFT
,
2384 (gfn
<< PAGE_SHIFT
) + PAGE_SIZE
);
2385 if (mtrr
== 0xfe || mtrr
== 0xff)
2386 mtrr
= MTRR_TYPE_WRBACK
;
2389 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type
);
2391 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
2393 trace_kvm_mmu_unsync_page(sp
);
2394 ++vcpu
->kvm
->stat
.mmu_unsync
;
2397 kvm_mmu_mark_parents_unsync(sp
);
2400 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2402 struct kvm_mmu_page
*s
;
2404 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2407 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
2408 __kvm_unsync_page(vcpu
, s
);
2412 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2415 struct kvm_mmu_page
*s
;
2416 bool need_unsync
= false;
2418 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2422 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
2429 kvm_unsync_pages(vcpu
, gfn
);
2433 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2434 unsigned pte_access
, int level
,
2435 gfn_t gfn
, pfn_t pfn
, bool speculative
,
2436 bool can_unsync
, bool host_writable
)
2441 if (set_mmio_spte(vcpu
->kvm
, sptep
, gfn
, pfn
, pte_access
))
2444 spte
= PT_PRESENT_MASK
;
2446 spte
|= shadow_accessed_mask
;
2448 if (pte_access
& ACC_EXEC_MASK
)
2449 spte
|= shadow_x_mask
;
2451 spte
|= shadow_nx_mask
;
2453 if (pte_access
& ACC_USER_MASK
)
2454 spte
|= shadow_user_mask
;
2456 if (level
> PT_PAGE_TABLE_LEVEL
)
2457 spte
|= PT_PAGE_SIZE_MASK
;
2459 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
2460 kvm_is_mmio_pfn(pfn
));
2463 spte
|= SPTE_HOST_WRITEABLE
;
2465 pte_access
&= ~ACC_WRITE_MASK
;
2467 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
2469 if (pte_access
& ACC_WRITE_MASK
) {
2472 * Other vcpu creates new sp in the window between
2473 * mapping_level() and acquiring mmu-lock. We can
2474 * allow guest to retry the access, the mapping can
2475 * be fixed if guest refault.
2477 if (level
> PT_PAGE_TABLE_LEVEL
&&
2478 has_wrprotected_page(vcpu
->kvm
, gfn
, level
))
2481 spte
|= PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
;
2484 * Optimization: for pte sync, if spte was writable the hash
2485 * lookup is unnecessary (and expensive). Write protection
2486 * is responsibility of mmu_get_page / kvm_sync_page.
2487 * Same reasoning can be applied to dirty page accounting.
2489 if (!can_unsync
&& is_writable_pte(*sptep
))
2492 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2493 pgprintk("%s: found shadow page for %llx, marking ro\n",
2496 pte_access
&= ~ACC_WRITE_MASK
;
2497 spte
&= ~(PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
);
2501 if (pte_access
& ACC_WRITE_MASK
)
2502 mark_page_dirty(vcpu
->kvm
, gfn
);
2505 if (mmu_spte_update(sptep
, spte
))
2506 kvm_flush_remote_tlbs(vcpu
->kvm
);
2511 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2512 unsigned pte_access
, int write_fault
, int *emulate
,
2513 int level
, gfn_t gfn
, pfn_t pfn
, bool speculative
,
2516 int was_rmapped
= 0;
2519 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__
,
2520 *sptep
, write_fault
, gfn
);
2522 if (is_rmap_spte(*sptep
)) {
2524 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2525 * the parent of the now unreachable PTE.
2527 if (level
> PT_PAGE_TABLE_LEVEL
&&
2528 !is_large_pte(*sptep
)) {
2529 struct kvm_mmu_page
*child
;
2532 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2533 drop_parent_pte(child
, sptep
);
2534 kvm_flush_remote_tlbs(vcpu
->kvm
);
2535 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2536 pgprintk("hfn old %llx new %llx\n",
2537 spte_to_pfn(*sptep
), pfn
);
2538 drop_spte(vcpu
->kvm
, sptep
);
2539 kvm_flush_remote_tlbs(vcpu
->kvm
);
2544 if (set_spte(vcpu
, sptep
, pte_access
, level
, gfn
, pfn
, speculative
,
2545 true, host_writable
)) {
2548 kvm_mmu_flush_tlb(vcpu
);
2551 if (unlikely(is_mmio_spte(*sptep
) && emulate
))
2554 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2555 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2556 is_large_pte(*sptep
)? "2MB" : "4kB",
2557 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2559 if (!was_rmapped
&& is_large_pte(*sptep
))
2560 ++vcpu
->kvm
->stat
.lpages
;
2562 if (is_shadow_present_pte(*sptep
)) {
2564 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2565 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2566 rmap_recycle(vcpu
, sptep
, gfn
);
2570 kvm_release_pfn_clean(pfn
);
2573 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2576 struct kvm_memory_slot
*slot
;
2578 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2580 return KVM_PFN_ERR_FAULT
;
2582 return gfn_to_pfn_memslot_atomic(slot
, gfn
);
2585 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2586 struct kvm_mmu_page
*sp
,
2587 u64
*start
, u64
*end
)
2589 struct page
*pages
[PTE_PREFETCH_NUM
];
2590 unsigned access
= sp
->role
.access
;
2594 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2595 if (!gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
))
2598 ret
= gfn_to_page_many_atomic(vcpu
->kvm
, gfn
, pages
, end
- start
);
2602 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2603 mmu_set_spte(vcpu
, start
, access
, 0, NULL
,
2604 sp
->role
.level
, gfn
, page_to_pfn(pages
[i
]),
2610 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2611 struct kvm_mmu_page
*sp
, u64
*sptep
)
2613 u64
*spte
, *start
= NULL
;
2616 WARN_ON(!sp
->role
.direct
);
2618 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2621 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2622 if (is_shadow_present_pte(*spte
) || spte
== sptep
) {
2625 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2633 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2635 struct kvm_mmu_page
*sp
;
2638 * Since it's no accessed bit on EPT, it's no way to
2639 * distinguish between actually accessed translations
2640 * and prefetched, so disable pte prefetch if EPT is
2643 if (!shadow_accessed_mask
)
2646 sp
= page_header(__pa(sptep
));
2647 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2650 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2653 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2654 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2657 struct kvm_shadow_walk_iterator iterator
;
2658 struct kvm_mmu_page
*sp
;
2662 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2665 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2666 if (iterator
.level
== level
) {
2667 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
,
2668 write
, &emulate
, level
, gfn
, pfn
,
2669 prefault
, map_writable
);
2670 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2671 ++vcpu
->stat
.pf_fixed
;
2675 drop_large_spte(vcpu
, iterator
.sptep
);
2676 if (!is_shadow_present_pte(*iterator
.sptep
)) {
2677 u64 base_addr
= iterator
.addr
;
2679 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2680 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2681 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2683 1, ACC_ALL
, iterator
.sptep
);
2685 link_shadow_page(iterator
.sptep
, sp
, true);
2691 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2695 info
.si_signo
= SIGBUS
;
2697 info
.si_code
= BUS_MCEERR_AR
;
2698 info
.si_addr
= (void __user
*)address
;
2699 info
.si_addr_lsb
= PAGE_SHIFT
;
2701 send_sig_info(SIGBUS
, &info
, tsk
);
2704 static int kvm_handle_bad_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
, pfn_t pfn
)
2707 * Do not cache the mmio info caused by writing the readonly gfn
2708 * into the spte otherwise read access on readonly gfn also can
2709 * caused mmio page fault and treat it as mmio access.
2710 * Return 1 to tell kvm to emulate it.
2712 if (pfn
== KVM_PFN_ERR_RO_FAULT
)
2715 if (pfn
== KVM_PFN_ERR_HWPOISON
) {
2716 kvm_send_hwpoison_signal(gfn_to_hva(vcpu
->kvm
, gfn
), current
);
2723 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2724 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2728 int level
= *levelp
;
2731 * Check if it's a transparent hugepage. If this would be an
2732 * hugetlbfs page, level wouldn't be set to
2733 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2736 if (!is_error_noslot_pfn(pfn
) && !kvm_is_mmio_pfn(pfn
) &&
2737 level
== PT_PAGE_TABLE_LEVEL
&&
2738 PageTransCompound(pfn_to_page(pfn
)) &&
2739 !has_wrprotected_page(vcpu
->kvm
, gfn
, PT_DIRECTORY_LEVEL
)) {
2742 * mmu_notifier_retry was successful and we hold the
2743 * mmu_lock here, so the pmd can't become splitting
2744 * from under us, and in turn
2745 * __split_huge_page_refcount() can't run from under
2746 * us and we can safely transfer the refcount from
2747 * PG_tail to PG_head as we switch the pfn to tail to
2750 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2751 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2752 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2756 kvm_release_pfn_clean(pfn
);
2764 static bool handle_abnormal_pfn(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
,
2765 pfn_t pfn
, unsigned access
, int *ret_val
)
2769 /* The pfn is invalid, report the error! */
2770 if (unlikely(is_error_pfn(pfn
))) {
2771 *ret_val
= kvm_handle_bad_page(vcpu
, gfn
, pfn
);
2775 if (unlikely(is_noslot_pfn(pfn
)))
2776 vcpu_cache_mmio_info(vcpu
, gva
, gfn
, access
);
2783 static bool page_fault_can_be_fast(u32 error_code
)
2786 * Do not fix the mmio spte with invalid generation number which
2787 * need to be updated by slow page fault path.
2789 if (unlikely(error_code
& PFERR_RSVD_MASK
))
2793 * #PF can be fast only if the shadow page table is present and it
2794 * is caused by write-protect, that means we just need change the
2795 * W bit of the spte which can be done out of mmu-lock.
2797 if (!(error_code
& PFERR_PRESENT_MASK
) ||
2798 !(error_code
& PFERR_WRITE_MASK
))
2805 fast_pf_fix_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, u64 spte
)
2807 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
2810 WARN_ON(!sp
->role
.direct
);
2813 * The gfn of direct spte is stable since it is calculated
2816 gfn
= kvm_mmu_page_get_gfn(sp
, sptep
- sp
->spt
);
2818 if (cmpxchg64(sptep
, spte
, spte
| PT_WRITABLE_MASK
) == spte
)
2819 mark_page_dirty(vcpu
->kvm
, gfn
);
2826 * - true: let the vcpu to access on the same address again.
2827 * - false: let the real page fault path to fix it.
2829 static bool fast_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
, int level
,
2832 struct kvm_shadow_walk_iterator iterator
;
2836 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2839 if (!page_fault_can_be_fast(error_code
))
2842 walk_shadow_page_lockless_begin(vcpu
);
2843 for_each_shadow_entry_lockless(vcpu
, gva
, iterator
, spte
)
2844 if (!is_shadow_present_pte(spte
) || iterator
.level
< level
)
2848 * If the mapping has been changed, let the vcpu fault on the
2849 * same address again.
2851 if (!is_rmap_spte(spte
)) {
2856 if (!is_last_spte(spte
, level
))
2860 * Check if it is a spurious fault caused by TLB lazily flushed.
2862 * Need not check the access of upper level table entries since
2863 * they are always ACC_ALL.
2865 if (is_writable_pte(spte
)) {
2871 * Currently, to simplify the code, only the spte write-protected
2872 * by dirty-log can be fast fixed.
2874 if (!spte_is_locklessly_modifiable(spte
))
2878 * Currently, fast page fault only works for direct mapping since
2879 * the gfn is not stable for indirect shadow page.
2880 * See Documentation/virtual/kvm/locking.txt to get more detail.
2882 ret
= fast_pf_fix_direct_spte(vcpu
, iterator
.sptep
, spte
);
2884 trace_fast_page_fault(vcpu
, gva
, error_code
, iterator
.sptep
,
2886 walk_shadow_page_lockless_end(vcpu
);
2891 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2892 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
2893 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
);
2895 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, u32 error_code
,
2896 gfn_t gfn
, bool prefault
)
2902 unsigned long mmu_seq
;
2903 bool map_writable
, write
= error_code
& PFERR_WRITE_MASK
;
2905 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2906 if (likely(!force_pt_level
)) {
2907 level
= mapping_level(vcpu
, gfn
);
2909 * This path builds a PAE pagetable - so we can map
2910 * 2mb pages at maximum. Therefore check if the level
2911 * is larger than that.
2913 if (level
> PT_DIRECTORY_LEVEL
)
2914 level
= PT_DIRECTORY_LEVEL
;
2916 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2918 level
= PT_PAGE_TABLE_LEVEL
;
2920 if (fast_page_fault(vcpu
, v
, level
, error_code
))
2923 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2926 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
2929 if (handle_abnormal_pfn(vcpu
, v
, gfn
, pfn
, ACC_ALL
, &r
))
2932 spin_lock(&vcpu
->kvm
->mmu_lock
);
2933 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
2935 make_mmu_pages_available(vcpu
);
2936 if (likely(!force_pt_level
))
2937 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2938 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
2940 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2946 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2947 kvm_release_pfn_clean(pfn
);
2952 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
2955 struct kvm_mmu_page
*sp
;
2956 LIST_HEAD(invalid_list
);
2958 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2961 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
2962 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
2963 vcpu
->arch
.mmu
.direct_map
)) {
2964 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2966 spin_lock(&vcpu
->kvm
->mmu_lock
);
2967 sp
= page_header(root
);
2969 if (!sp
->root_count
&& sp
->role
.invalid
) {
2970 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
2971 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2973 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2974 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2978 spin_lock(&vcpu
->kvm
->mmu_lock
);
2979 for (i
= 0; i
< 4; ++i
) {
2980 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2983 root
&= PT64_BASE_ADDR_MASK
;
2984 sp
= page_header(root
);
2986 if (!sp
->root_count
&& sp
->role
.invalid
)
2987 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
2990 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
2992 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2993 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2994 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2997 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
3001 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
3002 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3009 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
3011 struct kvm_mmu_page
*sp
;
3014 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3015 spin_lock(&vcpu
->kvm
->mmu_lock
);
3016 make_mmu_pages_available(vcpu
);
3017 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
3020 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3021 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
3022 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
3023 for (i
= 0; i
< 4; ++i
) {
3024 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3026 ASSERT(!VALID_PAGE(root
));
3027 spin_lock(&vcpu
->kvm
->mmu_lock
);
3028 make_mmu_pages_available(vcpu
);
3029 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
3031 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
3033 root
= __pa(sp
->spt
);
3035 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3036 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
3038 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3045 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
3047 struct kvm_mmu_page
*sp
;
3052 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
3054 if (mmu_check_root(vcpu
, root_gfn
))
3058 * Do we shadow a long mode page table? If so we need to
3059 * write-protect the guests page table root.
3061 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3062 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3064 ASSERT(!VALID_PAGE(root
));
3066 spin_lock(&vcpu
->kvm
->mmu_lock
);
3067 make_mmu_pages_available(vcpu
);
3068 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
3070 root
= __pa(sp
->spt
);
3072 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3073 vcpu
->arch
.mmu
.root_hpa
= root
;
3078 * We shadow a 32 bit page table. This may be a legacy 2-level
3079 * or a PAE 3-level page table. In either case we need to be aware that
3080 * the shadow page table may be a PAE or a long mode page table.
3082 pm_mask
= PT_PRESENT_MASK
;
3083 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
3084 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
3086 for (i
= 0; i
< 4; ++i
) {
3087 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3089 ASSERT(!VALID_PAGE(root
));
3090 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
3091 pdptr
= vcpu
->arch
.mmu
.get_pdptr(vcpu
, i
);
3092 if (!is_present_gpte(pdptr
)) {
3093 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
3096 root_gfn
= pdptr
>> PAGE_SHIFT
;
3097 if (mmu_check_root(vcpu
, root_gfn
))
3100 spin_lock(&vcpu
->kvm
->mmu_lock
);
3101 make_mmu_pages_available(vcpu
);
3102 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
3105 root
= __pa(sp
->spt
);
3107 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3109 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
3111 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3114 * If we shadow a 32 bit page table with a long mode page
3115 * table we enter this path.
3117 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3118 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
3120 * The additional page necessary for this is only
3121 * allocated on demand.
3126 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
3127 if (lm_root
== NULL
)
3130 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
3132 vcpu
->arch
.mmu
.lm_root
= lm_root
;
3135 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
3141 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
3143 if (vcpu
->arch
.mmu
.direct_map
)
3144 return mmu_alloc_direct_roots(vcpu
);
3146 return mmu_alloc_shadow_roots(vcpu
);
3149 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3152 struct kvm_mmu_page
*sp
;
3154 if (vcpu
->arch
.mmu
.direct_map
)
3157 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3160 vcpu_clear_mmio_info(vcpu
, ~0ul);
3161 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3162 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3163 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3164 sp
= page_header(root
);
3165 mmu_sync_children(vcpu
, sp
);
3166 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3169 for (i
= 0; i
< 4; ++i
) {
3170 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3172 if (root
&& VALID_PAGE(root
)) {
3173 root
&= PT64_BASE_ADDR_MASK
;
3174 sp
= page_header(root
);
3175 mmu_sync_children(vcpu
, sp
);
3178 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3181 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3183 spin_lock(&vcpu
->kvm
->mmu_lock
);
3184 mmu_sync_roots(vcpu
);
3185 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3187 EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots
);
3189 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3190 u32 access
, struct x86_exception
*exception
)
3193 exception
->error_code
= 0;
3197 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3199 struct x86_exception
*exception
)
3202 exception
->error_code
= 0;
3203 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
);
3206 static bool quickly_check_mmio_pf(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3209 return vcpu_match_mmio_gpa(vcpu
, addr
);
3211 return vcpu_match_mmio_gva(vcpu
, addr
);
3216 * On direct hosts, the last spte is only allows two states
3217 * for mmio page fault:
3218 * - It is the mmio spte
3219 * - It is zapped or it is being zapped.
3221 * This function completely checks the spte when the last spte
3222 * is not the mmio spte.
3224 static bool check_direct_spte_mmio_pf(u64 spte
)
3226 return __check_direct_spte_mmio_pf(spte
);
3229 static u64
walk_shadow_page_get_mmio_spte(struct kvm_vcpu
*vcpu
, u64 addr
)
3231 struct kvm_shadow_walk_iterator iterator
;
3234 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3237 walk_shadow_page_lockless_begin(vcpu
);
3238 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
)
3239 if (!is_shadow_present_pte(spte
))
3241 walk_shadow_page_lockless_end(vcpu
);
3246 int handle_mmio_page_fault_common(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3250 if (quickly_check_mmio_pf(vcpu
, addr
, direct
))
3251 return RET_MMIO_PF_EMULATE
;
3253 spte
= walk_shadow_page_get_mmio_spte(vcpu
, addr
);
3255 if (is_mmio_spte(spte
)) {
3256 gfn_t gfn
= get_mmio_spte_gfn(spte
);
3257 unsigned access
= get_mmio_spte_access(spte
);
3259 if (!check_mmio_spte(vcpu
->kvm
, spte
))
3260 return RET_MMIO_PF_INVALID
;
3265 trace_handle_mmio_page_fault(addr
, gfn
, access
);
3266 vcpu_cache_mmio_info(vcpu
, addr
, gfn
, access
);
3267 return RET_MMIO_PF_EMULATE
;
3271 * It's ok if the gva is remapped by other cpus on shadow guest,
3272 * it's a BUG if the gfn is not a mmio page.
3274 if (direct
&& !check_direct_spte_mmio_pf(spte
))
3275 return RET_MMIO_PF_BUG
;
3278 * If the page table is zapped by other cpus, let CPU fault again on
3281 return RET_MMIO_PF_RETRY
;
3283 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common
);
3285 static int handle_mmio_page_fault(struct kvm_vcpu
*vcpu
, u64 addr
,
3286 u32 error_code
, bool direct
)
3290 ret
= handle_mmio_page_fault_common(vcpu
, addr
, direct
);
3291 WARN_ON(ret
== RET_MMIO_PF_BUG
);
3295 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
3296 u32 error_code
, bool prefault
)
3301 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
3303 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3304 r
= handle_mmio_page_fault(vcpu
, gva
, error_code
, true);
3306 if (likely(r
!= RET_MMIO_PF_INVALID
))
3310 r
= mmu_topup_memory_caches(vcpu
);
3315 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3317 gfn
= gva
>> PAGE_SHIFT
;
3319 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
3320 error_code
, gfn
, prefault
);
3323 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
3325 struct kvm_arch_async_pf arch
;
3327 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
3329 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
3330 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
3332 return kvm_setup_async_pf(vcpu
, gva
, gfn
, &arch
);
3335 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
3337 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
) ||
3338 kvm_event_needs_reinjection(vcpu
)))
3341 return kvm_x86_ops
->interrupt_allowed(vcpu
);
3344 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3345 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
3349 *pfn
= gfn_to_pfn_async(vcpu
->kvm
, gfn
, &async
, write
, writable
);
3352 return false; /* *pfn has correct page already */
3354 if (!prefault
&& can_do_async_pf(vcpu
)) {
3355 trace_kvm_try_async_get_page(gva
, gfn
);
3356 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
3357 trace_kvm_async_pf_doublefault(gva
, gfn
);
3358 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
3360 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
3364 *pfn
= gfn_to_pfn_prot(vcpu
->kvm
, gfn
, write
, writable
);
3369 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
3376 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3377 unsigned long mmu_seq
;
3378 int write
= error_code
& PFERR_WRITE_MASK
;
3382 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3384 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3385 r
= handle_mmio_page_fault(vcpu
, gpa
, error_code
, true);
3387 if (likely(r
!= RET_MMIO_PF_INVALID
))
3391 r
= mmu_topup_memory_caches(vcpu
);
3395 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
3396 if (likely(!force_pt_level
)) {
3397 level
= mapping_level(vcpu
, gfn
);
3398 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
3400 level
= PT_PAGE_TABLE_LEVEL
;
3402 if (fast_page_fault(vcpu
, gpa
, level
, error_code
))
3405 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3408 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
3411 if (handle_abnormal_pfn(vcpu
, 0, gfn
, pfn
, ACC_ALL
, &r
))
3414 spin_lock(&vcpu
->kvm
->mmu_lock
);
3415 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3417 make_mmu_pages_available(vcpu
);
3418 if (likely(!force_pt_level
))
3419 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3420 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
3421 level
, gfn
, pfn
, prefault
);
3422 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3427 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3428 kvm_release_pfn_clean(pfn
);
3432 static void nonpaging_init_context(struct kvm_vcpu
*vcpu
,
3433 struct kvm_mmu
*context
)
3435 context
->page_fault
= nonpaging_page_fault
;
3436 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3437 context
->sync_page
= nonpaging_sync_page
;
3438 context
->invlpg
= nonpaging_invlpg
;
3439 context
->update_pte
= nonpaging_update_pte
;
3440 context
->root_level
= 0;
3441 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3442 context
->root_hpa
= INVALID_PAGE
;
3443 context
->direct_map
= true;
3444 context
->nx
= false;
3447 void kvm_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
3449 ++vcpu
->stat
.tlb_flush
;
3450 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
3452 EXPORT_SYMBOL_GPL(kvm_mmu_flush_tlb
);
3454 void kvm_mmu_new_cr3(struct kvm_vcpu
*vcpu
)
3456 mmu_free_roots(vcpu
);
3459 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
3461 return kvm_read_cr3(vcpu
);
3464 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
3465 struct x86_exception
*fault
)
3467 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
3470 static bool sync_mmio_spte(struct kvm
*kvm
, u64
*sptep
, gfn_t gfn
,
3471 unsigned access
, int *nr_present
)
3473 if (unlikely(is_mmio_spte(*sptep
))) {
3474 if (gfn
!= get_mmio_spte_gfn(*sptep
)) {
3475 mmu_spte_clear_no_track(sptep
);
3480 mark_mmio_spte(kvm
, sptep
, gfn
, access
);
3487 static inline bool is_last_gpte(struct kvm_mmu
*mmu
, unsigned level
, unsigned gpte
)
3492 index
|= (gpte
& PT_PAGE_SIZE_MASK
) >> (PT_PAGE_SIZE_SHIFT
- 2);
3493 return mmu
->last_pte_bitmap
& (1 << index
);
3496 #define PTTYPE_EPT 18 /* arbitrary */
3497 #define PTTYPE PTTYPE_EPT
3498 #include "paging_tmpl.h"
3502 #include "paging_tmpl.h"
3506 #include "paging_tmpl.h"
3509 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
3510 struct kvm_mmu
*context
)
3512 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
3513 u64 exb_bit_rsvd
= 0;
3515 context
->bad_mt_xwr
= 0;
3518 exb_bit_rsvd
= rsvd_bits(63, 63);
3519 switch (context
->root_level
) {
3520 case PT32_ROOT_LEVEL
:
3521 /* no rsvd bits for 2 level 4K page table entries */
3522 context
->rsvd_bits_mask
[0][1] = 0;
3523 context
->rsvd_bits_mask
[0][0] = 0;
3524 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3526 if (!is_pse(vcpu
)) {
3527 context
->rsvd_bits_mask
[1][1] = 0;
3531 if (is_cpuid_PSE36())
3532 /* 36bits PSE 4MB page */
3533 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
3535 /* 32 bits PSE 4MB page */
3536 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
3538 case PT32E_ROOT_LEVEL
:
3539 context
->rsvd_bits_mask
[0][2] =
3540 rsvd_bits(maxphyaddr
, 63) |
3541 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
3542 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3543 rsvd_bits(maxphyaddr
, 62); /* PDE */
3544 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3545 rsvd_bits(maxphyaddr
, 62); /* PTE */
3546 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3547 rsvd_bits(maxphyaddr
, 62) |
3548 rsvd_bits(13, 20); /* large page */
3549 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3551 case PT64_ROOT_LEVEL
:
3552 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
3553 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
3554 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
3555 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
3556 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3557 rsvd_bits(maxphyaddr
, 51);
3558 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3559 rsvd_bits(maxphyaddr
, 51);
3560 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
3561 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
3562 rsvd_bits(maxphyaddr
, 51) |
3564 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3565 rsvd_bits(maxphyaddr
, 51) |
3566 rsvd_bits(13, 20); /* large page */
3567 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3572 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu
*vcpu
,
3573 struct kvm_mmu
*context
, bool execonly
)
3575 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
3578 context
->rsvd_bits_mask
[0][3] =
3579 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 7);
3580 context
->rsvd_bits_mask
[0][2] =
3581 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
3582 context
->rsvd_bits_mask
[0][1] =
3583 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(3, 6);
3584 context
->rsvd_bits_mask
[0][0] = rsvd_bits(maxphyaddr
, 51);
3587 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
3588 context
->rsvd_bits_mask
[1][2] =
3589 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 29);
3590 context
->rsvd_bits_mask
[1][1] =
3591 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(12, 20);
3592 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3594 for (pte
= 0; pte
< 64; pte
++) {
3595 int rwx_bits
= pte
& 7;
3597 if (mt
== 0x2 || mt
== 0x3 || mt
== 0x7 ||
3598 rwx_bits
== 0x2 || rwx_bits
== 0x6 ||
3599 (rwx_bits
== 0x4 && !execonly
))
3600 context
->bad_mt_xwr
|= (1ull << pte
);
3604 static void update_permission_bitmask(struct kvm_vcpu
*vcpu
,
3605 struct kvm_mmu
*mmu
, bool ept
)
3607 unsigned bit
, byte
, pfec
;
3609 bool fault
, x
, w
, u
, wf
, uf
, ff
, smep
;
3611 smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3612 for (byte
= 0; byte
< ARRAY_SIZE(mmu
->permissions
); ++byte
) {
3615 wf
= pfec
& PFERR_WRITE_MASK
;
3616 uf
= pfec
& PFERR_USER_MASK
;
3617 ff
= pfec
& PFERR_FETCH_MASK
;
3618 for (bit
= 0; bit
< 8; ++bit
) {
3619 x
= bit
& ACC_EXEC_MASK
;
3620 w
= bit
& ACC_WRITE_MASK
;
3621 u
= bit
& ACC_USER_MASK
;
3624 /* Not really needed: !nx will cause pte.nx to fault */
3626 /* Allow supervisor writes if !cr0.wp */
3627 w
|= !is_write_protection(vcpu
) && !uf
;
3628 /* Disallow supervisor fetches of user code if cr4.smep */
3629 x
&= !(smep
&& u
&& !uf
);
3631 /* Not really needed: no U/S accesses on ept */
3634 fault
= (ff
&& !x
) || (uf
&& !u
) || (wf
&& !w
);
3635 map
|= fault
<< bit
;
3637 mmu
->permissions
[byte
] = map
;
3641 static void update_last_pte_bitmap(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
3644 unsigned level
, root_level
= mmu
->root_level
;
3645 const unsigned ps_set_index
= 1 << 2; /* bit 2 of index: ps */
3647 if (root_level
== PT32E_ROOT_LEVEL
)
3649 /* PT_PAGE_TABLE_LEVEL always terminates */
3650 map
= 1 | (1 << ps_set_index
);
3651 for (level
= PT_DIRECTORY_LEVEL
; level
<= root_level
; ++level
) {
3652 if (level
<= PT_PDPE_LEVEL
3653 && (mmu
->root_level
>= PT32E_ROOT_LEVEL
|| is_pse(vcpu
)))
3654 map
|= 1 << (ps_set_index
| (level
- 1));
3656 mmu
->last_pte_bitmap
= map
;
3659 static void paging64_init_context_common(struct kvm_vcpu
*vcpu
,
3660 struct kvm_mmu
*context
,
3663 context
->nx
= is_nx(vcpu
);
3664 context
->root_level
= level
;
3666 reset_rsvds_bits_mask(vcpu
, context
);
3667 update_permission_bitmask(vcpu
, context
, false);
3668 update_last_pte_bitmap(vcpu
, context
);
3670 ASSERT(is_pae(vcpu
));
3671 context
->page_fault
= paging64_page_fault
;
3672 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3673 context
->sync_page
= paging64_sync_page
;
3674 context
->invlpg
= paging64_invlpg
;
3675 context
->update_pte
= paging64_update_pte
;
3676 context
->shadow_root_level
= level
;
3677 context
->root_hpa
= INVALID_PAGE
;
3678 context
->direct_map
= false;
3681 static void paging64_init_context(struct kvm_vcpu
*vcpu
,
3682 struct kvm_mmu
*context
)
3684 paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
3687 static void paging32_init_context(struct kvm_vcpu
*vcpu
,
3688 struct kvm_mmu
*context
)
3690 context
->nx
= false;
3691 context
->root_level
= PT32_ROOT_LEVEL
;
3693 reset_rsvds_bits_mask(vcpu
, context
);
3694 update_permission_bitmask(vcpu
, context
, false);
3695 update_last_pte_bitmap(vcpu
, context
);
3697 context
->page_fault
= paging32_page_fault
;
3698 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3699 context
->sync_page
= paging32_sync_page
;
3700 context
->invlpg
= paging32_invlpg
;
3701 context
->update_pte
= paging32_update_pte
;
3702 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3703 context
->root_hpa
= INVALID_PAGE
;
3704 context
->direct_map
= false;
3707 static void paging32E_init_context(struct kvm_vcpu
*vcpu
,
3708 struct kvm_mmu
*context
)
3710 paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
3713 static void init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
3715 struct kvm_mmu
*context
= vcpu
->arch
.walk_mmu
;
3717 context
->base_role
.word
= 0;
3718 context
->page_fault
= tdp_page_fault
;
3719 context
->sync_page
= nonpaging_sync_page
;
3720 context
->invlpg
= nonpaging_invlpg
;
3721 context
->update_pte
= nonpaging_update_pte
;
3722 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3723 context
->root_hpa
= INVALID_PAGE
;
3724 context
->direct_map
= true;
3725 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
3726 context
->get_cr3
= get_cr3
;
3727 context
->get_pdptr
= kvm_pdptr_read
;
3728 context
->inject_page_fault
= kvm_inject_page_fault
;
3730 if (!is_paging(vcpu
)) {
3731 context
->nx
= false;
3732 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3733 context
->root_level
= 0;
3734 } else if (is_long_mode(vcpu
)) {
3735 context
->nx
= is_nx(vcpu
);
3736 context
->root_level
= PT64_ROOT_LEVEL
;
3737 reset_rsvds_bits_mask(vcpu
, context
);
3738 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3739 } else if (is_pae(vcpu
)) {
3740 context
->nx
= is_nx(vcpu
);
3741 context
->root_level
= PT32E_ROOT_LEVEL
;
3742 reset_rsvds_bits_mask(vcpu
, context
);
3743 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3745 context
->nx
= false;
3746 context
->root_level
= PT32_ROOT_LEVEL
;
3747 reset_rsvds_bits_mask(vcpu
, context
);
3748 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3751 update_permission_bitmask(vcpu
, context
, false);
3752 update_last_pte_bitmap(vcpu
, context
);
3755 void kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
3757 bool smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3759 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3761 if (!is_paging(vcpu
))
3762 nonpaging_init_context(vcpu
, context
);
3763 else if (is_long_mode(vcpu
))
3764 paging64_init_context(vcpu
, context
);
3765 else if (is_pae(vcpu
))
3766 paging32E_init_context(vcpu
, context
);
3768 paging32_init_context(vcpu
, context
);
3770 vcpu
->arch
.mmu
.base_role
.nxe
= is_nx(vcpu
);
3771 vcpu
->arch
.mmu
.base_role
.cr4_pae
= !!is_pae(vcpu
);
3772 vcpu
->arch
.mmu
.base_role
.cr0_wp
= is_write_protection(vcpu
);
3773 vcpu
->arch
.mmu
.base_role
.smep_andnot_wp
3774 = smep
&& !is_write_protection(vcpu
);
3776 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
3778 void kvm_init_shadow_ept_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
,
3782 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3784 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3787 context
->page_fault
= ept_page_fault
;
3788 context
->gva_to_gpa
= ept_gva_to_gpa
;
3789 context
->sync_page
= ept_sync_page
;
3790 context
->invlpg
= ept_invlpg
;
3791 context
->update_pte
= ept_update_pte
;
3792 context
->root_level
= context
->shadow_root_level
;
3793 context
->root_hpa
= INVALID_PAGE
;
3794 context
->direct_map
= false;
3796 update_permission_bitmask(vcpu
, context
, true);
3797 reset_rsvds_bits_mask_ept(vcpu
, context
, execonly
);
3799 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu
);
3801 static void init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
3803 kvm_init_shadow_mmu(vcpu
, vcpu
->arch
.walk_mmu
);
3804 vcpu
->arch
.walk_mmu
->set_cr3
= kvm_x86_ops
->set_cr3
;
3805 vcpu
->arch
.walk_mmu
->get_cr3
= get_cr3
;
3806 vcpu
->arch
.walk_mmu
->get_pdptr
= kvm_pdptr_read
;
3807 vcpu
->arch
.walk_mmu
->inject_page_fault
= kvm_inject_page_fault
;
3810 static void init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
3812 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
3814 g_context
->get_cr3
= get_cr3
;
3815 g_context
->get_pdptr
= kvm_pdptr_read
;
3816 g_context
->inject_page_fault
= kvm_inject_page_fault
;
3819 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3820 * translation of l2_gpa to l1_gpa addresses is done using the
3821 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3822 * functions between mmu and nested_mmu are swapped.
3824 if (!is_paging(vcpu
)) {
3825 g_context
->nx
= false;
3826 g_context
->root_level
= 0;
3827 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
3828 } else if (is_long_mode(vcpu
)) {
3829 g_context
->nx
= is_nx(vcpu
);
3830 g_context
->root_level
= PT64_ROOT_LEVEL
;
3831 reset_rsvds_bits_mask(vcpu
, g_context
);
3832 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3833 } else if (is_pae(vcpu
)) {
3834 g_context
->nx
= is_nx(vcpu
);
3835 g_context
->root_level
= PT32E_ROOT_LEVEL
;
3836 reset_rsvds_bits_mask(vcpu
, g_context
);
3837 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3839 g_context
->nx
= false;
3840 g_context
->root_level
= PT32_ROOT_LEVEL
;
3841 reset_rsvds_bits_mask(vcpu
, g_context
);
3842 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
3845 update_permission_bitmask(vcpu
, g_context
, false);
3846 update_last_pte_bitmap(vcpu
, g_context
);
3849 static void init_kvm_mmu(struct kvm_vcpu
*vcpu
)
3851 if (mmu_is_nested(vcpu
))
3852 return init_kvm_nested_mmu(vcpu
);
3853 else if (tdp_enabled
)
3854 return init_kvm_tdp_mmu(vcpu
);
3856 return init_kvm_softmmu(vcpu
);
3859 void kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
3863 kvm_mmu_unload(vcpu
);
3866 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
3868 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
3872 r
= mmu_topup_memory_caches(vcpu
);
3875 r
= mmu_alloc_roots(vcpu
);
3876 kvm_mmu_sync_roots(vcpu
);
3879 /* set_cr3() should ensure TLB has been flushed */
3880 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
3884 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
3886 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
3888 mmu_free_roots(vcpu
);
3889 WARN_ON(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3891 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
3893 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
3894 struct kvm_mmu_page
*sp
, u64
*spte
,
3897 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
3898 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
3902 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
3903 vcpu
->arch
.mmu
.update_pte(vcpu
, sp
, spte
, new);
3906 static bool need_remote_flush(u64 old
, u64
new)
3908 if (!is_shadow_present_pte(old
))
3910 if (!is_shadow_present_pte(new))
3912 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
3914 old
^= shadow_nx_mask
;
3915 new ^= shadow_nx_mask
;
3916 return (old
& ~new & PT64_PERM_MASK
) != 0;
3919 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
3920 bool remote_flush
, bool local_flush
)
3926 kvm_flush_remote_tlbs(vcpu
->kvm
);
3927 else if (local_flush
)
3928 kvm_mmu_flush_tlb(vcpu
);
3931 static u64
mmu_pte_write_fetch_gpte(struct kvm_vcpu
*vcpu
, gpa_t
*gpa
,
3932 const u8
*new, int *bytes
)
3938 * Assume that the pte write on a page table of the same type
3939 * as the current vcpu paging mode since we update the sptes only
3940 * when they have the same mode.
3942 if (is_pae(vcpu
) && *bytes
== 4) {
3943 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3946 r
= kvm_read_guest(vcpu
->kvm
, *gpa
, &gentry
, 8);
3949 new = (const u8
*)&gentry
;
3954 gentry
= *(const u32
*)new;
3957 gentry
= *(const u64
*)new;
3968 * If we're seeing too many writes to a page, it may no longer be a page table,
3969 * or we may be forking, in which case it is better to unmap the page.
3971 static bool detect_write_flooding(struct kvm_mmu_page
*sp
)
3974 * Skip write-flooding detected for the sp whose level is 1, because
3975 * it can become unsync, then the guest page is not write-protected.
3977 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
)
3980 return ++sp
->write_flooding_count
>= 3;
3984 * Misaligned accesses are too much trouble to fix up; also, they usually
3985 * indicate a page is not used as a page table.
3987 static bool detect_write_misaligned(struct kvm_mmu_page
*sp
, gpa_t gpa
,
3990 unsigned offset
, pte_size
, misaligned
;
3992 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3993 gpa
, bytes
, sp
->role
.word
);
3995 offset
= offset_in_page(gpa
);
3996 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
3999 * Sometimes, the OS only writes the last one bytes to update status
4000 * bits, for example, in linux, andb instruction is used in clear_bit().
4002 if (!(offset
& (pte_size
- 1)) && bytes
== 1)
4005 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
4006 misaligned
|= bytes
< 4;
4011 static u64
*get_written_sptes(struct kvm_mmu_page
*sp
, gpa_t gpa
, int *nspte
)
4013 unsigned page_offset
, quadrant
;
4017 page_offset
= offset_in_page(gpa
);
4018 level
= sp
->role
.level
;
4020 if (!sp
->role
.cr4_pae
) {
4021 page_offset
<<= 1; /* 32->64 */
4023 * A 32-bit pde maps 4MB while the shadow pdes map
4024 * only 2MB. So we need to double the offset again
4025 * and zap two pdes instead of one.
4027 if (level
== PT32_ROOT_LEVEL
) {
4028 page_offset
&= ~7; /* kill rounding error */
4032 quadrant
= page_offset
>> PAGE_SHIFT
;
4033 page_offset
&= ~PAGE_MASK
;
4034 if (quadrant
!= sp
->role
.quadrant
)
4038 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
4042 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4043 const u8
*new, int bytes
)
4045 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
4046 union kvm_mmu_page_role mask
= { .word
= 0 };
4047 struct kvm_mmu_page
*sp
;
4048 LIST_HEAD(invalid_list
);
4049 u64 entry
, gentry
, *spte
;
4051 bool remote_flush
, local_flush
, zap_page
;
4054 * If we don't have indirect shadow pages, it means no page is
4055 * write-protected, so we can exit simply.
4057 if (!ACCESS_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
4060 zap_page
= remote_flush
= local_flush
= false;
4062 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
4064 gentry
= mmu_pte_write_fetch_gpte(vcpu
, &gpa
, new, &bytes
);
4067 * No need to care whether allocation memory is successful
4068 * or not since pte prefetch is skiped if it does not have
4069 * enough objects in the cache.
4071 mmu_topup_memory_caches(vcpu
);
4073 spin_lock(&vcpu
->kvm
->mmu_lock
);
4074 ++vcpu
->kvm
->stat
.mmu_pte_write
;
4075 kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
4077 mask
.cr0_wp
= mask
.cr4_pae
= mask
.nxe
= 1;
4078 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
4079 if (detect_write_misaligned(sp
, gpa
, bytes
) ||
4080 detect_write_flooding(sp
)) {
4081 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
4083 ++vcpu
->kvm
->stat
.mmu_flooded
;
4087 spte
= get_written_sptes(sp
, gpa
, &npte
);
4094 mmu_page_zap_pte(vcpu
->kvm
, sp
, spte
);
4096 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
4097 & mask
.word
) && rmap_can_add(vcpu
))
4098 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
4099 if (need_remote_flush(entry
, *spte
))
4100 remote_flush
= true;
4104 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
4105 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4106 kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
4107 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4110 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
4115 if (vcpu
->arch
.mmu
.direct_map
)
4118 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
4120 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4124 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
4126 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
)
4128 LIST_HEAD(invalid_list
);
4130 if (likely(kvm_mmu_available_pages(vcpu
->kvm
) >= KVM_MIN_FREE_MMU_PAGES
))
4133 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
) {
4134 if (!prepare_zap_oldest_mmu_page(vcpu
->kvm
, &invalid_list
))
4137 ++vcpu
->kvm
->stat
.mmu_recycled
;
4139 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4142 static bool is_mmio_page_fault(struct kvm_vcpu
*vcpu
, gva_t addr
)
4144 if (vcpu
->arch
.mmu
.direct_map
|| mmu_is_nested(vcpu
))
4145 return vcpu_match_mmio_gpa(vcpu
, addr
);
4147 return vcpu_match_mmio_gva(vcpu
, addr
);
4150 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
4151 void *insn
, int insn_len
)
4153 int r
, emulation_type
= EMULTYPE_RETRY
;
4154 enum emulation_result er
;
4156 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
4165 if (is_mmio_page_fault(vcpu
, cr2
))
4168 er
= x86_emulate_instruction(vcpu
, cr2
, emulation_type
, insn
, insn_len
);
4173 case EMULATE_USER_EXIT
:
4174 ++vcpu
->stat
.mmio_exits
;
4184 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
4186 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
4188 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
4189 kvm_mmu_flush_tlb(vcpu
);
4190 ++vcpu
->stat
.invlpg
;
4192 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
4194 void kvm_enable_tdp(void)
4198 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
4200 void kvm_disable_tdp(void)
4202 tdp_enabled
= false;
4204 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
4206 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
4208 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
4209 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
4210 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
4213 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
4221 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4222 * Therefore we need to allocate shadow page tables in the first
4223 * 4GB of memory, which happens to fit the DMA32 zone.
4225 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
4229 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
4230 for (i
= 0; i
< 4; ++i
)
4231 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
4236 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
4240 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
4241 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4242 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
4243 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
4245 return alloc_mmu_pages(vcpu
);
4248 void kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
4251 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
4256 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
, int slot
)
4258 struct kvm_memory_slot
*memslot
;
4262 memslot
= id_to_memslot(kvm
->memslots
, slot
);
4263 last_gfn
= memslot
->base_gfn
+ memslot
->npages
- 1;
4265 spin_lock(&kvm
->mmu_lock
);
4267 for (i
= PT_PAGE_TABLE_LEVEL
;
4268 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
4269 unsigned long *rmapp
;
4270 unsigned long last_index
, index
;
4272 rmapp
= memslot
->arch
.rmap
[i
- PT_PAGE_TABLE_LEVEL
];
4273 last_index
= gfn_to_index(last_gfn
, memslot
->base_gfn
, i
);
4275 for (index
= 0; index
<= last_index
; ++index
, ++rmapp
) {
4277 __rmap_write_protect(kvm
, rmapp
, false);
4279 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
)) {
4280 kvm_flush_remote_tlbs(kvm
);
4281 cond_resched_lock(&kvm
->mmu_lock
);
4286 kvm_flush_remote_tlbs(kvm
);
4287 spin_unlock(&kvm
->mmu_lock
);
4290 #define BATCH_ZAP_PAGES 10
4291 static void kvm_zap_obsolete_pages(struct kvm
*kvm
)
4293 struct kvm_mmu_page
*sp
, *node
;
4297 list_for_each_entry_safe_reverse(sp
, node
,
4298 &kvm
->arch
.active_mmu_pages
, link
) {
4302 * No obsolete page exists before new created page since
4303 * active_mmu_pages is the FIFO list.
4305 if (!is_obsolete_sp(kvm
, sp
))
4309 * Since we are reversely walking the list and the invalid
4310 * list will be moved to the head, skip the invalid page
4311 * can help us to avoid the infinity list walking.
4313 if (sp
->role
.invalid
)
4317 * Need not flush tlb since we only zap the sp with invalid
4318 * generation number.
4320 if (batch
>= BATCH_ZAP_PAGES
&&
4321 cond_resched_lock(&kvm
->mmu_lock
)) {
4326 ret
= kvm_mmu_prepare_zap_page(kvm
, sp
,
4327 &kvm
->arch
.zapped_obsolete_pages
);
4335 * Should flush tlb before free page tables since lockless-walking
4336 * may use the pages.
4338 kvm_mmu_commit_zap_page(kvm
, &kvm
->arch
.zapped_obsolete_pages
);
4342 * Fast invalidate all shadow pages and use lock-break technique
4343 * to zap obsolete pages.
4345 * It's required when memslot is being deleted or VM is being
4346 * destroyed, in these cases, we should ensure that KVM MMU does
4347 * not use any resource of the being-deleted slot or all slots
4348 * after calling the function.
4350 void kvm_mmu_invalidate_zap_all_pages(struct kvm
*kvm
)
4352 spin_lock(&kvm
->mmu_lock
);
4353 trace_kvm_mmu_invalidate_zap_all_pages(kvm
);
4354 kvm
->arch
.mmu_valid_gen
++;
4357 * Notify all vcpus to reload its shadow page table
4358 * and flush TLB. Then all vcpus will switch to new
4359 * shadow page table with the new mmu_valid_gen.
4361 * Note: we should do this under the protection of
4362 * mmu-lock, otherwise, vcpu would purge shadow page
4363 * but miss tlb flush.
4365 kvm_reload_remote_mmus(kvm
);
4367 kvm_zap_obsolete_pages(kvm
);
4368 spin_unlock(&kvm
->mmu_lock
);
4371 static bool kvm_has_zapped_obsolete_pages(struct kvm
*kvm
)
4373 return unlikely(!list_empty_careful(&kvm
->arch
.zapped_obsolete_pages
));
4376 void kvm_mmu_invalidate_mmio_sptes(struct kvm
*kvm
)
4379 * The very rare case: if the generation-number is round,
4380 * zap all shadow pages.
4382 if (unlikely(kvm_current_mmio_generation(kvm
) >= MMIO_MAX_GEN
)) {
4383 printk_ratelimited(KERN_INFO
"kvm: zapping shadow pages for mmio generation wraparound\n");
4384 kvm_mmu_invalidate_zap_all_pages(kvm
);
4388 static unsigned long
4389 mmu_shrink_scan(struct shrinker
*shrink
, struct shrink_control
*sc
)
4392 int nr_to_scan
= sc
->nr_to_scan
;
4393 unsigned long freed
= 0;
4395 spin_lock(&kvm_lock
);
4397 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4399 LIST_HEAD(invalid_list
);
4402 * Never scan more than sc->nr_to_scan VM instances.
4403 * Will not hit this condition practically since we do not try
4404 * to shrink more than one VM and it is very unlikely to see
4405 * !n_used_mmu_pages so many times.
4410 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4411 * here. We may skip a VM instance errorneosly, but we do not
4412 * want to shrink a VM that only started to populate its MMU
4415 if (!kvm
->arch
.n_used_mmu_pages
&&
4416 !kvm_has_zapped_obsolete_pages(kvm
))
4419 idx
= srcu_read_lock(&kvm
->srcu
);
4420 spin_lock(&kvm
->mmu_lock
);
4422 if (kvm_has_zapped_obsolete_pages(kvm
)) {
4423 kvm_mmu_commit_zap_page(kvm
,
4424 &kvm
->arch
.zapped_obsolete_pages
);
4428 if (prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
4430 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
4433 spin_unlock(&kvm
->mmu_lock
);
4434 srcu_read_unlock(&kvm
->srcu
, idx
);
4437 * unfair on small ones
4438 * per-vm shrinkers cry out
4439 * sadness comes quickly
4441 list_move_tail(&kvm
->vm_list
, &vm_list
);
4445 spin_unlock(&kvm_lock
);
4449 static unsigned long
4450 mmu_shrink_count(struct shrinker
*shrink
, struct shrink_control
*sc
)
4452 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
4455 static struct shrinker mmu_shrinker
= {
4456 .count_objects
= mmu_shrink_count
,
4457 .scan_objects
= mmu_shrink_scan
,
4458 .seeks
= DEFAULT_SEEKS
* 10,
4461 static void mmu_destroy_caches(void)
4463 if (pte_list_desc_cache
)
4464 kmem_cache_destroy(pte_list_desc_cache
);
4465 if (mmu_page_header_cache
)
4466 kmem_cache_destroy(mmu_page_header_cache
);
4469 int kvm_mmu_module_init(void)
4471 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
4472 sizeof(struct pte_list_desc
),
4474 if (!pte_list_desc_cache
)
4477 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
4478 sizeof(struct kvm_mmu_page
),
4480 if (!mmu_page_header_cache
)
4483 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0))
4486 register_shrinker(&mmu_shrinker
);
4491 mmu_destroy_caches();
4496 * Caculate mmu pages needed for kvm.
4498 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
4500 unsigned int nr_mmu_pages
;
4501 unsigned int nr_pages
= 0;
4502 struct kvm_memslots
*slots
;
4503 struct kvm_memory_slot
*memslot
;
4505 slots
= kvm_memslots(kvm
);
4507 kvm_for_each_memslot(memslot
, slots
)
4508 nr_pages
+= memslot
->npages
;
4510 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
4511 nr_mmu_pages
= max(nr_mmu_pages
,
4512 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
4514 return nr_mmu_pages
;
4517 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
4519 struct kvm_shadow_walk_iterator iterator
;
4523 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
4526 walk_shadow_page_lockless_begin(vcpu
);
4527 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
) {
4528 sptes
[iterator
.level
-1] = spte
;
4530 if (!is_shadow_present_pte(spte
))
4533 walk_shadow_page_lockless_end(vcpu
);
4537 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
4539 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
4543 kvm_mmu_unload(vcpu
);
4544 free_mmu_pages(vcpu
);
4545 mmu_free_memory_caches(vcpu
);
4548 void kvm_mmu_module_exit(void)
4550 mmu_destroy_caches();
4551 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
4552 unregister_shrinker(&mmu_shrinker
);
4553 mmu_audit_disable();