2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
46 * When setting this variable to true it enables Two-Dimensional-Paging
47 * where the hardware walks 2 page tables:
48 * 1. the guest-virtual to guest-physical
49 * 2. while doing 1. it walks guest-physical to host-physical
50 * If the hardware supports that we don't need to do shadow paging.
52 bool tdp_enabled
= false;
56 AUDIT_POST_PAGE_FAULT
,
63 char *audit_point_name
[] = {
76 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
77 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
81 #define pgprintk(x...) do { } while (0)
82 #define rmap_printk(x...) do { } while (0)
88 module_param(dbg
, bool, 0644);
91 static int oos_shadow
= 1;
92 module_param(oos_shadow
, bool, 0644);
95 #define ASSERT(x) do { } while (0)
99 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
100 __FILE__, __LINE__, #x); \
104 #define PTE_PREFETCH_NUM 8
106 #define PT_FIRST_AVAIL_BITS_SHIFT 9
107 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
109 #define PT64_LEVEL_BITS 9
111 #define PT64_LEVEL_SHIFT(level) \
112 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
114 #define PT64_INDEX(address, level)\
115 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
118 #define PT32_LEVEL_BITS 10
120 #define PT32_LEVEL_SHIFT(level) \
121 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
123 #define PT32_LVL_OFFSET_MASK(level) \
124 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
125 * PT32_LEVEL_BITS))) - 1))
127 #define PT32_INDEX(address, level)\
128 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
131 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
132 #define PT64_DIR_BASE_ADDR_MASK \
133 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
134 #define PT64_LVL_ADDR_MASK(level) \
135 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
136 * PT64_LEVEL_BITS))) - 1))
137 #define PT64_LVL_OFFSET_MASK(level) \
138 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
139 * PT64_LEVEL_BITS))) - 1))
141 #define PT32_BASE_ADDR_MASK PAGE_MASK
142 #define PT32_DIR_BASE_ADDR_MASK \
143 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
144 #define PT32_LVL_ADDR_MASK(level) \
145 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
146 * PT32_LEVEL_BITS))) - 1))
148 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
151 #define PTE_LIST_EXT 4
153 #define ACC_EXEC_MASK 1
154 #define ACC_WRITE_MASK PT_WRITABLE_MASK
155 #define ACC_USER_MASK PT_USER_MASK
156 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
158 #include <trace/events/kvm.h>
160 #define CREATE_TRACE_POINTS
161 #include "mmutrace.h"
163 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
165 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
167 struct pte_list_desc
{
168 u64
*sptes
[PTE_LIST_EXT
];
169 struct pte_list_desc
*more
;
172 struct kvm_shadow_walk_iterator
{
180 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
181 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
182 shadow_walk_okay(&(_walker)); \
183 shadow_walk_next(&(_walker)))
185 typedef void (*mmu_parent_walk_fn
) (struct kvm_mmu_page
*sp
, u64
*spte
);
187 static struct kmem_cache
*pte_chain_cache
;
188 static struct kmem_cache
*pte_list_desc_cache
;
189 static struct kmem_cache
*mmu_page_header_cache
;
190 static struct percpu_counter kvm_total_used_mmu_pages
;
192 static u64 __read_mostly shadow_trap_nonpresent_pte
;
193 static u64 __read_mostly shadow_notrap_nonpresent_pte
;
194 static u64 __read_mostly shadow_nx_mask
;
195 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
196 static u64 __read_mostly shadow_user_mask
;
197 static u64 __read_mostly shadow_accessed_mask
;
198 static u64 __read_mostly shadow_dirty_mask
;
200 static inline u64
rsvd_bits(int s
, int e
)
202 return ((1ULL << (e
- s
+ 1)) - 1) << s
;
205 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte
, u64 notrap_pte
)
207 shadow_trap_nonpresent_pte
= trap_pte
;
208 shadow_notrap_nonpresent_pte
= notrap_pte
;
210 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes
);
212 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
213 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
215 shadow_user_mask
= user_mask
;
216 shadow_accessed_mask
= accessed_mask
;
217 shadow_dirty_mask
= dirty_mask
;
218 shadow_nx_mask
= nx_mask
;
219 shadow_x_mask
= x_mask
;
221 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
223 static bool is_write_protection(struct kvm_vcpu
*vcpu
)
225 return kvm_read_cr0_bits(vcpu
, X86_CR0_WP
);
228 static int is_cpuid_PSE36(void)
233 static int is_nx(struct kvm_vcpu
*vcpu
)
235 return vcpu
->arch
.efer
& EFER_NX
;
238 static int is_shadow_present_pte(u64 pte
)
240 return pte
!= shadow_trap_nonpresent_pte
241 && pte
!= shadow_notrap_nonpresent_pte
;
244 static int is_large_pte(u64 pte
)
246 return pte
& PT_PAGE_SIZE_MASK
;
249 static int is_writable_pte(unsigned long pte
)
251 return pte
& PT_WRITABLE_MASK
;
254 static int is_dirty_gpte(unsigned long pte
)
256 return pte
& PT_DIRTY_MASK
;
259 static int is_rmap_spte(u64 pte
)
261 return is_shadow_present_pte(pte
);
264 static int is_last_spte(u64 pte
, int level
)
266 if (level
== PT_PAGE_TABLE_LEVEL
)
268 if (is_large_pte(pte
))
273 static pfn_t
spte_to_pfn(u64 pte
)
275 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
278 static gfn_t
pse36_gfn_delta(u32 gpte
)
280 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
282 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
285 static void __set_spte(u64
*sptep
, u64 spte
)
287 set_64bit(sptep
, spte
);
290 static u64
__xchg_spte(u64
*sptep
, u64 new_spte
)
293 return xchg(sptep
, new_spte
);
299 } while (cmpxchg64(sptep
, old_spte
, new_spte
) != old_spte
);
305 static bool spte_has_volatile_bits(u64 spte
)
307 if (!shadow_accessed_mask
)
310 if (!is_shadow_present_pte(spte
))
313 if ((spte
& shadow_accessed_mask
) &&
314 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
320 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
322 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
325 static void update_spte(u64
*sptep
, u64 new_spte
)
327 u64 mask
, old_spte
= *sptep
;
329 WARN_ON(!is_rmap_spte(new_spte
));
331 new_spte
|= old_spte
& shadow_dirty_mask
;
333 mask
= shadow_accessed_mask
;
334 if (is_writable_pte(old_spte
))
335 mask
|= shadow_dirty_mask
;
337 if (!spte_has_volatile_bits(old_spte
) || (new_spte
& mask
) == mask
)
338 __set_spte(sptep
, new_spte
);
340 old_spte
= __xchg_spte(sptep
, new_spte
);
342 if (!shadow_accessed_mask
)
345 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
346 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
347 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
348 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
351 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
352 struct kmem_cache
*base_cache
, int min
)
356 if (cache
->nobjs
>= min
)
358 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
359 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
362 cache
->objects
[cache
->nobjs
++] = obj
;
367 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
368 struct kmem_cache
*cache
)
371 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
374 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
379 if (cache
->nobjs
>= min
)
381 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
382 page
= (void *)__get_free_page(GFP_KERNEL
);
385 cache
->objects
[cache
->nobjs
++] = page
;
390 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
393 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
396 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
400 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_chain_cache
,
404 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
405 pte_list_desc_cache
, 4 + PTE_PREFETCH_NUM
);
408 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
411 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
412 mmu_page_header_cache
, 4);
417 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
419 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_chain_cache
,
421 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
422 pte_list_desc_cache
);
423 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
424 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
425 mmu_page_header_cache
);
428 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
,
434 p
= mc
->objects
[--mc
->nobjs
];
438 static struct kvm_pte_chain
*mmu_alloc_pte_chain(struct kvm_vcpu
*vcpu
)
440 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_chain_cache
,
441 sizeof(struct kvm_pte_chain
));
444 static void mmu_free_pte_chain(struct kvm_pte_chain
*pc
)
446 kmem_cache_free(pte_chain_cache
, pc
);
449 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
451 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
,
452 sizeof(struct pte_list_desc
));
455 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
457 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
460 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
462 if (!sp
->role
.direct
)
463 return sp
->gfns
[index
];
465 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
468 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
471 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
473 sp
->gfns
[index
] = gfn
;
477 * Return the pointer to the large page information for a given gfn,
478 * handling slots that are not large page aligned.
480 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
481 struct kvm_memory_slot
*slot
,
486 idx
= (gfn
>> KVM_HPAGE_GFN_SHIFT(level
)) -
487 (slot
->base_gfn
>> KVM_HPAGE_GFN_SHIFT(level
));
488 return &slot
->lpage_info
[level
- 2][idx
];
491 static void account_shadowed(struct kvm
*kvm
, gfn_t gfn
)
493 struct kvm_memory_slot
*slot
;
494 struct kvm_lpage_info
*linfo
;
497 slot
= gfn_to_memslot(kvm
, gfn
);
498 for (i
= PT_DIRECTORY_LEVEL
;
499 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
500 linfo
= lpage_info_slot(gfn
, slot
, i
);
501 linfo
->write_count
+= 1;
503 kvm
->arch
.indirect_shadow_pages
++;
506 static void unaccount_shadowed(struct kvm
*kvm
, gfn_t gfn
)
508 struct kvm_memory_slot
*slot
;
509 struct kvm_lpage_info
*linfo
;
512 slot
= gfn_to_memslot(kvm
, gfn
);
513 for (i
= PT_DIRECTORY_LEVEL
;
514 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
515 linfo
= lpage_info_slot(gfn
, slot
, i
);
516 linfo
->write_count
-= 1;
517 WARN_ON(linfo
->write_count
< 0);
519 kvm
->arch
.indirect_shadow_pages
--;
522 static int has_wrprotected_page(struct kvm
*kvm
,
526 struct kvm_memory_slot
*slot
;
527 struct kvm_lpage_info
*linfo
;
529 slot
= gfn_to_memslot(kvm
, gfn
);
531 linfo
= lpage_info_slot(gfn
, slot
, level
);
532 return linfo
->write_count
;
538 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
540 unsigned long page_size
;
543 page_size
= kvm_host_page_size(kvm
, gfn
);
545 for (i
= PT_PAGE_TABLE_LEVEL
;
546 i
< (PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
); ++i
) {
547 if (page_size
>= KVM_HPAGE_SIZE(i
))
556 static struct kvm_memory_slot
*
557 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
560 struct kvm_memory_slot
*slot
;
562 slot
= gfn_to_memslot(vcpu
->kvm
, gfn
);
563 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
564 (no_dirty_log
&& slot
->dirty_bitmap
))
570 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
572 return !gfn_to_memslot_dirty_bitmap(vcpu
, large_gfn
, true);
575 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
577 int host_level
, level
, max_level
;
579 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
581 if (host_level
== PT_PAGE_TABLE_LEVEL
)
584 max_level
= kvm_x86_ops
->get_lpage_level() < host_level
?
585 kvm_x86_ops
->get_lpage_level() : host_level
;
587 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
588 if (has_wrprotected_page(vcpu
->kvm
, large_gfn
, level
))
595 * Pte mapping structures:
597 * If pte_list bit zero is zero, then pte_list point to the spte.
599 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
600 * pte_list_desc containing more mappings.
602 * Returns the number of pte entries before the spte was added or zero if
603 * the spte was not added.
606 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
607 unsigned long *pte_list
)
609 struct pte_list_desc
*desc
;
613 rmap_printk("pte_list_add: %p %llx 0->1\n", spte
, *spte
);
614 *pte_list
= (unsigned long)spte
;
615 } else if (!(*pte_list
& 1)) {
616 rmap_printk("pte_list_add: %p %llx 1->many\n", spte
, *spte
);
617 desc
= mmu_alloc_pte_list_desc(vcpu
);
618 desc
->sptes
[0] = (u64
*)*pte_list
;
619 desc
->sptes
[1] = spte
;
620 *pte_list
= (unsigned long)desc
| 1;
623 rmap_printk("pte_list_add: %p %llx many->many\n", spte
, *spte
);
624 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
625 while (desc
->sptes
[PTE_LIST_EXT
-1] && desc
->more
) {
627 count
+= PTE_LIST_EXT
;
629 if (desc
->sptes
[PTE_LIST_EXT
-1]) {
630 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
633 for (i
= 0; desc
->sptes
[i
]; ++i
)
635 desc
->sptes
[i
] = spte
;
640 static u64
*pte_list_next(unsigned long *pte_list
, u64
*spte
)
642 struct pte_list_desc
*desc
;
648 else if (!(*pte_list
& 1)) {
650 return (u64
*)*pte_list
;
653 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
656 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
) {
657 if (prev_spte
== spte
)
658 return desc
->sptes
[i
];
659 prev_spte
= desc
->sptes
[i
];
667 pte_list_desc_remove_entry(unsigned long *pte_list
, struct pte_list_desc
*desc
,
668 int i
, struct pte_list_desc
*prev_desc
)
672 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
674 desc
->sptes
[i
] = desc
->sptes
[j
];
675 desc
->sptes
[j
] = NULL
;
678 if (!prev_desc
&& !desc
->more
)
679 *pte_list
= (unsigned long)desc
->sptes
[0];
682 prev_desc
->more
= desc
->more
;
684 *pte_list
= (unsigned long)desc
->more
| 1;
685 mmu_free_pte_list_desc(desc
);
688 static void pte_list_remove(u64
*spte
, unsigned long *pte_list
)
690 struct pte_list_desc
*desc
;
691 struct pte_list_desc
*prev_desc
;
695 printk(KERN_ERR
"pte_list_remove: %p 0->BUG\n", spte
);
697 } else if (!(*pte_list
& 1)) {
698 rmap_printk("pte_list_remove: %p 1->0\n", spte
);
699 if ((u64
*)*pte_list
!= spte
) {
700 printk(KERN_ERR
"pte_list_remove: %p 1->BUG\n", spte
);
705 rmap_printk("pte_list_remove: %p many->many\n", spte
);
706 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
709 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
710 if (desc
->sptes
[i
] == spte
) {
711 pte_list_desc_remove_entry(pte_list
,
719 pr_err("pte_list_remove: %p many->many\n", spte
);
725 * Take gfn and return the reverse mapping to it.
727 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, int level
)
729 struct kvm_memory_slot
*slot
;
730 struct kvm_lpage_info
*linfo
;
732 slot
= gfn_to_memslot(kvm
, gfn
);
733 if (likely(level
== PT_PAGE_TABLE_LEVEL
))
734 return &slot
->rmap
[gfn
- slot
->base_gfn
];
736 linfo
= lpage_info_slot(gfn
, slot
, level
);
738 return &linfo
->rmap_pde
;
741 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
743 struct kvm_mmu_page
*sp
;
744 unsigned long *rmapp
;
746 if (!is_rmap_spte(*spte
))
749 sp
= page_header(__pa(spte
));
750 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
751 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
752 return pte_list_add(vcpu
, spte
, rmapp
);
755 static u64
*rmap_next(struct kvm
*kvm
, unsigned long *rmapp
, u64
*spte
)
757 return pte_list_next(rmapp
, spte
);
760 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
762 struct kvm_mmu_page
*sp
;
764 unsigned long *rmapp
;
766 sp
= page_header(__pa(spte
));
767 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
768 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
->role
.level
);
769 pte_list_remove(spte
, rmapp
);
772 static int set_spte_track_bits(u64
*sptep
, u64 new_spte
)
775 u64 old_spte
= *sptep
;
777 if (!spte_has_volatile_bits(old_spte
))
778 __set_spte(sptep
, new_spte
);
780 old_spte
= __xchg_spte(sptep
, new_spte
);
782 if (!is_rmap_spte(old_spte
))
785 pfn
= spte_to_pfn(old_spte
);
786 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
787 kvm_set_pfn_accessed(pfn
);
788 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
789 kvm_set_pfn_dirty(pfn
);
793 static void drop_spte(struct kvm
*kvm
, u64
*sptep
, u64 new_spte
)
795 if (set_spte_track_bits(sptep
, new_spte
))
796 rmap_remove(kvm
, sptep
);
799 static int rmap_write_protect(struct kvm
*kvm
, u64 gfn
)
801 unsigned long *rmapp
;
803 int i
, write_protected
= 0;
805 rmapp
= gfn_to_rmap(kvm
, gfn
, PT_PAGE_TABLE_LEVEL
);
807 spte
= rmap_next(kvm
, rmapp
, NULL
);
810 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
811 rmap_printk("rmap_write_protect: spte %p %llx\n", spte
, *spte
);
812 if (is_writable_pte(*spte
)) {
813 update_spte(spte
, *spte
& ~PT_WRITABLE_MASK
);
816 spte
= rmap_next(kvm
, rmapp
, spte
);
819 /* check for huge page mappings */
820 for (i
= PT_DIRECTORY_LEVEL
;
821 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
822 rmapp
= gfn_to_rmap(kvm
, gfn
, i
);
823 spte
= rmap_next(kvm
, rmapp
, NULL
);
826 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
827 BUG_ON((*spte
& (PT_PAGE_SIZE_MASK
|PT_PRESENT_MASK
)) != (PT_PAGE_SIZE_MASK
|PT_PRESENT_MASK
));
828 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte
, *spte
, gfn
);
829 if (is_writable_pte(*spte
)) {
831 shadow_trap_nonpresent_pte
);
836 spte
= rmap_next(kvm
, rmapp
, spte
);
840 return write_protected
;
843 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
847 int need_tlb_flush
= 0;
849 while ((spte
= rmap_next(kvm
, rmapp
, NULL
))) {
850 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
851 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte
, *spte
);
852 drop_spte(kvm
, spte
, shadow_trap_nonpresent_pte
);
855 return need_tlb_flush
;
858 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
863 pte_t
*ptep
= (pte_t
*)data
;
866 WARN_ON(pte_huge(*ptep
));
867 new_pfn
= pte_pfn(*ptep
);
868 spte
= rmap_next(kvm
, rmapp
, NULL
);
870 BUG_ON(!is_shadow_present_pte(*spte
));
871 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte
, *spte
);
873 if (pte_write(*ptep
)) {
874 drop_spte(kvm
, spte
, shadow_trap_nonpresent_pte
);
875 spte
= rmap_next(kvm
, rmapp
, NULL
);
877 new_spte
= *spte
&~ (PT64_BASE_ADDR_MASK
);
878 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
880 new_spte
&= ~PT_WRITABLE_MASK
;
881 new_spte
&= ~SPTE_HOST_WRITEABLE
;
882 new_spte
&= ~shadow_accessed_mask
;
883 set_spte_track_bits(spte
, new_spte
);
884 spte
= rmap_next(kvm
, rmapp
, spte
);
888 kvm_flush_remote_tlbs(kvm
);
893 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
895 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
901 struct kvm_memslots
*slots
;
903 slots
= kvm_memslots(kvm
);
905 for (i
= 0; i
< slots
->nmemslots
; i
++) {
906 struct kvm_memory_slot
*memslot
= &slots
->memslots
[i
];
907 unsigned long start
= memslot
->userspace_addr
;
910 end
= start
+ (memslot
->npages
<< PAGE_SHIFT
);
911 if (hva
>= start
&& hva
< end
) {
912 gfn_t gfn_offset
= (hva
- start
) >> PAGE_SHIFT
;
913 gfn_t gfn
= memslot
->base_gfn
+ gfn_offset
;
915 ret
= handler(kvm
, &memslot
->rmap
[gfn_offset
], data
);
917 for (j
= 0; j
< KVM_NR_PAGE_SIZES
- 1; ++j
) {
918 struct kvm_lpage_info
*linfo
;
920 linfo
= lpage_info_slot(gfn
, memslot
,
921 PT_DIRECTORY_LEVEL
+ j
);
922 ret
|= handler(kvm
, &linfo
->rmap_pde
, data
);
924 trace_kvm_age_page(hva
, memslot
, ret
);
932 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
934 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
937 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
939 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
942 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
949 * Emulate the accessed bit for EPT, by checking if this page has
950 * an EPT mapping, and clearing it if it does. On the next access,
951 * a new EPT mapping will be established.
952 * This has some overhead, but not as much as the cost of swapping
953 * out actively used pages or breaking up actively used hugepages.
955 if (!shadow_accessed_mask
)
956 return kvm_unmap_rmapp(kvm
, rmapp
, data
);
958 spte
= rmap_next(kvm
, rmapp
, NULL
);
962 BUG_ON(!(_spte
& PT_PRESENT_MASK
));
963 _young
= _spte
& PT_ACCESSED_MASK
;
966 clear_bit(PT_ACCESSED_SHIFT
, (unsigned long *)spte
);
968 spte
= rmap_next(kvm
, rmapp
, spte
);
973 static int kvm_test_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
980 * If there's no access bit in the secondary pte set by the
981 * hardware it's up to gup-fast/gup to set the access bit in
982 * the primary pte or in the page structure.
984 if (!shadow_accessed_mask
)
987 spte
= rmap_next(kvm
, rmapp
, NULL
);
990 BUG_ON(!(_spte
& PT_PRESENT_MASK
));
991 young
= _spte
& PT_ACCESSED_MASK
;
996 spte
= rmap_next(kvm
, rmapp
, spte
);
1002 #define RMAP_RECYCLE_THRESHOLD 1000
1004 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1006 unsigned long *rmapp
;
1007 struct kvm_mmu_page
*sp
;
1009 sp
= page_header(__pa(spte
));
1011 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1013 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, 0);
1014 kvm_flush_remote_tlbs(vcpu
->kvm
);
1017 int kvm_age_hva(struct kvm
*kvm
, unsigned long hva
)
1019 return kvm_handle_hva(kvm
, hva
, 0, kvm_age_rmapp
);
1022 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1024 return kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1028 static int is_empty_shadow_page(u64
*spt
)
1033 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1034 if (is_shadow_present_pte(*pos
)) {
1035 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1044 * This value is the sum of all of the kvm instances's
1045 * kvm->arch.n_used_mmu_pages values. We need a global,
1046 * aggregate version in order to make the slab shrinker
1049 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
1051 kvm
->arch
.n_used_mmu_pages
+= nr
;
1052 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1055 static void kvm_mmu_free_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1057 ASSERT(is_empty_shadow_page(sp
->spt
));
1058 hlist_del(&sp
->hash_link
);
1059 list_del(&sp
->link
);
1060 free_page((unsigned long)sp
->spt
);
1061 if (!sp
->role
.direct
)
1062 free_page((unsigned long)sp
->gfns
);
1063 kmem_cache_free(mmu_page_header_cache
, sp
);
1064 kvm_mod_used_mmu_pages(kvm
, -1);
1067 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1069 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1072 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1073 u64
*parent_pte
, int direct
)
1075 struct kvm_mmu_page
*sp
;
1077 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
, sizeof *sp
);
1078 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
, PAGE_SIZE
);
1080 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
,
1082 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1083 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1084 bitmap_zero(sp
->slot_bitmap
, KVM_MEMORY_SLOTS
+ KVM_PRIVATE_MEM_SLOTS
);
1085 sp
->multimapped
= 0;
1086 sp
->parent_pte
= parent_pte
;
1087 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1091 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1092 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1094 struct kvm_pte_chain
*pte_chain
;
1095 struct hlist_node
*node
;
1100 if (!sp
->multimapped
) {
1101 u64
*old
= sp
->parent_pte
;
1104 sp
->parent_pte
= parent_pte
;
1107 sp
->multimapped
= 1;
1108 pte_chain
= mmu_alloc_pte_chain(vcpu
);
1109 INIT_HLIST_HEAD(&sp
->parent_ptes
);
1110 hlist_add_head(&pte_chain
->link
, &sp
->parent_ptes
);
1111 pte_chain
->parent_ptes
[0] = old
;
1113 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
) {
1114 if (pte_chain
->parent_ptes
[NR_PTE_CHAIN_ENTRIES
-1])
1116 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
)
1117 if (!pte_chain
->parent_ptes
[i
]) {
1118 pte_chain
->parent_ptes
[i
] = parent_pte
;
1122 pte_chain
= mmu_alloc_pte_chain(vcpu
);
1124 hlist_add_head(&pte_chain
->link
, &sp
->parent_ptes
);
1125 pte_chain
->parent_ptes
[0] = parent_pte
;
1128 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1131 struct kvm_pte_chain
*pte_chain
;
1132 struct hlist_node
*node
;
1135 if (!sp
->multimapped
) {
1136 BUG_ON(sp
->parent_pte
!= parent_pte
);
1137 sp
->parent_pte
= NULL
;
1140 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
)
1141 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
) {
1142 if (!pte_chain
->parent_ptes
[i
])
1144 if (pte_chain
->parent_ptes
[i
] != parent_pte
)
1146 while (i
+ 1 < NR_PTE_CHAIN_ENTRIES
1147 && pte_chain
->parent_ptes
[i
+ 1]) {
1148 pte_chain
->parent_ptes
[i
]
1149 = pte_chain
->parent_ptes
[i
+ 1];
1152 pte_chain
->parent_ptes
[i
] = NULL
;
1154 hlist_del(&pte_chain
->link
);
1155 mmu_free_pte_chain(pte_chain
);
1156 if (hlist_empty(&sp
->parent_ptes
)) {
1157 sp
->multimapped
= 0;
1158 sp
->parent_pte
= NULL
;
1166 static void mmu_parent_walk(struct kvm_mmu_page
*sp
, mmu_parent_walk_fn fn
)
1168 struct kvm_pte_chain
*pte_chain
;
1169 struct hlist_node
*node
;
1170 struct kvm_mmu_page
*parent_sp
;
1173 if (!sp
->multimapped
&& sp
->parent_pte
) {
1174 parent_sp
= page_header(__pa(sp
->parent_pte
));
1175 fn(parent_sp
, sp
->parent_pte
);
1179 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
)
1180 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
) {
1181 u64
*spte
= pte_chain
->parent_ptes
[i
];
1185 parent_sp
= page_header(__pa(spte
));
1186 fn(parent_sp
, spte
);
1190 static void mark_unsync(struct kvm_mmu_page
*sp
, u64
*spte
);
1191 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1193 mmu_parent_walk(sp
, mark_unsync
);
1196 static void mark_unsync(struct kvm_mmu_page
*sp
, u64
*spte
)
1200 index
= spte
- sp
->spt
;
1201 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1203 if (sp
->unsync_children
++)
1205 kvm_mmu_mark_parents_unsync(sp
);
1208 static void nonpaging_prefetch_page(struct kvm_vcpu
*vcpu
,
1209 struct kvm_mmu_page
*sp
)
1213 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
1214 sp
->spt
[i
] = shadow_trap_nonpresent_pte
;
1217 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1218 struct kvm_mmu_page
*sp
)
1223 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1227 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1228 struct kvm_mmu_page
*sp
, u64
*spte
,
1234 #define KVM_PAGE_ARRAY_NR 16
1236 struct kvm_mmu_pages
{
1237 struct mmu_page_and_offset
{
1238 struct kvm_mmu_page
*sp
;
1240 } page
[KVM_PAGE_ARRAY_NR
];
1244 #define for_each_unsync_children(bitmap, idx) \
1245 for (idx = find_first_bit(bitmap, 512); \
1247 idx = find_next_bit(bitmap, 512, idx+1))
1249 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1255 for (i
=0; i
< pvec
->nr
; i
++)
1256 if (pvec
->page
[i
].sp
== sp
)
1259 pvec
->page
[pvec
->nr
].sp
= sp
;
1260 pvec
->page
[pvec
->nr
].idx
= idx
;
1262 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1265 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1266 struct kvm_mmu_pages
*pvec
)
1268 int i
, ret
, nr_unsync_leaf
= 0;
1270 for_each_unsync_children(sp
->unsync_child_bitmap
, i
) {
1271 struct kvm_mmu_page
*child
;
1272 u64 ent
= sp
->spt
[i
];
1274 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1275 goto clear_child_bitmap
;
1277 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1279 if (child
->unsync_children
) {
1280 if (mmu_pages_add(pvec
, child
, i
))
1283 ret
= __mmu_unsync_walk(child
, pvec
);
1285 goto clear_child_bitmap
;
1287 nr_unsync_leaf
+= ret
;
1290 } else if (child
->unsync
) {
1292 if (mmu_pages_add(pvec
, child
, i
))
1295 goto clear_child_bitmap
;
1300 __clear_bit(i
, sp
->unsync_child_bitmap
);
1301 sp
->unsync_children
--;
1302 WARN_ON((int)sp
->unsync_children
< 0);
1306 return nr_unsync_leaf
;
1309 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1310 struct kvm_mmu_pages
*pvec
)
1312 if (!sp
->unsync_children
)
1315 mmu_pages_add(pvec
, sp
, 0);
1316 return __mmu_unsync_walk(sp
, pvec
);
1319 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1321 WARN_ON(!sp
->unsync
);
1322 trace_kvm_mmu_sync_page(sp
);
1324 --kvm
->stat
.mmu_unsync
;
1327 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1328 struct list_head
*invalid_list
);
1329 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1330 struct list_head
*invalid_list
);
1332 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1333 hlist_for_each_entry(sp, pos, \
1334 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1335 if ((sp)->gfn != (gfn)) {} else
1337 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1338 hlist_for_each_entry(sp, pos, \
1339 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1340 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1341 (sp)->role.invalid) {} else
1343 /* @sp->gfn should be write-protected at the call site */
1344 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1345 struct list_head
*invalid_list
, bool clear_unsync
)
1347 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1348 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1353 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1355 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1356 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1360 kvm_mmu_flush_tlb(vcpu
);
1364 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1365 struct kvm_mmu_page
*sp
)
1367 LIST_HEAD(invalid_list
);
1370 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1372 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1377 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1378 struct list_head
*invalid_list
)
1380 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1383 /* @gfn should be write-protected at the call site */
1384 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1386 struct kvm_mmu_page
*s
;
1387 struct hlist_node
*node
;
1388 LIST_HEAD(invalid_list
);
1391 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1395 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1396 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1397 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1398 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1399 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1405 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1407 kvm_mmu_flush_tlb(vcpu
);
1410 struct mmu_page_path
{
1411 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1412 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1415 #define for_each_sp(pvec, sp, parents, i) \
1416 for (i = mmu_pages_next(&pvec, &parents, -1), \
1417 sp = pvec.page[i].sp; \
1418 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1419 i = mmu_pages_next(&pvec, &parents, i))
1421 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1422 struct mmu_page_path
*parents
,
1427 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1428 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1430 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1431 parents
->idx
[0] = pvec
->page
[n
].idx
;
1435 parents
->parent
[sp
->role
.level
-2] = sp
;
1436 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1442 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1444 struct kvm_mmu_page
*sp
;
1445 unsigned int level
= 0;
1448 unsigned int idx
= parents
->idx
[level
];
1450 sp
= parents
->parent
[level
];
1454 --sp
->unsync_children
;
1455 WARN_ON((int)sp
->unsync_children
< 0);
1456 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1458 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
1461 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
1462 struct mmu_page_path
*parents
,
1463 struct kvm_mmu_pages
*pvec
)
1465 parents
->parent
[parent
->role
.level
-1] = NULL
;
1469 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1470 struct kvm_mmu_page
*parent
)
1473 struct kvm_mmu_page
*sp
;
1474 struct mmu_page_path parents
;
1475 struct kvm_mmu_pages pages
;
1476 LIST_HEAD(invalid_list
);
1478 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1479 while (mmu_unsync_walk(parent
, &pages
)) {
1482 for_each_sp(pages
, sp
, parents
, i
)
1483 protected |= rmap_write_protect(vcpu
->kvm
, sp
->gfn
);
1486 kvm_flush_remote_tlbs(vcpu
->kvm
);
1488 for_each_sp(pages
, sp
, parents
, i
) {
1489 kvm_sync_page(vcpu
, sp
, &invalid_list
);
1490 mmu_pages_clear_parents(&parents
);
1492 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1493 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
1494 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1498 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
1506 union kvm_mmu_page_role role
;
1508 struct kvm_mmu_page
*sp
;
1509 struct hlist_node
*node
;
1510 bool need_sync
= false;
1512 role
= vcpu
->arch
.mmu
.base_role
;
1514 role
.direct
= direct
;
1517 role
.access
= access
;
1518 if (!vcpu
->arch
.mmu
.direct_map
1519 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
1520 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
1521 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
1522 role
.quadrant
= quadrant
;
1524 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
, node
) {
1525 if (!need_sync
&& sp
->unsync
)
1528 if (sp
->role
.word
!= role
.word
)
1531 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
1534 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1535 if (sp
->unsync_children
) {
1536 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1537 kvm_mmu_mark_parents_unsync(sp
);
1538 } else if (sp
->unsync
)
1539 kvm_mmu_mark_parents_unsync(sp
);
1541 trace_kvm_mmu_get_page(sp
, false);
1544 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
1545 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
1550 hlist_add_head(&sp
->hash_link
,
1551 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
1553 if (rmap_write_protect(vcpu
->kvm
, gfn
))
1554 kvm_flush_remote_tlbs(vcpu
->kvm
);
1555 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
1556 kvm_sync_pages(vcpu
, gfn
);
1558 account_shadowed(vcpu
->kvm
, gfn
);
1560 if (shadow_trap_nonpresent_pte
!= shadow_notrap_nonpresent_pte
)
1561 vcpu
->arch
.mmu
.prefetch_page(vcpu
, sp
);
1563 nonpaging_prefetch_page(vcpu
, sp
);
1564 trace_kvm_mmu_get_page(sp
, true);
1568 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
1569 struct kvm_vcpu
*vcpu
, u64 addr
)
1571 iterator
->addr
= addr
;
1572 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
1573 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
1575 if (iterator
->level
== PT64_ROOT_LEVEL
&&
1576 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
1577 !vcpu
->arch
.mmu
.direct_map
)
1580 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
1581 iterator
->shadow_addr
1582 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
1583 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
1585 if (!iterator
->shadow_addr
)
1586 iterator
->level
= 0;
1590 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
1592 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
1595 if (iterator
->level
== PT_PAGE_TABLE_LEVEL
)
1596 if (is_large_pte(*iterator
->sptep
))
1599 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
1600 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
1604 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
1606 iterator
->shadow_addr
= *iterator
->sptep
& PT64_BASE_ADDR_MASK
;
1610 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
)
1614 spte
= __pa(sp
->spt
)
1615 | PT_PRESENT_MASK
| PT_ACCESSED_MASK
1616 | PT_WRITABLE_MASK
| PT_USER_MASK
;
1617 __set_spte(sptep
, spte
);
1620 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1622 if (is_large_pte(*sptep
)) {
1623 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
1624 kvm_flush_remote_tlbs(vcpu
->kvm
);
1628 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
1629 unsigned direct_access
)
1631 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
1632 struct kvm_mmu_page
*child
;
1635 * For the direct sp, if the guest pte's dirty bit
1636 * changed form clean to dirty, it will corrupt the
1637 * sp's access: allow writable in the read-only sp,
1638 * so we should update the spte at this point to get
1639 * a new sp with the correct access.
1641 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
1642 if (child
->role
.access
== direct_access
)
1645 mmu_page_remove_parent_pte(child
, sptep
);
1646 __set_spte(sptep
, shadow_trap_nonpresent_pte
);
1647 kvm_flush_remote_tlbs(vcpu
->kvm
);
1651 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
1652 struct kvm_mmu_page
*sp
)
1660 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
1663 if (is_shadow_present_pte(ent
)) {
1664 if (!is_last_spte(ent
, sp
->role
.level
)) {
1665 ent
&= PT64_BASE_ADDR_MASK
;
1666 mmu_page_remove_parent_pte(page_header(ent
),
1669 if (is_large_pte(ent
))
1671 drop_spte(kvm
, &pt
[i
],
1672 shadow_trap_nonpresent_pte
);
1675 pt
[i
] = shadow_trap_nonpresent_pte
;
1679 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1681 mmu_page_remove_parent_pte(sp
, parent_pte
);
1684 static void kvm_mmu_reset_last_pte_updated(struct kvm
*kvm
)
1687 struct kvm_vcpu
*vcpu
;
1689 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1690 vcpu
->arch
.last_pte_updated
= NULL
;
1693 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1697 while (sp
->multimapped
|| sp
->parent_pte
) {
1698 if (!sp
->multimapped
)
1699 parent_pte
= sp
->parent_pte
;
1701 struct kvm_pte_chain
*chain
;
1703 chain
= container_of(sp
->parent_ptes
.first
,
1704 struct kvm_pte_chain
, link
);
1705 parent_pte
= chain
->parent_ptes
[0];
1707 BUG_ON(!parent_pte
);
1708 kvm_mmu_put_page(sp
, parent_pte
);
1709 __set_spte(parent_pte
, shadow_trap_nonpresent_pte
);
1713 static int mmu_zap_unsync_children(struct kvm
*kvm
,
1714 struct kvm_mmu_page
*parent
,
1715 struct list_head
*invalid_list
)
1718 struct mmu_page_path parents
;
1719 struct kvm_mmu_pages pages
;
1721 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
1724 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1725 while (mmu_unsync_walk(parent
, &pages
)) {
1726 struct kvm_mmu_page
*sp
;
1728 for_each_sp(pages
, sp
, parents
, i
) {
1729 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
1730 mmu_pages_clear_parents(&parents
);
1733 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1739 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1740 struct list_head
*invalid_list
)
1744 trace_kvm_mmu_prepare_zap_page(sp
);
1745 ++kvm
->stat
.mmu_shadow_zapped
;
1746 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
1747 kvm_mmu_page_unlink_children(kvm
, sp
);
1748 kvm_mmu_unlink_parents(kvm
, sp
);
1749 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
1750 unaccount_shadowed(kvm
, sp
->gfn
);
1752 kvm_unlink_unsync_page(kvm
, sp
);
1753 if (!sp
->root_count
) {
1756 list_move(&sp
->link
, invalid_list
);
1758 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
1759 kvm_reload_remote_mmus(kvm
);
1762 sp
->role
.invalid
= 1;
1763 kvm_mmu_reset_last_pte_updated(kvm
);
1767 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1768 struct list_head
*invalid_list
)
1770 struct kvm_mmu_page
*sp
;
1772 if (list_empty(invalid_list
))
1775 kvm_flush_remote_tlbs(kvm
);
1778 sp
= list_first_entry(invalid_list
, struct kvm_mmu_page
, link
);
1779 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
1780 kvm_mmu_free_page(kvm
, sp
);
1781 } while (!list_empty(invalid_list
));
1786 * Changing the number of mmu pages allocated to the vm
1787 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1789 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
1791 LIST_HEAD(invalid_list
);
1793 * If we set the number of mmu pages to be smaller be than the
1794 * number of actived pages , we must to free some mmu pages before we
1798 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
1799 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
&&
1800 !list_empty(&kvm
->arch
.active_mmu_pages
)) {
1801 struct kvm_mmu_page
*page
;
1803 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
1804 struct kvm_mmu_page
, link
);
1805 kvm_mmu_prepare_zap_page(kvm
, page
, &invalid_list
);
1806 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1808 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
1811 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
1814 static int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
1816 struct kvm_mmu_page
*sp
;
1817 struct hlist_node
*node
;
1818 LIST_HEAD(invalid_list
);
1821 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
1824 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
, node
) {
1825 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
1828 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
1830 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1834 static void mmu_unshadow(struct kvm
*kvm
, gfn_t gfn
)
1836 struct kvm_mmu_page
*sp
;
1837 struct hlist_node
*node
;
1838 LIST_HEAD(invalid_list
);
1840 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
, node
) {
1841 pgprintk("%s: zap %llx %x\n",
1842 __func__
, gfn
, sp
->role
.word
);
1843 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
1845 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1848 static void page_header_update_slot(struct kvm
*kvm
, void *pte
, gfn_t gfn
)
1850 int slot
= memslot_id(kvm
, gfn
);
1851 struct kvm_mmu_page
*sp
= page_header(__pa(pte
));
1853 __set_bit(slot
, sp
->slot_bitmap
);
1856 static void mmu_convert_notrap(struct kvm_mmu_page
*sp
)
1861 if (shadow_trap_nonpresent_pte
== shadow_notrap_nonpresent_pte
)
1864 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
1865 if (pt
[i
] == shadow_notrap_nonpresent_pte
)
1866 __set_spte(&pt
[i
], shadow_trap_nonpresent_pte
);
1871 * The function is based on mtrr_type_lookup() in
1872 * arch/x86/kernel/cpu/mtrr/generic.c
1874 static int get_mtrr_type(struct mtrr_state_type
*mtrr_state
,
1879 u8 prev_match
, curr_match
;
1880 int num_var_ranges
= KVM_NR_VAR_MTRR
;
1882 if (!mtrr_state
->enabled
)
1885 /* Make end inclusive end, instead of exclusive */
1888 /* Look in fixed ranges. Just return the type as per start */
1889 if (mtrr_state
->have_fixed
&& (start
< 0x100000)) {
1892 if (start
< 0x80000) {
1894 idx
+= (start
>> 16);
1895 return mtrr_state
->fixed_ranges
[idx
];
1896 } else if (start
< 0xC0000) {
1898 idx
+= ((start
- 0x80000) >> 14);
1899 return mtrr_state
->fixed_ranges
[idx
];
1900 } else if (start
< 0x1000000) {
1902 idx
+= ((start
- 0xC0000) >> 12);
1903 return mtrr_state
->fixed_ranges
[idx
];
1908 * Look in variable ranges
1909 * Look of multiple ranges matching this address and pick type
1910 * as per MTRR precedence
1912 if (!(mtrr_state
->enabled
& 2))
1913 return mtrr_state
->def_type
;
1916 for (i
= 0; i
< num_var_ranges
; ++i
) {
1917 unsigned short start_state
, end_state
;
1919 if (!(mtrr_state
->var_ranges
[i
].mask_lo
& (1 << 11)))
1922 base
= (((u64
)mtrr_state
->var_ranges
[i
].base_hi
) << 32) +
1923 (mtrr_state
->var_ranges
[i
].base_lo
& PAGE_MASK
);
1924 mask
= (((u64
)mtrr_state
->var_ranges
[i
].mask_hi
) << 32) +
1925 (mtrr_state
->var_ranges
[i
].mask_lo
& PAGE_MASK
);
1927 start_state
= ((start
& mask
) == (base
& mask
));
1928 end_state
= ((end
& mask
) == (base
& mask
));
1929 if (start_state
!= end_state
)
1932 if ((start
& mask
) != (base
& mask
))
1935 curr_match
= mtrr_state
->var_ranges
[i
].base_lo
& 0xff;
1936 if (prev_match
== 0xFF) {
1937 prev_match
= curr_match
;
1941 if (prev_match
== MTRR_TYPE_UNCACHABLE
||
1942 curr_match
== MTRR_TYPE_UNCACHABLE
)
1943 return MTRR_TYPE_UNCACHABLE
;
1945 if ((prev_match
== MTRR_TYPE_WRBACK
&&
1946 curr_match
== MTRR_TYPE_WRTHROUGH
) ||
1947 (prev_match
== MTRR_TYPE_WRTHROUGH
&&
1948 curr_match
== MTRR_TYPE_WRBACK
)) {
1949 prev_match
= MTRR_TYPE_WRTHROUGH
;
1950 curr_match
= MTRR_TYPE_WRTHROUGH
;
1953 if (prev_match
!= curr_match
)
1954 return MTRR_TYPE_UNCACHABLE
;
1957 if (prev_match
!= 0xFF)
1960 return mtrr_state
->def_type
;
1963 u8
kvm_get_guest_memory_type(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1967 mtrr
= get_mtrr_type(&vcpu
->arch
.mtrr_state
, gfn
<< PAGE_SHIFT
,
1968 (gfn
<< PAGE_SHIFT
) + PAGE_SIZE
);
1969 if (mtrr
== 0xfe || mtrr
== 0xff)
1970 mtrr
= MTRR_TYPE_WRBACK
;
1973 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type
);
1975 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
1977 trace_kvm_mmu_unsync_page(sp
);
1978 ++vcpu
->kvm
->stat
.mmu_unsync
;
1981 kvm_mmu_mark_parents_unsync(sp
);
1982 mmu_convert_notrap(sp
);
1985 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1987 struct kvm_mmu_page
*s
;
1988 struct hlist_node
*node
;
1990 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1993 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1994 __kvm_unsync_page(vcpu
, s
);
1998 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2001 struct kvm_mmu_page
*s
;
2002 struct hlist_node
*node
;
2003 bool need_unsync
= false;
2005 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
2009 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
2012 if (!need_unsync
&& !s
->unsync
) {
2019 kvm_unsync_pages(vcpu
, gfn
);
2023 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2024 unsigned pte_access
, int user_fault
,
2025 int write_fault
, int dirty
, int level
,
2026 gfn_t gfn
, pfn_t pfn
, bool speculative
,
2027 bool can_unsync
, bool host_writable
)
2029 u64 spte
, entry
= *sptep
;
2033 * We don't set the accessed bit, since we sometimes want to see
2034 * whether the guest actually used the pte (in order to detect
2037 spte
= PT_PRESENT_MASK
;
2039 spte
|= shadow_accessed_mask
;
2041 pte_access
&= ~ACC_WRITE_MASK
;
2042 if (pte_access
& ACC_EXEC_MASK
)
2043 spte
|= shadow_x_mask
;
2045 spte
|= shadow_nx_mask
;
2046 if (pte_access
& ACC_USER_MASK
)
2047 spte
|= shadow_user_mask
;
2048 if (level
> PT_PAGE_TABLE_LEVEL
)
2049 spte
|= PT_PAGE_SIZE_MASK
;
2051 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
2052 kvm_is_mmio_pfn(pfn
));
2055 spte
|= SPTE_HOST_WRITEABLE
;
2057 pte_access
&= ~ACC_WRITE_MASK
;
2059 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
2061 if ((pte_access
& ACC_WRITE_MASK
)
2062 || (!vcpu
->arch
.mmu
.direct_map
&& write_fault
2063 && !is_write_protection(vcpu
) && !user_fault
)) {
2065 if (level
> PT_PAGE_TABLE_LEVEL
&&
2066 has_wrprotected_page(vcpu
->kvm
, gfn
, level
)) {
2068 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
2072 spte
|= PT_WRITABLE_MASK
;
2074 if (!vcpu
->arch
.mmu
.direct_map
2075 && !(pte_access
& ACC_WRITE_MASK
))
2076 spte
&= ~PT_USER_MASK
;
2079 * Optimization: for pte sync, if spte was writable the hash
2080 * lookup is unnecessary (and expensive). Write protection
2081 * is responsibility of mmu_get_page / kvm_sync_page.
2082 * Same reasoning can be applied to dirty page accounting.
2084 if (!can_unsync
&& is_writable_pte(*sptep
))
2087 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2088 pgprintk("%s: found shadow page for %llx, marking ro\n",
2091 pte_access
&= ~ACC_WRITE_MASK
;
2092 if (is_writable_pte(spte
))
2093 spte
&= ~PT_WRITABLE_MASK
;
2097 if (pte_access
& ACC_WRITE_MASK
)
2098 mark_page_dirty(vcpu
->kvm
, gfn
);
2101 update_spte(sptep
, spte
);
2103 * If we overwrite a writable spte with a read-only one we
2104 * should flush remote TLBs. Otherwise rmap_write_protect
2105 * will find a read-only spte, even though the writable spte
2106 * might be cached on a CPU's TLB.
2108 if (is_writable_pte(entry
) && !is_writable_pte(*sptep
))
2109 kvm_flush_remote_tlbs(vcpu
->kvm
);
2114 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2115 unsigned pt_access
, unsigned pte_access
,
2116 int user_fault
, int write_fault
, int dirty
,
2117 int *ptwrite
, int level
, gfn_t gfn
,
2118 pfn_t pfn
, bool speculative
,
2121 int was_rmapped
= 0;
2124 pgprintk("%s: spte %llx access %x write_fault %d"
2125 " user_fault %d gfn %llx\n",
2126 __func__
, *sptep
, pt_access
,
2127 write_fault
, user_fault
, gfn
);
2129 if (is_rmap_spte(*sptep
)) {
2131 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2132 * the parent of the now unreachable PTE.
2134 if (level
> PT_PAGE_TABLE_LEVEL
&&
2135 !is_large_pte(*sptep
)) {
2136 struct kvm_mmu_page
*child
;
2139 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2140 mmu_page_remove_parent_pte(child
, sptep
);
2141 __set_spte(sptep
, shadow_trap_nonpresent_pte
);
2142 kvm_flush_remote_tlbs(vcpu
->kvm
);
2143 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2144 pgprintk("hfn old %llx new %llx\n",
2145 spte_to_pfn(*sptep
), pfn
);
2146 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
2147 kvm_flush_remote_tlbs(vcpu
->kvm
);
2152 if (set_spte(vcpu
, sptep
, pte_access
, user_fault
, write_fault
,
2153 dirty
, level
, gfn
, pfn
, speculative
, true,
2157 kvm_mmu_flush_tlb(vcpu
);
2160 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2161 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2162 is_large_pte(*sptep
)? "2MB" : "4kB",
2163 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2165 if (!was_rmapped
&& is_large_pte(*sptep
))
2166 ++vcpu
->kvm
->stat
.lpages
;
2168 page_header_update_slot(vcpu
->kvm
, sptep
, gfn
);
2170 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2171 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2172 rmap_recycle(vcpu
, sptep
, gfn
);
2174 kvm_release_pfn_clean(pfn
);
2176 vcpu
->arch
.last_pte_updated
= sptep
;
2177 vcpu
->arch
.last_pte_gfn
= gfn
;
2181 static void nonpaging_new_cr3(struct kvm_vcpu
*vcpu
)
2185 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2188 struct kvm_memory_slot
*slot
;
2191 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2194 return page_to_pfn(bad_page
);
2197 hva
= gfn_to_hva_memslot(slot
, gfn
);
2199 return hva_to_pfn_atomic(vcpu
->kvm
, hva
);
2202 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2203 struct kvm_mmu_page
*sp
,
2204 u64
*start
, u64
*end
)
2206 struct page
*pages
[PTE_PREFETCH_NUM
];
2207 unsigned access
= sp
->role
.access
;
2211 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2212 if (!gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
))
2215 ret
= gfn_to_page_many_atomic(vcpu
->kvm
, gfn
, pages
, end
- start
);
2219 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2220 mmu_set_spte(vcpu
, start
, ACC_ALL
,
2221 access
, 0, 0, 1, NULL
,
2222 sp
->role
.level
, gfn
,
2223 page_to_pfn(pages
[i
]), true, true);
2228 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2229 struct kvm_mmu_page
*sp
, u64
*sptep
)
2231 u64
*spte
, *start
= NULL
;
2234 WARN_ON(!sp
->role
.direct
);
2236 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2239 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2240 if (*spte
!= shadow_trap_nonpresent_pte
|| spte
== sptep
) {
2243 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2251 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2253 struct kvm_mmu_page
*sp
;
2256 * Since it's no accessed bit on EPT, it's no way to
2257 * distinguish between actually accessed translations
2258 * and prefetched, so disable pte prefetch if EPT is
2261 if (!shadow_accessed_mask
)
2264 sp
= page_header(__pa(sptep
));
2265 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2268 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2271 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2272 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2275 struct kvm_shadow_walk_iterator iterator
;
2276 struct kvm_mmu_page
*sp
;
2280 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2281 if (iterator
.level
== level
) {
2282 unsigned pte_access
= ACC_ALL
;
2284 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
, pte_access
,
2285 0, write
, 1, &pt_write
,
2286 level
, gfn
, pfn
, prefault
, map_writable
);
2287 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2288 ++vcpu
->stat
.pf_fixed
;
2292 if (*iterator
.sptep
== shadow_trap_nonpresent_pte
) {
2293 u64 base_addr
= iterator
.addr
;
2295 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2296 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2297 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2299 1, ACC_ALL
, iterator
.sptep
);
2301 pgprintk("nonpaging_map: ENOMEM\n");
2302 kvm_release_pfn_clean(pfn
);
2306 __set_spte(iterator
.sptep
,
2308 | PT_PRESENT_MASK
| PT_WRITABLE_MASK
2309 | shadow_user_mask
| shadow_x_mask
2310 | shadow_accessed_mask
);
2316 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2320 info
.si_signo
= SIGBUS
;
2322 info
.si_code
= BUS_MCEERR_AR
;
2323 info
.si_addr
= (void __user
*)address
;
2324 info
.si_addr_lsb
= PAGE_SHIFT
;
2326 send_sig_info(SIGBUS
, &info
, tsk
);
2329 static int kvm_handle_bad_page(struct kvm
*kvm
, gfn_t gfn
, pfn_t pfn
)
2331 kvm_release_pfn_clean(pfn
);
2332 if (is_hwpoison_pfn(pfn
)) {
2333 kvm_send_hwpoison_signal(gfn_to_hva(kvm
, gfn
), current
);
2335 } else if (is_fault_pfn(pfn
))
2341 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2342 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2346 int level
= *levelp
;
2349 * Check if it's a transparent hugepage. If this would be an
2350 * hugetlbfs page, level wouldn't be set to
2351 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2354 if (!is_error_pfn(pfn
) && !kvm_is_mmio_pfn(pfn
) &&
2355 level
== PT_PAGE_TABLE_LEVEL
&&
2356 PageTransCompound(pfn_to_page(pfn
)) &&
2357 !has_wrprotected_page(vcpu
->kvm
, gfn
, PT_DIRECTORY_LEVEL
)) {
2360 * mmu_notifier_retry was successful and we hold the
2361 * mmu_lock here, so the pmd can't become splitting
2362 * from under us, and in turn
2363 * __split_huge_page_refcount() can't run from under
2364 * us and we can safely transfer the refcount from
2365 * PG_tail to PG_head as we switch the pfn to tail to
2368 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2369 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2370 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2374 kvm_release_pfn_clean(pfn
);
2376 if (!get_page_unless_zero(pfn_to_page(pfn
)))
2383 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2384 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
2386 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, int write
, gfn_t gfn
,
2393 unsigned long mmu_seq
;
2396 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2397 if (likely(!force_pt_level
)) {
2398 level
= mapping_level(vcpu
, gfn
);
2400 * This path builds a PAE pagetable - so we can map
2401 * 2mb pages at maximum. Therefore check if the level
2402 * is larger than that.
2404 if (level
> PT_DIRECTORY_LEVEL
)
2405 level
= PT_DIRECTORY_LEVEL
;
2407 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2409 level
= PT_PAGE_TABLE_LEVEL
;
2411 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2414 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
2418 if (is_error_pfn(pfn
))
2419 return kvm_handle_bad_page(vcpu
->kvm
, gfn
, pfn
);
2421 spin_lock(&vcpu
->kvm
->mmu_lock
);
2422 if (mmu_notifier_retry(vcpu
, mmu_seq
))
2424 kvm_mmu_free_some_pages(vcpu
);
2425 if (likely(!force_pt_level
))
2426 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2427 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
2429 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2435 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2436 kvm_release_pfn_clean(pfn
);
2441 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
2444 struct kvm_mmu_page
*sp
;
2445 LIST_HEAD(invalid_list
);
2447 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2449 spin_lock(&vcpu
->kvm
->mmu_lock
);
2450 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
2451 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
2452 vcpu
->arch
.mmu
.direct_map
)) {
2453 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2455 sp
= page_header(root
);
2457 if (!sp
->root_count
&& sp
->role
.invalid
) {
2458 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
2459 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2461 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2462 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2465 for (i
= 0; i
< 4; ++i
) {
2466 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2469 root
&= PT64_BASE_ADDR_MASK
;
2470 sp
= page_header(root
);
2472 if (!sp
->root_count
&& sp
->role
.invalid
)
2473 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
2476 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
2478 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2479 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2480 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2483 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
2487 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
2488 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2495 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
2497 struct kvm_mmu_page
*sp
;
2500 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2501 spin_lock(&vcpu
->kvm
->mmu_lock
);
2502 kvm_mmu_free_some_pages(vcpu
);
2503 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
2506 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2507 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
2508 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
2509 for (i
= 0; i
< 4; ++i
) {
2510 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2512 ASSERT(!VALID_PAGE(root
));
2513 spin_lock(&vcpu
->kvm
->mmu_lock
);
2514 kvm_mmu_free_some_pages(vcpu
);
2515 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
2517 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
2519 root
= __pa(sp
->spt
);
2521 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2522 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
2524 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2531 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
2533 struct kvm_mmu_page
*sp
;
2538 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
2540 if (mmu_check_root(vcpu
, root_gfn
))
2544 * Do we shadow a long mode page table? If so we need to
2545 * write-protect the guests page table root.
2547 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2548 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2550 ASSERT(!VALID_PAGE(root
));
2552 spin_lock(&vcpu
->kvm
->mmu_lock
);
2553 kvm_mmu_free_some_pages(vcpu
);
2554 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
2556 root
= __pa(sp
->spt
);
2558 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2559 vcpu
->arch
.mmu
.root_hpa
= root
;
2564 * We shadow a 32 bit page table. This may be a legacy 2-level
2565 * or a PAE 3-level page table. In either case we need to be aware that
2566 * the shadow page table may be a PAE or a long mode page table.
2568 pm_mask
= PT_PRESENT_MASK
;
2569 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
2570 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
2572 for (i
= 0; i
< 4; ++i
) {
2573 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2575 ASSERT(!VALID_PAGE(root
));
2576 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
2577 pdptr
= kvm_pdptr_read_mmu(vcpu
, &vcpu
->arch
.mmu
, i
);
2578 if (!is_present_gpte(pdptr
)) {
2579 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
2582 root_gfn
= pdptr
>> PAGE_SHIFT
;
2583 if (mmu_check_root(vcpu
, root_gfn
))
2586 spin_lock(&vcpu
->kvm
->mmu_lock
);
2587 kvm_mmu_free_some_pages(vcpu
);
2588 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
2591 root
= __pa(sp
->spt
);
2593 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2595 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
2597 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2600 * If we shadow a 32 bit page table with a long mode page
2601 * table we enter this path.
2603 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2604 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
2606 * The additional page necessary for this is only
2607 * allocated on demand.
2612 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
2613 if (lm_root
== NULL
)
2616 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
2618 vcpu
->arch
.mmu
.lm_root
= lm_root
;
2621 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
2627 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
2629 if (vcpu
->arch
.mmu
.direct_map
)
2630 return mmu_alloc_direct_roots(vcpu
);
2632 return mmu_alloc_shadow_roots(vcpu
);
2635 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2638 struct kvm_mmu_page
*sp
;
2640 if (vcpu
->arch
.mmu
.direct_map
)
2643 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2646 trace_kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
2647 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2648 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2649 sp
= page_header(root
);
2650 mmu_sync_children(vcpu
, sp
);
2651 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
2654 for (i
= 0; i
< 4; ++i
) {
2655 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2657 if (root
&& VALID_PAGE(root
)) {
2658 root
&= PT64_BASE_ADDR_MASK
;
2659 sp
= page_header(root
);
2660 mmu_sync_children(vcpu
, sp
);
2663 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
2666 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2668 spin_lock(&vcpu
->kvm
->mmu_lock
);
2669 mmu_sync_roots(vcpu
);
2670 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2673 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2674 u32 access
, struct x86_exception
*exception
)
2677 exception
->error_code
= 0;
2681 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2683 struct x86_exception
*exception
)
2686 exception
->error_code
= 0;
2687 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
);
2690 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
2691 u32 error_code
, bool prefault
)
2696 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
2697 r
= mmu_topup_memory_caches(vcpu
);
2702 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2704 gfn
= gva
>> PAGE_SHIFT
;
2706 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
2707 error_code
& PFERR_WRITE_MASK
, gfn
, prefault
);
2710 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
2712 struct kvm_arch_async_pf arch
;
2714 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
2716 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
2717 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
2719 return kvm_setup_async_pf(vcpu
, gva
, gfn
, &arch
);
2722 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
2724 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
) ||
2725 kvm_event_needs_reinjection(vcpu
)))
2728 return kvm_x86_ops
->interrupt_allowed(vcpu
);
2731 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2732 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
2736 *pfn
= gfn_to_pfn_async(vcpu
->kvm
, gfn
, &async
, write
, writable
);
2739 return false; /* *pfn has correct page already */
2741 put_page(pfn_to_page(*pfn
));
2743 if (!prefault
&& can_do_async_pf(vcpu
)) {
2744 trace_kvm_try_async_get_page(gva
, gfn
);
2745 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
2746 trace_kvm_async_pf_doublefault(gva
, gfn
);
2747 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
2749 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
2753 *pfn
= gfn_to_pfn_prot(vcpu
->kvm
, gfn
, write
, writable
);
2758 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
2765 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
2766 unsigned long mmu_seq
;
2767 int write
= error_code
& PFERR_WRITE_MASK
;
2771 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2773 r
= mmu_topup_memory_caches(vcpu
);
2777 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2778 if (likely(!force_pt_level
)) {
2779 level
= mapping_level(vcpu
, gfn
);
2780 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2782 level
= PT_PAGE_TABLE_LEVEL
;
2784 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2787 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
2791 if (is_error_pfn(pfn
))
2792 return kvm_handle_bad_page(vcpu
->kvm
, gfn
, pfn
);
2793 spin_lock(&vcpu
->kvm
->mmu_lock
);
2794 if (mmu_notifier_retry(vcpu
, mmu_seq
))
2796 kvm_mmu_free_some_pages(vcpu
);
2797 if (likely(!force_pt_level
))
2798 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2799 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
2800 level
, gfn
, pfn
, prefault
);
2801 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2806 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2807 kvm_release_pfn_clean(pfn
);
2811 static void nonpaging_free(struct kvm_vcpu
*vcpu
)
2813 mmu_free_roots(vcpu
);
2816 static int nonpaging_init_context(struct kvm_vcpu
*vcpu
,
2817 struct kvm_mmu
*context
)
2819 context
->new_cr3
= nonpaging_new_cr3
;
2820 context
->page_fault
= nonpaging_page_fault
;
2821 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
2822 context
->free
= nonpaging_free
;
2823 context
->prefetch_page
= nonpaging_prefetch_page
;
2824 context
->sync_page
= nonpaging_sync_page
;
2825 context
->invlpg
= nonpaging_invlpg
;
2826 context
->update_pte
= nonpaging_update_pte
;
2827 context
->root_level
= 0;
2828 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
2829 context
->root_hpa
= INVALID_PAGE
;
2830 context
->direct_map
= true;
2831 context
->nx
= false;
2835 void kvm_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
2837 ++vcpu
->stat
.tlb_flush
;
2838 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
2841 static void paging_new_cr3(struct kvm_vcpu
*vcpu
)
2843 pgprintk("%s: cr3 %lx\n", __func__
, kvm_read_cr3(vcpu
));
2844 mmu_free_roots(vcpu
);
2847 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
2849 return kvm_read_cr3(vcpu
);
2852 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
2853 struct x86_exception
*fault
)
2855 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
2858 static void paging_free(struct kvm_vcpu
*vcpu
)
2860 nonpaging_free(vcpu
);
2863 static bool is_rsvd_bits_set(struct kvm_mmu
*mmu
, u64 gpte
, int level
)
2867 bit7
= (gpte
>> 7) & 1;
2868 return (gpte
& mmu
->rsvd_bits_mask
[bit7
][level
-1]) != 0;
2872 #include "paging_tmpl.h"
2876 #include "paging_tmpl.h"
2879 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
2880 struct kvm_mmu
*context
,
2883 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
2884 u64 exb_bit_rsvd
= 0;
2887 exb_bit_rsvd
= rsvd_bits(63, 63);
2889 case PT32_ROOT_LEVEL
:
2890 /* no rsvd bits for 2 level 4K page table entries */
2891 context
->rsvd_bits_mask
[0][1] = 0;
2892 context
->rsvd_bits_mask
[0][0] = 0;
2893 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2895 if (!is_pse(vcpu
)) {
2896 context
->rsvd_bits_mask
[1][1] = 0;
2900 if (is_cpuid_PSE36())
2901 /* 36bits PSE 4MB page */
2902 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
2904 /* 32 bits PSE 4MB page */
2905 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
2907 case PT32E_ROOT_LEVEL
:
2908 context
->rsvd_bits_mask
[0][2] =
2909 rsvd_bits(maxphyaddr
, 63) |
2910 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2911 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
2912 rsvd_bits(maxphyaddr
, 62); /* PDE */
2913 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
2914 rsvd_bits(maxphyaddr
, 62); /* PTE */
2915 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
2916 rsvd_bits(maxphyaddr
, 62) |
2917 rsvd_bits(13, 20); /* large page */
2918 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2920 case PT64_ROOT_LEVEL
:
2921 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
2922 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
2923 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
2924 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
2925 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
2926 rsvd_bits(maxphyaddr
, 51);
2927 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
2928 rsvd_bits(maxphyaddr
, 51);
2929 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
2930 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
2931 rsvd_bits(maxphyaddr
, 51) |
2933 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
2934 rsvd_bits(maxphyaddr
, 51) |
2935 rsvd_bits(13, 20); /* large page */
2936 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2941 static int paging64_init_context_common(struct kvm_vcpu
*vcpu
,
2942 struct kvm_mmu
*context
,
2945 context
->nx
= is_nx(vcpu
);
2947 reset_rsvds_bits_mask(vcpu
, context
, level
);
2949 ASSERT(is_pae(vcpu
));
2950 context
->new_cr3
= paging_new_cr3
;
2951 context
->page_fault
= paging64_page_fault
;
2952 context
->gva_to_gpa
= paging64_gva_to_gpa
;
2953 context
->prefetch_page
= paging64_prefetch_page
;
2954 context
->sync_page
= paging64_sync_page
;
2955 context
->invlpg
= paging64_invlpg
;
2956 context
->update_pte
= paging64_update_pte
;
2957 context
->free
= paging_free
;
2958 context
->root_level
= level
;
2959 context
->shadow_root_level
= level
;
2960 context
->root_hpa
= INVALID_PAGE
;
2961 context
->direct_map
= false;
2965 static int paging64_init_context(struct kvm_vcpu
*vcpu
,
2966 struct kvm_mmu
*context
)
2968 return paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
2971 static int paging32_init_context(struct kvm_vcpu
*vcpu
,
2972 struct kvm_mmu
*context
)
2974 context
->nx
= false;
2976 reset_rsvds_bits_mask(vcpu
, context
, PT32_ROOT_LEVEL
);
2978 context
->new_cr3
= paging_new_cr3
;
2979 context
->page_fault
= paging32_page_fault
;
2980 context
->gva_to_gpa
= paging32_gva_to_gpa
;
2981 context
->free
= paging_free
;
2982 context
->prefetch_page
= paging32_prefetch_page
;
2983 context
->sync_page
= paging32_sync_page
;
2984 context
->invlpg
= paging32_invlpg
;
2985 context
->update_pte
= paging32_update_pte
;
2986 context
->root_level
= PT32_ROOT_LEVEL
;
2987 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
2988 context
->root_hpa
= INVALID_PAGE
;
2989 context
->direct_map
= false;
2993 static int paging32E_init_context(struct kvm_vcpu
*vcpu
,
2994 struct kvm_mmu
*context
)
2996 return paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
2999 static int init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
3001 struct kvm_mmu
*context
= vcpu
->arch
.walk_mmu
;
3003 context
->base_role
.word
= 0;
3004 context
->new_cr3
= nonpaging_new_cr3
;
3005 context
->page_fault
= tdp_page_fault
;
3006 context
->free
= nonpaging_free
;
3007 context
->prefetch_page
= nonpaging_prefetch_page
;
3008 context
->sync_page
= nonpaging_sync_page
;
3009 context
->invlpg
= nonpaging_invlpg
;
3010 context
->update_pte
= nonpaging_update_pte
;
3011 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3012 context
->root_hpa
= INVALID_PAGE
;
3013 context
->direct_map
= true;
3014 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
3015 context
->get_cr3
= get_cr3
;
3016 context
->inject_page_fault
= kvm_inject_page_fault
;
3017 context
->nx
= is_nx(vcpu
);
3019 if (!is_paging(vcpu
)) {
3020 context
->nx
= false;
3021 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3022 context
->root_level
= 0;
3023 } else if (is_long_mode(vcpu
)) {
3024 context
->nx
= is_nx(vcpu
);
3025 reset_rsvds_bits_mask(vcpu
, context
, PT64_ROOT_LEVEL
);
3026 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3027 context
->root_level
= PT64_ROOT_LEVEL
;
3028 } else if (is_pae(vcpu
)) {
3029 context
->nx
= is_nx(vcpu
);
3030 reset_rsvds_bits_mask(vcpu
, context
, PT32E_ROOT_LEVEL
);
3031 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3032 context
->root_level
= PT32E_ROOT_LEVEL
;
3034 context
->nx
= false;
3035 reset_rsvds_bits_mask(vcpu
, context
, PT32_ROOT_LEVEL
);
3036 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3037 context
->root_level
= PT32_ROOT_LEVEL
;
3043 int kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
3047 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3049 if (!is_paging(vcpu
))
3050 r
= nonpaging_init_context(vcpu
, context
);
3051 else if (is_long_mode(vcpu
))
3052 r
= paging64_init_context(vcpu
, context
);
3053 else if (is_pae(vcpu
))
3054 r
= paging32E_init_context(vcpu
, context
);
3056 r
= paging32_init_context(vcpu
, context
);
3058 vcpu
->arch
.mmu
.base_role
.cr4_pae
= !!is_pae(vcpu
);
3059 vcpu
->arch
.mmu
.base_role
.cr0_wp
= is_write_protection(vcpu
);
3063 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
3065 static int init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
3067 int r
= kvm_init_shadow_mmu(vcpu
, vcpu
->arch
.walk_mmu
);
3069 vcpu
->arch
.walk_mmu
->set_cr3
= kvm_x86_ops
->set_cr3
;
3070 vcpu
->arch
.walk_mmu
->get_cr3
= get_cr3
;
3071 vcpu
->arch
.walk_mmu
->inject_page_fault
= kvm_inject_page_fault
;
3076 static int init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
3078 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
3080 g_context
->get_cr3
= get_cr3
;
3081 g_context
->inject_page_fault
= kvm_inject_page_fault
;
3084 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3085 * translation of l2_gpa to l1_gpa addresses is done using the
3086 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3087 * functions between mmu and nested_mmu are swapped.
3089 if (!is_paging(vcpu
)) {
3090 g_context
->nx
= false;
3091 g_context
->root_level
= 0;
3092 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
3093 } else if (is_long_mode(vcpu
)) {
3094 g_context
->nx
= is_nx(vcpu
);
3095 reset_rsvds_bits_mask(vcpu
, g_context
, PT64_ROOT_LEVEL
);
3096 g_context
->root_level
= PT64_ROOT_LEVEL
;
3097 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3098 } else if (is_pae(vcpu
)) {
3099 g_context
->nx
= is_nx(vcpu
);
3100 reset_rsvds_bits_mask(vcpu
, g_context
, PT32E_ROOT_LEVEL
);
3101 g_context
->root_level
= PT32E_ROOT_LEVEL
;
3102 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3104 g_context
->nx
= false;
3105 reset_rsvds_bits_mask(vcpu
, g_context
, PT32_ROOT_LEVEL
);
3106 g_context
->root_level
= PT32_ROOT_LEVEL
;
3107 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
3113 static int init_kvm_mmu(struct kvm_vcpu
*vcpu
)
3115 if (mmu_is_nested(vcpu
))
3116 return init_kvm_nested_mmu(vcpu
);
3117 else if (tdp_enabled
)
3118 return init_kvm_tdp_mmu(vcpu
);
3120 return init_kvm_softmmu(vcpu
);
3123 static void destroy_kvm_mmu(struct kvm_vcpu
*vcpu
)
3126 if (VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3127 /* mmu.free() should set root_hpa = INVALID_PAGE */
3128 vcpu
->arch
.mmu
.free(vcpu
);
3131 int kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
3133 destroy_kvm_mmu(vcpu
);
3134 return init_kvm_mmu(vcpu
);
3136 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
3138 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
3142 r
= mmu_topup_memory_caches(vcpu
);
3145 r
= mmu_alloc_roots(vcpu
);
3146 spin_lock(&vcpu
->kvm
->mmu_lock
);
3147 mmu_sync_roots(vcpu
);
3148 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3151 /* set_cr3() should ensure TLB has been flushed */
3152 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
3156 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
3158 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
3160 mmu_free_roots(vcpu
);
3162 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
3164 static void mmu_pte_write_zap_pte(struct kvm_vcpu
*vcpu
,
3165 struct kvm_mmu_page
*sp
,
3169 struct kvm_mmu_page
*child
;
3172 if (is_shadow_present_pte(pte
)) {
3173 if (is_last_spte(pte
, sp
->role
.level
))
3174 drop_spte(vcpu
->kvm
, spte
, shadow_trap_nonpresent_pte
);
3176 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
3177 mmu_page_remove_parent_pte(child
, spte
);
3180 __set_spte(spte
, shadow_trap_nonpresent_pte
);
3181 if (is_large_pte(pte
))
3182 --vcpu
->kvm
->stat
.lpages
;
3185 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
3186 struct kvm_mmu_page
*sp
, u64
*spte
,
3189 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
3190 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
3194 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
3195 vcpu
->arch
.mmu
.update_pte(vcpu
, sp
, spte
, new);
3198 static bool need_remote_flush(u64 old
, u64
new)
3200 if (!is_shadow_present_pte(old
))
3202 if (!is_shadow_present_pte(new))
3204 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
3206 old
^= PT64_NX_MASK
;
3207 new ^= PT64_NX_MASK
;
3208 return (old
& ~new & PT64_PERM_MASK
) != 0;
3211 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
3212 bool remote_flush
, bool local_flush
)
3218 kvm_flush_remote_tlbs(vcpu
->kvm
);
3219 else if (local_flush
)
3220 kvm_mmu_flush_tlb(vcpu
);
3223 static bool last_updated_pte_accessed(struct kvm_vcpu
*vcpu
)
3225 u64
*spte
= vcpu
->arch
.last_pte_updated
;
3227 return !!(spte
&& (*spte
& shadow_accessed_mask
));
3230 static void kvm_mmu_access_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
3232 u64
*spte
= vcpu
->arch
.last_pte_updated
;
3235 && vcpu
->arch
.last_pte_gfn
== gfn
3236 && shadow_accessed_mask
3237 && !(*spte
& shadow_accessed_mask
)
3238 && is_shadow_present_pte(*spte
))
3239 set_bit(PT_ACCESSED_SHIFT
, (unsigned long *)spte
);
3242 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3243 const u8
*new, int bytes
,
3244 bool guest_initiated
)
3246 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3247 union kvm_mmu_page_role mask
= { .word
= 0 };
3248 struct kvm_mmu_page
*sp
;
3249 struct hlist_node
*node
;
3250 LIST_HEAD(invalid_list
);
3251 u64 entry
, gentry
, *spte
;
3252 unsigned pte_size
, page_offset
, misaligned
, quadrant
, offset
;
3253 int level
, npte
, invlpg_counter
, r
, flooded
= 0;
3254 bool remote_flush
, local_flush
, zap_page
;
3257 * If we don't have indirect shadow pages, it means no page is
3258 * write-protected, so we can exit simply.
3260 if (!ACCESS_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
3263 zap_page
= remote_flush
= local_flush
= false;
3264 offset
= offset_in_page(gpa
);
3266 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
3268 invlpg_counter
= atomic_read(&vcpu
->kvm
->arch
.invlpg_counter
);
3271 * Assume that the pte write on a page table of the same type
3272 * as the current vcpu paging mode since we update the sptes only
3273 * when they have the same mode.
3275 if ((is_pae(vcpu
) && bytes
== 4) || !new) {
3276 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3281 r
= kvm_read_guest(vcpu
->kvm
, gpa
, &gentry
, min(bytes
, 8));
3284 new = (const u8
*)&gentry
;
3289 gentry
= *(const u32
*)new;
3292 gentry
= *(const u64
*)new;
3299 spin_lock(&vcpu
->kvm
->mmu_lock
);
3300 if (atomic_read(&vcpu
->kvm
->arch
.invlpg_counter
) != invlpg_counter
)
3302 kvm_mmu_free_some_pages(vcpu
);
3303 ++vcpu
->kvm
->stat
.mmu_pte_write
;
3304 trace_kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
3305 if (guest_initiated
) {
3306 kvm_mmu_access_page(vcpu
, gfn
);
3307 if (gfn
== vcpu
->arch
.last_pt_write_gfn
3308 && !last_updated_pte_accessed(vcpu
)) {
3309 ++vcpu
->arch
.last_pt_write_count
;
3310 if (vcpu
->arch
.last_pt_write_count
>= 3)
3313 vcpu
->arch
.last_pt_write_gfn
= gfn
;
3314 vcpu
->arch
.last_pt_write_count
= 1;
3315 vcpu
->arch
.last_pte_updated
= NULL
;
3319 mask
.cr0_wp
= mask
.cr4_pae
= mask
.nxe
= 1;
3320 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
, node
) {
3321 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
3322 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
3323 misaligned
|= bytes
< 4;
3324 if (misaligned
|| flooded
) {
3326 * Misaligned accesses are too much trouble to fix
3327 * up; also, they usually indicate a page is not used
3330 * If we're seeing too many writes to a page,
3331 * it may no longer be a page table, or we may be
3332 * forking, in which case it is better to unmap the
3335 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3336 gpa
, bytes
, sp
->role
.word
);
3337 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3339 ++vcpu
->kvm
->stat
.mmu_flooded
;
3342 page_offset
= offset
;
3343 level
= sp
->role
.level
;
3345 if (!sp
->role
.cr4_pae
) {
3346 page_offset
<<= 1; /* 32->64 */
3348 * A 32-bit pde maps 4MB while the shadow pdes map
3349 * only 2MB. So we need to double the offset again
3350 * and zap two pdes instead of one.
3352 if (level
== PT32_ROOT_LEVEL
) {
3353 page_offset
&= ~7; /* kill rounding error */
3357 quadrant
= page_offset
>> PAGE_SHIFT
;
3358 page_offset
&= ~PAGE_MASK
;
3359 if (quadrant
!= sp
->role
.quadrant
)
3363 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
3366 mmu_pte_write_zap_pte(vcpu
, sp
, spte
);
3368 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
3370 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
3371 if (!remote_flush
&& need_remote_flush(entry
, *spte
))
3372 remote_flush
= true;
3376 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
3377 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3378 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
3379 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3382 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
3387 if (vcpu
->arch
.mmu
.direct_map
)
3390 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
3392 spin_lock(&vcpu
->kvm
->mmu_lock
);
3393 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3394 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3397 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
3399 void __kvm_mmu_free_some_pages(struct kvm_vcpu
*vcpu
)
3401 LIST_HEAD(invalid_list
);
3403 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
&&
3404 !list_empty(&vcpu
->kvm
->arch
.active_mmu_pages
)) {
3405 struct kvm_mmu_page
*sp
;
3407 sp
= container_of(vcpu
->kvm
->arch
.active_mmu_pages
.prev
,
3408 struct kvm_mmu_page
, link
);
3409 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
3410 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3411 ++vcpu
->kvm
->stat
.mmu_recycled
;
3415 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
3416 void *insn
, int insn_len
)
3419 enum emulation_result er
;
3421 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
3430 r
= mmu_topup_memory_caches(vcpu
);
3434 er
= x86_emulate_instruction(vcpu
, cr2
, 0, insn
, insn_len
);
3439 case EMULATE_DO_MMIO
:
3440 ++vcpu
->stat
.mmio_exits
;
3450 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
3452 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
3454 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
3455 kvm_mmu_flush_tlb(vcpu
);
3456 ++vcpu
->stat
.invlpg
;
3458 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
3460 void kvm_enable_tdp(void)
3464 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
3466 void kvm_disable_tdp(void)
3468 tdp_enabled
= false;
3470 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
3472 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
3474 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
3475 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
3476 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
3479 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
3487 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3488 * Therefore we need to allocate shadow page tables in the first
3489 * 4GB of memory, which happens to fit the DMA32 zone.
3491 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
3495 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
3496 for (i
= 0; i
< 4; ++i
)
3497 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
3502 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
3505 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3507 return alloc_mmu_pages(vcpu
);
3510 int kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
3513 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3515 return init_kvm_mmu(vcpu
);
3518 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
, int slot
)
3520 struct kvm_mmu_page
*sp
;
3522 list_for_each_entry(sp
, &kvm
->arch
.active_mmu_pages
, link
) {
3526 if (!test_bit(slot
, sp
->slot_bitmap
))
3530 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
3531 if (!is_shadow_present_pte(pt
[i
]) ||
3532 !is_last_spte(pt
[i
], sp
->role
.level
))
3535 if (is_large_pte(pt
[i
])) {
3536 drop_spte(kvm
, &pt
[i
],
3537 shadow_trap_nonpresent_pte
);
3543 if (is_writable_pte(pt
[i
]))
3544 update_spte(&pt
[i
], pt
[i
] & ~PT_WRITABLE_MASK
);
3547 kvm_flush_remote_tlbs(kvm
);
3550 void kvm_mmu_zap_all(struct kvm
*kvm
)
3552 struct kvm_mmu_page
*sp
, *node
;
3553 LIST_HEAD(invalid_list
);
3555 spin_lock(&kvm
->mmu_lock
);
3557 list_for_each_entry_safe(sp
, node
, &kvm
->arch
.active_mmu_pages
, link
)
3558 if (kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
))
3561 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3562 spin_unlock(&kvm
->mmu_lock
);
3565 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm
*kvm
,
3566 struct list_head
*invalid_list
)
3568 struct kvm_mmu_page
*page
;
3570 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
3571 struct kvm_mmu_page
, link
);
3572 return kvm_mmu_prepare_zap_page(kvm
, page
, invalid_list
);
3575 static int mmu_shrink(struct shrinker
*shrink
, struct shrink_control
*sc
)
3578 struct kvm
*kvm_freed
= NULL
;
3579 int nr_to_scan
= sc
->nr_to_scan
;
3581 if (nr_to_scan
== 0)
3584 raw_spin_lock(&kvm_lock
);
3586 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3587 int idx
, freed_pages
;
3588 LIST_HEAD(invalid_list
);
3590 idx
= srcu_read_lock(&kvm
->srcu
);
3591 spin_lock(&kvm
->mmu_lock
);
3592 if (!kvm_freed
&& nr_to_scan
> 0 &&
3593 kvm
->arch
.n_used_mmu_pages
> 0) {
3594 freed_pages
= kvm_mmu_remove_some_alloc_mmu_pages(kvm
,
3600 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3601 spin_unlock(&kvm
->mmu_lock
);
3602 srcu_read_unlock(&kvm
->srcu
, idx
);
3605 list_move_tail(&kvm_freed
->vm_list
, &vm_list
);
3607 raw_spin_unlock(&kvm_lock
);
3610 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
3613 static struct shrinker mmu_shrinker
= {
3614 .shrink
= mmu_shrink
,
3615 .seeks
= DEFAULT_SEEKS
* 10,
3618 static void mmu_destroy_caches(void)
3620 if (pte_chain_cache
)
3621 kmem_cache_destroy(pte_chain_cache
);
3622 if (pte_list_desc_cache
)
3623 kmem_cache_destroy(pte_list_desc_cache
);
3624 if (mmu_page_header_cache
)
3625 kmem_cache_destroy(mmu_page_header_cache
);
3628 int kvm_mmu_module_init(void)
3630 pte_chain_cache
= kmem_cache_create("kvm_pte_chain",
3631 sizeof(struct kvm_pte_chain
),
3633 if (!pte_chain_cache
)
3635 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
3636 sizeof(struct pte_list_desc
),
3638 if (!pte_list_desc_cache
)
3641 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
3642 sizeof(struct kvm_mmu_page
),
3644 if (!mmu_page_header_cache
)
3647 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0))
3650 register_shrinker(&mmu_shrinker
);
3655 mmu_destroy_caches();
3660 * Caculate mmu pages needed for kvm.
3662 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
3665 unsigned int nr_mmu_pages
;
3666 unsigned int nr_pages
= 0;
3667 struct kvm_memslots
*slots
;
3669 slots
= kvm_memslots(kvm
);
3671 for (i
= 0; i
< slots
->nmemslots
; i
++)
3672 nr_pages
+= slots
->memslots
[i
].npages
;
3674 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
3675 nr_mmu_pages
= max(nr_mmu_pages
,
3676 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
3678 return nr_mmu_pages
;
3681 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer
*buffer
,
3684 if (len
> buffer
->len
)
3689 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer
*buffer
,
3694 ret
= pv_mmu_peek_buffer(buffer
, len
);
3699 buffer
->processed
+= len
;
3703 static int kvm_pv_mmu_write(struct kvm_vcpu
*vcpu
,
3704 gpa_t addr
, gpa_t value
)
3709 if (!is_long_mode(vcpu
) && !is_pae(vcpu
))
3712 r
= mmu_topup_memory_caches(vcpu
);
3716 if (!emulator_write_phys(vcpu
, addr
, &value
, bytes
))
3722 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
3724 (void)kvm_set_cr3(vcpu
, kvm_read_cr3(vcpu
));
3728 static int kvm_pv_mmu_release_pt(struct kvm_vcpu
*vcpu
, gpa_t addr
)
3730 spin_lock(&vcpu
->kvm
->mmu_lock
);
3731 mmu_unshadow(vcpu
->kvm
, addr
>> PAGE_SHIFT
);
3732 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3736 static int kvm_pv_mmu_op_one(struct kvm_vcpu
*vcpu
,
3737 struct kvm_pv_mmu_op_buffer
*buffer
)
3739 struct kvm_mmu_op_header
*header
;
3741 header
= pv_mmu_peek_buffer(buffer
, sizeof *header
);
3744 switch (header
->op
) {
3745 case KVM_MMU_OP_WRITE_PTE
: {
3746 struct kvm_mmu_op_write_pte
*wpte
;
3748 wpte
= pv_mmu_read_buffer(buffer
, sizeof *wpte
);
3751 return kvm_pv_mmu_write(vcpu
, wpte
->pte_phys
,
3754 case KVM_MMU_OP_FLUSH_TLB
: {
3755 struct kvm_mmu_op_flush_tlb
*ftlb
;
3757 ftlb
= pv_mmu_read_buffer(buffer
, sizeof *ftlb
);
3760 return kvm_pv_mmu_flush_tlb(vcpu
);
3762 case KVM_MMU_OP_RELEASE_PT
: {
3763 struct kvm_mmu_op_release_pt
*rpt
;
3765 rpt
= pv_mmu_read_buffer(buffer
, sizeof *rpt
);
3768 return kvm_pv_mmu_release_pt(vcpu
, rpt
->pt_phys
);
3774 int kvm_pv_mmu_op(struct kvm_vcpu
*vcpu
, unsigned long bytes
,
3775 gpa_t addr
, unsigned long *ret
)
3778 struct kvm_pv_mmu_op_buffer
*buffer
= &vcpu
->arch
.mmu_op_buffer
;
3780 buffer
->ptr
= buffer
->buf
;
3781 buffer
->len
= min_t(unsigned long, bytes
, sizeof buffer
->buf
);
3782 buffer
->processed
= 0;
3784 r
= kvm_read_guest(vcpu
->kvm
, addr
, buffer
->buf
, buffer
->len
);
3788 while (buffer
->len
) {
3789 r
= kvm_pv_mmu_op_one(vcpu
, buffer
);
3798 *ret
= buffer
->processed
;
3802 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
3804 struct kvm_shadow_walk_iterator iterator
;
3807 spin_lock(&vcpu
->kvm
->mmu_lock
);
3808 for_each_shadow_entry(vcpu
, addr
, iterator
) {
3809 sptes
[iterator
.level
-1] = *iterator
.sptep
;
3811 if (!is_shadow_present_pte(*iterator
.sptep
))
3814 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3818 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
3820 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
3824 destroy_kvm_mmu(vcpu
);
3825 free_mmu_pages(vcpu
);
3826 mmu_free_memory_caches(vcpu
);
3829 #ifdef CONFIG_KVM_MMU_AUDIT
3830 #include "mmu_audit.c"
3832 static void mmu_audit_disable(void) { }
3835 void kvm_mmu_module_exit(void)
3837 mmu_destroy_caches();
3838 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
3839 unregister_shrinker(&mmu_shrinker
);
3840 mmu_audit_disable();