2 * Kernel-based Virtual Machine driver for Linux
6 * Copyright (C) 2006 Qumranet, Inc.
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
16 #include <linux/kvm_host.h>
21 #include "kvm_cache_regs.h"
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/vmalloc.h>
26 #include <linux/highmem.h>
27 #include <linux/sched.h>
31 #include <asm/virtext.h>
33 #define __ex(x) __kvm_handle_fault_on_reboot(x)
35 MODULE_AUTHOR("Qumranet");
36 MODULE_LICENSE("GPL");
38 #define IOPM_ALLOC_ORDER 2
39 #define MSRPM_ALLOC_ORDER 1
41 #define DR7_GD_MASK (1 << 13)
42 #define DR6_BD_MASK (1 << 13)
44 #define SEG_TYPE_LDT 2
45 #define SEG_TYPE_BUSY_TSS16 3
47 #define SVM_FEATURE_NPT (1 << 0)
48 #define SVM_FEATURE_LBRV (1 << 1)
49 #define SVM_FEATURE_SVML (1 << 2)
51 #define DEBUGCTL_RESERVED_BITS (~(0x3fULL))
53 /* enable NPT for AMD64 and X86 with PAE */
54 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
55 static bool npt_enabled
= true;
57 static bool npt_enabled
= false;
61 module_param(npt
, int, S_IRUGO
);
63 static void kvm_reput_irq(struct vcpu_svm
*svm
);
64 static void svm_flush_tlb(struct kvm_vcpu
*vcpu
);
66 static inline struct vcpu_svm
*to_svm(struct kvm_vcpu
*vcpu
)
68 return container_of(vcpu
, struct vcpu_svm
, vcpu
);
71 static unsigned long iopm_base
;
73 struct kvm_ldttss_desc
{
76 unsigned base1
: 8, type
: 5, dpl
: 2, p
: 1;
77 unsigned limit1
: 4, zero0
: 3, g
: 1, base2
: 8;
80 } __attribute__((packed
));
88 struct kvm_ldttss_desc
*tss_desc
;
90 struct page
*save_area
;
93 static DEFINE_PER_CPU(struct svm_cpu_data
*, svm_data
);
94 static uint32_t svm_features
;
96 struct svm_init_data
{
101 static u32 msrpm_ranges
[] = {0, 0xc0000000, 0xc0010000};
103 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
104 #define MSRS_RANGE_SIZE 2048
105 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
107 #define MAX_INST_SIZE 15
109 static inline u32
svm_has(u32 feat
)
111 return svm_features
& feat
;
114 static inline u8
pop_irq(struct kvm_vcpu
*vcpu
)
116 int word_index
= __ffs(vcpu
->arch
.irq_summary
);
117 int bit_index
= __ffs(vcpu
->arch
.irq_pending
[word_index
]);
118 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
120 clear_bit(bit_index
, &vcpu
->arch
.irq_pending
[word_index
]);
121 if (!vcpu
->arch
.irq_pending
[word_index
])
122 clear_bit(word_index
, &vcpu
->arch
.irq_summary
);
126 static inline void push_irq(struct kvm_vcpu
*vcpu
, u8 irq
)
128 set_bit(irq
, vcpu
->arch
.irq_pending
);
129 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->arch
.irq_summary
);
132 static inline void clgi(void)
134 asm volatile (__ex(SVM_CLGI
));
137 static inline void stgi(void)
139 asm volatile (__ex(SVM_STGI
));
142 static inline void invlpga(unsigned long addr
, u32 asid
)
144 asm volatile (__ex(SVM_INVLPGA
) :: "a"(addr
), "c"(asid
));
147 static inline unsigned long kvm_read_cr2(void)
151 asm volatile ("mov %%cr2, %0" : "=r" (cr2
));
155 static inline void kvm_write_cr2(unsigned long val
)
157 asm volatile ("mov %0, %%cr2" :: "r" (val
));
160 static inline unsigned long read_dr6(void)
164 asm volatile ("mov %%dr6, %0" : "=r" (dr6
));
168 static inline void write_dr6(unsigned long val
)
170 asm volatile ("mov %0, %%dr6" :: "r" (val
));
173 static inline unsigned long read_dr7(void)
177 asm volatile ("mov %%dr7, %0" : "=r" (dr7
));
181 static inline void write_dr7(unsigned long val
)
183 asm volatile ("mov %0, %%dr7" :: "r" (val
));
186 static inline void force_new_asid(struct kvm_vcpu
*vcpu
)
188 to_svm(vcpu
)->asid_generation
--;
191 static inline void flush_guest_tlb(struct kvm_vcpu
*vcpu
)
193 force_new_asid(vcpu
);
196 static void svm_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
198 if (!npt_enabled
&& !(efer
& EFER_LMA
))
201 to_svm(vcpu
)->vmcb
->save
.efer
= efer
| MSR_EFER_SVME_MASK
;
202 vcpu
->arch
.shadow_efer
= efer
;
205 static void svm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
,
206 bool has_error_code
, u32 error_code
)
208 struct vcpu_svm
*svm
= to_svm(vcpu
);
210 svm
->vmcb
->control
.event_inj
= nr
212 | (has_error_code
? SVM_EVTINJ_VALID_ERR
: 0)
213 | SVM_EVTINJ_TYPE_EXEPT
;
214 svm
->vmcb
->control
.event_inj_err
= error_code
;
217 static bool svm_exception_injected(struct kvm_vcpu
*vcpu
)
219 struct vcpu_svm
*svm
= to_svm(vcpu
);
221 return !(svm
->vmcb
->control
.exit_int_info
& SVM_EXITINTINFO_VALID
);
224 static int is_external_interrupt(u32 info
)
226 info
&= SVM_EVTINJ_TYPE_MASK
| SVM_EVTINJ_VALID
;
227 return info
== (SVM_EVTINJ_VALID
| SVM_EVTINJ_TYPE_INTR
);
230 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
232 struct vcpu_svm
*svm
= to_svm(vcpu
);
234 if (!svm
->next_rip
) {
235 printk(KERN_DEBUG
"%s: NOP\n", __func__
);
238 if (svm
->next_rip
- kvm_rip_read(vcpu
) > MAX_INST_SIZE
)
239 printk(KERN_ERR
"%s: ip 0x%lx next 0x%llx\n",
240 __func__
, kvm_rip_read(vcpu
), svm
->next_rip
);
242 kvm_rip_write(vcpu
, svm
->next_rip
);
243 svm
->vmcb
->control
.int_state
&= ~SVM_INTERRUPT_SHADOW_MASK
;
245 vcpu
->arch
.interrupt_window_open
= 1;
248 static int has_svm(void)
252 if (!cpu_has_svm(&msg
)) {
253 printk(KERN_INFO
"has_svn: %s\n", msg
);
260 static void svm_hardware_disable(void *garbage
)
265 static void svm_hardware_enable(void *garbage
)
268 struct svm_cpu_data
*svm_data
;
270 struct desc_ptr gdt_descr
;
271 struct desc_struct
*gdt
;
272 int me
= raw_smp_processor_id();
275 printk(KERN_ERR
"svm_cpu_init: err EOPNOTSUPP on %d\n", me
);
278 svm_data
= per_cpu(svm_data
, me
);
281 printk(KERN_ERR
"svm_cpu_init: svm_data is NULL on %d\n",
286 svm_data
->asid_generation
= 1;
287 svm_data
->max_asid
= cpuid_ebx(SVM_CPUID_FUNC
) - 1;
288 svm_data
->next_asid
= svm_data
->max_asid
+ 1;
290 asm volatile ("sgdt %0" : "=m"(gdt_descr
));
291 gdt
= (struct desc_struct
*)gdt_descr
.address
;
292 svm_data
->tss_desc
= (struct kvm_ldttss_desc
*)(gdt
+ GDT_ENTRY_TSS
);
294 rdmsrl(MSR_EFER
, efer
);
295 wrmsrl(MSR_EFER
, efer
| MSR_EFER_SVME_MASK
);
297 wrmsrl(MSR_VM_HSAVE_PA
,
298 page_to_pfn(svm_data
->save_area
) << PAGE_SHIFT
);
301 static void svm_cpu_uninit(int cpu
)
303 struct svm_cpu_data
*svm_data
304 = per_cpu(svm_data
, raw_smp_processor_id());
309 per_cpu(svm_data
, raw_smp_processor_id()) = NULL
;
310 __free_page(svm_data
->save_area
);
314 static int svm_cpu_init(int cpu
)
316 struct svm_cpu_data
*svm_data
;
319 svm_data
= kzalloc(sizeof(struct svm_cpu_data
), GFP_KERNEL
);
323 svm_data
->save_area
= alloc_page(GFP_KERNEL
);
325 if (!svm_data
->save_area
)
328 per_cpu(svm_data
, cpu
) = svm_data
;
338 static void set_msr_interception(u32
*msrpm
, unsigned msr
,
343 for (i
= 0; i
< NUM_MSR_MAPS
; i
++) {
344 if (msr
>= msrpm_ranges
[i
] &&
345 msr
< msrpm_ranges
[i
] + MSRS_IN_RANGE
) {
346 u32 msr_offset
= (i
* MSRS_IN_RANGE
+ msr
-
347 msrpm_ranges
[i
]) * 2;
349 u32
*base
= msrpm
+ (msr_offset
/ 32);
350 u32 msr_shift
= msr_offset
% 32;
351 u32 mask
= ((write
) ? 0 : 2) | ((read
) ? 0 : 1);
352 *base
= (*base
& ~(0x3 << msr_shift
)) |
360 static void svm_vcpu_init_msrpm(u32
*msrpm
)
362 memset(msrpm
, 0xff, PAGE_SIZE
* (1 << MSRPM_ALLOC_ORDER
));
365 set_msr_interception(msrpm
, MSR_GS_BASE
, 1, 1);
366 set_msr_interception(msrpm
, MSR_FS_BASE
, 1, 1);
367 set_msr_interception(msrpm
, MSR_KERNEL_GS_BASE
, 1, 1);
368 set_msr_interception(msrpm
, MSR_LSTAR
, 1, 1);
369 set_msr_interception(msrpm
, MSR_CSTAR
, 1, 1);
370 set_msr_interception(msrpm
, MSR_SYSCALL_MASK
, 1, 1);
372 set_msr_interception(msrpm
, MSR_K6_STAR
, 1, 1);
373 set_msr_interception(msrpm
, MSR_IA32_SYSENTER_CS
, 1, 1);
374 set_msr_interception(msrpm
, MSR_IA32_SYSENTER_ESP
, 1, 1);
375 set_msr_interception(msrpm
, MSR_IA32_SYSENTER_EIP
, 1, 1);
378 static void svm_enable_lbrv(struct vcpu_svm
*svm
)
380 u32
*msrpm
= svm
->msrpm
;
382 svm
->vmcb
->control
.lbr_ctl
= 1;
383 set_msr_interception(msrpm
, MSR_IA32_LASTBRANCHFROMIP
, 1, 1);
384 set_msr_interception(msrpm
, MSR_IA32_LASTBRANCHTOIP
, 1, 1);
385 set_msr_interception(msrpm
, MSR_IA32_LASTINTFROMIP
, 1, 1);
386 set_msr_interception(msrpm
, MSR_IA32_LASTINTTOIP
, 1, 1);
389 static void svm_disable_lbrv(struct vcpu_svm
*svm
)
391 u32
*msrpm
= svm
->msrpm
;
393 svm
->vmcb
->control
.lbr_ctl
= 0;
394 set_msr_interception(msrpm
, MSR_IA32_LASTBRANCHFROMIP
, 0, 0);
395 set_msr_interception(msrpm
, MSR_IA32_LASTBRANCHTOIP
, 0, 0);
396 set_msr_interception(msrpm
, MSR_IA32_LASTINTFROMIP
, 0, 0);
397 set_msr_interception(msrpm
, MSR_IA32_LASTINTTOIP
, 0, 0);
400 static __init
int svm_hardware_setup(void)
403 struct page
*iopm_pages
;
407 iopm_pages
= alloc_pages(GFP_KERNEL
, IOPM_ALLOC_ORDER
);
412 iopm_va
= page_address(iopm_pages
);
413 memset(iopm_va
, 0xff, PAGE_SIZE
* (1 << IOPM_ALLOC_ORDER
));
414 clear_bit(0x80, iopm_va
); /* allow direct access to PC debug port */
415 iopm_base
= page_to_pfn(iopm_pages
) << PAGE_SHIFT
;
417 if (boot_cpu_has(X86_FEATURE_NX
))
418 kvm_enable_efer_bits(EFER_NX
);
420 for_each_online_cpu(cpu
) {
421 r
= svm_cpu_init(cpu
);
426 svm_features
= cpuid_edx(SVM_CPUID_FUNC
);
428 if (!svm_has(SVM_FEATURE_NPT
))
431 if (npt_enabled
&& !npt
) {
432 printk(KERN_INFO
"kvm: Nested Paging disabled\n");
437 printk(KERN_INFO
"kvm: Nested Paging enabled\n");
445 __free_pages(iopm_pages
, IOPM_ALLOC_ORDER
);
450 static __exit
void svm_hardware_unsetup(void)
454 for_each_online_cpu(cpu
)
457 __free_pages(pfn_to_page(iopm_base
>> PAGE_SHIFT
), IOPM_ALLOC_ORDER
);
461 static void init_seg(struct vmcb_seg
*seg
)
464 seg
->attrib
= SVM_SELECTOR_P_MASK
| SVM_SELECTOR_S_MASK
|
465 SVM_SELECTOR_WRITE_MASK
; /* Read/Write Data Segment */
470 static void init_sys_seg(struct vmcb_seg
*seg
, uint32_t type
)
473 seg
->attrib
= SVM_SELECTOR_P_MASK
| type
;
478 static void init_vmcb(struct vcpu_svm
*svm
)
480 struct vmcb_control_area
*control
= &svm
->vmcb
->control
;
481 struct vmcb_save_area
*save
= &svm
->vmcb
->save
;
483 control
->intercept_cr_read
= INTERCEPT_CR0_MASK
|
487 control
->intercept_cr_write
= INTERCEPT_CR0_MASK
|
492 control
->intercept_dr_read
= INTERCEPT_DR0_MASK
|
497 control
->intercept_dr_write
= INTERCEPT_DR0_MASK
|
504 control
->intercept_exceptions
= (1 << PF_VECTOR
) |
509 control
->intercept
= (1ULL << INTERCEPT_INTR
) |
510 (1ULL << INTERCEPT_NMI
) |
511 (1ULL << INTERCEPT_SMI
) |
512 (1ULL << INTERCEPT_CPUID
) |
513 (1ULL << INTERCEPT_INVD
) |
514 (1ULL << INTERCEPT_HLT
) |
515 (1ULL << INTERCEPT_INVLPG
) |
516 (1ULL << INTERCEPT_INVLPGA
) |
517 (1ULL << INTERCEPT_IOIO_PROT
) |
518 (1ULL << INTERCEPT_MSR_PROT
) |
519 (1ULL << INTERCEPT_TASK_SWITCH
) |
520 (1ULL << INTERCEPT_SHUTDOWN
) |
521 (1ULL << INTERCEPT_VMRUN
) |
522 (1ULL << INTERCEPT_VMMCALL
) |
523 (1ULL << INTERCEPT_VMLOAD
) |
524 (1ULL << INTERCEPT_VMSAVE
) |
525 (1ULL << INTERCEPT_STGI
) |
526 (1ULL << INTERCEPT_CLGI
) |
527 (1ULL << INTERCEPT_SKINIT
) |
528 (1ULL << INTERCEPT_WBINVD
) |
529 (1ULL << INTERCEPT_MONITOR
) |
530 (1ULL << INTERCEPT_MWAIT
);
532 control
->iopm_base_pa
= iopm_base
;
533 control
->msrpm_base_pa
= __pa(svm
->msrpm
);
534 control
->tsc_offset
= 0;
535 control
->int_ctl
= V_INTR_MASKING_MASK
;
543 save
->cs
.selector
= 0xf000;
544 /* Executable/Readable Code Segment */
545 save
->cs
.attrib
= SVM_SELECTOR_READ_MASK
| SVM_SELECTOR_P_MASK
|
546 SVM_SELECTOR_S_MASK
| SVM_SELECTOR_CODE_MASK
;
547 save
->cs
.limit
= 0xffff;
549 * cs.base should really be 0xffff0000, but vmx can't handle that, so
550 * be consistent with it.
552 * Replace when we have real mode working for vmx.
554 save
->cs
.base
= 0xf0000;
556 save
->gdtr
.limit
= 0xffff;
557 save
->idtr
.limit
= 0xffff;
559 init_sys_seg(&save
->ldtr
, SEG_TYPE_LDT
);
560 init_sys_seg(&save
->tr
, SEG_TYPE_BUSY_TSS16
);
562 save
->efer
= MSR_EFER_SVME_MASK
;
563 save
->dr6
= 0xffff0ff0;
566 save
->rip
= 0x0000fff0;
567 svm
->vcpu
.arch
.regs
[VCPU_REGS_RIP
] = save
->rip
;
570 * cr0 val on cpu init should be 0x60000010, we enable cpu
571 * cache by default. the orderly way is to enable cache in bios.
573 save
->cr0
= 0x00000010 | X86_CR0_PG
| X86_CR0_WP
;
574 save
->cr4
= X86_CR4_PAE
;
578 /* Setup VMCB for Nested Paging */
579 control
->nested_ctl
= 1;
580 control
->intercept
&= ~((1ULL << INTERCEPT_TASK_SWITCH
) |
581 (1ULL << INTERCEPT_INVLPG
));
582 control
->intercept_exceptions
&= ~(1 << PF_VECTOR
);
583 control
->intercept_cr_read
&= ~(INTERCEPT_CR0_MASK
|
585 control
->intercept_cr_write
&= ~(INTERCEPT_CR0_MASK
|
587 save
->g_pat
= 0x0007040600070406ULL
;
588 /* enable caching because the QEMU Bios doesn't enable it */
589 save
->cr0
= X86_CR0_ET
;
593 force_new_asid(&svm
->vcpu
);
596 static int svm_vcpu_reset(struct kvm_vcpu
*vcpu
)
598 struct vcpu_svm
*svm
= to_svm(vcpu
);
602 if (vcpu
->vcpu_id
!= 0) {
603 kvm_rip_write(vcpu
, 0);
604 svm
->vmcb
->save
.cs
.base
= svm
->vcpu
.arch
.sipi_vector
<< 12;
605 svm
->vmcb
->save
.cs
.selector
= svm
->vcpu
.arch
.sipi_vector
<< 8;
607 vcpu
->arch
.regs_avail
= ~0;
608 vcpu
->arch
.regs_dirty
= ~0;
613 static struct kvm_vcpu
*svm_create_vcpu(struct kvm
*kvm
, unsigned int id
)
615 struct vcpu_svm
*svm
;
617 struct page
*msrpm_pages
;
620 svm
= kmem_cache_zalloc(kvm_vcpu_cache
, GFP_KERNEL
);
626 err
= kvm_vcpu_init(&svm
->vcpu
, kvm
, id
);
630 page
= alloc_page(GFP_KERNEL
);
637 msrpm_pages
= alloc_pages(GFP_KERNEL
, MSRPM_ALLOC_ORDER
);
640 svm
->msrpm
= page_address(msrpm_pages
);
641 svm_vcpu_init_msrpm(svm
->msrpm
);
643 svm
->vmcb
= page_address(page
);
644 clear_page(svm
->vmcb
);
645 svm
->vmcb_pa
= page_to_pfn(page
) << PAGE_SHIFT
;
646 svm
->asid_generation
= 0;
647 memset(svm
->db_regs
, 0, sizeof(svm
->db_regs
));
651 svm
->vcpu
.fpu_active
= 1;
652 svm
->vcpu
.arch
.apic_base
= 0xfee00000 | MSR_IA32_APICBASE_ENABLE
;
653 if (svm
->vcpu
.vcpu_id
== 0)
654 svm
->vcpu
.arch
.apic_base
|= MSR_IA32_APICBASE_BSP
;
659 kvm_vcpu_uninit(&svm
->vcpu
);
661 kmem_cache_free(kvm_vcpu_cache
, svm
);
666 static void svm_free_vcpu(struct kvm_vcpu
*vcpu
)
668 struct vcpu_svm
*svm
= to_svm(vcpu
);
670 __free_page(pfn_to_page(svm
->vmcb_pa
>> PAGE_SHIFT
));
671 __free_pages(virt_to_page(svm
->msrpm
), MSRPM_ALLOC_ORDER
);
672 kvm_vcpu_uninit(vcpu
);
673 kmem_cache_free(kvm_vcpu_cache
, svm
);
676 static void svm_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
678 struct vcpu_svm
*svm
= to_svm(vcpu
);
681 if (unlikely(cpu
!= vcpu
->cpu
)) {
685 * Make sure that the guest sees a monotonically
689 delta
= vcpu
->arch
.host_tsc
- tsc_this
;
690 svm
->vmcb
->control
.tsc_offset
+= delta
;
692 kvm_migrate_timers(vcpu
);
695 for (i
= 0; i
< NR_HOST_SAVE_USER_MSRS
; i
++)
696 rdmsrl(host_save_user_msrs
[i
], svm
->host_user_msrs
[i
]);
699 static void svm_vcpu_put(struct kvm_vcpu
*vcpu
)
701 struct vcpu_svm
*svm
= to_svm(vcpu
);
704 ++vcpu
->stat
.host_state_reload
;
705 for (i
= 0; i
< NR_HOST_SAVE_USER_MSRS
; i
++)
706 wrmsrl(host_save_user_msrs
[i
], svm
->host_user_msrs
[i
]);
708 rdtscll(vcpu
->arch
.host_tsc
);
711 static unsigned long svm_get_rflags(struct kvm_vcpu
*vcpu
)
713 return to_svm(vcpu
)->vmcb
->save
.rflags
;
716 static void svm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
718 to_svm(vcpu
)->vmcb
->save
.rflags
= rflags
;
721 static struct vmcb_seg
*svm_seg(struct kvm_vcpu
*vcpu
, int seg
)
723 struct vmcb_save_area
*save
= &to_svm(vcpu
)->vmcb
->save
;
726 case VCPU_SREG_CS
: return &save
->cs
;
727 case VCPU_SREG_DS
: return &save
->ds
;
728 case VCPU_SREG_ES
: return &save
->es
;
729 case VCPU_SREG_FS
: return &save
->fs
;
730 case VCPU_SREG_GS
: return &save
->gs
;
731 case VCPU_SREG_SS
: return &save
->ss
;
732 case VCPU_SREG_TR
: return &save
->tr
;
733 case VCPU_SREG_LDTR
: return &save
->ldtr
;
739 static u64
svm_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
741 struct vmcb_seg
*s
= svm_seg(vcpu
, seg
);
746 static void svm_get_segment(struct kvm_vcpu
*vcpu
,
747 struct kvm_segment
*var
, int seg
)
749 struct vmcb_seg
*s
= svm_seg(vcpu
, seg
);
752 var
->limit
= s
->limit
;
753 var
->selector
= s
->selector
;
754 var
->type
= s
->attrib
& SVM_SELECTOR_TYPE_MASK
;
755 var
->s
= (s
->attrib
>> SVM_SELECTOR_S_SHIFT
) & 1;
756 var
->dpl
= (s
->attrib
>> SVM_SELECTOR_DPL_SHIFT
) & 3;
757 var
->present
= (s
->attrib
>> SVM_SELECTOR_P_SHIFT
) & 1;
758 var
->avl
= (s
->attrib
>> SVM_SELECTOR_AVL_SHIFT
) & 1;
759 var
->l
= (s
->attrib
>> SVM_SELECTOR_L_SHIFT
) & 1;
760 var
->db
= (s
->attrib
>> SVM_SELECTOR_DB_SHIFT
) & 1;
761 var
->g
= (s
->attrib
>> SVM_SELECTOR_G_SHIFT
) & 1;
764 * SVM always stores 0 for the 'G' bit in the CS selector in
765 * the VMCB on a VMEXIT. This hurts cross-vendor migration:
766 * Intel's VMENTRY has a check on the 'G' bit.
768 if (seg
== VCPU_SREG_CS
)
769 var
->g
= s
->limit
> 0xfffff;
772 * Work around a bug where the busy flag in the tr selector
775 if (seg
== VCPU_SREG_TR
)
778 var
->unusable
= !var
->present
;
781 static int svm_get_cpl(struct kvm_vcpu
*vcpu
)
783 struct vmcb_save_area
*save
= &to_svm(vcpu
)->vmcb
->save
;
788 static void svm_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
790 struct vcpu_svm
*svm
= to_svm(vcpu
);
792 dt
->limit
= svm
->vmcb
->save
.idtr
.limit
;
793 dt
->base
= svm
->vmcb
->save
.idtr
.base
;
796 static void svm_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
798 struct vcpu_svm
*svm
= to_svm(vcpu
);
800 svm
->vmcb
->save
.idtr
.limit
= dt
->limit
;
801 svm
->vmcb
->save
.idtr
.base
= dt
->base
;
804 static void svm_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
806 struct vcpu_svm
*svm
= to_svm(vcpu
);
808 dt
->limit
= svm
->vmcb
->save
.gdtr
.limit
;
809 dt
->base
= svm
->vmcb
->save
.gdtr
.base
;
812 static void svm_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
814 struct vcpu_svm
*svm
= to_svm(vcpu
);
816 svm
->vmcb
->save
.gdtr
.limit
= dt
->limit
;
817 svm
->vmcb
->save
.gdtr
.base
= dt
->base
;
820 static void svm_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
824 static void svm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
826 struct vcpu_svm
*svm
= to_svm(vcpu
);
829 if (vcpu
->arch
.shadow_efer
& EFER_LME
) {
830 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
831 vcpu
->arch
.shadow_efer
|= EFER_LMA
;
832 svm
->vmcb
->save
.efer
|= EFER_LMA
| EFER_LME
;
835 if (is_paging(vcpu
) && !(cr0
& X86_CR0_PG
)) {
836 vcpu
->arch
.shadow_efer
&= ~EFER_LMA
;
837 svm
->vmcb
->save
.efer
&= ~(EFER_LMA
| EFER_LME
);
844 if ((vcpu
->arch
.cr0
& X86_CR0_TS
) && !(cr0
& X86_CR0_TS
)) {
845 svm
->vmcb
->control
.intercept_exceptions
&= ~(1 << NM_VECTOR
);
846 vcpu
->fpu_active
= 1;
849 vcpu
->arch
.cr0
= cr0
;
850 cr0
|= X86_CR0_PG
| X86_CR0_WP
;
851 if (!vcpu
->fpu_active
) {
852 svm
->vmcb
->control
.intercept_exceptions
|= (1 << NM_VECTOR
);
857 * re-enable caching here because the QEMU bios
858 * does not do it - this results in some delay at
861 cr0
&= ~(X86_CR0_CD
| X86_CR0_NW
);
862 svm
->vmcb
->save
.cr0
= cr0
;
865 static void svm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
867 unsigned long host_cr4_mce
= read_cr4() & X86_CR4_MCE
;
868 unsigned long old_cr4
= to_svm(vcpu
)->vmcb
->save
.cr4
;
870 if (npt_enabled
&& ((old_cr4
^ cr4
) & X86_CR4_PGE
))
871 force_new_asid(vcpu
);
873 vcpu
->arch
.cr4
= cr4
;
877 to_svm(vcpu
)->vmcb
->save
.cr4
= cr4
;
880 static void svm_set_segment(struct kvm_vcpu
*vcpu
,
881 struct kvm_segment
*var
, int seg
)
883 struct vcpu_svm
*svm
= to_svm(vcpu
);
884 struct vmcb_seg
*s
= svm_seg(vcpu
, seg
);
887 s
->limit
= var
->limit
;
888 s
->selector
= var
->selector
;
892 s
->attrib
= (var
->type
& SVM_SELECTOR_TYPE_MASK
);
893 s
->attrib
|= (var
->s
& 1) << SVM_SELECTOR_S_SHIFT
;
894 s
->attrib
|= (var
->dpl
& 3) << SVM_SELECTOR_DPL_SHIFT
;
895 s
->attrib
|= (var
->present
& 1) << SVM_SELECTOR_P_SHIFT
;
896 s
->attrib
|= (var
->avl
& 1) << SVM_SELECTOR_AVL_SHIFT
;
897 s
->attrib
|= (var
->l
& 1) << SVM_SELECTOR_L_SHIFT
;
898 s
->attrib
|= (var
->db
& 1) << SVM_SELECTOR_DB_SHIFT
;
899 s
->attrib
|= (var
->g
& 1) << SVM_SELECTOR_G_SHIFT
;
901 if (seg
== VCPU_SREG_CS
)
903 = (svm
->vmcb
->save
.cs
.attrib
904 >> SVM_SELECTOR_DPL_SHIFT
) & 3;
908 static int svm_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
913 static int svm_get_irq(struct kvm_vcpu
*vcpu
)
915 struct vcpu_svm
*svm
= to_svm(vcpu
);
916 u32 exit_int_info
= svm
->vmcb
->control
.exit_int_info
;
918 if (is_external_interrupt(exit_int_info
))
919 return exit_int_info
& SVM_EVTINJ_VEC_MASK
;
923 static void load_host_msrs(struct kvm_vcpu
*vcpu
)
926 wrmsrl(MSR_GS_BASE
, to_svm(vcpu
)->host_gs_base
);
930 static void save_host_msrs(struct kvm_vcpu
*vcpu
)
933 rdmsrl(MSR_GS_BASE
, to_svm(vcpu
)->host_gs_base
);
937 static void new_asid(struct vcpu_svm
*svm
, struct svm_cpu_data
*svm_data
)
939 if (svm_data
->next_asid
> svm_data
->max_asid
) {
940 ++svm_data
->asid_generation
;
941 svm_data
->next_asid
= 1;
942 svm
->vmcb
->control
.tlb_ctl
= TLB_CONTROL_FLUSH_ALL_ASID
;
945 svm
->vcpu
.cpu
= svm_data
->cpu
;
946 svm
->asid_generation
= svm_data
->asid_generation
;
947 svm
->vmcb
->control
.asid
= svm_data
->next_asid
++;
950 static unsigned long svm_get_dr(struct kvm_vcpu
*vcpu
, int dr
)
952 unsigned long val
= to_svm(vcpu
)->db_regs
[dr
];
953 KVMTRACE_2D(DR_READ
, vcpu
, (u32
)dr
, (u32
)val
, handler
);
957 static void svm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long value
,
960 struct vcpu_svm
*svm
= to_svm(vcpu
);
964 if (svm
->vmcb
->save
.dr7
& DR7_GD_MASK
) {
965 svm
->vmcb
->save
.dr7
&= ~DR7_GD_MASK
;
966 svm
->vmcb
->save
.dr6
|= DR6_BD_MASK
;
967 *exception
= DB_VECTOR
;
973 svm
->db_regs
[dr
] = value
;
976 if (vcpu
->arch
.cr4
& X86_CR4_DE
) {
977 *exception
= UD_VECTOR
;
981 if (value
& ~((1ULL << 32) - 1)) {
982 *exception
= GP_VECTOR
;
985 svm
->vmcb
->save
.dr7
= value
;
989 printk(KERN_DEBUG
"%s: unexpected dr %u\n",
991 *exception
= UD_VECTOR
;
996 static int pf_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
998 u32 exit_int_info
= svm
->vmcb
->control
.exit_int_info
;
999 struct kvm
*kvm
= svm
->vcpu
.kvm
;
1002 bool event_injection
= false;
1004 if (!irqchip_in_kernel(kvm
) &&
1005 is_external_interrupt(exit_int_info
)) {
1006 event_injection
= true;
1007 push_irq(&svm
->vcpu
, exit_int_info
& SVM_EVTINJ_VEC_MASK
);
1010 fault_address
= svm
->vmcb
->control
.exit_info_2
;
1011 error_code
= svm
->vmcb
->control
.exit_info_1
;
1014 KVMTRACE_3D(PAGE_FAULT
, &svm
->vcpu
, error_code
,
1015 (u32
)fault_address
, (u32
)(fault_address
>> 32),
1018 KVMTRACE_3D(TDP_FAULT
, &svm
->vcpu
, error_code
,
1019 (u32
)fault_address
, (u32
)(fault_address
>> 32),
1022 * FIXME: Tis shouldn't be necessary here, but there is a flush
1023 * missing in the MMU code. Until we find this bug, flush the
1024 * complete TLB here on an NPF
1027 svm_flush_tlb(&svm
->vcpu
);
1029 if (!npt_enabled
&& event_injection
)
1030 kvm_mmu_unprotect_page_virt(&svm
->vcpu
, fault_address
);
1031 return kvm_mmu_page_fault(&svm
->vcpu
, fault_address
, error_code
);
1034 static int ud_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1038 er
= emulate_instruction(&svm
->vcpu
, kvm_run
, 0, 0, EMULTYPE_TRAP_UD
);
1039 if (er
!= EMULATE_DONE
)
1040 kvm_queue_exception(&svm
->vcpu
, UD_VECTOR
);
1044 static int nm_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1046 svm
->vmcb
->control
.intercept_exceptions
&= ~(1 << NM_VECTOR
);
1047 if (!(svm
->vcpu
.arch
.cr0
& X86_CR0_TS
))
1048 svm
->vmcb
->save
.cr0
&= ~X86_CR0_TS
;
1049 svm
->vcpu
.fpu_active
= 1;
1054 static int mc_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1057 * On an #MC intercept the MCE handler is not called automatically in
1058 * the host. So do it by hand here.
1062 /* not sure if we ever come back to this point */
1067 static int shutdown_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1070 * VMCB is undefined after a SHUTDOWN intercept
1071 * so reinitialize it.
1073 clear_page(svm
->vmcb
);
1076 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1080 static int io_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1082 u32 io_info
= svm
->vmcb
->control
.exit_info_1
; /* address size bug? */
1083 int size
, down
, in
, string
, rep
;
1086 ++svm
->vcpu
.stat
.io_exits
;
1088 svm
->next_rip
= svm
->vmcb
->control
.exit_info_2
;
1090 string
= (io_info
& SVM_IOIO_STR_MASK
) != 0;
1093 if (emulate_instruction(&svm
->vcpu
,
1094 kvm_run
, 0, 0, 0) == EMULATE_DO_MMIO
)
1099 in
= (io_info
& SVM_IOIO_TYPE_MASK
) != 0;
1100 port
= io_info
>> 16;
1101 size
= (io_info
& SVM_IOIO_SIZE_MASK
) >> SVM_IOIO_SIZE_SHIFT
;
1102 rep
= (io_info
& SVM_IOIO_REP_MASK
) != 0;
1103 down
= (svm
->vmcb
->save
.rflags
& X86_EFLAGS_DF
) != 0;
1105 skip_emulated_instruction(&svm
->vcpu
);
1106 return kvm_emulate_pio(&svm
->vcpu
, kvm_run
, in
, size
, port
);
1109 static int nmi_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1111 KVMTRACE_0D(NMI
, &svm
->vcpu
, handler
);
1115 static int intr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1117 ++svm
->vcpu
.stat
.irq_exits
;
1118 KVMTRACE_0D(INTR
, &svm
->vcpu
, handler
);
1122 static int nop_on_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1127 static int halt_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1129 svm
->next_rip
= kvm_rip_read(&svm
->vcpu
) + 1;
1130 skip_emulated_instruction(&svm
->vcpu
);
1131 return kvm_emulate_halt(&svm
->vcpu
);
1134 static int vmmcall_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1136 svm
->next_rip
= kvm_rip_read(&svm
->vcpu
) + 3;
1137 skip_emulated_instruction(&svm
->vcpu
);
1138 kvm_emulate_hypercall(&svm
->vcpu
);
1142 static int invalid_op_interception(struct vcpu_svm
*svm
,
1143 struct kvm_run
*kvm_run
)
1145 kvm_queue_exception(&svm
->vcpu
, UD_VECTOR
);
1149 static int task_switch_interception(struct vcpu_svm
*svm
,
1150 struct kvm_run
*kvm_run
)
1154 tss_selector
= (u16
)svm
->vmcb
->control
.exit_info_1
;
1155 if (svm
->vmcb
->control
.exit_info_2
&
1156 (1ULL << SVM_EXITINFOSHIFT_TS_REASON_IRET
))
1157 return kvm_task_switch(&svm
->vcpu
, tss_selector
,
1159 if (svm
->vmcb
->control
.exit_info_2
&
1160 (1ULL << SVM_EXITINFOSHIFT_TS_REASON_JMP
))
1161 return kvm_task_switch(&svm
->vcpu
, tss_selector
,
1163 return kvm_task_switch(&svm
->vcpu
, tss_selector
, TASK_SWITCH_CALL
);
1166 static int cpuid_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1168 svm
->next_rip
= kvm_rip_read(&svm
->vcpu
) + 2;
1169 kvm_emulate_cpuid(&svm
->vcpu
);
1173 static int invlpg_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1175 if (emulate_instruction(&svm
->vcpu
, kvm_run
, 0, 0, 0) != EMULATE_DONE
)
1176 pr_unimpl(&svm
->vcpu
, "%s: failed\n", __func__
);
1180 static int emulate_on_interception(struct vcpu_svm
*svm
,
1181 struct kvm_run
*kvm_run
)
1183 if (emulate_instruction(&svm
->vcpu
, NULL
, 0, 0, 0) != EMULATE_DONE
)
1184 pr_unimpl(&svm
->vcpu
, "%s: failed\n", __func__
);
1188 static int cr8_write_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1190 emulate_instruction(&svm
->vcpu
, NULL
, 0, 0, 0);
1191 if (irqchip_in_kernel(svm
->vcpu
.kvm
))
1193 kvm_run
->exit_reason
= KVM_EXIT_SET_TPR
;
1197 static int svm_get_msr(struct kvm_vcpu
*vcpu
, unsigned ecx
, u64
*data
)
1199 struct vcpu_svm
*svm
= to_svm(vcpu
);
1202 case MSR_IA32_TIME_STAMP_COUNTER
: {
1206 *data
= svm
->vmcb
->control
.tsc_offset
+ tsc
;
1210 *data
= svm
->vmcb
->save
.star
;
1212 #ifdef CONFIG_X86_64
1214 *data
= svm
->vmcb
->save
.lstar
;
1217 *data
= svm
->vmcb
->save
.cstar
;
1219 case MSR_KERNEL_GS_BASE
:
1220 *data
= svm
->vmcb
->save
.kernel_gs_base
;
1222 case MSR_SYSCALL_MASK
:
1223 *data
= svm
->vmcb
->save
.sfmask
;
1226 case MSR_IA32_SYSENTER_CS
:
1227 *data
= svm
->vmcb
->save
.sysenter_cs
;
1229 case MSR_IA32_SYSENTER_EIP
:
1230 *data
= svm
->vmcb
->save
.sysenter_eip
;
1232 case MSR_IA32_SYSENTER_ESP
:
1233 *data
= svm
->vmcb
->save
.sysenter_esp
;
1235 /* Nobody will change the following 5 values in the VMCB so
1236 we can safely return them on rdmsr. They will always be 0
1237 until LBRV is implemented. */
1238 case MSR_IA32_DEBUGCTLMSR
:
1239 *data
= svm
->vmcb
->save
.dbgctl
;
1241 case MSR_IA32_LASTBRANCHFROMIP
:
1242 *data
= svm
->vmcb
->save
.br_from
;
1244 case MSR_IA32_LASTBRANCHTOIP
:
1245 *data
= svm
->vmcb
->save
.br_to
;
1247 case MSR_IA32_LASTINTFROMIP
:
1248 *data
= svm
->vmcb
->save
.last_excp_from
;
1250 case MSR_IA32_LASTINTTOIP
:
1251 *data
= svm
->vmcb
->save
.last_excp_to
;
1254 return kvm_get_msr_common(vcpu
, ecx
, data
);
1259 static int rdmsr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1261 u32 ecx
= svm
->vcpu
.arch
.regs
[VCPU_REGS_RCX
];
1264 if (svm_get_msr(&svm
->vcpu
, ecx
, &data
))
1265 kvm_inject_gp(&svm
->vcpu
, 0);
1267 KVMTRACE_3D(MSR_READ
, &svm
->vcpu
, ecx
, (u32
)data
,
1268 (u32
)(data
>> 32), handler
);
1270 svm
->vcpu
.arch
.regs
[VCPU_REGS_RAX
] = data
& 0xffffffff;
1271 svm
->vcpu
.arch
.regs
[VCPU_REGS_RDX
] = data
>> 32;
1272 svm
->next_rip
= kvm_rip_read(&svm
->vcpu
) + 2;
1273 skip_emulated_instruction(&svm
->vcpu
);
1278 static int svm_set_msr(struct kvm_vcpu
*vcpu
, unsigned ecx
, u64 data
)
1280 struct vcpu_svm
*svm
= to_svm(vcpu
);
1283 case MSR_IA32_TIME_STAMP_COUNTER
: {
1287 svm
->vmcb
->control
.tsc_offset
= data
- tsc
;
1291 svm
->vmcb
->save
.star
= data
;
1293 #ifdef CONFIG_X86_64
1295 svm
->vmcb
->save
.lstar
= data
;
1298 svm
->vmcb
->save
.cstar
= data
;
1300 case MSR_KERNEL_GS_BASE
:
1301 svm
->vmcb
->save
.kernel_gs_base
= data
;
1303 case MSR_SYSCALL_MASK
:
1304 svm
->vmcb
->save
.sfmask
= data
;
1307 case MSR_IA32_SYSENTER_CS
:
1308 svm
->vmcb
->save
.sysenter_cs
= data
;
1310 case MSR_IA32_SYSENTER_EIP
:
1311 svm
->vmcb
->save
.sysenter_eip
= data
;
1313 case MSR_IA32_SYSENTER_ESP
:
1314 svm
->vmcb
->save
.sysenter_esp
= data
;
1316 case MSR_IA32_DEBUGCTLMSR
:
1317 if (!svm_has(SVM_FEATURE_LBRV
)) {
1318 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTL 0x%llx, nop\n",
1322 if (data
& DEBUGCTL_RESERVED_BITS
)
1325 svm
->vmcb
->save
.dbgctl
= data
;
1326 if (data
& (1ULL<<0))
1327 svm_enable_lbrv(svm
);
1329 svm_disable_lbrv(svm
);
1331 case MSR_K7_EVNTSEL0
:
1332 case MSR_K7_EVNTSEL1
:
1333 case MSR_K7_EVNTSEL2
:
1334 case MSR_K7_EVNTSEL3
:
1335 case MSR_K7_PERFCTR0
:
1336 case MSR_K7_PERFCTR1
:
1337 case MSR_K7_PERFCTR2
:
1338 case MSR_K7_PERFCTR3
:
1340 * Just discard all writes to the performance counters; this
1341 * should keep both older linux and windows 64-bit guests
1344 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: 0x%x data 0x%llx\n", ecx
, data
);
1348 return kvm_set_msr_common(vcpu
, ecx
, data
);
1353 static int wrmsr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1355 u32 ecx
= svm
->vcpu
.arch
.regs
[VCPU_REGS_RCX
];
1356 u64 data
= (svm
->vcpu
.arch
.regs
[VCPU_REGS_RAX
] & -1u)
1357 | ((u64
)(svm
->vcpu
.arch
.regs
[VCPU_REGS_RDX
] & -1u) << 32);
1359 KVMTRACE_3D(MSR_WRITE
, &svm
->vcpu
, ecx
, (u32
)data
, (u32
)(data
>> 32),
1362 svm
->next_rip
= kvm_rip_read(&svm
->vcpu
) + 2;
1363 if (svm_set_msr(&svm
->vcpu
, ecx
, data
))
1364 kvm_inject_gp(&svm
->vcpu
, 0);
1366 skip_emulated_instruction(&svm
->vcpu
);
1370 static int msr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1372 if (svm
->vmcb
->control
.exit_info_1
)
1373 return wrmsr_interception(svm
, kvm_run
);
1375 return rdmsr_interception(svm
, kvm_run
);
1378 static int interrupt_window_interception(struct vcpu_svm
*svm
,
1379 struct kvm_run
*kvm_run
)
1381 KVMTRACE_0D(PEND_INTR
, &svm
->vcpu
, handler
);
1383 svm
->vmcb
->control
.intercept
&= ~(1ULL << INTERCEPT_VINTR
);
1384 svm
->vmcb
->control
.int_ctl
&= ~V_IRQ_MASK
;
1386 * If the user space waits to inject interrupts, exit as soon as
1389 if (kvm_run
->request_interrupt_window
&&
1390 !svm
->vcpu
.arch
.irq_summary
) {
1391 ++svm
->vcpu
.stat
.irq_window_exits
;
1392 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1399 static int (*svm_exit_handlers
[])(struct vcpu_svm
*svm
,
1400 struct kvm_run
*kvm_run
) = {
1401 [SVM_EXIT_READ_CR0
] = emulate_on_interception
,
1402 [SVM_EXIT_READ_CR3
] = emulate_on_interception
,
1403 [SVM_EXIT_READ_CR4
] = emulate_on_interception
,
1404 [SVM_EXIT_READ_CR8
] = emulate_on_interception
,
1406 [SVM_EXIT_WRITE_CR0
] = emulate_on_interception
,
1407 [SVM_EXIT_WRITE_CR3
] = emulate_on_interception
,
1408 [SVM_EXIT_WRITE_CR4
] = emulate_on_interception
,
1409 [SVM_EXIT_WRITE_CR8
] = cr8_write_interception
,
1410 [SVM_EXIT_READ_DR0
] = emulate_on_interception
,
1411 [SVM_EXIT_READ_DR1
] = emulate_on_interception
,
1412 [SVM_EXIT_READ_DR2
] = emulate_on_interception
,
1413 [SVM_EXIT_READ_DR3
] = emulate_on_interception
,
1414 [SVM_EXIT_WRITE_DR0
] = emulate_on_interception
,
1415 [SVM_EXIT_WRITE_DR1
] = emulate_on_interception
,
1416 [SVM_EXIT_WRITE_DR2
] = emulate_on_interception
,
1417 [SVM_EXIT_WRITE_DR3
] = emulate_on_interception
,
1418 [SVM_EXIT_WRITE_DR5
] = emulate_on_interception
,
1419 [SVM_EXIT_WRITE_DR7
] = emulate_on_interception
,
1420 [SVM_EXIT_EXCP_BASE
+ UD_VECTOR
] = ud_interception
,
1421 [SVM_EXIT_EXCP_BASE
+ PF_VECTOR
] = pf_interception
,
1422 [SVM_EXIT_EXCP_BASE
+ NM_VECTOR
] = nm_interception
,
1423 [SVM_EXIT_EXCP_BASE
+ MC_VECTOR
] = mc_interception
,
1424 [SVM_EXIT_INTR
] = intr_interception
,
1425 [SVM_EXIT_NMI
] = nmi_interception
,
1426 [SVM_EXIT_SMI
] = nop_on_interception
,
1427 [SVM_EXIT_INIT
] = nop_on_interception
,
1428 [SVM_EXIT_VINTR
] = interrupt_window_interception
,
1429 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1430 [SVM_EXIT_CPUID
] = cpuid_interception
,
1431 [SVM_EXIT_INVD
] = emulate_on_interception
,
1432 [SVM_EXIT_HLT
] = halt_interception
,
1433 [SVM_EXIT_INVLPG
] = invlpg_interception
,
1434 [SVM_EXIT_INVLPGA
] = invalid_op_interception
,
1435 [SVM_EXIT_IOIO
] = io_interception
,
1436 [SVM_EXIT_MSR
] = msr_interception
,
1437 [SVM_EXIT_TASK_SWITCH
] = task_switch_interception
,
1438 [SVM_EXIT_SHUTDOWN
] = shutdown_interception
,
1439 [SVM_EXIT_VMRUN
] = invalid_op_interception
,
1440 [SVM_EXIT_VMMCALL
] = vmmcall_interception
,
1441 [SVM_EXIT_VMLOAD
] = invalid_op_interception
,
1442 [SVM_EXIT_VMSAVE
] = invalid_op_interception
,
1443 [SVM_EXIT_STGI
] = invalid_op_interception
,
1444 [SVM_EXIT_CLGI
] = invalid_op_interception
,
1445 [SVM_EXIT_SKINIT
] = invalid_op_interception
,
1446 [SVM_EXIT_WBINVD
] = emulate_on_interception
,
1447 [SVM_EXIT_MONITOR
] = invalid_op_interception
,
1448 [SVM_EXIT_MWAIT
] = invalid_op_interception
,
1449 [SVM_EXIT_NPF
] = pf_interception
,
1452 static int handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1454 struct vcpu_svm
*svm
= to_svm(vcpu
);
1455 u32 exit_code
= svm
->vmcb
->control
.exit_code
;
1457 KVMTRACE_3D(VMEXIT
, vcpu
, exit_code
, (u32
)svm
->vmcb
->save
.rip
,
1458 (u32
)((u64
)svm
->vmcb
->save
.rip
>> 32), entryexit
);
1462 if ((vcpu
->arch
.cr0
^ svm
->vmcb
->save
.cr0
) & X86_CR0_PG
) {
1463 svm_set_cr0(vcpu
, svm
->vmcb
->save
.cr0
);
1466 vcpu
->arch
.cr0
= svm
->vmcb
->save
.cr0
;
1467 vcpu
->arch
.cr3
= svm
->vmcb
->save
.cr3
;
1468 if (is_paging(vcpu
) && is_pae(vcpu
) && !is_long_mode(vcpu
)) {
1469 if (!load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
1470 kvm_inject_gp(vcpu
, 0);
1475 kvm_mmu_reset_context(vcpu
);
1482 if (svm
->vmcb
->control
.exit_code
== SVM_EXIT_ERR
) {
1483 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
1484 kvm_run
->fail_entry
.hardware_entry_failure_reason
1485 = svm
->vmcb
->control
.exit_code
;
1489 if (is_external_interrupt(svm
->vmcb
->control
.exit_int_info
) &&
1490 exit_code
!= SVM_EXIT_EXCP_BASE
+ PF_VECTOR
&&
1491 exit_code
!= SVM_EXIT_NPF
)
1492 printk(KERN_ERR
"%s: unexpected exit_ini_info 0x%x "
1494 __func__
, svm
->vmcb
->control
.exit_int_info
,
1497 if (exit_code
>= ARRAY_SIZE(svm_exit_handlers
)
1498 || !svm_exit_handlers
[exit_code
]) {
1499 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1500 kvm_run
->hw
.hardware_exit_reason
= exit_code
;
1504 return svm_exit_handlers
[exit_code
](svm
, kvm_run
);
1507 static void reload_tss(struct kvm_vcpu
*vcpu
)
1509 int cpu
= raw_smp_processor_id();
1511 struct svm_cpu_data
*svm_data
= per_cpu(svm_data
, cpu
);
1512 svm_data
->tss_desc
->type
= 9; /* available 32/64-bit TSS */
1516 static void pre_svm_run(struct vcpu_svm
*svm
)
1518 int cpu
= raw_smp_processor_id();
1520 struct svm_cpu_data
*svm_data
= per_cpu(svm_data
, cpu
);
1522 svm
->vmcb
->control
.tlb_ctl
= TLB_CONTROL_DO_NOTHING
;
1523 if (svm
->vcpu
.cpu
!= cpu
||
1524 svm
->asid_generation
!= svm_data
->asid_generation
)
1525 new_asid(svm
, svm_data
);
1529 static inline void svm_inject_irq(struct vcpu_svm
*svm
, int irq
)
1531 struct vmcb_control_area
*control
;
1533 KVMTRACE_1D(INJ_VIRQ
, &svm
->vcpu
, (u32
)irq
, handler
);
1535 ++svm
->vcpu
.stat
.irq_injections
;
1536 control
= &svm
->vmcb
->control
;
1537 control
->int_vector
= irq
;
1538 control
->int_ctl
&= ~V_INTR_PRIO_MASK
;
1539 control
->int_ctl
|= V_IRQ_MASK
|
1540 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT
);
1543 static void svm_set_irq(struct kvm_vcpu
*vcpu
, int irq
)
1545 struct vcpu_svm
*svm
= to_svm(vcpu
);
1547 svm_inject_irq(svm
, irq
);
1550 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
1552 struct vcpu_svm
*svm
= to_svm(vcpu
);
1553 struct vmcb
*vmcb
= svm
->vmcb
;
1556 if (!irqchip_in_kernel(vcpu
->kvm
) || vcpu
->arch
.apic
->vapic_addr
)
1559 vmcb
->control
.intercept_cr_write
&= ~INTERCEPT_CR8_MASK
;
1561 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
1565 tpr
= kvm_lapic_get_cr8(vcpu
) << 4;
1567 if (tpr
>= (max_irr
& 0xf0))
1568 vmcb
->control
.intercept_cr_write
|= INTERCEPT_CR8_MASK
;
1571 static void svm_intr_assist(struct kvm_vcpu
*vcpu
)
1573 struct vcpu_svm
*svm
= to_svm(vcpu
);
1574 struct vmcb
*vmcb
= svm
->vmcb
;
1575 int intr_vector
= -1;
1577 if ((vmcb
->control
.exit_int_info
& SVM_EVTINJ_VALID
) &&
1578 ((vmcb
->control
.exit_int_info
& SVM_EVTINJ_TYPE_MASK
) == 0)) {
1579 intr_vector
= vmcb
->control
.exit_int_info
&
1580 SVM_EVTINJ_VEC_MASK
;
1581 vmcb
->control
.exit_int_info
= 0;
1582 svm_inject_irq(svm
, intr_vector
);
1586 if (vmcb
->control
.int_ctl
& V_IRQ_MASK
)
1589 if (!kvm_cpu_has_interrupt(vcpu
))
1592 if (!(vmcb
->save
.rflags
& X86_EFLAGS_IF
) ||
1593 (vmcb
->control
.int_state
& SVM_INTERRUPT_SHADOW_MASK
) ||
1594 (vmcb
->control
.event_inj
& SVM_EVTINJ_VALID
)) {
1595 /* unable to deliver irq, set pending irq */
1596 vmcb
->control
.intercept
|= (1ULL << INTERCEPT_VINTR
);
1597 svm_inject_irq(svm
, 0x0);
1600 /* Okay, we can deliver the interrupt: grab it and update PIC state. */
1601 intr_vector
= kvm_cpu_get_interrupt(vcpu
);
1602 svm_inject_irq(svm
, intr_vector
);
1603 kvm_timer_intr_post(vcpu
, intr_vector
);
1605 update_cr8_intercept(vcpu
);
1608 static void kvm_reput_irq(struct vcpu_svm
*svm
)
1610 struct vmcb_control_area
*control
= &svm
->vmcb
->control
;
1612 if ((control
->int_ctl
& V_IRQ_MASK
)
1613 && !irqchip_in_kernel(svm
->vcpu
.kvm
)) {
1614 control
->int_ctl
&= ~V_IRQ_MASK
;
1615 push_irq(&svm
->vcpu
, control
->int_vector
);
1618 svm
->vcpu
.arch
.interrupt_window_open
=
1619 !(control
->int_state
& SVM_INTERRUPT_SHADOW_MASK
);
1622 static void svm_do_inject_vector(struct vcpu_svm
*svm
)
1624 struct kvm_vcpu
*vcpu
= &svm
->vcpu
;
1625 int word_index
= __ffs(vcpu
->arch
.irq_summary
);
1626 int bit_index
= __ffs(vcpu
->arch
.irq_pending
[word_index
]);
1627 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1629 clear_bit(bit_index
, &vcpu
->arch
.irq_pending
[word_index
]);
1630 if (!vcpu
->arch
.irq_pending
[word_index
])
1631 clear_bit(word_index
, &vcpu
->arch
.irq_summary
);
1632 svm_inject_irq(svm
, irq
);
1635 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1636 struct kvm_run
*kvm_run
)
1638 struct vcpu_svm
*svm
= to_svm(vcpu
);
1639 struct vmcb_control_area
*control
= &svm
->vmcb
->control
;
1641 svm
->vcpu
.arch
.interrupt_window_open
=
1642 (!(control
->int_state
& SVM_INTERRUPT_SHADOW_MASK
) &&
1643 (svm
->vmcb
->save
.rflags
& X86_EFLAGS_IF
));
1645 if (svm
->vcpu
.arch
.interrupt_window_open
&& svm
->vcpu
.arch
.irq_summary
)
1647 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1649 svm_do_inject_vector(svm
);
1652 * Interrupts blocked. Wait for unblock.
1654 if (!svm
->vcpu
.arch
.interrupt_window_open
&&
1655 (svm
->vcpu
.arch
.irq_summary
|| kvm_run
->request_interrupt_window
))
1656 control
->intercept
|= 1ULL << INTERCEPT_VINTR
;
1658 control
->intercept
&= ~(1ULL << INTERCEPT_VINTR
);
1661 static int svm_set_tss_addr(struct kvm
*kvm
, unsigned int addr
)
1666 static void save_db_regs(unsigned long *db_regs
)
1668 asm volatile ("mov %%dr0, %0" : "=r"(db_regs
[0]));
1669 asm volatile ("mov %%dr1, %0" : "=r"(db_regs
[1]));
1670 asm volatile ("mov %%dr2, %0" : "=r"(db_regs
[2]));
1671 asm volatile ("mov %%dr3, %0" : "=r"(db_regs
[3]));
1674 static void load_db_regs(unsigned long *db_regs
)
1676 asm volatile ("mov %0, %%dr0" : : "r"(db_regs
[0]));
1677 asm volatile ("mov %0, %%dr1" : : "r"(db_regs
[1]));
1678 asm volatile ("mov %0, %%dr2" : : "r"(db_regs
[2]));
1679 asm volatile ("mov %0, %%dr3" : : "r"(db_regs
[3]));
1682 static void svm_flush_tlb(struct kvm_vcpu
*vcpu
)
1684 force_new_asid(vcpu
);
1687 static void svm_prepare_guest_switch(struct kvm_vcpu
*vcpu
)
1691 static inline void sync_cr8_to_lapic(struct kvm_vcpu
*vcpu
)
1693 struct vcpu_svm
*svm
= to_svm(vcpu
);
1695 if (!(svm
->vmcb
->control
.intercept_cr_write
& INTERCEPT_CR8_MASK
)) {
1696 int cr8
= svm
->vmcb
->control
.int_ctl
& V_TPR_MASK
;
1697 kvm_lapic_set_tpr(vcpu
, cr8
);
1701 static inline void sync_lapic_to_cr8(struct kvm_vcpu
*vcpu
)
1703 struct vcpu_svm
*svm
= to_svm(vcpu
);
1706 if (!irqchip_in_kernel(vcpu
->kvm
))
1709 cr8
= kvm_get_cr8(vcpu
);
1710 svm
->vmcb
->control
.int_ctl
&= ~V_TPR_MASK
;
1711 svm
->vmcb
->control
.int_ctl
|= cr8
& V_TPR_MASK
;
1714 #ifdef CONFIG_X86_64
1720 static void svm_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1722 struct vcpu_svm
*svm
= to_svm(vcpu
);
1727 svm
->vmcb
->save
.rax
= vcpu
->arch
.regs
[VCPU_REGS_RAX
];
1728 svm
->vmcb
->save
.rsp
= vcpu
->arch
.regs
[VCPU_REGS_RSP
];
1729 svm
->vmcb
->save
.rip
= vcpu
->arch
.regs
[VCPU_REGS_RIP
];
1733 sync_lapic_to_cr8(vcpu
);
1735 save_host_msrs(vcpu
);
1736 fs_selector
= kvm_read_fs();
1737 gs_selector
= kvm_read_gs();
1738 ldt_selector
= kvm_read_ldt();
1739 svm
->host_cr2
= kvm_read_cr2();
1740 svm
->host_dr6
= read_dr6();
1741 svm
->host_dr7
= read_dr7();
1742 svm
->vmcb
->save
.cr2
= vcpu
->arch
.cr2
;
1743 /* required for live migration with NPT */
1745 svm
->vmcb
->save
.cr3
= vcpu
->arch
.cr3
;
1747 if (svm
->vmcb
->save
.dr7
& 0xff) {
1749 save_db_regs(svm
->host_db_regs
);
1750 load_db_regs(svm
->db_regs
);
1758 "push %%"R
"bp; \n\t"
1759 "mov %c[rbx](%[svm]), %%"R
"bx \n\t"
1760 "mov %c[rcx](%[svm]), %%"R
"cx \n\t"
1761 "mov %c[rdx](%[svm]), %%"R
"dx \n\t"
1762 "mov %c[rsi](%[svm]), %%"R
"si \n\t"
1763 "mov %c[rdi](%[svm]), %%"R
"di \n\t"
1764 "mov %c[rbp](%[svm]), %%"R
"bp \n\t"
1765 #ifdef CONFIG_X86_64
1766 "mov %c[r8](%[svm]), %%r8 \n\t"
1767 "mov %c[r9](%[svm]), %%r9 \n\t"
1768 "mov %c[r10](%[svm]), %%r10 \n\t"
1769 "mov %c[r11](%[svm]), %%r11 \n\t"
1770 "mov %c[r12](%[svm]), %%r12 \n\t"
1771 "mov %c[r13](%[svm]), %%r13 \n\t"
1772 "mov %c[r14](%[svm]), %%r14 \n\t"
1773 "mov %c[r15](%[svm]), %%r15 \n\t"
1776 /* Enter guest mode */
1778 "mov %c[vmcb](%[svm]), %%"R
"ax \n\t"
1779 __ex(SVM_VMLOAD
) "\n\t"
1780 __ex(SVM_VMRUN
) "\n\t"
1781 __ex(SVM_VMSAVE
) "\n\t"
1784 /* Save guest registers, load host registers */
1785 "mov %%"R
"bx, %c[rbx](%[svm]) \n\t"
1786 "mov %%"R
"cx, %c[rcx](%[svm]) \n\t"
1787 "mov %%"R
"dx, %c[rdx](%[svm]) \n\t"
1788 "mov %%"R
"si, %c[rsi](%[svm]) \n\t"
1789 "mov %%"R
"di, %c[rdi](%[svm]) \n\t"
1790 "mov %%"R
"bp, %c[rbp](%[svm]) \n\t"
1791 #ifdef CONFIG_X86_64
1792 "mov %%r8, %c[r8](%[svm]) \n\t"
1793 "mov %%r9, %c[r9](%[svm]) \n\t"
1794 "mov %%r10, %c[r10](%[svm]) \n\t"
1795 "mov %%r11, %c[r11](%[svm]) \n\t"
1796 "mov %%r12, %c[r12](%[svm]) \n\t"
1797 "mov %%r13, %c[r13](%[svm]) \n\t"
1798 "mov %%r14, %c[r14](%[svm]) \n\t"
1799 "mov %%r15, %c[r15](%[svm]) \n\t"
1804 [vmcb
]"i"(offsetof(struct vcpu_svm
, vmcb_pa
)),
1805 [rbx
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RBX
])),
1806 [rcx
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RCX
])),
1807 [rdx
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RDX
])),
1808 [rsi
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RSI
])),
1809 [rdi
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RDI
])),
1810 [rbp
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_RBP
]))
1811 #ifdef CONFIG_X86_64
1812 , [r8
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R8
])),
1813 [r9
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R9
])),
1814 [r10
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R10
])),
1815 [r11
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R11
])),
1816 [r12
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R12
])),
1817 [r13
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R13
])),
1818 [r14
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R14
])),
1819 [r15
]"i"(offsetof(struct vcpu_svm
, vcpu
.arch
.regs
[VCPU_REGS_R15
]))
1822 , R
"bx", R
"cx", R
"dx", R
"si", R
"di"
1823 #ifdef CONFIG_X86_64
1824 , "r8", "r9", "r10", "r11" , "r12", "r13", "r14", "r15"
1828 if ((svm
->vmcb
->save
.dr7
& 0xff))
1829 load_db_regs(svm
->host_db_regs
);
1831 vcpu
->arch
.cr2
= svm
->vmcb
->save
.cr2
;
1832 vcpu
->arch
.regs
[VCPU_REGS_RAX
] = svm
->vmcb
->save
.rax
;
1833 vcpu
->arch
.regs
[VCPU_REGS_RSP
] = svm
->vmcb
->save
.rsp
;
1834 vcpu
->arch
.regs
[VCPU_REGS_RIP
] = svm
->vmcb
->save
.rip
;
1836 write_dr6(svm
->host_dr6
);
1837 write_dr7(svm
->host_dr7
);
1838 kvm_write_cr2(svm
->host_cr2
);
1840 kvm_load_fs(fs_selector
);
1841 kvm_load_gs(gs_selector
);
1842 kvm_load_ldt(ldt_selector
);
1843 load_host_msrs(vcpu
);
1847 local_irq_disable();
1851 sync_cr8_to_lapic(vcpu
);
1858 static void svm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long root
)
1860 struct vcpu_svm
*svm
= to_svm(vcpu
);
1863 svm
->vmcb
->control
.nested_cr3
= root
;
1864 force_new_asid(vcpu
);
1868 svm
->vmcb
->save
.cr3
= root
;
1869 force_new_asid(vcpu
);
1871 if (vcpu
->fpu_active
) {
1872 svm
->vmcb
->control
.intercept_exceptions
|= (1 << NM_VECTOR
);
1873 svm
->vmcb
->save
.cr0
|= X86_CR0_TS
;
1874 vcpu
->fpu_active
= 0;
1878 static int is_disabled(void)
1882 rdmsrl(MSR_VM_CR
, vm_cr
);
1883 if (vm_cr
& (1 << SVM_VM_CR_SVM_DISABLE
))
1890 svm_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1893 * Patch in the VMMCALL instruction:
1895 hypercall
[0] = 0x0f;
1896 hypercall
[1] = 0x01;
1897 hypercall
[2] = 0xd9;
1900 static void svm_check_processor_compat(void *rtn
)
1905 static bool svm_cpu_has_accelerated_tpr(void)
1910 static int get_npt_level(void)
1912 #ifdef CONFIG_X86_64
1913 return PT64_ROOT_LEVEL
;
1915 return PT32E_ROOT_LEVEL
;
1919 static int svm_get_mt_mask_shift(void)
1924 static struct kvm_x86_ops svm_x86_ops
= {
1925 .cpu_has_kvm_support
= has_svm
,
1926 .disabled_by_bios
= is_disabled
,
1927 .hardware_setup
= svm_hardware_setup
,
1928 .hardware_unsetup
= svm_hardware_unsetup
,
1929 .check_processor_compatibility
= svm_check_processor_compat
,
1930 .hardware_enable
= svm_hardware_enable
,
1931 .hardware_disable
= svm_hardware_disable
,
1932 .cpu_has_accelerated_tpr
= svm_cpu_has_accelerated_tpr
,
1934 .vcpu_create
= svm_create_vcpu
,
1935 .vcpu_free
= svm_free_vcpu
,
1936 .vcpu_reset
= svm_vcpu_reset
,
1938 .prepare_guest_switch
= svm_prepare_guest_switch
,
1939 .vcpu_load
= svm_vcpu_load
,
1940 .vcpu_put
= svm_vcpu_put
,
1942 .set_guest_debug
= svm_guest_debug
,
1943 .get_msr
= svm_get_msr
,
1944 .set_msr
= svm_set_msr
,
1945 .get_segment_base
= svm_get_segment_base
,
1946 .get_segment
= svm_get_segment
,
1947 .set_segment
= svm_set_segment
,
1948 .get_cpl
= svm_get_cpl
,
1949 .get_cs_db_l_bits
= kvm_get_cs_db_l_bits
,
1950 .decache_cr4_guest_bits
= svm_decache_cr4_guest_bits
,
1951 .set_cr0
= svm_set_cr0
,
1952 .set_cr3
= svm_set_cr3
,
1953 .set_cr4
= svm_set_cr4
,
1954 .set_efer
= svm_set_efer
,
1955 .get_idt
= svm_get_idt
,
1956 .set_idt
= svm_set_idt
,
1957 .get_gdt
= svm_get_gdt
,
1958 .set_gdt
= svm_set_gdt
,
1959 .get_dr
= svm_get_dr
,
1960 .set_dr
= svm_set_dr
,
1961 .get_rflags
= svm_get_rflags
,
1962 .set_rflags
= svm_set_rflags
,
1964 .tlb_flush
= svm_flush_tlb
,
1966 .run
= svm_vcpu_run
,
1967 .handle_exit
= handle_exit
,
1968 .skip_emulated_instruction
= skip_emulated_instruction
,
1969 .patch_hypercall
= svm_patch_hypercall
,
1970 .get_irq
= svm_get_irq
,
1971 .set_irq
= svm_set_irq
,
1972 .queue_exception
= svm_queue_exception
,
1973 .exception_injected
= svm_exception_injected
,
1974 .inject_pending_irq
= svm_intr_assist
,
1975 .inject_pending_vectors
= do_interrupt_requests
,
1977 .set_tss_addr
= svm_set_tss_addr
,
1978 .get_tdp_level
= get_npt_level
,
1979 .get_mt_mask_shift
= svm_get_mt_mask_shift
,
1982 static int __init
svm_init(void)
1984 return kvm_init(&svm_x86_ops
, sizeof(struct vcpu_svm
),
1988 static void __exit
svm_exit(void)
1993 module_init(svm_init
)
1994 module_exit(svm_exit
)