1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_X86_VMX_CAPS_H
3 #define __KVM_X86_VMX_CAPS_H
9 extern bool __read_mostly enable_vpid
;
10 extern bool __read_mostly flexpriority_enabled
;
11 extern bool __read_mostly enable_ept
;
12 extern bool __read_mostly enable_unrestricted_guest
;
13 extern bool __read_mostly enable_ept_ad_bits
;
14 extern bool __read_mostly enable_pml
;
15 extern int __read_mostly pt_mode
;
17 #define PT_MODE_SYSTEM 0
18 #define PT_MODE_HOST_GUEST 1
20 #define PMU_CAP_FW_WRITES (1ULL << 13)
21 #define PMU_CAP_LBR_FMT 0x3f
23 #define DEBUGCTLMSR_LBR_MASK (DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI)
25 struct nested_vmx_msrs
{
27 * We only store the "true" versions of the VMX capability MSRs. We
28 * generate the "non-true" versions by setting the must-be-1 bits
29 * according to the SDM.
31 u32 procbased_ctls_low
;
32 u32 procbased_ctls_high
;
33 u32 secondary_ctls_low
;
34 u32 secondary_ctls_high
;
35 u32 pinbased_ctls_low
;
36 u32 pinbased_ctls_high
;
59 u32 pin_based_exec_ctrl
;
60 u32 cpu_based_exec_ctrl
;
61 u32 cpu_based_2nd_exec_ctrl
;
64 struct nested_vmx_msrs nested
;
66 extern struct vmcs_config vmcs_config
;
68 struct vmx_capability
{
72 extern struct vmx_capability vmx_capability
;
74 static inline bool cpu_has_vmx_basic_inout(void)
76 return (((u64
)vmcs_config
.basic_cap
<< 32) & VMX_BASIC_INOUT
);
79 static inline bool cpu_has_virtual_nmis(void)
81 return vmcs_config
.pin_based_exec_ctrl
& PIN_BASED_VIRTUAL_NMIS
;
84 static inline bool cpu_has_vmx_preemption_timer(void)
86 return vmcs_config
.pin_based_exec_ctrl
&
87 PIN_BASED_VMX_PREEMPTION_TIMER
;
90 static inline bool cpu_has_vmx_posted_intr(void)
92 return vmcs_config
.pin_based_exec_ctrl
& PIN_BASED_POSTED_INTR
;
95 static inline bool cpu_has_load_ia32_efer(void)
97 return (vmcs_config
.vmentry_ctrl
& VM_ENTRY_LOAD_IA32_EFER
) &&
98 (vmcs_config
.vmexit_ctrl
& VM_EXIT_LOAD_IA32_EFER
);
101 static inline bool cpu_has_load_perf_global_ctrl(void)
103 return (vmcs_config
.vmentry_ctrl
& VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL
) &&
104 (vmcs_config
.vmexit_ctrl
& VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL
);
107 static inline bool cpu_has_vmx_mpx(void)
109 return (vmcs_config
.vmexit_ctrl
& VM_EXIT_CLEAR_BNDCFGS
) &&
110 (vmcs_config
.vmentry_ctrl
& VM_ENTRY_LOAD_BNDCFGS
);
113 static inline bool cpu_has_vmx_tpr_shadow(void)
115 return vmcs_config
.cpu_based_exec_ctrl
& CPU_BASED_TPR_SHADOW
;
118 static inline bool cpu_need_tpr_shadow(struct kvm_vcpu
*vcpu
)
120 return cpu_has_vmx_tpr_shadow() && lapic_in_kernel(vcpu
);
123 static inline bool cpu_has_vmx_msr_bitmap(void)
125 return vmcs_config
.cpu_based_exec_ctrl
& CPU_BASED_USE_MSR_BITMAPS
;
128 static inline bool cpu_has_secondary_exec_ctrls(void)
130 return vmcs_config
.cpu_based_exec_ctrl
&
131 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS
;
134 static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
136 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
137 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES
;
140 static inline bool cpu_has_vmx_ept(void)
142 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
143 SECONDARY_EXEC_ENABLE_EPT
;
146 static inline bool vmx_umip_emulated(void)
148 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
152 static inline bool cpu_has_vmx_rdtscp(void)
154 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
155 SECONDARY_EXEC_ENABLE_RDTSCP
;
158 static inline bool cpu_has_vmx_virtualize_x2apic_mode(void)
160 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
161 SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE
;
164 static inline bool cpu_has_vmx_vpid(void)
166 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
167 SECONDARY_EXEC_ENABLE_VPID
;
170 static inline bool cpu_has_vmx_wbinvd_exit(void)
172 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
173 SECONDARY_EXEC_WBINVD_EXITING
;
176 static inline bool cpu_has_vmx_unrestricted_guest(void)
178 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
179 SECONDARY_EXEC_UNRESTRICTED_GUEST
;
182 static inline bool cpu_has_vmx_apic_register_virt(void)
184 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
185 SECONDARY_EXEC_APIC_REGISTER_VIRT
;
188 static inline bool cpu_has_vmx_virtual_intr_delivery(void)
190 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
191 SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY
;
194 static inline bool cpu_has_vmx_ple(void)
196 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
197 SECONDARY_EXEC_PAUSE_LOOP_EXITING
;
200 static inline bool cpu_has_vmx_rdrand(void)
202 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
203 SECONDARY_EXEC_RDRAND_EXITING
;
206 static inline bool cpu_has_vmx_invpcid(void)
208 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
209 SECONDARY_EXEC_ENABLE_INVPCID
;
212 static inline bool cpu_has_vmx_vmfunc(void)
214 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
215 SECONDARY_EXEC_ENABLE_VMFUNC
;
218 static inline bool cpu_has_vmx_shadow_vmcs(void)
222 /* check if the cpu supports writing r/o exit information fields */
223 rdmsrl(MSR_IA32_VMX_MISC
, vmx_msr
);
224 if (!(vmx_msr
& MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS
))
227 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
228 SECONDARY_EXEC_SHADOW_VMCS
;
231 static inline bool cpu_has_vmx_encls_vmexit(void)
233 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
234 SECONDARY_EXEC_ENCLS_EXITING
;
237 static inline bool cpu_has_vmx_rdseed(void)
239 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
240 SECONDARY_EXEC_RDSEED_EXITING
;
243 static inline bool cpu_has_vmx_pml(void)
245 return vmcs_config
.cpu_based_2nd_exec_ctrl
& SECONDARY_EXEC_ENABLE_PML
;
248 static inline bool cpu_has_vmx_xsaves(void)
250 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
251 SECONDARY_EXEC_XSAVES
;
254 static inline bool cpu_has_vmx_waitpkg(void)
256 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
257 SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE
;
260 static inline bool cpu_has_vmx_tsc_scaling(void)
262 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
263 SECONDARY_EXEC_TSC_SCALING
;
266 static inline bool cpu_has_vmx_bus_lock_detection(void)
268 return vmcs_config
.cpu_based_2nd_exec_ctrl
&
269 SECONDARY_EXEC_BUS_LOCK_DETECTION
;
272 static inline bool cpu_has_vmx_apicv(void)
274 return cpu_has_vmx_apic_register_virt() &&
275 cpu_has_vmx_virtual_intr_delivery() &&
276 cpu_has_vmx_posted_intr();
279 static inline bool cpu_has_vmx_flexpriority(void)
281 return cpu_has_vmx_tpr_shadow() &&
282 cpu_has_vmx_virtualize_apic_accesses();
285 static inline bool cpu_has_vmx_ept_execute_only(void)
287 return vmx_capability
.ept
& VMX_EPT_EXECUTE_ONLY_BIT
;
290 static inline bool cpu_has_vmx_ept_4levels(void)
292 return vmx_capability
.ept
& VMX_EPT_PAGE_WALK_4_BIT
;
295 static inline bool cpu_has_vmx_ept_5levels(void)
297 return vmx_capability
.ept
& VMX_EPT_PAGE_WALK_5_BIT
;
300 static inline bool cpu_has_vmx_ept_mt_wb(void)
302 return vmx_capability
.ept
& VMX_EPTP_WB_BIT
;
305 static inline bool cpu_has_vmx_ept_2m_page(void)
307 return vmx_capability
.ept
& VMX_EPT_2MB_PAGE_BIT
;
310 static inline bool cpu_has_vmx_ept_1g_page(void)
312 return vmx_capability
.ept
& VMX_EPT_1GB_PAGE_BIT
;
315 static inline bool cpu_has_vmx_ept_ad_bits(void)
317 return vmx_capability
.ept
& VMX_EPT_AD_BIT
;
320 static inline bool cpu_has_vmx_invept_context(void)
322 return vmx_capability
.ept
& VMX_EPT_EXTENT_CONTEXT_BIT
;
325 static inline bool cpu_has_vmx_invept_global(void)
327 return vmx_capability
.ept
& VMX_EPT_EXTENT_GLOBAL_BIT
;
330 static inline bool cpu_has_vmx_invvpid(void)
332 return vmx_capability
.vpid
& VMX_VPID_INVVPID_BIT
;
335 static inline bool cpu_has_vmx_invvpid_individual_addr(void)
337 return vmx_capability
.vpid
& VMX_VPID_EXTENT_INDIVIDUAL_ADDR_BIT
;
340 static inline bool cpu_has_vmx_invvpid_single(void)
342 return vmx_capability
.vpid
& VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT
;
345 static inline bool cpu_has_vmx_invvpid_global(void)
347 return vmx_capability
.vpid
& VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT
;
350 static inline bool cpu_has_vmx_intel_pt(void)
354 rdmsrl(MSR_IA32_VMX_MISC
, vmx_msr
);
355 return (vmx_msr
& MSR_IA32_VMX_MISC_INTEL_PT
) &&
356 (vmcs_config
.cpu_based_2nd_exec_ctrl
& SECONDARY_EXEC_PT_USE_GPA
) &&
357 (vmcs_config
.vmexit_ctrl
& VM_EXIT_CLEAR_IA32_RTIT_CTL
) &&
358 (vmcs_config
.vmentry_ctrl
& VM_ENTRY_LOAD_IA32_RTIT_CTL
);
362 * Processor Trace can operate in one of three modes:
363 * a. system-wide: trace both host/guest and output to host buffer
364 * b. host-only: only trace host and output to host buffer
365 * c. host-guest: trace host and guest simultaneously and output to their
368 * KVM currently only supports (a) and (c).
370 static inline bool vmx_pt_mode_is_system(void)
372 return pt_mode
== PT_MODE_SYSTEM
;
374 static inline bool vmx_pt_mode_is_host_guest(void)
376 return pt_mode
== PT_MODE_HOST_GUEST
;
379 static inline u64
vmx_get_perf_capabilities(void)
383 if (boot_cpu_has(X86_FEATURE_PDCM
))
384 rdmsrl(MSR_IA32_PERF_CAPABILITIES
, perf_cap
);
386 perf_cap
&= PMU_CAP_LBR_FMT
;
389 * Since counters are virtualized, KVM would support full
390 * width counting unconditionally, even if the host lacks it.
392 return PMU_CAP_FW_WRITES
| perf_cap
;
395 static inline u64
vmx_supported_debugctl(void)
399 if (boot_cpu_has(X86_FEATURE_BUS_LOCK_DETECT
))
400 debugctl
|= DEBUGCTLMSR_BUS_LOCK_DETECT
;
402 if (vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT
)
403 debugctl
|= DEBUGCTLMSR_LBR_MASK
;
408 #endif /* __KVM_X86_VMX_CAPS_H */