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KVM: Fix mov cr0 #GP at wrong instruction
[mirror_ubuntu-artful-kernel.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
10 *
11 * Authors:
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
16 *
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
19 *
20 */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
47
48 #define CREATE_TRACE_POINTS
49 #include "trace.h"
50
51 #include <asm/debugreg.h>
52 #include <asm/msr.h>
53 #include <asm/desc.h>
54 #include <asm/mtrr.h>
55 #include <asm/mce.h>
56 #include <asm/i387.h>
57 #include <asm/xcr.h>
58
59 #define MAX_IO_MSRS 256
60 #define CR0_RESERVED_BITS \
61 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
62 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
63 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
64 #define CR4_RESERVED_BITS \
65 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
66 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
67 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
68 | X86_CR4_OSXSAVE \
69 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
70
71 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
72
73 #define KVM_MAX_MCE_BANKS 32
74 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
75
76 /* EFER defaults:
77 * - enable syscall per default because its emulated by KVM
78 * - enable LME and LMA per default on 64 bit KVM
79 */
80 #ifdef CONFIG_X86_64
81 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
82 #else
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
84 #endif
85
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88
89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
90 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
91 struct kvm_cpuid_entry2 __user *entries);
92
93 struct kvm_x86_ops *kvm_x86_ops;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
95
96 int ignore_msrs = 0;
97 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
98
99 #define KVM_NR_SHARED_MSRS 16
100
101 struct kvm_shared_msrs_global {
102 int nr;
103 u32 msrs[KVM_NR_SHARED_MSRS];
104 };
105
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
108 bool registered;
109 struct kvm_shared_msr_values {
110 u64 host;
111 u64 curr;
112 } values[KVM_NR_SHARED_MSRS];
113 };
114
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
117
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
151 { NULL }
152 };
153
154 u64 __read_mostly host_xcr0;
155
156 static inline u32 bit(int bitno)
157 {
158 return 1 << (bitno & 31);
159 }
160
161 static void kvm_on_user_return(struct user_return_notifier *urn)
162 {
163 unsigned slot;
164 struct kvm_shared_msrs *locals
165 = container_of(urn, struct kvm_shared_msrs, urn);
166 struct kvm_shared_msr_values *values;
167
168 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
169 values = &locals->values[slot];
170 if (values->host != values->curr) {
171 wrmsrl(shared_msrs_global.msrs[slot], values->host);
172 values->curr = values->host;
173 }
174 }
175 locals->registered = false;
176 user_return_notifier_unregister(urn);
177 }
178
179 static void shared_msr_update(unsigned slot, u32 msr)
180 {
181 struct kvm_shared_msrs *smsr;
182 u64 value;
183
184 smsr = &__get_cpu_var(shared_msrs);
185 /* only read, and nobody should modify it at this time,
186 * so don't need lock */
187 if (slot >= shared_msrs_global.nr) {
188 printk(KERN_ERR "kvm: invalid MSR slot!");
189 return;
190 }
191 rdmsrl_safe(msr, &value);
192 smsr->values[slot].host = value;
193 smsr->values[slot].curr = value;
194 }
195
196 void kvm_define_shared_msr(unsigned slot, u32 msr)
197 {
198 if (slot >= shared_msrs_global.nr)
199 shared_msrs_global.nr = slot + 1;
200 shared_msrs_global.msrs[slot] = msr;
201 /* we need ensured the shared_msr_global have been updated */
202 smp_wmb();
203 }
204 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
205
206 static void kvm_shared_msr_cpu_online(void)
207 {
208 unsigned i;
209
210 for (i = 0; i < shared_msrs_global.nr; ++i)
211 shared_msr_update(i, shared_msrs_global.msrs[i]);
212 }
213
214 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
215 {
216 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
217
218 if (((value ^ smsr->values[slot].curr) & mask) == 0)
219 return;
220 smsr->values[slot].curr = value;
221 wrmsrl(shared_msrs_global.msrs[slot], value);
222 if (!smsr->registered) {
223 smsr->urn.on_user_return = kvm_on_user_return;
224 user_return_notifier_register(&smsr->urn);
225 smsr->registered = true;
226 }
227 }
228 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
229
230 static void drop_user_return_notifiers(void *ignore)
231 {
232 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
233
234 if (smsr->registered)
235 kvm_on_user_return(&smsr->urn);
236 }
237
238 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
239 {
240 if (irqchip_in_kernel(vcpu->kvm))
241 return vcpu->arch.apic_base;
242 else
243 return vcpu->arch.apic_base;
244 }
245 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
246
247 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
248 {
249 /* TODO: reserve bits check */
250 if (irqchip_in_kernel(vcpu->kvm))
251 kvm_lapic_set_base(vcpu, data);
252 else
253 vcpu->arch.apic_base = data;
254 }
255 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
256
257 #define EXCPT_BENIGN 0
258 #define EXCPT_CONTRIBUTORY 1
259 #define EXCPT_PF 2
260
261 static int exception_class(int vector)
262 {
263 switch (vector) {
264 case PF_VECTOR:
265 return EXCPT_PF;
266 case DE_VECTOR:
267 case TS_VECTOR:
268 case NP_VECTOR:
269 case SS_VECTOR:
270 case GP_VECTOR:
271 return EXCPT_CONTRIBUTORY;
272 default:
273 break;
274 }
275 return EXCPT_BENIGN;
276 }
277
278 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
279 unsigned nr, bool has_error, u32 error_code,
280 bool reinject)
281 {
282 u32 prev_nr;
283 int class1, class2;
284
285 if (!vcpu->arch.exception.pending) {
286 queue:
287 vcpu->arch.exception.pending = true;
288 vcpu->arch.exception.has_error_code = has_error;
289 vcpu->arch.exception.nr = nr;
290 vcpu->arch.exception.error_code = error_code;
291 vcpu->arch.exception.reinject = reinject;
292 return;
293 }
294
295 /* to check exception */
296 prev_nr = vcpu->arch.exception.nr;
297 if (prev_nr == DF_VECTOR) {
298 /* triple fault -> shutdown */
299 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
300 return;
301 }
302 class1 = exception_class(prev_nr);
303 class2 = exception_class(nr);
304 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
305 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
306 /* generate double fault per SDM Table 5-5 */
307 vcpu->arch.exception.pending = true;
308 vcpu->arch.exception.has_error_code = true;
309 vcpu->arch.exception.nr = DF_VECTOR;
310 vcpu->arch.exception.error_code = 0;
311 } else
312 /* replace previous exception with a new one in a hope
313 that instruction re-execution will regenerate lost
314 exception */
315 goto queue;
316 }
317
318 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
319 {
320 kvm_multiple_exception(vcpu, nr, false, 0, false);
321 }
322 EXPORT_SYMBOL_GPL(kvm_queue_exception);
323
324 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
325 {
326 kvm_multiple_exception(vcpu, nr, false, 0, true);
327 }
328 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
329
330 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
331 u32 error_code)
332 {
333 ++vcpu->stat.pf_guest;
334 vcpu->arch.cr2 = addr;
335 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
336 }
337
338 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
339 {
340 vcpu->arch.nmi_pending = 1;
341 }
342 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
343
344 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
345 {
346 kvm_multiple_exception(vcpu, nr, true, error_code, false);
347 }
348 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
349
350 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
351 {
352 kvm_multiple_exception(vcpu, nr, true, error_code, true);
353 }
354 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
355
356 /*
357 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
358 * a #GP and return false.
359 */
360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
361 {
362 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
363 return true;
364 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
365 return false;
366 }
367 EXPORT_SYMBOL_GPL(kvm_require_cpl);
368
369 /*
370 * Load the pae pdptrs. Return true is they are all valid.
371 */
372 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
373 {
374 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
375 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
376 int i;
377 int ret;
378 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
379
380 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
381 offset * sizeof(u64), sizeof(pdpte));
382 if (ret < 0) {
383 ret = 0;
384 goto out;
385 }
386 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
387 if (is_present_gpte(pdpte[i]) &&
388 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
389 ret = 0;
390 goto out;
391 }
392 }
393 ret = 1;
394
395 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
396 __set_bit(VCPU_EXREG_PDPTR,
397 (unsigned long *)&vcpu->arch.regs_avail);
398 __set_bit(VCPU_EXREG_PDPTR,
399 (unsigned long *)&vcpu->arch.regs_dirty);
400 out:
401
402 return ret;
403 }
404 EXPORT_SYMBOL_GPL(load_pdptrs);
405
406 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
407 {
408 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
409 bool changed = true;
410 int r;
411
412 if (is_long_mode(vcpu) || !is_pae(vcpu))
413 return false;
414
415 if (!test_bit(VCPU_EXREG_PDPTR,
416 (unsigned long *)&vcpu->arch.regs_avail))
417 return true;
418
419 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
420 if (r < 0)
421 goto out;
422 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
423 out:
424
425 return changed;
426 }
427
428 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
429 {
430 unsigned long old_cr0 = kvm_read_cr0(vcpu);
431 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
432 X86_CR0_CD | X86_CR0_NW;
433
434 cr0 |= X86_CR0_ET;
435
436 #ifdef CONFIG_X86_64
437 if (cr0 & 0xffffffff00000000UL)
438 return 1;
439 #endif
440
441 cr0 &= ~CR0_RESERVED_BITS;
442
443 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
444 return 1;
445
446 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
447 return 1;
448
449 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
450 #ifdef CONFIG_X86_64
451 if ((vcpu->arch.efer & EFER_LME)) {
452 int cs_db, cs_l;
453
454 if (!is_pae(vcpu))
455 return 1;
456 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
457 if (cs_l)
458 return 1;
459 } else
460 #endif
461 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
462 return 1;
463 }
464
465 kvm_x86_ops->set_cr0(vcpu, cr0);
466
467 if ((cr0 ^ old_cr0) & update_bits)
468 kvm_mmu_reset_context(vcpu);
469 return 0;
470 }
471 EXPORT_SYMBOL_GPL(kvm_set_cr0);
472
473 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
474 {
475 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
476 }
477 EXPORT_SYMBOL_GPL(kvm_lmsw);
478
479 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
480 {
481 u64 xcr0;
482
483 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
484 if (index != XCR_XFEATURE_ENABLED_MASK)
485 return 1;
486 xcr0 = xcr;
487 if (kvm_x86_ops->get_cpl(vcpu) != 0)
488 return 1;
489 if (!(xcr0 & XSTATE_FP))
490 return 1;
491 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
492 return 1;
493 if (xcr0 & ~host_xcr0)
494 return 1;
495 vcpu->arch.xcr0 = xcr0;
496 vcpu->guest_xcr0_loaded = 0;
497 return 0;
498 }
499
500 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
501 {
502 if (__kvm_set_xcr(vcpu, index, xcr)) {
503 kvm_inject_gp(vcpu, 0);
504 return 1;
505 }
506 return 0;
507 }
508 EXPORT_SYMBOL_GPL(kvm_set_xcr);
509
510 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
511 {
512 struct kvm_cpuid_entry2 *best;
513
514 best = kvm_find_cpuid_entry(vcpu, 1, 0);
515 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
516 }
517
518 static void update_cpuid(struct kvm_vcpu *vcpu)
519 {
520 struct kvm_cpuid_entry2 *best;
521
522 best = kvm_find_cpuid_entry(vcpu, 1, 0);
523 if (!best)
524 return;
525
526 /* Update OSXSAVE bit */
527 if (cpu_has_xsave && best->function == 0x1) {
528 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
529 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
530 best->ecx |= bit(X86_FEATURE_OSXSAVE);
531 }
532 }
533
534 int __kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
535 {
536 unsigned long old_cr4 = kvm_read_cr4(vcpu);
537 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
538
539 if (cr4 & CR4_RESERVED_BITS)
540 return 1;
541
542 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
543 return 1;
544
545 if (is_long_mode(vcpu)) {
546 if (!(cr4 & X86_CR4_PAE))
547 return 1;
548 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
549 && ((cr4 ^ old_cr4) & pdptr_bits)
550 && !load_pdptrs(vcpu, vcpu->arch.cr3))
551 return 1;
552
553 if (cr4 & X86_CR4_VMXE)
554 return 1;
555
556 kvm_x86_ops->set_cr4(vcpu, cr4);
557
558 if ((cr4 ^ old_cr4) & pdptr_bits)
559 kvm_mmu_reset_context(vcpu);
560
561 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
562 update_cpuid(vcpu);
563
564 return 0;
565 }
566
567 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
568 {
569 if (__kvm_set_cr4(vcpu, cr4))
570 kvm_inject_gp(vcpu, 0);
571 }
572 EXPORT_SYMBOL_GPL(kvm_set_cr4);
573
574 static int __kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
575 {
576 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
577 kvm_mmu_sync_roots(vcpu);
578 kvm_mmu_flush_tlb(vcpu);
579 return 0;
580 }
581
582 if (is_long_mode(vcpu)) {
583 if (cr3 & CR3_L_MODE_RESERVED_BITS)
584 return 1;
585 } else {
586 if (is_pae(vcpu)) {
587 if (cr3 & CR3_PAE_RESERVED_BITS)
588 return 1;
589 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
590 return 1;
591 }
592 /*
593 * We don't check reserved bits in nonpae mode, because
594 * this isn't enforced, and VMware depends on this.
595 */
596 }
597
598 /*
599 * Does the new cr3 value map to physical memory? (Note, we
600 * catch an invalid cr3 even in real-mode, because it would
601 * cause trouble later on when we turn on paging anyway.)
602 *
603 * A real CPU would silently accept an invalid cr3 and would
604 * attempt to use it - with largely undefined (and often hard
605 * to debug) behavior on the guest side.
606 */
607 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
608 return 1;
609 vcpu->arch.cr3 = cr3;
610 vcpu->arch.mmu.new_cr3(vcpu);
611 return 0;
612 }
613
614 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
615 {
616 if (__kvm_set_cr3(vcpu, cr3))
617 kvm_inject_gp(vcpu, 0);
618 }
619 EXPORT_SYMBOL_GPL(kvm_set_cr3);
620
621 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
622 {
623 if (cr8 & CR8_RESERVED_BITS)
624 return 1;
625 if (irqchip_in_kernel(vcpu->kvm))
626 kvm_lapic_set_tpr(vcpu, cr8);
627 else
628 vcpu->arch.cr8 = cr8;
629 return 0;
630 }
631
632 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
633 {
634 if (__kvm_set_cr8(vcpu, cr8))
635 kvm_inject_gp(vcpu, 0);
636 }
637 EXPORT_SYMBOL_GPL(kvm_set_cr8);
638
639 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
640 {
641 if (irqchip_in_kernel(vcpu->kvm))
642 return kvm_lapic_get_cr8(vcpu);
643 else
644 return vcpu->arch.cr8;
645 }
646 EXPORT_SYMBOL_GPL(kvm_get_cr8);
647
648 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
649 {
650 switch (dr) {
651 case 0 ... 3:
652 vcpu->arch.db[dr] = val;
653 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
654 vcpu->arch.eff_db[dr] = val;
655 break;
656 case 4:
657 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
658 return 1; /* #UD */
659 /* fall through */
660 case 6:
661 if (val & 0xffffffff00000000ULL)
662 return -1; /* #GP */
663 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
664 break;
665 case 5:
666 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
667 return 1; /* #UD */
668 /* fall through */
669 default: /* 7 */
670 if (val & 0xffffffff00000000ULL)
671 return -1; /* #GP */
672 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
673 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
674 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
675 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
676 }
677 break;
678 }
679
680 return 0;
681 }
682
683 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
684 {
685 int res;
686
687 res = __kvm_set_dr(vcpu, dr, val);
688 if (res > 0)
689 kvm_queue_exception(vcpu, UD_VECTOR);
690 else if (res < 0)
691 kvm_inject_gp(vcpu, 0);
692
693 return res;
694 }
695 EXPORT_SYMBOL_GPL(kvm_set_dr);
696
697 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
698 {
699 switch (dr) {
700 case 0 ... 3:
701 *val = vcpu->arch.db[dr];
702 break;
703 case 4:
704 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
705 return 1;
706 /* fall through */
707 case 6:
708 *val = vcpu->arch.dr6;
709 break;
710 case 5:
711 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
712 return 1;
713 /* fall through */
714 default: /* 7 */
715 *val = vcpu->arch.dr7;
716 break;
717 }
718
719 return 0;
720 }
721
722 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
723 {
724 if (_kvm_get_dr(vcpu, dr, val)) {
725 kvm_queue_exception(vcpu, UD_VECTOR);
726 return 1;
727 }
728 return 0;
729 }
730 EXPORT_SYMBOL_GPL(kvm_get_dr);
731
732 /*
733 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
734 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
735 *
736 * This list is modified at module load time to reflect the
737 * capabilities of the host cpu. This capabilities test skips MSRs that are
738 * kvm-specific. Those are put in the beginning of the list.
739 */
740
741 #define KVM_SAVE_MSRS_BEGIN 7
742 static u32 msrs_to_save[] = {
743 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
744 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
745 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
746 HV_X64_MSR_APIC_ASSIST_PAGE,
747 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
748 MSR_K6_STAR,
749 #ifdef CONFIG_X86_64
750 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
751 #endif
752 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
753 };
754
755 static unsigned num_msrs_to_save;
756
757 static u32 emulated_msrs[] = {
758 MSR_IA32_MISC_ENABLE,
759 };
760
761 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
762 {
763 u64 old_efer = vcpu->arch.efer;
764
765 if (efer & efer_reserved_bits)
766 return 1;
767
768 if (is_paging(vcpu)
769 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
770 return 1;
771
772 if (efer & EFER_FFXSR) {
773 struct kvm_cpuid_entry2 *feat;
774
775 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
776 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
777 return 1;
778 }
779
780 if (efer & EFER_SVME) {
781 struct kvm_cpuid_entry2 *feat;
782
783 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
784 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
785 return 1;
786 }
787
788 efer &= ~EFER_LMA;
789 efer |= vcpu->arch.efer & EFER_LMA;
790
791 kvm_x86_ops->set_efer(vcpu, efer);
792
793 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
794 kvm_mmu_reset_context(vcpu);
795
796 /* Update reserved bits */
797 if ((efer ^ old_efer) & EFER_NX)
798 kvm_mmu_reset_context(vcpu);
799
800 return 0;
801 }
802
803 void kvm_enable_efer_bits(u64 mask)
804 {
805 efer_reserved_bits &= ~mask;
806 }
807 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
808
809
810 /*
811 * Writes msr value into into the appropriate "register".
812 * Returns 0 on success, non-0 otherwise.
813 * Assumes vcpu_load() was already called.
814 */
815 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
816 {
817 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
818 }
819
820 /*
821 * Adapt set_msr() to msr_io()'s calling convention
822 */
823 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
824 {
825 return kvm_set_msr(vcpu, index, *data);
826 }
827
828 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
829 {
830 int version;
831 int r;
832 struct pvclock_wall_clock wc;
833 struct timespec boot;
834
835 if (!wall_clock)
836 return;
837
838 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
839 if (r)
840 return;
841
842 if (version & 1)
843 ++version; /* first time write, random junk */
844
845 ++version;
846
847 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
848
849 /*
850 * The guest calculates current wall clock time by adding
851 * system time (updated by kvm_write_guest_time below) to the
852 * wall clock specified here. guest system time equals host
853 * system time for us, thus we must fill in host boot time here.
854 */
855 getboottime(&boot);
856
857 wc.sec = boot.tv_sec;
858 wc.nsec = boot.tv_nsec;
859 wc.version = version;
860
861 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
862
863 version++;
864 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
865 }
866
867 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
868 {
869 uint32_t quotient, remainder;
870
871 /* Don't try to replace with do_div(), this one calculates
872 * "(dividend << 32) / divisor" */
873 __asm__ ( "divl %4"
874 : "=a" (quotient), "=d" (remainder)
875 : "0" (0), "1" (dividend), "r" (divisor) );
876 return quotient;
877 }
878
879 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
880 {
881 uint64_t nsecs = 1000000000LL;
882 int32_t shift = 0;
883 uint64_t tps64;
884 uint32_t tps32;
885
886 tps64 = tsc_khz * 1000LL;
887 while (tps64 > nsecs*2) {
888 tps64 >>= 1;
889 shift--;
890 }
891
892 tps32 = (uint32_t)tps64;
893 while (tps32 <= (uint32_t)nsecs) {
894 tps32 <<= 1;
895 shift++;
896 }
897
898 hv_clock->tsc_shift = shift;
899 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
900
901 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
902 __func__, tsc_khz, hv_clock->tsc_shift,
903 hv_clock->tsc_to_system_mul);
904 }
905
906 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
907
908 static void kvm_write_guest_time(struct kvm_vcpu *v)
909 {
910 struct timespec ts;
911 unsigned long flags;
912 struct kvm_vcpu_arch *vcpu = &v->arch;
913 void *shared_kaddr;
914 unsigned long this_tsc_khz;
915
916 if ((!vcpu->time_page))
917 return;
918
919 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
920 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
921 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
922 vcpu->hv_clock_tsc_khz = this_tsc_khz;
923 }
924 put_cpu_var(cpu_tsc_khz);
925
926 /* Keep irq disabled to prevent changes to the clock */
927 local_irq_save(flags);
928 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
929 ktime_get_ts(&ts);
930 monotonic_to_bootbased(&ts);
931 local_irq_restore(flags);
932
933 /* With all the info we got, fill in the values */
934
935 vcpu->hv_clock.system_time = ts.tv_nsec +
936 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
937
938 vcpu->hv_clock.flags = 0;
939
940 /*
941 * The interface expects us to write an even number signaling that the
942 * update is finished. Since the guest won't see the intermediate
943 * state, we just increase by 2 at the end.
944 */
945 vcpu->hv_clock.version += 2;
946
947 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
948
949 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
950 sizeof(vcpu->hv_clock));
951
952 kunmap_atomic(shared_kaddr, KM_USER0);
953
954 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
955 }
956
957 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
958 {
959 struct kvm_vcpu_arch *vcpu = &v->arch;
960
961 if (!vcpu->time_page)
962 return 0;
963 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
964 return 1;
965 }
966
967 static bool msr_mtrr_valid(unsigned msr)
968 {
969 switch (msr) {
970 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
971 case MSR_MTRRfix64K_00000:
972 case MSR_MTRRfix16K_80000:
973 case MSR_MTRRfix16K_A0000:
974 case MSR_MTRRfix4K_C0000:
975 case MSR_MTRRfix4K_C8000:
976 case MSR_MTRRfix4K_D0000:
977 case MSR_MTRRfix4K_D8000:
978 case MSR_MTRRfix4K_E0000:
979 case MSR_MTRRfix4K_E8000:
980 case MSR_MTRRfix4K_F0000:
981 case MSR_MTRRfix4K_F8000:
982 case MSR_MTRRdefType:
983 case MSR_IA32_CR_PAT:
984 return true;
985 case 0x2f8:
986 return true;
987 }
988 return false;
989 }
990
991 static bool valid_pat_type(unsigned t)
992 {
993 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
994 }
995
996 static bool valid_mtrr_type(unsigned t)
997 {
998 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
999 }
1000
1001 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1002 {
1003 int i;
1004
1005 if (!msr_mtrr_valid(msr))
1006 return false;
1007
1008 if (msr == MSR_IA32_CR_PAT) {
1009 for (i = 0; i < 8; i++)
1010 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1011 return false;
1012 return true;
1013 } else if (msr == MSR_MTRRdefType) {
1014 if (data & ~0xcff)
1015 return false;
1016 return valid_mtrr_type(data & 0xff);
1017 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1018 for (i = 0; i < 8 ; i++)
1019 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1020 return false;
1021 return true;
1022 }
1023
1024 /* variable MTRRs */
1025 return valid_mtrr_type(data & 0xff);
1026 }
1027
1028 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1029 {
1030 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1031
1032 if (!mtrr_valid(vcpu, msr, data))
1033 return 1;
1034
1035 if (msr == MSR_MTRRdefType) {
1036 vcpu->arch.mtrr_state.def_type = data;
1037 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1038 } else if (msr == MSR_MTRRfix64K_00000)
1039 p[0] = data;
1040 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1041 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1042 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1043 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1044 else if (msr == MSR_IA32_CR_PAT)
1045 vcpu->arch.pat = data;
1046 else { /* Variable MTRRs */
1047 int idx, is_mtrr_mask;
1048 u64 *pt;
1049
1050 idx = (msr - 0x200) / 2;
1051 is_mtrr_mask = msr - 0x200 - 2 * idx;
1052 if (!is_mtrr_mask)
1053 pt =
1054 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1055 else
1056 pt =
1057 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1058 *pt = data;
1059 }
1060
1061 kvm_mmu_reset_context(vcpu);
1062 return 0;
1063 }
1064
1065 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1066 {
1067 u64 mcg_cap = vcpu->arch.mcg_cap;
1068 unsigned bank_num = mcg_cap & 0xff;
1069
1070 switch (msr) {
1071 case MSR_IA32_MCG_STATUS:
1072 vcpu->arch.mcg_status = data;
1073 break;
1074 case MSR_IA32_MCG_CTL:
1075 if (!(mcg_cap & MCG_CTL_P))
1076 return 1;
1077 if (data != 0 && data != ~(u64)0)
1078 return -1;
1079 vcpu->arch.mcg_ctl = data;
1080 break;
1081 default:
1082 if (msr >= MSR_IA32_MC0_CTL &&
1083 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1084 u32 offset = msr - MSR_IA32_MC0_CTL;
1085 /* only 0 or all 1s can be written to IA32_MCi_CTL
1086 * some Linux kernels though clear bit 10 in bank 4 to
1087 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1088 * this to avoid an uncatched #GP in the guest
1089 */
1090 if ((offset & 0x3) == 0 &&
1091 data != 0 && (data | (1 << 10)) != ~(u64)0)
1092 return -1;
1093 vcpu->arch.mce_banks[offset] = data;
1094 break;
1095 }
1096 return 1;
1097 }
1098 return 0;
1099 }
1100
1101 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1102 {
1103 struct kvm *kvm = vcpu->kvm;
1104 int lm = is_long_mode(vcpu);
1105 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1106 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1107 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1108 : kvm->arch.xen_hvm_config.blob_size_32;
1109 u32 page_num = data & ~PAGE_MASK;
1110 u64 page_addr = data & PAGE_MASK;
1111 u8 *page;
1112 int r;
1113
1114 r = -E2BIG;
1115 if (page_num >= blob_size)
1116 goto out;
1117 r = -ENOMEM;
1118 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1119 if (!page)
1120 goto out;
1121 r = -EFAULT;
1122 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1123 goto out_free;
1124 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1125 goto out_free;
1126 r = 0;
1127 out_free:
1128 kfree(page);
1129 out:
1130 return r;
1131 }
1132
1133 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1134 {
1135 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1136 }
1137
1138 static bool kvm_hv_msr_partition_wide(u32 msr)
1139 {
1140 bool r = false;
1141 switch (msr) {
1142 case HV_X64_MSR_GUEST_OS_ID:
1143 case HV_X64_MSR_HYPERCALL:
1144 r = true;
1145 break;
1146 }
1147
1148 return r;
1149 }
1150
1151 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1152 {
1153 struct kvm *kvm = vcpu->kvm;
1154
1155 switch (msr) {
1156 case HV_X64_MSR_GUEST_OS_ID:
1157 kvm->arch.hv_guest_os_id = data;
1158 /* setting guest os id to zero disables hypercall page */
1159 if (!kvm->arch.hv_guest_os_id)
1160 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1161 break;
1162 case HV_X64_MSR_HYPERCALL: {
1163 u64 gfn;
1164 unsigned long addr;
1165 u8 instructions[4];
1166
1167 /* if guest os id is not set hypercall should remain disabled */
1168 if (!kvm->arch.hv_guest_os_id)
1169 break;
1170 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1171 kvm->arch.hv_hypercall = data;
1172 break;
1173 }
1174 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1175 addr = gfn_to_hva(kvm, gfn);
1176 if (kvm_is_error_hva(addr))
1177 return 1;
1178 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1179 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1180 if (copy_to_user((void __user *)addr, instructions, 4))
1181 return 1;
1182 kvm->arch.hv_hypercall = data;
1183 break;
1184 }
1185 default:
1186 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1187 "data 0x%llx\n", msr, data);
1188 return 1;
1189 }
1190 return 0;
1191 }
1192
1193 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1194 {
1195 switch (msr) {
1196 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1197 unsigned long addr;
1198
1199 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1200 vcpu->arch.hv_vapic = data;
1201 break;
1202 }
1203 addr = gfn_to_hva(vcpu->kvm, data >>
1204 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1205 if (kvm_is_error_hva(addr))
1206 return 1;
1207 if (clear_user((void __user *)addr, PAGE_SIZE))
1208 return 1;
1209 vcpu->arch.hv_vapic = data;
1210 break;
1211 }
1212 case HV_X64_MSR_EOI:
1213 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1214 case HV_X64_MSR_ICR:
1215 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1216 case HV_X64_MSR_TPR:
1217 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1218 default:
1219 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1220 "data 0x%llx\n", msr, data);
1221 return 1;
1222 }
1223
1224 return 0;
1225 }
1226
1227 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1228 {
1229 switch (msr) {
1230 case MSR_EFER:
1231 return set_efer(vcpu, data);
1232 case MSR_K7_HWCR:
1233 data &= ~(u64)0x40; /* ignore flush filter disable */
1234 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1235 if (data != 0) {
1236 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1237 data);
1238 return 1;
1239 }
1240 break;
1241 case MSR_FAM10H_MMIO_CONF_BASE:
1242 if (data != 0) {
1243 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1244 "0x%llx\n", data);
1245 return 1;
1246 }
1247 break;
1248 case MSR_AMD64_NB_CFG:
1249 break;
1250 case MSR_IA32_DEBUGCTLMSR:
1251 if (!data) {
1252 /* We support the non-activated case already */
1253 break;
1254 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1255 /* Values other than LBR and BTF are vendor-specific,
1256 thus reserved and should throw a #GP */
1257 return 1;
1258 }
1259 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1260 __func__, data);
1261 break;
1262 case MSR_IA32_UCODE_REV:
1263 case MSR_IA32_UCODE_WRITE:
1264 case MSR_VM_HSAVE_PA:
1265 case MSR_AMD64_PATCH_LOADER:
1266 break;
1267 case 0x200 ... 0x2ff:
1268 return set_msr_mtrr(vcpu, msr, data);
1269 case MSR_IA32_APICBASE:
1270 kvm_set_apic_base(vcpu, data);
1271 break;
1272 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1273 return kvm_x2apic_msr_write(vcpu, msr, data);
1274 case MSR_IA32_MISC_ENABLE:
1275 vcpu->arch.ia32_misc_enable_msr = data;
1276 break;
1277 case MSR_KVM_WALL_CLOCK_NEW:
1278 case MSR_KVM_WALL_CLOCK:
1279 vcpu->kvm->arch.wall_clock = data;
1280 kvm_write_wall_clock(vcpu->kvm, data);
1281 break;
1282 case MSR_KVM_SYSTEM_TIME_NEW:
1283 case MSR_KVM_SYSTEM_TIME: {
1284 if (vcpu->arch.time_page) {
1285 kvm_release_page_dirty(vcpu->arch.time_page);
1286 vcpu->arch.time_page = NULL;
1287 }
1288
1289 vcpu->arch.time = data;
1290
1291 /* we verify if the enable bit is set... */
1292 if (!(data & 1))
1293 break;
1294
1295 /* ...but clean it before doing the actual write */
1296 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1297
1298 vcpu->arch.time_page =
1299 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1300
1301 if (is_error_page(vcpu->arch.time_page)) {
1302 kvm_release_page_clean(vcpu->arch.time_page);
1303 vcpu->arch.time_page = NULL;
1304 }
1305
1306 kvm_request_guest_time_update(vcpu);
1307 break;
1308 }
1309 case MSR_IA32_MCG_CTL:
1310 case MSR_IA32_MCG_STATUS:
1311 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1312 return set_msr_mce(vcpu, msr, data);
1313
1314 /* Performance counters are not protected by a CPUID bit,
1315 * so we should check all of them in the generic path for the sake of
1316 * cross vendor migration.
1317 * Writing a zero into the event select MSRs disables them,
1318 * which we perfectly emulate ;-). Any other value should be at least
1319 * reported, some guests depend on them.
1320 */
1321 case MSR_P6_EVNTSEL0:
1322 case MSR_P6_EVNTSEL1:
1323 case MSR_K7_EVNTSEL0:
1324 case MSR_K7_EVNTSEL1:
1325 case MSR_K7_EVNTSEL2:
1326 case MSR_K7_EVNTSEL3:
1327 if (data != 0)
1328 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1329 "0x%x data 0x%llx\n", msr, data);
1330 break;
1331 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1332 * so we ignore writes to make it happy.
1333 */
1334 case MSR_P6_PERFCTR0:
1335 case MSR_P6_PERFCTR1:
1336 case MSR_K7_PERFCTR0:
1337 case MSR_K7_PERFCTR1:
1338 case MSR_K7_PERFCTR2:
1339 case MSR_K7_PERFCTR3:
1340 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1341 "0x%x data 0x%llx\n", msr, data);
1342 break;
1343 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1344 if (kvm_hv_msr_partition_wide(msr)) {
1345 int r;
1346 mutex_lock(&vcpu->kvm->lock);
1347 r = set_msr_hyperv_pw(vcpu, msr, data);
1348 mutex_unlock(&vcpu->kvm->lock);
1349 return r;
1350 } else
1351 return set_msr_hyperv(vcpu, msr, data);
1352 break;
1353 default:
1354 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1355 return xen_hvm_config(vcpu, data);
1356 if (!ignore_msrs) {
1357 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1358 msr, data);
1359 return 1;
1360 } else {
1361 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1362 msr, data);
1363 break;
1364 }
1365 }
1366 return 0;
1367 }
1368 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1369
1370
1371 /*
1372 * Reads an msr value (of 'msr_index') into 'pdata'.
1373 * Returns 0 on success, non-0 otherwise.
1374 * Assumes vcpu_load() was already called.
1375 */
1376 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1377 {
1378 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1379 }
1380
1381 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1382 {
1383 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1384
1385 if (!msr_mtrr_valid(msr))
1386 return 1;
1387
1388 if (msr == MSR_MTRRdefType)
1389 *pdata = vcpu->arch.mtrr_state.def_type +
1390 (vcpu->arch.mtrr_state.enabled << 10);
1391 else if (msr == MSR_MTRRfix64K_00000)
1392 *pdata = p[0];
1393 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1394 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1395 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1396 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1397 else if (msr == MSR_IA32_CR_PAT)
1398 *pdata = vcpu->arch.pat;
1399 else { /* Variable MTRRs */
1400 int idx, is_mtrr_mask;
1401 u64 *pt;
1402
1403 idx = (msr - 0x200) / 2;
1404 is_mtrr_mask = msr - 0x200 - 2 * idx;
1405 if (!is_mtrr_mask)
1406 pt =
1407 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1408 else
1409 pt =
1410 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1411 *pdata = *pt;
1412 }
1413
1414 return 0;
1415 }
1416
1417 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1418 {
1419 u64 data;
1420 u64 mcg_cap = vcpu->arch.mcg_cap;
1421 unsigned bank_num = mcg_cap & 0xff;
1422
1423 switch (msr) {
1424 case MSR_IA32_P5_MC_ADDR:
1425 case MSR_IA32_P5_MC_TYPE:
1426 data = 0;
1427 break;
1428 case MSR_IA32_MCG_CAP:
1429 data = vcpu->arch.mcg_cap;
1430 break;
1431 case MSR_IA32_MCG_CTL:
1432 if (!(mcg_cap & MCG_CTL_P))
1433 return 1;
1434 data = vcpu->arch.mcg_ctl;
1435 break;
1436 case MSR_IA32_MCG_STATUS:
1437 data = vcpu->arch.mcg_status;
1438 break;
1439 default:
1440 if (msr >= MSR_IA32_MC0_CTL &&
1441 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1442 u32 offset = msr - MSR_IA32_MC0_CTL;
1443 data = vcpu->arch.mce_banks[offset];
1444 break;
1445 }
1446 return 1;
1447 }
1448 *pdata = data;
1449 return 0;
1450 }
1451
1452 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1453 {
1454 u64 data = 0;
1455 struct kvm *kvm = vcpu->kvm;
1456
1457 switch (msr) {
1458 case HV_X64_MSR_GUEST_OS_ID:
1459 data = kvm->arch.hv_guest_os_id;
1460 break;
1461 case HV_X64_MSR_HYPERCALL:
1462 data = kvm->arch.hv_hypercall;
1463 break;
1464 default:
1465 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1466 return 1;
1467 }
1468
1469 *pdata = data;
1470 return 0;
1471 }
1472
1473 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1474 {
1475 u64 data = 0;
1476
1477 switch (msr) {
1478 case HV_X64_MSR_VP_INDEX: {
1479 int r;
1480 struct kvm_vcpu *v;
1481 kvm_for_each_vcpu(r, v, vcpu->kvm)
1482 if (v == vcpu)
1483 data = r;
1484 break;
1485 }
1486 case HV_X64_MSR_EOI:
1487 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1488 case HV_X64_MSR_ICR:
1489 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1490 case HV_X64_MSR_TPR:
1491 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1492 default:
1493 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1494 return 1;
1495 }
1496 *pdata = data;
1497 return 0;
1498 }
1499
1500 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1501 {
1502 u64 data;
1503
1504 switch (msr) {
1505 case MSR_IA32_PLATFORM_ID:
1506 case MSR_IA32_UCODE_REV:
1507 case MSR_IA32_EBL_CR_POWERON:
1508 case MSR_IA32_DEBUGCTLMSR:
1509 case MSR_IA32_LASTBRANCHFROMIP:
1510 case MSR_IA32_LASTBRANCHTOIP:
1511 case MSR_IA32_LASTINTFROMIP:
1512 case MSR_IA32_LASTINTTOIP:
1513 case MSR_K8_SYSCFG:
1514 case MSR_K7_HWCR:
1515 case MSR_VM_HSAVE_PA:
1516 case MSR_P6_PERFCTR0:
1517 case MSR_P6_PERFCTR1:
1518 case MSR_P6_EVNTSEL0:
1519 case MSR_P6_EVNTSEL1:
1520 case MSR_K7_EVNTSEL0:
1521 case MSR_K7_PERFCTR0:
1522 case MSR_K8_INT_PENDING_MSG:
1523 case MSR_AMD64_NB_CFG:
1524 case MSR_FAM10H_MMIO_CONF_BASE:
1525 data = 0;
1526 break;
1527 case MSR_MTRRcap:
1528 data = 0x500 | KVM_NR_VAR_MTRR;
1529 break;
1530 case 0x200 ... 0x2ff:
1531 return get_msr_mtrr(vcpu, msr, pdata);
1532 case 0xcd: /* fsb frequency */
1533 data = 3;
1534 break;
1535 case MSR_IA32_APICBASE:
1536 data = kvm_get_apic_base(vcpu);
1537 break;
1538 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1539 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1540 break;
1541 case MSR_IA32_MISC_ENABLE:
1542 data = vcpu->arch.ia32_misc_enable_msr;
1543 break;
1544 case MSR_IA32_PERF_STATUS:
1545 /* TSC increment by tick */
1546 data = 1000ULL;
1547 /* CPU multiplier */
1548 data |= (((uint64_t)4ULL) << 40);
1549 break;
1550 case MSR_EFER:
1551 data = vcpu->arch.efer;
1552 break;
1553 case MSR_KVM_WALL_CLOCK:
1554 case MSR_KVM_WALL_CLOCK_NEW:
1555 data = vcpu->kvm->arch.wall_clock;
1556 break;
1557 case MSR_KVM_SYSTEM_TIME:
1558 case MSR_KVM_SYSTEM_TIME_NEW:
1559 data = vcpu->arch.time;
1560 break;
1561 case MSR_IA32_P5_MC_ADDR:
1562 case MSR_IA32_P5_MC_TYPE:
1563 case MSR_IA32_MCG_CAP:
1564 case MSR_IA32_MCG_CTL:
1565 case MSR_IA32_MCG_STATUS:
1566 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1567 return get_msr_mce(vcpu, msr, pdata);
1568 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1569 if (kvm_hv_msr_partition_wide(msr)) {
1570 int r;
1571 mutex_lock(&vcpu->kvm->lock);
1572 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1573 mutex_unlock(&vcpu->kvm->lock);
1574 return r;
1575 } else
1576 return get_msr_hyperv(vcpu, msr, pdata);
1577 break;
1578 default:
1579 if (!ignore_msrs) {
1580 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1581 return 1;
1582 } else {
1583 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1584 data = 0;
1585 }
1586 break;
1587 }
1588 *pdata = data;
1589 return 0;
1590 }
1591 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1592
1593 /*
1594 * Read or write a bunch of msrs. All parameters are kernel addresses.
1595 *
1596 * @return number of msrs set successfully.
1597 */
1598 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1599 struct kvm_msr_entry *entries,
1600 int (*do_msr)(struct kvm_vcpu *vcpu,
1601 unsigned index, u64 *data))
1602 {
1603 int i, idx;
1604
1605 idx = srcu_read_lock(&vcpu->kvm->srcu);
1606 for (i = 0; i < msrs->nmsrs; ++i)
1607 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1608 break;
1609 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1610
1611 return i;
1612 }
1613
1614 /*
1615 * Read or write a bunch of msrs. Parameters are user addresses.
1616 *
1617 * @return number of msrs set successfully.
1618 */
1619 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1620 int (*do_msr)(struct kvm_vcpu *vcpu,
1621 unsigned index, u64 *data),
1622 int writeback)
1623 {
1624 struct kvm_msrs msrs;
1625 struct kvm_msr_entry *entries;
1626 int r, n;
1627 unsigned size;
1628
1629 r = -EFAULT;
1630 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1631 goto out;
1632
1633 r = -E2BIG;
1634 if (msrs.nmsrs >= MAX_IO_MSRS)
1635 goto out;
1636
1637 r = -ENOMEM;
1638 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1639 entries = kmalloc(size, GFP_KERNEL);
1640 if (!entries)
1641 goto out;
1642
1643 r = -EFAULT;
1644 if (copy_from_user(entries, user_msrs->entries, size))
1645 goto out_free;
1646
1647 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1648 if (r < 0)
1649 goto out_free;
1650
1651 r = -EFAULT;
1652 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1653 goto out_free;
1654
1655 r = n;
1656
1657 out_free:
1658 kfree(entries);
1659 out:
1660 return r;
1661 }
1662
1663 int kvm_dev_ioctl_check_extension(long ext)
1664 {
1665 int r;
1666
1667 switch (ext) {
1668 case KVM_CAP_IRQCHIP:
1669 case KVM_CAP_HLT:
1670 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1671 case KVM_CAP_SET_TSS_ADDR:
1672 case KVM_CAP_EXT_CPUID:
1673 case KVM_CAP_CLOCKSOURCE:
1674 case KVM_CAP_PIT:
1675 case KVM_CAP_NOP_IO_DELAY:
1676 case KVM_CAP_MP_STATE:
1677 case KVM_CAP_SYNC_MMU:
1678 case KVM_CAP_REINJECT_CONTROL:
1679 case KVM_CAP_IRQ_INJECT_STATUS:
1680 case KVM_CAP_ASSIGN_DEV_IRQ:
1681 case KVM_CAP_IRQFD:
1682 case KVM_CAP_IOEVENTFD:
1683 case KVM_CAP_PIT2:
1684 case KVM_CAP_PIT_STATE2:
1685 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1686 case KVM_CAP_XEN_HVM:
1687 case KVM_CAP_ADJUST_CLOCK:
1688 case KVM_CAP_VCPU_EVENTS:
1689 case KVM_CAP_HYPERV:
1690 case KVM_CAP_HYPERV_VAPIC:
1691 case KVM_CAP_HYPERV_SPIN:
1692 case KVM_CAP_PCI_SEGMENT:
1693 case KVM_CAP_DEBUGREGS:
1694 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1695 r = 1;
1696 break;
1697 case KVM_CAP_COALESCED_MMIO:
1698 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1699 break;
1700 case KVM_CAP_VAPIC:
1701 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1702 break;
1703 case KVM_CAP_NR_VCPUS:
1704 r = KVM_MAX_VCPUS;
1705 break;
1706 case KVM_CAP_NR_MEMSLOTS:
1707 r = KVM_MEMORY_SLOTS;
1708 break;
1709 case KVM_CAP_PV_MMU: /* obsolete */
1710 r = 0;
1711 break;
1712 case KVM_CAP_IOMMU:
1713 r = iommu_found();
1714 break;
1715 case KVM_CAP_MCE:
1716 r = KVM_MAX_MCE_BANKS;
1717 break;
1718 default:
1719 r = 0;
1720 break;
1721 }
1722 return r;
1723
1724 }
1725
1726 long kvm_arch_dev_ioctl(struct file *filp,
1727 unsigned int ioctl, unsigned long arg)
1728 {
1729 void __user *argp = (void __user *)arg;
1730 long r;
1731
1732 switch (ioctl) {
1733 case KVM_GET_MSR_INDEX_LIST: {
1734 struct kvm_msr_list __user *user_msr_list = argp;
1735 struct kvm_msr_list msr_list;
1736 unsigned n;
1737
1738 r = -EFAULT;
1739 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1740 goto out;
1741 n = msr_list.nmsrs;
1742 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1743 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1744 goto out;
1745 r = -E2BIG;
1746 if (n < msr_list.nmsrs)
1747 goto out;
1748 r = -EFAULT;
1749 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1750 num_msrs_to_save * sizeof(u32)))
1751 goto out;
1752 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1753 &emulated_msrs,
1754 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1755 goto out;
1756 r = 0;
1757 break;
1758 }
1759 case KVM_GET_SUPPORTED_CPUID: {
1760 struct kvm_cpuid2 __user *cpuid_arg = argp;
1761 struct kvm_cpuid2 cpuid;
1762
1763 r = -EFAULT;
1764 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1765 goto out;
1766 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1767 cpuid_arg->entries);
1768 if (r)
1769 goto out;
1770
1771 r = -EFAULT;
1772 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1773 goto out;
1774 r = 0;
1775 break;
1776 }
1777 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1778 u64 mce_cap;
1779
1780 mce_cap = KVM_MCE_CAP_SUPPORTED;
1781 r = -EFAULT;
1782 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1783 goto out;
1784 r = 0;
1785 break;
1786 }
1787 default:
1788 r = -EINVAL;
1789 }
1790 out:
1791 return r;
1792 }
1793
1794 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1795 {
1796 kvm_x86_ops->vcpu_load(vcpu, cpu);
1797 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1798 unsigned long khz = cpufreq_quick_get(cpu);
1799 if (!khz)
1800 khz = tsc_khz;
1801 per_cpu(cpu_tsc_khz, cpu) = khz;
1802 }
1803 kvm_request_guest_time_update(vcpu);
1804 }
1805
1806 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1807 {
1808 kvm_x86_ops->vcpu_put(vcpu);
1809 kvm_put_guest_fpu(vcpu);
1810 }
1811
1812 static int is_efer_nx(void)
1813 {
1814 unsigned long long efer = 0;
1815
1816 rdmsrl_safe(MSR_EFER, &efer);
1817 return efer & EFER_NX;
1818 }
1819
1820 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1821 {
1822 int i;
1823 struct kvm_cpuid_entry2 *e, *entry;
1824
1825 entry = NULL;
1826 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1827 e = &vcpu->arch.cpuid_entries[i];
1828 if (e->function == 0x80000001) {
1829 entry = e;
1830 break;
1831 }
1832 }
1833 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1834 entry->edx &= ~(1 << 20);
1835 printk(KERN_INFO "kvm: guest NX capability removed\n");
1836 }
1837 }
1838
1839 /* when an old userspace process fills a new kernel module */
1840 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1841 struct kvm_cpuid *cpuid,
1842 struct kvm_cpuid_entry __user *entries)
1843 {
1844 int r, i;
1845 struct kvm_cpuid_entry *cpuid_entries;
1846
1847 r = -E2BIG;
1848 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1849 goto out;
1850 r = -ENOMEM;
1851 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1852 if (!cpuid_entries)
1853 goto out;
1854 r = -EFAULT;
1855 if (copy_from_user(cpuid_entries, entries,
1856 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1857 goto out_free;
1858 for (i = 0; i < cpuid->nent; i++) {
1859 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1860 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1861 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1862 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1863 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1864 vcpu->arch.cpuid_entries[i].index = 0;
1865 vcpu->arch.cpuid_entries[i].flags = 0;
1866 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1867 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1868 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1869 }
1870 vcpu->arch.cpuid_nent = cpuid->nent;
1871 cpuid_fix_nx_cap(vcpu);
1872 r = 0;
1873 kvm_apic_set_version(vcpu);
1874 kvm_x86_ops->cpuid_update(vcpu);
1875 update_cpuid(vcpu);
1876
1877 out_free:
1878 vfree(cpuid_entries);
1879 out:
1880 return r;
1881 }
1882
1883 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1884 struct kvm_cpuid2 *cpuid,
1885 struct kvm_cpuid_entry2 __user *entries)
1886 {
1887 int r;
1888
1889 r = -E2BIG;
1890 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1891 goto out;
1892 r = -EFAULT;
1893 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1894 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1895 goto out;
1896 vcpu->arch.cpuid_nent = cpuid->nent;
1897 kvm_apic_set_version(vcpu);
1898 kvm_x86_ops->cpuid_update(vcpu);
1899 update_cpuid(vcpu);
1900 return 0;
1901
1902 out:
1903 return r;
1904 }
1905
1906 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1907 struct kvm_cpuid2 *cpuid,
1908 struct kvm_cpuid_entry2 __user *entries)
1909 {
1910 int r;
1911
1912 r = -E2BIG;
1913 if (cpuid->nent < vcpu->arch.cpuid_nent)
1914 goto out;
1915 r = -EFAULT;
1916 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1917 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1918 goto out;
1919 return 0;
1920
1921 out:
1922 cpuid->nent = vcpu->arch.cpuid_nent;
1923 return r;
1924 }
1925
1926 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1927 u32 index)
1928 {
1929 entry->function = function;
1930 entry->index = index;
1931 cpuid_count(entry->function, entry->index,
1932 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1933 entry->flags = 0;
1934 }
1935
1936 #define F(x) bit(X86_FEATURE_##x)
1937
1938 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1939 u32 index, int *nent, int maxnent)
1940 {
1941 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1942 #ifdef CONFIG_X86_64
1943 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1944 ? F(GBPAGES) : 0;
1945 unsigned f_lm = F(LM);
1946 #else
1947 unsigned f_gbpages = 0;
1948 unsigned f_lm = 0;
1949 #endif
1950 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1951
1952 /* cpuid 1.edx */
1953 const u32 kvm_supported_word0_x86_features =
1954 F(FPU) | F(VME) | F(DE) | F(PSE) |
1955 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1956 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1957 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1958 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1959 0 /* Reserved, DS, ACPI */ | F(MMX) |
1960 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1961 0 /* HTT, TM, Reserved, PBE */;
1962 /* cpuid 0x80000001.edx */
1963 const u32 kvm_supported_word1_x86_features =
1964 F(FPU) | F(VME) | F(DE) | F(PSE) |
1965 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1966 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1967 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1968 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1969 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1970 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1971 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1972 /* cpuid 1.ecx */
1973 const u32 kvm_supported_word4_x86_features =
1974 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1975 0 /* DS-CPL, VMX, SMX, EST */ |
1976 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1977 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1978 0 /* Reserved, DCA */ | F(XMM4_1) |
1979 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1980 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */;
1981 /* cpuid 0x80000001.ecx */
1982 const u32 kvm_supported_word6_x86_features =
1983 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1984 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1985 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1986 0 /* SKINIT */ | 0 /* WDT */;
1987
1988 /* all calls to cpuid_count() should be made on the same cpu */
1989 get_cpu();
1990 do_cpuid_1_ent(entry, function, index);
1991 ++*nent;
1992
1993 switch (function) {
1994 case 0:
1995 entry->eax = min(entry->eax, (u32)0xd);
1996 break;
1997 case 1:
1998 entry->edx &= kvm_supported_word0_x86_features;
1999 entry->ecx &= kvm_supported_word4_x86_features;
2000 /* we support x2apic emulation even if host does not support
2001 * it since we emulate x2apic in software */
2002 entry->ecx |= F(X2APIC);
2003 break;
2004 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2005 * may return different values. This forces us to get_cpu() before
2006 * issuing the first command, and also to emulate this annoying behavior
2007 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2008 case 2: {
2009 int t, times = entry->eax & 0xff;
2010
2011 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2012 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2013 for (t = 1; t < times && *nent < maxnent; ++t) {
2014 do_cpuid_1_ent(&entry[t], function, 0);
2015 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2016 ++*nent;
2017 }
2018 break;
2019 }
2020 /* function 4 and 0xb have additional index. */
2021 case 4: {
2022 int i, cache_type;
2023
2024 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2025 /* read more entries until cache_type is zero */
2026 for (i = 1; *nent < maxnent; ++i) {
2027 cache_type = entry[i - 1].eax & 0x1f;
2028 if (!cache_type)
2029 break;
2030 do_cpuid_1_ent(&entry[i], function, i);
2031 entry[i].flags |=
2032 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2033 ++*nent;
2034 }
2035 break;
2036 }
2037 case 0xb: {
2038 int i, level_type;
2039
2040 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2041 /* read more entries until level_type is zero */
2042 for (i = 1; *nent < maxnent; ++i) {
2043 level_type = entry[i - 1].ecx & 0xff00;
2044 if (!level_type)
2045 break;
2046 do_cpuid_1_ent(&entry[i], function, i);
2047 entry[i].flags |=
2048 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2049 ++*nent;
2050 }
2051 break;
2052 }
2053 case 0xd: {
2054 int i;
2055
2056 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2057 for (i = 1; *nent < maxnent; ++i) {
2058 if (entry[i - 1].eax == 0 && i != 2)
2059 break;
2060 do_cpuid_1_ent(&entry[i], function, i);
2061 entry[i].flags |=
2062 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2063 ++*nent;
2064 }
2065 break;
2066 }
2067 case KVM_CPUID_SIGNATURE: {
2068 char signature[12] = "KVMKVMKVM\0\0";
2069 u32 *sigptr = (u32 *)signature;
2070 entry->eax = 0;
2071 entry->ebx = sigptr[0];
2072 entry->ecx = sigptr[1];
2073 entry->edx = sigptr[2];
2074 break;
2075 }
2076 case KVM_CPUID_FEATURES:
2077 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2078 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2079 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2080 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2081 entry->ebx = 0;
2082 entry->ecx = 0;
2083 entry->edx = 0;
2084 break;
2085 case 0x80000000:
2086 entry->eax = min(entry->eax, 0x8000001a);
2087 break;
2088 case 0x80000001:
2089 entry->edx &= kvm_supported_word1_x86_features;
2090 entry->ecx &= kvm_supported_word6_x86_features;
2091 break;
2092 }
2093
2094 kvm_x86_ops->set_supported_cpuid(function, entry);
2095
2096 put_cpu();
2097 }
2098
2099 #undef F
2100
2101 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2102 struct kvm_cpuid_entry2 __user *entries)
2103 {
2104 struct kvm_cpuid_entry2 *cpuid_entries;
2105 int limit, nent = 0, r = -E2BIG;
2106 u32 func;
2107
2108 if (cpuid->nent < 1)
2109 goto out;
2110 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2111 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2112 r = -ENOMEM;
2113 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2114 if (!cpuid_entries)
2115 goto out;
2116
2117 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2118 limit = cpuid_entries[0].eax;
2119 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2120 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2121 &nent, cpuid->nent);
2122 r = -E2BIG;
2123 if (nent >= cpuid->nent)
2124 goto out_free;
2125
2126 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2127 limit = cpuid_entries[nent - 1].eax;
2128 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2129 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2130 &nent, cpuid->nent);
2131
2132
2133
2134 r = -E2BIG;
2135 if (nent >= cpuid->nent)
2136 goto out_free;
2137
2138 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2139 cpuid->nent);
2140
2141 r = -E2BIG;
2142 if (nent >= cpuid->nent)
2143 goto out_free;
2144
2145 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2146 cpuid->nent);
2147
2148 r = -E2BIG;
2149 if (nent >= cpuid->nent)
2150 goto out_free;
2151
2152 r = -EFAULT;
2153 if (copy_to_user(entries, cpuid_entries,
2154 nent * sizeof(struct kvm_cpuid_entry2)))
2155 goto out_free;
2156 cpuid->nent = nent;
2157 r = 0;
2158
2159 out_free:
2160 vfree(cpuid_entries);
2161 out:
2162 return r;
2163 }
2164
2165 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2166 struct kvm_lapic_state *s)
2167 {
2168 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2169
2170 return 0;
2171 }
2172
2173 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2174 struct kvm_lapic_state *s)
2175 {
2176 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2177 kvm_apic_post_state_restore(vcpu);
2178 update_cr8_intercept(vcpu);
2179
2180 return 0;
2181 }
2182
2183 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2184 struct kvm_interrupt *irq)
2185 {
2186 if (irq->irq < 0 || irq->irq >= 256)
2187 return -EINVAL;
2188 if (irqchip_in_kernel(vcpu->kvm))
2189 return -ENXIO;
2190
2191 kvm_queue_interrupt(vcpu, irq->irq, false);
2192
2193 return 0;
2194 }
2195
2196 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2197 {
2198 kvm_inject_nmi(vcpu);
2199
2200 return 0;
2201 }
2202
2203 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2204 struct kvm_tpr_access_ctl *tac)
2205 {
2206 if (tac->flags)
2207 return -EINVAL;
2208 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2209 return 0;
2210 }
2211
2212 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2213 u64 mcg_cap)
2214 {
2215 int r;
2216 unsigned bank_num = mcg_cap & 0xff, bank;
2217
2218 r = -EINVAL;
2219 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2220 goto out;
2221 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2222 goto out;
2223 r = 0;
2224 vcpu->arch.mcg_cap = mcg_cap;
2225 /* Init IA32_MCG_CTL to all 1s */
2226 if (mcg_cap & MCG_CTL_P)
2227 vcpu->arch.mcg_ctl = ~(u64)0;
2228 /* Init IA32_MCi_CTL to all 1s */
2229 for (bank = 0; bank < bank_num; bank++)
2230 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2231 out:
2232 return r;
2233 }
2234
2235 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2236 struct kvm_x86_mce *mce)
2237 {
2238 u64 mcg_cap = vcpu->arch.mcg_cap;
2239 unsigned bank_num = mcg_cap & 0xff;
2240 u64 *banks = vcpu->arch.mce_banks;
2241
2242 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2243 return -EINVAL;
2244 /*
2245 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2246 * reporting is disabled
2247 */
2248 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2249 vcpu->arch.mcg_ctl != ~(u64)0)
2250 return 0;
2251 banks += 4 * mce->bank;
2252 /*
2253 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2254 * reporting is disabled for the bank
2255 */
2256 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2257 return 0;
2258 if (mce->status & MCI_STATUS_UC) {
2259 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2260 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2261 printk(KERN_DEBUG "kvm: set_mce: "
2262 "injects mce exception while "
2263 "previous one is in progress!\n");
2264 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2265 return 0;
2266 }
2267 if (banks[1] & MCI_STATUS_VAL)
2268 mce->status |= MCI_STATUS_OVER;
2269 banks[2] = mce->addr;
2270 banks[3] = mce->misc;
2271 vcpu->arch.mcg_status = mce->mcg_status;
2272 banks[1] = mce->status;
2273 kvm_queue_exception(vcpu, MC_VECTOR);
2274 } else if (!(banks[1] & MCI_STATUS_VAL)
2275 || !(banks[1] & MCI_STATUS_UC)) {
2276 if (banks[1] & MCI_STATUS_VAL)
2277 mce->status |= MCI_STATUS_OVER;
2278 banks[2] = mce->addr;
2279 banks[3] = mce->misc;
2280 banks[1] = mce->status;
2281 } else
2282 banks[1] |= MCI_STATUS_OVER;
2283 return 0;
2284 }
2285
2286 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2287 struct kvm_vcpu_events *events)
2288 {
2289 events->exception.injected =
2290 vcpu->arch.exception.pending &&
2291 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2292 events->exception.nr = vcpu->arch.exception.nr;
2293 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2294 events->exception.error_code = vcpu->arch.exception.error_code;
2295
2296 events->interrupt.injected =
2297 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2298 events->interrupt.nr = vcpu->arch.interrupt.nr;
2299 events->interrupt.soft = 0;
2300 events->interrupt.shadow =
2301 kvm_x86_ops->get_interrupt_shadow(vcpu,
2302 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2303
2304 events->nmi.injected = vcpu->arch.nmi_injected;
2305 events->nmi.pending = vcpu->arch.nmi_pending;
2306 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2307
2308 events->sipi_vector = vcpu->arch.sipi_vector;
2309
2310 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2311 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2312 | KVM_VCPUEVENT_VALID_SHADOW);
2313 }
2314
2315 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2316 struct kvm_vcpu_events *events)
2317 {
2318 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2319 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2320 | KVM_VCPUEVENT_VALID_SHADOW))
2321 return -EINVAL;
2322
2323 vcpu->arch.exception.pending = events->exception.injected;
2324 vcpu->arch.exception.nr = events->exception.nr;
2325 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2326 vcpu->arch.exception.error_code = events->exception.error_code;
2327
2328 vcpu->arch.interrupt.pending = events->interrupt.injected;
2329 vcpu->arch.interrupt.nr = events->interrupt.nr;
2330 vcpu->arch.interrupt.soft = events->interrupt.soft;
2331 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2332 kvm_pic_clear_isr_ack(vcpu->kvm);
2333 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2334 kvm_x86_ops->set_interrupt_shadow(vcpu,
2335 events->interrupt.shadow);
2336
2337 vcpu->arch.nmi_injected = events->nmi.injected;
2338 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2339 vcpu->arch.nmi_pending = events->nmi.pending;
2340 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2341
2342 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2343 vcpu->arch.sipi_vector = events->sipi_vector;
2344
2345 return 0;
2346 }
2347
2348 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2349 struct kvm_debugregs *dbgregs)
2350 {
2351 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2352 dbgregs->dr6 = vcpu->arch.dr6;
2353 dbgregs->dr7 = vcpu->arch.dr7;
2354 dbgregs->flags = 0;
2355 }
2356
2357 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2358 struct kvm_debugregs *dbgregs)
2359 {
2360 if (dbgregs->flags)
2361 return -EINVAL;
2362
2363 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2364 vcpu->arch.dr6 = dbgregs->dr6;
2365 vcpu->arch.dr7 = dbgregs->dr7;
2366
2367 return 0;
2368 }
2369
2370 long kvm_arch_vcpu_ioctl(struct file *filp,
2371 unsigned int ioctl, unsigned long arg)
2372 {
2373 struct kvm_vcpu *vcpu = filp->private_data;
2374 void __user *argp = (void __user *)arg;
2375 int r;
2376 struct kvm_lapic_state *lapic = NULL;
2377
2378 switch (ioctl) {
2379 case KVM_GET_LAPIC: {
2380 r = -EINVAL;
2381 if (!vcpu->arch.apic)
2382 goto out;
2383 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2384
2385 r = -ENOMEM;
2386 if (!lapic)
2387 goto out;
2388 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2389 if (r)
2390 goto out;
2391 r = -EFAULT;
2392 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2393 goto out;
2394 r = 0;
2395 break;
2396 }
2397 case KVM_SET_LAPIC: {
2398 r = -EINVAL;
2399 if (!vcpu->arch.apic)
2400 goto out;
2401 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2402 r = -ENOMEM;
2403 if (!lapic)
2404 goto out;
2405 r = -EFAULT;
2406 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2407 goto out;
2408 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2409 if (r)
2410 goto out;
2411 r = 0;
2412 break;
2413 }
2414 case KVM_INTERRUPT: {
2415 struct kvm_interrupt irq;
2416
2417 r = -EFAULT;
2418 if (copy_from_user(&irq, argp, sizeof irq))
2419 goto out;
2420 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2421 if (r)
2422 goto out;
2423 r = 0;
2424 break;
2425 }
2426 case KVM_NMI: {
2427 r = kvm_vcpu_ioctl_nmi(vcpu);
2428 if (r)
2429 goto out;
2430 r = 0;
2431 break;
2432 }
2433 case KVM_SET_CPUID: {
2434 struct kvm_cpuid __user *cpuid_arg = argp;
2435 struct kvm_cpuid cpuid;
2436
2437 r = -EFAULT;
2438 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2439 goto out;
2440 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2441 if (r)
2442 goto out;
2443 break;
2444 }
2445 case KVM_SET_CPUID2: {
2446 struct kvm_cpuid2 __user *cpuid_arg = argp;
2447 struct kvm_cpuid2 cpuid;
2448
2449 r = -EFAULT;
2450 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2451 goto out;
2452 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2453 cpuid_arg->entries);
2454 if (r)
2455 goto out;
2456 break;
2457 }
2458 case KVM_GET_CPUID2: {
2459 struct kvm_cpuid2 __user *cpuid_arg = argp;
2460 struct kvm_cpuid2 cpuid;
2461
2462 r = -EFAULT;
2463 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2464 goto out;
2465 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2466 cpuid_arg->entries);
2467 if (r)
2468 goto out;
2469 r = -EFAULT;
2470 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2471 goto out;
2472 r = 0;
2473 break;
2474 }
2475 case KVM_GET_MSRS:
2476 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2477 break;
2478 case KVM_SET_MSRS:
2479 r = msr_io(vcpu, argp, do_set_msr, 0);
2480 break;
2481 case KVM_TPR_ACCESS_REPORTING: {
2482 struct kvm_tpr_access_ctl tac;
2483
2484 r = -EFAULT;
2485 if (copy_from_user(&tac, argp, sizeof tac))
2486 goto out;
2487 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2488 if (r)
2489 goto out;
2490 r = -EFAULT;
2491 if (copy_to_user(argp, &tac, sizeof tac))
2492 goto out;
2493 r = 0;
2494 break;
2495 };
2496 case KVM_SET_VAPIC_ADDR: {
2497 struct kvm_vapic_addr va;
2498
2499 r = -EINVAL;
2500 if (!irqchip_in_kernel(vcpu->kvm))
2501 goto out;
2502 r = -EFAULT;
2503 if (copy_from_user(&va, argp, sizeof va))
2504 goto out;
2505 r = 0;
2506 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2507 break;
2508 }
2509 case KVM_X86_SETUP_MCE: {
2510 u64 mcg_cap;
2511
2512 r = -EFAULT;
2513 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2514 goto out;
2515 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2516 break;
2517 }
2518 case KVM_X86_SET_MCE: {
2519 struct kvm_x86_mce mce;
2520
2521 r = -EFAULT;
2522 if (copy_from_user(&mce, argp, sizeof mce))
2523 goto out;
2524 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2525 break;
2526 }
2527 case KVM_GET_VCPU_EVENTS: {
2528 struct kvm_vcpu_events events;
2529
2530 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2531
2532 r = -EFAULT;
2533 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2534 break;
2535 r = 0;
2536 break;
2537 }
2538 case KVM_SET_VCPU_EVENTS: {
2539 struct kvm_vcpu_events events;
2540
2541 r = -EFAULT;
2542 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2543 break;
2544
2545 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2546 break;
2547 }
2548 case KVM_GET_DEBUGREGS: {
2549 struct kvm_debugregs dbgregs;
2550
2551 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2552
2553 r = -EFAULT;
2554 if (copy_to_user(argp, &dbgregs,
2555 sizeof(struct kvm_debugregs)))
2556 break;
2557 r = 0;
2558 break;
2559 }
2560 case KVM_SET_DEBUGREGS: {
2561 struct kvm_debugregs dbgregs;
2562
2563 r = -EFAULT;
2564 if (copy_from_user(&dbgregs, argp,
2565 sizeof(struct kvm_debugregs)))
2566 break;
2567
2568 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2569 break;
2570 }
2571 default:
2572 r = -EINVAL;
2573 }
2574 out:
2575 kfree(lapic);
2576 return r;
2577 }
2578
2579 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2580 {
2581 int ret;
2582
2583 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2584 return -1;
2585 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2586 return ret;
2587 }
2588
2589 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2590 u64 ident_addr)
2591 {
2592 kvm->arch.ept_identity_map_addr = ident_addr;
2593 return 0;
2594 }
2595
2596 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2597 u32 kvm_nr_mmu_pages)
2598 {
2599 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2600 return -EINVAL;
2601
2602 mutex_lock(&kvm->slots_lock);
2603 spin_lock(&kvm->mmu_lock);
2604
2605 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2606 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2607
2608 spin_unlock(&kvm->mmu_lock);
2609 mutex_unlock(&kvm->slots_lock);
2610 return 0;
2611 }
2612
2613 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2614 {
2615 return kvm->arch.n_alloc_mmu_pages;
2616 }
2617
2618 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2619 {
2620 int i;
2621 struct kvm_mem_alias *alias;
2622 struct kvm_mem_aliases *aliases;
2623
2624 aliases = kvm_aliases(kvm);
2625
2626 for (i = 0; i < aliases->naliases; ++i) {
2627 alias = &aliases->aliases[i];
2628 if (alias->flags & KVM_ALIAS_INVALID)
2629 continue;
2630 if (gfn >= alias->base_gfn
2631 && gfn < alias->base_gfn + alias->npages)
2632 return alias->target_gfn + gfn - alias->base_gfn;
2633 }
2634 return gfn;
2635 }
2636
2637 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2638 {
2639 int i;
2640 struct kvm_mem_alias *alias;
2641 struct kvm_mem_aliases *aliases;
2642
2643 aliases = kvm_aliases(kvm);
2644
2645 for (i = 0; i < aliases->naliases; ++i) {
2646 alias = &aliases->aliases[i];
2647 if (gfn >= alias->base_gfn
2648 && gfn < alias->base_gfn + alias->npages)
2649 return alias->target_gfn + gfn - alias->base_gfn;
2650 }
2651 return gfn;
2652 }
2653
2654 /*
2655 * Set a new alias region. Aliases map a portion of physical memory into
2656 * another portion. This is useful for memory windows, for example the PC
2657 * VGA region.
2658 */
2659 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2660 struct kvm_memory_alias *alias)
2661 {
2662 int r, n;
2663 struct kvm_mem_alias *p;
2664 struct kvm_mem_aliases *aliases, *old_aliases;
2665
2666 r = -EINVAL;
2667 /* General sanity checks */
2668 if (alias->memory_size & (PAGE_SIZE - 1))
2669 goto out;
2670 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2671 goto out;
2672 if (alias->slot >= KVM_ALIAS_SLOTS)
2673 goto out;
2674 if (alias->guest_phys_addr + alias->memory_size
2675 < alias->guest_phys_addr)
2676 goto out;
2677 if (alias->target_phys_addr + alias->memory_size
2678 < alias->target_phys_addr)
2679 goto out;
2680
2681 r = -ENOMEM;
2682 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2683 if (!aliases)
2684 goto out;
2685
2686 mutex_lock(&kvm->slots_lock);
2687
2688 /* invalidate any gfn reference in case of deletion/shrinking */
2689 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2690 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2691 old_aliases = kvm->arch.aliases;
2692 rcu_assign_pointer(kvm->arch.aliases, aliases);
2693 synchronize_srcu_expedited(&kvm->srcu);
2694 kvm_mmu_zap_all(kvm);
2695 kfree(old_aliases);
2696
2697 r = -ENOMEM;
2698 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2699 if (!aliases)
2700 goto out_unlock;
2701
2702 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2703
2704 p = &aliases->aliases[alias->slot];
2705 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2706 p->npages = alias->memory_size >> PAGE_SHIFT;
2707 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2708 p->flags &= ~(KVM_ALIAS_INVALID);
2709
2710 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2711 if (aliases->aliases[n - 1].npages)
2712 break;
2713 aliases->naliases = n;
2714
2715 old_aliases = kvm->arch.aliases;
2716 rcu_assign_pointer(kvm->arch.aliases, aliases);
2717 synchronize_srcu_expedited(&kvm->srcu);
2718 kfree(old_aliases);
2719 r = 0;
2720
2721 out_unlock:
2722 mutex_unlock(&kvm->slots_lock);
2723 out:
2724 return r;
2725 }
2726
2727 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2728 {
2729 int r;
2730
2731 r = 0;
2732 switch (chip->chip_id) {
2733 case KVM_IRQCHIP_PIC_MASTER:
2734 memcpy(&chip->chip.pic,
2735 &pic_irqchip(kvm)->pics[0],
2736 sizeof(struct kvm_pic_state));
2737 break;
2738 case KVM_IRQCHIP_PIC_SLAVE:
2739 memcpy(&chip->chip.pic,
2740 &pic_irqchip(kvm)->pics[1],
2741 sizeof(struct kvm_pic_state));
2742 break;
2743 case KVM_IRQCHIP_IOAPIC:
2744 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2745 break;
2746 default:
2747 r = -EINVAL;
2748 break;
2749 }
2750 return r;
2751 }
2752
2753 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2754 {
2755 int r;
2756
2757 r = 0;
2758 switch (chip->chip_id) {
2759 case KVM_IRQCHIP_PIC_MASTER:
2760 raw_spin_lock(&pic_irqchip(kvm)->lock);
2761 memcpy(&pic_irqchip(kvm)->pics[0],
2762 &chip->chip.pic,
2763 sizeof(struct kvm_pic_state));
2764 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2765 break;
2766 case KVM_IRQCHIP_PIC_SLAVE:
2767 raw_spin_lock(&pic_irqchip(kvm)->lock);
2768 memcpy(&pic_irqchip(kvm)->pics[1],
2769 &chip->chip.pic,
2770 sizeof(struct kvm_pic_state));
2771 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2772 break;
2773 case KVM_IRQCHIP_IOAPIC:
2774 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2775 break;
2776 default:
2777 r = -EINVAL;
2778 break;
2779 }
2780 kvm_pic_update_irq(pic_irqchip(kvm));
2781 return r;
2782 }
2783
2784 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2785 {
2786 int r = 0;
2787
2788 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2789 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2790 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2791 return r;
2792 }
2793
2794 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2795 {
2796 int r = 0;
2797
2798 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2799 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2800 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2801 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2802 return r;
2803 }
2804
2805 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2806 {
2807 int r = 0;
2808
2809 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2810 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2811 sizeof(ps->channels));
2812 ps->flags = kvm->arch.vpit->pit_state.flags;
2813 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2814 return r;
2815 }
2816
2817 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2818 {
2819 int r = 0, start = 0;
2820 u32 prev_legacy, cur_legacy;
2821 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2822 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2823 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2824 if (!prev_legacy && cur_legacy)
2825 start = 1;
2826 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2827 sizeof(kvm->arch.vpit->pit_state.channels));
2828 kvm->arch.vpit->pit_state.flags = ps->flags;
2829 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2830 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2831 return r;
2832 }
2833
2834 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2835 struct kvm_reinject_control *control)
2836 {
2837 if (!kvm->arch.vpit)
2838 return -ENXIO;
2839 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2840 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2841 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2842 return 0;
2843 }
2844
2845 /*
2846 * Get (and clear) the dirty memory log for a memory slot.
2847 */
2848 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2849 struct kvm_dirty_log *log)
2850 {
2851 int r, i;
2852 struct kvm_memory_slot *memslot;
2853 unsigned long n;
2854 unsigned long is_dirty = 0;
2855
2856 mutex_lock(&kvm->slots_lock);
2857
2858 r = -EINVAL;
2859 if (log->slot >= KVM_MEMORY_SLOTS)
2860 goto out;
2861
2862 memslot = &kvm->memslots->memslots[log->slot];
2863 r = -ENOENT;
2864 if (!memslot->dirty_bitmap)
2865 goto out;
2866
2867 n = kvm_dirty_bitmap_bytes(memslot);
2868
2869 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2870 is_dirty = memslot->dirty_bitmap[i];
2871
2872 /* If nothing is dirty, don't bother messing with page tables. */
2873 if (is_dirty) {
2874 struct kvm_memslots *slots, *old_slots;
2875 unsigned long *dirty_bitmap;
2876
2877 spin_lock(&kvm->mmu_lock);
2878 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2879 spin_unlock(&kvm->mmu_lock);
2880
2881 r = -ENOMEM;
2882 dirty_bitmap = vmalloc(n);
2883 if (!dirty_bitmap)
2884 goto out;
2885 memset(dirty_bitmap, 0, n);
2886
2887 r = -ENOMEM;
2888 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2889 if (!slots) {
2890 vfree(dirty_bitmap);
2891 goto out;
2892 }
2893 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2894 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2895
2896 old_slots = kvm->memslots;
2897 rcu_assign_pointer(kvm->memslots, slots);
2898 synchronize_srcu_expedited(&kvm->srcu);
2899 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2900 kfree(old_slots);
2901
2902 r = -EFAULT;
2903 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2904 vfree(dirty_bitmap);
2905 goto out;
2906 }
2907 vfree(dirty_bitmap);
2908 } else {
2909 r = -EFAULT;
2910 if (clear_user(log->dirty_bitmap, n))
2911 goto out;
2912 }
2913
2914 r = 0;
2915 out:
2916 mutex_unlock(&kvm->slots_lock);
2917 return r;
2918 }
2919
2920 long kvm_arch_vm_ioctl(struct file *filp,
2921 unsigned int ioctl, unsigned long arg)
2922 {
2923 struct kvm *kvm = filp->private_data;
2924 void __user *argp = (void __user *)arg;
2925 int r = -ENOTTY;
2926 /*
2927 * This union makes it completely explicit to gcc-3.x
2928 * that these two variables' stack usage should be
2929 * combined, not added together.
2930 */
2931 union {
2932 struct kvm_pit_state ps;
2933 struct kvm_pit_state2 ps2;
2934 struct kvm_memory_alias alias;
2935 struct kvm_pit_config pit_config;
2936 } u;
2937
2938 switch (ioctl) {
2939 case KVM_SET_TSS_ADDR:
2940 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2941 if (r < 0)
2942 goto out;
2943 break;
2944 case KVM_SET_IDENTITY_MAP_ADDR: {
2945 u64 ident_addr;
2946
2947 r = -EFAULT;
2948 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2949 goto out;
2950 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2951 if (r < 0)
2952 goto out;
2953 break;
2954 }
2955 case KVM_SET_MEMORY_REGION: {
2956 struct kvm_memory_region kvm_mem;
2957 struct kvm_userspace_memory_region kvm_userspace_mem;
2958
2959 r = -EFAULT;
2960 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2961 goto out;
2962 kvm_userspace_mem.slot = kvm_mem.slot;
2963 kvm_userspace_mem.flags = kvm_mem.flags;
2964 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2965 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2966 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2967 if (r)
2968 goto out;
2969 break;
2970 }
2971 case KVM_SET_NR_MMU_PAGES:
2972 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2973 if (r)
2974 goto out;
2975 break;
2976 case KVM_GET_NR_MMU_PAGES:
2977 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2978 break;
2979 case KVM_SET_MEMORY_ALIAS:
2980 r = -EFAULT;
2981 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2982 goto out;
2983 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2984 if (r)
2985 goto out;
2986 break;
2987 case KVM_CREATE_IRQCHIP: {
2988 struct kvm_pic *vpic;
2989
2990 mutex_lock(&kvm->lock);
2991 r = -EEXIST;
2992 if (kvm->arch.vpic)
2993 goto create_irqchip_unlock;
2994 r = -ENOMEM;
2995 vpic = kvm_create_pic(kvm);
2996 if (vpic) {
2997 r = kvm_ioapic_init(kvm);
2998 if (r) {
2999 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3000 &vpic->dev);
3001 kfree(vpic);
3002 goto create_irqchip_unlock;
3003 }
3004 } else
3005 goto create_irqchip_unlock;
3006 smp_wmb();
3007 kvm->arch.vpic = vpic;
3008 smp_wmb();
3009 r = kvm_setup_default_irq_routing(kvm);
3010 if (r) {
3011 mutex_lock(&kvm->irq_lock);
3012 kvm_ioapic_destroy(kvm);
3013 kvm_destroy_pic(kvm);
3014 mutex_unlock(&kvm->irq_lock);
3015 }
3016 create_irqchip_unlock:
3017 mutex_unlock(&kvm->lock);
3018 break;
3019 }
3020 case KVM_CREATE_PIT:
3021 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3022 goto create_pit;
3023 case KVM_CREATE_PIT2:
3024 r = -EFAULT;
3025 if (copy_from_user(&u.pit_config, argp,
3026 sizeof(struct kvm_pit_config)))
3027 goto out;
3028 create_pit:
3029 mutex_lock(&kvm->slots_lock);
3030 r = -EEXIST;
3031 if (kvm->arch.vpit)
3032 goto create_pit_unlock;
3033 r = -ENOMEM;
3034 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3035 if (kvm->arch.vpit)
3036 r = 0;
3037 create_pit_unlock:
3038 mutex_unlock(&kvm->slots_lock);
3039 break;
3040 case KVM_IRQ_LINE_STATUS:
3041 case KVM_IRQ_LINE: {
3042 struct kvm_irq_level irq_event;
3043
3044 r = -EFAULT;
3045 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3046 goto out;
3047 r = -ENXIO;
3048 if (irqchip_in_kernel(kvm)) {
3049 __s32 status;
3050 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3051 irq_event.irq, irq_event.level);
3052 if (ioctl == KVM_IRQ_LINE_STATUS) {
3053 r = -EFAULT;
3054 irq_event.status = status;
3055 if (copy_to_user(argp, &irq_event,
3056 sizeof irq_event))
3057 goto out;
3058 }
3059 r = 0;
3060 }
3061 break;
3062 }
3063 case KVM_GET_IRQCHIP: {
3064 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3065 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3066
3067 r = -ENOMEM;
3068 if (!chip)
3069 goto out;
3070 r = -EFAULT;
3071 if (copy_from_user(chip, argp, sizeof *chip))
3072 goto get_irqchip_out;
3073 r = -ENXIO;
3074 if (!irqchip_in_kernel(kvm))
3075 goto get_irqchip_out;
3076 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3077 if (r)
3078 goto get_irqchip_out;
3079 r = -EFAULT;
3080 if (copy_to_user(argp, chip, sizeof *chip))
3081 goto get_irqchip_out;
3082 r = 0;
3083 get_irqchip_out:
3084 kfree(chip);
3085 if (r)
3086 goto out;
3087 break;
3088 }
3089 case KVM_SET_IRQCHIP: {
3090 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3091 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3092
3093 r = -ENOMEM;
3094 if (!chip)
3095 goto out;
3096 r = -EFAULT;
3097 if (copy_from_user(chip, argp, sizeof *chip))
3098 goto set_irqchip_out;
3099 r = -ENXIO;
3100 if (!irqchip_in_kernel(kvm))
3101 goto set_irqchip_out;
3102 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3103 if (r)
3104 goto set_irqchip_out;
3105 r = 0;
3106 set_irqchip_out:
3107 kfree(chip);
3108 if (r)
3109 goto out;
3110 break;
3111 }
3112 case KVM_GET_PIT: {
3113 r = -EFAULT;
3114 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3115 goto out;
3116 r = -ENXIO;
3117 if (!kvm->arch.vpit)
3118 goto out;
3119 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3120 if (r)
3121 goto out;
3122 r = -EFAULT;
3123 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3124 goto out;
3125 r = 0;
3126 break;
3127 }
3128 case KVM_SET_PIT: {
3129 r = -EFAULT;
3130 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3131 goto out;
3132 r = -ENXIO;
3133 if (!kvm->arch.vpit)
3134 goto out;
3135 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3136 if (r)
3137 goto out;
3138 r = 0;
3139 break;
3140 }
3141 case KVM_GET_PIT2: {
3142 r = -ENXIO;
3143 if (!kvm->arch.vpit)
3144 goto out;
3145 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3146 if (r)
3147 goto out;
3148 r = -EFAULT;
3149 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3150 goto out;
3151 r = 0;
3152 break;
3153 }
3154 case KVM_SET_PIT2: {
3155 r = -EFAULT;
3156 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3157 goto out;
3158 r = -ENXIO;
3159 if (!kvm->arch.vpit)
3160 goto out;
3161 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3162 if (r)
3163 goto out;
3164 r = 0;
3165 break;
3166 }
3167 case KVM_REINJECT_CONTROL: {
3168 struct kvm_reinject_control control;
3169 r = -EFAULT;
3170 if (copy_from_user(&control, argp, sizeof(control)))
3171 goto out;
3172 r = kvm_vm_ioctl_reinject(kvm, &control);
3173 if (r)
3174 goto out;
3175 r = 0;
3176 break;
3177 }
3178 case KVM_XEN_HVM_CONFIG: {
3179 r = -EFAULT;
3180 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3181 sizeof(struct kvm_xen_hvm_config)))
3182 goto out;
3183 r = -EINVAL;
3184 if (kvm->arch.xen_hvm_config.flags)
3185 goto out;
3186 r = 0;
3187 break;
3188 }
3189 case KVM_SET_CLOCK: {
3190 struct timespec now;
3191 struct kvm_clock_data user_ns;
3192 u64 now_ns;
3193 s64 delta;
3194
3195 r = -EFAULT;
3196 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3197 goto out;
3198
3199 r = -EINVAL;
3200 if (user_ns.flags)
3201 goto out;
3202
3203 r = 0;
3204 ktime_get_ts(&now);
3205 now_ns = timespec_to_ns(&now);
3206 delta = user_ns.clock - now_ns;
3207 kvm->arch.kvmclock_offset = delta;
3208 break;
3209 }
3210 case KVM_GET_CLOCK: {
3211 struct timespec now;
3212 struct kvm_clock_data user_ns;
3213 u64 now_ns;
3214
3215 ktime_get_ts(&now);
3216 now_ns = timespec_to_ns(&now);
3217 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3218 user_ns.flags = 0;
3219
3220 r = -EFAULT;
3221 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3222 goto out;
3223 r = 0;
3224 break;
3225 }
3226
3227 default:
3228 ;
3229 }
3230 out:
3231 return r;
3232 }
3233
3234 static void kvm_init_msr_list(void)
3235 {
3236 u32 dummy[2];
3237 unsigned i, j;
3238
3239 /* skip the first msrs in the list. KVM-specific */
3240 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3241 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3242 continue;
3243 if (j < i)
3244 msrs_to_save[j] = msrs_to_save[i];
3245 j++;
3246 }
3247 num_msrs_to_save = j;
3248 }
3249
3250 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3251 const void *v)
3252 {
3253 if (vcpu->arch.apic &&
3254 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3255 return 0;
3256
3257 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3258 }
3259
3260 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3261 {
3262 if (vcpu->arch.apic &&
3263 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3264 return 0;
3265
3266 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3267 }
3268
3269 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3270 struct kvm_segment *var, int seg)
3271 {
3272 kvm_x86_ops->set_segment(vcpu, var, seg);
3273 }
3274
3275 void kvm_get_segment(struct kvm_vcpu *vcpu,
3276 struct kvm_segment *var, int seg)
3277 {
3278 kvm_x86_ops->get_segment(vcpu, var, seg);
3279 }
3280
3281 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3282 {
3283 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3284 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3285 }
3286
3287 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3288 {
3289 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3290 access |= PFERR_FETCH_MASK;
3291 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3292 }
3293
3294 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3295 {
3296 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3297 access |= PFERR_WRITE_MASK;
3298 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3299 }
3300
3301 /* uses this to access any guest's mapped memory without checking CPL */
3302 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3303 {
3304 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3305 }
3306
3307 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3308 struct kvm_vcpu *vcpu, u32 access,
3309 u32 *error)
3310 {
3311 void *data = val;
3312 int r = X86EMUL_CONTINUE;
3313
3314 while (bytes) {
3315 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3316 unsigned offset = addr & (PAGE_SIZE-1);
3317 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3318 int ret;
3319
3320 if (gpa == UNMAPPED_GVA) {
3321 r = X86EMUL_PROPAGATE_FAULT;
3322 goto out;
3323 }
3324 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3325 if (ret < 0) {
3326 r = X86EMUL_IO_NEEDED;
3327 goto out;
3328 }
3329
3330 bytes -= toread;
3331 data += toread;
3332 addr += toread;
3333 }
3334 out:
3335 return r;
3336 }
3337
3338 /* used for instruction fetching */
3339 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3340 struct kvm_vcpu *vcpu, u32 *error)
3341 {
3342 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3343 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3344 access | PFERR_FETCH_MASK, error);
3345 }
3346
3347 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3348 struct kvm_vcpu *vcpu, u32 *error)
3349 {
3350 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3351 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3352 error);
3353 }
3354
3355 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3356 struct kvm_vcpu *vcpu, u32 *error)
3357 {
3358 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3359 }
3360
3361 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3362 unsigned int bytes,
3363 struct kvm_vcpu *vcpu,
3364 u32 *error)
3365 {
3366 void *data = val;
3367 int r = X86EMUL_CONTINUE;
3368
3369 while (bytes) {
3370 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3371 PFERR_WRITE_MASK, error);
3372 unsigned offset = addr & (PAGE_SIZE-1);
3373 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3374 int ret;
3375
3376 if (gpa == UNMAPPED_GVA) {
3377 r = X86EMUL_PROPAGATE_FAULT;
3378 goto out;
3379 }
3380 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3381 if (ret < 0) {
3382 r = X86EMUL_IO_NEEDED;
3383 goto out;
3384 }
3385
3386 bytes -= towrite;
3387 data += towrite;
3388 addr += towrite;
3389 }
3390 out:
3391 return r;
3392 }
3393
3394 static int emulator_read_emulated(unsigned long addr,
3395 void *val,
3396 unsigned int bytes,
3397 unsigned int *error_code,
3398 struct kvm_vcpu *vcpu)
3399 {
3400 gpa_t gpa;
3401
3402 if (vcpu->mmio_read_completed) {
3403 memcpy(val, vcpu->mmio_data, bytes);
3404 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3405 vcpu->mmio_phys_addr, *(u64 *)val);
3406 vcpu->mmio_read_completed = 0;
3407 return X86EMUL_CONTINUE;
3408 }
3409
3410 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3411
3412 if (gpa == UNMAPPED_GVA)
3413 return X86EMUL_PROPAGATE_FAULT;
3414
3415 /* For APIC access vmexit */
3416 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3417 goto mmio;
3418
3419 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3420 == X86EMUL_CONTINUE)
3421 return X86EMUL_CONTINUE;
3422
3423 mmio:
3424 /*
3425 * Is this MMIO handled locally?
3426 */
3427 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3428 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3429 return X86EMUL_CONTINUE;
3430 }
3431
3432 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3433
3434 vcpu->mmio_needed = 1;
3435 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3436 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3437 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3438 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3439
3440 return X86EMUL_IO_NEEDED;
3441 }
3442
3443 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3444 const void *val, int bytes)
3445 {
3446 int ret;
3447
3448 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3449 if (ret < 0)
3450 return 0;
3451 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3452 return 1;
3453 }
3454
3455 static int emulator_write_emulated_onepage(unsigned long addr,
3456 const void *val,
3457 unsigned int bytes,
3458 unsigned int *error_code,
3459 struct kvm_vcpu *vcpu)
3460 {
3461 gpa_t gpa;
3462
3463 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3464
3465 if (gpa == UNMAPPED_GVA)
3466 return X86EMUL_PROPAGATE_FAULT;
3467
3468 /* For APIC access vmexit */
3469 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3470 goto mmio;
3471
3472 if (emulator_write_phys(vcpu, gpa, val, bytes))
3473 return X86EMUL_CONTINUE;
3474
3475 mmio:
3476 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3477 /*
3478 * Is this MMIO handled locally?
3479 */
3480 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3481 return X86EMUL_CONTINUE;
3482
3483 vcpu->mmio_needed = 1;
3484 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3485 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3486 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3487 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3488 memcpy(vcpu->run->mmio.data, val, bytes);
3489
3490 return X86EMUL_CONTINUE;
3491 }
3492
3493 int emulator_write_emulated(unsigned long addr,
3494 const void *val,
3495 unsigned int bytes,
3496 unsigned int *error_code,
3497 struct kvm_vcpu *vcpu)
3498 {
3499 /* Crossing a page boundary? */
3500 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3501 int rc, now;
3502
3503 now = -addr & ~PAGE_MASK;
3504 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3505 vcpu);
3506 if (rc != X86EMUL_CONTINUE)
3507 return rc;
3508 addr += now;
3509 val += now;
3510 bytes -= now;
3511 }
3512 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3513 vcpu);
3514 }
3515
3516 #define CMPXCHG_TYPE(t, ptr, old, new) \
3517 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3518
3519 #ifdef CONFIG_X86_64
3520 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3521 #else
3522 # define CMPXCHG64(ptr, old, new) \
3523 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3524 #endif
3525
3526 static int emulator_cmpxchg_emulated(unsigned long addr,
3527 const void *old,
3528 const void *new,
3529 unsigned int bytes,
3530 unsigned int *error_code,
3531 struct kvm_vcpu *vcpu)
3532 {
3533 gpa_t gpa;
3534 struct page *page;
3535 char *kaddr;
3536 bool exchanged;
3537
3538 /* guests cmpxchg8b have to be emulated atomically */
3539 if (bytes > 8 || (bytes & (bytes - 1)))
3540 goto emul_write;
3541
3542 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3543
3544 if (gpa == UNMAPPED_GVA ||
3545 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3546 goto emul_write;
3547
3548 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3549 goto emul_write;
3550
3551 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3552
3553 kaddr = kmap_atomic(page, KM_USER0);
3554 kaddr += offset_in_page(gpa);
3555 switch (bytes) {
3556 case 1:
3557 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3558 break;
3559 case 2:
3560 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3561 break;
3562 case 4:
3563 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3564 break;
3565 case 8:
3566 exchanged = CMPXCHG64(kaddr, old, new);
3567 break;
3568 default:
3569 BUG();
3570 }
3571 kunmap_atomic(kaddr, KM_USER0);
3572 kvm_release_page_dirty(page);
3573
3574 if (!exchanged)
3575 return X86EMUL_CMPXCHG_FAILED;
3576
3577 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3578
3579 return X86EMUL_CONTINUE;
3580
3581 emul_write:
3582 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3583
3584 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3585 }
3586
3587 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3588 {
3589 /* TODO: String I/O for in kernel device */
3590 int r;
3591
3592 if (vcpu->arch.pio.in)
3593 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3594 vcpu->arch.pio.size, pd);
3595 else
3596 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3597 vcpu->arch.pio.port, vcpu->arch.pio.size,
3598 pd);
3599 return r;
3600 }
3601
3602
3603 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3604 unsigned int count, struct kvm_vcpu *vcpu)
3605 {
3606 if (vcpu->arch.pio.count)
3607 goto data_avail;
3608
3609 trace_kvm_pio(1, port, size, 1);
3610
3611 vcpu->arch.pio.port = port;
3612 vcpu->arch.pio.in = 1;
3613 vcpu->arch.pio.count = count;
3614 vcpu->arch.pio.size = size;
3615
3616 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3617 data_avail:
3618 memcpy(val, vcpu->arch.pio_data, size * count);
3619 vcpu->arch.pio.count = 0;
3620 return 1;
3621 }
3622
3623 vcpu->run->exit_reason = KVM_EXIT_IO;
3624 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3625 vcpu->run->io.size = size;
3626 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3627 vcpu->run->io.count = count;
3628 vcpu->run->io.port = port;
3629
3630 return 0;
3631 }
3632
3633 static int emulator_pio_out_emulated(int size, unsigned short port,
3634 const void *val, unsigned int count,
3635 struct kvm_vcpu *vcpu)
3636 {
3637 trace_kvm_pio(0, port, size, 1);
3638
3639 vcpu->arch.pio.port = port;
3640 vcpu->arch.pio.in = 0;
3641 vcpu->arch.pio.count = count;
3642 vcpu->arch.pio.size = size;
3643
3644 memcpy(vcpu->arch.pio_data, val, size * count);
3645
3646 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3647 vcpu->arch.pio.count = 0;
3648 return 1;
3649 }
3650
3651 vcpu->run->exit_reason = KVM_EXIT_IO;
3652 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3653 vcpu->run->io.size = size;
3654 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3655 vcpu->run->io.count = count;
3656 vcpu->run->io.port = port;
3657
3658 return 0;
3659 }
3660
3661 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3662 {
3663 return kvm_x86_ops->get_segment_base(vcpu, seg);
3664 }
3665
3666 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3667 {
3668 kvm_mmu_invlpg(vcpu, address);
3669 return X86EMUL_CONTINUE;
3670 }
3671
3672 int emulate_clts(struct kvm_vcpu *vcpu)
3673 {
3674 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3675 kvm_x86_ops->fpu_activate(vcpu);
3676 return X86EMUL_CONTINUE;
3677 }
3678
3679 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3680 {
3681 return _kvm_get_dr(vcpu, dr, dest);
3682 }
3683
3684 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3685 {
3686
3687 return __kvm_set_dr(vcpu, dr, value);
3688 }
3689
3690 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3691 {
3692 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3693 }
3694
3695 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3696 {
3697 unsigned long value;
3698
3699 switch (cr) {
3700 case 0:
3701 value = kvm_read_cr0(vcpu);
3702 break;
3703 case 2:
3704 value = vcpu->arch.cr2;
3705 break;
3706 case 3:
3707 value = vcpu->arch.cr3;
3708 break;
3709 case 4:
3710 value = kvm_read_cr4(vcpu);
3711 break;
3712 case 8:
3713 value = kvm_get_cr8(vcpu);
3714 break;
3715 default:
3716 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3717 return 0;
3718 }
3719
3720 return value;
3721 }
3722
3723 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3724 {
3725 int res = 0;
3726
3727 switch (cr) {
3728 case 0:
3729 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3730 break;
3731 case 2:
3732 vcpu->arch.cr2 = val;
3733 break;
3734 case 3:
3735 res = __kvm_set_cr3(vcpu, val);
3736 break;
3737 case 4:
3738 res = __kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3739 break;
3740 case 8:
3741 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3742 break;
3743 default:
3744 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3745 res = -1;
3746 }
3747
3748 return res;
3749 }
3750
3751 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3752 {
3753 return kvm_x86_ops->get_cpl(vcpu);
3754 }
3755
3756 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3757 {
3758 kvm_x86_ops->get_gdt(vcpu, dt);
3759 }
3760
3761 static unsigned long emulator_get_cached_segment_base(int seg,
3762 struct kvm_vcpu *vcpu)
3763 {
3764 return get_segment_base(vcpu, seg);
3765 }
3766
3767 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3768 struct kvm_vcpu *vcpu)
3769 {
3770 struct kvm_segment var;
3771
3772 kvm_get_segment(vcpu, &var, seg);
3773
3774 if (var.unusable)
3775 return false;
3776
3777 if (var.g)
3778 var.limit >>= 12;
3779 set_desc_limit(desc, var.limit);
3780 set_desc_base(desc, (unsigned long)var.base);
3781 desc->type = var.type;
3782 desc->s = var.s;
3783 desc->dpl = var.dpl;
3784 desc->p = var.present;
3785 desc->avl = var.avl;
3786 desc->l = var.l;
3787 desc->d = var.db;
3788 desc->g = var.g;
3789
3790 return true;
3791 }
3792
3793 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3794 struct kvm_vcpu *vcpu)
3795 {
3796 struct kvm_segment var;
3797
3798 /* needed to preserve selector */
3799 kvm_get_segment(vcpu, &var, seg);
3800
3801 var.base = get_desc_base(desc);
3802 var.limit = get_desc_limit(desc);
3803 if (desc->g)
3804 var.limit = (var.limit << 12) | 0xfff;
3805 var.type = desc->type;
3806 var.present = desc->p;
3807 var.dpl = desc->dpl;
3808 var.db = desc->d;
3809 var.s = desc->s;
3810 var.l = desc->l;
3811 var.g = desc->g;
3812 var.avl = desc->avl;
3813 var.present = desc->p;
3814 var.unusable = !var.present;
3815 var.padding = 0;
3816
3817 kvm_set_segment(vcpu, &var, seg);
3818 return;
3819 }
3820
3821 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3822 {
3823 struct kvm_segment kvm_seg;
3824
3825 kvm_get_segment(vcpu, &kvm_seg, seg);
3826 return kvm_seg.selector;
3827 }
3828
3829 static void emulator_set_segment_selector(u16 sel, int seg,
3830 struct kvm_vcpu *vcpu)
3831 {
3832 struct kvm_segment kvm_seg;
3833
3834 kvm_get_segment(vcpu, &kvm_seg, seg);
3835 kvm_seg.selector = sel;
3836 kvm_set_segment(vcpu, &kvm_seg, seg);
3837 }
3838
3839 static struct x86_emulate_ops emulate_ops = {
3840 .read_std = kvm_read_guest_virt_system,
3841 .write_std = kvm_write_guest_virt_system,
3842 .fetch = kvm_fetch_guest_virt,
3843 .read_emulated = emulator_read_emulated,
3844 .write_emulated = emulator_write_emulated,
3845 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3846 .pio_in_emulated = emulator_pio_in_emulated,
3847 .pio_out_emulated = emulator_pio_out_emulated,
3848 .get_cached_descriptor = emulator_get_cached_descriptor,
3849 .set_cached_descriptor = emulator_set_cached_descriptor,
3850 .get_segment_selector = emulator_get_segment_selector,
3851 .set_segment_selector = emulator_set_segment_selector,
3852 .get_cached_segment_base = emulator_get_cached_segment_base,
3853 .get_gdt = emulator_get_gdt,
3854 .get_cr = emulator_get_cr,
3855 .set_cr = emulator_set_cr,
3856 .cpl = emulator_get_cpl,
3857 .get_dr = emulator_get_dr,
3858 .set_dr = emulator_set_dr,
3859 .set_msr = kvm_set_msr,
3860 .get_msr = kvm_get_msr,
3861 };
3862
3863 static void cache_all_regs(struct kvm_vcpu *vcpu)
3864 {
3865 kvm_register_read(vcpu, VCPU_REGS_RAX);
3866 kvm_register_read(vcpu, VCPU_REGS_RSP);
3867 kvm_register_read(vcpu, VCPU_REGS_RIP);
3868 vcpu->arch.regs_dirty = ~0;
3869 }
3870
3871 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3872 {
3873 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
3874 /*
3875 * an sti; sti; sequence only disable interrupts for the first
3876 * instruction. So, if the last instruction, be it emulated or
3877 * not, left the system with the INT_STI flag enabled, it
3878 * means that the last instruction is an sti. We should not
3879 * leave the flag on in this case. The same goes for mov ss
3880 */
3881 if (!(int_shadow & mask))
3882 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
3883 }
3884
3885 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
3886 {
3887 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
3888 if (ctxt->exception == PF_VECTOR)
3889 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
3890 else if (ctxt->error_code_valid)
3891 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
3892 else
3893 kvm_queue_exception(vcpu, ctxt->exception);
3894 }
3895
3896 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
3897 {
3898 ++vcpu->stat.insn_emulation_fail;
3899 trace_kvm_emulate_insn_failed(vcpu);
3900 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3901 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
3902 vcpu->run->internal.ndata = 0;
3903 kvm_queue_exception(vcpu, UD_VECTOR);
3904 return EMULATE_FAIL;
3905 }
3906
3907 int emulate_instruction(struct kvm_vcpu *vcpu,
3908 unsigned long cr2,
3909 u16 error_code,
3910 int emulation_type)
3911 {
3912 int r;
3913 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
3914
3915 kvm_clear_exception_queue(vcpu);
3916 vcpu->arch.mmio_fault_cr2 = cr2;
3917 /*
3918 * TODO: fix emulate.c to use guest_read/write_register
3919 * instead of direct ->regs accesses, can save hundred cycles
3920 * on Intel for instructions that don't read/change RSP, for
3921 * for example.
3922 */
3923 cache_all_regs(vcpu);
3924
3925 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3926 int cs_db, cs_l;
3927 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3928
3929 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3930 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3931 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3932 vcpu->arch.emulate_ctxt.mode =
3933 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3934 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3935 ? X86EMUL_MODE_VM86 : cs_l
3936 ? X86EMUL_MODE_PROT64 : cs_db
3937 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3938 memset(c, 0, sizeof(struct decode_cache));
3939 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3940 vcpu->arch.emulate_ctxt.interruptibility = 0;
3941 vcpu->arch.emulate_ctxt.exception = -1;
3942
3943 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3944 trace_kvm_emulate_insn_start(vcpu);
3945
3946 /* Only allow emulation of specific instructions on #UD
3947 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3948 if (emulation_type & EMULTYPE_TRAP_UD) {
3949 if (!c->twobyte)
3950 return EMULATE_FAIL;
3951 switch (c->b) {
3952 case 0x01: /* VMMCALL */
3953 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3954 return EMULATE_FAIL;
3955 break;
3956 case 0x34: /* sysenter */
3957 case 0x35: /* sysexit */
3958 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3959 return EMULATE_FAIL;
3960 break;
3961 case 0x05: /* syscall */
3962 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3963 return EMULATE_FAIL;
3964 break;
3965 default:
3966 return EMULATE_FAIL;
3967 }
3968
3969 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3970 return EMULATE_FAIL;
3971 }
3972
3973 ++vcpu->stat.insn_emulation;
3974 if (r) {
3975 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3976 return EMULATE_DONE;
3977 if (emulation_type & EMULTYPE_SKIP)
3978 return EMULATE_FAIL;
3979 return handle_emulation_failure(vcpu);
3980 }
3981 }
3982
3983 if (emulation_type & EMULTYPE_SKIP) {
3984 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3985 return EMULATE_DONE;
3986 }
3987
3988 /* this is needed for vmware backdor interface to work since it
3989 changes registers values during IO operation */
3990 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3991
3992 restart:
3993 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3994
3995 if (r) { /* emulation failed */
3996 /*
3997 * if emulation was due to access to shadowed page table
3998 * and it failed try to unshadow page and re-entetr the
3999 * guest to let CPU execute the instruction.
4000 */
4001 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
4002 return EMULATE_DONE;
4003
4004 return handle_emulation_failure(vcpu);
4005 }
4006
4007 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4008 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4009 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4010 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4011
4012 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4013 inject_emulated_exception(vcpu);
4014 return EMULATE_DONE;
4015 }
4016
4017 if (vcpu->arch.pio.count) {
4018 if (!vcpu->arch.pio.in)
4019 vcpu->arch.pio.count = 0;
4020 return EMULATE_DO_MMIO;
4021 }
4022
4023 if (vcpu->mmio_needed) {
4024 if (vcpu->mmio_is_write)
4025 vcpu->mmio_needed = 0;
4026 return EMULATE_DO_MMIO;
4027 }
4028
4029 if (vcpu->arch.emulate_ctxt.restart)
4030 goto restart;
4031
4032 return EMULATE_DONE;
4033 }
4034 EXPORT_SYMBOL_GPL(emulate_instruction);
4035
4036 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4037 {
4038 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4039 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4040 /* do not return to emulator after return from userspace */
4041 vcpu->arch.pio.count = 0;
4042 return ret;
4043 }
4044 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4045
4046 static void bounce_off(void *info)
4047 {
4048 /* nothing */
4049 }
4050
4051 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4052 void *data)
4053 {
4054 struct cpufreq_freqs *freq = data;
4055 struct kvm *kvm;
4056 struct kvm_vcpu *vcpu;
4057 int i, send_ipi = 0;
4058
4059 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4060 return 0;
4061 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4062 return 0;
4063 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
4064
4065 spin_lock(&kvm_lock);
4066 list_for_each_entry(kvm, &vm_list, vm_list) {
4067 kvm_for_each_vcpu(i, vcpu, kvm) {
4068 if (vcpu->cpu != freq->cpu)
4069 continue;
4070 if (!kvm_request_guest_time_update(vcpu))
4071 continue;
4072 if (vcpu->cpu != smp_processor_id())
4073 send_ipi++;
4074 }
4075 }
4076 spin_unlock(&kvm_lock);
4077
4078 if (freq->old < freq->new && send_ipi) {
4079 /*
4080 * We upscale the frequency. Must make the guest
4081 * doesn't see old kvmclock values while running with
4082 * the new frequency, otherwise we risk the guest sees
4083 * time go backwards.
4084 *
4085 * In case we update the frequency for another cpu
4086 * (which might be in guest context) send an interrupt
4087 * to kick the cpu out of guest context. Next time
4088 * guest context is entered kvmclock will be updated,
4089 * so the guest will not see stale values.
4090 */
4091 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4092 }
4093 return 0;
4094 }
4095
4096 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4097 .notifier_call = kvmclock_cpufreq_notifier
4098 };
4099
4100 static void kvm_timer_init(void)
4101 {
4102 int cpu;
4103
4104 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4105 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4106 CPUFREQ_TRANSITION_NOTIFIER);
4107 for_each_online_cpu(cpu) {
4108 unsigned long khz = cpufreq_get(cpu);
4109 if (!khz)
4110 khz = tsc_khz;
4111 per_cpu(cpu_tsc_khz, cpu) = khz;
4112 }
4113 } else {
4114 for_each_possible_cpu(cpu)
4115 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4116 }
4117 }
4118
4119 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4120
4121 static int kvm_is_in_guest(void)
4122 {
4123 return percpu_read(current_vcpu) != NULL;
4124 }
4125
4126 static int kvm_is_user_mode(void)
4127 {
4128 int user_mode = 3;
4129
4130 if (percpu_read(current_vcpu))
4131 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4132
4133 return user_mode != 0;
4134 }
4135
4136 static unsigned long kvm_get_guest_ip(void)
4137 {
4138 unsigned long ip = 0;
4139
4140 if (percpu_read(current_vcpu))
4141 ip = kvm_rip_read(percpu_read(current_vcpu));
4142
4143 return ip;
4144 }
4145
4146 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4147 .is_in_guest = kvm_is_in_guest,
4148 .is_user_mode = kvm_is_user_mode,
4149 .get_guest_ip = kvm_get_guest_ip,
4150 };
4151
4152 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4153 {
4154 percpu_write(current_vcpu, vcpu);
4155 }
4156 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4157
4158 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4159 {
4160 percpu_write(current_vcpu, NULL);
4161 }
4162 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4163
4164 int kvm_arch_init(void *opaque)
4165 {
4166 int r;
4167 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4168
4169 if (kvm_x86_ops) {
4170 printk(KERN_ERR "kvm: already loaded the other module\n");
4171 r = -EEXIST;
4172 goto out;
4173 }
4174
4175 if (!ops->cpu_has_kvm_support()) {
4176 printk(KERN_ERR "kvm: no hardware support\n");
4177 r = -EOPNOTSUPP;
4178 goto out;
4179 }
4180 if (ops->disabled_by_bios()) {
4181 printk(KERN_ERR "kvm: disabled by bios\n");
4182 r = -EOPNOTSUPP;
4183 goto out;
4184 }
4185
4186 r = kvm_mmu_module_init();
4187 if (r)
4188 goto out;
4189
4190 kvm_init_msr_list();
4191
4192 kvm_x86_ops = ops;
4193 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4194 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4195 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4196 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4197
4198 kvm_timer_init();
4199
4200 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4201
4202 if (cpu_has_xsave)
4203 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4204
4205 return 0;
4206
4207 out:
4208 return r;
4209 }
4210
4211 void kvm_arch_exit(void)
4212 {
4213 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4214
4215 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4216 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4217 CPUFREQ_TRANSITION_NOTIFIER);
4218 kvm_x86_ops = NULL;
4219 kvm_mmu_module_exit();
4220 }
4221
4222 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4223 {
4224 ++vcpu->stat.halt_exits;
4225 if (irqchip_in_kernel(vcpu->kvm)) {
4226 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4227 return 1;
4228 } else {
4229 vcpu->run->exit_reason = KVM_EXIT_HLT;
4230 return 0;
4231 }
4232 }
4233 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4234
4235 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4236 unsigned long a1)
4237 {
4238 if (is_long_mode(vcpu))
4239 return a0;
4240 else
4241 return a0 | ((gpa_t)a1 << 32);
4242 }
4243
4244 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4245 {
4246 u64 param, ingpa, outgpa, ret;
4247 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4248 bool fast, longmode;
4249 int cs_db, cs_l;
4250
4251 /*
4252 * hypercall generates UD from non zero cpl and real mode
4253 * per HYPER-V spec
4254 */
4255 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4256 kvm_queue_exception(vcpu, UD_VECTOR);
4257 return 0;
4258 }
4259
4260 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4261 longmode = is_long_mode(vcpu) && cs_l == 1;
4262
4263 if (!longmode) {
4264 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4265 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4266 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4267 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4268 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4269 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4270 }
4271 #ifdef CONFIG_X86_64
4272 else {
4273 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4274 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4275 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4276 }
4277 #endif
4278
4279 code = param & 0xffff;
4280 fast = (param >> 16) & 0x1;
4281 rep_cnt = (param >> 32) & 0xfff;
4282 rep_idx = (param >> 48) & 0xfff;
4283
4284 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4285
4286 switch (code) {
4287 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4288 kvm_vcpu_on_spin(vcpu);
4289 break;
4290 default:
4291 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4292 break;
4293 }
4294
4295 ret = res | (((u64)rep_done & 0xfff) << 32);
4296 if (longmode) {
4297 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4298 } else {
4299 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4300 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4301 }
4302
4303 return 1;
4304 }
4305
4306 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4307 {
4308 unsigned long nr, a0, a1, a2, a3, ret;
4309 int r = 1;
4310
4311 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4312 return kvm_hv_hypercall(vcpu);
4313
4314 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4315 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4316 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4317 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4318 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4319
4320 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4321
4322 if (!is_long_mode(vcpu)) {
4323 nr &= 0xFFFFFFFF;
4324 a0 &= 0xFFFFFFFF;
4325 a1 &= 0xFFFFFFFF;
4326 a2 &= 0xFFFFFFFF;
4327 a3 &= 0xFFFFFFFF;
4328 }
4329
4330 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4331 ret = -KVM_EPERM;
4332 goto out;
4333 }
4334
4335 switch (nr) {
4336 case KVM_HC_VAPIC_POLL_IRQ:
4337 ret = 0;
4338 break;
4339 case KVM_HC_MMU_OP:
4340 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4341 break;
4342 default:
4343 ret = -KVM_ENOSYS;
4344 break;
4345 }
4346 out:
4347 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4348 ++vcpu->stat.hypercalls;
4349 return r;
4350 }
4351 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4352
4353 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4354 {
4355 char instruction[3];
4356 unsigned long rip = kvm_rip_read(vcpu);
4357
4358 /*
4359 * Blow out the MMU to ensure that no other VCPU has an active mapping
4360 * to ensure that the updated hypercall appears atomically across all
4361 * VCPUs.
4362 */
4363 kvm_mmu_zap_all(vcpu->kvm);
4364
4365 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4366
4367 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4368 }
4369
4370 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4371 {
4372 struct desc_ptr dt = { limit, base };
4373
4374 kvm_x86_ops->set_gdt(vcpu, &dt);
4375 }
4376
4377 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4378 {
4379 struct desc_ptr dt = { limit, base };
4380
4381 kvm_x86_ops->set_idt(vcpu, &dt);
4382 }
4383
4384 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4385 {
4386 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4387 int j, nent = vcpu->arch.cpuid_nent;
4388
4389 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4390 /* when no next entry is found, the current entry[i] is reselected */
4391 for (j = i + 1; ; j = (j + 1) % nent) {
4392 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4393 if (ej->function == e->function) {
4394 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4395 return j;
4396 }
4397 }
4398 return 0; /* silence gcc, even though control never reaches here */
4399 }
4400
4401 /* find an entry with matching function, matching index (if needed), and that
4402 * should be read next (if it's stateful) */
4403 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4404 u32 function, u32 index)
4405 {
4406 if (e->function != function)
4407 return 0;
4408 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4409 return 0;
4410 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4411 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4412 return 0;
4413 return 1;
4414 }
4415
4416 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4417 u32 function, u32 index)
4418 {
4419 int i;
4420 struct kvm_cpuid_entry2 *best = NULL;
4421
4422 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4423 struct kvm_cpuid_entry2 *e;
4424
4425 e = &vcpu->arch.cpuid_entries[i];
4426 if (is_matching_cpuid_entry(e, function, index)) {
4427 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4428 move_to_next_stateful_cpuid_entry(vcpu, i);
4429 best = e;
4430 break;
4431 }
4432 /*
4433 * Both basic or both extended?
4434 */
4435 if (((e->function ^ function) & 0x80000000) == 0)
4436 if (!best || e->function > best->function)
4437 best = e;
4438 }
4439 return best;
4440 }
4441 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4442
4443 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4444 {
4445 struct kvm_cpuid_entry2 *best;
4446
4447 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4448 if (!best || best->eax < 0x80000008)
4449 goto not_found;
4450 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4451 if (best)
4452 return best->eax & 0xff;
4453 not_found:
4454 return 36;
4455 }
4456
4457 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4458 {
4459 u32 function, index;
4460 struct kvm_cpuid_entry2 *best;
4461
4462 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4463 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4464 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4465 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4466 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4467 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4468 best = kvm_find_cpuid_entry(vcpu, function, index);
4469 if (best) {
4470 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4471 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4472 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4473 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4474 }
4475 kvm_x86_ops->skip_emulated_instruction(vcpu);
4476 trace_kvm_cpuid(function,
4477 kvm_register_read(vcpu, VCPU_REGS_RAX),
4478 kvm_register_read(vcpu, VCPU_REGS_RBX),
4479 kvm_register_read(vcpu, VCPU_REGS_RCX),
4480 kvm_register_read(vcpu, VCPU_REGS_RDX));
4481 }
4482 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4483
4484 /*
4485 * Check if userspace requested an interrupt window, and that the
4486 * interrupt window is open.
4487 *
4488 * No need to exit to userspace if we already have an interrupt queued.
4489 */
4490 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4491 {
4492 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4493 vcpu->run->request_interrupt_window &&
4494 kvm_arch_interrupt_allowed(vcpu));
4495 }
4496
4497 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4498 {
4499 struct kvm_run *kvm_run = vcpu->run;
4500
4501 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4502 kvm_run->cr8 = kvm_get_cr8(vcpu);
4503 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4504 if (irqchip_in_kernel(vcpu->kvm))
4505 kvm_run->ready_for_interrupt_injection = 1;
4506 else
4507 kvm_run->ready_for_interrupt_injection =
4508 kvm_arch_interrupt_allowed(vcpu) &&
4509 !kvm_cpu_has_interrupt(vcpu) &&
4510 !kvm_event_needs_reinjection(vcpu);
4511 }
4512
4513 static void vapic_enter(struct kvm_vcpu *vcpu)
4514 {
4515 struct kvm_lapic *apic = vcpu->arch.apic;
4516 struct page *page;
4517
4518 if (!apic || !apic->vapic_addr)
4519 return;
4520
4521 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4522
4523 vcpu->arch.apic->vapic_page = page;
4524 }
4525
4526 static void vapic_exit(struct kvm_vcpu *vcpu)
4527 {
4528 struct kvm_lapic *apic = vcpu->arch.apic;
4529 int idx;
4530
4531 if (!apic || !apic->vapic_addr)
4532 return;
4533
4534 idx = srcu_read_lock(&vcpu->kvm->srcu);
4535 kvm_release_page_dirty(apic->vapic_page);
4536 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4537 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4538 }
4539
4540 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4541 {
4542 int max_irr, tpr;
4543
4544 if (!kvm_x86_ops->update_cr8_intercept)
4545 return;
4546
4547 if (!vcpu->arch.apic)
4548 return;
4549
4550 if (!vcpu->arch.apic->vapic_addr)
4551 max_irr = kvm_lapic_find_highest_irr(vcpu);
4552 else
4553 max_irr = -1;
4554
4555 if (max_irr != -1)
4556 max_irr >>= 4;
4557
4558 tpr = kvm_lapic_get_cr8(vcpu);
4559
4560 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4561 }
4562
4563 static void inject_pending_event(struct kvm_vcpu *vcpu)
4564 {
4565 /* try to reinject previous events if any */
4566 if (vcpu->arch.exception.pending) {
4567 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4568 vcpu->arch.exception.has_error_code,
4569 vcpu->arch.exception.error_code);
4570 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4571 vcpu->arch.exception.has_error_code,
4572 vcpu->arch.exception.error_code,
4573 vcpu->arch.exception.reinject);
4574 return;
4575 }
4576
4577 if (vcpu->arch.nmi_injected) {
4578 kvm_x86_ops->set_nmi(vcpu);
4579 return;
4580 }
4581
4582 if (vcpu->arch.interrupt.pending) {
4583 kvm_x86_ops->set_irq(vcpu);
4584 return;
4585 }
4586
4587 /* try to inject new event if pending */
4588 if (vcpu->arch.nmi_pending) {
4589 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4590 vcpu->arch.nmi_pending = false;
4591 vcpu->arch.nmi_injected = true;
4592 kvm_x86_ops->set_nmi(vcpu);
4593 }
4594 } else if (kvm_cpu_has_interrupt(vcpu)) {
4595 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4596 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4597 false);
4598 kvm_x86_ops->set_irq(vcpu);
4599 }
4600 }
4601 }
4602
4603 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4604 {
4605 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4606 !vcpu->guest_xcr0_loaded) {
4607 /* kvm_set_xcr() also depends on this */
4608 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4609 vcpu->guest_xcr0_loaded = 1;
4610 }
4611 }
4612
4613 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4614 {
4615 if (vcpu->guest_xcr0_loaded) {
4616 if (vcpu->arch.xcr0 != host_xcr0)
4617 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4618 vcpu->guest_xcr0_loaded = 0;
4619 }
4620 }
4621
4622 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4623 {
4624 int r;
4625 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4626 vcpu->run->request_interrupt_window;
4627
4628 if (vcpu->requests)
4629 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4630 kvm_mmu_unload(vcpu);
4631
4632 r = kvm_mmu_reload(vcpu);
4633 if (unlikely(r))
4634 goto out;
4635
4636 if (vcpu->requests) {
4637 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4638 __kvm_migrate_timers(vcpu);
4639 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4640 kvm_write_guest_time(vcpu);
4641 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4642 kvm_mmu_sync_roots(vcpu);
4643 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4644 kvm_x86_ops->tlb_flush(vcpu);
4645 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4646 &vcpu->requests)) {
4647 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4648 r = 0;
4649 goto out;
4650 }
4651 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4652 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4653 r = 0;
4654 goto out;
4655 }
4656 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4657 vcpu->fpu_active = 0;
4658 kvm_x86_ops->fpu_deactivate(vcpu);
4659 }
4660 }
4661
4662 preempt_disable();
4663
4664 kvm_x86_ops->prepare_guest_switch(vcpu);
4665 if (vcpu->fpu_active)
4666 kvm_load_guest_fpu(vcpu);
4667 kvm_load_guest_xcr0(vcpu);
4668
4669 atomic_set(&vcpu->guest_mode, 1);
4670 smp_wmb();
4671
4672 local_irq_disable();
4673
4674 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4675 || need_resched() || signal_pending(current)) {
4676 atomic_set(&vcpu->guest_mode, 0);
4677 smp_wmb();
4678 local_irq_enable();
4679 preempt_enable();
4680 r = 1;
4681 goto out;
4682 }
4683
4684 inject_pending_event(vcpu);
4685
4686 /* enable NMI/IRQ window open exits if needed */
4687 if (vcpu->arch.nmi_pending)
4688 kvm_x86_ops->enable_nmi_window(vcpu);
4689 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4690 kvm_x86_ops->enable_irq_window(vcpu);
4691
4692 if (kvm_lapic_enabled(vcpu)) {
4693 update_cr8_intercept(vcpu);
4694 kvm_lapic_sync_to_vapic(vcpu);
4695 }
4696
4697 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4698
4699 kvm_guest_enter();
4700
4701 if (unlikely(vcpu->arch.switch_db_regs)) {
4702 set_debugreg(0, 7);
4703 set_debugreg(vcpu->arch.eff_db[0], 0);
4704 set_debugreg(vcpu->arch.eff_db[1], 1);
4705 set_debugreg(vcpu->arch.eff_db[2], 2);
4706 set_debugreg(vcpu->arch.eff_db[3], 3);
4707 }
4708
4709 trace_kvm_entry(vcpu->vcpu_id);
4710 kvm_x86_ops->run(vcpu);
4711
4712 /*
4713 * If the guest has used debug registers, at least dr7
4714 * will be disabled while returning to the host.
4715 * If we don't have active breakpoints in the host, we don't
4716 * care about the messed up debug address registers. But if
4717 * we have some of them active, restore the old state.
4718 */
4719 if (hw_breakpoint_active())
4720 hw_breakpoint_restore();
4721
4722 atomic_set(&vcpu->guest_mode, 0);
4723 smp_wmb();
4724 local_irq_enable();
4725
4726 ++vcpu->stat.exits;
4727
4728 /*
4729 * We must have an instruction between local_irq_enable() and
4730 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4731 * the interrupt shadow. The stat.exits increment will do nicely.
4732 * But we need to prevent reordering, hence this barrier():
4733 */
4734 barrier();
4735
4736 kvm_guest_exit();
4737
4738 preempt_enable();
4739
4740 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4741
4742 /*
4743 * Profile KVM exit RIPs:
4744 */
4745 if (unlikely(prof_on == KVM_PROFILING)) {
4746 unsigned long rip = kvm_rip_read(vcpu);
4747 profile_hit(KVM_PROFILING, (void *)rip);
4748 }
4749
4750
4751 kvm_lapic_sync_from_vapic(vcpu);
4752
4753 r = kvm_x86_ops->handle_exit(vcpu);
4754 out:
4755 return r;
4756 }
4757
4758
4759 static int __vcpu_run(struct kvm_vcpu *vcpu)
4760 {
4761 int r;
4762 struct kvm *kvm = vcpu->kvm;
4763
4764 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4765 pr_debug("vcpu %d received sipi with vector # %x\n",
4766 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4767 kvm_lapic_reset(vcpu);
4768 r = kvm_arch_vcpu_reset(vcpu);
4769 if (r)
4770 return r;
4771 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4772 }
4773
4774 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4775 vapic_enter(vcpu);
4776
4777 r = 1;
4778 while (r > 0) {
4779 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4780 r = vcpu_enter_guest(vcpu);
4781 else {
4782 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4783 kvm_vcpu_block(vcpu);
4784 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4785 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4786 {
4787 switch(vcpu->arch.mp_state) {
4788 case KVM_MP_STATE_HALTED:
4789 vcpu->arch.mp_state =
4790 KVM_MP_STATE_RUNNABLE;
4791 case KVM_MP_STATE_RUNNABLE:
4792 break;
4793 case KVM_MP_STATE_SIPI_RECEIVED:
4794 default:
4795 r = -EINTR;
4796 break;
4797 }
4798 }
4799 }
4800
4801 if (r <= 0)
4802 break;
4803
4804 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4805 if (kvm_cpu_has_pending_timer(vcpu))
4806 kvm_inject_pending_timer_irqs(vcpu);
4807
4808 if (dm_request_for_irq_injection(vcpu)) {
4809 r = -EINTR;
4810 vcpu->run->exit_reason = KVM_EXIT_INTR;
4811 ++vcpu->stat.request_irq_exits;
4812 }
4813 if (signal_pending(current)) {
4814 r = -EINTR;
4815 vcpu->run->exit_reason = KVM_EXIT_INTR;
4816 ++vcpu->stat.signal_exits;
4817 }
4818 if (need_resched()) {
4819 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4820 kvm_resched(vcpu);
4821 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4822 }
4823 }
4824
4825 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4826
4827 vapic_exit(vcpu);
4828
4829 return r;
4830 }
4831
4832 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4833 {
4834 int r;
4835 sigset_t sigsaved;
4836
4837 if (vcpu->sigset_active)
4838 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4839
4840 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4841 kvm_vcpu_block(vcpu);
4842 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4843 r = -EAGAIN;
4844 goto out;
4845 }
4846
4847 /* re-sync apic's tpr */
4848 if (!irqchip_in_kernel(vcpu->kvm))
4849 kvm_set_cr8(vcpu, kvm_run->cr8);
4850
4851 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4852 vcpu->arch.emulate_ctxt.restart) {
4853 if (vcpu->mmio_needed) {
4854 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4855 vcpu->mmio_read_completed = 1;
4856 vcpu->mmio_needed = 0;
4857 }
4858 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4859 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4860 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4861 if (r != EMULATE_DONE) {
4862 r = 0;
4863 goto out;
4864 }
4865 }
4866 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4867 kvm_register_write(vcpu, VCPU_REGS_RAX,
4868 kvm_run->hypercall.ret);
4869
4870 r = __vcpu_run(vcpu);
4871
4872 out:
4873 post_kvm_run_save(vcpu);
4874 if (vcpu->sigset_active)
4875 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4876
4877 return r;
4878 }
4879
4880 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4881 {
4882 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4883 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4884 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4885 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4886 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4887 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4888 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4889 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4890 #ifdef CONFIG_X86_64
4891 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4892 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4893 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4894 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4895 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4896 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4897 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4898 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4899 #endif
4900
4901 regs->rip = kvm_rip_read(vcpu);
4902 regs->rflags = kvm_get_rflags(vcpu);
4903
4904 return 0;
4905 }
4906
4907 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4908 {
4909 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4910 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4911 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4912 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4913 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4914 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4915 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4916 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4917 #ifdef CONFIG_X86_64
4918 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4919 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4920 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4921 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4922 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4923 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4924 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4925 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4926 #endif
4927
4928 kvm_rip_write(vcpu, regs->rip);
4929 kvm_set_rflags(vcpu, regs->rflags);
4930
4931 vcpu->arch.exception.pending = false;
4932
4933 return 0;
4934 }
4935
4936 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4937 {
4938 struct kvm_segment cs;
4939
4940 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4941 *db = cs.db;
4942 *l = cs.l;
4943 }
4944 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4945
4946 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4947 struct kvm_sregs *sregs)
4948 {
4949 struct desc_ptr dt;
4950
4951 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4952 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4953 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4954 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4955 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4956 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4957
4958 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4959 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4960
4961 kvm_x86_ops->get_idt(vcpu, &dt);
4962 sregs->idt.limit = dt.size;
4963 sregs->idt.base = dt.address;
4964 kvm_x86_ops->get_gdt(vcpu, &dt);
4965 sregs->gdt.limit = dt.size;
4966 sregs->gdt.base = dt.address;
4967
4968 sregs->cr0 = kvm_read_cr0(vcpu);
4969 sregs->cr2 = vcpu->arch.cr2;
4970 sregs->cr3 = vcpu->arch.cr3;
4971 sregs->cr4 = kvm_read_cr4(vcpu);
4972 sregs->cr8 = kvm_get_cr8(vcpu);
4973 sregs->efer = vcpu->arch.efer;
4974 sregs->apic_base = kvm_get_apic_base(vcpu);
4975
4976 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4977
4978 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4979 set_bit(vcpu->arch.interrupt.nr,
4980 (unsigned long *)sregs->interrupt_bitmap);
4981
4982 return 0;
4983 }
4984
4985 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4986 struct kvm_mp_state *mp_state)
4987 {
4988 mp_state->mp_state = vcpu->arch.mp_state;
4989 return 0;
4990 }
4991
4992 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4993 struct kvm_mp_state *mp_state)
4994 {
4995 vcpu->arch.mp_state = mp_state->mp_state;
4996 return 0;
4997 }
4998
4999 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5000 bool has_error_code, u32 error_code)
5001 {
5002 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5003 int cs_db, cs_l, ret;
5004 cache_all_regs(vcpu);
5005
5006 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5007
5008 vcpu->arch.emulate_ctxt.vcpu = vcpu;
5009 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
5010 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
5011 vcpu->arch.emulate_ctxt.mode =
5012 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5013 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
5014 ? X86EMUL_MODE_VM86 : cs_l
5015 ? X86EMUL_MODE_PROT64 : cs_db
5016 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
5017 memset(c, 0, sizeof(struct decode_cache));
5018 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
5019
5020 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
5021 tss_selector, reason, has_error_code,
5022 error_code);
5023
5024 if (ret)
5025 return EMULATE_FAIL;
5026
5027 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5028 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5029 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5030 return EMULATE_DONE;
5031 }
5032 EXPORT_SYMBOL_GPL(kvm_task_switch);
5033
5034 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5035 struct kvm_sregs *sregs)
5036 {
5037 int mmu_reset_needed = 0;
5038 int pending_vec, max_bits;
5039 struct desc_ptr dt;
5040
5041 dt.size = sregs->idt.limit;
5042 dt.address = sregs->idt.base;
5043 kvm_x86_ops->set_idt(vcpu, &dt);
5044 dt.size = sregs->gdt.limit;
5045 dt.address = sregs->gdt.base;
5046 kvm_x86_ops->set_gdt(vcpu, &dt);
5047
5048 vcpu->arch.cr2 = sregs->cr2;
5049 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5050 vcpu->arch.cr3 = sregs->cr3;
5051
5052 kvm_set_cr8(vcpu, sregs->cr8);
5053
5054 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5055 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5056 kvm_set_apic_base(vcpu, sregs->apic_base);
5057
5058 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5059 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5060 vcpu->arch.cr0 = sregs->cr0;
5061
5062 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5063 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5064 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5065 load_pdptrs(vcpu, vcpu->arch.cr3);
5066 mmu_reset_needed = 1;
5067 }
5068
5069 if (mmu_reset_needed)
5070 kvm_mmu_reset_context(vcpu);
5071
5072 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5073 pending_vec = find_first_bit(
5074 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5075 if (pending_vec < max_bits) {
5076 kvm_queue_interrupt(vcpu, pending_vec, false);
5077 pr_debug("Set back pending irq %d\n", pending_vec);
5078 if (irqchip_in_kernel(vcpu->kvm))
5079 kvm_pic_clear_isr_ack(vcpu->kvm);
5080 }
5081
5082 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5083 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5084 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5085 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5086 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5087 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5088
5089 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5090 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5091
5092 update_cr8_intercept(vcpu);
5093
5094 /* Older userspace won't unhalt the vcpu on reset. */
5095 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5096 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5097 !is_protmode(vcpu))
5098 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5099
5100 return 0;
5101 }
5102
5103 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5104 struct kvm_guest_debug *dbg)
5105 {
5106 unsigned long rflags;
5107 int i, r;
5108
5109 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5110 r = -EBUSY;
5111 if (vcpu->arch.exception.pending)
5112 goto out;
5113 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5114 kvm_queue_exception(vcpu, DB_VECTOR);
5115 else
5116 kvm_queue_exception(vcpu, BP_VECTOR);
5117 }
5118
5119 /*
5120 * Read rflags as long as potentially injected trace flags are still
5121 * filtered out.
5122 */
5123 rflags = kvm_get_rflags(vcpu);
5124
5125 vcpu->guest_debug = dbg->control;
5126 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5127 vcpu->guest_debug = 0;
5128
5129 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5130 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5131 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5132 vcpu->arch.switch_db_regs =
5133 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5134 } else {
5135 for (i = 0; i < KVM_NR_DB_REGS; i++)
5136 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5137 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5138 }
5139
5140 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5141 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5142 get_segment_base(vcpu, VCPU_SREG_CS);
5143
5144 /*
5145 * Trigger an rflags update that will inject or remove the trace
5146 * flags.
5147 */
5148 kvm_set_rflags(vcpu, rflags);
5149
5150 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5151
5152 r = 0;
5153
5154 out:
5155
5156 return r;
5157 }
5158
5159 /*
5160 * Translate a guest virtual address to a guest physical address.
5161 */
5162 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5163 struct kvm_translation *tr)
5164 {
5165 unsigned long vaddr = tr->linear_address;
5166 gpa_t gpa;
5167 int idx;
5168
5169 idx = srcu_read_lock(&vcpu->kvm->srcu);
5170 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5171 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5172 tr->physical_address = gpa;
5173 tr->valid = gpa != UNMAPPED_GVA;
5174 tr->writeable = 1;
5175 tr->usermode = 0;
5176
5177 return 0;
5178 }
5179
5180 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5181 {
5182 struct i387_fxsave_struct *fxsave =
5183 &vcpu->arch.guest_fpu.state->fxsave;
5184
5185 memcpy(fpu->fpr, fxsave->st_space, 128);
5186 fpu->fcw = fxsave->cwd;
5187 fpu->fsw = fxsave->swd;
5188 fpu->ftwx = fxsave->twd;
5189 fpu->last_opcode = fxsave->fop;
5190 fpu->last_ip = fxsave->rip;
5191 fpu->last_dp = fxsave->rdp;
5192 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5193
5194 return 0;
5195 }
5196
5197 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5198 {
5199 struct i387_fxsave_struct *fxsave =
5200 &vcpu->arch.guest_fpu.state->fxsave;
5201
5202 memcpy(fxsave->st_space, fpu->fpr, 128);
5203 fxsave->cwd = fpu->fcw;
5204 fxsave->swd = fpu->fsw;
5205 fxsave->twd = fpu->ftwx;
5206 fxsave->fop = fpu->last_opcode;
5207 fxsave->rip = fpu->last_ip;
5208 fxsave->rdp = fpu->last_dp;
5209 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5210
5211 return 0;
5212 }
5213
5214 int fx_init(struct kvm_vcpu *vcpu)
5215 {
5216 int err;
5217
5218 err = fpu_alloc(&vcpu->arch.guest_fpu);
5219 if (err)
5220 return err;
5221
5222 fpu_finit(&vcpu->arch.guest_fpu);
5223
5224 /*
5225 * Ensure guest xcr0 is valid for loading
5226 */
5227 vcpu->arch.xcr0 = XSTATE_FP;
5228
5229 vcpu->arch.cr0 |= X86_CR0_ET;
5230
5231 return 0;
5232 }
5233 EXPORT_SYMBOL_GPL(fx_init);
5234
5235 static void fx_free(struct kvm_vcpu *vcpu)
5236 {
5237 fpu_free(&vcpu->arch.guest_fpu);
5238 }
5239
5240 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5241 {
5242 if (vcpu->guest_fpu_loaded)
5243 return;
5244
5245 /*
5246 * Restore all possible states in the guest,
5247 * and assume host would use all available bits.
5248 * Guest xcr0 would be loaded later.
5249 */
5250 kvm_put_guest_xcr0(vcpu);
5251 vcpu->guest_fpu_loaded = 1;
5252 unlazy_fpu(current);
5253 fpu_restore_checking(&vcpu->arch.guest_fpu);
5254 trace_kvm_fpu(1);
5255 }
5256
5257 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5258 {
5259 kvm_put_guest_xcr0(vcpu);
5260
5261 if (!vcpu->guest_fpu_loaded)
5262 return;
5263
5264 vcpu->guest_fpu_loaded = 0;
5265 fpu_save_init(&vcpu->arch.guest_fpu);
5266 ++vcpu->stat.fpu_reload;
5267 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5268 trace_kvm_fpu(0);
5269 }
5270
5271 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5272 {
5273 if (vcpu->arch.time_page) {
5274 kvm_release_page_dirty(vcpu->arch.time_page);
5275 vcpu->arch.time_page = NULL;
5276 }
5277
5278 fx_free(vcpu);
5279 kvm_x86_ops->vcpu_free(vcpu);
5280 }
5281
5282 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5283 unsigned int id)
5284 {
5285 return kvm_x86_ops->vcpu_create(kvm, id);
5286 }
5287
5288 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5289 {
5290 int r;
5291
5292 vcpu->arch.mtrr_state.have_fixed = 1;
5293 vcpu_load(vcpu);
5294 r = kvm_arch_vcpu_reset(vcpu);
5295 if (r == 0)
5296 r = kvm_mmu_setup(vcpu);
5297 vcpu_put(vcpu);
5298 if (r < 0)
5299 goto free_vcpu;
5300
5301 return 0;
5302 free_vcpu:
5303 kvm_x86_ops->vcpu_free(vcpu);
5304 return r;
5305 }
5306
5307 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5308 {
5309 vcpu_load(vcpu);
5310 kvm_mmu_unload(vcpu);
5311 vcpu_put(vcpu);
5312
5313 fx_free(vcpu);
5314 kvm_x86_ops->vcpu_free(vcpu);
5315 }
5316
5317 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5318 {
5319 vcpu->arch.nmi_pending = false;
5320 vcpu->arch.nmi_injected = false;
5321
5322 vcpu->arch.switch_db_regs = 0;
5323 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5324 vcpu->arch.dr6 = DR6_FIXED_1;
5325 vcpu->arch.dr7 = DR7_FIXED_1;
5326
5327 return kvm_x86_ops->vcpu_reset(vcpu);
5328 }
5329
5330 int kvm_arch_hardware_enable(void *garbage)
5331 {
5332 /*
5333 * Since this may be called from a hotplug notifcation,
5334 * we can't get the CPU frequency directly.
5335 */
5336 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5337 int cpu = raw_smp_processor_id();
5338 per_cpu(cpu_tsc_khz, cpu) = 0;
5339 }
5340
5341 kvm_shared_msr_cpu_online();
5342
5343 return kvm_x86_ops->hardware_enable(garbage);
5344 }
5345
5346 void kvm_arch_hardware_disable(void *garbage)
5347 {
5348 kvm_x86_ops->hardware_disable(garbage);
5349 drop_user_return_notifiers(garbage);
5350 }
5351
5352 int kvm_arch_hardware_setup(void)
5353 {
5354 return kvm_x86_ops->hardware_setup();
5355 }
5356
5357 void kvm_arch_hardware_unsetup(void)
5358 {
5359 kvm_x86_ops->hardware_unsetup();
5360 }
5361
5362 void kvm_arch_check_processor_compat(void *rtn)
5363 {
5364 kvm_x86_ops->check_processor_compatibility(rtn);
5365 }
5366
5367 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5368 {
5369 struct page *page;
5370 struct kvm *kvm;
5371 int r;
5372
5373 BUG_ON(vcpu->kvm == NULL);
5374 kvm = vcpu->kvm;
5375
5376 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5377 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5378 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5379 else
5380 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5381
5382 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5383 if (!page) {
5384 r = -ENOMEM;
5385 goto fail;
5386 }
5387 vcpu->arch.pio_data = page_address(page);
5388
5389 r = kvm_mmu_create(vcpu);
5390 if (r < 0)
5391 goto fail_free_pio_data;
5392
5393 if (irqchip_in_kernel(kvm)) {
5394 r = kvm_create_lapic(vcpu);
5395 if (r < 0)
5396 goto fail_mmu_destroy;
5397 }
5398
5399 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5400 GFP_KERNEL);
5401 if (!vcpu->arch.mce_banks) {
5402 r = -ENOMEM;
5403 goto fail_free_lapic;
5404 }
5405 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5406
5407 return 0;
5408 fail_free_lapic:
5409 kvm_free_lapic(vcpu);
5410 fail_mmu_destroy:
5411 kvm_mmu_destroy(vcpu);
5412 fail_free_pio_data:
5413 free_page((unsigned long)vcpu->arch.pio_data);
5414 fail:
5415 return r;
5416 }
5417
5418 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5419 {
5420 int idx;
5421
5422 kfree(vcpu->arch.mce_banks);
5423 kvm_free_lapic(vcpu);
5424 idx = srcu_read_lock(&vcpu->kvm->srcu);
5425 kvm_mmu_destroy(vcpu);
5426 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5427 free_page((unsigned long)vcpu->arch.pio_data);
5428 }
5429
5430 struct kvm *kvm_arch_create_vm(void)
5431 {
5432 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5433
5434 if (!kvm)
5435 return ERR_PTR(-ENOMEM);
5436
5437 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5438 if (!kvm->arch.aliases) {
5439 kfree(kvm);
5440 return ERR_PTR(-ENOMEM);
5441 }
5442
5443 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5444 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5445
5446 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5447 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5448
5449 rdtscll(kvm->arch.vm_init_tsc);
5450
5451 return kvm;
5452 }
5453
5454 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5455 {
5456 vcpu_load(vcpu);
5457 kvm_mmu_unload(vcpu);
5458 vcpu_put(vcpu);
5459 }
5460
5461 static void kvm_free_vcpus(struct kvm *kvm)
5462 {
5463 unsigned int i;
5464 struct kvm_vcpu *vcpu;
5465
5466 /*
5467 * Unpin any mmu pages first.
5468 */
5469 kvm_for_each_vcpu(i, vcpu, kvm)
5470 kvm_unload_vcpu_mmu(vcpu);
5471 kvm_for_each_vcpu(i, vcpu, kvm)
5472 kvm_arch_vcpu_free(vcpu);
5473
5474 mutex_lock(&kvm->lock);
5475 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5476 kvm->vcpus[i] = NULL;
5477
5478 atomic_set(&kvm->online_vcpus, 0);
5479 mutex_unlock(&kvm->lock);
5480 }
5481
5482 void kvm_arch_sync_events(struct kvm *kvm)
5483 {
5484 kvm_free_all_assigned_devices(kvm);
5485 }
5486
5487 void kvm_arch_destroy_vm(struct kvm *kvm)
5488 {
5489 kvm_iommu_unmap_guest(kvm);
5490 kvm_free_pit(kvm);
5491 kfree(kvm->arch.vpic);
5492 kfree(kvm->arch.vioapic);
5493 kvm_free_vcpus(kvm);
5494 kvm_free_physmem(kvm);
5495 if (kvm->arch.apic_access_page)
5496 put_page(kvm->arch.apic_access_page);
5497 if (kvm->arch.ept_identity_pagetable)
5498 put_page(kvm->arch.ept_identity_pagetable);
5499 cleanup_srcu_struct(&kvm->srcu);
5500 kfree(kvm->arch.aliases);
5501 kfree(kvm);
5502 }
5503
5504 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5505 struct kvm_memory_slot *memslot,
5506 struct kvm_memory_slot old,
5507 struct kvm_userspace_memory_region *mem,
5508 int user_alloc)
5509 {
5510 int npages = memslot->npages;
5511
5512 /*To keep backward compatibility with older userspace,
5513 *x86 needs to hanlde !user_alloc case.
5514 */
5515 if (!user_alloc) {
5516 if (npages && !old.rmap) {
5517 unsigned long userspace_addr;
5518
5519 down_write(&current->mm->mmap_sem);
5520 userspace_addr = do_mmap(NULL, 0,
5521 npages * PAGE_SIZE,
5522 PROT_READ | PROT_WRITE,
5523 MAP_PRIVATE | MAP_ANONYMOUS,
5524 0);
5525 up_write(&current->mm->mmap_sem);
5526
5527 if (IS_ERR((void *)userspace_addr))
5528 return PTR_ERR((void *)userspace_addr);
5529
5530 memslot->userspace_addr = userspace_addr;
5531 }
5532 }
5533
5534
5535 return 0;
5536 }
5537
5538 void kvm_arch_commit_memory_region(struct kvm *kvm,
5539 struct kvm_userspace_memory_region *mem,
5540 struct kvm_memory_slot old,
5541 int user_alloc)
5542 {
5543
5544 int npages = mem->memory_size >> PAGE_SHIFT;
5545
5546 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5547 int ret;
5548
5549 down_write(&current->mm->mmap_sem);
5550 ret = do_munmap(current->mm, old.userspace_addr,
5551 old.npages * PAGE_SIZE);
5552 up_write(&current->mm->mmap_sem);
5553 if (ret < 0)
5554 printk(KERN_WARNING
5555 "kvm_vm_ioctl_set_memory_region: "
5556 "failed to munmap memory\n");
5557 }
5558
5559 spin_lock(&kvm->mmu_lock);
5560 if (!kvm->arch.n_requested_mmu_pages) {
5561 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5562 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5563 }
5564
5565 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5566 spin_unlock(&kvm->mmu_lock);
5567 }
5568
5569 void kvm_arch_flush_shadow(struct kvm *kvm)
5570 {
5571 kvm_mmu_zap_all(kvm);
5572 kvm_reload_remote_mmus(kvm);
5573 }
5574
5575 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5576 {
5577 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5578 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5579 || vcpu->arch.nmi_pending ||
5580 (kvm_arch_interrupt_allowed(vcpu) &&
5581 kvm_cpu_has_interrupt(vcpu));
5582 }
5583
5584 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5585 {
5586 int me;
5587 int cpu = vcpu->cpu;
5588
5589 if (waitqueue_active(&vcpu->wq)) {
5590 wake_up_interruptible(&vcpu->wq);
5591 ++vcpu->stat.halt_wakeup;
5592 }
5593
5594 me = get_cpu();
5595 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5596 if (atomic_xchg(&vcpu->guest_mode, 0))
5597 smp_send_reschedule(cpu);
5598 put_cpu();
5599 }
5600
5601 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5602 {
5603 return kvm_x86_ops->interrupt_allowed(vcpu);
5604 }
5605
5606 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5607 {
5608 unsigned long current_rip = kvm_rip_read(vcpu) +
5609 get_segment_base(vcpu, VCPU_SREG_CS);
5610
5611 return current_rip == linear_rip;
5612 }
5613 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5614
5615 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5616 {
5617 unsigned long rflags;
5618
5619 rflags = kvm_x86_ops->get_rflags(vcpu);
5620 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5621 rflags &= ~X86_EFLAGS_TF;
5622 return rflags;
5623 }
5624 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5625
5626 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5627 {
5628 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5629 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5630 rflags |= X86_EFLAGS_TF;
5631 kvm_x86_ops->set_rflags(vcpu, rflags);
5632 }
5633 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5634
5635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5639 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5640 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5642 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5643 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5644 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5645 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5646 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
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