2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 struct kvm_x86_ops
*kvm_x86_ops
;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
94 static bool ignore_msrs
= 0;
95 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
97 bool kvm_has_tsc_control
;
98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
99 u32 kvm_max_guest_tsc_khz
;
100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
103 static u32 tsc_tolerance_ppm
= 250;
104 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
106 #define KVM_NR_SHARED_MSRS 16
108 struct kvm_shared_msrs_global
{
110 u32 msrs
[KVM_NR_SHARED_MSRS
];
113 struct kvm_shared_msrs
{
114 struct user_return_notifier urn
;
116 struct kvm_shared_msr_values
{
119 } values
[KVM_NR_SHARED_MSRS
];
122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
123 static struct kvm_shared_msrs __percpu
*shared_msrs
;
125 struct kvm_stats_debugfs_item debugfs_entries
[] = {
126 { "pf_fixed", VCPU_STAT(pf_fixed
) },
127 { "pf_guest", VCPU_STAT(pf_guest
) },
128 { "tlb_flush", VCPU_STAT(tlb_flush
) },
129 { "invlpg", VCPU_STAT(invlpg
) },
130 { "exits", VCPU_STAT(exits
) },
131 { "io_exits", VCPU_STAT(io_exits
) },
132 { "mmio_exits", VCPU_STAT(mmio_exits
) },
133 { "signal_exits", VCPU_STAT(signal_exits
) },
134 { "irq_window", VCPU_STAT(irq_window_exits
) },
135 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
136 { "halt_exits", VCPU_STAT(halt_exits
) },
137 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
138 { "hypercalls", VCPU_STAT(hypercalls
) },
139 { "request_irq", VCPU_STAT(request_irq_exits
) },
140 { "irq_exits", VCPU_STAT(irq_exits
) },
141 { "host_state_reload", VCPU_STAT(host_state_reload
) },
142 { "efer_reload", VCPU_STAT(efer_reload
) },
143 { "fpu_reload", VCPU_STAT(fpu_reload
) },
144 { "insn_emulation", VCPU_STAT(insn_emulation
) },
145 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
146 { "irq_injections", VCPU_STAT(irq_injections
) },
147 { "nmi_injections", VCPU_STAT(nmi_injections
) },
148 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
149 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
150 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
151 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
152 { "mmu_flooded", VM_STAT(mmu_flooded
) },
153 { "mmu_recycled", VM_STAT(mmu_recycled
) },
154 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
155 { "mmu_unsync", VM_STAT(mmu_unsync
) },
156 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
157 { "largepages", VM_STAT(lpages
) },
161 u64 __read_mostly host_xcr0
;
163 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
168 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
169 vcpu
->arch
.apf
.gfns
[i
] = ~0;
172 static void kvm_on_user_return(struct user_return_notifier
*urn
)
175 struct kvm_shared_msrs
*locals
176 = container_of(urn
, struct kvm_shared_msrs
, urn
);
177 struct kvm_shared_msr_values
*values
;
179 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
180 values
= &locals
->values
[slot
];
181 if (values
->host
!= values
->curr
) {
182 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
183 values
->curr
= values
->host
;
186 locals
->registered
= false;
187 user_return_notifier_unregister(urn
);
190 static void shared_msr_update(unsigned slot
, u32 msr
)
193 unsigned int cpu
= smp_processor_id();
194 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
196 /* only read, and nobody should modify it at this time,
197 * so don't need lock */
198 if (slot
>= shared_msrs_global
.nr
) {
199 printk(KERN_ERR
"kvm: invalid MSR slot!");
202 rdmsrl_safe(msr
, &value
);
203 smsr
->values
[slot
].host
= value
;
204 smsr
->values
[slot
].curr
= value
;
207 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
209 if (slot
>= shared_msrs_global
.nr
)
210 shared_msrs_global
.nr
= slot
+ 1;
211 shared_msrs_global
.msrs
[slot
] = msr
;
212 /* we need ensured the shared_msr_global have been updated */
215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
217 static void kvm_shared_msr_cpu_online(void)
221 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
222 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
225 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
227 unsigned int cpu
= smp_processor_id();
228 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
230 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
232 smsr
->values
[slot
].curr
= value
;
233 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
234 if (!smsr
->registered
) {
235 smsr
->urn
.on_user_return
= kvm_on_user_return
;
236 user_return_notifier_register(&smsr
->urn
);
237 smsr
->registered
= true;
240 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
242 static void drop_user_return_notifiers(void *ignore
)
244 unsigned int cpu
= smp_processor_id();
245 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
247 if (smsr
->registered
)
248 kvm_on_user_return(&smsr
->urn
);
251 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
253 return vcpu
->arch
.apic_base
;
255 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
257 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
259 /* TODO: reserve bits check */
260 kvm_lapic_set_base(vcpu
, data
);
262 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
264 asmlinkage
void kvm_spurious_fault(void)
266 /* Fault while not rebooting. We want the trace. */
269 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
271 #define EXCPT_BENIGN 0
272 #define EXCPT_CONTRIBUTORY 1
275 static int exception_class(int vector
)
285 return EXCPT_CONTRIBUTORY
;
292 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
293 unsigned nr
, bool has_error
, u32 error_code
,
299 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
301 if (!vcpu
->arch
.exception
.pending
) {
303 vcpu
->arch
.exception
.pending
= true;
304 vcpu
->arch
.exception
.has_error_code
= has_error
;
305 vcpu
->arch
.exception
.nr
= nr
;
306 vcpu
->arch
.exception
.error_code
= error_code
;
307 vcpu
->arch
.exception
.reinject
= reinject
;
311 /* to check exception */
312 prev_nr
= vcpu
->arch
.exception
.nr
;
313 if (prev_nr
== DF_VECTOR
) {
314 /* triple fault -> shutdown */
315 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
318 class1
= exception_class(prev_nr
);
319 class2
= exception_class(nr
);
320 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
321 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
322 /* generate double fault per SDM Table 5-5 */
323 vcpu
->arch
.exception
.pending
= true;
324 vcpu
->arch
.exception
.has_error_code
= true;
325 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
326 vcpu
->arch
.exception
.error_code
= 0;
328 /* replace previous exception with a new one in a hope
329 that instruction re-execution will regenerate lost
334 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
336 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
338 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
340 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
342 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
344 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
346 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
349 kvm_inject_gp(vcpu
, 0);
351 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
353 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
355 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
357 ++vcpu
->stat
.pf_guest
;
358 vcpu
->arch
.cr2
= fault
->address
;
359 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
361 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
363 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
365 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
366 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
368 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
371 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
373 atomic_inc(&vcpu
->arch
.nmi_queued
);
374 kvm_make_request(KVM_REQ_NMI
, vcpu
);
376 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
378 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
380 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
382 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
384 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
386 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
388 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
391 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
392 * a #GP and return false.
394 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
396 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
398 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
401 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
404 * This function will be used to read from the physical memory of the currently
405 * running guest. The difference to kvm_read_guest_page is that this function
406 * can read from guest physical or from the guest's guest physical memory.
408 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
409 gfn_t ngfn
, void *data
, int offset
, int len
,
415 ngpa
= gfn_to_gpa(ngfn
);
416 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
417 if (real_gfn
== UNMAPPED_GVA
)
420 real_gfn
= gpa_to_gfn(real_gfn
);
422 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
424 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
426 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
427 void *data
, int offset
, int len
, u32 access
)
429 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
430 data
, offset
, len
, access
);
434 * Load the pae pdptrs. Return true is they are all valid.
436 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
438 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
439 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
442 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
444 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
445 offset
* sizeof(u64
), sizeof(pdpte
),
446 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
451 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
452 if (is_present_gpte(pdpte
[i
]) &&
453 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
460 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
461 __set_bit(VCPU_EXREG_PDPTR
,
462 (unsigned long *)&vcpu
->arch
.regs_avail
);
463 __set_bit(VCPU_EXREG_PDPTR
,
464 (unsigned long *)&vcpu
->arch
.regs_dirty
);
469 EXPORT_SYMBOL_GPL(load_pdptrs
);
471 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
473 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
479 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
482 if (!test_bit(VCPU_EXREG_PDPTR
,
483 (unsigned long *)&vcpu
->arch
.regs_avail
))
486 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
487 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
488 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
489 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
492 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
498 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
500 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
501 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
502 X86_CR0_CD
| X86_CR0_NW
;
507 if (cr0
& 0xffffffff00000000UL
)
511 cr0
&= ~CR0_RESERVED_BITS
;
513 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
516 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
519 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
521 if ((vcpu
->arch
.efer
& EFER_LME
)) {
526 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
531 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
536 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
539 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
541 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
542 kvm_clear_async_pf_completion_queue(vcpu
);
543 kvm_async_pf_hash_reset(vcpu
);
546 if ((cr0
^ old_cr0
) & update_bits
)
547 kvm_mmu_reset_context(vcpu
);
550 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
552 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
554 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
556 EXPORT_SYMBOL_GPL(kvm_lmsw
);
558 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
560 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
561 !vcpu
->guest_xcr0_loaded
) {
562 /* kvm_set_xcr() also depends on this */
563 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
564 vcpu
->guest_xcr0_loaded
= 1;
568 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
570 if (vcpu
->guest_xcr0_loaded
) {
571 if (vcpu
->arch
.xcr0
!= host_xcr0
)
572 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
573 vcpu
->guest_xcr0_loaded
= 0;
577 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
581 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
582 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
585 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
587 if (!(xcr0
& XSTATE_FP
))
589 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
591 if (xcr0
& ~host_xcr0
)
593 kvm_put_guest_xcr0(vcpu
);
594 vcpu
->arch
.xcr0
= xcr0
;
598 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
600 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
601 kvm_inject_gp(vcpu
, 0);
606 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
608 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
610 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
611 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
612 X86_CR4_PAE
| X86_CR4_SMEP
;
613 if (cr4
& CR4_RESERVED_BITS
)
616 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
619 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
622 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_RDWRGSFS
))
625 if (is_long_mode(vcpu
)) {
626 if (!(cr4
& X86_CR4_PAE
))
628 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
629 && ((cr4
^ old_cr4
) & pdptr_bits
)
630 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
634 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
635 if (!guest_cpuid_has_pcid(vcpu
))
638 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
639 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
643 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
646 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
647 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
648 kvm_mmu_reset_context(vcpu
);
650 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
651 kvm_update_cpuid(vcpu
);
655 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
657 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
659 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
660 kvm_mmu_sync_roots(vcpu
);
661 kvm_mmu_flush_tlb(vcpu
);
665 if (is_long_mode(vcpu
)) {
666 if (kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
)) {
667 if (cr3
& CR3_PCID_ENABLED_RESERVED_BITS
)
670 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
674 if (cr3
& CR3_PAE_RESERVED_BITS
)
676 if (is_paging(vcpu
) &&
677 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
681 * We don't check reserved bits in nonpae mode, because
682 * this isn't enforced, and VMware depends on this.
687 * Does the new cr3 value map to physical memory? (Note, we
688 * catch an invalid cr3 even in real-mode, because it would
689 * cause trouble later on when we turn on paging anyway.)
691 * A real CPU would silently accept an invalid cr3 and would
692 * attempt to use it - with largely undefined (and often hard
693 * to debug) behavior on the guest side.
695 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
697 vcpu
->arch
.cr3
= cr3
;
698 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
699 vcpu
->arch
.mmu
.new_cr3(vcpu
);
702 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
704 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
706 if (cr8
& CR8_RESERVED_BITS
)
708 if (irqchip_in_kernel(vcpu
->kvm
))
709 kvm_lapic_set_tpr(vcpu
, cr8
);
711 vcpu
->arch
.cr8
= cr8
;
714 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
716 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
718 if (irqchip_in_kernel(vcpu
->kvm
))
719 return kvm_lapic_get_cr8(vcpu
);
721 return vcpu
->arch
.cr8
;
723 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
725 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
729 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
730 dr7
= vcpu
->arch
.guest_debug_dr7
;
732 dr7
= vcpu
->arch
.dr7
;
733 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
734 vcpu
->arch
.switch_db_regs
= (dr7
& DR7_BP_EN_MASK
);
737 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
741 vcpu
->arch
.db
[dr
] = val
;
742 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
743 vcpu
->arch
.eff_db
[dr
] = val
;
746 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
750 if (val
& 0xffffffff00000000ULL
)
752 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
755 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
759 if (val
& 0xffffffff00000000ULL
)
761 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
762 kvm_update_dr7(vcpu
);
769 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
773 res
= __kvm_set_dr(vcpu
, dr
, val
);
775 kvm_queue_exception(vcpu
, UD_VECTOR
);
777 kvm_inject_gp(vcpu
, 0);
781 EXPORT_SYMBOL_GPL(kvm_set_dr
);
783 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
787 *val
= vcpu
->arch
.db
[dr
];
790 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
794 *val
= vcpu
->arch
.dr6
;
797 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
801 *val
= vcpu
->arch
.dr7
;
808 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
810 if (_kvm_get_dr(vcpu
, dr
, val
)) {
811 kvm_queue_exception(vcpu
, UD_VECTOR
);
816 EXPORT_SYMBOL_GPL(kvm_get_dr
);
818 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
820 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
824 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
827 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
828 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
831 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
834 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
835 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
837 * This list is modified at module load time to reflect the
838 * capabilities of the host cpu. This capabilities test skips MSRs that are
839 * kvm-specific. Those are put in the beginning of the list.
842 #define KVM_SAVE_MSRS_BEGIN 10
843 static u32 msrs_to_save
[] = {
844 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
845 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
846 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
847 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
849 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
852 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
854 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
857 static unsigned num_msrs_to_save
;
859 static const u32 emulated_msrs
[] = {
861 MSR_IA32_TSCDEADLINE
,
862 MSR_IA32_MISC_ENABLE
,
867 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
869 if (efer
& efer_reserved_bits
)
872 if (efer
& EFER_FFXSR
) {
873 struct kvm_cpuid_entry2
*feat
;
875 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
876 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
880 if (efer
& EFER_SVME
) {
881 struct kvm_cpuid_entry2
*feat
;
883 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
884 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
890 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
892 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
894 u64 old_efer
= vcpu
->arch
.efer
;
896 if (!kvm_valid_efer(vcpu
, efer
))
900 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
904 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
906 kvm_x86_ops
->set_efer(vcpu
, efer
);
908 /* Update reserved bits */
909 if ((efer
^ old_efer
) & EFER_NX
)
910 kvm_mmu_reset_context(vcpu
);
915 void kvm_enable_efer_bits(u64 mask
)
917 efer_reserved_bits
&= ~mask
;
919 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
923 * Writes msr value into into the appropriate "register".
924 * Returns 0 on success, non-0 otherwise.
925 * Assumes vcpu_load() was already called.
927 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
929 return kvm_x86_ops
->set_msr(vcpu
, msr
);
933 * Adapt set_msr() to msr_io()'s calling convention
935 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
941 msr
.host_initiated
= true;
942 return kvm_set_msr(vcpu
, &msr
);
946 struct pvclock_gtod_data
{
949 struct { /* extract of a clocksource struct */
957 /* open coded 'struct timespec' */
958 u64 monotonic_time_snsec
;
959 time_t monotonic_time_sec
;
962 static struct pvclock_gtod_data pvclock_gtod_data
;
964 static void update_pvclock_gtod(struct timekeeper
*tk
)
966 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
968 write_seqcount_begin(&vdata
->seq
);
970 /* copy pvclock gtod data */
971 vdata
->clock
.vclock_mode
= tk
->clock
->archdata
.vclock_mode
;
972 vdata
->clock
.cycle_last
= tk
->clock
->cycle_last
;
973 vdata
->clock
.mask
= tk
->clock
->mask
;
974 vdata
->clock
.mult
= tk
->mult
;
975 vdata
->clock
.shift
= tk
->shift
;
977 vdata
->monotonic_time_sec
= tk
->xtime_sec
978 + tk
->wall_to_monotonic
.tv_sec
;
979 vdata
->monotonic_time_snsec
= tk
->xtime_nsec
980 + (tk
->wall_to_monotonic
.tv_nsec
982 while (vdata
->monotonic_time_snsec
>=
983 (((u64
)NSEC_PER_SEC
) << tk
->shift
)) {
984 vdata
->monotonic_time_snsec
-=
985 ((u64
)NSEC_PER_SEC
) << tk
->shift
;
986 vdata
->monotonic_time_sec
++;
989 write_seqcount_end(&vdata
->seq
);
994 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
998 struct pvclock_wall_clock wc
;
999 struct timespec boot
;
1004 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1009 ++version
; /* first time write, random junk */
1013 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1016 * The guest calculates current wall clock time by adding
1017 * system time (updated by kvm_guest_time_update below) to the
1018 * wall clock specified here. guest system time equals host
1019 * system time for us, thus we must fill in host boot time here.
1023 if (kvm
->arch
.kvmclock_offset
) {
1024 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1025 boot
= timespec_sub(boot
, ts
);
1027 wc
.sec
= boot
.tv_sec
;
1028 wc
.nsec
= boot
.tv_nsec
;
1029 wc
.version
= version
;
1031 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1034 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1037 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1039 uint32_t quotient
, remainder
;
1041 /* Don't try to replace with do_div(), this one calculates
1042 * "(dividend << 32) / divisor" */
1044 : "=a" (quotient
), "=d" (remainder
)
1045 : "0" (0), "1" (dividend
), "r" (divisor
) );
1049 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1050 s8
*pshift
, u32
*pmultiplier
)
1057 tps64
= base_khz
* 1000LL;
1058 scaled64
= scaled_khz
* 1000LL;
1059 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1064 tps32
= (uint32_t)tps64
;
1065 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1066 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1074 *pmultiplier
= div_frac(scaled64
, tps32
);
1076 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1077 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1080 static inline u64
get_kernel_ns(void)
1084 WARN_ON(preemptible());
1086 monotonic_to_bootbased(&ts
);
1087 return timespec_to_ns(&ts
);
1090 #ifdef CONFIG_X86_64
1091 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1094 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1095 unsigned long max_tsc_khz
;
1097 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1099 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1100 vcpu
->arch
.virtual_tsc_shift
);
1103 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1105 u64 v
= (u64
)khz
* (1000000 + ppm
);
1110 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1112 u32 thresh_lo
, thresh_hi
;
1113 int use_scaling
= 0;
1115 /* tsc_khz can be zero if TSC calibration fails */
1116 if (this_tsc_khz
== 0)
1119 /* Compute a scale to convert nanoseconds in TSC cycles */
1120 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1121 &vcpu
->arch
.virtual_tsc_shift
,
1122 &vcpu
->arch
.virtual_tsc_mult
);
1123 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1126 * Compute the variation in TSC rate which is acceptable
1127 * within the range of tolerance and decide if the
1128 * rate being applied is within that bounds of the hardware
1129 * rate. If so, no scaling or compensation need be done.
1131 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1132 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1133 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1134 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1137 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1140 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1142 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1143 vcpu
->arch
.virtual_tsc_mult
,
1144 vcpu
->arch
.virtual_tsc_shift
);
1145 tsc
+= vcpu
->arch
.this_tsc_write
;
1149 void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1151 #ifdef CONFIG_X86_64
1153 bool do_request
= false;
1154 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1155 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1157 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1158 atomic_read(&vcpu
->kvm
->online_vcpus
));
1160 if (vcpus_matched
&& gtod
->clock
.vclock_mode
== VCLOCK_TSC
)
1161 if (!ka
->use_master_clock
)
1164 if (!vcpus_matched
&& ka
->use_master_clock
)
1168 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1170 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1171 atomic_read(&vcpu
->kvm
->online_vcpus
),
1172 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1176 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1178 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1179 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1182 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1184 struct kvm
*kvm
= vcpu
->kvm
;
1185 u64 offset
, ns
, elapsed
;
1186 unsigned long flags
;
1189 u64 data
= msr
->data
;
1191 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1192 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1193 ns
= get_kernel_ns();
1194 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1196 if (vcpu
->arch
.virtual_tsc_khz
) {
1197 /* n.b - signed multiplication and division required */
1198 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1199 #ifdef CONFIG_X86_64
1200 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1202 /* do_div() only does unsigned */
1203 asm("idivl %2; xor %%edx, %%edx"
1205 : "A"(usdiff
* 1000), "rm"(vcpu
->arch
.virtual_tsc_khz
));
1207 do_div(elapsed
, 1000);
1212 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1215 * Special case: TSC write with a small delta (1 second) of virtual
1216 * cycle time against real time is interpreted as an attempt to
1217 * synchronize the CPU.
1219 * For a reliable TSC, we can match TSC offsets, and for an unstable
1220 * TSC, we add elapsed time in this computation. We could let the
1221 * compensation code attempt to catch up if we fall behind, but
1222 * it's better to try to match offsets from the beginning.
1224 if (usdiff
< USEC_PER_SEC
&&
1225 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1226 if (!check_tsc_unstable()) {
1227 offset
= kvm
->arch
.cur_tsc_offset
;
1228 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1230 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1232 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1233 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1238 * We split periods of matched TSC writes into generations.
1239 * For each generation, we track the original measured
1240 * nanosecond time, offset, and write, so if TSCs are in
1241 * sync, we can match exact offset, and if not, we can match
1242 * exact software computation in compute_guest_tsc()
1244 * These values are tracked in kvm->arch.cur_xxx variables.
1246 kvm
->arch
.cur_tsc_generation
++;
1247 kvm
->arch
.cur_tsc_nsec
= ns
;
1248 kvm
->arch
.cur_tsc_write
= data
;
1249 kvm
->arch
.cur_tsc_offset
= offset
;
1251 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1252 kvm
->arch
.cur_tsc_generation
, data
);
1256 * We also track th most recent recorded KHZ, write and time to
1257 * allow the matching interval to be extended at each write.
1259 kvm
->arch
.last_tsc_nsec
= ns
;
1260 kvm
->arch
.last_tsc_write
= data
;
1261 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1263 /* Reset of TSC must disable overshoot protection below */
1264 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1265 vcpu
->arch
.last_guest_tsc
= data
;
1267 /* Keep track of which generation this VCPU has synchronized to */
1268 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1269 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1270 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1272 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1273 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1274 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1275 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1277 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1279 kvm
->arch
.nr_vcpus_matched_tsc
++;
1281 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1283 kvm_track_tsc_matching(vcpu
);
1284 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1287 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1289 #ifdef CONFIG_X86_64
1291 static cycle_t
read_tsc(void)
1297 * Empirically, a fence (of type that depends on the CPU)
1298 * before rdtsc is enough to ensure that rdtsc is ordered
1299 * with respect to loads. The various CPU manuals are unclear
1300 * as to whether rdtsc can be reordered with later loads,
1301 * but no one has ever seen it happen.
1304 ret
= (cycle_t
)vget_cycles();
1306 last
= pvclock_gtod_data
.clock
.cycle_last
;
1308 if (likely(ret
>= last
))
1312 * GCC likes to generate cmov here, but this branch is extremely
1313 * predictable (it's just a funciton of time and the likely is
1314 * very likely) and there's a data dependence, so force GCC
1315 * to generate a branch instead. I don't barrier() because
1316 * we don't actually need a barrier, and if this function
1317 * ever gets inlined it will generate worse code.
1323 static inline u64
vgettsc(cycle_t
*cycle_now
)
1326 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1328 *cycle_now
= read_tsc();
1330 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1331 return v
* gtod
->clock
.mult
;
1334 static int do_monotonic(struct timespec
*ts
, cycle_t
*cycle_now
)
1339 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1343 seq
= read_seqcount_begin(>od
->seq
);
1344 mode
= gtod
->clock
.vclock_mode
;
1345 ts
->tv_sec
= gtod
->monotonic_time_sec
;
1346 ns
= gtod
->monotonic_time_snsec
;
1347 ns
+= vgettsc(cycle_now
);
1348 ns
>>= gtod
->clock
.shift
;
1349 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1350 timespec_add_ns(ts
, ns
);
1355 /* returns true if host is using tsc clocksource */
1356 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1360 /* checked again under seqlock below */
1361 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1364 if (do_monotonic(&ts
, cycle_now
) != VCLOCK_TSC
)
1367 monotonic_to_bootbased(&ts
);
1368 *kernel_ns
= timespec_to_ns(&ts
);
1376 * Assuming a stable TSC across physical CPUS, and a stable TSC
1377 * across virtual CPUs, the following condition is possible.
1378 * Each numbered line represents an event visible to both
1379 * CPUs at the next numbered event.
1381 * "timespecX" represents host monotonic time. "tscX" represents
1384 * VCPU0 on CPU0 | VCPU1 on CPU1
1386 * 1. read timespec0,tsc0
1387 * 2. | timespec1 = timespec0 + N
1389 * 3. transition to guest | transition to guest
1390 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1391 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1392 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1394 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1397 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1399 * - 0 < N - M => M < N
1401 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1402 * always the case (the difference between two distinct xtime instances
1403 * might be smaller then the difference between corresponding TSC reads,
1404 * when updating guest vcpus pvclock areas).
1406 * To avoid that problem, do not allow visibility of distinct
1407 * system_timestamp/tsc_timestamp values simultaneously: use a master
1408 * copy of host monotonic time values. Update that master copy
1411 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1415 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1417 #ifdef CONFIG_X86_64
1418 struct kvm_arch
*ka
= &kvm
->arch
;
1420 bool host_tsc_clocksource
, vcpus_matched
;
1422 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1423 atomic_read(&kvm
->online_vcpus
));
1426 * If the host uses TSC clock, then passthrough TSC as stable
1429 host_tsc_clocksource
= kvm_get_time_and_clockread(
1430 &ka
->master_kernel_ns
,
1431 &ka
->master_cycle_now
);
1433 ka
->use_master_clock
= host_tsc_clocksource
& vcpus_matched
;
1435 if (ka
->use_master_clock
)
1436 atomic_set(&kvm_guest_has_master_clock
, 1);
1438 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1439 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1444 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1446 unsigned long flags
, this_tsc_khz
;
1447 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1448 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1449 s64 kernel_ns
, max_kernel_ns
;
1450 u64 tsc_timestamp
, host_tsc
;
1451 struct pvclock_vcpu_time_info guest_hv_clock
;
1453 bool use_master_clock
;
1459 * If the host uses TSC clock, then passthrough TSC as stable
1462 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1463 use_master_clock
= ka
->use_master_clock
;
1464 if (use_master_clock
) {
1465 host_tsc
= ka
->master_cycle_now
;
1466 kernel_ns
= ka
->master_kernel_ns
;
1468 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1470 /* Keep irq disabled to prevent changes to the clock */
1471 local_irq_save(flags
);
1472 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1473 if (unlikely(this_tsc_khz
== 0)) {
1474 local_irq_restore(flags
);
1475 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1478 if (!use_master_clock
) {
1479 host_tsc
= native_read_tsc();
1480 kernel_ns
= get_kernel_ns();
1483 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1486 * We may have to catch up the TSC to match elapsed wall clock
1487 * time for two reasons, even if kvmclock is used.
1488 * 1) CPU could have been running below the maximum TSC rate
1489 * 2) Broken TSC compensation resets the base at each VCPU
1490 * entry to avoid unknown leaps of TSC even when running
1491 * again on the same CPU. This may cause apparent elapsed
1492 * time to disappear, and the guest to stand still or run
1495 if (vcpu
->tsc_catchup
) {
1496 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1497 if (tsc
> tsc_timestamp
) {
1498 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1499 tsc_timestamp
= tsc
;
1503 local_irq_restore(flags
);
1505 if (!vcpu
->pv_time_enabled
)
1509 * Time as measured by the TSC may go backwards when resetting the base
1510 * tsc_timestamp. The reason for this is that the TSC resolution is
1511 * higher than the resolution of the other clock scales. Thus, many
1512 * possible measurments of the TSC correspond to one measurement of any
1513 * other clock, and so a spread of values is possible. This is not a
1514 * problem for the computation of the nanosecond clock; with TSC rates
1515 * around 1GHZ, there can only be a few cycles which correspond to one
1516 * nanosecond value, and any path through this code will inevitably
1517 * take longer than that. However, with the kernel_ns value itself,
1518 * the precision may be much lower, down to HZ granularity. If the
1519 * first sampling of TSC against kernel_ns ends in the low part of the
1520 * range, and the second in the high end of the range, we can get:
1522 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1524 * As the sampling errors potentially range in the thousands of cycles,
1525 * it is possible such a time value has already been observed by the
1526 * guest. To protect against this, we must compute the system time as
1527 * observed by the guest and ensure the new system time is greater.
1530 if (vcpu
->hv_clock
.tsc_timestamp
) {
1531 max_kernel_ns
= vcpu
->last_guest_tsc
-
1532 vcpu
->hv_clock
.tsc_timestamp
;
1533 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1534 vcpu
->hv_clock
.tsc_to_system_mul
,
1535 vcpu
->hv_clock
.tsc_shift
);
1536 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1539 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1540 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1541 &vcpu
->hv_clock
.tsc_shift
,
1542 &vcpu
->hv_clock
.tsc_to_system_mul
);
1543 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1546 /* with a master <monotonic time, tsc value> tuple,
1547 * pvclock clock reads always increase at the (scaled) rate
1548 * of guest TSC - no need to deal with sampling errors.
1550 if (!use_master_clock
) {
1551 if (max_kernel_ns
> kernel_ns
)
1552 kernel_ns
= max_kernel_ns
;
1554 /* With all the info we got, fill in the values */
1555 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1556 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1557 vcpu
->last_kernel_ns
= kernel_ns
;
1558 vcpu
->last_guest_tsc
= tsc_timestamp
;
1561 * The interface expects us to write an even number signaling that the
1562 * update is finished. Since the guest won't see the intermediate
1563 * state, we just increase by 2 at the end.
1565 vcpu
->hv_clock
.version
+= 2;
1567 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1568 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1571 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1572 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1574 if (vcpu
->pvclock_set_guest_stopped_request
) {
1575 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1576 vcpu
->pvclock_set_guest_stopped_request
= false;
1579 /* If the host uses TSC clocksource, then it is stable */
1580 if (use_master_clock
)
1581 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1583 vcpu
->hv_clock
.flags
= pvclock_flags
;
1585 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1587 sizeof(vcpu
->hv_clock
));
1592 * kvmclock updates which are isolated to a given vcpu, such as
1593 * vcpu->cpu migration, should not allow system_timestamp from
1594 * the rest of the vcpus to remain static. Otherwise ntp frequency
1595 * correction applies to one vcpu's system_timestamp but not
1598 * So in those cases, request a kvmclock update for all vcpus.
1599 * The worst case for a remote vcpu to update its kvmclock
1600 * is then bounded by maximum nohz sleep latency.
1603 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1606 struct kvm
*kvm
= v
->kvm
;
1607 struct kvm_vcpu
*vcpu
;
1609 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1610 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1611 kvm_vcpu_kick(vcpu
);
1615 static bool msr_mtrr_valid(unsigned msr
)
1618 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1619 case MSR_MTRRfix64K_00000
:
1620 case MSR_MTRRfix16K_80000
:
1621 case MSR_MTRRfix16K_A0000
:
1622 case MSR_MTRRfix4K_C0000
:
1623 case MSR_MTRRfix4K_C8000
:
1624 case MSR_MTRRfix4K_D0000
:
1625 case MSR_MTRRfix4K_D8000
:
1626 case MSR_MTRRfix4K_E0000
:
1627 case MSR_MTRRfix4K_E8000
:
1628 case MSR_MTRRfix4K_F0000
:
1629 case MSR_MTRRfix4K_F8000
:
1630 case MSR_MTRRdefType
:
1631 case MSR_IA32_CR_PAT
:
1639 static bool valid_pat_type(unsigned t
)
1641 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1644 static bool valid_mtrr_type(unsigned t
)
1646 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1649 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1653 if (!msr_mtrr_valid(msr
))
1656 if (msr
== MSR_IA32_CR_PAT
) {
1657 for (i
= 0; i
< 8; i
++)
1658 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1661 } else if (msr
== MSR_MTRRdefType
) {
1664 return valid_mtrr_type(data
& 0xff);
1665 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1666 for (i
= 0; i
< 8 ; i
++)
1667 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1672 /* variable MTRRs */
1673 return valid_mtrr_type(data
& 0xff);
1676 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1678 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1680 if (!mtrr_valid(vcpu
, msr
, data
))
1683 if (msr
== MSR_MTRRdefType
) {
1684 vcpu
->arch
.mtrr_state
.def_type
= data
;
1685 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1686 } else if (msr
== MSR_MTRRfix64K_00000
)
1688 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1689 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1690 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1691 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1692 else if (msr
== MSR_IA32_CR_PAT
)
1693 vcpu
->arch
.pat
= data
;
1694 else { /* Variable MTRRs */
1695 int idx
, is_mtrr_mask
;
1698 idx
= (msr
- 0x200) / 2;
1699 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1702 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1705 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1709 kvm_mmu_reset_context(vcpu
);
1713 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1715 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1716 unsigned bank_num
= mcg_cap
& 0xff;
1719 case MSR_IA32_MCG_STATUS
:
1720 vcpu
->arch
.mcg_status
= data
;
1722 case MSR_IA32_MCG_CTL
:
1723 if (!(mcg_cap
& MCG_CTL_P
))
1725 if (data
!= 0 && data
!= ~(u64
)0)
1727 vcpu
->arch
.mcg_ctl
= data
;
1730 if (msr
>= MSR_IA32_MC0_CTL
&&
1731 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1732 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1733 /* only 0 or all 1s can be written to IA32_MCi_CTL
1734 * some Linux kernels though clear bit 10 in bank 4 to
1735 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1736 * this to avoid an uncatched #GP in the guest
1738 if ((offset
& 0x3) == 0 &&
1739 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1741 vcpu
->arch
.mce_banks
[offset
] = data
;
1749 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1751 struct kvm
*kvm
= vcpu
->kvm
;
1752 int lm
= is_long_mode(vcpu
);
1753 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1754 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1755 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1756 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1757 u32 page_num
= data
& ~PAGE_MASK
;
1758 u64 page_addr
= data
& PAGE_MASK
;
1763 if (page_num
>= blob_size
)
1766 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1771 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1780 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1782 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1785 static bool kvm_hv_msr_partition_wide(u32 msr
)
1789 case HV_X64_MSR_GUEST_OS_ID
:
1790 case HV_X64_MSR_HYPERCALL
:
1798 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1800 struct kvm
*kvm
= vcpu
->kvm
;
1803 case HV_X64_MSR_GUEST_OS_ID
:
1804 kvm
->arch
.hv_guest_os_id
= data
;
1805 /* setting guest os id to zero disables hypercall page */
1806 if (!kvm
->arch
.hv_guest_os_id
)
1807 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1809 case HV_X64_MSR_HYPERCALL
: {
1814 /* if guest os id is not set hypercall should remain disabled */
1815 if (!kvm
->arch
.hv_guest_os_id
)
1817 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1818 kvm
->arch
.hv_hypercall
= data
;
1821 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1822 addr
= gfn_to_hva(kvm
, gfn
);
1823 if (kvm_is_error_hva(addr
))
1825 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1826 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1827 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1829 kvm
->arch
.hv_hypercall
= data
;
1833 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1834 "data 0x%llx\n", msr
, data
);
1840 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1843 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1846 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1847 vcpu
->arch
.hv_vapic
= data
;
1850 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1851 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1852 if (kvm_is_error_hva(addr
))
1854 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1856 vcpu
->arch
.hv_vapic
= data
;
1859 case HV_X64_MSR_EOI
:
1860 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1861 case HV_X64_MSR_ICR
:
1862 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1863 case HV_X64_MSR_TPR
:
1864 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1866 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1867 "data 0x%llx\n", msr
, data
);
1874 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1876 gpa_t gpa
= data
& ~0x3f;
1878 /* Bits 2:5 are reserved, Should be zero */
1882 vcpu
->arch
.apf
.msr_val
= data
;
1884 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1885 kvm_clear_async_pf_completion_queue(vcpu
);
1886 kvm_async_pf_hash_reset(vcpu
);
1890 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1894 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1895 kvm_async_pf_wakeup_all(vcpu
);
1899 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1901 vcpu
->arch
.pv_time_enabled
= false;
1904 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1908 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1911 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1912 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1913 vcpu
->arch
.st
.accum_steal
= delta
;
1916 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1918 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1921 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1922 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1925 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1926 vcpu
->arch
.st
.steal
.version
+= 2;
1927 vcpu
->arch
.st
.accum_steal
= 0;
1929 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1930 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1933 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1936 u32 msr
= msr_info
->index
;
1937 u64 data
= msr_info
->data
;
1940 case MSR_AMD64_NB_CFG
:
1941 case MSR_IA32_UCODE_REV
:
1942 case MSR_IA32_UCODE_WRITE
:
1943 case MSR_VM_HSAVE_PA
:
1944 case MSR_AMD64_PATCH_LOADER
:
1945 case MSR_AMD64_BU_CFG2
:
1949 return set_efer(vcpu
, data
);
1951 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1952 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1953 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
1955 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1960 case MSR_FAM10H_MMIO_CONF_BASE
:
1962 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1967 case MSR_IA32_DEBUGCTLMSR
:
1969 /* We support the non-activated case already */
1971 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1972 /* Values other than LBR and BTF are vendor-specific,
1973 thus reserved and should throw a #GP */
1976 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1979 case 0x200 ... 0x2ff:
1980 return set_msr_mtrr(vcpu
, msr
, data
);
1981 case MSR_IA32_APICBASE
:
1982 kvm_set_apic_base(vcpu
, data
);
1984 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1985 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1986 case MSR_IA32_TSCDEADLINE
:
1987 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1989 case MSR_IA32_TSC_ADJUST
:
1990 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
1991 if (!msr_info
->host_initiated
) {
1992 u64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
1993 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
1995 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
1998 case MSR_IA32_MISC_ENABLE
:
1999 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2001 case MSR_KVM_WALL_CLOCK_NEW
:
2002 case MSR_KVM_WALL_CLOCK
:
2003 vcpu
->kvm
->arch
.wall_clock
= data
;
2004 kvm_write_wall_clock(vcpu
->kvm
, data
);
2006 case MSR_KVM_SYSTEM_TIME_NEW
:
2007 case MSR_KVM_SYSTEM_TIME
: {
2009 kvmclock_reset(vcpu
);
2011 vcpu
->arch
.time
= data
;
2012 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2014 /* we verify if the enable bit is set... */
2018 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2020 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2021 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2022 sizeof(struct pvclock_vcpu_time_info
)))
2023 vcpu
->arch
.pv_time_enabled
= false;
2025 vcpu
->arch
.pv_time_enabled
= true;
2029 case MSR_KVM_ASYNC_PF_EN
:
2030 if (kvm_pv_enable_async_pf(vcpu
, data
))
2033 case MSR_KVM_STEAL_TIME
:
2035 if (unlikely(!sched_info_on()))
2038 if (data
& KVM_STEAL_RESERVED_MASK
)
2041 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2042 data
& KVM_STEAL_VALID_BITS
,
2043 sizeof(struct kvm_steal_time
)))
2046 vcpu
->arch
.st
.msr_val
= data
;
2048 if (!(data
& KVM_MSR_ENABLED
))
2051 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2054 accumulate_steal_time(vcpu
);
2057 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2060 case MSR_KVM_PV_EOI_EN
:
2061 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2065 case MSR_IA32_MCG_CTL
:
2066 case MSR_IA32_MCG_STATUS
:
2067 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2068 return set_msr_mce(vcpu
, msr
, data
);
2070 /* Performance counters are not protected by a CPUID bit,
2071 * so we should check all of them in the generic path for the sake of
2072 * cross vendor migration.
2073 * Writing a zero into the event select MSRs disables them,
2074 * which we perfectly emulate ;-). Any other value should be at least
2075 * reported, some guests depend on them.
2077 case MSR_K7_EVNTSEL0
:
2078 case MSR_K7_EVNTSEL1
:
2079 case MSR_K7_EVNTSEL2
:
2080 case MSR_K7_EVNTSEL3
:
2082 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2083 "0x%x data 0x%llx\n", msr
, data
);
2085 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2086 * so we ignore writes to make it happy.
2088 case MSR_K7_PERFCTR0
:
2089 case MSR_K7_PERFCTR1
:
2090 case MSR_K7_PERFCTR2
:
2091 case MSR_K7_PERFCTR3
:
2092 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2093 "0x%x data 0x%llx\n", msr
, data
);
2095 case MSR_P6_PERFCTR0
:
2096 case MSR_P6_PERFCTR1
:
2098 case MSR_P6_EVNTSEL0
:
2099 case MSR_P6_EVNTSEL1
:
2100 if (kvm_pmu_msr(vcpu
, msr
))
2101 return kvm_pmu_set_msr(vcpu
, msr_info
);
2103 if (pr
|| data
!= 0)
2104 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2105 "0x%x data 0x%llx\n", msr
, data
);
2107 case MSR_K7_CLK_CTL
:
2109 * Ignore all writes to this no longer documented MSR.
2110 * Writes are only relevant for old K7 processors,
2111 * all pre-dating SVM, but a recommended workaround from
2112 * AMD for these chips. It is possible to specify the
2113 * affected processor models on the command line, hence
2114 * the need to ignore the workaround.
2117 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2118 if (kvm_hv_msr_partition_wide(msr
)) {
2120 mutex_lock(&vcpu
->kvm
->lock
);
2121 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2122 mutex_unlock(&vcpu
->kvm
->lock
);
2125 return set_msr_hyperv(vcpu
, msr
, data
);
2127 case MSR_IA32_BBL_CR_CTL3
:
2128 /* Drop writes to this legacy MSR -- see rdmsr
2129 * counterpart for further detail.
2131 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2133 case MSR_AMD64_OSVW_ID_LENGTH
:
2134 if (!guest_cpuid_has_osvw(vcpu
))
2136 vcpu
->arch
.osvw
.length
= data
;
2138 case MSR_AMD64_OSVW_STATUS
:
2139 if (!guest_cpuid_has_osvw(vcpu
))
2141 vcpu
->arch
.osvw
.status
= data
;
2144 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2145 return xen_hvm_config(vcpu
, data
);
2146 if (kvm_pmu_msr(vcpu
, msr
))
2147 return kvm_pmu_set_msr(vcpu
, msr_info
);
2149 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2153 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2160 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2164 * Reads an msr value (of 'msr_index') into 'pdata'.
2165 * Returns 0 on success, non-0 otherwise.
2166 * Assumes vcpu_load() was already called.
2168 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2170 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2173 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2175 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2177 if (!msr_mtrr_valid(msr
))
2180 if (msr
== MSR_MTRRdefType
)
2181 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2182 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2183 else if (msr
== MSR_MTRRfix64K_00000
)
2185 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2186 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2187 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2188 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2189 else if (msr
== MSR_IA32_CR_PAT
)
2190 *pdata
= vcpu
->arch
.pat
;
2191 else { /* Variable MTRRs */
2192 int idx
, is_mtrr_mask
;
2195 idx
= (msr
- 0x200) / 2;
2196 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2199 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2202 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2209 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2212 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2213 unsigned bank_num
= mcg_cap
& 0xff;
2216 case MSR_IA32_P5_MC_ADDR
:
2217 case MSR_IA32_P5_MC_TYPE
:
2220 case MSR_IA32_MCG_CAP
:
2221 data
= vcpu
->arch
.mcg_cap
;
2223 case MSR_IA32_MCG_CTL
:
2224 if (!(mcg_cap
& MCG_CTL_P
))
2226 data
= vcpu
->arch
.mcg_ctl
;
2228 case MSR_IA32_MCG_STATUS
:
2229 data
= vcpu
->arch
.mcg_status
;
2232 if (msr
>= MSR_IA32_MC0_CTL
&&
2233 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
2234 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2235 data
= vcpu
->arch
.mce_banks
[offset
];
2244 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2247 struct kvm
*kvm
= vcpu
->kvm
;
2250 case HV_X64_MSR_GUEST_OS_ID
:
2251 data
= kvm
->arch
.hv_guest_os_id
;
2253 case HV_X64_MSR_HYPERCALL
:
2254 data
= kvm
->arch
.hv_hypercall
;
2257 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2265 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2270 case HV_X64_MSR_VP_INDEX
: {
2273 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
2278 case HV_X64_MSR_EOI
:
2279 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2280 case HV_X64_MSR_ICR
:
2281 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2282 case HV_X64_MSR_TPR
:
2283 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2284 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2285 data
= vcpu
->arch
.hv_vapic
;
2288 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2295 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2300 case MSR_IA32_PLATFORM_ID
:
2301 case MSR_IA32_EBL_CR_POWERON
:
2302 case MSR_IA32_DEBUGCTLMSR
:
2303 case MSR_IA32_LASTBRANCHFROMIP
:
2304 case MSR_IA32_LASTBRANCHTOIP
:
2305 case MSR_IA32_LASTINTFROMIP
:
2306 case MSR_IA32_LASTINTTOIP
:
2309 case MSR_VM_HSAVE_PA
:
2310 case MSR_K7_EVNTSEL0
:
2311 case MSR_K7_PERFCTR0
:
2312 case MSR_K8_INT_PENDING_MSG
:
2313 case MSR_AMD64_NB_CFG
:
2314 case MSR_FAM10H_MMIO_CONF_BASE
:
2315 case MSR_AMD64_BU_CFG2
:
2318 case MSR_P6_PERFCTR0
:
2319 case MSR_P6_PERFCTR1
:
2320 case MSR_P6_EVNTSEL0
:
2321 case MSR_P6_EVNTSEL1
:
2322 if (kvm_pmu_msr(vcpu
, msr
))
2323 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2326 case MSR_IA32_UCODE_REV
:
2327 data
= 0x100000000ULL
;
2330 data
= 0x500 | KVM_NR_VAR_MTRR
;
2332 case 0x200 ... 0x2ff:
2333 return get_msr_mtrr(vcpu
, msr
, pdata
);
2334 case 0xcd: /* fsb frequency */
2338 * MSR_EBC_FREQUENCY_ID
2339 * Conservative value valid for even the basic CPU models.
2340 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2341 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2342 * and 266MHz for model 3, or 4. Set Core Clock
2343 * Frequency to System Bus Frequency Ratio to 1 (bits
2344 * 31:24) even though these are only valid for CPU
2345 * models > 2, however guests may end up dividing or
2346 * multiplying by zero otherwise.
2348 case MSR_EBC_FREQUENCY_ID
:
2351 case MSR_IA32_APICBASE
:
2352 data
= kvm_get_apic_base(vcpu
);
2354 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2355 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2357 case MSR_IA32_TSCDEADLINE
:
2358 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2360 case MSR_IA32_TSC_ADJUST
:
2361 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2363 case MSR_IA32_MISC_ENABLE
:
2364 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2366 case MSR_IA32_PERF_STATUS
:
2367 /* TSC increment by tick */
2369 /* CPU multiplier */
2370 data
|= (((uint64_t)4ULL) << 40);
2373 data
= vcpu
->arch
.efer
;
2375 case MSR_KVM_WALL_CLOCK
:
2376 case MSR_KVM_WALL_CLOCK_NEW
:
2377 data
= vcpu
->kvm
->arch
.wall_clock
;
2379 case MSR_KVM_SYSTEM_TIME
:
2380 case MSR_KVM_SYSTEM_TIME_NEW
:
2381 data
= vcpu
->arch
.time
;
2383 case MSR_KVM_ASYNC_PF_EN
:
2384 data
= vcpu
->arch
.apf
.msr_val
;
2386 case MSR_KVM_STEAL_TIME
:
2387 data
= vcpu
->arch
.st
.msr_val
;
2389 case MSR_KVM_PV_EOI_EN
:
2390 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2392 case MSR_IA32_P5_MC_ADDR
:
2393 case MSR_IA32_P5_MC_TYPE
:
2394 case MSR_IA32_MCG_CAP
:
2395 case MSR_IA32_MCG_CTL
:
2396 case MSR_IA32_MCG_STATUS
:
2397 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2398 return get_msr_mce(vcpu
, msr
, pdata
);
2399 case MSR_K7_CLK_CTL
:
2401 * Provide expected ramp-up count for K7. All other
2402 * are set to zero, indicating minimum divisors for
2405 * This prevents guest kernels on AMD host with CPU
2406 * type 6, model 8 and higher from exploding due to
2407 * the rdmsr failing.
2411 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2412 if (kvm_hv_msr_partition_wide(msr
)) {
2414 mutex_lock(&vcpu
->kvm
->lock
);
2415 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2416 mutex_unlock(&vcpu
->kvm
->lock
);
2419 return get_msr_hyperv(vcpu
, msr
, pdata
);
2421 case MSR_IA32_BBL_CR_CTL3
:
2422 /* This legacy MSR exists but isn't fully documented in current
2423 * silicon. It is however accessed by winxp in very narrow
2424 * scenarios where it sets bit #19, itself documented as
2425 * a "reserved" bit. Best effort attempt to source coherent
2426 * read data here should the balance of the register be
2427 * interpreted by the guest:
2429 * L2 cache control register 3: 64GB range, 256KB size,
2430 * enabled, latency 0x1, configured
2434 case MSR_AMD64_OSVW_ID_LENGTH
:
2435 if (!guest_cpuid_has_osvw(vcpu
))
2437 data
= vcpu
->arch
.osvw
.length
;
2439 case MSR_AMD64_OSVW_STATUS
:
2440 if (!guest_cpuid_has_osvw(vcpu
))
2442 data
= vcpu
->arch
.osvw
.status
;
2445 if (kvm_pmu_msr(vcpu
, msr
))
2446 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2448 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2451 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2459 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2462 * Read or write a bunch of msrs. All parameters are kernel addresses.
2464 * @return number of msrs set successfully.
2466 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2467 struct kvm_msr_entry
*entries
,
2468 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2469 unsigned index
, u64
*data
))
2473 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2474 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2475 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2477 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2483 * Read or write a bunch of msrs. Parameters are user addresses.
2485 * @return number of msrs set successfully.
2487 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2488 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2489 unsigned index
, u64
*data
),
2492 struct kvm_msrs msrs
;
2493 struct kvm_msr_entry
*entries
;
2498 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2502 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2505 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2506 entries
= memdup_user(user_msrs
->entries
, size
);
2507 if (IS_ERR(entries
)) {
2508 r
= PTR_ERR(entries
);
2512 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2517 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2528 int kvm_dev_ioctl_check_extension(long ext
)
2533 case KVM_CAP_IRQCHIP
:
2535 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2536 case KVM_CAP_SET_TSS_ADDR
:
2537 case KVM_CAP_EXT_CPUID
:
2538 case KVM_CAP_CLOCKSOURCE
:
2540 case KVM_CAP_NOP_IO_DELAY
:
2541 case KVM_CAP_MP_STATE
:
2542 case KVM_CAP_SYNC_MMU
:
2543 case KVM_CAP_USER_NMI
:
2544 case KVM_CAP_REINJECT_CONTROL
:
2545 case KVM_CAP_IRQ_INJECT_STATUS
:
2547 case KVM_CAP_IOEVENTFD
:
2549 case KVM_CAP_PIT_STATE2
:
2550 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2551 case KVM_CAP_XEN_HVM
:
2552 case KVM_CAP_ADJUST_CLOCK
:
2553 case KVM_CAP_VCPU_EVENTS
:
2554 case KVM_CAP_HYPERV
:
2555 case KVM_CAP_HYPERV_VAPIC
:
2556 case KVM_CAP_HYPERV_SPIN
:
2557 case KVM_CAP_PCI_SEGMENT
:
2558 case KVM_CAP_DEBUGREGS
:
2559 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2561 case KVM_CAP_ASYNC_PF
:
2562 case KVM_CAP_GET_TSC_KHZ
:
2563 case KVM_CAP_KVMCLOCK_CTRL
:
2564 case KVM_CAP_READONLY_MEM
:
2565 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2566 case KVM_CAP_ASSIGN_DEV_IRQ
:
2567 case KVM_CAP_PCI_2_3
:
2571 case KVM_CAP_COALESCED_MMIO
:
2572 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2575 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2577 case KVM_CAP_NR_VCPUS
:
2578 r
= KVM_SOFT_MAX_VCPUS
;
2580 case KVM_CAP_MAX_VCPUS
:
2583 case KVM_CAP_NR_MEMSLOTS
:
2584 r
= KVM_USER_MEM_SLOTS
;
2586 case KVM_CAP_PV_MMU
: /* obsolete */
2589 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2591 r
= iommu_present(&pci_bus_type
);
2595 r
= KVM_MAX_MCE_BANKS
;
2600 case KVM_CAP_TSC_CONTROL
:
2601 r
= kvm_has_tsc_control
;
2603 case KVM_CAP_TSC_DEADLINE_TIMER
:
2604 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2614 long kvm_arch_dev_ioctl(struct file
*filp
,
2615 unsigned int ioctl
, unsigned long arg
)
2617 void __user
*argp
= (void __user
*)arg
;
2621 case KVM_GET_MSR_INDEX_LIST
: {
2622 struct kvm_msr_list __user
*user_msr_list
= argp
;
2623 struct kvm_msr_list msr_list
;
2627 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2630 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2631 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2634 if (n
< msr_list
.nmsrs
)
2637 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2638 num_msrs_to_save
* sizeof(u32
)))
2640 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2642 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2647 case KVM_GET_SUPPORTED_CPUID
: {
2648 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2649 struct kvm_cpuid2 cpuid
;
2652 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2654 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2655 cpuid_arg
->entries
);
2660 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2665 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2668 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2670 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2682 static void wbinvd_ipi(void *garbage
)
2687 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2689 return vcpu
->kvm
->arch
.iommu_domain
&&
2690 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2693 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2695 /* Address WBINVD may be executed by guest */
2696 if (need_emulate_wbinvd(vcpu
)) {
2697 if (kvm_x86_ops
->has_wbinvd_exit())
2698 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2699 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2700 smp_call_function_single(vcpu
->cpu
,
2701 wbinvd_ipi
, NULL
, 1);
2704 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2706 /* Apply any externally detected TSC adjustments (due to suspend) */
2707 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2708 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2709 vcpu
->arch
.tsc_offset_adjustment
= 0;
2710 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2713 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2714 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2715 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2717 mark_tsc_unstable("KVM discovered backwards TSC");
2718 if (check_tsc_unstable()) {
2719 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2720 vcpu
->arch
.last_guest_tsc
);
2721 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2722 vcpu
->arch
.tsc_catchup
= 1;
2725 * On a host with synchronized TSC, there is no need to update
2726 * kvmclock on vcpu->cpu migration
2728 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2729 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2730 if (vcpu
->cpu
!= cpu
)
2731 kvm_migrate_timers(vcpu
);
2735 accumulate_steal_time(vcpu
);
2736 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2739 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2741 kvm_x86_ops
->vcpu_put(vcpu
);
2742 kvm_put_guest_fpu(vcpu
);
2743 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2746 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2747 struct kvm_lapic_state
*s
)
2749 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2750 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2755 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2756 struct kvm_lapic_state
*s
)
2758 kvm_apic_post_state_restore(vcpu
, s
);
2759 update_cr8_intercept(vcpu
);
2764 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2765 struct kvm_interrupt
*irq
)
2767 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2769 if (irqchip_in_kernel(vcpu
->kvm
))
2772 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2773 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2778 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2780 kvm_inject_nmi(vcpu
);
2785 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2786 struct kvm_tpr_access_ctl
*tac
)
2790 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2794 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2798 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2801 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2803 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2806 vcpu
->arch
.mcg_cap
= mcg_cap
;
2807 /* Init IA32_MCG_CTL to all 1s */
2808 if (mcg_cap
& MCG_CTL_P
)
2809 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2810 /* Init IA32_MCi_CTL to all 1s */
2811 for (bank
= 0; bank
< bank_num
; bank
++)
2812 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2817 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2818 struct kvm_x86_mce
*mce
)
2820 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2821 unsigned bank_num
= mcg_cap
& 0xff;
2822 u64
*banks
= vcpu
->arch
.mce_banks
;
2824 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2827 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2828 * reporting is disabled
2830 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2831 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2833 banks
+= 4 * mce
->bank
;
2835 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2836 * reporting is disabled for the bank
2838 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2840 if (mce
->status
& MCI_STATUS_UC
) {
2841 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2842 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2843 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2846 if (banks
[1] & MCI_STATUS_VAL
)
2847 mce
->status
|= MCI_STATUS_OVER
;
2848 banks
[2] = mce
->addr
;
2849 banks
[3] = mce
->misc
;
2850 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2851 banks
[1] = mce
->status
;
2852 kvm_queue_exception(vcpu
, MC_VECTOR
);
2853 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2854 || !(banks
[1] & MCI_STATUS_UC
)) {
2855 if (banks
[1] & MCI_STATUS_VAL
)
2856 mce
->status
|= MCI_STATUS_OVER
;
2857 banks
[2] = mce
->addr
;
2858 banks
[3] = mce
->misc
;
2859 banks
[1] = mce
->status
;
2861 banks
[1] |= MCI_STATUS_OVER
;
2865 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2866 struct kvm_vcpu_events
*events
)
2869 events
->exception
.injected
=
2870 vcpu
->arch
.exception
.pending
&&
2871 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2872 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2873 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2874 events
->exception
.pad
= 0;
2875 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2877 events
->interrupt
.injected
=
2878 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2879 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2880 events
->interrupt
.soft
= 0;
2881 events
->interrupt
.shadow
=
2882 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2883 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2885 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2886 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2887 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2888 events
->nmi
.pad
= 0;
2890 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2892 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2893 | KVM_VCPUEVENT_VALID_SHADOW
);
2894 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2897 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2898 struct kvm_vcpu_events
*events
)
2900 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2901 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2902 | KVM_VCPUEVENT_VALID_SHADOW
))
2906 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2907 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2908 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2909 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2911 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2912 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2913 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2914 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2915 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2916 events
->interrupt
.shadow
);
2918 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2919 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2920 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2921 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2923 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
2924 kvm_vcpu_has_lapic(vcpu
))
2925 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
2927 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2932 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2933 struct kvm_debugregs
*dbgregs
)
2935 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2936 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2937 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2939 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2942 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2943 struct kvm_debugregs
*dbgregs
)
2948 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2949 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2950 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2955 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2956 struct kvm_xsave
*guest_xsave
)
2959 memcpy(guest_xsave
->region
,
2960 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2963 memcpy(guest_xsave
->region
,
2964 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2965 sizeof(struct i387_fxsave_struct
));
2966 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2971 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2972 struct kvm_xsave
*guest_xsave
)
2975 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2978 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2979 guest_xsave
->region
, xstate_size
);
2981 if (xstate_bv
& ~XSTATE_FPSSE
)
2983 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2984 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2989 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2990 struct kvm_xcrs
*guest_xcrs
)
2992 if (!cpu_has_xsave
) {
2993 guest_xcrs
->nr_xcrs
= 0;
2997 guest_xcrs
->nr_xcrs
= 1;
2998 guest_xcrs
->flags
= 0;
2999 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3000 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3003 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3004 struct kvm_xcrs
*guest_xcrs
)
3011 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3014 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3015 /* Only support XCR0 currently */
3016 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3017 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3018 guest_xcrs
->xcrs
[0].value
);
3027 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3028 * stopped by the hypervisor. This function will be called from the host only.
3029 * EINVAL is returned when the host attempts to set the flag for a guest that
3030 * does not support pv clocks.
3032 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3034 if (!vcpu
->arch
.pv_time_enabled
)
3036 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3037 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3041 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3042 unsigned int ioctl
, unsigned long arg
)
3044 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3045 void __user
*argp
= (void __user
*)arg
;
3048 struct kvm_lapic_state
*lapic
;
3049 struct kvm_xsave
*xsave
;
3050 struct kvm_xcrs
*xcrs
;
3056 case KVM_GET_LAPIC
: {
3058 if (!vcpu
->arch
.apic
)
3060 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3065 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3069 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3074 case KVM_SET_LAPIC
: {
3076 if (!vcpu
->arch
.apic
)
3078 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3079 if (IS_ERR(u
.lapic
))
3080 return PTR_ERR(u
.lapic
);
3082 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3085 case KVM_INTERRUPT
: {
3086 struct kvm_interrupt irq
;
3089 if (copy_from_user(&irq
, argp
, sizeof irq
))
3091 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3095 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3098 case KVM_SET_CPUID
: {
3099 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3100 struct kvm_cpuid cpuid
;
3103 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3105 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3108 case KVM_SET_CPUID2
: {
3109 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3110 struct kvm_cpuid2 cpuid
;
3113 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3115 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3116 cpuid_arg
->entries
);
3119 case KVM_GET_CPUID2
: {
3120 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3121 struct kvm_cpuid2 cpuid
;
3124 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3126 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3127 cpuid_arg
->entries
);
3131 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3137 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3140 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3142 case KVM_TPR_ACCESS_REPORTING
: {
3143 struct kvm_tpr_access_ctl tac
;
3146 if (copy_from_user(&tac
, argp
, sizeof tac
))
3148 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3152 if (copy_to_user(argp
, &tac
, sizeof tac
))
3157 case KVM_SET_VAPIC_ADDR
: {
3158 struct kvm_vapic_addr va
;
3161 if (!irqchip_in_kernel(vcpu
->kvm
))
3164 if (copy_from_user(&va
, argp
, sizeof va
))
3167 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3170 case KVM_X86_SETUP_MCE
: {
3174 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3176 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3179 case KVM_X86_SET_MCE
: {
3180 struct kvm_x86_mce mce
;
3183 if (copy_from_user(&mce
, argp
, sizeof mce
))
3185 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3188 case KVM_GET_VCPU_EVENTS
: {
3189 struct kvm_vcpu_events events
;
3191 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3194 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3199 case KVM_SET_VCPU_EVENTS
: {
3200 struct kvm_vcpu_events events
;
3203 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3206 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3209 case KVM_GET_DEBUGREGS
: {
3210 struct kvm_debugregs dbgregs
;
3212 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3215 if (copy_to_user(argp
, &dbgregs
,
3216 sizeof(struct kvm_debugregs
)))
3221 case KVM_SET_DEBUGREGS
: {
3222 struct kvm_debugregs dbgregs
;
3225 if (copy_from_user(&dbgregs
, argp
,
3226 sizeof(struct kvm_debugregs
)))
3229 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3232 case KVM_GET_XSAVE
: {
3233 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3238 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3241 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3246 case KVM_SET_XSAVE
: {
3247 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3248 if (IS_ERR(u
.xsave
))
3249 return PTR_ERR(u
.xsave
);
3251 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3254 case KVM_GET_XCRS
: {
3255 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3260 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3263 if (copy_to_user(argp
, u
.xcrs
,
3264 sizeof(struct kvm_xcrs
)))
3269 case KVM_SET_XCRS
: {
3270 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3272 return PTR_ERR(u
.xcrs
);
3274 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3277 case KVM_SET_TSC_KHZ
: {
3281 user_tsc_khz
= (u32
)arg
;
3283 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3286 if (user_tsc_khz
== 0)
3287 user_tsc_khz
= tsc_khz
;
3289 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3294 case KVM_GET_TSC_KHZ
: {
3295 r
= vcpu
->arch
.virtual_tsc_khz
;
3298 case KVM_KVMCLOCK_CTRL
: {
3299 r
= kvm_set_guest_paused(vcpu
);
3310 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3312 return VM_FAULT_SIGBUS
;
3315 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3319 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3321 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3325 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3328 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3332 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3333 u32 kvm_nr_mmu_pages
)
3335 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3338 mutex_lock(&kvm
->slots_lock
);
3340 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3341 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3343 mutex_unlock(&kvm
->slots_lock
);
3347 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3349 return kvm
->arch
.n_max_mmu_pages
;
3352 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3357 switch (chip
->chip_id
) {
3358 case KVM_IRQCHIP_PIC_MASTER
:
3359 memcpy(&chip
->chip
.pic
,
3360 &pic_irqchip(kvm
)->pics
[0],
3361 sizeof(struct kvm_pic_state
));
3363 case KVM_IRQCHIP_PIC_SLAVE
:
3364 memcpy(&chip
->chip
.pic
,
3365 &pic_irqchip(kvm
)->pics
[1],
3366 sizeof(struct kvm_pic_state
));
3368 case KVM_IRQCHIP_IOAPIC
:
3369 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3378 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3383 switch (chip
->chip_id
) {
3384 case KVM_IRQCHIP_PIC_MASTER
:
3385 spin_lock(&pic_irqchip(kvm
)->lock
);
3386 memcpy(&pic_irqchip(kvm
)->pics
[0],
3388 sizeof(struct kvm_pic_state
));
3389 spin_unlock(&pic_irqchip(kvm
)->lock
);
3391 case KVM_IRQCHIP_PIC_SLAVE
:
3392 spin_lock(&pic_irqchip(kvm
)->lock
);
3393 memcpy(&pic_irqchip(kvm
)->pics
[1],
3395 sizeof(struct kvm_pic_state
));
3396 spin_unlock(&pic_irqchip(kvm
)->lock
);
3398 case KVM_IRQCHIP_IOAPIC
:
3399 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3405 kvm_pic_update_irq(pic_irqchip(kvm
));
3409 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3413 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3414 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3415 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3419 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3423 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3424 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3425 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3426 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3430 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3434 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3435 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3436 sizeof(ps
->channels
));
3437 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3438 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3439 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3443 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3445 int r
= 0, start
= 0;
3446 u32 prev_legacy
, cur_legacy
;
3447 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3448 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3449 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3450 if (!prev_legacy
&& cur_legacy
)
3452 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3453 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3454 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3455 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3456 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3460 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3461 struct kvm_reinject_control
*control
)
3463 if (!kvm
->arch
.vpit
)
3465 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3466 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3467 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3472 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3473 * @kvm: kvm instance
3474 * @log: slot id and address to which we copy the log
3476 * We need to keep it in mind that VCPU threads can write to the bitmap
3477 * concurrently. So, to avoid losing data, we keep the following order for
3480 * 1. Take a snapshot of the bit and clear it if needed.
3481 * 2. Write protect the corresponding page.
3482 * 3. Flush TLB's if needed.
3483 * 4. Copy the snapshot to the userspace.
3485 * Between 2 and 3, the guest may write to the page using the remaining TLB
3486 * entry. This is not a problem because the page will be reported dirty at
3487 * step 4 using the snapshot taken before and step 3 ensures that successive
3488 * writes will be logged for the next call.
3490 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3493 struct kvm_memory_slot
*memslot
;
3495 unsigned long *dirty_bitmap
;
3496 unsigned long *dirty_bitmap_buffer
;
3497 bool is_dirty
= false;
3499 mutex_lock(&kvm
->slots_lock
);
3502 if (log
->slot
>= KVM_USER_MEM_SLOTS
)
3505 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3507 dirty_bitmap
= memslot
->dirty_bitmap
;
3512 n
= kvm_dirty_bitmap_bytes(memslot
);
3514 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3515 memset(dirty_bitmap_buffer
, 0, n
);
3517 spin_lock(&kvm
->mmu_lock
);
3519 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3523 if (!dirty_bitmap
[i
])
3528 mask
= xchg(&dirty_bitmap
[i
], 0);
3529 dirty_bitmap_buffer
[i
] = mask
;
3531 offset
= i
* BITS_PER_LONG
;
3532 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3535 kvm_flush_remote_tlbs(kvm
);
3537 spin_unlock(&kvm
->mmu_lock
);
3540 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3545 mutex_unlock(&kvm
->slots_lock
);
3549 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3552 if (!irqchip_in_kernel(kvm
))
3555 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3556 irq_event
->irq
, irq_event
->level
,
3561 long kvm_arch_vm_ioctl(struct file
*filp
,
3562 unsigned int ioctl
, unsigned long arg
)
3564 struct kvm
*kvm
= filp
->private_data
;
3565 void __user
*argp
= (void __user
*)arg
;
3568 * This union makes it completely explicit to gcc-3.x
3569 * that these two variables' stack usage should be
3570 * combined, not added together.
3573 struct kvm_pit_state ps
;
3574 struct kvm_pit_state2 ps2
;
3575 struct kvm_pit_config pit_config
;
3579 case KVM_SET_TSS_ADDR
:
3580 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3582 case KVM_SET_IDENTITY_MAP_ADDR
: {
3586 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3588 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3591 case KVM_SET_NR_MMU_PAGES
:
3592 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3594 case KVM_GET_NR_MMU_PAGES
:
3595 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3597 case KVM_CREATE_IRQCHIP
: {
3598 struct kvm_pic
*vpic
;
3600 mutex_lock(&kvm
->lock
);
3603 goto create_irqchip_unlock
;
3605 if (atomic_read(&kvm
->online_vcpus
))
3606 goto create_irqchip_unlock
;
3608 vpic
= kvm_create_pic(kvm
);
3610 r
= kvm_ioapic_init(kvm
);
3612 mutex_lock(&kvm
->slots_lock
);
3613 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3615 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3617 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3619 mutex_unlock(&kvm
->slots_lock
);
3621 goto create_irqchip_unlock
;
3624 goto create_irqchip_unlock
;
3626 kvm
->arch
.vpic
= vpic
;
3628 r
= kvm_setup_default_irq_routing(kvm
);
3630 mutex_lock(&kvm
->slots_lock
);
3631 mutex_lock(&kvm
->irq_lock
);
3632 kvm_ioapic_destroy(kvm
);
3633 kvm_destroy_pic(kvm
);
3634 mutex_unlock(&kvm
->irq_lock
);
3635 mutex_unlock(&kvm
->slots_lock
);
3637 create_irqchip_unlock
:
3638 mutex_unlock(&kvm
->lock
);
3641 case KVM_CREATE_PIT
:
3642 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3644 case KVM_CREATE_PIT2
:
3646 if (copy_from_user(&u
.pit_config
, argp
,
3647 sizeof(struct kvm_pit_config
)))
3650 mutex_lock(&kvm
->slots_lock
);
3653 goto create_pit_unlock
;
3655 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3659 mutex_unlock(&kvm
->slots_lock
);
3661 case KVM_GET_IRQCHIP
: {
3662 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3663 struct kvm_irqchip
*chip
;
3665 chip
= memdup_user(argp
, sizeof(*chip
));
3672 if (!irqchip_in_kernel(kvm
))
3673 goto get_irqchip_out
;
3674 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3676 goto get_irqchip_out
;
3678 if (copy_to_user(argp
, chip
, sizeof *chip
))
3679 goto get_irqchip_out
;
3685 case KVM_SET_IRQCHIP
: {
3686 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3687 struct kvm_irqchip
*chip
;
3689 chip
= memdup_user(argp
, sizeof(*chip
));
3696 if (!irqchip_in_kernel(kvm
))
3697 goto set_irqchip_out
;
3698 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3700 goto set_irqchip_out
;
3708 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3711 if (!kvm
->arch
.vpit
)
3713 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3717 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3724 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3727 if (!kvm
->arch
.vpit
)
3729 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3732 case KVM_GET_PIT2
: {
3734 if (!kvm
->arch
.vpit
)
3736 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3740 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3745 case KVM_SET_PIT2
: {
3747 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3750 if (!kvm
->arch
.vpit
)
3752 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3755 case KVM_REINJECT_CONTROL
: {
3756 struct kvm_reinject_control control
;
3758 if (copy_from_user(&control
, argp
, sizeof(control
)))
3760 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3763 case KVM_XEN_HVM_CONFIG
: {
3765 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3766 sizeof(struct kvm_xen_hvm_config
)))
3769 if (kvm
->arch
.xen_hvm_config
.flags
)
3774 case KVM_SET_CLOCK
: {
3775 struct kvm_clock_data user_ns
;
3780 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3788 local_irq_disable();
3789 now_ns
= get_kernel_ns();
3790 delta
= user_ns
.clock
- now_ns
;
3792 kvm
->arch
.kvmclock_offset
= delta
;
3795 case KVM_GET_CLOCK
: {
3796 struct kvm_clock_data user_ns
;
3799 local_irq_disable();
3800 now_ns
= get_kernel_ns();
3801 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3804 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3807 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3820 static void kvm_init_msr_list(void)
3825 /* skip the first msrs in the list. KVM-specific */
3826 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3827 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3830 msrs_to_save
[j
] = msrs_to_save
[i
];
3833 num_msrs_to_save
= j
;
3836 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3844 if (!(vcpu
->arch
.apic
&&
3845 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3846 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3857 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3864 if (!(vcpu
->arch
.apic
&&
3865 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3866 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3868 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3878 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3879 struct kvm_segment
*var
, int seg
)
3881 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3884 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3885 struct kvm_segment
*var
, int seg
)
3887 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3890 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3893 struct x86_exception exception
;
3895 BUG_ON(!mmu_is_nested(vcpu
));
3897 /* NPT walks are always user-walks */
3898 access
|= PFERR_USER_MASK
;
3899 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3904 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3905 struct x86_exception
*exception
)
3907 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3908 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3911 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3912 struct x86_exception
*exception
)
3914 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3915 access
|= PFERR_FETCH_MASK
;
3916 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3919 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3920 struct x86_exception
*exception
)
3922 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3923 access
|= PFERR_WRITE_MASK
;
3924 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3927 /* uses this to access any guest's mapped memory without checking CPL */
3928 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3929 struct x86_exception
*exception
)
3931 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3934 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3935 struct kvm_vcpu
*vcpu
, u32 access
,
3936 struct x86_exception
*exception
)
3939 int r
= X86EMUL_CONTINUE
;
3942 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3944 unsigned offset
= addr
& (PAGE_SIZE
-1);
3945 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3948 if (gpa
== UNMAPPED_GVA
)
3949 return X86EMUL_PROPAGATE_FAULT
;
3950 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3952 r
= X86EMUL_IO_NEEDED
;
3964 /* used for instruction fetching */
3965 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3966 gva_t addr
, void *val
, unsigned int bytes
,
3967 struct x86_exception
*exception
)
3969 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3970 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3972 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3973 access
| PFERR_FETCH_MASK
,
3977 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3978 gva_t addr
, void *val
, unsigned int bytes
,
3979 struct x86_exception
*exception
)
3981 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3982 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3984 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3987 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
3989 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3990 gva_t addr
, void *val
, unsigned int bytes
,
3991 struct x86_exception
*exception
)
3993 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3994 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3997 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3998 gva_t addr
, void *val
,
4000 struct x86_exception
*exception
)
4002 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4004 int r
= X86EMUL_CONTINUE
;
4007 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4010 unsigned offset
= addr
& (PAGE_SIZE
-1);
4011 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4014 if (gpa
== UNMAPPED_GVA
)
4015 return X86EMUL_PROPAGATE_FAULT
;
4016 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4018 r
= X86EMUL_IO_NEEDED
;
4029 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4031 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4032 gpa_t
*gpa
, struct x86_exception
*exception
,
4035 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4036 | (write
? PFERR_WRITE_MASK
: 0);
4038 if (vcpu_match_mmio_gva(vcpu
, gva
)
4039 && !permission_fault(vcpu
->arch
.walk_mmu
, vcpu
->arch
.access
, access
)) {
4040 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4041 (gva
& (PAGE_SIZE
- 1));
4042 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4046 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4048 if (*gpa
== UNMAPPED_GVA
)
4051 /* For APIC access vmexit */
4052 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4055 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4056 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4063 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4064 const void *val
, int bytes
)
4068 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4071 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4075 struct read_write_emulator_ops
{
4076 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4078 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4079 void *val
, int bytes
);
4080 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4081 int bytes
, void *val
);
4082 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4083 void *val
, int bytes
);
4087 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4089 if (vcpu
->mmio_read_completed
) {
4090 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4091 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4092 vcpu
->mmio_read_completed
= 0;
4099 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4100 void *val
, int bytes
)
4102 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4105 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4106 void *val
, int bytes
)
4108 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4111 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4113 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4114 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4117 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4118 void *val
, int bytes
)
4120 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4121 return X86EMUL_IO_NEEDED
;
4124 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4125 void *val
, int bytes
)
4127 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4129 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4130 return X86EMUL_CONTINUE
;
4133 static const struct read_write_emulator_ops read_emultor
= {
4134 .read_write_prepare
= read_prepare
,
4135 .read_write_emulate
= read_emulate
,
4136 .read_write_mmio
= vcpu_mmio_read
,
4137 .read_write_exit_mmio
= read_exit_mmio
,
4140 static const struct read_write_emulator_ops write_emultor
= {
4141 .read_write_emulate
= write_emulate
,
4142 .read_write_mmio
= write_mmio
,
4143 .read_write_exit_mmio
= write_exit_mmio
,
4147 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4149 struct x86_exception
*exception
,
4150 struct kvm_vcpu
*vcpu
,
4151 const struct read_write_emulator_ops
*ops
)
4155 bool write
= ops
->write
;
4156 struct kvm_mmio_fragment
*frag
;
4158 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4161 return X86EMUL_PROPAGATE_FAULT
;
4163 /* For APIC access vmexit */
4167 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4168 return X86EMUL_CONTINUE
;
4172 * Is this MMIO handled locally?
4174 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4175 if (handled
== bytes
)
4176 return X86EMUL_CONTINUE
;
4182 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4183 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4187 return X86EMUL_CONTINUE
;
4190 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4191 void *val
, unsigned int bytes
,
4192 struct x86_exception
*exception
,
4193 const struct read_write_emulator_ops
*ops
)
4195 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4199 if (ops
->read_write_prepare
&&
4200 ops
->read_write_prepare(vcpu
, val
, bytes
))
4201 return X86EMUL_CONTINUE
;
4203 vcpu
->mmio_nr_fragments
= 0;
4205 /* Crossing a page boundary? */
4206 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4209 now
= -addr
& ~PAGE_MASK
;
4210 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4213 if (rc
!= X86EMUL_CONTINUE
)
4220 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4222 if (rc
!= X86EMUL_CONTINUE
)
4225 if (!vcpu
->mmio_nr_fragments
)
4228 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4230 vcpu
->mmio_needed
= 1;
4231 vcpu
->mmio_cur_fragment
= 0;
4233 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4234 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4235 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4236 vcpu
->run
->mmio
.phys_addr
= gpa
;
4238 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4241 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4245 struct x86_exception
*exception
)
4247 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4248 exception
, &read_emultor
);
4251 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4255 struct x86_exception
*exception
)
4257 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4258 exception
, &write_emultor
);
4261 #define CMPXCHG_TYPE(t, ptr, old, new) \
4262 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4264 #ifdef CONFIG_X86_64
4265 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4267 # define CMPXCHG64(ptr, old, new) \
4268 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4271 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4276 struct x86_exception
*exception
)
4278 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4284 /* guests cmpxchg8b have to be emulated atomically */
4285 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4288 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4290 if (gpa
== UNMAPPED_GVA
||
4291 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4294 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4297 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4298 if (is_error_page(page
))
4301 kaddr
= kmap_atomic(page
);
4302 kaddr
+= offset_in_page(gpa
);
4305 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4308 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4311 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4314 exchanged
= CMPXCHG64(kaddr
, old
, new);
4319 kunmap_atomic(kaddr
);
4320 kvm_release_page_dirty(page
);
4323 return X86EMUL_CMPXCHG_FAILED
;
4325 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4327 return X86EMUL_CONTINUE
;
4330 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4332 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4335 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4337 /* TODO: String I/O for in kernel device */
4340 if (vcpu
->arch
.pio
.in
)
4341 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4342 vcpu
->arch
.pio
.size
, pd
);
4344 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4345 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4350 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4351 unsigned short port
, void *val
,
4352 unsigned int count
, bool in
)
4354 trace_kvm_pio(!in
, port
, size
, count
);
4356 vcpu
->arch
.pio
.port
= port
;
4357 vcpu
->arch
.pio
.in
= in
;
4358 vcpu
->arch
.pio
.count
= count
;
4359 vcpu
->arch
.pio
.size
= size
;
4361 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4362 vcpu
->arch
.pio
.count
= 0;
4366 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4367 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4368 vcpu
->run
->io
.size
= size
;
4369 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4370 vcpu
->run
->io
.count
= count
;
4371 vcpu
->run
->io
.port
= port
;
4376 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4377 int size
, unsigned short port
, void *val
,
4380 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4383 if (vcpu
->arch
.pio
.count
)
4386 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4389 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4390 vcpu
->arch
.pio
.count
= 0;
4397 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4398 int size
, unsigned short port
,
4399 const void *val
, unsigned int count
)
4401 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4403 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4404 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4407 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4409 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4412 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4414 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4417 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4419 if (!need_emulate_wbinvd(vcpu
))
4420 return X86EMUL_CONTINUE
;
4422 if (kvm_x86_ops
->has_wbinvd_exit()) {
4423 int cpu
= get_cpu();
4425 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4426 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4427 wbinvd_ipi
, NULL
, 1);
4429 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4432 return X86EMUL_CONTINUE
;
4434 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4436 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4438 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4441 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4443 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4446 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4449 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4452 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4454 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4457 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4459 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4460 unsigned long value
;
4464 value
= kvm_read_cr0(vcpu
);
4467 value
= vcpu
->arch
.cr2
;
4470 value
= kvm_read_cr3(vcpu
);
4473 value
= kvm_read_cr4(vcpu
);
4476 value
= kvm_get_cr8(vcpu
);
4479 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4486 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4488 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4493 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4496 vcpu
->arch
.cr2
= val
;
4499 res
= kvm_set_cr3(vcpu
, val
);
4502 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4505 res
= kvm_set_cr8(vcpu
, val
);
4508 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4515 static void emulator_set_rflags(struct x86_emulate_ctxt
*ctxt
, ulong val
)
4517 kvm_set_rflags(emul_to_vcpu(ctxt
), val
);
4520 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4522 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4525 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4527 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4530 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4532 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4535 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4537 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4540 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4542 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4545 static unsigned long emulator_get_cached_segment_base(
4546 struct x86_emulate_ctxt
*ctxt
, int seg
)
4548 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4551 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4552 struct desc_struct
*desc
, u32
*base3
,
4555 struct kvm_segment var
;
4557 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4558 *selector
= var
.selector
;
4561 memset(desc
, 0, sizeof(*desc
));
4567 set_desc_limit(desc
, var
.limit
);
4568 set_desc_base(desc
, (unsigned long)var
.base
);
4569 #ifdef CONFIG_X86_64
4571 *base3
= var
.base
>> 32;
4573 desc
->type
= var
.type
;
4575 desc
->dpl
= var
.dpl
;
4576 desc
->p
= var
.present
;
4577 desc
->avl
= var
.avl
;
4585 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4586 struct desc_struct
*desc
, u32 base3
,
4589 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4590 struct kvm_segment var
;
4592 var
.selector
= selector
;
4593 var
.base
= get_desc_base(desc
);
4594 #ifdef CONFIG_X86_64
4595 var
.base
|= ((u64
)base3
) << 32;
4597 var
.limit
= get_desc_limit(desc
);
4599 var
.limit
= (var
.limit
<< 12) | 0xfff;
4600 var
.type
= desc
->type
;
4601 var
.present
= desc
->p
;
4602 var
.dpl
= desc
->dpl
;
4607 var
.avl
= desc
->avl
;
4608 var
.present
= desc
->p
;
4609 var
.unusable
= !var
.present
;
4612 kvm_set_segment(vcpu
, &var
, seg
);
4616 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4617 u32 msr_index
, u64
*pdata
)
4619 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4622 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4623 u32 msr_index
, u64 data
)
4625 struct msr_data msr
;
4628 msr
.index
= msr_index
;
4629 msr
.host_initiated
= false;
4630 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4633 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4634 u32 pmc
, u64
*pdata
)
4636 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4639 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4641 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4644 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4647 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4649 * CR0.TS may reference the host fpu state, not the guest fpu state,
4650 * so it may be clear at this point.
4655 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4660 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4661 struct x86_instruction_info
*info
,
4662 enum x86_intercept_stage stage
)
4664 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4667 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4668 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4670 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4673 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4675 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4678 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4680 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4683 static const struct x86_emulate_ops emulate_ops
= {
4684 .read_gpr
= emulator_read_gpr
,
4685 .write_gpr
= emulator_write_gpr
,
4686 .read_std
= kvm_read_guest_virt_system
,
4687 .write_std
= kvm_write_guest_virt_system
,
4688 .fetch
= kvm_fetch_guest_virt
,
4689 .read_emulated
= emulator_read_emulated
,
4690 .write_emulated
= emulator_write_emulated
,
4691 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4692 .invlpg
= emulator_invlpg
,
4693 .pio_in_emulated
= emulator_pio_in_emulated
,
4694 .pio_out_emulated
= emulator_pio_out_emulated
,
4695 .get_segment
= emulator_get_segment
,
4696 .set_segment
= emulator_set_segment
,
4697 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4698 .get_gdt
= emulator_get_gdt
,
4699 .get_idt
= emulator_get_idt
,
4700 .set_gdt
= emulator_set_gdt
,
4701 .set_idt
= emulator_set_idt
,
4702 .get_cr
= emulator_get_cr
,
4703 .set_cr
= emulator_set_cr
,
4704 .set_rflags
= emulator_set_rflags
,
4705 .cpl
= emulator_get_cpl
,
4706 .get_dr
= emulator_get_dr
,
4707 .set_dr
= emulator_set_dr
,
4708 .set_msr
= emulator_set_msr
,
4709 .get_msr
= emulator_get_msr
,
4710 .read_pmc
= emulator_read_pmc
,
4711 .halt
= emulator_halt
,
4712 .wbinvd
= emulator_wbinvd
,
4713 .fix_hypercall
= emulator_fix_hypercall
,
4714 .get_fpu
= emulator_get_fpu
,
4715 .put_fpu
= emulator_put_fpu
,
4716 .intercept
= emulator_intercept
,
4717 .get_cpuid
= emulator_get_cpuid
,
4720 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4722 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4724 * an sti; sti; sequence only disable interrupts for the first
4725 * instruction. So, if the last instruction, be it emulated or
4726 * not, left the system with the INT_STI flag enabled, it
4727 * means that the last instruction is an sti. We should not
4728 * leave the flag on in this case. The same goes for mov ss
4730 if (!(int_shadow
& mask
))
4731 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4734 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4736 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4737 if (ctxt
->exception
.vector
== PF_VECTOR
)
4738 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4739 else if (ctxt
->exception
.error_code_valid
)
4740 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4741 ctxt
->exception
.error_code
);
4743 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4746 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
)
4748 memset(&ctxt
->twobyte
, 0,
4749 (void *)&ctxt
->_regs
- (void *)&ctxt
->twobyte
);
4751 ctxt
->fetch
.start
= 0;
4752 ctxt
->fetch
.end
= 0;
4753 ctxt
->io_read
.pos
= 0;
4754 ctxt
->io_read
.end
= 0;
4755 ctxt
->mem_read
.pos
= 0;
4756 ctxt
->mem_read
.end
= 0;
4759 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4761 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4764 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4766 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4767 ctxt
->eip
= kvm_rip_read(vcpu
);
4768 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4769 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4770 cs_l
? X86EMUL_MODE_PROT64
:
4771 cs_db
? X86EMUL_MODE_PROT32
:
4772 X86EMUL_MODE_PROT16
;
4773 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4775 init_decode_cache(ctxt
);
4776 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4779 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4781 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4784 init_emulate_ctxt(vcpu
);
4788 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4789 ret
= emulate_int_real(ctxt
, irq
);
4791 if (ret
!= X86EMUL_CONTINUE
)
4792 return EMULATE_FAIL
;
4794 ctxt
->eip
= ctxt
->_eip
;
4795 kvm_rip_write(vcpu
, ctxt
->eip
);
4796 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4798 if (irq
== NMI_VECTOR
)
4799 vcpu
->arch
.nmi_pending
= 0;
4801 vcpu
->arch
.interrupt
.pending
= false;
4803 return EMULATE_DONE
;
4805 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4807 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4809 int r
= EMULATE_DONE
;
4811 ++vcpu
->stat
.insn_emulation_fail
;
4812 trace_kvm_emulate_insn_failed(vcpu
);
4813 if (!is_guest_mode(vcpu
)) {
4814 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4815 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4816 vcpu
->run
->internal
.ndata
= 0;
4819 kvm_queue_exception(vcpu
, UD_VECTOR
);
4824 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
4825 bool write_fault_to_shadow_pgtable
,
4831 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
4834 if (!vcpu
->arch
.mmu
.direct_map
) {
4836 * Write permission should be allowed since only
4837 * write access need to be emulated.
4839 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4842 * If the mapping is invalid in guest, let cpu retry
4843 * it to generate fault.
4845 if (gpa
== UNMAPPED_GVA
)
4850 * Do not retry the unhandleable instruction if it faults on the
4851 * readonly host memory, otherwise it will goto a infinite loop:
4852 * retry instruction -> write #PF -> emulation fail -> retry
4853 * instruction -> ...
4855 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
4858 * If the instruction failed on the error pfn, it can not be fixed,
4859 * report the error to userspace.
4861 if (is_error_noslot_pfn(pfn
))
4864 kvm_release_pfn_clean(pfn
);
4866 /* The instructions are well-emulated on direct mmu. */
4867 if (vcpu
->arch
.mmu
.direct_map
) {
4868 unsigned int indirect_shadow_pages
;
4870 spin_lock(&vcpu
->kvm
->mmu_lock
);
4871 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
4872 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4874 if (indirect_shadow_pages
)
4875 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4881 * if emulation was due to access to shadowed page table
4882 * and it failed try to unshadow page and re-enter the
4883 * guest to let CPU execute the instruction.
4885 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4888 * If the access faults on its page table, it can not
4889 * be fixed by unprotecting shadow page and it should
4890 * be reported to userspace.
4892 return !write_fault_to_shadow_pgtable
;
4895 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
4896 unsigned long cr2
, int emulation_type
)
4898 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4899 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
4901 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
4902 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
4905 * If the emulation is caused by #PF and it is non-page_table
4906 * writing instruction, it means the VM-EXIT is caused by shadow
4907 * page protected, we can zap the shadow page and retry this
4908 * instruction directly.
4910 * Note: if the guest uses a non-page-table modifying instruction
4911 * on the PDE that points to the instruction, then we will unmap
4912 * the instruction and go to an infinite loop. So, we cache the
4913 * last retried eip and the last fault address, if we meet the eip
4914 * and the address again, we can break out of the potential infinite
4917 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
4919 if (!(emulation_type
& EMULTYPE_RETRY
))
4922 if (x86_page_table_writing_insn(ctxt
))
4925 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
4928 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
4929 vcpu
->arch
.last_retry_addr
= cr2
;
4931 if (!vcpu
->arch
.mmu
.direct_map
)
4932 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4934 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4939 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
4940 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
4942 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
4949 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4950 bool writeback
= true;
4951 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
4954 * Clear write_fault_to_shadow_pgtable here to ensure it is
4957 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
4958 kvm_clear_exception_queue(vcpu
);
4960 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4961 init_emulate_ctxt(vcpu
);
4962 ctxt
->interruptibility
= 0;
4963 ctxt
->have_exception
= false;
4964 ctxt
->perm_ok
= false;
4966 ctxt
->only_vendor_specific_insn
4967 = emulation_type
& EMULTYPE_TRAP_UD
;
4969 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
4971 trace_kvm_emulate_insn_start(vcpu
);
4972 ++vcpu
->stat
.insn_emulation
;
4973 if (r
!= EMULATION_OK
) {
4974 if (emulation_type
& EMULTYPE_TRAP_UD
)
4975 return EMULATE_FAIL
;
4976 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
4978 return EMULATE_DONE
;
4979 if (emulation_type
& EMULTYPE_SKIP
)
4980 return EMULATE_FAIL
;
4981 return handle_emulation_failure(vcpu
);
4985 if (emulation_type
& EMULTYPE_SKIP
) {
4986 kvm_rip_write(vcpu
, ctxt
->_eip
);
4987 return EMULATE_DONE
;
4990 if (retry_instruction(ctxt
, cr2
, emulation_type
))
4991 return EMULATE_DONE
;
4993 /* this is needed for vmware backdoor interface to work since it
4994 changes registers values during IO operation */
4995 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
4996 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4997 emulator_invalidate_register_cache(ctxt
);
5001 r
= x86_emulate_insn(ctxt
);
5003 if (r
== EMULATION_INTERCEPTED
)
5004 return EMULATE_DONE
;
5006 if (r
== EMULATION_FAILED
) {
5007 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5009 return EMULATE_DONE
;
5011 return handle_emulation_failure(vcpu
);
5014 if (ctxt
->have_exception
) {
5015 inject_emulated_exception(vcpu
);
5017 } else if (vcpu
->arch
.pio
.count
) {
5018 if (!vcpu
->arch
.pio
.in
)
5019 vcpu
->arch
.pio
.count
= 0;
5022 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5024 r
= EMULATE_DO_MMIO
;
5025 } else if (vcpu
->mmio_needed
) {
5026 if (!vcpu
->mmio_is_write
)
5028 r
= EMULATE_DO_MMIO
;
5029 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5030 } else if (r
== EMULATION_RESTART
)
5036 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5037 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5038 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5039 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5040 kvm_rip_write(vcpu
, ctxt
->eip
);
5042 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5046 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5048 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5050 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5051 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5052 size
, port
, &val
, 1);
5053 /* do not return to emulator after return from userspace */
5054 vcpu
->arch
.pio
.count
= 0;
5057 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5059 static void tsc_bad(void *info
)
5061 __this_cpu_write(cpu_tsc_khz
, 0);
5064 static void tsc_khz_changed(void *data
)
5066 struct cpufreq_freqs
*freq
= data
;
5067 unsigned long khz
= 0;
5071 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5072 khz
= cpufreq_quick_get(raw_smp_processor_id());
5075 __this_cpu_write(cpu_tsc_khz
, khz
);
5078 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5081 struct cpufreq_freqs
*freq
= data
;
5083 struct kvm_vcpu
*vcpu
;
5084 int i
, send_ipi
= 0;
5087 * We allow guests to temporarily run on slowing clocks,
5088 * provided we notify them after, or to run on accelerating
5089 * clocks, provided we notify them before. Thus time never
5092 * However, we have a problem. We can't atomically update
5093 * the frequency of a given CPU from this function; it is
5094 * merely a notifier, which can be called from any CPU.
5095 * Changing the TSC frequency at arbitrary points in time
5096 * requires a recomputation of local variables related to
5097 * the TSC for each VCPU. We must flag these local variables
5098 * to be updated and be sure the update takes place with the
5099 * new frequency before any guests proceed.
5101 * Unfortunately, the combination of hotplug CPU and frequency
5102 * change creates an intractable locking scenario; the order
5103 * of when these callouts happen is undefined with respect to
5104 * CPU hotplug, and they can race with each other. As such,
5105 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5106 * undefined; you can actually have a CPU frequency change take
5107 * place in between the computation of X and the setting of the
5108 * variable. To protect against this problem, all updates of
5109 * the per_cpu tsc_khz variable are done in an interrupt
5110 * protected IPI, and all callers wishing to update the value
5111 * must wait for a synchronous IPI to complete (which is trivial
5112 * if the caller is on the CPU already). This establishes the
5113 * necessary total order on variable updates.
5115 * Note that because a guest time update may take place
5116 * anytime after the setting of the VCPU's request bit, the
5117 * correct TSC value must be set before the request. However,
5118 * to ensure the update actually makes it to any guest which
5119 * starts running in hardware virtualization between the set
5120 * and the acquisition of the spinlock, we must also ping the
5121 * CPU after setting the request bit.
5125 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5127 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5130 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5132 raw_spin_lock(&kvm_lock
);
5133 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5134 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5135 if (vcpu
->cpu
!= freq
->cpu
)
5137 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5138 if (vcpu
->cpu
!= smp_processor_id())
5142 raw_spin_unlock(&kvm_lock
);
5144 if (freq
->old
< freq
->new && send_ipi
) {
5146 * We upscale the frequency. Must make the guest
5147 * doesn't see old kvmclock values while running with
5148 * the new frequency, otherwise we risk the guest sees
5149 * time go backwards.
5151 * In case we update the frequency for another cpu
5152 * (which might be in guest context) send an interrupt
5153 * to kick the cpu out of guest context. Next time
5154 * guest context is entered kvmclock will be updated,
5155 * so the guest will not see stale values.
5157 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5162 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5163 .notifier_call
= kvmclock_cpufreq_notifier
5166 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5167 unsigned long action
, void *hcpu
)
5169 unsigned int cpu
= (unsigned long)hcpu
;
5173 case CPU_DOWN_FAILED
:
5174 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5176 case CPU_DOWN_PREPARE
:
5177 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5183 static struct notifier_block kvmclock_cpu_notifier_block
= {
5184 .notifier_call
= kvmclock_cpu_notifier
,
5185 .priority
= -INT_MAX
5188 static void kvm_timer_init(void)
5192 max_tsc_khz
= tsc_khz
;
5193 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5194 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5195 #ifdef CONFIG_CPU_FREQ
5196 struct cpufreq_policy policy
;
5197 memset(&policy
, 0, sizeof(policy
));
5199 cpufreq_get_policy(&policy
, cpu
);
5200 if (policy
.cpuinfo
.max_freq
)
5201 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5204 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5205 CPUFREQ_TRANSITION_NOTIFIER
);
5207 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5208 for_each_online_cpu(cpu
)
5209 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5212 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5214 int kvm_is_in_guest(void)
5216 return __this_cpu_read(current_vcpu
) != NULL
;
5219 static int kvm_is_user_mode(void)
5223 if (__this_cpu_read(current_vcpu
))
5224 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5226 return user_mode
!= 0;
5229 static unsigned long kvm_get_guest_ip(void)
5231 unsigned long ip
= 0;
5233 if (__this_cpu_read(current_vcpu
))
5234 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5239 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5240 .is_in_guest
= kvm_is_in_guest
,
5241 .is_user_mode
= kvm_is_user_mode
,
5242 .get_guest_ip
= kvm_get_guest_ip
,
5245 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5247 __this_cpu_write(current_vcpu
, vcpu
);
5249 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5251 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5253 __this_cpu_write(current_vcpu
, NULL
);
5255 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5257 static void kvm_set_mmio_spte_mask(void)
5260 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5263 * Set the reserved bits and the present bit of an paging-structure
5264 * entry to generate page fault with PFER.RSV = 1.
5266 mask
= ((1ull << (62 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
5269 #ifdef CONFIG_X86_64
5271 * If reserved bit is not supported, clear the present bit to disable
5274 if (maxphyaddr
== 52)
5278 kvm_mmu_set_mmio_spte_mask(mask
);
5281 #ifdef CONFIG_X86_64
5282 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5286 struct kvm_vcpu
*vcpu
;
5289 raw_spin_lock(&kvm_lock
);
5290 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5291 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5292 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
, &vcpu
->requests
);
5293 atomic_set(&kvm_guest_has_master_clock
, 0);
5294 raw_spin_unlock(&kvm_lock
);
5297 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5300 * Notification about pvclock gtod data update.
5302 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5305 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5306 struct timekeeper
*tk
= priv
;
5308 update_pvclock_gtod(tk
);
5310 /* disable master clock if host does not trust, or does not
5311 * use, TSC clocksource
5313 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5314 atomic_read(&kvm_guest_has_master_clock
) != 0)
5315 queue_work(system_long_wq
, &pvclock_gtod_work
);
5320 static struct notifier_block pvclock_gtod_notifier
= {
5321 .notifier_call
= pvclock_gtod_notify
,
5325 int kvm_arch_init(void *opaque
)
5328 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
5331 printk(KERN_ERR
"kvm: already loaded the other module\n");
5336 if (!ops
->cpu_has_kvm_support()) {
5337 printk(KERN_ERR
"kvm: no hardware support\n");
5341 if (ops
->disabled_by_bios()) {
5342 printk(KERN_ERR
"kvm: disabled by bios\n");
5348 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5350 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5354 r
= kvm_mmu_module_init();
5356 goto out_free_percpu
;
5358 kvm_set_mmio_spte_mask();
5359 kvm_init_msr_list();
5362 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5363 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5367 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5370 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5373 #ifdef CONFIG_X86_64
5374 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5380 free_percpu(shared_msrs
);
5385 void kvm_arch_exit(void)
5387 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5389 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5390 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5391 CPUFREQ_TRANSITION_NOTIFIER
);
5392 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5393 #ifdef CONFIG_X86_64
5394 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5397 kvm_mmu_module_exit();
5398 free_percpu(shared_msrs
);
5401 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5403 ++vcpu
->stat
.halt_exits
;
5404 if (irqchip_in_kernel(vcpu
->kvm
)) {
5405 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5408 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5412 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5414 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5416 u64 param
, ingpa
, outgpa
, ret
;
5417 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5418 bool fast
, longmode
;
5422 * hypercall generates UD from non zero cpl and real mode
5425 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5426 kvm_queue_exception(vcpu
, UD_VECTOR
);
5430 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5431 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
5434 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5435 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5436 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5437 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5438 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5439 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5441 #ifdef CONFIG_X86_64
5443 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5444 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5445 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5449 code
= param
& 0xffff;
5450 fast
= (param
>> 16) & 0x1;
5451 rep_cnt
= (param
>> 32) & 0xfff;
5452 rep_idx
= (param
>> 48) & 0xfff;
5454 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5457 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5458 kvm_vcpu_on_spin(vcpu
);
5461 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5465 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5467 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5469 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5470 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5476 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5478 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5481 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5482 return kvm_hv_hypercall(vcpu
);
5484 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5485 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5486 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5487 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5488 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5490 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5492 if (!is_long_mode(vcpu
)) {
5500 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5506 case KVM_HC_VAPIC_POLL_IRQ
:
5514 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5515 ++vcpu
->stat
.hypercalls
;
5518 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5520 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5522 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5523 char instruction
[3];
5524 unsigned long rip
= kvm_rip_read(vcpu
);
5526 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5528 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5532 * Check if userspace requested an interrupt window, and that the
5533 * interrupt window is open.
5535 * No need to exit to userspace if we already have an interrupt queued.
5537 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5539 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5540 vcpu
->run
->request_interrupt_window
&&
5541 kvm_arch_interrupt_allowed(vcpu
));
5544 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5546 struct kvm_run
*kvm_run
= vcpu
->run
;
5548 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5549 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5550 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5551 if (irqchip_in_kernel(vcpu
->kvm
))
5552 kvm_run
->ready_for_interrupt_injection
= 1;
5554 kvm_run
->ready_for_interrupt_injection
=
5555 kvm_arch_interrupt_allowed(vcpu
) &&
5556 !kvm_cpu_has_interrupt(vcpu
) &&
5557 !kvm_event_needs_reinjection(vcpu
);
5560 static int vapic_enter(struct kvm_vcpu
*vcpu
)
5562 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5565 if (!apic
|| !apic
->vapic_addr
)
5568 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5569 if (is_error_page(page
))
5572 vcpu
->arch
.apic
->vapic_page
= page
;
5576 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5578 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5581 if (!apic
|| !apic
->vapic_addr
)
5584 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5585 kvm_release_page_dirty(apic
->vapic_page
);
5586 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5587 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5590 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5594 if (!kvm_x86_ops
->update_cr8_intercept
)
5597 if (!vcpu
->arch
.apic
)
5600 if (!vcpu
->arch
.apic
->vapic_addr
)
5601 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5608 tpr
= kvm_lapic_get_cr8(vcpu
);
5610 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5613 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5615 /* try to reinject previous events if any */
5616 if (vcpu
->arch
.exception
.pending
) {
5617 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5618 vcpu
->arch
.exception
.has_error_code
,
5619 vcpu
->arch
.exception
.error_code
);
5620 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5621 vcpu
->arch
.exception
.has_error_code
,
5622 vcpu
->arch
.exception
.error_code
,
5623 vcpu
->arch
.exception
.reinject
);
5627 if (vcpu
->arch
.nmi_injected
) {
5628 kvm_x86_ops
->set_nmi(vcpu
);
5632 if (vcpu
->arch
.interrupt
.pending
) {
5633 kvm_x86_ops
->set_irq(vcpu
);
5637 /* try to inject new event if pending */
5638 if (vcpu
->arch
.nmi_pending
) {
5639 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5640 --vcpu
->arch
.nmi_pending
;
5641 vcpu
->arch
.nmi_injected
= true;
5642 kvm_x86_ops
->set_nmi(vcpu
);
5644 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5645 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5646 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5648 kvm_x86_ops
->set_irq(vcpu
);
5653 static void process_nmi(struct kvm_vcpu
*vcpu
)
5658 * x86 is limited to one NMI running, and one NMI pending after it.
5659 * If an NMI is already in progress, limit further NMIs to just one.
5660 * Otherwise, allow two (and we'll inject the first one immediately).
5662 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5665 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5666 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5667 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5670 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
5672 #ifdef CONFIG_X86_64
5674 struct kvm_vcpu
*vcpu
;
5675 struct kvm_arch
*ka
= &kvm
->arch
;
5677 spin_lock(&ka
->pvclock_gtod_sync_lock
);
5678 kvm_make_mclock_inprogress_request(kvm
);
5679 /* no guest entries from this point */
5680 pvclock_update_vm_gtod_copy(kvm
);
5682 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5683 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
5685 /* guest entries allowed */
5686 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5687 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
5689 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
5693 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
5695 u64 eoi_exit_bitmap
[4];
5698 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
5701 memset(eoi_exit_bitmap
, 0, 32);
5704 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
5705 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
5706 kvm_apic_update_tmr(vcpu
, tmr
);
5709 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5712 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5713 vcpu
->run
->request_interrupt_window
;
5714 bool req_immediate_exit
= false;
5716 if (vcpu
->requests
) {
5717 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5718 kvm_mmu_unload(vcpu
);
5719 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5720 __kvm_migrate_timers(vcpu
);
5721 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
5722 kvm_gen_update_masterclock(vcpu
->kvm
);
5723 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
5724 kvm_gen_kvmclock_update(vcpu
);
5725 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5726 r
= kvm_guest_time_update(vcpu
);
5730 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5731 kvm_mmu_sync_roots(vcpu
);
5732 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5733 kvm_x86_ops
->tlb_flush(vcpu
);
5734 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5735 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5739 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5740 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5744 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5745 vcpu
->fpu_active
= 0;
5746 kvm_x86_ops
->fpu_deactivate(vcpu
);
5748 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5749 /* Page is swapped out. Do synthetic halt */
5750 vcpu
->arch
.apf
.halted
= true;
5754 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
5755 record_steal_time(vcpu
);
5756 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
5758 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
5759 kvm_handle_pmu_event(vcpu
);
5760 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
5761 kvm_deliver_pmi(vcpu
);
5762 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
5763 vcpu_scan_ioapic(vcpu
);
5766 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5767 kvm_apic_accept_events(vcpu
);
5768 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
5773 inject_pending_event(vcpu
);
5775 /* enable NMI/IRQ window open exits if needed */
5776 if (vcpu
->arch
.nmi_pending
)
5777 req_immediate_exit
=
5778 kvm_x86_ops
->enable_nmi_window(vcpu
) != 0;
5779 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
5780 req_immediate_exit
=
5781 kvm_x86_ops
->enable_irq_window(vcpu
) != 0;
5783 if (kvm_lapic_enabled(vcpu
)) {
5785 * Update architecture specific hints for APIC
5786 * virtual interrupt delivery.
5788 if (kvm_x86_ops
->hwapic_irr_update
)
5789 kvm_x86_ops
->hwapic_irr_update(vcpu
,
5790 kvm_lapic_find_highest_irr(vcpu
));
5791 update_cr8_intercept(vcpu
);
5792 kvm_lapic_sync_to_vapic(vcpu
);
5796 r
= kvm_mmu_reload(vcpu
);
5798 goto cancel_injection
;
5803 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5804 if (vcpu
->fpu_active
)
5805 kvm_load_guest_fpu(vcpu
);
5806 kvm_load_guest_xcr0(vcpu
);
5808 vcpu
->mode
= IN_GUEST_MODE
;
5810 /* We should set ->mode before check ->requests,
5811 * see the comment in make_all_cpus_request.
5815 local_irq_disable();
5817 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5818 || need_resched() || signal_pending(current
)) {
5819 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5824 goto cancel_injection
;
5827 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5829 if (req_immediate_exit
)
5830 smp_send_reschedule(vcpu
->cpu
);
5834 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5836 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5837 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5838 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5839 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5842 trace_kvm_entry(vcpu
->vcpu_id
);
5843 kvm_x86_ops
->run(vcpu
);
5846 * If the guest has used debug registers, at least dr7
5847 * will be disabled while returning to the host.
5848 * If we don't have active breakpoints in the host, we don't
5849 * care about the messed up debug address registers. But if
5850 * we have some of them active, restore the old state.
5852 if (hw_breakpoint_active())
5853 hw_breakpoint_restore();
5855 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
5858 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5861 /* Interrupt is enabled by handle_external_intr() */
5862 kvm_x86_ops
->handle_external_intr(vcpu
);
5867 * We must have an instruction between local_irq_enable() and
5868 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5869 * the interrupt shadow. The stat.exits increment will do nicely.
5870 * But we need to prevent reordering, hence this barrier():
5878 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5881 * Profile KVM exit RIPs:
5883 if (unlikely(prof_on
== KVM_PROFILING
)) {
5884 unsigned long rip
= kvm_rip_read(vcpu
);
5885 profile_hit(KVM_PROFILING
, (void *)rip
);
5888 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
5889 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5891 if (vcpu
->arch
.apic_attention
)
5892 kvm_lapic_sync_from_vapic(vcpu
);
5894 r
= kvm_x86_ops
->handle_exit(vcpu
);
5898 kvm_x86_ops
->cancel_injection(vcpu
);
5899 if (unlikely(vcpu
->arch
.apic_attention
))
5900 kvm_lapic_sync_from_vapic(vcpu
);
5906 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5909 struct kvm
*kvm
= vcpu
->kvm
;
5911 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5912 r
= vapic_enter(vcpu
);
5914 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5920 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5921 !vcpu
->arch
.apf
.halted
)
5922 r
= vcpu_enter_guest(vcpu
);
5924 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5925 kvm_vcpu_block(vcpu
);
5926 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5927 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
)) {
5928 kvm_apic_accept_events(vcpu
);
5929 switch(vcpu
->arch
.mp_state
) {
5930 case KVM_MP_STATE_HALTED
:
5931 vcpu
->arch
.mp_state
=
5932 KVM_MP_STATE_RUNNABLE
;
5933 case KVM_MP_STATE_RUNNABLE
:
5934 vcpu
->arch
.apf
.halted
= false;
5936 case KVM_MP_STATE_INIT_RECEIVED
:
5948 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5949 if (kvm_cpu_has_pending_timer(vcpu
))
5950 kvm_inject_pending_timer_irqs(vcpu
);
5952 if (dm_request_for_irq_injection(vcpu
)) {
5954 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5955 ++vcpu
->stat
.request_irq_exits
;
5958 kvm_check_async_pf_completion(vcpu
);
5960 if (signal_pending(current
)) {
5962 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5963 ++vcpu
->stat
.signal_exits
;
5965 if (need_resched()) {
5966 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5968 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5972 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5979 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
5982 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5983 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
5984 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5985 if (r
!= EMULATE_DONE
)
5990 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
5992 BUG_ON(!vcpu
->arch
.pio
.count
);
5994 return complete_emulated_io(vcpu
);
5998 * Implements the following, as a state machine:
6002 * for each mmio piece in the fragment
6010 * for each mmio piece in the fragment
6015 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6017 struct kvm_run
*run
= vcpu
->run
;
6018 struct kvm_mmio_fragment
*frag
;
6021 BUG_ON(!vcpu
->mmio_needed
);
6023 /* Complete previous fragment */
6024 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6025 len
= min(8u, frag
->len
);
6026 if (!vcpu
->mmio_is_write
)
6027 memcpy(frag
->data
, run
->mmio
.data
, len
);
6029 if (frag
->len
<= 8) {
6030 /* Switch to the next fragment. */
6032 vcpu
->mmio_cur_fragment
++;
6034 /* Go forward to the next mmio piece. */
6040 if (vcpu
->mmio_cur_fragment
== vcpu
->mmio_nr_fragments
) {
6041 vcpu
->mmio_needed
= 0;
6042 if (vcpu
->mmio_is_write
)
6044 vcpu
->mmio_read_completed
= 1;
6045 return complete_emulated_io(vcpu
);
6048 run
->exit_reason
= KVM_EXIT_MMIO
;
6049 run
->mmio
.phys_addr
= frag
->gpa
;
6050 if (vcpu
->mmio_is_write
)
6051 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6052 run
->mmio
.len
= min(8u, frag
->len
);
6053 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6054 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6059 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6064 if (!tsk_used_math(current
) && init_fpu(current
))
6067 if (vcpu
->sigset_active
)
6068 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6070 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6071 kvm_vcpu_block(vcpu
);
6072 kvm_apic_accept_events(vcpu
);
6073 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6078 /* re-sync apic's tpr */
6079 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6080 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6086 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6087 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6088 vcpu
->arch
.complete_userspace_io
= NULL
;
6093 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6095 r
= __vcpu_run(vcpu
);
6098 post_kvm_run_save(vcpu
);
6099 if (vcpu
->sigset_active
)
6100 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6105 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6107 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6109 * We are here if userspace calls get_regs() in the middle of
6110 * instruction emulation. Registers state needs to be copied
6111 * back from emulation context to vcpu. Userspace shouldn't do
6112 * that usually, but some bad designed PV devices (vmware
6113 * backdoor interface) need this to work
6115 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6116 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6118 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6119 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6120 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6121 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6122 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6123 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6124 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6125 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6126 #ifdef CONFIG_X86_64
6127 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6128 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6129 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6130 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6131 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6132 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6133 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6134 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6137 regs
->rip
= kvm_rip_read(vcpu
);
6138 regs
->rflags
= kvm_get_rflags(vcpu
);
6143 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6145 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6146 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6148 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6149 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6150 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6151 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6152 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6153 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6154 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6155 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6156 #ifdef CONFIG_X86_64
6157 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6158 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6159 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6160 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6161 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6162 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6163 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6164 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6167 kvm_rip_write(vcpu
, regs
->rip
);
6168 kvm_set_rflags(vcpu
, regs
->rflags
);
6170 vcpu
->arch
.exception
.pending
= false;
6172 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6177 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6179 struct kvm_segment cs
;
6181 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6185 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6187 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6188 struct kvm_sregs
*sregs
)
6192 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6193 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6194 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6195 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6196 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6197 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6199 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6200 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6202 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6203 sregs
->idt
.limit
= dt
.size
;
6204 sregs
->idt
.base
= dt
.address
;
6205 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6206 sregs
->gdt
.limit
= dt
.size
;
6207 sregs
->gdt
.base
= dt
.address
;
6209 sregs
->cr0
= kvm_read_cr0(vcpu
);
6210 sregs
->cr2
= vcpu
->arch
.cr2
;
6211 sregs
->cr3
= kvm_read_cr3(vcpu
);
6212 sregs
->cr4
= kvm_read_cr4(vcpu
);
6213 sregs
->cr8
= kvm_get_cr8(vcpu
);
6214 sregs
->efer
= vcpu
->arch
.efer
;
6215 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6217 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6219 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6220 set_bit(vcpu
->arch
.interrupt
.nr
,
6221 (unsigned long *)sregs
->interrupt_bitmap
);
6226 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6227 struct kvm_mp_state
*mp_state
)
6229 kvm_apic_accept_events(vcpu
);
6230 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6234 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6235 struct kvm_mp_state
*mp_state
)
6237 if (!kvm_vcpu_has_lapic(vcpu
) &&
6238 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6241 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6242 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6243 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6245 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6246 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6250 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6251 int reason
, bool has_error_code
, u32 error_code
)
6253 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6256 init_emulate_ctxt(vcpu
);
6258 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6259 has_error_code
, error_code
);
6262 return EMULATE_FAIL
;
6264 kvm_rip_write(vcpu
, ctxt
->eip
);
6265 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6266 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6267 return EMULATE_DONE
;
6269 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6271 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6272 struct kvm_sregs
*sregs
)
6274 int mmu_reset_needed
= 0;
6275 int pending_vec
, max_bits
, idx
;
6278 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6281 dt
.size
= sregs
->idt
.limit
;
6282 dt
.address
= sregs
->idt
.base
;
6283 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6284 dt
.size
= sregs
->gdt
.limit
;
6285 dt
.address
= sregs
->gdt
.base
;
6286 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6288 vcpu
->arch
.cr2
= sregs
->cr2
;
6289 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6290 vcpu
->arch
.cr3
= sregs
->cr3
;
6291 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6293 kvm_set_cr8(vcpu
, sregs
->cr8
);
6295 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6296 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6297 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
6299 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6300 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6301 vcpu
->arch
.cr0
= sregs
->cr0
;
6303 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6304 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6305 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6306 kvm_update_cpuid(vcpu
);
6308 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6309 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6310 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6311 mmu_reset_needed
= 1;
6313 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6315 if (mmu_reset_needed
)
6316 kvm_mmu_reset_context(vcpu
);
6318 max_bits
= KVM_NR_INTERRUPTS
;
6319 pending_vec
= find_first_bit(
6320 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6321 if (pending_vec
< max_bits
) {
6322 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6323 pr_debug("Set back pending irq %d\n", pending_vec
);
6326 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6327 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6328 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6329 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6330 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6331 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6333 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6334 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6336 update_cr8_intercept(vcpu
);
6338 /* Older userspace won't unhalt the vcpu on reset. */
6339 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6340 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6342 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6344 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6349 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6350 struct kvm_guest_debug
*dbg
)
6352 unsigned long rflags
;
6355 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6357 if (vcpu
->arch
.exception
.pending
)
6359 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6360 kvm_queue_exception(vcpu
, DB_VECTOR
);
6362 kvm_queue_exception(vcpu
, BP_VECTOR
);
6366 * Read rflags as long as potentially injected trace flags are still
6369 rflags
= kvm_get_rflags(vcpu
);
6371 vcpu
->guest_debug
= dbg
->control
;
6372 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6373 vcpu
->guest_debug
= 0;
6375 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6376 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6377 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6378 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6380 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6381 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6383 kvm_update_dr7(vcpu
);
6385 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6386 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6387 get_segment_base(vcpu
, VCPU_SREG_CS
);
6390 * Trigger an rflags update that will inject or remove the trace
6393 kvm_set_rflags(vcpu
, rflags
);
6395 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6405 * Translate a guest virtual address to a guest physical address.
6407 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6408 struct kvm_translation
*tr
)
6410 unsigned long vaddr
= tr
->linear_address
;
6414 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6415 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6416 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6417 tr
->physical_address
= gpa
;
6418 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6425 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6427 struct i387_fxsave_struct
*fxsave
=
6428 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6430 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6431 fpu
->fcw
= fxsave
->cwd
;
6432 fpu
->fsw
= fxsave
->swd
;
6433 fpu
->ftwx
= fxsave
->twd
;
6434 fpu
->last_opcode
= fxsave
->fop
;
6435 fpu
->last_ip
= fxsave
->rip
;
6436 fpu
->last_dp
= fxsave
->rdp
;
6437 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6442 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6444 struct i387_fxsave_struct
*fxsave
=
6445 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6447 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6448 fxsave
->cwd
= fpu
->fcw
;
6449 fxsave
->swd
= fpu
->fsw
;
6450 fxsave
->twd
= fpu
->ftwx
;
6451 fxsave
->fop
= fpu
->last_opcode
;
6452 fxsave
->rip
= fpu
->last_ip
;
6453 fxsave
->rdp
= fpu
->last_dp
;
6454 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6459 int fx_init(struct kvm_vcpu
*vcpu
)
6463 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6467 fpu_finit(&vcpu
->arch
.guest_fpu
);
6470 * Ensure guest xcr0 is valid for loading
6472 vcpu
->arch
.xcr0
= XSTATE_FP
;
6474 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6478 EXPORT_SYMBOL_GPL(fx_init
);
6480 static void fx_free(struct kvm_vcpu
*vcpu
)
6482 fpu_free(&vcpu
->arch
.guest_fpu
);
6485 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6487 if (vcpu
->guest_fpu_loaded
)
6491 * Restore all possible states in the guest,
6492 * and assume host would use all available bits.
6493 * Guest xcr0 would be loaded later.
6495 kvm_put_guest_xcr0(vcpu
);
6496 vcpu
->guest_fpu_loaded
= 1;
6497 __kernel_fpu_begin();
6498 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6502 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6504 kvm_put_guest_xcr0(vcpu
);
6506 if (!vcpu
->guest_fpu_loaded
)
6509 vcpu
->guest_fpu_loaded
= 0;
6510 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6512 ++vcpu
->stat
.fpu_reload
;
6513 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6517 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6519 kvmclock_reset(vcpu
);
6521 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6523 kvm_x86_ops
->vcpu_free(vcpu
);
6526 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6529 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6530 printk_once(KERN_WARNING
6531 "kvm: SMP vm created on host with unstable TSC; "
6532 "guest TSC will not be reliable\n");
6533 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6536 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6540 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6541 r
= vcpu_load(vcpu
);
6544 kvm_vcpu_reset(vcpu
);
6545 r
= kvm_mmu_setup(vcpu
);
6551 int kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
6554 struct msr_data msr
;
6556 r
= vcpu_load(vcpu
);
6560 msr
.index
= MSR_IA32_TSC
;
6561 msr
.host_initiated
= true;
6562 kvm_write_tsc(vcpu
, &msr
);
6568 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6571 vcpu
->arch
.apf
.msr_val
= 0;
6573 r
= vcpu_load(vcpu
);
6575 kvm_mmu_unload(vcpu
);
6579 kvm_x86_ops
->vcpu_free(vcpu
);
6582 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
6584 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6585 vcpu
->arch
.nmi_pending
= 0;
6586 vcpu
->arch
.nmi_injected
= false;
6588 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6589 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6590 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6591 kvm_update_dr7(vcpu
);
6593 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6594 vcpu
->arch
.apf
.msr_val
= 0;
6595 vcpu
->arch
.st
.msr_val
= 0;
6597 kvmclock_reset(vcpu
);
6599 kvm_clear_async_pf_completion_queue(vcpu
);
6600 kvm_async_pf_hash_reset(vcpu
);
6601 vcpu
->arch
.apf
.halted
= false;
6603 kvm_pmu_reset(vcpu
);
6605 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
6606 vcpu
->arch
.regs_avail
= ~0;
6607 vcpu
->arch
.regs_dirty
= ~0;
6609 kvm_x86_ops
->vcpu_reset(vcpu
);
6612 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, unsigned int vector
)
6614 struct kvm_segment cs
;
6616 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6617 cs
.selector
= vector
<< 8;
6618 cs
.base
= vector
<< 12;
6619 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6620 kvm_rip_write(vcpu
, 0);
6623 int kvm_arch_hardware_enable(void *garbage
)
6626 struct kvm_vcpu
*vcpu
;
6631 bool stable
, backwards_tsc
= false;
6633 kvm_shared_msr_cpu_online();
6634 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6638 local_tsc
= native_read_tsc();
6639 stable
= !check_tsc_unstable();
6640 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6641 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6642 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6643 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6644 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6645 backwards_tsc
= true;
6646 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6647 max_tsc
= vcpu
->arch
.last_host_tsc
;
6653 * Sometimes, even reliable TSCs go backwards. This happens on
6654 * platforms that reset TSC during suspend or hibernate actions, but
6655 * maintain synchronization. We must compensate. Fortunately, we can
6656 * detect that condition here, which happens early in CPU bringup,
6657 * before any KVM threads can be running. Unfortunately, we can't
6658 * bring the TSCs fully up to date with real time, as we aren't yet far
6659 * enough into CPU bringup that we know how much real time has actually
6660 * elapsed; our helper function, get_kernel_ns() will be using boot
6661 * variables that haven't been updated yet.
6663 * So we simply find the maximum observed TSC above, then record the
6664 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6665 * the adjustment will be applied. Note that we accumulate
6666 * adjustments, in case multiple suspend cycles happen before some VCPU
6667 * gets a chance to run again. In the event that no KVM threads get a
6668 * chance to run, we will miss the entire elapsed period, as we'll have
6669 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6670 * loose cycle time. This isn't too big a deal, since the loss will be
6671 * uniform across all VCPUs (not to mention the scenario is extremely
6672 * unlikely). It is possible that a second hibernate recovery happens
6673 * much faster than a first, causing the observed TSC here to be
6674 * smaller; this would require additional padding adjustment, which is
6675 * why we set last_host_tsc to the local tsc observed here.
6677 * N.B. - this code below runs only on platforms with reliable TSC,
6678 * as that is the only way backwards_tsc is set above. Also note
6679 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6680 * have the same delta_cyc adjustment applied if backwards_tsc
6681 * is detected. Note further, this adjustment is only done once,
6682 * as we reset last_host_tsc on all VCPUs to stop this from being
6683 * called multiple times (one for each physical CPU bringup).
6685 * Platforms with unreliable TSCs don't have to deal with this, they
6686 * will be compensated by the logic in vcpu_load, which sets the TSC to
6687 * catchup mode. This will catchup all VCPUs to real time, but cannot
6688 * guarantee that they stay in perfect synchronization.
6690 if (backwards_tsc
) {
6691 u64 delta_cyc
= max_tsc
- local_tsc
;
6692 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6693 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6694 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
6695 vcpu
->arch
.last_host_tsc
= local_tsc
;
6696 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
6701 * We have to disable TSC offset matching.. if you were
6702 * booting a VM while issuing an S4 host suspend....
6703 * you may have some problem. Solving this issue is
6704 * left as an exercise to the reader.
6706 kvm
->arch
.last_tsc_nsec
= 0;
6707 kvm
->arch
.last_tsc_write
= 0;
6714 void kvm_arch_hardware_disable(void *garbage
)
6716 kvm_x86_ops
->hardware_disable(garbage
);
6717 drop_user_return_notifiers(garbage
);
6720 int kvm_arch_hardware_setup(void)
6722 return kvm_x86_ops
->hardware_setup();
6725 void kvm_arch_hardware_unsetup(void)
6727 kvm_x86_ops
->hardware_unsetup();
6730 void kvm_arch_check_processor_compat(void *rtn
)
6732 kvm_x86_ops
->check_processor_compatibility(rtn
);
6735 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
6737 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
6740 struct static_key kvm_no_apic_vcpu __read_mostly
;
6742 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6748 BUG_ON(vcpu
->kvm
== NULL
);
6751 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6752 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6753 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6755 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6757 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6762 vcpu
->arch
.pio_data
= page_address(page
);
6764 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
6766 r
= kvm_mmu_create(vcpu
);
6768 goto fail_free_pio_data
;
6770 if (irqchip_in_kernel(kvm
)) {
6771 r
= kvm_create_lapic(vcpu
);
6773 goto fail_mmu_destroy
;
6775 static_key_slow_inc(&kvm_no_apic_vcpu
);
6777 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6779 if (!vcpu
->arch
.mce_banks
) {
6781 goto fail_free_lapic
;
6783 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6785 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
6787 goto fail_free_mce_banks
;
6792 goto fail_free_wbinvd_dirty_mask
;
6794 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
6795 vcpu
->arch
.pv_time_enabled
= false;
6796 kvm_async_pf_hash_reset(vcpu
);
6800 fail_free_wbinvd_dirty_mask
:
6801 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6802 fail_free_mce_banks
:
6803 kfree(vcpu
->arch
.mce_banks
);
6805 kvm_free_lapic(vcpu
);
6807 kvm_mmu_destroy(vcpu
);
6809 free_page((unsigned long)vcpu
->arch
.pio_data
);
6814 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6818 kvm_pmu_destroy(vcpu
);
6819 kfree(vcpu
->arch
.mce_banks
);
6820 kvm_free_lapic(vcpu
);
6821 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6822 kvm_mmu_destroy(vcpu
);
6823 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6824 free_page((unsigned long)vcpu
->arch
.pio_data
);
6825 if (!irqchip_in_kernel(vcpu
->kvm
))
6826 static_key_slow_dec(&kvm_no_apic_vcpu
);
6829 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
6834 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
6835 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
6837 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6838 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
6839 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6840 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
6841 &kvm
->arch
.irq_sources_bitmap
);
6843 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6844 mutex_init(&kvm
->arch
.apic_map_lock
);
6845 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
6847 pvclock_update_vm_gtod_copy(kvm
);
6852 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6855 r
= vcpu_load(vcpu
);
6857 kvm_mmu_unload(vcpu
);
6861 static void kvm_free_vcpus(struct kvm
*kvm
)
6864 struct kvm_vcpu
*vcpu
;
6867 * Unpin any mmu pages first.
6869 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6870 kvm_clear_async_pf_completion_queue(vcpu
);
6871 kvm_unload_vcpu_mmu(vcpu
);
6873 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6874 kvm_arch_vcpu_free(vcpu
);
6876 mutex_lock(&kvm
->lock
);
6877 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6878 kvm
->vcpus
[i
] = NULL
;
6880 atomic_set(&kvm
->online_vcpus
, 0);
6881 mutex_unlock(&kvm
->lock
);
6884 void kvm_arch_sync_events(struct kvm
*kvm
)
6886 kvm_free_all_assigned_devices(kvm
);
6890 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6892 if (current
->mm
== kvm
->mm
) {
6894 * Free memory regions allocated on behalf of userspace,
6895 * unless the the memory map has changed due to process exit
6898 struct kvm_userspace_memory_region mem
;
6899 memset(&mem
, 0, sizeof(mem
));
6900 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
6901 kvm_set_memory_region(kvm
, &mem
);
6903 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
6904 kvm_set_memory_region(kvm
, &mem
);
6906 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
6907 kvm_set_memory_region(kvm
, &mem
);
6909 kvm_iommu_unmap_guest(kvm
);
6910 kfree(kvm
->arch
.vpic
);
6911 kfree(kvm
->arch
.vioapic
);
6912 kvm_free_vcpus(kvm
);
6913 if (kvm
->arch
.apic_access_page
)
6914 put_page(kvm
->arch
.apic_access_page
);
6915 if (kvm
->arch
.ept_identity_pagetable
)
6916 put_page(kvm
->arch
.ept_identity_pagetable
);
6917 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
6920 void kvm_arch_free_memslot(struct kvm_memory_slot
*free
,
6921 struct kvm_memory_slot
*dont
)
6925 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6926 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
6927 kvm_kvfree(free
->arch
.rmap
[i
]);
6928 free
->arch
.rmap
[i
] = NULL
;
6933 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
6934 dont
->arch
.lpage_info
[i
- 1]) {
6935 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
6936 free
->arch
.lpage_info
[i
- 1] = NULL
;
6941 int kvm_arch_create_memslot(struct kvm_memory_slot
*slot
, unsigned long npages
)
6945 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6950 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
6951 slot
->base_gfn
, level
) + 1;
6953 slot
->arch
.rmap
[i
] =
6954 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
6955 if (!slot
->arch
.rmap
[i
])
6960 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
6961 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
6962 if (!slot
->arch
.lpage_info
[i
- 1])
6965 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
6966 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
6967 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
6968 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
6969 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
6971 * If the gfn and userspace address are not aligned wrt each
6972 * other, or if explicitly asked to, disable large page
6973 * support for this slot
6975 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
6976 !kvm_largepages_enabled()) {
6979 for (j
= 0; j
< lpages
; ++j
)
6980 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
6987 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6988 kvm_kvfree(slot
->arch
.rmap
[i
]);
6989 slot
->arch
.rmap
[i
] = NULL
;
6993 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
6994 slot
->arch
.lpage_info
[i
- 1] = NULL
;
6999 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7000 struct kvm_memory_slot
*memslot
,
7001 struct kvm_userspace_memory_region
*mem
,
7002 enum kvm_mr_change change
)
7005 * Only private memory slots need to be mapped here since
7006 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7008 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7009 unsigned long userspace_addr
;
7012 * MAP_SHARED to prevent internal slot pages from being moved
7015 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7016 PROT_READ
| PROT_WRITE
,
7017 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7019 if (IS_ERR((void *)userspace_addr
))
7020 return PTR_ERR((void *)userspace_addr
);
7022 memslot
->userspace_addr
= userspace_addr
;
7028 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7029 struct kvm_userspace_memory_region
*mem
,
7030 const struct kvm_memory_slot
*old
,
7031 enum kvm_mr_change change
)
7034 int nr_mmu_pages
= 0;
7036 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7039 ret
= vm_munmap(old
->userspace_addr
,
7040 old
->npages
* PAGE_SIZE
);
7043 "kvm_vm_ioctl_set_memory_region: "
7044 "failed to munmap memory\n");
7047 if (!kvm
->arch
.n_requested_mmu_pages
)
7048 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7051 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7053 * Write protect all pages for dirty logging.
7054 * Existing largepage mappings are destroyed here and new ones will
7055 * not be created until the end of the logging.
7057 if ((change
!= KVM_MR_DELETE
) && (mem
->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7058 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
7060 * If memory slot is created, or moved, we need to clear all
7063 if ((change
== KVM_MR_CREATE
) || (change
== KVM_MR_MOVE
))
7064 kvm_mmu_zap_mmio_sptes(kvm
);
7067 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7069 kvm_mmu_invalidate_zap_all_pages(kvm
);
7072 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7073 struct kvm_memory_slot
*slot
)
7075 kvm_mmu_invalidate_zap_all_pages(kvm
);
7078 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7080 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7081 !vcpu
->arch
.apf
.halted
)
7082 || !list_empty_careful(&vcpu
->async_pf
.done
)
7083 || kvm_apic_has_events(vcpu
)
7084 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7085 (kvm_arch_interrupt_allowed(vcpu
) &&
7086 kvm_cpu_has_interrupt(vcpu
));
7089 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7091 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7094 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7096 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7099 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7101 unsigned long current_rip
= kvm_rip_read(vcpu
) +
7102 get_segment_base(vcpu
, VCPU_SREG_CS
);
7104 return current_rip
== linear_rip
;
7106 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7108 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7110 unsigned long rflags
;
7112 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7113 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7114 rflags
&= ~X86_EFLAGS_TF
;
7117 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7119 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7121 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7122 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7123 rflags
|= X86_EFLAGS_TF
;
7124 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7125 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7127 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7129 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7133 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7134 is_error_page(work
->page
))
7137 r
= kvm_mmu_reload(vcpu
);
7141 if (!vcpu
->arch
.mmu
.direct_map
&&
7142 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7145 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7148 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7150 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7153 static inline u32
kvm_async_pf_next_probe(u32 key
)
7155 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7158 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7160 u32 key
= kvm_async_pf_hash_fn(gfn
);
7162 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7163 key
= kvm_async_pf_next_probe(key
);
7165 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7168 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7171 u32 key
= kvm_async_pf_hash_fn(gfn
);
7173 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7174 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7175 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7176 key
= kvm_async_pf_next_probe(key
);
7181 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7183 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7186 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7190 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7192 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7194 j
= kvm_async_pf_next_probe(j
);
7195 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7197 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7199 * k lies cyclically in ]i,j]
7201 * |....j i.k.| or |.k..j i...|
7203 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7204 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7209 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7212 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7216 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7217 struct kvm_async_pf
*work
)
7219 struct x86_exception fault
;
7221 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7222 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7224 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7225 (vcpu
->arch
.apf
.send_user_only
&&
7226 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7227 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7228 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7229 fault
.vector
= PF_VECTOR
;
7230 fault
.error_code_valid
= true;
7231 fault
.error_code
= 0;
7232 fault
.nested_page_fault
= false;
7233 fault
.address
= work
->arch
.token
;
7234 kvm_inject_page_fault(vcpu
, &fault
);
7238 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7239 struct kvm_async_pf
*work
)
7241 struct x86_exception fault
;
7243 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7244 if (is_error_page(work
->page
))
7245 work
->arch
.token
= ~0; /* broadcast wakeup */
7247 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7249 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7250 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7251 fault
.vector
= PF_VECTOR
;
7252 fault
.error_code_valid
= true;
7253 fault
.error_code
= 0;
7254 fault
.nested_page_fault
= false;
7255 fault
.address
= work
->arch
.token
;
7256 kvm_inject_page_fault(vcpu
, &fault
);
7258 vcpu
->arch
.apf
.halted
= false;
7259 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7262 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7264 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7267 return !kvm_event_needs_reinjection(vcpu
) &&
7268 kvm_x86_ops
->interrupt_allowed(vcpu
);
7271 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7272 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7273 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7274 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7275 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7276 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7277 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7278 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7279 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7280 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7281 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7282 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);