2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define CR0_RESERVED_BITS \
64 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
65 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
66 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
67 #define CR4_RESERVED_BITS \
68 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
69 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
70 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
72 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
76 #define KVM_MAX_MCE_BANKS 32
77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
80 * - enable syscall per default because its emulated by KVM
81 * - enable LME and LMA per default on 64 bit KVM
84 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
86 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
94 struct kvm_cpuid_entry2 __user
*entries
);
96 struct kvm_x86_ops
*kvm_x86_ops
;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
100 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
102 #define KVM_NR_SHARED_MSRS 16
104 struct kvm_shared_msrs_global
{
106 u32 msrs
[KVM_NR_SHARED_MSRS
];
109 struct kvm_shared_msrs
{
110 struct user_return_notifier urn
;
112 struct kvm_shared_msr_values
{
115 } values
[KVM_NR_SHARED_MSRS
];
118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
119 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
121 struct kvm_stats_debugfs_item debugfs_entries
[] = {
122 { "pf_fixed", VCPU_STAT(pf_fixed
) },
123 { "pf_guest", VCPU_STAT(pf_guest
) },
124 { "tlb_flush", VCPU_STAT(tlb_flush
) },
125 { "invlpg", VCPU_STAT(invlpg
) },
126 { "exits", VCPU_STAT(exits
) },
127 { "io_exits", VCPU_STAT(io_exits
) },
128 { "mmio_exits", VCPU_STAT(mmio_exits
) },
129 { "signal_exits", VCPU_STAT(signal_exits
) },
130 { "irq_window", VCPU_STAT(irq_window_exits
) },
131 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
132 { "halt_exits", VCPU_STAT(halt_exits
) },
133 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
134 { "hypercalls", VCPU_STAT(hypercalls
) },
135 { "request_irq", VCPU_STAT(request_irq_exits
) },
136 { "irq_exits", VCPU_STAT(irq_exits
) },
137 { "host_state_reload", VCPU_STAT(host_state_reload
) },
138 { "efer_reload", VCPU_STAT(efer_reload
) },
139 { "fpu_reload", VCPU_STAT(fpu_reload
) },
140 { "insn_emulation", VCPU_STAT(insn_emulation
) },
141 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
142 { "irq_injections", VCPU_STAT(irq_injections
) },
143 { "nmi_injections", VCPU_STAT(nmi_injections
) },
144 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
145 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
146 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
147 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
148 { "mmu_flooded", VM_STAT(mmu_flooded
) },
149 { "mmu_recycled", VM_STAT(mmu_recycled
) },
150 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
151 { "mmu_unsync", VM_STAT(mmu_unsync
) },
152 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
153 { "largepages", VM_STAT(lpages
) },
157 u64 __read_mostly host_xcr0
;
159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
162 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
163 vcpu
->arch
.apf
.gfns
[i
] = ~0;
166 static void kvm_on_user_return(struct user_return_notifier
*urn
)
169 struct kvm_shared_msrs
*locals
170 = container_of(urn
, struct kvm_shared_msrs
, urn
);
171 struct kvm_shared_msr_values
*values
;
173 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
174 values
= &locals
->values
[slot
];
175 if (values
->host
!= values
->curr
) {
176 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
177 values
->curr
= values
->host
;
180 locals
->registered
= false;
181 user_return_notifier_unregister(urn
);
184 static void shared_msr_update(unsigned slot
, u32 msr
)
186 struct kvm_shared_msrs
*smsr
;
189 smsr
= &__get_cpu_var(shared_msrs
);
190 /* only read, and nobody should modify it at this time,
191 * so don't need lock */
192 if (slot
>= shared_msrs_global
.nr
) {
193 printk(KERN_ERR
"kvm: invalid MSR slot!");
196 rdmsrl_safe(msr
, &value
);
197 smsr
->values
[slot
].host
= value
;
198 smsr
->values
[slot
].curr
= value
;
201 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
203 if (slot
>= shared_msrs_global
.nr
)
204 shared_msrs_global
.nr
= slot
+ 1;
205 shared_msrs_global
.msrs
[slot
] = msr
;
206 /* we need ensured the shared_msr_global have been updated */
209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
211 static void kvm_shared_msr_cpu_online(void)
215 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
216 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
219 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
221 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
223 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
225 smsr
->values
[slot
].curr
= value
;
226 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
227 if (!smsr
->registered
) {
228 smsr
->urn
.on_user_return
= kvm_on_user_return
;
229 user_return_notifier_register(&smsr
->urn
);
230 smsr
->registered
= true;
233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
235 static void drop_user_return_notifiers(void *ignore
)
237 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
239 if (smsr
->registered
)
240 kvm_on_user_return(&smsr
->urn
);
243 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
245 if (irqchip_in_kernel(vcpu
->kvm
))
246 return vcpu
->arch
.apic_base
;
248 return vcpu
->arch
.apic_base
;
250 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
252 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
254 /* TODO: reserve bits check */
255 if (irqchip_in_kernel(vcpu
->kvm
))
256 kvm_lapic_set_base(vcpu
, data
);
258 vcpu
->arch
.apic_base
= data
;
260 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
262 #define EXCPT_BENIGN 0
263 #define EXCPT_CONTRIBUTORY 1
266 static int exception_class(int vector
)
276 return EXCPT_CONTRIBUTORY
;
283 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
284 unsigned nr
, bool has_error
, u32 error_code
,
290 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
292 if (!vcpu
->arch
.exception
.pending
) {
294 vcpu
->arch
.exception
.pending
= true;
295 vcpu
->arch
.exception
.has_error_code
= has_error
;
296 vcpu
->arch
.exception
.nr
= nr
;
297 vcpu
->arch
.exception
.error_code
= error_code
;
298 vcpu
->arch
.exception
.reinject
= reinject
;
302 /* to check exception */
303 prev_nr
= vcpu
->arch
.exception
.nr
;
304 if (prev_nr
== DF_VECTOR
) {
305 /* triple fault -> shutdown */
306 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
309 class1
= exception_class(prev_nr
);
310 class2
= exception_class(nr
);
311 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
312 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
313 /* generate double fault per SDM Table 5-5 */
314 vcpu
->arch
.exception
.pending
= true;
315 vcpu
->arch
.exception
.has_error_code
= true;
316 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
317 vcpu
->arch
.exception
.error_code
= 0;
319 /* replace previous exception with a new one in a hope
320 that instruction re-execution will regenerate lost
325 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
327 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
329 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
331 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
333 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
335 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
337 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
339 ++vcpu
->stat
.pf_guest
;
340 vcpu
->arch
.cr2
= fault
->address
;
341 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
344 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
346 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
347 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
349 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
352 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
354 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
355 vcpu
->arch
.nmi_pending
= 1;
357 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
359 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
361 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
363 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
365 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
367 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
369 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
372 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
373 * a #GP and return false.
375 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
377 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
379 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
382 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
385 * This function will be used to read from the physical memory of the currently
386 * running guest. The difference to kvm_read_guest_page is that this function
387 * can read from guest physical or from the guest's guest physical memory.
389 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
390 gfn_t ngfn
, void *data
, int offset
, int len
,
396 ngpa
= gfn_to_gpa(ngfn
);
397 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
398 if (real_gfn
== UNMAPPED_GVA
)
401 real_gfn
= gpa_to_gfn(real_gfn
);
403 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
405 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
407 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
408 void *data
, int offset
, int len
, u32 access
)
410 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
411 data
, offset
, len
, access
);
415 * Load the pae pdptrs. Return true is they are all valid.
417 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
419 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
420 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
423 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
425 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
426 offset
* sizeof(u64
), sizeof(pdpte
),
427 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
432 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
433 if (is_present_gpte(pdpte
[i
]) &&
434 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
441 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
442 __set_bit(VCPU_EXREG_PDPTR
,
443 (unsigned long *)&vcpu
->arch
.regs_avail
);
444 __set_bit(VCPU_EXREG_PDPTR
,
445 (unsigned long *)&vcpu
->arch
.regs_dirty
);
450 EXPORT_SYMBOL_GPL(load_pdptrs
);
452 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
454 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
460 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
463 if (!test_bit(VCPU_EXREG_PDPTR
,
464 (unsigned long *)&vcpu
->arch
.regs_avail
))
467 gfn
= (vcpu
->arch
.cr3
& ~31u) >> PAGE_SHIFT
;
468 offset
= (vcpu
->arch
.cr3
& ~31u) & (PAGE_SIZE
- 1);
469 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
470 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
473 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
479 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
481 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
482 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
483 X86_CR0_CD
| X86_CR0_NW
;
488 if (cr0
& 0xffffffff00000000UL
)
492 cr0
&= ~CR0_RESERVED_BITS
;
494 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
497 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
500 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
502 if ((vcpu
->arch
.efer
& EFER_LME
)) {
507 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
512 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
517 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
519 if ((cr0
^ old_cr0
) & X86_CR0_PG
)
520 kvm_clear_async_pf_completion_queue(vcpu
);
522 if ((cr0
^ old_cr0
) & update_bits
)
523 kvm_mmu_reset_context(vcpu
);
526 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
528 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
530 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
532 EXPORT_SYMBOL_GPL(kvm_lmsw
);
534 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
538 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
539 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
542 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
544 if (!(xcr0
& XSTATE_FP
))
546 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
548 if (xcr0
& ~host_xcr0
)
550 vcpu
->arch
.xcr0
= xcr0
;
551 vcpu
->guest_xcr0_loaded
= 0;
555 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
557 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
558 kvm_inject_gp(vcpu
, 0);
563 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
565 static bool guest_cpuid_has_xsave(struct kvm_vcpu
*vcpu
)
567 struct kvm_cpuid_entry2
*best
;
569 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
570 return best
&& (best
->ecx
& bit(X86_FEATURE_XSAVE
));
573 static void update_cpuid(struct kvm_vcpu
*vcpu
)
575 struct kvm_cpuid_entry2
*best
;
577 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
581 /* Update OSXSAVE bit */
582 if (cpu_has_xsave
&& best
->function
== 0x1) {
583 best
->ecx
&= ~(bit(X86_FEATURE_OSXSAVE
));
584 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
))
585 best
->ecx
|= bit(X86_FEATURE_OSXSAVE
);
589 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
591 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
592 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
594 if (cr4
& CR4_RESERVED_BITS
)
597 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
600 if (is_long_mode(vcpu
)) {
601 if (!(cr4
& X86_CR4_PAE
))
603 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
604 && ((cr4
^ old_cr4
) & pdptr_bits
)
605 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
))
608 if (cr4
& X86_CR4_VMXE
)
611 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
613 if ((cr4
^ old_cr4
) & pdptr_bits
)
614 kvm_mmu_reset_context(vcpu
);
616 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
621 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
623 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
625 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
626 kvm_mmu_sync_roots(vcpu
);
627 kvm_mmu_flush_tlb(vcpu
);
631 if (is_long_mode(vcpu
)) {
632 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
636 if (cr3
& CR3_PAE_RESERVED_BITS
)
638 if (is_paging(vcpu
) &&
639 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
643 * We don't check reserved bits in nonpae mode, because
644 * this isn't enforced, and VMware depends on this.
649 * Does the new cr3 value map to physical memory? (Note, we
650 * catch an invalid cr3 even in real-mode, because it would
651 * cause trouble later on when we turn on paging anyway.)
653 * A real CPU would silently accept an invalid cr3 and would
654 * attempt to use it - with largely undefined (and often hard
655 * to debug) behavior on the guest side.
657 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
659 vcpu
->arch
.cr3
= cr3
;
660 vcpu
->arch
.mmu
.new_cr3(vcpu
);
663 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
665 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
667 if (cr8
& CR8_RESERVED_BITS
)
669 if (irqchip_in_kernel(vcpu
->kvm
))
670 kvm_lapic_set_tpr(vcpu
, cr8
);
672 vcpu
->arch
.cr8
= cr8
;
675 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
677 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
679 if (irqchip_in_kernel(vcpu
->kvm
))
680 return kvm_lapic_get_cr8(vcpu
);
682 return vcpu
->arch
.cr8
;
684 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
686 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
690 vcpu
->arch
.db
[dr
] = val
;
691 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
692 vcpu
->arch
.eff_db
[dr
] = val
;
695 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
699 if (val
& 0xffffffff00000000ULL
)
701 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
704 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
708 if (val
& 0xffffffff00000000ULL
)
710 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
711 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
712 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
713 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
721 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
725 res
= __kvm_set_dr(vcpu
, dr
, val
);
727 kvm_queue_exception(vcpu
, UD_VECTOR
);
729 kvm_inject_gp(vcpu
, 0);
733 EXPORT_SYMBOL_GPL(kvm_set_dr
);
735 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
739 *val
= vcpu
->arch
.db
[dr
];
742 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
746 *val
= vcpu
->arch
.dr6
;
749 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
753 *val
= vcpu
->arch
.dr7
;
760 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
762 if (_kvm_get_dr(vcpu
, dr
, val
)) {
763 kvm_queue_exception(vcpu
, UD_VECTOR
);
768 EXPORT_SYMBOL_GPL(kvm_get_dr
);
771 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
772 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
774 * This list is modified at module load time to reflect the
775 * capabilities of the host cpu. This capabilities test skips MSRs that are
776 * kvm-specific. Those are put in the beginning of the list.
779 #define KVM_SAVE_MSRS_BEGIN 8
780 static u32 msrs_to_save
[] = {
781 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
782 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
783 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
784 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
,
785 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
788 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
790 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
793 static unsigned num_msrs_to_save
;
795 static u32 emulated_msrs
[] = {
796 MSR_IA32_MISC_ENABLE
,
801 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
803 u64 old_efer
= vcpu
->arch
.efer
;
805 if (efer
& efer_reserved_bits
)
809 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
812 if (efer
& EFER_FFXSR
) {
813 struct kvm_cpuid_entry2
*feat
;
815 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
816 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
820 if (efer
& EFER_SVME
) {
821 struct kvm_cpuid_entry2
*feat
;
823 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
824 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
829 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
831 kvm_x86_ops
->set_efer(vcpu
, efer
);
833 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
835 /* Update reserved bits */
836 if ((efer
^ old_efer
) & EFER_NX
)
837 kvm_mmu_reset_context(vcpu
);
842 void kvm_enable_efer_bits(u64 mask
)
844 efer_reserved_bits
&= ~mask
;
846 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
850 * Writes msr value into into the appropriate "register".
851 * Returns 0 on success, non-0 otherwise.
852 * Assumes vcpu_load() was already called.
854 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
856 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
860 * Adapt set_msr() to msr_io()'s calling convention
862 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
864 return kvm_set_msr(vcpu
, index
, *data
);
867 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
871 struct pvclock_wall_clock wc
;
872 struct timespec boot
;
877 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
882 ++version
; /* first time write, random junk */
886 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
889 * The guest calculates current wall clock time by adding
890 * system time (updated by kvm_guest_time_update below) to the
891 * wall clock specified here. guest system time equals host
892 * system time for us, thus we must fill in host boot time here.
896 wc
.sec
= boot
.tv_sec
;
897 wc
.nsec
= boot
.tv_nsec
;
898 wc
.version
= version
;
900 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
903 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
906 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
908 uint32_t quotient
, remainder
;
910 /* Don't try to replace with do_div(), this one calculates
911 * "(dividend << 32) / divisor" */
913 : "=a" (quotient
), "=d" (remainder
)
914 : "0" (0), "1" (dividend
), "r" (divisor
) );
918 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
919 s8
*pshift
, u32
*pmultiplier
)
926 tps64
= base_khz
* 1000LL;
927 scaled64
= scaled_khz
* 1000LL;
928 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
933 tps32
= (uint32_t)tps64
;
934 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
935 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
943 *pmultiplier
= div_frac(scaled64
, tps32
);
945 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
946 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
949 static inline u64
get_kernel_ns(void)
953 WARN_ON(preemptible());
955 monotonic_to_bootbased(&ts
);
956 return timespec_to_ns(&ts
);
959 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
960 unsigned long max_tsc_khz
;
962 static inline int kvm_tsc_changes_freq(void)
965 int ret
= !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) &&
966 cpufreq_quick_get(cpu
) != 0;
971 static inline u64
nsec_to_cycles(u64 nsec
)
975 WARN_ON(preemptible());
976 if (kvm_tsc_changes_freq())
977 printk_once(KERN_WARNING
978 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
979 ret
= nsec
* __get_cpu_var(cpu_tsc_khz
);
980 do_div(ret
, USEC_PER_SEC
);
984 static void kvm_arch_set_tsc_khz(struct kvm
*kvm
, u32 this_tsc_khz
)
986 /* Compute a scale to convert nanoseconds in TSC cycles */
987 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
988 &kvm
->arch
.virtual_tsc_shift
,
989 &kvm
->arch
.virtual_tsc_mult
);
990 kvm
->arch
.virtual_tsc_khz
= this_tsc_khz
;
993 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
995 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.last_tsc_nsec
,
996 vcpu
->kvm
->arch
.virtual_tsc_mult
,
997 vcpu
->kvm
->arch
.virtual_tsc_shift
);
998 tsc
+= vcpu
->arch
.last_tsc_write
;
1002 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1004 struct kvm
*kvm
= vcpu
->kvm
;
1005 u64 offset
, ns
, elapsed
;
1006 unsigned long flags
;
1009 spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1010 offset
= data
- native_read_tsc();
1011 ns
= get_kernel_ns();
1012 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1013 sdiff
= data
- kvm
->arch
.last_tsc_write
;
1018 * Special case: close write to TSC within 5 seconds of
1019 * another CPU is interpreted as an attempt to synchronize
1020 * The 5 seconds is to accomodate host load / swapping as
1021 * well as any reset of TSC during the boot process.
1023 * In that case, for a reliable TSC, we can match TSC offsets,
1024 * or make a best guest using elapsed value.
1026 if (sdiff
< nsec_to_cycles(5ULL * NSEC_PER_SEC
) &&
1027 elapsed
< 5ULL * NSEC_PER_SEC
) {
1028 if (!check_tsc_unstable()) {
1029 offset
= kvm
->arch
.last_tsc_offset
;
1030 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1032 u64 delta
= nsec_to_cycles(elapsed
);
1034 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1036 ns
= kvm
->arch
.last_tsc_nsec
;
1038 kvm
->arch
.last_tsc_nsec
= ns
;
1039 kvm
->arch
.last_tsc_write
= data
;
1040 kvm
->arch
.last_tsc_offset
= offset
;
1041 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1042 spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1044 /* Reset of TSC must disable overshoot protection below */
1045 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1046 vcpu
->arch
.last_tsc_write
= data
;
1047 vcpu
->arch
.last_tsc_nsec
= ns
;
1049 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1051 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1053 unsigned long flags
;
1054 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1056 unsigned long this_tsc_khz
;
1057 s64 kernel_ns
, max_kernel_ns
;
1060 /* Keep irq disabled to prevent changes to the clock */
1061 local_irq_save(flags
);
1062 kvm_get_msr(v
, MSR_IA32_TSC
, &tsc_timestamp
);
1063 kernel_ns
= get_kernel_ns();
1064 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1066 if (unlikely(this_tsc_khz
== 0)) {
1067 local_irq_restore(flags
);
1068 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1073 * We may have to catch up the TSC to match elapsed wall clock
1074 * time for two reasons, even if kvmclock is used.
1075 * 1) CPU could have been running below the maximum TSC rate
1076 * 2) Broken TSC compensation resets the base at each VCPU
1077 * entry to avoid unknown leaps of TSC even when running
1078 * again on the same CPU. This may cause apparent elapsed
1079 * time to disappear, and the guest to stand still or run
1082 if (vcpu
->tsc_catchup
) {
1083 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1084 if (tsc
> tsc_timestamp
) {
1085 kvm_x86_ops
->adjust_tsc_offset(v
, tsc
- tsc_timestamp
);
1086 tsc_timestamp
= tsc
;
1090 local_irq_restore(flags
);
1092 if (!vcpu
->time_page
)
1096 * Time as measured by the TSC may go backwards when resetting the base
1097 * tsc_timestamp. The reason for this is that the TSC resolution is
1098 * higher than the resolution of the other clock scales. Thus, many
1099 * possible measurments of the TSC correspond to one measurement of any
1100 * other clock, and so a spread of values is possible. This is not a
1101 * problem for the computation of the nanosecond clock; with TSC rates
1102 * around 1GHZ, there can only be a few cycles which correspond to one
1103 * nanosecond value, and any path through this code will inevitably
1104 * take longer than that. However, with the kernel_ns value itself,
1105 * the precision may be much lower, down to HZ granularity. If the
1106 * first sampling of TSC against kernel_ns ends in the low part of the
1107 * range, and the second in the high end of the range, we can get:
1109 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1111 * As the sampling errors potentially range in the thousands of cycles,
1112 * it is possible such a time value has already been observed by the
1113 * guest. To protect against this, we must compute the system time as
1114 * observed by the guest and ensure the new system time is greater.
1117 if (vcpu
->hv_clock
.tsc_timestamp
&& vcpu
->last_guest_tsc
) {
1118 max_kernel_ns
= vcpu
->last_guest_tsc
-
1119 vcpu
->hv_clock
.tsc_timestamp
;
1120 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1121 vcpu
->hv_clock
.tsc_to_system_mul
,
1122 vcpu
->hv_clock
.tsc_shift
);
1123 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1126 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1127 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1128 &vcpu
->hv_clock
.tsc_shift
,
1129 &vcpu
->hv_clock
.tsc_to_system_mul
);
1130 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1133 if (max_kernel_ns
> kernel_ns
)
1134 kernel_ns
= max_kernel_ns
;
1136 /* With all the info we got, fill in the values */
1137 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1138 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1139 vcpu
->last_kernel_ns
= kernel_ns
;
1140 vcpu
->last_guest_tsc
= tsc_timestamp
;
1141 vcpu
->hv_clock
.flags
= 0;
1144 * The interface expects us to write an even number signaling that the
1145 * update is finished. Since the guest won't see the intermediate
1146 * state, we just increase by 2 at the end.
1148 vcpu
->hv_clock
.version
+= 2;
1150 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
1152 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1153 sizeof(vcpu
->hv_clock
));
1155 kunmap_atomic(shared_kaddr
, KM_USER0
);
1157 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1161 static bool msr_mtrr_valid(unsigned msr
)
1164 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1165 case MSR_MTRRfix64K_00000
:
1166 case MSR_MTRRfix16K_80000
:
1167 case MSR_MTRRfix16K_A0000
:
1168 case MSR_MTRRfix4K_C0000
:
1169 case MSR_MTRRfix4K_C8000
:
1170 case MSR_MTRRfix4K_D0000
:
1171 case MSR_MTRRfix4K_D8000
:
1172 case MSR_MTRRfix4K_E0000
:
1173 case MSR_MTRRfix4K_E8000
:
1174 case MSR_MTRRfix4K_F0000
:
1175 case MSR_MTRRfix4K_F8000
:
1176 case MSR_MTRRdefType
:
1177 case MSR_IA32_CR_PAT
:
1185 static bool valid_pat_type(unsigned t
)
1187 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1190 static bool valid_mtrr_type(unsigned t
)
1192 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1195 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1199 if (!msr_mtrr_valid(msr
))
1202 if (msr
== MSR_IA32_CR_PAT
) {
1203 for (i
= 0; i
< 8; i
++)
1204 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1207 } else if (msr
== MSR_MTRRdefType
) {
1210 return valid_mtrr_type(data
& 0xff);
1211 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1212 for (i
= 0; i
< 8 ; i
++)
1213 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1218 /* variable MTRRs */
1219 return valid_mtrr_type(data
& 0xff);
1222 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1224 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1226 if (!mtrr_valid(vcpu
, msr
, data
))
1229 if (msr
== MSR_MTRRdefType
) {
1230 vcpu
->arch
.mtrr_state
.def_type
= data
;
1231 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1232 } else if (msr
== MSR_MTRRfix64K_00000
)
1234 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1235 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1236 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1237 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1238 else if (msr
== MSR_IA32_CR_PAT
)
1239 vcpu
->arch
.pat
= data
;
1240 else { /* Variable MTRRs */
1241 int idx
, is_mtrr_mask
;
1244 idx
= (msr
- 0x200) / 2;
1245 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1248 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1251 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1255 kvm_mmu_reset_context(vcpu
);
1259 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1261 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1262 unsigned bank_num
= mcg_cap
& 0xff;
1265 case MSR_IA32_MCG_STATUS
:
1266 vcpu
->arch
.mcg_status
= data
;
1268 case MSR_IA32_MCG_CTL
:
1269 if (!(mcg_cap
& MCG_CTL_P
))
1271 if (data
!= 0 && data
!= ~(u64
)0)
1273 vcpu
->arch
.mcg_ctl
= data
;
1276 if (msr
>= MSR_IA32_MC0_CTL
&&
1277 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1278 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1279 /* only 0 or all 1s can be written to IA32_MCi_CTL
1280 * some Linux kernels though clear bit 10 in bank 4 to
1281 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1282 * this to avoid an uncatched #GP in the guest
1284 if ((offset
& 0x3) == 0 &&
1285 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1287 vcpu
->arch
.mce_banks
[offset
] = data
;
1295 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1297 struct kvm
*kvm
= vcpu
->kvm
;
1298 int lm
= is_long_mode(vcpu
);
1299 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1300 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1301 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1302 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1303 u32 page_num
= data
& ~PAGE_MASK
;
1304 u64 page_addr
= data
& PAGE_MASK
;
1309 if (page_num
>= blob_size
)
1312 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1316 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1318 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1327 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1329 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1332 static bool kvm_hv_msr_partition_wide(u32 msr
)
1336 case HV_X64_MSR_GUEST_OS_ID
:
1337 case HV_X64_MSR_HYPERCALL
:
1345 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1347 struct kvm
*kvm
= vcpu
->kvm
;
1350 case HV_X64_MSR_GUEST_OS_ID
:
1351 kvm
->arch
.hv_guest_os_id
= data
;
1352 /* setting guest os id to zero disables hypercall page */
1353 if (!kvm
->arch
.hv_guest_os_id
)
1354 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1356 case HV_X64_MSR_HYPERCALL
: {
1361 /* if guest os id is not set hypercall should remain disabled */
1362 if (!kvm
->arch
.hv_guest_os_id
)
1364 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1365 kvm
->arch
.hv_hypercall
= data
;
1368 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1369 addr
= gfn_to_hva(kvm
, gfn
);
1370 if (kvm_is_error_hva(addr
))
1372 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1373 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1374 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1376 kvm
->arch
.hv_hypercall
= data
;
1380 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1381 "data 0x%llx\n", msr
, data
);
1387 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1390 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1393 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1394 vcpu
->arch
.hv_vapic
= data
;
1397 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1398 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1399 if (kvm_is_error_hva(addr
))
1401 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1403 vcpu
->arch
.hv_vapic
= data
;
1406 case HV_X64_MSR_EOI
:
1407 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1408 case HV_X64_MSR_ICR
:
1409 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1410 case HV_X64_MSR_TPR
:
1411 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1413 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1414 "data 0x%llx\n", msr
, data
);
1421 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1423 gpa_t gpa
= data
& ~0x3f;
1425 /* Bits 2:5 are resrved, Should be zero */
1429 vcpu
->arch
.apf
.msr_val
= data
;
1431 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1432 kvm_clear_async_pf_completion_queue(vcpu
);
1433 kvm_async_pf_hash_reset(vcpu
);
1437 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1440 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1441 kvm_async_pf_wakeup_all(vcpu
);
1445 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1449 return set_efer(vcpu
, data
);
1451 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1452 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1454 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1459 case MSR_FAM10H_MMIO_CONF_BASE
:
1461 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1466 case MSR_AMD64_NB_CFG
:
1468 case MSR_IA32_DEBUGCTLMSR
:
1470 /* We support the non-activated case already */
1472 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1473 /* Values other than LBR and BTF are vendor-specific,
1474 thus reserved and should throw a #GP */
1477 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1480 case MSR_IA32_UCODE_REV
:
1481 case MSR_IA32_UCODE_WRITE
:
1482 case MSR_VM_HSAVE_PA
:
1483 case MSR_AMD64_PATCH_LOADER
:
1485 case 0x200 ... 0x2ff:
1486 return set_msr_mtrr(vcpu
, msr
, data
);
1487 case MSR_IA32_APICBASE
:
1488 kvm_set_apic_base(vcpu
, data
);
1490 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1491 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1492 case MSR_IA32_MISC_ENABLE
:
1493 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1495 case MSR_KVM_WALL_CLOCK_NEW
:
1496 case MSR_KVM_WALL_CLOCK
:
1497 vcpu
->kvm
->arch
.wall_clock
= data
;
1498 kvm_write_wall_clock(vcpu
->kvm
, data
);
1500 case MSR_KVM_SYSTEM_TIME_NEW
:
1501 case MSR_KVM_SYSTEM_TIME
: {
1502 if (vcpu
->arch
.time_page
) {
1503 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1504 vcpu
->arch
.time_page
= NULL
;
1507 vcpu
->arch
.time
= data
;
1508 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1510 /* we verify if the enable bit is set... */
1514 /* ...but clean it before doing the actual write */
1515 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1517 vcpu
->arch
.time_page
=
1518 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1520 if (is_error_page(vcpu
->arch
.time_page
)) {
1521 kvm_release_page_clean(vcpu
->arch
.time_page
);
1522 vcpu
->arch
.time_page
= NULL
;
1526 case MSR_KVM_ASYNC_PF_EN
:
1527 if (kvm_pv_enable_async_pf(vcpu
, data
))
1530 case MSR_IA32_MCG_CTL
:
1531 case MSR_IA32_MCG_STATUS
:
1532 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1533 return set_msr_mce(vcpu
, msr
, data
);
1535 /* Performance counters are not protected by a CPUID bit,
1536 * so we should check all of them in the generic path for the sake of
1537 * cross vendor migration.
1538 * Writing a zero into the event select MSRs disables them,
1539 * which we perfectly emulate ;-). Any other value should be at least
1540 * reported, some guests depend on them.
1542 case MSR_P6_EVNTSEL0
:
1543 case MSR_P6_EVNTSEL1
:
1544 case MSR_K7_EVNTSEL0
:
1545 case MSR_K7_EVNTSEL1
:
1546 case MSR_K7_EVNTSEL2
:
1547 case MSR_K7_EVNTSEL3
:
1549 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1550 "0x%x data 0x%llx\n", msr
, data
);
1552 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1553 * so we ignore writes to make it happy.
1555 case MSR_P6_PERFCTR0
:
1556 case MSR_P6_PERFCTR1
:
1557 case MSR_K7_PERFCTR0
:
1558 case MSR_K7_PERFCTR1
:
1559 case MSR_K7_PERFCTR2
:
1560 case MSR_K7_PERFCTR3
:
1561 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1562 "0x%x data 0x%llx\n", msr
, data
);
1564 case MSR_K7_CLK_CTL
:
1566 * Ignore all writes to this no longer documented MSR.
1567 * Writes are only relevant for old K7 processors,
1568 * all pre-dating SVM, but a recommended workaround from
1569 * AMD for these chips. It is possible to speicify the
1570 * affected processor models on the command line, hence
1571 * the need to ignore the workaround.
1574 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1575 if (kvm_hv_msr_partition_wide(msr
)) {
1577 mutex_lock(&vcpu
->kvm
->lock
);
1578 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1579 mutex_unlock(&vcpu
->kvm
->lock
);
1582 return set_msr_hyperv(vcpu
, msr
, data
);
1585 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1586 return xen_hvm_config(vcpu
, data
);
1588 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1592 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1599 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1603 * Reads an msr value (of 'msr_index') into 'pdata'.
1604 * Returns 0 on success, non-0 otherwise.
1605 * Assumes vcpu_load() was already called.
1607 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1609 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1612 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1614 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1616 if (!msr_mtrr_valid(msr
))
1619 if (msr
== MSR_MTRRdefType
)
1620 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1621 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1622 else if (msr
== MSR_MTRRfix64K_00000
)
1624 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1625 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1626 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1627 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1628 else if (msr
== MSR_IA32_CR_PAT
)
1629 *pdata
= vcpu
->arch
.pat
;
1630 else { /* Variable MTRRs */
1631 int idx
, is_mtrr_mask
;
1634 idx
= (msr
- 0x200) / 2;
1635 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1638 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1641 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1648 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1651 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1652 unsigned bank_num
= mcg_cap
& 0xff;
1655 case MSR_IA32_P5_MC_ADDR
:
1656 case MSR_IA32_P5_MC_TYPE
:
1659 case MSR_IA32_MCG_CAP
:
1660 data
= vcpu
->arch
.mcg_cap
;
1662 case MSR_IA32_MCG_CTL
:
1663 if (!(mcg_cap
& MCG_CTL_P
))
1665 data
= vcpu
->arch
.mcg_ctl
;
1667 case MSR_IA32_MCG_STATUS
:
1668 data
= vcpu
->arch
.mcg_status
;
1671 if (msr
>= MSR_IA32_MC0_CTL
&&
1672 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1673 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1674 data
= vcpu
->arch
.mce_banks
[offset
];
1683 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1686 struct kvm
*kvm
= vcpu
->kvm
;
1689 case HV_X64_MSR_GUEST_OS_ID
:
1690 data
= kvm
->arch
.hv_guest_os_id
;
1692 case HV_X64_MSR_HYPERCALL
:
1693 data
= kvm
->arch
.hv_hypercall
;
1696 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1704 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1709 case HV_X64_MSR_VP_INDEX
: {
1712 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1717 case HV_X64_MSR_EOI
:
1718 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1719 case HV_X64_MSR_ICR
:
1720 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1721 case HV_X64_MSR_TPR
:
1722 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1724 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1731 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1736 case MSR_IA32_PLATFORM_ID
:
1737 case MSR_IA32_UCODE_REV
:
1738 case MSR_IA32_EBL_CR_POWERON
:
1739 case MSR_IA32_DEBUGCTLMSR
:
1740 case MSR_IA32_LASTBRANCHFROMIP
:
1741 case MSR_IA32_LASTBRANCHTOIP
:
1742 case MSR_IA32_LASTINTFROMIP
:
1743 case MSR_IA32_LASTINTTOIP
:
1746 case MSR_VM_HSAVE_PA
:
1747 case MSR_P6_PERFCTR0
:
1748 case MSR_P6_PERFCTR1
:
1749 case MSR_P6_EVNTSEL0
:
1750 case MSR_P6_EVNTSEL1
:
1751 case MSR_K7_EVNTSEL0
:
1752 case MSR_K7_PERFCTR0
:
1753 case MSR_K8_INT_PENDING_MSG
:
1754 case MSR_AMD64_NB_CFG
:
1755 case MSR_FAM10H_MMIO_CONF_BASE
:
1759 data
= 0x500 | KVM_NR_VAR_MTRR
;
1761 case 0x200 ... 0x2ff:
1762 return get_msr_mtrr(vcpu
, msr
, pdata
);
1763 case 0xcd: /* fsb frequency */
1767 * MSR_EBC_FREQUENCY_ID
1768 * Conservative value valid for even the basic CPU models.
1769 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1770 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1771 * and 266MHz for model 3, or 4. Set Core Clock
1772 * Frequency to System Bus Frequency Ratio to 1 (bits
1773 * 31:24) even though these are only valid for CPU
1774 * models > 2, however guests may end up dividing or
1775 * multiplying by zero otherwise.
1777 case MSR_EBC_FREQUENCY_ID
:
1780 case MSR_IA32_APICBASE
:
1781 data
= kvm_get_apic_base(vcpu
);
1783 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1784 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1786 case MSR_IA32_MISC_ENABLE
:
1787 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1789 case MSR_IA32_PERF_STATUS
:
1790 /* TSC increment by tick */
1792 /* CPU multiplier */
1793 data
|= (((uint64_t)4ULL) << 40);
1796 data
= vcpu
->arch
.efer
;
1798 case MSR_KVM_WALL_CLOCK
:
1799 case MSR_KVM_WALL_CLOCK_NEW
:
1800 data
= vcpu
->kvm
->arch
.wall_clock
;
1802 case MSR_KVM_SYSTEM_TIME
:
1803 case MSR_KVM_SYSTEM_TIME_NEW
:
1804 data
= vcpu
->arch
.time
;
1806 case MSR_KVM_ASYNC_PF_EN
:
1807 data
= vcpu
->arch
.apf
.msr_val
;
1809 case MSR_IA32_P5_MC_ADDR
:
1810 case MSR_IA32_P5_MC_TYPE
:
1811 case MSR_IA32_MCG_CAP
:
1812 case MSR_IA32_MCG_CTL
:
1813 case MSR_IA32_MCG_STATUS
:
1814 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1815 return get_msr_mce(vcpu
, msr
, pdata
);
1816 case MSR_K7_CLK_CTL
:
1818 * Provide expected ramp-up count for K7. All other
1819 * are set to zero, indicating minimum divisors for
1822 * This prevents guest kernels on AMD host with CPU
1823 * type 6, model 8 and higher from exploding due to
1824 * the rdmsr failing.
1828 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1829 if (kvm_hv_msr_partition_wide(msr
)) {
1831 mutex_lock(&vcpu
->kvm
->lock
);
1832 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1833 mutex_unlock(&vcpu
->kvm
->lock
);
1836 return get_msr_hyperv(vcpu
, msr
, pdata
);
1840 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1843 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1851 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1854 * Read or write a bunch of msrs. All parameters are kernel addresses.
1856 * @return number of msrs set successfully.
1858 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1859 struct kvm_msr_entry
*entries
,
1860 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1861 unsigned index
, u64
*data
))
1865 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1866 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1867 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1869 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1875 * Read or write a bunch of msrs. Parameters are user addresses.
1877 * @return number of msrs set successfully.
1879 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1880 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1881 unsigned index
, u64
*data
),
1884 struct kvm_msrs msrs
;
1885 struct kvm_msr_entry
*entries
;
1890 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1894 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1898 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1899 entries
= kmalloc(size
, GFP_KERNEL
);
1904 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1907 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1912 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1923 int kvm_dev_ioctl_check_extension(long ext
)
1928 case KVM_CAP_IRQCHIP
:
1930 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1931 case KVM_CAP_SET_TSS_ADDR
:
1932 case KVM_CAP_EXT_CPUID
:
1933 case KVM_CAP_CLOCKSOURCE
:
1935 case KVM_CAP_NOP_IO_DELAY
:
1936 case KVM_CAP_MP_STATE
:
1937 case KVM_CAP_SYNC_MMU
:
1938 case KVM_CAP_USER_NMI
:
1939 case KVM_CAP_REINJECT_CONTROL
:
1940 case KVM_CAP_IRQ_INJECT_STATUS
:
1941 case KVM_CAP_ASSIGN_DEV_IRQ
:
1943 case KVM_CAP_IOEVENTFD
:
1945 case KVM_CAP_PIT_STATE2
:
1946 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1947 case KVM_CAP_XEN_HVM
:
1948 case KVM_CAP_ADJUST_CLOCK
:
1949 case KVM_CAP_VCPU_EVENTS
:
1950 case KVM_CAP_HYPERV
:
1951 case KVM_CAP_HYPERV_VAPIC
:
1952 case KVM_CAP_HYPERV_SPIN
:
1953 case KVM_CAP_PCI_SEGMENT
:
1954 case KVM_CAP_DEBUGREGS
:
1955 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1957 case KVM_CAP_ASYNC_PF
:
1960 case KVM_CAP_COALESCED_MMIO
:
1961 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1964 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1966 case KVM_CAP_NR_VCPUS
:
1969 case KVM_CAP_NR_MEMSLOTS
:
1970 r
= KVM_MEMORY_SLOTS
;
1972 case KVM_CAP_PV_MMU
: /* obsolete */
1979 r
= KVM_MAX_MCE_BANKS
;
1992 long kvm_arch_dev_ioctl(struct file
*filp
,
1993 unsigned int ioctl
, unsigned long arg
)
1995 void __user
*argp
= (void __user
*)arg
;
1999 case KVM_GET_MSR_INDEX_LIST
: {
2000 struct kvm_msr_list __user
*user_msr_list
= argp
;
2001 struct kvm_msr_list msr_list
;
2005 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2008 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2009 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2012 if (n
< msr_list
.nmsrs
)
2015 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2016 num_msrs_to_save
* sizeof(u32
)))
2018 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2020 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2025 case KVM_GET_SUPPORTED_CPUID
: {
2026 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2027 struct kvm_cpuid2 cpuid
;
2030 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2032 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2033 cpuid_arg
->entries
);
2038 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2043 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2046 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2048 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2060 static void wbinvd_ipi(void *garbage
)
2065 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2067 return vcpu
->kvm
->arch
.iommu_domain
&&
2068 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2071 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2073 /* Address WBINVD may be executed by guest */
2074 if (need_emulate_wbinvd(vcpu
)) {
2075 if (kvm_x86_ops
->has_wbinvd_exit())
2076 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2077 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2078 smp_call_function_single(vcpu
->cpu
,
2079 wbinvd_ipi
, NULL
, 1);
2082 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2083 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2084 /* Make sure TSC doesn't go backwards */
2085 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2086 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2088 mark_tsc_unstable("KVM discovered backwards TSC");
2089 if (check_tsc_unstable()) {
2090 kvm_x86_ops
->adjust_tsc_offset(vcpu
, -tsc_delta
);
2091 vcpu
->arch
.tsc_catchup
= 1;
2092 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2094 if (vcpu
->cpu
!= cpu
)
2095 kvm_migrate_timers(vcpu
);
2100 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2102 kvm_x86_ops
->vcpu_put(vcpu
);
2103 kvm_put_guest_fpu(vcpu
);
2104 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2107 static int is_efer_nx(void)
2109 unsigned long long efer
= 0;
2111 rdmsrl_safe(MSR_EFER
, &efer
);
2112 return efer
& EFER_NX
;
2115 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
2118 struct kvm_cpuid_entry2
*e
, *entry
;
2121 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
2122 e
= &vcpu
->arch
.cpuid_entries
[i
];
2123 if (e
->function
== 0x80000001) {
2128 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
2129 entry
->edx
&= ~(1 << 20);
2130 printk(KERN_INFO
"kvm: guest NX capability removed\n");
2134 /* when an old userspace process fills a new kernel module */
2135 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
2136 struct kvm_cpuid
*cpuid
,
2137 struct kvm_cpuid_entry __user
*entries
)
2140 struct kvm_cpuid_entry
*cpuid_entries
;
2143 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2146 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
2150 if (copy_from_user(cpuid_entries
, entries
,
2151 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
2153 for (i
= 0; i
< cpuid
->nent
; i
++) {
2154 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
2155 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
2156 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
2157 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
2158 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
2159 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
2160 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
2161 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
2162 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
2163 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
2165 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2166 cpuid_fix_nx_cap(vcpu
);
2168 kvm_apic_set_version(vcpu
);
2169 kvm_x86_ops
->cpuid_update(vcpu
);
2173 vfree(cpuid_entries
);
2178 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
2179 struct kvm_cpuid2
*cpuid
,
2180 struct kvm_cpuid_entry2 __user
*entries
)
2185 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2188 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
2189 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
2191 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2192 kvm_apic_set_version(vcpu
);
2193 kvm_x86_ops
->cpuid_update(vcpu
);
2201 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
2202 struct kvm_cpuid2
*cpuid
,
2203 struct kvm_cpuid_entry2 __user
*entries
)
2208 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
2211 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
2212 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
2217 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
2221 static void cpuid_mask(u32
*word
, int wordnum
)
2223 *word
&= boot_cpu_data
.x86_capability
[wordnum
];
2226 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2229 entry
->function
= function
;
2230 entry
->index
= index
;
2231 cpuid_count(entry
->function
, entry
->index
,
2232 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
2236 #define F(x) bit(X86_FEATURE_##x)
2238 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2239 u32 index
, int *nent
, int maxnent
)
2241 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
2242 #ifdef CONFIG_X86_64
2243 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
2245 unsigned f_lm
= F(LM
);
2247 unsigned f_gbpages
= 0;
2250 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
2253 const u32 kvm_supported_word0_x86_features
=
2254 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2255 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2256 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
2257 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2258 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
2259 0 /* Reserved, DS, ACPI */ | F(MMX
) |
2260 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
2261 0 /* HTT, TM, Reserved, PBE */;
2262 /* cpuid 0x80000001.edx */
2263 const u32 kvm_supported_word1_x86_features
=
2264 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2265 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2266 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
2267 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2268 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
2269 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
2270 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
2271 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
2273 const u32 kvm_supported_word4_x86_features
=
2274 F(XMM3
) | F(PCLMULQDQ
) | 0 /* DTES64, MONITOR */ |
2275 0 /* DS-CPL, VMX, SMX, EST */ |
2276 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2277 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
2278 0 /* Reserved, DCA */ | F(XMM4_1
) |
2279 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
2280 0 /* Reserved*/ | F(AES
) | F(XSAVE
) | 0 /* OSXSAVE */ | F(AVX
) |
2282 /* cpuid 0x80000001.ecx */
2283 const u32 kvm_supported_word6_x86_features
=
2284 F(LAHF_LM
) | F(CMP_LEGACY
) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2285 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
2286 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP
) |
2287 0 /* SKINIT, WDT, LWP */ | F(FMA4
) | F(TBM
);
2289 /* all calls to cpuid_count() should be made on the same cpu */
2291 do_cpuid_1_ent(entry
, function
, index
);
2296 entry
->eax
= min(entry
->eax
, (u32
)0xd);
2299 entry
->edx
&= kvm_supported_word0_x86_features
;
2300 cpuid_mask(&entry
->edx
, 0);
2301 entry
->ecx
&= kvm_supported_word4_x86_features
;
2302 cpuid_mask(&entry
->ecx
, 4);
2303 /* we support x2apic emulation even if host does not support
2304 * it since we emulate x2apic in software */
2305 entry
->ecx
|= F(X2APIC
);
2307 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2308 * may return different values. This forces us to get_cpu() before
2309 * issuing the first command, and also to emulate this annoying behavior
2310 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2312 int t
, times
= entry
->eax
& 0xff;
2314 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2315 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
2316 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
2317 do_cpuid_1_ent(&entry
[t
], function
, 0);
2318 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2323 /* function 4 and 0xb have additional index. */
2327 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2328 /* read more entries until cache_type is zero */
2329 for (i
= 1; *nent
< maxnent
; ++i
) {
2330 cache_type
= entry
[i
- 1].eax
& 0x1f;
2333 do_cpuid_1_ent(&entry
[i
], function
, i
);
2335 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2343 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2344 /* read more entries until level_type is zero */
2345 for (i
= 1; *nent
< maxnent
; ++i
) {
2346 level_type
= entry
[i
- 1].ecx
& 0xff00;
2349 do_cpuid_1_ent(&entry
[i
], function
, i
);
2351 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2359 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2360 for (i
= 1; *nent
< maxnent
; ++i
) {
2361 if (entry
[i
- 1].eax
== 0 && i
!= 2)
2363 do_cpuid_1_ent(&entry
[i
], function
, i
);
2365 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2370 case KVM_CPUID_SIGNATURE
: {
2371 char signature
[12] = "KVMKVMKVM\0\0";
2372 u32
*sigptr
= (u32
*)signature
;
2374 entry
->ebx
= sigptr
[0];
2375 entry
->ecx
= sigptr
[1];
2376 entry
->edx
= sigptr
[2];
2379 case KVM_CPUID_FEATURES
:
2380 entry
->eax
= (1 << KVM_FEATURE_CLOCKSOURCE
) |
2381 (1 << KVM_FEATURE_NOP_IO_DELAY
) |
2382 (1 << KVM_FEATURE_CLOCKSOURCE2
) |
2383 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT
);
2389 entry
->eax
= min(entry
->eax
, 0x8000001a);
2392 entry
->edx
&= kvm_supported_word1_x86_features
;
2393 cpuid_mask(&entry
->edx
, 1);
2394 entry
->ecx
&= kvm_supported_word6_x86_features
;
2395 cpuid_mask(&entry
->ecx
, 6);
2399 kvm_x86_ops
->set_supported_cpuid(function
, entry
);
2406 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
2407 struct kvm_cpuid_entry2 __user
*entries
)
2409 struct kvm_cpuid_entry2
*cpuid_entries
;
2410 int limit
, nent
= 0, r
= -E2BIG
;
2413 if (cpuid
->nent
< 1)
2415 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2416 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
2418 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
2422 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
2423 limit
= cpuid_entries
[0].eax
;
2424 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2425 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2426 &nent
, cpuid
->nent
);
2428 if (nent
>= cpuid
->nent
)
2431 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
2432 limit
= cpuid_entries
[nent
- 1].eax
;
2433 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2434 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2435 &nent
, cpuid
->nent
);
2440 if (nent
>= cpuid
->nent
)
2443 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_SIGNATURE
, 0, &nent
,
2447 if (nent
>= cpuid
->nent
)
2450 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_FEATURES
, 0, &nent
,
2454 if (nent
>= cpuid
->nent
)
2458 if (copy_to_user(entries
, cpuid_entries
,
2459 nent
* sizeof(struct kvm_cpuid_entry2
)))
2465 vfree(cpuid_entries
);
2470 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2471 struct kvm_lapic_state
*s
)
2473 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2478 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2479 struct kvm_lapic_state
*s
)
2481 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2482 kvm_apic_post_state_restore(vcpu
);
2483 update_cr8_intercept(vcpu
);
2488 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2489 struct kvm_interrupt
*irq
)
2491 if (irq
->irq
< 0 || irq
->irq
>= 256)
2493 if (irqchip_in_kernel(vcpu
->kvm
))
2496 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2497 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2502 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2504 kvm_inject_nmi(vcpu
);
2509 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2510 struct kvm_tpr_access_ctl
*tac
)
2514 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2518 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2522 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2525 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2527 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2530 vcpu
->arch
.mcg_cap
= mcg_cap
;
2531 /* Init IA32_MCG_CTL to all 1s */
2532 if (mcg_cap
& MCG_CTL_P
)
2533 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2534 /* Init IA32_MCi_CTL to all 1s */
2535 for (bank
= 0; bank
< bank_num
; bank
++)
2536 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2541 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2542 struct kvm_x86_mce
*mce
)
2544 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2545 unsigned bank_num
= mcg_cap
& 0xff;
2546 u64
*banks
= vcpu
->arch
.mce_banks
;
2548 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2551 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2552 * reporting is disabled
2554 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2555 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2557 banks
+= 4 * mce
->bank
;
2559 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2560 * reporting is disabled for the bank
2562 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2564 if (mce
->status
& MCI_STATUS_UC
) {
2565 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2566 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2567 printk(KERN_DEBUG
"kvm: set_mce: "
2568 "injects mce exception while "
2569 "previous one is in progress!\n");
2570 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2573 if (banks
[1] & MCI_STATUS_VAL
)
2574 mce
->status
|= MCI_STATUS_OVER
;
2575 banks
[2] = mce
->addr
;
2576 banks
[3] = mce
->misc
;
2577 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2578 banks
[1] = mce
->status
;
2579 kvm_queue_exception(vcpu
, MC_VECTOR
);
2580 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2581 || !(banks
[1] & MCI_STATUS_UC
)) {
2582 if (banks
[1] & MCI_STATUS_VAL
)
2583 mce
->status
|= MCI_STATUS_OVER
;
2584 banks
[2] = mce
->addr
;
2585 banks
[3] = mce
->misc
;
2586 banks
[1] = mce
->status
;
2588 banks
[1] |= MCI_STATUS_OVER
;
2592 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2593 struct kvm_vcpu_events
*events
)
2595 events
->exception
.injected
=
2596 vcpu
->arch
.exception
.pending
&&
2597 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2598 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2599 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2600 events
->exception
.pad
= 0;
2601 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2603 events
->interrupt
.injected
=
2604 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2605 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2606 events
->interrupt
.soft
= 0;
2607 events
->interrupt
.shadow
=
2608 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2609 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2611 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2612 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2613 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2614 events
->nmi
.pad
= 0;
2616 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2618 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2619 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2620 | KVM_VCPUEVENT_VALID_SHADOW
);
2621 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2624 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2625 struct kvm_vcpu_events
*events
)
2627 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2628 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2629 | KVM_VCPUEVENT_VALID_SHADOW
))
2632 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2633 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2634 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2635 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2637 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2638 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2639 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2640 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2641 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2642 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2643 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2644 events
->interrupt
.shadow
);
2646 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2647 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2648 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2649 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2651 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2652 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2654 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2659 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2660 struct kvm_debugregs
*dbgregs
)
2662 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2663 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2664 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2666 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2669 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2670 struct kvm_debugregs
*dbgregs
)
2675 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2676 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2677 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2682 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2683 struct kvm_xsave
*guest_xsave
)
2686 memcpy(guest_xsave
->region
,
2687 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2690 memcpy(guest_xsave
->region
,
2691 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2692 sizeof(struct i387_fxsave_struct
));
2693 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2698 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2699 struct kvm_xsave
*guest_xsave
)
2702 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2705 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2706 guest_xsave
->region
, xstate_size
);
2708 if (xstate_bv
& ~XSTATE_FPSSE
)
2710 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2711 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2716 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2717 struct kvm_xcrs
*guest_xcrs
)
2719 if (!cpu_has_xsave
) {
2720 guest_xcrs
->nr_xcrs
= 0;
2724 guest_xcrs
->nr_xcrs
= 1;
2725 guest_xcrs
->flags
= 0;
2726 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2727 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2730 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2731 struct kvm_xcrs
*guest_xcrs
)
2738 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2741 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2742 /* Only support XCR0 currently */
2743 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2744 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2745 guest_xcrs
->xcrs
[0].value
);
2753 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2754 unsigned int ioctl
, unsigned long arg
)
2756 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2757 void __user
*argp
= (void __user
*)arg
;
2760 struct kvm_lapic_state
*lapic
;
2761 struct kvm_xsave
*xsave
;
2762 struct kvm_xcrs
*xcrs
;
2768 case KVM_GET_LAPIC
: {
2770 if (!vcpu
->arch
.apic
)
2772 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2777 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2781 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2786 case KVM_SET_LAPIC
: {
2788 if (!vcpu
->arch
.apic
)
2790 u
.lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2795 if (copy_from_user(u
.lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2797 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2803 case KVM_INTERRUPT
: {
2804 struct kvm_interrupt irq
;
2807 if (copy_from_user(&irq
, argp
, sizeof irq
))
2809 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2816 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2822 case KVM_SET_CPUID
: {
2823 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2824 struct kvm_cpuid cpuid
;
2827 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2829 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2834 case KVM_SET_CPUID2
: {
2835 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2836 struct kvm_cpuid2 cpuid
;
2839 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2841 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2842 cpuid_arg
->entries
);
2847 case KVM_GET_CPUID2
: {
2848 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2849 struct kvm_cpuid2 cpuid
;
2852 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2854 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2855 cpuid_arg
->entries
);
2859 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2865 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2868 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2870 case KVM_TPR_ACCESS_REPORTING
: {
2871 struct kvm_tpr_access_ctl tac
;
2874 if (copy_from_user(&tac
, argp
, sizeof tac
))
2876 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2880 if (copy_to_user(argp
, &tac
, sizeof tac
))
2885 case KVM_SET_VAPIC_ADDR
: {
2886 struct kvm_vapic_addr va
;
2889 if (!irqchip_in_kernel(vcpu
->kvm
))
2892 if (copy_from_user(&va
, argp
, sizeof va
))
2895 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2898 case KVM_X86_SETUP_MCE
: {
2902 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2904 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2907 case KVM_X86_SET_MCE
: {
2908 struct kvm_x86_mce mce
;
2911 if (copy_from_user(&mce
, argp
, sizeof mce
))
2913 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2916 case KVM_GET_VCPU_EVENTS
: {
2917 struct kvm_vcpu_events events
;
2919 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2922 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2927 case KVM_SET_VCPU_EVENTS
: {
2928 struct kvm_vcpu_events events
;
2931 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2934 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2937 case KVM_GET_DEBUGREGS
: {
2938 struct kvm_debugregs dbgregs
;
2940 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2943 if (copy_to_user(argp
, &dbgregs
,
2944 sizeof(struct kvm_debugregs
)))
2949 case KVM_SET_DEBUGREGS
: {
2950 struct kvm_debugregs dbgregs
;
2953 if (copy_from_user(&dbgregs
, argp
,
2954 sizeof(struct kvm_debugregs
)))
2957 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2960 case KVM_GET_XSAVE
: {
2961 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2966 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2969 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
2974 case KVM_SET_XSAVE
: {
2975 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2981 if (copy_from_user(u
.xsave
, argp
, sizeof(struct kvm_xsave
)))
2984 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
2987 case KVM_GET_XCRS
: {
2988 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2993 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
2996 if (copy_to_user(argp
, u
.xcrs
,
2997 sizeof(struct kvm_xcrs
)))
3002 case KVM_SET_XCRS
: {
3003 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3009 if (copy_from_user(u
.xcrs
, argp
,
3010 sizeof(struct kvm_xcrs
)))
3013 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3024 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3028 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3030 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3034 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3037 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3041 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3042 u32 kvm_nr_mmu_pages
)
3044 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3047 mutex_lock(&kvm
->slots_lock
);
3048 spin_lock(&kvm
->mmu_lock
);
3050 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3051 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3053 spin_unlock(&kvm
->mmu_lock
);
3054 mutex_unlock(&kvm
->slots_lock
);
3058 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3060 return kvm
->arch
.n_max_mmu_pages
;
3063 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3068 switch (chip
->chip_id
) {
3069 case KVM_IRQCHIP_PIC_MASTER
:
3070 memcpy(&chip
->chip
.pic
,
3071 &pic_irqchip(kvm
)->pics
[0],
3072 sizeof(struct kvm_pic_state
));
3074 case KVM_IRQCHIP_PIC_SLAVE
:
3075 memcpy(&chip
->chip
.pic
,
3076 &pic_irqchip(kvm
)->pics
[1],
3077 sizeof(struct kvm_pic_state
));
3079 case KVM_IRQCHIP_IOAPIC
:
3080 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3089 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3094 switch (chip
->chip_id
) {
3095 case KVM_IRQCHIP_PIC_MASTER
:
3096 spin_lock(&pic_irqchip(kvm
)->lock
);
3097 memcpy(&pic_irqchip(kvm
)->pics
[0],
3099 sizeof(struct kvm_pic_state
));
3100 spin_unlock(&pic_irqchip(kvm
)->lock
);
3102 case KVM_IRQCHIP_PIC_SLAVE
:
3103 spin_lock(&pic_irqchip(kvm
)->lock
);
3104 memcpy(&pic_irqchip(kvm
)->pics
[1],
3106 sizeof(struct kvm_pic_state
));
3107 spin_unlock(&pic_irqchip(kvm
)->lock
);
3109 case KVM_IRQCHIP_IOAPIC
:
3110 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3116 kvm_pic_update_irq(pic_irqchip(kvm
));
3120 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3124 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3125 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3126 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3130 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3134 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3135 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3136 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3137 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3141 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3145 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3146 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3147 sizeof(ps
->channels
));
3148 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3149 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3150 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3154 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3156 int r
= 0, start
= 0;
3157 u32 prev_legacy
, cur_legacy
;
3158 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3159 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3160 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3161 if (!prev_legacy
&& cur_legacy
)
3163 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3164 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3165 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3166 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3167 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3171 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3172 struct kvm_reinject_control
*control
)
3174 if (!kvm
->arch
.vpit
)
3176 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3177 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3178 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3183 * Get (and clear) the dirty memory log for a memory slot.
3185 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
3186 struct kvm_dirty_log
*log
)
3189 struct kvm_memory_slot
*memslot
;
3191 unsigned long is_dirty
= 0;
3193 mutex_lock(&kvm
->slots_lock
);
3196 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3199 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
3201 if (!memslot
->dirty_bitmap
)
3204 n
= kvm_dirty_bitmap_bytes(memslot
);
3206 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
3207 is_dirty
= memslot
->dirty_bitmap
[i
];
3209 /* If nothing is dirty, don't bother messing with page tables. */
3211 struct kvm_memslots
*slots
, *old_slots
;
3212 unsigned long *dirty_bitmap
;
3214 dirty_bitmap
= memslot
->dirty_bitmap_head
;
3215 if (memslot
->dirty_bitmap
== dirty_bitmap
)
3216 dirty_bitmap
+= n
/ sizeof(long);
3217 memset(dirty_bitmap
, 0, n
);
3220 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
3223 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
3224 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
3225 slots
->generation
++;
3227 old_slots
= kvm
->memslots
;
3228 rcu_assign_pointer(kvm
->memslots
, slots
);
3229 synchronize_srcu_expedited(&kvm
->srcu
);
3230 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
3233 spin_lock(&kvm
->mmu_lock
);
3234 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
3235 spin_unlock(&kvm
->mmu_lock
);
3238 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
3242 if (clear_user(log
->dirty_bitmap
, n
))
3248 mutex_unlock(&kvm
->slots_lock
);
3252 long kvm_arch_vm_ioctl(struct file
*filp
,
3253 unsigned int ioctl
, unsigned long arg
)
3255 struct kvm
*kvm
= filp
->private_data
;
3256 void __user
*argp
= (void __user
*)arg
;
3259 * This union makes it completely explicit to gcc-3.x
3260 * that these two variables' stack usage should be
3261 * combined, not added together.
3264 struct kvm_pit_state ps
;
3265 struct kvm_pit_state2 ps2
;
3266 struct kvm_pit_config pit_config
;
3270 case KVM_SET_TSS_ADDR
:
3271 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3275 case KVM_SET_IDENTITY_MAP_ADDR
: {
3279 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3281 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3286 case KVM_SET_NR_MMU_PAGES
:
3287 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3291 case KVM_GET_NR_MMU_PAGES
:
3292 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3294 case KVM_CREATE_IRQCHIP
: {
3295 struct kvm_pic
*vpic
;
3297 mutex_lock(&kvm
->lock
);
3300 goto create_irqchip_unlock
;
3302 vpic
= kvm_create_pic(kvm
);
3304 r
= kvm_ioapic_init(kvm
);
3306 mutex_lock(&kvm
->slots_lock
);
3307 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3309 mutex_unlock(&kvm
->slots_lock
);
3311 goto create_irqchip_unlock
;
3314 goto create_irqchip_unlock
;
3316 kvm
->arch
.vpic
= vpic
;
3318 r
= kvm_setup_default_irq_routing(kvm
);
3320 mutex_lock(&kvm
->slots_lock
);
3321 mutex_lock(&kvm
->irq_lock
);
3322 kvm_ioapic_destroy(kvm
);
3323 kvm_destroy_pic(kvm
);
3324 mutex_unlock(&kvm
->irq_lock
);
3325 mutex_unlock(&kvm
->slots_lock
);
3327 create_irqchip_unlock
:
3328 mutex_unlock(&kvm
->lock
);
3331 case KVM_CREATE_PIT
:
3332 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3334 case KVM_CREATE_PIT2
:
3336 if (copy_from_user(&u
.pit_config
, argp
,
3337 sizeof(struct kvm_pit_config
)))
3340 mutex_lock(&kvm
->slots_lock
);
3343 goto create_pit_unlock
;
3345 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3349 mutex_unlock(&kvm
->slots_lock
);
3351 case KVM_IRQ_LINE_STATUS
:
3352 case KVM_IRQ_LINE
: {
3353 struct kvm_irq_level irq_event
;
3356 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3359 if (irqchip_in_kernel(kvm
)) {
3361 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3362 irq_event
.irq
, irq_event
.level
);
3363 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3365 irq_event
.status
= status
;
3366 if (copy_to_user(argp
, &irq_event
,
3374 case KVM_GET_IRQCHIP
: {
3375 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3376 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3382 if (copy_from_user(chip
, argp
, sizeof *chip
))
3383 goto get_irqchip_out
;
3385 if (!irqchip_in_kernel(kvm
))
3386 goto get_irqchip_out
;
3387 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3389 goto get_irqchip_out
;
3391 if (copy_to_user(argp
, chip
, sizeof *chip
))
3392 goto get_irqchip_out
;
3400 case KVM_SET_IRQCHIP
: {
3401 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3402 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3408 if (copy_from_user(chip
, argp
, sizeof *chip
))
3409 goto set_irqchip_out
;
3411 if (!irqchip_in_kernel(kvm
))
3412 goto set_irqchip_out
;
3413 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3415 goto set_irqchip_out
;
3425 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3428 if (!kvm
->arch
.vpit
)
3430 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3434 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3441 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3444 if (!kvm
->arch
.vpit
)
3446 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3452 case KVM_GET_PIT2
: {
3454 if (!kvm
->arch
.vpit
)
3456 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3460 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3465 case KVM_SET_PIT2
: {
3467 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3470 if (!kvm
->arch
.vpit
)
3472 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3478 case KVM_REINJECT_CONTROL
: {
3479 struct kvm_reinject_control control
;
3481 if (copy_from_user(&control
, argp
, sizeof(control
)))
3483 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3489 case KVM_XEN_HVM_CONFIG
: {
3491 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3492 sizeof(struct kvm_xen_hvm_config
)))
3495 if (kvm
->arch
.xen_hvm_config
.flags
)
3500 case KVM_SET_CLOCK
: {
3501 struct kvm_clock_data user_ns
;
3506 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3514 local_irq_disable();
3515 now_ns
= get_kernel_ns();
3516 delta
= user_ns
.clock
- now_ns
;
3518 kvm
->arch
.kvmclock_offset
= delta
;
3521 case KVM_GET_CLOCK
: {
3522 struct kvm_clock_data user_ns
;
3525 local_irq_disable();
3526 now_ns
= get_kernel_ns();
3527 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3530 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3533 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3546 static void kvm_init_msr_list(void)
3551 /* skip the first msrs in the list. KVM-specific */
3552 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3553 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3556 msrs_to_save
[j
] = msrs_to_save
[i
];
3559 num_msrs_to_save
= j
;
3562 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3565 if (vcpu
->arch
.apic
&&
3566 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3569 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3572 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3574 if (vcpu
->arch
.apic
&&
3575 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3578 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3581 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3582 struct kvm_segment
*var
, int seg
)
3584 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3587 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3588 struct kvm_segment
*var
, int seg
)
3590 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3593 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3598 static gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3601 struct x86_exception exception
;
3603 BUG_ON(!mmu_is_nested(vcpu
));
3605 /* NPT walks are always user-walks */
3606 access
|= PFERR_USER_MASK
;
3607 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3612 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3613 struct x86_exception
*exception
)
3615 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3616 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3619 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3620 struct x86_exception
*exception
)
3622 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3623 access
|= PFERR_FETCH_MASK
;
3624 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3627 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3628 struct x86_exception
*exception
)
3630 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3631 access
|= PFERR_WRITE_MASK
;
3632 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3635 /* uses this to access any guest's mapped memory without checking CPL */
3636 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3637 struct x86_exception
*exception
)
3639 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3642 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3643 struct kvm_vcpu
*vcpu
, u32 access
,
3644 struct x86_exception
*exception
)
3647 int r
= X86EMUL_CONTINUE
;
3650 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3652 unsigned offset
= addr
& (PAGE_SIZE
-1);
3653 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3656 if (gpa
== UNMAPPED_GVA
)
3657 return X86EMUL_PROPAGATE_FAULT
;
3658 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3660 r
= X86EMUL_IO_NEEDED
;
3672 /* used for instruction fetching */
3673 static int kvm_fetch_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3674 struct kvm_vcpu
*vcpu
,
3675 struct x86_exception
*exception
)
3677 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3678 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3679 access
| PFERR_FETCH_MASK
,
3683 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3684 struct kvm_vcpu
*vcpu
,
3685 struct x86_exception
*exception
)
3687 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3688 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3692 static int kvm_read_guest_virt_system(gva_t addr
, void *val
, unsigned int bytes
,
3693 struct kvm_vcpu
*vcpu
,
3694 struct x86_exception
*exception
)
3696 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3699 static int kvm_write_guest_virt_system(gva_t addr
, void *val
,
3701 struct kvm_vcpu
*vcpu
,
3702 struct x86_exception
*exception
)
3705 int r
= X86EMUL_CONTINUE
;
3708 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3711 unsigned offset
= addr
& (PAGE_SIZE
-1);
3712 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3715 if (gpa
== UNMAPPED_GVA
)
3716 return X86EMUL_PROPAGATE_FAULT
;
3717 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3719 r
= X86EMUL_IO_NEEDED
;
3731 static int emulator_read_emulated(unsigned long addr
,
3734 struct x86_exception
*exception
,
3735 struct kvm_vcpu
*vcpu
)
3739 if (vcpu
->mmio_read_completed
) {
3740 memcpy(val
, vcpu
->mmio_data
, bytes
);
3741 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3742 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3743 vcpu
->mmio_read_completed
= 0;
3744 return X86EMUL_CONTINUE
;
3747 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, exception
);
3749 if (gpa
== UNMAPPED_GVA
)
3750 return X86EMUL_PROPAGATE_FAULT
;
3752 /* For APIC access vmexit */
3753 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3756 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
, exception
)
3757 == X86EMUL_CONTINUE
)
3758 return X86EMUL_CONTINUE
;
3762 * Is this MMIO handled locally?
3764 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3765 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3766 return X86EMUL_CONTINUE
;
3769 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3771 vcpu
->mmio_needed
= 1;
3772 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3773 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3774 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3775 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 0;
3777 return X86EMUL_IO_NEEDED
;
3780 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3781 const void *val
, int bytes
)
3785 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3788 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3792 static int emulator_write_emulated_onepage(unsigned long addr
,
3795 struct x86_exception
*exception
,
3796 struct kvm_vcpu
*vcpu
)
3800 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, exception
);
3802 if (gpa
== UNMAPPED_GVA
)
3803 return X86EMUL_PROPAGATE_FAULT
;
3805 /* For APIC access vmexit */
3806 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3809 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3810 return X86EMUL_CONTINUE
;
3813 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3815 * Is this MMIO handled locally?
3817 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3818 return X86EMUL_CONTINUE
;
3820 vcpu
->mmio_needed
= 1;
3821 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3822 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3823 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3824 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 1;
3825 memcpy(vcpu
->run
->mmio
.data
, val
, bytes
);
3827 return X86EMUL_CONTINUE
;
3830 int emulator_write_emulated(unsigned long addr
,
3833 struct x86_exception
*exception
,
3834 struct kvm_vcpu
*vcpu
)
3836 /* Crossing a page boundary? */
3837 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3840 now
= -addr
& ~PAGE_MASK
;
3841 rc
= emulator_write_emulated_onepage(addr
, val
, now
, exception
,
3843 if (rc
!= X86EMUL_CONTINUE
)
3849 return emulator_write_emulated_onepage(addr
, val
, bytes
, exception
,
3853 #define CMPXCHG_TYPE(t, ptr, old, new) \
3854 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3856 #ifdef CONFIG_X86_64
3857 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3859 # define CMPXCHG64(ptr, old, new) \
3860 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3863 static int emulator_cmpxchg_emulated(unsigned long addr
,
3867 struct x86_exception
*exception
,
3868 struct kvm_vcpu
*vcpu
)
3875 /* guests cmpxchg8b have to be emulated atomically */
3876 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3879 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3881 if (gpa
== UNMAPPED_GVA
||
3882 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3885 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3888 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3889 if (is_error_page(page
)) {
3890 kvm_release_page_clean(page
);
3894 kaddr
= kmap_atomic(page
, KM_USER0
);
3895 kaddr
+= offset_in_page(gpa
);
3898 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3901 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3904 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3907 exchanged
= CMPXCHG64(kaddr
, old
, new);
3912 kunmap_atomic(kaddr
, KM_USER0
);
3913 kvm_release_page_dirty(page
);
3916 return X86EMUL_CMPXCHG_FAILED
;
3918 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
, 1);
3920 return X86EMUL_CONTINUE
;
3923 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3925 return emulator_write_emulated(addr
, new, bytes
, exception
, vcpu
);
3928 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3930 /* TODO: String I/O for in kernel device */
3933 if (vcpu
->arch
.pio
.in
)
3934 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3935 vcpu
->arch
.pio
.size
, pd
);
3937 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3938 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3944 static int emulator_pio_in_emulated(int size
, unsigned short port
, void *val
,
3945 unsigned int count
, struct kvm_vcpu
*vcpu
)
3947 if (vcpu
->arch
.pio
.count
)
3950 trace_kvm_pio(0, port
, size
, count
);
3952 vcpu
->arch
.pio
.port
= port
;
3953 vcpu
->arch
.pio
.in
= 1;
3954 vcpu
->arch
.pio
.count
= count
;
3955 vcpu
->arch
.pio
.size
= size
;
3957 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3959 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
3960 vcpu
->arch
.pio
.count
= 0;
3964 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3965 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
3966 vcpu
->run
->io
.size
= size
;
3967 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3968 vcpu
->run
->io
.count
= count
;
3969 vcpu
->run
->io
.port
= port
;
3974 static int emulator_pio_out_emulated(int size
, unsigned short port
,
3975 const void *val
, unsigned int count
,
3976 struct kvm_vcpu
*vcpu
)
3978 trace_kvm_pio(1, port
, size
, count
);
3980 vcpu
->arch
.pio
.port
= port
;
3981 vcpu
->arch
.pio
.in
= 0;
3982 vcpu
->arch
.pio
.count
= count
;
3983 vcpu
->arch
.pio
.size
= size
;
3985 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
3987 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3988 vcpu
->arch
.pio
.count
= 0;
3992 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3993 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
3994 vcpu
->run
->io
.size
= size
;
3995 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3996 vcpu
->run
->io
.count
= count
;
3997 vcpu
->run
->io
.port
= port
;
4002 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4004 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4007 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
4009 kvm_mmu_invlpg(vcpu
, address
);
4010 return X86EMUL_CONTINUE
;
4013 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4015 if (!need_emulate_wbinvd(vcpu
))
4016 return X86EMUL_CONTINUE
;
4018 if (kvm_x86_ops
->has_wbinvd_exit()) {
4019 int cpu
= get_cpu();
4021 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4022 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4023 wbinvd_ipi
, NULL
, 1);
4025 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4028 return X86EMUL_CONTINUE
;
4030 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4032 int emulate_clts(struct kvm_vcpu
*vcpu
)
4034 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
4035 kvm_x86_ops
->fpu_activate(vcpu
);
4036 return X86EMUL_CONTINUE
;
4039 int emulator_get_dr(int dr
, unsigned long *dest
, struct kvm_vcpu
*vcpu
)
4041 return _kvm_get_dr(vcpu
, dr
, dest
);
4044 int emulator_set_dr(int dr
, unsigned long value
, struct kvm_vcpu
*vcpu
)
4047 return __kvm_set_dr(vcpu
, dr
, value
);
4050 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4052 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4055 static unsigned long emulator_get_cr(int cr
, struct kvm_vcpu
*vcpu
)
4057 unsigned long value
;
4061 value
= kvm_read_cr0(vcpu
);
4064 value
= vcpu
->arch
.cr2
;
4067 value
= vcpu
->arch
.cr3
;
4070 value
= kvm_read_cr4(vcpu
);
4073 value
= kvm_get_cr8(vcpu
);
4076 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4083 static int emulator_set_cr(int cr
, unsigned long val
, struct kvm_vcpu
*vcpu
)
4089 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4092 vcpu
->arch
.cr2
= val
;
4095 res
= kvm_set_cr3(vcpu
, val
);
4098 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4101 res
= kvm_set_cr8(vcpu
, val
);
4104 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4111 static int emulator_get_cpl(struct kvm_vcpu
*vcpu
)
4113 return kvm_x86_ops
->get_cpl(vcpu
);
4116 static void emulator_get_gdt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4118 kvm_x86_ops
->get_gdt(vcpu
, dt
);
4121 static void emulator_get_idt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4123 kvm_x86_ops
->get_idt(vcpu
, dt
);
4126 static unsigned long emulator_get_cached_segment_base(int seg
,
4127 struct kvm_vcpu
*vcpu
)
4129 return get_segment_base(vcpu
, seg
);
4132 static bool emulator_get_cached_descriptor(struct desc_struct
*desc
, int seg
,
4133 struct kvm_vcpu
*vcpu
)
4135 struct kvm_segment var
;
4137 kvm_get_segment(vcpu
, &var
, seg
);
4144 set_desc_limit(desc
, var
.limit
);
4145 set_desc_base(desc
, (unsigned long)var
.base
);
4146 desc
->type
= var
.type
;
4148 desc
->dpl
= var
.dpl
;
4149 desc
->p
= var
.present
;
4150 desc
->avl
= var
.avl
;
4158 static void emulator_set_cached_descriptor(struct desc_struct
*desc
, int seg
,
4159 struct kvm_vcpu
*vcpu
)
4161 struct kvm_segment var
;
4163 /* needed to preserve selector */
4164 kvm_get_segment(vcpu
, &var
, seg
);
4166 var
.base
= get_desc_base(desc
);
4167 var
.limit
= get_desc_limit(desc
);
4169 var
.limit
= (var
.limit
<< 12) | 0xfff;
4170 var
.type
= desc
->type
;
4171 var
.present
= desc
->p
;
4172 var
.dpl
= desc
->dpl
;
4177 var
.avl
= desc
->avl
;
4178 var
.present
= desc
->p
;
4179 var
.unusable
= !var
.present
;
4182 kvm_set_segment(vcpu
, &var
, seg
);
4186 static u16
emulator_get_segment_selector(int seg
, struct kvm_vcpu
*vcpu
)
4188 struct kvm_segment kvm_seg
;
4190 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4191 return kvm_seg
.selector
;
4194 static void emulator_set_segment_selector(u16 sel
, int seg
,
4195 struct kvm_vcpu
*vcpu
)
4197 struct kvm_segment kvm_seg
;
4199 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4200 kvm_seg
.selector
= sel
;
4201 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4204 static struct x86_emulate_ops emulate_ops
= {
4205 .read_std
= kvm_read_guest_virt_system
,
4206 .write_std
= kvm_write_guest_virt_system
,
4207 .fetch
= kvm_fetch_guest_virt
,
4208 .read_emulated
= emulator_read_emulated
,
4209 .write_emulated
= emulator_write_emulated
,
4210 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4211 .pio_in_emulated
= emulator_pio_in_emulated
,
4212 .pio_out_emulated
= emulator_pio_out_emulated
,
4213 .get_cached_descriptor
= emulator_get_cached_descriptor
,
4214 .set_cached_descriptor
= emulator_set_cached_descriptor
,
4215 .get_segment_selector
= emulator_get_segment_selector
,
4216 .set_segment_selector
= emulator_set_segment_selector
,
4217 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4218 .get_gdt
= emulator_get_gdt
,
4219 .get_idt
= emulator_get_idt
,
4220 .get_cr
= emulator_get_cr
,
4221 .set_cr
= emulator_set_cr
,
4222 .cpl
= emulator_get_cpl
,
4223 .get_dr
= emulator_get_dr
,
4224 .set_dr
= emulator_set_dr
,
4225 .set_msr
= kvm_set_msr
,
4226 .get_msr
= kvm_get_msr
,
4229 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4231 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4232 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4233 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4234 vcpu
->arch
.regs_dirty
= ~0;
4237 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4239 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4241 * an sti; sti; sequence only disable interrupts for the first
4242 * instruction. So, if the last instruction, be it emulated or
4243 * not, left the system with the INT_STI flag enabled, it
4244 * means that the last instruction is an sti. We should not
4245 * leave the flag on in this case. The same goes for mov ss
4247 if (!(int_shadow
& mask
))
4248 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4251 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4253 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4254 if (ctxt
->exception
.vector
== PF_VECTOR
)
4255 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4256 else if (ctxt
->exception
.error_code_valid
)
4257 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4258 ctxt
->exception
.error_code
);
4260 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4263 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4265 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4268 cache_all_regs(vcpu
);
4270 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4272 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
4273 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4274 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
4275 vcpu
->arch
.emulate_ctxt
.mode
=
4276 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4277 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
4278 ? X86EMUL_MODE_VM86
: cs_l
4279 ? X86EMUL_MODE_PROT64
: cs_db
4280 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
4281 memset(c
, 0, sizeof(struct decode_cache
));
4282 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4285 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
)
4287 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4290 init_emulate_ctxt(vcpu
);
4292 vcpu
->arch
.emulate_ctxt
.decode
.op_bytes
= 2;
4293 vcpu
->arch
.emulate_ctxt
.decode
.ad_bytes
= 2;
4294 vcpu
->arch
.emulate_ctxt
.decode
.eip
= vcpu
->arch
.emulate_ctxt
.eip
;
4295 ret
= emulate_int_real(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
, irq
);
4297 if (ret
!= X86EMUL_CONTINUE
)
4298 return EMULATE_FAIL
;
4300 vcpu
->arch
.emulate_ctxt
.eip
= c
->eip
;
4301 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4302 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4303 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4305 if (irq
== NMI_VECTOR
)
4306 vcpu
->arch
.nmi_pending
= false;
4308 vcpu
->arch
.interrupt
.pending
= false;
4310 return EMULATE_DONE
;
4312 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4314 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4316 int r
= EMULATE_DONE
;
4318 ++vcpu
->stat
.insn_emulation_fail
;
4319 trace_kvm_emulate_insn_failed(vcpu
);
4320 if (!is_guest_mode(vcpu
)) {
4321 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4322 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4323 vcpu
->run
->internal
.ndata
= 0;
4326 kvm_queue_exception(vcpu
, UD_VECTOR
);
4331 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4339 * if emulation was due to access to shadowed page table
4340 * and it failed try to unshadow page and re-entetr the
4341 * guest to let CPU execute the instruction.
4343 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4346 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4348 if (gpa
== UNMAPPED_GVA
)
4349 return true; /* let cpu generate fault */
4351 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4357 int emulate_instruction(struct kvm_vcpu
*vcpu
,
4363 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4365 kvm_clear_exception_queue(vcpu
);
4366 vcpu
->arch
.mmio_fault_cr2
= cr2
;
4368 * TODO: fix emulate.c to use guest_read/write_register
4369 * instead of direct ->regs accesses, can save hundred cycles
4370 * on Intel for instructions that don't read/change RSP, for
4373 cache_all_regs(vcpu
);
4375 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4376 init_emulate_ctxt(vcpu
);
4377 vcpu
->arch
.emulate_ctxt
.interruptibility
= 0;
4378 vcpu
->arch
.emulate_ctxt
.have_exception
= false;
4379 vcpu
->arch
.emulate_ctxt
.perm_ok
= false;
4381 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
);
4382 if (r
== X86EMUL_PROPAGATE_FAULT
)
4385 trace_kvm_emulate_insn_start(vcpu
);
4387 /* Only allow emulation of specific instructions on #UD
4388 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4389 if (emulation_type
& EMULTYPE_TRAP_UD
) {
4391 return EMULATE_FAIL
;
4393 case 0x01: /* VMMCALL */
4394 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
4395 return EMULATE_FAIL
;
4397 case 0x34: /* sysenter */
4398 case 0x35: /* sysexit */
4399 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4400 return EMULATE_FAIL
;
4402 case 0x05: /* syscall */
4403 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4404 return EMULATE_FAIL
;
4407 return EMULATE_FAIL
;
4410 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
4411 return EMULATE_FAIL
;
4414 ++vcpu
->stat
.insn_emulation
;
4416 if (reexecute_instruction(vcpu
, cr2
))
4417 return EMULATE_DONE
;
4418 if (emulation_type
& EMULTYPE_SKIP
)
4419 return EMULATE_FAIL
;
4420 return handle_emulation_failure(vcpu
);
4424 if (emulation_type
& EMULTYPE_SKIP
) {
4425 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
4426 return EMULATE_DONE
;
4429 /* this is needed for vmware backdor interface to work since it
4430 changes registers values during IO operation */
4431 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4434 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
);
4436 if (r
== EMULATION_FAILED
) {
4437 if (reexecute_instruction(vcpu
, cr2
))
4438 return EMULATE_DONE
;
4440 return handle_emulation_failure(vcpu
);
4444 if (vcpu
->arch
.emulate_ctxt
.have_exception
) {
4445 inject_emulated_exception(vcpu
);
4447 } else if (vcpu
->arch
.pio
.count
) {
4448 if (!vcpu
->arch
.pio
.in
)
4449 vcpu
->arch
.pio
.count
= 0;
4450 r
= EMULATE_DO_MMIO
;
4451 } else if (vcpu
->mmio_needed
) {
4452 if (vcpu
->mmio_is_write
)
4453 vcpu
->mmio_needed
= 0;
4454 r
= EMULATE_DO_MMIO
;
4455 } else if (r
== EMULATION_RESTART
)
4460 toggle_interruptibility(vcpu
, vcpu
->arch
.emulate_ctxt
.interruptibility
);
4461 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4462 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4463 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4464 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4468 EXPORT_SYMBOL_GPL(emulate_instruction
);
4470 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4472 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4473 int ret
= emulator_pio_out_emulated(size
, port
, &val
, 1, vcpu
);
4474 /* do not return to emulator after return from userspace */
4475 vcpu
->arch
.pio
.count
= 0;
4478 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4480 static void tsc_bad(void *info
)
4482 __get_cpu_var(cpu_tsc_khz
) = 0;
4485 static void tsc_khz_changed(void *data
)
4487 struct cpufreq_freqs
*freq
= data
;
4488 unsigned long khz
= 0;
4492 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4493 khz
= cpufreq_quick_get(raw_smp_processor_id());
4496 __get_cpu_var(cpu_tsc_khz
) = khz
;
4499 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4502 struct cpufreq_freqs
*freq
= data
;
4504 struct kvm_vcpu
*vcpu
;
4505 int i
, send_ipi
= 0;
4508 * We allow guests to temporarily run on slowing clocks,
4509 * provided we notify them after, or to run on accelerating
4510 * clocks, provided we notify them before. Thus time never
4513 * However, we have a problem. We can't atomically update
4514 * the frequency of a given CPU from this function; it is
4515 * merely a notifier, which can be called from any CPU.
4516 * Changing the TSC frequency at arbitrary points in time
4517 * requires a recomputation of local variables related to
4518 * the TSC for each VCPU. We must flag these local variables
4519 * to be updated and be sure the update takes place with the
4520 * new frequency before any guests proceed.
4522 * Unfortunately, the combination of hotplug CPU and frequency
4523 * change creates an intractable locking scenario; the order
4524 * of when these callouts happen is undefined with respect to
4525 * CPU hotplug, and they can race with each other. As such,
4526 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4527 * undefined; you can actually have a CPU frequency change take
4528 * place in between the computation of X and the setting of the
4529 * variable. To protect against this problem, all updates of
4530 * the per_cpu tsc_khz variable are done in an interrupt
4531 * protected IPI, and all callers wishing to update the value
4532 * must wait for a synchronous IPI to complete (which is trivial
4533 * if the caller is on the CPU already). This establishes the
4534 * necessary total order on variable updates.
4536 * Note that because a guest time update may take place
4537 * anytime after the setting of the VCPU's request bit, the
4538 * correct TSC value must be set before the request. However,
4539 * to ensure the update actually makes it to any guest which
4540 * starts running in hardware virtualization between the set
4541 * and the acquisition of the spinlock, we must also ping the
4542 * CPU after setting the request bit.
4546 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4548 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4551 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4553 spin_lock(&kvm_lock
);
4554 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4555 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4556 if (vcpu
->cpu
!= freq
->cpu
)
4558 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4559 if (vcpu
->cpu
!= smp_processor_id())
4563 spin_unlock(&kvm_lock
);
4565 if (freq
->old
< freq
->new && send_ipi
) {
4567 * We upscale the frequency. Must make the guest
4568 * doesn't see old kvmclock values while running with
4569 * the new frequency, otherwise we risk the guest sees
4570 * time go backwards.
4572 * In case we update the frequency for another cpu
4573 * (which might be in guest context) send an interrupt
4574 * to kick the cpu out of guest context. Next time
4575 * guest context is entered kvmclock will be updated,
4576 * so the guest will not see stale values.
4578 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4583 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4584 .notifier_call
= kvmclock_cpufreq_notifier
4587 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4588 unsigned long action
, void *hcpu
)
4590 unsigned int cpu
= (unsigned long)hcpu
;
4594 case CPU_DOWN_FAILED
:
4595 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4597 case CPU_DOWN_PREPARE
:
4598 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4604 static struct notifier_block kvmclock_cpu_notifier_block
= {
4605 .notifier_call
= kvmclock_cpu_notifier
,
4606 .priority
= -INT_MAX
4609 static void kvm_timer_init(void)
4613 max_tsc_khz
= tsc_khz
;
4614 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4615 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4616 #ifdef CONFIG_CPU_FREQ
4617 struct cpufreq_policy policy
;
4618 memset(&policy
, 0, sizeof(policy
));
4620 cpufreq_get_policy(&policy
, cpu
);
4621 if (policy
.cpuinfo
.max_freq
)
4622 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4625 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4626 CPUFREQ_TRANSITION_NOTIFIER
);
4628 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4629 for_each_online_cpu(cpu
)
4630 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4633 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4635 static int kvm_is_in_guest(void)
4637 return percpu_read(current_vcpu
) != NULL
;
4640 static int kvm_is_user_mode(void)
4644 if (percpu_read(current_vcpu
))
4645 user_mode
= kvm_x86_ops
->get_cpl(percpu_read(current_vcpu
));
4647 return user_mode
!= 0;
4650 static unsigned long kvm_get_guest_ip(void)
4652 unsigned long ip
= 0;
4654 if (percpu_read(current_vcpu
))
4655 ip
= kvm_rip_read(percpu_read(current_vcpu
));
4660 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4661 .is_in_guest
= kvm_is_in_guest
,
4662 .is_user_mode
= kvm_is_user_mode
,
4663 .get_guest_ip
= kvm_get_guest_ip
,
4666 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4668 percpu_write(current_vcpu
, vcpu
);
4670 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4672 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4674 percpu_write(current_vcpu
, NULL
);
4676 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4678 int kvm_arch_init(void *opaque
)
4681 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4684 printk(KERN_ERR
"kvm: already loaded the other module\n");
4689 if (!ops
->cpu_has_kvm_support()) {
4690 printk(KERN_ERR
"kvm: no hardware support\n");
4694 if (ops
->disabled_by_bios()) {
4695 printk(KERN_ERR
"kvm: disabled by bios\n");
4700 r
= kvm_mmu_module_init();
4704 kvm_init_msr_list();
4707 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4708 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4709 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4713 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4716 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4724 void kvm_arch_exit(void)
4726 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4728 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4729 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4730 CPUFREQ_TRANSITION_NOTIFIER
);
4731 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4733 kvm_mmu_module_exit();
4736 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4738 ++vcpu
->stat
.halt_exits
;
4739 if (irqchip_in_kernel(vcpu
->kvm
)) {
4740 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4743 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4747 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4749 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
4752 if (is_long_mode(vcpu
))
4755 return a0
| ((gpa_t
)a1
<< 32);
4758 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4760 u64 param
, ingpa
, outgpa
, ret
;
4761 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4762 bool fast
, longmode
;
4766 * hypercall generates UD from non zero cpl and real mode
4769 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4770 kvm_queue_exception(vcpu
, UD_VECTOR
);
4774 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4775 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4778 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4779 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4780 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4781 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4782 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4783 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4785 #ifdef CONFIG_X86_64
4787 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4788 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4789 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4793 code
= param
& 0xffff;
4794 fast
= (param
>> 16) & 0x1;
4795 rep_cnt
= (param
>> 32) & 0xfff;
4796 rep_idx
= (param
>> 48) & 0xfff;
4798 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
4801 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
4802 kvm_vcpu_on_spin(vcpu
);
4805 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
4809 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
4811 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4813 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
4814 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
4820 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
4822 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
4825 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
4826 return kvm_hv_hypercall(vcpu
);
4828 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4829 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4830 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4831 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4832 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4834 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
4836 if (!is_long_mode(vcpu
)) {
4844 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
4850 case KVM_HC_VAPIC_POLL_IRQ
:
4854 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
4861 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4862 ++vcpu
->stat
.hypercalls
;
4865 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
4867 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
4869 char instruction
[3];
4870 unsigned long rip
= kvm_rip_read(vcpu
);
4873 * Blow out the MMU to ensure that no other VCPU has an active mapping
4874 * to ensure that the updated hypercall appears atomically across all
4877 kvm_mmu_zap_all(vcpu
->kvm
);
4879 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
4881 return emulator_write_emulated(rip
, instruction
, 3, NULL
, vcpu
);
4884 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4886 struct desc_ptr dt
= { limit
, base
};
4888 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4891 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4893 struct desc_ptr dt
= { limit
, base
};
4895 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4898 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
4900 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
4901 int j
, nent
= vcpu
->arch
.cpuid_nent
;
4903 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
4904 /* when no next entry is found, the current entry[i] is reselected */
4905 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
4906 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
4907 if (ej
->function
== e
->function
) {
4908 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
4912 return 0; /* silence gcc, even though control never reaches here */
4915 /* find an entry with matching function, matching index (if needed), and that
4916 * should be read next (if it's stateful) */
4917 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
4918 u32 function
, u32 index
)
4920 if (e
->function
!= function
)
4922 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
4924 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
4925 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
4930 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
4931 u32 function
, u32 index
)
4934 struct kvm_cpuid_entry2
*best
= NULL
;
4936 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
4937 struct kvm_cpuid_entry2
*e
;
4939 e
= &vcpu
->arch
.cpuid_entries
[i
];
4940 if (is_matching_cpuid_entry(e
, function
, index
)) {
4941 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4942 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4947 * Both basic or both extended?
4949 if (((e
->function
^ function
) & 0x80000000) == 0)
4950 if (!best
|| e
->function
> best
->function
)
4955 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4957 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4959 struct kvm_cpuid_entry2
*best
;
4961 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
4962 if (!best
|| best
->eax
< 0x80000008)
4964 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4966 return best
->eax
& 0xff;
4971 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
4973 u32 function
, index
;
4974 struct kvm_cpuid_entry2
*best
;
4976 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4977 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4978 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
4979 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
4980 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
4981 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
4982 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
4984 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
4985 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
4986 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
4987 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
4989 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4990 trace_kvm_cpuid(function
,
4991 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
4992 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
4993 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
4994 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
4996 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
4999 * Check if userspace requested an interrupt window, and that the
5000 * interrupt window is open.
5002 * No need to exit to userspace if we already have an interrupt queued.
5004 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5006 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5007 vcpu
->run
->request_interrupt_window
&&
5008 kvm_arch_interrupt_allowed(vcpu
));
5011 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5013 struct kvm_run
*kvm_run
= vcpu
->run
;
5015 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5016 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5017 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5018 if (irqchip_in_kernel(vcpu
->kvm
))
5019 kvm_run
->ready_for_interrupt_injection
= 1;
5021 kvm_run
->ready_for_interrupt_injection
=
5022 kvm_arch_interrupt_allowed(vcpu
) &&
5023 !kvm_cpu_has_interrupt(vcpu
) &&
5024 !kvm_event_needs_reinjection(vcpu
);
5027 static void vapic_enter(struct kvm_vcpu
*vcpu
)
5029 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5032 if (!apic
|| !apic
->vapic_addr
)
5035 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5037 vcpu
->arch
.apic
->vapic_page
= page
;
5040 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5042 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5045 if (!apic
|| !apic
->vapic_addr
)
5048 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5049 kvm_release_page_dirty(apic
->vapic_page
);
5050 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5051 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5054 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5058 if (!kvm_x86_ops
->update_cr8_intercept
)
5061 if (!vcpu
->arch
.apic
)
5064 if (!vcpu
->arch
.apic
->vapic_addr
)
5065 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5072 tpr
= kvm_lapic_get_cr8(vcpu
);
5074 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5077 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5079 /* try to reinject previous events if any */
5080 if (vcpu
->arch
.exception
.pending
) {
5081 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5082 vcpu
->arch
.exception
.has_error_code
,
5083 vcpu
->arch
.exception
.error_code
);
5084 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5085 vcpu
->arch
.exception
.has_error_code
,
5086 vcpu
->arch
.exception
.error_code
,
5087 vcpu
->arch
.exception
.reinject
);
5091 if (vcpu
->arch
.nmi_injected
) {
5092 kvm_x86_ops
->set_nmi(vcpu
);
5096 if (vcpu
->arch
.interrupt
.pending
) {
5097 kvm_x86_ops
->set_irq(vcpu
);
5101 /* try to inject new event if pending */
5102 if (vcpu
->arch
.nmi_pending
) {
5103 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5104 vcpu
->arch
.nmi_pending
= false;
5105 vcpu
->arch
.nmi_injected
= true;
5106 kvm_x86_ops
->set_nmi(vcpu
);
5108 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5109 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5110 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5112 kvm_x86_ops
->set_irq(vcpu
);
5117 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5119 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5120 !vcpu
->guest_xcr0_loaded
) {
5121 /* kvm_set_xcr() also depends on this */
5122 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5123 vcpu
->guest_xcr0_loaded
= 1;
5127 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5129 if (vcpu
->guest_xcr0_loaded
) {
5130 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5131 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5132 vcpu
->guest_xcr0_loaded
= 0;
5136 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5139 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5140 vcpu
->run
->request_interrupt_window
;
5142 if (vcpu
->requests
) {
5143 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5144 kvm_mmu_unload(vcpu
);
5145 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5146 __kvm_migrate_timers(vcpu
);
5147 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5148 r
= kvm_guest_time_update(vcpu
);
5152 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5153 kvm_mmu_sync_roots(vcpu
);
5154 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5155 kvm_x86_ops
->tlb_flush(vcpu
);
5156 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5157 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5161 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5162 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5166 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5167 vcpu
->fpu_active
= 0;
5168 kvm_x86_ops
->fpu_deactivate(vcpu
);
5170 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5171 /* Page is swapped out. Do synthetic halt */
5172 vcpu
->arch
.apf
.halted
= true;
5178 r
= kvm_mmu_reload(vcpu
);
5182 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5183 inject_pending_event(vcpu
);
5185 /* enable NMI/IRQ window open exits if needed */
5186 if (vcpu
->arch
.nmi_pending
)
5187 kvm_x86_ops
->enable_nmi_window(vcpu
);
5188 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5189 kvm_x86_ops
->enable_irq_window(vcpu
);
5191 if (kvm_lapic_enabled(vcpu
)) {
5192 update_cr8_intercept(vcpu
);
5193 kvm_lapic_sync_to_vapic(vcpu
);
5199 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5200 if (vcpu
->fpu_active
)
5201 kvm_load_guest_fpu(vcpu
);
5202 kvm_load_guest_xcr0(vcpu
);
5204 atomic_set(&vcpu
->guest_mode
, 1);
5207 local_irq_disable();
5209 if (!atomic_read(&vcpu
->guest_mode
) || vcpu
->requests
5210 || need_resched() || signal_pending(current
)) {
5211 atomic_set(&vcpu
->guest_mode
, 0);
5215 kvm_x86_ops
->cancel_injection(vcpu
);
5220 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5224 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5226 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5227 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5228 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5229 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5232 trace_kvm_entry(vcpu
->vcpu_id
);
5233 kvm_x86_ops
->run(vcpu
);
5236 * If the guest has used debug registers, at least dr7
5237 * will be disabled while returning to the host.
5238 * If we don't have active breakpoints in the host, we don't
5239 * care about the messed up debug address registers. But if
5240 * we have some of them active, restore the old state.
5242 if (hw_breakpoint_active())
5243 hw_breakpoint_restore();
5245 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
5247 atomic_set(&vcpu
->guest_mode
, 0);
5254 * We must have an instruction between local_irq_enable() and
5255 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5256 * the interrupt shadow. The stat.exits increment will do nicely.
5257 * But we need to prevent reordering, hence this barrier():
5265 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5268 * Profile KVM exit RIPs:
5270 if (unlikely(prof_on
== KVM_PROFILING
)) {
5271 unsigned long rip
= kvm_rip_read(vcpu
);
5272 profile_hit(KVM_PROFILING
, (void *)rip
);
5276 kvm_lapic_sync_from_vapic(vcpu
);
5278 r
= kvm_x86_ops
->handle_exit(vcpu
);
5284 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5287 struct kvm
*kvm
= vcpu
->kvm
;
5289 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5290 pr_debug("vcpu %d received sipi with vector # %x\n",
5291 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5292 kvm_lapic_reset(vcpu
);
5293 r
= kvm_arch_vcpu_reset(vcpu
);
5296 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5299 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5304 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5305 !vcpu
->arch
.apf
.halted
)
5306 r
= vcpu_enter_guest(vcpu
);
5308 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5309 kvm_vcpu_block(vcpu
);
5310 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5311 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5313 switch(vcpu
->arch
.mp_state
) {
5314 case KVM_MP_STATE_HALTED
:
5315 vcpu
->arch
.mp_state
=
5316 KVM_MP_STATE_RUNNABLE
;
5317 case KVM_MP_STATE_RUNNABLE
:
5318 vcpu
->arch
.apf
.halted
= false;
5320 case KVM_MP_STATE_SIPI_RECEIVED
:
5331 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5332 if (kvm_cpu_has_pending_timer(vcpu
))
5333 kvm_inject_pending_timer_irqs(vcpu
);
5335 if (dm_request_for_irq_injection(vcpu
)) {
5337 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5338 ++vcpu
->stat
.request_irq_exits
;
5341 kvm_check_async_pf_completion(vcpu
);
5343 if (signal_pending(current
)) {
5345 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5346 ++vcpu
->stat
.signal_exits
;
5348 if (need_resched()) {
5349 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5351 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5355 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5362 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5367 if (vcpu
->sigset_active
)
5368 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5370 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5371 kvm_vcpu_block(vcpu
);
5372 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5377 /* re-sync apic's tpr */
5378 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5379 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
5385 if (vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
) {
5386 if (vcpu
->mmio_needed
) {
5387 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
5388 vcpu
->mmio_read_completed
= 1;
5389 vcpu
->mmio_needed
= 0;
5391 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5392 r
= emulate_instruction(vcpu
, 0, 0, EMULTYPE_NO_DECODE
);
5393 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5394 if (r
!= EMULATE_DONE
) {
5399 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
5400 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
5401 kvm_run
->hypercall
.ret
);
5403 r
= __vcpu_run(vcpu
);
5406 post_kvm_run_save(vcpu
);
5407 if (vcpu
->sigset_active
)
5408 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5413 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5415 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5416 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5417 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5418 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5419 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5420 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5421 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5422 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5423 #ifdef CONFIG_X86_64
5424 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5425 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5426 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5427 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5428 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5429 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5430 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5431 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5434 regs
->rip
= kvm_rip_read(vcpu
);
5435 regs
->rflags
= kvm_get_rflags(vcpu
);
5440 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5442 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5443 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5444 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5445 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5446 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5447 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5448 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5449 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5450 #ifdef CONFIG_X86_64
5451 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5452 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5453 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5454 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5455 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5456 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5457 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5458 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5461 kvm_rip_write(vcpu
, regs
->rip
);
5462 kvm_set_rflags(vcpu
, regs
->rflags
);
5464 vcpu
->arch
.exception
.pending
= false;
5466 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5471 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5473 struct kvm_segment cs
;
5475 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5479 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5481 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5482 struct kvm_sregs
*sregs
)
5486 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5487 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5488 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5489 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5490 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5491 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5493 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5494 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5496 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5497 sregs
->idt
.limit
= dt
.size
;
5498 sregs
->idt
.base
= dt
.address
;
5499 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5500 sregs
->gdt
.limit
= dt
.size
;
5501 sregs
->gdt
.base
= dt
.address
;
5503 sregs
->cr0
= kvm_read_cr0(vcpu
);
5504 sregs
->cr2
= vcpu
->arch
.cr2
;
5505 sregs
->cr3
= vcpu
->arch
.cr3
;
5506 sregs
->cr4
= kvm_read_cr4(vcpu
);
5507 sregs
->cr8
= kvm_get_cr8(vcpu
);
5508 sregs
->efer
= vcpu
->arch
.efer
;
5509 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5511 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5513 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5514 set_bit(vcpu
->arch
.interrupt
.nr
,
5515 (unsigned long *)sregs
->interrupt_bitmap
);
5520 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5521 struct kvm_mp_state
*mp_state
)
5523 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5527 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5528 struct kvm_mp_state
*mp_state
)
5530 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5531 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5535 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
,
5536 bool has_error_code
, u32 error_code
)
5538 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
5541 init_emulate_ctxt(vcpu
);
5543 ret
= emulator_task_switch(&vcpu
->arch
.emulate_ctxt
,
5544 tss_selector
, reason
, has_error_code
,
5548 return EMULATE_FAIL
;
5550 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
5551 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
5552 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
5553 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5554 return EMULATE_DONE
;
5556 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5558 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5559 struct kvm_sregs
*sregs
)
5561 int mmu_reset_needed
= 0;
5562 int pending_vec
, max_bits
;
5565 dt
.size
= sregs
->idt
.limit
;
5566 dt
.address
= sregs
->idt
.base
;
5567 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5568 dt
.size
= sregs
->gdt
.limit
;
5569 dt
.address
= sregs
->gdt
.base
;
5570 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5572 vcpu
->arch
.cr2
= sregs
->cr2
;
5573 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
5574 vcpu
->arch
.cr3
= sregs
->cr3
;
5576 kvm_set_cr8(vcpu
, sregs
->cr8
);
5578 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5579 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5580 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5582 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5583 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5584 vcpu
->arch
.cr0
= sregs
->cr0
;
5586 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5587 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5588 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5590 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5591 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
);
5592 mmu_reset_needed
= 1;
5595 if (mmu_reset_needed
)
5596 kvm_mmu_reset_context(vcpu
);
5598 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5599 pending_vec
= find_first_bit(
5600 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5601 if (pending_vec
< max_bits
) {
5602 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5603 pr_debug("Set back pending irq %d\n", pending_vec
);
5604 if (irqchip_in_kernel(vcpu
->kvm
))
5605 kvm_pic_clear_isr_ack(vcpu
->kvm
);
5608 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5609 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5610 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5611 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5612 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5613 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5615 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5616 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5618 update_cr8_intercept(vcpu
);
5620 /* Older userspace won't unhalt the vcpu on reset. */
5621 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5622 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5624 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5626 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5631 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5632 struct kvm_guest_debug
*dbg
)
5634 unsigned long rflags
;
5637 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5639 if (vcpu
->arch
.exception
.pending
)
5641 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5642 kvm_queue_exception(vcpu
, DB_VECTOR
);
5644 kvm_queue_exception(vcpu
, BP_VECTOR
);
5648 * Read rflags as long as potentially injected trace flags are still
5651 rflags
= kvm_get_rflags(vcpu
);
5653 vcpu
->guest_debug
= dbg
->control
;
5654 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5655 vcpu
->guest_debug
= 0;
5657 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5658 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5659 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5660 vcpu
->arch
.switch_db_regs
=
5661 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5663 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5664 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5665 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5668 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5669 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5670 get_segment_base(vcpu
, VCPU_SREG_CS
);
5673 * Trigger an rflags update that will inject or remove the trace
5676 kvm_set_rflags(vcpu
, rflags
);
5678 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5688 * Translate a guest virtual address to a guest physical address.
5690 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5691 struct kvm_translation
*tr
)
5693 unsigned long vaddr
= tr
->linear_address
;
5697 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5698 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5699 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5700 tr
->physical_address
= gpa
;
5701 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5708 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5710 struct i387_fxsave_struct
*fxsave
=
5711 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5713 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5714 fpu
->fcw
= fxsave
->cwd
;
5715 fpu
->fsw
= fxsave
->swd
;
5716 fpu
->ftwx
= fxsave
->twd
;
5717 fpu
->last_opcode
= fxsave
->fop
;
5718 fpu
->last_ip
= fxsave
->rip
;
5719 fpu
->last_dp
= fxsave
->rdp
;
5720 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5725 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5727 struct i387_fxsave_struct
*fxsave
=
5728 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5730 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5731 fxsave
->cwd
= fpu
->fcw
;
5732 fxsave
->swd
= fpu
->fsw
;
5733 fxsave
->twd
= fpu
->ftwx
;
5734 fxsave
->fop
= fpu
->last_opcode
;
5735 fxsave
->rip
= fpu
->last_ip
;
5736 fxsave
->rdp
= fpu
->last_dp
;
5737 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5742 int fx_init(struct kvm_vcpu
*vcpu
)
5746 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5750 fpu_finit(&vcpu
->arch
.guest_fpu
);
5753 * Ensure guest xcr0 is valid for loading
5755 vcpu
->arch
.xcr0
= XSTATE_FP
;
5757 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5761 EXPORT_SYMBOL_GPL(fx_init
);
5763 static void fx_free(struct kvm_vcpu
*vcpu
)
5765 fpu_free(&vcpu
->arch
.guest_fpu
);
5768 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5770 if (vcpu
->guest_fpu_loaded
)
5774 * Restore all possible states in the guest,
5775 * and assume host would use all available bits.
5776 * Guest xcr0 would be loaded later.
5778 kvm_put_guest_xcr0(vcpu
);
5779 vcpu
->guest_fpu_loaded
= 1;
5780 unlazy_fpu(current
);
5781 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5785 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5787 kvm_put_guest_xcr0(vcpu
);
5789 if (!vcpu
->guest_fpu_loaded
)
5792 vcpu
->guest_fpu_loaded
= 0;
5793 fpu_save_init(&vcpu
->arch
.guest_fpu
);
5794 ++vcpu
->stat
.fpu_reload
;
5795 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
5799 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5801 if (vcpu
->arch
.time_page
) {
5802 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5803 vcpu
->arch
.time_page
= NULL
;
5806 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
5808 kvm_x86_ops
->vcpu_free(vcpu
);
5811 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5814 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
5815 printk_once(KERN_WARNING
5816 "kvm: SMP vm created on host with unstable TSC; "
5817 "guest TSC will not be reliable\n");
5818 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5821 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5825 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5827 r
= kvm_arch_vcpu_reset(vcpu
);
5829 r
= kvm_mmu_setup(vcpu
);
5836 kvm_x86_ops
->vcpu_free(vcpu
);
5840 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5842 vcpu
->arch
.apf
.msr_val
= 0;
5845 kvm_mmu_unload(vcpu
);
5849 kvm_x86_ops
->vcpu_free(vcpu
);
5852 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5854 vcpu
->arch
.nmi_pending
= false;
5855 vcpu
->arch
.nmi_injected
= false;
5857 vcpu
->arch
.switch_db_regs
= 0;
5858 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5859 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5860 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5862 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5863 vcpu
->arch
.apf
.msr_val
= 0;
5865 kvm_clear_async_pf_completion_queue(vcpu
);
5866 kvm_async_pf_hash_reset(vcpu
);
5867 vcpu
->arch
.apf
.halted
= false;
5869 return kvm_x86_ops
->vcpu_reset(vcpu
);
5872 int kvm_arch_hardware_enable(void *garbage
)
5875 struct kvm_vcpu
*vcpu
;
5878 kvm_shared_msr_cpu_online();
5879 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5880 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5881 if (vcpu
->cpu
== smp_processor_id())
5882 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5883 return kvm_x86_ops
->hardware_enable(garbage
);
5886 void kvm_arch_hardware_disable(void *garbage
)
5888 kvm_x86_ops
->hardware_disable(garbage
);
5889 drop_user_return_notifiers(garbage
);
5892 int kvm_arch_hardware_setup(void)
5894 return kvm_x86_ops
->hardware_setup();
5897 void kvm_arch_hardware_unsetup(void)
5899 kvm_x86_ops
->hardware_unsetup();
5902 void kvm_arch_check_processor_compat(void *rtn
)
5904 kvm_x86_ops
->check_processor_compatibility(rtn
);
5907 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5913 BUG_ON(vcpu
->kvm
== NULL
);
5916 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
5917 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
5918 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5919 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
5920 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
5921 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5922 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5924 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5926 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5931 vcpu
->arch
.pio_data
= page_address(page
);
5933 if (!kvm
->arch
.virtual_tsc_khz
)
5934 kvm_arch_set_tsc_khz(kvm
, max_tsc_khz
);
5936 r
= kvm_mmu_create(vcpu
);
5938 goto fail_free_pio_data
;
5940 if (irqchip_in_kernel(kvm
)) {
5941 r
= kvm_create_lapic(vcpu
);
5943 goto fail_mmu_destroy
;
5946 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5948 if (!vcpu
->arch
.mce_banks
) {
5950 goto fail_free_lapic
;
5952 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5954 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
5955 goto fail_free_mce_banks
;
5957 kvm_async_pf_hash_reset(vcpu
);
5960 fail_free_mce_banks
:
5961 kfree(vcpu
->arch
.mce_banks
);
5963 kvm_free_lapic(vcpu
);
5965 kvm_mmu_destroy(vcpu
);
5967 free_page((unsigned long)vcpu
->arch
.pio_data
);
5972 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5976 kfree(vcpu
->arch
.mce_banks
);
5977 kvm_free_lapic(vcpu
);
5978 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5979 kvm_mmu_destroy(vcpu
);
5980 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5981 free_page((unsigned long)vcpu
->arch
.pio_data
);
5984 int kvm_arch_init_vm(struct kvm
*kvm
)
5986 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5987 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5989 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5990 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5992 spin_lock_init(&kvm
->arch
.tsc_write_lock
);
5997 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6000 kvm_mmu_unload(vcpu
);
6004 static void kvm_free_vcpus(struct kvm
*kvm
)
6007 struct kvm_vcpu
*vcpu
;
6010 * Unpin any mmu pages first.
6012 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6013 kvm_clear_async_pf_completion_queue(vcpu
);
6014 kvm_unload_vcpu_mmu(vcpu
);
6016 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6017 kvm_arch_vcpu_free(vcpu
);
6019 mutex_lock(&kvm
->lock
);
6020 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6021 kvm
->vcpus
[i
] = NULL
;
6023 atomic_set(&kvm
->online_vcpus
, 0);
6024 mutex_unlock(&kvm
->lock
);
6027 void kvm_arch_sync_events(struct kvm
*kvm
)
6029 kvm_free_all_assigned_devices(kvm
);
6033 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6035 kvm_iommu_unmap_guest(kvm
);
6036 kfree(kvm
->arch
.vpic
);
6037 kfree(kvm
->arch
.vioapic
);
6038 kvm_free_vcpus(kvm
);
6039 if (kvm
->arch
.apic_access_page
)
6040 put_page(kvm
->arch
.apic_access_page
);
6041 if (kvm
->arch
.ept_identity_pagetable
)
6042 put_page(kvm
->arch
.ept_identity_pagetable
);
6045 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6046 struct kvm_memory_slot
*memslot
,
6047 struct kvm_memory_slot old
,
6048 struct kvm_userspace_memory_region
*mem
,
6051 int npages
= memslot
->npages
;
6052 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6054 /* Prevent internal slot pages from being moved by fork()/COW. */
6055 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6056 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6058 /*To keep backward compatibility with older userspace,
6059 *x86 needs to hanlde !user_alloc case.
6062 if (npages
&& !old
.rmap
) {
6063 unsigned long userspace_addr
;
6065 down_write(¤t
->mm
->mmap_sem
);
6066 userspace_addr
= do_mmap(NULL
, 0,
6068 PROT_READ
| PROT_WRITE
,
6071 up_write(¤t
->mm
->mmap_sem
);
6073 if (IS_ERR((void *)userspace_addr
))
6074 return PTR_ERR((void *)userspace_addr
);
6076 memslot
->userspace_addr
= userspace_addr
;
6084 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6085 struct kvm_userspace_memory_region
*mem
,
6086 struct kvm_memory_slot old
,
6090 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
6092 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
6095 down_write(¤t
->mm
->mmap_sem
);
6096 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
6097 old
.npages
* PAGE_SIZE
);
6098 up_write(¤t
->mm
->mmap_sem
);
6101 "kvm_vm_ioctl_set_memory_region: "
6102 "failed to munmap memory\n");
6105 spin_lock(&kvm
->mmu_lock
);
6106 if (!kvm
->arch
.n_requested_mmu_pages
) {
6107 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6108 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6111 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6112 spin_unlock(&kvm
->mmu_lock
);
6115 void kvm_arch_flush_shadow(struct kvm
*kvm
)
6117 kvm_mmu_zap_all(kvm
);
6118 kvm_reload_remote_mmus(kvm
);
6121 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6123 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6124 !vcpu
->arch
.apf
.halted
)
6125 || !list_empty_careful(&vcpu
->async_pf
.done
)
6126 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6127 || vcpu
->arch
.nmi_pending
||
6128 (kvm_arch_interrupt_allowed(vcpu
) &&
6129 kvm_cpu_has_interrupt(vcpu
));
6132 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
6135 int cpu
= vcpu
->cpu
;
6137 if (waitqueue_active(&vcpu
->wq
)) {
6138 wake_up_interruptible(&vcpu
->wq
);
6139 ++vcpu
->stat
.halt_wakeup
;
6143 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
6144 if (atomic_xchg(&vcpu
->guest_mode
, 0))
6145 smp_send_reschedule(cpu
);
6149 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6151 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6154 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6156 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6157 get_segment_base(vcpu
, VCPU_SREG_CS
);
6159 return current_rip
== linear_rip
;
6161 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6163 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6165 unsigned long rflags
;
6167 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6168 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6169 rflags
&= ~X86_EFLAGS_TF
;
6172 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6174 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6176 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6177 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6178 rflags
|= X86_EFLAGS_TF
;
6179 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6180 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6182 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6184 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6188 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
6189 is_error_page(work
->page
))
6192 r
= kvm_mmu_reload(vcpu
);
6196 if (!vcpu
->arch
.mmu
.direct_map
&&
6197 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
6200 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6203 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6205 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6208 static inline u32
kvm_async_pf_next_probe(u32 key
)
6210 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6213 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6215 u32 key
= kvm_async_pf_hash_fn(gfn
);
6217 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6218 key
= kvm_async_pf_next_probe(key
);
6220 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6223 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6226 u32 key
= kvm_async_pf_hash_fn(gfn
);
6228 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6229 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6230 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6231 key
= kvm_async_pf_next_probe(key
);
6236 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6238 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6241 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6245 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6247 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6249 j
= kvm_async_pf_next_probe(j
);
6250 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6252 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6254 * k lies cyclically in ]i,j]
6256 * |....j i.k.| or |.k..j i...|
6258 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6259 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6264 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6267 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6271 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6272 struct kvm_async_pf
*work
)
6274 struct x86_exception fault
;
6276 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6277 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6279 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6280 (vcpu
->arch
.apf
.send_user_only
&&
6281 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6282 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6283 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6284 fault
.vector
= PF_VECTOR
;
6285 fault
.error_code_valid
= true;
6286 fault
.error_code
= 0;
6287 fault
.nested_page_fault
= false;
6288 fault
.address
= work
->arch
.token
;
6289 kvm_inject_page_fault(vcpu
, &fault
);
6293 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6294 struct kvm_async_pf
*work
)
6296 struct x86_exception fault
;
6298 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6299 if (is_error_page(work
->page
))
6300 work
->arch
.token
= ~0; /* broadcast wakeup */
6302 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6304 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6305 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6306 fault
.vector
= PF_VECTOR
;
6307 fault
.error_code_valid
= true;
6308 fault
.error_code
= 0;
6309 fault
.nested_page_fault
= false;
6310 fault
.address
= work
->arch
.token
;
6311 kvm_inject_page_fault(vcpu
, &fault
);
6313 vcpu
->arch
.apf
.halted
= false;
6316 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6318 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6321 return !kvm_event_needs_reinjection(vcpu
) &&
6322 kvm_x86_ops
->interrupt_allowed(vcpu
);
6325 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6326 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6327 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6328 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6329 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6330 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6331 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6332 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6333 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6334 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6335 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6336 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);