2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/module.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <trace/events/kvm.h>
58 #define CREATE_TRACE_POINTS
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define MAX_IO_MSRS 256
72 #define KVM_MAX_MCE_BANKS 32
73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
75 #define emul_to_vcpu(ctxt) \
76 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
84 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
86 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
93 static void process_nmi(struct kvm_vcpu
*vcpu
);
94 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
96 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
99 static bool __read_mostly ignore_msrs
= 0;
100 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
102 unsigned int min_timer_period_us
= 500;
103 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
105 static bool __read_mostly kvmclock_periodic_sync
= true;
106 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
108 bool __read_mostly kvm_has_tsc_control
;
109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
110 u32 __read_mostly kvm_max_guest_tsc_khz
;
111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
112 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
114 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
116 static u64 __read_mostly kvm_default_tsc_scaling_ratio
;
118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
119 static u32 __read_mostly tsc_tolerance_ppm
= 250;
120 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
123 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
124 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
126 static bool __read_mostly backwards_tsc_observed
= false;
128 #define KVM_NR_SHARED_MSRS 16
130 struct kvm_shared_msrs_global
{
132 u32 msrs
[KVM_NR_SHARED_MSRS
];
135 struct kvm_shared_msrs
{
136 struct user_return_notifier urn
;
138 struct kvm_shared_msr_values
{
141 } values
[KVM_NR_SHARED_MSRS
];
144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
145 static struct kvm_shared_msrs __percpu
*shared_msrs
;
147 struct kvm_stats_debugfs_item debugfs_entries
[] = {
148 { "pf_fixed", VCPU_STAT(pf_fixed
) },
149 { "pf_guest", VCPU_STAT(pf_guest
) },
150 { "tlb_flush", VCPU_STAT(tlb_flush
) },
151 { "invlpg", VCPU_STAT(invlpg
) },
152 { "exits", VCPU_STAT(exits
) },
153 { "io_exits", VCPU_STAT(io_exits
) },
154 { "mmio_exits", VCPU_STAT(mmio_exits
) },
155 { "signal_exits", VCPU_STAT(signal_exits
) },
156 { "irq_window", VCPU_STAT(irq_window_exits
) },
157 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
158 { "halt_exits", VCPU_STAT(halt_exits
) },
159 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
160 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
161 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
162 { "hypercalls", VCPU_STAT(hypercalls
) },
163 { "request_irq", VCPU_STAT(request_irq_exits
) },
164 { "irq_exits", VCPU_STAT(irq_exits
) },
165 { "host_state_reload", VCPU_STAT(host_state_reload
) },
166 { "efer_reload", VCPU_STAT(efer_reload
) },
167 { "fpu_reload", VCPU_STAT(fpu_reload
) },
168 { "insn_emulation", VCPU_STAT(insn_emulation
) },
169 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
170 { "irq_injections", VCPU_STAT(irq_injections
) },
171 { "nmi_injections", VCPU_STAT(nmi_injections
) },
172 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
173 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
174 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
175 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
176 { "mmu_flooded", VM_STAT(mmu_flooded
) },
177 { "mmu_recycled", VM_STAT(mmu_recycled
) },
178 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
179 { "mmu_unsync", VM_STAT(mmu_unsync
) },
180 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
181 { "largepages", VM_STAT(lpages
) },
185 u64 __read_mostly host_xcr0
;
187 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
192 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
193 vcpu
->arch
.apf
.gfns
[i
] = ~0;
196 static void kvm_on_user_return(struct user_return_notifier
*urn
)
199 struct kvm_shared_msrs
*locals
200 = container_of(urn
, struct kvm_shared_msrs
, urn
);
201 struct kvm_shared_msr_values
*values
;
203 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
204 values
= &locals
->values
[slot
];
205 if (values
->host
!= values
->curr
) {
206 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
207 values
->curr
= values
->host
;
210 locals
->registered
= false;
211 user_return_notifier_unregister(urn
);
214 static void shared_msr_update(unsigned slot
, u32 msr
)
217 unsigned int cpu
= smp_processor_id();
218 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
220 /* only read, and nobody should modify it at this time,
221 * so don't need lock */
222 if (slot
>= shared_msrs_global
.nr
) {
223 printk(KERN_ERR
"kvm: invalid MSR slot!");
226 rdmsrl_safe(msr
, &value
);
227 smsr
->values
[slot
].host
= value
;
228 smsr
->values
[slot
].curr
= value
;
231 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
233 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
234 shared_msrs_global
.msrs
[slot
] = msr
;
235 if (slot
>= shared_msrs_global
.nr
)
236 shared_msrs_global
.nr
= slot
+ 1;
238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
240 static void kvm_shared_msr_cpu_online(void)
244 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
245 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
248 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
250 unsigned int cpu
= smp_processor_id();
251 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
254 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
256 smsr
->values
[slot
].curr
= value
;
257 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
261 if (!smsr
->registered
) {
262 smsr
->urn
.on_user_return
= kvm_on_user_return
;
263 user_return_notifier_register(&smsr
->urn
);
264 smsr
->registered
= true;
268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
270 static void drop_user_return_notifiers(void)
272 unsigned int cpu
= smp_processor_id();
273 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
275 if (smsr
->registered
)
276 kvm_on_user_return(&smsr
->urn
);
279 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
281 return vcpu
->arch
.apic_base
;
283 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
285 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
287 u64 old_state
= vcpu
->arch
.apic_base
&
288 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
289 u64 new_state
= msr_info
->data
&
290 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
291 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
292 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
294 if (!msr_info
->host_initiated
&&
295 ((msr_info
->data
& reserved_bits
) != 0 ||
296 new_state
== X2APIC_ENABLE
||
297 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
298 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
299 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
303 kvm_lapic_set_base(vcpu
, msr_info
->data
);
306 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
308 asmlinkage __visible
void kvm_spurious_fault(void)
310 /* Fault while not rebooting. We want the trace. */
313 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
315 #define EXCPT_BENIGN 0
316 #define EXCPT_CONTRIBUTORY 1
319 static int exception_class(int vector
)
329 return EXCPT_CONTRIBUTORY
;
336 #define EXCPT_FAULT 0
338 #define EXCPT_ABORT 2
339 #define EXCPT_INTERRUPT 3
341 static int exception_type(int vector
)
345 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
346 return EXCPT_INTERRUPT
;
350 /* #DB is trap, as instruction watchpoints are handled elsewhere */
351 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
354 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
357 /* Reserved exceptions will result in fault */
361 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
362 unsigned nr
, bool has_error
, u32 error_code
,
368 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
370 if (!vcpu
->arch
.exception
.pending
) {
372 if (has_error
&& !is_protmode(vcpu
))
374 vcpu
->arch
.exception
.pending
= true;
375 vcpu
->arch
.exception
.has_error_code
= has_error
;
376 vcpu
->arch
.exception
.nr
= nr
;
377 vcpu
->arch
.exception
.error_code
= error_code
;
378 vcpu
->arch
.exception
.reinject
= reinject
;
382 /* to check exception */
383 prev_nr
= vcpu
->arch
.exception
.nr
;
384 if (prev_nr
== DF_VECTOR
) {
385 /* triple fault -> shutdown */
386 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
389 class1
= exception_class(prev_nr
);
390 class2
= exception_class(nr
);
391 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
392 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
393 /* generate double fault per SDM Table 5-5 */
394 vcpu
->arch
.exception
.pending
= true;
395 vcpu
->arch
.exception
.has_error_code
= true;
396 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
397 vcpu
->arch
.exception
.error_code
= 0;
399 /* replace previous exception with a new one in a hope
400 that instruction re-execution will regenerate lost
405 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
407 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
409 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
411 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
413 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
415 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
417 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
420 kvm_inject_gp(vcpu
, 0);
422 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
426 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
428 ++vcpu
->stat
.pf_guest
;
429 vcpu
->arch
.cr2
= fault
->address
;
430 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
434 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
436 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
437 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
439 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
441 return fault
->nested_page_fault
;
444 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
446 atomic_inc(&vcpu
->arch
.nmi_queued
);
447 kvm_make_request(KVM_REQ_NMI
, vcpu
);
449 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
451 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
453 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
457 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
459 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
464 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
465 * a #GP and return false.
467 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
469 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
471 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
474 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
476 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
478 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
481 kvm_queue_exception(vcpu
, UD_VECTOR
);
484 EXPORT_SYMBOL_GPL(kvm_require_dr
);
487 * This function will be used to read from the physical memory of the currently
488 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
489 * can read from guest physical or from the guest's guest physical memory.
491 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
492 gfn_t ngfn
, void *data
, int offset
, int len
,
495 struct x86_exception exception
;
499 ngpa
= gfn_to_gpa(ngfn
);
500 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
501 if (real_gfn
== UNMAPPED_GVA
)
504 real_gfn
= gpa_to_gfn(real_gfn
);
506 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
510 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
511 void *data
, int offset
, int len
, u32 access
)
513 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
514 data
, offset
, len
, access
);
518 * Load the pae pdptrs. Return true is they are all valid.
520 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
522 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
523 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
526 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
528 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
529 offset
* sizeof(u64
), sizeof(pdpte
),
530 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
535 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
536 if (is_present_gpte(pdpte
[i
]) &&
538 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
545 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
546 __set_bit(VCPU_EXREG_PDPTR
,
547 (unsigned long *)&vcpu
->arch
.regs_avail
);
548 __set_bit(VCPU_EXREG_PDPTR
,
549 (unsigned long *)&vcpu
->arch
.regs_dirty
);
554 EXPORT_SYMBOL_GPL(load_pdptrs
);
556 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
558 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
564 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
567 if (!test_bit(VCPU_EXREG_PDPTR
,
568 (unsigned long *)&vcpu
->arch
.regs_avail
))
571 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
572 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
573 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
574 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
577 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
583 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
585 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
586 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
591 if (cr0
& 0xffffffff00000000UL
)
595 cr0
&= ~CR0_RESERVED_BITS
;
597 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
600 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
603 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
605 if ((vcpu
->arch
.efer
& EFER_LME
)) {
610 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
615 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
620 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
623 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
625 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
626 kvm_clear_async_pf_completion_queue(vcpu
);
627 kvm_async_pf_hash_reset(vcpu
);
630 if ((cr0
^ old_cr0
) & update_bits
)
631 kvm_mmu_reset_context(vcpu
);
633 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
634 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
635 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
636 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
640 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
642 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
644 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
646 EXPORT_SYMBOL_GPL(kvm_lmsw
);
648 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
650 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
651 !vcpu
->guest_xcr0_loaded
) {
652 /* kvm_set_xcr() also depends on this */
653 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
654 vcpu
->guest_xcr0_loaded
= 1;
658 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
660 if (vcpu
->guest_xcr0_loaded
) {
661 if (vcpu
->arch
.xcr0
!= host_xcr0
)
662 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
663 vcpu
->guest_xcr0_loaded
= 0;
667 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
670 u64 old_xcr0
= vcpu
->arch
.xcr0
;
673 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
674 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
676 if (!(xcr0
& XFEATURE_MASK_FP
))
678 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
682 * Do not allow the guest to set bits that we do not support
683 * saving. However, xcr0 bit 0 is always set, even if the
684 * emulated CPU does not support XSAVE (see fx_init).
686 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
687 if (xcr0
& ~valid_bits
)
690 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
691 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
694 if (xcr0
& XFEATURE_MASK_AVX512
) {
695 if (!(xcr0
& XFEATURE_MASK_YMM
))
697 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
700 kvm_put_guest_xcr0(vcpu
);
701 vcpu
->arch
.xcr0
= xcr0
;
703 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
704 kvm_update_cpuid(vcpu
);
708 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
710 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
711 __kvm_set_xcr(vcpu
, index
, xcr
)) {
712 kvm_inject_gp(vcpu
, 0);
717 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
719 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
721 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
722 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
723 X86_CR4_SMEP
| X86_CR4_SMAP
;
725 if (cr4
& CR4_RESERVED_BITS
)
728 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
731 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
734 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
737 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
740 if (is_long_mode(vcpu
)) {
741 if (!(cr4
& X86_CR4_PAE
))
743 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
744 && ((cr4
^ old_cr4
) & pdptr_bits
)
745 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
749 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
750 if (!guest_cpuid_has_pcid(vcpu
))
753 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
754 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
758 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
761 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
762 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
763 kvm_mmu_reset_context(vcpu
);
765 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
766 kvm_update_cpuid(vcpu
);
770 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
772 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
775 cr3
&= ~CR3_PCID_INVD
;
778 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
779 kvm_mmu_sync_roots(vcpu
);
780 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
784 if (is_long_mode(vcpu
)) {
785 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
787 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
788 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
791 vcpu
->arch
.cr3
= cr3
;
792 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
793 kvm_mmu_new_cr3(vcpu
);
796 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
798 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
800 if (cr8
& CR8_RESERVED_BITS
)
802 if (lapic_in_kernel(vcpu
))
803 kvm_lapic_set_tpr(vcpu
, cr8
);
805 vcpu
->arch
.cr8
= cr8
;
808 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
810 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
812 if (lapic_in_kernel(vcpu
))
813 return kvm_lapic_get_cr8(vcpu
);
815 return vcpu
->arch
.cr8
;
817 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
819 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
823 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
824 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
825 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
826 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
830 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
832 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
833 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
836 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
840 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
841 dr7
= vcpu
->arch
.guest_debug_dr7
;
843 dr7
= vcpu
->arch
.dr7
;
844 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
845 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
846 if (dr7
& DR7_BP_EN_MASK
)
847 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
850 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
852 u64 fixed
= DR6_FIXED_1
;
854 if (!guest_cpuid_has_rtm(vcpu
))
859 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
863 vcpu
->arch
.db
[dr
] = val
;
864 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
865 vcpu
->arch
.eff_db
[dr
] = val
;
870 if (val
& 0xffffffff00000000ULL
)
872 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
873 kvm_update_dr6(vcpu
);
878 if (val
& 0xffffffff00000000ULL
)
880 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
881 kvm_update_dr7(vcpu
);
888 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
890 if (__kvm_set_dr(vcpu
, dr
, val
)) {
891 kvm_inject_gp(vcpu
, 0);
896 EXPORT_SYMBOL_GPL(kvm_set_dr
);
898 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
902 *val
= vcpu
->arch
.db
[dr
];
907 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
908 *val
= vcpu
->arch
.dr6
;
910 *val
= kvm_x86_ops
->get_dr6(vcpu
);
915 *val
= vcpu
->arch
.dr7
;
920 EXPORT_SYMBOL_GPL(kvm_get_dr
);
922 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
924 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
928 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
931 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
932 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
935 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
938 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
939 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
941 * This list is modified at module load time to reflect the
942 * capabilities of the host cpu. This capabilities test skips MSRs that are
943 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
944 * may depend on host virtualization features rather than host cpu features.
947 static u32 msrs_to_save
[] = {
948 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
951 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
953 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
954 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
957 static unsigned num_msrs_to_save
;
959 static u32 emulated_msrs
[] = {
960 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
961 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
962 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
963 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
964 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
965 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
968 HV_X64_MSR_VP_RUNTIME
,
970 HV_X64_MSR_STIMER0_CONFIG
,
971 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
975 MSR_IA32_TSCDEADLINE
,
976 MSR_IA32_MISC_ENABLE
,
982 static unsigned num_emulated_msrs
;
984 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
986 if (efer
& efer_reserved_bits
)
989 if (efer
& EFER_FFXSR
) {
990 struct kvm_cpuid_entry2
*feat
;
992 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
993 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
997 if (efer
& EFER_SVME
) {
998 struct kvm_cpuid_entry2
*feat
;
1000 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1001 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1007 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1009 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1011 u64 old_efer
= vcpu
->arch
.efer
;
1013 if (!kvm_valid_efer(vcpu
, efer
))
1017 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1021 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1023 kvm_x86_ops
->set_efer(vcpu
, efer
);
1025 /* Update reserved bits */
1026 if ((efer
^ old_efer
) & EFER_NX
)
1027 kvm_mmu_reset_context(vcpu
);
1032 void kvm_enable_efer_bits(u64 mask
)
1034 efer_reserved_bits
&= ~mask
;
1036 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1039 * Writes msr value into into the appropriate "register".
1040 * Returns 0 on success, non-0 otherwise.
1041 * Assumes vcpu_load() was already called.
1043 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1045 switch (msr
->index
) {
1048 case MSR_KERNEL_GS_BASE
:
1051 if (is_noncanonical_address(msr
->data
))
1054 case MSR_IA32_SYSENTER_EIP
:
1055 case MSR_IA32_SYSENTER_ESP
:
1057 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1058 * non-canonical address is written on Intel but not on
1059 * AMD (which ignores the top 32-bits, because it does
1060 * not implement 64-bit SYSENTER).
1062 * 64-bit code should hence be able to write a non-canonical
1063 * value on AMD. Making the address canonical ensures that
1064 * vmentry does not fail on Intel after writing a non-canonical
1065 * value, and that something deterministic happens if the guest
1066 * invokes 64-bit SYSENTER.
1068 msr
->data
= get_canonical(msr
->data
);
1070 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1072 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1075 * Adapt set_msr() to msr_io()'s calling convention
1077 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1079 struct msr_data msr
;
1083 msr
.host_initiated
= true;
1084 r
= kvm_get_msr(vcpu
, &msr
);
1092 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1094 struct msr_data msr
;
1098 msr
.host_initiated
= true;
1099 return kvm_set_msr(vcpu
, &msr
);
1102 #ifdef CONFIG_X86_64
1103 struct pvclock_gtod_data
{
1106 struct { /* extract of a clocksource struct */
1118 static struct pvclock_gtod_data pvclock_gtod_data
;
1120 static void update_pvclock_gtod(struct timekeeper
*tk
)
1122 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1125 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1127 write_seqcount_begin(&vdata
->seq
);
1129 /* copy pvclock gtod data */
1130 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1131 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1132 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1133 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1134 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1136 vdata
->boot_ns
= boot_ns
;
1137 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1139 write_seqcount_end(&vdata
->seq
);
1143 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1146 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1147 * vcpu_enter_guest. This function is only called from
1148 * the physical CPU that is running vcpu.
1150 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1153 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1157 struct pvclock_wall_clock wc
;
1158 struct timespec boot
;
1163 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1168 ++version
; /* first time write, random junk */
1172 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1176 * The guest calculates current wall clock time by adding
1177 * system time (updated by kvm_guest_time_update below) to the
1178 * wall clock specified here. guest system time equals host
1179 * system time for us, thus we must fill in host boot time here.
1183 if (kvm
->arch
.kvmclock_offset
) {
1184 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1185 boot
= timespec_sub(boot
, ts
);
1187 wc
.sec
= boot
.tv_sec
;
1188 wc
.nsec
= boot
.tv_nsec
;
1189 wc
.version
= version
;
1191 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1194 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1197 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1199 uint32_t quotient
, remainder
;
1201 /* Don't try to replace with do_div(), this one calculates
1202 * "(dividend << 32) / divisor" */
1204 : "=a" (quotient
), "=d" (remainder
)
1205 : "0" (0), "1" (dividend
), "r" (divisor
) );
1209 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1210 s8
*pshift
, u32
*pmultiplier
)
1217 tps64
= base_khz
* 1000LL;
1218 scaled64
= scaled_khz
* 1000LL;
1219 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1224 tps32
= (uint32_t)tps64
;
1225 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1226 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1234 *pmultiplier
= div_frac(scaled64
, tps32
);
1236 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1237 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1240 #ifdef CONFIG_X86_64
1241 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1244 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1245 static unsigned long max_tsc_khz
;
1247 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1249 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1250 vcpu
->arch
.virtual_tsc_shift
);
1253 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1255 u64 v
= (u64
)khz
* (1000000 + ppm
);
1260 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1264 /* Guest TSC same frequency as host TSC? */
1266 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1270 /* TSC scaling supported? */
1271 if (!kvm_has_tsc_control
) {
1272 if (user_tsc_khz
> tsc_khz
) {
1273 vcpu
->arch
.tsc_catchup
= 1;
1274 vcpu
->arch
.tsc_always_catchup
= 1;
1277 WARN(1, "user requested TSC rate below hardware speed\n");
1282 /* TSC scaling required - calculate ratio */
1283 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1284 user_tsc_khz
, tsc_khz
);
1286 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1287 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1292 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1296 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1298 u32 thresh_lo
, thresh_hi
;
1299 int use_scaling
= 0;
1301 /* tsc_khz can be zero if TSC calibration fails */
1302 if (this_tsc_khz
== 0) {
1303 /* set tsc_scaling_ratio to a safe value */
1304 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1308 /* Compute a scale to convert nanoseconds in TSC cycles */
1309 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1310 &vcpu
->arch
.virtual_tsc_shift
,
1311 &vcpu
->arch
.virtual_tsc_mult
);
1312 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1315 * Compute the variation in TSC rate which is acceptable
1316 * within the range of tolerance and decide if the
1317 * rate being applied is within that bounds of the hardware
1318 * rate. If so, no scaling or compensation need be done.
1320 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1321 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1322 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1323 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1326 return set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1329 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1331 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1332 vcpu
->arch
.virtual_tsc_mult
,
1333 vcpu
->arch
.virtual_tsc_shift
);
1334 tsc
+= vcpu
->arch
.this_tsc_write
;
1338 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1340 #ifdef CONFIG_X86_64
1342 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1343 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1345 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1346 atomic_read(&vcpu
->kvm
->online_vcpus
));
1349 * Once the masterclock is enabled, always perform request in
1350 * order to update it.
1352 * In order to enable masterclock, the host clocksource must be TSC
1353 * and the vcpus need to have matched TSCs. When that happens,
1354 * perform request to enable masterclock.
1356 if (ka
->use_master_clock
||
1357 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1358 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1360 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1361 atomic_read(&vcpu
->kvm
->online_vcpus
),
1362 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1366 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1368 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1369 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1373 * Multiply tsc by a fixed point number represented by ratio.
1375 * The most significant 64-N bits (mult) of ratio represent the
1376 * integral part of the fixed point number; the remaining N bits
1377 * (frac) represent the fractional part, ie. ratio represents a fixed
1378 * point number (mult + frac * 2^(-N)).
1380 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1382 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1384 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1387 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1390 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1392 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1393 _tsc
= __scale_tsc(ratio
, tsc
);
1397 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1399 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1403 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1405 return target_tsc
- tsc
;
1408 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1410 return kvm_x86_ops
->read_l1_tsc(vcpu
, kvm_scale_tsc(vcpu
, host_tsc
));
1412 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1414 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1416 struct kvm
*kvm
= vcpu
->kvm
;
1417 u64 offset
, ns
, elapsed
;
1418 unsigned long flags
;
1421 bool already_matched
;
1422 u64 data
= msr
->data
;
1424 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1425 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1426 ns
= get_kernel_ns();
1427 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1429 if (vcpu
->arch
.virtual_tsc_khz
) {
1432 /* n.b - signed multiplication and division required */
1433 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1434 #ifdef CONFIG_X86_64
1435 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1437 /* do_div() only does unsigned */
1438 asm("1: idivl %[divisor]\n"
1439 "2: xor %%edx, %%edx\n"
1440 " movl $0, %[faulted]\n"
1442 ".section .fixup,\"ax\"\n"
1443 "4: movl $1, %[faulted]\n"
1447 _ASM_EXTABLE(1b
, 4b
)
1449 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1450 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1453 do_div(elapsed
, 1000);
1458 /* idivl overflow => difference is larger than USEC_PER_SEC */
1460 usdiff
= USEC_PER_SEC
;
1462 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1465 * Special case: TSC write with a small delta (1 second) of virtual
1466 * cycle time against real time is interpreted as an attempt to
1467 * synchronize the CPU.
1469 * For a reliable TSC, we can match TSC offsets, and for an unstable
1470 * TSC, we add elapsed time in this computation. We could let the
1471 * compensation code attempt to catch up if we fall behind, but
1472 * it's better to try to match offsets from the beginning.
1474 if (usdiff
< USEC_PER_SEC
&&
1475 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1476 if (!check_tsc_unstable()) {
1477 offset
= kvm
->arch
.cur_tsc_offset
;
1478 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1480 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1482 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1483 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1486 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1489 * We split periods of matched TSC writes into generations.
1490 * For each generation, we track the original measured
1491 * nanosecond time, offset, and write, so if TSCs are in
1492 * sync, we can match exact offset, and if not, we can match
1493 * exact software computation in compute_guest_tsc()
1495 * These values are tracked in kvm->arch.cur_xxx variables.
1497 kvm
->arch
.cur_tsc_generation
++;
1498 kvm
->arch
.cur_tsc_nsec
= ns
;
1499 kvm
->arch
.cur_tsc_write
= data
;
1500 kvm
->arch
.cur_tsc_offset
= offset
;
1502 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1503 kvm
->arch
.cur_tsc_generation
, data
);
1507 * We also track th most recent recorded KHZ, write and time to
1508 * allow the matching interval to be extended at each write.
1510 kvm
->arch
.last_tsc_nsec
= ns
;
1511 kvm
->arch
.last_tsc_write
= data
;
1512 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1514 vcpu
->arch
.last_guest_tsc
= data
;
1516 /* Keep track of which generation this VCPU has synchronized to */
1517 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1518 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1519 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1521 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1522 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1523 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1524 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1526 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1528 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1529 } else if (!already_matched
) {
1530 kvm
->arch
.nr_vcpus_matched_tsc
++;
1533 kvm_track_tsc_matching(vcpu
);
1534 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1537 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1539 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1542 kvm_x86_ops
->adjust_tsc_offset_guest(vcpu
, adjustment
);
1545 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1547 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1548 WARN_ON(adjustment
< 0);
1549 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1550 kvm_x86_ops
->adjust_tsc_offset_guest(vcpu
, adjustment
);
1553 #ifdef CONFIG_X86_64
1555 static cycle_t
read_tsc(void)
1557 cycle_t ret
= (cycle_t
)rdtsc_ordered();
1558 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1560 if (likely(ret
>= last
))
1564 * GCC likes to generate cmov here, but this branch is extremely
1565 * predictable (it's just a funciton of time and the likely is
1566 * very likely) and there's a data dependence, so force GCC
1567 * to generate a branch instead. I don't barrier() because
1568 * we don't actually need a barrier, and if this function
1569 * ever gets inlined it will generate worse code.
1575 static inline u64
vgettsc(cycle_t
*cycle_now
)
1578 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1580 *cycle_now
= read_tsc();
1582 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1583 return v
* gtod
->clock
.mult
;
1586 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1588 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1594 seq
= read_seqcount_begin(>od
->seq
);
1595 mode
= gtod
->clock
.vclock_mode
;
1596 ns
= gtod
->nsec_base
;
1597 ns
+= vgettsc(cycle_now
);
1598 ns
>>= gtod
->clock
.shift
;
1599 ns
+= gtod
->boot_ns
;
1600 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1606 /* returns true if host is using tsc clocksource */
1607 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1609 /* checked again under seqlock below */
1610 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1613 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1619 * Assuming a stable TSC across physical CPUS, and a stable TSC
1620 * across virtual CPUs, the following condition is possible.
1621 * Each numbered line represents an event visible to both
1622 * CPUs at the next numbered event.
1624 * "timespecX" represents host monotonic time. "tscX" represents
1627 * VCPU0 on CPU0 | VCPU1 on CPU1
1629 * 1. read timespec0,tsc0
1630 * 2. | timespec1 = timespec0 + N
1632 * 3. transition to guest | transition to guest
1633 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1634 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1635 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1637 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1640 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1642 * - 0 < N - M => M < N
1644 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1645 * always the case (the difference between two distinct xtime instances
1646 * might be smaller then the difference between corresponding TSC reads,
1647 * when updating guest vcpus pvclock areas).
1649 * To avoid that problem, do not allow visibility of distinct
1650 * system_timestamp/tsc_timestamp values simultaneously: use a master
1651 * copy of host monotonic time values. Update that master copy
1654 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1658 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1660 #ifdef CONFIG_X86_64
1661 struct kvm_arch
*ka
= &kvm
->arch
;
1663 bool host_tsc_clocksource
, vcpus_matched
;
1665 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1666 atomic_read(&kvm
->online_vcpus
));
1669 * If the host uses TSC clock, then passthrough TSC as stable
1672 host_tsc_clocksource
= kvm_get_time_and_clockread(
1673 &ka
->master_kernel_ns
,
1674 &ka
->master_cycle_now
);
1676 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1677 && !backwards_tsc_observed
1678 && !ka
->boot_vcpu_runs_old_kvmclock
;
1680 if (ka
->use_master_clock
)
1681 atomic_set(&kvm_guest_has_master_clock
, 1);
1683 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1684 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1689 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1691 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1694 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1696 #ifdef CONFIG_X86_64
1698 struct kvm_vcpu
*vcpu
;
1699 struct kvm_arch
*ka
= &kvm
->arch
;
1701 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1702 kvm_make_mclock_inprogress_request(kvm
);
1703 /* no guest entries from this point */
1704 pvclock_update_vm_gtod_copy(kvm
);
1706 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1707 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1709 /* guest entries allowed */
1710 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1711 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1713 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1717 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1719 unsigned long flags
, this_tsc_khz
, tgt_tsc_khz
;
1720 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1721 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1723 u64 tsc_timestamp
, host_tsc
;
1724 struct pvclock_vcpu_time_info guest_hv_clock
;
1726 bool use_master_clock
;
1732 * If the host uses TSC clock, then passthrough TSC as stable
1735 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1736 use_master_clock
= ka
->use_master_clock
;
1737 if (use_master_clock
) {
1738 host_tsc
= ka
->master_cycle_now
;
1739 kernel_ns
= ka
->master_kernel_ns
;
1741 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1743 /* Keep irq disabled to prevent changes to the clock */
1744 local_irq_save(flags
);
1745 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1746 if (unlikely(this_tsc_khz
== 0)) {
1747 local_irq_restore(flags
);
1748 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1751 if (!use_master_clock
) {
1753 kernel_ns
= get_kernel_ns();
1756 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1759 * We may have to catch up the TSC to match elapsed wall clock
1760 * time for two reasons, even if kvmclock is used.
1761 * 1) CPU could have been running below the maximum TSC rate
1762 * 2) Broken TSC compensation resets the base at each VCPU
1763 * entry to avoid unknown leaps of TSC even when running
1764 * again on the same CPU. This may cause apparent elapsed
1765 * time to disappear, and the guest to stand still or run
1768 if (vcpu
->tsc_catchup
) {
1769 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1770 if (tsc
> tsc_timestamp
) {
1771 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1772 tsc_timestamp
= tsc
;
1776 local_irq_restore(flags
);
1778 if (!vcpu
->pv_time_enabled
)
1781 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1782 tgt_tsc_khz
= kvm_has_tsc_control
?
1783 vcpu
->virtual_tsc_khz
: this_tsc_khz
;
1784 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, tgt_tsc_khz
,
1785 &vcpu
->hv_clock
.tsc_shift
,
1786 &vcpu
->hv_clock
.tsc_to_system_mul
);
1787 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1790 /* With all the info we got, fill in the values */
1791 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1792 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1793 vcpu
->last_guest_tsc
= tsc_timestamp
;
1795 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1796 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1799 /* This VCPU is paused, but it's legal for a guest to read another
1800 * VCPU's kvmclock, so we really have to follow the specification where
1801 * it says that version is odd if data is being modified, and even after
1804 * Version field updates must be kept separate. This is because
1805 * kvm_write_guest_cached might use a "rep movs" instruction, and
1806 * writes within a string instruction are weakly ordered. So there
1807 * are three writes overall.
1809 * As a small optimization, only write the version field in the first
1810 * and third write. The vcpu->pv_time cache is still valid, because the
1811 * version field is the first in the struct.
1813 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1815 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1816 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1818 sizeof(vcpu
->hv_clock
.version
));
1822 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1823 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1825 if (vcpu
->pvclock_set_guest_stopped_request
) {
1826 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1827 vcpu
->pvclock_set_guest_stopped_request
= false;
1830 /* If the host uses TSC clocksource, then it is stable */
1831 if (use_master_clock
)
1832 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1834 vcpu
->hv_clock
.flags
= pvclock_flags
;
1836 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1838 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1840 sizeof(vcpu
->hv_clock
));
1844 vcpu
->hv_clock
.version
++;
1845 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1847 sizeof(vcpu
->hv_clock
.version
));
1852 * kvmclock updates which are isolated to a given vcpu, such as
1853 * vcpu->cpu migration, should not allow system_timestamp from
1854 * the rest of the vcpus to remain static. Otherwise ntp frequency
1855 * correction applies to one vcpu's system_timestamp but not
1858 * So in those cases, request a kvmclock update for all vcpus.
1859 * We need to rate-limit these requests though, as they can
1860 * considerably slow guests that have a large number of vcpus.
1861 * The time for a remote vcpu to update its kvmclock is bound
1862 * by the delay we use to rate-limit the updates.
1865 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1867 static void kvmclock_update_fn(struct work_struct
*work
)
1870 struct delayed_work
*dwork
= to_delayed_work(work
);
1871 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1872 kvmclock_update_work
);
1873 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1874 struct kvm_vcpu
*vcpu
;
1876 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1877 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1878 kvm_vcpu_kick(vcpu
);
1882 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1884 struct kvm
*kvm
= v
->kvm
;
1886 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1887 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1888 KVMCLOCK_UPDATE_DELAY
);
1891 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1893 static void kvmclock_sync_fn(struct work_struct
*work
)
1895 struct delayed_work
*dwork
= to_delayed_work(work
);
1896 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1897 kvmclock_sync_work
);
1898 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1900 if (!kvmclock_periodic_sync
)
1903 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1904 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1905 KVMCLOCK_SYNC_PERIOD
);
1908 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1910 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1911 unsigned bank_num
= mcg_cap
& 0xff;
1914 case MSR_IA32_MCG_STATUS
:
1915 vcpu
->arch
.mcg_status
= data
;
1917 case MSR_IA32_MCG_CTL
:
1918 if (!(mcg_cap
& MCG_CTL_P
))
1920 if (data
!= 0 && data
!= ~(u64
)0)
1922 vcpu
->arch
.mcg_ctl
= data
;
1925 if (msr
>= MSR_IA32_MC0_CTL
&&
1926 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1927 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1928 /* only 0 or all 1s can be written to IA32_MCi_CTL
1929 * some Linux kernels though clear bit 10 in bank 4 to
1930 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1931 * this to avoid an uncatched #GP in the guest
1933 if ((offset
& 0x3) == 0 &&
1934 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1936 vcpu
->arch
.mce_banks
[offset
] = data
;
1944 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1946 struct kvm
*kvm
= vcpu
->kvm
;
1947 int lm
= is_long_mode(vcpu
);
1948 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1949 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1950 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1951 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1952 u32 page_num
= data
& ~PAGE_MASK
;
1953 u64 page_addr
= data
& PAGE_MASK
;
1958 if (page_num
>= blob_size
)
1961 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1966 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
1975 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1977 gpa_t gpa
= data
& ~0x3f;
1979 /* Bits 2:5 are reserved, Should be zero */
1983 vcpu
->arch
.apf
.msr_val
= data
;
1985 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1986 kvm_clear_async_pf_completion_queue(vcpu
);
1987 kvm_async_pf_hash_reset(vcpu
);
1991 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1995 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1996 kvm_async_pf_wakeup_all(vcpu
);
2000 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2002 vcpu
->arch
.pv_time_enabled
= false;
2005 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2009 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2012 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2013 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2014 vcpu
->arch
.st
.accum_steal
= delta
;
2017 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2019 accumulate_steal_time(vcpu
);
2021 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2024 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2025 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2028 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2029 vcpu
->arch
.st
.steal
.version
+= 2;
2030 vcpu
->arch
.st
.accum_steal
= 0;
2032 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2033 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2036 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2039 u32 msr
= msr_info
->index
;
2040 u64 data
= msr_info
->data
;
2043 case MSR_AMD64_NB_CFG
:
2044 case MSR_IA32_UCODE_REV
:
2045 case MSR_IA32_UCODE_WRITE
:
2046 case MSR_VM_HSAVE_PA
:
2047 case MSR_AMD64_PATCH_LOADER
:
2048 case MSR_AMD64_BU_CFG2
:
2052 return set_efer(vcpu
, data
);
2054 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2055 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2056 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2057 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2059 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2064 case MSR_FAM10H_MMIO_CONF_BASE
:
2066 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2071 case MSR_IA32_DEBUGCTLMSR
:
2073 /* We support the non-activated case already */
2075 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2076 /* Values other than LBR and BTF are vendor-specific,
2077 thus reserved and should throw a #GP */
2080 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2083 case 0x200 ... 0x2ff:
2084 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2085 case MSR_IA32_APICBASE
:
2086 return kvm_set_apic_base(vcpu
, msr_info
);
2087 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2088 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2089 case MSR_IA32_TSCDEADLINE
:
2090 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2092 case MSR_IA32_TSC_ADJUST
:
2093 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2094 if (!msr_info
->host_initiated
) {
2095 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2096 adjust_tsc_offset_guest(vcpu
, adj
);
2098 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2101 case MSR_IA32_MISC_ENABLE
:
2102 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2104 case MSR_IA32_SMBASE
:
2105 if (!msr_info
->host_initiated
)
2107 vcpu
->arch
.smbase
= data
;
2109 case MSR_KVM_WALL_CLOCK_NEW
:
2110 case MSR_KVM_WALL_CLOCK
:
2111 vcpu
->kvm
->arch
.wall_clock
= data
;
2112 kvm_write_wall_clock(vcpu
->kvm
, data
);
2114 case MSR_KVM_SYSTEM_TIME_NEW
:
2115 case MSR_KVM_SYSTEM_TIME
: {
2117 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2119 kvmclock_reset(vcpu
);
2121 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2122 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2124 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2125 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2128 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2131 vcpu
->arch
.time
= data
;
2132 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2134 /* we verify if the enable bit is set... */
2138 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2140 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2141 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2142 sizeof(struct pvclock_vcpu_time_info
)))
2143 vcpu
->arch
.pv_time_enabled
= false;
2145 vcpu
->arch
.pv_time_enabled
= true;
2149 case MSR_KVM_ASYNC_PF_EN
:
2150 if (kvm_pv_enable_async_pf(vcpu
, data
))
2153 case MSR_KVM_STEAL_TIME
:
2155 if (unlikely(!sched_info_on()))
2158 if (data
& KVM_STEAL_RESERVED_MASK
)
2161 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2162 data
& KVM_STEAL_VALID_BITS
,
2163 sizeof(struct kvm_steal_time
)))
2166 vcpu
->arch
.st
.msr_val
= data
;
2168 if (!(data
& KVM_MSR_ENABLED
))
2171 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2174 case MSR_KVM_PV_EOI_EN
:
2175 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2179 case MSR_IA32_MCG_CTL
:
2180 case MSR_IA32_MCG_STATUS
:
2181 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2182 return set_msr_mce(vcpu
, msr
, data
);
2184 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2185 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2186 pr
= true; /* fall through */
2187 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2188 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2189 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2190 return kvm_pmu_set_msr(vcpu
, msr_info
);
2192 if (pr
|| data
!= 0)
2193 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2194 "0x%x data 0x%llx\n", msr
, data
);
2196 case MSR_K7_CLK_CTL
:
2198 * Ignore all writes to this no longer documented MSR.
2199 * Writes are only relevant for old K7 processors,
2200 * all pre-dating SVM, but a recommended workaround from
2201 * AMD for these chips. It is possible to specify the
2202 * affected processor models on the command line, hence
2203 * the need to ignore the workaround.
2206 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2207 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2208 case HV_X64_MSR_CRASH_CTL
:
2209 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2210 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2211 msr_info
->host_initiated
);
2212 case MSR_IA32_BBL_CR_CTL3
:
2213 /* Drop writes to this legacy MSR -- see rdmsr
2214 * counterpart for further detail.
2216 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2218 case MSR_AMD64_OSVW_ID_LENGTH
:
2219 if (!guest_cpuid_has_osvw(vcpu
))
2221 vcpu
->arch
.osvw
.length
= data
;
2223 case MSR_AMD64_OSVW_STATUS
:
2224 if (!guest_cpuid_has_osvw(vcpu
))
2226 vcpu
->arch
.osvw
.status
= data
;
2229 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2230 return xen_hvm_config(vcpu
, data
);
2231 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2232 return kvm_pmu_set_msr(vcpu
, msr_info
);
2234 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2238 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2245 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2249 * Reads an msr value (of 'msr_index') into 'pdata'.
2250 * Returns 0 on success, non-0 otherwise.
2251 * Assumes vcpu_load() was already called.
2253 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2255 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2257 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2259 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2262 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2263 unsigned bank_num
= mcg_cap
& 0xff;
2266 case MSR_IA32_P5_MC_ADDR
:
2267 case MSR_IA32_P5_MC_TYPE
:
2270 case MSR_IA32_MCG_CAP
:
2271 data
= vcpu
->arch
.mcg_cap
;
2273 case MSR_IA32_MCG_CTL
:
2274 if (!(mcg_cap
& MCG_CTL_P
))
2276 data
= vcpu
->arch
.mcg_ctl
;
2278 case MSR_IA32_MCG_STATUS
:
2279 data
= vcpu
->arch
.mcg_status
;
2282 if (msr
>= MSR_IA32_MC0_CTL
&&
2283 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2284 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2285 data
= vcpu
->arch
.mce_banks
[offset
];
2294 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2296 switch (msr_info
->index
) {
2297 case MSR_IA32_PLATFORM_ID
:
2298 case MSR_IA32_EBL_CR_POWERON
:
2299 case MSR_IA32_DEBUGCTLMSR
:
2300 case MSR_IA32_LASTBRANCHFROMIP
:
2301 case MSR_IA32_LASTBRANCHTOIP
:
2302 case MSR_IA32_LASTINTFROMIP
:
2303 case MSR_IA32_LASTINTTOIP
:
2305 case MSR_K8_TSEG_ADDR
:
2306 case MSR_K8_TSEG_MASK
:
2308 case MSR_VM_HSAVE_PA
:
2309 case MSR_K8_INT_PENDING_MSG
:
2310 case MSR_AMD64_NB_CFG
:
2311 case MSR_FAM10H_MMIO_CONF_BASE
:
2312 case MSR_AMD64_BU_CFG2
:
2315 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2316 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2317 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2318 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2319 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2320 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2323 case MSR_IA32_UCODE_REV
:
2324 msr_info
->data
= 0x100000000ULL
;
2327 case 0x200 ... 0x2ff:
2328 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2329 case 0xcd: /* fsb frequency */
2333 * MSR_EBC_FREQUENCY_ID
2334 * Conservative value valid for even the basic CPU models.
2335 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2336 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2337 * and 266MHz for model 3, or 4. Set Core Clock
2338 * Frequency to System Bus Frequency Ratio to 1 (bits
2339 * 31:24) even though these are only valid for CPU
2340 * models > 2, however guests may end up dividing or
2341 * multiplying by zero otherwise.
2343 case MSR_EBC_FREQUENCY_ID
:
2344 msr_info
->data
= 1 << 24;
2346 case MSR_IA32_APICBASE
:
2347 msr_info
->data
= kvm_get_apic_base(vcpu
);
2349 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2350 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2352 case MSR_IA32_TSCDEADLINE
:
2353 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2355 case MSR_IA32_TSC_ADJUST
:
2356 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2358 case MSR_IA32_MISC_ENABLE
:
2359 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2361 case MSR_IA32_SMBASE
:
2362 if (!msr_info
->host_initiated
)
2364 msr_info
->data
= vcpu
->arch
.smbase
;
2366 case MSR_IA32_PERF_STATUS
:
2367 /* TSC increment by tick */
2368 msr_info
->data
= 1000ULL;
2369 /* CPU multiplier */
2370 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2373 msr_info
->data
= vcpu
->arch
.efer
;
2375 case MSR_KVM_WALL_CLOCK
:
2376 case MSR_KVM_WALL_CLOCK_NEW
:
2377 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2379 case MSR_KVM_SYSTEM_TIME
:
2380 case MSR_KVM_SYSTEM_TIME_NEW
:
2381 msr_info
->data
= vcpu
->arch
.time
;
2383 case MSR_KVM_ASYNC_PF_EN
:
2384 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2386 case MSR_KVM_STEAL_TIME
:
2387 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2389 case MSR_KVM_PV_EOI_EN
:
2390 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2392 case MSR_IA32_P5_MC_ADDR
:
2393 case MSR_IA32_P5_MC_TYPE
:
2394 case MSR_IA32_MCG_CAP
:
2395 case MSR_IA32_MCG_CTL
:
2396 case MSR_IA32_MCG_STATUS
:
2397 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2398 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2399 case MSR_K7_CLK_CTL
:
2401 * Provide expected ramp-up count for K7. All other
2402 * are set to zero, indicating minimum divisors for
2405 * This prevents guest kernels on AMD host with CPU
2406 * type 6, model 8 and higher from exploding due to
2407 * the rdmsr failing.
2409 msr_info
->data
= 0x20000000;
2411 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2412 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2413 case HV_X64_MSR_CRASH_CTL
:
2414 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2415 return kvm_hv_get_msr_common(vcpu
,
2416 msr_info
->index
, &msr_info
->data
);
2418 case MSR_IA32_BBL_CR_CTL3
:
2419 /* This legacy MSR exists but isn't fully documented in current
2420 * silicon. It is however accessed by winxp in very narrow
2421 * scenarios where it sets bit #19, itself documented as
2422 * a "reserved" bit. Best effort attempt to source coherent
2423 * read data here should the balance of the register be
2424 * interpreted by the guest:
2426 * L2 cache control register 3: 64GB range, 256KB size,
2427 * enabled, latency 0x1, configured
2429 msr_info
->data
= 0xbe702111;
2431 case MSR_AMD64_OSVW_ID_LENGTH
:
2432 if (!guest_cpuid_has_osvw(vcpu
))
2434 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2436 case MSR_AMD64_OSVW_STATUS
:
2437 if (!guest_cpuid_has_osvw(vcpu
))
2439 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2442 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2443 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2445 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr_info
->index
);
2448 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2455 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2458 * Read or write a bunch of msrs. All parameters are kernel addresses.
2460 * @return number of msrs set successfully.
2462 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2463 struct kvm_msr_entry
*entries
,
2464 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2465 unsigned index
, u64
*data
))
2469 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2470 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2471 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2473 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2479 * Read or write a bunch of msrs. Parameters are user addresses.
2481 * @return number of msrs set successfully.
2483 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2484 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2485 unsigned index
, u64
*data
),
2488 struct kvm_msrs msrs
;
2489 struct kvm_msr_entry
*entries
;
2494 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2498 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2501 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2502 entries
= memdup_user(user_msrs
->entries
, size
);
2503 if (IS_ERR(entries
)) {
2504 r
= PTR_ERR(entries
);
2508 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2513 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2524 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2529 case KVM_CAP_IRQCHIP
:
2531 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2532 case KVM_CAP_SET_TSS_ADDR
:
2533 case KVM_CAP_EXT_CPUID
:
2534 case KVM_CAP_EXT_EMUL_CPUID
:
2535 case KVM_CAP_CLOCKSOURCE
:
2537 case KVM_CAP_NOP_IO_DELAY
:
2538 case KVM_CAP_MP_STATE
:
2539 case KVM_CAP_SYNC_MMU
:
2540 case KVM_CAP_USER_NMI
:
2541 case KVM_CAP_REINJECT_CONTROL
:
2542 case KVM_CAP_IRQ_INJECT_STATUS
:
2543 case KVM_CAP_IOEVENTFD
:
2544 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2546 case KVM_CAP_PIT_STATE2
:
2547 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2548 case KVM_CAP_XEN_HVM
:
2549 case KVM_CAP_ADJUST_CLOCK
:
2550 case KVM_CAP_VCPU_EVENTS
:
2551 case KVM_CAP_HYPERV
:
2552 case KVM_CAP_HYPERV_VAPIC
:
2553 case KVM_CAP_HYPERV_SPIN
:
2554 case KVM_CAP_HYPERV_SYNIC
:
2555 case KVM_CAP_PCI_SEGMENT
:
2556 case KVM_CAP_DEBUGREGS
:
2557 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2559 case KVM_CAP_ASYNC_PF
:
2560 case KVM_CAP_GET_TSC_KHZ
:
2561 case KVM_CAP_KVMCLOCK_CTRL
:
2562 case KVM_CAP_READONLY_MEM
:
2563 case KVM_CAP_HYPERV_TIME
:
2564 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2565 case KVM_CAP_TSC_DEADLINE_TIMER
:
2566 case KVM_CAP_ENABLE_CAP_VM
:
2567 case KVM_CAP_DISABLE_QUIRKS
:
2568 case KVM_CAP_SET_BOOT_CPU_ID
:
2569 case KVM_CAP_SPLIT_IRQCHIP
:
2570 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2571 case KVM_CAP_ASSIGN_DEV_IRQ
:
2572 case KVM_CAP_PCI_2_3
:
2576 case KVM_CAP_X86_SMM
:
2577 /* SMBASE is usually relocated above 1M on modern chipsets,
2578 * and SMM handlers might indeed rely on 4G segment limits,
2579 * so do not report SMM to be available if real mode is
2580 * emulated via vm86 mode. Still, do not go to great lengths
2581 * to avoid userspace's usage of the feature, because it is a
2582 * fringe case that is not enabled except via specific settings
2583 * of the module parameters.
2585 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2587 case KVM_CAP_COALESCED_MMIO
:
2588 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2591 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2593 case KVM_CAP_NR_VCPUS
:
2594 r
= KVM_SOFT_MAX_VCPUS
;
2596 case KVM_CAP_MAX_VCPUS
:
2599 case KVM_CAP_NR_MEMSLOTS
:
2600 r
= KVM_USER_MEM_SLOTS
;
2602 case KVM_CAP_PV_MMU
: /* obsolete */
2605 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2607 r
= iommu_present(&pci_bus_type
);
2611 r
= KVM_MAX_MCE_BANKS
;
2616 case KVM_CAP_TSC_CONTROL
:
2617 r
= kvm_has_tsc_control
;
2627 long kvm_arch_dev_ioctl(struct file
*filp
,
2628 unsigned int ioctl
, unsigned long arg
)
2630 void __user
*argp
= (void __user
*)arg
;
2634 case KVM_GET_MSR_INDEX_LIST
: {
2635 struct kvm_msr_list __user
*user_msr_list
= argp
;
2636 struct kvm_msr_list msr_list
;
2640 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2643 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2644 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2647 if (n
< msr_list
.nmsrs
)
2650 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2651 num_msrs_to_save
* sizeof(u32
)))
2653 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2655 num_emulated_msrs
* sizeof(u32
)))
2660 case KVM_GET_SUPPORTED_CPUID
:
2661 case KVM_GET_EMULATED_CPUID
: {
2662 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2663 struct kvm_cpuid2 cpuid
;
2666 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2669 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2675 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2680 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2683 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2685 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2697 static void wbinvd_ipi(void *garbage
)
2702 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2704 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2707 static inline void kvm_migrate_timers(struct kvm_vcpu
*vcpu
)
2709 set_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
);
2712 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2714 /* Address WBINVD may be executed by guest */
2715 if (need_emulate_wbinvd(vcpu
)) {
2716 if (kvm_x86_ops
->has_wbinvd_exit())
2717 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2718 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2719 smp_call_function_single(vcpu
->cpu
,
2720 wbinvd_ipi
, NULL
, 1);
2723 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2725 /* Apply any externally detected TSC adjustments (due to suspend) */
2726 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2727 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2728 vcpu
->arch
.tsc_offset_adjustment
= 0;
2729 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2732 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2733 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2734 rdtsc() - vcpu
->arch
.last_host_tsc
;
2736 mark_tsc_unstable("KVM discovered backwards TSC");
2737 if (check_tsc_unstable()) {
2738 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2739 vcpu
->arch
.last_guest_tsc
);
2740 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2741 vcpu
->arch
.tsc_catchup
= 1;
2744 * On a host with synchronized TSC, there is no need to update
2745 * kvmclock on vcpu->cpu migration
2747 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2748 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2749 if (vcpu
->cpu
!= cpu
)
2750 kvm_migrate_timers(vcpu
);
2754 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2757 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2759 kvm_x86_ops
->vcpu_put(vcpu
);
2760 kvm_put_guest_fpu(vcpu
);
2761 vcpu
->arch
.last_host_tsc
= rdtsc();
2764 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2765 struct kvm_lapic_state
*s
)
2767 if (vcpu
->arch
.apicv_active
)
2768 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2770 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2775 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2776 struct kvm_lapic_state
*s
)
2778 kvm_apic_post_state_restore(vcpu
, s
);
2779 update_cr8_intercept(vcpu
);
2784 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2786 return (!lapic_in_kernel(vcpu
) ||
2787 kvm_apic_accept_pic_intr(vcpu
));
2791 * if userspace requested an interrupt window, check that the
2792 * interrupt window is open.
2794 * No need to exit to userspace if we already have an interrupt queued.
2796 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2798 return kvm_arch_interrupt_allowed(vcpu
) &&
2799 !kvm_cpu_has_interrupt(vcpu
) &&
2800 !kvm_event_needs_reinjection(vcpu
) &&
2801 kvm_cpu_accept_dm_intr(vcpu
);
2804 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2805 struct kvm_interrupt
*irq
)
2807 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2810 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2811 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2812 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2817 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2818 * fail for in-kernel 8259.
2820 if (pic_in_kernel(vcpu
->kvm
))
2823 if (vcpu
->arch
.pending_external_vector
!= -1)
2826 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2827 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2831 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2833 kvm_inject_nmi(vcpu
);
2838 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2840 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2845 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2846 struct kvm_tpr_access_ctl
*tac
)
2850 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2854 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2858 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2861 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2863 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2866 vcpu
->arch
.mcg_cap
= mcg_cap
;
2867 /* Init IA32_MCG_CTL to all 1s */
2868 if (mcg_cap
& MCG_CTL_P
)
2869 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2870 /* Init IA32_MCi_CTL to all 1s */
2871 for (bank
= 0; bank
< bank_num
; bank
++)
2872 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2877 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2878 struct kvm_x86_mce
*mce
)
2880 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2881 unsigned bank_num
= mcg_cap
& 0xff;
2882 u64
*banks
= vcpu
->arch
.mce_banks
;
2884 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2887 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2888 * reporting is disabled
2890 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2891 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2893 banks
+= 4 * mce
->bank
;
2895 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2896 * reporting is disabled for the bank
2898 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2900 if (mce
->status
& MCI_STATUS_UC
) {
2901 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2902 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2903 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2906 if (banks
[1] & MCI_STATUS_VAL
)
2907 mce
->status
|= MCI_STATUS_OVER
;
2908 banks
[2] = mce
->addr
;
2909 banks
[3] = mce
->misc
;
2910 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2911 banks
[1] = mce
->status
;
2912 kvm_queue_exception(vcpu
, MC_VECTOR
);
2913 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2914 || !(banks
[1] & MCI_STATUS_UC
)) {
2915 if (banks
[1] & MCI_STATUS_VAL
)
2916 mce
->status
|= MCI_STATUS_OVER
;
2917 banks
[2] = mce
->addr
;
2918 banks
[3] = mce
->misc
;
2919 banks
[1] = mce
->status
;
2921 banks
[1] |= MCI_STATUS_OVER
;
2925 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2926 struct kvm_vcpu_events
*events
)
2929 events
->exception
.injected
=
2930 vcpu
->arch
.exception
.pending
&&
2931 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2932 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2933 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2934 events
->exception
.pad
= 0;
2935 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2937 events
->interrupt
.injected
=
2938 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2939 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2940 events
->interrupt
.soft
= 0;
2941 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
2943 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2944 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2945 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2946 events
->nmi
.pad
= 0;
2948 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2950 events
->smi
.smm
= is_smm(vcpu
);
2951 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
2952 events
->smi
.smm_inside_nmi
=
2953 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
2954 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
2956 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2957 | KVM_VCPUEVENT_VALID_SHADOW
2958 | KVM_VCPUEVENT_VALID_SMM
);
2959 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2962 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2963 struct kvm_vcpu_events
*events
)
2965 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2966 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2967 | KVM_VCPUEVENT_VALID_SHADOW
2968 | KVM_VCPUEVENT_VALID_SMM
))
2972 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2973 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2974 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2975 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2977 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2978 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2979 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2980 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2981 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2982 events
->interrupt
.shadow
);
2984 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2985 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2986 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2987 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2989 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
2990 kvm_vcpu_has_lapic(vcpu
))
2991 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
2993 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
2994 if (events
->smi
.smm
)
2995 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
2997 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
2998 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
2999 if (events
->smi
.smm_inside_nmi
)
3000 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3002 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3003 if (kvm_vcpu_has_lapic(vcpu
)) {
3004 if (events
->smi
.latched_init
)
3005 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3007 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3011 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3016 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3017 struct kvm_debugregs
*dbgregs
)
3021 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3022 kvm_get_dr(vcpu
, 6, &val
);
3024 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3026 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3029 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3030 struct kvm_debugregs
*dbgregs
)
3035 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3036 kvm_update_dr0123(vcpu
);
3037 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3038 kvm_update_dr6(vcpu
);
3039 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3040 kvm_update_dr7(vcpu
);
3045 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3047 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3049 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3050 u64 xstate_bv
= xsave
->header
.xfeatures
;
3054 * Copy legacy XSAVE area, to avoid complications with CPUID
3055 * leaves 0 and 1 in the loop below.
3057 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3060 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3063 * Copy each region from the possibly compacted offset to the
3064 * non-compacted offset.
3066 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3068 u64 feature
= valid
& -valid
;
3069 int index
= fls64(feature
) - 1;
3070 void *src
= get_xsave_addr(xsave
, feature
);
3073 u32 size
, offset
, ecx
, edx
;
3074 cpuid_count(XSTATE_CPUID
, index
,
3075 &size
, &offset
, &ecx
, &edx
);
3076 memcpy(dest
+ offset
, src
, size
);
3083 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3085 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3086 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3090 * Copy legacy XSAVE area, to avoid complications with CPUID
3091 * leaves 0 and 1 in the loop below.
3093 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3095 /* Set XSTATE_BV and possibly XCOMP_BV. */
3096 xsave
->header
.xfeatures
= xstate_bv
;
3098 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3101 * Copy each region from the non-compacted offset to the
3102 * possibly compacted offset.
3104 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3106 u64 feature
= valid
& -valid
;
3107 int index
= fls64(feature
) - 1;
3108 void *dest
= get_xsave_addr(xsave
, feature
);
3111 u32 size
, offset
, ecx
, edx
;
3112 cpuid_count(XSTATE_CPUID
, index
,
3113 &size
, &offset
, &ecx
, &edx
);
3114 memcpy(dest
, src
+ offset
, size
);
3121 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3122 struct kvm_xsave
*guest_xsave
)
3124 if (cpu_has_xsave
) {
3125 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3126 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3128 memcpy(guest_xsave
->region
,
3129 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3130 sizeof(struct fxregs_state
));
3131 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3132 XFEATURE_MASK_FPSSE
;
3136 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3137 struct kvm_xsave
*guest_xsave
)
3140 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3142 if (cpu_has_xsave
) {
3144 * Here we allow setting states that are not present in
3145 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3146 * with old userspace.
3148 if (xstate_bv
& ~kvm_supported_xcr0())
3150 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3152 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
)
3154 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3155 guest_xsave
->region
, sizeof(struct fxregs_state
));
3160 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3161 struct kvm_xcrs
*guest_xcrs
)
3163 if (!cpu_has_xsave
) {
3164 guest_xcrs
->nr_xcrs
= 0;
3168 guest_xcrs
->nr_xcrs
= 1;
3169 guest_xcrs
->flags
= 0;
3170 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3171 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3174 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3175 struct kvm_xcrs
*guest_xcrs
)
3182 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3185 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3186 /* Only support XCR0 currently */
3187 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3188 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3189 guest_xcrs
->xcrs
[i
].value
);
3198 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3199 * stopped by the hypervisor. This function will be called from the host only.
3200 * EINVAL is returned when the host attempts to set the flag for a guest that
3201 * does not support pv clocks.
3203 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3205 if (!vcpu
->arch
.pv_time_enabled
)
3207 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3208 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3212 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3213 struct kvm_enable_cap
*cap
)
3219 case KVM_CAP_HYPERV_SYNIC
:
3220 return kvm_hv_activate_synic(vcpu
);
3226 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3227 unsigned int ioctl
, unsigned long arg
)
3229 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3230 void __user
*argp
= (void __user
*)arg
;
3233 struct kvm_lapic_state
*lapic
;
3234 struct kvm_xsave
*xsave
;
3235 struct kvm_xcrs
*xcrs
;
3241 case KVM_GET_LAPIC
: {
3243 if (!vcpu
->arch
.apic
)
3245 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3250 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3254 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3259 case KVM_SET_LAPIC
: {
3261 if (!vcpu
->arch
.apic
)
3263 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3264 if (IS_ERR(u
.lapic
))
3265 return PTR_ERR(u
.lapic
);
3267 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3270 case KVM_INTERRUPT
: {
3271 struct kvm_interrupt irq
;
3274 if (copy_from_user(&irq
, argp
, sizeof irq
))
3276 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3280 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3284 r
= kvm_vcpu_ioctl_smi(vcpu
);
3287 case KVM_SET_CPUID
: {
3288 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3289 struct kvm_cpuid cpuid
;
3292 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3294 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3297 case KVM_SET_CPUID2
: {
3298 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3299 struct kvm_cpuid2 cpuid
;
3302 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3304 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3305 cpuid_arg
->entries
);
3308 case KVM_GET_CPUID2
: {
3309 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3310 struct kvm_cpuid2 cpuid
;
3313 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3315 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3316 cpuid_arg
->entries
);
3320 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3326 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3329 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3331 case KVM_TPR_ACCESS_REPORTING
: {
3332 struct kvm_tpr_access_ctl tac
;
3335 if (copy_from_user(&tac
, argp
, sizeof tac
))
3337 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3341 if (copy_to_user(argp
, &tac
, sizeof tac
))
3346 case KVM_SET_VAPIC_ADDR
: {
3347 struct kvm_vapic_addr va
;
3350 if (!lapic_in_kernel(vcpu
))
3353 if (copy_from_user(&va
, argp
, sizeof va
))
3355 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3358 case KVM_X86_SETUP_MCE
: {
3362 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3364 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3367 case KVM_X86_SET_MCE
: {
3368 struct kvm_x86_mce mce
;
3371 if (copy_from_user(&mce
, argp
, sizeof mce
))
3373 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3376 case KVM_GET_VCPU_EVENTS
: {
3377 struct kvm_vcpu_events events
;
3379 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3382 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3387 case KVM_SET_VCPU_EVENTS
: {
3388 struct kvm_vcpu_events events
;
3391 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3394 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3397 case KVM_GET_DEBUGREGS
: {
3398 struct kvm_debugregs dbgregs
;
3400 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3403 if (copy_to_user(argp
, &dbgregs
,
3404 sizeof(struct kvm_debugregs
)))
3409 case KVM_SET_DEBUGREGS
: {
3410 struct kvm_debugregs dbgregs
;
3413 if (copy_from_user(&dbgregs
, argp
,
3414 sizeof(struct kvm_debugregs
)))
3417 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3420 case KVM_GET_XSAVE
: {
3421 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3426 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3429 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3434 case KVM_SET_XSAVE
: {
3435 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3436 if (IS_ERR(u
.xsave
))
3437 return PTR_ERR(u
.xsave
);
3439 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3442 case KVM_GET_XCRS
: {
3443 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3448 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3451 if (copy_to_user(argp
, u
.xcrs
,
3452 sizeof(struct kvm_xcrs
)))
3457 case KVM_SET_XCRS
: {
3458 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3460 return PTR_ERR(u
.xcrs
);
3462 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3465 case KVM_SET_TSC_KHZ
: {
3469 user_tsc_khz
= (u32
)arg
;
3471 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3474 if (user_tsc_khz
== 0)
3475 user_tsc_khz
= tsc_khz
;
3477 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3482 case KVM_GET_TSC_KHZ
: {
3483 r
= vcpu
->arch
.virtual_tsc_khz
;
3486 case KVM_KVMCLOCK_CTRL
: {
3487 r
= kvm_set_guest_paused(vcpu
);
3490 case KVM_ENABLE_CAP
: {
3491 struct kvm_enable_cap cap
;
3494 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3496 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3507 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3509 return VM_FAULT_SIGBUS
;
3512 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3516 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3518 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3522 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3525 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3529 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3530 u32 kvm_nr_mmu_pages
)
3532 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3535 mutex_lock(&kvm
->slots_lock
);
3537 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3538 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3540 mutex_unlock(&kvm
->slots_lock
);
3544 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3546 return kvm
->arch
.n_max_mmu_pages
;
3549 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3554 switch (chip
->chip_id
) {
3555 case KVM_IRQCHIP_PIC_MASTER
:
3556 memcpy(&chip
->chip
.pic
,
3557 &pic_irqchip(kvm
)->pics
[0],
3558 sizeof(struct kvm_pic_state
));
3560 case KVM_IRQCHIP_PIC_SLAVE
:
3561 memcpy(&chip
->chip
.pic
,
3562 &pic_irqchip(kvm
)->pics
[1],
3563 sizeof(struct kvm_pic_state
));
3565 case KVM_IRQCHIP_IOAPIC
:
3566 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3575 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3580 switch (chip
->chip_id
) {
3581 case KVM_IRQCHIP_PIC_MASTER
:
3582 spin_lock(&pic_irqchip(kvm
)->lock
);
3583 memcpy(&pic_irqchip(kvm
)->pics
[0],
3585 sizeof(struct kvm_pic_state
));
3586 spin_unlock(&pic_irqchip(kvm
)->lock
);
3588 case KVM_IRQCHIP_PIC_SLAVE
:
3589 spin_lock(&pic_irqchip(kvm
)->lock
);
3590 memcpy(&pic_irqchip(kvm
)->pics
[1],
3592 sizeof(struct kvm_pic_state
));
3593 spin_unlock(&pic_irqchip(kvm
)->lock
);
3595 case KVM_IRQCHIP_IOAPIC
:
3596 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3602 kvm_pic_update_irq(pic_irqchip(kvm
));
3606 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3608 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3609 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3610 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3614 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3617 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3618 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3619 for (i
= 0; i
< 3; i
++)
3620 kvm_pit_load_count(kvm
, i
, ps
->channels
[i
].count
, 0);
3621 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3625 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3627 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3628 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3629 sizeof(ps
->channels
));
3630 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3631 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3632 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3636 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3640 u32 prev_legacy
, cur_legacy
;
3641 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3642 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3643 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3644 if (!prev_legacy
&& cur_legacy
)
3646 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3647 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3648 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3649 for (i
= 0; i
< 3; i
++)
3650 kvm_pit_load_count(kvm
, i
, kvm
->arch
.vpit
->pit_state
.channels
[i
].count
,
3652 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3656 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3657 struct kvm_reinject_control
*control
)
3659 if (!kvm
->arch
.vpit
)
3661 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3662 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3663 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3668 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3669 * @kvm: kvm instance
3670 * @log: slot id and address to which we copy the log
3672 * Steps 1-4 below provide general overview of dirty page logging. See
3673 * kvm_get_dirty_log_protect() function description for additional details.
3675 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3676 * always flush the TLB (step 4) even if previous step failed and the dirty
3677 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3678 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3679 * writes will be marked dirty for next log read.
3681 * 1. Take a snapshot of the bit and clear it if needed.
3682 * 2. Write protect the corresponding page.
3683 * 3. Copy the snapshot to the userspace.
3684 * 4. Flush TLB's if needed.
3686 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3688 bool is_dirty
= false;
3691 mutex_lock(&kvm
->slots_lock
);
3694 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3696 if (kvm_x86_ops
->flush_log_dirty
)
3697 kvm_x86_ops
->flush_log_dirty(kvm
);
3699 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3702 * All the TLBs can be flushed out of mmu lock, see the comments in
3703 * kvm_mmu_slot_remove_write_access().
3705 lockdep_assert_held(&kvm
->slots_lock
);
3707 kvm_flush_remote_tlbs(kvm
);
3709 mutex_unlock(&kvm
->slots_lock
);
3713 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3716 if (!irqchip_in_kernel(kvm
))
3719 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3720 irq_event
->irq
, irq_event
->level
,
3725 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3726 struct kvm_enable_cap
*cap
)
3734 case KVM_CAP_DISABLE_QUIRKS
:
3735 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3738 case KVM_CAP_SPLIT_IRQCHIP
: {
3739 mutex_lock(&kvm
->lock
);
3741 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3742 goto split_irqchip_unlock
;
3744 if (irqchip_in_kernel(kvm
))
3745 goto split_irqchip_unlock
;
3746 if (atomic_read(&kvm
->online_vcpus
))
3747 goto split_irqchip_unlock
;
3748 r
= kvm_setup_empty_irq_routing(kvm
);
3750 goto split_irqchip_unlock
;
3751 /* Pairs with irqchip_in_kernel. */
3753 kvm
->arch
.irqchip_split
= true;
3754 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3756 split_irqchip_unlock
:
3757 mutex_unlock(&kvm
->lock
);
3767 long kvm_arch_vm_ioctl(struct file
*filp
,
3768 unsigned int ioctl
, unsigned long arg
)
3770 struct kvm
*kvm
= filp
->private_data
;
3771 void __user
*argp
= (void __user
*)arg
;
3774 * This union makes it completely explicit to gcc-3.x
3775 * that these two variables' stack usage should be
3776 * combined, not added together.
3779 struct kvm_pit_state ps
;
3780 struct kvm_pit_state2 ps2
;
3781 struct kvm_pit_config pit_config
;
3785 case KVM_SET_TSS_ADDR
:
3786 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3788 case KVM_SET_IDENTITY_MAP_ADDR
: {
3792 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3794 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3797 case KVM_SET_NR_MMU_PAGES
:
3798 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3800 case KVM_GET_NR_MMU_PAGES
:
3801 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3803 case KVM_CREATE_IRQCHIP
: {
3804 struct kvm_pic
*vpic
;
3806 mutex_lock(&kvm
->lock
);
3809 goto create_irqchip_unlock
;
3811 if (atomic_read(&kvm
->online_vcpus
))
3812 goto create_irqchip_unlock
;
3814 vpic
= kvm_create_pic(kvm
);
3816 r
= kvm_ioapic_init(kvm
);
3818 mutex_lock(&kvm
->slots_lock
);
3819 kvm_destroy_pic(vpic
);
3820 mutex_unlock(&kvm
->slots_lock
);
3821 goto create_irqchip_unlock
;
3824 goto create_irqchip_unlock
;
3825 r
= kvm_setup_default_irq_routing(kvm
);
3827 mutex_lock(&kvm
->slots_lock
);
3828 mutex_lock(&kvm
->irq_lock
);
3829 kvm_ioapic_destroy(kvm
);
3830 kvm_destroy_pic(vpic
);
3831 mutex_unlock(&kvm
->irq_lock
);
3832 mutex_unlock(&kvm
->slots_lock
);
3833 goto create_irqchip_unlock
;
3835 /* Write kvm->irq_routing before kvm->arch.vpic. */
3837 kvm
->arch
.vpic
= vpic
;
3838 create_irqchip_unlock
:
3839 mutex_unlock(&kvm
->lock
);
3842 case KVM_CREATE_PIT
:
3843 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3845 case KVM_CREATE_PIT2
:
3847 if (copy_from_user(&u
.pit_config
, argp
,
3848 sizeof(struct kvm_pit_config
)))
3851 mutex_lock(&kvm
->slots_lock
);
3854 goto create_pit_unlock
;
3856 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3860 mutex_unlock(&kvm
->slots_lock
);
3862 case KVM_GET_IRQCHIP
: {
3863 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3864 struct kvm_irqchip
*chip
;
3866 chip
= memdup_user(argp
, sizeof(*chip
));
3873 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3874 goto get_irqchip_out
;
3875 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3877 goto get_irqchip_out
;
3879 if (copy_to_user(argp
, chip
, sizeof *chip
))
3880 goto get_irqchip_out
;
3886 case KVM_SET_IRQCHIP
: {
3887 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3888 struct kvm_irqchip
*chip
;
3890 chip
= memdup_user(argp
, sizeof(*chip
));
3897 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3898 goto set_irqchip_out
;
3899 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3901 goto set_irqchip_out
;
3909 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3912 if (!kvm
->arch
.vpit
)
3914 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3918 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3925 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3928 if (!kvm
->arch
.vpit
)
3930 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3933 case KVM_GET_PIT2
: {
3935 if (!kvm
->arch
.vpit
)
3937 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3941 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3946 case KVM_SET_PIT2
: {
3948 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3951 if (!kvm
->arch
.vpit
)
3953 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3956 case KVM_REINJECT_CONTROL
: {
3957 struct kvm_reinject_control control
;
3959 if (copy_from_user(&control
, argp
, sizeof(control
)))
3961 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3964 case KVM_SET_BOOT_CPU_ID
:
3966 mutex_lock(&kvm
->lock
);
3967 if (atomic_read(&kvm
->online_vcpus
) != 0)
3970 kvm
->arch
.bsp_vcpu_id
= arg
;
3971 mutex_unlock(&kvm
->lock
);
3973 case KVM_XEN_HVM_CONFIG
: {
3975 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3976 sizeof(struct kvm_xen_hvm_config
)))
3979 if (kvm
->arch
.xen_hvm_config
.flags
)
3984 case KVM_SET_CLOCK
: {
3985 struct kvm_clock_data user_ns
;
3990 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3998 local_irq_disable();
3999 now_ns
= get_kernel_ns();
4000 delta
= user_ns
.clock
- now_ns
;
4002 kvm
->arch
.kvmclock_offset
= delta
;
4003 kvm_gen_update_masterclock(kvm
);
4006 case KVM_GET_CLOCK
: {
4007 struct kvm_clock_data user_ns
;
4010 local_irq_disable();
4011 now_ns
= get_kernel_ns();
4012 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
4015 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4018 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4023 case KVM_ENABLE_CAP
: {
4024 struct kvm_enable_cap cap
;
4027 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4029 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4033 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4039 static void kvm_init_msr_list(void)
4044 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4045 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4049 * Even MSRs that are valid in the host may not be exposed
4050 * to the guests in some cases.
4052 switch (msrs_to_save
[i
]) {
4053 case MSR_IA32_BNDCFGS
:
4054 if (!kvm_x86_ops
->mpx_supported())
4058 if (!kvm_x86_ops
->rdtscp_supported())
4066 msrs_to_save
[j
] = msrs_to_save
[i
];
4069 num_msrs_to_save
= j
;
4071 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4072 switch (emulated_msrs
[i
]) {
4073 case MSR_IA32_SMBASE
:
4074 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4082 emulated_msrs
[j
] = emulated_msrs
[i
];
4085 num_emulated_msrs
= j
;
4088 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4096 if (!(vcpu
->arch
.apic
&&
4097 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4098 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4109 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4116 if (!(vcpu
->arch
.apic
&&
4117 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4119 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4121 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4131 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4132 struct kvm_segment
*var
, int seg
)
4134 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4137 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4138 struct kvm_segment
*var
, int seg
)
4140 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4143 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4144 struct x86_exception
*exception
)
4148 BUG_ON(!mmu_is_nested(vcpu
));
4150 /* NPT walks are always user-walks */
4151 access
|= PFERR_USER_MASK
;
4152 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4157 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4158 struct x86_exception
*exception
)
4160 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4161 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4164 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4165 struct x86_exception
*exception
)
4167 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4168 access
|= PFERR_FETCH_MASK
;
4169 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4172 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4173 struct x86_exception
*exception
)
4175 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4176 access
|= PFERR_WRITE_MASK
;
4177 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4180 /* uses this to access any guest's mapped memory without checking CPL */
4181 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4182 struct x86_exception
*exception
)
4184 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4187 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4188 struct kvm_vcpu
*vcpu
, u32 access
,
4189 struct x86_exception
*exception
)
4192 int r
= X86EMUL_CONTINUE
;
4195 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4197 unsigned offset
= addr
& (PAGE_SIZE
-1);
4198 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4201 if (gpa
== UNMAPPED_GVA
)
4202 return X86EMUL_PROPAGATE_FAULT
;
4203 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4206 r
= X86EMUL_IO_NEEDED
;
4218 /* used for instruction fetching */
4219 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4220 gva_t addr
, void *val
, unsigned int bytes
,
4221 struct x86_exception
*exception
)
4223 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4224 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4228 /* Inline kvm_read_guest_virt_helper for speed. */
4229 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4231 if (unlikely(gpa
== UNMAPPED_GVA
))
4232 return X86EMUL_PROPAGATE_FAULT
;
4234 offset
= addr
& (PAGE_SIZE
-1);
4235 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4236 bytes
= (unsigned)PAGE_SIZE
- offset
;
4237 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4239 if (unlikely(ret
< 0))
4240 return X86EMUL_IO_NEEDED
;
4242 return X86EMUL_CONTINUE
;
4245 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4246 gva_t addr
, void *val
, unsigned int bytes
,
4247 struct x86_exception
*exception
)
4249 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4250 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4252 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4255 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4257 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4258 gva_t addr
, void *val
, unsigned int bytes
,
4259 struct x86_exception
*exception
)
4261 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4262 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4265 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4266 unsigned long addr
, void *val
, unsigned int bytes
)
4268 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4269 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4271 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4274 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4275 gva_t addr
, void *val
,
4277 struct x86_exception
*exception
)
4279 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4281 int r
= X86EMUL_CONTINUE
;
4284 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4287 unsigned offset
= addr
& (PAGE_SIZE
-1);
4288 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4291 if (gpa
== UNMAPPED_GVA
)
4292 return X86EMUL_PROPAGATE_FAULT
;
4293 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4295 r
= X86EMUL_IO_NEEDED
;
4306 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4308 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4309 gpa_t
*gpa
, struct x86_exception
*exception
,
4312 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4313 | (write
? PFERR_WRITE_MASK
: 0);
4315 if (vcpu_match_mmio_gva(vcpu
, gva
)
4316 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4317 vcpu
->arch
.access
, access
)) {
4318 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4319 (gva
& (PAGE_SIZE
- 1));
4320 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4324 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4326 if (*gpa
== UNMAPPED_GVA
)
4329 /* For APIC access vmexit */
4330 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4333 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4334 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4341 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4342 const void *val
, int bytes
)
4346 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4349 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4353 struct read_write_emulator_ops
{
4354 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4356 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4357 void *val
, int bytes
);
4358 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4359 int bytes
, void *val
);
4360 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4361 void *val
, int bytes
);
4365 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4367 if (vcpu
->mmio_read_completed
) {
4368 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4369 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4370 vcpu
->mmio_read_completed
= 0;
4377 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4378 void *val
, int bytes
)
4380 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4383 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4384 void *val
, int bytes
)
4386 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4389 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4391 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4392 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4395 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4396 void *val
, int bytes
)
4398 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4399 return X86EMUL_IO_NEEDED
;
4402 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4403 void *val
, int bytes
)
4405 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4407 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4408 return X86EMUL_CONTINUE
;
4411 static const struct read_write_emulator_ops read_emultor
= {
4412 .read_write_prepare
= read_prepare
,
4413 .read_write_emulate
= read_emulate
,
4414 .read_write_mmio
= vcpu_mmio_read
,
4415 .read_write_exit_mmio
= read_exit_mmio
,
4418 static const struct read_write_emulator_ops write_emultor
= {
4419 .read_write_emulate
= write_emulate
,
4420 .read_write_mmio
= write_mmio
,
4421 .read_write_exit_mmio
= write_exit_mmio
,
4425 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4427 struct x86_exception
*exception
,
4428 struct kvm_vcpu
*vcpu
,
4429 const struct read_write_emulator_ops
*ops
)
4433 bool write
= ops
->write
;
4434 struct kvm_mmio_fragment
*frag
;
4436 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4439 return X86EMUL_PROPAGATE_FAULT
;
4441 /* For APIC access vmexit */
4445 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4446 return X86EMUL_CONTINUE
;
4450 * Is this MMIO handled locally?
4452 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4453 if (handled
== bytes
)
4454 return X86EMUL_CONTINUE
;
4460 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4461 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4465 return X86EMUL_CONTINUE
;
4468 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4470 void *val
, unsigned int bytes
,
4471 struct x86_exception
*exception
,
4472 const struct read_write_emulator_ops
*ops
)
4474 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4478 if (ops
->read_write_prepare
&&
4479 ops
->read_write_prepare(vcpu
, val
, bytes
))
4480 return X86EMUL_CONTINUE
;
4482 vcpu
->mmio_nr_fragments
= 0;
4484 /* Crossing a page boundary? */
4485 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4488 now
= -addr
& ~PAGE_MASK
;
4489 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4492 if (rc
!= X86EMUL_CONTINUE
)
4495 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4501 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4503 if (rc
!= X86EMUL_CONTINUE
)
4506 if (!vcpu
->mmio_nr_fragments
)
4509 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4511 vcpu
->mmio_needed
= 1;
4512 vcpu
->mmio_cur_fragment
= 0;
4514 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4515 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4516 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4517 vcpu
->run
->mmio
.phys_addr
= gpa
;
4519 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4522 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4526 struct x86_exception
*exception
)
4528 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4529 exception
, &read_emultor
);
4532 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4536 struct x86_exception
*exception
)
4538 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4539 exception
, &write_emultor
);
4542 #define CMPXCHG_TYPE(t, ptr, old, new) \
4543 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4545 #ifdef CONFIG_X86_64
4546 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4548 # define CMPXCHG64(ptr, old, new) \
4549 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4552 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4557 struct x86_exception
*exception
)
4559 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4565 /* guests cmpxchg8b have to be emulated atomically */
4566 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4569 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4571 if (gpa
== UNMAPPED_GVA
||
4572 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4575 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4578 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4579 if (is_error_page(page
))
4582 kaddr
= kmap_atomic(page
);
4583 kaddr
+= offset_in_page(gpa
);
4586 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4589 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4592 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4595 exchanged
= CMPXCHG64(kaddr
, old
, new);
4600 kunmap_atomic(kaddr
);
4601 kvm_release_page_dirty(page
);
4604 return X86EMUL_CMPXCHG_FAILED
;
4606 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4607 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4609 return X86EMUL_CONTINUE
;
4612 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4614 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4617 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4619 /* TODO: String I/O for in kernel device */
4622 if (vcpu
->arch
.pio
.in
)
4623 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4624 vcpu
->arch
.pio
.size
, pd
);
4626 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4627 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4632 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4633 unsigned short port
, void *val
,
4634 unsigned int count
, bool in
)
4636 vcpu
->arch
.pio
.port
= port
;
4637 vcpu
->arch
.pio
.in
= in
;
4638 vcpu
->arch
.pio
.count
= count
;
4639 vcpu
->arch
.pio
.size
= size
;
4641 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4642 vcpu
->arch
.pio
.count
= 0;
4646 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4647 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4648 vcpu
->run
->io
.size
= size
;
4649 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4650 vcpu
->run
->io
.count
= count
;
4651 vcpu
->run
->io
.port
= port
;
4656 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4657 int size
, unsigned short port
, void *val
,
4660 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4663 if (vcpu
->arch
.pio
.count
)
4666 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4669 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4670 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4671 vcpu
->arch
.pio
.count
= 0;
4678 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4679 int size
, unsigned short port
,
4680 const void *val
, unsigned int count
)
4682 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4684 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4685 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4686 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4689 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4691 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4694 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4696 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4699 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4701 if (!need_emulate_wbinvd(vcpu
))
4702 return X86EMUL_CONTINUE
;
4704 if (kvm_x86_ops
->has_wbinvd_exit()) {
4705 int cpu
= get_cpu();
4707 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4708 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4709 wbinvd_ipi
, NULL
, 1);
4711 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4714 return X86EMUL_CONTINUE
;
4717 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4719 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4720 return kvm_emulate_wbinvd_noskip(vcpu
);
4722 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4726 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4728 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4731 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4732 unsigned long *dest
)
4734 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4737 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4738 unsigned long value
)
4741 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4744 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4746 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4749 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4751 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4752 unsigned long value
;
4756 value
= kvm_read_cr0(vcpu
);
4759 value
= vcpu
->arch
.cr2
;
4762 value
= kvm_read_cr3(vcpu
);
4765 value
= kvm_read_cr4(vcpu
);
4768 value
= kvm_get_cr8(vcpu
);
4771 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4778 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4780 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4785 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4788 vcpu
->arch
.cr2
= val
;
4791 res
= kvm_set_cr3(vcpu
, val
);
4794 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4797 res
= kvm_set_cr8(vcpu
, val
);
4800 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4807 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4809 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4812 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4814 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4817 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4819 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4822 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4824 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4827 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4829 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4832 static unsigned long emulator_get_cached_segment_base(
4833 struct x86_emulate_ctxt
*ctxt
, int seg
)
4835 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4838 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4839 struct desc_struct
*desc
, u32
*base3
,
4842 struct kvm_segment var
;
4844 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4845 *selector
= var
.selector
;
4848 memset(desc
, 0, sizeof(*desc
));
4854 set_desc_limit(desc
, var
.limit
);
4855 set_desc_base(desc
, (unsigned long)var
.base
);
4856 #ifdef CONFIG_X86_64
4858 *base3
= var
.base
>> 32;
4860 desc
->type
= var
.type
;
4862 desc
->dpl
= var
.dpl
;
4863 desc
->p
= var
.present
;
4864 desc
->avl
= var
.avl
;
4872 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4873 struct desc_struct
*desc
, u32 base3
,
4876 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4877 struct kvm_segment var
;
4879 var
.selector
= selector
;
4880 var
.base
= get_desc_base(desc
);
4881 #ifdef CONFIG_X86_64
4882 var
.base
|= ((u64
)base3
) << 32;
4884 var
.limit
= get_desc_limit(desc
);
4886 var
.limit
= (var
.limit
<< 12) | 0xfff;
4887 var
.type
= desc
->type
;
4888 var
.dpl
= desc
->dpl
;
4893 var
.avl
= desc
->avl
;
4894 var
.present
= desc
->p
;
4895 var
.unusable
= !var
.present
;
4898 kvm_set_segment(vcpu
, &var
, seg
);
4902 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4903 u32 msr_index
, u64
*pdata
)
4905 struct msr_data msr
;
4908 msr
.index
= msr_index
;
4909 msr
.host_initiated
= false;
4910 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
4918 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4919 u32 msr_index
, u64 data
)
4921 struct msr_data msr
;
4924 msr
.index
= msr_index
;
4925 msr
.host_initiated
= false;
4926 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4929 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
4931 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4933 return vcpu
->arch
.smbase
;
4936 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
4938 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4940 vcpu
->arch
.smbase
= smbase
;
4943 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4946 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
4949 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4950 u32 pmc
, u64
*pdata
)
4952 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4955 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4957 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4960 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4963 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4965 * CR0.TS may reference the host fpu state, not the guest fpu state,
4966 * so it may be clear at this point.
4971 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4976 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4977 struct x86_instruction_info
*info
,
4978 enum x86_intercept_stage stage
)
4980 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4983 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4984 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4986 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4989 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4991 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4994 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4996 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4999 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5001 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5004 static const struct x86_emulate_ops emulate_ops
= {
5005 .read_gpr
= emulator_read_gpr
,
5006 .write_gpr
= emulator_write_gpr
,
5007 .read_std
= kvm_read_guest_virt_system
,
5008 .write_std
= kvm_write_guest_virt_system
,
5009 .read_phys
= kvm_read_guest_phys_system
,
5010 .fetch
= kvm_fetch_guest_virt
,
5011 .read_emulated
= emulator_read_emulated
,
5012 .write_emulated
= emulator_write_emulated
,
5013 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5014 .invlpg
= emulator_invlpg
,
5015 .pio_in_emulated
= emulator_pio_in_emulated
,
5016 .pio_out_emulated
= emulator_pio_out_emulated
,
5017 .get_segment
= emulator_get_segment
,
5018 .set_segment
= emulator_set_segment
,
5019 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5020 .get_gdt
= emulator_get_gdt
,
5021 .get_idt
= emulator_get_idt
,
5022 .set_gdt
= emulator_set_gdt
,
5023 .set_idt
= emulator_set_idt
,
5024 .get_cr
= emulator_get_cr
,
5025 .set_cr
= emulator_set_cr
,
5026 .cpl
= emulator_get_cpl
,
5027 .get_dr
= emulator_get_dr
,
5028 .set_dr
= emulator_set_dr
,
5029 .get_smbase
= emulator_get_smbase
,
5030 .set_smbase
= emulator_set_smbase
,
5031 .set_msr
= emulator_set_msr
,
5032 .get_msr
= emulator_get_msr
,
5033 .check_pmc
= emulator_check_pmc
,
5034 .read_pmc
= emulator_read_pmc
,
5035 .halt
= emulator_halt
,
5036 .wbinvd
= emulator_wbinvd
,
5037 .fix_hypercall
= emulator_fix_hypercall
,
5038 .get_fpu
= emulator_get_fpu
,
5039 .put_fpu
= emulator_put_fpu
,
5040 .intercept
= emulator_intercept
,
5041 .get_cpuid
= emulator_get_cpuid
,
5042 .set_nmi_mask
= emulator_set_nmi_mask
,
5045 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5047 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5049 * an sti; sti; sequence only disable interrupts for the first
5050 * instruction. So, if the last instruction, be it emulated or
5051 * not, left the system with the INT_STI flag enabled, it
5052 * means that the last instruction is an sti. We should not
5053 * leave the flag on in this case. The same goes for mov ss
5055 if (int_shadow
& mask
)
5057 if (unlikely(int_shadow
|| mask
)) {
5058 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5060 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5064 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5066 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5067 if (ctxt
->exception
.vector
== PF_VECTOR
)
5068 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5070 if (ctxt
->exception
.error_code_valid
)
5071 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5072 ctxt
->exception
.error_code
);
5074 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5078 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5080 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5083 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5085 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5086 ctxt
->eip
= kvm_rip_read(vcpu
);
5087 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5088 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5089 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5090 cs_db
? X86EMUL_MODE_PROT32
:
5091 X86EMUL_MODE_PROT16
;
5092 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5093 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5094 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5095 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5097 init_decode_cache(ctxt
);
5098 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5101 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5103 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5106 init_emulate_ctxt(vcpu
);
5110 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5111 ret
= emulate_int_real(ctxt
, irq
);
5113 if (ret
!= X86EMUL_CONTINUE
)
5114 return EMULATE_FAIL
;
5116 ctxt
->eip
= ctxt
->_eip
;
5117 kvm_rip_write(vcpu
, ctxt
->eip
);
5118 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5120 if (irq
== NMI_VECTOR
)
5121 vcpu
->arch
.nmi_pending
= 0;
5123 vcpu
->arch
.interrupt
.pending
= false;
5125 return EMULATE_DONE
;
5127 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5129 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5131 int r
= EMULATE_DONE
;
5133 ++vcpu
->stat
.insn_emulation_fail
;
5134 trace_kvm_emulate_insn_failed(vcpu
);
5135 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5136 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5137 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5138 vcpu
->run
->internal
.ndata
= 0;
5141 kvm_queue_exception(vcpu
, UD_VECTOR
);
5146 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5147 bool write_fault_to_shadow_pgtable
,
5153 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5156 if (!vcpu
->arch
.mmu
.direct_map
) {
5158 * Write permission should be allowed since only
5159 * write access need to be emulated.
5161 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5164 * If the mapping is invalid in guest, let cpu retry
5165 * it to generate fault.
5167 if (gpa
== UNMAPPED_GVA
)
5172 * Do not retry the unhandleable instruction if it faults on the
5173 * readonly host memory, otherwise it will goto a infinite loop:
5174 * retry instruction -> write #PF -> emulation fail -> retry
5175 * instruction -> ...
5177 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5180 * If the instruction failed on the error pfn, it can not be fixed,
5181 * report the error to userspace.
5183 if (is_error_noslot_pfn(pfn
))
5186 kvm_release_pfn_clean(pfn
);
5188 /* The instructions are well-emulated on direct mmu. */
5189 if (vcpu
->arch
.mmu
.direct_map
) {
5190 unsigned int indirect_shadow_pages
;
5192 spin_lock(&vcpu
->kvm
->mmu_lock
);
5193 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5194 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5196 if (indirect_shadow_pages
)
5197 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5203 * if emulation was due to access to shadowed page table
5204 * and it failed try to unshadow page and re-enter the
5205 * guest to let CPU execute the instruction.
5207 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5210 * If the access faults on its page table, it can not
5211 * be fixed by unprotecting shadow page and it should
5212 * be reported to userspace.
5214 return !write_fault_to_shadow_pgtable
;
5217 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5218 unsigned long cr2
, int emulation_type
)
5220 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5221 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5223 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5224 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5227 * If the emulation is caused by #PF and it is non-page_table
5228 * writing instruction, it means the VM-EXIT is caused by shadow
5229 * page protected, we can zap the shadow page and retry this
5230 * instruction directly.
5232 * Note: if the guest uses a non-page-table modifying instruction
5233 * on the PDE that points to the instruction, then we will unmap
5234 * the instruction and go to an infinite loop. So, we cache the
5235 * last retried eip and the last fault address, if we meet the eip
5236 * and the address again, we can break out of the potential infinite
5239 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5241 if (!(emulation_type
& EMULTYPE_RETRY
))
5244 if (x86_page_table_writing_insn(ctxt
))
5247 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5250 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5251 vcpu
->arch
.last_retry_addr
= cr2
;
5253 if (!vcpu
->arch
.mmu
.direct_map
)
5254 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5256 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5261 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5262 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5264 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5266 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5267 /* This is a good place to trace that we are exiting SMM. */
5268 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5270 if (unlikely(vcpu
->arch
.smi_pending
)) {
5271 kvm_make_request(KVM_REQ_SMI
, vcpu
);
5272 vcpu
->arch
.smi_pending
= 0;
5274 /* Process a latched INIT, if any. */
5275 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5279 kvm_mmu_reset_context(vcpu
);
5282 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5284 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5286 vcpu
->arch
.hflags
= emul_flags
;
5288 if (changed
& HF_SMM_MASK
)
5289 kvm_smm_changed(vcpu
);
5292 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5301 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5302 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5307 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5309 struct kvm_run
*kvm_run
= vcpu
->run
;
5312 * rflags is the old, "raw" value of the flags. The new value has
5313 * not been saved yet.
5315 * This is correct even for TF set by the guest, because "the
5316 * processor will not generate this exception after the instruction
5317 * that sets the TF flag".
5319 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5320 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5321 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5323 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5324 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5325 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5326 *r
= EMULATE_USER_EXIT
;
5328 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5330 * "Certain debug exceptions may clear bit 0-3. The
5331 * remaining contents of the DR6 register are never
5332 * cleared by the processor".
5334 vcpu
->arch
.dr6
&= ~15;
5335 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5336 kvm_queue_exception(vcpu
, DB_VECTOR
);
5341 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5343 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5344 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5345 struct kvm_run
*kvm_run
= vcpu
->run
;
5346 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5347 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5348 vcpu
->arch
.guest_debug_dr7
,
5352 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5353 kvm_run
->debug
.arch
.pc
= eip
;
5354 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5355 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5356 *r
= EMULATE_USER_EXIT
;
5361 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5362 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5363 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5364 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5369 vcpu
->arch
.dr6
&= ~15;
5370 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5371 kvm_queue_exception(vcpu
, DB_VECTOR
);
5380 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5387 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5388 bool writeback
= true;
5389 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5392 * Clear write_fault_to_shadow_pgtable here to ensure it is
5395 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5396 kvm_clear_exception_queue(vcpu
);
5398 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5399 init_emulate_ctxt(vcpu
);
5402 * We will reenter on the same instruction since
5403 * we do not set complete_userspace_io. This does not
5404 * handle watchpoints yet, those would be handled in
5407 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5410 ctxt
->interruptibility
= 0;
5411 ctxt
->have_exception
= false;
5412 ctxt
->exception
.vector
= -1;
5413 ctxt
->perm_ok
= false;
5415 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5417 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5419 trace_kvm_emulate_insn_start(vcpu
);
5420 ++vcpu
->stat
.insn_emulation
;
5421 if (r
!= EMULATION_OK
) {
5422 if (emulation_type
& EMULTYPE_TRAP_UD
)
5423 return EMULATE_FAIL
;
5424 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5426 return EMULATE_DONE
;
5427 if (emulation_type
& EMULTYPE_SKIP
)
5428 return EMULATE_FAIL
;
5429 return handle_emulation_failure(vcpu
);
5433 if (emulation_type
& EMULTYPE_SKIP
) {
5434 kvm_rip_write(vcpu
, ctxt
->_eip
);
5435 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5436 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5437 return EMULATE_DONE
;
5440 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5441 return EMULATE_DONE
;
5443 /* this is needed for vmware backdoor interface to work since it
5444 changes registers values during IO operation */
5445 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5446 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5447 emulator_invalidate_register_cache(ctxt
);
5451 r
= x86_emulate_insn(ctxt
);
5453 if (r
== EMULATION_INTERCEPTED
)
5454 return EMULATE_DONE
;
5456 if (r
== EMULATION_FAILED
) {
5457 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5459 return EMULATE_DONE
;
5461 return handle_emulation_failure(vcpu
);
5464 if (ctxt
->have_exception
) {
5466 if (inject_emulated_exception(vcpu
))
5468 } else if (vcpu
->arch
.pio
.count
) {
5469 if (!vcpu
->arch
.pio
.in
) {
5470 /* FIXME: return into emulator if single-stepping. */
5471 vcpu
->arch
.pio
.count
= 0;
5474 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5476 r
= EMULATE_USER_EXIT
;
5477 } else if (vcpu
->mmio_needed
) {
5478 if (!vcpu
->mmio_is_write
)
5480 r
= EMULATE_USER_EXIT
;
5481 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5482 } else if (r
== EMULATION_RESTART
)
5488 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5489 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5490 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5491 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5492 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5493 kvm_rip_write(vcpu
, ctxt
->eip
);
5494 if (r
== EMULATE_DONE
)
5495 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5496 if (!ctxt
->have_exception
||
5497 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5498 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5501 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5502 * do nothing, and it will be requested again as soon as
5503 * the shadow expires. But we still need to check here,
5504 * because POPF has no interrupt shadow.
5506 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5507 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5509 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5513 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5515 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5517 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5518 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5519 size
, port
, &val
, 1);
5520 /* do not return to emulator after return from userspace */
5521 vcpu
->arch
.pio
.count
= 0;
5524 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5526 static void tsc_bad(void *info
)
5528 __this_cpu_write(cpu_tsc_khz
, 0);
5531 static void tsc_khz_changed(void *data
)
5533 struct cpufreq_freqs
*freq
= data
;
5534 unsigned long khz
= 0;
5538 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5539 khz
= cpufreq_quick_get(raw_smp_processor_id());
5542 __this_cpu_write(cpu_tsc_khz
, khz
);
5545 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5548 struct cpufreq_freqs
*freq
= data
;
5550 struct kvm_vcpu
*vcpu
;
5551 int i
, send_ipi
= 0;
5554 * We allow guests to temporarily run on slowing clocks,
5555 * provided we notify them after, or to run on accelerating
5556 * clocks, provided we notify them before. Thus time never
5559 * However, we have a problem. We can't atomically update
5560 * the frequency of a given CPU from this function; it is
5561 * merely a notifier, which can be called from any CPU.
5562 * Changing the TSC frequency at arbitrary points in time
5563 * requires a recomputation of local variables related to
5564 * the TSC for each VCPU. We must flag these local variables
5565 * to be updated and be sure the update takes place with the
5566 * new frequency before any guests proceed.
5568 * Unfortunately, the combination of hotplug CPU and frequency
5569 * change creates an intractable locking scenario; the order
5570 * of when these callouts happen is undefined with respect to
5571 * CPU hotplug, and they can race with each other. As such,
5572 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5573 * undefined; you can actually have a CPU frequency change take
5574 * place in between the computation of X and the setting of the
5575 * variable. To protect against this problem, all updates of
5576 * the per_cpu tsc_khz variable are done in an interrupt
5577 * protected IPI, and all callers wishing to update the value
5578 * must wait for a synchronous IPI to complete (which is trivial
5579 * if the caller is on the CPU already). This establishes the
5580 * necessary total order on variable updates.
5582 * Note that because a guest time update may take place
5583 * anytime after the setting of the VCPU's request bit, the
5584 * correct TSC value must be set before the request. However,
5585 * to ensure the update actually makes it to any guest which
5586 * starts running in hardware virtualization between the set
5587 * and the acquisition of the spinlock, we must also ping the
5588 * CPU after setting the request bit.
5592 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5594 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5597 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5599 spin_lock(&kvm_lock
);
5600 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5601 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5602 if (vcpu
->cpu
!= freq
->cpu
)
5604 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5605 if (vcpu
->cpu
!= smp_processor_id())
5609 spin_unlock(&kvm_lock
);
5611 if (freq
->old
< freq
->new && send_ipi
) {
5613 * We upscale the frequency. Must make the guest
5614 * doesn't see old kvmclock values while running with
5615 * the new frequency, otherwise we risk the guest sees
5616 * time go backwards.
5618 * In case we update the frequency for another cpu
5619 * (which might be in guest context) send an interrupt
5620 * to kick the cpu out of guest context. Next time
5621 * guest context is entered kvmclock will be updated,
5622 * so the guest will not see stale values.
5624 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5629 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5630 .notifier_call
= kvmclock_cpufreq_notifier
5633 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5634 unsigned long action
, void *hcpu
)
5636 unsigned int cpu
= (unsigned long)hcpu
;
5640 case CPU_DOWN_FAILED
:
5641 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5643 case CPU_DOWN_PREPARE
:
5644 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5650 static struct notifier_block kvmclock_cpu_notifier_block
= {
5651 .notifier_call
= kvmclock_cpu_notifier
,
5652 .priority
= -INT_MAX
5655 static void kvm_timer_init(void)
5659 max_tsc_khz
= tsc_khz
;
5661 cpu_notifier_register_begin();
5662 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5663 #ifdef CONFIG_CPU_FREQ
5664 struct cpufreq_policy policy
;
5665 memset(&policy
, 0, sizeof(policy
));
5667 cpufreq_get_policy(&policy
, cpu
);
5668 if (policy
.cpuinfo
.max_freq
)
5669 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5672 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5673 CPUFREQ_TRANSITION_NOTIFIER
);
5675 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5676 for_each_online_cpu(cpu
)
5677 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5679 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5680 cpu_notifier_register_done();
5684 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5686 int kvm_is_in_guest(void)
5688 return __this_cpu_read(current_vcpu
) != NULL
;
5691 static int kvm_is_user_mode(void)
5695 if (__this_cpu_read(current_vcpu
))
5696 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5698 return user_mode
!= 0;
5701 static unsigned long kvm_get_guest_ip(void)
5703 unsigned long ip
= 0;
5705 if (__this_cpu_read(current_vcpu
))
5706 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5711 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5712 .is_in_guest
= kvm_is_in_guest
,
5713 .is_user_mode
= kvm_is_user_mode
,
5714 .get_guest_ip
= kvm_get_guest_ip
,
5717 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5719 __this_cpu_write(current_vcpu
, vcpu
);
5721 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5723 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5725 __this_cpu_write(current_vcpu
, NULL
);
5727 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5729 static void kvm_set_mmio_spte_mask(void)
5732 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5735 * Set the reserved bits and the present bit of an paging-structure
5736 * entry to generate page fault with PFER.RSV = 1.
5738 /* Mask the reserved physical address bits. */
5739 mask
= rsvd_bits(maxphyaddr
, 51);
5741 /* Bit 62 is always reserved for 32bit host. */
5742 mask
|= 0x3ull
<< 62;
5744 /* Set the present bit. */
5747 #ifdef CONFIG_X86_64
5749 * If reserved bit is not supported, clear the present bit to disable
5752 if (maxphyaddr
== 52)
5756 kvm_mmu_set_mmio_spte_mask(mask
);
5759 #ifdef CONFIG_X86_64
5760 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5764 struct kvm_vcpu
*vcpu
;
5767 spin_lock(&kvm_lock
);
5768 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5769 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5770 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5771 atomic_set(&kvm_guest_has_master_clock
, 0);
5772 spin_unlock(&kvm_lock
);
5775 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5778 * Notification about pvclock gtod data update.
5780 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5783 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5784 struct timekeeper
*tk
= priv
;
5786 update_pvclock_gtod(tk
);
5788 /* disable master clock if host does not trust, or does not
5789 * use, TSC clocksource
5791 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5792 atomic_read(&kvm_guest_has_master_clock
) != 0)
5793 queue_work(system_long_wq
, &pvclock_gtod_work
);
5798 static struct notifier_block pvclock_gtod_notifier
= {
5799 .notifier_call
= pvclock_gtod_notify
,
5803 int kvm_arch_init(void *opaque
)
5806 struct kvm_x86_ops
*ops
= opaque
;
5809 printk(KERN_ERR
"kvm: already loaded the other module\n");
5814 if (!ops
->cpu_has_kvm_support()) {
5815 printk(KERN_ERR
"kvm: no hardware support\n");
5819 if (ops
->disabled_by_bios()) {
5820 printk(KERN_ERR
"kvm: disabled by bios\n");
5826 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5828 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5832 r
= kvm_mmu_module_init();
5834 goto out_free_percpu
;
5836 kvm_set_mmio_spte_mask();
5840 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5841 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5845 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5848 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5851 #ifdef CONFIG_X86_64
5852 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5858 free_percpu(shared_msrs
);
5863 void kvm_arch_exit(void)
5865 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5867 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5868 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5869 CPUFREQ_TRANSITION_NOTIFIER
);
5870 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5871 #ifdef CONFIG_X86_64
5872 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5875 kvm_mmu_module_exit();
5876 free_percpu(shared_msrs
);
5879 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5881 ++vcpu
->stat
.halt_exits
;
5882 if (lapic_in_kernel(vcpu
)) {
5883 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5886 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5890 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5892 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5894 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5895 return kvm_vcpu_halt(vcpu
);
5897 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5900 * kvm_pv_kick_cpu_op: Kick a vcpu.
5902 * @apicid - apicid of vcpu to be kicked.
5904 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5906 struct kvm_lapic_irq lapic_irq
;
5908 lapic_irq
.shorthand
= 0;
5909 lapic_irq
.dest_mode
= 0;
5910 lapic_irq
.dest_id
= apicid
;
5911 lapic_irq
.msi_redir_hint
= false;
5913 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5914 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
5917 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
5919 vcpu
->arch
.apicv_active
= false;
5920 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
5923 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5925 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5926 int op_64_bit
, r
= 1;
5928 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5930 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5931 return kvm_hv_hypercall(vcpu
);
5933 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5934 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5935 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5936 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5937 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5939 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5941 op_64_bit
= is_64_bit_mode(vcpu
);
5950 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5956 case KVM_HC_VAPIC_POLL_IRQ
:
5959 case KVM_HC_KICK_CPU
:
5960 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5970 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5971 ++vcpu
->stat
.hypercalls
;
5974 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5976 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5978 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5979 char instruction
[3];
5980 unsigned long rip
= kvm_rip_read(vcpu
);
5982 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5984 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5987 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5989 return vcpu
->run
->request_interrupt_window
&&
5990 likely(!pic_in_kernel(vcpu
->kvm
));
5993 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5995 struct kvm_run
*kvm_run
= vcpu
->run
;
5997 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5998 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
5999 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6000 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6001 kvm_run
->ready_for_interrupt_injection
=
6002 pic_in_kernel(vcpu
->kvm
) ||
6003 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6006 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6010 if (!kvm_x86_ops
->update_cr8_intercept
)
6013 if (!vcpu
->arch
.apic
)
6016 if (vcpu
->arch
.apicv_active
)
6019 if (!vcpu
->arch
.apic
->vapic_addr
)
6020 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6027 tpr
= kvm_lapic_get_cr8(vcpu
);
6029 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6032 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6036 /* try to reinject previous events if any */
6037 if (vcpu
->arch
.exception
.pending
) {
6038 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6039 vcpu
->arch
.exception
.has_error_code
,
6040 vcpu
->arch
.exception
.error_code
);
6042 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6043 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6046 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6047 (vcpu
->arch
.dr7
& DR7_GD
)) {
6048 vcpu
->arch
.dr7
&= ~DR7_GD
;
6049 kvm_update_dr7(vcpu
);
6052 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6053 vcpu
->arch
.exception
.has_error_code
,
6054 vcpu
->arch
.exception
.error_code
,
6055 vcpu
->arch
.exception
.reinject
);
6059 if (vcpu
->arch
.nmi_injected
) {
6060 kvm_x86_ops
->set_nmi(vcpu
);
6064 if (vcpu
->arch
.interrupt
.pending
) {
6065 kvm_x86_ops
->set_irq(vcpu
);
6069 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6070 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6075 /* try to inject new event if pending */
6076 if (vcpu
->arch
.nmi_pending
) {
6077 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
6078 --vcpu
->arch
.nmi_pending
;
6079 vcpu
->arch
.nmi_injected
= true;
6080 kvm_x86_ops
->set_nmi(vcpu
);
6082 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6084 * Because interrupts can be injected asynchronously, we are
6085 * calling check_nested_events again here to avoid a race condition.
6086 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6087 * proposal and current concerns. Perhaps we should be setting
6088 * KVM_REQ_EVENT only on certain events and not unconditionally?
6090 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6091 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6095 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6096 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6098 kvm_x86_ops
->set_irq(vcpu
);
6104 static void process_nmi(struct kvm_vcpu
*vcpu
)
6109 * x86 is limited to one NMI running, and one NMI pending after it.
6110 * If an NMI is already in progress, limit further NMIs to just one.
6111 * Otherwise, allow two (and we'll inject the first one immediately).
6113 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6116 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6117 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6118 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6121 #define put_smstate(type, buf, offset, val) \
6122 *(type *)((buf) + (offset) - 0x7e00) = val
6124 static u32
process_smi_get_segment_flags(struct kvm_segment
*seg
)
6127 flags
|= seg
->g
<< 23;
6128 flags
|= seg
->db
<< 22;
6129 flags
|= seg
->l
<< 21;
6130 flags
|= seg
->avl
<< 20;
6131 flags
|= seg
->present
<< 15;
6132 flags
|= seg
->dpl
<< 13;
6133 flags
|= seg
->s
<< 12;
6134 flags
|= seg
->type
<< 8;
6138 static void process_smi_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6140 struct kvm_segment seg
;
6143 kvm_get_segment(vcpu
, &seg
, n
);
6144 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6147 offset
= 0x7f84 + n
* 12;
6149 offset
= 0x7f2c + (n
- 3) * 12;
6151 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6152 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6153 put_smstate(u32
, buf
, offset
, process_smi_get_segment_flags(&seg
));
6156 #ifdef CONFIG_X86_64
6157 static void process_smi_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6159 struct kvm_segment seg
;
6163 kvm_get_segment(vcpu
, &seg
, n
);
6164 offset
= 0x7e00 + n
* 16;
6166 flags
= process_smi_get_segment_flags(&seg
) >> 8;
6167 put_smstate(u16
, buf
, offset
, seg
.selector
);
6168 put_smstate(u16
, buf
, offset
+ 2, flags
);
6169 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6170 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6174 static void process_smi_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6177 struct kvm_segment seg
;
6181 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6182 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6183 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6184 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6186 for (i
= 0; i
< 8; i
++)
6187 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6189 kvm_get_dr(vcpu
, 6, &val
);
6190 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6191 kvm_get_dr(vcpu
, 7, &val
);
6192 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6194 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6195 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6196 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6197 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6198 put_smstate(u32
, buf
, 0x7f5c, process_smi_get_segment_flags(&seg
));
6200 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6201 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6202 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6203 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6204 put_smstate(u32
, buf
, 0x7f78, process_smi_get_segment_flags(&seg
));
6206 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6207 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6208 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6210 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6211 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6212 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6214 for (i
= 0; i
< 6; i
++)
6215 process_smi_save_seg_32(vcpu
, buf
, i
);
6217 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6220 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6221 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6224 static void process_smi_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6226 #ifdef CONFIG_X86_64
6228 struct kvm_segment seg
;
6232 for (i
= 0; i
< 16; i
++)
6233 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6235 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6236 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6238 kvm_get_dr(vcpu
, 6, &val
);
6239 put_smstate(u64
, buf
, 0x7f68, val
);
6240 kvm_get_dr(vcpu
, 7, &val
);
6241 put_smstate(u64
, buf
, 0x7f60, val
);
6243 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6244 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6245 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6247 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6250 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6252 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6254 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6255 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6256 put_smstate(u16
, buf
, 0x7e92, process_smi_get_segment_flags(&seg
) >> 8);
6257 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6258 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6260 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6261 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6262 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6264 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6265 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6266 put_smstate(u16
, buf
, 0x7e72, process_smi_get_segment_flags(&seg
) >> 8);
6267 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6268 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6270 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6271 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6272 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6274 for (i
= 0; i
< 6; i
++)
6275 process_smi_save_seg_64(vcpu
, buf
, i
);
6281 static void process_smi(struct kvm_vcpu
*vcpu
)
6283 struct kvm_segment cs
, ds
;
6289 vcpu
->arch
.smi_pending
= true;
6293 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6294 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6295 memset(buf
, 0, 512);
6296 if (guest_cpuid_has_longmode(vcpu
))
6297 process_smi_save_state_64(vcpu
, buf
);
6299 process_smi_save_state_32(vcpu
, buf
);
6301 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6303 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6304 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6306 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6308 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6309 kvm_rip_write(vcpu
, 0x8000);
6311 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6312 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6313 vcpu
->arch
.cr0
= cr0
;
6315 kvm_x86_ops
->set_cr4(vcpu
, 0);
6317 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6318 dt
.address
= dt
.size
= 0;
6319 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6321 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6323 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6324 cs
.base
= vcpu
->arch
.smbase
;
6329 cs
.limit
= ds
.limit
= 0xffffffff;
6330 cs
.type
= ds
.type
= 0x3;
6331 cs
.dpl
= ds
.dpl
= 0;
6336 cs
.avl
= ds
.avl
= 0;
6337 cs
.present
= ds
.present
= 1;
6338 cs
.unusable
= ds
.unusable
= 0;
6339 cs
.padding
= ds
.padding
= 0;
6341 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6342 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6343 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6344 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6345 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6346 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6348 if (guest_cpuid_has_longmode(vcpu
))
6349 kvm_x86_ops
->set_efer(vcpu
, 0);
6351 kvm_update_cpuid(vcpu
);
6352 kvm_mmu_reset_context(vcpu
);
6355 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6357 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6360 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6362 u64 eoi_exit_bitmap
[4];
6364 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6367 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6369 if (irqchip_split(vcpu
->kvm
))
6370 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6372 if (vcpu
->arch
.apicv_active
)
6373 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6374 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6376 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6377 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6378 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6381 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6383 ++vcpu
->stat
.tlb_flush
;
6384 kvm_x86_ops
->tlb_flush(vcpu
);
6387 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6389 struct page
*page
= NULL
;
6391 if (!lapic_in_kernel(vcpu
))
6394 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6397 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6398 if (is_error_page(page
))
6400 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6403 * Do not pin apic access page in memory, the MMU notifier
6404 * will call us again if it is migrated or swapped out.
6408 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6410 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6411 unsigned long address
)
6414 * The physical address of apic access page is stored in the VMCS.
6415 * Update it when it becomes invalid.
6417 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6418 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6422 * Returns 1 to let vcpu_run() continue the guest execution loop without
6423 * exiting to the userspace. Otherwise, the value will be returned to the
6426 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6430 dm_request_for_irq_injection(vcpu
) &&
6431 kvm_cpu_accept_dm_intr(vcpu
);
6433 bool req_immediate_exit
= false;
6435 if (vcpu
->requests
) {
6436 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6437 kvm_mmu_unload(vcpu
);
6438 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6439 __kvm_migrate_timers(vcpu
);
6440 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6441 kvm_gen_update_masterclock(vcpu
->kvm
);
6442 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6443 kvm_gen_kvmclock_update(vcpu
);
6444 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6445 r
= kvm_guest_time_update(vcpu
);
6449 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6450 kvm_mmu_sync_roots(vcpu
);
6451 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6452 kvm_vcpu_flush_tlb(vcpu
);
6453 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6454 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6458 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6459 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6463 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6464 vcpu
->fpu_active
= 0;
6465 kvm_x86_ops
->fpu_deactivate(vcpu
);
6467 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6468 /* Page is swapped out. Do synthetic halt */
6469 vcpu
->arch
.apf
.halted
= true;
6473 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6474 record_steal_time(vcpu
);
6475 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6477 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6479 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6480 kvm_pmu_handle_event(vcpu
);
6481 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6482 kvm_pmu_deliver_pmi(vcpu
);
6483 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6484 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6485 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6486 vcpu
->arch
.ioapic_handled_vectors
)) {
6487 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6488 vcpu
->run
->eoi
.vector
=
6489 vcpu
->arch
.pending_ioapic_eoi
;
6494 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6495 vcpu_scan_ioapic(vcpu
);
6496 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6497 kvm_vcpu_reload_apic_access_page(vcpu
);
6498 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6499 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6500 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6504 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6505 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6506 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6510 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6511 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6512 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6518 * KVM_REQ_HV_STIMER has to be processed after
6519 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6520 * depend on the guest clock being up-to-date
6522 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6523 kvm_hv_process_stimers(vcpu
);
6527 * KVM_REQ_EVENT is not set when posted interrupts are set by
6528 * VT-d hardware, so we have to update RVI unconditionally.
6530 if (kvm_lapic_enabled(vcpu
)) {
6532 * Update architecture specific hints for APIC
6533 * virtual interrupt delivery.
6535 if (vcpu
->arch
.apicv_active
)
6536 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6537 kvm_lapic_find_highest_irr(vcpu
));
6540 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6541 kvm_apic_accept_events(vcpu
);
6542 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6547 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6548 req_immediate_exit
= true;
6549 /* enable NMI/IRQ window open exits if needed */
6550 else if (vcpu
->arch
.nmi_pending
)
6551 kvm_x86_ops
->enable_nmi_window(vcpu
);
6552 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6553 kvm_x86_ops
->enable_irq_window(vcpu
);
6555 if (kvm_lapic_enabled(vcpu
)) {
6556 update_cr8_intercept(vcpu
);
6557 kvm_lapic_sync_to_vapic(vcpu
);
6561 r
= kvm_mmu_reload(vcpu
);
6563 goto cancel_injection
;
6568 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6569 if (vcpu
->fpu_active
)
6570 kvm_load_guest_fpu(vcpu
);
6571 kvm_load_guest_xcr0(vcpu
);
6573 vcpu
->mode
= IN_GUEST_MODE
;
6575 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6577 /* We should set ->mode before check ->requests,
6578 * see the comment in make_all_cpus_request.
6580 smp_mb__after_srcu_read_unlock();
6582 local_irq_disable();
6584 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6585 || need_resched() || signal_pending(current
)) {
6586 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6590 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6592 goto cancel_injection
;
6595 if (req_immediate_exit
)
6596 smp_send_reschedule(vcpu
->cpu
);
6598 trace_kvm_entry(vcpu
->vcpu_id
);
6599 wait_lapic_expire(vcpu
);
6600 __kvm_guest_enter();
6602 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6604 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6605 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6606 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6607 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6608 set_debugreg(vcpu
->arch
.dr6
, 6);
6609 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6612 kvm_x86_ops
->run(vcpu
);
6615 * Do this here before restoring debug registers on the host. And
6616 * since we do this before handling the vmexit, a DR access vmexit
6617 * can (a) read the correct value of the debug registers, (b) set
6618 * KVM_DEBUGREG_WONT_EXIT again.
6620 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6623 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6624 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6625 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6626 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6630 * If the guest has used debug registers, at least dr7
6631 * will be disabled while returning to the host.
6632 * If we don't have active breakpoints in the host, we don't
6633 * care about the messed up debug address registers. But if
6634 * we have some of them active, restore the old state.
6636 if (hw_breakpoint_active())
6637 hw_breakpoint_restore();
6639 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6641 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6644 /* Interrupt is enabled by handle_external_intr() */
6645 kvm_x86_ops
->handle_external_intr(vcpu
);
6650 * We must have an instruction between local_irq_enable() and
6651 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6652 * the interrupt shadow. The stat.exits increment will do nicely.
6653 * But we need to prevent reordering, hence this barrier():
6661 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6664 * Profile KVM exit RIPs:
6666 if (unlikely(prof_on
== KVM_PROFILING
)) {
6667 unsigned long rip
= kvm_rip_read(vcpu
);
6668 profile_hit(KVM_PROFILING
, (void *)rip
);
6671 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6672 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6674 if (vcpu
->arch
.apic_attention
)
6675 kvm_lapic_sync_from_vapic(vcpu
);
6677 r
= kvm_x86_ops
->handle_exit(vcpu
);
6681 kvm_x86_ops
->cancel_injection(vcpu
);
6682 if (unlikely(vcpu
->arch
.apic_attention
))
6683 kvm_lapic_sync_from_vapic(vcpu
);
6688 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6690 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6691 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6692 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6693 kvm_vcpu_block(vcpu
);
6694 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6696 if (kvm_x86_ops
->post_block
)
6697 kvm_x86_ops
->post_block(vcpu
);
6699 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6703 kvm_apic_accept_events(vcpu
);
6704 switch(vcpu
->arch
.mp_state
) {
6705 case KVM_MP_STATE_HALTED
:
6706 vcpu
->arch
.pv
.pv_unhalted
= false;
6707 vcpu
->arch
.mp_state
=
6708 KVM_MP_STATE_RUNNABLE
;
6709 case KVM_MP_STATE_RUNNABLE
:
6710 vcpu
->arch
.apf
.halted
= false;
6712 case KVM_MP_STATE_INIT_RECEIVED
:
6721 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
6723 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6724 !vcpu
->arch
.apf
.halted
);
6727 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6730 struct kvm
*kvm
= vcpu
->kvm
;
6732 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6735 if (kvm_vcpu_running(vcpu
)) {
6736 r
= vcpu_enter_guest(vcpu
);
6738 r
= vcpu_block(kvm
, vcpu
);
6744 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6745 if (kvm_cpu_has_pending_timer(vcpu
))
6746 kvm_inject_pending_timer_irqs(vcpu
);
6748 if (dm_request_for_irq_injection(vcpu
) &&
6749 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
6751 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
6752 ++vcpu
->stat
.request_irq_exits
;
6756 kvm_check_async_pf_completion(vcpu
);
6758 if (signal_pending(current
)) {
6760 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6761 ++vcpu
->stat
.signal_exits
;
6764 if (need_resched()) {
6765 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6767 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6771 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6776 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6779 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6780 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6781 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6782 if (r
!= EMULATE_DONE
)
6787 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6789 BUG_ON(!vcpu
->arch
.pio
.count
);
6791 return complete_emulated_io(vcpu
);
6795 * Implements the following, as a state machine:
6799 * for each mmio piece in the fragment
6807 * for each mmio piece in the fragment
6812 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6814 struct kvm_run
*run
= vcpu
->run
;
6815 struct kvm_mmio_fragment
*frag
;
6818 BUG_ON(!vcpu
->mmio_needed
);
6820 /* Complete previous fragment */
6821 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6822 len
= min(8u, frag
->len
);
6823 if (!vcpu
->mmio_is_write
)
6824 memcpy(frag
->data
, run
->mmio
.data
, len
);
6826 if (frag
->len
<= 8) {
6827 /* Switch to the next fragment. */
6829 vcpu
->mmio_cur_fragment
++;
6831 /* Go forward to the next mmio piece. */
6837 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6838 vcpu
->mmio_needed
= 0;
6840 /* FIXME: return into emulator if single-stepping. */
6841 if (vcpu
->mmio_is_write
)
6843 vcpu
->mmio_read_completed
= 1;
6844 return complete_emulated_io(vcpu
);
6847 run
->exit_reason
= KVM_EXIT_MMIO
;
6848 run
->mmio
.phys_addr
= frag
->gpa
;
6849 if (vcpu
->mmio_is_write
)
6850 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6851 run
->mmio
.len
= min(8u, frag
->len
);
6852 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6853 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6858 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6860 struct fpu
*fpu
= ¤t
->thread
.fpu
;
6864 fpu__activate_curr(fpu
);
6866 if (vcpu
->sigset_active
)
6867 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6869 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6870 kvm_vcpu_block(vcpu
);
6871 kvm_apic_accept_events(vcpu
);
6872 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6877 /* re-sync apic's tpr */
6878 if (!lapic_in_kernel(vcpu
)) {
6879 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6885 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6886 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6887 vcpu
->arch
.complete_userspace_io
= NULL
;
6892 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6897 post_kvm_run_save(vcpu
);
6898 if (vcpu
->sigset_active
)
6899 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6904 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6906 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6908 * We are here if userspace calls get_regs() in the middle of
6909 * instruction emulation. Registers state needs to be copied
6910 * back from emulation context to vcpu. Userspace shouldn't do
6911 * that usually, but some bad designed PV devices (vmware
6912 * backdoor interface) need this to work
6914 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6915 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6917 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6918 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6919 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6920 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6921 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6922 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6923 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6924 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6925 #ifdef CONFIG_X86_64
6926 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6927 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6928 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6929 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6930 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6931 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6932 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6933 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6936 regs
->rip
= kvm_rip_read(vcpu
);
6937 regs
->rflags
= kvm_get_rflags(vcpu
);
6942 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6944 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6945 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6947 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6948 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6949 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6950 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6951 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6952 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6953 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6954 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6955 #ifdef CONFIG_X86_64
6956 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6957 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6958 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6959 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6960 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6961 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6962 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6963 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6966 kvm_rip_write(vcpu
, regs
->rip
);
6967 kvm_set_rflags(vcpu
, regs
->rflags
);
6969 vcpu
->arch
.exception
.pending
= false;
6971 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6976 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6978 struct kvm_segment cs
;
6980 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6984 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6986 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6987 struct kvm_sregs
*sregs
)
6991 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6992 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6993 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6994 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6995 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6996 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6998 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6999 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7001 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7002 sregs
->idt
.limit
= dt
.size
;
7003 sregs
->idt
.base
= dt
.address
;
7004 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7005 sregs
->gdt
.limit
= dt
.size
;
7006 sregs
->gdt
.base
= dt
.address
;
7008 sregs
->cr0
= kvm_read_cr0(vcpu
);
7009 sregs
->cr2
= vcpu
->arch
.cr2
;
7010 sregs
->cr3
= kvm_read_cr3(vcpu
);
7011 sregs
->cr4
= kvm_read_cr4(vcpu
);
7012 sregs
->cr8
= kvm_get_cr8(vcpu
);
7013 sregs
->efer
= vcpu
->arch
.efer
;
7014 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7016 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7018 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7019 set_bit(vcpu
->arch
.interrupt
.nr
,
7020 (unsigned long *)sregs
->interrupt_bitmap
);
7025 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7026 struct kvm_mp_state
*mp_state
)
7028 kvm_apic_accept_events(vcpu
);
7029 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7030 vcpu
->arch
.pv
.pv_unhalted
)
7031 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7033 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7038 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7039 struct kvm_mp_state
*mp_state
)
7041 if (!kvm_vcpu_has_lapic(vcpu
) &&
7042 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7045 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7046 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7047 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7049 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7050 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7054 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7055 int reason
, bool has_error_code
, u32 error_code
)
7057 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7060 init_emulate_ctxt(vcpu
);
7062 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7063 has_error_code
, error_code
);
7066 return EMULATE_FAIL
;
7068 kvm_rip_write(vcpu
, ctxt
->eip
);
7069 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7070 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7071 return EMULATE_DONE
;
7073 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7075 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7076 struct kvm_sregs
*sregs
)
7078 struct msr_data apic_base_msr
;
7079 int mmu_reset_needed
= 0;
7080 int pending_vec
, max_bits
, idx
;
7083 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7086 dt
.size
= sregs
->idt
.limit
;
7087 dt
.address
= sregs
->idt
.base
;
7088 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7089 dt
.size
= sregs
->gdt
.limit
;
7090 dt
.address
= sregs
->gdt
.base
;
7091 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7093 vcpu
->arch
.cr2
= sregs
->cr2
;
7094 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7095 vcpu
->arch
.cr3
= sregs
->cr3
;
7096 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7098 kvm_set_cr8(vcpu
, sregs
->cr8
);
7100 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7101 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7102 apic_base_msr
.data
= sregs
->apic_base
;
7103 apic_base_msr
.host_initiated
= true;
7104 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7106 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7107 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7108 vcpu
->arch
.cr0
= sregs
->cr0
;
7110 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7111 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7112 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
7113 kvm_update_cpuid(vcpu
);
7115 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7116 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7117 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7118 mmu_reset_needed
= 1;
7120 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7122 if (mmu_reset_needed
)
7123 kvm_mmu_reset_context(vcpu
);
7125 max_bits
= KVM_NR_INTERRUPTS
;
7126 pending_vec
= find_first_bit(
7127 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7128 if (pending_vec
< max_bits
) {
7129 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7130 pr_debug("Set back pending irq %d\n", pending_vec
);
7133 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7134 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7135 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7136 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7137 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7138 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7140 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7141 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7143 update_cr8_intercept(vcpu
);
7145 /* Older userspace won't unhalt the vcpu on reset. */
7146 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7147 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7149 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7151 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7156 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7157 struct kvm_guest_debug
*dbg
)
7159 unsigned long rflags
;
7162 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7164 if (vcpu
->arch
.exception
.pending
)
7166 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7167 kvm_queue_exception(vcpu
, DB_VECTOR
);
7169 kvm_queue_exception(vcpu
, BP_VECTOR
);
7173 * Read rflags as long as potentially injected trace flags are still
7176 rflags
= kvm_get_rflags(vcpu
);
7178 vcpu
->guest_debug
= dbg
->control
;
7179 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7180 vcpu
->guest_debug
= 0;
7182 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7183 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7184 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7185 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7187 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7188 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7190 kvm_update_dr7(vcpu
);
7192 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7193 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7194 get_segment_base(vcpu
, VCPU_SREG_CS
);
7197 * Trigger an rflags update that will inject or remove the trace
7200 kvm_set_rflags(vcpu
, rflags
);
7202 kvm_x86_ops
->update_bp_intercept(vcpu
);
7212 * Translate a guest virtual address to a guest physical address.
7214 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7215 struct kvm_translation
*tr
)
7217 unsigned long vaddr
= tr
->linear_address
;
7221 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7222 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7223 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7224 tr
->physical_address
= gpa
;
7225 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7232 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7234 struct fxregs_state
*fxsave
=
7235 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7237 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7238 fpu
->fcw
= fxsave
->cwd
;
7239 fpu
->fsw
= fxsave
->swd
;
7240 fpu
->ftwx
= fxsave
->twd
;
7241 fpu
->last_opcode
= fxsave
->fop
;
7242 fpu
->last_ip
= fxsave
->rip
;
7243 fpu
->last_dp
= fxsave
->rdp
;
7244 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7249 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7251 struct fxregs_state
*fxsave
=
7252 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7254 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7255 fxsave
->cwd
= fpu
->fcw
;
7256 fxsave
->swd
= fpu
->fsw
;
7257 fxsave
->twd
= fpu
->ftwx
;
7258 fxsave
->fop
= fpu
->last_opcode
;
7259 fxsave
->rip
= fpu
->last_ip
;
7260 fxsave
->rdp
= fpu
->last_dp
;
7261 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7266 static void fx_init(struct kvm_vcpu
*vcpu
)
7268 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7270 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7271 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7274 * Ensure guest xcr0 is valid for loading
7276 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7278 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7281 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7283 if (vcpu
->guest_fpu_loaded
)
7287 * Restore all possible states in the guest,
7288 * and assume host would use all available bits.
7289 * Guest xcr0 would be loaded later.
7291 kvm_put_guest_xcr0(vcpu
);
7292 vcpu
->guest_fpu_loaded
= 1;
7293 __kernel_fpu_begin();
7294 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7298 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7300 kvm_put_guest_xcr0(vcpu
);
7302 if (!vcpu
->guest_fpu_loaded
) {
7303 vcpu
->fpu_counter
= 0;
7307 vcpu
->guest_fpu_loaded
= 0;
7308 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7310 ++vcpu
->stat
.fpu_reload
;
7312 * If using eager FPU mode, or if the guest is a frequent user
7313 * of the FPU, just leave the FPU active for next time.
7314 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7315 * the FPU in bursts will revert to loading it on demand.
7317 if (!vcpu
->arch
.eager_fpu
) {
7318 if (++vcpu
->fpu_counter
< 5)
7319 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7324 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7326 kvmclock_reset(vcpu
);
7328 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7329 kvm_x86_ops
->vcpu_free(vcpu
);
7332 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7335 struct kvm_vcpu
*vcpu
;
7337 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7338 printk_once(KERN_WARNING
7339 "kvm: SMP vm created on host with unstable TSC; "
7340 "guest TSC will not be reliable\n");
7342 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7347 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7351 kvm_vcpu_mtrr_init(vcpu
);
7352 r
= vcpu_load(vcpu
);
7355 kvm_vcpu_reset(vcpu
, false);
7356 kvm_mmu_setup(vcpu
);
7361 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7363 struct msr_data msr
;
7364 struct kvm
*kvm
= vcpu
->kvm
;
7366 if (vcpu_load(vcpu
))
7369 msr
.index
= MSR_IA32_TSC
;
7370 msr
.host_initiated
= true;
7371 kvm_write_tsc(vcpu
, &msr
);
7374 if (!kvmclock_periodic_sync
)
7377 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7378 KVMCLOCK_SYNC_PERIOD
);
7381 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7384 vcpu
->arch
.apf
.msr_val
= 0;
7386 r
= vcpu_load(vcpu
);
7388 kvm_mmu_unload(vcpu
);
7391 kvm_x86_ops
->vcpu_free(vcpu
);
7394 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7396 vcpu
->arch
.hflags
= 0;
7398 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7399 vcpu
->arch
.nmi_pending
= 0;
7400 vcpu
->arch
.nmi_injected
= false;
7401 kvm_clear_interrupt_queue(vcpu
);
7402 kvm_clear_exception_queue(vcpu
);
7404 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7405 kvm_update_dr0123(vcpu
);
7406 vcpu
->arch
.dr6
= DR6_INIT
;
7407 kvm_update_dr6(vcpu
);
7408 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7409 kvm_update_dr7(vcpu
);
7413 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7414 vcpu
->arch
.apf
.msr_val
= 0;
7415 vcpu
->arch
.st
.msr_val
= 0;
7417 kvmclock_reset(vcpu
);
7419 kvm_clear_async_pf_completion_queue(vcpu
);
7420 kvm_async_pf_hash_reset(vcpu
);
7421 vcpu
->arch
.apf
.halted
= false;
7424 kvm_pmu_reset(vcpu
);
7425 vcpu
->arch
.smbase
= 0x30000;
7428 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7429 vcpu
->arch
.regs_avail
= ~0;
7430 vcpu
->arch
.regs_dirty
= ~0;
7432 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7435 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7437 struct kvm_segment cs
;
7439 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7440 cs
.selector
= vector
<< 8;
7441 cs
.base
= vector
<< 12;
7442 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7443 kvm_rip_write(vcpu
, 0);
7446 int kvm_arch_hardware_enable(void)
7449 struct kvm_vcpu
*vcpu
;
7454 bool stable
, backwards_tsc
= false;
7456 kvm_shared_msr_cpu_online();
7457 ret
= kvm_x86_ops
->hardware_enable();
7461 local_tsc
= rdtsc();
7462 stable
= !check_tsc_unstable();
7463 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7464 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7465 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7466 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7467 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7468 backwards_tsc
= true;
7469 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7470 max_tsc
= vcpu
->arch
.last_host_tsc
;
7476 * Sometimes, even reliable TSCs go backwards. This happens on
7477 * platforms that reset TSC during suspend or hibernate actions, but
7478 * maintain synchronization. We must compensate. Fortunately, we can
7479 * detect that condition here, which happens early in CPU bringup,
7480 * before any KVM threads can be running. Unfortunately, we can't
7481 * bring the TSCs fully up to date with real time, as we aren't yet far
7482 * enough into CPU bringup that we know how much real time has actually
7483 * elapsed; our helper function, get_kernel_ns() will be using boot
7484 * variables that haven't been updated yet.
7486 * So we simply find the maximum observed TSC above, then record the
7487 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7488 * the adjustment will be applied. Note that we accumulate
7489 * adjustments, in case multiple suspend cycles happen before some VCPU
7490 * gets a chance to run again. In the event that no KVM threads get a
7491 * chance to run, we will miss the entire elapsed period, as we'll have
7492 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7493 * loose cycle time. This isn't too big a deal, since the loss will be
7494 * uniform across all VCPUs (not to mention the scenario is extremely
7495 * unlikely). It is possible that a second hibernate recovery happens
7496 * much faster than a first, causing the observed TSC here to be
7497 * smaller; this would require additional padding adjustment, which is
7498 * why we set last_host_tsc to the local tsc observed here.
7500 * N.B. - this code below runs only on platforms with reliable TSC,
7501 * as that is the only way backwards_tsc is set above. Also note
7502 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7503 * have the same delta_cyc adjustment applied if backwards_tsc
7504 * is detected. Note further, this adjustment is only done once,
7505 * as we reset last_host_tsc on all VCPUs to stop this from being
7506 * called multiple times (one for each physical CPU bringup).
7508 * Platforms with unreliable TSCs don't have to deal with this, they
7509 * will be compensated by the logic in vcpu_load, which sets the TSC to
7510 * catchup mode. This will catchup all VCPUs to real time, but cannot
7511 * guarantee that they stay in perfect synchronization.
7513 if (backwards_tsc
) {
7514 u64 delta_cyc
= max_tsc
- local_tsc
;
7515 backwards_tsc_observed
= true;
7516 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7517 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7518 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7519 vcpu
->arch
.last_host_tsc
= local_tsc
;
7520 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7524 * We have to disable TSC offset matching.. if you were
7525 * booting a VM while issuing an S4 host suspend....
7526 * you may have some problem. Solving this issue is
7527 * left as an exercise to the reader.
7529 kvm
->arch
.last_tsc_nsec
= 0;
7530 kvm
->arch
.last_tsc_write
= 0;
7537 void kvm_arch_hardware_disable(void)
7539 kvm_x86_ops
->hardware_disable();
7540 drop_user_return_notifiers();
7543 int kvm_arch_hardware_setup(void)
7547 r
= kvm_x86_ops
->hardware_setup();
7551 if (kvm_has_tsc_control
) {
7553 * Make sure the user can only configure tsc_khz values that
7554 * fit into a signed integer.
7555 * A min value is not calculated needed because it will always
7556 * be 1 on all machines.
7558 u64 max
= min(0x7fffffffULL
,
7559 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7560 kvm_max_guest_tsc_khz
= max
;
7562 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7565 kvm_init_msr_list();
7569 void kvm_arch_hardware_unsetup(void)
7571 kvm_x86_ops
->hardware_unsetup();
7574 void kvm_arch_check_processor_compat(void *rtn
)
7576 kvm_x86_ops
->check_processor_compatibility(rtn
);
7579 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7581 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7583 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7585 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7587 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7590 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7592 return irqchip_in_kernel(vcpu
->kvm
) == lapic_in_kernel(vcpu
);
7595 struct static_key kvm_no_apic_vcpu __read_mostly
;
7597 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7603 BUG_ON(vcpu
->kvm
== NULL
);
7606 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7607 vcpu
->arch
.pv
.pv_unhalted
= false;
7608 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7609 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7610 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7612 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7614 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7619 vcpu
->arch
.pio_data
= page_address(page
);
7621 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7623 r
= kvm_mmu_create(vcpu
);
7625 goto fail_free_pio_data
;
7627 if (irqchip_in_kernel(kvm
)) {
7628 r
= kvm_create_lapic(vcpu
);
7630 goto fail_mmu_destroy
;
7632 static_key_slow_inc(&kvm_no_apic_vcpu
);
7634 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7636 if (!vcpu
->arch
.mce_banks
) {
7638 goto fail_free_lapic
;
7640 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7642 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7644 goto fail_free_mce_banks
;
7649 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7650 vcpu
->arch
.pv_time_enabled
= false;
7652 vcpu
->arch
.guest_supported_xcr0
= 0;
7653 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7655 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7657 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7659 kvm_async_pf_hash_reset(vcpu
);
7662 vcpu
->arch
.pending_external_vector
= -1;
7664 kvm_hv_vcpu_init(vcpu
);
7668 fail_free_mce_banks
:
7669 kfree(vcpu
->arch
.mce_banks
);
7671 kvm_free_lapic(vcpu
);
7673 kvm_mmu_destroy(vcpu
);
7675 free_page((unsigned long)vcpu
->arch
.pio_data
);
7680 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7684 kvm_hv_vcpu_uninit(vcpu
);
7685 kvm_pmu_destroy(vcpu
);
7686 kfree(vcpu
->arch
.mce_banks
);
7687 kvm_free_lapic(vcpu
);
7688 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7689 kvm_mmu_destroy(vcpu
);
7690 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7691 free_page((unsigned long)vcpu
->arch
.pio_data
);
7692 if (!lapic_in_kernel(vcpu
))
7693 static_key_slow_dec(&kvm_no_apic_vcpu
);
7696 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7698 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7701 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7706 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7707 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7708 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7709 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7710 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7712 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7713 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7714 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7715 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7716 &kvm
->arch
.irq_sources_bitmap
);
7718 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7719 mutex_init(&kvm
->arch
.apic_map_lock
);
7720 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7722 pvclock_update_vm_gtod_copy(kvm
);
7724 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7725 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7730 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7733 r
= vcpu_load(vcpu
);
7735 kvm_mmu_unload(vcpu
);
7739 static void kvm_free_vcpus(struct kvm
*kvm
)
7742 struct kvm_vcpu
*vcpu
;
7745 * Unpin any mmu pages first.
7747 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7748 kvm_clear_async_pf_completion_queue(vcpu
);
7749 kvm_unload_vcpu_mmu(vcpu
);
7751 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7752 kvm_arch_vcpu_free(vcpu
);
7754 mutex_lock(&kvm
->lock
);
7755 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7756 kvm
->vcpus
[i
] = NULL
;
7758 atomic_set(&kvm
->online_vcpus
, 0);
7759 mutex_unlock(&kvm
->lock
);
7762 void kvm_arch_sync_events(struct kvm
*kvm
)
7764 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7765 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7766 kvm_free_all_assigned_devices(kvm
);
7770 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7774 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
7775 struct kvm_memory_slot
*slot
, old
;
7777 /* Called with kvm->slots_lock held. */
7778 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
7781 slot
= id_to_memslot(slots
, id
);
7783 if (WARN_ON(slot
->npages
))
7787 * MAP_SHARED to prevent internal slot pages from being moved
7790 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
7791 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7792 if (IS_ERR((void *)hva
))
7793 return PTR_ERR((void *)hva
);
7802 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7803 struct kvm_userspace_memory_region m
;
7805 m
.slot
= id
| (i
<< 16);
7807 m
.guest_phys_addr
= gpa
;
7808 m
.userspace_addr
= hva
;
7809 m
.memory_size
= size
;
7810 r
= __kvm_set_memory_region(kvm
, &m
);
7816 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
7822 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
7824 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7828 mutex_lock(&kvm
->slots_lock
);
7829 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
7830 mutex_unlock(&kvm
->slots_lock
);
7834 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
7836 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7838 if (current
->mm
== kvm
->mm
) {
7840 * Free memory regions allocated on behalf of userspace,
7841 * unless the the memory map has changed due to process exit
7844 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
7845 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
7846 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
7848 kvm_iommu_unmap_guest(kvm
);
7849 kfree(kvm
->arch
.vpic
);
7850 kfree(kvm
->arch
.vioapic
);
7851 kvm_free_vcpus(kvm
);
7852 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7855 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7856 struct kvm_memory_slot
*dont
)
7860 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7861 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7862 kvfree(free
->arch
.rmap
[i
]);
7863 free
->arch
.rmap
[i
] = NULL
;
7868 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7869 dont
->arch
.lpage_info
[i
- 1]) {
7870 kvfree(free
->arch
.lpage_info
[i
- 1]);
7871 free
->arch
.lpage_info
[i
- 1] = NULL
;
7876 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7877 unsigned long npages
)
7881 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7886 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7887 slot
->base_gfn
, level
) + 1;
7889 slot
->arch
.rmap
[i
] =
7890 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7891 if (!slot
->arch
.rmap
[i
])
7896 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7897 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7898 if (!slot
->arch
.lpage_info
[i
- 1])
7901 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7902 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7903 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7904 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7905 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7907 * If the gfn and userspace address are not aligned wrt each
7908 * other, or if explicitly asked to, disable large page
7909 * support for this slot
7911 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7912 !kvm_largepages_enabled()) {
7915 for (j
= 0; j
< lpages
; ++j
)
7916 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7923 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7924 kvfree(slot
->arch
.rmap
[i
]);
7925 slot
->arch
.rmap
[i
] = NULL
;
7929 kvfree(slot
->arch
.lpage_info
[i
- 1]);
7930 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7935 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
7938 * memslots->generation has been incremented.
7939 * mmio generation may have reached its maximum value.
7941 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
7944 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7945 struct kvm_memory_slot
*memslot
,
7946 const struct kvm_userspace_memory_region
*mem
,
7947 enum kvm_mr_change change
)
7952 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
7953 struct kvm_memory_slot
*new)
7955 /* Still write protect RO slot */
7956 if (new->flags
& KVM_MEM_READONLY
) {
7957 kvm_mmu_slot_remove_write_access(kvm
, new);
7962 * Call kvm_x86_ops dirty logging hooks when they are valid.
7964 * kvm_x86_ops->slot_disable_log_dirty is called when:
7966 * - KVM_MR_CREATE with dirty logging is disabled
7967 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7969 * The reason is, in case of PML, we need to set D-bit for any slots
7970 * with dirty logging disabled in order to eliminate unnecessary GPA
7971 * logging in PML buffer (and potential PML buffer full VMEXT). This
7972 * guarantees leaving PML enabled during guest's lifetime won't have
7973 * any additonal overhead from PML when guest is running with dirty
7974 * logging disabled for memory slots.
7976 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7977 * to dirty logging mode.
7979 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7981 * In case of write protect:
7983 * Write protect all pages for dirty logging.
7985 * All the sptes including the large sptes which point to this
7986 * slot are set to readonly. We can not create any new large
7987 * spte on this slot until the end of the logging.
7989 * See the comments in fast_page_fault().
7991 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
7992 if (kvm_x86_ops
->slot_enable_log_dirty
)
7993 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
7995 kvm_mmu_slot_remove_write_access(kvm
, new);
7997 if (kvm_x86_ops
->slot_disable_log_dirty
)
7998 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8002 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8003 const struct kvm_userspace_memory_region
*mem
,
8004 const struct kvm_memory_slot
*old
,
8005 const struct kvm_memory_slot
*new,
8006 enum kvm_mr_change change
)
8008 int nr_mmu_pages
= 0;
8010 if (!kvm
->arch
.n_requested_mmu_pages
)
8011 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8014 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8017 * Dirty logging tracks sptes in 4k granularity, meaning that large
8018 * sptes have to be split. If live migration is successful, the guest
8019 * in the source machine will be destroyed and large sptes will be
8020 * created in the destination. However, if the guest continues to run
8021 * in the source machine (for example if live migration fails), small
8022 * sptes will remain around and cause bad performance.
8024 * Scan sptes if dirty logging has been stopped, dropping those
8025 * which can be collapsed into a single large-page spte. Later
8026 * page faults will create the large-page sptes.
8028 if ((change
!= KVM_MR_DELETE
) &&
8029 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8030 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8031 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8034 * Set up write protection and/or dirty logging for the new slot.
8036 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8037 * been zapped so no dirty logging staff is needed for old slot. For
8038 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8039 * new and it's also covered when dealing with the new slot.
8041 * FIXME: const-ify all uses of struct kvm_memory_slot.
8043 if (change
!= KVM_MR_DELETE
)
8044 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8047 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8049 kvm_mmu_invalidate_zap_all_pages(kvm
);
8052 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8053 struct kvm_memory_slot
*slot
)
8055 kvm_mmu_invalidate_zap_all_pages(kvm
);
8058 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8060 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8063 if (kvm_apic_has_events(vcpu
))
8066 if (vcpu
->arch
.pv
.pv_unhalted
)
8069 if (atomic_read(&vcpu
->arch
.nmi_queued
))
8072 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
8075 if (kvm_arch_interrupt_allowed(vcpu
) &&
8076 kvm_cpu_has_interrupt(vcpu
))
8079 if (kvm_hv_has_stimer_pending(vcpu
))
8085 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8087 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
8088 kvm_x86_ops
->check_nested_events(vcpu
, false);
8090 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8093 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8095 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8098 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8100 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8103 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8105 if (is_64_bit_mode(vcpu
))
8106 return kvm_rip_read(vcpu
);
8107 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8108 kvm_rip_read(vcpu
));
8110 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8112 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8114 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8116 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8118 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8120 unsigned long rflags
;
8122 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8123 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8124 rflags
&= ~X86_EFLAGS_TF
;
8127 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8129 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8131 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8132 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8133 rflags
|= X86_EFLAGS_TF
;
8134 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8137 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8139 __kvm_set_rflags(vcpu
, rflags
);
8140 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8142 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8144 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8148 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8152 r
= kvm_mmu_reload(vcpu
);
8156 if (!vcpu
->arch
.mmu
.direct_map
&&
8157 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8160 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8163 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8165 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8168 static inline u32
kvm_async_pf_next_probe(u32 key
)
8170 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8173 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8175 u32 key
= kvm_async_pf_hash_fn(gfn
);
8177 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8178 key
= kvm_async_pf_next_probe(key
);
8180 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8183 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8186 u32 key
= kvm_async_pf_hash_fn(gfn
);
8188 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8189 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8190 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8191 key
= kvm_async_pf_next_probe(key
);
8196 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8198 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8201 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8205 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8207 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8209 j
= kvm_async_pf_next_probe(j
);
8210 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8212 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8214 * k lies cyclically in ]i,j]
8216 * |....j i.k.| or |.k..j i...|
8218 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8219 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8224 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8227 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8231 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8232 struct kvm_async_pf
*work
)
8234 struct x86_exception fault
;
8236 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8237 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8239 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8240 (vcpu
->arch
.apf
.send_user_only
&&
8241 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8242 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8243 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8244 fault
.vector
= PF_VECTOR
;
8245 fault
.error_code_valid
= true;
8246 fault
.error_code
= 0;
8247 fault
.nested_page_fault
= false;
8248 fault
.address
= work
->arch
.token
;
8249 kvm_inject_page_fault(vcpu
, &fault
);
8253 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8254 struct kvm_async_pf
*work
)
8256 struct x86_exception fault
;
8258 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8259 if (work
->wakeup_all
)
8260 work
->arch
.token
= ~0; /* broadcast wakeup */
8262 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8264 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8265 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8266 fault
.vector
= PF_VECTOR
;
8267 fault
.error_code_valid
= true;
8268 fault
.error_code
= 0;
8269 fault
.nested_page_fault
= false;
8270 fault
.address
= work
->arch
.token
;
8271 kvm_inject_page_fault(vcpu
, &fault
);
8273 vcpu
->arch
.apf
.halted
= false;
8274 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8277 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8279 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8282 return !kvm_event_needs_reinjection(vcpu
) &&
8283 kvm_x86_ops
->interrupt_allowed(vcpu
);
8286 void kvm_arch_start_assignment(struct kvm
*kvm
)
8288 atomic_inc(&kvm
->arch
.assigned_device_count
);
8290 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8292 void kvm_arch_end_assignment(struct kvm
*kvm
)
8294 atomic_dec(&kvm
->arch
.assigned_device_count
);
8296 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8298 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8300 return atomic_read(&kvm
->arch
.assigned_device_count
);
8302 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8304 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8306 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8308 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8310 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8312 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8314 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8316 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8318 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8320 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8322 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8323 struct irq_bypass_producer
*prod
)
8325 struct kvm_kernel_irqfd
*irqfd
=
8326 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8328 if (kvm_x86_ops
->update_pi_irte
) {
8329 irqfd
->producer
= prod
;
8330 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8331 prod
->irq
, irqfd
->gsi
, 1);
8337 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8338 struct irq_bypass_producer
*prod
)
8341 struct kvm_kernel_irqfd
*irqfd
=
8342 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8344 if (!kvm_x86_ops
->update_pi_irte
) {
8345 WARN_ON(irqfd
->producer
!= NULL
);
8349 WARN_ON(irqfd
->producer
!= prod
);
8350 irqfd
->producer
= NULL
;
8353 * When producer of consumer is unregistered, we change back to
8354 * remapped mode, so we can re-use the current implementation
8355 * when the irq is masked/disabed or the consumer side (KVM
8356 * int this case doesn't want to receive the interrupts.
8358 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8360 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8361 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8364 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8365 uint32_t guest_irq
, bool set
)
8367 if (!kvm_x86_ops
->update_pi_irte
)
8370 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8373 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8374 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8375 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8376 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8377 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8378 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8379 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8380 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8381 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8382 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8383 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8384 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8385 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8386 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8387 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8388 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8389 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);