2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
58 #include <trace/events/kvm.h>
60 #include <asm/debugreg.h>
64 #include <linux/kernel_stat.h>
65 #include <asm/fpu/internal.h> /* Ugh! */
66 #include <asm/pvclock.h>
67 #include <asm/div64.h>
68 #include <asm/irq_remapping.h>
70 #define CREATE_TRACE_POINTS
73 #define MAX_IO_MSRS 256
74 #define KVM_MAX_MCE_BANKS 32
75 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
78 #define emul_to_vcpu(ctxt) \
79 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
82 * - enable syscall per default because its emulated by KVM
83 * - enable LME and LMA per default on 64 bit KVM
87 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
89 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
96 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
98 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
99 static void process_nmi(struct kvm_vcpu
*vcpu
);
100 static void enter_smm(struct kvm_vcpu
*vcpu
);
101 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
103 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
104 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
106 static bool __read_mostly ignore_msrs
= 0;
107 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
109 unsigned int min_timer_period_us
= 500;
110 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
112 static bool __read_mostly kvmclock_periodic_sync
= true;
113 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
115 bool __read_mostly kvm_has_tsc_control
;
116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
117 u32 __read_mostly kvm_max_guest_tsc_khz
;
118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
119 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
121 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
123 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
127 static u32 __read_mostly tsc_tolerance_ppm
= 250;
128 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
131 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
132 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
134 static bool __read_mostly vector_hashing
= true;
135 module_param(vector_hashing
, bool, S_IRUGO
);
137 static bool __read_mostly backwards_tsc_observed
= false;
139 #define KVM_NR_SHARED_MSRS 16
141 struct kvm_shared_msrs_global
{
143 u32 msrs
[KVM_NR_SHARED_MSRS
];
146 struct kvm_shared_msrs
{
147 struct user_return_notifier urn
;
149 struct kvm_shared_msr_values
{
152 } values
[KVM_NR_SHARED_MSRS
];
155 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
156 static struct kvm_shared_msrs __percpu
*shared_msrs
;
158 struct kvm_stats_debugfs_item debugfs_entries
[] = {
159 { "pf_fixed", VCPU_STAT(pf_fixed
) },
160 { "pf_guest", VCPU_STAT(pf_guest
) },
161 { "tlb_flush", VCPU_STAT(tlb_flush
) },
162 { "invlpg", VCPU_STAT(invlpg
) },
163 { "exits", VCPU_STAT(exits
) },
164 { "io_exits", VCPU_STAT(io_exits
) },
165 { "mmio_exits", VCPU_STAT(mmio_exits
) },
166 { "signal_exits", VCPU_STAT(signal_exits
) },
167 { "irq_window", VCPU_STAT(irq_window_exits
) },
168 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
169 { "halt_exits", VCPU_STAT(halt_exits
) },
170 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
171 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
172 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
173 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
174 { "hypercalls", VCPU_STAT(hypercalls
) },
175 { "request_irq", VCPU_STAT(request_irq_exits
) },
176 { "irq_exits", VCPU_STAT(irq_exits
) },
177 { "host_state_reload", VCPU_STAT(host_state_reload
) },
178 { "efer_reload", VCPU_STAT(efer_reload
) },
179 { "fpu_reload", VCPU_STAT(fpu_reload
) },
180 { "insn_emulation", VCPU_STAT(insn_emulation
) },
181 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
182 { "irq_injections", VCPU_STAT(irq_injections
) },
183 { "nmi_injections", VCPU_STAT(nmi_injections
) },
184 { "req_event", VCPU_STAT(req_event
) },
185 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
186 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
187 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
188 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
189 { "mmu_flooded", VM_STAT(mmu_flooded
) },
190 { "mmu_recycled", VM_STAT(mmu_recycled
) },
191 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
192 { "mmu_unsync", VM_STAT(mmu_unsync
) },
193 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
194 { "largepages", VM_STAT(lpages
) },
195 { "max_mmu_page_hash_collisions",
196 VM_STAT(max_mmu_page_hash_collisions
) },
200 u64 __read_mostly host_xcr0
;
202 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
204 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
207 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
208 vcpu
->arch
.apf
.gfns
[i
] = ~0;
211 static void kvm_on_user_return(struct user_return_notifier
*urn
)
214 struct kvm_shared_msrs
*locals
215 = container_of(urn
, struct kvm_shared_msrs
, urn
);
216 struct kvm_shared_msr_values
*values
;
220 * Disabling irqs at this point since the following code could be
221 * interrupted and executed through kvm_arch_hardware_disable()
223 local_irq_save(flags
);
224 if (locals
->registered
) {
225 locals
->registered
= false;
226 user_return_notifier_unregister(urn
);
228 local_irq_restore(flags
);
229 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
230 values
= &locals
->values
[slot
];
231 if (values
->host
!= values
->curr
) {
232 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
233 values
->curr
= values
->host
;
238 static void shared_msr_update(unsigned slot
, u32 msr
)
241 unsigned int cpu
= smp_processor_id();
242 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
244 /* only read, and nobody should modify it at this time,
245 * so don't need lock */
246 if (slot
>= shared_msrs_global
.nr
) {
247 printk(KERN_ERR
"kvm: invalid MSR slot!");
250 rdmsrl_safe(msr
, &value
);
251 smsr
->values
[slot
].host
= value
;
252 smsr
->values
[slot
].curr
= value
;
255 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
257 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
258 shared_msrs_global
.msrs
[slot
] = msr
;
259 if (slot
>= shared_msrs_global
.nr
)
260 shared_msrs_global
.nr
= slot
+ 1;
262 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
264 static void kvm_shared_msr_cpu_online(void)
268 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
269 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
272 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
274 unsigned int cpu
= smp_processor_id();
275 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
278 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
280 smsr
->values
[slot
].curr
= value
;
281 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
285 if (!smsr
->registered
) {
286 smsr
->urn
.on_user_return
= kvm_on_user_return
;
287 user_return_notifier_register(&smsr
->urn
);
288 smsr
->registered
= true;
292 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
294 static void drop_user_return_notifiers(void)
296 unsigned int cpu
= smp_processor_id();
297 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
299 if (smsr
->registered
)
300 kvm_on_user_return(&smsr
->urn
);
303 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
305 return vcpu
->arch
.apic_base
;
307 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
309 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
311 u64 old_state
= vcpu
->arch
.apic_base
&
312 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
313 u64 new_state
= msr_info
->data
&
314 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
315 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
316 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
318 if (!msr_info
->host_initiated
&&
319 ((msr_info
->data
& reserved_bits
) != 0 ||
320 new_state
== X2APIC_ENABLE
||
321 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
322 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
323 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
327 kvm_lapic_set_base(vcpu
, msr_info
->data
);
330 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
332 asmlinkage __visible
void kvm_spurious_fault(void)
334 /* Fault while not rebooting. We want the trace. */
337 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
339 #define EXCPT_BENIGN 0
340 #define EXCPT_CONTRIBUTORY 1
343 static int exception_class(int vector
)
353 return EXCPT_CONTRIBUTORY
;
360 #define EXCPT_FAULT 0
362 #define EXCPT_ABORT 2
363 #define EXCPT_INTERRUPT 3
365 static int exception_type(int vector
)
369 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
370 return EXCPT_INTERRUPT
;
374 /* #DB is trap, as instruction watchpoints are handled elsewhere */
375 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
378 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
381 /* Reserved exceptions will result in fault */
385 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
386 unsigned nr
, bool has_error
, u32 error_code
,
392 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
394 if (!vcpu
->arch
.exception
.pending
) {
396 if (has_error
&& !is_protmode(vcpu
))
398 vcpu
->arch
.exception
.pending
= true;
399 vcpu
->arch
.exception
.has_error_code
= has_error
;
400 vcpu
->arch
.exception
.nr
= nr
;
401 vcpu
->arch
.exception
.error_code
= error_code
;
402 vcpu
->arch
.exception
.reinject
= reinject
;
406 /* to check exception */
407 prev_nr
= vcpu
->arch
.exception
.nr
;
408 if (prev_nr
== DF_VECTOR
) {
409 /* triple fault -> shutdown */
410 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
413 class1
= exception_class(prev_nr
);
414 class2
= exception_class(nr
);
415 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
416 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
417 /* generate double fault per SDM Table 5-5 */
418 vcpu
->arch
.exception
.pending
= true;
419 vcpu
->arch
.exception
.has_error_code
= true;
420 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
421 vcpu
->arch
.exception
.error_code
= 0;
423 /* replace previous exception with a new one in a hope
424 that instruction re-execution will regenerate lost
429 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
431 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
433 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
435 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
437 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
439 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
441 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
444 kvm_inject_gp(vcpu
, 0);
446 return kvm_skip_emulated_instruction(vcpu
);
450 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
452 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
454 ++vcpu
->stat
.pf_guest
;
455 vcpu
->arch
.cr2
= fault
->address
;
456 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
458 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
460 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
462 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
463 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
465 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
467 return fault
->nested_page_fault
;
470 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
472 atomic_inc(&vcpu
->arch
.nmi_queued
);
473 kvm_make_request(KVM_REQ_NMI
, vcpu
);
475 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
477 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
479 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
481 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
483 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
485 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
487 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
490 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
491 * a #GP and return false.
493 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
495 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
497 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
500 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
502 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
504 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
507 kvm_queue_exception(vcpu
, UD_VECTOR
);
510 EXPORT_SYMBOL_GPL(kvm_require_dr
);
513 * This function will be used to read from the physical memory of the currently
514 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
515 * can read from guest physical or from the guest's guest physical memory.
517 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
518 gfn_t ngfn
, void *data
, int offset
, int len
,
521 struct x86_exception exception
;
525 ngpa
= gfn_to_gpa(ngfn
);
526 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
527 if (real_gfn
== UNMAPPED_GVA
)
530 real_gfn
= gpa_to_gfn(real_gfn
);
532 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
534 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
536 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
537 void *data
, int offset
, int len
, u32 access
)
539 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
540 data
, offset
, len
, access
);
544 * Load the pae pdptrs. Return true is they are all valid.
546 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
548 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
549 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
552 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
554 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
555 offset
* sizeof(u64
), sizeof(pdpte
),
556 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
561 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
562 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
564 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
571 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
572 __set_bit(VCPU_EXREG_PDPTR
,
573 (unsigned long *)&vcpu
->arch
.regs_avail
);
574 __set_bit(VCPU_EXREG_PDPTR
,
575 (unsigned long *)&vcpu
->arch
.regs_dirty
);
580 EXPORT_SYMBOL_GPL(load_pdptrs
);
582 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
584 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
590 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
593 if (!test_bit(VCPU_EXREG_PDPTR
,
594 (unsigned long *)&vcpu
->arch
.regs_avail
))
597 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
598 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
599 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
600 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
603 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
608 EXPORT_SYMBOL_GPL(pdptrs_changed
);
610 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
612 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
613 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
618 if (cr0
& 0xffffffff00000000UL
)
622 cr0
&= ~CR0_RESERVED_BITS
;
624 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
627 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
630 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
632 if ((vcpu
->arch
.efer
& EFER_LME
)) {
637 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
642 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
647 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
650 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
652 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
653 kvm_clear_async_pf_completion_queue(vcpu
);
654 kvm_async_pf_hash_reset(vcpu
);
657 if ((cr0
^ old_cr0
) & update_bits
)
658 kvm_mmu_reset_context(vcpu
);
660 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
661 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
662 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
663 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
667 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
669 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
671 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
673 EXPORT_SYMBOL_GPL(kvm_lmsw
);
675 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
677 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
678 !vcpu
->guest_xcr0_loaded
) {
679 /* kvm_set_xcr() also depends on this */
680 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
681 vcpu
->guest_xcr0_loaded
= 1;
685 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
687 if (vcpu
->guest_xcr0_loaded
) {
688 if (vcpu
->arch
.xcr0
!= host_xcr0
)
689 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
690 vcpu
->guest_xcr0_loaded
= 0;
694 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
697 u64 old_xcr0
= vcpu
->arch
.xcr0
;
700 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
701 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
703 if (!(xcr0
& XFEATURE_MASK_FP
))
705 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
709 * Do not allow the guest to set bits that we do not support
710 * saving. However, xcr0 bit 0 is always set, even if the
711 * emulated CPU does not support XSAVE (see fx_init).
713 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
714 if (xcr0
& ~valid_bits
)
717 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
718 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
721 if (xcr0
& XFEATURE_MASK_AVX512
) {
722 if (!(xcr0
& XFEATURE_MASK_YMM
))
724 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
727 vcpu
->arch
.xcr0
= xcr0
;
729 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
730 kvm_update_cpuid(vcpu
);
734 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
736 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
737 __kvm_set_xcr(vcpu
, index
, xcr
)) {
738 kvm_inject_gp(vcpu
, 0);
743 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
745 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
747 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
748 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
749 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
751 if (cr4
& CR4_RESERVED_BITS
)
754 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
757 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
760 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
763 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
766 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
769 if (is_long_mode(vcpu
)) {
770 if (!(cr4
& X86_CR4_PAE
))
772 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
773 && ((cr4
^ old_cr4
) & pdptr_bits
)
774 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
778 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
779 if (!guest_cpuid_has_pcid(vcpu
))
782 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
783 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
787 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
790 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
791 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
792 kvm_mmu_reset_context(vcpu
);
794 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
795 kvm_update_cpuid(vcpu
);
799 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
801 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
804 cr3
&= ~CR3_PCID_INVD
;
807 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
808 kvm_mmu_sync_roots(vcpu
);
809 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
813 if (is_long_mode(vcpu
)) {
814 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
816 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
817 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
820 vcpu
->arch
.cr3
= cr3
;
821 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
822 kvm_mmu_new_cr3(vcpu
);
825 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
827 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
829 if (cr8
& CR8_RESERVED_BITS
)
831 if (lapic_in_kernel(vcpu
))
832 kvm_lapic_set_tpr(vcpu
, cr8
);
834 vcpu
->arch
.cr8
= cr8
;
837 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
839 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
841 if (lapic_in_kernel(vcpu
))
842 return kvm_lapic_get_cr8(vcpu
);
844 return vcpu
->arch
.cr8
;
846 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
848 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
852 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
853 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
854 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
855 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
859 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
861 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
862 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
865 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
869 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
870 dr7
= vcpu
->arch
.guest_debug_dr7
;
872 dr7
= vcpu
->arch
.dr7
;
873 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
874 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
875 if (dr7
& DR7_BP_EN_MASK
)
876 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
879 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
881 u64 fixed
= DR6_FIXED_1
;
883 if (!guest_cpuid_has_rtm(vcpu
))
888 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
892 vcpu
->arch
.db
[dr
] = val
;
893 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
894 vcpu
->arch
.eff_db
[dr
] = val
;
899 if (val
& 0xffffffff00000000ULL
)
901 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
902 kvm_update_dr6(vcpu
);
907 if (val
& 0xffffffff00000000ULL
)
909 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
910 kvm_update_dr7(vcpu
);
917 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
919 if (__kvm_set_dr(vcpu
, dr
, val
)) {
920 kvm_inject_gp(vcpu
, 0);
925 EXPORT_SYMBOL_GPL(kvm_set_dr
);
927 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
931 *val
= vcpu
->arch
.db
[dr
];
936 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
937 *val
= vcpu
->arch
.dr6
;
939 *val
= kvm_x86_ops
->get_dr6(vcpu
);
944 *val
= vcpu
->arch
.dr7
;
949 EXPORT_SYMBOL_GPL(kvm_get_dr
);
951 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
953 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
957 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
960 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
961 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
964 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
967 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
968 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
970 * This list is modified at module load time to reflect the
971 * capabilities of the host cpu. This capabilities test skips MSRs that are
972 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
973 * may depend on host virtualization features rather than host cpu features.
976 static u32 msrs_to_save
[] = {
977 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
980 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
982 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
983 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
986 static unsigned num_msrs_to_save
;
988 static u32 emulated_msrs
[] = {
989 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
990 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
991 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
992 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
993 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
994 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
997 HV_X64_MSR_VP_RUNTIME
,
999 HV_X64_MSR_STIMER0_CONFIG
,
1000 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1003 MSR_IA32_TSC_ADJUST
,
1004 MSR_IA32_TSCDEADLINE
,
1005 MSR_IA32_MISC_ENABLE
,
1006 MSR_IA32_MCG_STATUS
,
1008 MSR_IA32_MCG_EXT_CTL
,
1011 MSR_MISC_FEATURES_ENABLES
,
1014 static unsigned num_emulated_msrs
;
1016 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1018 if (efer
& efer_reserved_bits
)
1021 if (efer
& EFER_FFXSR
) {
1022 struct kvm_cpuid_entry2
*feat
;
1024 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1025 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1029 if (efer
& EFER_SVME
) {
1030 struct kvm_cpuid_entry2
*feat
;
1032 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1033 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1039 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1041 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1043 u64 old_efer
= vcpu
->arch
.efer
;
1045 if (!kvm_valid_efer(vcpu
, efer
))
1049 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1053 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1055 kvm_x86_ops
->set_efer(vcpu
, efer
);
1057 /* Update reserved bits */
1058 if ((efer
^ old_efer
) & EFER_NX
)
1059 kvm_mmu_reset_context(vcpu
);
1064 void kvm_enable_efer_bits(u64 mask
)
1066 efer_reserved_bits
&= ~mask
;
1068 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1071 * Writes msr value into into the appropriate "register".
1072 * Returns 0 on success, non-0 otherwise.
1073 * Assumes vcpu_load() was already called.
1075 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1077 switch (msr
->index
) {
1080 case MSR_KERNEL_GS_BASE
:
1083 if (is_noncanonical_address(msr
->data
))
1086 case MSR_IA32_SYSENTER_EIP
:
1087 case MSR_IA32_SYSENTER_ESP
:
1089 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1090 * non-canonical address is written on Intel but not on
1091 * AMD (which ignores the top 32-bits, because it does
1092 * not implement 64-bit SYSENTER).
1094 * 64-bit code should hence be able to write a non-canonical
1095 * value on AMD. Making the address canonical ensures that
1096 * vmentry does not fail on Intel after writing a non-canonical
1097 * value, and that something deterministic happens if the guest
1098 * invokes 64-bit SYSENTER.
1100 msr
->data
= get_canonical(msr
->data
);
1102 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1104 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1107 * Adapt set_msr() to msr_io()'s calling convention
1109 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1111 struct msr_data msr
;
1115 msr
.host_initiated
= true;
1116 r
= kvm_get_msr(vcpu
, &msr
);
1124 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1126 struct msr_data msr
;
1130 msr
.host_initiated
= true;
1131 return kvm_set_msr(vcpu
, &msr
);
1134 #ifdef CONFIG_X86_64
1135 struct pvclock_gtod_data
{
1138 struct { /* extract of a clocksource struct */
1151 static struct pvclock_gtod_data pvclock_gtod_data
;
1153 static void update_pvclock_gtod(struct timekeeper
*tk
)
1155 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1158 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1160 write_seqcount_begin(&vdata
->seq
);
1162 /* copy pvclock gtod data */
1163 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1164 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1165 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1166 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1167 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1169 vdata
->boot_ns
= boot_ns
;
1170 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1172 vdata
->wall_time_sec
= tk
->xtime_sec
;
1174 write_seqcount_end(&vdata
->seq
);
1178 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1181 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1182 * vcpu_enter_guest. This function is only called from
1183 * the physical CPU that is running vcpu.
1185 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1188 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1192 struct pvclock_wall_clock wc
;
1193 struct timespec64 boot
;
1198 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1203 ++version
; /* first time write, random junk */
1207 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1211 * The guest calculates current wall clock time by adding
1212 * system time (updated by kvm_guest_time_update below) to the
1213 * wall clock specified here. guest system time equals host
1214 * system time for us, thus we must fill in host boot time here.
1216 getboottime64(&boot
);
1218 if (kvm
->arch
.kvmclock_offset
) {
1219 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1220 boot
= timespec64_sub(boot
, ts
);
1222 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1223 wc
.nsec
= boot
.tv_nsec
;
1224 wc
.version
= version
;
1226 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1229 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1232 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1234 do_shl32_div32(dividend
, divisor
);
1238 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1239 s8
*pshift
, u32
*pmultiplier
)
1247 scaled64
= scaled_hz
;
1248 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1253 tps32
= (uint32_t)tps64
;
1254 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1255 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1263 *pmultiplier
= div_frac(scaled64
, tps32
);
1265 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1266 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1269 #ifdef CONFIG_X86_64
1270 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1273 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1274 static unsigned long max_tsc_khz
;
1276 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1278 u64 v
= (u64
)khz
* (1000000 + ppm
);
1283 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1287 /* Guest TSC same frequency as host TSC? */
1289 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1293 /* TSC scaling supported? */
1294 if (!kvm_has_tsc_control
) {
1295 if (user_tsc_khz
> tsc_khz
) {
1296 vcpu
->arch
.tsc_catchup
= 1;
1297 vcpu
->arch
.tsc_always_catchup
= 1;
1300 WARN(1, "user requested TSC rate below hardware speed\n");
1305 /* TSC scaling required - calculate ratio */
1306 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1307 user_tsc_khz
, tsc_khz
);
1309 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1310 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1315 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1319 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1321 u32 thresh_lo
, thresh_hi
;
1322 int use_scaling
= 0;
1324 /* tsc_khz can be zero if TSC calibration fails */
1325 if (user_tsc_khz
== 0) {
1326 /* set tsc_scaling_ratio to a safe value */
1327 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1331 /* Compute a scale to convert nanoseconds in TSC cycles */
1332 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1333 &vcpu
->arch
.virtual_tsc_shift
,
1334 &vcpu
->arch
.virtual_tsc_mult
);
1335 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1338 * Compute the variation in TSC rate which is acceptable
1339 * within the range of tolerance and decide if the
1340 * rate being applied is within that bounds of the hardware
1341 * rate. If so, no scaling or compensation need be done.
1343 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1344 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1345 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1346 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1349 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1352 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1354 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1355 vcpu
->arch
.virtual_tsc_mult
,
1356 vcpu
->arch
.virtual_tsc_shift
);
1357 tsc
+= vcpu
->arch
.this_tsc_write
;
1361 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1363 #ifdef CONFIG_X86_64
1365 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1366 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1368 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1369 atomic_read(&vcpu
->kvm
->online_vcpus
));
1372 * Once the masterclock is enabled, always perform request in
1373 * order to update it.
1375 * In order to enable masterclock, the host clocksource must be TSC
1376 * and the vcpus need to have matched TSCs. When that happens,
1377 * perform request to enable masterclock.
1379 if (ka
->use_master_clock
||
1380 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1381 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1383 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1384 atomic_read(&vcpu
->kvm
->online_vcpus
),
1385 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1389 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1391 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1392 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1396 * Multiply tsc by a fixed point number represented by ratio.
1398 * The most significant 64-N bits (mult) of ratio represent the
1399 * integral part of the fixed point number; the remaining N bits
1400 * (frac) represent the fractional part, ie. ratio represents a fixed
1401 * point number (mult + frac * 2^(-N)).
1403 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1405 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1407 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1410 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1413 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1415 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1416 _tsc
= __scale_tsc(ratio
, tsc
);
1420 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1422 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1426 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1428 return target_tsc
- tsc
;
1431 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1433 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1435 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1437 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1439 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1440 vcpu
->arch
.tsc_offset
= offset
;
1443 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1445 struct kvm
*kvm
= vcpu
->kvm
;
1446 u64 offset
, ns
, elapsed
;
1447 unsigned long flags
;
1449 bool already_matched
;
1450 u64 data
= msr
->data
;
1451 bool synchronizing
= false;
1453 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1454 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1455 ns
= ktime_get_boot_ns();
1456 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1458 if (vcpu
->arch
.virtual_tsc_khz
) {
1459 if (data
== 0 && msr
->host_initiated
) {
1461 * detection of vcpu initialization -- need to sync
1462 * with other vCPUs. This particularly helps to keep
1463 * kvm_clock stable after CPU hotplug
1465 synchronizing
= true;
1467 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1468 nsec_to_cycles(vcpu
, elapsed
);
1469 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1471 * Special case: TSC write with a small delta (1 second)
1472 * of virtual cycle time against real time is
1473 * interpreted as an attempt to synchronize the CPU.
1475 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1476 data
+ tsc_hz
> tsc_exp
;
1481 * For a reliable TSC, we can match TSC offsets, and for an unstable
1482 * TSC, we add elapsed time in this computation. We could let the
1483 * compensation code attempt to catch up if we fall behind, but
1484 * it's better to try to match offsets from the beginning.
1486 if (synchronizing
&&
1487 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1488 if (!check_tsc_unstable()) {
1489 offset
= kvm
->arch
.cur_tsc_offset
;
1490 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1492 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1494 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1495 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1498 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1501 * We split periods of matched TSC writes into generations.
1502 * For each generation, we track the original measured
1503 * nanosecond time, offset, and write, so if TSCs are in
1504 * sync, we can match exact offset, and if not, we can match
1505 * exact software computation in compute_guest_tsc()
1507 * These values are tracked in kvm->arch.cur_xxx variables.
1509 kvm
->arch
.cur_tsc_generation
++;
1510 kvm
->arch
.cur_tsc_nsec
= ns
;
1511 kvm
->arch
.cur_tsc_write
= data
;
1512 kvm
->arch
.cur_tsc_offset
= offset
;
1514 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1515 kvm
->arch
.cur_tsc_generation
, data
);
1519 * We also track th most recent recorded KHZ, write and time to
1520 * allow the matching interval to be extended at each write.
1522 kvm
->arch
.last_tsc_nsec
= ns
;
1523 kvm
->arch
.last_tsc_write
= data
;
1524 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1526 vcpu
->arch
.last_guest_tsc
= data
;
1528 /* Keep track of which generation this VCPU has synchronized to */
1529 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1530 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1531 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1533 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1534 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1535 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1536 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1538 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1540 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1541 } else if (!already_matched
) {
1542 kvm
->arch
.nr_vcpus_matched_tsc
++;
1545 kvm_track_tsc_matching(vcpu
);
1546 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1549 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1551 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1554 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1557 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1559 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1560 WARN_ON(adjustment
< 0);
1561 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1562 adjust_tsc_offset_guest(vcpu
, adjustment
);
1565 #ifdef CONFIG_X86_64
1567 static u64
read_tsc(void)
1569 u64 ret
= (u64
)rdtsc_ordered();
1570 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1572 if (likely(ret
>= last
))
1576 * GCC likes to generate cmov here, but this branch is extremely
1577 * predictable (it's just a function of time and the likely is
1578 * very likely) and there's a data dependence, so force GCC
1579 * to generate a branch instead. I don't barrier() because
1580 * we don't actually need a barrier, and if this function
1581 * ever gets inlined it will generate worse code.
1587 static inline u64
vgettsc(u64
*cycle_now
)
1590 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1592 *cycle_now
= read_tsc();
1594 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1595 return v
* gtod
->clock
.mult
;
1598 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1600 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1606 seq
= read_seqcount_begin(>od
->seq
);
1607 mode
= gtod
->clock
.vclock_mode
;
1608 ns
= gtod
->nsec_base
;
1609 ns
+= vgettsc(cycle_now
);
1610 ns
>>= gtod
->clock
.shift
;
1611 ns
+= gtod
->boot_ns
;
1612 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1618 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1620 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1626 seq
= read_seqcount_begin(>od
->seq
);
1627 mode
= gtod
->clock
.vclock_mode
;
1628 ts
->tv_sec
= gtod
->wall_time_sec
;
1629 ns
= gtod
->nsec_base
;
1630 ns
+= vgettsc(cycle_now
);
1631 ns
>>= gtod
->clock
.shift
;
1632 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1634 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1640 /* returns true if host is using tsc clocksource */
1641 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1643 /* checked again under seqlock below */
1644 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1647 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1650 /* returns true if host is using tsc clocksource */
1651 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1654 /* checked again under seqlock below */
1655 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1658 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1664 * Assuming a stable TSC across physical CPUS, and a stable TSC
1665 * across virtual CPUs, the following condition is possible.
1666 * Each numbered line represents an event visible to both
1667 * CPUs at the next numbered event.
1669 * "timespecX" represents host monotonic time. "tscX" represents
1672 * VCPU0 on CPU0 | VCPU1 on CPU1
1674 * 1. read timespec0,tsc0
1675 * 2. | timespec1 = timespec0 + N
1677 * 3. transition to guest | transition to guest
1678 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1679 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1680 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1682 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1685 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1687 * - 0 < N - M => M < N
1689 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1690 * always the case (the difference between two distinct xtime instances
1691 * might be smaller then the difference between corresponding TSC reads,
1692 * when updating guest vcpus pvclock areas).
1694 * To avoid that problem, do not allow visibility of distinct
1695 * system_timestamp/tsc_timestamp values simultaneously: use a master
1696 * copy of host monotonic time values. Update that master copy
1699 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1703 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1705 #ifdef CONFIG_X86_64
1706 struct kvm_arch
*ka
= &kvm
->arch
;
1708 bool host_tsc_clocksource
, vcpus_matched
;
1710 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1711 atomic_read(&kvm
->online_vcpus
));
1714 * If the host uses TSC clock, then passthrough TSC as stable
1717 host_tsc_clocksource
= kvm_get_time_and_clockread(
1718 &ka
->master_kernel_ns
,
1719 &ka
->master_cycle_now
);
1721 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1722 && !backwards_tsc_observed
1723 && !ka
->boot_vcpu_runs_old_kvmclock
;
1725 if (ka
->use_master_clock
)
1726 atomic_set(&kvm_guest_has_master_clock
, 1);
1728 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1729 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1734 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1736 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1739 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1741 #ifdef CONFIG_X86_64
1743 struct kvm_vcpu
*vcpu
;
1744 struct kvm_arch
*ka
= &kvm
->arch
;
1746 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1747 kvm_make_mclock_inprogress_request(kvm
);
1748 /* no guest entries from this point */
1749 pvclock_update_vm_gtod_copy(kvm
);
1751 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1752 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1754 /* guest entries allowed */
1755 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1756 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1758 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1762 u64
get_kvmclock_ns(struct kvm
*kvm
)
1764 struct kvm_arch
*ka
= &kvm
->arch
;
1765 struct pvclock_vcpu_time_info hv_clock
;
1767 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1768 if (!ka
->use_master_clock
) {
1769 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1770 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1773 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1774 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1775 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1777 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1778 &hv_clock
.tsc_shift
,
1779 &hv_clock
.tsc_to_system_mul
);
1780 return __pvclock_read_cycles(&hv_clock
, rdtsc());
1783 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1785 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1786 struct pvclock_vcpu_time_info guest_hv_clock
;
1788 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1789 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1792 /* This VCPU is paused, but it's legal for a guest to read another
1793 * VCPU's kvmclock, so we really have to follow the specification where
1794 * it says that version is odd if data is being modified, and even after
1797 * Version field updates must be kept separate. This is because
1798 * kvm_write_guest_cached might use a "rep movs" instruction, and
1799 * writes within a string instruction are weakly ordered. So there
1800 * are three writes overall.
1802 * As a small optimization, only write the version field in the first
1803 * and third write. The vcpu->pv_time cache is still valid, because the
1804 * version field is the first in the struct.
1806 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1808 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1809 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1811 sizeof(vcpu
->hv_clock
.version
));
1815 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1816 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1818 if (vcpu
->pvclock_set_guest_stopped_request
) {
1819 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1820 vcpu
->pvclock_set_guest_stopped_request
= false;
1823 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1825 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1827 sizeof(vcpu
->hv_clock
));
1831 vcpu
->hv_clock
.version
++;
1832 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1834 sizeof(vcpu
->hv_clock
.version
));
1837 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1839 unsigned long flags
, tgt_tsc_khz
;
1840 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1841 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1843 u64 tsc_timestamp
, host_tsc
;
1845 bool use_master_clock
;
1851 * If the host uses TSC clock, then passthrough TSC as stable
1854 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1855 use_master_clock
= ka
->use_master_clock
;
1856 if (use_master_clock
) {
1857 host_tsc
= ka
->master_cycle_now
;
1858 kernel_ns
= ka
->master_kernel_ns
;
1860 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1862 /* Keep irq disabled to prevent changes to the clock */
1863 local_irq_save(flags
);
1864 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1865 if (unlikely(tgt_tsc_khz
== 0)) {
1866 local_irq_restore(flags
);
1867 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1870 if (!use_master_clock
) {
1872 kernel_ns
= ktime_get_boot_ns();
1875 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1878 * We may have to catch up the TSC to match elapsed wall clock
1879 * time for two reasons, even if kvmclock is used.
1880 * 1) CPU could have been running below the maximum TSC rate
1881 * 2) Broken TSC compensation resets the base at each VCPU
1882 * entry to avoid unknown leaps of TSC even when running
1883 * again on the same CPU. This may cause apparent elapsed
1884 * time to disappear, and the guest to stand still or run
1887 if (vcpu
->tsc_catchup
) {
1888 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1889 if (tsc
> tsc_timestamp
) {
1890 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1891 tsc_timestamp
= tsc
;
1895 local_irq_restore(flags
);
1897 /* With all the info we got, fill in the values */
1899 if (kvm_has_tsc_control
)
1900 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1902 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1903 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1904 &vcpu
->hv_clock
.tsc_shift
,
1905 &vcpu
->hv_clock
.tsc_to_system_mul
);
1906 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1909 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1910 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1911 vcpu
->last_guest_tsc
= tsc_timestamp
;
1913 /* If the host uses TSC clocksource, then it is stable */
1915 if (use_master_clock
)
1916 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1918 vcpu
->hv_clock
.flags
= pvclock_flags
;
1920 if (vcpu
->pv_time_enabled
)
1921 kvm_setup_pvclock_page(v
);
1922 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1923 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1928 * kvmclock updates which are isolated to a given vcpu, such as
1929 * vcpu->cpu migration, should not allow system_timestamp from
1930 * the rest of the vcpus to remain static. Otherwise ntp frequency
1931 * correction applies to one vcpu's system_timestamp but not
1934 * So in those cases, request a kvmclock update for all vcpus.
1935 * We need to rate-limit these requests though, as they can
1936 * considerably slow guests that have a large number of vcpus.
1937 * The time for a remote vcpu to update its kvmclock is bound
1938 * by the delay we use to rate-limit the updates.
1941 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1943 static void kvmclock_update_fn(struct work_struct
*work
)
1946 struct delayed_work
*dwork
= to_delayed_work(work
);
1947 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1948 kvmclock_update_work
);
1949 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1950 struct kvm_vcpu
*vcpu
;
1952 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1953 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1954 kvm_vcpu_kick(vcpu
);
1958 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1960 struct kvm
*kvm
= v
->kvm
;
1962 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1963 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1964 KVMCLOCK_UPDATE_DELAY
);
1967 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1969 static void kvmclock_sync_fn(struct work_struct
*work
)
1971 struct delayed_work
*dwork
= to_delayed_work(work
);
1972 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1973 kvmclock_sync_work
);
1974 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1976 if (!kvmclock_periodic_sync
)
1979 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1980 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1981 KVMCLOCK_SYNC_PERIOD
);
1984 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1986 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1987 unsigned bank_num
= mcg_cap
& 0xff;
1990 case MSR_IA32_MCG_STATUS
:
1991 vcpu
->arch
.mcg_status
= data
;
1993 case MSR_IA32_MCG_CTL
:
1994 if (!(mcg_cap
& MCG_CTL_P
))
1996 if (data
!= 0 && data
!= ~(u64
)0)
1998 vcpu
->arch
.mcg_ctl
= data
;
2001 if (msr
>= MSR_IA32_MC0_CTL
&&
2002 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2003 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2004 /* only 0 or all 1s can be written to IA32_MCi_CTL
2005 * some Linux kernels though clear bit 10 in bank 4 to
2006 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2007 * this to avoid an uncatched #GP in the guest
2009 if ((offset
& 0x3) == 0 &&
2010 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2012 vcpu
->arch
.mce_banks
[offset
] = data
;
2020 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2022 struct kvm
*kvm
= vcpu
->kvm
;
2023 int lm
= is_long_mode(vcpu
);
2024 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2025 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2026 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2027 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2028 u32 page_num
= data
& ~PAGE_MASK
;
2029 u64 page_addr
= data
& PAGE_MASK
;
2034 if (page_num
>= blob_size
)
2037 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2042 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2051 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2053 gpa_t gpa
= data
& ~0x3f;
2055 /* Bits 2:5 are reserved, Should be zero */
2059 vcpu
->arch
.apf
.msr_val
= data
;
2061 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2062 kvm_clear_async_pf_completion_queue(vcpu
);
2063 kvm_async_pf_hash_reset(vcpu
);
2067 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2071 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2072 kvm_async_pf_wakeup_all(vcpu
);
2076 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2078 vcpu
->arch
.pv_time_enabled
= false;
2081 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2083 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2086 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2087 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2090 vcpu
->arch
.st
.steal
.preempted
= 0;
2092 if (vcpu
->arch
.st
.steal
.version
& 1)
2093 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2095 vcpu
->arch
.st
.steal
.version
+= 1;
2097 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2098 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2102 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2103 vcpu
->arch
.st
.last_steal
;
2104 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2106 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2107 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2111 vcpu
->arch
.st
.steal
.version
+= 1;
2113 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2114 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2117 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2120 u32 msr
= msr_info
->index
;
2121 u64 data
= msr_info
->data
;
2124 case MSR_AMD64_NB_CFG
:
2125 case MSR_IA32_UCODE_REV
:
2126 case MSR_IA32_UCODE_WRITE
:
2127 case MSR_VM_HSAVE_PA
:
2128 case MSR_AMD64_PATCH_LOADER
:
2129 case MSR_AMD64_BU_CFG2
:
2130 case MSR_AMD64_DC_CFG
:
2134 return set_efer(vcpu
, data
);
2136 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2137 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2138 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2139 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2141 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2146 case MSR_FAM10H_MMIO_CONF_BASE
:
2148 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2153 case MSR_IA32_DEBUGCTLMSR
:
2155 /* We support the non-activated case already */
2157 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2158 /* Values other than LBR and BTF are vendor-specific,
2159 thus reserved and should throw a #GP */
2162 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2165 case 0x200 ... 0x2ff:
2166 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2167 case MSR_IA32_APICBASE
:
2168 return kvm_set_apic_base(vcpu
, msr_info
);
2169 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2170 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2171 case MSR_IA32_TSCDEADLINE
:
2172 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2174 case MSR_IA32_TSC_ADJUST
:
2175 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2176 if (!msr_info
->host_initiated
) {
2177 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2178 adjust_tsc_offset_guest(vcpu
, adj
);
2180 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2183 case MSR_IA32_MISC_ENABLE
:
2184 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2186 case MSR_IA32_SMBASE
:
2187 if (!msr_info
->host_initiated
)
2189 vcpu
->arch
.smbase
= data
;
2191 case MSR_KVM_WALL_CLOCK_NEW
:
2192 case MSR_KVM_WALL_CLOCK
:
2193 vcpu
->kvm
->arch
.wall_clock
= data
;
2194 kvm_write_wall_clock(vcpu
->kvm
, data
);
2196 case MSR_KVM_SYSTEM_TIME_NEW
:
2197 case MSR_KVM_SYSTEM_TIME
: {
2198 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2200 kvmclock_reset(vcpu
);
2202 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2203 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2205 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2206 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2208 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2211 vcpu
->arch
.time
= data
;
2212 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2214 /* we verify if the enable bit is set... */
2218 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2219 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2220 sizeof(struct pvclock_vcpu_time_info
)))
2221 vcpu
->arch
.pv_time_enabled
= false;
2223 vcpu
->arch
.pv_time_enabled
= true;
2227 case MSR_KVM_ASYNC_PF_EN
:
2228 if (kvm_pv_enable_async_pf(vcpu
, data
))
2231 case MSR_KVM_STEAL_TIME
:
2233 if (unlikely(!sched_info_on()))
2236 if (data
& KVM_STEAL_RESERVED_MASK
)
2239 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2240 data
& KVM_STEAL_VALID_BITS
,
2241 sizeof(struct kvm_steal_time
)))
2244 vcpu
->arch
.st
.msr_val
= data
;
2246 if (!(data
& KVM_MSR_ENABLED
))
2249 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2252 case MSR_KVM_PV_EOI_EN
:
2253 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2257 case MSR_IA32_MCG_CTL
:
2258 case MSR_IA32_MCG_STATUS
:
2259 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2260 return set_msr_mce(vcpu
, msr
, data
);
2262 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2263 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2264 pr
= true; /* fall through */
2265 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2266 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2267 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2268 return kvm_pmu_set_msr(vcpu
, msr_info
);
2270 if (pr
|| data
!= 0)
2271 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2272 "0x%x data 0x%llx\n", msr
, data
);
2274 case MSR_K7_CLK_CTL
:
2276 * Ignore all writes to this no longer documented MSR.
2277 * Writes are only relevant for old K7 processors,
2278 * all pre-dating SVM, but a recommended workaround from
2279 * AMD for these chips. It is possible to specify the
2280 * affected processor models on the command line, hence
2281 * the need to ignore the workaround.
2284 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2285 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2286 case HV_X64_MSR_CRASH_CTL
:
2287 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2288 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2289 msr_info
->host_initiated
);
2290 case MSR_IA32_BBL_CR_CTL3
:
2291 /* Drop writes to this legacy MSR -- see rdmsr
2292 * counterpart for further detail.
2294 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2296 case MSR_AMD64_OSVW_ID_LENGTH
:
2297 if (!guest_cpuid_has_osvw(vcpu
))
2299 vcpu
->arch
.osvw
.length
= data
;
2301 case MSR_AMD64_OSVW_STATUS
:
2302 if (!guest_cpuid_has_osvw(vcpu
))
2304 vcpu
->arch
.osvw
.status
= data
;
2306 case MSR_PLATFORM_INFO
:
2307 if (!msr_info
->host_initiated
||
2308 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2309 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2310 cpuid_fault_enabled(vcpu
)))
2312 vcpu
->arch
.msr_platform_info
= data
;
2314 case MSR_MISC_FEATURES_ENABLES
:
2315 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2316 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2317 !supports_cpuid_fault(vcpu
)))
2319 vcpu
->arch
.msr_misc_features_enables
= data
;
2322 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2323 return xen_hvm_config(vcpu
, data
);
2324 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2325 return kvm_pmu_set_msr(vcpu
, msr_info
);
2327 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2331 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2338 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2342 * Reads an msr value (of 'msr_index') into 'pdata'.
2343 * Returns 0 on success, non-0 otherwise.
2344 * Assumes vcpu_load() was already called.
2346 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2348 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2350 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2352 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2355 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2356 unsigned bank_num
= mcg_cap
& 0xff;
2359 case MSR_IA32_P5_MC_ADDR
:
2360 case MSR_IA32_P5_MC_TYPE
:
2363 case MSR_IA32_MCG_CAP
:
2364 data
= vcpu
->arch
.mcg_cap
;
2366 case MSR_IA32_MCG_CTL
:
2367 if (!(mcg_cap
& MCG_CTL_P
))
2369 data
= vcpu
->arch
.mcg_ctl
;
2371 case MSR_IA32_MCG_STATUS
:
2372 data
= vcpu
->arch
.mcg_status
;
2375 if (msr
>= MSR_IA32_MC0_CTL
&&
2376 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2377 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2378 data
= vcpu
->arch
.mce_banks
[offset
];
2387 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2389 switch (msr_info
->index
) {
2390 case MSR_IA32_PLATFORM_ID
:
2391 case MSR_IA32_EBL_CR_POWERON
:
2392 case MSR_IA32_DEBUGCTLMSR
:
2393 case MSR_IA32_LASTBRANCHFROMIP
:
2394 case MSR_IA32_LASTBRANCHTOIP
:
2395 case MSR_IA32_LASTINTFROMIP
:
2396 case MSR_IA32_LASTINTTOIP
:
2398 case MSR_K8_TSEG_ADDR
:
2399 case MSR_K8_TSEG_MASK
:
2401 case MSR_VM_HSAVE_PA
:
2402 case MSR_K8_INT_PENDING_MSG
:
2403 case MSR_AMD64_NB_CFG
:
2404 case MSR_FAM10H_MMIO_CONF_BASE
:
2405 case MSR_AMD64_BU_CFG2
:
2406 case MSR_IA32_PERF_CTL
:
2407 case MSR_AMD64_DC_CFG
:
2410 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2411 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2412 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2413 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2414 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2415 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2418 case MSR_IA32_UCODE_REV
:
2419 msr_info
->data
= 0x100000000ULL
;
2422 case 0x200 ... 0x2ff:
2423 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2424 case 0xcd: /* fsb frequency */
2428 * MSR_EBC_FREQUENCY_ID
2429 * Conservative value valid for even the basic CPU models.
2430 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2431 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2432 * and 266MHz for model 3, or 4. Set Core Clock
2433 * Frequency to System Bus Frequency Ratio to 1 (bits
2434 * 31:24) even though these are only valid for CPU
2435 * models > 2, however guests may end up dividing or
2436 * multiplying by zero otherwise.
2438 case MSR_EBC_FREQUENCY_ID
:
2439 msr_info
->data
= 1 << 24;
2441 case MSR_IA32_APICBASE
:
2442 msr_info
->data
= kvm_get_apic_base(vcpu
);
2444 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2445 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2447 case MSR_IA32_TSCDEADLINE
:
2448 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2450 case MSR_IA32_TSC_ADJUST
:
2451 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2453 case MSR_IA32_MISC_ENABLE
:
2454 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2456 case MSR_IA32_SMBASE
:
2457 if (!msr_info
->host_initiated
)
2459 msr_info
->data
= vcpu
->arch
.smbase
;
2461 case MSR_IA32_PERF_STATUS
:
2462 /* TSC increment by tick */
2463 msr_info
->data
= 1000ULL;
2464 /* CPU multiplier */
2465 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2468 msr_info
->data
= vcpu
->arch
.efer
;
2470 case MSR_KVM_WALL_CLOCK
:
2471 case MSR_KVM_WALL_CLOCK_NEW
:
2472 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2474 case MSR_KVM_SYSTEM_TIME
:
2475 case MSR_KVM_SYSTEM_TIME_NEW
:
2476 msr_info
->data
= vcpu
->arch
.time
;
2478 case MSR_KVM_ASYNC_PF_EN
:
2479 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2481 case MSR_KVM_STEAL_TIME
:
2482 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2484 case MSR_KVM_PV_EOI_EN
:
2485 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2487 case MSR_IA32_P5_MC_ADDR
:
2488 case MSR_IA32_P5_MC_TYPE
:
2489 case MSR_IA32_MCG_CAP
:
2490 case MSR_IA32_MCG_CTL
:
2491 case MSR_IA32_MCG_STATUS
:
2492 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2493 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2494 case MSR_K7_CLK_CTL
:
2496 * Provide expected ramp-up count for K7. All other
2497 * are set to zero, indicating minimum divisors for
2500 * This prevents guest kernels on AMD host with CPU
2501 * type 6, model 8 and higher from exploding due to
2502 * the rdmsr failing.
2504 msr_info
->data
= 0x20000000;
2506 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2507 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2508 case HV_X64_MSR_CRASH_CTL
:
2509 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2510 return kvm_hv_get_msr_common(vcpu
,
2511 msr_info
->index
, &msr_info
->data
);
2513 case MSR_IA32_BBL_CR_CTL3
:
2514 /* This legacy MSR exists but isn't fully documented in current
2515 * silicon. It is however accessed by winxp in very narrow
2516 * scenarios where it sets bit #19, itself documented as
2517 * a "reserved" bit. Best effort attempt to source coherent
2518 * read data here should the balance of the register be
2519 * interpreted by the guest:
2521 * L2 cache control register 3: 64GB range, 256KB size,
2522 * enabled, latency 0x1, configured
2524 msr_info
->data
= 0xbe702111;
2526 case MSR_AMD64_OSVW_ID_LENGTH
:
2527 if (!guest_cpuid_has_osvw(vcpu
))
2529 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2531 case MSR_AMD64_OSVW_STATUS
:
2532 if (!guest_cpuid_has_osvw(vcpu
))
2534 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2536 case MSR_PLATFORM_INFO
:
2537 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2539 case MSR_MISC_FEATURES_ENABLES
:
2540 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2543 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2544 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2546 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2550 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2557 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2560 * Read or write a bunch of msrs. All parameters are kernel addresses.
2562 * @return number of msrs set successfully.
2564 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2565 struct kvm_msr_entry
*entries
,
2566 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2567 unsigned index
, u64
*data
))
2571 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2572 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2573 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2575 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2581 * Read or write a bunch of msrs. Parameters are user addresses.
2583 * @return number of msrs set successfully.
2585 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2586 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2587 unsigned index
, u64
*data
),
2590 struct kvm_msrs msrs
;
2591 struct kvm_msr_entry
*entries
;
2596 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2600 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2603 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2604 entries
= memdup_user(user_msrs
->entries
, size
);
2605 if (IS_ERR(entries
)) {
2606 r
= PTR_ERR(entries
);
2610 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2615 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2626 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2631 case KVM_CAP_IRQCHIP
:
2633 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2634 case KVM_CAP_SET_TSS_ADDR
:
2635 case KVM_CAP_EXT_CPUID
:
2636 case KVM_CAP_EXT_EMUL_CPUID
:
2637 case KVM_CAP_CLOCKSOURCE
:
2639 case KVM_CAP_NOP_IO_DELAY
:
2640 case KVM_CAP_MP_STATE
:
2641 case KVM_CAP_SYNC_MMU
:
2642 case KVM_CAP_USER_NMI
:
2643 case KVM_CAP_REINJECT_CONTROL
:
2644 case KVM_CAP_IRQ_INJECT_STATUS
:
2645 case KVM_CAP_IOEVENTFD
:
2646 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2648 case KVM_CAP_PIT_STATE2
:
2649 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2650 case KVM_CAP_XEN_HVM
:
2651 case KVM_CAP_VCPU_EVENTS
:
2652 case KVM_CAP_HYPERV
:
2653 case KVM_CAP_HYPERV_VAPIC
:
2654 case KVM_CAP_HYPERV_SPIN
:
2655 case KVM_CAP_HYPERV_SYNIC
:
2656 case KVM_CAP_PCI_SEGMENT
:
2657 case KVM_CAP_DEBUGREGS
:
2658 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2660 case KVM_CAP_ASYNC_PF
:
2661 case KVM_CAP_GET_TSC_KHZ
:
2662 case KVM_CAP_KVMCLOCK_CTRL
:
2663 case KVM_CAP_READONLY_MEM
:
2664 case KVM_CAP_HYPERV_TIME
:
2665 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2666 case KVM_CAP_TSC_DEADLINE_TIMER
:
2667 case KVM_CAP_ENABLE_CAP_VM
:
2668 case KVM_CAP_DISABLE_QUIRKS
:
2669 case KVM_CAP_SET_BOOT_CPU_ID
:
2670 case KVM_CAP_SPLIT_IRQCHIP
:
2671 case KVM_CAP_IMMEDIATE_EXIT
:
2674 case KVM_CAP_ADJUST_CLOCK
:
2675 r
= KVM_CLOCK_TSC_STABLE
;
2677 case KVM_CAP_X86_GUEST_MWAIT
:
2678 r
= kvm_mwait_in_guest();
2680 case KVM_CAP_X86_SMM
:
2681 /* SMBASE is usually relocated above 1M on modern chipsets,
2682 * and SMM handlers might indeed rely on 4G segment limits,
2683 * so do not report SMM to be available if real mode is
2684 * emulated via vm86 mode. Still, do not go to great lengths
2685 * to avoid userspace's usage of the feature, because it is a
2686 * fringe case that is not enabled except via specific settings
2687 * of the module parameters.
2689 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2692 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2694 case KVM_CAP_NR_VCPUS
:
2695 r
= KVM_SOFT_MAX_VCPUS
;
2697 case KVM_CAP_MAX_VCPUS
:
2700 case KVM_CAP_NR_MEMSLOTS
:
2701 r
= KVM_USER_MEM_SLOTS
;
2703 case KVM_CAP_PV_MMU
: /* obsolete */
2707 r
= KVM_MAX_MCE_BANKS
;
2710 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2712 case KVM_CAP_TSC_CONTROL
:
2713 r
= kvm_has_tsc_control
;
2715 case KVM_CAP_X2APIC_API
:
2716 r
= KVM_X2APIC_API_VALID_FLAGS
;
2726 long kvm_arch_dev_ioctl(struct file
*filp
,
2727 unsigned int ioctl
, unsigned long arg
)
2729 void __user
*argp
= (void __user
*)arg
;
2733 case KVM_GET_MSR_INDEX_LIST
: {
2734 struct kvm_msr_list __user
*user_msr_list
= argp
;
2735 struct kvm_msr_list msr_list
;
2739 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2742 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2743 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2746 if (n
< msr_list
.nmsrs
)
2749 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2750 num_msrs_to_save
* sizeof(u32
)))
2752 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2754 num_emulated_msrs
* sizeof(u32
)))
2759 case KVM_GET_SUPPORTED_CPUID
:
2760 case KVM_GET_EMULATED_CPUID
: {
2761 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2762 struct kvm_cpuid2 cpuid
;
2765 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2768 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2774 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2779 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2781 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2782 sizeof(kvm_mce_cap_supported
)))
2794 static void wbinvd_ipi(void *garbage
)
2799 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2801 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2804 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2806 /* Address WBINVD may be executed by guest */
2807 if (need_emulate_wbinvd(vcpu
)) {
2808 if (kvm_x86_ops
->has_wbinvd_exit())
2809 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2810 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2811 smp_call_function_single(vcpu
->cpu
,
2812 wbinvd_ipi
, NULL
, 1);
2815 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2817 /* Apply any externally detected TSC adjustments (due to suspend) */
2818 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2819 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2820 vcpu
->arch
.tsc_offset_adjustment
= 0;
2821 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2824 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2825 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2826 rdtsc() - vcpu
->arch
.last_host_tsc
;
2828 mark_tsc_unstable("KVM discovered backwards TSC");
2830 if (check_tsc_unstable()) {
2831 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2832 vcpu
->arch
.last_guest_tsc
);
2833 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2834 vcpu
->arch
.tsc_catchup
= 1;
2836 if (kvm_lapic_hv_timer_in_use(vcpu
) &&
2837 kvm_x86_ops
->set_hv_timer(vcpu
,
2838 kvm_get_lapic_target_expiration_tsc(vcpu
)))
2839 kvm_lapic_switch_to_sw_timer(vcpu
);
2841 * On a host with synchronized TSC, there is no need to update
2842 * kvmclock on vcpu->cpu migration
2844 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2845 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2846 if (vcpu
->cpu
!= cpu
)
2847 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2851 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2854 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2856 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2859 vcpu
->arch
.st
.steal
.preempted
= 1;
2861 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2862 &vcpu
->arch
.st
.steal
.preempted
,
2863 offsetof(struct kvm_steal_time
, preempted
),
2864 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2867 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2871 * Disable page faults because we're in atomic context here.
2872 * kvm_write_guest_offset_cached() would call might_fault()
2873 * that relies on pagefault_disable() to tell if there's a
2874 * bug. NOTE: the write to guest memory may not go through if
2875 * during postcopy live migration or if there's heavy guest
2878 pagefault_disable();
2880 * kvm_memslots() will be called by
2881 * kvm_write_guest_offset_cached() so take the srcu lock.
2883 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2884 kvm_steal_time_set_preempted(vcpu
);
2885 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2887 kvm_x86_ops
->vcpu_put(vcpu
);
2888 kvm_put_guest_fpu(vcpu
);
2889 vcpu
->arch
.last_host_tsc
= rdtsc();
2892 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2893 struct kvm_lapic_state
*s
)
2895 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2896 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2898 return kvm_apic_get_state(vcpu
, s
);
2901 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2902 struct kvm_lapic_state
*s
)
2906 r
= kvm_apic_set_state(vcpu
, s
);
2909 update_cr8_intercept(vcpu
);
2914 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2916 return (!lapic_in_kernel(vcpu
) ||
2917 kvm_apic_accept_pic_intr(vcpu
));
2921 * if userspace requested an interrupt window, check that the
2922 * interrupt window is open.
2924 * No need to exit to userspace if we already have an interrupt queued.
2926 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2928 return kvm_arch_interrupt_allowed(vcpu
) &&
2929 !kvm_cpu_has_interrupt(vcpu
) &&
2930 !kvm_event_needs_reinjection(vcpu
) &&
2931 kvm_cpu_accept_dm_intr(vcpu
);
2934 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2935 struct kvm_interrupt
*irq
)
2937 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2940 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2941 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2942 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2947 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2948 * fail for in-kernel 8259.
2950 if (pic_in_kernel(vcpu
->kvm
))
2953 if (vcpu
->arch
.pending_external_vector
!= -1)
2956 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2957 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2961 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2963 kvm_inject_nmi(vcpu
);
2968 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2970 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2975 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2976 struct kvm_tpr_access_ctl
*tac
)
2980 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2984 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2988 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2991 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2993 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
2996 vcpu
->arch
.mcg_cap
= mcg_cap
;
2997 /* Init IA32_MCG_CTL to all 1s */
2998 if (mcg_cap
& MCG_CTL_P
)
2999 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3000 /* Init IA32_MCi_CTL to all 1s */
3001 for (bank
= 0; bank
< bank_num
; bank
++)
3002 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3004 if (kvm_x86_ops
->setup_mce
)
3005 kvm_x86_ops
->setup_mce(vcpu
);
3010 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3011 struct kvm_x86_mce
*mce
)
3013 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3014 unsigned bank_num
= mcg_cap
& 0xff;
3015 u64
*banks
= vcpu
->arch
.mce_banks
;
3017 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3020 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3021 * reporting is disabled
3023 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3024 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3026 banks
+= 4 * mce
->bank
;
3028 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3029 * reporting is disabled for the bank
3031 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3033 if (mce
->status
& MCI_STATUS_UC
) {
3034 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3035 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3036 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3039 if (banks
[1] & MCI_STATUS_VAL
)
3040 mce
->status
|= MCI_STATUS_OVER
;
3041 banks
[2] = mce
->addr
;
3042 banks
[3] = mce
->misc
;
3043 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3044 banks
[1] = mce
->status
;
3045 kvm_queue_exception(vcpu
, MC_VECTOR
);
3046 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3047 || !(banks
[1] & MCI_STATUS_UC
)) {
3048 if (banks
[1] & MCI_STATUS_VAL
)
3049 mce
->status
|= MCI_STATUS_OVER
;
3050 banks
[2] = mce
->addr
;
3051 banks
[3] = mce
->misc
;
3052 banks
[1] = mce
->status
;
3054 banks
[1] |= MCI_STATUS_OVER
;
3058 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3059 struct kvm_vcpu_events
*events
)
3062 events
->exception
.injected
=
3063 vcpu
->arch
.exception
.pending
&&
3064 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3065 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3066 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3067 events
->exception
.pad
= 0;
3068 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3070 events
->interrupt
.injected
=
3071 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3072 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3073 events
->interrupt
.soft
= 0;
3074 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3076 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3077 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3078 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3079 events
->nmi
.pad
= 0;
3081 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3083 events
->smi
.smm
= is_smm(vcpu
);
3084 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3085 events
->smi
.smm_inside_nmi
=
3086 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3087 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3089 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3090 | KVM_VCPUEVENT_VALID_SHADOW
3091 | KVM_VCPUEVENT_VALID_SMM
);
3092 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3095 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3097 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3098 struct kvm_vcpu_events
*events
)
3100 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3101 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3102 | KVM_VCPUEVENT_VALID_SHADOW
3103 | KVM_VCPUEVENT_VALID_SMM
))
3106 if (events
->exception
.injected
&&
3107 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3108 is_guest_mode(vcpu
)))
3111 /* INITs are latched while in SMM */
3112 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3113 (events
->smi
.smm
|| events
->smi
.pending
) &&
3114 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3118 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3119 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3120 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3121 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3123 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3124 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3125 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3126 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3127 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3128 events
->interrupt
.shadow
);
3130 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3131 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3132 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3133 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3135 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3136 lapic_in_kernel(vcpu
))
3137 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3139 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3140 u32 hflags
= vcpu
->arch
.hflags
;
3141 if (events
->smi
.smm
)
3142 hflags
|= HF_SMM_MASK
;
3144 hflags
&= ~HF_SMM_MASK
;
3145 kvm_set_hflags(vcpu
, hflags
);
3147 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3148 if (events
->smi
.smm_inside_nmi
)
3149 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3151 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3152 if (lapic_in_kernel(vcpu
)) {
3153 if (events
->smi
.latched_init
)
3154 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3156 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3160 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3165 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3166 struct kvm_debugregs
*dbgregs
)
3170 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3171 kvm_get_dr(vcpu
, 6, &val
);
3173 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3175 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3178 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3179 struct kvm_debugregs
*dbgregs
)
3184 if (dbgregs
->dr6
& ~0xffffffffull
)
3186 if (dbgregs
->dr7
& ~0xffffffffull
)
3189 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3190 kvm_update_dr0123(vcpu
);
3191 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3192 kvm_update_dr6(vcpu
);
3193 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3194 kvm_update_dr7(vcpu
);
3199 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3201 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3203 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3204 u64 xstate_bv
= xsave
->header
.xfeatures
;
3208 * Copy legacy XSAVE area, to avoid complications with CPUID
3209 * leaves 0 and 1 in the loop below.
3211 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3214 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3215 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3218 * Copy each region from the possibly compacted offset to the
3219 * non-compacted offset.
3221 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3223 u64 feature
= valid
& -valid
;
3224 int index
= fls64(feature
) - 1;
3225 void *src
= get_xsave_addr(xsave
, feature
);
3228 u32 size
, offset
, ecx
, edx
;
3229 cpuid_count(XSTATE_CPUID
, index
,
3230 &size
, &offset
, &ecx
, &edx
);
3231 memcpy(dest
+ offset
, src
, size
);
3238 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3240 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3241 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3245 * Copy legacy XSAVE area, to avoid complications with CPUID
3246 * leaves 0 and 1 in the loop below.
3248 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3250 /* Set XSTATE_BV and possibly XCOMP_BV. */
3251 xsave
->header
.xfeatures
= xstate_bv
;
3252 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3253 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3256 * Copy each region from the non-compacted offset to the
3257 * possibly compacted offset.
3259 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3261 u64 feature
= valid
& -valid
;
3262 int index
= fls64(feature
) - 1;
3263 void *dest
= get_xsave_addr(xsave
, feature
);
3266 u32 size
, offset
, ecx
, edx
;
3267 cpuid_count(XSTATE_CPUID
, index
,
3268 &size
, &offset
, &ecx
, &edx
);
3269 memcpy(dest
, src
+ offset
, size
);
3276 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3277 struct kvm_xsave
*guest_xsave
)
3279 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3280 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3281 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3283 memcpy(guest_xsave
->region
,
3284 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3285 sizeof(struct fxregs_state
));
3286 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3287 XFEATURE_MASK_FPSSE
;
3291 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3292 struct kvm_xsave
*guest_xsave
)
3295 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3297 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3299 * Here we allow setting states that are not present in
3300 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3301 * with old userspace.
3303 if (xstate_bv
& ~kvm_supported_xcr0())
3305 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3307 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
)
3309 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3310 guest_xsave
->region
, sizeof(struct fxregs_state
));
3315 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3316 struct kvm_xcrs
*guest_xcrs
)
3318 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3319 guest_xcrs
->nr_xcrs
= 0;
3323 guest_xcrs
->nr_xcrs
= 1;
3324 guest_xcrs
->flags
= 0;
3325 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3326 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3329 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3330 struct kvm_xcrs
*guest_xcrs
)
3334 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3337 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3340 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3341 /* Only support XCR0 currently */
3342 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3343 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3344 guest_xcrs
->xcrs
[i
].value
);
3353 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3354 * stopped by the hypervisor. This function will be called from the host only.
3355 * EINVAL is returned when the host attempts to set the flag for a guest that
3356 * does not support pv clocks.
3358 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3360 if (!vcpu
->arch
.pv_time_enabled
)
3362 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3363 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3367 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3368 struct kvm_enable_cap
*cap
)
3374 case KVM_CAP_HYPERV_SYNIC
:
3375 if (!irqchip_in_kernel(vcpu
->kvm
))
3377 return kvm_hv_activate_synic(vcpu
);
3383 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3384 unsigned int ioctl
, unsigned long arg
)
3386 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3387 void __user
*argp
= (void __user
*)arg
;
3390 struct kvm_lapic_state
*lapic
;
3391 struct kvm_xsave
*xsave
;
3392 struct kvm_xcrs
*xcrs
;
3398 case KVM_GET_LAPIC
: {
3400 if (!lapic_in_kernel(vcpu
))
3402 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3407 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3411 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3416 case KVM_SET_LAPIC
: {
3418 if (!lapic_in_kernel(vcpu
))
3420 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3421 if (IS_ERR(u
.lapic
))
3422 return PTR_ERR(u
.lapic
);
3424 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3427 case KVM_INTERRUPT
: {
3428 struct kvm_interrupt irq
;
3431 if (copy_from_user(&irq
, argp
, sizeof irq
))
3433 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3437 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3441 r
= kvm_vcpu_ioctl_smi(vcpu
);
3444 case KVM_SET_CPUID
: {
3445 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3446 struct kvm_cpuid cpuid
;
3449 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3451 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3454 case KVM_SET_CPUID2
: {
3455 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3456 struct kvm_cpuid2 cpuid
;
3459 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3461 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3462 cpuid_arg
->entries
);
3465 case KVM_GET_CPUID2
: {
3466 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3467 struct kvm_cpuid2 cpuid
;
3470 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3472 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3473 cpuid_arg
->entries
);
3477 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3483 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3486 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3488 case KVM_TPR_ACCESS_REPORTING
: {
3489 struct kvm_tpr_access_ctl tac
;
3492 if (copy_from_user(&tac
, argp
, sizeof tac
))
3494 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3498 if (copy_to_user(argp
, &tac
, sizeof tac
))
3503 case KVM_SET_VAPIC_ADDR
: {
3504 struct kvm_vapic_addr va
;
3508 if (!lapic_in_kernel(vcpu
))
3511 if (copy_from_user(&va
, argp
, sizeof va
))
3513 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3514 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3515 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3518 case KVM_X86_SETUP_MCE
: {
3522 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3524 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3527 case KVM_X86_SET_MCE
: {
3528 struct kvm_x86_mce mce
;
3531 if (copy_from_user(&mce
, argp
, sizeof mce
))
3533 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3536 case KVM_GET_VCPU_EVENTS
: {
3537 struct kvm_vcpu_events events
;
3539 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3542 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3547 case KVM_SET_VCPU_EVENTS
: {
3548 struct kvm_vcpu_events events
;
3551 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3554 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3557 case KVM_GET_DEBUGREGS
: {
3558 struct kvm_debugregs dbgregs
;
3560 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3563 if (copy_to_user(argp
, &dbgregs
,
3564 sizeof(struct kvm_debugregs
)))
3569 case KVM_SET_DEBUGREGS
: {
3570 struct kvm_debugregs dbgregs
;
3573 if (copy_from_user(&dbgregs
, argp
,
3574 sizeof(struct kvm_debugregs
)))
3577 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3580 case KVM_GET_XSAVE
: {
3581 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3586 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3589 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3594 case KVM_SET_XSAVE
: {
3595 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3596 if (IS_ERR(u
.xsave
))
3597 return PTR_ERR(u
.xsave
);
3599 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3602 case KVM_GET_XCRS
: {
3603 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3608 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3611 if (copy_to_user(argp
, u
.xcrs
,
3612 sizeof(struct kvm_xcrs
)))
3617 case KVM_SET_XCRS
: {
3618 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3620 return PTR_ERR(u
.xcrs
);
3622 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3625 case KVM_SET_TSC_KHZ
: {
3629 user_tsc_khz
= (u32
)arg
;
3631 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3634 if (user_tsc_khz
== 0)
3635 user_tsc_khz
= tsc_khz
;
3637 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3642 case KVM_GET_TSC_KHZ
: {
3643 r
= vcpu
->arch
.virtual_tsc_khz
;
3646 case KVM_KVMCLOCK_CTRL
: {
3647 r
= kvm_set_guest_paused(vcpu
);
3650 case KVM_ENABLE_CAP
: {
3651 struct kvm_enable_cap cap
;
3654 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3656 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3667 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3669 return VM_FAULT_SIGBUS
;
3672 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3676 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3678 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3682 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3685 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3689 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3690 u32 kvm_nr_mmu_pages
)
3692 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3695 mutex_lock(&kvm
->slots_lock
);
3697 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3698 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3700 mutex_unlock(&kvm
->slots_lock
);
3704 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3706 return kvm
->arch
.n_max_mmu_pages
;
3709 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3711 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3715 switch (chip
->chip_id
) {
3716 case KVM_IRQCHIP_PIC_MASTER
:
3717 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3718 sizeof(struct kvm_pic_state
));
3720 case KVM_IRQCHIP_PIC_SLAVE
:
3721 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3722 sizeof(struct kvm_pic_state
));
3724 case KVM_IRQCHIP_IOAPIC
:
3725 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3734 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3736 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3740 switch (chip
->chip_id
) {
3741 case KVM_IRQCHIP_PIC_MASTER
:
3742 spin_lock(&pic
->lock
);
3743 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3744 sizeof(struct kvm_pic_state
));
3745 spin_unlock(&pic
->lock
);
3747 case KVM_IRQCHIP_PIC_SLAVE
:
3748 spin_lock(&pic
->lock
);
3749 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3750 sizeof(struct kvm_pic_state
));
3751 spin_unlock(&pic
->lock
);
3753 case KVM_IRQCHIP_IOAPIC
:
3754 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3760 kvm_pic_update_irq(pic
);
3764 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3766 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3768 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3770 mutex_lock(&kps
->lock
);
3771 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3772 mutex_unlock(&kps
->lock
);
3776 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3779 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3781 mutex_lock(&pit
->pit_state
.lock
);
3782 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3783 for (i
= 0; i
< 3; i
++)
3784 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3785 mutex_unlock(&pit
->pit_state
.lock
);
3789 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3791 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3792 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3793 sizeof(ps
->channels
));
3794 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3795 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3796 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3800 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3804 u32 prev_legacy
, cur_legacy
;
3805 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3807 mutex_lock(&pit
->pit_state
.lock
);
3808 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3809 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3810 if (!prev_legacy
&& cur_legacy
)
3812 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3813 sizeof(pit
->pit_state
.channels
));
3814 pit
->pit_state
.flags
= ps
->flags
;
3815 for (i
= 0; i
< 3; i
++)
3816 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3818 mutex_unlock(&pit
->pit_state
.lock
);
3822 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3823 struct kvm_reinject_control
*control
)
3825 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3830 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3831 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3832 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3834 mutex_lock(&pit
->pit_state
.lock
);
3835 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3836 mutex_unlock(&pit
->pit_state
.lock
);
3842 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3843 * @kvm: kvm instance
3844 * @log: slot id and address to which we copy the log
3846 * Steps 1-4 below provide general overview of dirty page logging. See
3847 * kvm_get_dirty_log_protect() function description for additional details.
3849 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3850 * always flush the TLB (step 4) even if previous step failed and the dirty
3851 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3852 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3853 * writes will be marked dirty for next log read.
3855 * 1. Take a snapshot of the bit and clear it if needed.
3856 * 2. Write protect the corresponding page.
3857 * 3. Copy the snapshot to the userspace.
3858 * 4. Flush TLB's if needed.
3860 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3862 bool is_dirty
= false;
3865 mutex_lock(&kvm
->slots_lock
);
3868 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3870 if (kvm_x86_ops
->flush_log_dirty
)
3871 kvm_x86_ops
->flush_log_dirty(kvm
);
3873 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3876 * All the TLBs can be flushed out of mmu lock, see the comments in
3877 * kvm_mmu_slot_remove_write_access().
3879 lockdep_assert_held(&kvm
->slots_lock
);
3881 kvm_flush_remote_tlbs(kvm
);
3883 mutex_unlock(&kvm
->slots_lock
);
3887 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3890 if (!irqchip_in_kernel(kvm
))
3893 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3894 irq_event
->irq
, irq_event
->level
,
3899 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3900 struct kvm_enable_cap
*cap
)
3908 case KVM_CAP_DISABLE_QUIRKS
:
3909 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3912 case KVM_CAP_SPLIT_IRQCHIP
: {
3913 mutex_lock(&kvm
->lock
);
3915 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3916 goto split_irqchip_unlock
;
3918 if (irqchip_in_kernel(kvm
))
3919 goto split_irqchip_unlock
;
3920 if (kvm
->created_vcpus
)
3921 goto split_irqchip_unlock
;
3922 r
= kvm_setup_empty_irq_routing(kvm
);
3924 goto split_irqchip_unlock
;
3925 /* Pairs with irqchip_in_kernel. */
3927 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
3928 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3930 split_irqchip_unlock
:
3931 mutex_unlock(&kvm
->lock
);
3934 case KVM_CAP_X2APIC_API
:
3936 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3939 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3940 kvm
->arch
.x2apic_format
= true;
3941 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3942 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3953 long kvm_arch_vm_ioctl(struct file
*filp
,
3954 unsigned int ioctl
, unsigned long arg
)
3956 struct kvm
*kvm
= filp
->private_data
;
3957 void __user
*argp
= (void __user
*)arg
;
3960 * This union makes it completely explicit to gcc-3.x
3961 * that these two variables' stack usage should be
3962 * combined, not added together.
3965 struct kvm_pit_state ps
;
3966 struct kvm_pit_state2 ps2
;
3967 struct kvm_pit_config pit_config
;
3971 case KVM_SET_TSS_ADDR
:
3972 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3974 case KVM_SET_IDENTITY_MAP_ADDR
: {
3978 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3980 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3983 case KVM_SET_NR_MMU_PAGES
:
3984 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3986 case KVM_GET_NR_MMU_PAGES
:
3987 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3989 case KVM_CREATE_IRQCHIP
: {
3990 mutex_lock(&kvm
->lock
);
3993 if (irqchip_in_kernel(kvm
))
3994 goto create_irqchip_unlock
;
3997 if (kvm
->created_vcpus
)
3998 goto create_irqchip_unlock
;
4000 r
= kvm_pic_init(kvm
);
4002 goto create_irqchip_unlock
;
4004 r
= kvm_ioapic_init(kvm
);
4006 kvm_pic_destroy(kvm
);
4007 goto create_irqchip_unlock
;
4010 r
= kvm_setup_default_irq_routing(kvm
);
4012 kvm_ioapic_destroy(kvm
);
4013 kvm_pic_destroy(kvm
);
4014 goto create_irqchip_unlock
;
4016 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4018 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4019 create_irqchip_unlock
:
4020 mutex_unlock(&kvm
->lock
);
4023 case KVM_CREATE_PIT
:
4024 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4026 case KVM_CREATE_PIT2
:
4028 if (copy_from_user(&u
.pit_config
, argp
,
4029 sizeof(struct kvm_pit_config
)))
4032 mutex_lock(&kvm
->lock
);
4035 goto create_pit_unlock
;
4037 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4041 mutex_unlock(&kvm
->lock
);
4043 case KVM_GET_IRQCHIP
: {
4044 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4045 struct kvm_irqchip
*chip
;
4047 chip
= memdup_user(argp
, sizeof(*chip
));
4054 if (!irqchip_kernel(kvm
))
4055 goto get_irqchip_out
;
4056 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4058 goto get_irqchip_out
;
4060 if (copy_to_user(argp
, chip
, sizeof *chip
))
4061 goto get_irqchip_out
;
4067 case KVM_SET_IRQCHIP
: {
4068 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4069 struct kvm_irqchip
*chip
;
4071 chip
= memdup_user(argp
, sizeof(*chip
));
4078 if (!irqchip_kernel(kvm
))
4079 goto set_irqchip_out
;
4080 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4082 goto set_irqchip_out
;
4090 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4093 if (!kvm
->arch
.vpit
)
4095 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4099 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4106 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4109 if (!kvm
->arch
.vpit
)
4111 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4114 case KVM_GET_PIT2
: {
4116 if (!kvm
->arch
.vpit
)
4118 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4122 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4127 case KVM_SET_PIT2
: {
4129 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4132 if (!kvm
->arch
.vpit
)
4134 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4137 case KVM_REINJECT_CONTROL
: {
4138 struct kvm_reinject_control control
;
4140 if (copy_from_user(&control
, argp
, sizeof(control
)))
4142 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4145 case KVM_SET_BOOT_CPU_ID
:
4147 mutex_lock(&kvm
->lock
);
4148 if (kvm
->created_vcpus
)
4151 kvm
->arch
.bsp_vcpu_id
= arg
;
4152 mutex_unlock(&kvm
->lock
);
4154 case KVM_XEN_HVM_CONFIG
: {
4156 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4157 sizeof(struct kvm_xen_hvm_config
)))
4160 if (kvm
->arch
.xen_hvm_config
.flags
)
4165 case KVM_SET_CLOCK
: {
4166 struct kvm_clock_data user_ns
;
4170 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4178 now_ns
= get_kvmclock_ns(kvm
);
4179 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4180 kvm_gen_update_masterclock(kvm
);
4183 case KVM_GET_CLOCK
: {
4184 struct kvm_clock_data user_ns
;
4187 now_ns
= get_kvmclock_ns(kvm
);
4188 user_ns
.clock
= now_ns
;
4189 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4190 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4193 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4198 case KVM_ENABLE_CAP
: {
4199 struct kvm_enable_cap cap
;
4202 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4204 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4214 static void kvm_init_msr_list(void)
4219 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4220 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4224 * Even MSRs that are valid in the host may not be exposed
4225 * to the guests in some cases.
4227 switch (msrs_to_save
[i
]) {
4228 case MSR_IA32_BNDCFGS
:
4229 if (!kvm_x86_ops
->mpx_supported())
4233 if (!kvm_x86_ops
->rdtscp_supported())
4241 msrs_to_save
[j
] = msrs_to_save
[i
];
4244 num_msrs_to_save
= j
;
4246 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4247 switch (emulated_msrs
[i
]) {
4248 case MSR_IA32_SMBASE
:
4249 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4257 emulated_msrs
[j
] = emulated_msrs
[i
];
4260 num_emulated_msrs
= j
;
4263 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4271 if (!(lapic_in_kernel(vcpu
) &&
4272 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4273 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4284 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4291 if (!(lapic_in_kernel(vcpu
) &&
4292 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4294 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4296 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4306 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4307 struct kvm_segment
*var
, int seg
)
4309 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4312 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4313 struct kvm_segment
*var
, int seg
)
4315 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4318 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4319 struct x86_exception
*exception
)
4323 BUG_ON(!mmu_is_nested(vcpu
));
4325 /* NPT walks are always user-walks */
4326 access
|= PFERR_USER_MASK
;
4327 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4332 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4333 struct x86_exception
*exception
)
4335 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4336 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4339 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4340 struct x86_exception
*exception
)
4342 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4343 access
|= PFERR_FETCH_MASK
;
4344 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4347 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4348 struct x86_exception
*exception
)
4350 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4351 access
|= PFERR_WRITE_MASK
;
4352 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4355 /* uses this to access any guest's mapped memory without checking CPL */
4356 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4357 struct x86_exception
*exception
)
4359 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4362 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4363 struct kvm_vcpu
*vcpu
, u32 access
,
4364 struct x86_exception
*exception
)
4367 int r
= X86EMUL_CONTINUE
;
4370 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4372 unsigned offset
= addr
& (PAGE_SIZE
-1);
4373 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4376 if (gpa
== UNMAPPED_GVA
)
4377 return X86EMUL_PROPAGATE_FAULT
;
4378 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4381 r
= X86EMUL_IO_NEEDED
;
4393 /* used for instruction fetching */
4394 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4395 gva_t addr
, void *val
, unsigned int bytes
,
4396 struct x86_exception
*exception
)
4398 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4399 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4403 /* Inline kvm_read_guest_virt_helper for speed. */
4404 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4406 if (unlikely(gpa
== UNMAPPED_GVA
))
4407 return X86EMUL_PROPAGATE_FAULT
;
4409 offset
= addr
& (PAGE_SIZE
-1);
4410 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4411 bytes
= (unsigned)PAGE_SIZE
- offset
;
4412 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4414 if (unlikely(ret
< 0))
4415 return X86EMUL_IO_NEEDED
;
4417 return X86EMUL_CONTINUE
;
4420 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4421 gva_t addr
, void *val
, unsigned int bytes
,
4422 struct x86_exception
*exception
)
4424 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4425 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4427 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4430 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4432 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4433 gva_t addr
, void *val
, unsigned int bytes
,
4434 struct x86_exception
*exception
)
4436 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4437 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4440 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4441 unsigned long addr
, void *val
, unsigned int bytes
)
4443 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4444 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4446 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4449 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4450 gva_t addr
, void *val
,
4452 struct x86_exception
*exception
)
4454 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4456 int r
= X86EMUL_CONTINUE
;
4459 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4462 unsigned offset
= addr
& (PAGE_SIZE
-1);
4463 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4466 if (gpa
== UNMAPPED_GVA
)
4467 return X86EMUL_PROPAGATE_FAULT
;
4468 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4470 r
= X86EMUL_IO_NEEDED
;
4481 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4483 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4484 gpa_t gpa
, bool write
)
4486 /* For APIC access vmexit */
4487 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4490 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4491 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4498 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4499 gpa_t
*gpa
, struct x86_exception
*exception
,
4502 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4503 | (write
? PFERR_WRITE_MASK
: 0);
4506 * currently PKRU is only applied to ept enabled guest so
4507 * there is no pkey in EPT page table for L1 guest or EPT
4508 * shadow page table for L2 guest.
4510 if (vcpu_match_mmio_gva(vcpu
, gva
)
4511 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4512 vcpu
->arch
.access
, 0, access
)) {
4513 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4514 (gva
& (PAGE_SIZE
- 1));
4515 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4519 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4521 if (*gpa
== UNMAPPED_GVA
)
4524 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4527 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4528 const void *val
, int bytes
)
4532 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4535 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4539 struct read_write_emulator_ops
{
4540 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4542 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4543 void *val
, int bytes
);
4544 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4545 int bytes
, void *val
);
4546 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4547 void *val
, int bytes
);
4551 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4553 if (vcpu
->mmio_read_completed
) {
4554 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4555 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4556 vcpu
->mmio_read_completed
= 0;
4563 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4564 void *val
, int bytes
)
4566 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4569 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4570 void *val
, int bytes
)
4572 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4575 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4577 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4578 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4581 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4582 void *val
, int bytes
)
4584 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4585 return X86EMUL_IO_NEEDED
;
4588 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4589 void *val
, int bytes
)
4591 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4593 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4594 return X86EMUL_CONTINUE
;
4597 static const struct read_write_emulator_ops read_emultor
= {
4598 .read_write_prepare
= read_prepare
,
4599 .read_write_emulate
= read_emulate
,
4600 .read_write_mmio
= vcpu_mmio_read
,
4601 .read_write_exit_mmio
= read_exit_mmio
,
4604 static const struct read_write_emulator_ops write_emultor
= {
4605 .read_write_emulate
= write_emulate
,
4606 .read_write_mmio
= write_mmio
,
4607 .read_write_exit_mmio
= write_exit_mmio
,
4611 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4613 struct x86_exception
*exception
,
4614 struct kvm_vcpu
*vcpu
,
4615 const struct read_write_emulator_ops
*ops
)
4619 bool write
= ops
->write
;
4620 struct kvm_mmio_fragment
*frag
;
4621 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4624 * If the exit was due to a NPF we may already have a GPA.
4625 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4626 * Note, this cannot be used on string operations since string
4627 * operation using rep will only have the initial GPA from the NPF
4630 if (vcpu
->arch
.gpa_available
&&
4631 emulator_can_use_gpa(ctxt
) &&
4632 vcpu_is_mmio_gpa(vcpu
, addr
, exception
->address
, write
) &&
4633 (addr
& ~PAGE_MASK
) == (exception
->address
& ~PAGE_MASK
)) {
4634 gpa
= exception
->address
;
4638 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4641 return X86EMUL_PROPAGATE_FAULT
;
4643 /* For APIC access vmexit */
4647 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4648 return X86EMUL_CONTINUE
;
4652 * Is this MMIO handled locally?
4654 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4655 if (handled
== bytes
)
4656 return X86EMUL_CONTINUE
;
4662 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4663 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4667 return X86EMUL_CONTINUE
;
4670 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4672 void *val
, unsigned int bytes
,
4673 struct x86_exception
*exception
,
4674 const struct read_write_emulator_ops
*ops
)
4676 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4680 if (ops
->read_write_prepare
&&
4681 ops
->read_write_prepare(vcpu
, val
, bytes
))
4682 return X86EMUL_CONTINUE
;
4684 vcpu
->mmio_nr_fragments
= 0;
4686 /* Crossing a page boundary? */
4687 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4690 now
= -addr
& ~PAGE_MASK
;
4691 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4694 if (rc
!= X86EMUL_CONTINUE
)
4697 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4703 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4705 if (rc
!= X86EMUL_CONTINUE
)
4708 if (!vcpu
->mmio_nr_fragments
)
4711 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4713 vcpu
->mmio_needed
= 1;
4714 vcpu
->mmio_cur_fragment
= 0;
4716 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4717 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4718 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4719 vcpu
->run
->mmio
.phys_addr
= gpa
;
4721 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4724 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4728 struct x86_exception
*exception
)
4730 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4731 exception
, &read_emultor
);
4734 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4738 struct x86_exception
*exception
)
4740 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4741 exception
, &write_emultor
);
4744 #define CMPXCHG_TYPE(t, ptr, old, new) \
4745 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4747 #ifdef CONFIG_X86_64
4748 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4750 # define CMPXCHG64(ptr, old, new) \
4751 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4754 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4759 struct x86_exception
*exception
)
4761 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4767 /* guests cmpxchg8b have to be emulated atomically */
4768 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4771 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4773 if (gpa
== UNMAPPED_GVA
||
4774 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4777 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4780 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4781 if (is_error_page(page
))
4784 kaddr
= kmap_atomic(page
);
4785 kaddr
+= offset_in_page(gpa
);
4788 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4791 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4794 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4797 exchanged
= CMPXCHG64(kaddr
, old
, new);
4802 kunmap_atomic(kaddr
);
4803 kvm_release_page_dirty(page
);
4806 return X86EMUL_CMPXCHG_FAILED
;
4808 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4809 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4811 return X86EMUL_CONTINUE
;
4814 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4816 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4819 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4821 /* TODO: String I/O for in kernel device */
4824 if (vcpu
->arch
.pio
.in
)
4825 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4826 vcpu
->arch
.pio
.size
, pd
);
4828 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4829 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4834 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4835 unsigned short port
, void *val
,
4836 unsigned int count
, bool in
)
4838 vcpu
->arch
.pio
.port
= port
;
4839 vcpu
->arch
.pio
.in
= in
;
4840 vcpu
->arch
.pio
.count
= count
;
4841 vcpu
->arch
.pio
.size
= size
;
4843 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4844 vcpu
->arch
.pio
.count
= 0;
4848 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4849 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4850 vcpu
->run
->io
.size
= size
;
4851 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4852 vcpu
->run
->io
.count
= count
;
4853 vcpu
->run
->io
.port
= port
;
4858 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4859 int size
, unsigned short port
, void *val
,
4862 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4865 if (vcpu
->arch
.pio
.count
)
4868 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4871 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4872 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4873 vcpu
->arch
.pio
.count
= 0;
4880 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4881 int size
, unsigned short port
,
4882 const void *val
, unsigned int count
)
4884 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4886 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4887 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4888 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4891 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4893 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4896 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4898 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4901 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4903 if (!need_emulate_wbinvd(vcpu
))
4904 return X86EMUL_CONTINUE
;
4906 if (kvm_x86_ops
->has_wbinvd_exit()) {
4907 int cpu
= get_cpu();
4909 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4910 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4911 wbinvd_ipi
, NULL
, 1);
4913 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4916 return X86EMUL_CONTINUE
;
4919 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4921 kvm_emulate_wbinvd_noskip(vcpu
);
4922 return kvm_skip_emulated_instruction(vcpu
);
4924 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4928 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4930 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4933 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4934 unsigned long *dest
)
4936 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4939 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4940 unsigned long value
)
4943 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4946 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4948 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4951 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4953 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4954 unsigned long value
;
4958 value
= kvm_read_cr0(vcpu
);
4961 value
= vcpu
->arch
.cr2
;
4964 value
= kvm_read_cr3(vcpu
);
4967 value
= kvm_read_cr4(vcpu
);
4970 value
= kvm_get_cr8(vcpu
);
4973 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4980 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4982 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4987 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4990 vcpu
->arch
.cr2
= val
;
4993 res
= kvm_set_cr3(vcpu
, val
);
4996 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4999 res
= kvm_set_cr8(vcpu
, val
);
5002 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5009 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5011 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5014 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5016 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5019 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5021 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5024 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5026 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5029 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5031 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5034 static unsigned long emulator_get_cached_segment_base(
5035 struct x86_emulate_ctxt
*ctxt
, int seg
)
5037 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5040 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5041 struct desc_struct
*desc
, u32
*base3
,
5044 struct kvm_segment var
;
5046 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5047 *selector
= var
.selector
;
5050 memset(desc
, 0, sizeof(*desc
));
5056 set_desc_limit(desc
, var
.limit
);
5057 set_desc_base(desc
, (unsigned long)var
.base
);
5058 #ifdef CONFIG_X86_64
5060 *base3
= var
.base
>> 32;
5062 desc
->type
= var
.type
;
5064 desc
->dpl
= var
.dpl
;
5065 desc
->p
= var
.present
;
5066 desc
->avl
= var
.avl
;
5074 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5075 struct desc_struct
*desc
, u32 base3
,
5078 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5079 struct kvm_segment var
;
5081 var
.selector
= selector
;
5082 var
.base
= get_desc_base(desc
);
5083 #ifdef CONFIG_X86_64
5084 var
.base
|= ((u64
)base3
) << 32;
5086 var
.limit
= get_desc_limit(desc
);
5088 var
.limit
= (var
.limit
<< 12) | 0xfff;
5089 var
.type
= desc
->type
;
5090 var
.dpl
= desc
->dpl
;
5095 var
.avl
= desc
->avl
;
5096 var
.present
= desc
->p
;
5097 var
.unusable
= !var
.present
;
5100 kvm_set_segment(vcpu
, &var
, seg
);
5104 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5105 u32 msr_index
, u64
*pdata
)
5107 struct msr_data msr
;
5110 msr
.index
= msr_index
;
5111 msr
.host_initiated
= false;
5112 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5120 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5121 u32 msr_index
, u64 data
)
5123 struct msr_data msr
;
5126 msr
.index
= msr_index
;
5127 msr
.host_initiated
= false;
5128 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5131 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5133 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5135 return vcpu
->arch
.smbase
;
5138 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5140 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5142 vcpu
->arch
.smbase
= smbase
;
5145 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5148 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5151 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5152 u32 pmc
, u64
*pdata
)
5154 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5157 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5159 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5162 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5165 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5168 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5173 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5174 struct x86_instruction_info
*info
,
5175 enum x86_intercept_stage stage
)
5177 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5180 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5181 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5183 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5186 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5188 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5191 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5193 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5196 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5198 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5201 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5203 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5206 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5208 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5211 static const struct x86_emulate_ops emulate_ops
= {
5212 .read_gpr
= emulator_read_gpr
,
5213 .write_gpr
= emulator_write_gpr
,
5214 .read_std
= kvm_read_guest_virt_system
,
5215 .write_std
= kvm_write_guest_virt_system
,
5216 .read_phys
= kvm_read_guest_phys_system
,
5217 .fetch
= kvm_fetch_guest_virt
,
5218 .read_emulated
= emulator_read_emulated
,
5219 .write_emulated
= emulator_write_emulated
,
5220 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5221 .invlpg
= emulator_invlpg
,
5222 .pio_in_emulated
= emulator_pio_in_emulated
,
5223 .pio_out_emulated
= emulator_pio_out_emulated
,
5224 .get_segment
= emulator_get_segment
,
5225 .set_segment
= emulator_set_segment
,
5226 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5227 .get_gdt
= emulator_get_gdt
,
5228 .get_idt
= emulator_get_idt
,
5229 .set_gdt
= emulator_set_gdt
,
5230 .set_idt
= emulator_set_idt
,
5231 .get_cr
= emulator_get_cr
,
5232 .set_cr
= emulator_set_cr
,
5233 .cpl
= emulator_get_cpl
,
5234 .get_dr
= emulator_get_dr
,
5235 .set_dr
= emulator_set_dr
,
5236 .get_smbase
= emulator_get_smbase
,
5237 .set_smbase
= emulator_set_smbase
,
5238 .set_msr
= emulator_set_msr
,
5239 .get_msr
= emulator_get_msr
,
5240 .check_pmc
= emulator_check_pmc
,
5241 .read_pmc
= emulator_read_pmc
,
5242 .halt
= emulator_halt
,
5243 .wbinvd
= emulator_wbinvd
,
5244 .fix_hypercall
= emulator_fix_hypercall
,
5245 .get_fpu
= emulator_get_fpu
,
5246 .put_fpu
= emulator_put_fpu
,
5247 .intercept
= emulator_intercept
,
5248 .get_cpuid
= emulator_get_cpuid
,
5249 .set_nmi_mask
= emulator_set_nmi_mask
,
5250 .get_hflags
= emulator_get_hflags
,
5251 .set_hflags
= emulator_set_hflags
,
5254 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5256 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5258 * an sti; sti; sequence only disable interrupts for the first
5259 * instruction. So, if the last instruction, be it emulated or
5260 * not, left the system with the INT_STI flag enabled, it
5261 * means that the last instruction is an sti. We should not
5262 * leave the flag on in this case. The same goes for mov ss
5264 if (int_shadow
& mask
)
5266 if (unlikely(int_shadow
|| mask
)) {
5267 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5269 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5273 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5275 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5276 if (ctxt
->exception
.vector
== PF_VECTOR
)
5277 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5279 if (ctxt
->exception
.error_code_valid
)
5280 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5281 ctxt
->exception
.error_code
);
5283 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5287 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5289 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5292 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5294 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5295 ctxt
->eip
= kvm_rip_read(vcpu
);
5296 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5297 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5298 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5299 cs_db
? X86EMUL_MODE_PROT32
:
5300 X86EMUL_MODE_PROT16
;
5301 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5302 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5303 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5305 init_decode_cache(ctxt
);
5306 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5309 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5311 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5314 init_emulate_ctxt(vcpu
);
5318 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5319 ret
= emulate_int_real(ctxt
, irq
);
5321 if (ret
!= X86EMUL_CONTINUE
)
5322 return EMULATE_FAIL
;
5324 ctxt
->eip
= ctxt
->_eip
;
5325 kvm_rip_write(vcpu
, ctxt
->eip
);
5326 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5328 if (irq
== NMI_VECTOR
)
5329 vcpu
->arch
.nmi_pending
= 0;
5331 vcpu
->arch
.interrupt
.pending
= false;
5333 return EMULATE_DONE
;
5335 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5337 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5339 int r
= EMULATE_DONE
;
5341 ++vcpu
->stat
.insn_emulation_fail
;
5342 trace_kvm_emulate_insn_failed(vcpu
);
5343 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5344 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5345 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5346 vcpu
->run
->internal
.ndata
= 0;
5349 kvm_queue_exception(vcpu
, UD_VECTOR
);
5354 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5355 bool write_fault_to_shadow_pgtable
,
5361 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5364 if (!vcpu
->arch
.mmu
.direct_map
) {
5366 * Write permission should be allowed since only
5367 * write access need to be emulated.
5369 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5372 * If the mapping is invalid in guest, let cpu retry
5373 * it to generate fault.
5375 if (gpa
== UNMAPPED_GVA
)
5380 * Do not retry the unhandleable instruction if it faults on the
5381 * readonly host memory, otherwise it will goto a infinite loop:
5382 * retry instruction -> write #PF -> emulation fail -> retry
5383 * instruction -> ...
5385 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5388 * If the instruction failed on the error pfn, it can not be fixed,
5389 * report the error to userspace.
5391 if (is_error_noslot_pfn(pfn
))
5394 kvm_release_pfn_clean(pfn
);
5396 /* The instructions are well-emulated on direct mmu. */
5397 if (vcpu
->arch
.mmu
.direct_map
) {
5398 unsigned int indirect_shadow_pages
;
5400 spin_lock(&vcpu
->kvm
->mmu_lock
);
5401 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5402 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5404 if (indirect_shadow_pages
)
5405 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5411 * if emulation was due to access to shadowed page table
5412 * and it failed try to unshadow page and re-enter the
5413 * guest to let CPU execute the instruction.
5415 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5418 * If the access faults on its page table, it can not
5419 * be fixed by unprotecting shadow page and it should
5420 * be reported to userspace.
5422 return !write_fault_to_shadow_pgtable
;
5425 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5426 unsigned long cr2
, int emulation_type
)
5428 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5429 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5431 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5432 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5435 * If the emulation is caused by #PF and it is non-page_table
5436 * writing instruction, it means the VM-EXIT is caused by shadow
5437 * page protected, we can zap the shadow page and retry this
5438 * instruction directly.
5440 * Note: if the guest uses a non-page-table modifying instruction
5441 * on the PDE that points to the instruction, then we will unmap
5442 * the instruction and go to an infinite loop. So, we cache the
5443 * last retried eip and the last fault address, if we meet the eip
5444 * and the address again, we can break out of the potential infinite
5447 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5449 if (!(emulation_type
& EMULTYPE_RETRY
))
5452 if (x86_page_table_writing_insn(ctxt
))
5455 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5458 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5459 vcpu
->arch
.last_retry_addr
= cr2
;
5461 if (!vcpu
->arch
.mmu
.direct_map
)
5462 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5464 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5469 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5470 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5472 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5474 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5475 /* This is a good place to trace that we are exiting SMM. */
5476 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5478 /* Process a latched INIT or SMI, if any. */
5479 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5482 kvm_mmu_reset_context(vcpu
);
5485 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5487 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5489 vcpu
->arch
.hflags
= emul_flags
;
5491 if (changed
& HF_SMM_MASK
)
5492 kvm_smm_changed(vcpu
);
5495 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5504 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5505 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5510 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5512 struct kvm_run
*kvm_run
= vcpu
->run
;
5515 * rflags is the old, "raw" value of the flags. The new value has
5516 * not been saved yet.
5518 * This is correct even for TF set by the guest, because "the
5519 * processor will not generate this exception after the instruction
5520 * that sets the TF flag".
5522 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5523 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5524 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5526 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5527 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5528 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5529 *r
= EMULATE_USER_EXIT
;
5532 * "Certain debug exceptions may clear bit 0-3. The
5533 * remaining contents of the DR6 register are never
5534 * cleared by the processor".
5536 vcpu
->arch
.dr6
&= ~15;
5537 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5538 kvm_queue_exception(vcpu
, DB_VECTOR
);
5543 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5545 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5546 int r
= EMULATE_DONE
;
5548 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5549 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5550 return r
== EMULATE_DONE
;
5552 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5554 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5556 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5557 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5558 struct kvm_run
*kvm_run
= vcpu
->run
;
5559 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5560 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5561 vcpu
->arch
.guest_debug_dr7
,
5565 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5566 kvm_run
->debug
.arch
.pc
= eip
;
5567 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5568 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5569 *r
= EMULATE_USER_EXIT
;
5574 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5575 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5576 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5577 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5582 vcpu
->arch
.dr6
&= ~15;
5583 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5584 kvm_queue_exception(vcpu
, DB_VECTOR
);
5593 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5600 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5601 bool writeback
= true;
5602 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5605 * Clear write_fault_to_shadow_pgtable here to ensure it is
5608 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5609 kvm_clear_exception_queue(vcpu
);
5611 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5612 init_emulate_ctxt(vcpu
);
5615 * We will reenter on the same instruction since
5616 * we do not set complete_userspace_io. This does not
5617 * handle watchpoints yet, those would be handled in
5620 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5623 ctxt
->interruptibility
= 0;
5624 ctxt
->have_exception
= false;
5625 ctxt
->exception
.vector
= -1;
5626 ctxt
->perm_ok
= false;
5628 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5630 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5632 trace_kvm_emulate_insn_start(vcpu
);
5633 ++vcpu
->stat
.insn_emulation
;
5634 if (r
!= EMULATION_OK
) {
5635 if (emulation_type
& EMULTYPE_TRAP_UD
)
5636 return EMULATE_FAIL
;
5637 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5639 return EMULATE_DONE
;
5640 if (emulation_type
& EMULTYPE_SKIP
)
5641 return EMULATE_FAIL
;
5642 return handle_emulation_failure(vcpu
);
5646 if (emulation_type
& EMULTYPE_SKIP
) {
5647 kvm_rip_write(vcpu
, ctxt
->_eip
);
5648 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5649 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5650 return EMULATE_DONE
;
5653 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5654 return EMULATE_DONE
;
5656 /* this is needed for vmware backdoor interface to work since it
5657 changes registers values during IO operation */
5658 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5659 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5660 emulator_invalidate_register_cache(ctxt
);
5664 /* Save the faulting GPA (cr2) in the address field */
5665 ctxt
->exception
.address
= cr2
;
5667 r
= x86_emulate_insn(ctxt
);
5669 if (r
== EMULATION_INTERCEPTED
)
5670 return EMULATE_DONE
;
5672 if (r
== EMULATION_FAILED
) {
5673 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5675 return EMULATE_DONE
;
5677 return handle_emulation_failure(vcpu
);
5680 if (ctxt
->have_exception
) {
5682 if (inject_emulated_exception(vcpu
))
5684 } else if (vcpu
->arch
.pio
.count
) {
5685 if (!vcpu
->arch
.pio
.in
) {
5686 /* FIXME: return into emulator if single-stepping. */
5687 vcpu
->arch
.pio
.count
= 0;
5690 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5692 r
= EMULATE_USER_EXIT
;
5693 } else if (vcpu
->mmio_needed
) {
5694 if (!vcpu
->mmio_is_write
)
5696 r
= EMULATE_USER_EXIT
;
5697 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5698 } else if (r
== EMULATION_RESTART
)
5704 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5705 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5706 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5707 kvm_rip_write(vcpu
, ctxt
->eip
);
5708 if (r
== EMULATE_DONE
)
5709 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5710 if (!ctxt
->have_exception
||
5711 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5712 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5715 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5716 * do nothing, and it will be requested again as soon as
5717 * the shadow expires. But we still need to check here,
5718 * because POPF has no interrupt shadow.
5720 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5721 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5723 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5727 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5729 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5731 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5732 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5733 size
, port
, &val
, 1);
5734 /* do not return to emulator after return from userspace */
5735 vcpu
->arch
.pio
.count
= 0;
5738 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5740 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5744 /* We should only ever be called with arch.pio.count equal to 1 */
5745 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5747 /* For size less than 4 we merge, else we zero extend */
5748 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5752 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5753 * the copy and tracing
5755 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5756 vcpu
->arch
.pio
.port
, &val
, 1);
5757 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5762 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5767 /* For size less than 4 we merge, else we zero extend */
5768 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5770 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5773 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5777 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5781 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5783 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5785 __this_cpu_write(cpu_tsc_khz
, 0);
5789 static void tsc_khz_changed(void *data
)
5791 struct cpufreq_freqs
*freq
= data
;
5792 unsigned long khz
= 0;
5796 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5797 khz
= cpufreq_quick_get(raw_smp_processor_id());
5800 __this_cpu_write(cpu_tsc_khz
, khz
);
5803 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5806 struct cpufreq_freqs
*freq
= data
;
5808 struct kvm_vcpu
*vcpu
;
5809 int i
, send_ipi
= 0;
5812 * We allow guests to temporarily run on slowing clocks,
5813 * provided we notify them after, or to run on accelerating
5814 * clocks, provided we notify them before. Thus time never
5817 * However, we have a problem. We can't atomically update
5818 * the frequency of a given CPU from this function; it is
5819 * merely a notifier, which can be called from any CPU.
5820 * Changing the TSC frequency at arbitrary points in time
5821 * requires a recomputation of local variables related to
5822 * the TSC for each VCPU. We must flag these local variables
5823 * to be updated and be sure the update takes place with the
5824 * new frequency before any guests proceed.
5826 * Unfortunately, the combination of hotplug CPU and frequency
5827 * change creates an intractable locking scenario; the order
5828 * of when these callouts happen is undefined with respect to
5829 * CPU hotplug, and they can race with each other. As such,
5830 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5831 * undefined; you can actually have a CPU frequency change take
5832 * place in between the computation of X and the setting of the
5833 * variable. To protect against this problem, all updates of
5834 * the per_cpu tsc_khz variable are done in an interrupt
5835 * protected IPI, and all callers wishing to update the value
5836 * must wait for a synchronous IPI to complete (which is trivial
5837 * if the caller is on the CPU already). This establishes the
5838 * necessary total order on variable updates.
5840 * Note that because a guest time update may take place
5841 * anytime after the setting of the VCPU's request bit, the
5842 * correct TSC value must be set before the request. However,
5843 * to ensure the update actually makes it to any guest which
5844 * starts running in hardware virtualization between the set
5845 * and the acquisition of the spinlock, we must also ping the
5846 * CPU after setting the request bit.
5850 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5852 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5855 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5857 spin_lock(&kvm_lock
);
5858 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5859 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5860 if (vcpu
->cpu
!= freq
->cpu
)
5862 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5863 if (vcpu
->cpu
!= smp_processor_id())
5867 spin_unlock(&kvm_lock
);
5869 if (freq
->old
< freq
->new && send_ipi
) {
5871 * We upscale the frequency. Must make the guest
5872 * doesn't see old kvmclock values while running with
5873 * the new frequency, otherwise we risk the guest sees
5874 * time go backwards.
5876 * In case we update the frequency for another cpu
5877 * (which might be in guest context) send an interrupt
5878 * to kick the cpu out of guest context. Next time
5879 * guest context is entered kvmclock will be updated,
5880 * so the guest will not see stale values.
5882 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5887 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5888 .notifier_call
= kvmclock_cpufreq_notifier
5891 static int kvmclock_cpu_online(unsigned int cpu
)
5893 tsc_khz_changed(NULL
);
5897 static void kvm_timer_init(void)
5899 max_tsc_khz
= tsc_khz
;
5901 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5902 #ifdef CONFIG_CPU_FREQ
5903 struct cpufreq_policy policy
;
5906 memset(&policy
, 0, sizeof(policy
));
5908 cpufreq_get_policy(&policy
, cpu
);
5909 if (policy
.cpuinfo
.max_freq
)
5910 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5913 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5914 CPUFREQ_TRANSITION_NOTIFIER
);
5916 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5918 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5919 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5922 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5924 int kvm_is_in_guest(void)
5926 return __this_cpu_read(current_vcpu
) != NULL
;
5929 static int kvm_is_user_mode(void)
5933 if (__this_cpu_read(current_vcpu
))
5934 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5936 return user_mode
!= 0;
5939 static unsigned long kvm_get_guest_ip(void)
5941 unsigned long ip
= 0;
5943 if (__this_cpu_read(current_vcpu
))
5944 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5949 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5950 .is_in_guest
= kvm_is_in_guest
,
5951 .is_user_mode
= kvm_is_user_mode
,
5952 .get_guest_ip
= kvm_get_guest_ip
,
5955 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5957 __this_cpu_write(current_vcpu
, vcpu
);
5959 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5961 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5963 __this_cpu_write(current_vcpu
, NULL
);
5965 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5967 static void kvm_set_mmio_spte_mask(void)
5970 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5973 * Set the reserved bits and the present bit of an paging-structure
5974 * entry to generate page fault with PFER.RSV = 1.
5976 /* Mask the reserved physical address bits. */
5977 mask
= rsvd_bits(maxphyaddr
, 51);
5979 /* Set the present bit. */
5982 #ifdef CONFIG_X86_64
5984 * If reserved bit is not supported, clear the present bit to disable
5987 if (maxphyaddr
== 52)
5991 kvm_mmu_set_mmio_spte_mask(mask
);
5994 #ifdef CONFIG_X86_64
5995 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5999 struct kvm_vcpu
*vcpu
;
6002 spin_lock(&kvm_lock
);
6003 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6004 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6005 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6006 atomic_set(&kvm_guest_has_master_clock
, 0);
6007 spin_unlock(&kvm_lock
);
6010 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6013 * Notification about pvclock gtod data update.
6015 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6018 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6019 struct timekeeper
*tk
= priv
;
6021 update_pvclock_gtod(tk
);
6023 /* disable master clock if host does not trust, or does not
6024 * use, TSC clocksource
6026 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6027 atomic_read(&kvm_guest_has_master_clock
) != 0)
6028 queue_work(system_long_wq
, &pvclock_gtod_work
);
6033 static struct notifier_block pvclock_gtod_notifier
= {
6034 .notifier_call
= pvclock_gtod_notify
,
6038 int kvm_arch_init(void *opaque
)
6041 struct kvm_x86_ops
*ops
= opaque
;
6044 printk(KERN_ERR
"kvm: already loaded the other module\n");
6049 if (!ops
->cpu_has_kvm_support()) {
6050 printk(KERN_ERR
"kvm: no hardware support\n");
6054 if (ops
->disabled_by_bios()) {
6055 printk(KERN_ERR
"kvm: disabled by bios\n");
6061 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6063 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6067 r
= kvm_mmu_module_init();
6069 goto out_free_percpu
;
6071 kvm_set_mmio_spte_mask();
6075 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6076 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6077 PT_PRESENT_MASK
, 0);
6080 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6082 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6083 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6086 #ifdef CONFIG_X86_64
6087 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6093 free_percpu(shared_msrs
);
6098 void kvm_arch_exit(void)
6101 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6103 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6104 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6105 CPUFREQ_TRANSITION_NOTIFIER
);
6106 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6107 #ifdef CONFIG_X86_64
6108 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6111 kvm_mmu_module_exit();
6112 free_percpu(shared_msrs
);
6115 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6117 ++vcpu
->stat
.halt_exits
;
6118 if (lapic_in_kernel(vcpu
)) {
6119 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6122 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6126 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6128 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6130 int ret
= kvm_skip_emulated_instruction(vcpu
);
6132 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6133 * KVM_EXIT_DEBUG here.
6135 return kvm_vcpu_halt(vcpu
) && ret
;
6137 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6139 #ifdef CONFIG_X86_64
6140 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6141 unsigned long clock_type
)
6143 struct kvm_clock_pairing clock_pairing
;
6148 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6149 return -KVM_EOPNOTSUPP
;
6151 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6152 return -KVM_EOPNOTSUPP
;
6154 clock_pairing
.sec
= ts
.tv_sec
;
6155 clock_pairing
.nsec
= ts
.tv_nsec
;
6156 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6157 clock_pairing
.flags
= 0;
6160 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6161 sizeof(struct kvm_clock_pairing
)))
6169 * kvm_pv_kick_cpu_op: Kick a vcpu.
6171 * @apicid - apicid of vcpu to be kicked.
6173 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6175 struct kvm_lapic_irq lapic_irq
;
6177 lapic_irq
.shorthand
= 0;
6178 lapic_irq
.dest_mode
= 0;
6179 lapic_irq
.dest_id
= apicid
;
6180 lapic_irq
.msi_redir_hint
= false;
6182 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6183 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6186 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6188 vcpu
->arch
.apicv_active
= false;
6189 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6192 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6194 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6197 r
= kvm_skip_emulated_instruction(vcpu
);
6199 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6200 return kvm_hv_hypercall(vcpu
);
6202 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6203 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6204 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6205 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6206 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6208 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6210 op_64_bit
= is_64_bit_mode(vcpu
);
6219 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6225 case KVM_HC_VAPIC_POLL_IRQ
:
6228 case KVM_HC_KICK_CPU
:
6229 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6232 #ifdef CONFIG_X86_64
6233 case KVM_HC_CLOCK_PAIRING
:
6234 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6244 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6245 ++vcpu
->stat
.hypercalls
;
6248 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6250 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6252 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6253 char instruction
[3];
6254 unsigned long rip
= kvm_rip_read(vcpu
);
6256 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6258 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6262 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6264 return vcpu
->run
->request_interrupt_window
&&
6265 likely(!pic_in_kernel(vcpu
->kvm
));
6268 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6270 struct kvm_run
*kvm_run
= vcpu
->run
;
6272 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6273 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6274 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6275 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6276 kvm_run
->ready_for_interrupt_injection
=
6277 pic_in_kernel(vcpu
->kvm
) ||
6278 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6281 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6285 if (!kvm_x86_ops
->update_cr8_intercept
)
6288 if (!lapic_in_kernel(vcpu
))
6291 if (vcpu
->arch
.apicv_active
)
6294 if (!vcpu
->arch
.apic
->vapic_addr
)
6295 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6302 tpr
= kvm_lapic_get_cr8(vcpu
);
6304 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6307 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6311 /* try to reinject previous events if any */
6312 if (vcpu
->arch
.exception
.pending
) {
6313 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6314 vcpu
->arch
.exception
.has_error_code
,
6315 vcpu
->arch
.exception
.error_code
);
6317 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6318 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6321 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6322 (vcpu
->arch
.dr7
& DR7_GD
)) {
6323 vcpu
->arch
.dr7
&= ~DR7_GD
;
6324 kvm_update_dr7(vcpu
);
6327 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6328 vcpu
->arch
.exception
.has_error_code
,
6329 vcpu
->arch
.exception
.error_code
,
6330 vcpu
->arch
.exception
.reinject
);
6334 if (vcpu
->arch
.nmi_injected
) {
6335 kvm_x86_ops
->set_nmi(vcpu
);
6339 if (vcpu
->arch
.interrupt
.pending
) {
6340 kvm_x86_ops
->set_irq(vcpu
);
6344 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6345 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6350 /* try to inject new event if pending */
6351 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6352 vcpu
->arch
.smi_pending
= false;
6354 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6355 --vcpu
->arch
.nmi_pending
;
6356 vcpu
->arch
.nmi_injected
= true;
6357 kvm_x86_ops
->set_nmi(vcpu
);
6358 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6360 * Because interrupts can be injected asynchronously, we are
6361 * calling check_nested_events again here to avoid a race condition.
6362 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6363 * proposal and current concerns. Perhaps we should be setting
6364 * KVM_REQ_EVENT only on certain events and not unconditionally?
6366 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6367 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6371 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6372 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6374 kvm_x86_ops
->set_irq(vcpu
);
6381 static void process_nmi(struct kvm_vcpu
*vcpu
)
6386 * x86 is limited to one NMI running, and one NMI pending after it.
6387 * If an NMI is already in progress, limit further NMIs to just one.
6388 * Otherwise, allow two (and we'll inject the first one immediately).
6390 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6393 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6394 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6395 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6398 #define put_smstate(type, buf, offset, val) \
6399 *(type *)((buf) + (offset) - 0x7e00) = val
6401 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6404 flags
|= seg
->g
<< 23;
6405 flags
|= seg
->db
<< 22;
6406 flags
|= seg
->l
<< 21;
6407 flags
|= seg
->avl
<< 20;
6408 flags
|= seg
->present
<< 15;
6409 flags
|= seg
->dpl
<< 13;
6410 flags
|= seg
->s
<< 12;
6411 flags
|= seg
->type
<< 8;
6415 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6417 struct kvm_segment seg
;
6420 kvm_get_segment(vcpu
, &seg
, n
);
6421 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6424 offset
= 0x7f84 + n
* 12;
6426 offset
= 0x7f2c + (n
- 3) * 12;
6428 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6429 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6430 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6433 #ifdef CONFIG_X86_64
6434 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6436 struct kvm_segment seg
;
6440 kvm_get_segment(vcpu
, &seg
, n
);
6441 offset
= 0x7e00 + n
* 16;
6443 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6444 put_smstate(u16
, buf
, offset
, seg
.selector
);
6445 put_smstate(u16
, buf
, offset
+ 2, flags
);
6446 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6447 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6451 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6454 struct kvm_segment seg
;
6458 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6459 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6460 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6461 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6463 for (i
= 0; i
< 8; i
++)
6464 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6466 kvm_get_dr(vcpu
, 6, &val
);
6467 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6468 kvm_get_dr(vcpu
, 7, &val
);
6469 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6471 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6472 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6473 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6474 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6475 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6477 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6478 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6479 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6480 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6481 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6483 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6484 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6485 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6487 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6488 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6489 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6491 for (i
= 0; i
< 6; i
++)
6492 enter_smm_save_seg_32(vcpu
, buf
, i
);
6494 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6497 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6498 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6501 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6503 #ifdef CONFIG_X86_64
6505 struct kvm_segment seg
;
6509 for (i
= 0; i
< 16; i
++)
6510 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6512 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6513 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6515 kvm_get_dr(vcpu
, 6, &val
);
6516 put_smstate(u64
, buf
, 0x7f68, val
);
6517 kvm_get_dr(vcpu
, 7, &val
);
6518 put_smstate(u64
, buf
, 0x7f60, val
);
6520 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6521 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6522 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6524 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6527 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6529 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6531 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6532 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6533 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6534 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6535 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6537 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6538 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6539 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6541 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6542 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6543 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6544 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6545 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6547 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6548 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6549 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6551 for (i
= 0; i
< 6; i
++)
6552 enter_smm_save_seg_64(vcpu
, buf
, i
);
6558 static void enter_smm(struct kvm_vcpu
*vcpu
)
6560 struct kvm_segment cs
, ds
;
6565 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6566 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6567 memset(buf
, 0, 512);
6568 if (guest_cpuid_has_longmode(vcpu
))
6569 enter_smm_save_state_64(vcpu
, buf
);
6571 enter_smm_save_state_32(vcpu
, buf
);
6573 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6575 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6576 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6578 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6580 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6581 kvm_rip_write(vcpu
, 0x8000);
6583 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6584 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6585 vcpu
->arch
.cr0
= cr0
;
6587 kvm_x86_ops
->set_cr4(vcpu
, 0);
6589 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6590 dt
.address
= dt
.size
= 0;
6591 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6593 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6595 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6596 cs
.base
= vcpu
->arch
.smbase
;
6601 cs
.limit
= ds
.limit
= 0xffffffff;
6602 cs
.type
= ds
.type
= 0x3;
6603 cs
.dpl
= ds
.dpl
= 0;
6608 cs
.avl
= ds
.avl
= 0;
6609 cs
.present
= ds
.present
= 1;
6610 cs
.unusable
= ds
.unusable
= 0;
6611 cs
.padding
= ds
.padding
= 0;
6613 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6614 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6615 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6616 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6617 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6618 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6620 if (guest_cpuid_has_longmode(vcpu
))
6621 kvm_x86_ops
->set_efer(vcpu
, 0);
6623 kvm_update_cpuid(vcpu
);
6624 kvm_mmu_reset_context(vcpu
);
6627 static void process_smi(struct kvm_vcpu
*vcpu
)
6629 vcpu
->arch
.smi_pending
= true;
6630 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6633 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6635 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6638 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6640 u64 eoi_exit_bitmap
[4];
6642 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6645 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6647 if (irqchip_split(vcpu
->kvm
))
6648 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6650 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6651 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6652 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6654 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6655 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6656 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6659 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6661 ++vcpu
->stat
.tlb_flush
;
6662 kvm_x86_ops
->tlb_flush(vcpu
);
6665 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6667 struct page
*page
= NULL
;
6669 if (!lapic_in_kernel(vcpu
))
6672 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6675 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6676 if (is_error_page(page
))
6678 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6681 * Do not pin apic access page in memory, the MMU notifier
6682 * will call us again if it is migrated or swapped out.
6686 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6688 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6689 unsigned long address
)
6692 * The physical address of apic access page is stored in the VMCS.
6693 * Update it when it becomes invalid.
6695 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6696 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6700 * Returns 1 to let vcpu_run() continue the guest execution loop without
6701 * exiting to the userspace. Otherwise, the value will be returned to the
6704 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6708 dm_request_for_irq_injection(vcpu
) &&
6709 kvm_cpu_accept_dm_intr(vcpu
);
6711 bool req_immediate_exit
= false;
6713 if (vcpu
->requests
) {
6714 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6715 kvm_mmu_unload(vcpu
);
6716 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6717 __kvm_migrate_timers(vcpu
);
6718 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6719 kvm_gen_update_masterclock(vcpu
->kvm
);
6720 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6721 kvm_gen_kvmclock_update(vcpu
);
6722 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6723 r
= kvm_guest_time_update(vcpu
);
6727 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6728 kvm_mmu_sync_roots(vcpu
);
6729 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6730 kvm_vcpu_flush_tlb(vcpu
);
6731 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6732 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6736 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6737 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6741 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6742 /* Page is swapped out. Do synthetic halt */
6743 vcpu
->arch
.apf
.halted
= true;
6747 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6748 record_steal_time(vcpu
);
6749 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6751 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6753 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6754 kvm_pmu_handle_event(vcpu
);
6755 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6756 kvm_pmu_deliver_pmi(vcpu
);
6757 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6758 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6759 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6760 vcpu
->arch
.ioapic_handled_vectors
)) {
6761 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6762 vcpu
->run
->eoi
.vector
=
6763 vcpu
->arch
.pending_ioapic_eoi
;
6768 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6769 vcpu_scan_ioapic(vcpu
);
6770 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6771 kvm_vcpu_reload_apic_access_page(vcpu
);
6772 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6773 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6774 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6778 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6779 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6780 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6784 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6785 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6786 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6792 * KVM_REQ_HV_STIMER has to be processed after
6793 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6794 * depend on the guest clock being up-to-date
6796 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6797 kvm_hv_process_stimers(vcpu
);
6800 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6801 ++vcpu
->stat
.req_event
;
6802 kvm_apic_accept_events(vcpu
);
6803 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6808 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6809 req_immediate_exit
= true;
6811 /* Enable NMI/IRQ window open exits if needed.
6813 * SMIs have two cases: 1) they can be nested, and
6814 * then there is nothing to do here because RSM will
6815 * cause a vmexit anyway; 2) or the SMI can be pending
6816 * because inject_pending_event has completed the
6817 * injection of an IRQ or NMI from the previous vmexit,
6818 * and then we request an immediate exit to inject the SMI.
6820 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6821 req_immediate_exit
= true;
6822 if (vcpu
->arch
.nmi_pending
)
6823 kvm_x86_ops
->enable_nmi_window(vcpu
);
6824 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6825 kvm_x86_ops
->enable_irq_window(vcpu
);
6828 if (kvm_lapic_enabled(vcpu
)) {
6829 update_cr8_intercept(vcpu
);
6830 kvm_lapic_sync_to_vapic(vcpu
);
6834 r
= kvm_mmu_reload(vcpu
);
6836 goto cancel_injection
;
6841 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6842 kvm_load_guest_fpu(vcpu
);
6845 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6846 * IPI are then delayed after guest entry, which ensures that they
6847 * result in virtual interrupt delivery.
6849 local_irq_disable();
6850 vcpu
->mode
= IN_GUEST_MODE
;
6852 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6855 * 1) We should set ->mode before checking ->requests. Please see
6856 * the comment in kvm_vcpu_exiting_guest_mode().
6858 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6859 * pairs with the memory barrier implicit in pi_test_and_set_on
6860 * (see vmx_deliver_posted_interrupt).
6862 * 3) This also orders the write to mode from any reads to the page
6863 * tables done while the VCPU is running. Please see the comment
6864 * in kvm_flush_remote_tlbs.
6866 smp_mb__after_srcu_read_unlock();
6869 * This handles the case where a posted interrupt was
6870 * notified with kvm_vcpu_kick.
6872 if (kvm_lapic_enabled(vcpu
)) {
6873 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6874 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6877 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6878 || need_resched() || signal_pending(current
)) {
6879 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6883 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6885 goto cancel_injection
;
6888 kvm_load_guest_xcr0(vcpu
);
6890 if (req_immediate_exit
) {
6891 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6892 smp_send_reschedule(vcpu
->cpu
);
6895 trace_kvm_entry(vcpu
->vcpu_id
);
6896 wait_lapic_expire(vcpu
);
6897 guest_enter_irqoff();
6899 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6901 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6902 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6903 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6904 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6905 set_debugreg(vcpu
->arch
.dr6
, 6);
6906 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6909 kvm_x86_ops
->run(vcpu
);
6912 * Do this here before restoring debug registers on the host. And
6913 * since we do this before handling the vmexit, a DR access vmexit
6914 * can (a) read the correct value of the debug registers, (b) set
6915 * KVM_DEBUGREG_WONT_EXIT again.
6917 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6918 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6919 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6920 kvm_update_dr0123(vcpu
);
6921 kvm_update_dr6(vcpu
);
6922 kvm_update_dr7(vcpu
);
6923 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6927 * If the guest has used debug registers, at least dr7
6928 * will be disabled while returning to the host.
6929 * If we don't have active breakpoints in the host, we don't
6930 * care about the messed up debug address registers. But if
6931 * we have some of them active, restore the old state.
6933 if (hw_breakpoint_active())
6934 hw_breakpoint_restore();
6936 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6938 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6941 kvm_put_guest_xcr0(vcpu
);
6943 kvm_x86_ops
->handle_external_intr(vcpu
);
6947 guest_exit_irqoff();
6952 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6955 * Profile KVM exit RIPs:
6957 if (unlikely(prof_on
== KVM_PROFILING
)) {
6958 unsigned long rip
= kvm_rip_read(vcpu
);
6959 profile_hit(KVM_PROFILING
, (void *)rip
);
6962 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6963 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6965 if (vcpu
->arch
.apic_attention
)
6966 kvm_lapic_sync_from_vapic(vcpu
);
6968 r
= kvm_x86_ops
->handle_exit(vcpu
);
6972 kvm_x86_ops
->cancel_injection(vcpu
);
6973 if (unlikely(vcpu
->arch
.apic_attention
))
6974 kvm_lapic_sync_from_vapic(vcpu
);
6979 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6981 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6982 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6983 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6984 kvm_vcpu_block(vcpu
);
6985 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6987 if (kvm_x86_ops
->post_block
)
6988 kvm_x86_ops
->post_block(vcpu
);
6990 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6994 kvm_apic_accept_events(vcpu
);
6995 switch(vcpu
->arch
.mp_state
) {
6996 case KVM_MP_STATE_HALTED
:
6997 vcpu
->arch
.pv
.pv_unhalted
= false;
6998 vcpu
->arch
.mp_state
=
6999 KVM_MP_STATE_RUNNABLE
;
7000 case KVM_MP_STATE_RUNNABLE
:
7001 vcpu
->arch
.apf
.halted
= false;
7003 case KVM_MP_STATE_INIT_RECEIVED
:
7012 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7014 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7015 kvm_x86_ops
->check_nested_events(vcpu
, false);
7017 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7018 !vcpu
->arch
.apf
.halted
);
7021 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7024 struct kvm
*kvm
= vcpu
->kvm
;
7026 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7029 if (kvm_vcpu_running(vcpu
)) {
7030 r
= vcpu_enter_guest(vcpu
);
7032 r
= vcpu_block(kvm
, vcpu
);
7038 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7039 if (kvm_cpu_has_pending_timer(vcpu
))
7040 kvm_inject_pending_timer_irqs(vcpu
);
7042 if (dm_request_for_irq_injection(vcpu
) &&
7043 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7045 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7046 ++vcpu
->stat
.request_irq_exits
;
7050 kvm_check_async_pf_completion(vcpu
);
7052 if (signal_pending(current
)) {
7054 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7055 ++vcpu
->stat
.signal_exits
;
7058 if (need_resched()) {
7059 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7061 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7065 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7070 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7073 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7074 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7075 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7076 if (r
!= EMULATE_DONE
)
7081 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7083 BUG_ON(!vcpu
->arch
.pio
.count
);
7085 return complete_emulated_io(vcpu
);
7089 * Implements the following, as a state machine:
7093 * for each mmio piece in the fragment
7101 * for each mmio piece in the fragment
7106 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7108 struct kvm_run
*run
= vcpu
->run
;
7109 struct kvm_mmio_fragment
*frag
;
7112 BUG_ON(!vcpu
->mmio_needed
);
7114 /* Complete previous fragment */
7115 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7116 len
= min(8u, frag
->len
);
7117 if (!vcpu
->mmio_is_write
)
7118 memcpy(frag
->data
, run
->mmio
.data
, len
);
7120 if (frag
->len
<= 8) {
7121 /* Switch to the next fragment. */
7123 vcpu
->mmio_cur_fragment
++;
7125 /* Go forward to the next mmio piece. */
7131 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7132 vcpu
->mmio_needed
= 0;
7134 /* FIXME: return into emulator if single-stepping. */
7135 if (vcpu
->mmio_is_write
)
7137 vcpu
->mmio_read_completed
= 1;
7138 return complete_emulated_io(vcpu
);
7141 run
->exit_reason
= KVM_EXIT_MMIO
;
7142 run
->mmio
.phys_addr
= frag
->gpa
;
7143 if (vcpu
->mmio_is_write
)
7144 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7145 run
->mmio
.len
= min(8u, frag
->len
);
7146 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7147 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7152 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7154 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7158 fpu__activate_curr(fpu
);
7160 if (vcpu
->sigset_active
)
7161 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7163 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7164 kvm_vcpu_block(vcpu
);
7165 kvm_apic_accept_events(vcpu
);
7166 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7171 /* re-sync apic's tpr */
7172 if (!lapic_in_kernel(vcpu
)) {
7173 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7179 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7180 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7181 vcpu
->arch
.complete_userspace_io
= NULL
;
7186 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7188 if (kvm_run
->immediate_exit
)
7194 post_kvm_run_save(vcpu
);
7195 if (vcpu
->sigset_active
)
7196 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7201 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7203 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7205 * We are here if userspace calls get_regs() in the middle of
7206 * instruction emulation. Registers state needs to be copied
7207 * back from emulation context to vcpu. Userspace shouldn't do
7208 * that usually, but some bad designed PV devices (vmware
7209 * backdoor interface) need this to work
7211 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7212 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7214 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7215 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7216 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7217 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7218 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7219 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7220 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7221 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7222 #ifdef CONFIG_X86_64
7223 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7224 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7225 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7226 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7227 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7228 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7229 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7230 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7233 regs
->rip
= kvm_rip_read(vcpu
);
7234 regs
->rflags
= kvm_get_rflags(vcpu
);
7239 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7241 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7242 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7244 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7245 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7246 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7247 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7248 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7249 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7250 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7251 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7252 #ifdef CONFIG_X86_64
7253 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7254 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7255 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7256 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7257 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7258 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7259 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7260 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7263 kvm_rip_write(vcpu
, regs
->rip
);
7264 kvm_set_rflags(vcpu
, regs
->rflags
);
7266 vcpu
->arch
.exception
.pending
= false;
7268 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7273 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7275 struct kvm_segment cs
;
7277 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7281 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7283 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7284 struct kvm_sregs
*sregs
)
7288 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7289 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7290 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7291 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7292 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7293 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7295 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7296 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7298 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7299 sregs
->idt
.limit
= dt
.size
;
7300 sregs
->idt
.base
= dt
.address
;
7301 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7302 sregs
->gdt
.limit
= dt
.size
;
7303 sregs
->gdt
.base
= dt
.address
;
7305 sregs
->cr0
= kvm_read_cr0(vcpu
);
7306 sregs
->cr2
= vcpu
->arch
.cr2
;
7307 sregs
->cr3
= kvm_read_cr3(vcpu
);
7308 sregs
->cr4
= kvm_read_cr4(vcpu
);
7309 sregs
->cr8
= kvm_get_cr8(vcpu
);
7310 sregs
->efer
= vcpu
->arch
.efer
;
7311 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7313 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7315 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7316 set_bit(vcpu
->arch
.interrupt
.nr
,
7317 (unsigned long *)sregs
->interrupt_bitmap
);
7322 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7323 struct kvm_mp_state
*mp_state
)
7325 kvm_apic_accept_events(vcpu
);
7326 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7327 vcpu
->arch
.pv
.pv_unhalted
)
7328 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7330 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7335 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7336 struct kvm_mp_state
*mp_state
)
7338 if (!lapic_in_kernel(vcpu
) &&
7339 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7342 /* INITs are latched while in SMM */
7343 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7344 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7345 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7348 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7349 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7350 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7352 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7353 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7357 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7358 int reason
, bool has_error_code
, u32 error_code
)
7360 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7363 init_emulate_ctxt(vcpu
);
7365 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7366 has_error_code
, error_code
);
7369 return EMULATE_FAIL
;
7371 kvm_rip_write(vcpu
, ctxt
->eip
);
7372 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7373 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7374 return EMULATE_DONE
;
7376 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7378 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7379 struct kvm_sregs
*sregs
)
7381 struct msr_data apic_base_msr
;
7382 int mmu_reset_needed
= 0;
7383 int pending_vec
, max_bits
, idx
;
7386 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7389 dt
.size
= sregs
->idt
.limit
;
7390 dt
.address
= sregs
->idt
.base
;
7391 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7392 dt
.size
= sregs
->gdt
.limit
;
7393 dt
.address
= sregs
->gdt
.base
;
7394 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7396 vcpu
->arch
.cr2
= sregs
->cr2
;
7397 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7398 vcpu
->arch
.cr3
= sregs
->cr3
;
7399 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7401 kvm_set_cr8(vcpu
, sregs
->cr8
);
7403 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7404 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7405 apic_base_msr
.data
= sregs
->apic_base
;
7406 apic_base_msr
.host_initiated
= true;
7407 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7409 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7410 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7411 vcpu
->arch
.cr0
= sregs
->cr0
;
7413 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7414 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7415 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7416 kvm_update_cpuid(vcpu
);
7418 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7419 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7420 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7421 mmu_reset_needed
= 1;
7423 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7425 if (mmu_reset_needed
)
7426 kvm_mmu_reset_context(vcpu
);
7428 max_bits
= KVM_NR_INTERRUPTS
;
7429 pending_vec
= find_first_bit(
7430 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7431 if (pending_vec
< max_bits
) {
7432 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7433 pr_debug("Set back pending irq %d\n", pending_vec
);
7436 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7437 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7438 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7439 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7440 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7441 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7443 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7444 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7446 update_cr8_intercept(vcpu
);
7448 /* Older userspace won't unhalt the vcpu on reset. */
7449 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7450 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7452 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7454 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7459 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7460 struct kvm_guest_debug
*dbg
)
7462 unsigned long rflags
;
7465 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7467 if (vcpu
->arch
.exception
.pending
)
7469 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7470 kvm_queue_exception(vcpu
, DB_VECTOR
);
7472 kvm_queue_exception(vcpu
, BP_VECTOR
);
7476 * Read rflags as long as potentially injected trace flags are still
7479 rflags
= kvm_get_rflags(vcpu
);
7481 vcpu
->guest_debug
= dbg
->control
;
7482 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7483 vcpu
->guest_debug
= 0;
7485 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7486 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7487 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7488 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7490 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7491 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7493 kvm_update_dr7(vcpu
);
7495 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7496 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7497 get_segment_base(vcpu
, VCPU_SREG_CS
);
7500 * Trigger an rflags update that will inject or remove the trace
7503 kvm_set_rflags(vcpu
, rflags
);
7505 kvm_x86_ops
->update_bp_intercept(vcpu
);
7515 * Translate a guest virtual address to a guest physical address.
7517 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7518 struct kvm_translation
*tr
)
7520 unsigned long vaddr
= tr
->linear_address
;
7524 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7525 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7526 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7527 tr
->physical_address
= gpa
;
7528 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7535 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7537 struct fxregs_state
*fxsave
=
7538 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7540 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7541 fpu
->fcw
= fxsave
->cwd
;
7542 fpu
->fsw
= fxsave
->swd
;
7543 fpu
->ftwx
= fxsave
->twd
;
7544 fpu
->last_opcode
= fxsave
->fop
;
7545 fpu
->last_ip
= fxsave
->rip
;
7546 fpu
->last_dp
= fxsave
->rdp
;
7547 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7552 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7554 struct fxregs_state
*fxsave
=
7555 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7557 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7558 fxsave
->cwd
= fpu
->fcw
;
7559 fxsave
->swd
= fpu
->fsw
;
7560 fxsave
->twd
= fpu
->ftwx
;
7561 fxsave
->fop
= fpu
->last_opcode
;
7562 fxsave
->rip
= fpu
->last_ip
;
7563 fxsave
->rdp
= fpu
->last_dp
;
7564 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7569 static void fx_init(struct kvm_vcpu
*vcpu
)
7571 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7572 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7573 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7574 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7577 * Ensure guest xcr0 is valid for loading
7579 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7581 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7584 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7586 if (vcpu
->guest_fpu_loaded
)
7590 * Restore all possible states in the guest,
7591 * and assume host would use all available bits.
7592 * Guest xcr0 would be loaded later.
7594 vcpu
->guest_fpu_loaded
= 1;
7595 __kernel_fpu_begin();
7596 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7600 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7602 if (!vcpu
->guest_fpu_loaded
)
7605 vcpu
->guest_fpu_loaded
= 0;
7606 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7608 ++vcpu
->stat
.fpu_reload
;
7612 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7614 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7616 kvmclock_reset(vcpu
);
7618 kvm_x86_ops
->vcpu_free(vcpu
);
7619 free_cpumask_var(wbinvd_dirty_mask
);
7622 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7625 struct kvm_vcpu
*vcpu
;
7627 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7628 printk_once(KERN_WARNING
7629 "kvm: SMP vm created on host with unstable TSC; "
7630 "guest TSC will not be reliable\n");
7632 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7637 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7641 kvm_vcpu_mtrr_init(vcpu
);
7642 r
= vcpu_load(vcpu
);
7645 kvm_vcpu_reset(vcpu
, false);
7646 kvm_mmu_setup(vcpu
);
7651 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7653 struct msr_data msr
;
7654 struct kvm
*kvm
= vcpu
->kvm
;
7656 if (vcpu_load(vcpu
))
7659 msr
.index
= MSR_IA32_TSC
;
7660 msr
.host_initiated
= true;
7661 kvm_write_tsc(vcpu
, &msr
);
7664 if (!kvmclock_periodic_sync
)
7667 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7668 KVMCLOCK_SYNC_PERIOD
);
7671 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7674 vcpu
->arch
.apf
.msr_val
= 0;
7676 r
= vcpu_load(vcpu
);
7678 kvm_mmu_unload(vcpu
);
7681 kvm_x86_ops
->vcpu_free(vcpu
);
7684 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7686 vcpu
->arch
.hflags
= 0;
7688 vcpu
->arch
.smi_pending
= 0;
7689 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7690 vcpu
->arch
.nmi_pending
= 0;
7691 vcpu
->arch
.nmi_injected
= false;
7692 kvm_clear_interrupt_queue(vcpu
);
7693 kvm_clear_exception_queue(vcpu
);
7695 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7696 kvm_update_dr0123(vcpu
);
7697 vcpu
->arch
.dr6
= DR6_INIT
;
7698 kvm_update_dr6(vcpu
);
7699 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7700 kvm_update_dr7(vcpu
);
7704 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7705 vcpu
->arch
.apf
.msr_val
= 0;
7706 vcpu
->arch
.st
.msr_val
= 0;
7708 kvmclock_reset(vcpu
);
7710 kvm_clear_async_pf_completion_queue(vcpu
);
7711 kvm_async_pf_hash_reset(vcpu
);
7712 vcpu
->arch
.apf
.halted
= false;
7715 kvm_pmu_reset(vcpu
);
7716 vcpu
->arch
.smbase
= 0x30000;
7718 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7719 vcpu
->arch
.msr_misc_features_enables
= 0;
7722 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7723 vcpu
->arch
.regs_avail
= ~0;
7724 vcpu
->arch
.regs_dirty
= ~0;
7726 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7729 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7731 struct kvm_segment cs
;
7733 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7734 cs
.selector
= vector
<< 8;
7735 cs
.base
= vector
<< 12;
7736 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7737 kvm_rip_write(vcpu
, 0);
7740 int kvm_arch_hardware_enable(void)
7743 struct kvm_vcpu
*vcpu
;
7748 bool stable
, backwards_tsc
= false;
7750 kvm_shared_msr_cpu_online();
7751 ret
= kvm_x86_ops
->hardware_enable();
7755 local_tsc
= rdtsc();
7756 stable
= !check_tsc_unstable();
7757 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7758 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7759 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7760 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7761 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7762 backwards_tsc
= true;
7763 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7764 max_tsc
= vcpu
->arch
.last_host_tsc
;
7770 * Sometimes, even reliable TSCs go backwards. This happens on
7771 * platforms that reset TSC during suspend or hibernate actions, but
7772 * maintain synchronization. We must compensate. Fortunately, we can
7773 * detect that condition here, which happens early in CPU bringup,
7774 * before any KVM threads can be running. Unfortunately, we can't
7775 * bring the TSCs fully up to date with real time, as we aren't yet far
7776 * enough into CPU bringup that we know how much real time has actually
7777 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7778 * variables that haven't been updated yet.
7780 * So we simply find the maximum observed TSC above, then record the
7781 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7782 * the adjustment will be applied. Note that we accumulate
7783 * adjustments, in case multiple suspend cycles happen before some VCPU
7784 * gets a chance to run again. In the event that no KVM threads get a
7785 * chance to run, we will miss the entire elapsed period, as we'll have
7786 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7787 * loose cycle time. This isn't too big a deal, since the loss will be
7788 * uniform across all VCPUs (not to mention the scenario is extremely
7789 * unlikely). It is possible that a second hibernate recovery happens
7790 * much faster than a first, causing the observed TSC here to be
7791 * smaller; this would require additional padding adjustment, which is
7792 * why we set last_host_tsc to the local tsc observed here.
7794 * N.B. - this code below runs only on platforms with reliable TSC,
7795 * as that is the only way backwards_tsc is set above. Also note
7796 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7797 * have the same delta_cyc adjustment applied if backwards_tsc
7798 * is detected. Note further, this adjustment is only done once,
7799 * as we reset last_host_tsc on all VCPUs to stop this from being
7800 * called multiple times (one for each physical CPU bringup).
7802 * Platforms with unreliable TSCs don't have to deal with this, they
7803 * will be compensated by the logic in vcpu_load, which sets the TSC to
7804 * catchup mode. This will catchup all VCPUs to real time, but cannot
7805 * guarantee that they stay in perfect synchronization.
7807 if (backwards_tsc
) {
7808 u64 delta_cyc
= max_tsc
- local_tsc
;
7809 backwards_tsc_observed
= true;
7810 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7811 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7812 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7813 vcpu
->arch
.last_host_tsc
= local_tsc
;
7814 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7818 * We have to disable TSC offset matching.. if you were
7819 * booting a VM while issuing an S4 host suspend....
7820 * you may have some problem. Solving this issue is
7821 * left as an exercise to the reader.
7823 kvm
->arch
.last_tsc_nsec
= 0;
7824 kvm
->arch
.last_tsc_write
= 0;
7831 void kvm_arch_hardware_disable(void)
7833 kvm_x86_ops
->hardware_disable();
7834 drop_user_return_notifiers();
7837 int kvm_arch_hardware_setup(void)
7841 r
= kvm_x86_ops
->hardware_setup();
7845 if (kvm_has_tsc_control
) {
7847 * Make sure the user can only configure tsc_khz values that
7848 * fit into a signed integer.
7849 * A min value is not calculated needed because it will always
7850 * be 1 on all machines.
7852 u64 max
= min(0x7fffffffULL
,
7853 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7854 kvm_max_guest_tsc_khz
= max
;
7856 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7859 kvm_init_msr_list();
7863 void kvm_arch_hardware_unsetup(void)
7865 kvm_x86_ops
->hardware_unsetup();
7868 void kvm_arch_check_processor_compat(void *rtn
)
7870 kvm_x86_ops
->check_processor_compatibility(rtn
);
7873 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7875 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7877 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7879 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7881 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7884 struct static_key kvm_no_apic_vcpu __read_mostly
;
7885 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7887 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7893 BUG_ON(vcpu
->kvm
== NULL
);
7896 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7897 vcpu
->arch
.pv
.pv_unhalted
= false;
7898 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7899 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7900 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7902 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7904 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7909 vcpu
->arch
.pio_data
= page_address(page
);
7911 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7913 r
= kvm_mmu_create(vcpu
);
7915 goto fail_free_pio_data
;
7917 if (irqchip_in_kernel(kvm
)) {
7918 r
= kvm_create_lapic(vcpu
);
7920 goto fail_mmu_destroy
;
7922 static_key_slow_inc(&kvm_no_apic_vcpu
);
7924 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7926 if (!vcpu
->arch
.mce_banks
) {
7928 goto fail_free_lapic
;
7930 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7932 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7934 goto fail_free_mce_banks
;
7939 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7940 vcpu
->arch
.pv_time_enabled
= false;
7942 vcpu
->arch
.guest_supported_xcr0
= 0;
7943 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7945 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7947 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7949 kvm_async_pf_hash_reset(vcpu
);
7952 vcpu
->arch
.pending_external_vector
= -1;
7954 kvm_hv_vcpu_init(vcpu
);
7958 fail_free_mce_banks
:
7959 kfree(vcpu
->arch
.mce_banks
);
7961 kvm_free_lapic(vcpu
);
7963 kvm_mmu_destroy(vcpu
);
7965 free_page((unsigned long)vcpu
->arch
.pio_data
);
7970 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7974 kvm_hv_vcpu_uninit(vcpu
);
7975 kvm_pmu_destroy(vcpu
);
7976 kfree(vcpu
->arch
.mce_banks
);
7977 kvm_free_lapic(vcpu
);
7978 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7979 kvm_mmu_destroy(vcpu
);
7980 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7981 free_page((unsigned long)vcpu
->arch
.pio_data
);
7982 if (!lapic_in_kernel(vcpu
))
7983 static_key_slow_dec(&kvm_no_apic_vcpu
);
7986 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7988 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7991 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7996 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7997 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7998 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7999 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8000 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8002 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8003 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8004 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8005 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8006 &kvm
->arch
.irq_sources_bitmap
);
8008 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8009 mutex_init(&kvm
->arch
.apic_map_lock
);
8010 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8011 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8013 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8014 pvclock_update_vm_gtod_copy(kvm
);
8016 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8017 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8019 kvm_page_track_init(kvm
);
8020 kvm_mmu_init_vm(kvm
);
8022 if (kvm_x86_ops
->vm_init
)
8023 return kvm_x86_ops
->vm_init(kvm
);
8028 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8031 r
= vcpu_load(vcpu
);
8033 kvm_mmu_unload(vcpu
);
8037 static void kvm_free_vcpus(struct kvm
*kvm
)
8040 struct kvm_vcpu
*vcpu
;
8043 * Unpin any mmu pages first.
8045 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8046 kvm_clear_async_pf_completion_queue(vcpu
);
8047 kvm_unload_vcpu_mmu(vcpu
);
8049 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8050 kvm_arch_vcpu_free(vcpu
);
8052 mutex_lock(&kvm
->lock
);
8053 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8054 kvm
->vcpus
[i
] = NULL
;
8056 atomic_set(&kvm
->online_vcpus
, 0);
8057 mutex_unlock(&kvm
->lock
);
8060 void kvm_arch_sync_events(struct kvm
*kvm
)
8062 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8063 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8067 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8071 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8072 struct kvm_memory_slot
*slot
, old
;
8074 /* Called with kvm->slots_lock held. */
8075 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8078 slot
= id_to_memslot(slots
, id
);
8084 * MAP_SHARED to prevent internal slot pages from being moved
8087 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8088 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8089 if (IS_ERR((void *)hva
))
8090 return PTR_ERR((void *)hva
);
8099 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8100 struct kvm_userspace_memory_region m
;
8102 m
.slot
= id
| (i
<< 16);
8104 m
.guest_phys_addr
= gpa
;
8105 m
.userspace_addr
= hva
;
8106 m
.memory_size
= size
;
8107 r
= __kvm_set_memory_region(kvm
, &m
);
8113 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8119 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8121 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8125 mutex_lock(&kvm
->slots_lock
);
8126 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8127 mutex_unlock(&kvm
->slots_lock
);
8131 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8133 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8135 if (current
->mm
== kvm
->mm
) {
8137 * Free memory regions allocated on behalf of userspace,
8138 * unless the the memory map has changed due to process exit
8141 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8142 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8143 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8145 if (kvm_x86_ops
->vm_destroy
)
8146 kvm_x86_ops
->vm_destroy(kvm
);
8147 kvm_pic_destroy(kvm
);
8148 kvm_ioapic_destroy(kvm
);
8149 kvm_free_vcpus(kvm
);
8150 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8151 kvm_mmu_uninit_vm(kvm
);
8152 kvm_page_track_cleanup(kvm
);
8155 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8156 struct kvm_memory_slot
*dont
)
8160 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8161 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8162 kvfree(free
->arch
.rmap
[i
]);
8163 free
->arch
.rmap
[i
] = NULL
;
8168 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8169 dont
->arch
.lpage_info
[i
- 1]) {
8170 kvfree(free
->arch
.lpage_info
[i
- 1]);
8171 free
->arch
.lpage_info
[i
- 1] = NULL
;
8175 kvm_page_track_free_memslot(free
, dont
);
8178 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8179 unsigned long npages
)
8183 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8184 struct kvm_lpage_info
*linfo
;
8189 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8190 slot
->base_gfn
, level
) + 1;
8192 slot
->arch
.rmap
[i
] =
8193 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8194 if (!slot
->arch
.rmap
[i
])
8199 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8203 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8205 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8206 linfo
[0].disallow_lpage
= 1;
8207 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8208 linfo
[lpages
- 1].disallow_lpage
= 1;
8209 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8211 * If the gfn and userspace address are not aligned wrt each
8212 * other, or if explicitly asked to, disable large page
8213 * support for this slot
8215 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8216 !kvm_largepages_enabled()) {
8219 for (j
= 0; j
< lpages
; ++j
)
8220 linfo
[j
].disallow_lpage
= 1;
8224 if (kvm_page_track_create_memslot(slot
, npages
))
8230 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8231 kvfree(slot
->arch
.rmap
[i
]);
8232 slot
->arch
.rmap
[i
] = NULL
;
8236 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8237 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8242 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8245 * memslots->generation has been incremented.
8246 * mmio generation may have reached its maximum value.
8248 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8251 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8252 struct kvm_memory_slot
*memslot
,
8253 const struct kvm_userspace_memory_region
*mem
,
8254 enum kvm_mr_change change
)
8259 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8260 struct kvm_memory_slot
*new)
8262 /* Still write protect RO slot */
8263 if (new->flags
& KVM_MEM_READONLY
) {
8264 kvm_mmu_slot_remove_write_access(kvm
, new);
8269 * Call kvm_x86_ops dirty logging hooks when they are valid.
8271 * kvm_x86_ops->slot_disable_log_dirty is called when:
8273 * - KVM_MR_CREATE with dirty logging is disabled
8274 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8276 * The reason is, in case of PML, we need to set D-bit for any slots
8277 * with dirty logging disabled in order to eliminate unnecessary GPA
8278 * logging in PML buffer (and potential PML buffer full VMEXT). This
8279 * guarantees leaving PML enabled during guest's lifetime won't have
8280 * any additonal overhead from PML when guest is running with dirty
8281 * logging disabled for memory slots.
8283 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8284 * to dirty logging mode.
8286 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8288 * In case of write protect:
8290 * Write protect all pages for dirty logging.
8292 * All the sptes including the large sptes which point to this
8293 * slot are set to readonly. We can not create any new large
8294 * spte on this slot until the end of the logging.
8296 * See the comments in fast_page_fault().
8298 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8299 if (kvm_x86_ops
->slot_enable_log_dirty
)
8300 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8302 kvm_mmu_slot_remove_write_access(kvm
, new);
8304 if (kvm_x86_ops
->slot_disable_log_dirty
)
8305 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8309 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8310 const struct kvm_userspace_memory_region
*mem
,
8311 const struct kvm_memory_slot
*old
,
8312 const struct kvm_memory_slot
*new,
8313 enum kvm_mr_change change
)
8315 int nr_mmu_pages
= 0;
8317 if (!kvm
->arch
.n_requested_mmu_pages
)
8318 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8321 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8324 * Dirty logging tracks sptes in 4k granularity, meaning that large
8325 * sptes have to be split. If live migration is successful, the guest
8326 * in the source machine will be destroyed and large sptes will be
8327 * created in the destination. However, if the guest continues to run
8328 * in the source machine (for example if live migration fails), small
8329 * sptes will remain around and cause bad performance.
8331 * Scan sptes if dirty logging has been stopped, dropping those
8332 * which can be collapsed into a single large-page spte. Later
8333 * page faults will create the large-page sptes.
8335 if ((change
!= KVM_MR_DELETE
) &&
8336 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8337 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8338 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8341 * Set up write protection and/or dirty logging for the new slot.
8343 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8344 * been zapped so no dirty logging staff is needed for old slot. For
8345 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8346 * new and it's also covered when dealing with the new slot.
8348 * FIXME: const-ify all uses of struct kvm_memory_slot.
8350 if (change
!= KVM_MR_DELETE
)
8351 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8354 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8356 kvm_mmu_invalidate_zap_all_pages(kvm
);
8359 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8360 struct kvm_memory_slot
*slot
)
8362 kvm_page_track_flush_slot(kvm
, slot
);
8365 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8367 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8370 if (kvm_apic_has_events(vcpu
))
8373 if (vcpu
->arch
.pv
.pv_unhalted
)
8376 if (atomic_read(&vcpu
->arch
.nmi_queued
))
8379 if (kvm_test_request(KVM_REQ_SMI
, vcpu
))
8382 if (kvm_arch_interrupt_allowed(vcpu
) &&
8383 kvm_cpu_has_interrupt(vcpu
))
8386 if (kvm_hv_has_stimer_pending(vcpu
))
8392 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8394 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8397 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8399 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8402 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8404 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8407 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8409 if (is_64_bit_mode(vcpu
))
8410 return kvm_rip_read(vcpu
);
8411 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8412 kvm_rip_read(vcpu
));
8414 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8416 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8418 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8420 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8422 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8424 unsigned long rflags
;
8426 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8427 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8428 rflags
&= ~X86_EFLAGS_TF
;
8431 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8433 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8435 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8436 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8437 rflags
|= X86_EFLAGS_TF
;
8438 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8441 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8443 __kvm_set_rflags(vcpu
, rflags
);
8444 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8446 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8448 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8452 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8456 r
= kvm_mmu_reload(vcpu
);
8460 if (!vcpu
->arch
.mmu
.direct_map
&&
8461 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8464 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8467 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8469 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8472 static inline u32
kvm_async_pf_next_probe(u32 key
)
8474 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8477 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8479 u32 key
= kvm_async_pf_hash_fn(gfn
);
8481 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8482 key
= kvm_async_pf_next_probe(key
);
8484 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8487 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8490 u32 key
= kvm_async_pf_hash_fn(gfn
);
8492 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8493 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8494 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8495 key
= kvm_async_pf_next_probe(key
);
8500 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8502 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8505 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8509 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8511 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8513 j
= kvm_async_pf_next_probe(j
);
8514 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8516 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8518 * k lies cyclically in ]i,j]
8520 * |....j i.k.| or |.k..j i...|
8522 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8523 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8528 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8531 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8535 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8536 struct kvm_async_pf
*work
)
8538 struct x86_exception fault
;
8540 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8541 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8543 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8544 (vcpu
->arch
.apf
.send_user_only
&&
8545 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8546 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8547 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8548 fault
.vector
= PF_VECTOR
;
8549 fault
.error_code_valid
= true;
8550 fault
.error_code
= 0;
8551 fault
.nested_page_fault
= false;
8552 fault
.address
= work
->arch
.token
;
8553 kvm_inject_page_fault(vcpu
, &fault
);
8557 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8558 struct kvm_async_pf
*work
)
8560 struct x86_exception fault
;
8562 if (work
->wakeup_all
)
8563 work
->arch
.token
= ~0; /* broadcast wakeup */
8565 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8566 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8568 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8569 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8570 fault
.vector
= PF_VECTOR
;
8571 fault
.error_code_valid
= true;
8572 fault
.error_code
= 0;
8573 fault
.nested_page_fault
= false;
8574 fault
.address
= work
->arch
.token
;
8575 kvm_inject_page_fault(vcpu
, &fault
);
8577 vcpu
->arch
.apf
.halted
= false;
8578 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8581 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8583 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8586 return !kvm_event_needs_reinjection(vcpu
) &&
8587 kvm_x86_ops
->interrupt_allowed(vcpu
);
8590 void kvm_arch_start_assignment(struct kvm
*kvm
)
8592 atomic_inc(&kvm
->arch
.assigned_device_count
);
8594 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8596 void kvm_arch_end_assignment(struct kvm
*kvm
)
8598 atomic_dec(&kvm
->arch
.assigned_device_count
);
8600 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8602 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8604 return atomic_read(&kvm
->arch
.assigned_device_count
);
8606 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8608 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8610 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8612 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8614 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8616 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8618 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8620 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8622 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8624 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8626 bool kvm_arch_has_irq_bypass(void)
8628 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8631 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8632 struct irq_bypass_producer
*prod
)
8634 struct kvm_kernel_irqfd
*irqfd
=
8635 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8637 irqfd
->producer
= prod
;
8639 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8640 prod
->irq
, irqfd
->gsi
, 1);
8643 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8644 struct irq_bypass_producer
*prod
)
8647 struct kvm_kernel_irqfd
*irqfd
=
8648 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8650 WARN_ON(irqfd
->producer
!= prod
);
8651 irqfd
->producer
= NULL
;
8654 * When producer of consumer is unregistered, we change back to
8655 * remapped mode, so we can re-use the current implementation
8656 * when the irq is masked/disabled or the consumer side (KVM
8657 * int this case doesn't want to receive the interrupts.
8659 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8661 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8662 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8665 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8666 uint32_t guest_irq
, bool set
)
8668 if (!kvm_x86_ops
->update_pi_irte
)
8671 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8674 bool kvm_vector_hashing_enabled(void)
8676 return vector_hashing
;
8678 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8680 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8681 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8682 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8683 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8684 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8685 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8686 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8687 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8691 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8692 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8693 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8694 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8695 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8696 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8697 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8698 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);