2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
90 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
92 struct kvm_x86_ops
*kvm_x86_ops
;
93 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
95 static bool ignore_msrs
= 0;
96 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
98 unsigned int min_timer_period_us
= 500;
99 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
101 bool kvm_has_tsc_control
;
102 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
103 u32 kvm_max_guest_tsc_khz
;
104 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
106 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
107 static u32 tsc_tolerance_ppm
= 250;
108 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
110 static bool backwards_tsc_observed
= false;
112 #define KVM_NR_SHARED_MSRS 16
114 struct kvm_shared_msrs_global
{
116 u32 msrs
[KVM_NR_SHARED_MSRS
];
119 struct kvm_shared_msrs
{
120 struct user_return_notifier urn
;
122 struct kvm_shared_msr_values
{
125 } values
[KVM_NR_SHARED_MSRS
];
128 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
129 static struct kvm_shared_msrs __percpu
*shared_msrs
;
131 struct kvm_stats_debugfs_item debugfs_entries
[] = {
132 { "pf_fixed", VCPU_STAT(pf_fixed
) },
133 { "pf_guest", VCPU_STAT(pf_guest
) },
134 { "tlb_flush", VCPU_STAT(tlb_flush
) },
135 { "invlpg", VCPU_STAT(invlpg
) },
136 { "exits", VCPU_STAT(exits
) },
137 { "io_exits", VCPU_STAT(io_exits
) },
138 { "mmio_exits", VCPU_STAT(mmio_exits
) },
139 { "signal_exits", VCPU_STAT(signal_exits
) },
140 { "irq_window", VCPU_STAT(irq_window_exits
) },
141 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
142 { "halt_exits", VCPU_STAT(halt_exits
) },
143 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
144 { "hypercalls", VCPU_STAT(hypercalls
) },
145 { "request_irq", VCPU_STAT(request_irq_exits
) },
146 { "irq_exits", VCPU_STAT(irq_exits
) },
147 { "host_state_reload", VCPU_STAT(host_state_reload
) },
148 { "efer_reload", VCPU_STAT(efer_reload
) },
149 { "fpu_reload", VCPU_STAT(fpu_reload
) },
150 { "insn_emulation", VCPU_STAT(insn_emulation
) },
151 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
152 { "irq_injections", VCPU_STAT(irq_injections
) },
153 { "nmi_injections", VCPU_STAT(nmi_injections
) },
154 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
155 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
156 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
157 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
158 { "mmu_flooded", VM_STAT(mmu_flooded
) },
159 { "mmu_recycled", VM_STAT(mmu_recycled
) },
160 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
161 { "mmu_unsync", VM_STAT(mmu_unsync
) },
162 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
163 { "largepages", VM_STAT(lpages
) },
167 u64 __read_mostly host_xcr0
;
169 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
171 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
174 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
175 vcpu
->arch
.apf
.gfns
[i
] = ~0;
178 static void kvm_on_user_return(struct user_return_notifier
*urn
)
181 struct kvm_shared_msrs
*locals
182 = container_of(urn
, struct kvm_shared_msrs
, urn
);
183 struct kvm_shared_msr_values
*values
;
185 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
186 values
= &locals
->values
[slot
];
187 if (values
->host
!= values
->curr
) {
188 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
189 values
->curr
= values
->host
;
192 locals
->registered
= false;
193 user_return_notifier_unregister(urn
);
196 static void shared_msr_update(unsigned slot
, u32 msr
)
199 unsigned int cpu
= smp_processor_id();
200 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
202 /* only read, and nobody should modify it at this time,
203 * so don't need lock */
204 if (slot
>= shared_msrs_global
.nr
) {
205 printk(KERN_ERR
"kvm: invalid MSR slot!");
208 rdmsrl_safe(msr
, &value
);
209 smsr
->values
[slot
].host
= value
;
210 smsr
->values
[slot
].curr
= value
;
213 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
215 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
216 if (slot
>= shared_msrs_global
.nr
)
217 shared_msrs_global
.nr
= slot
+ 1;
218 shared_msrs_global
.msrs
[slot
] = msr
;
219 /* we need ensured the shared_msr_global have been updated */
222 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
224 static void kvm_shared_msr_cpu_online(void)
228 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
229 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
232 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
234 unsigned int cpu
= smp_processor_id();
235 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
237 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
239 smsr
->values
[slot
].curr
= value
;
240 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
241 if (!smsr
->registered
) {
242 smsr
->urn
.on_user_return
= kvm_on_user_return
;
243 user_return_notifier_register(&smsr
->urn
);
244 smsr
->registered
= true;
247 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
249 static void drop_user_return_notifiers(void)
251 unsigned int cpu
= smp_processor_id();
252 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
254 if (smsr
->registered
)
255 kvm_on_user_return(&smsr
->urn
);
258 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
260 return vcpu
->arch
.apic_base
;
262 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
264 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
266 u64 old_state
= vcpu
->arch
.apic_base
&
267 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
268 u64 new_state
= msr_info
->data
&
269 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
270 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
271 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
273 if (!msr_info
->host_initiated
&&
274 ((msr_info
->data
& reserved_bits
) != 0 ||
275 new_state
== X2APIC_ENABLE
||
276 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
277 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
278 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
282 kvm_lapic_set_base(vcpu
, msr_info
->data
);
285 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
287 asmlinkage __visible
void kvm_spurious_fault(void)
289 /* Fault while not rebooting. We want the trace. */
292 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
294 #define EXCPT_BENIGN 0
295 #define EXCPT_CONTRIBUTORY 1
298 static int exception_class(int vector
)
308 return EXCPT_CONTRIBUTORY
;
315 #define EXCPT_FAULT 0
317 #define EXCPT_ABORT 2
318 #define EXCPT_INTERRUPT 3
320 static int exception_type(int vector
)
324 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
325 return EXCPT_INTERRUPT
;
329 /* #DB is trap, as instruction watchpoints are handled elsewhere */
330 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
333 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
336 /* Reserved exceptions will result in fault */
340 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
341 unsigned nr
, bool has_error
, u32 error_code
,
347 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
349 if (!vcpu
->arch
.exception
.pending
) {
351 vcpu
->arch
.exception
.pending
= true;
352 vcpu
->arch
.exception
.has_error_code
= has_error
;
353 vcpu
->arch
.exception
.nr
= nr
;
354 vcpu
->arch
.exception
.error_code
= error_code
;
355 vcpu
->arch
.exception
.reinject
= reinject
;
359 /* to check exception */
360 prev_nr
= vcpu
->arch
.exception
.nr
;
361 if (prev_nr
== DF_VECTOR
) {
362 /* triple fault -> shutdown */
363 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
366 class1
= exception_class(prev_nr
);
367 class2
= exception_class(nr
);
368 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
369 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
370 /* generate double fault per SDM Table 5-5 */
371 vcpu
->arch
.exception
.pending
= true;
372 vcpu
->arch
.exception
.has_error_code
= true;
373 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
374 vcpu
->arch
.exception
.error_code
= 0;
376 /* replace previous exception with a new one in a hope
377 that instruction re-execution will regenerate lost
382 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
384 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
386 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
388 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
390 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
392 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
394 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
397 kvm_inject_gp(vcpu
, 0);
399 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
401 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
403 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
405 ++vcpu
->stat
.pf_guest
;
406 vcpu
->arch
.cr2
= fault
->address
;
407 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
409 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
411 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
413 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
414 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
416 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
418 return fault
->nested_page_fault
;
421 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
423 atomic_inc(&vcpu
->arch
.nmi_queued
);
424 kvm_make_request(KVM_REQ_NMI
, vcpu
);
426 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
428 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
430 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
432 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
434 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
436 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
438 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
441 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
442 * a #GP and return false.
444 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
446 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
448 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
451 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
454 * This function will be used to read from the physical memory of the currently
455 * running guest. The difference to kvm_read_guest_page is that this function
456 * can read from guest physical or from the guest's guest physical memory.
458 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
459 gfn_t ngfn
, void *data
, int offset
, int len
,
462 struct x86_exception exception
;
466 ngpa
= gfn_to_gpa(ngfn
);
467 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
468 if (real_gfn
== UNMAPPED_GVA
)
471 real_gfn
= gpa_to_gfn(real_gfn
);
473 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
475 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
477 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
478 void *data
, int offset
, int len
, u32 access
)
480 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
481 data
, offset
, len
, access
);
485 * Load the pae pdptrs. Return true is they are all valid.
487 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
489 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
490 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
493 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
495 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
496 offset
* sizeof(u64
), sizeof(pdpte
),
497 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
502 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
503 if (is_present_gpte(pdpte
[i
]) &&
504 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
511 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
512 __set_bit(VCPU_EXREG_PDPTR
,
513 (unsigned long *)&vcpu
->arch
.regs_avail
);
514 __set_bit(VCPU_EXREG_PDPTR
,
515 (unsigned long *)&vcpu
->arch
.regs_dirty
);
520 EXPORT_SYMBOL_GPL(load_pdptrs
);
522 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
524 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
530 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
533 if (!test_bit(VCPU_EXREG_PDPTR
,
534 (unsigned long *)&vcpu
->arch
.regs_avail
))
537 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
538 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
539 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
540 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
543 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
549 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
551 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
552 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
553 X86_CR0_CD
| X86_CR0_NW
;
558 if (cr0
& 0xffffffff00000000UL
)
562 cr0
&= ~CR0_RESERVED_BITS
;
564 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
567 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
570 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
572 if ((vcpu
->arch
.efer
& EFER_LME
)) {
577 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
582 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
587 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
590 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
592 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
593 kvm_clear_async_pf_completion_queue(vcpu
);
594 kvm_async_pf_hash_reset(vcpu
);
597 if ((cr0
^ old_cr0
) & update_bits
)
598 kvm_mmu_reset_context(vcpu
);
601 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
603 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
605 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
607 EXPORT_SYMBOL_GPL(kvm_lmsw
);
609 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
611 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
612 !vcpu
->guest_xcr0_loaded
) {
613 /* kvm_set_xcr() also depends on this */
614 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
615 vcpu
->guest_xcr0_loaded
= 1;
619 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
621 if (vcpu
->guest_xcr0_loaded
) {
622 if (vcpu
->arch
.xcr0
!= host_xcr0
)
623 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
624 vcpu
->guest_xcr0_loaded
= 0;
628 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
631 u64 old_xcr0
= vcpu
->arch
.xcr0
;
634 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
635 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
637 if (!(xcr0
& XSTATE_FP
))
639 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
643 * Do not allow the guest to set bits that we do not support
644 * saving. However, xcr0 bit 0 is always set, even if the
645 * emulated CPU does not support XSAVE (see fx_init).
647 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
648 if (xcr0
& ~valid_bits
)
651 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
654 kvm_put_guest_xcr0(vcpu
);
655 vcpu
->arch
.xcr0
= xcr0
;
657 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
658 kvm_update_cpuid(vcpu
);
662 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
664 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
665 __kvm_set_xcr(vcpu
, index
, xcr
)) {
666 kvm_inject_gp(vcpu
, 0);
671 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
673 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
675 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
676 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
677 X86_CR4_PAE
| X86_CR4_SMEP
;
678 if (cr4
& CR4_RESERVED_BITS
)
681 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
684 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
687 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
690 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
693 if (is_long_mode(vcpu
)) {
694 if (!(cr4
& X86_CR4_PAE
))
696 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
697 && ((cr4
^ old_cr4
) & pdptr_bits
)
698 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
702 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
703 if (!guest_cpuid_has_pcid(vcpu
))
706 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
707 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
711 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
714 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
715 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
716 kvm_mmu_reset_context(vcpu
);
718 if ((cr4
^ old_cr4
) & X86_CR4_SMAP
)
719 update_permission_bitmask(vcpu
, vcpu
->arch
.walk_mmu
, false);
721 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
722 kvm_update_cpuid(vcpu
);
726 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
728 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
730 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
731 kvm_mmu_sync_roots(vcpu
);
732 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
736 if (is_long_mode(vcpu
)) {
737 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
739 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
740 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
743 vcpu
->arch
.cr3
= cr3
;
744 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
745 kvm_mmu_new_cr3(vcpu
);
748 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
750 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
752 if (cr8
& CR8_RESERVED_BITS
)
754 if (irqchip_in_kernel(vcpu
->kvm
))
755 kvm_lapic_set_tpr(vcpu
, cr8
);
757 vcpu
->arch
.cr8
= cr8
;
760 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
762 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
764 if (irqchip_in_kernel(vcpu
->kvm
))
765 return kvm_lapic_get_cr8(vcpu
);
767 return vcpu
->arch
.cr8
;
769 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
771 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
773 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
774 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
777 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
781 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
782 dr7
= vcpu
->arch
.guest_debug_dr7
;
784 dr7
= vcpu
->arch
.dr7
;
785 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
786 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
787 if (dr7
& DR7_BP_EN_MASK
)
788 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
791 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
793 u64 fixed
= DR6_FIXED_1
;
795 if (!guest_cpuid_has_rtm(vcpu
))
800 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
804 vcpu
->arch
.db
[dr
] = val
;
805 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
806 vcpu
->arch
.eff_db
[dr
] = val
;
809 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
813 if (val
& 0xffffffff00000000ULL
)
815 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
816 kvm_update_dr6(vcpu
);
819 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
823 if (val
& 0xffffffff00000000ULL
)
825 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
826 kvm_update_dr7(vcpu
);
833 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
837 res
= __kvm_set_dr(vcpu
, dr
, val
);
839 kvm_queue_exception(vcpu
, UD_VECTOR
);
841 kvm_inject_gp(vcpu
, 0);
845 EXPORT_SYMBOL_GPL(kvm_set_dr
);
847 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
851 *val
= vcpu
->arch
.db
[dr
];
854 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
858 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
859 *val
= vcpu
->arch
.dr6
;
861 *val
= kvm_x86_ops
->get_dr6(vcpu
);
864 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
868 *val
= vcpu
->arch
.dr7
;
875 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
877 if (_kvm_get_dr(vcpu
, dr
, val
)) {
878 kvm_queue_exception(vcpu
, UD_VECTOR
);
883 EXPORT_SYMBOL_GPL(kvm_get_dr
);
885 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
887 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
891 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
894 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
895 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
898 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
901 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
902 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
904 * This list is modified at module load time to reflect the
905 * capabilities of the host cpu. This capabilities test skips MSRs that are
906 * kvm-specific. Those are put in the beginning of the list.
909 #define KVM_SAVE_MSRS_BEGIN 12
910 static u32 msrs_to_save
[] = {
911 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
912 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
913 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
914 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
915 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
917 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
920 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
922 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
923 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
926 static unsigned num_msrs_to_save
;
928 static const u32 emulated_msrs
[] = {
930 MSR_IA32_TSCDEADLINE
,
931 MSR_IA32_MISC_ENABLE
,
936 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
938 if (efer
& efer_reserved_bits
)
941 if (efer
& EFER_FFXSR
) {
942 struct kvm_cpuid_entry2
*feat
;
944 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
945 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
949 if (efer
& EFER_SVME
) {
950 struct kvm_cpuid_entry2
*feat
;
952 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
953 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
959 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
961 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
963 u64 old_efer
= vcpu
->arch
.efer
;
965 if (!kvm_valid_efer(vcpu
, efer
))
969 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
973 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
975 kvm_x86_ops
->set_efer(vcpu
, efer
);
977 /* Update reserved bits */
978 if ((efer
^ old_efer
) & EFER_NX
)
979 kvm_mmu_reset_context(vcpu
);
984 void kvm_enable_efer_bits(u64 mask
)
986 efer_reserved_bits
&= ~mask
;
988 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
992 * Writes msr value into into the appropriate "register".
993 * Returns 0 on success, non-0 otherwise.
994 * Assumes vcpu_load() was already called.
996 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
998 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1002 * Adapt set_msr() to msr_io()'s calling convention
1004 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1006 struct msr_data msr
;
1010 msr
.host_initiated
= true;
1011 return kvm_set_msr(vcpu
, &msr
);
1014 #ifdef CONFIG_X86_64
1015 struct pvclock_gtod_data
{
1018 struct { /* extract of a clocksource struct */
1030 static struct pvclock_gtod_data pvclock_gtod_data
;
1032 static void update_pvclock_gtod(struct timekeeper
*tk
)
1034 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1037 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr
.base_mono
, tk
->offs_boot
));
1039 write_seqcount_begin(&vdata
->seq
);
1041 /* copy pvclock gtod data */
1042 vdata
->clock
.vclock_mode
= tk
->tkr
.clock
->archdata
.vclock_mode
;
1043 vdata
->clock
.cycle_last
= tk
->tkr
.cycle_last
;
1044 vdata
->clock
.mask
= tk
->tkr
.mask
;
1045 vdata
->clock
.mult
= tk
->tkr
.mult
;
1046 vdata
->clock
.shift
= tk
->tkr
.shift
;
1048 vdata
->boot_ns
= boot_ns
;
1049 vdata
->nsec_base
= tk
->tkr
.xtime_nsec
;
1051 write_seqcount_end(&vdata
->seq
);
1056 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1060 struct pvclock_wall_clock wc
;
1061 struct timespec boot
;
1066 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1071 ++version
; /* first time write, random junk */
1075 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1078 * The guest calculates current wall clock time by adding
1079 * system time (updated by kvm_guest_time_update below) to the
1080 * wall clock specified here. guest system time equals host
1081 * system time for us, thus we must fill in host boot time here.
1085 if (kvm
->arch
.kvmclock_offset
) {
1086 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1087 boot
= timespec_sub(boot
, ts
);
1089 wc
.sec
= boot
.tv_sec
;
1090 wc
.nsec
= boot
.tv_nsec
;
1091 wc
.version
= version
;
1093 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1096 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1099 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1101 uint32_t quotient
, remainder
;
1103 /* Don't try to replace with do_div(), this one calculates
1104 * "(dividend << 32) / divisor" */
1106 : "=a" (quotient
), "=d" (remainder
)
1107 : "0" (0), "1" (dividend
), "r" (divisor
) );
1111 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1112 s8
*pshift
, u32
*pmultiplier
)
1119 tps64
= base_khz
* 1000LL;
1120 scaled64
= scaled_khz
* 1000LL;
1121 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1126 tps32
= (uint32_t)tps64
;
1127 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1128 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1136 *pmultiplier
= div_frac(scaled64
, tps32
);
1138 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1139 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1142 static inline u64
get_kernel_ns(void)
1144 return ktime_get_boot_ns();
1147 #ifdef CONFIG_X86_64
1148 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1151 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1152 unsigned long max_tsc_khz
;
1154 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1156 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1157 vcpu
->arch
.virtual_tsc_shift
);
1160 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1162 u64 v
= (u64
)khz
* (1000000 + ppm
);
1167 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1169 u32 thresh_lo
, thresh_hi
;
1170 int use_scaling
= 0;
1172 /* tsc_khz can be zero if TSC calibration fails */
1173 if (this_tsc_khz
== 0)
1176 /* Compute a scale to convert nanoseconds in TSC cycles */
1177 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1178 &vcpu
->arch
.virtual_tsc_shift
,
1179 &vcpu
->arch
.virtual_tsc_mult
);
1180 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1183 * Compute the variation in TSC rate which is acceptable
1184 * within the range of tolerance and decide if the
1185 * rate being applied is within that bounds of the hardware
1186 * rate. If so, no scaling or compensation need be done.
1188 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1189 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1190 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1191 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1194 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1197 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1199 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1200 vcpu
->arch
.virtual_tsc_mult
,
1201 vcpu
->arch
.virtual_tsc_shift
);
1202 tsc
+= vcpu
->arch
.this_tsc_write
;
1206 void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1208 #ifdef CONFIG_X86_64
1210 bool do_request
= false;
1211 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1212 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1214 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1215 atomic_read(&vcpu
->kvm
->online_vcpus
));
1217 if (vcpus_matched
&& gtod
->clock
.vclock_mode
== VCLOCK_TSC
)
1218 if (!ka
->use_master_clock
)
1221 if (!vcpus_matched
&& ka
->use_master_clock
)
1225 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1227 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1228 atomic_read(&vcpu
->kvm
->online_vcpus
),
1229 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1233 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1235 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1236 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1239 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1241 struct kvm
*kvm
= vcpu
->kvm
;
1242 u64 offset
, ns
, elapsed
;
1243 unsigned long flags
;
1246 bool already_matched
;
1247 u64 data
= msr
->data
;
1249 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1250 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1251 ns
= get_kernel_ns();
1252 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1254 if (vcpu
->arch
.virtual_tsc_khz
) {
1257 /* n.b - signed multiplication and division required */
1258 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1259 #ifdef CONFIG_X86_64
1260 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1262 /* do_div() only does unsigned */
1263 asm("1: idivl %[divisor]\n"
1264 "2: xor %%edx, %%edx\n"
1265 " movl $0, %[faulted]\n"
1267 ".section .fixup,\"ax\"\n"
1268 "4: movl $1, %[faulted]\n"
1272 _ASM_EXTABLE(1b
, 4b
)
1274 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1275 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1278 do_div(elapsed
, 1000);
1283 /* idivl overflow => difference is larger than USEC_PER_SEC */
1285 usdiff
= USEC_PER_SEC
;
1287 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1290 * Special case: TSC write with a small delta (1 second) of virtual
1291 * cycle time against real time is interpreted as an attempt to
1292 * synchronize the CPU.
1294 * For a reliable TSC, we can match TSC offsets, and for an unstable
1295 * TSC, we add elapsed time in this computation. We could let the
1296 * compensation code attempt to catch up if we fall behind, but
1297 * it's better to try to match offsets from the beginning.
1299 if (usdiff
< USEC_PER_SEC
&&
1300 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1301 if (!check_tsc_unstable()) {
1302 offset
= kvm
->arch
.cur_tsc_offset
;
1303 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1305 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1307 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1308 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1311 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1314 * We split periods of matched TSC writes into generations.
1315 * For each generation, we track the original measured
1316 * nanosecond time, offset, and write, so if TSCs are in
1317 * sync, we can match exact offset, and if not, we can match
1318 * exact software computation in compute_guest_tsc()
1320 * These values are tracked in kvm->arch.cur_xxx variables.
1322 kvm
->arch
.cur_tsc_generation
++;
1323 kvm
->arch
.cur_tsc_nsec
= ns
;
1324 kvm
->arch
.cur_tsc_write
= data
;
1325 kvm
->arch
.cur_tsc_offset
= offset
;
1327 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1328 kvm
->arch
.cur_tsc_generation
, data
);
1332 * We also track th most recent recorded KHZ, write and time to
1333 * allow the matching interval to be extended at each write.
1335 kvm
->arch
.last_tsc_nsec
= ns
;
1336 kvm
->arch
.last_tsc_write
= data
;
1337 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1339 vcpu
->arch
.last_guest_tsc
= data
;
1341 /* Keep track of which generation this VCPU has synchronized to */
1342 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1343 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1344 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1346 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1347 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1348 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1349 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1351 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1353 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1354 } else if (!already_matched
) {
1355 kvm
->arch
.nr_vcpus_matched_tsc
++;
1358 kvm_track_tsc_matching(vcpu
);
1359 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1362 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1364 #ifdef CONFIG_X86_64
1366 static cycle_t
read_tsc(void)
1372 * Empirically, a fence (of type that depends on the CPU)
1373 * before rdtsc is enough to ensure that rdtsc is ordered
1374 * with respect to loads. The various CPU manuals are unclear
1375 * as to whether rdtsc can be reordered with later loads,
1376 * but no one has ever seen it happen.
1379 ret
= (cycle_t
)vget_cycles();
1381 last
= pvclock_gtod_data
.clock
.cycle_last
;
1383 if (likely(ret
>= last
))
1387 * GCC likes to generate cmov here, but this branch is extremely
1388 * predictable (it's just a funciton of time and the likely is
1389 * very likely) and there's a data dependence, so force GCC
1390 * to generate a branch instead. I don't barrier() because
1391 * we don't actually need a barrier, and if this function
1392 * ever gets inlined it will generate worse code.
1398 static inline u64
vgettsc(cycle_t
*cycle_now
)
1401 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1403 *cycle_now
= read_tsc();
1405 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1406 return v
* gtod
->clock
.mult
;
1409 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1411 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1417 seq
= read_seqcount_begin(>od
->seq
);
1418 mode
= gtod
->clock
.vclock_mode
;
1419 ns
= gtod
->nsec_base
;
1420 ns
+= vgettsc(cycle_now
);
1421 ns
>>= gtod
->clock
.shift
;
1422 ns
+= gtod
->boot_ns
;
1423 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1429 /* returns true if host is using tsc clocksource */
1430 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1432 /* checked again under seqlock below */
1433 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1436 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1442 * Assuming a stable TSC across physical CPUS, and a stable TSC
1443 * across virtual CPUs, the following condition is possible.
1444 * Each numbered line represents an event visible to both
1445 * CPUs at the next numbered event.
1447 * "timespecX" represents host monotonic time. "tscX" represents
1450 * VCPU0 on CPU0 | VCPU1 on CPU1
1452 * 1. read timespec0,tsc0
1453 * 2. | timespec1 = timespec0 + N
1455 * 3. transition to guest | transition to guest
1456 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1457 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1458 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1460 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1463 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1465 * - 0 < N - M => M < N
1467 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1468 * always the case (the difference between two distinct xtime instances
1469 * might be smaller then the difference between corresponding TSC reads,
1470 * when updating guest vcpus pvclock areas).
1472 * To avoid that problem, do not allow visibility of distinct
1473 * system_timestamp/tsc_timestamp values simultaneously: use a master
1474 * copy of host monotonic time values. Update that master copy
1477 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1481 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1483 #ifdef CONFIG_X86_64
1484 struct kvm_arch
*ka
= &kvm
->arch
;
1486 bool host_tsc_clocksource
, vcpus_matched
;
1488 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1489 atomic_read(&kvm
->online_vcpus
));
1492 * If the host uses TSC clock, then passthrough TSC as stable
1495 host_tsc_clocksource
= kvm_get_time_and_clockread(
1496 &ka
->master_kernel_ns
,
1497 &ka
->master_cycle_now
);
1499 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1500 && !backwards_tsc_observed
;
1502 if (ka
->use_master_clock
)
1503 atomic_set(&kvm_guest_has_master_clock
, 1);
1505 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1506 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1511 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1513 #ifdef CONFIG_X86_64
1515 struct kvm_vcpu
*vcpu
;
1516 struct kvm_arch
*ka
= &kvm
->arch
;
1518 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1519 kvm_make_mclock_inprogress_request(kvm
);
1520 /* no guest entries from this point */
1521 pvclock_update_vm_gtod_copy(kvm
);
1523 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1524 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1526 /* guest entries allowed */
1527 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1528 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1530 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1534 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1536 unsigned long flags
, this_tsc_khz
;
1537 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1538 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1540 u64 tsc_timestamp
, host_tsc
;
1541 struct pvclock_vcpu_time_info guest_hv_clock
;
1543 bool use_master_clock
;
1549 * If the host uses TSC clock, then passthrough TSC as stable
1552 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1553 use_master_clock
= ka
->use_master_clock
;
1554 if (use_master_clock
) {
1555 host_tsc
= ka
->master_cycle_now
;
1556 kernel_ns
= ka
->master_kernel_ns
;
1558 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1560 /* Keep irq disabled to prevent changes to the clock */
1561 local_irq_save(flags
);
1562 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1563 if (unlikely(this_tsc_khz
== 0)) {
1564 local_irq_restore(flags
);
1565 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1568 if (!use_master_clock
) {
1569 host_tsc
= native_read_tsc();
1570 kernel_ns
= get_kernel_ns();
1573 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1576 * We may have to catch up the TSC to match elapsed wall clock
1577 * time for two reasons, even if kvmclock is used.
1578 * 1) CPU could have been running below the maximum TSC rate
1579 * 2) Broken TSC compensation resets the base at each VCPU
1580 * entry to avoid unknown leaps of TSC even when running
1581 * again on the same CPU. This may cause apparent elapsed
1582 * time to disappear, and the guest to stand still or run
1585 if (vcpu
->tsc_catchup
) {
1586 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1587 if (tsc
> tsc_timestamp
) {
1588 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1589 tsc_timestamp
= tsc
;
1593 local_irq_restore(flags
);
1595 if (!vcpu
->pv_time_enabled
)
1598 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1599 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1600 &vcpu
->hv_clock
.tsc_shift
,
1601 &vcpu
->hv_clock
.tsc_to_system_mul
);
1602 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1605 /* With all the info we got, fill in the values */
1606 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1607 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1608 vcpu
->last_guest_tsc
= tsc_timestamp
;
1611 * The interface expects us to write an even number signaling that the
1612 * update is finished. Since the guest won't see the intermediate
1613 * state, we just increase by 2 at the end.
1615 vcpu
->hv_clock
.version
+= 2;
1617 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1618 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1621 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1622 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1624 if (vcpu
->pvclock_set_guest_stopped_request
) {
1625 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1626 vcpu
->pvclock_set_guest_stopped_request
= false;
1629 /* If the host uses TSC clocksource, then it is stable */
1630 if (use_master_clock
)
1631 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1633 vcpu
->hv_clock
.flags
= pvclock_flags
;
1635 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1637 sizeof(vcpu
->hv_clock
));
1642 * kvmclock updates which are isolated to a given vcpu, such as
1643 * vcpu->cpu migration, should not allow system_timestamp from
1644 * the rest of the vcpus to remain static. Otherwise ntp frequency
1645 * correction applies to one vcpu's system_timestamp but not
1648 * So in those cases, request a kvmclock update for all vcpus.
1649 * We need to rate-limit these requests though, as they can
1650 * considerably slow guests that have a large number of vcpus.
1651 * The time for a remote vcpu to update its kvmclock is bound
1652 * by the delay we use to rate-limit the updates.
1655 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1657 static void kvmclock_update_fn(struct work_struct
*work
)
1660 struct delayed_work
*dwork
= to_delayed_work(work
);
1661 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1662 kvmclock_update_work
);
1663 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1664 struct kvm_vcpu
*vcpu
;
1666 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1667 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1668 kvm_vcpu_kick(vcpu
);
1672 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1674 struct kvm
*kvm
= v
->kvm
;
1676 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1677 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1678 KVMCLOCK_UPDATE_DELAY
);
1681 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1683 static void kvmclock_sync_fn(struct work_struct
*work
)
1685 struct delayed_work
*dwork
= to_delayed_work(work
);
1686 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1687 kvmclock_sync_work
);
1688 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1690 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1691 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1692 KVMCLOCK_SYNC_PERIOD
);
1695 static bool msr_mtrr_valid(unsigned msr
)
1698 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1699 case MSR_MTRRfix64K_00000
:
1700 case MSR_MTRRfix16K_80000
:
1701 case MSR_MTRRfix16K_A0000
:
1702 case MSR_MTRRfix4K_C0000
:
1703 case MSR_MTRRfix4K_C8000
:
1704 case MSR_MTRRfix4K_D0000
:
1705 case MSR_MTRRfix4K_D8000
:
1706 case MSR_MTRRfix4K_E0000
:
1707 case MSR_MTRRfix4K_E8000
:
1708 case MSR_MTRRfix4K_F0000
:
1709 case MSR_MTRRfix4K_F8000
:
1710 case MSR_MTRRdefType
:
1711 case MSR_IA32_CR_PAT
:
1719 static bool valid_pat_type(unsigned t
)
1721 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1724 static bool valid_mtrr_type(unsigned t
)
1726 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1729 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1734 if (!msr_mtrr_valid(msr
))
1737 if (msr
== MSR_IA32_CR_PAT
) {
1738 for (i
= 0; i
< 8; i
++)
1739 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1742 } else if (msr
== MSR_MTRRdefType
) {
1745 return valid_mtrr_type(data
& 0xff);
1746 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1747 for (i
= 0; i
< 8 ; i
++)
1748 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1753 /* variable MTRRs */
1754 WARN_ON(!(msr
>= 0x200 && msr
< 0x200 + 2 * KVM_NR_VAR_MTRR
));
1756 mask
= (~0ULL) << cpuid_maxphyaddr(vcpu
);
1757 if ((msr
& 1) == 0) {
1759 if (!valid_mtrr_type(data
& 0xff))
1766 kvm_inject_gp(vcpu
, 0);
1773 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1775 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1777 if (!mtrr_valid(vcpu
, msr
, data
))
1780 if (msr
== MSR_MTRRdefType
) {
1781 vcpu
->arch
.mtrr_state
.def_type
= data
;
1782 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1783 } else if (msr
== MSR_MTRRfix64K_00000
)
1785 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1786 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1787 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1788 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1789 else if (msr
== MSR_IA32_CR_PAT
)
1790 vcpu
->arch
.pat
= data
;
1791 else { /* Variable MTRRs */
1792 int idx
, is_mtrr_mask
;
1795 idx
= (msr
- 0x200) / 2;
1796 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1799 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1802 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1806 kvm_mmu_reset_context(vcpu
);
1810 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1812 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1813 unsigned bank_num
= mcg_cap
& 0xff;
1816 case MSR_IA32_MCG_STATUS
:
1817 vcpu
->arch
.mcg_status
= data
;
1819 case MSR_IA32_MCG_CTL
:
1820 if (!(mcg_cap
& MCG_CTL_P
))
1822 if (data
!= 0 && data
!= ~(u64
)0)
1824 vcpu
->arch
.mcg_ctl
= data
;
1827 if (msr
>= MSR_IA32_MC0_CTL
&&
1828 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1829 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1830 /* only 0 or all 1s can be written to IA32_MCi_CTL
1831 * some Linux kernels though clear bit 10 in bank 4 to
1832 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1833 * this to avoid an uncatched #GP in the guest
1835 if ((offset
& 0x3) == 0 &&
1836 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1838 vcpu
->arch
.mce_banks
[offset
] = data
;
1846 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1848 struct kvm
*kvm
= vcpu
->kvm
;
1849 int lm
= is_long_mode(vcpu
);
1850 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1851 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1852 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1853 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1854 u32 page_num
= data
& ~PAGE_MASK
;
1855 u64 page_addr
= data
& PAGE_MASK
;
1860 if (page_num
>= blob_size
)
1863 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1868 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1877 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1879 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1882 static bool kvm_hv_msr_partition_wide(u32 msr
)
1886 case HV_X64_MSR_GUEST_OS_ID
:
1887 case HV_X64_MSR_HYPERCALL
:
1888 case HV_X64_MSR_REFERENCE_TSC
:
1889 case HV_X64_MSR_TIME_REF_COUNT
:
1897 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1899 struct kvm
*kvm
= vcpu
->kvm
;
1902 case HV_X64_MSR_GUEST_OS_ID
:
1903 kvm
->arch
.hv_guest_os_id
= data
;
1904 /* setting guest os id to zero disables hypercall page */
1905 if (!kvm
->arch
.hv_guest_os_id
)
1906 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1908 case HV_X64_MSR_HYPERCALL
: {
1913 /* if guest os id is not set hypercall should remain disabled */
1914 if (!kvm
->arch
.hv_guest_os_id
)
1916 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1917 kvm
->arch
.hv_hypercall
= data
;
1920 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1921 addr
= gfn_to_hva(kvm
, gfn
);
1922 if (kvm_is_error_hva(addr
))
1924 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1925 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1926 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1928 kvm
->arch
.hv_hypercall
= data
;
1929 mark_page_dirty(kvm
, gfn
);
1932 case HV_X64_MSR_REFERENCE_TSC
: {
1934 HV_REFERENCE_TSC_PAGE tsc_ref
;
1935 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1936 kvm
->arch
.hv_tsc_page
= data
;
1937 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1939 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1940 if (kvm_write_guest(kvm
, gfn
<< HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
,
1941 &tsc_ref
, sizeof(tsc_ref
)))
1943 mark_page_dirty(kvm
, gfn
);
1947 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1948 "data 0x%llx\n", msr
, data
);
1954 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1957 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1961 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1962 vcpu
->arch
.hv_vapic
= data
;
1963 if (kvm_lapic_enable_pv_eoi(vcpu
, 0))
1967 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
1968 addr
= gfn_to_hva(vcpu
->kvm
, gfn
);
1969 if (kvm_is_error_hva(addr
))
1971 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1973 vcpu
->arch
.hv_vapic
= data
;
1974 mark_page_dirty(vcpu
->kvm
, gfn
);
1975 if (kvm_lapic_enable_pv_eoi(vcpu
, gfn_to_gpa(gfn
) | KVM_MSR_ENABLED
))
1979 case HV_X64_MSR_EOI
:
1980 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1981 case HV_X64_MSR_ICR
:
1982 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1983 case HV_X64_MSR_TPR
:
1984 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1986 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1987 "data 0x%llx\n", msr
, data
);
1994 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1996 gpa_t gpa
= data
& ~0x3f;
1998 /* Bits 2:5 are reserved, Should be zero */
2002 vcpu
->arch
.apf
.msr_val
= data
;
2004 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2005 kvm_clear_async_pf_completion_queue(vcpu
);
2006 kvm_async_pf_hash_reset(vcpu
);
2010 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2014 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2015 kvm_async_pf_wakeup_all(vcpu
);
2019 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2021 vcpu
->arch
.pv_time_enabled
= false;
2024 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2028 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2031 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2032 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2033 vcpu
->arch
.st
.accum_steal
= delta
;
2036 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2038 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2041 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2042 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2045 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2046 vcpu
->arch
.st
.steal
.version
+= 2;
2047 vcpu
->arch
.st
.accum_steal
= 0;
2049 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2050 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2053 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2056 u32 msr
= msr_info
->index
;
2057 u64 data
= msr_info
->data
;
2060 case MSR_AMD64_NB_CFG
:
2061 case MSR_IA32_UCODE_REV
:
2062 case MSR_IA32_UCODE_WRITE
:
2063 case MSR_VM_HSAVE_PA
:
2064 case MSR_AMD64_PATCH_LOADER
:
2065 case MSR_AMD64_BU_CFG2
:
2069 return set_efer(vcpu
, data
);
2071 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2072 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2073 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2074 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2076 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2081 case MSR_FAM10H_MMIO_CONF_BASE
:
2083 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2088 case MSR_IA32_DEBUGCTLMSR
:
2090 /* We support the non-activated case already */
2092 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2093 /* Values other than LBR and BTF are vendor-specific,
2094 thus reserved and should throw a #GP */
2097 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2100 case 0x200 ... 0x2ff:
2101 return set_msr_mtrr(vcpu
, msr
, data
);
2102 case MSR_IA32_APICBASE
:
2103 return kvm_set_apic_base(vcpu
, msr_info
);
2104 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2105 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2106 case MSR_IA32_TSCDEADLINE
:
2107 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2109 case MSR_IA32_TSC_ADJUST
:
2110 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2111 if (!msr_info
->host_initiated
) {
2112 u64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2113 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2115 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2118 case MSR_IA32_MISC_ENABLE
:
2119 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2121 case MSR_KVM_WALL_CLOCK_NEW
:
2122 case MSR_KVM_WALL_CLOCK
:
2123 vcpu
->kvm
->arch
.wall_clock
= data
;
2124 kvm_write_wall_clock(vcpu
->kvm
, data
);
2126 case MSR_KVM_SYSTEM_TIME_NEW
:
2127 case MSR_KVM_SYSTEM_TIME
: {
2129 kvmclock_reset(vcpu
);
2131 vcpu
->arch
.time
= data
;
2132 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2134 /* we verify if the enable bit is set... */
2138 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2140 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2141 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2142 sizeof(struct pvclock_vcpu_time_info
)))
2143 vcpu
->arch
.pv_time_enabled
= false;
2145 vcpu
->arch
.pv_time_enabled
= true;
2149 case MSR_KVM_ASYNC_PF_EN
:
2150 if (kvm_pv_enable_async_pf(vcpu
, data
))
2153 case MSR_KVM_STEAL_TIME
:
2155 if (unlikely(!sched_info_on()))
2158 if (data
& KVM_STEAL_RESERVED_MASK
)
2161 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2162 data
& KVM_STEAL_VALID_BITS
,
2163 sizeof(struct kvm_steal_time
)))
2166 vcpu
->arch
.st
.msr_val
= data
;
2168 if (!(data
& KVM_MSR_ENABLED
))
2171 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2174 accumulate_steal_time(vcpu
);
2177 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2180 case MSR_KVM_PV_EOI_EN
:
2181 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2185 case MSR_IA32_MCG_CTL
:
2186 case MSR_IA32_MCG_STATUS
:
2187 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2188 return set_msr_mce(vcpu
, msr
, data
);
2190 /* Performance counters are not protected by a CPUID bit,
2191 * so we should check all of them in the generic path for the sake of
2192 * cross vendor migration.
2193 * Writing a zero into the event select MSRs disables them,
2194 * which we perfectly emulate ;-). Any other value should be at least
2195 * reported, some guests depend on them.
2197 case MSR_K7_EVNTSEL0
:
2198 case MSR_K7_EVNTSEL1
:
2199 case MSR_K7_EVNTSEL2
:
2200 case MSR_K7_EVNTSEL3
:
2202 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2203 "0x%x data 0x%llx\n", msr
, data
);
2205 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2206 * so we ignore writes to make it happy.
2208 case MSR_K7_PERFCTR0
:
2209 case MSR_K7_PERFCTR1
:
2210 case MSR_K7_PERFCTR2
:
2211 case MSR_K7_PERFCTR3
:
2212 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2213 "0x%x data 0x%llx\n", msr
, data
);
2215 case MSR_P6_PERFCTR0
:
2216 case MSR_P6_PERFCTR1
:
2218 case MSR_P6_EVNTSEL0
:
2219 case MSR_P6_EVNTSEL1
:
2220 if (kvm_pmu_msr(vcpu
, msr
))
2221 return kvm_pmu_set_msr(vcpu
, msr_info
);
2223 if (pr
|| data
!= 0)
2224 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2225 "0x%x data 0x%llx\n", msr
, data
);
2227 case MSR_K7_CLK_CTL
:
2229 * Ignore all writes to this no longer documented MSR.
2230 * Writes are only relevant for old K7 processors,
2231 * all pre-dating SVM, but a recommended workaround from
2232 * AMD for these chips. It is possible to specify the
2233 * affected processor models on the command line, hence
2234 * the need to ignore the workaround.
2237 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2238 if (kvm_hv_msr_partition_wide(msr
)) {
2240 mutex_lock(&vcpu
->kvm
->lock
);
2241 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2242 mutex_unlock(&vcpu
->kvm
->lock
);
2245 return set_msr_hyperv(vcpu
, msr
, data
);
2247 case MSR_IA32_BBL_CR_CTL3
:
2248 /* Drop writes to this legacy MSR -- see rdmsr
2249 * counterpart for further detail.
2251 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2253 case MSR_AMD64_OSVW_ID_LENGTH
:
2254 if (!guest_cpuid_has_osvw(vcpu
))
2256 vcpu
->arch
.osvw
.length
= data
;
2258 case MSR_AMD64_OSVW_STATUS
:
2259 if (!guest_cpuid_has_osvw(vcpu
))
2261 vcpu
->arch
.osvw
.status
= data
;
2264 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2265 return xen_hvm_config(vcpu
, data
);
2266 if (kvm_pmu_msr(vcpu
, msr
))
2267 return kvm_pmu_set_msr(vcpu
, msr_info
);
2269 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2273 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2280 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2284 * Reads an msr value (of 'msr_index') into 'pdata'.
2285 * Returns 0 on success, non-0 otherwise.
2286 * Assumes vcpu_load() was already called.
2288 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2290 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2293 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2295 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2297 if (!msr_mtrr_valid(msr
))
2300 if (msr
== MSR_MTRRdefType
)
2301 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2302 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2303 else if (msr
== MSR_MTRRfix64K_00000
)
2305 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2306 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2307 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2308 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2309 else if (msr
== MSR_IA32_CR_PAT
)
2310 *pdata
= vcpu
->arch
.pat
;
2311 else { /* Variable MTRRs */
2312 int idx
, is_mtrr_mask
;
2315 idx
= (msr
- 0x200) / 2;
2316 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2319 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2322 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2329 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2332 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2333 unsigned bank_num
= mcg_cap
& 0xff;
2336 case MSR_IA32_P5_MC_ADDR
:
2337 case MSR_IA32_P5_MC_TYPE
:
2340 case MSR_IA32_MCG_CAP
:
2341 data
= vcpu
->arch
.mcg_cap
;
2343 case MSR_IA32_MCG_CTL
:
2344 if (!(mcg_cap
& MCG_CTL_P
))
2346 data
= vcpu
->arch
.mcg_ctl
;
2348 case MSR_IA32_MCG_STATUS
:
2349 data
= vcpu
->arch
.mcg_status
;
2352 if (msr
>= MSR_IA32_MC0_CTL
&&
2353 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
2354 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2355 data
= vcpu
->arch
.mce_banks
[offset
];
2364 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2367 struct kvm
*kvm
= vcpu
->kvm
;
2370 case HV_X64_MSR_GUEST_OS_ID
:
2371 data
= kvm
->arch
.hv_guest_os_id
;
2373 case HV_X64_MSR_HYPERCALL
:
2374 data
= kvm
->arch
.hv_hypercall
;
2376 case HV_X64_MSR_TIME_REF_COUNT
: {
2378 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2381 case HV_X64_MSR_REFERENCE_TSC
:
2382 data
= kvm
->arch
.hv_tsc_page
;
2385 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2393 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2398 case HV_X64_MSR_VP_INDEX
: {
2401 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
) {
2409 case HV_X64_MSR_EOI
:
2410 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2411 case HV_X64_MSR_ICR
:
2412 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2413 case HV_X64_MSR_TPR
:
2414 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2415 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2416 data
= vcpu
->arch
.hv_vapic
;
2419 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2426 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2431 case MSR_IA32_PLATFORM_ID
:
2432 case MSR_IA32_EBL_CR_POWERON
:
2433 case MSR_IA32_DEBUGCTLMSR
:
2434 case MSR_IA32_LASTBRANCHFROMIP
:
2435 case MSR_IA32_LASTBRANCHTOIP
:
2436 case MSR_IA32_LASTINTFROMIP
:
2437 case MSR_IA32_LASTINTTOIP
:
2440 case MSR_VM_HSAVE_PA
:
2441 case MSR_K7_EVNTSEL0
:
2442 case MSR_K7_EVNTSEL1
:
2443 case MSR_K7_EVNTSEL2
:
2444 case MSR_K7_EVNTSEL3
:
2445 case MSR_K7_PERFCTR0
:
2446 case MSR_K7_PERFCTR1
:
2447 case MSR_K7_PERFCTR2
:
2448 case MSR_K7_PERFCTR3
:
2449 case MSR_K8_INT_PENDING_MSG
:
2450 case MSR_AMD64_NB_CFG
:
2451 case MSR_FAM10H_MMIO_CONF_BASE
:
2452 case MSR_AMD64_BU_CFG2
:
2455 case MSR_P6_PERFCTR0
:
2456 case MSR_P6_PERFCTR1
:
2457 case MSR_P6_EVNTSEL0
:
2458 case MSR_P6_EVNTSEL1
:
2459 if (kvm_pmu_msr(vcpu
, msr
))
2460 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2463 case MSR_IA32_UCODE_REV
:
2464 data
= 0x100000000ULL
;
2467 data
= 0x500 | KVM_NR_VAR_MTRR
;
2469 case 0x200 ... 0x2ff:
2470 return get_msr_mtrr(vcpu
, msr
, pdata
);
2471 case 0xcd: /* fsb frequency */
2475 * MSR_EBC_FREQUENCY_ID
2476 * Conservative value valid for even the basic CPU models.
2477 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2478 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2479 * and 266MHz for model 3, or 4. Set Core Clock
2480 * Frequency to System Bus Frequency Ratio to 1 (bits
2481 * 31:24) even though these are only valid for CPU
2482 * models > 2, however guests may end up dividing or
2483 * multiplying by zero otherwise.
2485 case MSR_EBC_FREQUENCY_ID
:
2488 case MSR_IA32_APICBASE
:
2489 data
= kvm_get_apic_base(vcpu
);
2491 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2492 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2494 case MSR_IA32_TSCDEADLINE
:
2495 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2497 case MSR_IA32_TSC_ADJUST
:
2498 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2500 case MSR_IA32_MISC_ENABLE
:
2501 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2503 case MSR_IA32_PERF_STATUS
:
2504 /* TSC increment by tick */
2506 /* CPU multiplier */
2507 data
|= (((uint64_t)4ULL) << 40);
2510 data
= vcpu
->arch
.efer
;
2512 case MSR_KVM_WALL_CLOCK
:
2513 case MSR_KVM_WALL_CLOCK_NEW
:
2514 data
= vcpu
->kvm
->arch
.wall_clock
;
2516 case MSR_KVM_SYSTEM_TIME
:
2517 case MSR_KVM_SYSTEM_TIME_NEW
:
2518 data
= vcpu
->arch
.time
;
2520 case MSR_KVM_ASYNC_PF_EN
:
2521 data
= vcpu
->arch
.apf
.msr_val
;
2523 case MSR_KVM_STEAL_TIME
:
2524 data
= vcpu
->arch
.st
.msr_val
;
2526 case MSR_KVM_PV_EOI_EN
:
2527 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2529 case MSR_IA32_P5_MC_ADDR
:
2530 case MSR_IA32_P5_MC_TYPE
:
2531 case MSR_IA32_MCG_CAP
:
2532 case MSR_IA32_MCG_CTL
:
2533 case MSR_IA32_MCG_STATUS
:
2534 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2535 return get_msr_mce(vcpu
, msr
, pdata
);
2536 case MSR_K7_CLK_CTL
:
2538 * Provide expected ramp-up count for K7. All other
2539 * are set to zero, indicating minimum divisors for
2542 * This prevents guest kernels on AMD host with CPU
2543 * type 6, model 8 and higher from exploding due to
2544 * the rdmsr failing.
2548 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2549 if (kvm_hv_msr_partition_wide(msr
)) {
2551 mutex_lock(&vcpu
->kvm
->lock
);
2552 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2553 mutex_unlock(&vcpu
->kvm
->lock
);
2556 return get_msr_hyperv(vcpu
, msr
, pdata
);
2558 case MSR_IA32_BBL_CR_CTL3
:
2559 /* This legacy MSR exists but isn't fully documented in current
2560 * silicon. It is however accessed by winxp in very narrow
2561 * scenarios where it sets bit #19, itself documented as
2562 * a "reserved" bit. Best effort attempt to source coherent
2563 * read data here should the balance of the register be
2564 * interpreted by the guest:
2566 * L2 cache control register 3: 64GB range, 256KB size,
2567 * enabled, latency 0x1, configured
2571 case MSR_AMD64_OSVW_ID_LENGTH
:
2572 if (!guest_cpuid_has_osvw(vcpu
))
2574 data
= vcpu
->arch
.osvw
.length
;
2576 case MSR_AMD64_OSVW_STATUS
:
2577 if (!guest_cpuid_has_osvw(vcpu
))
2579 data
= vcpu
->arch
.osvw
.status
;
2582 if (kvm_pmu_msr(vcpu
, msr
))
2583 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2585 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2588 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2596 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2599 * Read or write a bunch of msrs. All parameters are kernel addresses.
2601 * @return number of msrs set successfully.
2603 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2604 struct kvm_msr_entry
*entries
,
2605 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2606 unsigned index
, u64
*data
))
2610 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2611 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2612 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2614 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2620 * Read or write a bunch of msrs. Parameters are user addresses.
2622 * @return number of msrs set successfully.
2624 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2625 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2626 unsigned index
, u64
*data
),
2629 struct kvm_msrs msrs
;
2630 struct kvm_msr_entry
*entries
;
2635 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2639 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2642 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2643 entries
= memdup_user(user_msrs
->entries
, size
);
2644 if (IS_ERR(entries
)) {
2645 r
= PTR_ERR(entries
);
2649 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2654 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2665 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2670 case KVM_CAP_IRQCHIP
:
2672 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2673 case KVM_CAP_SET_TSS_ADDR
:
2674 case KVM_CAP_EXT_CPUID
:
2675 case KVM_CAP_EXT_EMUL_CPUID
:
2676 case KVM_CAP_CLOCKSOURCE
:
2678 case KVM_CAP_NOP_IO_DELAY
:
2679 case KVM_CAP_MP_STATE
:
2680 case KVM_CAP_SYNC_MMU
:
2681 case KVM_CAP_USER_NMI
:
2682 case KVM_CAP_REINJECT_CONTROL
:
2683 case KVM_CAP_IRQ_INJECT_STATUS
:
2685 case KVM_CAP_IOEVENTFD
:
2686 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2688 case KVM_CAP_PIT_STATE2
:
2689 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2690 case KVM_CAP_XEN_HVM
:
2691 case KVM_CAP_ADJUST_CLOCK
:
2692 case KVM_CAP_VCPU_EVENTS
:
2693 case KVM_CAP_HYPERV
:
2694 case KVM_CAP_HYPERV_VAPIC
:
2695 case KVM_CAP_HYPERV_SPIN
:
2696 case KVM_CAP_PCI_SEGMENT
:
2697 case KVM_CAP_DEBUGREGS
:
2698 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2700 case KVM_CAP_ASYNC_PF
:
2701 case KVM_CAP_GET_TSC_KHZ
:
2702 case KVM_CAP_KVMCLOCK_CTRL
:
2703 case KVM_CAP_READONLY_MEM
:
2704 case KVM_CAP_HYPERV_TIME
:
2705 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2706 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2707 case KVM_CAP_ASSIGN_DEV_IRQ
:
2708 case KVM_CAP_PCI_2_3
:
2712 case KVM_CAP_COALESCED_MMIO
:
2713 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2716 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2718 case KVM_CAP_NR_VCPUS
:
2719 r
= KVM_SOFT_MAX_VCPUS
;
2721 case KVM_CAP_MAX_VCPUS
:
2724 case KVM_CAP_NR_MEMSLOTS
:
2725 r
= KVM_USER_MEM_SLOTS
;
2727 case KVM_CAP_PV_MMU
: /* obsolete */
2730 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2732 r
= iommu_present(&pci_bus_type
);
2736 r
= KVM_MAX_MCE_BANKS
;
2741 case KVM_CAP_TSC_CONTROL
:
2742 r
= kvm_has_tsc_control
;
2744 case KVM_CAP_TSC_DEADLINE_TIMER
:
2745 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2755 long kvm_arch_dev_ioctl(struct file
*filp
,
2756 unsigned int ioctl
, unsigned long arg
)
2758 void __user
*argp
= (void __user
*)arg
;
2762 case KVM_GET_MSR_INDEX_LIST
: {
2763 struct kvm_msr_list __user
*user_msr_list
= argp
;
2764 struct kvm_msr_list msr_list
;
2768 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2771 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2772 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2775 if (n
< msr_list
.nmsrs
)
2778 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2779 num_msrs_to_save
* sizeof(u32
)))
2781 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2783 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2788 case KVM_GET_SUPPORTED_CPUID
:
2789 case KVM_GET_EMULATED_CPUID
: {
2790 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2791 struct kvm_cpuid2 cpuid
;
2794 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2797 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2803 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2808 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2811 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2813 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2825 static void wbinvd_ipi(void *garbage
)
2830 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2832 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2835 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2837 /* Address WBINVD may be executed by guest */
2838 if (need_emulate_wbinvd(vcpu
)) {
2839 if (kvm_x86_ops
->has_wbinvd_exit())
2840 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2841 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2842 smp_call_function_single(vcpu
->cpu
,
2843 wbinvd_ipi
, NULL
, 1);
2846 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2848 /* Apply any externally detected TSC adjustments (due to suspend) */
2849 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2850 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2851 vcpu
->arch
.tsc_offset_adjustment
= 0;
2852 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2855 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2856 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2857 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2859 mark_tsc_unstable("KVM discovered backwards TSC");
2860 if (check_tsc_unstable()) {
2861 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2862 vcpu
->arch
.last_guest_tsc
);
2863 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2864 vcpu
->arch
.tsc_catchup
= 1;
2867 * On a host with synchronized TSC, there is no need to update
2868 * kvmclock on vcpu->cpu migration
2870 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2871 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2872 if (vcpu
->cpu
!= cpu
)
2873 kvm_migrate_timers(vcpu
);
2877 accumulate_steal_time(vcpu
);
2878 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2881 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2883 kvm_x86_ops
->vcpu_put(vcpu
);
2884 kvm_put_guest_fpu(vcpu
);
2885 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2888 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2889 struct kvm_lapic_state
*s
)
2891 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2892 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2897 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2898 struct kvm_lapic_state
*s
)
2900 kvm_apic_post_state_restore(vcpu
, s
);
2901 update_cr8_intercept(vcpu
);
2906 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2907 struct kvm_interrupt
*irq
)
2909 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2911 if (irqchip_in_kernel(vcpu
->kvm
))
2914 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2915 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2920 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2922 kvm_inject_nmi(vcpu
);
2927 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2928 struct kvm_tpr_access_ctl
*tac
)
2932 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2936 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2940 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2943 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2945 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2948 vcpu
->arch
.mcg_cap
= mcg_cap
;
2949 /* Init IA32_MCG_CTL to all 1s */
2950 if (mcg_cap
& MCG_CTL_P
)
2951 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2952 /* Init IA32_MCi_CTL to all 1s */
2953 for (bank
= 0; bank
< bank_num
; bank
++)
2954 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2959 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2960 struct kvm_x86_mce
*mce
)
2962 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2963 unsigned bank_num
= mcg_cap
& 0xff;
2964 u64
*banks
= vcpu
->arch
.mce_banks
;
2966 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2969 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2970 * reporting is disabled
2972 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2973 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2975 banks
+= 4 * mce
->bank
;
2977 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2978 * reporting is disabled for the bank
2980 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2982 if (mce
->status
& MCI_STATUS_UC
) {
2983 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2984 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2985 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2988 if (banks
[1] & MCI_STATUS_VAL
)
2989 mce
->status
|= MCI_STATUS_OVER
;
2990 banks
[2] = mce
->addr
;
2991 banks
[3] = mce
->misc
;
2992 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2993 banks
[1] = mce
->status
;
2994 kvm_queue_exception(vcpu
, MC_VECTOR
);
2995 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2996 || !(banks
[1] & MCI_STATUS_UC
)) {
2997 if (banks
[1] & MCI_STATUS_VAL
)
2998 mce
->status
|= MCI_STATUS_OVER
;
2999 banks
[2] = mce
->addr
;
3000 banks
[3] = mce
->misc
;
3001 banks
[1] = mce
->status
;
3003 banks
[1] |= MCI_STATUS_OVER
;
3007 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3008 struct kvm_vcpu_events
*events
)
3011 events
->exception
.injected
=
3012 vcpu
->arch
.exception
.pending
&&
3013 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3014 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3015 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3016 events
->exception
.pad
= 0;
3017 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3019 events
->interrupt
.injected
=
3020 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3021 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3022 events
->interrupt
.soft
= 0;
3023 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3025 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3026 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3027 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3028 events
->nmi
.pad
= 0;
3030 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3032 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3033 | KVM_VCPUEVENT_VALID_SHADOW
);
3034 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3037 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3038 struct kvm_vcpu_events
*events
)
3040 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3041 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3042 | KVM_VCPUEVENT_VALID_SHADOW
))
3046 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3047 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3048 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3049 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3051 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3052 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3053 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3054 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3055 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3056 events
->interrupt
.shadow
);
3058 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3059 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3060 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3061 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3063 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3064 kvm_vcpu_has_lapic(vcpu
))
3065 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3067 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3072 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3073 struct kvm_debugregs
*dbgregs
)
3077 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3078 _kvm_get_dr(vcpu
, 6, &val
);
3080 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3082 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3085 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3086 struct kvm_debugregs
*dbgregs
)
3091 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3092 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3093 kvm_update_dr6(vcpu
);
3094 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3095 kvm_update_dr7(vcpu
);
3100 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3101 struct kvm_xsave
*guest_xsave
)
3103 if (cpu_has_xsave
) {
3104 memcpy(guest_xsave
->region
,
3105 &vcpu
->arch
.guest_fpu
.state
->xsave
,
3106 vcpu
->arch
.guest_xstate_size
);
3107 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] &=
3108 vcpu
->arch
.guest_supported_xcr0
| XSTATE_FPSSE
;
3110 memcpy(guest_xsave
->region
,
3111 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3112 sizeof(struct i387_fxsave_struct
));
3113 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3118 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3119 struct kvm_xsave
*guest_xsave
)
3122 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3124 if (cpu_has_xsave
) {
3126 * Here we allow setting states that are not present in
3127 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3128 * with old userspace.
3130 if (xstate_bv
& ~kvm_supported_xcr0())
3132 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
3133 guest_xsave
->region
, vcpu
->arch
.guest_xstate_size
);
3135 if (xstate_bv
& ~XSTATE_FPSSE
)
3137 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3138 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3143 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3144 struct kvm_xcrs
*guest_xcrs
)
3146 if (!cpu_has_xsave
) {
3147 guest_xcrs
->nr_xcrs
= 0;
3151 guest_xcrs
->nr_xcrs
= 1;
3152 guest_xcrs
->flags
= 0;
3153 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3154 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3157 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3158 struct kvm_xcrs
*guest_xcrs
)
3165 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3168 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3169 /* Only support XCR0 currently */
3170 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3171 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3172 guest_xcrs
->xcrs
[i
].value
);
3181 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3182 * stopped by the hypervisor. This function will be called from the host only.
3183 * EINVAL is returned when the host attempts to set the flag for a guest that
3184 * does not support pv clocks.
3186 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3188 if (!vcpu
->arch
.pv_time_enabled
)
3190 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3191 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3195 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3196 unsigned int ioctl
, unsigned long arg
)
3198 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3199 void __user
*argp
= (void __user
*)arg
;
3202 struct kvm_lapic_state
*lapic
;
3203 struct kvm_xsave
*xsave
;
3204 struct kvm_xcrs
*xcrs
;
3210 case KVM_GET_LAPIC
: {
3212 if (!vcpu
->arch
.apic
)
3214 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3219 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3223 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3228 case KVM_SET_LAPIC
: {
3230 if (!vcpu
->arch
.apic
)
3232 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3233 if (IS_ERR(u
.lapic
))
3234 return PTR_ERR(u
.lapic
);
3236 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3239 case KVM_INTERRUPT
: {
3240 struct kvm_interrupt irq
;
3243 if (copy_from_user(&irq
, argp
, sizeof irq
))
3245 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3249 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3252 case KVM_SET_CPUID
: {
3253 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3254 struct kvm_cpuid cpuid
;
3257 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3259 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3262 case KVM_SET_CPUID2
: {
3263 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3264 struct kvm_cpuid2 cpuid
;
3267 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3269 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3270 cpuid_arg
->entries
);
3273 case KVM_GET_CPUID2
: {
3274 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3275 struct kvm_cpuid2 cpuid
;
3278 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3280 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3281 cpuid_arg
->entries
);
3285 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3291 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3294 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3296 case KVM_TPR_ACCESS_REPORTING
: {
3297 struct kvm_tpr_access_ctl tac
;
3300 if (copy_from_user(&tac
, argp
, sizeof tac
))
3302 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3306 if (copy_to_user(argp
, &tac
, sizeof tac
))
3311 case KVM_SET_VAPIC_ADDR
: {
3312 struct kvm_vapic_addr va
;
3315 if (!irqchip_in_kernel(vcpu
->kvm
))
3318 if (copy_from_user(&va
, argp
, sizeof va
))
3320 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3323 case KVM_X86_SETUP_MCE
: {
3327 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3329 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3332 case KVM_X86_SET_MCE
: {
3333 struct kvm_x86_mce mce
;
3336 if (copy_from_user(&mce
, argp
, sizeof mce
))
3338 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3341 case KVM_GET_VCPU_EVENTS
: {
3342 struct kvm_vcpu_events events
;
3344 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3347 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3352 case KVM_SET_VCPU_EVENTS
: {
3353 struct kvm_vcpu_events events
;
3356 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3359 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3362 case KVM_GET_DEBUGREGS
: {
3363 struct kvm_debugregs dbgregs
;
3365 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3368 if (copy_to_user(argp
, &dbgregs
,
3369 sizeof(struct kvm_debugregs
)))
3374 case KVM_SET_DEBUGREGS
: {
3375 struct kvm_debugregs dbgregs
;
3378 if (copy_from_user(&dbgregs
, argp
,
3379 sizeof(struct kvm_debugregs
)))
3382 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3385 case KVM_GET_XSAVE
: {
3386 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3391 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3394 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3399 case KVM_SET_XSAVE
: {
3400 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3401 if (IS_ERR(u
.xsave
))
3402 return PTR_ERR(u
.xsave
);
3404 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3407 case KVM_GET_XCRS
: {
3408 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3413 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3416 if (copy_to_user(argp
, u
.xcrs
,
3417 sizeof(struct kvm_xcrs
)))
3422 case KVM_SET_XCRS
: {
3423 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3425 return PTR_ERR(u
.xcrs
);
3427 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3430 case KVM_SET_TSC_KHZ
: {
3434 user_tsc_khz
= (u32
)arg
;
3436 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3439 if (user_tsc_khz
== 0)
3440 user_tsc_khz
= tsc_khz
;
3442 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3447 case KVM_GET_TSC_KHZ
: {
3448 r
= vcpu
->arch
.virtual_tsc_khz
;
3451 case KVM_KVMCLOCK_CTRL
: {
3452 r
= kvm_set_guest_paused(vcpu
);
3463 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3465 return VM_FAULT_SIGBUS
;
3468 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3472 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3474 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3478 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3481 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3485 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3486 u32 kvm_nr_mmu_pages
)
3488 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3491 mutex_lock(&kvm
->slots_lock
);
3493 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3494 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3496 mutex_unlock(&kvm
->slots_lock
);
3500 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3502 return kvm
->arch
.n_max_mmu_pages
;
3505 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3510 switch (chip
->chip_id
) {
3511 case KVM_IRQCHIP_PIC_MASTER
:
3512 memcpy(&chip
->chip
.pic
,
3513 &pic_irqchip(kvm
)->pics
[0],
3514 sizeof(struct kvm_pic_state
));
3516 case KVM_IRQCHIP_PIC_SLAVE
:
3517 memcpy(&chip
->chip
.pic
,
3518 &pic_irqchip(kvm
)->pics
[1],
3519 sizeof(struct kvm_pic_state
));
3521 case KVM_IRQCHIP_IOAPIC
:
3522 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3531 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3536 switch (chip
->chip_id
) {
3537 case KVM_IRQCHIP_PIC_MASTER
:
3538 spin_lock(&pic_irqchip(kvm
)->lock
);
3539 memcpy(&pic_irqchip(kvm
)->pics
[0],
3541 sizeof(struct kvm_pic_state
));
3542 spin_unlock(&pic_irqchip(kvm
)->lock
);
3544 case KVM_IRQCHIP_PIC_SLAVE
:
3545 spin_lock(&pic_irqchip(kvm
)->lock
);
3546 memcpy(&pic_irqchip(kvm
)->pics
[1],
3548 sizeof(struct kvm_pic_state
));
3549 spin_unlock(&pic_irqchip(kvm
)->lock
);
3551 case KVM_IRQCHIP_IOAPIC
:
3552 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3558 kvm_pic_update_irq(pic_irqchip(kvm
));
3562 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3566 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3567 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3568 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3572 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3576 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3577 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3578 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3579 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3583 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3587 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3588 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3589 sizeof(ps
->channels
));
3590 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3591 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3592 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3596 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3598 int r
= 0, start
= 0;
3599 u32 prev_legacy
, cur_legacy
;
3600 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3601 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3602 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3603 if (!prev_legacy
&& cur_legacy
)
3605 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3606 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3607 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3608 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3609 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3613 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3614 struct kvm_reinject_control
*control
)
3616 if (!kvm
->arch
.vpit
)
3618 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3619 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3620 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3625 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3626 * @kvm: kvm instance
3627 * @log: slot id and address to which we copy the log
3629 * We need to keep it in mind that VCPU threads can write to the bitmap
3630 * concurrently. So, to avoid losing data, we keep the following order for
3633 * 1. Take a snapshot of the bit and clear it if needed.
3634 * 2. Write protect the corresponding page.
3635 * 3. Flush TLB's if needed.
3636 * 4. Copy the snapshot to the userspace.
3638 * Between 2 and 3, the guest may write to the page using the remaining TLB
3639 * entry. This is not a problem because the page will be reported dirty at
3640 * step 4 using the snapshot taken before and step 3 ensures that successive
3641 * writes will be logged for the next call.
3643 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3646 struct kvm_memory_slot
*memslot
;
3648 unsigned long *dirty_bitmap
;
3649 unsigned long *dirty_bitmap_buffer
;
3650 bool is_dirty
= false;
3652 mutex_lock(&kvm
->slots_lock
);
3655 if (log
->slot
>= KVM_USER_MEM_SLOTS
)
3658 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3660 dirty_bitmap
= memslot
->dirty_bitmap
;
3665 n
= kvm_dirty_bitmap_bytes(memslot
);
3667 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3668 memset(dirty_bitmap_buffer
, 0, n
);
3670 spin_lock(&kvm
->mmu_lock
);
3672 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3676 if (!dirty_bitmap
[i
])
3681 mask
= xchg(&dirty_bitmap
[i
], 0);
3682 dirty_bitmap_buffer
[i
] = mask
;
3684 offset
= i
* BITS_PER_LONG
;
3685 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3688 spin_unlock(&kvm
->mmu_lock
);
3690 /* See the comments in kvm_mmu_slot_remove_write_access(). */
3691 lockdep_assert_held(&kvm
->slots_lock
);
3694 * All the TLBs can be flushed out of mmu lock, see the comments in
3695 * kvm_mmu_slot_remove_write_access().
3698 kvm_flush_remote_tlbs(kvm
);
3701 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3706 mutex_unlock(&kvm
->slots_lock
);
3710 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3713 if (!irqchip_in_kernel(kvm
))
3716 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3717 irq_event
->irq
, irq_event
->level
,
3722 long kvm_arch_vm_ioctl(struct file
*filp
,
3723 unsigned int ioctl
, unsigned long arg
)
3725 struct kvm
*kvm
= filp
->private_data
;
3726 void __user
*argp
= (void __user
*)arg
;
3729 * This union makes it completely explicit to gcc-3.x
3730 * that these two variables' stack usage should be
3731 * combined, not added together.
3734 struct kvm_pit_state ps
;
3735 struct kvm_pit_state2 ps2
;
3736 struct kvm_pit_config pit_config
;
3740 case KVM_SET_TSS_ADDR
:
3741 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3743 case KVM_SET_IDENTITY_MAP_ADDR
: {
3747 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3749 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3752 case KVM_SET_NR_MMU_PAGES
:
3753 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3755 case KVM_GET_NR_MMU_PAGES
:
3756 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3758 case KVM_CREATE_IRQCHIP
: {
3759 struct kvm_pic
*vpic
;
3761 mutex_lock(&kvm
->lock
);
3764 goto create_irqchip_unlock
;
3766 if (atomic_read(&kvm
->online_vcpus
))
3767 goto create_irqchip_unlock
;
3769 vpic
= kvm_create_pic(kvm
);
3771 r
= kvm_ioapic_init(kvm
);
3773 mutex_lock(&kvm
->slots_lock
);
3774 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3776 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3778 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3780 mutex_unlock(&kvm
->slots_lock
);
3782 goto create_irqchip_unlock
;
3785 goto create_irqchip_unlock
;
3787 kvm
->arch
.vpic
= vpic
;
3789 r
= kvm_setup_default_irq_routing(kvm
);
3791 mutex_lock(&kvm
->slots_lock
);
3792 mutex_lock(&kvm
->irq_lock
);
3793 kvm_ioapic_destroy(kvm
);
3794 kvm_destroy_pic(kvm
);
3795 mutex_unlock(&kvm
->irq_lock
);
3796 mutex_unlock(&kvm
->slots_lock
);
3798 create_irqchip_unlock
:
3799 mutex_unlock(&kvm
->lock
);
3802 case KVM_CREATE_PIT
:
3803 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3805 case KVM_CREATE_PIT2
:
3807 if (copy_from_user(&u
.pit_config
, argp
,
3808 sizeof(struct kvm_pit_config
)))
3811 mutex_lock(&kvm
->slots_lock
);
3814 goto create_pit_unlock
;
3816 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3820 mutex_unlock(&kvm
->slots_lock
);
3822 case KVM_GET_IRQCHIP
: {
3823 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3824 struct kvm_irqchip
*chip
;
3826 chip
= memdup_user(argp
, sizeof(*chip
));
3833 if (!irqchip_in_kernel(kvm
))
3834 goto get_irqchip_out
;
3835 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3837 goto get_irqchip_out
;
3839 if (copy_to_user(argp
, chip
, sizeof *chip
))
3840 goto get_irqchip_out
;
3846 case KVM_SET_IRQCHIP
: {
3847 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3848 struct kvm_irqchip
*chip
;
3850 chip
= memdup_user(argp
, sizeof(*chip
));
3857 if (!irqchip_in_kernel(kvm
))
3858 goto set_irqchip_out
;
3859 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3861 goto set_irqchip_out
;
3869 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3872 if (!kvm
->arch
.vpit
)
3874 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3878 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3885 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3888 if (!kvm
->arch
.vpit
)
3890 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3893 case KVM_GET_PIT2
: {
3895 if (!kvm
->arch
.vpit
)
3897 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3901 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3906 case KVM_SET_PIT2
: {
3908 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3911 if (!kvm
->arch
.vpit
)
3913 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3916 case KVM_REINJECT_CONTROL
: {
3917 struct kvm_reinject_control control
;
3919 if (copy_from_user(&control
, argp
, sizeof(control
)))
3921 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3924 case KVM_XEN_HVM_CONFIG
: {
3926 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3927 sizeof(struct kvm_xen_hvm_config
)))
3930 if (kvm
->arch
.xen_hvm_config
.flags
)
3935 case KVM_SET_CLOCK
: {
3936 struct kvm_clock_data user_ns
;
3941 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3949 local_irq_disable();
3950 now_ns
= get_kernel_ns();
3951 delta
= user_ns
.clock
- now_ns
;
3953 kvm
->arch
.kvmclock_offset
= delta
;
3954 kvm_gen_update_masterclock(kvm
);
3957 case KVM_GET_CLOCK
: {
3958 struct kvm_clock_data user_ns
;
3961 local_irq_disable();
3962 now_ns
= get_kernel_ns();
3963 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3966 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3969 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3982 static void kvm_init_msr_list(void)
3987 /* skip the first msrs in the list. KVM-specific */
3988 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3989 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3993 * Even MSRs that are valid in the host may not be exposed
3994 * to the guests in some cases. We could work around this
3995 * in VMX with the generic MSR save/load machinery, but it
3996 * is not really worthwhile since it will really only
3997 * happen with nested virtualization.
3999 switch (msrs_to_save
[i
]) {
4000 case MSR_IA32_BNDCFGS
:
4001 if (!kvm_x86_ops
->mpx_supported())
4009 msrs_to_save
[j
] = msrs_to_save
[i
];
4012 num_msrs_to_save
= j
;
4015 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4023 if (!(vcpu
->arch
.apic
&&
4024 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4025 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
4036 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4043 if (!(vcpu
->arch
.apic
&&
4044 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4045 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
4047 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4057 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4058 struct kvm_segment
*var
, int seg
)
4060 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4063 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4064 struct kvm_segment
*var
, int seg
)
4066 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4069 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4070 struct x86_exception
*exception
)
4074 BUG_ON(!mmu_is_nested(vcpu
));
4076 /* NPT walks are always user-walks */
4077 access
|= PFERR_USER_MASK
;
4078 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4083 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4084 struct x86_exception
*exception
)
4086 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4087 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4090 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4091 struct x86_exception
*exception
)
4093 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4094 access
|= PFERR_FETCH_MASK
;
4095 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4098 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4099 struct x86_exception
*exception
)
4101 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4102 access
|= PFERR_WRITE_MASK
;
4103 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4106 /* uses this to access any guest's mapped memory without checking CPL */
4107 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4108 struct x86_exception
*exception
)
4110 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4113 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4114 struct kvm_vcpu
*vcpu
, u32 access
,
4115 struct x86_exception
*exception
)
4118 int r
= X86EMUL_CONTINUE
;
4121 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4123 unsigned offset
= addr
& (PAGE_SIZE
-1);
4124 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4127 if (gpa
== UNMAPPED_GVA
)
4128 return X86EMUL_PROPAGATE_FAULT
;
4129 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, data
,
4132 r
= X86EMUL_IO_NEEDED
;
4144 /* used for instruction fetching */
4145 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4146 gva_t addr
, void *val
, unsigned int bytes
,
4147 struct x86_exception
*exception
)
4149 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4150 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4154 /* Inline kvm_read_guest_virt_helper for speed. */
4155 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4157 if (unlikely(gpa
== UNMAPPED_GVA
))
4158 return X86EMUL_PROPAGATE_FAULT
;
4160 offset
= addr
& (PAGE_SIZE
-1);
4161 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4162 bytes
= (unsigned)PAGE_SIZE
- offset
;
4163 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, val
,
4165 if (unlikely(ret
< 0))
4166 return X86EMUL_IO_NEEDED
;
4168 return X86EMUL_CONTINUE
;
4171 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4172 gva_t addr
, void *val
, unsigned int bytes
,
4173 struct x86_exception
*exception
)
4175 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4176 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4178 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4181 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4183 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4184 gva_t addr
, void *val
, unsigned int bytes
,
4185 struct x86_exception
*exception
)
4187 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4188 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4191 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4192 gva_t addr
, void *val
,
4194 struct x86_exception
*exception
)
4196 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4198 int r
= X86EMUL_CONTINUE
;
4201 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4204 unsigned offset
= addr
& (PAGE_SIZE
-1);
4205 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4208 if (gpa
== UNMAPPED_GVA
)
4209 return X86EMUL_PROPAGATE_FAULT
;
4210 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4212 r
= X86EMUL_IO_NEEDED
;
4223 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4225 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4226 gpa_t
*gpa
, struct x86_exception
*exception
,
4229 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4230 | (write
? PFERR_WRITE_MASK
: 0);
4232 if (vcpu_match_mmio_gva(vcpu
, gva
)
4233 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4234 vcpu
->arch
.access
, access
)) {
4235 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4236 (gva
& (PAGE_SIZE
- 1));
4237 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4241 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4243 if (*gpa
== UNMAPPED_GVA
)
4246 /* For APIC access vmexit */
4247 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4250 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4251 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4258 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4259 const void *val
, int bytes
)
4263 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4266 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4270 struct read_write_emulator_ops
{
4271 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4273 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4274 void *val
, int bytes
);
4275 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4276 int bytes
, void *val
);
4277 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4278 void *val
, int bytes
);
4282 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4284 if (vcpu
->mmio_read_completed
) {
4285 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4286 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4287 vcpu
->mmio_read_completed
= 0;
4294 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4295 void *val
, int bytes
)
4297 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4300 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4301 void *val
, int bytes
)
4303 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4306 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4308 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4309 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4312 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4313 void *val
, int bytes
)
4315 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4316 return X86EMUL_IO_NEEDED
;
4319 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4320 void *val
, int bytes
)
4322 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4324 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4325 return X86EMUL_CONTINUE
;
4328 static const struct read_write_emulator_ops read_emultor
= {
4329 .read_write_prepare
= read_prepare
,
4330 .read_write_emulate
= read_emulate
,
4331 .read_write_mmio
= vcpu_mmio_read
,
4332 .read_write_exit_mmio
= read_exit_mmio
,
4335 static const struct read_write_emulator_ops write_emultor
= {
4336 .read_write_emulate
= write_emulate
,
4337 .read_write_mmio
= write_mmio
,
4338 .read_write_exit_mmio
= write_exit_mmio
,
4342 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4344 struct x86_exception
*exception
,
4345 struct kvm_vcpu
*vcpu
,
4346 const struct read_write_emulator_ops
*ops
)
4350 bool write
= ops
->write
;
4351 struct kvm_mmio_fragment
*frag
;
4353 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4356 return X86EMUL_PROPAGATE_FAULT
;
4358 /* For APIC access vmexit */
4362 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4363 return X86EMUL_CONTINUE
;
4367 * Is this MMIO handled locally?
4369 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4370 if (handled
== bytes
)
4371 return X86EMUL_CONTINUE
;
4377 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4378 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4382 return X86EMUL_CONTINUE
;
4385 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4386 void *val
, unsigned int bytes
,
4387 struct x86_exception
*exception
,
4388 const struct read_write_emulator_ops
*ops
)
4390 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4394 if (ops
->read_write_prepare
&&
4395 ops
->read_write_prepare(vcpu
, val
, bytes
))
4396 return X86EMUL_CONTINUE
;
4398 vcpu
->mmio_nr_fragments
= 0;
4400 /* Crossing a page boundary? */
4401 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4404 now
= -addr
& ~PAGE_MASK
;
4405 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4408 if (rc
!= X86EMUL_CONTINUE
)
4415 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4417 if (rc
!= X86EMUL_CONTINUE
)
4420 if (!vcpu
->mmio_nr_fragments
)
4423 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4425 vcpu
->mmio_needed
= 1;
4426 vcpu
->mmio_cur_fragment
= 0;
4428 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4429 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4430 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4431 vcpu
->run
->mmio
.phys_addr
= gpa
;
4433 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4436 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4440 struct x86_exception
*exception
)
4442 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4443 exception
, &read_emultor
);
4446 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4450 struct x86_exception
*exception
)
4452 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4453 exception
, &write_emultor
);
4456 #define CMPXCHG_TYPE(t, ptr, old, new) \
4457 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4459 #ifdef CONFIG_X86_64
4460 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4462 # define CMPXCHG64(ptr, old, new) \
4463 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4466 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4471 struct x86_exception
*exception
)
4473 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4479 /* guests cmpxchg8b have to be emulated atomically */
4480 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4483 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4485 if (gpa
== UNMAPPED_GVA
||
4486 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4489 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4492 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4493 if (is_error_page(page
))
4496 kaddr
= kmap_atomic(page
);
4497 kaddr
+= offset_in_page(gpa
);
4500 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4503 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4506 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4509 exchanged
= CMPXCHG64(kaddr
, old
, new);
4514 kunmap_atomic(kaddr
);
4515 kvm_release_page_dirty(page
);
4518 return X86EMUL_CMPXCHG_FAILED
;
4520 mark_page_dirty(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4521 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4523 return X86EMUL_CONTINUE
;
4526 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4528 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4531 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4533 /* TODO: String I/O for in kernel device */
4536 if (vcpu
->arch
.pio
.in
)
4537 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4538 vcpu
->arch
.pio
.size
, pd
);
4540 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4541 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4546 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4547 unsigned short port
, void *val
,
4548 unsigned int count
, bool in
)
4550 vcpu
->arch
.pio
.port
= port
;
4551 vcpu
->arch
.pio
.in
= in
;
4552 vcpu
->arch
.pio
.count
= count
;
4553 vcpu
->arch
.pio
.size
= size
;
4555 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4556 vcpu
->arch
.pio
.count
= 0;
4560 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4561 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4562 vcpu
->run
->io
.size
= size
;
4563 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4564 vcpu
->run
->io
.count
= count
;
4565 vcpu
->run
->io
.port
= port
;
4570 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4571 int size
, unsigned short port
, void *val
,
4574 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4577 if (vcpu
->arch
.pio
.count
)
4580 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4583 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4584 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4585 vcpu
->arch
.pio
.count
= 0;
4592 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4593 int size
, unsigned short port
,
4594 const void *val
, unsigned int count
)
4596 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4598 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4599 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4600 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4603 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4605 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4608 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4610 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4613 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4615 if (!need_emulate_wbinvd(vcpu
))
4616 return X86EMUL_CONTINUE
;
4618 if (kvm_x86_ops
->has_wbinvd_exit()) {
4619 int cpu
= get_cpu();
4621 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4622 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4623 wbinvd_ipi
, NULL
, 1);
4625 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4628 return X86EMUL_CONTINUE
;
4630 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4632 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4634 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4637 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4639 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4642 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4645 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4648 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4650 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4653 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4655 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4656 unsigned long value
;
4660 value
= kvm_read_cr0(vcpu
);
4663 value
= vcpu
->arch
.cr2
;
4666 value
= kvm_read_cr3(vcpu
);
4669 value
= kvm_read_cr4(vcpu
);
4672 value
= kvm_get_cr8(vcpu
);
4675 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4682 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4684 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4689 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4692 vcpu
->arch
.cr2
= val
;
4695 res
= kvm_set_cr3(vcpu
, val
);
4698 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4701 res
= kvm_set_cr8(vcpu
, val
);
4704 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4711 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4713 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4716 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4718 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4721 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4723 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4726 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4728 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4731 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4733 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4736 static unsigned long emulator_get_cached_segment_base(
4737 struct x86_emulate_ctxt
*ctxt
, int seg
)
4739 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4742 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4743 struct desc_struct
*desc
, u32
*base3
,
4746 struct kvm_segment var
;
4748 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4749 *selector
= var
.selector
;
4752 memset(desc
, 0, sizeof(*desc
));
4758 set_desc_limit(desc
, var
.limit
);
4759 set_desc_base(desc
, (unsigned long)var
.base
);
4760 #ifdef CONFIG_X86_64
4762 *base3
= var
.base
>> 32;
4764 desc
->type
= var
.type
;
4766 desc
->dpl
= var
.dpl
;
4767 desc
->p
= var
.present
;
4768 desc
->avl
= var
.avl
;
4776 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4777 struct desc_struct
*desc
, u32 base3
,
4780 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4781 struct kvm_segment var
;
4783 var
.selector
= selector
;
4784 var
.base
= get_desc_base(desc
);
4785 #ifdef CONFIG_X86_64
4786 var
.base
|= ((u64
)base3
) << 32;
4788 var
.limit
= get_desc_limit(desc
);
4790 var
.limit
= (var
.limit
<< 12) | 0xfff;
4791 var
.type
= desc
->type
;
4792 var
.dpl
= desc
->dpl
;
4797 var
.avl
= desc
->avl
;
4798 var
.present
= desc
->p
;
4799 var
.unusable
= !var
.present
;
4802 kvm_set_segment(vcpu
, &var
, seg
);
4806 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4807 u32 msr_index
, u64
*pdata
)
4809 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4812 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4813 u32 msr_index
, u64 data
)
4815 struct msr_data msr
;
4818 msr
.index
= msr_index
;
4819 msr
.host_initiated
= false;
4820 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4823 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4826 return kvm_pmu_check_pmc(emul_to_vcpu(ctxt
), pmc
);
4829 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4830 u32 pmc
, u64
*pdata
)
4832 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4835 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4837 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4840 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4843 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4845 * CR0.TS may reference the host fpu state, not the guest fpu state,
4846 * so it may be clear at this point.
4851 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4856 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4857 struct x86_instruction_info
*info
,
4858 enum x86_intercept_stage stage
)
4860 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4863 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4864 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4866 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4869 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4871 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4874 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4876 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4879 static const struct x86_emulate_ops emulate_ops
= {
4880 .read_gpr
= emulator_read_gpr
,
4881 .write_gpr
= emulator_write_gpr
,
4882 .read_std
= kvm_read_guest_virt_system
,
4883 .write_std
= kvm_write_guest_virt_system
,
4884 .fetch
= kvm_fetch_guest_virt
,
4885 .read_emulated
= emulator_read_emulated
,
4886 .write_emulated
= emulator_write_emulated
,
4887 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4888 .invlpg
= emulator_invlpg
,
4889 .pio_in_emulated
= emulator_pio_in_emulated
,
4890 .pio_out_emulated
= emulator_pio_out_emulated
,
4891 .get_segment
= emulator_get_segment
,
4892 .set_segment
= emulator_set_segment
,
4893 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4894 .get_gdt
= emulator_get_gdt
,
4895 .get_idt
= emulator_get_idt
,
4896 .set_gdt
= emulator_set_gdt
,
4897 .set_idt
= emulator_set_idt
,
4898 .get_cr
= emulator_get_cr
,
4899 .set_cr
= emulator_set_cr
,
4900 .cpl
= emulator_get_cpl
,
4901 .get_dr
= emulator_get_dr
,
4902 .set_dr
= emulator_set_dr
,
4903 .set_msr
= emulator_set_msr
,
4904 .get_msr
= emulator_get_msr
,
4905 .check_pmc
= emulator_check_pmc
,
4906 .read_pmc
= emulator_read_pmc
,
4907 .halt
= emulator_halt
,
4908 .wbinvd
= emulator_wbinvd
,
4909 .fix_hypercall
= emulator_fix_hypercall
,
4910 .get_fpu
= emulator_get_fpu
,
4911 .put_fpu
= emulator_put_fpu
,
4912 .intercept
= emulator_intercept
,
4913 .get_cpuid
= emulator_get_cpuid
,
4916 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4918 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
4920 * an sti; sti; sequence only disable interrupts for the first
4921 * instruction. So, if the last instruction, be it emulated or
4922 * not, left the system with the INT_STI flag enabled, it
4923 * means that the last instruction is an sti. We should not
4924 * leave the flag on in this case. The same goes for mov ss
4926 if (int_shadow
& mask
)
4928 if (unlikely(int_shadow
|| mask
)) {
4929 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4931 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4935 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4937 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4938 if (ctxt
->exception
.vector
== PF_VECTOR
)
4939 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4941 if (ctxt
->exception
.error_code_valid
)
4942 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4943 ctxt
->exception
.error_code
);
4945 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4949 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4951 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4954 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4956 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4957 ctxt
->eip
= kvm_rip_read(vcpu
);
4958 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4959 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4960 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
4961 cs_db
? X86EMUL_MODE_PROT32
:
4962 X86EMUL_MODE_PROT16
;
4963 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4965 init_decode_cache(ctxt
);
4966 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4969 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4971 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4974 init_emulate_ctxt(vcpu
);
4978 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4979 ret
= emulate_int_real(ctxt
, irq
);
4981 if (ret
!= X86EMUL_CONTINUE
)
4982 return EMULATE_FAIL
;
4984 ctxt
->eip
= ctxt
->_eip
;
4985 kvm_rip_write(vcpu
, ctxt
->eip
);
4986 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4988 if (irq
== NMI_VECTOR
)
4989 vcpu
->arch
.nmi_pending
= 0;
4991 vcpu
->arch
.interrupt
.pending
= false;
4993 return EMULATE_DONE
;
4995 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4997 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4999 int r
= EMULATE_DONE
;
5001 ++vcpu
->stat
.insn_emulation_fail
;
5002 trace_kvm_emulate_insn_failed(vcpu
);
5003 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5004 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5005 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5006 vcpu
->run
->internal
.ndata
= 0;
5009 kvm_queue_exception(vcpu
, UD_VECTOR
);
5014 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5015 bool write_fault_to_shadow_pgtable
,
5021 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5024 if (!vcpu
->arch
.mmu
.direct_map
) {
5026 * Write permission should be allowed since only
5027 * write access need to be emulated.
5029 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5032 * If the mapping is invalid in guest, let cpu retry
5033 * it to generate fault.
5035 if (gpa
== UNMAPPED_GVA
)
5040 * Do not retry the unhandleable instruction if it faults on the
5041 * readonly host memory, otherwise it will goto a infinite loop:
5042 * retry instruction -> write #PF -> emulation fail -> retry
5043 * instruction -> ...
5045 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5048 * If the instruction failed on the error pfn, it can not be fixed,
5049 * report the error to userspace.
5051 if (is_error_noslot_pfn(pfn
))
5054 kvm_release_pfn_clean(pfn
);
5056 /* The instructions are well-emulated on direct mmu. */
5057 if (vcpu
->arch
.mmu
.direct_map
) {
5058 unsigned int indirect_shadow_pages
;
5060 spin_lock(&vcpu
->kvm
->mmu_lock
);
5061 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5062 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5064 if (indirect_shadow_pages
)
5065 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5071 * if emulation was due to access to shadowed page table
5072 * and it failed try to unshadow page and re-enter the
5073 * guest to let CPU execute the instruction.
5075 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5078 * If the access faults on its page table, it can not
5079 * be fixed by unprotecting shadow page and it should
5080 * be reported to userspace.
5082 return !write_fault_to_shadow_pgtable
;
5085 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5086 unsigned long cr2
, int emulation_type
)
5088 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5089 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5091 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5092 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5095 * If the emulation is caused by #PF and it is non-page_table
5096 * writing instruction, it means the VM-EXIT is caused by shadow
5097 * page protected, we can zap the shadow page and retry this
5098 * instruction directly.
5100 * Note: if the guest uses a non-page-table modifying instruction
5101 * on the PDE that points to the instruction, then we will unmap
5102 * the instruction and go to an infinite loop. So, we cache the
5103 * last retried eip and the last fault address, if we meet the eip
5104 * and the address again, we can break out of the potential infinite
5107 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5109 if (!(emulation_type
& EMULTYPE_RETRY
))
5112 if (x86_page_table_writing_insn(ctxt
))
5115 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5118 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5119 vcpu
->arch
.last_retry_addr
= cr2
;
5121 if (!vcpu
->arch
.mmu
.direct_map
)
5122 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5124 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5129 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5130 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5132 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5141 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5142 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5147 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5149 struct kvm_run
*kvm_run
= vcpu
->run
;
5152 * rflags is the old, "raw" value of the flags. The new value has
5153 * not been saved yet.
5155 * This is correct even for TF set by the guest, because "the
5156 * processor will not generate this exception after the instruction
5157 * that sets the TF flag".
5159 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5160 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5161 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5163 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5164 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5165 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5166 *r
= EMULATE_USER_EXIT
;
5168 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5170 * "Certain debug exceptions may clear bit 0-3. The
5171 * remaining contents of the DR6 register are never
5172 * cleared by the processor".
5174 vcpu
->arch
.dr6
&= ~15;
5175 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5176 kvm_queue_exception(vcpu
, DB_VECTOR
);
5181 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5183 struct kvm_run
*kvm_run
= vcpu
->run
;
5184 unsigned long eip
= vcpu
->arch
.emulate_ctxt
.eip
;
5187 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5188 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5189 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5190 vcpu
->arch
.guest_debug_dr7
,
5194 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5195 kvm_run
->debug
.arch
.pc
= kvm_rip_read(vcpu
) +
5196 get_segment_base(vcpu
, VCPU_SREG_CS
);
5198 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5199 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5200 *r
= EMULATE_USER_EXIT
;
5205 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5206 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5207 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5212 vcpu
->arch
.dr6
&= ~15;
5213 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5214 kvm_queue_exception(vcpu
, DB_VECTOR
);
5223 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5230 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5231 bool writeback
= true;
5232 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5235 * Clear write_fault_to_shadow_pgtable here to ensure it is
5238 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5239 kvm_clear_exception_queue(vcpu
);
5241 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5242 init_emulate_ctxt(vcpu
);
5245 * We will reenter on the same instruction since
5246 * we do not set complete_userspace_io. This does not
5247 * handle watchpoints yet, those would be handled in
5250 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5253 ctxt
->interruptibility
= 0;
5254 ctxt
->have_exception
= false;
5255 ctxt
->exception
.vector
= -1;
5256 ctxt
->perm_ok
= false;
5258 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5260 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5262 trace_kvm_emulate_insn_start(vcpu
);
5263 ++vcpu
->stat
.insn_emulation
;
5264 if (r
!= EMULATION_OK
) {
5265 if (emulation_type
& EMULTYPE_TRAP_UD
)
5266 return EMULATE_FAIL
;
5267 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5269 return EMULATE_DONE
;
5270 if (emulation_type
& EMULTYPE_SKIP
)
5271 return EMULATE_FAIL
;
5272 return handle_emulation_failure(vcpu
);
5276 if (emulation_type
& EMULTYPE_SKIP
) {
5277 kvm_rip_write(vcpu
, ctxt
->_eip
);
5278 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5279 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5280 return EMULATE_DONE
;
5283 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5284 return EMULATE_DONE
;
5286 /* this is needed for vmware backdoor interface to work since it
5287 changes registers values during IO operation */
5288 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5289 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5290 emulator_invalidate_register_cache(ctxt
);
5294 r
= x86_emulate_insn(ctxt
);
5296 if (r
== EMULATION_INTERCEPTED
)
5297 return EMULATE_DONE
;
5299 if (r
== EMULATION_FAILED
) {
5300 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5302 return EMULATE_DONE
;
5304 return handle_emulation_failure(vcpu
);
5307 if (ctxt
->have_exception
) {
5309 if (inject_emulated_exception(vcpu
))
5311 } else if (vcpu
->arch
.pio
.count
) {
5312 if (!vcpu
->arch
.pio
.in
) {
5313 /* FIXME: return into emulator if single-stepping. */
5314 vcpu
->arch
.pio
.count
= 0;
5317 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5319 r
= EMULATE_USER_EXIT
;
5320 } else if (vcpu
->mmio_needed
) {
5321 if (!vcpu
->mmio_is_write
)
5323 r
= EMULATE_USER_EXIT
;
5324 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5325 } else if (r
== EMULATION_RESTART
)
5331 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5332 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5333 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5334 kvm_rip_write(vcpu
, ctxt
->eip
);
5335 if (r
== EMULATE_DONE
)
5336 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5337 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5340 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5341 * do nothing, and it will be requested again as soon as
5342 * the shadow expires. But we still need to check here,
5343 * because POPF has no interrupt shadow.
5345 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5346 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5348 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5352 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5354 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5356 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5357 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5358 size
, port
, &val
, 1);
5359 /* do not return to emulator after return from userspace */
5360 vcpu
->arch
.pio
.count
= 0;
5363 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5365 static void tsc_bad(void *info
)
5367 __this_cpu_write(cpu_tsc_khz
, 0);
5370 static void tsc_khz_changed(void *data
)
5372 struct cpufreq_freqs
*freq
= data
;
5373 unsigned long khz
= 0;
5377 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5378 khz
= cpufreq_quick_get(raw_smp_processor_id());
5381 __this_cpu_write(cpu_tsc_khz
, khz
);
5384 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5387 struct cpufreq_freqs
*freq
= data
;
5389 struct kvm_vcpu
*vcpu
;
5390 int i
, send_ipi
= 0;
5393 * We allow guests to temporarily run on slowing clocks,
5394 * provided we notify them after, or to run on accelerating
5395 * clocks, provided we notify them before. Thus time never
5398 * However, we have a problem. We can't atomically update
5399 * the frequency of a given CPU from this function; it is
5400 * merely a notifier, which can be called from any CPU.
5401 * Changing the TSC frequency at arbitrary points in time
5402 * requires a recomputation of local variables related to
5403 * the TSC for each VCPU. We must flag these local variables
5404 * to be updated and be sure the update takes place with the
5405 * new frequency before any guests proceed.
5407 * Unfortunately, the combination of hotplug CPU and frequency
5408 * change creates an intractable locking scenario; the order
5409 * of when these callouts happen is undefined with respect to
5410 * CPU hotplug, and they can race with each other. As such,
5411 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5412 * undefined; you can actually have a CPU frequency change take
5413 * place in between the computation of X and the setting of the
5414 * variable. To protect against this problem, all updates of
5415 * the per_cpu tsc_khz variable are done in an interrupt
5416 * protected IPI, and all callers wishing to update the value
5417 * must wait for a synchronous IPI to complete (which is trivial
5418 * if the caller is on the CPU already). This establishes the
5419 * necessary total order on variable updates.
5421 * Note that because a guest time update may take place
5422 * anytime after the setting of the VCPU's request bit, the
5423 * correct TSC value must be set before the request. However,
5424 * to ensure the update actually makes it to any guest which
5425 * starts running in hardware virtualization between the set
5426 * and the acquisition of the spinlock, we must also ping the
5427 * CPU after setting the request bit.
5431 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5433 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5436 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5438 spin_lock(&kvm_lock
);
5439 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5440 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5441 if (vcpu
->cpu
!= freq
->cpu
)
5443 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5444 if (vcpu
->cpu
!= smp_processor_id())
5448 spin_unlock(&kvm_lock
);
5450 if (freq
->old
< freq
->new && send_ipi
) {
5452 * We upscale the frequency. Must make the guest
5453 * doesn't see old kvmclock values while running with
5454 * the new frequency, otherwise we risk the guest sees
5455 * time go backwards.
5457 * In case we update the frequency for another cpu
5458 * (which might be in guest context) send an interrupt
5459 * to kick the cpu out of guest context. Next time
5460 * guest context is entered kvmclock will be updated,
5461 * so the guest will not see stale values.
5463 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5468 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5469 .notifier_call
= kvmclock_cpufreq_notifier
5472 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5473 unsigned long action
, void *hcpu
)
5475 unsigned int cpu
= (unsigned long)hcpu
;
5479 case CPU_DOWN_FAILED
:
5480 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5482 case CPU_DOWN_PREPARE
:
5483 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5489 static struct notifier_block kvmclock_cpu_notifier_block
= {
5490 .notifier_call
= kvmclock_cpu_notifier
,
5491 .priority
= -INT_MAX
5494 static void kvm_timer_init(void)
5498 max_tsc_khz
= tsc_khz
;
5500 cpu_notifier_register_begin();
5501 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5502 #ifdef CONFIG_CPU_FREQ
5503 struct cpufreq_policy policy
;
5504 memset(&policy
, 0, sizeof(policy
));
5506 cpufreq_get_policy(&policy
, cpu
);
5507 if (policy
.cpuinfo
.max_freq
)
5508 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5511 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5512 CPUFREQ_TRANSITION_NOTIFIER
);
5514 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5515 for_each_online_cpu(cpu
)
5516 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5518 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5519 cpu_notifier_register_done();
5523 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5525 int kvm_is_in_guest(void)
5527 return __this_cpu_read(current_vcpu
) != NULL
;
5530 static int kvm_is_user_mode(void)
5534 if (__this_cpu_read(current_vcpu
))
5535 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5537 return user_mode
!= 0;
5540 static unsigned long kvm_get_guest_ip(void)
5542 unsigned long ip
= 0;
5544 if (__this_cpu_read(current_vcpu
))
5545 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5550 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5551 .is_in_guest
= kvm_is_in_guest
,
5552 .is_user_mode
= kvm_is_user_mode
,
5553 .get_guest_ip
= kvm_get_guest_ip
,
5556 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5558 __this_cpu_write(current_vcpu
, vcpu
);
5560 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5562 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5564 __this_cpu_write(current_vcpu
, NULL
);
5566 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5568 static void kvm_set_mmio_spte_mask(void)
5571 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5574 * Set the reserved bits and the present bit of an paging-structure
5575 * entry to generate page fault with PFER.RSV = 1.
5577 /* Mask the reserved physical address bits. */
5578 mask
= rsvd_bits(maxphyaddr
, 51);
5580 /* Bit 62 is always reserved for 32bit host. */
5581 mask
|= 0x3ull
<< 62;
5583 /* Set the present bit. */
5586 #ifdef CONFIG_X86_64
5588 * If reserved bit is not supported, clear the present bit to disable
5591 if (maxphyaddr
== 52)
5595 kvm_mmu_set_mmio_spte_mask(mask
);
5598 #ifdef CONFIG_X86_64
5599 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5603 struct kvm_vcpu
*vcpu
;
5606 spin_lock(&kvm_lock
);
5607 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5608 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5609 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5610 atomic_set(&kvm_guest_has_master_clock
, 0);
5611 spin_unlock(&kvm_lock
);
5614 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5617 * Notification about pvclock gtod data update.
5619 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5622 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5623 struct timekeeper
*tk
= priv
;
5625 update_pvclock_gtod(tk
);
5627 /* disable master clock if host does not trust, or does not
5628 * use, TSC clocksource
5630 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5631 atomic_read(&kvm_guest_has_master_clock
) != 0)
5632 queue_work(system_long_wq
, &pvclock_gtod_work
);
5637 static struct notifier_block pvclock_gtod_notifier
= {
5638 .notifier_call
= pvclock_gtod_notify
,
5642 int kvm_arch_init(void *opaque
)
5645 struct kvm_x86_ops
*ops
= opaque
;
5648 printk(KERN_ERR
"kvm: already loaded the other module\n");
5653 if (!ops
->cpu_has_kvm_support()) {
5654 printk(KERN_ERR
"kvm: no hardware support\n");
5658 if (ops
->disabled_by_bios()) {
5659 printk(KERN_ERR
"kvm: disabled by bios\n");
5665 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5667 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5671 r
= kvm_mmu_module_init();
5673 goto out_free_percpu
;
5675 kvm_set_mmio_spte_mask();
5678 kvm_init_msr_list();
5680 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5681 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5685 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5688 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5691 #ifdef CONFIG_X86_64
5692 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5698 free_percpu(shared_msrs
);
5703 void kvm_arch_exit(void)
5705 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5707 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5708 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5709 CPUFREQ_TRANSITION_NOTIFIER
);
5710 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5711 #ifdef CONFIG_X86_64
5712 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5715 kvm_mmu_module_exit();
5716 free_percpu(shared_msrs
);
5719 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5721 ++vcpu
->stat
.halt_exits
;
5722 if (irqchip_in_kernel(vcpu
->kvm
)) {
5723 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5726 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5730 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5732 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5734 u64 param
, ingpa
, outgpa
, ret
;
5735 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5736 bool fast
, longmode
;
5739 * hypercall generates UD from non zero cpl and real mode
5742 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5743 kvm_queue_exception(vcpu
, UD_VECTOR
);
5747 longmode
= is_64_bit_mode(vcpu
);
5750 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5751 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5752 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5753 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5754 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5755 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5757 #ifdef CONFIG_X86_64
5759 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5760 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5761 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5765 code
= param
& 0xffff;
5766 fast
= (param
>> 16) & 0x1;
5767 rep_cnt
= (param
>> 32) & 0xfff;
5768 rep_idx
= (param
>> 48) & 0xfff;
5770 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5773 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5774 kvm_vcpu_on_spin(vcpu
);
5777 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5781 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5783 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5785 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5786 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5793 * kvm_pv_kick_cpu_op: Kick a vcpu.
5795 * @apicid - apicid of vcpu to be kicked.
5797 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5799 struct kvm_lapic_irq lapic_irq
;
5801 lapic_irq
.shorthand
= 0;
5802 lapic_irq
.dest_mode
= 0;
5803 lapic_irq
.dest_id
= apicid
;
5805 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5806 kvm_irq_delivery_to_apic(kvm
, 0, &lapic_irq
, NULL
);
5809 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5811 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5812 int op_64_bit
, r
= 1;
5814 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5815 return kvm_hv_hypercall(vcpu
);
5817 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5818 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5819 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5820 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5821 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5823 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5825 op_64_bit
= is_64_bit_mode(vcpu
);
5834 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5840 case KVM_HC_VAPIC_POLL_IRQ
:
5843 case KVM_HC_KICK_CPU
:
5844 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5854 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5855 ++vcpu
->stat
.hypercalls
;
5858 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5860 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5862 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5863 char instruction
[3];
5864 unsigned long rip
= kvm_rip_read(vcpu
);
5866 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5868 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5872 * Check if userspace requested an interrupt window, and that the
5873 * interrupt window is open.
5875 * No need to exit to userspace if we already have an interrupt queued.
5877 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5879 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5880 vcpu
->run
->request_interrupt_window
&&
5881 kvm_arch_interrupt_allowed(vcpu
));
5884 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5886 struct kvm_run
*kvm_run
= vcpu
->run
;
5888 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5889 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5890 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5891 if (irqchip_in_kernel(vcpu
->kvm
))
5892 kvm_run
->ready_for_interrupt_injection
= 1;
5894 kvm_run
->ready_for_interrupt_injection
=
5895 kvm_arch_interrupt_allowed(vcpu
) &&
5896 !kvm_cpu_has_interrupt(vcpu
) &&
5897 !kvm_event_needs_reinjection(vcpu
);
5900 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5904 if (!kvm_x86_ops
->update_cr8_intercept
)
5907 if (!vcpu
->arch
.apic
)
5910 if (!vcpu
->arch
.apic
->vapic_addr
)
5911 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5918 tpr
= kvm_lapic_get_cr8(vcpu
);
5920 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5923 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
5927 /* try to reinject previous events if any */
5928 if (vcpu
->arch
.exception
.pending
) {
5929 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5930 vcpu
->arch
.exception
.has_error_code
,
5931 vcpu
->arch
.exception
.error_code
);
5933 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
5934 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
5937 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5938 vcpu
->arch
.exception
.has_error_code
,
5939 vcpu
->arch
.exception
.error_code
,
5940 vcpu
->arch
.exception
.reinject
);
5944 if (vcpu
->arch
.nmi_injected
) {
5945 kvm_x86_ops
->set_nmi(vcpu
);
5949 if (vcpu
->arch
.interrupt
.pending
) {
5950 kvm_x86_ops
->set_irq(vcpu
);
5954 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5955 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5960 /* try to inject new event if pending */
5961 if (vcpu
->arch
.nmi_pending
) {
5962 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5963 --vcpu
->arch
.nmi_pending
;
5964 vcpu
->arch
.nmi_injected
= true;
5965 kvm_x86_ops
->set_nmi(vcpu
);
5967 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5969 * Because interrupts can be injected asynchronously, we are
5970 * calling check_nested_events again here to avoid a race condition.
5971 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5972 * proposal and current concerns. Perhaps we should be setting
5973 * KVM_REQ_EVENT only on certain events and not unconditionally?
5975 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5976 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5980 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5981 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5983 kvm_x86_ops
->set_irq(vcpu
);
5989 static void process_nmi(struct kvm_vcpu
*vcpu
)
5994 * x86 is limited to one NMI running, and one NMI pending after it.
5995 * If an NMI is already in progress, limit further NMIs to just one.
5996 * Otherwise, allow two (and we'll inject the first one immediately).
5998 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6001 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6002 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6003 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6006 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6008 u64 eoi_exit_bitmap
[4];
6011 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6014 memset(eoi_exit_bitmap
, 0, 32);
6017 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
6018 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6019 kvm_apic_update_tmr(vcpu
, tmr
);
6022 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6024 ++vcpu
->stat
.tlb_flush
;
6025 kvm_x86_ops
->tlb_flush(vcpu
);
6029 * Returns 1 to let __vcpu_run() continue the guest execution loop without
6030 * exiting to the userspace. Otherwise, the value will be returned to the
6033 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6036 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
6037 vcpu
->run
->request_interrupt_window
;
6038 bool req_immediate_exit
= false;
6040 if (vcpu
->requests
) {
6041 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6042 kvm_mmu_unload(vcpu
);
6043 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6044 __kvm_migrate_timers(vcpu
);
6045 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6046 kvm_gen_update_masterclock(vcpu
->kvm
);
6047 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6048 kvm_gen_kvmclock_update(vcpu
);
6049 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6050 r
= kvm_guest_time_update(vcpu
);
6054 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6055 kvm_mmu_sync_roots(vcpu
);
6056 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6057 kvm_vcpu_flush_tlb(vcpu
);
6058 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6059 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6063 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6064 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6068 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6069 vcpu
->fpu_active
= 0;
6070 kvm_x86_ops
->fpu_deactivate(vcpu
);
6072 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6073 /* Page is swapped out. Do synthetic halt */
6074 vcpu
->arch
.apf
.halted
= true;
6078 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6079 record_steal_time(vcpu
);
6080 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6082 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6083 kvm_handle_pmu_event(vcpu
);
6084 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6085 kvm_deliver_pmi(vcpu
);
6086 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6087 vcpu_scan_ioapic(vcpu
);
6090 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6091 kvm_apic_accept_events(vcpu
);
6092 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6097 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6098 req_immediate_exit
= true;
6099 /* enable NMI/IRQ window open exits if needed */
6100 else if (vcpu
->arch
.nmi_pending
)
6101 kvm_x86_ops
->enable_nmi_window(vcpu
);
6102 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6103 kvm_x86_ops
->enable_irq_window(vcpu
);
6105 if (kvm_lapic_enabled(vcpu
)) {
6107 * Update architecture specific hints for APIC
6108 * virtual interrupt delivery.
6110 if (kvm_x86_ops
->hwapic_irr_update
)
6111 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6112 kvm_lapic_find_highest_irr(vcpu
));
6113 update_cr8_intercept(vcpu
);
6114 kvm_lapic_sync_to_vapic(vcpu
);
6118 r
= kvm_mmu_reload(vcpu
);
6120 goto cancel_injection
;
6125 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6126 if (vcpu
->fpu_active
)
6127 kvm_load_guest_fpu(vcpu
);
6128 kvm_load_guest_xcr0(vcpu
);
6130 vcpu
->mode
= IN_GUEST_MODE
;
6132 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6134 /* We should set ->mode before check ->requests,
6135 * see the comment in make_all_cpus_request.
6137 smp_mb__after_srcu_read_unlock();
6139 local_irq_disable();
6141 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6142 || need_resched() || signal_pending(current
)) {
6143 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6147 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6149 goto cancel_injection
;
6152 if (req_immediate_exit
)
6153 smp_send_reschedule(vcpu
->cpu
);
6157 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6159 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6160 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6161 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6162 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6163 set_debugreg(vcpu
->arch
.dr6
, 6);
6166 trace_kvm_entry(vcpu
->vcpu_id
);
6167 kvm_x86_ops
->run(vcpu
);
6170 * Do this here before restoring debug registers on the host. And
6171 * since we do this before handling the vmexit, a DR access vmexit
6172 * can (a) read the correct value of the debug registers, (b) set
6173 * KVM_DEBUGREG_WONT_EXIT again.
6175 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6178 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6179 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6180 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6181 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6185 * If the guest has used debug registers, at least dr7
6186 * will be disabled while returning to the host.
6187 * If we don't have active breakpoints in the host, we don't
6188 * care about the messed up debug address registers. But if
6189 * we have some of them active, restore the old state.
6191 if (hw_breakpoint_active())
6192 hw_breakpoint_restore();
6194 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6197 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6200 /* Interrupt is enabled by handle_external_intr() */
6201 kvm_x86_ops
->handle_external_intr(vcpu
);
6206 * We must have an instruction between local_irq_enable() and
6207 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6208 * the interrupt shadow. The stat.exits increment will do nicely.
6209 * But we need to prevent reordering, hence this barrier():
6217 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6220 * Profile KVM exit RIPs:
6222 if (unlikely(prof_on
== KVM_PROFILING
)) {
6223 unsigned long rip
= kvm_rip_read(vcpu
);
6224 profile_hit(KVM_PROFILING
, (void *)rip
);
6227 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6228 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6230 if (vcpu
->arch
.apic_attention
)
6231 kvm_lapic_sync_from_vapic(vcpu
);
6233 r
= kvm_x86_ops
->handle_exit(vcpu
);
6237 kvm_x86_ops
->cancel_injection(vcpu
);
6238 if (unlikely(vcpu
->arch
.apic_attention
))
6239 kvm_lapic_sync_from_vapic(vcpu
);
6245 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
6248 struct kvm
*kvm
= vcpu
->kvm
;
6250 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6254 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6255 !vcpu
->arch
.apf
.halted
)
6256 r
= vcpu_enter_guest(vcpu
);
6258 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6259 kvm_vcpu_block(vcpu
);
6260 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6261 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
)) {
6262 kvm_apic_accept_events(vcpu
);
6263 switch(vcpu
->arch
.mp_state
) {
6264 case KVM_MP_STATE_HALTED
:
6265 vcpu
->arch
.pv
.pv_unhalted
= false;
6266 vcpu
->arch
.mp_state
=
6267 KVM_MP_STATE_RUNNABLE
;
6268 case KVM_MP_STATE_RUNNABLE
:
6269 vcpu
->arch
.apf
.halted
= false;
6271 case KVM_MP_STATE_INIT_RECEIVED
:
6283 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6284 if (kvm_cpu_has_pending_timer(vcpu
))
6285 kvm_inject_pending_timer_irqs(vcpu
);
6287 if (dm_request_for_irq_injection(vcpu
)) {
6289 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6290 ++vcpu
->stat
.request_irq_exits
;
6293 kvm_check_async_pf_completion(vcpu
);
6295 if (signal_pending(current
)) {
6297 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6298 ++vcpu
->stat
.signal_exits
;
6300 if (need_resched()) {
6301 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6303 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6307 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6312 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6315 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6316 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6317 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6318 if (r
!= EMULATE_DONE
)
6323 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6325 BUG_ON(!vcpu
->arch
.pio
.count
);
6327 return complete_emulated_io(vcpu
);
6331 * Implements the following, as a state machine:
6335 * for each mmio piece in the fragment
6343 * for each mmio piece in the fragment
6348 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6350 struct kvm_run
*run
= vcpu
->run
;
6351 struct kvm_mmio_fragment
*frag
;
6354 BUG_ON(!vcpu
->mmio_needed
);
6356 /* Complete previous fragment */
6357 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6358 len
= min(8u, frag
->len
);
6359 if (!vcpu
->mmio_is_write
)
6360 memcpy(frag
->data
, run
->mmio
.data
, len
);
6362 if (frag
->len
<= 8) {
6363 /* Switch to the next fragment. */
6365 vcpu
->mmio_cur_fragment
++;
6367 /* Go forward to the next mmio piece. */
6373 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6374 vcpu
->mmio_needed
= 0;
6376 /* FIXME: return into emulator if single-stepping. */
6377 if (vcpu
->mmio_is_write
)
6379 vcpu
->mmio_read_completed
= 1;
6380 return complete_emulated_io(vcpu
);
6383 run
->exit_reason
= KVM_EXIT_MMIO
;
6384 run
->mmio
.phys_addr
= frag
->gpa
;
6385 if (vcpu
->mmio_is_write
)
6386 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6387 run
->mmio
.len
= min(8u, frag
->len
);
6388 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6389 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6394 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6399 if (!tsk_used_math(current
) && init_fpu(current
))
6402 if (vcpu
->sigset_active
)
6403 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6405 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6406 kvm_vcpu_block(vcpu
);
6407 kvm_apic_accept_events(vcpu
);
6408 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6413 /* re-sync apic's tpr */
6414 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6415 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6421 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6422 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6423 vcpu
->arch
.complete_userspace_io
= NULL
;
6428 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6430 r
= __vcpu_run(vcpu
);
6433 post_kvm_run_save(vcpu
);
6434 if (vcpu
->sigset_active
)
6435 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6440 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6442 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6444 * We are here if userspace calls get_regs() in the middle of
6445 * instruction emulation. Registers state needs to be copied
6446 * back from emulation context to vcpu. Userspace shouldn't do
6447 * that usually, but some bad designed PV devices (vmware
6448 * backdoor interface) need this to work
6450 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6451 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6453 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6454 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6455 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6456 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6457 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6458 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6459 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6460 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6461 #ifdef CONFIG_X86_64
6462 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6463 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6464 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6465 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6466 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6467 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6468 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6469 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6472 regs
->rip
= kvm_rip_read(vcpu
);
6473 regs
->rflags
= kvm_get_rflags(vcpu
);
6478 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6480 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6481 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6483 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6484 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6485 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6486 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6487 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6488 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6489 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6490 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6491 #ifdef CONFIG_X86_64
6492 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6493 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6494 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6495 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6496 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6497 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6498 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6499 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6502 kvm_rip_write(vcpu
, regs
->rip
);
6503 kvm_set_rflags(vcpu
, regs
->rflags
);
6505 vcpu
->arch
.exception
.pending
= false;
6507 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6512 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6514 struct kvm_segment cs
;
6516 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6520 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6522 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6523 struct kvm_sregs
*sregs
)
6527 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6528 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6529 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6530 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6531 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6532 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6534 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6535 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6537 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6538 sregs
->idt
.limit
= dt
.size
;
6539 sregs
->idt
.base
= dt
.address
;
6540 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6541 sregs
->gdt
.limit
= dt
.size
;
6542 sregs
->gdt
.base
= dt
.address
;
6544 sregs
->cr0
= kvm_read_cr0(vcpu
);
6545 sregs
->cr2
= vcpu
->arch
.cr2
;
6546 sregs
->cr3
= kvm_read_cr3(vcpu
);
6547 sregs
->cr4
= kvm_read_cr4(vcpu
);
6548 sregs
->cr8
= kvm_get_cr8(vcpu
);
6549 sregs
->efer
= vcpu
->arch
.efer
;
6550 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6552 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6554 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6555 set_bit(vcpu
->arch
.interrupt
.nr
,
6556 (unsigned long *)sregs
->interrupt_bitmap
);
6561 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6562 struct kvm_mp_state
*mp_state
)
6564 kvm_apic_accept_events(vcpu
);
6565 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6566 vcpu
->arch
.pv
.pv_unhalted
)
6567 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6569 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6574 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6575 struct kvm_mp_state
*mp_state
)
6577 if (!kvm_vcpu_has_lapic(vcpu
) &&
6578 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6581 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6582 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6583 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6585 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6586 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6590 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6591 int reason
, bool has_error_code
, u32 error_code
)
6593 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6596 init_emulate_ctxt(vcpu
);
6598 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6599 has_error_code
, error_code
);
6602 return EMULATE_FAIL
;
6604 kvm_rip_write(vcpu
, ctxt
->eip
);
6605 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6606 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6607 return EMULATE_DONE
;
6609 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6611 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6612 struct kvm_sregs
*sregs
)
6614 struct msr_data apic_base_msr
;
6615 int mmu_reset_needed
= 0;
6616 int pending_vec
, max_bits
, idx
;
6619 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6622 dt
.size
= sregs
->idt
.limit
;
6623 dt
.address
= sregs
->idt
.base
;
6624 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6625 dt
.size
= sregs
->gdt
.limit
;
6626 dt
.address
= sregs
->gdt
.base
;
6627 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6629 vcpu
->arch
.cr2
= sregs
->cr2
;
6630 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6631 vcpu
->arch
.cr3
= sregs
->cr3
;
6632 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6634 kvm_set_cr8(vcpu
, sregs
->cr8
);
6636 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6637 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6638 apic_base_msr
.data
= sregs
->apic_base
;
6639 apic_base_msr
.host_initiated
= true;
6640 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6642 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6643 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6644 vcpu
->arch
.cr0
= sregs
->cr0
;
6646 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6647 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6648 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6649 kvm_update_cpuid(vcpu
);
6651 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6652 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6653 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6654 mmu_reset_needed
= 1;
6656 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6658 if (mmu_reset_needed
)
6659 kvm_mmu_reset_context(vcpu
);
6661 max_bits
= KVM_NR_INTERRUPTS
;
6662 pending_vec
= find_first_bit(
6663 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6664 if (pending_vec
< max_bits
) {
6665 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6666 pr_debug("Set back pending irq %d\n", pending_vec
);
6669 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6670 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6671 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6672 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6673 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6674 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6676 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6677 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6679 update_cr8_intercept(vcpu
);
6681 /* Older userspace won't unhalt the vcpu on reset. */
6682 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6683 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6685 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6687 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6692 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6693 struct kvm_guest_debug
*dbg
)
6695 unsigned long rflags
;
6698 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6700 if (vcpu
->arch
.exception
.pending
)
6702 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6703 kvm_queue_exception(vcpu
, DB_VECTOR
);
6705 kvm_queue_exception(vcpu
, BP_VECTOR
);
6709 * Read rflags as long as potentially injected trace flags are still
6712 rflags
= kvm_get_rflags(vcpu
);
6714 vcpu
->guest_debug
= dbg
->control
;
6715 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6716 vcpu
->guest_debug
= 0;
6718 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6719 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6720 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6721 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6723 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6724 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6726 kvm_update_dr7(vcpu
);
6728 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6729 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6730 get_segment_base(vcpu
, VCPU_SREG_CS
);
6733 * Trigger an rflags update that will inject or remove the trace
6736 kvm_set_rflags(vcpu
, rflags
);
6738 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6748 * Translate a guest virtual address to a guest physical address.
6750 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6751 struct kvm_translation
*tr
)
6753 unsigned long vaddr
= tr
->linear_address
;
6757 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6758 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6759 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6760 tr
->physical_address
= gpa
;
6761 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6768 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6770 struct i387_fxsave_struct
*fxsave
=
6771 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6773 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6774 fpu
->fcw
= fxsave
->cwd
;
6775 fpu
->fsw
= fxsave
->swd
;
6776 fpu
->ftwx
= fxsave
->twd
;
6777 fpu
->last_opcode
= fxsave
->fop
;
6778 fpu
->last_ip
= fxsave
->rip
;
6779 fpu
->last_dp
= fxsave
->rdp
;
6780 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6785 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6787 struct i387_fxsave_struct
*fxsave
=
6788 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6790 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6791 fxsave
->cwd
= fpu
->fcw
;
6792 fxsave
->swd
= fpu
->fsw
;
6793 fxsave
->twd
= fpu
->ftwx
;
6794 fxsave
->fop
= fpu
->last_opcode
;
6795 fxsave
->rip
= fpu
->last_ip
;
6796 fxsave
->rdp
= fpu
->last_dp
;
6797 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6802 int fx_init(struct kvm_vcpu
*vcpu
)
6806 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6810 fpu_finit(&vcpu
->arch
.guest_fpu
);
6813 * Ensure guest xcr0 is valid for loading
6815 vcpu
->arch
.xcr0
= XSTATE_FP
;
6817 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6821 EXPORT_SYMBOL_GPL(fx_init
);
6823 static void fx_free(struct kvm_vcpu
*vcpu
)
6825 fpu_free(&vcpu
->arch
.guest_fpu
);
6828 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6830 if (vcpu
->guest_fpu_loaded
)
6834 * Restore all possible states in the guest,
6835 * and assume host would use all available bits.
6836 * Guest xcr0 would be loaded later.
6838 kvm_put_guest_xcr0(vcpu
);
6839 vcpu
->guest_fpu_loaded
= 1;
6840 __kernel_fpu_begin();
6841 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6845 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6847 kvm_put_guest_xcr0(vcpu
);
6849 if (!vcpu
->guest_fpu_loaded
)
6852 vcpu
->guest_fpu_loaded
= 0;
6853 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6855 ++vcpu
->stat
.fpu_reload
;
6856 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6860 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6862 kvmclock_reset(vcpu
);
6864 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6866 kvm_x86_ops
->vcpu_free(vcpu
);
6869 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6872 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6873 printk_once(KERN_WARNING
6874 "kvm: SMP vm created on host with unstable TSC; "
6875 "guest TSC will not be reliable\n");
6876 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6879 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6883 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6884 r
= vcpu_load(vcpu
);
6887 kvm_vcpu_reset(vcpu
);
6888 kvm_mmu_setup(vcpu
);
6894 int kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
6897 struct msr_data msr
;
6898 struct kvm
*kvm
= vcpu
->kvm
;
6900 r
= vcpu_load(vcpu
);
6904 msr
.index
= MSR_IA32_TSC
;
6905 msr
.host_initiated
= true;
6906 kvm_write_tsc(vcpu
, &msr
);
6909 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
6910 KVMCLOCK_SYNC_PERIOD
);
6915 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6918 vcpu
->arch
.apf
.msr_val
= 0;
6920 r
= vcpu_load(vcpu
);
6922 kvm_mmu_unload(vcpu
);
6926 kvm_x86_ops
->vcpu_free(vcpu
);
6929 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
6931 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6932 vcpu
->arch
.nmi_pending
= 0;
6933 vcpu
->arch
.nmi_injected
= false;
6934 kvm_clear_interrupt_queue(vcpu
);
6935 kvm_clear_exception_queue(vcpu
);
6937 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6938 vcpu
->arch
.dr6
= DR6_INIT
;
6939 kvm_update_dr6(vcpu
);
6940 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6941 kvm_update_dr7(vcpu
);
6943 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6944 vcpu
->arch
.apf
.msr_val
= 0;
6945 vcpu
->arch
.st
.msr_val
= 0;
6947 kvmclock_reset(vcpu
);
6949 kvm_clear_async_pf_completion_queue(vcpu
);
6950 kvm_async_pf_hash_reset(vcpu
);
6951 vcpu
->arch
.apf
.halted
= false;
6953 kvm_pmu_reset(vcpu
);
6955 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
6956 vcpu
->arch
.regs_avail
= ~0;
6957 vcpu
->arch
.regs_dirty
= ~0;
6959 kvm_x86_ops
->vcpu_reset(vcpu
);
6962 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, unsigned int vector
)
6964 struct kvm_segment cs
;
6966 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6967 cs
.selector
= vector
<< 8;
6968 cs
.base
= vector
<< 12;
6969 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6970 kvm_rip_write(vcpu
, 0);
6973 int kvm_arch_hardware_enable(void)
6976 struct kvm_vcpu
*vcpu
;
6981 bool stable
, backwards_tsc
= false;
6983 kvm_shared_msr_cpu_online();
6984 ret
= kvm_x86_ops
->hardware_enable();
6988 local_tsc
= native_read_tsc();
6989 stable
= !check_tsc_unstable();
6990 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6991 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6992 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6993 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6994 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6995 backwards_tsc
= true;
6996 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6997 max_tsc
= vcpu
->arch
.last_host_tsc
;
7003 * Sometimes, even reliable TSCs go backwards. This happens on
7004 * platforms that reset TSC during suspend or hibernate actions, but
7005 * maintain synchronization. We must compensate. Fortunately, we can
7006 * detect that condition here, which happens early in CPU bringup,
7007 * before any KVM threads can be running. Unfortunately, we can't
7008 * bring the TSCs fully up to date with real time, as we aren't yet far
7009 * enough into CPU bringup that we know how much real time has actually
7010 * elapsed; our helper function, get_kernel_ns() will be using boot
7011 * variables that haven't been updated yet.
7013 * So we simply find the maximum observed TSC above, then record the
7014 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7015 * the adjustment will be applied. Note that we accumulate
7016 * adjustments, in case multiple suspend cycles happen before some VCPU
7017 * gets a chance to run again. In the event that no KVM threads get a
7018 * chance to run, we will miss the entire elapsed period, as we'll have
7019 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7020 * loose cycle time. This isn't too big a deal, since the loss will be
7021 * uniform across all VCPUs (not to mention the scenario is extremely
7022 * unlikely). It is possible that a second hibernate recovery happens
7023 * much faster than a first, causing the observed TSC here to be
7024 * smaller; this would require additional padding adjustment, which is
7025 * why we set last_host_tsc to the local tsc observed here.
7027 * N.B. - this code below runs only on platforms with reliable TSC,
7028 * as that is the only way backwards_tsc is set above. Also note
7029 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7030 * have the same delta_cyc adjustment applied if backwards_tsc
7031 * is detected. Note further, this adjustment is only done once,
7032 * as we reset last_host_tsc on all VCPUs to stop this from being
7033 * called multiple times (one for each physical CPU bringup).
7035 * Platforms with unreliable TSCs don't have to deal with this, they
7036 * will be compensated by the logic in vcpu_load, which sets the TSC to
7037 * catchup mode. This will catchup all VCPUs to real time, but cannot
7038 * guarantee that they stay in perfect synchronization.
7040 if (backwards_tsc
) {
7041 u64 delta_cyc
= max_tsc
- local_tsc
;
7042 backwards_tsc_observed
= true;
7043 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7044 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7045 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7046 vcpu
->arch
.last_host_tsc
= local_tsc
;
7047 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7051 * We have to disable TSC offset matching.. if you were
7052 * booting a VM while issuing an S4 host suspend....
7053 * you may have some problem. Solving this issue is
7054 * left as an exercise to the reader.
7056 kvm
->arch
.last_tsc_nsec
= 0;
7057 kvm
->arch
.last_tsc_write
= 0;
7064 void kvm_arch_hardware_disable(void)
7066 kvm_x86_ops
->hardware_disable();
7067 drop_user_return_notifiers();
7070 int kvm_arch_hardware_setup(void)
7072 return kvm_x86_ops
->hardware_setup();
7075 void kvm_arch_hardware_unsetup(void)
7077 kvm_x86_ops
->hardware_unsetup();
7080 void kvm_arch_check_processor_compat(void *rtn
)
7082 kvm_x86_ops
->check_processor_compatibility(rtn
);
7085 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7087 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
7090 struct static_key kvm_no_apic_vcpu __read_mostly
;
7092 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7098 BUG_ON(vcpu
->kvm
== NULL
);
7101 vcpu
->arch
.pv
.pv_unhalted
= false;
7102 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7103 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
7104 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7106 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7108 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7113 vcpu
->arch
.pio_data
= page_address(page
);
7115 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7117 r
= kvm_mmu_create(vcpu
);
7119 goto fail_free_pio_data
;
7121 if (irqchip_in_kernel(kvm
)) {
7122 r
= kvm_create_lapic(vcpu
);
7124 goto fail_mmu_destroy
;
7126 static_key_slow_inc(&kvm_no_apic_vcpu
);
7128 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7130 if (!vcpu
->arch
.mce_banks
) {
7132 goto fail_free_lapic
;
7134 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7136 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7138 goto fail_free_mce_banks
;
7143 goto fail_free_wbinvd_dirty_mask
;
7145 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7146 vcpu
->arch
.pv_time_enabled
= false;
7148 vcpu
->arch
.guest_supported_xcr0
= 0;
7149 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7151 kvm_async_pf_hash_reset(vcpu
);
7155 fail_free_wbinvd_dirty_mask
:
7156 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7157 fail_free_mce_banks
:
7158 kfree(vcpu
->arch
.mce_banks
);
7160 kvm_free_lapic(vcpu
);
7162 kvm_mmu_destroy(vcpu
);
7164 free_page((unsigned long)vcpu
->arch
.pio_data
);
7169 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7173 kvm_pmu_destroy(vcpu
);
7174 kfree(vcpu
->arch
.mce_banks
);
7175 kvm_free_lapic(vcpu
);
7176 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7177 kvm_mmu_destroy(vcpu
);
7178 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7179 free_page((unsigned long)vcpu
->arch
.pio_data
);
7180 if (!irqchip_in_kernel(vcpu
->kvm
))
7181 static_key_slow_dec(&kvm_no_apic_vcpu
);
7184 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7186 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7189 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7194 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7195 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7196 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7197 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7199 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7200 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7201 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7202 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7203 &kvm
->arch
.irq_sources_bitmap
);
7205 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7206 mutex_init(&kvm
->arch
.apic_map_lock
);
7207 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7209 pvclock_update_vm_gtod_copy(kvm
);
7211 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7212 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7217 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7220 r
= vcpu_load(vcpu
);
7222 kvm_mmu_unload(vcpu
);
7226 static void kvm_free_vcpus(struct kvm
*kvm
)
7229 struct kvm_vcpu
*vcpu
;
7232 * Unpin any mmu pages first.
7234 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7235 kvm_clear_async_pf_completion_queue(vcpu
);
7236 kvm_unload_vcpu_mmu(vcpu
);
7238 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7239 kvm_arch_vcpu_free(vcpu
);
7241 mutex_lock(&kvm
->lock
);
7242 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7243 kvm
->vcpus
[i
] = NULL
;
7245 atomic_set(&kvm
->online_vcpus
, 0);
7246 mutex_unlock(&kvm
->lock
);
7249 void kvm_arch_sync_events(struct kvm
*kvm
)
7251 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7252 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7253 kvm_free_all_assigned_devices(kvm
);
7257 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7259 if (current
->mm
== kvm
->mm
) {
7261 * Free memory regions allocated on behalf of userspace,
7262 * unless the the memory map has changed due to process exit
7265 struct kvm_userspace_memory_region mem
;
7266 memset(&mem
, 0, sizeof(mem
));
7267 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7268 kvm_set_memory_region(kvm
, &mem
);
7270 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7271 kvm_set_memory_region(kvm
, &mem
);
7273 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7274 kvm_set_memory_region(kvm
, &mem
);
7276 kvm_iommu_unmap_guest(kvm
);
7277 kfree(kvm
->arch
.vpic
);
7278 kfree(kvm
->arch
.vioapic
);
7279 kvm_free_vcpus(kvm
);
7280 if (kvm
->arch
.apic_access_page
)
7281 put_page(kvm
->arch
.apic_access_page
);
7282 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7285 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7286 struct kvm_memory_slot
*dont
)
7290 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7291 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7292 kvm_kvfree(free
->arch
.rmap
[i
]);
7293 free
->arch
.rmap
[i
] = NULL
;
7298 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7299 dont
->arch
.lpage_info
[i
- 1]) {
7300 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
7301 free
->arch
.lpage_info
[i
- 1] = NULL
;
7306 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7307 unsigned long npages
)
7311 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7316 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7317 slot
->base_gfn
, level
) + 1;
7319 slot
->arch
.rmap
[i
] =
7320 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7321 if (!slot
->arch
.rmap
[i
])
7326 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7327 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7328 if (!slot
->arch
.lpage_info
[i
- 1])
7331 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7332 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7333 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7334 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7335 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7337 * If the gfn and userspace address are not aligned wrt each
7338 * other, or if explicitly asked to, disable large page
7339 * support for this slot
7341 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7342 !kvm_largepages_enabled()) {
7345 for (j
= 0; j
< lpages
; ++j
)
7346 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7353 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7354 kvm_kvfree(slot
->arch
.rmap
[i
]);
7355 slot
->arch
.rmap
[i
] = NULL
;
7359 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
7360 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7365 void kvm_arch_memslots_updated(struct kvm
*kvm
)
7368 * memslots->generation has been incremented.
7369 * mmio generation may have reached its maximum value.
7371 kvm_mmu_invalidate_mmio_sptes(kvm
);
7374 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7375 struct kvm_memory_slot
*memslot
,
7376 struct kvm_userspace_memory_region
*mem
,
7377 enum kvm_mr_change change
)
7380 * Only private memory slots need to be mapped here since
7381 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7383 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7384 unsigned long userspace_addr
;
7387 * MAP_SHARED to prevent internal slot pages from being moved
7390 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7391 PROT_READ
| PROT_WRITE
,
7392 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7394 if (IS_ERR((void *)userspace_addr
))
7395 return PTR_ERR((void *)userspace_addr
);
7397 memslot
->userspace_addr
= userspace_addr
;
7403 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7404 struct kvm_userspace_memory_region
*mem
,
7405 const struct kvm_memory_slot
*old
,
7406 enum kvm_mr_change change
)
7409 int nr_mmu_pages
= 0;
7411 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7414 ret
= vm_munmap(old
->userspace_addr
,
7415 old
->npages
* PAGE_SIZE
);
7418 "kvm_vm_ioctl_set_memory_region: "
7419 "failed to munmap memory\n");
7422 if (!kvm
->arch
.n_requested_mmu_pages
)
7423 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7426 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7428 * Write protect all pages for dirty logging.
7430 * All the sptes including the large sptes which point to this
7431 * slot are set to readonly. We can not create any new large
7432 * spte on this slot until the end of the logging.
7434 * See the comments in fast_page_fault().
7436 if ((change
!= KVM_MR_DELETE
) && (mem
->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7437 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
7440 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7442 kvm_mmu_invalidate_zap_all_pages(kvm
);
7445 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7446 struct kvm_memory_slot
*slot
)
7448 kvm_mmu_invalidate_zap_all_pages(kvm
);
7451 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7453 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7454 kvm_x86_ops
->check_nested_events(vcpu
, false);
7456 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7457 !vcpu
->arch
.apf
.halted
)
7458 || !list_empty_careful(&vcpu
->async_pf
.done
)
7459 || kvm_apic_has_events(vcpu
)
7460 || vcpu
->arch
.pv
.pv_unhalted
7461 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7462 (kvm_arch_interrupt_allowed(vcpu
) &&
7463 kvm_cpu_has_interrupt(vcpu
));
7466 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7468 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7471 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7473 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7476 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7478 unsigned long current_rip
= kvm_rip_read(vcpu
) +
7479 get_segment_base(vcpu
, VCPU_SREG_CS
);
7481 return current_rip
== linear_rip
;
7483 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7485 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7487 unsigned long rflags
;
7489 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7490 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7491 rflags
&= ~X86_EFLAGS_TF
;
7494 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7496 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7498 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7499 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7500 rflags
|= X86_EFLAGS_TF
;
7501 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7504 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7506 __kvm_set_rflags(vcpu
, rflags
);
7507 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7509 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7511 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7515 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7519 r
= kvm_mmu_reload(vcpu
);
7523 if (!vcpu
->arch
.mmu
.direct_map
&&
7524 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7527 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7530 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7532 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7535 static inline u32
kvm_async_pf_next_probe(u32 key
)
7537 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7540 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7542 u32 key
= kvm_async_pf_hash_fn(gfn
);
7544 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7545 key
= kvm_async_pf_next_probe(key
);
7547 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7550 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7553 u32 key
= kvm_async_pf_hash_fn(gfn
);
7555 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7556 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7557 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7558 key
= kvm_async_pf_next_probe(key
);
7563 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7565 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7568 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7572 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7574 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7576 j
= kvm_async_pf_next_probe(j
);
7577 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7579 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7581 * k lies cyclically in ]i,j]
7583 * |....j i.k.| or |.k..j i...|
7585 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7586 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7591 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7594 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7598 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7599 struct kvm_async_pf
*work
)
7601 struct x86_exception fault
;
7603 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7604 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7606 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7607 (vcpu
->arch
.apf
.send_user_only
&&
7608 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7609 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7610 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7611 fault
.vector
= PF_VECTOR
;
7612 fault
.error_code_valid
= true;
7613 fault
.error_code
= 0;
7614 fault
.nested_page_fault
= false;
7615 fault
.address
= work
->arch
.token
;
7616 kvm_inject_page_fault(vcpu
, &fault
);
7620 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7621 struct kvm_async_pf
*work
)
7623 struct x86_exception fault
;
7625 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7626 if (work
->wakeup_all
)
7627 work
->arch
.token
= ~0; /* broadcast wakeup */
7629 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7631 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7632 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7633 fault
.vector
= PF_VECTOR
;
7634 fault
.error_code_valid
= true;
7635 fault
.error_code
= 0;
7636 fault
.nested_page_fault
= false;
7637 fault
.address
= work
->arch
.token
;
7638 kvm_inject_page_fault(vcpu
, &fault
);
7640 vcpu
->arch
.apf
.halted
= false;
7641 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7644 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7646 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7649 return !kvm_event_needs_reinjection(vcpu
) &&
7650 kvm_x86_ops
->interrupt_allowed(vcpu
);
7653 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
7655 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
7657 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
7659 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
7661 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
7663 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
7665 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
7667 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
7669 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
7671 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7672 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7673 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7674 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7675 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7676 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7677 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7678 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7679 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7680 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7681 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7682 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
7683 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
7684 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);