2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <trace/events/kvm.h>
43 #undef TRACE_INCLUDE_FILE
44 #define CREATE_TRACE_POINTS
47 #include <asm/debugreg.h>
48 #include <asm/uaccess.h>
54 #define MAX_IO_MSRS 256
55 #define CR0_RESERVED_BITS \
56 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
57 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
58 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
59 #define CR4_RESERVED_BITS \
60 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
61 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
62 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
63 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
65 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
67 #define KVM_MAX_MCE_BANKS 32
68 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
71 * - enable syscall per default because its emulated by KVM
72 * - enable LME and LMA per default on 64 bit KVM
75 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
77 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
83 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
85 struct kvm_cpuid_entry2 __user
*entries
);
87 struct kvm_x86_ops
*kvm_x86_ops
;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
91 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
93 #define KVM_NR_SHARED_MSRS 16
95 struct kvm_shared_msrs_global
{
97 u32 msrs
[KVM_NR_SHARED_MSRS
];
100 struct kvm_shared_msrs
{
101 struct user_return_notifier urn
;
103 struct kvm_shared_msr_values
{
106 } values
[KVM_NR_SHARED_MSRS
];
109 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
110 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
112 struct kvm_stats_debugfs_item debugfs_entries
[] = {
113 { "pf_fixed", VCPU_STAT(pf_fixed
) },
114 { "pf_guest", VCPU_STAT(pf_guest
) },
115 { "tlb_flush", VCPU_STAT(tlb_flush
) },
116 { "invlpg", VCPU_STAT(invlpg
) },
117 { "exits", VCPU_STAT(exits
) },
118 { "io_exits", VCPU_STAT(io_exits
) },
119 { "mmio_exits", VCPU_STAT(mmio_exits
) },
120 { "signal_exits", VCPU_STAT(signal_exits
) },
121 { "irq_window", VCPU_STAT(irq_window_exits
) },
122 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
123 { "halt_exits", VCPU_STAT(halt_exits
) },
124 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
125 { "hypercalls", VCPU_STAT(hypercalls
) },
126 { "request_irq", VCPU_STAT(request_irq_exits
) },
127 { "irq_exits", VCPU_STAT(irq_exits
) },
128 { "host_state_reload", VCPU_STAT(host_state_reload
) },
129 { "efer_reload", VCPU_STAT(efer_reload
) },
130 { "fpu_reload", VCPU_STAT(fpu_reload
) },
131 { "insn_emulation", VCPU_STAT(insn_emulation
) },
132 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
133 { "irq_injections", VCPU_STAT(irq_injections
) },
134 { "nmi_injections", VCPU_STAT(nmi_injections
) },
135 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
136 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
137 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
138 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
139 { "mmu_flooded", VM_STAT(mmu_flooded
) },
140 { "mmu_recycled", VM_STAT(mmu_recycled
) },
141 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
142 { "mmu_unsync", VM_STAT(mmu_unsync
) },
143 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
144 { "largepages", VM_STAT(lpages
) },
148 static void kvm_on_user_return(struct user_return_notifier
*urn
)
151 struct kvm_shared_msrs
*locals
152 = container_of(urn
, struct kvm_shared_msrs
, urn
);
153 struct kvm_shared_msr_values
*values
;
155 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
156 values
= &locals
->values
[slot
];
157 if (values
->host
!= values
->curr
) {
158 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
159 values
->curr
= values
->host
;
162 locals
->registered
= false;
163 user_return_notifier_unregister(urn
);
166 static void shared_msr_update(unsigned slot
, u32 msr
)
168 struct kvm_shared_msrs
*smsr
;
171 smsr
= &__get_cpu_var(shared_msrs
);
172 /* only read, and nobody should modify it at this time,
173 * so don't need lock */
174 if (slot
>= shared_msrs_global
.nr
) {
175 printk(KERN_ERR
"kvm: invalid MSR slot!");
178 rdmsrl_safe(msr
, &value
);
179 smsr
->values
[slot
].host
= value
;
180 smsr
->values
[slot
].curr
= value
;
183 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
185 if (slot
>= shared_msrs_global
.nr
)
186 shared_msrs_global
.nr
= slot
+ 1;
187 shared_msrs_global
.msrs
[slot
] = msr
;
188 /* we need ensured the shared_msr_global have been updated */
191 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
193 static void kvm_shared_msr_cpu_online(void)
197 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
198 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
201 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
203 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
205 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
207 smsr
->values
[slot
].curr
= value
;
208 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
209 if (!smsr
->registered
) {
210 smsr
->urn
.on_user_return
= kvm_on_user_return
;
211 user_return_notifier_register(&smsr
->urn
);
212 smsr
->registered
= true;
215 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
217 static void drop_user_return_notifiers(void *ignore
)
219 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
221 if (smsr
->registered
)
222 kvm_on_user_return(&smsr
->urn
);
225 unsigned long segment_base(u16 selector
)
227 struct descriptor_table gdt
;
228 struct desc_struct
*d
;
229 unsigned long table_base
;
236 table_base
= gdt
.base
;
238 if (selector
& 4) { /* from ldt */
239 u16 ldt_selector
= kvm_read_ldt();
241 table_base
= segment_base(ldt_selector
);
243 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
244 v
= get_desc_base(d
);
246 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
247 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
251 EXPORT_SYMBOL_GPL(segment_base
);
253 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
255 if (irqchip_in_kernel(vcpu
->kvm
))
256 return vcpu
->arch
.apic_base
;
258 return vcpu
->arch
.apic_base
;
260 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
262 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
264 /* TODO: reserve bits check */
265 if (irqchip_in_kernel(vcpu
->kvm
))
266 kvm_lapic_set_base(vcpu
, data
);
268 vcpu
->arch
.apic_base
= data
;
270 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
272 #define EXCPT_BENIGN 0
273 #define EXCPT_CONTRIBUTORY 1
276 static int exception_class(int vector
)
286 return EXCPT_CONTRIBUTORY
;
293 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
294 unsigned nr
, bool has_error
, u32 error_code
)
299 if (!vcpu
->arch
.exception
.pending
) {
301 vcpu
->arch
.exception
.pending
= true;
302 vcpu
->arch
.exception
.has_error_code
= has_error
;
303 vcpu
->arch
.exception
.nr
= nr
;
304 vcpu
->arch
.exception
.error_code
= error_code
;
308 /* to check exception */
309 prev_nr
= vcpu
->arch
.exception
.nr
;
310 if (prev_nr
== DF_VECTOR
) {
311 /* triple fault -> shutdown */
312 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
315 class1
= exception_class(prev_nr
);
316 class2
= exception_class(nr
);
317 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
318 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
319 /* generate double fault per SDM Table 5-5 */
320 vcpu
->arch
.exception
.pending
= true;
321 vcpu
->arch
.exception
.has_error_code
= true;
322 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
323 vcpu
->arch
.exception
.error_code
= 0;
325 /* replace previous exception with a new one in a hope
326 that instruction re-execution will regenerate lost
331 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
333 kvm_multiple_exception(vcpu
, nr
, false, 0);
335 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
337 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
340 ++vcpu
->stat
.pf_guest
;
341 vcpu
->arch
.cr2
= addr
;
342 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
345 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
347 vcpu
->arch
.nmi_pending
= 1;
349 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
351 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
353 kvm_multiple_exception(vcpu
, nr
, true, error_code
);
355 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
358 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
359 * a #GP and return false.
361 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
363 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
365 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
368 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
371 * Load the pae pdptrs. Return true is they are all valid.
373 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
375 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
376 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
379 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
381 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
382 offset
* sizeof(u64
), sizeof(pdpte
));
387 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
388 if (is_present_gpte(pdpte
[i
]) &&
389 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
396 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
397 __set_bit(VCPU_EXREG_PDPTR
,
398 (unsigned long *)&vcpu
->arch
.regs_avail
);
399 __set_bit(VCPU_EXREG_PDPTR
,
400 (unsigned long *)&vcpu
->arch
.regs_dirty
);
405 EXPORT_SYMBOL_GPL(load_pdptrs
);
407 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
409 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
413 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
416 if (!test_bit(VCPU_EXREG_PDPTR
,
417 (unsigned long *)&vcpu
->arch
.regs_avail
))
420 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
423 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
429 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
433 if (cr0
& CR0_RESERVED_BITS
) {
434 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
435 cr0
, kvm_read_cr0(vcpu
));
436 kvm_inject_gp(vcpu
, 0);
440 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
441 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
442 kvm_inject_gp(vcpu
, 0);
446 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
447 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
448 "and a clear PE flag\n");
449 kvm_inject_gp(vcpu
, 0);
453 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
455 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
459 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
460 "in long mode while PAE is disabled\n");
461 kvm_inject_gp(vcpu
, 0);
464 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
466 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
467 "in long mode while CS.L == 1\n");
468 kvm_inject_gp(vcpu
, 0);
474 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
475 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
477 kvm_inject_gp(vcpu
, 0);
483 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
484 vcpu
->arch
.cr0
= cr0
;
486 kvm_mmu_reset_context(vcpu
);
489 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
491 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
493 kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0ful
) | (msw
& 0x0f));
495 EXPORT_SYMBOL_GPL(kvm_lmsw
);
497 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
499 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
500 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
502 if (cr4
& CR4_RESERVED_BITS
) {
503 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
504 kvm_inject_gp(vcpu
, 0);
508 if (is_long_mode(vcpu
)) {
509 if (!(cr4
& X86_CR4_PAE
)) {
510 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
512 kvm_inject_gp(vcpu
, 0);
515 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
516 && ((cr4
^ old_cr4
) & pdptr_bits
)
517 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
518 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
519 kvm_inject_gp(vcpu
, 0);
523 if (cr4
& X86_CR4_VMXE
) {
524 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
525 kvm_inject_gp(vcpu
, 0);
528 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
529 vcpu
->arch
.cr4
= cr4
;
530 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
531 kvm_mmu_reset_context(vcpu
);
533 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
535 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
537 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
538 kvm_mmu_sync_roots(vcpu
);
539 kvm_mmu_flush_tlb(vcpu
);
543 if (is_long_mode(vcpu
)) {
544 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
545 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
546 kvm_inject_gp(vcpu
, 0);
551 if (cr3
& CR3_PAE_RESERVED_BITS
) {
553 "set_cr3: #GP, reserved bits\n");
554 kvm_inject_gp(vcpu
, 0);
557 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
558 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
560 kvm_inject_gp(vcpu
, 0);
565 * We don't check reserved bits in nonpae mode, because
566 * this isn't enforced, and VMware depends on this.
571 * Does the new cr3 value map to physical memory? (Note, we
572 * catch an invalid cr3 even in real-mode, because it would
573 * cause trouble later on when we turn on paging anyway.)
575 * A real CPU would silently accept an invalid cr3 and would
576 * attempt to use it - with largely undefined (and often hard
577 * to debug) behavior on the guest side.
579 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
580 kvm_inject_gp(vcpu
, 0);
582 vcpu
->arch
.cr3
= cr3
;
583 vcpu
->arch
.mmu
.new_cr3(vcpu
);
586 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
588 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
590 if (cr8
& CR8_RESERVED_BITS
) {
591 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
592 kvm_inject_gp(vcpu
, 0);
595 if (irqchip_in_kernel(vcpu
->kvm
))
596 kvm_lapic_set_tpr(vcpu
, cr8
);
598 vcpu
->arch
.cr8
= cr8
;
600 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
602 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
604 if (irqchip_in_kernel(vcpu
->kvm
))
605 return kvm_lapic_get_cr8(vcpu
);
607 return vcpu
->arch
.cr8
;
609 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
611 static inline u32
bit(int bitno
)
613 return 1 << (bitno
& 31);
617 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
618 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
620 * This list is modified at module load time to reflect the
621 * capabilities of the host cpu. This capabilities test skips MSRs that are
622 * kvm-specific. Those are put in the beginning of the list.
625 #define KVM_SAVE_MSRS_BEGIN 4
626 static u32 msrs_to_save
[] = {
627 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
628 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
629 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
632 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
634 MSR_IA32_TSC
, MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
637 static unsigned num_msrs_to_save
;
639 static u32 emulated_msrs
[] = {
640 MSR_IA32_MISC_ENABLE
,
643 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
645 if (efer
& efer_reserved_bits
) {
646 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
648 kvm_inject_gp(vcpu
, 0);
653 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
654 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
655 kvm_inject_gp(vcpu
, 0);
659 if (efer
& EFER_FFXSR
) {
660 struct kvm_cpuid_entry2
*feat
;
662 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
663 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
664 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
665 kvm_inject_gp(vcpu
, 0);
670 if (efer
& EFER_SVME
) {
671 struct kvm_cpuid_entry2
*feat
;
673 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
674 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
675 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
676 kvm_inject_gp(vcpu
, 0);
681 kvm_x86_ops
->set_efer(vcpu
, efer
);
684 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
686 vcpu
->arch
.shadow_efer
= efer
;
688 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
689 kvm_mmu_reset_context(vcpu
);
692 void kvm_enable_efer_bits(u64 mask
)
694 efer_reserved_bits
&= ~mask
;
696 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
700 * Writes msr value into into the appropriate "register".
701 * Returns 0 on success, non-0 otherwise.
702 * Assumes vcpu_load() was already called.
704 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
706 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
710 * Adapt set_msr() to msr_io()'s calling convention
712 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
714 return kvm_set_msr(vcpu
, index
, *data
);
717 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
720 struct pvclock_wall_clock wc
;
721 struct timespec boot
;
728 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
731 * The guest calculates current wall clock time by adding
732 * system time (updated by kvm_write_guest_time below) to the
733 * wall clock specified here. guest system time equals host
734 * system time for us, thus we must fill in host boot time here.
738 wc
.sec
= boot
.tv_sec
;
739 wc
.nsec
= boot
.tv_nsec
;
740 wc
.version
= version
;
742 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
745 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
748 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
750 uint32_t quotient
, remainder
;
752 /* Don't try to replace with do_div(), this one calculates
753 * "(dividend << 32) / divisor" */
755 : "=a" (quotient
), "=d" (remainder
)
756 : "0" (0), "1" (dividend
), "r" (divisor
) );
760 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
762 uint64_t nsecs
= 1000000000LL;
767 tps64
= tsc_khz
* 1000LL;
768 while (tps64
> nsecs
*2) {
773 tps32
= (uint32_t)tps64
;
774 while (tps32
<= (uint32_t)nsecs
) {
779 hv_clock
->tsc_shift
= shift
;
780 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
782 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
783 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
784 hv_clock
->tsc_to_system_mul
);
787 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
789 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
793 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
795 unsigned long this_tsc_khz
;
797 if ((!vcpu
->time_page
))
800 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
801 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
802 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
803 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
805 put_cpu_var(cpu_tsc_khz
);
807 /* Keep irq disabled to prevent changes to the clock */
808 local_irq_save(flags
);
809 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
811 monotonic_to_bootbased(&ts
);
812 local_irq_restore(flags
);
814 /* With all the info we got, fill in the values */
816 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
817 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
) + v
->kvm
->arch
.kvmclock_offset
;
820 * The interface expects us to write an even number signaling that the
821 * update is finished. Since the guest won't see the intermediate
822 * state, we just increase by 2 at the end.
824 vcpu
->hv_clock
.version
+= 2;
826 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
828 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
829 sizeof(vcpu
->hv_clock
));
831 kunmap_atomic(shared_kaddr
, KM_USER0
);
833 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
836 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
838 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
840 if (!vcpu
->time_page
)
842 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
846 static bool msr_mtrr_valid(unsigned msr
)
849 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
850 case MSR_MTRRfix64K_00000
:
851 case MSR_MTRRfix16K_80000
:
852 case MSR_MTRRfix16K_A0000
:
853 case MSR_MTRRfix4K_C0000
:
854 case MSR_MTRRfix4K_C8000
:
855 case MSR_MTRRfix4K_D0000
:
856 case MSR_MTRRfix4K_D8000
:
857 case MSR_MTRRfix4K_E0000
:
858 case MSR_MTRRfix4K_E8000
:
859 case MSR_MTRRfix4K_F0000
:
860 case MSR_MTRRfix4K_F8000
:
861 case MSR_MTRRdefType
:
862 case MSR_IA32_CR_PAT
:
870 static bool valid_pat_type(unsigned t
)
872 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
875 static bool valid_mtrr_type(unsigned t
)
877 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
880 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
884 if (!msr_mtrr_valid(msr
))
887 if (msr
== MSR_IA32_CR_PAT
) {
888 for (i
= 0; i
< 8; i
++)
889 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
892 } else if (msr
== MSR_MTRRdefType
) {
895 return valid_mtrr_type(data
& 0xff);
896 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
897 for (i
= 0; i
< 8 ; i
++)
898 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
904 return valid_mtrr_type(data
& 0xff);
907 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
909 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
911 if (!mtrr_valid(vcpu
, msr
, data
))
914 if (msr
== MSR_MTRRdefType
) {
915 vcpu
->arch
.mtrr_state
.def_type
= data
;
916 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
917 } else if (msr
== MSR_MTRRfix64K_00000
)
919 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
920 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
921 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
922 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
923 else if (msr
== MSR_IA32_CR_PAT
)
924 vcpu
->arch
.pat
= data
;
925 else { /* Variable MTRRs */
926 int idx
, is_mtrr_mask
;
929 idx
= (msr
- 0x200) / 2;
930 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
933 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
936 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
940 kvm_mmu_reset_context(vcpu
);
944 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
946 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
947 unsigned bank_num
= mcg_cap
& 0xff;
950 case MSR_IA32_MCG_STATUS
:
951 vcpu
->arch
.mcg_status
= data
;
953 case MSR_IA32_MCG_CTL
:
954 if (!(mcg_cap
& MCG_CTL_P
))
956 if (data
!= 0 && data
!= ~(u64
)0)
958 vcpu
->arch
.mcg_ctl
= data
;
961 if (msr
>= MSR_IA32_MC0_CTL
&&
962 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
963 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
964 /* only 0 or all 1s can be written to IA32_MCi_CTL */
965 if ((offset
& 0x3) == 0 &&
966 data
!= 0 && data
!= ~(u64
)0)
968 vcpu
->arch
.mce_banks
[offset
] = data
;
976 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
978 struct kvm
*kvm
= vcpu
->kvm
;
979 int lm
= is_long_mode(vcpu
);
980 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
981 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
982 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
983 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
984 u32 page_num
= data
& ~PAGE_MASK
;
985 u64 page_addr
= data
& PAGE_MASK
;
990 if (page_num
>= blob_size
)
993 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
997 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
999 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1008 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1010 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1013 static bool kvm_hv_msr_partition_wide(u32 msr
)
1017 case HV_X64_MSR_GUEST_OS_ID
:
1018 case HV_X64_MSR_HYPERCALL
:
1026 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1028 struct kvm
*kvm
= vcpu
->kvm
;
1031 case HV_X64_MSR_GUEST_OS_ID
:
1032 kvm
->arch
.hv_guest_os_id
= data
;
1033 /* setting guest os id to zero disables hypercall page */
1034 if (!kvm
->arch
.hv_guest_os_id
)
1035 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1037 case HV_X64_MSR_HYPERCALL
: {
1042 /* if guest os id is not set hypercall should remain disabled */
1043 if (!kvm
->arch
.hv_guest_os_id
)
1045 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1046 kvm
->arch
.hv_hypercall
= data
;
1049 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1050 addr
= gfn_to_hva(kvm
, gfn
);
1051 if (kvm_is_error_hva(addr
))
1053 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1054 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1055 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1057 kvm
->arch
.hv_hypercall
= data
;
1061 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1062 "data 0x%llx\n", msr
, data
);
1068 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1070 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x data 0x%llx\n",
1076 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1080 set_efer(vcpu
, data
);
1083 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1085 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1090 case MSR_FAM10H_MMIO_CONF_BASE
:
1092 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1097 case MSR_AMD64_NB_CFG
:
1099 case MSR_IA32_DEBUGCTLMSR
:
1101 /* We support the non-activated case already */
1103 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1104 /* Values other than LBR and BTF are vendor-specific,
1105 thus reserved and should throw a #GP */
1108 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1111 case MSR_IA32_UCODE_REV
:
1112 case MSR_IA32_UCODE_WRITE
:
1113 case MSR_VM_HSAVE_PA
:
1114 case MSR_AMD64_PATCH_LOADER
:
1116 case 0x200 ... 0x2ff:
1117 return set_msr_mtrr(vcpu
, msr
, data
);
1118 case MSR_IA32_APICBASE
:
1119 kvm_set_apic_base(vcpu
, data
);
1121 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1122 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1123 case MSR_IA32_MISC_ENABLE
:
1124 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1126 case MSR_KVM_WALL_CLOCK
:
1127 vcpu
->kvm
->arch
.wall_clock
= data
;
1128 kvm_write_wall_clock(vcpu
->kvm
, data
);
1130 case MSR_KVM_SYSTEM_TIME
: {
1131 if (vcpu
->arch
.time_page
) {
1132 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1133 vcpu
->arch
.time_page
= NULL
;
1136 vcpu
->arch
.time
= data
;
1138 /* we verify if the enable bit is set... */
1142 /* ...but clean it before doing the actual write */
1143 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1145 vcpu
->arch
.time_page
=
1146 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1148 if (is_error_page(vcpu
->arch
.time_page
)) {
1149 kvm_release_page_clean(vcpu
->arch
.time_page
);
1150 vcpu
->arch
.time_page
= NULL
;
1153 kvm_request_guest_time_update(vcpu
);
1156 case MSR_IA32_MCG_CTL
:
1157 case MSR_IA32_MCG_STATUS
:
1158 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1159 return set_msr_mce(vcpu
, msr
, data
);
1161 /* Performance counters are not protected by a CPUID bit,
1162 * so we should check all of them in the generic path for the sake of
1163 * cross vendor migration.
1164 * Writing a zero into the event select MSRs disables them,
1165 * which we perfectly emulate ;-). Any other value should be at least
1166 * reported, some guests depend on them.
1168 case MSR_P6_EVNTSEL0
:
1169 case MSR_P6_EVNTSEL1
:
1170 case MSR_K7_EVNTSEL0
:
1171 case MSR_K7_EVNTSEL1
:
1172 case MSR_K7_EVNTSEL2
:
1173 case MSR_K7_EVNTSEL3
:
1175 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1176 "0x%x data 0x%llx\n", msr
, data
);
1178 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1179 * so we ignore writes to make it happy.
1181 case MSR_P6_PERFCTR0
:
1182 case MSR_P6_PERFCTR1
:
1183 case MSR_K7_PERFCTR0
:
1184 case MSR_K7_PERFCTR1
:
1185 case MSR_K7_PERFCTR2
:
1186 case MSR_K7_PERFCTR3
:
1187 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1188 "0x%x data 0x%llx\n", msr
, data
);
1190 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1191 if (kvm_hv_msr_partition_wide(msr
)) {
1193 mutex_lock(&vcpu
->kvm
->lock
);
1194 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1195 mutex_unlock(&vcpu
->kvm
->lock
);
1198 return set_msr_hyperv(vcpu
, msr
, data
);
1201 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1202 return xen_hvm_config(vcpu
, data
);
1204 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1208 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1215 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1219 * Reads an msr value (of 'msr_index') into 'pdata'.
1220 * Returns 0 on success, non-0 otherwise.
1221 * Assumes vcpu_load() was already called.
1223 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1225 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1228 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1230 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1232 if (!msr_mtrr_valid(msr
))
1235 if (msr
== MSR_MTRRdefType
)
1236 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1237 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1238 else if (msr
== MSR_MTRRfix64K_00000
)
1240 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1241 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1242 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1243 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1244 else if (msr
== MSR_IA32_CR_PAT
)
1245 *pdata
= vcpu
->arch
.pat
;
1246 else { /* Variable MTRRs */
1247 int idx
, is_mtrr_mask
;
1250 idx
= (msr
- 0x200) / 2;
1251 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1254 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1257 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1264 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1267 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1268 unsigned bank_num
= mcg_cap
& 0xff;
1271 case MSR_IA32_P5_MC_ADDR
:
1272 case MSR_IA32_P5_MC_TYPE
:
1275 case MSR_IA32_MCG_CAP
:
1276 data
= vcpu
->arch
.mcg_cap
;
1278 case MSR_IA32_MCG_CTL
:
1279 if (!(mcg_cap
& MCG_CTL_P
))
1281 data
= vcpu
->arch
.mcg_ctl
;
1283 case MSR_IA32_MCG_STATUS
:
1284 data
= vcpu
->arch
.mcg_status
;
1287 if (msr
>= MSR_IA32_MC0_CTL
&&
1288 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1289 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1290 data
= vcpu
->arch
.mce_banks
[offset
];
1299 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1302 struct kvm
*kvm
= vcpu
->kvm
;
1305 case HV_X64_MSR_GUEST_OS_ID
:
1306 data
= kvm
->arch
.hv_guest_os_id
;
1308 case HV_X64_MSR_HYPERCALL
:
1309 data
= kvm
->arch
.hv_hypercall
;
1312 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1320 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1325 case HV_X64_MSR_VP_INDEX
: {
1328 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1334 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1341 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1346 case MSR_IA32_PLATFORM_ID
:
1347 case MSR_IA32_UCODE_REV
:
1348 case MSR_IA32_EBL_CR_POWERON
:
1349 case MSR_IA32_DEBUGCTLMSR
:
1350 case MSR_IA32_LASTBRANCHFROMIP
:
1351 case MSR_IA32_LASTBRANCHTOIP
:
1352 case MSR_IA32_LASTINTFROMIP
:
1353 case MSR_IA32_LASTINTTOIP
:
1356 case MSR_VM_HSAVE_PA
:
1357 case MSR_P6_PERFCTR0
:
1358 case MSR_P6_PERFCTR1
:
1359 case MSR_P6_EVNTSEL0
:
1360 case MSR_P6_EVNTSEL1
:
1361 case MSR_K7_EVNTSEL0
:
1362 case MSR_K7_PERFCTR0
:
1363 case MSR_K8_INT_PENDING_MSG
:
1364 case MSR_AMD64_NB_CFG
:
1365 case MSR_FAM10H_MMIO_CONF_BASE
:
1369 data
= 0x500 | KVM_NR_VAR_MTRR
;
1371 case 0x200 ... 0x2ff:
1372 return get_msr_mtrr(vcpu
, msr
, pdata
);
1373 case 0xcd: /* fsb frequency */
1376 case MSR_IA32_APICBASE
:
1377 data
= kvm_get_apic_base(vcpu
);
1379 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1380 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1382 case MSR_IA32_MISC_ENABLE
:
1383 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1385 case MSR_IA32_PERF_STATUS
:
1386 /* TSC increment by tick */
1388 /* CPU multiplier */
1389 data
|= (((uint64_t)4ULL) << 40);
1392 data
= vcpu
->arch
.shadow_efer
;
1394 case MSR_KVM_WALL_CLOCK
:
1395 data
= vcpu
->kvm
->arch
.wall_clock
;
1397 case MSR_KVM_SYSTEM_TIME
:
1398 data
= vcpu
->arch
.time
;
1400 case MSR_IA32_P5_MC_ADDR
:
1401 case MSR_IA32_P5_MC_TYPE
:
1402 case MSR_IA32_MCG_CAP
:
1403 case MSR_IA32_MCG_CTL
:
1404 case MSR_IA32_MCG_STATUS
:
1405 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1406 return get_msr_mce(vcpu
, msr
, pdata
);
1407 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1408 if (kvm_hv_msr_partition_wide(msr
)) {
1410 mutex_lock(&vcpu
->kvm
->lock
);
1411 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1412 mutex_unlock(&vcpu
->kvm
->lock
);
1415 return get_msr_hyperv(vcpu
, msr
, pdata
);
1419 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1422 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1430 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1433 * Read or write a bunch of msrs. All parameters are kernel addresses.
1435 * @return number of msrs set successfully.
1437 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1438 struct kvm_msr_entry
*entries
,
1439 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1440 unsigned index
, u64
*data
))
1446 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1447 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1448 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1450 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1458 * Read or write a bunch of msrs. Parameters are user addresses.
1460 * @return number of msrs set successfully.
1462 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1463 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1464 unsigned index
, u64
*data
),
1467 struct kvm_msrs msrs
;
1468 struct kvm_msr_entry
*entries
;
1473 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1477 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1481 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1482 entries
= vmalloc(size
);
1487 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1490 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1495 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1506 int kvm_dev_ioctl_check_extension(long ext
)
1511 case KVM_CAP_IRQCHIP
:
1513 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1514 case KVM_CAP_SET_TSS_ADDR
:
1515 case KVM_CAP_EXT_CPUID
:
1516 case KVM_CAP_CLOCKSOURCE
:
1518 case KVM_CAP_NOP_IO_DELAY
:
1519 case KVM_CAP_MP_STATE
:
1520 case KVM_CAP_SYNC_MMU
:
1521 case KVM_CAP_REINJECT_CONTROL
:
1522 case KVM_CAP_IRQ_INJECT_STATUS
:
1523 case KVM_CAP_ASSIGN_DEV_IRQ
:
1525 case KVM_CAP_IOEVENTFD
:
1527 case KVM_CAP_PIT_STATE2
:
1528 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1529 case KVM_CAP_XEN_HVM
:
1530 case KVM_CAP_ADJUST_CLOCK
:
1531 case KVM_CAP_VCPU_EVENTS
:
1532 case KVM_CAP_HYPERV
:
1535 case KVM_CAP_COALESCED_MMIO
:
1536 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1539 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1541 case KVM_CAP_NR_VCPUS
:
1544 case KVM_CAP_NR_MEMSLOTS
:
1545 r
= KVM_MEMORY_SLOTS
;
1547 case KVM_CAP_PV_MMU
: /* obsolete */
1554 r
= KVM_MAX_MCE_BANKS
;
1564 long kvm_arch_dev_ioctl(struct file
*filp
,
1565 unsigned int ioctl
, unsigned long arg
)
1567 void __user
*argp
= (void __user
*)arg
;
1571 case KVM_GET_MSR_INDEX_LIST
: {
1572 struct kvm_msr_list __user
*user_msr_list
= argp
;
1573 struct kvm_msr_list msr_list
;
1577 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1580 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1581 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1584 if (n
< msr_list
.nmsrs
)
1587 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1588 num_msrs_to_save
* sizeof(u32
)))
1590 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1592 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1597 case KVM_GET_SUPPORTED_CPUID
: {
1598 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1599 struct kvm_cpuid2 cpuid
;
1602 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1604 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1605 cpuid_arg
->entries
);
1610 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1615 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1618 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1620 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1632 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1634 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1635 if (unlikely(per_cpu(cpu_tsc_khz
, cpu
) == 0)) {
1636 unsigned long khz
= cpufreq_quick_get(cpu
);
1639 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
1641 kvm_request_guest_time_update(vcpu
);
1644 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1646 kvm_put_guest_fpu(vcpu
);
1647 kvm_x86_ops
->vcpu_put(vcpu
);
1650 static int is_efer_nx(void)
1652 unsigned long long efer
= 0;
1654 rdmsrl_safe(MSR_EFER
, &efer
);
1655 return efer
& EFER_NX
;
1658 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1661 struct kvm_cpuid_entry2
*e
, *entry
;
1664 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1665 e
= &vcpu
->arch
.cpuid_entries
[i
];
1666 if (e
->function
== 0x80000001) {
1671 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1672 entry
->edx
&= ~(1 << 20);
1673 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1677 /* when an old userspace process fills a new kernel module */
1678 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1679 struct kvm_cpuid
*cpuid
,
1680 struct kvm_cpuid_entry __user
*entries
)
1683 struct kvm_cpuid_entry
*cpuid_entries
;
1686 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1689 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1693 if (copy_from_user(cpuid_entries
, entries
,
1694 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1696 for (i
= 0; i
< cpuid
->nent
; i
++) {
1697 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1698 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1699 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1700 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1701 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1702 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1703 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1704 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1705 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1706 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1708 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1709 cpuid_fix_nx_cap(vcpu
);
1711 kvm_apic_set_version(vcpu
);
1712 kvm_x86_ops
->cpuid_update(vcpu
);
1715 vfree(cpuid_entries
);
1720 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1721 struct kvm_cpuid2
*cpuid
,
1722 struct kvm_cpuid_entry2 __user
*entries
)
1727 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1730 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1731 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1733 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1734 kvm_apic_set_version(vcpu
);
1735 kvm_x86_ops
->cpuid_update(vcpu
);
1742 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1743 struct kvm_cpuid2
*cpuid
,
1744 struct kvm_cpuid_entry2 __user
*entries
)
1749 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1752 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1753 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1758 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1762 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1765 entry
->function
= function
;
1766 entry
->index
= index
;
1767 cpuid_count(entry
->function
, entry
->index
,
1768 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1772 #define F(x) bit(X86_FEATURE_##x)
1774 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1775 u32 index
, int *nent
, int maxnent
)
1777 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1778 #ifdef CONFIG_X86_64
1779 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
1781 unsigned f_lm
= F(LM
);
1783 unsigned f_gbpages
= 0;
1786 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
1789 const u32 kvm_supported_word0_x86_features
=
1790 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1791 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1792 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1793 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1794 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1795 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1796 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1797 0 /* HTT, TM, Reserved, PBE */;
1798 /* cpuid 0x80000001.edx */
1799 const u32 kvm_supported_word1_x86_features
=
1800 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1801 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1802 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1803 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1804 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1805 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1806 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
1807 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1809 const u32 kvm_supported_word4_x86_features
=
1810 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1811 0 /* DS-CPL, VMX, SMX, EST */ |
1812 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1813 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1814 0 /* Reserved, DCA */ | F(XMM4_1
) |
1815 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1816 0 /* Reserved, XSAVE, OSXSAVE */;
1817 /* cpuid 0x80000001.ecx */
1818 const u32 kvm_supported_word6_x86_features
=
1819 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1820 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1821 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1822 0 /* SKINIT */ | 0 /* WDT */;
1824 /* all calls to cpuid_count() should be made on the same cpu */
1826 do_cpuid_1_ent(entry
, function
, index
);
1831 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1834 entry
->edx
&= kvm_supported_word0_x86_features
;
1835 entry
->ecx
&= kvm_supported_word4_x86_features
;
1836 /* we support x2apic emulation even if host does not support
1837 * it since we emulate x2apic in software */
1838 entry
->ecx
|= F(X2APIC
);
1840 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1841 * may return different values. This forces us to get_cpu() before
1842 * issuing the first command, and also to emulate this annoying behavior
1843 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1845 int t
, times
= entry
->eax
& 0xff;
1847 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1848 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1849 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1850 do_cpuid_1_ent(&entry
[t
], function
, 0);
1851 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1856 /* function 4 and 0xb have additional index. */
1860 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1861 /* read more entries until cache_type is zero */
1862 for (i
= 1; *nent
< maxnent
; ++i
) {
1863 cache_type
= entry
[i
- 1].eax
& 0x1f;
1866 do_cpuid_1_ent(&entry
[i
], function
, i
);
1868 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1876 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1877 /* read more entries until level_type is zero */
1878 for (i
= 1; *nent
< maxnent
; ++i
) {
1879 level_type
= entry
[i
- 1].ecx
& 0xff00;
1882 do_cpuid_1_ent(&entry
[i
], function
, i
);
1884 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1890 entry
->eax
= min(entry
->eax
, 0x8000001a);
1893 entry
->edx
&= kvm_supported_word1_x86_features
;
1894 entry
->ecx
&= kvm_supported_word6_x86_features
;
1902 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1903 struct kvm_cpuid_entry2 __user
*entries
)
1905 struct kvm_cpuid_entry2
*cpuid_entries
;
1906 int limit
, nent
= 0, r
= -E2BIG
;
1909 if (cpuid
->nent
< 1)
1911 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1912 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
1914 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1918 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1919 limit
= cpuid_entries
[0].eax
;
1920 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1921 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1922 &nent
, cpuid
->nent
);
1924 if (nent
>= cpuid
->nent
)
1927 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1928 limit
= cpuid_entries
[nent
- 1].eax
;
1929 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1930 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1931 &nent
, cpuid
->nent
);
1933 if (nent
>= cpuid
->nent
)
1937 if (copy_to_user(entries
, cpuid_entries
,
1938 nent
* sizeof(struct kvm_cpuid_entry2
)))
1944 vfree(cpuid_entries
);
1949 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1950 struct kvm_lapic_state
*s
)
1953 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1959 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1960 struct kvm_lapic_state
*s
)
1963 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1964 kvm_apic_post_state_restore(vcpu
);
1965 update_cr8_intercept(vcpu
);
1971 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1972 struct kvm_interrupt
*irq
)
1974 if (irq
->irq
< 0 || irq
->irq
>= 256)
1976 if (irqchip_in_kernel(vcpu
->kvm
))
1980 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1987 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1990 kvm_inject_nmi(vcpu
);
1996 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1997 struct kvm_tpr_access_ctl
*tac
)
2001 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2005 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2009 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2012 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2014 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2017 vcpu
->arch
.mcg_cap
= mcg_cap
;
2018 /* Init IA32_MCG_CTL to all 1s */
2019 if (mcg_cap
& MCG_CTL_P
)
2020 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2021 /* Init IA32_MCi_CTL to all 1s */
2022 for (bank
= 0; bank
< bank_num
; bank
++)
2023 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2028 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2029 struct kvm_x86_mce
*mce
)
2031 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2032 unsigned bank_num
= mcg_cap
& 0xff;
2033 u64
*banks
= vcpu
->arch
.mce_banks
;
2035 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2038 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2039 * reporting is disabled
2041 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2042 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2044 banks
+= 4 * mce
->bank
;
2046 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2047 * reporting is disabled for the bank
2049 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2051 if (mce
->status
& MCI_STATUS_UC
) {
2052 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2053 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2054 printk(KERN_DEBUG
"kvm: set_mce: "
2055 "injects mce exception while "
2056 "previous one is in progress!\n");
2057 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
2060 if (banks
[1] & MCI_STATUS_VAL
)
2061 mce
->status
|= MCI_STATUS_OVER
;
2062 banks
[2] = mce
->addr
;
2063 banks
[3] = mce
->misc
;
2064 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2065 banks
[1] = mce
->status
;
2066 kvm_queue_exception(vcpu
, MC_VECTOR
);
2067 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2068 || !(banks
[1] & MCI_STATUS_UC
)) {
2069 if (banks
[1] & MCI_STATUS_VAL
)
2070 mce
->status
|= MCI_STATUS_OVER
;
2071 banks
[2] = mce
->addr
;
2072 banks
[3] = mce
->misc
;
2073 banks
[1] = mce
->status
;
2075 banks
[1] |= MCI_STATUS_OVER
;
2079 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2080 struct kvm_vcpu_events
*events
)
2084 events
->exception
.injected
= vcpu
->arch
.exception
.pending
;
2085 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2086 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2087 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2089 events
->interrupt
.injected
= vcpu
->arch
.interrupt
.pending
;
2090 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2091 events
->interrupt
.soft
= vcpu
->arch
.interrupt
.soft
;
2093 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2094 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2095 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2097 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2099 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2100 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
);
2105 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2106 struct kvm_vcpu_events
*events
)
2108 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2109 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
))
2114 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2115 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2116 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2117 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2119 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2120 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2121 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2122 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2123 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2125 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2126 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2127 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2128 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2130 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2131 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2138 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2139 unsigned int ioctl
, unsigned long arg
)
2141 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2142 void __user
*argp
= (void __user
*)arg
;
2144 struct kvm_lapic_state
*lapic
= NULL
;
2147 case KVM_GET_LAPIC
: {
2149 if (!vcpu
->arch
.apic
)
2151 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2156 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
2160 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
2165 case KVM_SET_LAPIC
: {
2167 if (!vcpu
->arch
.apic
)
2169 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2174 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2176 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
2182 case KVM_INTERRUPT
: {
2183 struct kvm_interrupt irq
;
2186 if (copy_from_user(&irq
, argp
, sizeof irq
))
2188 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2195 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2201 case KVM_SET_CPUID
: {
2202 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2203 struct kvm_cpuid cpuid
;
2206 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2208 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2213 case KVM_SET_CPUID2
: {
2214 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2215 struct kvm_cpuid2 cpuid
;
2218 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2220 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2221 cpuid_arg
->entries
);
2226 case KVM_GET_CPUID2
: {
2227 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2228 struct kvm_cpuid2 cpuid
;
2231 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2233 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2234 cpuid_arg
->entries
);
2238 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2244 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2247 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2249 case KVM_TPR_ACCESS_REPORTING
: {
2250 struct kvm_tpr_access_ctl tac
;
2253 if (copy_from_user(&tac
, argp
, sizeof tac
))
2255 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2259 if (copy_to_user(argp
, &tac
, sizeof tac
))
2264 case KVM_SET_VAPIC_ADDR
: {
2265 struct kvm_vapic_addr va
;
2268 if (!irqchip_in_kernel(vcpu
->kvm
))
2271 if (copy_from_user(&va
, argp
, sizeof va
))
2274 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2277 case KVM_X86_SETUP_MCE
: {
2281 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2283 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2286 case KVM_X86_SET_MCE
: {
2287 struct kvm_x86_mce mce
;
2290 if (copy_from_user(&mce
, argp
, sizeof mce
))
2292 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2295 case KVM_GET_VCPU_EVENTS
: {
2296 struct kvm_vcpu_events events
;
2298 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2301 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2306 case KVM_SET_VCPU_EVENTS
: {
2307 struct kvm_vcpu_events events
;
2310 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2313 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2324 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2328 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2330 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2334 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2337 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2341 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2342 u32 kvm_nr_mmu_pages
)
2344 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2347 mutex_lock(&kvm
->slots_lock
);
2348 spin_lock(&kvm
->mmu_lock
);
2350 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2351 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2353 spin_unlock(&kvm
->mmu_lock
);
2354 mutex_unlock(&kvm
->slots_lock
);
2358 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2360 return kvm
->arch
.n_alloc_mmu_pages
;
2363 gfn_t
unalias_gfn_instantiation(struct kvm
*kvm
, gfn_t gfn
)
2366 struct kvm_mem_alias
*alias
;
2367 struct kvm_mem_aliases
*aliases
;
2369 aliases
= rcu_dereference(kvm
->arch
.aliases
);
2371 for (i
= 0; i
< aliases
->naliases
; ++i
) {
2372 alias
= &aliases
->aliases
[i
];
2373 if (alias
->flags
& KVM_ALIAS_INVALID
)
2375 if (gfn
>= alias
->base_gfn
2376 && gfn
< alias
->base_gfn
+ alias
->npages
)
2377 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2382 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
2385 struct kvm_mem_alias
*alias
;
2386 struct kvm_mem_aliases
*aliases
;
2388 aliases
= rcu_dereference(kvm
->arch
.aliases
);
2390 for (i
= 0; i
< aliases
->naliases
; ++i
) {
2391 alias
= &aliases
->aliases
[i
];
2392 if (gfn
>= alias
->base_gfn
2393 && gfn
< alias
->base_gfn
+ alias
->npages
)
2394 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2400 * Set a new alias region. Aliases map a portion of physical memory into
2401 * another portion. This is useful for memory windows, for example the PC
2404 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
2405 struct kvm_memory_alias
*alias
)
2408 struct kvm_mem_alias
*p
;
2409 struct kvm_mem_aliases
*aliases
, *old_aliases
;
2412 /* General sanity checks */
2413 if (alias
->memory_size
& (PAGE_SIZE
- 1))
2415 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
2417 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
2419 if (alias
->guest_phys_addr
+ alias
->memory_size
2420 < alias
->guest_phys_addr
)
2422 if (alias
->target_phys_addr
+ alias
->memory_size
2423 < alias
->target_phys_addr
)
2427 aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
2431 mutex_lock(&kvm
->slots_lock
);
2433 /* invalidate any gfn reference in case of deletion/shrinking */
2434 memcpy(aliases
, kvm
->arch
.aliases
, sizeof(struct kvm_mem_aliases
));
2435 aliases
->aliases
[alias
->slot
].flags
|= KVM_ALIAS_INVALID
;
2436 old_aliases
= kvm
->arch
.aliases
;
2437 rcu_assign_pointer(kvm
->arch
.aliases
, aliases
);
2438 synchronize_srcu_expedited(&kvm
->srcu
);
2439 kvm_mmu_zap_all(kvm
);
2443 aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
2447 memcpy(aliases
, kvm
->arch
.aliases
, sizeof(struct kvm_mem_aliases
));
2449 p
= &aliases
->aliases
[alias
->slot
];
2450 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
2451 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
2452 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
2453 p
->flags
&= ~(KVM_ALIAS_INVALID
);
2455 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
2456 if (aliases
->aliases
[n
- 1].npages
)
2458 aliases
->naliases
= n
;
2460 old_aliases
= kvm
->arch
.aliases
;
2461 rcu_assign_pointer(kvm
->arch
.aliases
, aliases
);
2462 synchronize_srcu_expedited(&kvm
->srcu
);
2467 mutex_unlock(&kvm
->slots_lock
);
2472 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2477 switch (chip
->chip_id
) {
2478 case KVM_IRQCHIP_PIC_MASTER
:
2479 memcpy(&chip
->chip
.pic
,
2480 &pic_irqchip(kvm
)->pics
[0],
2481 sizeof(struct kvm_pic_state
));
2483 case KVM_IRQCHIP_PIC_SLAVE
:
2484 memcpy(&chip
->chip
.pic
,
2485 &pic_irqchip(kvm
)->pics
[1],
2486 sizeof(struct kvm_pic_state
));
2488 case KVM_IRQCHIP_IOAPIC
:
2489 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2498 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2503 switch (chip
->chip_id
) {
2504 case KVM_IRQCHIP_PIC_MASTER
:
2505 spin_lock(&pic_irqchip(kvm
)->lock
);
2506 memcpy(&pic_irqchip(kvm
)->pics
[0],
2508 sizeof(struct kvm_pic_state
));
2509 spin_unlock(&pic_irqchip(kvm
)->lock
);
2511 case KVM_IRQCHIP_PIC_SLAVE
:
2512 spin_lock(&pic_irqchip(kvm
)->lock
);
2513 memcpy(&pic_irqchip(kvm
)->pics
[1],
2515 sizeof(struct kvm_pic_state
));
2516 spin_unlock(&pic_irqchip(kvm
)->lock
);
2518 case KVM_IRQCHIP_IOAPIC
:
2519 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
2525 kvm_pic_update_irq(pic_irqchip(kvm
));
2529 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2533 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2534 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2535 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2539 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2543 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2544 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2545 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2546 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2550 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2554 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2555 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2556 sizeof(ps
->channels
));
2557 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2558 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2562 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2564 int r
= 0, start
= 0;
2565 u32 prev_legacy
, cur_legacy
;
2566 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2567 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2568 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2569 if (!prev_legacy
&& cur_legacy
)
2571 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2572 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2573 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2574 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2575 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2579 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2580 struct kvm_reinject_control
*control
)
2582 if (!kvm
->arch
.vpit
)
2584 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2585 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2586 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2591 * Get (and clear) the dirty memory log for a memory slot.
2593 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2594 struct kvm_dirty_log
*log
)
2597 struct kvm_memory_slot
*memslot
;
2598 unsigned long is_dirty
= 0;
2599 unsigned long *dirty_bitmap
= NULL
;
2601 mutex_lock(&kvm
->slots_lock
);
2604 if (log
->slot
>= KVM_MEMORY_SLOTS
)
2607 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
2609 if (!memslot
->dirty_bitmap
)
2612 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2615 dirty_bitmap
= vmalloc(n
);
2618 memset(dirty_bitmap
, 0, n
);
2620 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
2621 is_dirty
= memslot
->dirty_bitmap
[i
];
2623 /* If nothing is dirty, don't bother messing with page tables. */
2625 struct kvm_memslots
*slots
, *old_slots
;
2627 spin_lock(&kvm
->mmu_lock
);
2628 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2629 spin_unlock(&kvm
->mmu_lock
);
2631 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
2635 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
2636 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
2638 old_slots
= kvm
->memslots
;
2639 rcu_assign_pointer(kvm
->memslots
, slots
);
2640 synchronize_srcu_expedited(&kvm
->srcu
);
2641 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
2646 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
2649 vfree(dirty_bitmap
);
2651 mutex_unlock(&kvm
->slots_lock
);
2655 long kvm_arch_vm_ioctl(struct file
*filp
,
2656 unsigned int ioctl
, unsigned long arg
)
2658 struct kvm
*kvm
= filp
->private_data
;
2659 void __user
*argp
= (void __user
*)arg
;
2662 * This union makes it completely explicit to gcc-3.x
2663 * that these two variables' stack usage should be
2664 * combined, not added together.
2667 struct kvm_pit_state ps
;
2668 struct kvm_pit_state2 ps2
;
2669 struct kvm_memory_alias alias
;
2670 struct kvm_pit_config pit_config
;
2674 case KVM_SET_TSS_ADDR
:
2675 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2679 case KVM_SET_IDENTITY_MAP_ADDR
: {
2683 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2685 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2690 case KVM_SET_MEMORY_REGION
: {
2691 struct kvm_memory_region kvm_mem
;
2692 struct kvm_userspace_memory_region kvm_userspace_mem
;
2695 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2697 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2698 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2699 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2700 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2701 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2706 case KVM_SET_NR_MMU_PAGES
:
2707 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2711 case KVM_GET_NR_MMU_PAGES
:
2712 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2714 case KVM_SET_MEMORY_ALIAS
:
2716 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2718 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2722 case KVM_CREATE_IRQCHIP
: {
2723 struct kvm_pic
*vpic
;
2725 mutex_lock(&kvm
->lock
);
2728 goto create_irqchip_unlock
;
2730 vpic
= kvm_create_pic(kvm
);
2732 r
= kvm_ioapic_init(kvm
);
2735 goto create_irqchip_unlock
;
2738 goto create_irqchip_unlock
;
2740 kvm
->arch
.vpic
= vpic
;
2742 r
= kvm_setup_default_irq_routing(kvm
);
2744 mutex_lock(&kvm
->irq_lock
);
2745 kfree(kvm
->arch
.vpic
);
2746 kfree(kvm
->arch
.vioapic
);
2747 kvm
->arch
.vpic
= NULL
;
2748 kvm
->arch
.vioapic
= NULL
;
2749 mutex_unlock(&kvm
->irq_lock
);
2751 create_irqchip_unlock
:
2752 mutex_unlock(&kvm
->lock
);
2755 case KVM_CREATE_PIT
:
2756 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2758 case KVM_CREATE_PIT2
:
2760 if (copy_from_user(&u
.pit_config
, argp
,
2761 sizeof(struct kvm_pit_config
)))
2764 mutex_lock(&kvm
->slots_lock
);
2767 goto create_pit_unlock
;
2769 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2773 mutex_unlock(&kvm
->slots_lock
);
2775 case KVM_IRQ_LINE_STATUS
:
2776 case KVM_IRQ_LINE
: {
2777 struct kvm_irq_level irq_event
;
2780 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2782 if (irqchip_in_kernel(kvm
)) {
2784 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2785 irq_event
.irq
, irq_event
.level
);
2786 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2787 irq_event
.status
= status
;
2788 if (copy_to_user(argp
, &irq_event
,
2796 case KVM_GET_IRQCHIP
: {
2797 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2798 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2804 if (copy_from_user(chip
, argp
, sizeof *chip
))
2805 goto get_irqchip_out
;
2807 if (!irqchip_in_kernel(kvm
))
2808 goto get_irqchip_out
;
2809 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2811 goto get_irqchip_out
;
2813 if (copy_to_user(argp
, chip
, sizeof *chip
))
2814 goto get_irqchip_out
;
2822 case KVM_SET_IRQCHIP
: {
2823 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2824 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2830 if (copy_from_user(chip
, argp
, sizeof *chip
))
2831 goto set_irqchip_out
;
2833 if (!irqchip_in_kernel(kvm
))
2834 goto set_irqchip_out
;
2835 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2837 goto set_irqchip_out
;
2847 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2850 if (!kvm
->arch
.vpit
)
2852 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2856 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2863 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2866 if (!kvm
->arch
.vpit
)
2868 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2874 case KVM_GET_PIT2
: {
2876 if (!kvm
->arch
.vpit
)
2878 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2882 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2887 case KVM_SET_PIT2
: {
2889 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2892 if (!kvm
->arch
.vpit
)
2894 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2900 case KVM_REINJECT_CONTROL
: {
2901 struct kvm_reinject_control control
;
2903 if (copy_from_user(&control
, argp
, sizeof(control
)))
2905 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2911 case KVM_XEN_HVM_CONFIG
: {
2913 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
2914 sizeof(struct kvm_xen_hvm_config
)))
2917 if (kvm
->arch
.xen_hvm_config
.flags
)
2922 case KVM_SET_CLOCK
: {
2923 struct timespec now
;
2924 struct kvm_clock_data user_ns
;
2929 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
2938 now_ns
= timespec_to_ns(&now
);
2939 delta
= user_ns
.clock
- now_ns
;
2940 kvm
->arch
.kvmclock_offset
= delta
;
2943 case KVM_GET_CLOCK
: {
2944 struct timespec now
;
2945 struct kvm_clock_data user_ns
;
2949 now_ns
= timespec_to_ns(&now
);
2950 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
2954 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
2967 static void kvm_init_msr_list(void)
2972 /* skip the first msrs in the list. KVM-specific */
2973 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2974 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2977 msrs_to_save
[j
] = msrs_to_save
[i
];
2980 num_msrs_to_save
= j
;
2983 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
2986 if (vcpu
->arch
.apic
&&
2987 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2990 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
2993 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
2995 if (vcpu
->arch
.apic
&&
2996 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2999 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3002 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3003 struct kvm_vcpu
*vcpu
)
3006 int r
= X86EMUL_CONTINUE
;
3009 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
3010 unsigned offset
= addr
& (PAGE_SIZE
-1);
3011 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3014 if (gpa
== UNMAPPED_GVA
) {
3015 r
= X86EMUL_PROPAGATE_FAULT
;
3018 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3020 r
= X86EMUL_UNHANDLEABLE
;
3032 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3033 struct kvm_vcpu
*vcpu
)
3036 int r
= X86EMUL_CONTINUE
;
3039 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
3040 unsigned offset
= addr
& (PAGE_SIZE
-1);
3041 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3044 if (gpa
== UNMAPPED_GVA
) {
3045 r
= X86EMUL_PROPAGATE_FAULT
;
3048 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3050 r
= X86EMUL_UNHANDLEABLE
;
3063 static int emulator_read_emulated(unsigned long addr
,
3066 struct kvm_vcpu
*vcpu
)
3070 if (vcpu
->mmio_read_completed
) {
3071 memcpy(val
, vcpu
->mmio_data
, bytes
);
3072 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3073 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3074 vcpu
->mmio_read_completed
= 0;
3075 return X86EMUL_CONTINUE
;
3078 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
3080 /* For APIC access vmexit */
3081 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3084 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
3085 == X86EMUL_CONTINUE
)
3086 return X86EMUL_CONTINUE
;
3087 if (gpa
== UNMAPPED_GVA
)
3088 return X86EMUL_PROPAGATE_FAULT
;
3092 * Is this MMIO handled locally?
3094 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3095 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3096 return X86EMUL_CONTINUE
;
3099 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3101 vcpu
->mmio_needed
= 1;
3102 vcpu
->mmio_phys_addr
= gpa
;
3103 vcpu
->mmio_size
= bytes
;
3104 vcpu
->mmio_is_write
= 0;
3106 return X86EMUL_UNHANDLEABLE
;
3109 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3110 const void *val
, int bytes
)
3114 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3117 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3121 static int emulator_write_emulated_onepage(unsigned long addr
,
3124 struct kvm_vcpu
*vcpu
)
3128 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
3130 if (gpa
== UNMAPPED_GVA
) {
3131 kvm_inject_page_fault(vcpu
, addr
, 2);
3132 return X86EMUL_PROPAGATE_FAULT
;
3135 /* For APIC access vmexit */
3136 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3139 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3140 return X86EMUL_CONTINUE
;
3143 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3145 * Is this MMIO handled locally?
3147 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3148 return X86EMUL_CONTINUE
;
3150 vcpu
->mmio_needed
= 1;
3151 vcpu
->mmio_phys_addr
= gpa
;
3152 vcpu
->mmio_size
= bytes
;
3153 vcpu
->mmio_is_write
= 1;
3154 memcpy(vcpu
->mmio_data
, val
, bytes
);
3156 return X86EMUL_CONTINUE
;
3159 int emulator_write_emulated(unsigned long addr
,
3162 struct kvm_vcpu
*vcpu
)
3164 /* Crossing a page boundary? */
3165 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3168 now
= -addr
& ~PAGE_MASK
;
3169 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
3170 if (rc
!= X86EMUL_CONTINUE
)
3176 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
3178 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
3180 static int emulator_cmpxchg_emulated(unsigned long addr
,
3184 struct kvm_vcpu
*vcpu
)
3186 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3187 #ifndef CONFIG_X86_64
3188 /* guests cmpxchg8b have to be emulated atomically */
3195 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
3197 if (gpa
== UNMAPPED_GVA
||
3198 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3201 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3206 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3208 kaddr
= kmap_atomic(page
, KM_USER0
);
3209 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
3210 kunmap_atomic(kaddr
, KM_USER0
);
3211 kvm_release_page_dirty(page
);
3216 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
3219 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
3221 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
3224 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
3226 kvm_mmu_invlpg(vcpu
, address
);
3227 return X86EMUL_CONTINUE
;
3230 int emulate_clts(struct kvm_vcpu
*vcpu
)
3232 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
3233 return X86EMUL_CONTINUE
;
3236 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
3238 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
3242 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
3243 return X86EMUL_CONTINUE
;
3245 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
3246 return X86EMUL_UNHANDLEABLE
;
3250 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
3252 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
3255 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
3257 /* FIXME: better handling */
3258 return X86EMUL_UNHANDLEABLE
;
3260 return X86EMUL_CONTINUE
;
3263 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
3266 unsigned long rip
= kvm_rip_read(vcpu
);
3267 unsigned long rip_linear
;
3269 if (!printk_ratelimit())
3272 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
3274 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
3276 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3277 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
3279 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
3281 static struct x86_emulate_ops emulate_ops
= {
3282 .read_std
= kvm_read_guest_virt
,
3283 .read_emulated
= emulator_read_emulated
,
3284 .write_emulated
= emulator_write_emulated
,
3285 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
3288 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
3290 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3291 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3292 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
3293 vcpu
->arch
.regs_dirty
= ~0;
3296 int emulate_instruction(struct kvm_vcpu
*vcpu
,
3302 struct decode_cache
*c
;
3303 struct kvm_run
*run
= vcpu
->run
;
3305 kvm_clear_exception_queue(vcpu
);
3306 vcpu
->arch
.mmio_fault_cr2
= cr2
;
3308 * TODO: fix emulate.c to use guest_read/write_register
3309 * instead of direct ->regs accesses, can save hundred cycles
3310 * on Intel for instructions that don't read/change RSP, for
3313 cache_all_regs(vcpu
);
3315 vcpu
->mmio_is_write
= 0;
3316 vcpu
->arch
.pio
.string
= 0;
3318 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
3320 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
3322 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
3323 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_get_rflags(vcpu
);
3324 vcpu
->arch
.emulate_ctxt
.mode
=
3325 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
3326 ? X86EMUL_MODE_REAL
: cs_l
3327 ? X86EMUL_MODE_PROT64
: cs_db
3328 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
3330 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3332 /* Only allow emulation of specific instructions on #UD
3333 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3334 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
3335 if (emulation_type
& EMULTYPE_TRAP_UD
) {
3337 return EMULATE_FAIL
;
3339 case 0x01: /* VMMCALL */
3340 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
3341 return EMULATE_FAIL
;
3343 case 0x34: /* sysenter */
3344 case 0x35: /* sysexit */
3345 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3346 return EMULATE_FAIL
;
3348 case 0x05: /* syscall */
3349 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3350 return EMULATE_FAIL
;
3353 return EMULATE_FAIL
;
3356 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
3357 return EMULATE_FAIL
;
3360 ++vcpu
->stat
.insn_emulation
;
3362 ++vcpu
->stat
.insn_emulation_fail
;
3363 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3364 return EMULATE_DONE
;
3365 return EMULATE_FAIL
;
3369 if (emulation_type
& EMULTYPE_SKIP
) {
3370 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
3371 return EMULATE_DONE
;
3374 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3375 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
3378 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
3380 if (vcpu
->arch
.pio
.string
)
3381 return EMULATE_DO_MMIO
;
3383 if ((r
|| vcpu
->mmio_is_write
) && run
) {
3384 run
->exit_reason
= KVM_EXIT_MMIO
;
3385 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
3386 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
3387 run
->mmio
.len
= vcpu
->mmio_size
;
3388 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
3392 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3393 return EMULATE_DONE
;
3394 if (!vcpu
->mmio_needed
) {
3395 kvm_report_emulation_failure(vcpu
, "mmio");
3396 return EMULATE_FAIL
;
3398 return EMULATE_DO_MMIO
;
3401 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
3403 if (vcpu
->mmio_is_write
) {
3404 vcpu
->mmio_needed
= 0;
3405 return EMULATE_DO_MMIO
;
3408 return EMULATE_DONE
;
3410 EXPORT_SYMBOL_GPL(emulate_instruction
);
3412 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
3414 void *p
= vcpu
->arch
.pio_data
;
3415 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
3419 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
3420 if (vcpu
->arch
.pio
.in
)
3421 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
3423 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
3427 int complete_pio(struct kvm_vcpu
*vcpu
)
3429 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3436 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3437 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
3438 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
3442 r
= pio_copy_data(vcpu
);
3449 delta
*= io
->cur_count
;
3451 * The size of the register should really depend on
3452 * current address size.
3454 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3456 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
3462 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3464 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
3466 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3468 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
3472 io
->count
-= io
->cur_count
;
3478 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3480 /* TODO: String I/O for in kernel device */
3483 if (vcpu
->arch
.pio
.in
)
3484 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3485 vcpu
->arch
.pio
.size
, pd
);
3487 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3488 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3493 static int pio_string_write(struct kvm_vcpu
*vcpu
)
3495 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3496 void *pd
= vcpu
->arch
.pio_data
;
3499 for (i
= 0; i
< io
->cur_count
; i
++) {
3500 if (kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3501 io
->port
, io
->size
, pd
)) {
3510 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, int in
, int size
, unsigned port
)
3514 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3515 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3516 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3517 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3518 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
3519 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3520 vcpu
->arch
.pio
.in
= in
;
3521 vcpu
->arch
.pio
.string
= 0;
3522 vcpu
->arch
.pio
.down
= 0;
3523 vcpu
->arch
.pio
.rep
= 0;
3525 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3528 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3529 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
3531 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3537 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
3539 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, int in
,
3540 int size
, unsigned long count
, int down
,
3541 gva_t address
, int rep
, unsigned port
)
3543 unsigned now
, in_page
;
3546 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3547 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3548 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3549 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3550 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
3551 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3552 vcpu
->arch
.pio
.in
= in
;
3553 vcpu
->arch
.pio
.string
= 1;
3554 vcpu
->arch
.pio
.down
= down
;
3555 vcpu
->arch
.pio
.rep
= rep
;
3557 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3561 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3566 in_page
= PAGE_SIZE
- offset_in_page(address
);
3568 in_page
= offset_in_page(address
) + size
;
3569 now
= min(count
, (unsigned long)in_page
/ size
);
3574 * String I/O in reverse. Yuck. Kill the guest, fix later.
3576 pr_unimpl(vcpu
, "guest string pio down\n");
3577 kvm_inject_gp(vcpu
, 0);
3580 vcpu
->run
->io
.count
= now
;
3581 vcpu
->arch
.pio
.cur_count
= now
;
3583 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3584 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3586 vcpu
->arch
.pio
.guest_gva
= address
;
3588 if (!vcpu
->arch
.pio
.in
) {
3589 /* string PIO write */
3590 ret
= pio_copy_data(vcpu
);
3591 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
3592 kvm_inject_gp(vcpu
, 0);
3595 if (ret
== 0 && !pio_string_write(vcpu
)) {
3597 if (vcpu
->arch
.pio
.count
== 0)
3601 /* no string PIO read support yet */
3605 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3607 static void bounce_off(void *info
)
3612 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3615 struct cpufreq_freqs
*freq
= data
;
3617 struct kvm_vcpu
*vcpu
;
3618 int i
, send_ipi
= 0;
3620 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3622 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3624 per_cpu(cpu_tsc_khz
, freq
->cpu
) = freq
->new;
3626 spin_lock(&kvm_lock
);
3627 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3628 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3629 if (vcpu
->cpu
!= freq
->cpu
)
3631 if (!kvm_request_guest_time_update(vcpu
))
3633 if (vcpu
->cpu
!= smp_processor_id())
3637 spin_unlock(&kvm_lock
);
3639 if (freq
->old
< freq
->new && send_ipi
) {
3641 * We upscale the frequency. Must make the guest
3642 * doesn't see old kvmclock values while running with
3643 * the new frequency, otherwise we risk the guest sees
3644 * time go backwards.
3646 * In case we update the frequency for another cpu
3647 * (which might be in guest context) send an interrupt
3648 * to kick the cpu out of guest context. Next time
3649 * guest context is entered kvmclock will be updated,
3650 * so the guest will not see stale values.
3652 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3657 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3658 .notifier_call
= kvmclock_cpufreq_notifier
3661 static void kvm_timer_init(void)
3665 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3666 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3667 CPUFREQ_TRANSITION_NOTIFIER
);
3668 for_each_online_cpu(cpu
) {
3669 unsigned long khz
= cpufreq_get(cpu
);
3672 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
3675 for_each_possible_cpu(cpu
)
3676 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3680 int kvm_arch_init(void *opaque
)
3683 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3686 printk(KERN_ERR
"kvm: already loaded the other module\n");
3691 if (!ops
->cpu_has_kvm_support()) {
3692 printk(KERN_ERR
"kvm: no hardware support\n");
3696 if (ops
->disabled_by_bios()) {
3697 printk(KERN_ERR
"kvm: disabled by bios\n");
3702 r
= kvm_mmu_module_init();
3706 kvm_init_msr_list();
3709 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3710 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3711 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3712 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3722 void kvm_arch_exit(void)
3724 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3725 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3726 CPUFREQ_TRANSITION_NOTIFIER
);
3728 kvm_mmu_module_exit();
3731 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3733 ++vcpu
->stat
.halt_exits
;
3734 if (irqchip_in_kernel(vcpu
->kvm
)) {
3735 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3738 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3742 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3744 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3747 if (is_long_mode(vcpu
))
3750 return a0
| ((gpa_t
)a1
<< 32);
3753 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
3755 u64 param
, ingpa
, outgpa
, ret
;
3756 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
3757 bool fast
, longmode
;
3761 * hypercall generates UD from non zero cpl and real mode
3764 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
3765 !kvm_read_cr0_bits(vcpu
, X86_CR0_PE
)) {
3766 kvm_queue_exception(vcpu
, UD_VECTOR
);
3770 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
3771 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
3774 param
= (kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
3775 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffff);
3776 ingpa
= (kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
3777 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffff);
3778 outgpa
= (kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
3779 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffff);
3781 #ifdef CONFIG_X86_64
3783 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3784 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3785 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
3789 code
= param
& 0xffff;
3790 fast
= (param
>> 16) & 0x1;
3791 rep_cnt
= (param
>> 32) & 0xfff;
3792 rep_idx
= (param
>> 48) & 0xfff;
3794 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
3796 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
3798 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
3800 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3802 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
3803 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
3809 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3811 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3814 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
3815 return kvm_hv_hypercall(vcpu
);
3817 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3818 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3819 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3820 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3821 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3823 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3825 if (!is_long_mode(vcpu
)) {
3833 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
3839 case KVM_HC_VAPIC_POLL_IRQ
:
3843 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3850 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3851 ++vcpu
->stat
.hypercalls
;
3854 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3856 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3858 char instruction
[3];
3860 unsigned long rip
= kvm_rip_read(vcpu
);
3864 * Blow out the MMU to ensure that no other VCPU has an active mapping
3865 * to ensure that the updated hypercall appears atomically across all
3868 kvm_mmu_zap_all(vcpu
->kvm
);
3870 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3871 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3872 != X86EMUL_CONTINUE
)
3878 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3880 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3883 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3885 struct descriptor_table dt
= { limit
, base
};
3887 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3890 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3892 struct descriptor_table dt
= { limit
, base
};
3894 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3897 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3898 unsigned long *rflags
)
3900 kvm_lmsw(vcpu
, msw
);
3901 *rflags
= kvm_get_rflags(vcpu
);
3904 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3906 unsigned long value
;
3910 value
= kvm_read_cr0(vcpu
);
3913 value
= vcpu
->arch
.cr2
;
3916 value
= vcpu
->arch
.cr3
;
3919 value
= kvm_read_cr4(vcpu
);
3922 value
= kvm_get_cr8(vcpu
);
3925 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3932 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3933 unsigned long *rflags
)
3937 kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
3938 *rflags
= kvm_get_rflags(vcpu
);
3941 vcpu
->arch
.cr2
= val
;
3944 kvm_set_cr3(vcpu
, val
);
3947 kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
3950 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3953 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3957 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3959 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3960 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3962 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3963 /* when no next entry is found, the current entry[i] is reselected */
3964 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3965 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3966 if (ej
->function
== e
->function
) {
3967 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3971 return 0; /* silence gcc, even though control never reaches here */
3974 /* find an entry with matching function, matching index (if needed), and that
3975 * should be read next (if it's stateful) */
3976 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3977 u32 function
, u32 index
)
3979 if (e
->function
!= function
)
3981 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3983 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3984 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3989 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3990 u32 function
, u32 index
)
3993 struct kvm_cpuid_entry2
*best
= NULL
;
3995 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3996 struct kvm_cpuid_entry2
*e
;
3998 e
= &vcpu
->arch
.cpuid_entries
[i
];
3999 if (is_matching_cpuid_entry(e
, function
, index
)) {
4000 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4001 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4006 * Both basic or both extended?
4008 if (((e
->function
^ function
) & 0x80000000) == 0)
4009 if (!best
|| e
->function
> best
->function
)
4014 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4016 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4018 struct kvm_cpuid_entry2
*best
;
4020 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4022 return best
->eax
& 0xff;
4026 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
4028 u32 function
, index
;
4029 struct kvm_cpuid_entry2
*best
;
4031 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4032 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4033 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
4034 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
4035 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
4036 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
4037 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
4039 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
4040 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
4041 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
4042 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
4044 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4045 trace_kvm_cpuid(function
,
4046 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
4047 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
4048 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
4049 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
4051 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
4054 * Check if userspace requested an interrupt window, and that the
4055 * interrupt window is open.
4057 * No need to exit to userspace if we already have an interrupt queued.
4059 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
4061 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
4062 vcpu
->run
->request_interrupt_window
&&
4063 kvm_arch_interrupt_allowed(vcpu
));
4066 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
4068 struct kvm_run
*kvm_run
= vcpu
->run
;
4070 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
4071 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
4072 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
4073 if (irqchip_in_kernel(vcpu
->kvm
))
4074 kvm_run
->ready_for_interrupt_injection
= 1;
4076 kvm_run
->ready_for_interrupt_injection
=
4077 kvm_arch_interrupt_allowed(vcpu
) &&
4078 !kvm_cpu_has_interrupt(vcpu
) &&
4079 !kvm_event_needs_reinjection(vcpu
);
4082 static void vapic_enter(struct kvm_vcpu
*vcpu
)
4084 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4087 if (!apic
|| !apic
->vapic_addr
)
4090 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4092 vcpu
->arch
.apic
->vapic_page
= page
;
4095 static void vapic_exit(struct kvm_vcpu
*vcpu
)
4097 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4100 if (!apic
|| !apic
->vapic_addr
)
4103 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4104 kvm_release_page_dirty(apic
->vapic_page
);
4105 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4106 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4109 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
4113 if (!kvm_x86_ops
->update_cr8_intercept
)
4116 if (!vcpu
->arch
.apic
)
4119 if (!vcpu
->arch
.apic
->vapic_addr
)
4120 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
4127 tpr
= kvm_lapic_get_cr8(vcpu
);
4129 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
4132 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
4134 /* try to reinject previous events if any */
4135 if (vcpu
->arch
.exception
.pending
) {
4136 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
4137 vcpu
->arch
.exception
.has_error_code
,
4138 vcpu
->arch
.exception
.error_code
);
4142 if (vcpu
->arch
.nmi_injected
) {
4143 kvm_x86_ops
->set_nmi(vcpu
);
4147 if (vcpu
->arch
.interrupt
.pending
) {
4148 kvm_x86_ops
->set_irq(vcpu
);
4152 /* try to inject new event if pending */
4153 if (vcpu
->arch
.nmi_pending
) {
4154 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
4155 vcpu
->arch
.nmi_pending
= false;
4156 vcpu
->arch
.nmi_injected
= true;
4157 kvm_x86_ops
->set_nmi(vcpu
);
4159 } else if (kvm_cpu_has_interrupt(vcpu
)) {
4160 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
4161 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
4163 kvm_x86_ops
->set_irq(vcpu
);
4168 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
4171 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
4172 vcpu
->run
->request_interrupt_window
;
4175 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
4176 kvm_mmu_unload(vcpu
);
4178 r
= kvm_mmu_reload(vcpu
);
4182 if (vcpu
->requests
) {
4183 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
4184 __kvm_migrate_timers(vcpu
);
4185 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
4186 kvm_write_guest_time(vcpu
);
4187 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
4188 kvm_mmu_sync_roots(vcpu
);
4189 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
4190 kvm_x86_ops
->tlb_flush(vcpu
);
4191 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
4193 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
4197 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
4198 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
4202 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU
, &vcpu
->requests
)) {
4203 vcpu
->fpu_active
= 0;
4204 kvm_x86_ops
->fpu_deactivate(vcpu
);
4210 kvm_x86_ops
->prepare_guest_switch(vcpu
);
4211 kvm_load_guest_fpu(vcpu
);
4213 local_irq_disable();
4215 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4216 smp_mb__after_clear_bit();
4218 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
4219 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4226 inject_pending_event(vcpu
);
4228 /* enable NMI/IRQ window open exits if needed */
4229 if (vcpu
->arch
.nmi_pending
)
4230 kvm_x86_ops
->enable_nmi_window(vcpu
);
4231 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
4232 kvm_x86_ops
->enable_irq_window(vcpu
);
4234 if (kvm_lapic_enabled(vcpu
)) {
4235 update_cr8_intercept(vcpu
);
4236 kvm_lapic_sync_to_vapic(vcpu
);
4239 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
4243 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
4245 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
4246 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
4247 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
4248 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
4251 trace_kvm_entry(vcpu
->vcpu_id
);
4252 kvm_x86_ops
->run(vcpu
);
4255 * If the guest has used debug registers, at least dr7
4256 * will be disabled while returning to the host.
4257 * If we don't have active breakpoints in the host, we don't
4258 * care about the messed up debug address registers. But if
4259 * we have some of them active, restore the old state.
4261 if (hw_breakpoint_active())
4262 hw_breakpoint_restore();
4264 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4270 * We must have an instruction between local_irq_enable() and
4271 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4272 * the interrupt shadow. The stat.exits increment will do nicely.
4273 * But we need to prevent reordering, hence this barrier():
4281 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4284 * Profile KVM exit RIPs:
4286 if (unlikely(prof_on
== KVM_PROFILING
)) {
4287 unsigned long rip
= kvm_rip_read(vcpu
);
4288 profile_hit(KVM_PROFILING
, (void *)rip
);
4292 kvm_lapic_sync_from_vapic(vcpu
);
4294 r
= kvm_x86_ops
->handle_exit(vcpu
);
4300 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
4303 struct kvm
*kvm
= vcpu
->kvm
;
4305 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
4306 pr_debug("vcpu %d received sipi with vector # %x\n",
4307 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
4308 kvm_lapic_reset(vcpu
);
4309 r
= kvm_arch_vcpu_reset(vcpu
);
4312 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4315 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4320 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
4321 r
= vcpu_enter_guest(vcpu
);
4323 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4324 kvm_vcpu_block(vcpu
);
4325 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4326 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
4328 switch(vcpu
->arch
.mp_state
) {
4329 case KVM_MP_STATE_HALTED
:
4330 vcpu
->arch
.mp_state
=
4331 KVM_MP_STATE_RUNNABLE
;
4332 case KVM_MP_STATE_RUNNABLE
:
4334 case KVM_MP_STATE_SIPI_RECEIVED
:
4345 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
4346 if (kvm_cpu_has_pending_timer(vcpu
))
4347 kvm_inject_pending_timer_irqs(vcpu
);
4349 if (dm_request_for_irq_injection(vcpu
)) {
4351 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4352 ++vcpu
->stat
.request_irq_exits
;
4354 if (signal_pending(current
)) {
4356 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4357 ++vcpu
->stat
.signal_exits
;
4359 if (need_resched()) {
4360 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4362 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4366 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4367 post_kvm_run_save(vcpu
);
4374 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
4381 if (vcpu
->sigset_active
)
4382 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
4384 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
4385 kvm_vcpu_block(vcpu
);
4386 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
4391 /* re-sync apic's tpr */
4392 if (!irqchip_in_kernel(vcpu
->kvm
))
4393 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
4395 if (vcpu
->arch
.pio
.cur_count
) {
4396 r
= complete_pio(vcpu
);
4400 if (vcpu
->mmio_needed
) {
4401 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
4402 vcpu
->mmio_read_completed
= 1;
4403 vcpu
->mmio_needed
= 0;
4405 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4406 r
= emulate_instruction(vcpu
, vcpu
->arch
.mmio_fault_cr2
, 0,
4407 EMULTYPE_NO_DECODE
);
4408 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
4409 if (r
== EMULATE_DO_MMIO
) {
4411 * Read-modify-write. Back to userspace.
4417 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
4418 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
4419 kvm_run
->hypercall
.ret
);
4421 r
= __vcpu_run(vcpu
);
4424 if (vcpu
->sigset_active
)
4425 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
4431 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4435 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4436 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4437 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4438 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4439 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4440 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4441 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4442 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4443 #ifdef CONFIG_X86_64
4444 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4445 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
4446 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
4447 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
4448 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
4449 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
4450 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
4451 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
4454 regs
->rip
= kvm_rip_read(vcpu
);
4455 regs
->rflags
= kvm_get_rflags(vcpu
);
4462 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4466 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
4467 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
4468 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
4469 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
4470 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
4471 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
4472 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
4473 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
4474 #ifdef CONFIG_X86_64
4475 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
4476 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
4477 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
4478 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
4479 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
4480 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
4481 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
4482 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
4485 kvm_rip_write(vcpu
, regs
->rip
);
4486 kvm_set_rflags(vcpu
, regs
->rflags
);
4488 vcpu
->arch
.exception
.pending
= false;
4495 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4496 struct kvm_segment
*var
, int seg
)
4498 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4501 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
4503 struct kvm_segment cs
;
4505 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
4509 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
4511 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
4512 struct kvm_sregs
*sregs
)
4514 struct descriptor_table dt
;
4518 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4519 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4520 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4521 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4522 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4523 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4525 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4526 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4528 kvm_x86_ops
->get_idt(vcpu
, &dt
);
4529 sregs
->idt
.limit
= dt
.limit
;
4530 sregs
->idt
.base
= dt
.base
;
4531 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
4532 sregs
->gdt
.limit
= dt
.limit
;
4533 sregs
->gdt
.base
= dt
.base
;
4535 sregs
->cr0
= kvm_read_cr0(vcpu
);
4536 sregs
->cr2
= vcpu
->arch
.cr2
;
4537 sregs
->cr3
= vcpu
->arch
.cr3
;
4538 sregs
->cr4
= kvm_read_cr4(vcpu
);
4539 sregs
->cr8
= kvm_get_cr8(vcpu
);
4540 sregs
->efer
= vcpu
->arch
.shadow_efer
;
4541 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
4543 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
4545 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
4546 set_bit(vcpu
->arch
.interrupt
.nr
,
4547 (unsigned long *)sregs
->interrupt_bitmap
);
4554 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
4555 struct kvm_mp_state
*mp_state
)
4558 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
4563 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
4564 struct kvm_mp_state
*mp_state
)
4567 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
4572 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4573 struct kvm_segment
*var
, int seg
)
4575 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4578 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
4579 struct kvm_segment
*kvm_desct
)
4581 kvm_desct
->base
= get_desc_base(seg_desc
);
4582 kvm_desct
->limit
= get_desc_limit(seg_desc
);
4584 kvm_desct
->limit
<<= 12;
4585 kvm_desct
->limit
|= 0xfff;
4587 kvm_desct
->selector
= selector
;
4588 kvm_desct
->type
= seg_desc
->type
;
4589 kvm_desct
->present
= seg_desc
->p
;
4590 kvm_desct
->dpl
= seg_desc
->dpl
;
4591 kvm_desct
->db
= seg_desc
->d
;
4592 kvm_desct
->s
= seg_desc
->s
;
4593 kvm_desct
->l
= seg_desc
->l
;
4594 kvm_desct
->g
= seg_desc
->g
;
4595 kvm_desct
->avl
= seg_desc
->avl
;
4597 kvm_desct
->unusable
= 1;
4599 kvm_desct
->unusable
= 0;
4600 kvm_desct
->padding
= 0;
4603 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
4605 struct descriptor_table
*dtable
)
4607 if (selector
& 1 << 2) {
4608 struct kvm_segment kvm_seg
;
4610 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
4612 if (kvm_seg
.unusable
)
4615 dtable
->limit
= kvm_seg
.limit
;
4616 dtable
->base
= kvm_seg
.base
;
4619 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
4622 /* allowed just for 8 bytes segments */
4623 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4624 struct desc_struct
*seg_desc
)
4626 struct descriptor_table dtable
;
4627 u16 index
= selector
>> 3;
4629 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4631 if (dtable
.limit
< index
* 8 + 7) {
4632 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4635 return kvm_read_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4638 /* allowed just for 8 bytes segments */
4639 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4640 struct desc_struct
*seg_desc
)
4642 struct descriptor_table dtable
;
4643 u16 index
= selector
>> 3;
4645 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4647 if (dtable
.limit
< index
* 8 + 7)
4649 return kvm_write_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4652 static gpa_t
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
4653 struct desc_struct
*seg_desc
)
4655 u32 base_addr
= get_desc_base(seg_desc
);
4657 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
4660 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4662 struct kvm_segment kvm_seg
;
4664 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4665 return kvm_seg
.selector
;
4668 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
4670 struct kvm_segment
*kvm_seg
)
4672 struct desc_struct seg_desc
;
4674 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
4676 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
4680 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4682 struct kvm_segment segvar
= {
4683 .base
= selector
<< 4,
4685 .selector
= selector
,
4696 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4700 static int is_vm86_segment(struct kvm_vcpu
*vcpu
, int seg
)
4702 return (seg
!= VCPU_SREG_LDTR
) &&
4703 (seg
!= VCPU_SREG_TR
) &&
4704 (kvm_get_rflags(vcpu
) & X86_EFLAGS_VM
);
4707 static void kvm_check_segment_descriptor(struct kvm_vcpu
*vcpu
, int seg
,
4710 /* NULL selector is not valid for CS and SS */
4711 if (seg
== VCPU_SREG_CS
|| seg
== VCPU_SREG_SS
)
4713 kvm_queue_exception_e(vcpu
, TS_VECTOR
, selector
>> 3);
4716 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4717 int type_bits
, int seg
)
4719 struct kvm_segment kvm_seg
;
4721 if (is_vm86_segment(vcpu
, seg
) || !(kvm_read_cr0_bits(vcpu
, X86_CR0_PE
)))
4722 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4723 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4726 kvm_check_segment_descriptor(vcpu
, seg
, selector
);
4727 kvm_seg
.type
|= type_bits
;
4729 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4730 seg
!= VCPU_SREG_LDTR
)
4732 kvm_seg
.unusable
= 1;
4734 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4738 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4739 struct tss_segment_32
*tss
)
4741 tss
->cr3
= vcpu
->arch
.cr3
;
4742 tss
->eip
= kvm_rip_read(vcpu
);
4743 tss
->eflags
= kvm_get_rflags(vcpu
);
4744 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4745 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4746 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4747 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4748 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4749 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4750 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4751 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4752 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4753 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4754 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4755 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4756 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4757 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4758 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4761 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4762 struct tss_segment_32
*tss
)
4764 kvm_set_cr3(vcpu
, tss
->cr3
);
4766 kvm_rip_write(vcpu
, tss
->eip
);
4767 kvm_set_rflags(vcpu
, tss
->eflags
| 2);
4769 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4770 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4771 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4772 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4773 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4774 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4775 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4776 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4778 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4781 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4784 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4787 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4790 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4793 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4796 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4801 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4802 struct tss_segment_16
*tss
)
4804 tss
->ip
= kvm_rip_read(vcpu
);
4805 tss
->flag
= kvm_get_rflags(vcpu
);
4806 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4807 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4808 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4809 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4810 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4811 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4812 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4813 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4815 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4816 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4817 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4818 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4819 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4822 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4823 struct tss_segment_16
*tss
)
4825 kvm_rip_write(vcpu
, tss
->ip
);
4826 kvm_set_rflags(vcpu
, tss
->flag
| 2);
4827 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4828 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4829 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4830 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4831 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4832 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4833 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4834 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4836 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4839 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4842 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4845 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4848 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4853 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4854 u16 old_tss_sel
, u32 old_tss_base
,
4855 struct desc_struct
*nseg_desc
)
4857 struct tss_segment_16 tss_segment_16
;
4860 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4861 sizeof tss_segment_16
))
4864 save_state_to_tss16(vcpu
, &tss_segment_16
);
4866 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4867 sizeof tss_segment_16
))
4870 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4871 &tss_segment_16
, sizeof tss_segment_16
))
4874 if (old_tss_sel
!= 0xffff) {
4875 tss_segment_16
.prev_task_link
= old_tss_sel
;
4877 if (kvm_write_guest(vcpu
->kvm
,
4878 get_tss_base_addr(vcpu
, nseg_desc
),
4879 &tss_segment_16
.prev_task_link
,
4880 sizeof tss_segment_16
.prev_task_link
))
4884 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4892 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4893 u16 old_tss_sel
, u32 old_tss_base
,
4894 struct desc_struct
*nseg_desc
)
4896 struct tss_segment_32 tss_segment_32
;
4899 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4900 sizeof tss_segment_32
))
4903 save_state_to_tss32(vcpu
, &tss_segment_32
);
4905 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4906 sizeof tss_segment_32
))
4909 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4910 &tss_segment_32
, sizeof tss_segment_32
))
4913 if (old_tss_sel
!= 0xffff) {
4914 tss_segment_32
.prev_task_link
= old_tss_sel
;
4916 if (kvm_write_guest(vcpu
->kvm
,
4917 get_tss_base_addr(vcpu
, nseg_desc
),
4918 &tss_segment_32
.prev_task_link
,
4919 sizeof tss_segment_32
.prev_task_link
))
4923 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4931 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4933 struct kvm_segment tr_seg
;
4934 struct desc_struct cseg_desc
;
4935 struct desc_struct nseg_desc
;
4937 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4938 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4940 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4942 /* FIXME: Handle errors. Failure to read either TSS or their
4943 * descriptors should generate a pagefault.
4945 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4948 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4951 if (reason
!= TASK_SWITCH_IRET
) {
4954 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4955 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4956 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4961 if (!nseg_desc
.p
|| get_desc_limit(&nseg_desc
) < 0x67) {
4962 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4966 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4967 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4968 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4971 if (reason
== TASK_SWITCH_IRET
) {
4972 u32 eflags
= kvm_get_rflags(vcpu
);
4973 kvm_set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4976 /* set back link to prev task only if NT bit is set in eflags
4977 note that old_tss_sel is not used afetr this point */
4978 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4979 old_tss_sel
= 0xffff;
4981 if (nseg_desc
.type
& 8)
4982 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4983 old_tss_base
, &nseg_desc
);
4985 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4986 old_tss_base
, &nseg_desc
);
4988 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4989 u32 eflags
= kvm_get_rflags(vcpu
);
4990 kvm_set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4993 if (reason
!= TASK_SWITCH_IRET
) {
4994 nseg_desc
.type
|= (1 << 1);
4995 save_guest_segment_descriptor(vcpu
, tss_selector
,
4999 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0(vcpu
) | X86_CR0_TS
);
5000 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
5002 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
5006 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5008 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5009 struct kvm_sregs
*sregs
)
5011 int mmu_reset_needed
= 0;
5012 int pending_vec
, max_bits
;
5013 struct descriptor_table dt
;
5017 dt
.limit
= sregs
->idt
.limit
;
5018 dt
.base
= sregs
->idt
.base
;
5019 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5020 dt
.limit
= sregs
->gdt
.limit
;
5021 dt
.base
= sregs
->gdt
.base
;
5022 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5024 vcpu
->arch
.cr2
= sregs
->cr2
;
5025 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
5026 vcpu
->arch
.cr3
= sregs
->cr3
;
5028 kvm_set_cr8(vcpu
, sregs
->cr8
);
5030 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
5031 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5032 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5034 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5035 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5036 vcpu
->arch
.cr0
= sregs
->cr0
;
5038 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5039 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5040 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5041 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
5042 mmu_reset_needed
= 1;
5045 if (mmu_reset_needed
)
5046 kvm_mmu_reset_context(vcpu
);
5048 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5049 pending_vec
= find_first_bit(
5050 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5051 if (pending_vec
< max_bits
) {
5052 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5053 pr_debug("Set back pending irq %d\n", pending_vec
);
5054 if (irqchip_in_kernel(vcpu
->kvm
))
5055 kvm_pic_clear_isr_ack(vcpu
->kvm
);
5058 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5059 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5060 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5061 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5062 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5063 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5065 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5066 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5068 update_cr8_intercept(vcpu
);
5070 /* Older userspace won't unhalt the vcpu on reset. */
5071 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5072 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5073 !(kvm_read_cr0_bits(vcpu
, X86_CR0_PE
)))
5074 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5081 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5082 struct kvm_guest_debug
*dbg
)
5084 unsigned long rflags
;
5089 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5091 if (vcpu
->arch
.exception
.pending
)
5093 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5094 kvm_queue_exception(vcpu
, DB_VECTOR
);
5096 kvm_queue_exception(vcpu
, BP_VECTOR
);
5100 * Read rflags as long as potentially injected trace flags are still
5103 rflags
= kvm_get_rflags(vcpu
);
5105 vcpu
->guest_debug
= dbg
->control
;
5106 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5107 vcpu
->guest_debug
= 0;
5109 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5110 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5111 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5112 vcpu
->arch
.switch_db_regs
=
5113 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5115 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5116 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5117 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5120 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5121 vcpu
->arch
.singlestep_cs
=
5122 get_segment_selector(vcpu
, VCPU_SREG_CS
);
5123 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
);
5127 * Trigger an rflags update that will inject or remove the trace
5130 kvm_set_rflags(vcpu
, rflags
);
5132 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5143 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5144 * we have asm/x86/processor.h
5155 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5156 #ifdef CONFIG_X86_64
5157 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5159 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5164 * Translate a guest virtual address to a guest physical address.
5166 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5167 struct kvm_translation
*tr
)
5169 unsigned long vaddr
= tr
->linear_address
;
5174 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5175 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
5176 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5177 tr
->physical_address
= gpa
;
5178 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5186 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5188 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
5192 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5193 fpu
->fcw
= fxsave
->cwd
;
5194 fpu
->fsw
= fxsave
->swd
;
5195 fpu
->ftwx
= fxsave
->twd
;
5196 fpu
->last_opcode
= fxsave
->fop
;
5197 fpu
->last_ip
= fxsave
->rip
;
5198 fpu
->last_dp
= fxsave
->rdp
;
5199 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5206 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5208 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
5212 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5213 fxsave
->cwd
= fpu
->fcw
;
5214 fxsave
->swd
= fpu
->fsw
;
5215 fxsave
->twd
= fpu
->ftwx
;
5216 fxsave
->fop
= fpu
->last_opcode
;
5217 fxsave
->rip
= fpu
->last_ip
;
5218 fxsave
->rdp
= fpu
->last_dp
;
5219 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5226 void fx_init(struct kvm_vcpu
*vcpu
)
5228 unsigned after_mxcsr_mask
;
5231 * Touch the fpu the first time in non atomic context as if
5232 * this is the first fpu instruction the exception handler
5233 * will fire before the instruction returns and it'll have to
5234 * allocate ram with GFP_KERNEL.
5237 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5239 /* Initialize guest FPU by resetting ours and saving into guest's */
5241 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5243 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
5244 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
5247 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5248 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
5249 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
5250 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
5251 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
5253 EXPORT_SYMBOL_GPL(fx_init
);
5255 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5257 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
5260 vcpu
->guest_fpu_loaded
= 1;
5261 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5262 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
5264 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
5266 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5268 if (!vcpu
->guest_fpu_loaded
)
5271 vcpu
->guest_fpu_loaded
= 0;
5272 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
5273 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
5274 ++vcpu
->stat
.fpu_reload
;
5275 set_bit(KVM_REQ_DEACTIVATE_FPU
, &vcpu
->requests
);
5277 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
5279 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5281 if (vcpu
->arch
.time_page
) {
5282 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5283 vcpu
->arch
.time_page
= NULL
;
5286 kvm_x86_ops
->vcpu_free(vcpu
);
5289 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5292 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5295 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5299 /* We do fxsave: this must be aligned. */
5300 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
5302 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5304 r
= kvm_arch_vcpu_reset(vcpu
);
5306 r
= kvm_mmu_setup(vcpu
);
5313 kvm_x86_ops
->vcpu_free(vcpu
);
5317 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5320 kvm_mmu_unload(vcpu
);
5323 kvm_x86_ops
->vcpu_free(vcpu
);
5326 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5328 vcpu
->arch
.nmi_pending
= false;
5329 vcpu
->arch
.nmi_injected
= false;
5331 vcpu
->arch
.switch_db_regs
= 0;
5332 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5333 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5334 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5336 return kvm_x86_ops
->vcpu_reset(vcpu
);
5339 int kvm_arch_hardware_enable(void *garbage
)
5342 * Since this may be called from a hotplug notifcation,
5343 * we can't get the CPU frequency directly.
5345 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5346 int cpu
= raw_smp_processor_id();
5347 per_cpu(cpu_tsc_khz
, cpu
) = 0;
5350 kvm_shared_msr_cpu_online();
5352 return kvm_x86_ops
->hardware_enable(garbage
);
5355 void kvm_arch_hardware_disable(void *garbage
)
5357 kvm_x86_ops
->hardware_disable(garbage
);
5358 drop_user_return_notifiers(garbage
);
5361 int kvm_arch_hardware_setup(void)
5363 return kvm_x86_ops
->hardware_setup();
5366 void kvm_arch_hardware_unsetup(void)
5368 kvm_x86_ops
->hardware_unsetup();
5371 void kvm_arch_check_processor_compat(void *rtn
)
5373 kvm_x86_ops
->check_processor_compatibility(rtn
);
5376 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5382 BUG_ON(vcpu
->kvm
== NULL
);
5385 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5386 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5387 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5389 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5391 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5396 vcpu
->arch
.pio_data
= page_address(page
);
5398 r
= kvm_mmu_create(vcpu
);
5400 goto fail_free_pio_data
;
5402 if (irqchip_in_kernel(kvm
)) {
5403 r
= kvm_create_lapic(vcpu
);
5405 goto fail_mmu_destroy
;
5408 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5410 if (!vcpu
->arch
.mce_banks
) {
5412 goto fail_free_lapic
;
5414 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5418 kvm_free_lapic(vcpu
);
5420 kvm_mmu_destroy(vcpu
);
5422 free_page((unsigned long)vcpu
->arch
.pio_data
);
5427 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5431 kfree(vcpu
->arch
.mce_banks
);
5432 kvm_free_lapic(vcpu
);
5433 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5434 kvm_mmu_destroy(vcpu
);
5435 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5436 free_page((unsigned long)vcpu
->arch
.pio_data
);
5439 struct kvm
*kvm_arch_create_vm(void)
5441 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
5444 return ERR_PTR(-ENOMEM
);
5446 kvm
->arch
.aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
5447 if (!kvm
->arch
.aliases
) {
5449 return ERR_PTR(-ENOMEM
);
5452 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5453 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5455 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5456 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5458 rdtscll(kvm
->arch
.vm_init_tsc
);
5463 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5466 kvm_mmu_unload(vcpu
);
5470 static void kvm_free_vcpus(struct kvm
*kvm
)
5473 struct kvm_vcpu
*vcpu
;
5476 * Unpin any mmu pages first.
5478 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5479 kvm_unload_vcpu_mmu(vcpu
);
5480 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5481 kvm_arch_vcpu_free(vcpu
);
5483 mutex_lock(&kvm
->lock
);
5484 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5485 kvm
->vcpus
[i
] = NULL
;
5487 atomic_set(&kvm
->online_vcpus
, 0);
5488 mutex_unlock(&kvm
->lock
);
5491 void kvm_arch_sync_events(struct kvm
*kvm
)
5493 kvm_free_all_assigned_devices(kvm
);
5496 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5498 kvm_iommu_unmap_guest(kvm
);
5500 kfree(kvm
->arch
.vpic
);
5501 kfree(kvm
->arch
.vioapic
);
5502 kvm_free_vcpus(kvm
);
5503 kvm_free_physmem(kvm
);
5504 if (kvm
->arch
.apic_access_page
)
5505 put_page(kvm
->arch
.apic_access_page
);
5506 if (kvm
->arch
.ept_identity_pagetable
)
5507 put_page(kvm
->arch
.ept_identity_pagetable
);
5508 kfree(kvm
->arch
.aliases
);
5512 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
5513 struct kvm_memory_slot
*memslot
,
5514 struct kvm_memory_slot old
,
5515 struct kvm_userspace_memory_region
*mem
,
5518 int npages
= memslot
->npages
;
5520 /*To keep backward compatibility with older userspace,
5521 *x86 needs to hanlde !user_alloc case.
5524 if (npages
&& !old
.rmap
) {
5525 unsigned long userspace_addr
;
5527 down_write(¤t
->mm
->mmap_sem
);
5528 userspace_addr
= do_mmap(NULL
, 0,
5530 PROT_READ
| PROT_WRITE
,
5531 MAP_PRIVATE
| MAP_ANONYMOUS
,
5533 up_write(¤t
->mm
->mmap_sem
);
5535 if (IS_ERR((void *)userspace_addr
))
5536 return PTR_ERR((void *)userspace_addr
);
5538 memslot
->userspace_addr
= userspace_addr
;
5546 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
5547 struct kvm_userspace_memory_region
*mem
,
5548 struct kvm_memory_slot old
,
5552 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
5554 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
5557 down_write(¤t
->mm
->mmap_sem
);
5558 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
5559 old
.npages
* PAGE_SIZE
);
5560 up_write(¤t
->mm
->mmap_sem
);
5563 "kvm_vm_ioctl_set_memory_region: "
5564 "failed to munmap memory\n");
5567 spin_lock(&kvm
->mmu_lock
);
5568 if (!kvm
->arch
.n_requested_mmu_pages
) {
5569 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
5570 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
5573 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
5574 spin_unlock(&kvm
->mmu_lock
);
5577 void kvm_arch_flush_shadow(struct kvm
*kvm
)
5579 kvm_mmu_zap_all(kvm
);
5580 kvm_reload_remote_mmus(kvm
);
5583 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
5585 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
5586 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
5587 || vcpu
->arch
.nmi_pending
||
5588 (kvm_arch_interrupt_allowed(vcpu
) &&
5589 kvm_cpu_has_interrupt(vcpu
));
5592 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
5595 int cpu
= vcpu
->cpu
;
5597 if (waitqueue_active(&vcpu
->wq
)) {
5598 wake_up_interruptible(&vcpu
->wq
);
5599 ++vcpu
->stat
.halt_wakeup
;
5603 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
5604 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
5605 smp_send_reschedule(cpu
);
5609 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
5611 return kvm_x86_ops
->interrupt_allowed(vcpu
);
5614 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
5616 unsigned long rflags
;
5618 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5619 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5620 rflags
&= ~(unsigned long)(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
5623 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
5625 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
5627 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
5628 vcpu
->arch
.singlestep_cs
==
5629 get_segment_selector(vcpu
, VCPU_SREG_CS
) &&
5630 vcpu
->arch
.singlestep_rip
== kvm_rip_read(vcpu
))
5631 rflags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
5632 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
5634 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
5636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
5637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
5638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
5639 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
5640 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
5641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
5642 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
5643 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
5644 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
5645 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
5646 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);