2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/module.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <trace/events/kvm.h>
56 #define CREATE_TRACE_POINTS
59 #include <asm/debugreg.h>
63 #include <linux/kernel_stat.h>
64 #include <asm/fpu/internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
68 #define MAX_IO_MSRS 256
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
72 #define emul_to_vcpu(ctxt) \
73 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
76 * - enable syscall per default because its emulated by KVM
77 * - enable LME and LMA per default on 64 bit KVM
81 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
83 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
89 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
90 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
93 struct kvm_x86_ops
*kvm_x86_ops
;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
96 static bool ignore_msrs
= 0;
97 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
99 unsigned int min_timer_period_us
= 500;
100 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
102 static bool __read_mostly kvmclock_periodic_sync
= true;
103 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
105 bool kvm_has_tsc_control
;
106 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
107 u32 kvm_max_guest_tsc_khz
;
108 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
110 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
111 static u32 tsc_tolerance_ppm
= 250;
112 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
114 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
115 unsigned int lapic_timer_advance_ns
= 0;
116 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
118 static bool backwards_tsc_observed
= false;
120 #define KVM_NR_SHARED_MSRS 16
122 struct kvm_shared_msrs_global
{
124 u32 msrs
[KVM_NR_SHARED_MSRS
];
127 struct kvm_shared_msrs
{
128 struct user_return_notifier urn
;
130 struct kvm_shared_msr_values
{
133 } values
[KVM_NR_SHARED_MSRS
];
136 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
137 static struct kvm_shared_msrs __percpu
*shared_msrs
;
139 struct kvm_stats_debugfs_item debugfs_entries
[] = {
140 { "pf_fixed", VCPU_STAT(pf_fixed
) },
141 { "pf_guest", VCPU_STAT(pf_guest
) },
142 { "tlb_flush", VCPU_STAT(tlb_flush
) },
143 { "invlpg", VCPU_STAT(invlpg
) },
144 { "exits", VCPU_STAT(exits
) },
145 { "io_exits", VCPU_STAT(io_exits
) },
146 { "mmio_exits", VCPU_STAT(mmio_exits
) },
147 { "signal_exits", VCPU_STAT(signal_exits
) },
148 { "irq_window", VCPU_STAT(irq_window_exits
) },
149 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
150 { "halt_exits", VCPU_STAT(halt_exits
) },
151 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
152 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
153 { "hypercalls", VCPU_STAT(hypercalls
) },
154 { "request_irq", VCPU_STAT(request_irq_exits
) },
155 { "irq_exits", VCPU_STAT(irq_exits
) },
156 { "host_state_reload", VCPU_STAT(host_state_reload
) },
157 { "efer_reload", VCPU_STAT(efer_reload
) },
158 { "fpu_reload", VCPU_STAT(fpu_reload
) },
159 { "insn_emulation", VCPU_STAT(insn_emulation
) },
160 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
161 { "irq_injections", VCPU_STAT(irq_injections
) },
162 { "nmi_injections", VCPU_STAT(nmi_injections
) },
163 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
164 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
165 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
166 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
167 { "mmu_flooded", VM_STAT(mmu_flooded
) },
168 { "mmu_recycled", VM_STAT(mmu_recycled
) },
169 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
170 { "mmu_unsync", VM_STAT(mmu_unsync
) },
171 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
172 { "largepages", VM_STAT(lpages
) },
176 u64 __read_mostly host_xcr0
;
178 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
180 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
183 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
184 vcpu
->arch
.apf
.gfns
[i
] = ~0;
187 static void kvm_on_user_return(struct user_return_notifier
*urn
)
190 struct kvm_shared_msrs
*locals
191 = container_of(urn
, struct kvm_shared_msrs
, urn
);
192 struct kvm_shared_msr_values
*values
;
194 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
195 values
= &locals
->values
[slot
];
196 if (values
->host
!= values
->curr
) {
197 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
198 values
->curr
= values
->host
;
201 locals
->registered
= false;
202 user_return_notifier_unregister(urn
);
205 static void shared_msr_update(unsigned slot
, u32 msr
)
208 unsigned int cpu
= smp_processor_id();
209 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
211 /* only read, and nobody should modify it at this time,
212 * so don't need lock */
213 if (slot
>= shared_msrs_global
.nr
) {
214 printk(KERN_ERR
"kvm: invalid MSR slot!");
217 rdmsrl_safe(msr
, &value
);
218 smsr
->values
[slot
].host
= value
;
219 smsr
->values
[slot
].curr
= value
;
222 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
224 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
225 shared_msrs_global
.msrs
[slot
] = msr
;
226 if (slot
>= shared_msrs_global
.nr
)
227 shared_msrs_global
.nr
= slot
+ 1;
229 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
231 static void kvm_shared_msr_cpu_online(void)
235 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
236 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
239 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
241 unsigned int cpu
= smp_processor_id();
242 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
245 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
247 smsr
->values
[slot
].curr
= value
;
248 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
252 if (!smsr
->registered
) {
253 smsr
->urn
.on_user_return
= kvm_on_user_return
;
254 user_return_notifier_register(&smsr
->urn
);
255 smsr
->registered
= true;
259 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
261 static void drop_user_return_notifiers(void)
263 unsigned int cpu
= smp_processor_id();
264 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
266 if (smsr
->registered
)
267 kvm_on_user_return(&smsr
->urn
);
270 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
272 return vcpu
->arch
.apic_base
;
274 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
276 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
278 u64 old_state
= vcpu
->arch
.apic_base
&
279 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
280 u64 new_state
= msr_info
->data
&
281 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
282 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
283 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
285 if (!msr_info
->host_initiated
&&
286 ((msr_info
->data
& reserved_bits
) != 0 ||
287 new_state
== X2APIC_ENABLE
||
288 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
289 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
290 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
294 kvm_lapic_set_base(vcpu
, msr_info
->data
);
297 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
299 asmlinkage __visible
void kvm_spurious_fault(void)
301 /* Fault while not rebooting. We want the trace. */
304 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
306 #define EXCPT_BENIGN 0
307 #define EXCPT_CONTRIBUTORY 1
310 static int exception_class(int vector
)
320 return EXCPT_CONTRIBUTORY
;
327 #define EXCPT_FAULT 0
329 #define EXCPT_ABORT 2
330 #define EXCPT_INTERRUPT 3
332 static int exception_type(int vector
)
336 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
337 return EXCPT_INTERRUPT
;
341 /* #DB is trap, as instruction watchpoints are handled elsewhere */
342 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
345 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
348 /* Reserved exceptions will result in fault */
352 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
353 unsigned nr
, bool has_error
, u32 error_code
,
359 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
361 if (!vcpu
->arch
.exception
.pending
) {
363 if (has_error
&& !is_protmode(vcpu
))
365 vcpu
->arch
.exception
.pending
= true;
366 vcpu
->arch
.exception
.has_error_code
= has_error
;
367 vcpu
->arch
.exception
.nr
= nr
;
368 vcpu
->arch
.exception
.error_code
= error_code
;
369 vcpu
->arch
.exception
.reinject
= reinject
;
373 /* to check exception */
374 prev_nr
= vcpu
->arch
.exception
.nr
;
375 if (prev_nr
== DF_VECTOR
) {
376 /* triple fault -> shutdown */
377 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
380 class1
= exception_class(prev_nr
);
381 class2
= exception_class(nr
);
382 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
383 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
384 /* generate double fault per SDM Table 5-5 */
385 vcpu
->arch
.exception
.pending
= true;
386 vcpu
->arch
.exception
.has_error_code
= true;
387 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
388 vcpu
->arch
.exception
.error_code
= 0;
390 /* replace previous exception with a new one in a hope
391 that instruction re-execution will regenerate lost
396 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
398 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
400 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
402 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
404 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
406 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
408 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
411 kvm_inject_gp(vcpu
, 0);
413 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
415 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
417 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
419 ++vcpu
->stat
.pf_guest
;
420 vcpu
->arch
.cr2
= fault
->address
;
421 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
423 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
425 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
427 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
428 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
430 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
432 return fault
->nested_page_fault
;
435 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
437 atomic_inc(&vcpu
->arch
.nmi_queued
);
438 kvm_make_request(KVM_REQ_NMI
, vcpu
);
440 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
442 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
444 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
446 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
448 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
450 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
452 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
455 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
456 * a #GP and return false.
458 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
460 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
462 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
465 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
467 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
469 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
472 kvm_queue_exception(vcpu
, UD_VECTOR
);
475 EXPORT_SYMBOL_GPL(kvm_require_dr
);
478 * This function will be used to read from the physical memory of the currently
479 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
480 * can read from guest physical or from the guest's guest physical memory.
482 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
483 gfn_t ngfn
, void *data
, int offset
, int len
,
486 struct x86_exception exception
;
490 ngpa
= gfn_to_gpa(ngfn
);
491 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
492 if (real_gfn
== UNMAPPED_GVA
)
495 real_gfn
= gpa_to_gfn(real_gfn
);
497 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
499 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
501 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
502 void *data
, int offset
, int len
, u32 access
)
504 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
505 data
, offset
, len
, access
);
509 * Load the pae pdptrs. Return true is they are all valid.
511 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
513 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
514 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
517 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
519 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
520 offset
* sizeof(u64
), sizeof(pdpte
),
521 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
526 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
527 if (is_present_gpte(pdpte
[i
]) &&
529 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
536 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
537 __set_bit(VCPU_EXREG_PDPTR
,
538 (unsigned long *)&vcpu
->arch
.regs_avail
);
539 __set_bit(VCPU_EXREG_PDPTR
,
540 (unsigned long *)&vcpu
->arch
.regs_dirty
);
545 EXPORT_SYMBOL_GPL(load_pdptrs
);
547 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
549 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
555 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
558 if (!test_bit(VCPU_EXREG_PDPTR
,
559 (unsigned long *)&vcpu
->arch
.regs_avail
))
562 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
563 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
564 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
565 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
568 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
574 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
576 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
577 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
582 if (cr0
& 0xffffffff00000000UL
)
586 cr0
&= ~CR0_RESERVED_BITS
;
588 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
591 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
594 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
596 if ((vcpu
->arch
.efer
& EFER_LME
)) {
601 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
606 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
611 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
614 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
616 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
617 kvm_clear_async_pf_completion_queue(vcpu
);
618 kvm_async_pf_hash_reset(vcpu
);
621 if ((cr0
^ old_cr0
) & update_bits
)
622 kvm_mmu_reset_context(vcpu
);
624 if ((cr0
^ old_cr0
) & X86_CR0_CD
)
625 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
629 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
631 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
633 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
635 EXPORT_SYMBOL_GPL(kvm_lmsw
);
637 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
639 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
640 !vcpu
->guest_xcr0_loaded
) {
641 /* kvm_set_xcr() also depends on this */
642 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
643 vcpu
->guest_xcr0_loaded
= 1;
647 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
649 if (vcpu
->guest_xcr0_loaded
) {
650 if (vcpu
->arch
.xcr0
!= host_xcr0
)
651 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
652 vcpu
->guest_xcr0_loaded
= 0;
656 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
659 u64 old_xcr0
= vcpu
->arch
.xcr0
;
662 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
663 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
665 if (!(xcr0
& XSTATE_FP
))
667 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
671 * Do not allow the guest to set bits that we do not support
672 * saving. However, xcr0 bit 0 is always set, even if the
673 * emulated CPU does not support XSAVE (see fx_init).
675 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
676 if (xcr0
& ~valid_bits
)
679 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
682 if (xcr0
& XSTATE_AVX512
) {
683 if (!(xcr0
& XSTATE_YMM
))
685 if ((xcr0
& XSTATE_AVX512
) != XSTATE_AVX512
)
688 kvm_put_guest_xcr0(vcpu
);
689 vcpu
->arch
.xcr0
= xcr0
;
691 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
692 kvm_update_cpuid(vcpu
);
696 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
698 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
699 __kvm_set_xcr(vcpu
, index
, xcr
)) {
700 kvm_inject_gp(vcpu
, 0);
705 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
707 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
709 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
710 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
711 X86_CR4_SMEP
| X86_CR4_SMAP
;
713 if (cr4
& CR4_RESERVED_BITS
)
716 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
719 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
722 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
725 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
728 if (is_long_mode(vcpu
)) {
729 if (!(cr4
& X86_CR4_PAE
))
731 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
732 && ((cr4
^ old_cr4
) & pdptr_bits
)
733 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
737 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
738 if (!guest_cpuid_has_pcid(vcpu
))
741 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
742 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
746 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
749 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
750 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
751 kvm_mmu_reset_context(vcpu
);
753 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
754 kvm_update_cpuid(vcpu
);
758 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
760 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
763 cr3
&= ~CR3_PCID_INVD
;
766 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
767 kvm_mmu_sync_roots(vcpu
);
768 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
772 if (is_long_mode(vcpu
)) {
773 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
775 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
776 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
779 vcpu
->arch
.cr3
= cr3
;
780 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
781 kvm_mmu_new_cr3(vcpu
);
784 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
786 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
788 if (cr8
& CR8_RESERVED_BITS
)
790 if (irqchip_in_kernel(vcpu
->kvm
))
791 kvm_lapic_set_tpr(vcpu
, cr8
);
793 vcpu
->arch
.cr8
= cr8
;
796 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
798 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
800 if (irqchip_in_kernel(vcpu
->kvm
))
801 return kvm_lapic_get_cr8(vcpu
);
803 return vcpu
->arch
.cr8
;
805 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
807 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
811 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
812 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
813 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
814 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
818 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
820 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
821 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
824 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
828 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
829 dr7
= vcpu
->arch
.guest_debug_dr7
;
831 dr7
= vcpu
->arch
.dr7
;
832 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
833 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
834 if (dr7
& DR7_BP_EN_MASK
)
835 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
838 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
840 u64 fixed
= DR6_FIXED_1
;
842 if (!guest_cpuid_has_rtm(vcpu
))
847 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
851 vcpu
->arch
.db
[dr
] = val
;
852 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
853 vcpu
->arch
.eff_db
[dr
] = val
;
858 if (val
& 0xffffffff00000000ULL
)
860 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
861 kvm_update_dr6(vcpu
);
866 if (val
& 0xffffffff00000000ULL
)
868 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
869 kvm_update_dr7(vcpu
);
876 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
878 if (__kvm_set_dr(vcpu
, dr
, val
)) {
879 kvm_inject_gp(vcpu
, 0);
884 EXPORT_SYMBOL_GPL(kvm_set_dr
);
886 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
890 *val
= vcpu
->arch
.db
[dr
];
895 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
896 *val
= vcpu
->arch
.dr6
;
898 *val
= kvm_x86_ops
->get_dr6(vcpu
);
903 *val
= vcpu
->arch
.dr7
;
908 EXPORT_SYMBOL_GPL(kvm_get_dr
);
910 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
912 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
916 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
919 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
920 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
923 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
926 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
927 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
929 * This list is modified at module load time to reflect the
930 * capabilities of the host cpu. This capabilities test skips MSRs that are
931 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
932 * may depend on host virtualization features rather than host cpu features.
935 static u32 msrs_to_save
[] = {
936 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
939 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
941 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
942 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
945 static unsigned num_msrs_to_save
;
947 static u32 emulated_msrs
[] = {
948 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
949 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
950 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
951 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
952 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
953 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
954 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
958 MSR_IA32_TSCDEADLINE
,
959 MSR_IA32_MISC_ENABLE
,
965 static unsigned num_emulated_msrs
;
967 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
969 if (efer
& efer_reserved_bits
)
972 if (efer
& EFER_FFXSR
) {
973 struct kvm_cpuid_entry2
*feat
;
975 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
976 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
980 if (efer
& EFER_SVME
) {
981 struct kvm_cpuid_entry2
*feat
;
983 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
984 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
990 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
992 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
994 u64 old_efer
= vcpu
->arch
.efer
;
996 if (!kvm_valid_efer(vcpu
, efer
))
1000 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1004 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1006 kvm_x86_ops
->set_efer(vcpu
, efer
);
1008 /* Update reserved bits */
1009 if ((efer
^ old_efer
) & EFER_NX
)
1010 kvm_mmu_reset_context(vcpu
);
1015 void kvm_enable_efer_bits(u64 mask
)
1017 efer_reserved_bits
&= ~mask
;
1019 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1022 * Writes msr value into into the appropriate "register".
1023 * Returns 0 on success, non-0 otherwise.
1024 * Assumes vcpu_load() was already called.
1026 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1028 switch (msr
->index
) {
1031 case MSR_KERNEL_GS_BASE
:
1034 if (is_noncanonical_address(msr
->data
))
1037 case MSR_IA32_SYSENTER_EIP
:
1038 case MSR_IA32_SYSENTER_ESP
:
1040 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1041 * non-canonical address is written on Intel but not on
1042 * AMD (which ignores the top 32-bits, because it does
1043 * not implement 64-bit SYSENTER).
1045 * 64-bit code should hence be able to write a non-canonical
1046 * value on AMD. Making the address canonical ensures that
1047 * vmentry does not fail on Intel after writing a non-canonical
1048 * value, and that something deterministic happens if the guest
1049 * invokes 64-bit SYSENTER.
1051 msr
->data
= get_canonical(msr
->data
);
1053 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1055 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1058 * Adapt set_msr() to msr_io()'s calling convention
1060 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1062 struct msr_data msr
;
1066 msr
.host_initiated
= true;
1067 r
= kvm_get_msr(vcpu
, &msr
);
1075 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1077 struct msr_data msr
;
1081 msr
.host_initiated
= true;
1082 return kvm_set_msr(vcpu
, &msr
);
1085 #ifdef CONFIG_X86_64
1086 struct pvclock_gtod_data
{
1089 struct { /* extract of a clocksource struct */
1101 static struct pvclock_gtod_data pvclock_gtod_data
;
1103 static void update_pvclock_gtod(struct timekeeper
*tk
)
1105 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1108 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1110 write_seqcount_begin(&vdata
->seq
);
1112 /* copy pvclock gtod data */
1113 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1114 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1115 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1116 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1117 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1119 vdata
->boot_ns
= boot_ns
;
1120 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1122 write_seqcount_end(&vdata
->seq
);
1126 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1129 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1130 * vcpu_enter_guest. This function is only called from
1131 * the physical CPU that is running vcpu.
1133 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1136 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1140 struct pvclock_wall_clock wc
;
1141 struct timespec boot
;
1146 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1151 ++version
; /* first time write, random junk */
1155 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1158 * The guest calculates current wall clock time by adding
1159 * system time (updated by kvm_guest_time_update below) to the
1160 * wall clock specified here. guest system time equals host
1161 * system time for us, thus we must fill in host boot time here.
1165 if (kvm
->arch
.kvmclock_offset
) {
1166 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1167 boot
= timespec_sub(boot
, ts
);
1169 wc
.sec
= boot
.tv_sec
;
1170 wc
.nsec
= boot
.tv_nsec
;
1171 wc
.version
= version
;
1173 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1176 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1179 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1181 uint32_t quotient
, remainder
;
1183 /* Don't try to replace with do_div(), this one calculates
1184 * "(dividend << 32) / divisor" */
1186 : "=a" (quotient
), "=d" (remainder
)
1187 : "0" (0), "1" (dividend
), "r" (divisor
) );
1191 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1192 s8
*pshift
, u32
*pmultiplier
)
1199 tps64
= base_khz
* 1000LL;
1200 scaled64
= scaled_khz
* 1000LL;
1201 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1206 tps32
= (uint32_t)tps64
;
1207 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1208 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1216 *pmultiplier
= div_frac(scaled64
, tps32
);
1218 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1219 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1222 #ifdef CONFIG_X86_64
1223 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1226 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1227 static unsigned long max_tsc_khz
;
1229 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1231 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1232 vcpu
->arch
.virtual_tsc_shift
);
1235 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1237 u64 v
= (u64
)khz
* (1000000 + ppm
);
1242 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1244 u32 thresh_lo
, thresh_hi
;
1245 int use_scaling
= 0;
1247 /* tsc_khz can be zero if TSC calibration fails */
1248 if (this_tsc_khz
== 0)
1251 /* Compute a scale to convert nanoseconds in TSC cycles */
1252 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1253 &vcpu
->arch
.virtual_tsc_shift
,
1254 &vcpu
->arch
.virtual_tsc_mult
);
1255 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1258 * Compute the variation in TSC rate which is acceptable
1259 * within the range of tolerance and decide if the
1260 * rate being applied is within that bounds of the hardware
1261 * rate. If so, no scaling or compensation need be done.
1263 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1264 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1265 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1266 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1269 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1272 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1274 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1275 vcpu
->arch
.virtual_tsc_mult
,
1276 vcpu
->arch
.virtual_tsc_shift
);
1277 tsc
+= vcpu
->arch
.this_tsc_write
;
1281 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1283 #ifdef CONFIG_X86_64
1285 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1286 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1288 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1289 atomic_read(&vcpu
->kvm
->online_vcpus
));
1292 * Once the masterclock is enabled, always perform request in
1293 * order to update it.
1295 * In order to enable masterclock, the host clocksource must be TSC
1296 * and the vcpus need to have matched TSCs. When that happens,
1297 * perform request to enable masterclock.
1299 if (ka
->use_master_clock
||
1300 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1301 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1303 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1304 atomic_read(&vcpu
->kvm
->online_vcpus
),
1305 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1309 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1311 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1312 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1315 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1317 struct kvm
*kvm
= vcpu
->kvm
;
1318 u64 offset
, ns
, elapsed
;
1319 unsigned long flags
;
1322 bool already_matched
;
1323 u64 data
= msr
->data
;
1325 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1326 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1327 ns
= get_kernel_ns();
1328 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1330 if (vcpu
->arch
.virtual_tsc_khz
) {
1333 /* n.b - signed multiplication and division required */
1334 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1335 #ifdef CONFIG_X86_64
1336 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1338 /* do_div() only does unsigned */
1339 asm("1: idivl %[divisor]\n"
1340 "2: xor %%edx, %%edx\n"
1341 " movl $0, %[faulted]\n"
1343 ".section .fixup,\"ax\"\n"
1344 "4: movl $1, %[faulted]\n"
1348 _ASM_EXTABLE(1b
, 4b
)
1350 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1351 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1354 do_div(elapsed
, 1000);
1359 /* idivl overflow => difference is larger than USEC_PER_SEC */
1361 usdiff
= USEC_PER_SEC
;
1363 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1366 * Special case: TSC write with a small delta (1 second) of virtual
1367 * cycle time against real time is interpreted as an attempt to
1368 * synchronize the CPU.
1370 * For a reliable TSC, we can match TSC offsets, and for an unstable
1371 * TSC, we add elapsed time in this computation. We could let the
1372 * compensation code attempt to catch up if we fall behind, but
1373 * it's better to try to match offsets from the beginning.
1375 if (usdiff
< USEC_PER_SEC
&&
1376 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1377 if (!check_tsc_unstable()) {
1378 offset
= kvm
->arch
.cur_tsc_offset
;
1379 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1381 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1383 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1384 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1387 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1390 * We split periods of matched TSC writes into generations.
1391 * For each generation, we track the original measured
1392 * nanosecond time, offset, and write, so if TSCs are in
1393 * sync, we can match exact offset, and if not, we can match
1394 * exact software computation in compute_guest_tsc()
1396 * These values are tracked in kvm->arch.cur_xxx variables.
1398 kvm
->arch
.cur_tsc_generation
++;
1399 kvm
->arch
.cur_tsc_nsec
= ns
;
1400 kvm
->arch
.cur_tsc_write
= data
;
1401 kvm
->arch
.cur_tsc_offset
= offset
;
1403 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1404 kvm
->arch
.cur_tsc_generation
, data
);
1408 * We also track th most recent recorded KHZ, write and time to
1409 * allow the matching interval to be extended at each write.
1411 kvm
->arch
.last_tsc_nsec
= ns
;
1412 kvm
->arch
.last_tsc_write
= data
;
1413 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1415 vcpu
->arch
.last_guest_tsc
= data
;
1417 /* Keep track of which generation this VCPU has synchronized to */
1418 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1419 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1420 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1422 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1423 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1424 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1425 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1427 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1429 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1430 } else if (!already_matched
) {
1431 kvm
->arch
.nr_vcpus_matched_tsc
++;
1434 kvm_track_tsc_matching(vcpu
);
1435 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1438 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1440 #ifdef CONFIG_X86_64
1442 static cycle_t
read_tsc(void)
1448 * Empirically, a fence (of type that depends on the CPU)
1449 * before rdtsc is enough to ensure that rdtsc is ordered
1450 * with respect to loads. The various CPU manuals are unclear
1451 * as to whether rdtsc can be reordered with later loads,
1452 * but no one has ever seen it happen.
1455 ret
= (cycle_t
)vget_cycles();
1457 last
= pvclock_gtod_data
.clock
.cycle_last
;
1459 if (likely(ret
>= last
))
1463 * GCC likes to generate cmov here, but this branch is extremely
1464 * predictable (it's just a funciton of time and the likely is
1465 * very likely) and there's a data dependence, so force GCC
1466 * to generate a branch instead. I don't barrier() because
1467 * we don't actually need a barrier, and if this function
1468 * ever gets inlined it will generate worse code.
1474 static inline u64
vgettsc(cycle_t
*cycle_now
)
1477 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1479 *cycle_now
= read_tsc();
1481 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1482 return v
* gtod
->clock
.mult
;
1485 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1487 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1493 seq
= read_seqcount_begin(>od
->seq
);
1494 mode
= gtod
->clock
.vclock_mode
;
1495 ns
= gtod
->nsec_base
;
1496 ns
+= vgettsc(cycle_now
);
1497 ns
>>= gtod
->clock
.shift
;
1498 ns
+= gtod
->boot_ns
;
1499 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1505 /* returns true if host is using tsc clocksource */
1506 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1508 /* checked again under seqlock below */
1509 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1512 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1518 * Assuming a stable TSC across physical CPUS, and a stable TSC
1519 * across virtual CPUs, the following condition is possible.
1520 * Each numbered line represents an event visible to both
1521 * CPUs at the next numbered event.
1523 * "timespecX" represents host monotonic time. "tscX" represents
1526 * VCPU0 on CPU0 | VCPU1 on CPU1
1528 * 1. read timespec0,tsc0
1529 * 2. | timespec1 = timespec0 + N
1531 * 3. transition to guest | transition to guest
1532 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1533 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1534 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1536 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1539 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1541 * - 0 < N - M => M < N
1543 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1544 * always the case (the difference between two distinct xtime instances
1545 * might be smaller then the difference between corresponding TSC reads,
1546 * when updating guest vcpus pvclock areas).
1548 * To avoid that problem, do not allow visibility of distinct
1549 * system_timestamp/tsc_timestamp values simultaneously: use a master
1550 * copy of host monotonic time values. Update that master copy
1553 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1557 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1559 #ifdef CONFIG_X86_64
1560 struct kvm_arch
*ka
= &kvm
->arch
;
1562 bool host_tsc_clocksource
, vcpus_matched
;
1564 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1565 atomic_read(&kvm
->online_vcpus
));
1568 * If the host uses TSC clock, then passthrough TSC as stable
1571 host_tsc_clocksource
= kvm_get_time_and_clockread(
1572 &ka
->master_kernel_ns
,
1573 &ka
->master_cycle_now
);
1575 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1576 && !backwards_tsc_observed
1577 && !ka
->boot_vcpu_runs_old_kvmclock
;
1579 if (ka
->use_master_clock
)
1580 atomic_set(&kvm_guest_has_master_clock
, 1);
1582 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1583 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1588 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1590 #ifdef CONFIG_X86_64
1592 struct kvm_vcpu
*vcpu
;
1593 struct kvm_arch
*ka
= &kvm
->arch
;
1595 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1596 kvm_make_mclock_inprogress_request(kvm
);
1597 /* no guest entries from this point */
1598 pvclock_update_vm_gtod_copy(kvm
);
1600 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1601 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1603 /* guest entries allowed */
1604 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1605 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1607 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1611 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1613 unsigned long flags
, this_tsc_khz
;
1614 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1615 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1617 u64 tsc_timestamp
, host_tsc
;
1618 struct pvclock_vcpu_time_info guest_hv_clock
;
1620 bool use_master_clock
;
1626 * If the host uses TSC clock, then passthrough TSC as stable
1629 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1630 use_master_clock
= ka
->use_master_clock
;
1631 if (use_master_clock
) {
1632 host_tsc
= ka
->master_cycle_now
;
1633 kernel_ns
= ka
->master_kernel_ns
;
1635 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1637 /* Keep irq disabled to prevent changes to the clock */
1638 local_irq_save(flags
);
1639 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1640 if (unlikely(this_tsc_khz
== 0)) {
1641 local_irq_restore(flags
);
1642 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1645 if (!use_master_clock
) {
1646 host_tsc
= native_read_tsc();
1647 kernel_ns
= get_kernel_ns();
1650 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1653 * We may have to catch up the TSC to match elapsed wall clock
1654 * time for two reasons, even if kvmclock is used.
1655 * 1) CPU could have been running below the maximum TSC rate
1656 * 2) Broken TSC compensation resets the base at each VCPU
1657 * entry to avoid unknown leaps of TSC even when running
1658 * again on the same CPU. This may cause apparent elapsed
1659 * time to disappear, and the guest to stand still or run
1662 if (vcpu
->tsc_catchup
) {
1663 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1664 if (tsc
> tsc_timestamp
) {
1665 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1666 tsc_timestamp
= tsc
;
1670 local_irq_restore(flags
);
1672 if (!vcpu
->pv_time_enabled
)
1675 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1676 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1677 &vcpu
->hv_clock
.tsc_shift
,
1678 &vcpu
->hv_clock
.tsc_to_system_mul
);
1679 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1682 /* With all the info we got, fill in the values */
1683 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1684 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1685 vcpu
->last_guest_tsc
= tsc_timestamp
;
1687 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1688 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1691 /* This VCPU is paused, but it's legal for a guest to read another
1692 * VCPU's kvmclock, so we really have to follow the specification where
1693 * it says that version is odd if data is being modified, and even after
1696 * Version field updates must be kept separate. This is because
1697 * kvm_write_guest_cached might use a "rep movs" instruction, and
1698 * writes within a string instruction are weakly ordered. So there
1699 * are three writes overall.
1701 * As a small optimization, only write the version field in the first
1702 * and third write. The vcpu->pv_time cache is still valid, because the
1703 * version field is the first in the struct.
1705 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1707 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1708 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1710 sizeof(vcpu
->hv_clock
.version
));
1714 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1715 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1717 if (vcpu
->pvclock_set_guest_stopped_request
) {
1718 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1719 vcpu
->pvclock_set_guest_stopped_request
= false;
1722 pvclock_flags
|= PVCLOCK_COUNTS_FROM_ZERO
;
1724 /* If the host uses TSC clocksource, then it is stable */
1725 if (use_master_clock
)
1726 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1728 vcpu
->hv_clock
.flags
= pvclock_flags
;
1730 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1732 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1734 sizeof(vcpu
->hv_clock
));
1738 vcpu
->hv_clock
.version
++;
1739 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1741 sizeof(vcpu
->hv_clock
.version
));
1746 * kvmclock updates which are isolated to a given vcpu, such as
1747 * vcpu->cpu migration, should not allow system_timestamp from
1748 * the rest of the vcpus to remain static. Otherwise ntp frequency
1749 * correction applies to one vcpu's system_timestamp but not
1752 * So in those cases, request a kvmclock update for all vcpus.
1753 * We need to rate-limit these requests though, as they can
1754 * considerably slow guests that have a large number of vcpus.
1755 * The time for a remote vcpu to update its kvmclock is bound
1756 * by the delay we use to rate-limit the updates.
1759 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1761 static void kvmclock_update_fn(struct work_struct
*work
)
1764 struct delayed_work
*dwork
= to_delayed_work(work
);
1765 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1766 kvmclock_update_work
);
1767 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1768 struct kvm_vcpu
*vcpu
;
1770 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1771 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1772 kvm_vcpu_kick(vcpu
);
1776 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1778 struct kvm
*kvm
= v
->kvm
;
1780 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1781 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1782 KVMCLOCK_UPDATE_DELAY
);
1785 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1787 static void kvmclock_sync_fn(struct work_struct
*work
)
1789 struct delayed_work
*dwork
= to_delayed_work(work
);
1790 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1791 kvmclock_sync_work
);
1792 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1794 if (!kvmclock_periodic_sync
)
1797 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1798 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1799 KVMCLOCK_SYNC_PERIOD
);
1802 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1804 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1805 unsigned bank_num
= mcg_cap
& 0xff;
1808 case MSR_IA32_MCG_STATUS
:
1809 vcpu
->arch
.mcg_status
= data
;
1811 case MSR_IA32_MCG_CTL
:
1812 if (!(mcg_cap
& MCG_CTL_P
))
1814 if (data
!= 0 && data
!= ~(u64
)0)
1816 vcpu
->arch
.mcg_ctl
= data
;
1819 if (msr
>= MSR_IA32_MC0_CTL
&&
1820 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1821 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1822 /* only 0 or all 1s can be written to IA32_MCi_CTL
1823 * some Linux kernels though clear bit 10 in bank 4 to
1824 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1825 * this to avoid an uncatched #GP in the guest
1827 if ((offset
& 0x3) == 0 &&
1828 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1830 vcpu
->arch
.mce_banks
[offset
] = data
;
1838 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1840 struct kvm
*kvm
= vcpu
->kvm
;
1841 int lm
= is_long_mode(vcpu
);
1842 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1843 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1844 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1845 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1846 u32 page_num
= data
& ~PAGE_MASK
;
1847 u64 page_addr
= data
& PAGE_MASK
;
1852 if (page_num
>= blob_size
)
1855 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1860 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
1869 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1871 gpa_t gpa
= data
& ~0x3f;
1873 /* Bits 2:5 are reserved, Should be zero */
1877 vcpu
->arch
.apf
.msr_val
= data
;
1879 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1880 kvm_clear_async_pf_completion_queue(vcpu
);
1881 kvm_async_pf_hash_reset(vcpu
);
1885 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1889 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1890 kvm_async_pf_wakeup_all(vcpu
);
1894 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1896 vcpu
->arch
.pv_time_enabled
= false;
1899 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1903 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1906 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1907 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1908 vcpu
->arch
.st
.accum_steal
= delta
;
1911 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1913 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1916 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1917 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1920 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1921 vcpu
->arch
.st
.steal
.version
+= 2;
1922 vcpu
->arch
.st
.accum_steal
= 0;
1924 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1925 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1928 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1931 u32 msr
= msr_info
->index
;
1932 u64 data
= msr_info
->data
;
1935 case MSR_AMD64_NB_CFG
:
1936 case MSR_IA32_UCODE_REV
:
1937 case MSR_IA32_UCODE_WRITE
:
1938 case MSR_VM_HSAVE_PA
:
1939 case MSR_AMD64_PATCH_LOADER
:
1940 case MSR_AMD64_BU_CFG2
:
1944 return set_efer(vcpu
, data
);
1946 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1947 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1948 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
1949 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
1951 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1956 case MSR_FAM10H_MMIO_CONF_BASE
:
1958 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1963 case MSR_IA32_DEBUGCTLMSR
:
1965 /* We support the non-activated case already */
1967 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1968 /* Values other than LBR and BTF are vendor-specific,
1969 thus reserved and should throw a #GP */
1972 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1975 case 0x200 ... 0x2ff:
1976 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
1977 case MSR_IA32_APICBASE
:
1978 return kvm_set_apic_base(vcpu
, msr_info
);
1979 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1980 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1981 case MSR_IA32_TSCDEADLINE
:
1982 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1984 case MSR_IA32_TSC_ADJUST
:
1985 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
1986 if (!msr_info
->host_initiated
) {
1987 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
1988 adjust_tsc_offset_guest(vcpu
, adj
);
1990 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
1993 case MSR_IA32_MISC_ENABLE
:
1994 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1996 case MSR_IA32_SMBASE
:
1997 if (!msr_info
->host_initiated
)
1999 vcpu
->arch
.smbase
= data
;
2001 case MSR_KVM_WALL_CLOCK_NEW
:
2002 case MSR_KVM_WALL_CLOCK
:
2003 vcpu
->kvm
->arch
.wall_clock
= data
;
2004 kvm_write_wall_clock(vcpu
->kvm
, data
);
2006 case MSR_KVM_SYSTEM_TIME_NEW
:
2007 case MSR_KVM_SYSTEM_TIME
: {
2009 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2011 kvmclock_reset(vcpu
);
2013 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2014 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2016 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2017 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2020 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2022 ka
->kvmclock_offset
= -get_kernel_ns();
2025 vcpu
->arch
.time
= data
;
2026 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2028 /* we verify if the enable bit is set... */
2032 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2034 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2035 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2036 sizeof(struct pvclock_vcpu_time_info
)))
2037 vcpu
->arch
.pv_time_enabled
= false;
2039 vcpu
->arch
.pv_time_enabled
= true;
2043 case MSR_KVM_ASYNC_PF_EN
:
2044 if (kvm_pv_enable_async_pf(vcpu
, data
))
2047 case MSR_KVM_STEAL_TIME
:
2049 if (unlikely(!sched_info_on()))
2052 if (data
& KVM_STEAL_RESERVED_MASK
)
2055 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2056 data
& KVM_STEAL_VALID_BITS
,
2057 sizeof(struct kvm_steal_time
)))
2060 vcpu
->arch
.st
.msr_val
= data
;
2062 if (!(data
& KVM_MSR_ENABLED
))
2065 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2068 accumulate_steal_time(vcpu
);
2071 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2074 case MSR_KVM_PV_EOI_EN
:
2075 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2079 case MSR_IA32_MCG_CTL
:
2080 case MSR_IA32_MCG_STATUS
:
2081 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2082 return set_msr_mce(vcpu
, msr
, data
);
2084 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2085 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2086 pr
= true; /* fall through */
2087 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2088 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2089 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2090 return kvm_pmu_set_msr(vcpu
, msr_info
);
2092 if (pr
|| data
!= 0)
2093 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2094 "0x%x data 0x%llx\n", msr
, data
);
2096 case MSR_K7_CLK_CTL
:
2098 * Ignore all writes to this no longer documented MSR.
2099 * Writes are only relevant for old K7 processors,
2100 * all pre-dating SVM, but a recommended workaround from
2101 * AMD for these chips. It is possible to specify the
2102 * affected processor models on the command line, hence
2103 * the need to ignore the workaround.
2106 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2107 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2108 case HV_X64_MSR_CRASH_CTL
:
2109 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2110 msr_info
->host_initiated
);
2111 case MSR_IA32_BBL_CR_CTL3
:
2112 /* Drop writes to this legacy MSR -- see rdmsr
2113 * counterpart for further detail.
2115 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2117 case MSR_AMD64_OSVW_ID_LENGTH
:
2118 if (!guest_cpuid_has_osvw(vcpu
))
2120 vcpu
->arch
.osvw
.length
= data
;
2122 case MSR_AMD64_OSVW_STATUS
:
2123 if (!guest_cpuid_has_osvw(vcpu
))
2125 vcpu
->arch
.osvw
.status
= data
;
2128 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2129 return xen_hvm_config(vcpu
, data
);
2130 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2131 return kvm_pmu_set_msr(vcpu
, msr_info
);
2133 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2137 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2144 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2148 * Reads an msr value (of 'msr_index') into 'pdata'.
2149 * Returns 0 on success, non-0 otherwise.
2150 * Assumes vcpu_load() was already called.
2152 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2154 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2156 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2158 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2161 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2162 unsigned bank_num
= mcg_cap
& 0xff;
2165 case MSR_IA32_P5_MC_ADDR
:
2166 case MSR_IA32_P5_MC_TYPE
:
2169 case MSR_IA32_MCG_CAP
:
2170 data
= vcpu
->arch
.mcg_cap
;
2172 case MSR_IA32_MCG_CTL
:
2173 if (!(mcg_cap
& MCG_CTL_P
))
2175 data
= vcpu
->arch
.mcg_ctl
;
2177 case MSR_IA32_MCG_STATUS
:
2178 data
= vcpu
->arch
.mcg_status
;
2181 if (msr
>= MSR_IA32_MC0_CTL
&&
2182 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2183 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2184 data
= vcpu
->arch
.mce_banks
[offset
];
2193 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2195 switch (msr_info
->index
) {
2196 case MSR_IA32_PLATFORM_ID
:
2197 case MSR_IA32_EBL_CR_POWERON
:
2198 case MSR_IA32_DEBUGCTLMSR
:
2199 case MSR_IA32_LASTBRANCHFROMIP
:
2200 case MSR_IA32_LASTBRANCHTOIP
:
2201 case MSR_IA32_LASTINTFROMIP
:
2202 case MSR_IA32_LASTINTTOIP
:
2205 case MSR_VM_HSAVE_PA
:
2206 case MSR_K8_INT_PENDING_MSG
:
2207 case MSR_AMD64_NB_CFG
:
2208 case MSR_FAM10H_MMIO_CONF_BASE
:
2209 case MSR_AMD64_BU_CFG2
:
2212 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2213 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2214 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2215 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2216 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2217 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2220 case MSR_IA32_UCODE_REV
:
2221 msr_info
->data
= 0x100000000ULL
;
2224 case 0x200 ... 0x2ff:
2225 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2226 case 0xcd: /* fsb frequency */
2230 * MSR_EBC_FREQUENCY_ID
2231 * Conservative value valid for even the basic CPU models.
2232 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2233 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2234 * and 266MHz for model 3, or 4. Set Core Clock
2235 * Frequency to System Bus Frequency Ratio to 1 (bits
2236 * 31:24) even though these are only valid for CPU
2237 * models > 2, however guests may end up dividing or
2238 * multiplying by zero otherwise.
2240 case MSR_EBC_FREQUENCY_ID
:
2241 msr_info
->data
= 1 << 24;
2243 case MSR_IA32_APICBASE
:
2244 msr_info
->data
= kvm_get_apic_base(vcpu
);
2246 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2247 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2249 case MSR_IA32_TSCDEADLINE
:
2250 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2252 case MSR_IA32_TSC_ADJUST
:
2253 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2255 case MSR_IA32_MISC_ENABLE
:
2256 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2258 case MSR_IA32_SMBASE
:
2259 if (!msr_info
->host_initiated
)
2261 msr_info
->data
= vcpu
->arch
.smbase
;
2263 case MSR_IA32_PERF_STATUS
:
2264 /* TSC increment by tick */
2265 msr_info
->data
= 1000ULL;
2266 /* CPU multiplier */
2267 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2270 msr_info
->data
= vcpu
->arch
.efer
;
2272 case MSR_KVM_WALL_CLOCK
:
2273 case MSR_KVM_WALL_CLOCK_NEW
:
2274 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2276 case MSR_KVM_SYSTEM_TIME
:
2277 case MSR_KVM_SYSTEM_TIME_NEW
:
2278 msr_info
->data
= vcpu
->arch
.time
;
2280 case MSR_KVM_ASYNC_PF_EN
:
2281 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2283 case MSR_KVM_STEAL_TIME
:
2284 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2286 case MSR_KVM_PV_EOI_EN
:
2287 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2289 case MSR_IA32_P5_MC_ADDR
:
2290 case MSR_IA32_P5_MC_TYPE
:
2291 case MSR_IA32_MCG_CAP
:
2292 case MSR_IA32_MCG_CTL
:
2293 case MSR_IA32_MCG_STATUS
:
2294 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2295 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2296 case MSR_K7_CLK_CTL
:
2298 * Provide expected ramp-up count for K7. All other
2299 * are set to zero, indicating minimum divisors for
2302 * This prevents guest kernels on AMD host with CPU
2303 * type 6, model 8 and higher from exploding due to
2304 * the rdmsr failing.
2306 msr_info
->data
= 0x20000000;
2308 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2309 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2310 case HV_X64_MSR_CRASH_CTL
:
2311 return kvm_hv_get_msr_common(vcpu
,
2312 msr_info
->index
, &msr_info
->data
);
2314 case MSR_IA32_BBL_CR_CTL3
:
2315 /* This legacy MSR exists but isn't fully documented in current
2316 * silicon. It is however accessed by winxp in very narrow
2317 * scenarios where it sets bit #19, itself documented as
2318 * a "reserved" bit. Best effort attempt to source coherent
2319 * read data here should the balance of the register be
2320 * interpreted by the guest:
2322 * L2 cache control register 3: 64GB range, 256KB size,
2323 * enabled, latency 0x1, configured
2325 msr_info
->data
= 0xbe702111;
2327 case MSR_AMD64_OSVW_ID_LENGTH
:
2328 if (!guest_cpuid_has_osvw(vcpu
))
2330 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2332 case MSR_AMD64_OSVW_STATUS
:
2333 if (!guest_cpuid_has_osvw(vcpu
))
2335 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2338 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2339 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2341 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr_info
->index
);
2344 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2351 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2354 * Read or write a bunch of msrs. All parameters are kernel addresses.
2356 * @return number of msrs set successfully.
2358 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2359 struct kvm_msr_entry
*entries
,
2360 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2361 unsigned index
, u64
*data
))
2365 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2366 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2367 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2369 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2375 * Read or write a bunch of msrs. Parameters are user addresses.
2377 * @return number of msrs set successfully.
2379 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2380 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2381 unsigned index
, u64
*data
),
2384 struct kvm_msrs msrs
;
2385 struct kvm_msr_entry
*entries
;
2390 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2394 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2397 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2398 entries
= memdup_user(user_msrs
->entries
, size
);
2399 if (IS_ERR(entries
)) {
2400 r
= PTR_ERR(entries
);
2404 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2409 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2420 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2425 case KVM_CAP_IRQCHIP
:
2427 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2428 case KVM_CAP_SET_TSS_ADDR
:
2429 case KVM_CAP_EXT_CPUID
:
2430 case KVM_CAP_EXT_EMUL_CPUID
:
2431 case KVM_CAP_CLOCKSOURCE
:
2433 case KVM_CAP_NOP_IO_DELAY
:
2434 case KVM_CAP_MP_STATE
:
2435 case KVM_CAP_SYNC_MMU
:
2436 case KVM_CAP_USER_NMI
:
2437 case KVM_CAP_REINJECT_CONTROL
:
2438 case KVM_CAP_IRQ_INJECT_STATUS
:
2439 case KVM_CAP_IOEVENTFD
:
2440 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2442 case KVM_CAP_PIT_STATE2
:
2443 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2444 case KVM_CAP_XEN_HVM
:
2445 case KVM_CAP_ADJUST_CLOCK
:
2446 case KVM_CAP_VCPU_EVENTS
:
2447 case KVM_CAP_HYPERV
:
2448 case KVM_CAP_HYPERV_VAPIC
:
2449 case KVM_CAP_HYPERV_SPIN
:
2450 case KVM_CAP_PCI_SEGMENT
:
2451 case KVM_CAP_DEBUGREGS
:
2452 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2454 case KVM_CAP_ASYNC_PF
:
2455 case KVM_CAP_GET_TSC_KHZ
:
2456 case KVM_CAP_KVMCLOCK_CTRL
:
2457 case KVM_CAP_READONLY_MEM
:
2458 case KVM_CAP_HYPERV_TIME
:
2459 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2460 case KVM_CAP_TSC_DEADLINE_TIMER
:
2461 case KVM_CAP_ENABLE_CAP_VM
:
2462 case KVM_CAP_DISABLE_QUIRKS
:
2463 case KVM_CAP_SET_BOOT_CPU_ID
:
2464 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2465 case KVM_CAP_ASSIGN_DEV_IRQ
:
2466 case KVM_CAP_PCI_2_3
:
2470 case KVM_CAP_X86_SMM
:
2471 /* SMBASE is usually relocated above 1M on modern chipsets,
2472 * and SMM handlers might indeed rely on 4G segment limits,
2473 * so do not report SMM to be available if real mode is
2474 * emulated via vm86 mode. Still, do not go to great lengths
2475 * to avoid userspace's usage of the feature, because it is a
2476 * fringe case that is not enabled except via specific settings
2477 * of the module parameters.
2479 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2481 case KVM_CAP_COALESCED_MMIO
:
2482 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2485 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2487 case KVM_CAP_NR_VCPUS
:
2488 r
= KVM_SOFT_MAX_VCPUS
;
2490 case KVM_CAP_MAX_VCPUS
:
2493 case KVM_CAP_NR_MEMSLOTS
:
2494 r
= KVM_USER_MEM_SLOTS
;
2496 case KVM_CAP_PV_MMU
: /* obsolete */
2499 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2501 r
= iommu_present(&pci_bus_type
);
2505 r
= KVM_MAX_MCE_BANKS
;
2510 case KVM_CAP_TSC_CONTROL
:
2511 r
= kvm_has_tsc_control
;
2521 long kvm_arch_dev_ioctl(struct file
*filp
,
2522 unsigned int ioctl
, unsigned long arg
)
2524 void __user
*argp
= (void __user
*)arg
;
2528 case KVM_GET_MSR_INDEX_LIST
: {
2529 struct kvm_msr_list __user
*user_msr_list
= argp
;
2530 struct kvm_msr_list msr_list
;
2534 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2537 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2538 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2541 if (n
< msr_list
.nmsrs
)
2544 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2545 num_msrs_to_save
* sizeof(u32
)))
2547 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2549 num_emulated_msrs
* sizeof(u32
)))
2554 case KVM_GET_SUPPORTED_CPUID
:
2555 case KVM_GET_EMULATED_CPUID
: {
2556 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2557 struct kvm_cpuid2 cpuid
;
2560 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2563 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2569 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2574 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2577 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2579 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2591 static void wbinvd_ipi(void *garbage
)
2596 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2598 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2601 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2603 /* Address WBINVD may be executed by guest */
2604 if (need_emulate_wbinvd(vcpu
)) {
2605 if (kvm_x86_ops
->has_wbinvd_exit())
2606 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2607 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2608 smp_call_function_single(vcpu
->cpu
,
2609 wbinvd_ipi
, NULL
, 1);
2612 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2614 /* Apply any externally detected TSC adjustments (due to suspend) */
2615 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2616 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2617 vcpu
->arch
.tsc_offset_adjustment
= 0;
2618 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2621 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2622 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2623 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2625 mark_tsc_unstable("KVM discovered backwards TSC");
2626 if (check_tsc_unstable()) {
2627 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2628 vcpu
->arch
.last_guest_tsc
);
2629 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2630 vcpu
->arch
.tsc_catchup
= 1;
2633 * On a host with synchronized TSC, there is no need to update
2634 * kvmclock on vcpu->cpu migration
2636 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2637 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2638 if (vcpu
->cpu
!= cpu
)
2639 kvm_migrate_timers(vcpu
);
2643 accumulate_steal_time(vcpu
);
2644 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2647 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2649 kvm_x86_ops
->vcpu_put(vcpu
);
2650 kvm_put_guest_fpu(vcpu
);
2651 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2654 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2655 struct kvm_lapic_state
*s
)
2657 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2658 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2663 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2664 struct kvm_lapic_state
*s
)
2666 kvm_apic_post_state_restore(vcpu
, s
);
2667 update_cr8_intercept(vcpu
);
2672 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2673 struct kvm_interrupt
*irq
)
2675 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2677 if (irqchip_in_kernel(vcpu
->kvm
))
2680 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2681 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2686 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2688 kvm_inject_nmi(vcpu
);
2693 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2695 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2700 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2701 struct kvm_tpr_access_ctl
*tac
)
2705 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2709 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2713 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2716 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2718 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2721 vcpu
->arch
.mcg_cap
= mcg_cap
;
2722 /* Init IA32_MCG_CTL to all 1s */
2723 if (mcg_cap
& MCG_CTL_P
)
2724 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2725 /* Init IA32_MCi_CTL to all 1s */
2726 for (bank
= 0; bank
< bank_num
; bank
++)
2727 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2732 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2733 struct kvm_x86_mce
*mce
)
2735 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2736 unsigned bank_num
= mcg_cap
& 0xff;
2737 u64
*banks
= vcpu
->arch
.mce_banks
;
2739 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2742 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2743 * reporting is disabled
2745 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2746 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2748 banks
+= 4 * mce
->bank
;
2750 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2751 * reporting is disabled for the bank
2753 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2755 if (mce
->status
& MCI_STATUS_UC
) {
2756 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2757 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2758 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2761 if (banks
[1] & MCI_STATUS_VAL
)
2762 mce
->status
|= MCI_STATUS_OVER
;
2763 banks
[2] = mce
->addr
;
2764 banks
[3] = mce
->misc
;
2765 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2766 banks
[1] = mce
->status
;
2767 kvm_queue_exception(vcpu
, MC_VECTOR
);
2768 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2769 || !(banks
[1] & MCI_STATUS_UC
)) {
2770 if (banks
[1] & MCI_STATUS_VAL
)
2771 mce
->status
|= MCI_STATUS_OVER
;
2772 banks
[2] = mce
->addr
;
2773 banks
[3] = mce
->misc
;
2774 banks
[1] = mce
->status
;
2776 banks
[1] |= MCI_STATUS_OVER
;
2780 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2781 struct kvm_vcpu_events
*events
)
2784 events
->exception
.injected
=
2785 vcpu
->arch
.exception
.pending
&&
2786 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2787 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2788 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2789 events
->exception
.pad
= 0;
2790 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2792 events
->interrupt
.injected
=
2793 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2794 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2795 events
->interrupt
.soft
= 0;
2796 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
2798 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2799 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2800 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2801 events
->nmi
.pad
= 0;
2803 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2805 events
->smi
.smm
= is_smm(vcpu
);
2806 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
2807 events
->smi
.smm_inside_nmi
=
2808 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
2809 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
2811 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2812 | KVM_VCPUEVENT_VALID_SHADOW
2813 | KVM_VCPUEVENT_VALID_SMM
);
2814 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2817 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2818 struct kvm_vcpu_events
*events
)
2820 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2821 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2822 | KVM_VCPUEVENT_VALID_SHADOW
2823 | KVM_VCPUEVENT_VALID_SMM
))
2827 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2828 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2829 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2830 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2832 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2833 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2834 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2835 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2836 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2837 events
->interrupt
.shadow
);
2839 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2840 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2841 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2842 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2844 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
2845 kvm_vcpu_has_lapic(vcpu
))
2846 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
2848 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
2849 if (events
->smi
.smm
)
2850 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
2852 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
2853 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
2854 if (events
->smi
.smm_inside_nmi
)
2855 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
2857 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
2858 if (kvm_vcpu_has_lapic(vcpu
)) {
2859 if (events
->smi
.latched_init
)
2860 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
2862 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
2866 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2871 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2872 struct kvm_debugregs
*dbgregs
)
2876 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2877 kvm_get_dr(vcpu
, 6, &val
);
2879 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2881 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2884 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2885 struct kvm_debugregs
*dbgregs
)
2890 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2891 kvm_update_dr0123(vcpu
);
2892 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2893 kvm_update_dr6(vcpu
);
2894 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2895 kvm_update_dr7(vcpu
);
2900 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2902 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
2904 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
2905 u64 xstate_bv
= xsave
->header
.xfeatures
;
2909 * Copy legacy XSAVE area, to avoid complications with CPUID
2910 * leaves 0 and 1 in the loop below.
2912 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
2915 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
2918 * Copy each region from the possibly compacted offset to the
2919 * non-compacted offset.
2921 valid
= xstate_bv
& ~XSTATE_FPSSE
;
2923 u64 feature
= valid
& -valid
;
2924 int index
= fls64(feature
) - 1;
2925 void *src
= get_xsave_addr(xsave
, feature
);
2928 u32 size
, offset
, ecx
, edx
;
2929 cpuid_count(XSTATE_CPUID
, index
,
2930 &size
, &offset
, &ecx
, &edx
);
2931 memcpy(dest
+ offset
, src
, size
);
2938 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
2940 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
2941 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
2945 * Copy legacy XSAVE area, to avoid complications with CPUID
2946 * leaves 0 and 1 in the loop below.
2948 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
2950 /* Set XSTATE_BV and possibly XCOMP_BV. */
2951 xsave
->header
.xfeatures
= xstate_bv
;
2953 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
2956 * Copy each region from the non-compacted offset to the
2957 * possibly compacted offset.
2959 valid
= xstate_bv
& ~XSTATE_FPSSE
;
2961 u64 feature
= valid
& -valid
;
2962 int index
= fls64(feature
) - 1;
2963 void *dest
= get_xsave_addr(xsave
, feature
);
2966 u32 size
, offset
, ecx
, edx
;
2967 cpuid_count(XSTATE_CPUID
, index
,
2968 &size
, &offset
, &ecx
, &edx
);
2969 memcpy(dest
, src
+ offset
, size
);
2976 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2977 struct kvm_xsave
*guest_xsave
)
2979 if (cpu_has_xsave
) {
2980 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
2981 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
2983 memcpy(guest_xsave
->region
,
2984 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
2985 sizeof(struct fxregs_state
));
2986 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2991 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2992 struct kvm_xsave
*guest_xsave
)
2995 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2997 if (cpu_has_xsave
) {
2999 * Here we allow setting states that are not present in
3000 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3001 * with old userspace.
3003 if (xstate_bv
& ~kvm_supported_xcr0())
3005 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3007 if (xstate_bv
& ~XSTATE_FPSSE
)
3009 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3010 guest_xsave
->region
, sizeof(struct fxregs_state
));
3015 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3016 struct kvm_xcrs
*guest_xcrs
)
3018 if (!cpu_has_xsave
) {
3019 guest_xcrs
->nr_xcrs
= 0;
3023 guest_xcrs
->nr_xcrs
= 1;
3024 guest_xcrs
->flags
= 0;
3025 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3026 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3029 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3030 struct kvm_xcrs
*guest_xcrs
)
3037 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3040 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3041 /* Only support XCR0 currently */
3042 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3043 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3044 guest_xcrs
->xcrs
[i
].value
);
3053 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3054 * stopped by the hypervisor. This function will be called from the host only.
3055 * EINVAL is returned when the host attempts to set the flag for a guest that
3056 * does not support pv clocks.
3058 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3060 if (!vcpu
->arch
.pv_time_enabled
)
3062 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3063 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3067 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3068 unsigned int ioctl
, unsigned long arg
)
3070 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3071 void __user
*argp
= (void __user
*)arg
;
3074 struct kvm_lapic_state
*lapic
;
3075 struct kvm_xsave
*xsave
;
3076 struct kvm_xcrs
*xcrs
;
3082 case KVM_GET_LAPIC
: {
3084 if (!vcpu
->arch
.apic
)
3086 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3091 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3095 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3100 case KVM_SET_LAPIC
: {
3102 if (!vcpu
->arch
.apic
)
3104 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3105 if (IS_ERR(u
.lapic
))
3106 return PTR_ERR(u
.lapic
);
3108 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3111 case KVM_INTERRUPT
: {
3112 struct kvm_interrupt irq
;
3115 if (copy_from_user(&irq
, argp
, sizeof irq
))
3117 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3121 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3125 r
= kvm_vcpu_ioctl_smi(vcpu
);
3128 case KVM_SET_CPUID
: {
3129 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3130 struct kvm_cpuid cpuid
;
3133 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3135 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3138 case KVM_SET_CPUID2
: {
3139 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3140 struct kvm_cpuid2 cpuid
;
3143 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3145 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3146 cpuid_arg
->entries
);
3149 case KVM_GET_CPUID2
: {
3150 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3151 struct kvm_cpuid2 cpuid
;
3154 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3156 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3157 cpuid_arg
->entries
);
3161 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3167 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3170 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3172 case KVM_TPR_ACCESS_REPORTING
: {
3173 struct kvm_tpr_access_ctl tac
;
3176 if (copy_from_user(&tac
, argp
, sizeof tac
))
3178 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3182 if (copy_to_user(argp
, &tac
, sizeof tac
))
3187 case KVM_SET_VAPIC_ADDR
: {
3188 struct kvm_vapic_addr va
;
3191 if (!irqchip_in_kernel(vcpu
->kvm
))
3194 if (copy_from_user(&va
, argp
, sizeof va
))
3196 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3199 case KVM_X86_SETUP_MCE
: {
3203 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3205 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3208 case KVM_X86_SET_MCE
: {
3209 struct kvm_x86_mce mce
;
3212 if (copy_from_user(&mce
, argp
, sizeof mce
))
3214 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3217 case KVM_GET_VCPU_EVENTS
: {
3218 struct kvm_vcpu_events events
;
3220 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3223 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3228 case KVM_SET_VCPU_EVENTS
: {
3229 struct kvm_vcpu_events events
;
3232 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3235 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3238 case KVM_GET_DEBUGREGS
: {
3239 struct kvm_debugregs dbgregs
;
3241 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3244 if (copy_to_user(argp
, &dbgregs
,
3245 sizeof(struct kvm_debugregs
)))
3250 case KVM_SET_DEBUGREGS
: {
3251 struct kvm_debugregs dbgregs
;
3254 if (copy_from_user(&dbgregs
, argp
,
3255 sizeof(struct kvm_debugregs
)))
3258 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3261 case KVM_GET_XSAVE
: {
3262 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3267 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3270 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3275 case KVM_SET_XSAVE
: {
3276 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3277 if (IS_ERR(u
.xsave
))
3278 return PTR_ERR(u
.xsave
);
3280 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3283 case KVM_GET_XCRS
: {
3284 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3289 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3292 if (copy_to_user(argp
, u
.xcrs
,
3293 sizeof(struct kvm_xcrs
)))
3298 case KVM_SET_XCRS
: {
3299 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3301 return PTR_ERR(u
.xcrs
);
3303 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3306 case KVM_SET_TSC_KHZ
: {
3310 user_tsc_khz
= (u32
)arg
;
3312 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3315 if (user_tsc_khz
== 0)
3316 user_tsc_khz
= tsc_khz
;
3318 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3323 case KVM_GET_TSC_KHZ
: {
3324 r
= vcpu
->arch
.virtual_tsc_khz
;
3327 case KVM_KVMCLOCK_CTRL
: {
3328 r
= kvm_set_guest_paused(vcpu
);
3339 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3341 return VM_FAULT_SIGBUS
;
3344 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3348 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3350 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3354 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3357 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3361 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3362 u32 kvm_nr_mmu_pages
)
3364 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3367 mutex_lock(&kvm
->slots_lock
);
3369 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3370 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3372 mutex_unlock(&kvm
->slots_lock
);
3376 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3378 return kvm
->arch
.n_max_mmu_pages
;
3381 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3386 switch (chip
->chip_id
) {
3387 case KVM_IRQCHIP_PIC_MASTER
:
3388 memcpy(&chip
->chip
.pic
,
3389 &pic_irqchip(kvm
)->pics
[0],
3390 sizeof(struct kvm_pic_state
));
3392 case KVM_IRQCHIP_PIC_SLAVE
:
3393 memcpy(&chip
->chip
.pic
,
3394 &pic_irqchip(kvm
)->pics
[1],
3395 sizeof(struct kvm_pic_state
));
3397 case KVM_IRQCHIP_IOAPIC
:
3398 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3407 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3412 switch (chip
->chip_id
) {
3413 case KVM_IRQCHIP_PIC_MASTER
:
3414 spin_lock(&pic_irqchip(kvm
)->lock
);
3415 memcpy(&pic_irqchip(kvm
)->pics
[0],
3417 sizeof(struct kvm_pic_state
));
3418 spin_unlock(&pic_irqchip(kvm
)->lock
);
3420 case KVM_IRQCHIP_PIC_SLAVE
:
3421 spin_lock(&pic_irqchip(kvm
)->lock
);
3422 memcpy(&pic_irqchip(kvm
)->pics
[1],
3424 sizeof(struct kvm_pic_state
));
3425 spin_unlock(&pic_irqchip(kvm
)->lock
);
3427 case KVM_IRQCHIP_IOAPIC
:
3428 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3434 kvm_pic_update_irq(pic_irqchip(kvm
));
3438 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3442 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3443 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3444 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3448 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3452 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3453 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3454 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3455 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3459 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3463 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3464 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3465 sizeof(ps
->channels
));
3466 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3467 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3468 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3472 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3474 int r
= 0, start
= 0;
3475 u32 prev_legacy
, cur_legacy
;
3476 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3477 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3478 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3479 if (!prev_legacy
&& cur_legacy
)
3481 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3482 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3483 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3484 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3485 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3489 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3490 struct kvm_reinject_control
*control
)
3492 if (!kvm
->arch
.vpit
)
3494 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3495 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3496 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3501 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3502 * @kvm: kvm instance
3503 * @log: slot id and address to which we copy the log
3505 * Steps 1-4 below provide general overview of dirty page logging. See
3506 * kvm_get_dirty_log_protect() function description for additional details.
3508 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3509 * always flush the TLB (step 4) even if previous step failed and the dirty
3510 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3511 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3512 * writes will be marked dirty for next log read.
3514 * 1. Take a snapshot of the bit and clear it if needed.
3515 * 2. Write protect the corresponding page.
3516 * 3. Copy the snapshot to the userspace.
3517 * 4. Flush TLB's if needed.
3519 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3521 bool is_dirty
= false;
3524 mutex_lock(&kvm
->slots_lock
);
3527 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3529 if (kvm_x86_ops
->flush_log_dirty
)
3530 kvm_x86_ops
->flush_log_dirty(kvm
);
3532 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3535 * All the TLBs can be flushed out of mmu lock, see the comments in
3536 * kvm_mmu_slot_remove_write_access().
3538 lockdep_assert_held(&kvm
->slots_lock
);
3540 kvm_flush_remote_tlbs(kvm
);
3542 mutex_unlock(&kvm
->slots_lock
);
3546 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3549 if (!irqchip_in_kernel(kvm
))
3552 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3553 irq_event
->irq
, irq_event
->level
,
3558 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3559 struct kvm_enable_cap
*cap
)
3567 case KVM_CAP_DISABLE_QUIRKS
:
3568 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3578 long kvm_arch_vm_ioctl(struct file
*filp
,
3579 unsigned int ioctl
, unsigned long arg
)
3581 struct kvm
*kvm
= filp
->private_data
;
3582 void __user
*argp
= (void __user
*)arg
;
3585 * This union makes it completely explicit to gcc-3.x
3586 * that these two variables' stack usage should be
3587 * combined, not added together.
3590 struct kvm_pit_state ps
;
3591 struct kvm_pit_state2 ps2
;
3592 struct kvm_pit_config pit_config
;
3596 case KVM_SET_TSS_ADDR
:
3597 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3599 case KVM_SET_IDENTITY_MAP_ADDR
: {
3603 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3605 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3608 case KVM_SET_NR_MMU_PAGES
:
3609 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3611 case KVM_GET_NR_MMU_PAGES
:
3612 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3614 case KVM_CREATE_IRQCHIP
: {
3615 struct kvm_pic
*vpic
;
3617 mutex_lock(&kvm
->lock
);
3620 goto create_irqchip_unlock
;
3622 if (atomic_read(&kvm
->online_vcpus
))
3623 goto create_irqchip_unlock
;
3625 vpic
= kvm_create_pic(kvm
);
3627 r
= kvm_ioapic_init(kvm
);
3629 mutex_lock(&kvm
->slots_lock
);
3630 kvm_destroy_pic(vpic
);
3631 mutex_unlock(&kvm
->slots_lock
);
3632 goto create_irqchip_unlock
;
3635 goto create_irqchip_unlock
;
3636 r
= kvm_setup_default_irq_routing(kvm
);
3638 mutex_lock(&kvm
->slots_lock
);
3639 mutex_lock(&kvm
->irq_lock
);
3640 kvm_ioapic_destroy(kvm
);
3641 kvm_destroy_pic(vpic
);
3642 mutex_unlock(&kvm
->irq_lock
);
3643 mutex_unlock(&kvm
->slots_lock
);
3644 goto create_irqchip_unlock
;
3646 /* Write kvm->irq_routing before kvm->arch.vpic. */
3648 kvm
->arch
.vpic
= vpic
;
3649 create_irqchip_unlock
:
3650 mutex_unlock(&kvm
->lock
);
3653 case KVM_CREATE_PIT
:
3654 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3656 case KVM_CREATE_PIT2
:
3658 if (copy_from_user(&u
.pit_config
, argp
,
3659 sizeof(struct kvm_pit_config
)))
3662 mutex_lock(&kvm
->slots_lock
);
3665 goto create_pit_unlock
;
3667 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3671 mutex_unlock(&kvm
->slots_lock
);
3673 case KVM_GET_IRQCHIP
: {
3674 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3675 struct kvm_irqchip
*chip
;
3677 chip
= memdup_user(argp
, sizeof(*chip
));
3684 if (!irqchip_in_kernel(kvm
))
3685 goto get_irqchip_out
;
3686 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3688 goto get_irqchip_out
;
3690 if (copy_to_user(argp
, chip
, sizeof *chip
))
3691 goto get_irqchip_out
;
3697 case KVM_SET_IRQCHIP
: {
3698 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3699 struct kvm_irqchip
*chip
;
3701 chip
= memdup_user(argp
, sizeof(*chip
));
3708 if (!irqchip_in_kernel(kvm
))
3709 goto set_irqchip_out
;
3710 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3712 goto set_irqchip_out
;
3720 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3723 if (!kvm
->arch
.vpit
)
3725 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3729 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3736 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3739 if (!kvm
->arch
.vpit
)
3741 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3744 case KVM_GET_PIT2
: {
3746 if (!kvm
->arch
.vpit
)
3748 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3752 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3757 case KVM_SET_PIT2
: {
3759 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3762 if (!kvm
->arch
.vpit
)
3764 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3767 case KVM_REINJECT_CONTROL
: {
3768 struct kvm_reinject_control control
;
3770 if (copy_from_user(&control
, argp
, sizeof(control
)))
3772 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3775 case KVM_SET_BOOT_CPU_ID
:
3777 mutex_lock(&kvm
->lock
);
3778 if (atomic_read(&kvm
->online_vcpus
) != 0)
3781 kvm
->arch
.bsp_vcpu_id
= arg
;
3782 mutex_unlock(&kvm
->lock
);
3784 case KVM_XEN_HVM_CONFIG
: {
3786 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3787 sizeof(struct kvm_xen_hvm_config
)))
3790 if (kvm
->arch
.xen_hvm_config
.flags
)
3795 case KVM_SET_CLOCK
: {
3796 struct kvm_clock_data user_ns
;
3801 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3809 local_irq_disable();
3810 now_ns
= get_kernel_ns();
3811 delta
= user_ns
.clock
- now_ns
;
3813 kvm
->arch
.kvmclock_offset
= delta
;
3814 kvm_gen_update_masterclock(kvm
);
3817 case KVM_GET_CLOCK
: {
3818 struct kvm_clock_data user_ns
;
3821 local_irq_disable();
3822 now_ns
= get_kernel_ns();
3823 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3826 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3829 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3834 case KVM_ENABLE_CAP
: {
3835 struct kvm_enable_cap cap
;
3838 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3840 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
3844 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
3850 static void kvm_init_msr_list(void)
3855 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3856 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3860 * Even MSRs that are valid in the host may not be exposed
3861 * to the guests in some cases. We could work around this
3862 * in VMX with the generic MSR save/load machinery, but it
3863 * is not really worthwhile since it will really only
3864 * happen with nested virtualization.
3866 switch (msrs_to_save
[i
]) {
3867 case MSR_IA32_BNDCFGS
:
3868 if (!kvm_x86_ops
->mpx_supported())
3876 msrs_to_save
[j
] = msrs_to_save
[i
];
3879 num_msrs_to_save
= j
;
3881 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
3882 switch (emulated_msrs
[i
]) {
3883 case MSR_IA32_SMBASE
:
3884 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
3892 emulated_msrs
[j
] = emulated_msrs
[i
];
3895 num_emulated_msrs
= j
;
3898 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3906 if (!(vcpu
->arch
.apic
&&
3907 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3908 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
3919 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3926 if (!(vcpu
->arch
.apic
&&
3927 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
3929 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
3931 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3941 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3942 struct kvm_segment
*var
, int seg
)
3944 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3947 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3948 struct kvm_segment
*var
, int seg
)
3950 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3953 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
3954 struct x86_exception
*exception
)
3958 BUG_ON(!mmu_is_nested(vcpu
));
3960 /* NPT walks are always user-walks */
3961 access
|= PFERR_USER_MASK
;
3962 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
3967 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3968 struct x86_exception
*exception
)
3970 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3971 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3974 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3975 struct x86_exception
*exception
)
3977 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3978 access
|= PFERR_FETCH_MASK
;
3979 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3982 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3983 struct x86_exception
*exception
)
3985 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3986 access
|= PFERR_WRITE_MASK
;
3987 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3990 /* uses this to access any guest's mapped memory without checking CPL */
3991 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3992 struct x86_exception
*exception
)
3994 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3997 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3998 struct kvm_vcpu
*vcpu
, u32 access
,
3999 struct x86_exception
*exception
)
4002 int r
= X86EMUL_CONTINUE
;
4005 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4007 unsigned offset
= addr
& (PAGE_SIZE
-1);
4008 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4011 if (gpa
== UNMAPPED_GVA
)
4012 return X86EMUL_PROPAGATE_FAULT
;
4013 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4016 r
= X86EMUL_IO_NEEDED
;
4028 /* used for instruction fetching */
4029 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4030 gva_t addr
, void *val
, unsigned int bytes
,
4031 struct x86_exception
*exception
)
4033 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4034 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4038 /* Inline kvm_read_guest_virt_helper for speed. */
4039 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4041 if (unlikely(gpa
== UNMAPPED_GVA
))
4042 return X86EMUL_PROPAGATE_FAULT
;
4044 offset
= addr
& (PAGE_SIZE
-1);
4045 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4046 bytes
= (unsigned)PAGE_SIZE
- offset
;
4047 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4049 if (unlikely(ret
< 0))
4050 return X86EMUL_IO_NEEDED
;
4052 return X86EMUL_CONTINUE
;
4055 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4056 gva_t addr
, void *val
, unsigned int bytes
,
4057 struct x86_exception
*exception
)
4059 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4060 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4062 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4065 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4067 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4068 gva_t addr
, void *val
, unsigned int bytes
,
4069 struct x86_exception
*exception
)
4071 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4072 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4075 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4076 gva_t addr
, void *val
,
4078 struct x86_exception
*exception
)
4080 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4082 int r
= X86EMUL_CONTINUE
;
4085 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4088 unsigned offset
= addr
& (PAGE_SIZE
-1);
4089 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4092 if (gpa
== UNMAPPED_GVA
)
4093 return X86EMUL_PROPAGATE_FAULT
;
4094 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4096 r
= X86EMUL_IO_NEEDED
;
4107 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4109 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4110 gpa_t
*gpa
, struct x86_exception
*exception
,
4113 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4114 | (write
? PFERR_WRITE_MASK
: 0);
4116 if (vcpu_match_mmio_gva(vcpu
, gva
)
4117 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4118 vcpu
->arch
.access
, access
)) {
4119 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4120 (gva
& (PAGE_SIZE
- 1));
4121 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4125 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4127 if (*gpa
== UNMAPPED_GVA
)
4130 /* For APIC access vmexit */
4131 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4134 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4135 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4142 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4143 const void *val
, int bytes
)
4147 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4150 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4154 struct read_write_emulator_ops
{
4155 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4157 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4158 void *val
, int bytes
);
4159 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4160 int bytes
, void *val
);
4161 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4162 void *val
, int bytes
);
4166 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4168 if (vcpu
->mmio_read_completed
) {
4169 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4170 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4171 vcpu
->mmio_read_completed
= 0;
4178 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4179 void *val
, int bytes
)
4181 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4184 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4185 void *val
, int bytes
)
4187 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4190 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4192 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4193 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4196 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4197 void *val
, int bytes
)
4199 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4200 return X86EMUL_IO_NEEDED
;
4203 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4204 void *val
, int bytes
)
4206 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4208 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4209 return X86EMUL_CONTINUE
;
4212 static const struct read_write_emulator_ops read_emultor
= {
4213 .read_write_prepare
= read_prepare
,
4214 .read_write_emulate
= read_emulate
,
4215 .read_write_mmio
= vcpu_mmio_read
,
4216 .read_write_exit_mmio
= read_exit_mmio
,
4219 static const struct read_write_emulator_ops write_emultor
= {
4220 .read_write_emulate
= write_emulate
,
4221 .read_write_mmio
= write_mmio
,
4222 .read_write_exit_mmio
= write_exit_mmio
,
4226 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4228 struct x86_exception
*exception
,
4229 struct kvm_vcpu
*vcpu
,
4230 const struct read_write_emulator_ops
*ops
)
4234 bool write
= ops
->write
;
4235 struct kvm_mmio_fragment
*frag
;
4237 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4240 return X86EMUL_PROPAGATE_FAULT
;
4242 /* For APIC access vmexit */
4246 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4247 return X86EMUL_CONTINUE
;
4251 * Is this MMIO handled locally?
4253 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4254 if (handled
== bytes
)
4255 return X86EMUL_CONTINUE
;
4261 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4262 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4266 return X86EMUL_CONTINUE
;
4269 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4271 void *val
, unsigned int bytes
,
4272 struct x86_exception
*exception
,
4273 const struct read_write_emulator_ops
*ops
)
4275 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4279 if (ops
->read_write_prepare
&&
4280 ops
->read_write_prepare(vcpu
, val
, bytes
))
4281 return X86EMUL_CONTINUE
;
4283 vcpu
->mmio_nr_fragments
= 0;
4285 /* Crossing a page boundary? */
4286 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4289 now
= -addr
& ~PAGE_MASK
;
4290 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4293 if (rc
!= X86EMUL_CONTINUE
)
4296 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4302 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4304 if (rc
!= X86EMUL_CONTINUE
)
4307 if (!vcpu
->mmio_nr_fragments
)
4310 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4312 vcpu
->mmio_needed
= 1;
4313 vcpu
->mmio_cur_fragment
= 0;
4315 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4316 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4317 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4318 vcpu
->run
->mmio
.phys_addr
= gpa
;
4320 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4323 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4327 struct x86_exception
*exception
)
4329 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4330 exception
, &read_emultor
);
4333 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4337 struct x86_exception
*exception
)
4339 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4340 exception
, &write_emultor
);
4343 #define CMPXCHG_TYPE(t, ptr, old, new) \
4344 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4346 #ifdef CONFIG_X86_64
4347 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4349 # define CMPXCHG64(ptr, old, new) \
4350 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4353 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4358 struct x86_exception
*exception
)
4360 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4366 /* guests cmpxchg8b have to be emulated atomically */
4367 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4370 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4372 if (gpa
== UNMAPPED_GVA
||
4373 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4376 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4379 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4380 if (is_error_page(page
))
4383 kaddr
= kmap_atomic(page
);
4384 kaddr
+= offset_in_page(gpa
);
4387 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4390 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4393 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4396 exchanged
= CMPXCHG64(kaddr
, old
, new);
4401 kunmap_atomic(kaddr
);
4402 kvm_release_page_dirty(page
);
4405 return X86EMUL_CMPXCHG_FAILED
;
4407 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4408 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4410 return X86EMUL_CONTINUE
;
4413 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4415 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4418 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4420 /* TODO: String I/O for in kernel device */
4423 if (vcpu
->arch
.pio
.in
)
4424 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4425 vcpu
->arch
.pio
.size
, pd
);
4427 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4428 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4433 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4434 unsigned short port
, void *val
,
4435 unsigned int count
, bool in
)
4437 vcpu
->arch
.pio
.port
= port
;
4438 vcpu
->arch
.pio
.in
= in
;
4439 vcpu
->arch
.pio
.count
= count
;
4440 vcpu
->arch
.pio
.size
= size
;
4442 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4443 vcpu
->arch
.pio
.count
= 0;
4447 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4448 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4449 vcpu
->run
->io
.size
= size
;
4450 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4451 vcpu
->run
->io
.count
= count
;
4452 vcpu
->run
->io
.port
= port
;
4457 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4458 int size
, unsigned short port
, void *val
,
4461 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4464 if (vcpu
->arch
.pio
.count
)
4467 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4470 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4471 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4472 vcpu
->arch
.pio
.count
= 0;
4479 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4480 int size
, unsigned short port
,
4481 const void *val
, unsigned int count
)
4483 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4485 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4486 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4487 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4490 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4492 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4495 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4497 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4500 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4502 if (!need_emulate_wbinvd(vcpu
))
4503 return X86EMUL_CONTINUE
;
4505 if (kvm_x86_ops
->has_wbinvd_exit()) {
4506 int cpu
= get_cpu();
4508 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4509 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4510 wbinvd_ipi
, NULL
, 1);
4512 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4515 return X86EMUL_CONTINUE
;
4518 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4520 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4521 return kvm_emulate_wbinvd_noskip(vcpu
);
4523 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4527 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4529 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4532 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4533 unsigned long *dest
)
4535 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4538 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4539 unsigned long value
)
4542 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4545 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4547 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4550 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4552 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4553 unsigned long value
;
4557 value
= kvm_read_cr0(vcpu
);
4560 value
= vcpu
->arch
.cr2
;
4563 value
= kvm_read_cr3(vcpu
);
4566 value
= kvm_read_cr4(vcpu
);
4569 value
= kvm_get_cr8(vcpu
);
4572 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4579 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4581 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4586 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4589 vcpu
->arch
.cr2
= val
;
4592 res
= kvm_set_cr3(vcpu
, val
);
4595 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4598 res
= kvm_set_cr8(vcpu
, val
);
4601 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4608 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4610 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4613 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4615 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4618 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4620 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4623 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4625 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4628 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4630 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4633 static unsigned long emulator_get_cached_segment_base(
4634 struct x86_emulate_ctxt
*ctxt
, int seg
)
4636 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4639 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4640 struct desc_struct
*desc
, u32
*base3
,
4643 struct kvm_segment var
;
4645 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4646 *selector
= var
.selector
;
4649 memset(desc
, 0, sizeof(*desc
));
4655 set_desc_limit(desc
, var
.limit
);
4656 set_desc_base(desc
, (unsigned long)var
.base
);
4657 #ifdef CONFIG_X86_64
4659 *base3
= var
.base
>> 32;
4661 desc
->type
= var
.type
;
4663 desc
->dpl
= var
.dpl
;
4664 desc
->p
= var
.present
;
4665 desc
->avl
= var
.avl
;
4673 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4674 struct desc_struct
*desc
, u32 base3
,
4677 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4678 struct kvm_segment var
;
4680 var
.selector
= selector
;
4681 var
.base
= get_desc_base(desc
);
4682 #ifdef CONFIG_X86_64
4683 var
.base
|= ((u64
)base3
) << 32;
4685 var
.limit
= get_desc_limit(desc
);
4687 var
.limit
= (var
.limit
<< 12) | 0xfff;
4688 var
.type
= desc
->type
;
4689 var
.dpl
= desc
->dpl
;
4694 var
.avl
= desc
->avl
;
4695 var
.present
= desc
->p
;
4696 var
.unusable
= !var
.present
;
4699 kvm_set_segment(vcpu
, &var
, seg
);
4703 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4704 u32 msr_index
, u64
*pdata
)
4706 struct msr_data msr
;
4709 msr
.index
= msr_index
;
4710 msr
.host_initiated
= false;
4711 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
4719 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4720 u32 msr_index
, u64 data
)
4722 struct msr_data msr
;
4725 msr
.index
= msr_index
;
4726 msr
.host_initiated
= false;
4727 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4730 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
4732 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4734 return vcpu
->arch
.smbase
;
4737 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
4739 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4741 vcpu
->arch
.smbase
= smbase
;
4744 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4747 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
4750 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4751 u32 pmc
, u64
*pdata
)
4753 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4756 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4758 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4761 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4764 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4766 * CR0.TS may reference the host fpu state, not the guest fpu state,
4767 * so it may be clear at this point.
4772 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4777 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4778 struct x86_instruction_info
*info
,
4779 enum x86_intercept_stage stage
)
4781 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4784 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4785 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4787 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4790 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4792 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4795 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4797 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4800 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
4802 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
4805 static const struct x86_emulate_ops emulate_ops
= {
4806 .read_gpr
= emulator_read_gpr
,
4807 .write_gpr
= emulator_write_gpr
,
4808 .read_std
= kvm_read_guest_virt_system
,
4809 .write_std
= kvm_write_guest_virt_system
,
4810 .fetch
= kvm_fetch_guest_virt
,
4811 .read_emulated
= emulator_read_emulated
,
4812 .write_emulated
= emulator_write_emulated
,
4813 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4814 .invlpg
= emulator_invlpg
,
4815 .pio_in_emulated
= emulator_pio_in_emulated
,
4816 .pio_out_emulated
= emulator_pio_out_emulated
,
4817 .get_segment
= emulator_get_segment
,
4818 .set_segment
= emulator_set_segment
,
4819 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4820 .get_gdt
= emulator_get_gdt
,
4821 .get_idt
= emulator_get_idt
,
4822 .set_gdt
= emulator_set_gdt
,
4823 .set_idt
= emulator_set_idt
,
4824 .get_cr
= emulator_get_cr
,
4825 .set_cr
= emulator_set_cr
,
4826 .cpl
= emulator_get_cpl
,
4827 .get_dr
= emulator_get_dr
,
4828 .set_dr
= emulator_set_dr
,
4829 .get_smbase
= emulator_get_smbase
,
4830 .set_smbase
= emulator_set_smbase
,
4831 .set_msr
= emulator_set_msr
,
4832 .get_msr
= emulator_get_msr
,
4833 .check_pmc
= emulator_check_pmc
,
4834 .read_pmc
= emulator_read_pmc
,
4835 .halt
= emulator_halt
,
4836 .wbinvd
= emulator_wbinvd
,
4837 .fix_hypercall
= emulator_fix_hypercall
,
4838 .get_fpu
= emulator_get_fpu
,
4839 .put_fpu
= emulator_put_fpu
,
4840 .intercept
= emulator_intercept
,
4841 .get_cpuid
= emulator_get_cpuid
,
4842 .set_nmi_mask
= emulator_set_nmi_mask
,
4845 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4847 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
4849 * an sti; sti; sequence only disable interrupts for the first
4850 * instruction. So, if the last instruction, be it emulated or
4851 * not, left the system with the INT_STI flag enabled, it
4852 * means that the last instruction is an sti. We should not
4853 * leave the flag on in this case. The same goes for mov ss
4855 if (int_shadow
& mask
)
4857 if (unlikely(int_shadow
|| mask
)) {
4858 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4860 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4864 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4866 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4867 if (ctxt
->exception
.vector
== PF_VECTOR
)
4868 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4870 if (ctxt
->exception
.error_code_valid
)
4871 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4872 ctxt
->exception
.error_code
);
4874 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4878 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4880 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4883 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4885 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4886 ctxt
->eip
= kvm_rip_read(vcpu
);
4887 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4888 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4889 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
4890 cs_db
? X86EMUL_MODE_PROT32
:
4891 X86EMUL_MODE_PROT16
;
4892 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
4893 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
4894 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
4895 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
4897 init_decode_cache(ctxt
);
4898 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4901 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4903 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4906 init_emulate_ctxt(vcpu
);
4910 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4911 ret
= emulate_int_real(ctxt
, irq
);
4913 if (ret
!= X86EMUL_CONTINUE
)
4914 return EMULATE_FAIL
;
4916 ctxt
->eip
= ctxt
->_eip
;
4917 kvm_rip_write(vcpu
, ctxt
->eip
);
4918 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4920 if (irq
== NMI_VECTOR
)
4921 vcpu
->arch
.nmi_pending
= 0;
4923 vcpu
->arch
.interrupt
.pending
= false;
4925 return EMULATE_DONE
;
4927 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4929 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4931 int r
= EMULATE_DONE
;
4933 ++vcpu
->stat
.insn_emulation_fail
;
4934 trace_kvm_emulate_insn_failed(vcpu
);
4935 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
4936 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4937 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4938 vcpu
->run
->internal
.ndata
= 0;
4941 kvm_queue_exception(vcpu
, UD_VECTOR
);
4946 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
4947 bool write_fault_to_shadow_pgtable
,
4953 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
4956 if (!vcpu
->arch
.mmu
.direct_map
) {
4958 * Write permission should be allowed since only
4959 * write access need to be emulated.
4961 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4964 * If the mapping is invalid in guest, let cpu retry
4965 * it to generate fault.
4967 if (gpa
== UNMAPPED_GVA
)
4972 * Do not retry the unhandleable instruction if it faults on the
4973 * readonly host memory, otherwise it will goto a infinite loop:
4974 * retry instruction -> write #PF -> emulation fail -> retry
4975 * instruction -> ...
4977 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
4980 * If the instruction failed on the error pfn, it can not be fixed,
4981 * report the error to userspace.
4983 if (is_error_noslot_pfn(pfn
))
4986 kvm_release_pfn_clean(pfn
);
4988 /* The instructions are well-emulated on direct mmu. */
4989 if (vcpu
->arch
.mmu
.direct_map
) {
4990 unsigned int indirect_shadow_pages
;
4992 spin_lock(&vcpu
->kvm
->mmu_lock
);
4993 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
4994 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4996 if (indirect_shadow_pages
)
4997 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5003 * if emulation was due to access to shadowed page table
5004 * and it failed try to unshadow page and re-enter the
5005 * guest to let CPU execute the instruction.
5007 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5010 * If the access faults on its page table, it can not
5011 * be fixed by unprotecting shadow page and it should
5012 * be reported to userspace.
5014 return !write_fault_to_shadow_pgtable
;
5017 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5018 unsigned long cr2
, int emulation_type
)
5020 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5021 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5023 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5024 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5027 * If the emulation is caused by #PF and it is non-page_table
5028 * writing instruction, it means the VM-EXIT is caused by shadow
5029 * page protected, we can zap the shadow page and retry this
5030 * instruction directly.
5032 * Note: if the guest uses a non-page-table modifying instruction
5033 * on the PDE that points to the instruction, then we will unmap
5034 * the instruction and go to an infinite loop. So, we cache the
5035 * last retried eip and the last fault address, if we meet the eip
5036 * and the address again, we can break out of the potential infinite
5039 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5041 if (!(emulation_type
& EMULTYPE_RETRY
))
5044 if (x86_page_table_writing_insn(ctxt
))
5047 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5050 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5051 vcpu
->arch
.last_retry_addr
= cr2
;
5053 if (!vcpu
->arch
.mmu
.direct_map
)
5054 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5056 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5061 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5062 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5064 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5066 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5067 /* This is a good place to trace that we are exiting SMM. */
5068 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5070 if (unlikely(vcpu
->arch
.smi_pending
)) {
5071 kvm_make_request(KVM_REQ_SMI
, vcpu
);
5072 vcpu
->arch
.smi_pending
= 0;
5074 /* Process a latched INIT, if any. */
5075 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5079 kvm_mmu_reset_context(vcpu
);
5082 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5084 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5086 vcpu
->arch
.hflags
= emul_flags
;
5088 if (changed
& HF_SMM_MASK
)
5089 kvm_smm_changed(vcpu
);
5092 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5101 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5102 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5107 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5109 struct kvm_run
*kvm_run
= vcpu
->run
;
5112 * rflags is the old, "raw" value of the flags. The new value has
5113 * not been saved yet.
5115 * This is correct even for TF set by the guest, because "the
5116 * processor will not generate this exception after the instruction
5117 * that sets the TF flag".
5119 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5120 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5121 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5123 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5124 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5125 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5126 *r
= EMULATE_USER_EXIT
;
5128 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5130 * "Certain debug exceptions may clear bit 0-3. The
5131 * remaining contents of the DR6 register are never
5132 * cleared by the processor".
5134 vcpu
->arch
.dr6
&= ~15;
5135 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5136 kvm_queue_exception(vcpu
, DB_VECTOR
);
5141 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5143 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5144 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5145 struct kvm_run
*kvm_run
= vcpu
->run
;
5146 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5147 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5148 vcpu
->arch
.guest_debug_dr7
,
5152 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5153 kvm_run
->debug
.arch
.pc
= eip
;
5154 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5155 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5156 *r
= EMULATE_USER_EXIT
;
5161 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5162 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5163 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5164 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5169 vcpu
->arch
.dr6
&= ~15;
5170 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5171 kvm_queue_exception(vcpu
, DB_VECTOR
);
5180 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5187 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5188 bool writeback
= true;
5189 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5192 * Clear write_fault_to_shadow_pgtable here to ensure it is
5195 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5196 kvm_clear_exception_queue(vcpu
);
5198 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5199 init_emulate_ctxt(vcpu
);
5202 * We will reenter on the same instruction since
5203 * we do not set complete_userspace_io. This does not
5204 * handle watchpoints yet, those would be handled in
5207 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5210 ctxt
->interruptibility
= 0;
5211 ctxt
->have_exception
= false;
5212 ctxt
->exception
.vector
= -1;
5213 ctxt
->perm_ok
= false;
5215 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5217 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5219 trace_kvm_emulate_insn_start(vcpu
);
5220 ++vcpu
->stat
.insn_emulation
;
5221 if (r
!= EMULATION_OK
) {
5222 if (emulation_type
& EMULTYPE_TRAP_UD
)
5223 return EMULATE_FAIL
;
5224 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5226 return EMULATE_DONE
;
5227 if (emulation_type
& EMULTYPE_SKIP
)
5228 return EMULATE_FAIL
;
5229 return handle_emulation_failure(vcpu
);
5233 if (emulation_type
& EMULTYPE_SKIP
) {
5234 kvm_rip_write(vcpu
, ctxt
->_eip
);
5235 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5236 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5237 return EMULATE_DONE
;
5240 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5241 return EMULATE_DONE
;
5243 /* this is needed for vmware backdoor interface to work since it
5244 changes registers values during IO operation */
5245 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5246 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5247 emulator_invalidate_register_cache(ctxt
);
5251 r
= x86_emulate_insn(ctxt
);
5253 if (r
== EMULATION_INTERCEPTED
)
5254 return EMULATE_DONE
;
5256 if (r
== EMULATION_FAILED
) {
5257 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5259 return EMULATE_DONE
;
5261 return handle_emulation_failure(vcpu
);
5264 if (ctxt
->have_exception
) {
5266 if (inject_emulated_exception(vcpu
))
5268 } else if (vcpu
->arch
.pio
.count
) {
5269 if (!vcpu
->arch
.pio
.in
) {
5270 /* FIXME: return into emulator if single-stepping. */
5271 vcpu
->arch
.pio
.count
= 0;
5274 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5276 r
= EMULATE_USER_EXIT
;
5277 } else if (vcpu
->mmio_needed
) {
5278 if (!vcpu
->mmio_is_write
)
5280 r
= EMULATE_USER_EXIT
;
5281 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5282 } else if (r
== EMULATION_RESTART
)
5288 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5289 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5290 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5291 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5292 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5293 kvm_rip_write(vcpu
, ctxt
->eip
);
5294 if (r
== EMULATE_DONE
)
5295 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5296 if (!ctxt
->have_exception
||
5297 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5298 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5301 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5302 * do nothing, and it will be requested again as soon as
5303 * the shadow expires. But we still need to check here,
5304 * because POPF has no interrupt shadow.
5306 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5307 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5309 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5313 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5315 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5317 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5318 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5319 size
, port
, &val
, 1);
5320 /* do not return to emulator after return from userspace */
5321 vcpu
->arch
.pio
.count
= 0;
5324 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5326 static void tsc_bad(void *info
)
5328 __this_cpu_write(cpu_tsc_khz
, 0);
5331 static void tsc_khz_changed(void *data
)
5333 struct cpufreq_freqs
*freq
= data
;
5334 unsigned long khz
= 0;
5338 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5339 khz
= cpufreq_quick_get(raw_smp_processor_id());
5342 __this_cpu_write(cpu_tsc_khz
, khz
);
5345 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5348 struct cpufreq_freqs
*freq
= data
;
5350 struct kvm_vcpu
*vcpu
;
5351 int i
, send_ipi
= 0;
5354 * We allow guests to temporarily run on slowing clocks,
5355 * provided we notify them after, or to run on accelerating
5356 * clocks, provided we notify them before. Thus time never
5359 * However, we have a problem. We can't atomically update
5360 * the frequency of a given CPU from this function; it is
5361 * merely a notifier, which can be called from any CPU.
5362 * Changing the TSC frequency at arbitrary points in time
5363 * requires a recomputation of local variables related to
5364 * the TSC for each VCPU. We must flag these local variables
5365 * to be updated and be sure the update takes place with the
5366 * new frequency before any guests proceed.
5368 * Unfortunately, the combination of hotplug CPU and frequency
5369 * change creates an intractable locking scenario; the order
5370 * of when these callouts happen is undefined with respect to
5371 * CPU hotplug, and they can race with each other. As such,
5372 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5373 * undefined; you can actually have a CPU frequency change take
5374 * place in between the computation of X and the setting of the
5375 * variable. To protect against this problem, all updates of
5376 * the per_cpu tsc_khz variable are done in an interrupt
5377 * protected IPI, and all callers wishing to update the value
5378 * must wait for a synchronous IPI to complete (which is trivial
5379 * if the caller is on the CPU already). This establishes the
5380 * necessary total order on variable updates.
5382 * Note that because a guest time update may take place
5383 * anytime after the setting of the VCPU's request bit, the
5384 * correct TSC value must be set before the request. However,
5385 * to ensure the update actually makes it to any guest which
5386 * starts running in hardware virtualization between the set
5387 * and the acquisition of the spinlock, we must also ping the
5388 * CPU after setting the request bit.
5392 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5394 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5397 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5399 spin_lock(&kvm_lock
);
5400 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5401 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5402 if (vcpu
->cpu
!= freq
->cpu
)
5404 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5405 if (vcpu
->cpu
!= smp_processor_id())
5409 spin_unlock(&kvm_lock
);
5411 if (freq
->old
< freq
->new && send_ipi
) {
5413 * We upscale the frequency. Must make the guest
5414 * doesn't see old kvmclock values while running with
5415 * the new frequency, otherwise we risk the guest sees
5416 * time go backwards.
5418 * In case we update the frequency for another cpu
5419 * (which might be in guest context) send an interrupt
5420 * to kick the cpu out of guest context. Next time
5421 * guest context is entered kvmclock will be updated,
5422 * so the guest will not see stale values.
5424 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5429 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5430 .notifier_call
= kvmclock_cpufreq_notifier
5433 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5434 unsigned long action
, void *hcpu
)
5436 unsigned int cpu
= (unsigned long)hcpu
;
5440 case CPU_DOWN_FAILED
:
5441 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5443 case CPU_DOWN_PREPARE
:
5444 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5450 static struct notifier_block kvmclock_cpu_notifier_block
= {
5451 .notifier_call
= kvmclock_cpu_notifier
,
5452 .priority
= -INT_MAX
5455 static void kvm_timer_init(void)
5459 max_tsc_khz
= tsc_khz
;
5461 cpu_notifier_register_begin();
5462 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5463 #ifdef CONFIG_CPU_FREQ
5464 struct cpufreq_policy policy
;
5465 memset(&policy
, 0, sizeof(policy
));
5467 cpufreq_get_policy(&policy
, cpu
);
5468 if (policy
.cpuinfo
.max_freq
)
5469 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5472 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5473 CPUFREQ_TRANSITION_NOTIFIER
);
5475 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5476 for_each_online_cpu(cpu
)
5477 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5479 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5480 cpu_notifier_register_done();
5484 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5486 int kvm_is_in_guest(void)
5488 return __this_cpu_read(current_vcpu
) != NULL
;
5491 static int kvm_is_user_mode(void)
5495 if (__this_cpu_read(current_vcpu
))
5496 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5498 return user_mode
!= 0;
5501 static unsigned long kvm_get_guest_ip(void)
5503 unsigned long ip
= 0;
5505 if (__this_cpu_read(current_vcpu
))
5506 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5511 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5512 .is_in_guest
= kvm_is_in_guest
,
5513 .is_user_mode
= kvm_is_user_mode
,
5514 .get_guest_ip
= kvm_get_guest_ip
,
5517 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5519 __this_cpu_write(current_vcpu
, vcpu
);
5521 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5523 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5525 __this_cpu_write(current_vcpu
, NULL
);
5527 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5529 static void kvm_set_mmio_spte_mask(void)
5532 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5535 * Set the reserved bits and the present bit of an paging-structure
5536 * entry to generate page fault with PFER.RSV = 1.
5538 /* Mask the reserved physical address bits. */
5539 mask
= rsvd_bits(maxphyaddr
, 51);
5541 /* Bit 62 is always reserved for 32bit host. */
5542 mask
|= 0x3ull
<< 62;
5544 /* Set the present bit. */
5547 #ifdef CONFIG_X86_64
5549 * If reserved bit is not supported, clear the present bit to disable
5552 if (maxphyaddr
== 52)
5556 kvm_mmu_set_mmio_spte_mask(mask
);
5559 #ifdef CONFIG_X86_64
5560 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5564 struct kvm_vcpu
*vcpu
;
5567 spin_lock(&kvm_lock
);
5568 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5569 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5570 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5571 atomic_set(&kvm_guest_has_master_clock
, 0);
5572 spin_unlock(&kvm_lock
);
5575 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5578 * Notification about pvclock gtod data update.
5580 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5583 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5584 struct timekeeper
*tk
= priv
;
5586 update_pvclock_gtod(tk
);
5588 /* disable master clock if host does not trust, or does not
5589 * use, TSC clocksource
5591 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5592 atomic_read(&kvm_guest_has_master_clock
) != 0)
5593 queue_work(system_long_wq
, &pvclock_gtod_work
);
5598 static struct notifier_block pvclock_gtod_notifier
= {
5599 .notifier_call
= pvclock_gtod_notify
,
5603 int kvm_arch_init(void *opaque
)
5606 struct kvm_x86_ops
*ops
= opaque
;
5609 printk(KERN_ERR
"kvm: already loaded the other module\n");
5614 if (!ops
->cpu_has_kvm_support()) {
5615 printk(KERN_ERR
"kvm: no hardware support\n");
5619 if (ops
->disabled_by_bios()) {
5620 printk(KERN_ERR
"kvm: disabled by bios\n");
5626 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5628 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5632 r
= kvm_mmu_module_init();
5634 goto out_free_percpu
;
5636 kvm_set_mmio_spte_mask();
5640 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5641 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5645 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5648 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5651 #ifdef CONFIG_X86_64
5652 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5658 free_percpu(shared_msrs
);
5663 void kvm_arch_exit(void)
5665 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5667 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5668 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5669 CPUFREQ_TRANSITION_NOTIFIER
);
5670 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5671 #ifdef CONFIG_X86_64
5672 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5675 kvm_mmu_module_exit();
5676 free_percpu(shared_msrs
);
5679 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5681 ++vcpu
->stat
.halt_exits
;
5682 if (irqchip_in_kernel(vcpu
->kvm
)) {
5683 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5686 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5690 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5692 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5694 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5695 return kvm_vcpu_halt(vcpu
);
5697 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5700 * kvm_pv_kick_cpu_op: Kick a vcpu.
5702 * @apicid - apicid of vcpu to be kicked.
5704 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5706 struct kvm_lapic_irq lapic_irq
;
5708 lapic_irq
.shorthand
= 0;
5709 lapic_irq
.dest_mode
= 0;
5710 lapic_irq
.dest_id
= apicid
;
5711 lapic_irq
.msi_redir_hint
= false;
5713 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5714 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
5717 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5719 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5720 int op_64_bit
, r
= 1;
5722 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5724 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5725 return kvm_hv_hypercall(vcpu
);
5727 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5728 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5729 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5730 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5731 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5733 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5735 op_64_bit
= is_64_bit_mode(vcpu
);
5744 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5750 case KVM_HC_VAPIC_POLL_IRQ
:
5753 case KVM_HC_KICK_CPU
:
5754 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5764 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5765 ++vcpu
->stat
.hypercalls
;
5768 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5770 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5772 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5773 char instruction
[3];
5774 unsigned long rip
= kvm_rip_read(vcpu
);
5776 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5778 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5782 * Check if userspace requested an interrupt window, and that the
5783 * interrupt window is open.
5785 * No need to exit to userspace if we already have an interrupt queued.
5787 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5789 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5790 vcpu
->run
->request_interrupt_window
&&
5791 kvm_arch_interrupt_allowed(vcpu
));
5794 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5796 struct kvm_run
*kvm_run
= vcpu
->run
;
5798 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5799 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
5800 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5801 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5802 if (irqchip_in_kernel(vcpu
->kvm
))
5803 kvm_run
->ready_for_interrupt_injection
= 1;
5805 kvm_run
->ready_for_interrupt_injection
=
5806 kvm_arch_interrupt_allowed(vcpu
) &&
5807 !kvm_cpu_has_interrupt(vcpu
) &&
5808 !kvm_event_needs_reinjection(vcpu
);
5811 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5815 if (!kvm_x86_ops
->update_cr8_intercept
)
5818 if (!vcpu
->arch
.apic
)
5821 if (!vcpu
->arch
.apic
->vapic_addr
)
5822 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5829 tpr
= kvm_lapic_get_cr8(vcpu
);
5831 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5834 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
5838 /* try to reinject previous events if any */
5839 if (vcpu
->arch
.exception
.pending
) {
5840 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5841 vcpu
->arch
.exception
.has_error_code
,
5842 vcpu
->arch
.exception
.error_code
);
5844 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
5845 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
5848 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
5849 (vcpu
->arch
.dr7
& DR7_GD
)) {
5850 vcpu
->arch
.dr7
&= ~DR7_GD
;
5851 kvm_update_dr7(vcpu
);
5854 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5855 vcpu
->arch
.exception
.has_error_code
,
5856 vcpu
->arch
.exception
.error_code
,
5857 vcpu
->arch
.exception
.reinject
);
5861 if (vcpu
->arch
.nmi_injected
) {
5862 kvm_x86_ops
->set_nmi(vcpu
);
5866 if (vcpu
->arch
.interrupt
.pending
) {
5867 kvm_x86_ops
->set_irq(vcpu
);
5871 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5872 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5877 /* try to inject new event if pending */
5878 if (vcpu
->arch
.nmi_pending
) {
5879 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5880 --vcpu
->arch
.nmi_pending
;
5881 vcpu
->arch
.nmi_injected
= true;
5882 kvm_x86_ops
->set_nmi(vcpu
);
5884 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5886 * Because interrupts can be injected asynchronously, we are
5887 * calling check_nested_events again here to avoid a race condition.
5888 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5889 * proposal and current concerns. Perhaps we should be setting
5890 * KVM_REQ_EVENT only on certain events and not unconditionally?
5892 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5893 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5897 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5898 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5900 kvm_x86_ops
->set_irq(vcpu
);
5906 static void process_nmi(struct kvm_vcpu
*vcpu
)
5911 * x86 is limited to one NMI running, and one NMI pending after it.
5912 * If an NMI is already in progress, limit further NMIs to just one.
5913 * Otherwise, allow two (and we'll inject the first one immediately).
5915 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5918 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5919 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5920 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5923 #define put_smstate(type, buf, offset, val) \
5924 *(type *)((buf) + (offset) - 0x7e00) = val
5926 static u32
process_smi_get_segment_flags(struct kvm_segment
*seg
)
5929 flags
|= seg
->g
<< 23;
5930 flags
|= seg
->db
<< 22;
5931 flags
|= seg
->l
<< 21;
5932 flags
|= seg
->avl
<< 20;
5933 flags
|= seg
->present
<< 15;
5934 flags
|= seg
->dpl
<< 13;
5935 flags
|= seg
->s
<< 12;
5936 flags
|= seg
->type
<< 8;
5940 static void process_smi_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
5942 struct kvm_segment seg
;
5945 kvm_get_segment(vcpu
, &seg
, n
);
5946 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
5949 offset
= 0x7f84 + n
* 12;
5951 offset
= 0x7f2c + (n
- 3) * 12;
5953 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
5954 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
5955 put_smstate(u32
, buf
, offset
, process_smi_get_segment_flags(&seg
));
5958 static void process_smi_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
5960 struct kvm_segment seg
;
5964 kvm_get_segment(vcpu
, &seg
, n
);
5965 offset
= 0x7e00 + n
* 16;
5967 flags
= process_smi_get_segment_flags(&seg
) >> 8;
5968 put_smstate(u16
, buf
, offset
, seg
.selector
);
5969 put_smstate(u16
, buf
, offset
+ 2, flags
);
5970 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
5971 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
5974 static void process_smi_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
5977 struct kvm_segment seg
;
5981 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
5982 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
5983 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
5984 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
5986 for (i
= 0; i
< 8; i
++)
5987 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
5989 kvm_get_dr(vcpu
, 6, &val
);
5990 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
5991 kvm_get_dr(vcpu
, 7, &val
);
5992 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
5994 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
5995 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
5996 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
5997 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
5998 put_smstate(u32
, buf
, 0x7f5c, process_smi_get_segment_flags(&seg
));
6000 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6001 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6002 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6003 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6004 put_smstate(u32
, buf
, 0x7f78, process_smi_get_segment_flags(&seg
));
6006 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6007 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6008 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6010 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6011 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6012 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6014 for (i
= 0; i
< 6; i
++)
6015 process_smi_save_seg_32(vcpu
, buf
, i
);
6017 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6020 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6021 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6024 static void process_smi_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6026 #ifdef CONFIG_X86_64
6028 struct kvm_segment seg
;
6032 for (i
= 0; i
< 16; i
++)
6033 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6035 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6036 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6038 kvm_get_dr(vcpu
, 6, &val
);
6039 put_smstate(u64
, buf
, 0x7f68, val
);
6040 kvm_get_dr(vcpu
, 7, &val
);
6041 put_smstate(u64
, buf
, 0x7f60, val
);
6043 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6044 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6045 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6047 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6050 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6052 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6054 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6055 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6056 put_smstate(u16
, buf
, 0x7e92, process_smi_get_segment_flags(&seg
) >> 8);
6057 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6058 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6060 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6061 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6062 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6064 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6065 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6066 put_smstate(u16
, buf
, 0x7e72, process_smi_get_segment_flags(&seg
) >> 8);
6067 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6068 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6070 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6071 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6072 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6074 for (i
= 0; i
< 6; i
++)
6075 process_smi_save_seg_64(vcpu
, buf
, i
);
6081 static void process_smi(struct kvm_vcpu
*vcpu
)
6083 struct kvm_segment cs
, ds
;
6089 vcpu
->arch
.smi_pending
= true;
6093 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6094 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6095 memset(buf
, 0, 512);
6096 if (guest_cpuid_has_longmode(vcpu
))
6097 process_smi_save_state_64(vcpu
, buf
);
6099 process_smi_save_state_32(vcpu
, buf
);
6101 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6103 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6104 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6106 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6108 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6109 kvm_rip_write(vcpu
, 0x8000);
6111 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6112 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6113 vcpu
->arch
.cr0
= cr0
;
6115 kvm_x86_ops
->set_cr4(vcpu
, 0);
6117 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6118 dt
.address
= dt
.size
= 0;
6119 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6121 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6123 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6124 cs
.base
= vcpu
->arch
.smbase
;
6129 cs
.limit
= ds
.limit
= 0xffffffff;
6130 cs
.type
= ds
.type
= 0x3;
6131 cs
.dpl
= ds
.dpl
= 0;
6136 cs
.avl
= ds
.avl
= 0;
6137 cs
.present
= ds
.present
= 1;
6138 cs
.unusable
= ds
.unusable
= 0;
6139 cs
.padding
= ds
.padding
= 0;
6141 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6142 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6143 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6144 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6145 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6146 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6148 if (guest_cpuid_has_longmode(vcpu
))
6149 kvm_x86_ops
->set_efer(vcpu
, 0);
6151 kvm_update_cpuid(vcpu
);
6152 kvm_mmu_reset_context(vcpu
);
6155 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6157 u64 eoi_exit_bitmap
[4];
6160 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6163 memset(eoi_exit_bitmap
, 0, 32);
6166 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
6167 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6168 kvm_apic_update_tmr(vcpu
, tmr
);
6171 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6173 ++vcpu
->stat
.tlb_flush
;
6174 kvm_x86_ops
->tlb_flush(vcpu
);
6177 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6179 struct page
*page
= NULL
;
6181 if (!irqchip_in_kernel(vcpu
->kvm
))
6184 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6187 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6188 if (is_error_page(page
))
6190 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6193 * Do not pin apic access page in memory, the MMU notifier
6194 * will call us again if it is migrated or swapped out.
6198 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6200 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6201 unsigned long address
)
6204 * The physical address of apic access page is stored in the VMCS.
6205 * Update it when it becomes invalid.
6207 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6208 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6212 * Returns 1 to let vcpu_run() continue the guest execution loop without
6213 * exiting to the userspace. Otherwise, the value will be returned to the
6216 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6219 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
6220 vcpu
->run
->request_interrupt_window
;
6221 bool req_immediate_exit
= false;
6223 if (vcpu
->requests
) {
6224 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6225 kvm_mmu_unload(vcpu
);
6226 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6227 __kvm_migrate_timers(vcpu
);
6228 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6229 kvm_gen_update_masterclock(vcpu
->kvm
);
6230 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6231 kvm_gen_kvmclock_update(vcpu
);
6232 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6233 r
= kvm_guest_time_update(vcpu
);
6237 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6238 kvm_mmu_sync_roots(vcpu
);
6239 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6240 kvm_vcpu_flush_tlb(vcpu
);
6241 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6242 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6246 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6247 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6251 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6252 vcpu
->fpu_active
= 0;
6253 kvm_x86_ops
->fpu_deactivate(vcpu
);
6255 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6256 /* Page is swapped out. Do synthetic halt */
6257 vcpu
->arch
.apf
.halted
= true;
6261 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6262 record_steal_time(vcpu
);
6263 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6265 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6267 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6268 kvm_pmu_handle_event(vcpu
);
6269 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6270 kvm_pmu_deliver_pmi(vcpu
);
6271 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6272 vcpu_scan_ioapic(vcpu
);
6273 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6274 kvm_vcpu_reload_apic_access_page(vcpu
);
6275 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6276 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6277 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6283 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6284 kvm_apic_accept_events(vcpu
);
6285 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6290 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6291 req_immediate_exit
= true;
6292 /* enable NMI/IRQ window open exits if needed */
6293 else if (vcpu
->arch
.nmi_pending
)
6294 kvm_x86_ops
->enable_nmi_window(vcpu
);
6295 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6296 kvm_x86_ops
->enable_irq_window(vcpu
);
6298 if (kvm_lapic_enabled(vcpu
)) {
6300 * Update architecture specific hints for APIC
6301 * virtual interrupt delivery.
6303 if (kvm_x86_ops
->hwapic_irr_update
)
6304 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6305 kvm_lapic_find_highest_irr(vcpu
));
6306 update_cr8_intercept(vcpu
);
6307 kvm_lapic_sync_to_vapic(vcpu
);
6311 r
= kvm_mmu_reload(vcpu
);
6313 goto cancel_injection
;
6318 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6319 if (vcpu
->fpu_active
)
6320 kvm_load_guest_fpu(vcpu
);
6321 kvm_load_guest_xcr0(vcpu
);
6323 vcpu
->mode
= IN_GUEST_MODE
;
6325 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6327 /* We should set ->mode before check ->requests,
6328 * see the comment in make_all_cpus_request.
6330 smp_mb__after_srcu_read_unlock();
6332 local_irq_disable();
6334 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6335 || need_resched() || signal_pending(current
)) {
6336 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6340 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6342 goto cancel_injection
;
6345 if (req_immediate_exit
)
6346 smp_send_reschedule(vcpu
->cpu
);
6348 __kvm_guest_enter();
6350 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6352 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6353 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6354 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6355 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6356 set_debugreg(vcpu
->arch
.dr6
, 6);
6357 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6360 trace_kvm_entry(vcpu
->vcpu_id
);
6361 wait_lapic_expire(vcpu
);
6362 kvm_x86_ops
->run(vcpu
);
6365 * Do this here before restoring debug registers on the host. And
6366 * since we do this before handling the vmexit, a DR access vmexit
6367 * can (a) read the correct value of the debug registers, (b) set
6368 * KVM_DEBUGREG_WONT_EXIT again.
6370 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6373 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6374 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6375 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6376 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6380 * If the guest has used debug registers, at least dr7
6381 * will be disabled while returning to the host.
6382 * If we don't have active breakpoints in the host, we don't
6383 * care about the messed up debug address registers. But if
6384 * we have some of them active, restore the old state.
6386 if (hw_breakpoint_active())
6387 hw_breakpoint_restore();
6389 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6392 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6395 /* Interrupt is enabled by handle_external_intr() */
6396 kvm_x86_ops
->handle_external_intr(vcpu
);
6401 * We must have an instruction between local_irq_enable() and
6402 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6403 * the interrupt shadow. The stat.exits increment will do nicely.
6404 * But we need to prevent reordering, hence this barrier():
6412 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6415 * Profile KVM exit RIPs:
6417 if (unlikely(prof_on
== KVM_PROFILING
)) {
6418 unsigned long rip
= kvm_rip_read(vcpu
);
6419 profile_hit(KVM_PROFILING
, (void *)rip
);
6422 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6423 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6425 if (vcpu
->arch
.apic_attention
)
6426 kvm_lapic_sync_from_vapic(vcpu
);
6428 r
= kvm_x86_ops
->handle_exit(vcpu
);
6432 kvm_x86_ops
->cancel_injection(vcpu
);
6433 if (unlikely(vcpu
->arch
.apic_attention
))
6434 kvm_lapic_sync_from_vapic(vcpu
);
6439 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6441 if (!kvm_arch_vcpu_runnable(vcpu
)) {
6442 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6443 kvm_vcpu_block(vcpu
);
6444 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6445 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6449 kvm_apic_accept_events(vcpu
);
6450 switch(vcpu
->arch
.mp_state
) {
6451 case KVM_MP_STATE_HALTED
:
6452 vcpu
->arch
.pv
.pv_unhalted
= false;
6453 vcpu
->arch
.mp_state
=
6454 KVM_MP_STATE_RUNNABLE
;
6455 case KVM_MP_STATE_RUNNABLE
:
6456 vcpu
->arch
.apf
.halted
= false;
6458 case KVM_MP_STATE_INIT_RECEIVED
:
6467 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6470 struct kvm
*kvm
= vcpu
->kvm
;
6472 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6475 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6476 !vcpu
->arch
.apf
.halted
)
6477 r
= vcpu_enter_guest(vcpu
);
6479 r
= vcpu_block(kvm
, vcpu
);
6483 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6484 if (kvm_cpu_has_pending_timer(vcpu
))
6485 kvm_inject_pending_timer_irqs(vcpu
);
6487 if (dm_request_for_irq_injection(vcpu
)) {
6489 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6490 ++vcpu
->stat
.request_irq_exits
;
6494 kvm_check_async_pf_completion(vcpu
);
6496 if (signal_pending(current
)) {
6498 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6499 ++vcpu
->stat
.signal_exits
;
6502 if (need_resched()) {
6503 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6505 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6509 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6514 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6517 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6518 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6519 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6520 if (r
!= EMULATE_DONE
)
6525 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6527 BUG_ON(!vcpu
->arch
.pio
.count
);
6529 return complete_emulated_io(vcpu
);
6533 * Implements the following, as a state machine:
6537 * for each mmio piece in the fragment
6545 * for each mmio piece in the fragment
6550 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6552 struct kvm_run
*run
= vcpu
->run
;
6553 struct kvm_mmio_fragment
*frag
;
6556 BUG_ON(!vcpu
->mmio_needed
);
6558 /* Complete previous fragment */
6559 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6560 len
= min(8u, frag
->len
);
6561 if (!vcpu
->mmio_is_write
)
6562 memcpy(frag
->data
, run
->mmio
.data
, len
);
6564 if (frag
->len
<= 8) {
6565 /* Switch to the next fragment. */
6567 vcpu
->mmio_cur_fragment
++;
6569 /* Go forward to the next mmio piece. */
6575 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6576 vcpu
->mmio_needed
= 0;
6578 /* FIXME: return into emulator if single-stepping. */
6579 if (vcpu
->mmio_is_write
)
6581 vcpu
->mmio_read_completed
= 1;
6582 return complete_emulated_io(vcpu
);
6585 run
->exit_reason
= KVM_EXIT_MMIO
;
6586 run
->mmio
.phys_addr
= frag
->gpa
;
6587 if (vcpu
->mmio_is_write
)
6588 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6589 run
->mmio
.len
= min(8u, frag
->len
);
6590 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6591 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6596 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6598 struct fpu
*fpu
= ¤t
->thread
.fpu
;
6602 fpu__activate_curr(fpu
);
6604 if (vcpu
->sigset_active
)
6605 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6607 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6608 kvm_vcpu_block(vcpu
);
6609 kvm_apic_accept_events(vcpu
);
6610 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6615 /* re-sync apic's tpr */
6616 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6617 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6623 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6624 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6625 vcpu
->arch
.complete_userspace_io
= NULL
;
6630 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6635 post_kvm_run_save(vcpu
);
6636 if (vcpu
->sigset_active
)
6637 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6642 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6644 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6646 * We are here if userspace calls get_regs() in the middle of
6647 * instruction emulation. Registers state needs to be copied
6648 * back from emulation context to vcpu. Userspace shouldn't do
6649 * that usually, but some bad designed PV devices (vmware
6650 * backdoor interface) need this to work
6652 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6653 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6655 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6656 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6657 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6658 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6659 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6660 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6661 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6662 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6663 #ifdef CONFIG_X86_64
6664 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6665 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6666 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6667 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6668 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6669 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6670 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6671 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6674 regs
->rip
= kvm_rip_read(vcpu
);
6675 regs
->rflags
= kvm_get_rflags(vcpu
);
6680 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6682 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6683 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6685 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6686 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6687 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6688 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6689 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6690 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6691 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6692 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6693 #ifdef CONFIG_X86_64
6694 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6695 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6696 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6697 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6698 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6699 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6700 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6701 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6704 kvm_rip_write(vcpu
, regs
->rip
);
6705 kvm_set_rflags(vcpu
, regs
->rflags
);
6707 vcpu
->arch
.exception
.pending
= false;
6709 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6714 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6716 struct kvm_segment cs
;
6718 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6722 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6724 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6725 struct kvm_sregs
*sregs
)
6729 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6730 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6731 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6732 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6733 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6734 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6736 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6737 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6739 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6740 sregs
->idt
.limit
= dt
.size
;
6741 sregs
->idt
.base
= dt
.address
;
6742 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6743 sregs
->gdt
.limit
= dt
.size
;
6744 sregs
->gdt
.base
= dt
.address
;
6746 sregs
->cr0
= kvm_read_cr0(vcpu
);
6747 sregs
->cr2
= vcpu
->arch
.cr2
;
6748 sregs
->cr3
= kvm_read_cr3(vcpu
);
6749 sregs
->cr4
= kvm_read_cr4(vcpu
);
6750 sregs
->cr8
= kvm_get_cr8(vcpu
);
6751 sregs
->efer
= vcpu
->arch
.efer
;
6752 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6754 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6756 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6757 set_bit(vcpu
->arch
.interrupt
.nr
,
6758 (unsigned long *)sregs
->interrupt_bitmap
);
6763 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6764 struct kvm_mp_state
*mp_state
)
6766 kvm_apic_accept_events(vcpu
);
6767 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6768 vcpu
->arch
.pv
.pv_unhalted
)
6769 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6771 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6776 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6777 struct kvm_mp_state
*mp_state
)
6779 if (!kvm_vcpu_has_lapic(vcpu
) &&
6780 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6783 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6784 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6785 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6787 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6788 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6792 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6793 int reason
, bool has_error_code
, u32 error_code
)
6795 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6798 init_emulate_ctxt(vcpu
);
6800 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6801 has_error_code
, error_code
);
6804 return EMULATE_FAIL
;
6806 kvm_rip_write(vcpu
, ctxt
->eip
);
6807 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6808 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6809 return EMULATE_DONE
;
6811 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6813 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6814 struct kvm_sregs
*sregs
)
6816 struct msr_data apic_base_msr
;
6817 int mmu_reset_needed
= 0;
6818 int pending_vec
, max_bits
, idx
;
6821 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6824 dt
.size
= sregs
->idt
.limit
;
6825 dt
.address
= sregs
->idt
.base
;
6826 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6827 dt
.size
= sregs
->gdt
.limit
;
6828 dt
.address
= sregs
->gdt
.base
;
6829 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6831 vcpu
->arch
.cr2
= sregs
->cr2
;
6832 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6833 vcpu
->arch
.cr3
= sregs
->cr3
;
6834 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6836 kvm_set_cr8(vcpu
, sregs
->cr8
);
6838 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6839 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6840 apic_base_msr
.data
= sregs
->apic_base
;
6841 apic_base_msr
.host_initiated
= true;
6842 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6844 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6845 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6846 vcpu
->arch
.cr0
= sregs
->cr0
;
6848 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6849 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6850 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6851 kvm_update_cpuid(vcpu
);
6853 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6854 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6855 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6856 mmu_reset_needed
= 1;
6858 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6860 if (mmu_reset_needed
)
6861 kvm_mmu_reset_context(vcpu
);
6863 max_bits
= KVM_NR_INTERRUPTS
;
6864 pending_vec
= find_first_bit(
6865 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6866 if (pending_vec
< max_bits
) {
6867 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6868 pr_debug("Set back pending irq %d\n", pending_vec
);
6871 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6872 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6873 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6874 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6875 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6876 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6878 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6879 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6881 update_cr8_intercept(vcpu
);
6883 /* Older userspace won't unhalt the vcpu on reset. */
6884 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6885 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6887 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6889 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6894 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6895 struct kvm_guest_debug
*dbg
)
6897 unsigned long rflags
;
6900 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6902 if (vcpu
->arch
.exception
.pending
)
6904 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6905 kvm_queue_exception(vcpu
, DB_VECTOR
);
6907 kvm_queue_exception(vcpu
, BP_VECTOR
);
6911 * Read rflags as long as potentially injected trace flags are still
6914 rflags
= kvm_get_rflags(vcpu
);
6916 vcpu
->guest_debug
= dbg
->control
;
6917 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6918 vcpu
->guest_debug
= 0;
6920 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6921 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6922 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6923 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6925 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6926 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6928 kvm_update_dr7(vcpu
);
6930 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6931 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6932 get_segment_base(vcpu
, VCPU_SREG_CS
);
6935 * Trigger an rflags update that will inject or remove the trace
6938 kvm_set_rflags(vcpu
, rflags
);
6940 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6950 * Translate a guest virtual address to a guest physical address.
6952 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6953 struct kvm_translation
*tr
)
6955 unsigned long vaddr
= tr
->linear_address
;
6959 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6960 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6961 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6962 tr
->physical_address
= gpa
;
6963 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6970 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6972 struct fxregs_state
*fxsave
=
6973 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
6975 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6976 fpu
->fcw
= fxsave
->cwd
;
6977 fpu
->fsw
= fxsave
->swd
;
6978 fpu
->ftwx
= fxsave
->twd
;
6979 fpu
->last_opcode
= fxsave
->fop
;
6980 fpu
->last_ip
= fxsave
->rip
;
6981 fpu
->last_dp
= fxsave
->rdp
;
6982 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6987 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6989 struct fxregs_state
*fxsave
=
6990 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
6992 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6993 fxsave
->cwd
= fpu
->fcw
;
6994 fxsave
->swd
= fpu
->fsw
;
6995 fxsave
->twd
= fpu
->ftwx
;
6996 fxsave
->fop
= fpu
->last_opcode
;
6997 fxsave
->rip
= fpu
->last_ip
;
6998 fxsave
->rdp
= fpu
->last_dp
;
6999 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7004 static void fx_init(struct kvm_vcpu
*vcpu
)
7006 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7008 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7009 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7012 * Ensure guest xcr0 is valid for loading
7014 vcpu
->arch
.xcr0
= XSTATE_FP
;
7016 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7019 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7021 if (vcpu
->guest_fpu_loaded
)
7025 * Restore all possible states in the guest,
7026 * and assume host would use all available bits.
7027 * Guest xcr0 would be loaded later.
7029 kvm_put_guest_xcr0(vcpu
);
7030 vcpu
->guest_fpu_loaded
= 1;
7031 __kernel_fpu_begin();
7032 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7036 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7038 kvm_put_guest_xcr0(vcpu
);
7040 if (!vcpu
->guest_fpu_loaded
) {
7041 vcpu
->fpu_counter
= 0;
7045 vcpu
->guest_fpu_loaded
= 0;
7046 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7048 ++vcpu
->stat
.fpu_reload
;
7050 * If using eager FPU mode, or if the guest is a frequent user
7051 * of the FPU, just leave the FPU active for next time.
7052 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7053 * the FPU in bursts will revert to loading it on demand.
7055 if (!vcpu
->arch
.eager_fpu
) {
7056 if (++vcpu
->fpu_counter
< 5)
7057 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7062 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7064 kvmclock_reset(vcpu
);
7066 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7067 kvm_x86_ops
->vcpu_free(vcpu
);
7070 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7073 struct kvm_vcpu
*vcpu
;
7075 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7076 printk_once(KERN_WARNING
7077 "kvm: SMP vm created on host with unstable TSC; "
7078 "guest TSC will not be reliable\n");
7080 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7085 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7089 kvm_vcpu_mtrr_init(vcpu
);
7090 r
= vcpu_load(vcpu
);
7093 kvm_vcpu_reset(vcpu
, false);
7094 kvm_mmu_setup(vcpu
);
7099 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7101 struct msr_data msr
;
7102 struct kvm
*kvm
= vcpu
->kvm
;
7104 if (vcpu_load(vcpu
))
7107 msr
.index
= MSR_IA32_TSC
;
7108 msr
.host_initiated
= true;
7109 kvm_write_tsc(vcpu
, &msr
);
7112 if (!kvmclock_periodic_sync
)
7115 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7116 KVMCLOCK_SYNC_PERIOD
);
7119 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7122 vcpu
->arch
.apf
.msr_val
= 0;
7124 r
= vcpu_load(vcpu
);
7126 kvm_mmu_unload(vcpu
);
7129 kvm_x86_ops
->vcpu_free(vcpu
);
7132 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7134 vcpu
->arch
.hflags
= 0;
7136 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7137 vcpu
->arch
.nmi_pending
= 0;
7138 vcpu
->arch
.nmi_injected
= false;
7139 kvm_clear_interrupt_queue(vcpu
);
7140 kvm_clear_exception_queue(vcpu
);
7142 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7143 kvm_update_dr0123(vcpu
);
7144 vcpu
->arch
.dr6
= DR6_INIT
;
7145 kvm_update_dr6(vcpu
);
7146 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7147 kvm_update_dr7(vcpu
);
7151 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7152 vcpu
->arch
.apf
.msr_val
= 0;
7153 vcpu
->arch
.st
.msr_val
= 0;
7155 kvmclock_reset(vcpu
);
7157 kvm_clear_async_pf_completion_queue(vcpu
);
7158 kvm_async_pf_hash_reset(vcpu
);
7159 vcpu
->arch
.apf
.halted
= false;
7162 kvm_pmu_reset(vcpu
);
7163 vcpu
->arch
.smbase
= 0x30000;
7166 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7167 vcpu
->arch
.regs_avail
= ~0;
7168 vcpu
->arch
.regs_dirty
= ~0;
7170 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7173 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7175 struct kvm_segment cs
;
7177 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7178 cs
.selector
= vector
<< 8;
7179 cs
.base
= vector
<< 12;
7180 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7181 kvm_rip_write(vcpu
, 0);
7184 int kvm_arch_hardware_enable(void)
7187 struct kvm_vcpu
*vcpu
;
7192 bool stable
, backwards_tsc
= false;
7194 kvm_shared_msr_cpu_online();
7195 ret
= kvm_x86_ops
->hardware_enable();
7199 local_tsc
= native_read_tsc();
7200 stable
= !check_tsc_unstable();
7201 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7202 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7203 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7204 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7205 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7206 backwards_tsc
= true;
7207 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7208 max_tsc
= vcpu
->arch
.last_host_tsc
;
7214 * Sometimes, even reliable TSCs go backwards. This happens on
7215 * platforms that reset TSC during suspend or hibernate actions, but
7216 * maintain synchronization. We must compensate. Fortunately, we can
7217 * detect that condition here, which happens early in CPU bringup,
7218 * before any KVM threads can be running. Unfortunately, we can't
7219 * bring the TSCs fully up to date with real time, as we aren't yet far
7220 * enough into CPU bringup that we know how much real time has actually
7221 * elapsed; our helper function, get_kernel_ns() will be using boot
7222 * variables that haven't been updated yet.
7224 * So we simply find the maximum observed TSC above, then record the
7225 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7226 * the adjustment will be applied. Note that we accumulate
7227 * adjustments, in case multiple suspend cycles happen before some VCPU
7228 * gets a chance to run again. In the event that no KVM threads get a
7229 * chance to run, we will miss the entire elapsed period, as we'll have
7230 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7231 * loose cycle time. This isn't too big a deal, since the loss will be
7232 * uniform across all VCPUs (not to mention the scenario is extremely
7233 * unlikely). It is possible that a second hibernate recovery happens
7234 * much faster than a first, causing the observed TSC here to be
7235 * smaller; this would require additional padding adjustment, which is
7236 * why we set last_host_tsc to the local tsc observed here.
7238 * N.B. - this code below runs only on platforms with reliable TSC,
7239 * as that is the only way backwards_tsc is set above. Also note
7240 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7241 * have the same delta_cyc adjustment applied if backwards_tsc
7242 * is detected. Note further, this adjustment is only done once,
7243 * as we reset last_host_tsc on all VCPUs to stop this from being
7244 * called multiple times (one for each physical CPU bringup).
7246 * Platforms with unreliable TSCs don't have to deal with this, they
7247 * will be compensated by the logic in vcpu_load, which sets the TSC to
7248 * catchup mode. This will catchup all VCPUs to real time, but cannot
7249 * guarantee that they stay in perfect synchronization.
7251 if (backwards_tsc
) {
7252 u64 delta_cyc
= max_tsc
- local_tsc
;
7253 backwards_tsc_observed
= true;
7254 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7255 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7256 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7257 vcpu
->arch
.last_host_tsc
= local_tsc
;
7258 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7262 * We have to disable TSC offset matching.. if you were
7263 * booting a VM while issuing an S4 host suspend....
7264 * you may have some problem. Solving this issue is
7265 * left as an exercise to the reader.
7267 kvm
->arch
.last_tsc_nsec
= 0;
7268 kvm
->arch
.last_tsc_write
= 0;
7275 void kvm_arch_hardware_disable(void)
7277 kvm_x86_ops
->hardware_disable();
7278 drop_user_return_notifiers();
7281 int kvm_arch_hardware_setup(void)
7285 r
= kvm_x86_ops
->hardware_setup();
7289 kvm_init_msr_list();
7293 void kvm_arch_hardware_unsetup(void)
7295 kvm_x86_ops
->hardware_unsetup();
7298 void kvm_arch_check_processor_compat(void *rtn
)
7300 kvm_x86_ops
->check_processor_compatibility(rtn
);
7303 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7305 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7307 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7309 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7311 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7314 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7316 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
7319 struct static_key kvm_no_apic_vcpu __read_mostly
;
7321 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7327 BUG_ON(vcpu
->kvm
== NULL
);
7330 vcpu
->arch
.pv
.pv_unhalted
= false;
7331 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7332 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7333 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7335 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7337 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7342 vcpu
->arch
.pio_data
= page_address(page
);
7344 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7346 r
= kvm_mmu_create(vcpu
);
7348 goto fail_free_pio_data
;
7350 if (irqchip_in_kernel(kvm
)) {
7351 r
= kvm_create_lapic(vcpu
);
7353 goto fail_mmu_destroy
;
7355 static_key_slow_inc(&kvm_no_apic_vcpu
);
7357 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7359 if (!vcpu
->arch
.mce_banks
) {
7361 goto fail_free_lapic
;
7363 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7365 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7367 goto fail_free_mce_banks
;
7372 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7373 vcpu
->arch
.pv_time_enabled
= false;
7375 vcpu
->arch
.guest_supported_xcr0
= 0;
7376 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7378 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7380 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7382 kvm_async_pf_hash_reset(vcpu
);
7387 fail_free_mce_banks
:
7388 kfree(vcpu
->arch
.mce_banks
);
7390 kvm_free_lapic(vcpu
);
7392 kvm_mmu_destroy(vcpu
);
7394 free_page((unsigned long)vcpu
->arch
.pio_data
);
7399 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7403 kvm_pmu_destroy(vcpu
);
7404 kfree(vcpu
->arch
.mce_banks
);
7405 kvm_free_lapic(vcpu
);
7406 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7407 kvm_mmu_destroy(vcpu
);
7408 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7409 free_page((unsigned long)vcpu
->arch
.pio_data
);
7410 if (!irqchip_in_kernel(vcpu
->kvm
))
7411 static_key_slow_dec(&kvm_no_apic_vcpu
);
7414 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7416 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7419 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7424 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7425 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7426 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7427 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7428 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7430 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7431 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7432 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7433 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7434 &kvm
->arch
.irq_sources_bitmap
);
7436 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7437 mutex_init(&kvm
->arch
.apic_map_lock
);
7438 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7440 pvclock_update_vm_gtod_copy(kvm
);
7442 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7443 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7448 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7451 r
= vcpu_load(vcpu
);
7453 kvm_mmu_unload(vcpu
);
7457 static void kvm_free_vcpus(struct kvm
*kvm
)
7460 struct kvm_vcpu
*vcpu
;
7463 * Unpin any mmu pages first.
7465 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7466 kvm_clear_async_pf_completion_queue(vcpu
);
7467 kvm_unload_vcpu_mmu(vcpu
);
7469 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7470 kvm_arch_vcpu_free(vcpu
);
7472 mutex_lock(&kvm
->lock
);
7473 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7474 kvm
->vcpus
[i
] = NULL
;
7476 atomic_set(&kvm
->online_vcpus
, 0);
7477 mutex_unlock(&kvm
->lock
);
7480 void kvm_arch_sync_events(struct kvm
*kvm
)
7482 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7483 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7484 kvm_free_all_assigned_devices(kvm
);
7488 int __x86_set_memory_region(struct kvm
*kvm
,
7489 const struct kvm_userspace_memory_region
*mem
)
7493 /* Called with kvm->slots_lock held. */
7494 BUG_ON(mem
->slot
>= KVM_MEM_SLOTS_NUM
);
7496 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7497 struct kvm_userspace_memory_region m
= *mem
;
7500 r
= __kvm_set_memory_region(kvm
, &m
);
7507 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
7509 int x86_set_memory_region(struct kvm
*kvm
,
7510 const struct kvm_userspace_memory_region
*mem
)
7514 mutex_lock(&kvm
->slots_lock
);
7515 r
= __x86_set_memory_region(kvm
, mem
);
7516 mutex_unlock(&kvm
->slots_lock
);
7520 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
7522 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7524 if (current
->mm
== kvm
->mm
) {
7526 * Free memory regions allocated on behalf of userspace,
7527 * unless the the memory map has changed due to process exit
7530 struct kvm_userspace_memory_region mem
;
7531 memset(&mem
, 0, sizeof(mem
));
7532 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7533 x86_set_memory_region(kvm
, &mem
);
7535 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7536 x86_set_memory_region(kvm
, &mem
);
7538 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7539 x86_set_memory_region(kvm
, &mem
);
7541 kvm_iommu_unmap_guest(kvm
);
7542 kfree(kvm
->arch
.vpic
);
7543 kfree(kvm
->arch
.vioapic
);
7544 kvm_free_vcpus(kvm
);
7545 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7548 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7549 struct kvm_memory_slot
*dont
)
7553 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7554 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7555 kvfree(free
->arch
.rmap
[i
]);
7556 free
->arch
.rmap
[i
] = NULL
;
7561 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7562 dont
->arch
.lpage_info
[i
- 1]) {
7563 kvfree(free
->arch
.lpage_info
[i
- 1]);
7564 free
->arch
.lpage_info
[i
- 1] = NULL
;
7569 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7570 unsigned long npages
)
7574 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7579 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7580 slot
->base_gfn
, level
) + 1;
7582 slot
->arch
.rmap
[i
] =
7583 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7584 if (!slot
->arch
.rmap
[i
])
7589 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7590 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7591 if (!slot
->arch
.lpage_info
[i
- 1])
7594 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7595 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7596 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7597 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7598 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7600 * If the gfn and userspace address are not aligned wrt each
7601 * other, or if explicitly asked to, disable large page
7602 * support for this slot
7604 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7605 !kvm_largepages_enabled()) {
7608 for (j
= 0; j
< lpages
; ++j
)
7609 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7616 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7617 kvfree(slot
->arch
.rmap
[i
]);
7618 slot
->arch
.rmap
[i
] = NULL
;
7622 kvfree(slot
->arch
.lpage_info
[i
- 1]);
7623 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7628 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
7631 * memslots->generation has been incremented.
7632 * mmio generation may have reached its maximum value.
7634 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
7637 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7638 struct kvm_memory_slot
*memslot
,
7639 const struct kvm_userspace_memory_region
*mem
,
7640 enum kvm_mr_change change
)
7643 * Only private memory slots need to be mapped here since
7644 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7646 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7647 unsigned long userspace_addr
;
7650 * MAP_SHARED to prevent internal slot pages from being moved
7653 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7654 PROT_READ
| PROT_WRITE
,
7655 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7657 if (IS_ERR((void *)userspace_addr
))
7658 return PTR_ERR((void *)userspace_addr
);
7660 memslot
->userspace_addr
= userspace_addr
;
7666 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
7667 struct kvm_memory_slot
*new)
7669 /* Still write protect RO slot */
7670 if (new->flags
& KVM_MEM_READONLY
) {
7671 kvm_mmu_slot_remove_write_access(kvm
, new);
7676 * Call kvm_x86_ops dirty logging hooks when they are valid.
7678 * kvm_x86_ops->slot_disable_log_dirty is called when:
7680 * - KVM_MR_CREATE with dirty logging is disabled
7681 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7683 * The reason is, in case of PML, we need to set D-bit for any slots
7684 * with dirty logging disabled in order to eliminate unnecessary GPA
7685 * logging in PML buffer (and potential PML buffer full VMEXT). This
7686 * guarantees leaving PML enabled during guest's lifetime won't have
7687 * any additonal overhead from PML when guest is running with dirty
7688 * logging disabled for memory slots.
7690 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7691 * to dirty logging mode.
7693 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7695 * In case of write protect:
7697 * Write protect all pages for dirty logging.
7699 * All the sptes including the large sptes which point to this
7700 * slot are set to readonly. We can not create any new large
7701 * spte on this slot until the end of the logging.
7703 * See the comments in fast_page_fault().
7705 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
7706 if (kvm_x86_ops
->slot_enable_log_dirty
)
7707 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
7709 kvm_mmu_slot_remove_write_access(kvm
, new);
7711 if (kvm_x86_ops
->slot_disable_log_dirty
)
7712 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
7716 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7717 const struct kvm_userspace_memory_region
*mem
,
7718 const struct kvm_memory_slot
*old
,
7719 const struct kvm_memory_slot
*new,
7720 enum kvm_mr_change change
)
7722 int nr_mmu_pages
= 0;
7724 if (change
== KVM_MR_DELETE
&& old
->id
>= KVM_USER_MEM_SLOTS
) {
7727 ret
= vm_munmap(old
->userspace_addr
,
7728 old
->npages
* PAGE_SIZE
);
7731 "kvm_vm_ioctl_set_memory_region: "
7732 "failed to munmap memory\n");
7735 if (!kvm
->arch
.n_requested_mmu_pages
)
7736 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7739 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7742 * Dirty logging tracks sptes in 4k granularity, meaning that large
7743 * sptes have to be split. If live migration is successful, the guest
7744 * in the source machine will be destroyed and large sptes will be
7745 * created in the destination. However, if the guest continues to run
7746 * in the source machine (for example if live migration fails), small
7747 * sptes will remain around and cause bad performance.
7749 * Scan sptes if dirty logging has been stopped, dropping those
7750 * which can be collapsed into a single large-page spte. Later
7751 * page faults will create the large-page sptes.
7753 if ((change
!= KVM_MR_DELETE
) &&
7754 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
7755 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7756 kvm_mmu_zap_collapsible_sptes(kvm
, new);
7759 * Set up write protection and/or dirty logging for the new slot.
7761 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7762 * been zapped so no dirty logging staff is needed for old slot. For
7763 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7764 * new and it's also covered when dealing with the new slot.
7766 * FIXME: const-ify all uses of struct kvm_memory_slot.
7768 if (change
!= KVM_MR_DELETE
)
7769 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
7772 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7774 kvm_mmu_invalidate_zap_all_pages(kvm
);
7777 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7778 struct kvm_memory_slot
*slot
)
7780 kvm_mmu_invalidate_zap_all_pages(kvm
);
7783 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7785 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7786 kvm_x86_ops
->check_nested_events(vcpu
, false);
7788 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7789 !vcpu
->arch
.apf
.halted
)
7790 || !list_empty_careful(&vcpu
->async_pf
.done
)
7791 || kvm_apic_has_events(vcpu
)
7792 || vcpu
->arch
.pv
.pv_unhalted
7793 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7794 (kvm_arch_interrupt_allowed(vcpu
) &&
7795 kvm_cpu_has_interrupt(vcpu
));
7798 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7800 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7803 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7805 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7808 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
7810 if (is_64_bit_mode(vcpu
))
7811 return kvm_rip_read(vcpu
);
7812 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
7813 kvm_rip_read(vcpu
));
7815 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
7817 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7819 return kvm_get_linear_rip(vcpu
) == linear_rip
;
7821 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7823 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7825 unsigned long rflags
;
7827 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7828 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7829 rflags
&= ~X86_EFLAGS_TF
;
7832 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7834 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7836 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7837 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7838 rflags
|= X86_EFLAGS_TF
;
7839 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7842 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7844 __kvm_set_rflags(vcpu
, rflags
);
7845 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7847 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7849 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7853 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7857 r
= kvm_mmu_reload(vcpu
);
7861 if (!vcpu
->arch
.mmu
.direct_map
&&
7862 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7865 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7868 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7870 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7873 static inline u32
kvm_async_pf_next_probe(u32 key
)
7875 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7878 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7880 u32 key
= kvm_async_pf_hash_fn(gfn
);
7882 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7883 key
= kvm_async_pf_next_probe(key
);
7885 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7888 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7891 u32 key
= kvm_async_pf_hash_fn(gfn
);
7893 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7894 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7895 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7896 key
= kvm_async_pf_next_probe(key
);
7901 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7903 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7906 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7910 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7912 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7914 j
= kvm_async_pf_next_probe(j
);
7915 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7917 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7919 * k lies cyclically in ]i,j]
7921 * |....j i.k.| or |.k..j i...|
7923 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7924 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7929 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7932 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7936 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7937 struct kvm_async_pf
*work
)
7939 struct x86_exception fault
;
7941 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7942 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7944 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7945 (vcpu
->arch
.apf
.send_user_only
&&
7946 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7947 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7948 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7949 fault
.vector
= PF_VECTOR
;
7950 fault
.error_code_valid
= true;
7951 fault
.error_code
= 0;
7952 fault
.nested_page_fault
= false;
7953 fault
.address
= work
->arch
.token
;
7954 kvm_inject_page_fault(vcpu
, &fault
);
7958 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7959 struct kvm_async_pf
*work
)
7961 struct x86_exception fault
;
7963 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7964 if (work
->wakeup_all
)
7965 work
->arch
.token
= ~0; /* broadcast wakeup */
7967 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7969 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7970 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7971 fault
.vector
= PF_VECTOR
;
7972 fault
.error_code_valid
= true;
7973 fault
.error_code
= 0;
7974 fault
.nested_page_fault
= false;
7975 fault
.address
= work
->arch
.token
;
7976 kvm_inject_page_fault(vcpu
, &fault
);
7978 vcpu
->arch
.apf
.halted
= false;
7979 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7982 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7984 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7987 return !kvm_event_needs_reinjection(vcpu
) &&
7988 kvm_x86_ops
->interrupt_allowed(vcpu
);
7991 void kvm_arch_start_assignment(struct kvm
*kvm
)
7993 atomic_inc(&kvm
->arch
.assigned_device_count
);
7995 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
7997 void kvm_arch_end_assignment(struct kvm
*kvm
)
7999 atomic_dec(&kvm
->arch
.assigned_device_count
);
8001 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8003 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8005 return atomic_read(&kvm
->arch
.assigned_device_count
);
8007 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8009 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8011 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8013 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8015 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8017 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8019 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8021 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8023 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8025 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8027 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8028 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8029 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8030 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8031 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8032 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8033 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8034 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8035 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8036 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8037 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8038 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8039 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8040 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8041 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);