2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 static bool __read_mostly report_ignored_msrs
= true;
111 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
113 unsigned int min_timer_period_us
= 500;
114 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
116 static bool __read_mostly kvmclock_periodic_sync
= true;
117 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
119 bool __read_mostly kvm_has_tsc_control
;
120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
121 u32 __read_mostly kvm_max_guest_tsc_khz
;
122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
123 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
125 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
127 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
131 static u32 __read_mostly tsc_tolerance_ppm
= 250;
132 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
135 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
136 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
138 static bool __read_mostly vector_hashing
= true;
139 module_param(vector_hashing
, bool, S_IRUGO
);
141 #define KVM_NR_SHARED_MSRS 16
143 struct kvm_shared_msrs_global
{
145 u32 msrs
[KVM_NR_SHARED_MSRS
];
148 struct kvm_shared_msrs
{
149 struct user_return_notifier urn
;
151 struct kvm_shared_msr_values
{
154 } values
[KVM_NR_SHARED_MSRS
];
157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
158 static struct kvm_shared_msrs __percpu
*shared_msrs
;
160 struct kvm_stats_debugfs_item debugfs_entries
[] = {
161 { "pf_fixed", VCPU_STAT(pf_fixed
) },
162 { "pf_guest", VCPU_STAT(pf_guest
) },
163 { "tlb_flush", VCPU_STAT(tlb_flush
) },
164 { "invlpg", VCPU_STAT(invlpg
) },
165 { "exits", VCPU_STAT(exits
) },
166 { "io_exits", VCPU_STAT(io_exits
) },
167 { "mmio_exits", VCPU_STAT(mmio_exits
) },
168 { "signal_exits", VCPU_STAT(signal_exits
) },
169 { "irq_window", VCPU_STAT(irq_window_exits
) },
170 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
171 { "halt_exits", VCPU_STAT(halt_exits
) },
172 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
173 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
174 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
175 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
176 { "hypercalls", VCPU_STAT(hypercalls
) },
177 { "request_irq", VCPU_STAT(request_irq_exits
) },
178 { "irq_exits", VCPU_STAT(irq_exits
) },
179 { "host_state_reload", VCPU_STAT(host_state_reload
) },
180 { "efer_reload", VCPU_STAT(efer_reload
) },
181 { "fpu_reload", VCPU_STAT(fpu_reload
) },
182 { "insn_emulation", VCPU_STAT(insn_emulation
) },
183 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
184 { "irq_injections", VCPU_STAT(irq_injections
) },
185 { "nmi_injections", VCPU_STAT(nmi_injections
) },
186 { "req_event", VCPU_STAT(req_event
) },
187 { "l1d_flush", VCPU_STAT(l1d_flush
) },
188 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
189 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
190 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
191 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
192 { "mmu_flooded", VM_STAT(mmu_flooded
) },
193 { "mmu_recycled", VM_STAT(mmu_recycled
) },
194 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
195 { "mmu_unsync", VM_STAT(mmu_unsync
) },
196 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
197 { "largepages", VM_STAT(lpages
) },
198 { "max_mmu_page_hash_collisions",
199 VM_STAT(max_mmu_page_hash_collisions
) },
203 u64 __read_mostly host_xcr0
;
205 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
207 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
210 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
211 vcpu
->arch
.apf
.gfns
[i
] = ~0;
214 static void kvm_on_user_return(struct user_return_notifier
*urn
)
217 struct kvm_shared_msrs
*locals
218 = container_of(urn
, struct kvm_shared_msrs
, urn
);
219 struct kvm_shared_msr_values
*values
;
223 * Disabling irqs at this point since the following code could be
224 * interrupted and executed through kvm_arch_hardware_disable()
226 local_irq_save(flags
);
227 if (locals
->registered
) {
228 locals
->registered
= false;
229 user_return_notifier_unregister(urn
);
231 local_irq_restore(flags
);
232 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
233 values
= &locals
->values
[slot
];
234 if (values
->host
!= values
->curr
) {
235 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
236 values
->curr
= values
->host
;
241 static void shared_msr_update(unsigned slot
, u32 msr
)
244 unsigned int cpu
= smp_processor_id();
245 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
247 /* only read, and nobody should modify it at this time,
248 * so don't need lock */
249 if (slot
>= shared_msrs_global
.nr
) {
250 printk(KERN_ERR
"kvm: invalid MSR slot!");
253 rdmsrl_safe(msr
, &value
);
254 smsr
->values
[slot
].host
= value
;
255 smsr
->values
[slot
].curr
= value
;
258 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
260 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
261 shared_msrs_global
.msrs
[slot
] = msr
;
262 if (slot
>= shared_msrs_global
.nr
)
263 shared_msrs_global
.nr
= slot
+ 1;
265 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
267 static void kvm_shared_msr_cpu_online(void)
271 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
272 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
275 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
277 unsigned int cpu
= smp_processor_id();
278 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
281 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
283 smsr
->values
[slot
].curr
= value
;
284 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
288 if (!smsr
->registered
) {
289 smsr
->urn
.on_user_return
= kvm_on_user_return
;
290 user_return_notifier_register(&smsr
->urn
);
291 smsr
->registered
= true;
295 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
297 static void drop_user_return_notifiers(void)
299 unsigned int cpu
= smp_processor_id();
300 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
302 if (smsr
->registered
)
303 kvm_on_user_return(&smsr
->urn
);
306 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
308 return vcpu
->arch
.apic_base
;
310 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
312 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
314 u64 old_state
= vcpu
->arch
.apic_base
&
315 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
316 u64 new_state
= msr_info
->data
&
317 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
318 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
319 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
321 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
323 if (!msr_info
->host_initiated
&&
324 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
325 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
326 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
330 kvm_lapic_set_base(vcpu
, msr_info
->data
);
333 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
335 asmlinkage __visible
void kvm_spurious_fault(void)
337 /* Fault while not rebooting. We want the trace. */
340 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
342 #define EXCPT_BENIGN 0
343 #define EXCPT_CONTRIBUTORY 1
346 static int exception_class(int vector
)
356 return EXCPT_CONTRIBUTORY
;
363 #define EXCPT_FAULT 0
365 #define EXCPT_ABORT 2
366 #define EXCPT_INTERRUPT 3
368 static int exception_type(int vector
)
372 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
373 return EXCPT_INTERRUPT
;
377 /* #DB is trap, as instruction watchpoints are handled elsewhere */
378 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
381 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
384 /* Reserved exceptions will result in fault */
388 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
389 unsigned nr
, bool has_error
, u32 error_code
,
395 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
397 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
399 if (has_error
&& !is_protmode(vcpu
))
403 * On vmentry, vcpu->arch.exception.pending is only
404 * true if an event injection was blocked by
405 * nested_run_pending. In that case, however,
406 * vcpu_enter_guest requests an immediate exit,
407 * and the guest shouldn't proceed far enough to
410 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
411 vcpu
->arch
.exception
.injected
= true;
413 vcpu
->arch
.exception
.pending
= true;
414 vcpu
->arch
.exception
.injected
= false;
416 vcpu
->arch
.exception
.has_error_code
= has_error
;
417 vcpu
->arch
.exception
.nr
= nr
;
418 vcpu
->arch
.exception
.error_code
= error_code
;
422 /* to check exception */
423 prev_nr
= vcpu
->arch
.exception
.nr
;
424 if (prev_nr
== DF_VECTOR
) {
425 /* triple fault -> shutdown */
426 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
429 class1
= exception_class(prev_nr
);
430 class2
= exception_class(nr
);
431 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
432 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
434 * Generate double fault per SDM Table 5-5. Set
435 * exception.pending = true so that the double fault
436 * can trigger a nested vmexit.
438 vcpu
->arch
.exception
.pending
= true;
439 vcpu
->arch
.exception
.injected
= false;
440 vcpu
->arch
.exception
.has_error_code
= true;
441 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
442 vcpu
->arch
.exception
.error_code
= 0;
444 /* replace previous exception with a new one in a hope
445 that instruction re-execution will regenerate lost
450 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
452 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
454 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
456 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
458 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
460 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
462 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
465 kvm_inject_gp(vcpu
, 0);
467 return kvm_skip_emulated_instruction(vcpu
);
471 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
473 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
475 ++vcpu
->stat
.pf_guest
;
476 vcpu
->arch
.exception
.nested_apf
=
477 is_guest_mode(vcpu
) && fault
->async_page_fault
;
478 if (vcpu
->arch
.exception
.nested_apf
)
479 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
481 vcpu
->arch
.cr2
= fault
->address
;
482 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
484 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
486 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
488 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
489 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
491 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
493 return fault
->nested_page_fault
;
496 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
498 atomic_inc(&vcpu
->arch
.nmi_queued
);
499 kvm_make_request(KVM_REQ_NMI
, vcpu
);
501 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
503 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
505 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
507 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
509 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
511 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
513 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
516 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
517 * a #GP and return false.
519 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
521 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
523 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
526 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
528 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
530 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
533 kvm_queue_exception(vcpu
, UD_VECTOR
);
536 EXPORT_SYMBOL_GPL(kvm_require_dr
);
539 * This function will be used to read from the physical memory of the currently
540 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
541 * can read from guest physical or from the guest's guest physical memory.
543 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
544 gfn_t ngfn
, void *data
, int offset
, int len
,
547 struct x86_exception exception
;
551 ngpa
= gfn_to_gpa(ngfn
);
552 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
553 if (real_gfn
== UNMAPPED_GVA
)
556 real_gfn
= gpa_to_gfn(real_gfn
);
558 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
560 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
562 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
563 void *data
, int offset
, int len
, u32 access
)
565 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
566 data
, offset
, len
, access
);
570 * Load the pae pdptrs. Return true is they are all valid.
572 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
574 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
575 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
578 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
580 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
581 offset
* sizeof(u64
), sizeof(pdpte
),
582 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
587 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
588 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
590 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
597 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
598 __set_bit(VCPU_EXREG_PDPTR
,
599 (unsigned long *)&vcpu
->arch
.regs_avail
);
600 __set_bit(VCPU_EXREG_PDPTR
,
601 (unsigned long *)&vcpu
->arch
.regs_dirty
);
606 EXPORT_SYMBOL_GPL(load_pdptrs
);
608 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
610 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
616 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
619 if (!test_bit(VCPU_EXREG_PDPTR
,
620 (unsigned long *)&vcpu
->arch
.regs_avail
))
623 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
624 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
625 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
626 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
629 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
634 EXPORT_SYMBOL_GPL(pdptrs_changed
);
636 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
638 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
639 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
644 if (cr0
& 0xffffffff00000000UL
)
648 cr0
&= ~CR0_RESERVED_BITS
;
650 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
653 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
656 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
658 if ((vcpu
->arch
.efer
& EFER_LME
)) {
663 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
668 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
673 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
676 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
678 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
679 kvm_clear_async_pf_completion_queue(vcpu
);
680 kvm_async_pf_hash_reset(vcpu
);
683 if ((cr0
^ old_cr0
) & update_bits
)
684 kvm_mmu_reset_context(vcpu
);
686 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
687 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
688 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
689 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
693 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
695 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
697 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
699 EXPORT_SYMBOL_GPL(kvm_lmsw
);
701 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
703 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
704 !vcpu
->guest_xcr0_loaded
) {
705 /* kvm_set_xcr() also depends on this */
706 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
707 vcpu
->guest_xcr0_loaded
= 1;
711 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
713 if (vcpu
->guest_xcr0_loaded
) {
714 if (vcpu
->arch
.xcr0
!= host_xcr0
)
715 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
716 vcpu
->guest_xcr0_loaded
= 0;
720 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
723 u64 old_xcr0
= vcpu
->arch
.xcr0
;
726 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
727 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
729 if (!(xcr0
& XFEATURE_MASK_FP
))
731 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
735 * Do not allow the guest to set bits that we do not support
736 * saving. However, xcr0 bit 0 is always set, even if the
737 * emulated CPU does not support XSAVE (see fx_init).
739 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
740 if (xcr0
& ~valid_bits
)
743 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
744 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
747 if (xcr0
& XFEATURE_MASK_AVX512
) {
748 if (!(xcr0
& XFEATURE_MASK_YMM
))
750 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
753 vcpu
->arch
.xcr0
= xcr0
;
755 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
756 kvm_update_cpuid(vcpu
);
760 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
762 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
763 __kvm_set_xcr(vcpu
, index
, xcr
)) {
764 kvm_inject_gp(vcpu
, 0);
769 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
771 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
773 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
774 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
775 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
777 if (cr4
& CR4_RESERVED_BITS
)
780 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
783 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
786 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
789 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
792 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
795 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
798 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
801 if (is_long_mode(vcpu
)) {
802 if (!(cr4
& X86_CR4_PAE
))
804 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
805 && ((cr4
^ old_cr4
) & pdptr_bits
)
806 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
810 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
811 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
814 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
815 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
819 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
822 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
823 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
824 kvm_mmu_reset_context(vcpu
);
826 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
827 kvm_update_cpuid(vcpu
);
831 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
833 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
836 cr3
&= ~CR3_PCID_INVD
;
839 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
840 kvm_mmu_sync_roots(vcpu
);
841 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
845 if (is_long_mode(vcpu
) &&
846 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 63)))
848 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
849 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
852 vcpu
->arch
.cr3
= cr3
;
853 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
854 kvm_mmu_new_cr3(vcpu
);
857 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
859 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
861 if (cr8
& CR8_RESERVED_BITS
)
863 if (lapic_in_kernel(vcpu
))
864 kvm_lapic_set_tpr(vcpu
, cr8
);
866 vcpu
->arch
.cr8
= cr8
;
869 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
871 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
873 if (lapic_in_kernel(vcpu
))
874 return kvm_lapic_get_cr8(vcpu
);
876 return vcpu
->arch
.cr8
;
878 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
880 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
884 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
885 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
886 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
887 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
891 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
893 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
894 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
897 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
901 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
902 dr7
= vcpu
->arch
.guest_debug_dr7
;
904 dr7
= vcpu
->arch
.dr7
;
905 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
906 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
907 if (dr7
& DR7_BP_EN_MASK
)
908 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
911 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
913 u64 fixed
= DR6_FIXED_1
;
915 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
920 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
924 vcpu
->arch
.db
[dr
] = val
;
925 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
926 vcpu
->arch
.eff_db
[dr
] = val
;
931 if (val
& 0xffffffff00000000ULL
)
933 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
934 kvm_update_dr6(vcpu
);
939 if (val
& 0xffffffff00000000ULL
)
941 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
942 kvm_update_dr7(vcpu
);
949 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
951 if (__kvm_set_dr(vcpu
, dr
, val
)) {
952 kvm_inject_gp(vcpu
, 0);
957 EXPORT_SYMBOL_GPL(kvm_set_dr
);
959 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
963 *val
= vcpu
->arch
.db
[dr
];
968 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
969 *val
= vcpu
->arch
.dr6
;
971 *val
= kvm_x86_ops
->get_dr6(vcpu
);
976 *val
= vcpu
->arch
.dr7
;
981 EXPORT_SYMBOL_GPL(kvm_get_dr
);
983 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
985 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
989 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
992 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
993 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
996 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
999 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1000 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1002 * This list is modified at module load time to reflect the
1003 * capabilities of the host cpu. This capabilities test skips MSRs that are
1004 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1005 * may depend on host virtualization features rather than host cpu features.
1008 static u32 msrs_to_save
[] = {
1009 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1011 #ifdef CONFIG_X86_64
1012 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1014 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1015 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1016 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1019 static unsigned num_msrs_to_save
;
1021 static u32 emulated_msrs
[] = {
1022 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1023 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1024 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1025 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1026 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1027 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1028 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1030 HV_X64_MSR_VP_INDEX
,
1031 HV_X64_MSR_VP_RUNTIME
,
1032 HV_X64_MSR_SCONTROL
,
1033 HV_X64_MSR_STIMER0_CONFIG
,
1034 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1037 MSR_IA32_TSC_ADJUST
,
1038 MSR_IA32_TSCDEADLINE
,
1039 MSR_IA32_MISC_ENABLE
,
1040 MSR_IA32_MCG_STATUS
,
1042 MSR_IA32_MCG_EXT_CTL
,
1045 MSR_MISC_FEATURES_ENABLES
,
1046 MSR_AMD64_VIRT_SPEC_CTRL
,
1049 static unsigned num_emulated_msrs
;
1052 * List of msr numbers which are used to expose MSR-based features that
1053 * can be used by a hypervisor to validate requested CPU features.
1055 static u32 msr_based_features
[] = {
1056 MSR_IA32_ARCH_CAPABILITIES
,
1059 static unsigned int num_msr_based_features
;
1061 u64
kvm_get_arch_capabilities(void)
1065 rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES
, &data
);
1068 * If we're doing cache flushes (either "always" or "cond")
1069 * we will do one whenever the guest does a vmlaunch/vmresume.
1070 * If an outer hypervisor is doing the cache flush for us
1071 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1072 * capability to the guest too, and if EPT is disabled we're not
1073 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1074 * require a nested hypervisor to do a flush of its own.
1076 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1077 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1081 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities
);
1083 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1085 switch (msr
->index
) {
1086 case MSR_IA32_ARCH_CAPABILITIES
:
1087 msr
->data
= kvm_get_arch_capabilities();
1090 if (kvm_x86_ops
->get_msr_feature(msr
))
1096 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1098 struct kvm_msr_entry msr
;
1102 r
= kvm_get_msr_feature(&msr
);
1111 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1113 if (efer
& efer_reserved_bits
)
1116 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1119 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1124 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1126 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1128 u64 old_efer
= vcpu
->arch
.efer
;
1130 if (!kvm_valid_efer(vcpu
, efer
))
1134 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1138 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1140 kvm_x86_ops
->set_efer(vcpu
, efer
);
1142 /* Update reserved bits */
1143 if ((efer
^ old_efer
) & EFER_NX
)
1144 kvm_mmu_reset_context(vcpu
);
1149 void kvm_enable_efer_bits(u64 mask
)
1151 efer_reserved_bits
&= ~mask
;
1153 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1156 * Writes msr value into into the appropriate "register".
1157 * Returns 0 on success, non-0 otherwise.
1158 * Assumes vcpu_load() was already called.
1160 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1162 switch (msr
->index
) {
1165 case MSR_KERNEL_GS_BASE
:
1168 if (is_noncanonical_address(msr
->data
, vcpu
))
1171 case MSR_IA32_SYSENTER_EIP
:
1172 case MSR_IA32_SYSENTER_ESP
:
1174 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1175 * non-canonical address is written on Intel but not on
1176 * AMD (which ignores the top 32-bits, because it does
1177 * not implement 64-bit SYSENTER).
1179 * 64-bit code should hence be able to write a non-canonical
1180 * value on AMD. Making the address canonical ensures that
1181 * vmentry does not fail on Intel after writing a non-canonical
1182 * value, and that something deterministic happens if the guest
1183 * invokes 64-bit SYSENTER.
1185 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1187 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1189 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1192 * Adapt set_msr() to msr_io()'s calling convention
1194 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1196 struct msr_data msr
;
1200 msr
.host_initiated
= true;
1201 r
= kvm_get_msr(vcpu
, &msr
);
1209 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1211 struct msr_data msr
;
1215 msr
.host_initiated
= true;
1216 return kvm_set_msr(vcpu
, &msr
);
1219 #ifdef CONFIG_X86_64
1220 struct pvclock_gtod_data
{
1223 struct { /* extract of a clocksource struct */
1236 static struct pvclock_gtod_data pvclock_gtod_data
;
1238 static void update_pvclock_gtod(struct timekeeper
*tk
)
1240 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1243 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1245 write_seqcount_begin(&vdata
->seq
);
1247 /* copy pvclock gtod data */
1248 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1249 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1250 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1251 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1252 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1254 vdata
->boot_ns
= boot_ns
;
1255 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1257 vdata
->wall_time_sec
= tk
->xtime_sec
;
1259 write_seqcount_end(&vdata
->seq
);
1263 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1266 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1267 * vcpu_enter_guest. This function is only called from
1268 * the physical CPU that is running vcpu.
1270 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1273 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1277 struct pvclock_wall_clock wc
;
1278 struct timespec64 boot
;
1283 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1288 ++version
; /* first time write, random junk */
1292 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1296 * The guest calculates current wall clock time by adding
1297 * system time (updated by kvm_guest_time_update below) to the
1298 * wall clock specified here. guest system time equals host
1299 * system time for us, thus we must fill in host boot time here.
1301 getboottime64(&boot
);
1303 if (kvm
->arch
.kvmclock_offset
) {
1304 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1305 boot
= timespec64_sub(boot
, ts
);
1307 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1308 wc
.nsec
= boot
.tv_nsec
;
1309 wc
.version
= version
;
1311 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1314 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1317 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1319 do_shl32_div32(dividend
, divisor
);
1323 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1324 s8
*pshift
, u32
*pmultiplier
)
1332 scaled64
= scaled_hz
;
1333 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1338 tps32
= (uint32_t)tps64
;
1339 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1340 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1348 *pmultiplier
= div_frac(scaled64
, tps32
);
1350 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1351 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1354 #ifdef CONFIG_X86_64
1355 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1358 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1359 static unsigned long max_tsc_khz
;
1361 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1363 u64 v
= (u64
)khz
* (1000000 + ppm
);
1368 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1372 /* Guest TSC same frequency as host TSC? */
1374 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1378 /* TSC scaling supported? */
1379 if (!kvm_has_tsc_control
) {
1380 if (user_tsc_khz
> tsc_khz
) {
1381 vcpu
->arch
.tsc_catchup
= 1;
1382 vcpu
->arch
.tsc_always_catchup
= 1;
1385 WARN(1, "user requested TSC rate below hardware speed\n");
1390 /* TSC scaling required - calculate ratio */
1391 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1392 user_tsc_khz
, tsc_khz
);
1394 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1395 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1400 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1404 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1406 u32 thresh_lo
, thresh_hi
;
1407 int use_scaling
= 0;
1409 /* tsc_khz can be zero if TSC calibration fails */
1410 if (user_tsc_khz
== 0) {
1411 /* set tsc_scaling_ratio to a safe value */
1412 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1416 /* Compute a scale to convert nanoseconds in TSC cycles */
1417 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1418 &vcpu
->arch
.virtual_tsc_shift
,
1419 &vcpu
->arch
.virtual_tsc_mult
);
1420 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1423 * Compute the variation in TSC rate which is acceptable
1424 * within the range of tolerance and decide if the
1425 * rate being applied is within that bounds of the hardware
1426 * rate. If so, no scaling or compensation need be done.
1428 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1429 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1430 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1431 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1434 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1437 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1439 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1440 vcpu
->arch
.virtual_tsc_mult
,
1441 vcpu
->arch
.virtual_tsc_shift
);
1442 tsc
+= vcpu
->arch
.this_tsc_write
;
1446 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1448 #ifdef CONFIG_X86_64
1450 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1451 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1453 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1454 atomic_read(&vcpu
->kvm
->online_vcpus
));
1457 * Once the masterclock is enabled, always perform request in
1458 * order to update it.
1460 * In order to enable masterclock, the host clocksource must be TSC
1461 * and the vcpus need to have matched TSCs. When that happens,
1462 * perform request to enable masterclock.
1464 if (ka
->use_master_clock
||
1465 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1466 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1468 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1469 atomic_read(&vcpu
->kvm
->online_vcpus
),
1470 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1474 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1476 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1477 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1481 * Multiply tsc by a fixed point number represented by ratio.
1483 * The most significant 64-N bits (mult) of ratio represent the
1484 * integral part of the fixed point number; the remaining N bits
1485 * (frac) represent the fractional part, ie. ratio represents a fixed
1486 * point number (mult + frac * 2^(-N)).
1488 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1490 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1492 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1495 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1498 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1500 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1501 _tsc
= __scale_tsc(ratio
, tsc
);
1505 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1507 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1511 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1513 return target_tsc
- tsc
;
1516 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1518 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1520 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1522 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1524 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1525 vcpu
->arch
.tsc_offset
= offset
;
1528 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1530 struct kvm
*kvm
= vcpu
->kvm
;
1531 u64 offset
, ns
, elapsed
;
1532 unsigned long flags
;
1534 bool already_matched
;
1535 u64 data
= msr
->data
;
1536 bool synchronizing
= false;
1538 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1539 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1540 ns
= ktime_get_boot_ns();
1541 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1543 if (vcpu
->arch
.virtual_tsc_khz
) {
1544 if (data
== 0 && msr
->host_initiated
) {
1546 * detection of vcpu initialization -- need to sync
1547 * with other vCPUs. This particularly helps to keep
1548 * kvm_clock stable after CPU hotplug
1550 synchronizing
= true;
1552 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1553 nsec_to_cycles(vcpu
, elapsed
);
1554 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1556 * Special case: TSC write with a small delta (1 second)
1557 * of virtual cycle time against real time is
1558 * interpreted as an attempt to synchronize the CPU.
1560 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1561 data
+ tsc_hz
> tsc_exp
;
1566 * For a reliable TSC, we can match TSC offsets, and for an unstable
1567 * TSC, we add elapsed time in this computation. We could let the
1568 * compensation code attempt to catch up if we fall behind, but
1569 * it's better to try to match offsets from the beginning.
1571 if (synchronizing
&&
1572 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1573 if (!check_tsc_unstable()) {
1574 offset
= kvm
->arch
.cur_tsc_offset
;
1575 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1577 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1579 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1580 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1583 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1586 * We split periods of matched TSC writes into generations.
1587 * For each generation, we track the original measured
1588 * nanosecond time, offset, and write, so if TSCs are in
1589 * sync, we can match exact offset, and if not, we can match
1590 * exact software computation in compute_guest_tsc()
1592 * These values are tracked in kvm->arch.cur_xxx variables.
1594 kvm
->arch
.cur_tsc_generation
++;
1595 kvm
->arch
.cur_tsc_nsec
= ns
;
1596 kvm
->arch
.cur_tsc_write
= data
;
1597 kvm
->arch
.cur_tsc_offset
= offset
;
1599 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1600 kvm
->arch
.cur_tsc_generation
, data
);
1604 * We also track th most recent recorded KHZ, write and time to
1605 * allow the matching interval to be extended at each write.
1607 kvm
->arch
.last_tsc_nsec
= ns
;
1608 kvm
->arch
.last_tsc_write
= data
;
1609 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1611 vcpu
->arch
.last_guest_tsc
= data
;
1613 /* Keep track of which generation this VCPU has synchronized to */
1614 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1615 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1616 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1618 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1619 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1621 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1622 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1624 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1626 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1627 } else if (!already_matched
) {
1628 kvm
->arch
.nr_vcpus_matched_tsc
++;
1631 kvm_track_tsc_matching(vcpu
);
1632 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1635 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1637 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1640 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1643 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1645 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1646 WARN_ON(adjustment
< 0);
1647 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1648 adjust_tsc_offset_guest(vcpu
, adjustment
);
1651 #ifdef CONFIG_X86_64
1653 static u64
read_tsc(void)
1655 u64 ret
= (u64
)rdtsc_ordered();
1656 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1658 if (likely(ret
>= last
))
1662 * GCC likes to generate cmov here, but this branch is extremely
1663 * predictable (it's just a function of time and the likely is
1664 * very likely) and there's a data dependence, so force GCC
1665 * to generate a branch instead. I don't barrier() because
1666 * we don't actually need a barrier, and if this function
1667 * ever gets inlined it will generate worse code.
1673 static inline u64
vgettsc(u64
*cycle_now
)
1676 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1678 *cycle_now
= read_tsc();
1680 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1681 return v
* gtod
->clock
.mult
;
1684 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1686 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1692 seq
= read_seqcount_begin(>od
->seq
);
1693 mode
= gtod
->clock
.vclock_mode
;
1694 ns
= gtod
->nsec_base
;
1695 ns
+= vgettsc(cycle_now
);
1696 ns
>>= gtod
->clock
.shift
;
1697 ns
+= gtod
->boot_ns
;
1698 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1704 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1706 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1712 seq
= read_seqcount_begin(>od
->seq
);
1713 mode
= gtod
->clock
.vclock_mode
;
1714 ts
->tv_sec
= gtod
->wall_time_sec
;
1715 ns
= gtod
->nsec_base
;
1716 ns
+= vgettsc(cycle_now
);
1717 ns
>>= gtod
->clock
.shift
;
1718 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1720 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1726 /* returns true if host is using tsc clocksource */
1727 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1729 /* checked again under seqlock below */
1730 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1733 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1736 /* returns true if host is using tsc clocksource */
1737 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1740 /* checked again under seqlock below */
1741 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1744 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1750 * Assuming a stable TSC across physical CPUS, and a stable TSC
1751 * across virtual CPUs, the following condition is possible.
1752 * Each numbered line represents an event visible to both
1753 * CPUs at the next numbered event.
1755 * "timespecX" represents host monotonic time. "tscX" represents
1758 * VCPU0 on CPU0 | VCPU1 on CPU1
1760 * 1. read timespec0,tsc0
1761 * 2. | timespec1 = timespec0 + N
1763 * 3. transition to guest | transition to guest
1764 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1765 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1766 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1768 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1771 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1773 * - 0 < N - M => M < N
1775 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1776 * always the case (the difference between two distinct xtime instances
1777 * might be smaller then the difference between corresponding TSC reads,
1778 * when updating guest vcpus pvclock areas).
1780 * To avoid that problem, do not allow visibility of distinct
1781 * system_timestamp/tsc_timestamp values simultaneously: use a master
1782 * copy of host monotonic time values. Update that master copy
1785 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1789 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1791 #ifdef CONFIG_X86_64
1792 struct kvm_arch
*ka
= &kvm
->arch
;
1794 bool host_tsc_clocksource
, vcpus_matched
;
1796 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1797 atomic_read(&kvm
->online_vcpus
));
1800 * If the host uses TSC clock, then passthrough TSC as stable
1803 host_tsc_clocksource
= kvm_get_time_and_clockread(
1804 &ka
->master_kernel_ns
,
1805 &ka
->master_cycle_now
);
1807 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1808 && !ka
->backwards_tsc_observed
1809 && !ka
->boot_vcpu_runs_old_kvmclock
;
1811 if (ka
->use_master_clock
)
1812 atomic_set(&kvm_guest_has_master_clock
, 1);
1814 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1815 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1820 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1822 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1825 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1827 #ifdef CONFIG_X86_64
1829 struct kvm_vcpu
*vcpu
;
1830 struct kvm_arch
*ka
= &kvm
->arch
;
1832 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1833 kvm_make_mclock_inprogress_request(kvm
);
1834 /* no guest entries from this point */
1835 pvclock_update_vm_gtod_copy(kvm
);
1837 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1838 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1840 /* guest entries allowed */
1841 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1842 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1844 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1848 u64
get_kvmclock_ns(struct kvm
*kvm
)
1850 struct kvm_arch
*ka
= &kvm
->arch
;
1851 struct pvclock_vcpu_time_info hv_clock
;
1854 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1855 if (!ka
->use_master_clock
) {
1856 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1857 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1860 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1861 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1862 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1864 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1867 if (__this_cpu_read(cpu_tsc_khz
)) {
1868 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1869 &hv_clock
.tsc_shift
,
1870 &hv_clock
.tsc_to_system_mul
);
1871 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1873 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1880 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1882 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1883 struct pvclock_vcpu_time_info guest_hv_clock
;
1885 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1886 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1889 /* This VCPU is paused, but it's legal for a guest to read another
1890 * VCPU's kvmclock, so we really have to follow the specification where
1891 * it says that version is odd if data is being modified, and even after
1894 * Version field updates must be kept separate. This is because
1895 * kvm_write_guest_cached might use a "rep movs" instruction, and
1896 * writes within a string instruction are weakly ordered. So there
1897 * are three writes overall.
1899 * As a small optimization, only write the version field in the first
1900 * and third write. The vcpu->pv_time cache is still valid, because the
1901 * version field is the first in the struct.
1903 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1905 if (guest_hv_clock
.version
& 1)
1906 ++guest_hv_clock
.version
; /* first time write, random junk */
1908 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1909 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1911 sizeof(vcpu
->hv_clock
.version
));
1915 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1916 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1918 if (vcpu
->pvclock_set_guest_stopped_request
) {
1919 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1920 vcpu
->pvclock_set_guest_stopped_request
= false;
1923 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1925 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1927 sizeof(vcpu
->hv_clock
));
1931 vcpu
->hv_clock
.version
++;
1932 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1934 sizeof(vcpu
->hv_clock
.version
));
1937 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1939 unsigned long flags
, tgt_tsc_khz
;
1940 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1941 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1943 u64 tsc_timestamp
, host_tsc
;
1945 bool use_master_clock
;
1951 * If the host uses TSC clock, then passthrough TSC as stable
1954 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1955 use_master_clock
= ka
->use_master_clock
;
1956 if (use_master_clock
) {
1957 host_tsc
= ka
->master_cycle_now
;
1958 kernel_ns
= ka
->master_kernel_ns
;
1960 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1962 /* Keep irq disabled to prevent changes to the clock */
1963 local_irq_save(flags
);
1964 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1965 if (unlikely(tgt_tsc_khz
== 0)) {
1966 local_irq_restore(flags
);
1967 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1970 if (!use_master_clock
) {
1972 kernel_ns
= ktime_get_boot_ns();
1975 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1978 * We may have to catch up the TSC to match elapsed wall clock
1979 * time for two reasons, even if kvmclock is used.
1980 * 1) CPU could have been running below the maximum TSC rate
1981 * 2) Broken TSC compensation resets the base at each VCPU
1982 * entry to avoid unknown leaps of TSC even when running
1983 * again on the same CPU. This may cause apparent elapsed
1984 * time to disappear, and the guest to stand still or run
1987 if (vcpu
->tsc_catchup
) {
1988 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1989 if (tsc
> tsc_timestamp
) {
1990 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1991 tsc_timestamp
= tsc
;
1995 local_irq_restore(flags
);
1997 /* With all the info we got, fill in the values */
1999 if (kvm_has_tsc_control
)
2000 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2002 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2003 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2004 &vcpu
->hv_clock
.tsc_shift
,
2005 &vcpu
->hv_clock
.tsc_to_system_mul
);
2006 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2009 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2010 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2011 vcpu
->last_guest_tsc
= tsc_timestamp
;
2013 /* If the host uses TSC clocksource, then it is stable */
2015 if (use_master_clock
)
2016 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2018 vcpu
->hv_clock
.flags
= pvclock_flags
;
2020 if (vcpu
->pv_time_enabled
)
2021 kvm_setup_pvclock_page(v
);
2022 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2023 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2028 * kvmclock updates which are isolated to a given vcpu, such as
2029 * vcpu->cpu migration, should not allow system_timestamp from
2030 * the rest of the vcpus to remain static. Otherwise ntp frequency
2031 * correction applies to one vcpu's system_timestamp but not
2034 * So in those cases, request a kvmclock update for all vcpus.
2035 * We need to rate-limit these requests though, as they can
2036 * considerably slow guests that have a large number of vcpus.
2037 * The time for a remote vcpu to update its kvmclock is bound
2038 * by the delay we use to rate-limit the updates.
2041 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2043 static void kvmclock_update_fn(struct work_struct
*work
)
2046 struct delayed_work
*dwork
= to_delayed_work(work
);
2047 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2048 kvmclock_update_work
);
2049 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2050 struct kvm_vcpu
*vcpu
;
2052 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2053 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2054 kvm_vcpu_kick(vcpu
);
2058 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2060 struct kvm
*kvm
= v
->kvm
;
2062 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2063 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2064 KVMCLOCK_UPDATE_DELAY
);
2067 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2069 static void kvmclock_sync_fn(struct work_struct
*work
)
2071 struct delayed_work
*dwork
= to_delayed_work(work
);
2072 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2073 kvmclock_sync_work
);
2074 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2076 if (!kvmclock_periodic_sync
)
2079 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2080 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2081 KVMCLOCK_SYNC_PERIOD
);
2084 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2086 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2087 unsigned bank_num
= mcg_cap
& 0xff;
2088 u32 msr
= msr_info
->index
;
2089 u64 data
= msr_info
->data
;
2092 case MSR_IA32_MCG_STATUS
:
2093 vcpu
->arch
.mcg_status
= data
;
2095 case MSR_IA32_MCG_CTL
:
2096 if (!(mcg_cap
& MCG_CTL_P
))
2098 if (data
!= 0 && data
!= ~(u64
)0)
2100 vcpu
->arch
.mcg_ctl
= data
;
2103 if (msr
>= MSR_IA32_MC0_CTL
&&
2104 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2105 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2106 /* only 0 or all 1s can be written to IA32_MCi_CTL
2107 * some Linux kernels though clear bit 10 in bank 4 to
2108 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2109 * this to avoid an uncatched #GP in the guest
2111 if ((offset
& 0x3) == 0 &&
2112 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2114 if (!msr_info
->host_initiated
&&
2115 (offset
& 0x3) == 1 && data
!= 0)
2117 vcpu
->arch
.mce_banks
[offset
] = data
;
2125 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2127 struct kvm
*kvm
= vcpu
->kvm
;
2128 int lm
= is_long_mode(vcpu
);
2129 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2130 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2131 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2132 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2133 u32 page_num
= data
& ~PAGE_MASK
;
2134 u64 page_addr
= data
& PAGE_MASK
;
2139 if (page_num
>= blob_size
)
2142 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2147 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2156 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2158 gpa_t gpa
= data
& ~0x3f;
2160 /* Bits 3:5 are reserved, Should be zero */
2164 vcpu
->arch
.apf
.msr_val
= data
;
2166 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2167 kvm_clear_async_pf_completion_queue(vcpu
);
2168 kvm_async_pf_hash_reset(vcpu
);
2172 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2176 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2177 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2178 kvm_async_pf_wakeup_all(vcpu
);
2182 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2184 vcpu
->arch
.pv_time_enabled
= false;
2187 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2189 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2192 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2193 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2196 vcpu
->arch
.st
.steal
.preempted
= 0;
2198 if (vcpu
->arch
.st
.steal
.version
& 1)
2199 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2201 vcpu
->arch
.st
.steal
.version
+= 1;
2203 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2204 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2208 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2209 vcpu
->arch
.st
.last_steal
;
2210 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2212 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2213 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2217 vcpu
->arch
.st
.steal
.version
+= 1;
2219 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2220 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2223 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2226 u32 msr
= msr_info
->index
;
2227 u64 data
= msr_info
->data
;
2230 case MSR_AMD64_NB_CFG
:
2231 case MSR_IA32_UCODE_REV
:
2232 case MSR_IA32_UCODE_WRITE
:
2233 case MSR_VM_HSAVE_PA
:
2234 case MSR_AMD64_PATCH_LOADER
:
2235 case MSR_AMD64_BU_CFG2
:
2236 case MSR_AMD64_DC_CFG
:
2240 return set_efer(vcpu
, data
);
2242 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2243 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2244 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2245 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2247 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2252 case MSR_FAM10H_MMIO_CONF_BASE
:
2254 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2259 case MSR_IA32_DEBUGCTLMSR
:
2261 /* We support the non-activated case already */
2263 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2264 /* Values other than LBR and BTF are vendor-specific,
2265 thus reserved and should throw a #GP */
2268 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2271 case 0x200 ... 0x2ff:
2272 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2273 case MSR_IA32_APICBASE
:
2274 return kvm_set_apic_base(vcpu
, msr_info
);
2275 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2276 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2277 case MSR_IA32_TSCDEADLINE
:
2278 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2280 case MSR_IA32_TSC_ADJUST
:
2281 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2282 if (!msr_info
->host_initiated
) {
2283 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2284 adjust_tsc_offset_guest(vcpu
, adj
);
2286 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2289 case MSR_IA32_MISC_ENABLE
:
2290 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2292 case MSR_IA32_SMBASE
:
2293 if (!msr_info
->host_initiated
)
2295 vcpu
->arch
.smbase
= data
;
2297 case MSR_KVM_WALL_CLOCK_NEW
:
2298 case MSR_KVM_WALL_CLOCK
:
2299 vcpu
->kvm
->arch
.wall_clock
= data
;
2300 kvm_write_wall_clock(vcpu
->kvm
, data
);
2302 case MSR_KVM_SYSTEM_TIME_NEW
:
2303 case MSR_KVM_SYSTEM_TIME
: {
2304 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2306 kvmclock_reset(vcpu
);
2308 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2309 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2311 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2312 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2314 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2317 vcpu
->arch
.time
= data
;
2318 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2320 /* we verify if the enable bit is set... */
2324 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2325 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2326 sizeof(struct pvclock_vcpu_time_info
)))
2327 vcpu
->arch
.pv_time_enabled
= false;
2329 vcpu
->arch
.pv_time_enabled
= true;
2333 case MSR_KVM_ASYNC_PF_EN
:
2334 if (kvm_pv_enable_async_pf(vcpu
, data
))
2337 case MSR_KVM_STEAL_TIME
:
2339 if (unlikely(!sched_info_on()))
2342 if (data
& KVM_STEAL_RESERVED_MASK
)
2345 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2346 data
& KVM_STEAL_VALID_BITS
,
2347 sizeof(struct kvm_steal_time
)))
2350 vcpu
->arch
.st
.msr_val
= data
;
2352 if (!(data
& KVM_MSR_ENABLED
))
2355 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2358 case MSR_KVM_PV_EOI_EN
:
2359 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2363 case MSR_IA32_MCG_CTL
:
2364 case MSR_IA32_MCG_STATUS
:
2365 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2366 return set_msr_mce(vcpu
, msr_info
);
2368 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2369 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2370 pr
= true; /* fall through */
2371 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2372 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2373 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2374 return kvm_pmu_set_msr(vcpu
, msr_info
);
2376 if (pr
|| data
!= 0)
2377 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2378 "0x%x data 0x%llx\n", msr
, data
);
2380 case MSR_K7_CLK_CTL
:
2382 * Ignore all writes to this no longer documented MSR.
2383 * Writes are only relevant for old K7 processors,
2384 * all pre-dating SVM, but a recommended workaround from
2385 * AMD for these chips. It is possible to specify the
2386 * affected processor models on the command line, hence
2387 * the need to ignore the workaround.
2390 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2391 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2392 case HV_X64_MSR_CRASH_CTL
:
2393 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2394 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2395 msr_info
->host_initiated
);
2396 case MSR_IA32_BBL_CR_CTL3
:
2397 /* Drop writes to this legacy MSR -- see rdmsr
2398 * counterpart for further detail.
2400 if (report_ignored_msrs
)
2401 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2404 case MSR_AMD64_OSVW_ID_LENGTH
:
2405 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2407 vcpu
->arch
.osvw
.length
= data
;
2409 case MSR_AMD64_OSVW_STATUS
:
2410 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2412 vcpu
->arch
.osvw
.status
= data
;
2414 case MSR_PLATFORM_INFO
:
2415 if (!msr_info
->host_initiated
||
2416 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2417 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2418 cpuid_fault_enabled(vcpu
)))
2420 vcpu
->arch
.msr_platform_info
= data
;
2422 case MSR_MISC_FEATURES_ENABLES
:
2423 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2424 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2425 !supports_cpuid_fault(vcpu
)))
2427 vcpu
->arch
.msr_misc_features_enables
= data
;
2430 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2431 return xen_hvm_config(vcpu
, data
);
2432 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2433 return kvm_pmu_set_msr(vcpu
, msr_info
);
2435 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2439 if (report_ignored_msrs
)
2441 "ignored wrmsr: 0x%x data 0x%llx\n",
2448 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2452 * Reads an msr value (of 'msr_index') into 'pdata'.
2453 * Returns 0 on success, non-0 otherwise.
2454 * Assumes vcpu_load() was already called.
2456 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2458 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2460 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2462 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2465 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2466 unsigned bank_num
= mcg_cap
& 0xff;
2469 case MSR_IA32_P5_MC_ADDR
:
2470 case MSR_IA32_P5_MC_TYPE
:
2473 case MSR_IA32_MCG_CAP
:
2474 data
= vcpu
->arch
.mcg_cap
;
2476 case MSR_IA32_MCG_CTL
:
2477 if (!(mcg_cap
& MCG_CTL_P
))
2479 data
= vcpu
->arch
.mcg_ctl
;
2481 case MSR_IA32_MCG_STATUS
:
2482 data
= vcpu
->arch
.mcg_status
;
2485 if (msr
>= MSR_IA32_MC0_CTL
&&
2486 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2487 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2488 data
= vcpu
->arch
.mce_banks
[offset
];
2497 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2499 switch (msr_info
->index
) {
2500 case MSR_IA32_PLATFORM_ID
:
2501 case MSR_IA32_EBL_CR_POWERON
:
2502 case MSR_IA32_DEBUGCTLMSR
:
2503 case MSR_IA32_LASTBRANCHFROMIP
:
2504 case MSR_IA32_LASTBRANCHTOIP
:
2505 case MSR_IA32_LASTINTFROMIP
:
2506 case MSR_IA32_LASTINTTOIP
:
2508 case MSR_K8_TSEG_ADDR
:
2509 case MSR_K8_TSEG_MASK
:
2511 case MSR_VM_HSAVE_PA
:
2512 case MSR_K8_INT_PENDING_MSG
:
2513 case MSR_AMD64_NB_CFG
:
2514 case MSR_FAM10H_MMIO_CONF_BASE
:
2515 case MSR_AMD64_BU_CFG2
:
2516 case MSR_IA32_PERF_CTL
:
2517 case MSR_AMD64_DC_CFG
:
2520 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2521 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2522 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2523 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2524 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2525 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2528 case MSR_IA32_UCODE_REV
:
2529 msr_info
->data
= 0x100000000ULL
;
2532 case 0x200 ... 0x2ff:
2533 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2534 case 0xcd: /* fsb frequency */
2538 * MSR_EBC_FREQUENCY_ID
2539 * Conservative value valid for even the basic CPU models.
2540 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2541 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2542 * and 266MHz for model 3, or 4. Set Core Clock
2543 * Frequency to System Bus Frequency Ratio to 1 (bits
2544 * 31:24) even though these are only valid for CPU
2545 * models > 2, however guests may end up dividing or
2546 * multiplying by zero otherwise.
2548 case MSR_EBC_FREQUENCY_ID
:
2549 msr_info
->data
= 1 << 24;
2551 case MSR_IA32_APICBASE
:
2552 msr_info
->data
= kvm_get_apic_base(vcpu
);
2554 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2555 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2557 case MSR_IA32_TSCDEADLINE
:
2558 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2560 case MSR_IA32_TSC_ADJUST
:
2561 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2563 case MSR_IA32_MISC_ENABLE
:
2564 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2566 case MSR_IA32_SMBASE
:
2567 if (!msr_info
->host_initiated
)
2569 msr_info
->data
= vcpu
->arch
.smbase
;
2571 case MSR_IA32_PERF_STATUS
:
2572 /* TSC increment by tick */
2573 msr_info
->data
= 1000ULL;
2574 /* CPU multiplier */
2575 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2578 msr_info
->data
= vcpu
->arch
.efer
;
2580 case MSR_KVM_WALL_CLOCK
:
2581 case MSR_KVM_WALL_CLOCK_NEW
:
2582 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2584 case MSR_KVM_SYSTEM_TIME
:
2585 case MSR_KVM_SYSTEM_TIME_NEW
:
2586 msr_info
->data
= vcpu
->arch
.time
;
2588 case MSR_KVM_ASYNC_PF_EN
:
2589 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2591 case MSR_KVM_STEAL_TIME
:
2592 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2594 case MSR_KVM_PV_EOI_EN
:
2595 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2597 case MSR_IA32_P5_MC_ADDR
:
2598 case MSR_IA32_P5_MC_TYPE
:
2599 case MSR_IA32_MCG_CAP
:
2600 case MSR_IA32_MCG_CTL
:
2601 case MSR_IA32_MCG_STATUS
:
2602 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2603 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2604 case MSR_K7_CLK_CTL
:
2606 * Provide expected ramp-up count for K7. All other
2607 * are set to zero, indicating minimum divisors for
2610 * This prevents guest kernels on AMD host with CPU
2611 * type 6, model 8 and higher from exploding due to
2612 * the rdmsr failing.
2614 msr_info
->data
= 0x20000000;
2616 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2617 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2618 case HV_X64_MSR_CRASH_CTL
:
2619 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2620 return kvm_hv_get_msr_common(vcpu
,
2621 msr_info
->index
, &msr_info
->data
);
2623 case MSR_IA32_BBL_CR_CTL3
:
2624 /* This legacy MSR exists but isn't fully documented in current
2625 * silicon. It is however accessed by winxp in very narrow
2626 * scenarios where it sets bit #19, itself documented as
2627 * a "reserved" bit. Best effort attempt to source coherent
2628 * read data here should the balance of the register be
2629 * interpreted by the guest:
2631 * L2 cache control register 3: 64GB range, 256KB size,
2632 * enabled, latency 0x1, configured
2634 msr_info
->data
= 0xbe702111;
2636 case MSR_AMD64_OSVW_ID_LENGTH
:
2637 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2639 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2641 case MSR_AMD64_OSVW_STATUS
:
2642 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2644 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2646 case MSR_PLATFORM_INFO
:
2647 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2649 case MSR_MISC_FEATURES_ENABLES
:
2650 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2653 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2654 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2656 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2660 if (report_ignored_msrs
)
2661 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2669 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2672 * Read or write a bunch of msrs. All parameters are kernel addresses.
2674 * @return number of msrs set successfully.
2676 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2677 struct kvm_msr_entry
*entries
,
2678 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2679 unsigned index
, u64
*data
))
2683 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2684 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2691 * Read or write a bunch of msrs. Parameters are user addresses.
2693 * @return number of msrs set successfully.
2695 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2696 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2697 unsigned index
, u64
*data
),
2700 struct kvm_msrs msrs
;
2701 struct kvm_msr_entry
*entries
;
2706 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2710 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2713 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2714 entries
= memdup_user(user_msrs
->entries
, size
);
2715 if (IS_ERR(entries
)) {
2716 r
= PTR_ERR(entries
);
2720 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2725 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2736 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2741 case KVM_CAP_IRQCHIP
:
2743 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2744 case KVM_CAP_SET_TSS_ADDR
:
2745 case KVM_CAP_EXT_CPUID
:
2746 case KVM_CAP_EXT_EMUL_CPUID
:
2747 case KVM_CAP_CLOCKSOURCE
:
2749 case KVM_CAP_NOP_IO_DELAY
:
2750 case KVM_CAP_MP_STATE
:
2751 case KVM_CAP_SYNC_MMU
:
2752 case KVM_CAP_USER_NMI
:
2753 case KVM_CAP_REINJECT_CONTROL
:
2754 case KVM_CAP_IRQ_INJECT_STATUS
:
2755 case KVM_CAP_IOEVENTFD
:
2756 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2758 case KVM_CAP_PIT_STATE2
:
2759 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2760 case KVM_CAP_XEN_HVM
:
2761 case KVM_CAP_VCPU_EVENTS
:
2762 case KVM_CAP_HYPERV
:
2763 case KVM_CAP_HYPERV_VAPIC
:
2764 case KVM_CAP_HYPERV_SPIN
:
2765 case KVM_CAP_HYPERV_SYNIC
:
2766 case KVM_CAP_HYPERV_SYNIC2
:
2767 case KVM_CAP_HYPERV_VP_INDEX
:
2768 case KVM_CAP_PCI_SEGMENT
:
2769 case KVM_CAP_DEBUGREGS
:
2770 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2772 case KVM_CAP_ASYNC_PF
:
2773 case KVM_CAP_GET_TSC_KHZ
:
2774 case KVM_CAP_KVMCLOCK_CTRL
:
2775 case KVM_CAP_READONLY_MEM
:
2776 case KVM_CAP_HYPERV_TIME
:
2777 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2778 case KVM_CAP_TSC_DEADLINE_TIMER
:
2779 case KVM_CAP_ENABLE_CAP_VM
:
2780 case KVM_CAP_DISABLE_QUIRKS
:
2781 case KVM_CAP_SET_BOOT_CPU_ID
:
2782 case KVM_CAP_SPLIT_IRQCHIP
:
2783 case KVM_CAP_IMMEDIATE_EXIT
:
2784 case KVM_CAP_GET_MSR_FEATURES
:
2787 case KVM_CAP_ADJUST_CLOCK
:
2788 r
= KVM_CLOCK_TSC_STABLE
;
2790 case KVM_CAP_X86_GUEST_MWAIT
:
2791 r
= kvm_mwait_in_guest();
2793 case KVM_CAP_X86_SMM
:
2794 /* SMBASE is usually relocated above 1M on modern chipsets,
2795 * and SMM handlers might indeed rely on 4G segment limits,
2796 * so do not report SMM to be available if real mode is
2797 * emulated via vm86 mode. Still, do not go to great lengths
2798 * to avoid userspace's usage of the feature, because it is a
2799 * fringe case that is not enabled except via specific settings
2800 * of the module parameters.
2802 r
= kvm_x86_ops
->has_emulated_msr(MSR_IA32_SMBASE
);
2805 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2807 case KVM_CAP_NR_VCPUS
:
2808 r
= KVM_SOFT_MAX_VCPUS
;
2810 case KVM_CAP_MAX_VCPUS
:
2813 case KVM_CAP_NR_MEMSLOTS
:
2814 r
= KVM_USER_MEM_SLOTS
;
2816 case KVM_CAP_PV_MMU
: /* obsolete */
2820 r
= KVM_MAX_MCE_BANKS
;
2823 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2825 case KVM_CAP_TSC_CONTROL
:
2826 r
= kvm_has_tsc_control
;
2828 case KVM_CAP_X2APIC_API
:
2829 r
= KVM_X2APIC_API_VALID_FLAGS
;
2839 long kvm_arch_dev_ioctl(struct file
*filp
,
2840 unsigned int ioctl
, unsigned long arg
)
2842 void __user
*argp
= (void __user
*)arg
;
2846 case KVM_GET_MSR_INDEX_LIST
: {
2847 struct kvm_msr_list __user
*user_msr_list
= argp
;
2848 struct kvm_msr_list msr_list
;
2852 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2855 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2856 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2859 if (n
< msr_list
.nmsrs
)
2862 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2863 num_msrs_to_save
* sizeof(u32
)))
2865 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2867 num_emulated_msrs
* sizeof(u32
)))
2872 case KVM_GET_SUPPORTED_CPUID
:
2873 case KVM_GET_EMULATED_CPUID
: {
2874 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2875 struct kvm_cpuid2 cpuid
;
2878 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2881 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2887 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2892 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2894 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2895 sizeof(kvm_mce_cap_supported
)))
2899 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
2900 struct kvm_msr_list __user
*user_msr_list
= argp
;
2901 struct kvm_msr_list msr_list
;
2905 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
2908 msr_list
.nmsrs
= num_msr_based_features
;
2909 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
2912 if (n
< msr_list
.nmsrs
)
2915 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
2916 num_msr_based_features
* sizeof(u32
)))
2922 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
2932 static void wbinvd_ipi(void *garbage
)
2937 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2939 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2942 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2944 /* Address WBINVD may be executed by guest */
2945 if (need_emulate_wbinvd(vcpu
)) {
2946 if (kvm_x86_ops
->has_wbinvd_exit())
2947 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2948 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2949 smp_call_function_single(vcpu
->cpu
,
2950 wbinvd_ipi
, NULL
, 1);
2953 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2955 /* Apply any externally detected TSC adjustments (due to suspend) */
2956 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2957 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2958 vcpu
->arch
.tsc_offset_adjustment
= 0;
2959 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2962 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2963 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2964 rdtsc() - vcpu
->arch
.last_host_tsc
;
2966 mark_tsc_unstable("KVM discovered backwards TSC");
2968 if (check_tsc_unstable()) {
2969 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2970 vcpu
->arch
.last_guest_tsc
);
2971 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2972 vcpu
->arch
.tsc_catchup
= 1;
2975 if (kvm_lapic_hv_timer_in_use(vcpu
))
2976 kvm_lapic_restart_hv_timer(vcpu
);
2979 * On a host with synchronized TSC, there is no need to update
2980 * kvmclock on vcpu->cpu migration
2982 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2983 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2984 if (vcpu
->cpu
!= cpu
)
2985 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2989 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2992 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2994 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2997 vcpu
->arch
.st
.steal
.preempted
= 1;
2999 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
3000 &vcpu
->arch
.st
.steal
.preempted
,
3001 offsetof(struct kvm_steal_time
, preempted
),
3002 sizeof(vcpu
->arch
.st
.steal
.preempted
));
3005 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3009 if (vcpu
->preempted
)
3010 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
3013 * Disable page faults because we're in atomic context here.
3014 * kvm_write_guest_offset_cached() would call might_fault()
3015 * that relies on pagefault_disable() to tell if there's a
3016 * bug. NOTE: the write to guest memory may not go through if
3017 * during postcopy live migration or if there's heavy guest
3020 pagefault_disable();
3022 * kvm_memslots() will be called by
3023 * kvm_write_guest_offset_cached() so take the srcu lock.
3025 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3026 kvm_steal_time_set_preempted(vcpu
);
3027 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3029 kvm_x86_ops
->vcpu_put(vcpu
);
3030 vcpu
->arch
.last_host_tsc
= rdtsc();
3032 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3033 * on every vmexit, but if not, we might have a stale dr6 from the
3034 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3039 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3040 struct kvm_lapic_state
*s
)
3042 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
3043 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3045 return kvm_apic_get_state(vcpu
, s
);
3048 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3049 struct kvm_lapic_state
*s
)
3053 r
= kvm_apic_set_state(vcpu
, s
);
3056 update_cr8_intercept(vcpu
);
3061 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3063 return (!lapic_in_kernel(vcpu
) ||
3064 kvm_apic_accept_pic_intr(vcpu
));
3068 * if userspace requested an interrupt window, check that the
3069 * interrupt window is open.
3071 * No need to exit to userspace if we already have an interrupt queued.
3073 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3075 return kvm_arch_interrupt_allowed(vcpu
) &&
3076 !kvm_cpu_has_interrupt(vcpu
) &&
3077 !kvm_event_needs_reinjection(vcpu
) &&
3078 kvm_cpu_accept_dm_intr(vcpu
);
3081 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3082 struct kvm_interrupt
*irq
)
3084 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3087 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3088 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3089 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3094 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3095 * fail for in-kernel 8259.
3097 if (pic_in_kernel(vcpu
->kvm
))
3100 if (vcpu
->arch
.pending_external_vector
!= -1)
3103 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3104 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3108 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3110 kvm_inject_nmi(vcpu
);
3115 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3117 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3122 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3123 struct kvm_tpr_access_ctl
*tac
)
3127 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3131 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3135 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3138 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3140 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3143 vcpu
->arch
.mcg_cap
= mcg_cap
;
3144 /* Init IA32_MCG_CTL to all 1s */
3145 if (mcg_cap
& MCG_CTL_P
)
3146 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3147 /* Init IA32_MCi_CTL to all 1s */
3148 for (bank
= 0; bank
< bank_num
; bank
++)
3149 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3151 if (kvm_x86_ops
->setup_mce
)
3152 kvm_x86_ops
->setup_mce(vcpu
);
3157 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3158 struct kvm_x86_mce
*mce
)
3160 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3161 unsigned bank_num
= mcg_cap
& 0xff;
3162 u64
*banks
= vcpu
->arch
.mce_banks
;
3164 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3167 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3168 * reporting is disabled
3170 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3171 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3173 banks
+= 4 * mce
->bank
;
3175 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3176 * reporting is disabled for the bank
3178 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3180 if (mce
->status
& MCI_STATUS_UC
) {
3181 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3182 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3183 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3186 if (banks
[1] & MCI_STATUS_VAL
)
3187 mce
->status
|= MCI_STATUS_OVER
;
3188 banks
[2] = mce
->addr
;
3189 banks
[3] = mce
->misc
;
3190 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3191 banks
[1] = mce
->status
;
3192 kvm_queue_exception(vcpu
, MC_VECTOR
);
3193 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3194 || !(banks
[1] & MCI_STATUS_UC
)) {
3195 if (banks
[1] & MCI_STATUS_VAL
)
3196 mce
->status
|= MCI_STATUS_OVER
;
3197 banks
[2] = mce
->addr
;
3198 banks
[3] = mce
->misc
;
3199 banks
[1] = mce
->status
;
3201 banks
[1] |= MCI_STATUS_OVER
;
3205 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3206 struct kvm_vcpu_events
*events
)
3210 * FIXME: pass injected and pending separately. This is only
3211 * needed for nested virtualization, whose state cannot be
3212 * migrated yet. For now we can combine them.
3214 events
->exception
.injected
=
3215 (vcpu
->arch
.exception
.pending
||
3216 vcpu
->arch
.exception
.injected
) &&
3217 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3218 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3219 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3220 events
->exception
.pad
= 0;
3221 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3223 events
->interrupt
.injected
=
3224 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3225 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3226 events
->interrupt
.soft
= 0;
3227 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3229 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3230 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3231 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3232 events
->nmi
.pad
= 0;
3234 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3236 events
->smi
.smm
= is_smm(vcpu
);
3237 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3238 events
->smi
.smm_inside_nmi
=
3239 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3240 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3242 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3243 | KVM_VCPUEVENT_VALID_SHADOW
3244 | KVM_VCPUEVENT_VALID_SMM
);
3245 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3248 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3250 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3251 struct kvm_vcpu_events
*events
)
3253 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3254 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3255 | KVM_VCPUEVENT_VALID_SHADOW
3256 | KVM_VCPUEVENT_VALID_SMM
))
3259 if (events
->exception
.injected
&&
3260 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3261 is_guest_mode(vcpu
)))
3264 /* INITs are latched while in SMM */
3265 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3266 (events
->smi
.smm
|| events
->smi
.pending
) &&
3267 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3271 vcpu
->arch
.exception
.injected
= false;
3272 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3273 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3274 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3275 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3277 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3278 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3279 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3280 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3281 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3282 events
->interrupt
.shadow
);
3284 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3285 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3286 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3287 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3289 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3290 lapic_in_kernel(vcpu
))
3291 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3293 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3294 u32 hflags
= vcpu
->arch
.hflags
;
3295 if (events
->smi
.smm
)
3296 hflags
|= HF_SMM_MASK
;
3298 hflags
&= ~HF_SMM_MASK
;
3299 kvm_set_hflags(vcpu
, hflags
);
3301 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3303 if (events
->smi
.smm
) {
3304 if (events
->smi
.smm_inside_nmi
)
3305 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3307 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3308 if (lapic_in_kernel(vcpu
)) {
3309 if (events
->smi
.latched_init
)
3310 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3312 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3317 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3322 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3323 struct kvm_debugregs
*dbgregs
)
3327 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3328 kvm_get_dr(vcpu
, 6, &val
);
3330 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3332 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3335 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3336 struct kvm_debugregs
*dbgregs
)
3341 if (dbgregs
->dr6
& ~0xffffffffull
)
3343 if (dbgregs
->dr7
& ~0xffffffffull
)
3346 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3347 kvm_update_dr0123(vcpu
);
3348 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3349 kvm_update_dr6(vcpu
);
3350 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3351 kvm_update_dr7(vcpu
);
3356 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3358 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3360 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3361 u64 xstate_bv
= xsave
->header
.xfeatures
;
3365 * Copy legacy XSAVE area, to avoid complications with CPUID
3366 * leaves 0 and 1 in the loop below.
3368 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3371 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3372 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3375 * Copy each region from the possibly compacted offset to the
3376 * non-compacted offset.
3378 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3380 u64 feature
= valid
& -valid
;
3381 int index
= fls64(feature
) - 1;
3382 void *src
= get_xsave_addr(xsave
, feature
);
3385 u32 size
, offset
, ecx
, edx
;
3386 cpuid_count(XSTATE_CPUID
, index
,
3387 &size
, &offset
, &ecx
, &edx
);
3388 if (feature
== XFEATURE_MASK_PKRU
)
3389 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3390 sizeof(vcpu
->arch
.pkru
));
3392 memcpy(dest
+ offset
, src
, size
);
3400 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3402 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3403 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3407 * Copy legacy XSAVE area, to avoid complications with CPUID
3408 * leaves 0 and 1 in the loop below.
3410 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3412 /* Set XSTATE_BV and possibly XCOMP_BV. */
3413 xsave
->header
.xfeatures
= xstate_bv
;
3414 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3415 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3418 * Copy each region from the non-compacted offset to the
3419 * possibly compacted offset.
3421 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3423 u64 feature
= valid
& -valid
;
3424 int index
= fls64(feature
) - 1;
3425 void *dest
= get_xsave_addr(xsave
, feature
);
3428 u32 size
, offset
, ecx
, edx
;
3429 cpuid_count(XSTATE_CPUID
, index
,
3430 &size
, &offset
, &ecx
, &edx
);
3431 if (feature
== XFEATURE_MASK_PKRU
)
3432 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3433 sizeof(vcpu
->arch
.pkru
));
3435 memcpy(dest
, src
+ offset
, size
);
3442 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3443 struct kvm_xsave
*guest_xsave
)
3445 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3446 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3447 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3449 memcpy(guest_xsave
->region
,
3450 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3451 sizeof(struct fxregs_state
));
3452 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3453 XFEATURE_MASK_FPSSE
;
3457 #define XSAVE_MXCSR_OFFSET 24
3459 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3460 struct kvm_xsave
*guest_xsave
)
3463 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3464 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3466 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3468 * Here we allow setting states that are not present in
3469 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3470 * with old userspace.
3472 if (xstate_bv
& ~kvm_supported_xcr0() ||
3473 mxcsr
& ~mxcsr_feature_mask
)
3475 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3477 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3478 mxcsr
& ~mxcsr_feature_mask
)
3480 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3481 guest_xsave
->region
, sizeof(struct fxregs_state
));
3486 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3487 struct kvm_xcrs
*guest_xcrs
)
3489 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3490 guest_xcrs
->nr_xcrs
= 0;
3494 guest_xcrs
->nr_xcrs
= 1;
3495 guest_xcrs
->flags
= 0;
3496 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3497 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3500 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3501 struct kvm_xcrs
*guest_xcrs
)
3505 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3508 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3511 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3512 /* Only support XCR0 currently */
3513 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3514 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3515 guest_xcrs
->xcrs
[i
].value
);
3524 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3525 * stopped by the hypervisor. This function will be called from the host only.
3526 * EINVAL is returned when the host attempts to set the flag for a guest that
3527 * does not support pv clocks.
3529 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3531 if (!vcpu
->arch
.pv_time_enabled
)
3533 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3534 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3538 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3539 struct kvm_enable_cap
*cap
)
3545 case KVM_CAP_HYPERV_SYNIC2
:
3548 case KVM_CAP_HYPERV_SYNIC
:
3549 if (!irqchip_in_kernel(vcpu
->kvm
))
3551 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3552 KVM_CAP_HYPERV_SYNIC2
);
3558 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3559 unsigned int ioctl
, unsigned long arg
)
3561 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3562 void __user
*argp
= (void __user
*)arg
;
3565 struct kvm_lapic_state
*lapic
;
3566 struct kvm_xsave
*xsave
;
3567 struct kvm_xcrs
*xcrs
;
3573 case KVM_GET_LAPIC
: {
3575 if (!lapic_in_kernel(vcpu
))
3577 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3582 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3586 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3591 case KVM_SET_LAPIC
: {
3593 if (!lapic_in_kernel(vcpu
))
3595 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3596 if (IS_ERR(u
.lapic
))
3597 return PTR_ERR(u
.lapic
);
3599 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3602 case KVM_INTERRUPT
: {
3603 struct kvm_interrupt irq
;
3606 if (copy_from_user(&irq
, argp
, sizeof irq
))
3608 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3612 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3616 r
= kvm_vcpu_ioctl_smi(vcpu
);
3619 case KVM_SET_CPUID
: {
3620 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3621 struct kvm_cpuid cpuid
;
3624 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3626 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3629 case KVM_SET_CPUID2
: {
3630 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3631 struct kvm_cpuid2 cpuid
;
3634 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3636 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3637 cpuid_arg
->entries
);
3640 case KVM_GET_CPUID2
: {
3641 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3642 struct kvm_cpuid2 cpuid
;
3645 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3647 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3648 cpuid_arg
->entries
);
3652 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3657 case KVM_GET_MSRS
: {
3658 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3659 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3660 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3663 case KVM_SET_MSRS
: {
3664 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3665 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3666 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3669 case KVM_TPR_ACCESS_REPORTING
: {
3670 struct kvm_tpr_access_ctl tac
;
3673 if (copy_from_user(&tac
, argp
, sizeof tac
))
3675 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3679 if (copy_to_user(argp
, &tac
, sizeof tac
))
3684 case KVM_SET_VAPIC_ADDR
: {
3685 struct kvm_vapic_addr va
;
3689 if (!lapic_in_kernel(vcpu
))
3692 if (copy_from_user(&va
, argp
, sizeof va
))
3694 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3695 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3696 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3699 case KVM_X86_SETUP_MCE
: {
3703 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3705 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3708 case KVM_X86_SET_MCE
: {
3709 struct kvm_x86_mce mce
;
3712 if (copy_from_user(&mce
, argp
, sizeof mce
))
3714 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3717 case KVM_GET_VCPU_EVENTS
: {
3718 struct kvm_vcpu_events events
;
3720 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3723 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3728 case KVM_SET_VCPU_EVENTS
: {
3729 struct kvm_vcpu_events events
;
3732 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3735 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3738 case KVM_GET_DEBUGREGS
: {
3739 struct kvm_debugregs dbgregs
;
3741 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3744 if (copy_to_user(argp
, &dbgregs
,
3745 sizeof(struct kvm_debugregs
)))
3750 case KVM_SET_DEBUGREGS
: {
3751 struct kvm_debugregs dbgregs
;
3754 if (copy_from_user(&dbgregs
, argp
,
3755 sizeof(struct kvm_debugregs
)))
3758 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3761 case KVM_GET_XSAVE
: {
3762 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3767 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3770 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3775 case KVM_SET_XSAVE
: {
3776 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3777 if (IS_ERR(u
.xsave
))
3778 return PTR_ERR(u
.xsave
);
3780 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3783 case KVM_GET_XCRS
: {
3784 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3789 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3792 if (copy_to_user(argp
, u
.xcrs
,
3793 sizeof(struct kvm_xcrs
)))
3798 case KVM_SET_XCRS
: {
3799 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3801 return PTR_ERR(u
.xcrs
);
3803 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3806 case KVM_SET_TSC_KHZ
: {
3810 user_tsc_khz
= (u32
)arg
;
3812 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3815 if (user_tsc_khz
== 0)
3816 user_tsc_khz
= tsc_khz
;
3818 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3823 case KVM_GET_TSC_KHZ
: {
3824 r
= vcpu
->arch
.virtual_tsc_khz
;
3827 case KVM_KVMCLOCK_CTRL
: {
3828 r
= kvm_set_guest_paused(vcpu
);
3831 case KVM_ENABLE_CAP
: {
3832 struct kvm_enable_cap cap
;
3835 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3837 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3848 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3850 return VM_FAULT_SIGBUS
;
3853 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3857 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3859 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3863 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3866 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3870 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3871 u32 kvm_nr_mmu_pages
)
3873 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3876 mutex_lock(&kvm
->slots_lock
);
3878 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3879 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3881 mutex_unlock(&kvm
->slots_lock
);
3885 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3887 return kvm
->arch
.n_max_mmu_pages
;
3890 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3892 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3896 switch (chip
->chip_id
) {
3897 case KVM_IRQCHIP_PIC_MASTER
:
3898 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3899 sizeof(struct kvm_pic_state
));
3901 case KVM_IRQCHIP_PIC_SLAVE
:
3902 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3903 sizeof(struct kvm_pic_state
));
3905 case KVM_IRQCHIP_IOAPIC
:
3906 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3915 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3917 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3921 switch (chip
->chip_id
) {
3922 case KVM_IRQCHIP_PIC_MASTER
:
3923 spin_lock(&pic
->lock
);
3924 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3925 sizeof(struct kvm_pic_state
));
3926 spin_unlock(&pic
->lock
);
3928 case KVM_IRQCHIP_PIC_SLAVE
:
3929 spin_lock(&pic
->lock
);
3930 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3931 sizeof(struct kvm_pic_state
));
3932 spin_unlock(&pic
->lock
);
3934 case KVM_IRQCHIP_IOAPIC
:
3935 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3941 kvm_pic_update_irq(pic
);
3945 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3947 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3949 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3951 mutex_lock(&kps
->lock
);
3952 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3953 mutex_unlock(&kps
->lock
);
3957 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3960 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3962 mutex_lock(&pit
->pit_state
.lock
);
3963 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3964 for (i
= 0; i
< 3; i
++)
3965 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3966 mutex_unlock(&pit
->pit_state
.lock
);
3970 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3972 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3973 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3974 sizeof(ps
->channels
));
3975 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3976 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3977 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3981 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3985 u32 prev_legacy
, cur_legacy
;
3986 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3988 mutex_lock(&pit
->pit_state
.lock
);
3989 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3990 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3991 if (!prev_legacy
&& cur_legacy
)
3993 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3994 sizeof(pit
->pit_state
.channels
));
3995 pit
->pit_state
.flags
= ps
->flags
;
3996 for (i
= 0; i
< 3; i
++)
3997 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3999 mutex_unlock(&pit
->pit_state
.lock
);
4003 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
4004 struct kvm_reinject_control
*control
)
4006 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4011 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4012 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4013 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4015 mutex_lock(&pit
->pit_state
.lock
);
4016 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
4017 mutex_unlock(&pit
->pit_state
.lock
);
4023 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4024 * @kvm: kvm instance
4025 * @log: slot id and address to which we copy the log
4027 * Steps 1-4 below provide general overview of dirty page logging. See
4028 * kvm_get_dirty_log_protect() function description for additional details.
4030 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4031 * always flush the TLB (step 4) even if previous step failed and the dirty
4032 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4033 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4034 * writes will be marked dirty for next log read.
4036 * 1. Take a snapshot of the bit and clear it if needed.
4037 * 2. Write protect the corresponding page.
4038 * 3. Copy the snapshot to the userspace.
4039 * 4. Flush TLB's if needed.
4041 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
4043 bool is_dirty
= false;
4046 mutex_lock(&kvm
->slots_lock
);
4049 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4051 if (kvm_x86_ops
->flush_log_dirty
)
4052 kvm_x86_ops
->flush_log_dirty(kvm
);
4054 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
4057 * All the TLBs can be flushed out of mmu lock, see the comments in
4058 * kvm_mmu_slot_remove_write_access().
4060 lockdep_assert_held(&kvm
->slots_lock
);
4062 kvm_flush_remote_tlbs(kvm
);
4064 mutex_unlock(&kvm
->slots_lock
);
4068 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4071 if (!irqchip_in_kernel(kvm
))
4074 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4075 irq_event
->irq
, irq_event
->level
,
4080 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4081 struct kvm_enable_cap
*cap
)
4089 case KVM_CAP_DISABLE_QUIRKS
:
4090 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4093 case KVM_CAP_SPLIT_IRQCHIP
: {
4094 mutex_lock(&kvm
->lock
);
4096 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4097 goto split_irqchip_unlock
;
4099 if (irqchip_in_kernel(kvm
))
4100 goto split_irqchip_unlock
;
4101 if (kvm
->created_vcpus
)
4102 goto split_irqchip_unlock
;
4103 r
= kvm_setup_empty_irq_routing(kvm
);
4105 goto split_irqchip_unlock
;
4106 /* Pairs with irqchip_in_kernel. */
4108 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4109 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4111 split_irqchip_unlock
:
4112 mutex_unlock(&kvm
->lock
);
4115 case KVM_CAP_X2APIC_API
:
4117 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4120 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4121 kvm
->arch
.x2apic_format
= true;
4122 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4123 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4134 long kvm_arch_vm_ioctl(struct file
*filp
,
4135 unsigned int ioctl
, unsigned long arg
)
4137 struct kvm
*kvm
= filp
->private_data
;
4138 void __user
*argp
= (void __user
*)arg
;
4141 * This union makes it completely explicit to gcc-3.x
4142 * that these two variables' stack usage should be
4143 * combined, not added together.
4146 struct kvm_pit_state ps
;
4147 struct kvm_pit_state2 ps2
;
4148 struct kvm_pit_config pit_config
;
4152 case KVM_SET_TSS_ADDR
:
4153 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4155 case KVM_SET_IDENTITY_MAP_ADDR
: {
4158 mutex_lock(&kvm
->lock
);
4160 if (kvm
->created_vcpus
)
4161 goto set_identity_unlock
;
4163 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4164 goto set_identity_unlock
;
4165 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4166 set_identity_unlock
:
4167 mutex_unlock(&kvm
->lock
);
4170 case KVM_SET_NR_MMU_PAGES
:
4171 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4173 case KVM_GET_NR_MMU_PAGES
:
4174 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4176 case KVM_CREATE_IRQCHIP
: {
4177 mutex_lock(&kvm
->lock
);
4180 if (irqchip_in_kernel(kvm
))
4181 goto create_irqchip_unlock
;
4184 if (kvm
->created_vcpus
)
4185 goto create_irqchip_unlock
;
4187 r
= kvm_pic_init(kvm
);
4189 goto create_irqchip_unlock
;
4191 r
= kvm_ioapic_init(kvm
);
4193 kvm_pic_destroy(kvm
);
4194 goto create_irqchip_unlock
;
4197 r
= kvm_setup_default_irq_routing(kvm
);
4199 kvm_ioapic_destroy(kvm
);
4200 kvm_pic_destroy(kvm
);
4201 goto create_irqchip_unlock
;
4203 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4205 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4206 create_irqchip_unlock
:
4207 mutex_unlock(&kvm
->lock
);
4210 case KVM_CREATE_PIT
:
4211 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4213 case KVM_CREATE_PIT2
:
4215 if (copy_from_user(&u
.pit_config
, argp
,
4216 sizeof(struct kvm_pit_config
)))
4219 mutex_lock(&kvm
->lock
);
4222 goto create_pit_unlock
;
4224 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4228 mutex_unlock(&kvm
->lock
);
4230 case KVM_GET_IRQCHIP
: {
4231 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4232 struct kvm_irqchip
*chip
;
4234 chip
= memdup_user(argp
, sizeof(*chip
));
4241 if (!irqchip_kernel(kvm
))
4242 goto get_irqchip_out
;
4243 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4245 goto get_irqchip_out
;
4247 if (copy_to_user(argp
, chip
, sizeof *chip
))
4248 goto get_irqchip_out
;
4254 case KVM_SET_IRQCHIP
: {
4255 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4256 struct kvm_irqchip
*chip
;
4258 chip
= memdup_user(argp
, sizeof(*chip
));
4265 if (!irqchip_kernel(kvm
))
4266 goto set_irqchip_out
;
4267 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4269 goto set_irqchip_out
;
4277 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4280 if (!kvm
->arch
.vpit
)
4282 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4286 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4293 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4296 if (!kvm
->arch
.vpit
)
4298 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4301 case KVM_GET_PIT2
: {
4303 if (!kvm
->arch
.vpit
)
4305 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4309 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4314 case KVM_SET_PIT2
: {
4316 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4319 if (!kvm
->arch
.vpit
)
4321 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4324 case KVM_REINJECT_CONTROL
: {
4325 struct kvm_reinject_control control
;
4327 if (copy_from_user(&control
, argp
, sizeof(control
)))
4329 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4332 case KVM_SET_BOOT_CPU_ID
:
4334 mutex_lock(&kvm
->lock
);
4335 if (kvm
->created_vcpus
)
4338 kvm
->arch
.bsp_vcpu_id
= arg
;
4339 mutex_unlock(&kvm
->lock
);
4341 case KVM_XEN_HVM_CONFIG
: {
4342 struct kvm_xen_hvm_config xhc
;
4344 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4349 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4353 case KVM_SET_CLOCK
: {
4354 struct kvm_clock_data user_ns
;
4358 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4367 * TODO: userspace has to take care of races with VCPU_RUN, so
4368 * kvm_gen_update_masterclock() can be cut down to locked
4369 * pvclock_update_vm_gtod_copy().
4371 kvm_gen_update_masterclock(kvm
);
4372 now_ns
= get_kvmclock_ns(kvm
);
4373 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4374 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4377 case KVM_GET_CLOCK
: {
4378 struct kvm_clock_data user_ns
;
4381 now_ns
= get_kvmclock_ns(kvm
);
4382 user_ns
.clock
= now_ns
;
4383 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4384 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4387 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4392 case KVM_ENABLE_CAP
: {
4393 struct kvm_enable_cap cap
;
4396 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4398 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4408 static void kvm_init_msr_list(void)
4413 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4414 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4418 * Even MSRs that are valid in the host may not be exposed
4419 * to the guests in some cases.
4421 switch (msrs_to_save
[i
]) {
4422 case MSR_IA32_BNDCFGS
:
4423 if (!kvm_x86_ops
->mpx_supported())
4427 if (!kvm_x86_ops
->rdtscp_supported())
4435 msrs_to_save
[j
] = msrs_to_save
[i
];
4438 num_msrs_to_save
= j
;
4440 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4441 if (!kvm_x86_ops
->has_emulated_msr(emulated_msrs
[i
]))
4445 emulated_msrs
[j
] = emulated_msrs
[i
];
4448 num_emulated_msrs
= j
;
4450 for (i
= j
= 0; i
< ARRAY_SIZE(msr_based_features
); i
++) {
4451 struct kvm_msr_entry msr
;
4453 msr
.index
= msr_based_features
[i
];
4454 if (kvm_get_msr_feature(&msr
))
4458 msr_based_features
[j
] = msr_based_features
[i
];
4461 num_msr_based_features
= j
;
4464 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4472 if (!(lapic_in_kernel(vcpu
) &&
4473 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4474 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4485 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4492 if (!(lapic_in_kernel(vcpu
) &&
4493 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4495 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4497 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4507 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4508 struct kvm_segment
*var
, int seg
)
4510 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4513 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4514 struct kvm_segment
*var
, int seg
)
4516 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4519 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4520 struct x86_exception
*exception
)
4524 BUG_ON(!mmu_is_nested(vcpu
));
4526 /* NPT walks are always user-walks */
4527 access
|= PFERR_USER_MASK
;
4528 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4533 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4534 struct x86_exception
*exception
)
4536 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4537 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4540 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4541 struct x86_exception
*exception
)
4543 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4544 access
|= PFERR_FETCH_MASK
;
4545 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4548 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4549 struct x86_exception
*exception
)
4551 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4552 access
|= PFERR_WRITE_MASK
;
4553 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4556 /* uses this to access any guest's mapped memory without checking CPL */
4557 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4558 struct x86_exception
*exception
)
4560 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4563 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4564 struct kvm_vcpu
*vcpu
, u32 access
,
4565 struct x86_exception
*exception
)
4568 int r
= X86EMUL_CONTINUE
;
4571 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4573 unsigned offset
= addr
& (PAGE_SIZE
-1);
4574 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4577 if (gpa
== UNMAPPED_GVA
)
4578 return X86EMUL_PROPAGATE_FAULT
;
4579 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4582 r
= X86EMUL_IO_NEEDED
;
4594 /* used for instruction fetching */
4595 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4596 gva_t addr
, void *val
, unsigned int bytes
,
4597 struct x86_exception
*exception
)
4599 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4600 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4604 /* Inline kvm_read_guest_virt_helper for speed. */
4605 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4607 if (unlikely(gpa
== UNMAPPED_GVA
))
4608 return X86EMUL_PROPAGATE_FAULT
;
4610 offset
= addr
& (PAGE_SIZE
-1);
4611 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4612 bytes
= (unsigned)PAGE_SIZE
- offset
;
4613 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4615 if (unlikely(ret
< 0))
4616 return X86EMUL_IO_NEEDED
;
4618 return X86EMUL_CONTINUE
;
4621 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
4622 gva_t addr
, void *val
, unsigned int bytes
,
4623 struct x86_exception
*exception
)
4625 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4627 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4630 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4632 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
4633 gva_t addr
, void *val
, unsigned int bytes
,
4634 struct x86_exception
*exception
)
4636 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4637 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4640 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4641 unsigned long addr
, void *val
, unsigned int bytes
)
4643 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4644 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4646 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4649 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4650 struct kvm_vcpu
*vcpu
, u32 access
,
4651 struct x86_exception
*exception
)
4654 int r
= X86EMUL_CONTINUE
;
4656 /* kvm_write_guest_virt_system can pull in tons of pages. */
4657 vcpu
->arch
.l1tf_flush_l1d
= true;
4660 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4663 unsigned offset
= addr
& (PAGE_SIZE
-1);
4664 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4667 if (gpa
== UNMAPPED_GVA
)
4668 return X86EMUL_PROPAGATE_FAULT
;
4669 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4671 r
= X86EMUL_IO_NEEDED
;
4683 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
4684 unsigned int bytes
, struct x86_exception
*exception
)
4686 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4688 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4689 PFERR_WRITE_MASK
, exception
);
4692 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
4693 unsigned int bytes
, struct x86_exception
*exception
)
4695 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4696 PFERR_WRITE_MASK
, exception
);
4698 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4700 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4701 gpa_t gpa
, bool write
)
4703 /* For APIC access vmexit */
4704 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4707 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4708 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4715 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4716 gpa_t
*gpa
, struct x86_exception
*exception
,
4719 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4720 | (write
? PFERR_WRITE_MASK
: 0);
4723 * currently PKRU is only applied to ept enabled guest so
4724 * there is no pkey in EPT page table for L1 guest or EPT
4725 * shadow page table for L2 guest.
4727 if (vcpu_match_mmio_gva(vcpu
, gva
)
4728 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4729 vcpu
->arch
.access
, 0, access
)) {
4730 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4731 (gva
& (PAGE_SIZE
- 1));
4732 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4736 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4738 if (*gpa
== UNMAPPED_GVA
)
4741 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4744 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4745 const void *val
, int bytes
)
4749 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4752 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4756 struct read_write_emulator_ops
{
4757 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4759 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4760 void *val
, int bytes
);
4761 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4762 int bytes
, void *val
);
4763 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4764 void *val
, int bytes
);
4768 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4770 if (vcpu
->mmio_read_completed
) {
4771 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4772 vcpu
->mmio_fragments
[0].gpa
, val
);
4773 vcpu
->mmio_read_completed
= 0;
4780 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4781 void *val
, int bytes
)
4783 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4786 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4787 void *val
, int bytes
)
4789 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4792 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4794 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4795 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4798 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4799 void *val
, int bytes
)
4801 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4802 return X86EMUL_IO_NEEDED
;
4805 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4806 void *val
, int bytes
)
4808 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4810 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4811 return X86EMUL_CONTINUE
;
4814 static const struct read_write_emulator_ops read_emultor
= {
4815 .read_write_prepare
= read_prepare
,
4816 .read_write_emulate
= read_emulate
,
4817 .read_write_mmio
= vcpu_mmio_read
,
4818 .read_write_exit_mmio
= read_exit_mmio
,
4821 static const struct read_write_emulator_ops write_emultor
= {
4822 .read_write_emulate
= write_emulate
,
4823 .read_write_mmio
= write_mmio
,
4824 .read_write_exit_mmio
= write_exit_mmio
,
4828 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4830 struct x86_exception
*exception
,
4831 struct kvm_vcpu
*vcpu
,
4832 const struct read_write_emulator_ops
*ops
)
4836 bool write
= ops
->write
;
4837 struct kvm_mmio_fragment
*frag
;
4838 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4841 * If the exit was due to a NPF we may already have a GPA.
4842 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4843 * Note, this cannot be used on string operations since string
4844 * operation using rep will only have the initial GPA from the NPF
4847 if (vcpu
->arch
.gpa_available
&&
4848 emulator_can_use_gpa(ctxt
) &&
4849 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4850 gpa
= vcpu
->arch
.gpa_val
;
4851 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4853 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4855 return X86EMUL_PROPAGATE_FAULT
;
4858 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4859 return X86EMUL_CONTINUE
;
4862 * Is this MMIO handled locally?
4864 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4865 if (handled
== bytes
)
4866 return X86EMUL_CONTINUE
;
4872 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4873 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4877 return X86EMUL_CONTINUE
;
4880 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4882 void *val
, unsigned int bytes
,
4883 struct x86_exception
*exception
,
4884 const struct read_write_emulator_ops
*ops
)
4886 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4890 if (ops
->read_write_prepare
&&
4891 ops
->read_write_prepare(vcpu
, val
, bytes
))
4892 return X86EMUL_CONTINUE
;
4894 vcpu
->mmio_nr_fragments
= 0;
4896 /* Crossing a page boundary? */
4897 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4900 now
= -addr
& ~PAGE_MASK
;
4901 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4904 if (rc
!= X86EMUL_CONTINUE
)
4907 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4913 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4915 if (rc
!= X86EMUL_CONTINUE
)
4918 if (!vcpu
->mmio_nr_fragments
)
4921 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4923 vcpu
->mmio_needed
= 1;
4924 vcpu
->mmio_cur_fragment
= 0;
4926 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4927 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4928 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4929 vcpu
->run
->mmio
.phys_addr
= gpa
;
4931 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4934 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4938 struct x86_exception
*exception
)
4940 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4941 exception
, &read_emultor
);
4944 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4948 struct x86_exception
*exception
)
4950 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4951 exception
, &write_emultor
);
4954 #define CMPXCHG_TYPE(t, ptr, old, new) \
4955 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4957 #ifdef CONFIG_X86_64
4958 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4960 # define CMPXCHG64(ptr, old, new) \
4961 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4964 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4969 struct x86_exception
*exception
)
4971 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4977 /* guests cmpxchg8b have to be emulated atomically */
4978 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4981 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4983 if (gpa
== UNMAPPED_GVA
||
4984 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4987 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4990 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4991 if (is_error_page(page
))
4994 kaddr
= kmap_atomic(page
);
4995 kaddr
+= offset_in_page(gpa
);
4998 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
5001 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
5004 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
5007 exchanged
= CMPXCHG64(kaddr
, old
, new);
5012 kunmap_atomic(kaddr
);
5013 kvm_release_page_dirty(page
);
5016 return X86EMUL_CMPXCHG_FAILED
;
5018 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
5019 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
5021 return X86EMUL_CONTINUE
;
5024 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
5026 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
5029 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
5033 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
5034 if (vcpu
->arch
.pio
.in
)
5035 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5036 vcpu
->arch
.pio
.size
, pd
);
5038 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5039 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5043 pd
+= vcpu
->arch
.pio
.size
;
5048 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5049 unsigned short port
, void *val
,
5050 unsigned int count
, bool in
)
5052 vcpu
->arch
.pio
.port
= port
;
5053 vcpu
->arch
.pio
.in
= in
;
5054 vcpu
->arch
.pio
.count
= count
;
5055 vcpu
->arch
.pio
.size
= size
;
5057 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5058 vcpu
->arch
.pio
.count
= 0;
5062 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5063 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5064 vcpu
->run
->io
.size
= size
;
5065 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5066 vcpu
->run
->io
.count
= count
;
5067 vcpu
->run
->io
.port
= port
;
5072 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5073 int size
, unsigned short port
, void *val
,
5076 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5079 if (vcpu
->arch
.pio
.count
)
5082 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5084 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5087 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5088 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5089 vcpu
->arch
.pio
.count
= 0;
5096 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
5097 int size
, unsigned short port
,
5098 const void *val
, unsigned int count
)
5100 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5102 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5103 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5104 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
5107 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
5109 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
5112 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
5114 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5117 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5119 if (!need_emulate_wbinvd(vcpu
))
5120 return X86EMUL_CONTINUE
;
5122 if (kvm_x86_ops
->has_wbinvd_exit()) {
5123 int cpu
= get_cpu();
5125 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5126 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5127 wbinvd_ipi
, NULL
, 1);
5129 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5132 return X86EMUL_CONTINUE
;
5135 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5137 kvm_emulate_wbinvd_noskip(vcpu
);
5138 return kvm_skip_emulated_instruction(vcpu
);
5140 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5144 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5146 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5149 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5150 unsigned long *dest
)
5152 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5155 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5156 unsigned long value
)
5159 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5162 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5164 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5167 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5169 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5170 unsigned long value
;
5174 value
= kvm_read_cr0(vcpu
);
5177 value
= vcpu
->arch
.cr2
;
5180 value
= kvm_read_cr3(vcpu
);
5183 value
= kvm_read_cr4(vcpu
);
5186 value
= kvm_get_cr8(vcpu
);
5189 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5196 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5198 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5203 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5206 vcpu
->arch
.cr2
= val
;
5209 res
= kvm_set_cr3(vcpu
, val
);
5212 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5215 res
= kvm_set_cr8(vcpu
, val
);
5218 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5225 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5227 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5230 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5232 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5235 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5237 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5240 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5242 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5245 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5247 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5250 static unsigned long emulator_get_cached_segment_base(
5251 struct x86_emulate_ctxt
*ctxt
, int seg
)
5253 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5256 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5257 struct desc_struct
*desc
, u32
*base3
,
5260 struct kvm_segment var
;
5262 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5263 *selector
= var
.selector
;
5266 memset(desc
, 0, sizeof(*desc
));
5274 set_desc_limit(desc
, var
.limit
);
5275 set_desc_base(desc
, (unsigned long)var
.base
);
5276 #ifdef CONFIG_X86_64
5278 *base3
= var
.base
>> 32;
5280 desc
->type
= var
.type
;
5282 desc
->dpl
= var
.dpl
;
5283 desc
->p
= var
.present
;
5284 desc
->avl
= var
.avl
;
5292 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5293 struct desc_struct
*desc
, u32 base3
,
5296 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5297 struct kvm_segment var
;
5299 var
.selector
= selector
;
5300 var
.base
= get_desc_base(desc
);
5301 #ifdef CONFIG_X86_64
5302 var
.base
|= ((u64
)base3
) << 32;
5304 var
.limit
= get_desc_limit(desc
);
5306 var
.limit
= (var
.limit
<< 12) | 0xfff;
5307 var
.type
= desc
->type
;
5308 var
.dpl
= desc
->dpl
;
5313 var
.avl
= desc
->avl
;
5314 var
.present
= desc
->p
;
5315 var
.unusable
= !var
.present
;
5318 kvm_set_segment(vcpu
, &var
, seg
);
5322 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5323 u32 msr_index
, u64
*pdata
)
5325 struct msr_data msr
;
5328 msr
.index
= msr_index
;
5329 msr
.host_initiated
= false;
5330 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5338 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5339 u32 msr_index
, u64 data
)
5341 struct msr_data msr
;
5344 msr
.index
= msr_index
;
5345 msr
.host_initiated
= false;
5346 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5349 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5351 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5353 return vcpu
->arch
.smbase
;
5356 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5358 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5360 vcpu
->arch
.smbase
= smbase
;
5363 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5366 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5369 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5370 u32 pmc
, u64
*pdata
)
5372 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5375 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5377 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5380 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5381 struct x86_instruction_info
*info
,
5382 enum x86_intercept_stage stage
)
5384 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5387 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5388 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5390 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5393 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5395 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5398 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5400 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5403 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5405 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5408 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5410 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5413 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5415 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5418 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5420 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5423 static const struct x86_emulate_ops emulate_ops
= {
5424 .read_gpr
= emulator_read_gpr
,
5425 .write_gpr
= emulator_write_gpr
,
5426 .read_std
= emulator_read_std
,
5427 .write_std
= emulator_write_std
,
5428 .read_phys
= kvm_read_guest_phys_system
,
5429 .fetch
= kvm_fetch_guest_virt
,
5430 .read_emulated
= emulator_read_emulated
,
5431 .write_emulated
= emulator_write_emulated
,
5432 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5433 .invlpg
= emulator_invlpg
,
5434 .pio_in_emulated
= emulator_pio_in_emulated
,
5435 .pio_out_emulated
= emulator_pio_out_emulated
,
5436 .get_segment
= emulator_get_segment
,
5437 .set_segment
= emulator_set_segment
,
5438 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5439 .get_gdt
= emulator_get_gdt
,
5440 .get_idt
= emulator_get_idt
,
5441 .set_gdt
= emulator_set_gdt
,
5442 .set_idt
= emulator_set_idt
,
5443 .get_cr
= emulator_get_cr
,
5444 .set_cr
= emulator_set_cr
,
5445 .cpl
= emulator_get_cpl
,
5446 .get_dr
= emulator_get_dr
,
5447 .set_dr
= emulator_set_dr
,
5448 .get_smbase
= emulator_get_smbase
,
5449 .set_smbase
= emulator_set_smbase
,
5450 .set_msr
= emulator_set_msr
,
5451 .get_msr
= emulator_get_msr
,
5452 .check_pmc
= emulator_check_pmc
,
5453 .read_pmc
= emulator_read_pmc
,
5454 .halt
= emulator_halt
,
5455 .wbinvd
= emulator_wbinvd
,
5456 .fix_hypercall
= emulator_fix_hypercall
,
5457 .intercept
= emulator_intercept
,
5458 .get_cpuid
= emulator_get_cpuid
,
5459 .set_nmi_mask
= emulator_set_nmi_mask
,
5460 .get_hflags
= emulator_get_hflags
,
5461 .set_hflags
= emulator_set_hflags
,
5462 .pre_leave_smm
= emulator_pre_leave_smm
,
5465 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5467 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5469 * an sti; sti; sequence only disable interrupts for the first
5470 * instruction. So, if the last instruction, be it emulated or
5471 * not, left the system with the INT_STI flag enabled, it
5472 * means that the last instruction is an sti. We should not
5473 * leave the flag on in this case. The same goes for mov ss
5475 if (int_shadow
& mask
)
5477 if (unlikely(int_shadow
|| mask
)) {
5478 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5480 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5484 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5486 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5487 if (ctxt
->exception
.vector
== PF_VECTOR
)
5488 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5490 if (ctxt
->exception
.error_code_valid
)
5491 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5492 ctxt
->exception
.error_code
);
5494 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5498 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5500 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5503 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5505 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5506 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5508 ctxt
->eip
= kvm_rip_read(vcpu
);
5509 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5510 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5511 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5512 cs_db
? X86EMUL_MODE_PROT32
:
5513 X86EMUL_MODE_PROT16
;
5514 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5515 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5516 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5518 init_decode_cache(ctxt
);
5519 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5522 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5524 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5527 init_emulate_ctxt(vcpu
);
5531 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5532 ret
= emulate_int_real(ctxt
, irq
);
5534 if (ret
!= X86EMUL_CONTINUE
)
5535 return EMULATE_FAIL
;
5537 ctxt
->eip
= ctxt
->_eip
;
5538 kvm_rip_write(vcpu
, ctxt
->eip
);
5539 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5541 if (irq
== NMI_VECTOR
)
5542 vcpu
->arch
.nmi_pending
= 0;
5544 vcpu
->arch
.interrupt
.pending
= false;
5546 return EMULATE_DONE
;
5548 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5550 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5552 int r
= EMULATE_DONE
;
5554 ++vcpu
->stat
.insn_emulation_fail
;
5555 trace_kvm_emulate_insn_failed(vcpu
);
5556 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5557 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5558 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5559 vcpu
->run
->internal
.ndata
= 0;
5560 r
= EMULATE_USER_EXIT
;
5562 kvm_queue_exception(vcpu
, UD_VECTOR
);
5567 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5568 bool write_fault_to_shadow_pgtable
,
5574 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5577 if (!vcpu
->arch
.mmu
.direct_map
) {
5579 * Write permission should be allowed since only
5580 * write access need to be emulated.
5582 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5585 * If the mapping is invalid in guest, let cpu retry
5586 * it to generate fault.
5588 if (gpa
== UNMAPPED_GVA
)
5593 * Do not retry the unhandleable instruction if it faults on the
5594 * readonly host memory, otherwise it will goto a infinite loop:
5595 * retry instruction -> write #PF -> emulation fail -> retry
5596 * instruction -> ...
5598 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5601 * If the instruction failed on the error pfn, it can not be fixed,
5602 * report the error to userspace.
5604 if (is_error_noslot_pfn(pfn
))
5607 kvm_release_pfn_clean(pfn
);
5609 /* The instructions are well-emulated on direct mmu. */
5610 if (vcpu
->arch
.mmu
.direct_map
) {
5611 unsigned int indirect_shadow_pages
;
5613 spin_lock(&vcpu
->kvm
->mmu_lock
);
5614 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5615 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5617 if (indirect_shadow_pages
)
5618 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5624 * if emulation was due to access to shadowed page table
5625 * and it failed try to unshadow page and re-enter the
5626 * guest to let CPU execute the instruction.
5628 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5631 * If the access faults on its page table, it can not
5632 * be fixed by unprotecting shadow page and it should
5633 * be reported to userspace.
5635 return !write_fault_to_shadow_pgtable
;
5638 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5639 unsigned long cr2
, int emulation_type
)
5641 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5642 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5644 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5645 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5648 * If the emulation is caused by #PF and it is non-page_table
5649 * writing instruction, it means the VM-EXIT is caused by shadow
5650 * page protected, we can zap the shadow page and retry this
5651 * instruction directly.
5653 * Note: if the guest uses a non-page-table modifying instruction
5654 * on the PDE that points to the instruction, then we will unmap
5655 * the instruction and go to an infinite loop. So, we cache the
5656 * last retried eip and the last fault address, if we meet the eip
5657 * and the address again, we can break out of the potential infinite
5660 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5662 if (!(emulation_type
& EMULTYPE_RETRY
))
5665 if (x86_page_table_writing_insn(ctxt
))
5668 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5671 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5672 vcpu
->arch
.last_retry_addr
= cr2
;
5674 if (!vcpu
->arch
.mmu
.direct_map
)
5675 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5677 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5682 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5683 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5685 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5687 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5688 /* This is a good place to trace that we are exiting SMM. */
5689 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5691 /* Process a latched INIT or SMI, if any. */
5692 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5695 kvm_mmu_reset_context(vcpu
);
5698 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5700 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5702 vcpu
->arch
.hflags
= emul_flags
;
5704 if (changed
& HF_SMM_MASK
)
5705 kvm_smm_changed(vcpu
);
5708 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5717 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5718 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5723 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5725 struct kvm_run
*kvm_run
= vcpu
->run
;
5727 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5728 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5729 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5730 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5731 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5732 *r
= EMULATE_USER_EXIT
;
5735 * "Certain debug exceptions may clear bit 0-3. The
5736 * remaining contents of the DR6 register are never
5737 * cleared by the processor".
5739 vcpu
->arch
.dr6
&= ~15;
5740 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5741 kvm_queue_exception(vcpu
, DB_VECTOR
);
5745 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5747 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5748 int r
= EMULATE_DONE
;
5750 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5753 * rflags is the old, "raw" value of the flags. The new value has
5754 * not been saved yet.
5756 * This is correct even for TF set by the guest, because "the
5757 * processor will not generate this exception after the instruction
5758 * that sets the TF flag".
5760 if (unlikely(rflags
& X86_EFLAGS_TF
))
5761 kvm_vcpu_do_singlestep(vcpu
, &r
);
5762 return r
== EMULATE_DONE
;
5764 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5766 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5768 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5769 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5770 struct kvm_run
*kvm_run
= vcpu
->run
;
5771 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5772 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5773 vcpu
->arch
.guest_debug_dr7
,
5777 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5778 kvm_run
->debug
.arch
.pc
= eip
;
5779 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5780 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5781 *r
= EMULATE_USER_EXIT
;
5786 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5787 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5788 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5789 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5794 vcpu
->arch
.dr6
&= ~15;
5795 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5796 kvm_queue_exception(vcpu
, DB_VECTOR
);
5805 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5812 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5813 bool writeback
= true;
5814 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5816 vcpu
->arch
.l1tf_flush_l1d
= true;
5819 * Clear write_fault_to_shadow_pgtable here to ensure it is
5822 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5823 kvm_clear_exception_queue(vcpu
);
5825 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5826 init_emulate_ctxt(vcpu
);
5829 * We will reenter on the same instruction since
5830 * we do not set complete_userspace_io. This does not
5831 * handle watchpoints yet, those would be handled in
5834 if (!(emulation_type
& EMULTYPE_SKIP
) &&
5835 kvm_vcpu_check_breakpoint(vcpu
, &r
))
5838 ctxt
->interruptibility
= 0;
5839 ctxt
->have_exception
= false;
5840 ctxt
->exception
.vector
= -1;
5841 ctxt
->perm_ok
= false;
5843 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5845 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5847 trace_kvm_emulate_insn_start(vcpu
);
5848 ++vcpu
->stat
.insn_emulation
;
5849 if (r
!= EMULATION_OK
) {
5850 if (emulation_type
& EMULTYPE_TRAP_UD
)
5851 return EMULATE_FAIL
;
5852 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5854 return EMULATE_DONE
;
5855 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
5856 return EMULATE_DONE
;
5857 if (emulation_type
& EMULTYPE_SKIP
)
5858 return EMULATE_FAIL
;
5859 return handle_emulation_failure(vcpu
);
5863 if (emulation_type
& EMULTYPE_SKIP
) {
5864 kvm_rip_write(vcpu
, ctxt
->_eip
);
5865 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5866 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5867 return EMULATE_DONE
;
5870 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5871 return EMULATE_DONE
;
5873 /* this is needed for vmware backdoor interface to work since it
5874 changes registers values during IO operation */
5875 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5876 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5877 emulator_invalidate_register_cache(ctxt
);
5881 /* Save the faulting GPA (cr2) in the address field */
5882 ctxt
->exception
.address
= cr2
;
5884 r
= x86_emulate_insn(ctxt
);
5886 if (r
== EMULATION_INTERCEPTED
)
5887 return EMULATE_DONE
;
5889 if (r
== EMULATION_FAILED
) {
5890 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5892 return EMULATE_DONE
;
5894 return handle_emulation_failure(vcpu
);
5897 if (ctxt
->have_exception
) {
5899 if (inject_emulated_exception(vcpu
))
5901 } else if (vcpu
->arch
.pio
.count
) {
5902 if (!vcpu
->arch
.pio
.in
) {
5903 /* FIXME: return into emulator if single-stepping. */
5904 vcpu
->arch
.pio
.count
= 0;
5907 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5909 r
= EMULATE_USER_EXIT
;
5910 } else if (vcpu
->mmio_needed
) {
5911 if (!vcpu
->mmio_is_write
)
5913 r
= EMULATE_USER_EXIT
;
5914 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5915 } else if (r
== EMULATION_RESTART
)
5921 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5922 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5923 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5924 kvm_rip_write(vcpu
, ctxt
->eip
);
5925 if (r
== EMULATE_DONE
&&
5926 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5927 kvm_vcpu_do_singlestep(vcpu
, &r
);
5928 if (!ctxt
->have_exception
||
5929 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5930 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5933 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5934 * do nothing, and it will be requested again as soon as
5935 * the shadow expires. But we still need to check here,
5936 * because POPF has no interrupt shadow.
5938 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5939 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5941 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5945 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5947 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5949 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5950 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5951 size
, port
, &val
, 1);
5952 /* do not return to emulator after return from userspace */
5953 vcpu
->arch
.pio
.count
= 0;
5956 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5958 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5962 /* We should only ever be called with arch.pio.count equal to 1 */
5963 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5965 /* For size less than 4 we merge, else we zero extend */
5966 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5970 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5971 * the copy and tracing
5973 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5974 vcpu
->arch
.pio
.port
, &val
, 1);
5975 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5980 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5985 /* For size less than 4 we merge, else we zero extend */
5986 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5988 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5991 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5995 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5999 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
6001 static int kvmclock_cpu_down_prep(unsigned int cpu
)
6003 __this_cpu_write(cpu_tsc_khz
, 0);
6007 static void tsc_khz_changed(void *data
)
6009 struct cpufreq_freqs
*freq
= data
;
6010 unsigned long khz
= 0;
6014 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6015 khz
= cpufreq_quick_get(raw_smp_processor_id());
6018 __this_cpu_write(cpu_tsc_khz
, khz
);
6021 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
6024 struct cpufreq_freqs
*freq
= data
;
6026 struct kvm_vcpu
*vcpu
;
6027 int i
, send_ipi
= 0;
6030 * We allow guests to temporarily run on slowing clocks,
6031 * provided we notify them after, or to run on accelerating
6032 * clocks, provided we notify them before. Thus time never
6035 * However, we have a problem. We can't atomically update
6036 * the frequency of a given CPU from this function; it is
6037 * merely a notifier, which can be called from any CPU.
6038 * Changing the TSC frequency at arbitrary points in time
6039 * requires a recomputation of local variables related to
6040 * the TSC for each VCPU. We must flag these local variables
6041 * to be updated and be sure the update takes place with the
6042 * new frequency before any guests proceed.
6044 * Unfortunately, the combination of hotplug CPU and frequency
6045 * change creates an intractable locking scenario; the order
6046 * of when these callouts happen is undefined with respect to
6047 * CPU hotplug, and they can race with each other. As such,
6048 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6049 * undefined; you can actually have a CPU frequency change take
6050 * place in between the computation of X and the setting of the
6051 * variable. To protect against this problem, all updates of
6052 * the per_cpu tsc_khz variable are done in an interrupt
6053 * protected IPI, and all callers wishing to update the value
6054 * must wait for a synchronous IPI to complete (which is trivial
6055 * if the caller is on the CPU already). This establishes the
6056 * necessary total order on variable updates.
6058 * Note that because a guest time update may take place
6059 * anytime after the setting of the VCPU's request bit, the
6060 * correct TSC value must be set before the request. However,
6061 * to ensure the update actually makes it to any guest which
6062 * starts running in hardware virtualization between the set
6063 * and the acquisition of the spinlock, we must also ping the
6064 * CPU after setting the request bit.
6068 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
6070 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
6073 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6075 spin_lock(&kvm_lock
);
6076 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6077 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6078 if (vcpu
->cpu
!= freq
->cpu
)
6080 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6081 if (vcpu
->cpu
!= smp_processor_id())
6085 spin_unlock(&kvm_lock
);
6087 if (freq
->old
< freq
->new && send_ipi
) {
6089 * We upscale the frequency. Must make the guest
6090 * doesn't see old kvmclock values while running with
6091 * the new frequency, otherwise we risk the guest sees
6092 * time go backwards.
6094 * In case we update the frequency for another cpu
6095 * (which might be in guest context) send an interrupt
6096 * to kick the cpu out of guest context. Next time
6097 * guest context is entered kvmclock will be updated,
6098 * so the guest will not see stale values.
6100 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6105 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
6106 .notifier_call
= kvmclock_cpufreq_notifier
6109 static int kvmclock_cpu_online(unsigned int cpu
)
6111 tsc_khz_changed(NULL
);
6115 static void kvm_timer_init(void)
6117 max_tsc_khz
= tsc_khz
;
6119 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6120 #ifdef CONFIG_CPU_FREQ
6121 struct cpufreq_policy policy
;
6124 memset(&policy
, 0, sizeof(policy
));
6126 cpufreq_get_policy(&policy
, cpu
);
6127 if (policy
.cpuinfo
.max_freq
)
6128 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6131 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6132 CPUFREQ_TRANSITION_NOTIFIER
);
6134 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6136 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6137 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6140 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6142 int kvm_is_in_guest(void)
6144 return __this_cpu_read(current_vcpu
) != NULL
;
6147 static int kvm_is_user_mode(void)
6151 if (__this_cpu_read(current_vcpu
))
6152 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6154 return user_mode
!= 0;
6157 static unsigned long kvm_get_guest_ip(void)
6159 unsigned long ip
= 0;
6161 if (__this_cpu_read(current_vcpu
))
6162 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6167 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6168 .is_in_guest
= kvm_is_in_guest
,
6169 .is_user_mode
= kvm_is_user_mode
,
6170 .get_guest_ip
= kvm_get_guest_ip
,
6173 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6175 __this_cpu_write(current_vcpu
, vcpu
);
6177 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6179 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6181 __this_cpu_write(current_vcpu
, NULL
);
6183 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6185 static void kvm_set_mmio_spte_mask(void)
6188 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6191 * Set the reserved bits and the present bit of an paging-structure
6192 * entry to generate page fault with PFER.RSV = 1.
6194 /* Mask the reserved physical address bits. */
6195 mask
= rsvd_bits(maxphyaddr
, 51);
6197 /* Set the present bit. */
6200 #ifdef CONFIG_X86_64
6202 * If reserved bit is not supported, clear the present bit to disable
6205 if (maxphyaddr
== 52)
6209 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6212 #ifdef CONFIG_X86_64
6213 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6217 struct kvm_vcpu
*vcpu
;
6220 spin_lock(&kvm_lock
);
6221 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6222 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6223 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6224 atomic_set(&kvm_guest_has_master_clock
, 0);
6225 spin_unlock(&kvm_lock
);
6228 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6231 * Notification about pvclock gtod data update.
6233 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6236 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6237 struct timekeeper
*tk
= priv
;
6239 update_pvclock_gtod(tk
);
6241 /* disable master clock if host does not trust, or does not
6242 * use, TSC clocksource
6244 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6245 atomic_read(&kvm_guest_has_master_clock
) != 0)
6246 queue_work(system_long_wq
, &pvclock_gtod_work
);
6251 static struct notifier_block pvclock_gtod_notifier
= {
6252 .notifier_call
= pvclock_gtod_notify
,
6256 int kvm_arch_init(void *opaque
)
6259 struct kvm_x86_ops
*ops
= opaque
;
6262 printk(KERN_ERR
"kvm: already loaded the other module\n");
6267 if (!ops
->cpu_has_kvm_support()) {
6268 printk(KERN_ERR
"kvm: no hardware support\n");
6272 if (ops
->disabled_by_bios()) {
6273 printk(KERN_WARNING
"kvm: disabled by bios\n");
6279 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6281 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6285 r
= kvm_mmu_module_init();
6287 goto out_free_percpu
;
6289 kvm_set_mmio_spte_mask();
6293 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6294 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6295 PT_PRESENT_MASK
, 0, sme_me_mask
);
6298 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6300 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6301 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6304 #ifdef CONFIG_X86_64
6305 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6311 free_percpu(shared_msrs
);
6316 void kvm_arch_exit(void)
6319 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6321 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6322 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6323 CPUFREQ_TRANSITION_NOTIFIER
);
6324 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6325 #ifdef CONFIG_X86_64
6326 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6329 kvm_mmu_module_exit();
6330 free_percpu(shared_msrs
);
6333 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6335 ++vcpu
->stat
.halt_exits
;
6336 if (lapic_in_kernel(vcpu
)) {
6337 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6340 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6344 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6346 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6348 int ret
= kvm_skip_emulated_instruction(vcpu
);
6350 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6351 * KVM_EXIT_DEBUG here.
6353 return kvm_vcpu_halt(vcpu
) && ret
;
6355 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6357 #ifdef CONFIG_X86_64
6358 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6359 unsigned long clock_type
)
6361 struct kvm_clock_pairing clock_pairing
;
6366 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6367 return -KVM_EOPNOTSUPP
;
6369 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6370 return -KVM_EOPNOTSUPP
;
6372 clock_pairing
.sec
= ts
.tv_sec
;
6373 clock_pairing
.nsec
= ts
.tv_nsec
;
6374 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6375 clock_pairing
.flags
= 0;
6378 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6379 sizeof(struct kvm_clock_pairing
)))
6387 * kvm_pv_kick_cpu_op: Kick a vcpu.
6389 * @apicid - apicid of vcpu to be kicked.
6391 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6393 struct kvm_lapic_irq lapic_irq
;
6395 lapic_irq
.shorthand
= 0;
6396 lapic_irq
.dest_mode
= 0;
6397 lapic_irq
.level
= 0;
6398 lapic_irq
.dest_id
= apicid
;
6399 lapic_irq
.msi_redir_hint
= false;
6401 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6402 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6405 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6407 vcpu
->arch
.apicv_active
= false;
6408 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6411 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6413 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6416 r
= kvm_skip_emulated_instruction(vcpu
);
6418 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6419 return kvm_hv_hypercall(vcpu
);
6421 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6422 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6423 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6424 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6425 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6427 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6429 op_64_bit
= is_64_bit_mode(vcpu
);
6438 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6444 case KVM_HC_VAPIC_POLL_IRQ
:
6447 case KVM_HC_KICK_CPU
:
6448 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6451 #ifdef CONFIG_X86_64
6452 case KVM_HC_CLOCK_PAIRING
:
6453 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6463 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6464 ++vcpu
->stat
.hypercalls
;
6467 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6469 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6471 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6472 char instruction
[3];
6473 unsigned long rip
= kvm_rip_read(vcpu
);
6475 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6477 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6481 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6483 return vcpu
->run
->request_interrupt_window
&&
6484 likely(!pic_in_kernel(vcpu
->kvm
));
6487 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6489 struct kvm_run
*kvm_run
= vcpu
->run
;
6491 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6492 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6493 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6494 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6495 kvm_run
->ready_for_interrupt_injection
=
6496 pic_in_kernel(vcpu
->kvm
) ||
6497 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6500 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6504 if (!kvm_x86_ops
->update_cr8_intercept
)
6507 if (!lapic_in_kernel(vcpu
))
6510 if (vcpu
->arch
.apicv_active
)
6513 if (!vcpu
->arch
.apic
->vapic_addr
)
6514 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6521 tpr
= kvm_lapic_get_cr8(vcpu
);
6523 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6526 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6530 /* try to reinject previous events if any */
6531 if (vcpu
->arch
.exception
.injected
) {
6532 kvm_x86_ops
->queue_exception(vcpu
);
6537 * Exceptions must be injected immediately, or the exception
6538 * frame will have the address of the NMI or interrupt handler.
6540 if (!vcpu
->arch
.exception
.pending
) {
6541 if (vcpu
->arch
.nmi_injected
) {
6542 kvm_x86_ops
->set_nmi(vcpu
);
6546 if (vcpu
->arch
.interrupt
.pending
) {
6547 kvm_x86_ops
->set_irq(vcpu
);
6552 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6553 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6558 /* try to inject new event if pending */
6559 if (vcpu
->arch
.exception
.pending
) {
6560 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6561 vcpu
->arch
.exception
.has_error_code
,
6562 vcpu
->arch
.exception
.error_code
);
6564 vcpu
->arch
.exception
.pending
= false;
6565 vcpu
->arch
.exception
.injected
= true;
6567 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6568 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6571 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6572 (vcpu
->arch
.dr7
& DR7_GD
)) {
6573 vcpu
->arch
.dr7
&= ~DR7_GD
;
6574 kvm_update_dr7(vcpu
);
6577 kvm_x86_ops
->queue_exception(vcpu
);
6578 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) && kvm_x86_ops
->smi_allowed(vcpu
)) {
6579 vcpu
->arch
.smi_pending
= false;
6581 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6582 --vcpu
->arch
.nmi_pending
;
6583 vcpu
->arch
.nmi_injected
= true;
6584 kvm_x86_ops
->set_nmi(vcpu
);
6585 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6587 * Because interrupts can be injected asynchronously, we are
6588 * calling check_nested_events again here to avoid a race condition.
6589 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6590 * proposal and current concerns. Perhaps we should be setting
6591 * KVM_REQ_EVENT only on certain events and not unconditionally?
6593 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6594 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6598 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6599 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6601 kvm_x86_ops
->set_irq(vcpu
);
6608 static void process_nmi(struct kvm_vcpu
*vcpu
)
6613 * x86 is limited to one NMI running, and one NMI pending after it.
6614 * If an NMI is already in progress, limit further NMIs to just one.
6615 * Otherwise, allow two (and we'll inject the first one immediately).
6617 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6620 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6621 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6622 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6625 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6628 flags
|= seg
->g
<< 23;
6629 flags
|= seg
->db
<< 22;
6630 flags
|= seg
->l
<< 21;
6631 flags
|= seg
->avl
<< 20;
6632 flags
|= seg
->present
<< 15;
6633 flags
|= seg
->dpl
<< 13;
6634 flags
|= seg
->s
<< 12;
6635 flags
|= seg
->type
<< 8;
6639 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6641 struct kvm_segment seg
;
6644 kvm_get_segment(vcpu
, &seg
, n
);
6645 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6648 offset
= 0x7f84 + n
* 12;
6650 offset
= 0x7f2c + (n
- 3) * 12;
6652 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6653 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6654 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6657 #ifdef CONFIG_X86_64
6658 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6660 struct kvm_segment seg
;
6664 kvm_get_segment(vcpu
, &seg
, n
);
6665 offset
= 0x7e00 + n
* 16;
6667 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6668 put_smstate(u16
, buf
, offset
, seg
.selector
);
6669 put_smstate(u16
, buf
, offset
+ 2, flags
);
6670 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6671 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6675 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6678 struct kvm_segment seg
;
6682 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6683 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6684 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6685 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6687 for (i
= 0; i
< 8; i
++)
6688 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6690 kvm_get_dr(vcpu
, 6, &val
);
6691 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6692 kvm_get_dr(vcpu
, 7, &val
);
6693 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6695 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6696 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6697 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6698 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6699 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6701 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6702 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6703 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6704 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6705 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6707 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6708 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6709 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6711 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6712 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6713 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6715 for (i
= 0; i
< 6; i
++)
6716 enter_smm_save_seg_32(vcpu
, buf
, i
);
6718 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6721 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6722 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6725 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6727 #ifdef CONFIG_X86_64
6729 struct kvm_segment seg
;
6733 for (i
= 0; i
< 16; i
++)
6734 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6736 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6737 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6739 kvm_get_dr(vcpu
, 6, &val
);
6740 put_smstate(u64
, buf
, 0x7f68, val
);
6741 kvm_get_dr(vcpu
, 7, &val
);
6742 put_smstate(u64
, buf
, 0x7f60, val
);
6744 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6745 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6746 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6748 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6751 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6753 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6755 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6756 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6757 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6758 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6759 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6761 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6762 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6763 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6765 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6766 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6767 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6768 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6769 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6771 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6772 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6773 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6775 for (i
= 0; i
< 6; i
++)
6776 enter_smm_save_seg_64(vcpu
, buf
, i
);
6782 static void enter_smm(struct kvm_vcpu
*vcpu
)
6784 struct kvm_segment cs
, ds
;
6789 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6790 memset(buf
, 0, 512);
6791 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6792 enter_smm_save_state_64(vcpu
, buf
);
6794 enter_smm_save_state_32(vcpu
, buf
);
6797 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6798 * vCPU state (e.g. leave guest mode) after we've saved the state into
6799 * the SMM state-save area.
6801 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
6803 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6804 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6806 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6807 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6809 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6811 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6812 kvm_rip_write(vcpu
, 0x8000);
6814 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6815 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6816 vcpu
->arch
.cr0
= cr0
;
6818 kvm_x86_ops
->set_cr4(vcpu
, 0);
6820 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6821 dt
.address
= dt
.size
= 0;
6822 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6824 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6826 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6827 cs
.base
= vcpu
->arch
.smbase
;
6832 cs
.limit
= ds
.limit
= 0xffffffff;
6833 cs
.type
= ds
.type
= 0x3;
6834 cs
.dpl
= ds
.dpl
= 0;
6839 cs
.avl
= ds
.avl
= 0;
6840 cs
.present
= ds
.present
= 1;
6841 cs
.unusable
= ds
.unusable
= 0;
6842 cs
.padding
= ds
.padding
= 0;
6844 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6845 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6846 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6847 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6848 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6849 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6851 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6852 kvm_x86_ops
->set_efer(vcpu
, 0);
6854 kvm_update_cpuid(vcpu
);
6855 kvm_mmu_reset_context(vcpu
);
6858 static void process_smi(struct kvm_vcpu
*vcpu
)
6860 vcpu
->arch
.smi_pending
= true;
6861 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6864 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6866 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6869 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6871 u64 eoi_exit_bitmap
[4];
6873 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6876 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6878 if (irqchip_split(vcpu
->kvm
))
6879 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6881 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6882 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6883 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6885 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6886 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6887 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6890 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6892 ++vcpu
->stat
.tlb_flush
;
6893 kvm_x86_ops
->tlb_flush(vcpu
);
6896 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
6897 unsigned long start
, unsigned long end
)
6899 unsigned long apic_address
;
6902 * The physical address of apic access page is stored in the VMCS.
6903 * Update it when it becomes invalid.
6905 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6906 if (start
<= apic_address
&& apic_address
< end
)
6907 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6910 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6912 struct page
*page
= NULL
;
6914 if (!lapic_in_kernel(vcpu
))
6917 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6920 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6921 if (is_error_page(page
))
6923 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6926 * Do not pin apic access page in memory, the MMU notifier
6927 * will call us again if it is migrated or swapped out.
6931 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6934 * Returns 1 to let vcpu_run() continue the guest execution loop without
6935 * exiting to the userspace. Otherwise, the value will be returned to the
6938 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6942 dm_request_for_irq_injection(vcpu
) &&
6943 kvm_cpu_accept_dm_intr(vcpu
);
6945 bool req_immediate_exit
= false;
6947 if (kvm_request_pending(vcpu
)) {
6948 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6949 kvm_mmu_unload(vcpu
);
6950 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6951 __kvm_migrate_timers(vcpu
);
6952 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6953 kvm_gen_update_masterclock(vcpu
->kvm
);
6954 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6955 kvm_gen_kvmclock_update(vcpu
);
6956 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6957 r
= kvm_guest_time_update(vcpu
);
6961 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6962 kvm_mmu_sync_roots(vcpu
);
6963 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6964 kvm_vcpu_flush_tlb(vcpu
);
6965 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6966 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6970 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6971 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6972 vcpu
->mmio_needed
= 0;
6976 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6977 /* Page is swapped out. Do synthetic halt */
6978 vcpu
->arch
.apf
.halted
= true;
6982 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6983 record_steal_time(vcpu
);
6984 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6986 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6988 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6989 kvm_pmu_handle_event(vcpu
);
6990 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6991 kvm_pmu_deliver_pmi(vcpu
);
6992 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6993 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6994 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6995 vcpu
->arch
.ioapic_handled_vectors
)) {
6996 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6997 vcpu
->run
->eoi
.vector
=
6998 vcpu
->arch
.pending_ioapic_eoi
;
7003 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
7004 vcpu_scan_ioapic(vcpu
);
7005 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
7006 kvm_vcpu_reload_apic_access_page(vcpu
);
7007 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
7008 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7009 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
7013 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
7014 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7015 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
7019 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
7020 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
7021 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
7027 * KVM_REQ_HV_STIMER has to be processed after
7028 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7029 * depend on the guest clock being up-to-date
7031 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
7032 kvm_hv_process_stimers(vcpu
);
7035 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
7036 ++vcpu
->stat
.req_event
;
7037 kvm_apic_accept_events(vcpu
);
7038 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
7043 if (inject_pending_event(vcpu
, req_int_win
) != 0)
7044 req_immediate_exit
= true;
7046 /* Enable SMI/NMI/IRQ window open exits if needed.
7048 * SMIs have three cases:
7049 * 1) They can be nested, and then there is nothing to
7050 * do here because RSM will cause a vmexit anyway.
7051 * 2) There is an ISA-specific reason why SMI cannot be
7052 * injected, and the moment when this changes can be
7054 * 3) Or the SMI can be pending because
7055 * inject_pending_event has completed the injection
7056 * of an IRQ or NMI from the previous vmexit, and
7057 * then we request an immediate exit to inject the
7060 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
7061 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
7062 req_immediate_exit
= true;
7063 if (vcpu
->arch
.nmi_pending
)
7064 kvm_x86_ops
->enable_nmi_window(vcpu
);
7065 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
7066 kvm_x86_ops
->enable_irq_window(vcpu
);
7067 WARN_ON(vcpu
->arch
.exception
.pending
);
7070 if (kvm_lapic_enabled(vcpu
)) {
7071 update_cr8_intercept(vcpu
);
7072 kvm_lapic_sync_to_vapic(vcpu
);
7076 r
= kvm_mmu_reload(vcpu
);
7078 goto cancel_injection
;
7083 kvm_x86_ops
->prepare_guest_switch(vcpu
);
7086 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7087 * IPI are then delayed after guest entry, which ensures that they
7088 * result in virtual interrupt delivery.
7090 local_irq_disable();
7091 vcpu
->mode
= IN_GUEST_MODE
;
7093 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7096 * 1) We should set ->mode before checking ->requests. Please see
7097 * the comment in kvm_vcpu_exiting_guest_mode().
7099 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7100 * pairs with the memory barrier implicit in pi_test_and_set_on
7101 * (see vmx_deliver_posted_interrupt).
7103 * 3) This also orders the write to mode from any reads to the page
7104 * tables done while the VCPU is running. Please see the comment
7105 * in kvm_flush_remote_tlbs.
7107 smp_mb__after_srcu_read_unlock();
7110 * This handles the case where a posted interrupt was
7111 * notified with kvm_vcpu_kick.
7113 if (kvm_lapic_enabled(vcpu
)) {
7114 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
7115 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7118 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7119 || need_resched() || signal_pending(current
)) {
7120 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7124 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7126 goto cancel_injection
;
7129 kvm_load_guest_xcr0(vcpu
);
7131 if (req_immediate_exit
) {
7132 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7133 smp_send_reschedule(vcpu
->cpu
);
7136 trace_kvm_entry(vcpu
->vcpu_id
);
7137 wait_lapic_expire(vcpu
);
7138 guest_enter_irqoff();
7140 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7142 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7143 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7144 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7145 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7146 set_debugreg(vcpu
->arch
.dr6
, 6);
7147 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7150 kvm_x86_ops
->run(vcpu
);
7153 * Do this here before restoring debug registers on the host. And
7154 * since we do this before handling the vmexit, a DR access vmexit
7155 * can (a) read the correct value of the debug registers, (b) set
7156 * KVM_DEBUGREG_WONT_EXIT again.
7158 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7159 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7160 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7161 kvm_update_dr0123(vcpu
);
7162 kvm_update_dr6(vcpu
);
7163 kvm_update_dr7(vcpu
);
7164 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7168 * If the guest has used debug registers, at least dr7
7169 * will be disabled while returning to the host.
7170 * If we don't have active breakpoints in the host, we don't
7171 * care about the messed up debug address registers. But if
7172 * we have some of them active, restore the old state.
7174 if (hw_breakpoint_active())
7175 hw_breakpoint_restore();
7177 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7179 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7182 kvm_put_guest_xcr0(vcpu
);
7184 kvm_x86_ops
->handle_external_intr(vcpu
);
7188 guest_exit_irqoff();
7193 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7196 * Profile KVM exit RIPs:
7198 if (unlikely(prof_on
== KVM_PROFILING
)) {
7199 unsigned long rip
= kvm_rip_read(vcpu
);
7200 profile_hit(KVM_PROFILING
, (void *)rip
);
7203 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7204 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7206 if (vcpu
->arch
.apic_attention
)
7207 kvm_lapic_sync_from_vapic(vcpu
);
7209 vcpu
->arch
.gpa_available
= false;
7210 r
= kvm_x86_ops
->handle_exit(vcpu
);
7214 kvm_x86_ops
->cancel_injection(vcpu
);
7215 if (unlikely(vcpu
->arch
.apic_attention
))
7216 kvm_lapic_sync_from_vapic(vcpu
);
7221 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7223 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7224 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7225 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7226 kvm_vcpu_block(vcpu
);
7227 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7229 if (kvm_x86_ops
->post_block
)
7230 kvm_x86_ops
->post_block(vcpu
);
7232 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7236 kvm_apic_accept_events(vcpu
);
7237 switch(vcpu
->arch
.mp_state
) {
7238 case KVM_MP_STATE_HALTED
:
7239 vcpu
->arch
.pv
.pv_unhalted
= false;
7240 vcpu
->arch
.mp_state
=
7241 KVM_MP_STATE_RUNNABLE
;
7242 case KVM_MP_STATE_RUNNABLE
:
7243 vcpu
->arch
.apf
.halted
= false;
7245 case KVM_MP_STATE_INIT_RECEIVED
:
7254 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7256 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7257 kvm_x86_ops
->check_nested_events(vcpu
, false);
7259 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7260 !vcpu
->arch
.apf
.halted
);
7263 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7266 struct kvm
*kvm
= vcpu
->kvm
;
7268 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7269 vcpu
->arch
.l1tf_flush_l1d
= true;
7272 if (kvm_vcpu_running(vcpu
)) {
7273 r
= vcpu_enter_guest(vcpu
);
7275 r
= vcpu_block(kvm
, vcpu
);
7281 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7282 if (kvm_cpu_has_pending_timer(vcpu
))
7283 kvm_inject_pending_timer_irqs(vcpu
);
7285 if (dm_request_for_irq_injection(vcpu
) &&
7286 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7288 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7289 ++vcpu
->stat
.request_irq_exits
;
7293 kvm_check_async_pf_completion(vcpu
);
7295 if (signal_pending(current
)) {
7297 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7298 ++vcpu
->stat
.signal_exits
;
7301 if (need_resched()) {
7302 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7304 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7308 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7313 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7316 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7317 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7318 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7319 if (r
!= EMULATE_DONE
)
7324 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7326 BUG_ON(!vcpu
->arch
.pio
.count
);
7328 return complete_emulated_io(vcpu
);
7332 * Implements the following, as a state machine:
7336 * for each mmio piece in the fragment
7344 * for each mmio piece in the fragment
7349 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7351 struct kvm_run
*run
= vcpu
->run
;
7352 struct kvm_mmio_fragment
*frag
;
7355 BUG_ON(!vcpu
->mmio_needed
);
7357 /* Complete previous fragment */
7358 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7359 len
= min(8u, frag
->len
);
7360 if (!vcpu
->mmio_is_write
)
7361 memcpy(frag
->data
, run
->mmio
.data
, len
);
7363 if (frag
->len
<= 8) {
7364 /* Switch to the next fragment. */
7366 vcpu
->mmio_cur_fragment
++;
7368 /* Go forward to the next mmio piece. */
7374 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7375 vcpu
->mmio_needed
= 0;
7377 /* FIXME: return into emulator if single-stepping. */
7378 if (vcpu
->mmio_is_write
)
7380 vcpu
->mmio_read_completed
= 1;
7381 return complete_emulated_io(vcpu
);
7384 run
->exit_reason
= KVM_EXIT_MMIO
;
7385 run
->mmio
.phys_addr
= frag
->gpa
;
7386 if (vcpu
->mmio_is_write
)
7387 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7388 run
->mmio
.len
= min(8u, frag
->len
);
7389 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7390 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7395 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7399 kvm_sigset_activate(vcpu
);
7401 kvm_load_guest_fpu(vcpu
);
7403 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7404 if (kvm_run
->immediate_exit
) {
7408 kvm_vcpu_block(vcpu
);
7409 kvm_apic_accept_events(vcpu
);
7410 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7412 if (signal_pending(current
)) {
7414 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7415 ++vcpu
->stat
.signal_exits
;
7420 /* re-sync apic's tpr */
7421 if (!lapic_in_kernel(vcpu
)) {
7422 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7428 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7429 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7430 vcpu
->arch
.complete_userspace_io
= NULL
;
7435 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7437 if (kvm_run
->immediate_exit
)
7443 kvm_put_guest_fpu(vcpu
);
7444 post_kvm_run_save(vcpu
);
7445 kvm_sigset_deactivate(vcpu
);
7450 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7452 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7454 * We are here if userspace calls get_regs() in the middle of
7455 * instruction emulation. Registers state needs to be copied
7456 * back from emulation context to vcpu. Userspace shouldn't do
7457 * that usually, but some bad designed PV devices (vmware
7458 * backdoor interface) need this to work
7460 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7461 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7463 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7464 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7465 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7466 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7467 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7468 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7469 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7470 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7471 #ifdef CONFIG_X86_64
7472 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7473 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7474 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7475 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7476 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7477 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7478 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7479 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7482 regs
->rip
= kvm_rip_read(vcpu
);
7483 regs
->rflags
= kvm_get_rflags(vcpu
);
7488 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7490 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7491 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7493 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7494 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7495 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7496 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7497 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7498 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7499 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7500 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7501 #ifdef CONFIG_X86_64
7502 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7503 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7504 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7505 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7506 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7507 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7508 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7509 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7512 kvm_rip_write(vcpu
, regs
->rip
);
7513 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7515 vcpu
->arch
.exception
.pending
= false;
7517 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7522 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7524 struct kvm_segment cs
;
7526 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7530 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7532 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7533 struct kvm_sregs
*sregs
)
7537 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7538 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7539 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7540 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7541 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7542 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7544 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7545 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7547 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7548 sregs
->idt
.limit
= dt
.size
;
7549 sregs
->idt
.base
= dt
.address
;
7550 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7551 sregs
->gdt
.limit
= dt
.size
;
7552 sregs
->gdt
.base
= dt
.address
;
7554 sregs
->cr0
= kvm_read_cr0(vcpu
);
7555 sregs
->cr2
= vcpu
->arch
.cr2
;
7556 sregs
->cr3
= kvm_read_cr3(vcpu
);
7557 sregs
->cr4
= kvm_read_cr4(vcpu
);
7558 sregs
->cr8
= kvm_get_cr8(vcpu
);
7559 sregs
->efer
= vcpu
->arch
.efer
;
7560 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7562 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7564 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7565 set_bit(vcpu
->arch
.interrupt
.nr
,
7566 (unsigned long *)sregs
->interrupt_bitmap
);
7571 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7572 struct kvm_mp_state
*mp_state
)
7574 kvm_apic_accept_events(vcpu
);
7575 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7576 vcpu
->arch
.pv
.pv_unhalted
)
7577 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7579 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7584 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7585 struct kvm_mp_state
*mp_state
)
7587 if (!lapic_in_kernel(vcpu
) &&
7588 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7591 /* INITs are latched while in SMM */
7592 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7593 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7594 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7597 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7598 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7599 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7601 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7602 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7606 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7607 int reason
, bool has_error_code
, u32 error_code
)
7609 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7612 init_emulate_ctxt(vcpu
);
7614 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7615 has_error_code
, error_code
);
7618 return EMULATE_FAIL
;
7620 kvm_rip_write(vcpu
, ctxt
->eip
);
7621 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7622 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7623 return EMULATE_DONE
;
7625 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7627 int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7629 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7631 * When EFER.LME and CR0.PG are set, the processor is in
7632 * 64-bit mode (though maybe in a 32-bit code segment).
7633 * CR4.PAE and EFER.LMA must be set.
7635 if (!(sregs
->cr4
& X86_CR4_PAE
)
7636 || !(sregs
->efer
& EFER_LMA
))
7640 * Not in 64-bit mode: EFER.LMA is clear and the code
7641 * segment cannot be 64-bit.
7643 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7650 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7651 struct kvm_sregs
*sregs
)
7653 struct msr_data apic_base_msr
;
7654 int mmu_reset_needed
= 0;
7655 int cpuid_update_needed
= 0;
7656 int pending_vec
, max_bits
, idx
;
7659 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7660 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7663 if (kvm_valid_sregs(vcpu
, sregs
))
7666 apic_base_msr
.data
= sregs
->apic_base
;
7667 apic_base_msr
.host_initiated
= true;
7668 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7671 dt
.size
= sregs
->idt
.limit
;
7672 dt
.address
= sregs
->idt
.base
;
7673 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7674 dt
.size
= sregs
->gdt
.limit
;
7675 dt
.address
= sregs
->gdt
.base
;
7676 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7678 vcpu
->arch
.cr2
= sregs
->cr2
;
7679 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7680 vcpu
->arch
.cr3
= sregs
->cr3
;
7681 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7683 kvm_set_cr8(vcpu
, sregs
->cr8
);
7685 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7686 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7688 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7689 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7690 vcpu
->arch
.cr0
= sregs
->cr0
;
7692 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7693 cpuid_update_needed
|= ((kvm_read_cr4(vcpu
) ^ sregs
->cr4
) &
7694 (X86_CR4_OSXSAVE
| X86_CR4_PKE
));
7695 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7696 if (cpuid_update_needed
)
7697 kvm_update_cpuid(vcpu
);
7699 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7700 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7701 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7702 mmu_reset_needed
= 1;
7704 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7706 if (mmu_reset_needed
)
7707 kvm_mmu_reset_context(vcpu
);
7709 max_bits
= KVM_NR_INTERRUPTS
;
7710 pending_vec
= find_first_bit(
7711 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7712 if (pending_vec
< max_bits
) {
7713 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7714 pr_debug("Set back pending irq %d\n", pending_vec
);
7717 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7718 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7719 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7720 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7721 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7722 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7724 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7725 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7727 update_cr8_intercept(vcpu
);
7729 /* Older userspace won't unhalt the vcpu on reset. */
7730 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7731 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7733 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7735 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7740 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7741 struct kvm_guest_debug
*dbg
)
7743 unsigned long rflags
;
7746 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7748 if (vcpu
->arch
.exception
.pending
)
7750 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7751 kvm_queue_exception(vcpu
, DB_VECTOR
);
7753 kvm_queue_exception(vcpu
, BP_VECTOR
);
7757 * Read rflags as long as potentially injected trace flags are still
7760 rflags
= kvm_get_rflags(vcpu
);
7762 vcpu
->guest_debug
= dbg
->control
;
7763 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7764 vcpu
->guest_debug
= 0;
7766 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7767 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7768 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7769 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7771 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7772 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7774 kvm_update_dr7(vcpu
);
7776 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7777 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7778 get_segment_base(vcpu
, VCPU_SREG_CS
);
7781 * Trigger an rflags update that will inject or remove the trace
7784 kvm_set_rflags(vcpu
, rflags
);
7786 kvm_x86_ops
->update_bp_intercept(vcpu
);
7796 * Translate a guest virtual address to a guest physical address.
7798 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7799 struct kvm_translation
*tr
)
7801 unsigned long vaddr
= tr
->linear_address
;
7805 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7806 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7807 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7808 tr
->physical_address
= gpa
;
7809 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7816 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7818 struct fxregs_state
*fxsave
=
7819 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7821 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7822 fpu
->fcw
= fxsave
->cwd
;
7823 fpu
->fsw
= fxsave
->swd
;
7824 fpu
->ftwx
= fxsave
->twd
;
7825 fpu
->last_opcode
= fxsave
->fop
;
7826 fpu
->last_ip
= fxsave
->rip
;
7827 fpu
->last_dp
= fxsave
->rdp
;
7828 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7833 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7835 struct fxregs_state
*fxsave
=
7836 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7838 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7839 fxsave
->cwd
= fpu
->fcw
;
7840 fxsave
->swd
= fpu
->fsw
;
7841 fxsave
->twd
= fpu
->ftwx
;
7842 fxsave
->fop
= fpu
->last_opcode
;
7843 fxsave
->rip
= fpu
->last_ip
;
7844 fxsave
->rdp
= fpu
->last_dp
;
7845 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7850 static void fx_init(struct kvm_vcpu
*vcpu
)
7852 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7853 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7854 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7855 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7858 * Ensure guest xcr0 is valid for loading
7860 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7862 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7865 /* Swap (qemu) user FPU context for the guest FPU context. */
7866 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7869 copy_fpregs_to_fpstate(&vcpu
->arch
.user_fpu
);
7870 /* PKRU is separately restored in kvm_x86_ops->run. */
7871 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7872 ~XFEATURE_MASK_PKRU
);
7877 /* When vcpu_run ends, restore user space FPU context. */
7878 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7881 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7882 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
.state
);
7884 ++vcpu
->stat
.fpu_reload
;
7888 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7890 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7892 kvmclock_reset(vcpu
);
7894 kvm_x86_ops
->vcpu_free(vcpu
);
7895 free_cpumask_var(wbinvd_dirty_mask
);
7898 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7901 struct kvm_vcpu
*vcpu
;
7903 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7904 printk_once(KERN_WARNING
7905 "kvm: SMP vm created on host with unstable TSC; "
7906 "guest TSC will not be reliable\n");
7908 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7913 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7917 kvm_vcpu_mtrr_init(vcpu
);
7918 r
= vcpu_load(vcpu
);
7921 kvm_vcpu_reset(vcpu
, false);
7922 kvm_mmu_setup(vcpu
);
7927 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7929 struct msr_data msr
;
7930 struct kvm
*kvm
= vcpu
->kvm
;
7932 kvm_hv_vcpu_postcreate(vcpu
);
7934 if (vcpu_load(vcpu
))
7937 msr
.index
= MSR_IA32_TSC
;
7938 msr
.host_initiated
= true;
7939 kvm_write_tsc(vcpu
, &msr
);
7942 if (!kvmclock_periodic_sync
)
7945 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7946 KVMCLOCK_SYNC_PERIOD
);
7949 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7952 vcpu
->arch
.apf
.msr_val
= 0;
7954 r
= vcpu_load(vcpu
);
7956 kvm_mmu_unload(vcpu
);
7959 kvm_x86_ops
->vcpu_free(vcpu
);
7962 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7964 kvm_lapic_reset(vcpu
, init_event
);
7966 vcpu
->arch
.hflags
= 0;
7968 vcpu
->arch
.smi_pending
= 0;
7969 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7970 vcpu
->arch
.nmi_pending
= 0;
7971 vcpu
->arch
.nmi_injected
= false;
7972 kvm_clear_interrupt_queue(vcpu
);
7973 kvm_clear_exception_queue(vcpu
);
7974 vcpu
->arch
.exception
.pending
= false;
7976 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7977 kvm_update_dr0123(vcpu
);
7978 vcpu
->arch
.dr6
= DR6_INIT
;
7979 kvm_update_dr6(vcpu
);
7980 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7981 kvm_update_dr7(vcpu
);
7985 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7986 vcpu
->arch
.apf
.msr_val
= 0;
7987 vcpu
->arch
.st
.msr_val
= 0;
7989 kvmclock_reset(vcpu
);
7991 kvm_clear_async_pf_completion_queue(vcpu
);
7992 kvm_async_pf_hash_reset(vcpu
);
7993 vcpu
->arch
.apf
.halted
= false;
7995 if (kvm_mpx_supported()) {
7996 void *mpx_state_buffer
;
7999 * To avoid have the INIT path from kvm_apic_has_events() that be
8000 * called with loaded FPU and does not let userspace fix the state.
8003 kvm_put_guest_fpu(vcpu
);
8004 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8005 XFEATURE_MASK_BNDREGS
);
8006 if (mpx_state_buffer
)
8007 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
8008 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8009 XFEATURE_MASK_BNDCSR
);
8010 if (mpx_state_buffer
)
8011 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
8013 kvm_load_guest_fpu(vcpu
);
8017 kvm_pmu_reset(vcpu
);
8018 vcpu
->arch
.smbase
= 0x30000;
8020 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
8021 vcpu
->arch
.msr_misc_features_enables
= 0;
8023 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8026 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
8027 vcpu
->arch
.regs_avail
= ~0;
8028 vcpu
->arch
.regs_dirty
= ~0;
8030 vcpu
->arch
.ia32_xss
= 0;
8032 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
8035 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
8037 struct kvm_segment cs
;
8039 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8040 cs
.selector
= vector
<< 8;
8041 cs
.base
= vector
<< 12;
8042 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8043 kvm_rip_write(vcpu
, 0);
8046 int kvm_arch_hardware_enable(void)
8049 struct kvm_vcpu
*vcpu
;
8054 bool stable
, backwards_tsc
= false;
8056 kvm_shared_msr_cpu_online();
8057 ret
= kvm_x86_ops
->hardware_enable();
8061 local_tsc
= rdtsc();
8062 stable
= !check_tsc_unstable();
8063 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8064 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8065 if (!stable
&& vcpu
->cpu
== smp_processor_id())
8066 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8067 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
8068 backwards_tsc
= true;
8069 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
8070 max_tsc
= vcpu
->arch
.last_host_tsc
;
8076 * Sometimes, even reliable TSCs go backwards. This happens on
8077 * platforms that reset TSC during suspend or hibernate actions, but
8078 * maintain synchronization. We must compensate. Fortunately, we can
8079 * detect that condition here, which happens early in CPU bringup,
8080 * before any KVM threads can be running. Unfortunately, we can't
8081 * bring the TSCs fully up to date with real time, as we aren't yet far
8082 * enough into CPU bringup that we know how much real time has actually
8083 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8084 * variables that haven't been updated yet.
8086 * So we simply find the maximum observed TSC above, then record the
8087 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8088 * the adjustment will be applied. Note that we accumulate
8089 * adjustments, in case multiple suspend cycles happen before some VCPU
8090 * gets a chance to run again. In the event that no KVM threads get a
8091 * chance to run, we will miss the entire elapsed period, as we'll have
8092 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8093 * loose cycle time. This isn't too big a deal, since the loss will be
8094 * uniform across all VCPUs (not to mention the scenario is extremely
8095 * unlikely). It is possible that a second hibernate recovery happens
8096 * much faster than a first, causing the observed TSC here to be
8097 * smaller; this would require additional padding adjustment, which is
8098 * why we set last_host_tsc to the local tsc observed here.
8100 * N.B. - this code below runs only on platforms with reliable TSC,
8101 * as that is the only way backwards_tsc is set above. Also note
8102 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8103 * have the same delta_cyc adjustment applied if backwards_tsc
8104 * is detected. Note further, this adjustment is only done once,
8105 * as we reset last_host_tsc on all VCPUs to stop this from being
8106 * called multiple times (one for each physical CPU bringup).
8108 * Platforms with unreliable TSCs don't have to deal with this, they
8109 * will be compensated by the logic in vcpu_load, which sets the TSC to
8110 * catchup mode. This will catchup all VCPUs to real time, but cannot
8111 * guarantee that they stay in perfect synchronization.
8113 if (backwards_tsc
) {
8114 u64 delta_cyc
= max_tsc
- local_tsc
;
8115 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8116 kvm
->arch
.backwards_tsc_observed
= true;
8117 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8118 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
8119 vcpu
->arch
.last_host_tsc
= local_tsc
;
8120 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8124 * We have to disable TSC offset matching.. if you were
8125 * booting a VM while issuing an S4 host suspend....
8126 * you may have some problem. Solving this issue is
8127 * left as an exercise to the reader.
8129 kvm
->arch
.last_tsc_nsec
= 0;
8130 kvm
->arch
.last_tsc_write
= 0;
8137 void kvm_arch_hardware_disable(void)
8139 kvm_x86_ops
->hardware_disable();
8140 drop_user_return_notifiers();
8143 int kvm_arch_hardware_setup(void)
8147 r
= kvm_x86_ops
->hardware_setup();
8151 if (kvm_has_tsc_control
) {
8153 * Make sure the user can only configure tsc_khz values that
8154 * fit into a signed integer.
8155 * A min value is not calculated needed because it will always
8156 * be 1 on all machines.
8158 u64 max
= min(0x7fffffffULL
,
8159 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8160 kvm_max_guest_tsc_khz
= max
;
8162 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8165 kvm_init_msr_list();
8169 void kvm_arch_hardware_unsetup(void)
8171 kvm_x86_ops
->hardware_unsetup();
8174 void kvm_arch_check_processor_compat(void *rtn
)
8176 kvm_x86_ops
->check_processor_compatibility(rtn
);
8179 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8181 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8183 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8185 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8187 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8190 struct static_key kvm_no_apic_vcpu __read_mostly
;
8191 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8193 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8198 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8199 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8200 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8201 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8203 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8205 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8210 vcpu
->arch
.pio_data
= page_address(page
);
8212 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8214 r
= kvm_mmu_create(vcpu
);
8216 goto fail_free_pio_data
;
8218 if (irqchip_in_kernel(vcpu
->kvm
)) {
8219 r
= kvm_create_lapic(vcpu
);
8221 goto fail_mmu_destroy
;
8223 static_key_slow_inc(&kvm_no_apic_vcpu
);
8225 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8227 if (!vcpu
->arch
.mce_banks
) {
8229 goto fail_free_lapic
;
8231 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8233 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8235 goto fail_free_mce_banks
;
8240 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8242 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8244 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8246 kvm_async_pf_hash_reset(vcpu
);
8249 vcpu
->arch
.pending_external_vector
= -1;
8250 vcpu
->arch
.preempted_in_kernel
= false;
8252 kvm_hv_vcpu_init(vcpu
);
8256 fail_free_mce_banks
:
8257 kfree(vcpu
->arch
.mce_banks
);
8259 kvm_free_lapic(vcpu
);
8261 kvm_mmu_destroy(vcpu
);
8263 free_page((unsigned long)vcpu
->arch
.pio_data
);
8268 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8272 kvm_hv_vcpu_uninit(vcpu
);
8273 kvm_pmu_destroy(vcpu
);
8274 kfree(vcpu
->arch
.mce_banks
);
8275 kvm_free_lapic(vcpu
);
8276 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8277 kvm_mmu_destroy(vcpu
);
8278 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8279 free_page((unsigned long)vcpu
->arch
.pio_data
);
8280 if (!lapic_in_kernel(vcpu
))
8281 static_key_slow_dec(&kvm_no_apic_vcpu
);
8284 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8286 vcpu
->arch
.l1tf_flush_l1d
= true;
8287 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8290 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8295 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8296 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8297 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8298 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8299 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8301 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8302 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8303 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8304 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8305 &kvm
->arch
.irq_sources_bitmap
);
8307 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8308 mutex_init(&kvm
->arch
.apic_map_lock
);
8309 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8310 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8312 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8313 pvclock_update_vm_gtod_copy(kvm
);
8315 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8316 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8318 kvm_page_track_init(kvm
);
8319 kvm_mmu_init_vm(kvm
);
8321 if (kvm_x86_ops
->vm_init
)
8322 return kvm_x86_ops
->vm_init(kvm
);
8327 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8330 r
= vcpu_load(vcpu
);
8332 kvm_mmu_unload(vcpu
);
8336 static void kvm_free_vcpus(struct kvm
*kvm
)
8339 struct kvm_vcpu
*vcpu
;
8342 * Unpin any mmu pages first.
8344 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8345 kvm_clear_async_pf_completion_queue(vcpu
);
8346 kvm_unload_vcpu_mmu(vcpu
);
8348 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8349 kvm_arch_vcpu_free(vcpu
);
8351 mutex_lock(&kvm
->lock
);
8352 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8353 kvm
->vcpus
[i
] = NULL
;
8355 atomic_set(&kvm
->online_vcpus
, 0);
8356 mutex_unlock(&kvm
->lock
);
8359 void kvm_arch_sync_events(struct kvm
*kvm
)
8361 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8362 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8366 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8370 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8371 struct kvm_memory_slot
*slot
, old
;
8373 /* Called with kvm->slots_lock held. */
8374 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8377 slot
= id_to_memslot(slots
, id
);
8383 * MAP_SHARED to prevent internal slot pages from being moved
8386 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8387 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8388 if (IS_ERR((void *)hva
))
8389 return PTR_ERR((void *)hva
);
8398 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8399 struct kvm_userspace_memory_region m
;
8401 m
.slot
= id
| (i
<< 16);
8403 m
.guest_phys_addr
= gpa
;
8404 m
.userspace_addr
= hva
;
8405 m
.memory_size
= size
;
8406 r
= __kvm_set_memory_region(kvm
, &m
);
8412 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8416 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8418 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8422 mutex_lock(&kvm
->slots_lock
);
8423 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8424 mutex_unlock(&kvm
->slots_lock
);
8428 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8430 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8432 if (current
->mm
== kvm
->mm
) {
8434 * Free memory regions allocated on behalf of userspace,
8435 * unless the the memory map has changed due to process exit
8438 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8439 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8440 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8442 if (kvm_x86_ops
->vm_destroy
)
8443 kvm_x86_ops
->vm_destroy(kvm
);
8444 kvm_pic_destroy(kvm
);
8445 kvm_ioapic_destroy(kvm
);
8446 kvm_free_vcpus(kvm
);
8447 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8448 kvm_mmu_uninit_vm(kvm
);
8449 kvm_page_track_cleanup(kvm
);
8452 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8453 struct kvm_memory_slot
*dont
)
8457 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8458 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8459 kvfree(free
->arch
.rmap
[i
]);
8460 free
->arch
.rmap
[i
] = NULL
;
8465 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8466 dont
->arch
.lpage_info
[i
- 1]) {
8467 kvfree(free
->arch
.lpage_info
[i
- 1]);
8468 free
->arch
.lpage_info
[i
- 1] = NULL
;
8472 kvm_page_track_free_memslot(free
, dont
);
8475 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8476 unsigned long npages
)
8480 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8481 struct kvm_lpage_info
*linfo
;
8486 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8487 slot
->base_gfn
, level
) + 1;
8489 slot
->arch
.rmap
[i
] =
8490 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8491 if (!slot
->arch
.rmap
[i
])
8496 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8500 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8502 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8503 linfo
[0].disallow_lpage
= 1;
8504 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8505 linfo
[lpages
- 1].disallow_lpage
= 1;
8506 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8508 * If the gfn and userspace address are not aligned wrt each
8509 * other, or if explicitly asked to, disable large page
8510 * support for this slot
8512 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8513 !kvm_largepages_enabled()) {
8516 for (j
= 0; j
< lpages
; ++j
)
8517 linfo
[j
].disallow_lpage
= 1;
8521 if (kvm_page_track_create_memslot(slot
, npages
))
8527 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8528 kvfree(slot
->arch
.rmap
[i
]);
8529 slot
->arch
.rmap
[i
] = NULL
;
8533 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8534 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8539 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8542 * memslots->generation has been incremented.
8543 * mmio generation may have reached its maximum value.
8545 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8548 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8549 struct kvm_memory_slot
*memslot
,
8550 const struct kvm_userspace_memory_region
*mem
,
8551 enum kvm_mr_change change
)
8556 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8557 struct kvm_memory_slot
*new)
8559 /* Still write protect RO slot */
8560 if (new->flags
& KVM_MEM_READONLY
) {
8561 kvm_mmu_slot_remove_write_access(kvm
, new);
8566 * Call kvm_x86_ops dirty logging hooks when they are valid.
8568 * kvm_x86_ops->slot_disable_log_dirty is called when:
8570 * - KVM_MR_CREATE with dirty logging is disabled
8571 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8573 * The reason is, in case of PML, we need to set D-bit for any slots
8574 * with dirty logging disabled in order to eliminate unnecessary GPA
8575 * logging in PML buffer (and potential PML buffer full VMEXT). This
8576 * guarantees leaving PML enabled during guest's lifetime won't have
8577 * any additonal overhead from PML when guest is running with dirty
8578 * logging disabled for memory slots.
8580 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8581 * to dirty logging mode.
8583 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8585 * In case of write protect:
8587 * Write protect all pages for dirty logging.
8589 * All the sptes including the large sptes which point to this
8590 * slot are set to readonly. We can not create any new large
8591 * spte on this slot until the end of the logging.
8593 * See the comments in fast_page_fault().
8595 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8596 if (kvm_x86_ops
->slot_enable_log_dirty
)
8597 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8599 kvm_mmu_slot_remove_write_access(kvm
, new);
8601 if (kvm_x86_ops
->slot_disable_log_dirty
)
8602 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8606 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8607 const struct kvm_userspace_memory_region
*mem
,
8608 const struct kvm_memory_slot
*old
,
8609 const struct kvm_memory_slot
*new,
8610 enum kvm_mr_change change
)
8612 int nr_mmu_pages
= 0;
8614 if (!kvm
->arch
.n_requested_mmu_pages
)
8615 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8618 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8621 * Dirty logging tracks sptes in 4k granularity, meaning that large
8622 * sptes have to be split. If live migration is successful, the guest
8623 * in the source machine will be destroyed and large sptes will be
8624 * created in the destination. However, if the guest continues to run
8625 * in the source machine (for example if live migration fails), small
8626 * sptes will remain around and cause bad performance.
8628 * Scan sptes if dirty logging has been stopped, dropping those
8629 * which can be collapsed into a single large-page spte. Later
8630 * page faults will create the large-page sptes.
8632 if ((change
!= KVM_MR_DELETE
) &&
8633 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8634 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8635 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8638 * Set up write protection and/or dirty logging for the new slot.
8640 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8641 * been zapped so no dirty logging staff is needed for old slot. For
8642 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8643 * new and it's also covered when dealing with the new slot.
8645 * FIXME: const-ify all uses of struct kvm_memory_slot.
8647 if (change
!= KVM_MR_DELETE
)
8648 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8651 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8653 kvm_mmu_invalidate_zap_all_pages(kvm
);
8656 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8657 struct kvm_memory_slot
*slot
)
8659 kvm_page_track_flush_slot(kvm
, slot
);
8662 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8664 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8667 if (kvm_apic_has_events(vcpu
))
8670 if (vcpu
->arch
.pv
.pv_unhalted
)
8673 if (vcpu
->arch
.exception
.pending
)
8676 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8677 (vcpu
->arch
.nmi_pending
&&
8678 kvm_x86_ops
->nmi_allowed(vcpu
)))
8681 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8682 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8685 if (kvm_arch_interrupt_allowed(vcpu
) &&
8686 kvm_cpu_has_interrupt(vcpu
))
8689 if (kvm_hv_has_stimer_pending(vcpu
))
8695 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8697 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8700 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8702 return vcpu
->arch
.preempted_in_kernel
;
8705 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8707 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8710 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8712 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8715 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8717 if (is_64_bit_mode(vcpu
))
8718 return kvm_rip_read(vcpu
);
8719 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8720 kvm_rip_read(vcpu
));
8722 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8724 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8726 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8728 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8730 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8732 unsigned long rflags
;
8734 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8735 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8736 rflags
&= ~X86_EFLAGS_TF
;
8739 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8741 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8743 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8744 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8745 rflags
|= X86_EFLAGS_TF
;
8746 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8749 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8751 __kvm_set_rflags(vcpu
, rflags
);
8752 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8754 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8756 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8760 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8764 r
= kvm_mmu_reload(vcpu
);
8768 if (!vcpu
->arch
.mmu
.direct_map
&&
8769 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8772 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8775 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8777 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8780 static inline u32
kvm_async_pf_next_probe(u32 key
)
8782 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8785 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8787 u32 key
= kvm_async_pf_hash_fn(gfn
);
8789 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8790 key
= kvm_async_pf_next_probe(key
);
8792 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8795 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8798 u32 key
= kvm_async_pf_hash_fn(gfn
);
8800 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8801 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8802 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8803 key
= kvm_async_pf_next_probe(key
);
8808 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8810 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8813 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8817 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8819 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8821 j
= kvm_async_pf_next_probe(j
);
8822 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8824 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8826 * k lies cyclically in ]i,j]
8828 * |....j i.k.| or |.k..j i...|
8830 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8831 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8836 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8839 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8843 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8846 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8850 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8851 struct kvm_async_pf
*work
)
8853 struct x86_exception fault
;
8855 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8856 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8858 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8859 (vcpu
->arch
.apf
.send_user_only
&&
8860 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8861 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8862 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8863 fault
.vector
= PF_VECTOR
;
8864 fault
.error_code_valid
= true;
8865 fault
.error_code
= 0;
8866 fault
.nested_page_fault
= false;
8867 fault
.address
= work
->arch
.token
;
8868 fault
.async_page_fault
= true;
8869 kvm_inject_page_fault(vcpu
, &fault
);
8873 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8874 struct kvm_async_pf
*work
)
8876 struct x86_exception fault
;
8879 if (work
->wakeup_all
)
8880 work
->arch
.token
= ~0; /* broadcast wakeup */
8882 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8883 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8885 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
8886 !apf_get_user(vcpu
, &val
)) {
8887 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
8888 vcpu
->arch
.exception
.pending
&&
8889 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
8890 !apf_put_user(vcpu
, 0)) {
8891 vcpu
->arch
.exception
.injected
= false;
8892 vcpu
->arch
.exception
.pending
= false;
8893 vcpu
->arch
.exception
.nr
= 0;
8894 vcpu
->arch
.exception
.has_error_code
= false;
8895 vcpu
->arch
.exception
.error_code
= 0;
8896 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8897 fault
.vector
= PF_VECTOR
;
8898 fault
.error_code_valid
= true;
8899 fault
.error_code
= 0;
8900 fault
.nested_page_fault
= false;
8901 fault
.address
= work
->arch
.token
;
8902 fault
.async_page_fault
= true;
8903 kvm_inject_page_fault(vcpu
, &fault
);
8906 vcpu
->arch
.apf
.halted
= false;
8907 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8910 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8912 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8915 return kvm_can_do_async_pf(vcpu
);
8918 void kvm_arch_start_assignment(struct kvm
*kvm
)
8920 atomic_inc(&kvm
->arch
.assigned_device_count
);
8922 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8924 void kvm_arch_end_assignment(struct kvm
*kvm
)
8926 atomic_dec(&kvm
->arch
.assigned_device_count
);
8928 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8930 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8932 return atomic_read(&kvm
->arch
.assigned_device_count
);
8934 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8936 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8938 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8940 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8942 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8944 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8946 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8948 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8950 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8952 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8954 bool kvm_arch_has_irq_bypass(void)
8956 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8959 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8960 struct irq_bypass_producer
*prod
)
8962 struct kvm_kernel_irqfd
*irqfd
=
8963 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8965 irqfd
->producer
= prod
;
8967 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8968 prod
->irq
, irqfd
->gsi
, 1);
8971 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8972 struct irq_bypass_producer
*prod
)
8975 struct kvm_kernel_irqfd
*irqfd
=
8976 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8978 WARN_ON(irqfd
->producer
!= prod
);
8979 irqfd
->producer
= NULL
;
8982 * When producer of consumer is unregistered, we change back to
8983 * remapped mode, so we can re-use the current implementation
8984 * when the irq is masked/disabled or the consumer side (KVM
8985 * int this case doesn't want to receive the interrupts.
8987 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8989 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8990 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8993 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8994 uint32_t guest_irq
, bool set
)
8996 if (!kvm_x86_ops
->update_pi_irte
)
8999 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
9002 bool kvm_vector_hashing_enabled(void)
9004 return vector_hashing
;
9006 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
9008 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
9009 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
9010 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
9011 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
9012 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
9013 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
9014 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
9015 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
9016 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
9017 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
9018 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
9019 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
9020 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
9021 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
9022 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
9023 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
9024 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
9025 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
9026 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);