2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 struct kvm_x86_ops
*kvm_x86_ops
;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
94 static bool ignore_msrs
= 0;
95 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
97 bool kvm_has_tsc_control
;
98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
99 u32 kvm_max_guest_tsc_khz
;
100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
103 static u32 tsc_tolerance_ppm
= 250;
104 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
106 #define KVM_NR_SHARED_MSRS 16
108 struct kvm_shared_msrs_global
{
110 u32 msrs
[KVM_NR_SHARED_MSRS
];
113 struct kvm_shared_msrs
{
114 struct user_return_notifier urn
;
116 struct kvm_shared_msr_values
{
119 } values
[KVM_NR_SHARED_MSRS
];
122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
123 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
125 struct kvm_stats_debugfs_item debugfs_entries
[] = {
126 { "pf_fixed", VCPU_STAT(pf_fixed
) },
127 { "pf_guest", VCPU_STAT(pf_guest
) },
128 { "tlb_flush", VCPU_STAT(tlb_flush
) },
129 { "invlpg", VCPU_STAT(invlpg
) },
130 { "exits", VCPU_STAT(exits
) },
131 { "io_exits", VCPU_STAT(io_exits
) },
132 { "mmio_exits", VCPU_STAT(mmio_exits
) },
133 { "signal_exits", VCPU_STAT(signal_exits
) },
134 { "irq_window", VCPU_STAT(irq_window_exits
) },
135 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
136 { "halt_exits", VCPU_STAT(halt_exits
) },
137 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
138 { "hypercalls", VCPU_STAT(hypercalls
) },
139 { "request_irq", VCPU_STAT(request_irq_exits
) },
140 { "irq_exits", VCPU_STAT(irq_exits
) },
141 { "host_state_reload", VCPU_STAT(host_state_reload
) },
142 { "efer_reload", VCPU_STAT(efer_reload
) },
143 { "fpu_reload", VCPU_STAT(fpu_reload
) },
144 { "insn_emulation", VCPU_STAT(insn_emulation
) },
145 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
146 { "irq_injections", VCPU_STAT(irq_injections
) },
147 { "nmi_injections", VCPU_STAT(nmi_injections
) },
148 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
149 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
150 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
151 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
152 { "mmu_flooded", VM_STAT(mmu_flooded
) },
153 { "mmu_recycled", VM_STAT(mmu_recycled
) },
154 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
155 { "mmu_unsync", VM_STAT(mmu_unsync
) },
156 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
157 { "largepages", VM_STAT(lpages
) },
161 u64 __read_mostly host_xcr0
;
163 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
165 static int kvm_vcpu_reset(struct kvm_vcpu
*vcpu
);
167 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
170 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
171 vcpu
->arch
.apf
.gfns
[i
] = ~0;
174 static void kvm_on_user_return(struct user_return_notifier
*urn
)
177 struct kvm_shared_msrs
*locals
178 = container_of(urn
, struct kvm_shared_msrs
, urn
);
179 struct kvm_shared_msr_values
*values
;
181 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
182 values
= &locals
->values
[slot
];
183 if (values
->host
!= values
->curr
) {
184 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
185 values
->curr
= values
->host
;
188 locals
->registered
= false;
189 user_return_notifier_unregister(urn
);
192 static void shared_msr_update(unsigned slot
, u32 msr
)
194 struct kvm_shared_msrs
*smsr
;
197 smsr
= &__get_cpu_var(shared_msrs
);
198 /* only read, and nobody should modify it at this time,
199 * so don't need lock */
200 if (slot
>= shared_msrs_global
.nr
) {
201 printk(KERN_ERR
"kvm: invalid MSR slot!");
204 rdmsrl_safe(msr
, &value
);
205 smsr
->values
[slot
].host
= value
;
206 smsr
->values
[slot
].curr
= value
;
209 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
211 if (slot
>= shared_msrs_global
.nr
)
212 shared_msrs_global
.nr
= slot
+ 1;
213 shared_msrs_global
.msrs
[slot
] = msr
;
214 /* we need ensured the shared_msr_global have been updated */
217 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
219 static void kvm_shared_msr_cpu_online(void)
223 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
224 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
227 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
229 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
231 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
233 smsr
->values
[slot
].curr
= value
;
234 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
235 if (!smsr
->registered
) {
236 smsr
->urn
.on_user_return
= kvm_on_user_return
;
237 user_return_notifier_register(&smsr
->urn
);
238 smsr
->registered
= true;
241 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
243 static void drop_user_return_notifiers(void *ignore
)
245 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
247 if (smsr
->registered
)
248 kvm_on_user_return(&smsr
->urn
);
251 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
253 return vcpu
->arch
.apic_base
;
255 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
257 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
259 /* TODO: reserve bits check */
260 kvm_lapic_set_base(vcpu
, data
);
262 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
264 #define EXCPT_BENIGN 0
265 #define EXCPT_CONTRIBUTORY 1
268 static int exception_class(int vector
)
278 return EXCPT_CONTRIBUTORY
;
285 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
286 unsigned nr
, bool has_error
, u32 error_code
,
292 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
294 if (!vcpu
->arch
.exception
.pending
) {
296 vcpu
->arch
.exception
.pending
= true;
297 vcpu
->arch
.exception
.has_error_code
= has_error
;
298 vcpu
->arch
.exception
.nr
= nr
;
299 vcpu
->arch
.exception
.error_code
= error_code
;
300 vcpu
->arch
.exception
.reinject
= reinject
;
304 /* to check exception */
305 prev_nr
= vcpu
->arch
.exception
.nr
;
306 if (prev_nr
== DF_VECTOR
) {
307 /* triple fault -> shutdown */
308 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
311 class1
= exception_class(prev_nr
);
312 class2
= exception_class(nr
);
313 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
314 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
315 /* generate double fault per SDM Table 5-5 */
316 vcpu
->arch
.exception
.pending
= true;
317 vcpu
->arch
.exception
.has_error_code
= true;
318 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
319 vcpu
->arch
.exception
.error_code
= 0;
321 /* replace previous exception with a new one in a hope
322 that instruction re-execution will regenerate lost
327 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
329 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
331 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
333 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
335 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
337 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
339 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
342 kvm_inject_gp(vcpu
, 0);
344 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
346 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
348 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
350 ++vcpu
->stat
.pf_guest
;
351 vcpu
->arch
.cr2
= fault
->address
;
352 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
354 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
356 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
358 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
359 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
361 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
364 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
366 atomic_inc(&vcpu
->arch
.nmi_queued
);
367 kvm_make_request(KVM_REQ_NMI
, vcpu
);
369 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
371 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
373 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
375 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
377 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
379 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
381 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
384 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
385 * a #GP and return false.
387 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
389 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
391 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
394 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
397 * This function will be used to read from the physical memory of the currently
398 * running guest. The difference to kvm_read_guest_page is that this function
399 * can read from guest physical or from the guest's guest physical memory.
401 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
402 gfn_t ngfn
, void *data
, int offset
, int len
,
408 ngpa
= gfn_to_gpa(ngfn
);
409 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
410 if (real_gfn
== UNMAPPED_GVA
)
413 real_gfn
= gpa_to_gfn(real_gfn
);
415 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
417 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
419 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
420 void *data
, int offset
, int len
, u32 access
)
422 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
423 data
, offset
, len
, access
);
427 * Load the pae pdptrs. Return true is they are all valid.
429 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
431 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
432 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
435 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
437 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
438 offset
* sizeof(u64
), sizeof(pdpte
),
439 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
444 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
445 if (is_present_gpte(pdpte
[i
]) &&
446 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
453 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
454 __set_bit(VCPU_EXREG_PDPTR
,
455 (unsigned long *)&vcpu
->arch
.regs_avail
);
456 __set_bit(VCPU_EXREG_PDPTR
,
457 (unsigned long *)&vcpu
->arch
.regs_dirty
);
462 EXPORT_SYMBOL_GPL(load_pdptrs
);
464 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
466 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
472 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
475 if (!test_bit(VCPU_EXREG_PDPTR
,
476 (unsigned long *)&vcpu
->arch
.regs_avail
))
479 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
480 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
481 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
482 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
485 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
491 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
493 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
494 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
495 X86_CR0_CD
| X86_CR0_NW
;
500 if (cr0
& 0xffffffff00000000UL
)
504 cr0
&= ~CR0_RESERVED_BITS
;
506 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
509 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
512 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
514 if ((vcpu
->arch
.efer
& EFER_LME
)) {
519 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
524 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
529 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
532 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
534 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
535 kvm_clear_async_pf_completion_queue(vcpu
);
536 kvm_async_pf_hash_reset(vcpu
);
539 if ((cr0
^ old_cr0
) & update_bits
)
540 kvm_mmu_reset_context(vcpu
);
543 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
545 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
547 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
549 EXPORT_SYMBOL_GPL(kvm_lmsw
);
551 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
555 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
556 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
559 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
561 if (!(xcr0
& XSTATE_FP
))
563 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
565 if (xcr0
& ~host_xcr0
)
567 vcpu
->arch
.xcr0
= xcr0
;
568 vcpu
->guest_xcr0_loaded
= 0;
572 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
574 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
575 kvm_inject_gp(vcpu
, 0);
580 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
582 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
584 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
585 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
586 X86_CR4_PAE
| X86_CR4_SMEP
;
587 if (cr4
& CR4_RESERVED_BITS
)
590 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
593 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
596 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_RDWRGSFS
))
599 if (is_long_mode(vcpu
)) {
600 if (!(cr4
& X86_CR4_PAE
))
602 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
603 && ((cr4
^ old_cr4
) & pdptr_bits
)
604 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
608 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
609 if (!guest_cpuid_has_pcid(vcpu
))
612 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
613 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
617 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
620 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
621 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
622 kvm_mmu_reset_context(vcpu
);
624 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
625 kvm_update_cpuid(vcpu
);
629 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
631 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
633 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
634 kvm_mmu_sync_roots(vcpu
);
635 kvm_mmu_flush_tlb(vcpu
);
639 if (is_long_mode(vcpu
)) {
640 if (kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
)) {
641 if (cr3
& CR3_PCID_ENABLED_RESERVED_BITS
)
644 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
648 if (cr3
& CR3_PAE_RESERVED_BITS
)
650 if (is_paging(vcpu
) &&
651 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
655 * We don't check reserved bits in nonpae mode, because
656 * this isn't enforced, and VMware depends on this.
661 * Does the new cr3 value map to physical memory? (Note, we
662 * catch an invalid cr3 even in real-mode, because it would
663 * cause trouble later on when we turn on paging anyway.)
665 * A real CPU would silently accept an invalid cr3 and would
666 * attempt to use it - with largely undefined (and often hard
667 * to debug) behavior on the guest side.
669 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
671 vcpu
->arch
.cr3
= cr3
;
672 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
673 vcpu
->arch
.mmu
.new_cr3(vcpu
);
676 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
678 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
680 if (cr8
& CR8_RESERVED_BITS
)
682 if (irqchip_in_kernel(vcpu
->kvm
))
683 kvm_lapic_set_tpr(vcpu
, cr8
);
685 vcpu
->arch
.cr8
= cr8
;
688 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
690 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
692 if (irqchip_in_kernel(vcpu
->kvm
))
693 return kvm_lapic_get_cr8(vcpu
);
695 return vcpu
->arch
.cr8
;
697 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
699 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
703 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
704 dr7
= vcpu
->arch
.guest_debug_dr7
;
706 dr7
= vcpu
->arch
.dr7
;
707 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
708 vcpu
->arch
.switch_db_regs
= (dr7
& DR7_BP_EN_MASK
);
711 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
715 vcpu
->arch
.db
[dr
] = val
;
716 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
717 vcpu
->arch
.eff_db
[dr
] = val
;
720 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
724 if (val
& 0xffffffff00000000ULL
)
726 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
729 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
733 if (val
& 0xffffffff00000000ULL
)
735 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
736 kvm_update_dr7(vcpu
);
743 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
747 res
= __kvm_set_dr(vcpu
, dr
, val
);
749 kvm_queue_exception(vcpu
, UD_VECTOR
);
751 kvm_inject_gp(vcpu
, 0);
755 EXPORT_SYMBOL_GPL(kvm_set_dr
);
757 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
761 *val
= vcpu
->arch
.db
[dr
];
764 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
768 *val
= vcpu
->arch
.dr6
;
771 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
775 *val
= vcpu
->arch
.dr7
;
782 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
784 if (_kvm_get_dr(vcpu
, dr
, val
)) {
785 kvm_queue_exception(vcpu
, UD_VECTOR
);
790 EXPORT_SYMBOL_GPL(kvm_get_dr
);
792 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
794 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
798 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
801 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
802 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
805 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
808 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
809 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
811 * This list is modified at module load time to reflect the
812 * capabilities of the host cpu. This capabilities test skips MSRs that are
813 * kvm-specific. Those are put in the beginning of the list.
816 #define KVM_SAVE_MSRS_BEGIN 10
817 static u32 msrs_to_save
[] = {
818 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
819 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
820 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
821 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
823 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
826 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
828 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
831 static unsigned num_msrs_to_save
;
833 static const u32 emulated_msrs
[] = {
834 MSR_IA32_TSCDEADLINE
,
835 MSR_IA32_MISC_ENABLE
,
840 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
842 u64 old_efer
= vcpu
->arch
.efer
;
844 if (efer
& efer_reserved_bits
)
848 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
851 if (efer
& EFER_FFXSR
) {
852 struct kvm_cpuid_entry2
*feat
;
854 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
855 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
859 if (efer
& EFER_SVME
) {
860 struct kvm_cpuid_entry2
*feat
;
862 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
863 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
868 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
870 kvm_x86_ops
->set_efer(vcpu
, efer
);
872 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
874 /* Update reserved bits */
875 if ((efer
^ old_efer
) & EFER_NX
)
876 kvm_mmu_reset_context(vcpu
);
881 void kvm_enable_efer_bits(u64 mask
)
883 efer_reserved_bits
&= ~mask
;
885 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
889 * Writes msr value into into the appropriate "register".
890 * Returns 0 on success, non-0 otherwise.
891 * Assumes vcpu_load() was already called.
893 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
895 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
899 * Adapt set_msr() to msr_io()'s calling convention
901 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
903 return kvm_set_msr(vcpu
, index
, *data
);
907 struct pvclock_gtod_data
{
910 struct { /* extract of a clocksource struct */
918 /* open coded 'struct timespec' */
919 u64 monotonic_time_snsec
;
920 time_t monotonic_time_sec
;
923 static struct pvclock_gtod_data pvclock_gtod_data
;
925 static void update_pvclock_gtod(struct timekeeper
*tk
)
927 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
929 write_seqcount_begin(&vdata
->seq
);
931 /* copy pvclock gtod data */
932 vdata
->clock
.vclock_mode
= tk
->clock
->archdata
.vclock_mode
;
933 vdata
->clock
.cycle_last
= tk
->clock
->cycle_last
;
934 vdata
->clock
.mask
= tk
->clock
->mask
;
935 vdata
->clock
.mult
= tk
->mult
;
936 vdata
->clock
.shift
= tk
->shift
;
938 vdata
->monotonic_time_sec
= tk
->xtime_sec
939 + tk
->wall_to_monotonic
.tv_sec
;
940 vdata
->monotonic_time_snsec
= tk
->xtime_nsec
941 + (tk
->wall_to_monotonic
.tv_nsec
943 while (vdata
->monotonic_time_snsec
>=
944 (((u64
)NSEC_PER_SEC
) << tk
->shift
)) {
945 vdata
->monotonic_time_snsec
-=
946 ((u64
)NSEC_PER_SEC
) << tk
->shift
;
947 vdata
->monotonic_time_sec
++;
950 write_seqcount_end(&vdata
->seq
);
955 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
959 struct pvclock_wall_clock wc
;
960 struct timespec boot
;
965 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
970 ++version
; /* first time write, random junk */
974 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
977 * The guest calculates current wall clock time by adding
978 * system time (updated by kvm_guest_time_update below) to the
979 * wall clock specified here. guest system time equals host
980 * system time for us, thus we must fill in host boot time here.
984 if (kvm
->arch
.kvmclock_offset
) {
985 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
986 boot
= timespec_sub(boot
, ts
);
988 wc
.sec
= boot
.tv_sec
;
989 wc
.nsec
= boot
.tv_nsec
;
990 wc
.version
= version
;
992 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
995 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
998 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1000 uint32_t quotient
, remainder
;
1002 /* Don't try to replace with do_div(), this one calculates
1003 * "(dividend << 32) / divisor" */
1005 : "=a" (quotient
), "=d" (remainder
)
1006 : "0" (0), "1" (dividend
), "r" (divisor
) );
1010 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1011 s8
*pshift
, u32
*pmultiplier
)
1018 tps64
= base_khz
* 1000LL;
1019 scaled64
= scaled_khz
* 1000LL;
1020 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1025 tps32
= (uint32_t)tps64
;
1026 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1027 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1035 *pmultiplier
= div_frac(scaled64
, tps32
);
1037 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1038 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1041 static inline u64
get_kernel_ns(void)
1045 WARN_ON(preemptible());
1047 monotonic_to_bootbased(&ts
);
1048 return timespec_to_ns(&ts
);
1051 #ifdef CONFIG_X86_64
1052 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1055 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1056 unsigned long max_tsc_khz
;
1058 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1060 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1061 vcpu
->arch
.virtual_tsc_shift
);
1064 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1066 u64 v
= (u64
)khz
* (1000000 + ppm
);
1071 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1073 u32 thresh_lo
, thresh_hi
;
1074 int use_scaling
= 0;
1076 /* Compute a scale to convert nanoseconds in TSC cycles */
1077 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1078 &vcpu
->arch
.virtual_tsc_shift
,
1079 &vcpu
->arch
.virtual_tsc_mult
);
1080 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1083 * Compute the variation in TSC rate which is acceptable
1084 * within the range of tolerance and decide if the
1085 * rate being applied is within that bounds of the hardware
1086 * rate. If so, no scaling or compensation need be done.
1088 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1089 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1090 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1091 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1094 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1097 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1099 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1100 vcpu
->arch
.virtual_tsc_mult
,
1101 vcpu
->arch
.virtual_tsc_shift
);
1102 tsc
+= vcpu
->arch
.this_tsc_write
;
1106 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1108 struct kvm
*kvm
= vcpu
->kvm
;
1109 u64 offset
, ns
, elapsed
;
1110 unsigned long flags
;
1113 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1114 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1115 ns
= get_kernel_ns();
1116 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1118 /* n.b - signed multiplication and division required */
1119 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1120 #ifdef CONFIG_X86_64
1121 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1123 /* do_div() only does unsigned */
1124 asm("idivl %2; xor %%edx, %%edx"
1126 : "A"(usdiff
* 1000), "rm"(vcpu
->arch
.virtual_tsc_khz
));
1128 do_div(elapsed
, 1000);
1134 * Special case: TSC write with a small delta (1 second) of virtual
1135 * cycle time against real time is interpreted as an attempt to
1136 * synchronize the CPU.
1138 * For a reliable TSC, we can match TSC offsets, and for an unstable
1139 * TSC, we add elapsed time in this computation. We could let the
1140 * compensation code attempt to catch up if we fall behind, but
1141 * it's better to try to match offsets from the beginning.
1143 if (usdiff
< USEC_PER_SEC
&&
1144 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1145 if (!check_tsc_unstable()) {
1146 offset
= kvm
->arch
.cur_tsc_offset
;
1147 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1149 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1151 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1152 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1156 * We split periods of matched TSC writes into generations.
1157 * For each generation, we track the original measured
1158 * nanosecond time, offset, and write, so if TSCs are in
1159 * sync, we can match exact offset, and if not, we can match
1160 * exact software computation in compute_guest_tsc()
1162 * These values are tracked in kvm->arch.cur_xxx variables.
1164 kvm
->arch
.cur_tsc_generation
++;
1165 kvm
->arch
.cur_tsc_nsec
= ns
;
1166 kvm
->arch
.cur_tsc_write
= data
;
1167 kvm
->arch
.cur_tsc_offset
= offset
;
1168 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1169 kvm
->arch
.cur_tsc_generation
, data
);
1173 * We also track th most recent recorded KHZ, write and time to
1174 * allow the matching interval to be extended at each write.
1176 kvm
->arch
.last_tsc_nsec
= ns
;
1177 kvm
->arch
.last_tsc_write
= data
;
1178 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1180 /* Reset of TSC must disable overshoot protection below */
1181 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1182 vcpu
->arch
.last_guest_tsc
= data
;
1184 /* Keep track of which generation this VCPU has synchronized to */
1185 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1186 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1187 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1189 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1190 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1193 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1195 #ifdef CONFIG_X86_64
1197 static cycle_t
read_tsc(void)
1203 * Empirically, a fence (of type that depends on the CPU)
1204 * before rdtsc is enough to ensure that rdtsc is ordered
1205 * with respect to loads. The various CPU manuals are unclear
1206 * as to whether rdtsc can be reordered with later loads,
1207 * but no one has ever seen it happen.
1210 ret
= (cycle_t
)vget_cycles();
1212 last
= pvclock_gtod_data
.clock
.cycle_last
;
1214 if (likely(ret
>= last
))
1218 * GCC likes to generate cmov here, but this branch is extremely
1219 * predictable (it's just a funciton of time and the likely is
1220 * very likely) and there's a data dependence, so force GCC
1221 * to generate a branch instead. I don't barrier() because
1222 * we don't actually need a barrier, and if this function
1223 * ever gets inlined it will generate worse code.
1229 static inline u64
vgettsc(cycle_t
*cycle_now
)
1232 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1234 *cycle_now
= read_tsc();
1236 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1237 return v
* gtod
->clock
.mult
;
1240 static int do_monotonic(struct timespec
*ts
, cycle_t
*cycle_now
)
1245 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1249 seq
= read_seqcount_begin(>od
->seq
);
1250 mode
= gtod
->clock
.vclock_mode
;
1251 ts
->tv_sec
= gtod
->monotonic_time_sec
;
1252 ns
= gtod
->monotonic_time_snsec
;
1253 ns
+= vgettsc(cycle_now
);
1254 ns
>>= gtod
->clock
.shift
;
1255 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1256 timespec_add_ns(ts
, ns
);
1261 /* returns true if host is using tsc clocksource */
1262 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1266 /* checked again under seqlock below */
1267 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1270 if (do_monotonic(&ts
, cycle_now
) != VCLOCK_TSC
)
1273 monotonic_to_bootbased(&ts
);
1274 *kernel_ns
= timespec_to_ns(&ts
);
1282 * Assuming a stable TSC across physical CPUS, the following condition
1283 * is possible. Each numbered line represents an event visible to both
1284 * CPUs at the next numbered event.
1286 * "timespecX" represents host monotonic time. "tscX" represents
1289 * VCPU0 on CPU0 | VCPU1 on CPU1
1291 * 1. read timespec0,tsc0
1292 * 2. | timespec1 = timespec0 + N
1294 * 3. transition to guest | transition to guest
1295 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1296 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1297 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1299 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1302 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1304 * - 0 < N - M => M < N
1306 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1307 * always the case (the difference between two distinct xtime instances
1308 * might be smaller then the difference between corresponding TSC reads,
1309 * when updating guest vcpus pvclock areas).
1311 * To avoid that problem, do not allow visibility of distinct
1312 * system_timestamp/tsc_timestamp values simultaneously: use a master
1313 * copy of host monotonic time values. Update that master copy
1316 * Rely on synchronization of host TSCs for monotonicity.
1320 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1322 #ifdef CONFIG_X86_64
1323 struct kvm_arch
*ka
= &kvm
->arch
;
1327 * If the host uses TSC clock, then passthrough TSC as stable
1330 ka
->use_master_clock
= kvm_get_time_and_clockread(
1331 &ka
->master_kernel_ns
,
1332 &ka
->master_cycle_now
);
1334 if (ka
->use_master_clock
)
1335 atomic_set(&kvm_guest_has_master_clock
, 1);
1337 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1338 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
);
1342 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1344 unsigned long flags
, this_tsc_khz
;
1345 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1346 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1348 s64 kernel_ns
, max_kernel_ns
;
1349 u64 tsc_timestamp
, host_tsc
;
1350 struct pvclock_vcpu_time_info
*guest_hv_clock
;
1352 bool use_master_clock
;
1357 /* Keep irq disabled to prevent changes to the clock */
1358 local_irq_save(flags
);
1359 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1360 if (unlikely(this_tsc_khz
== 0)) {
1361 local_irq_restore(flags
);
1362 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1367 * If the host uses TSC clock, then passthrough TSC as stable
1370 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1371 use_master_clock
= ka
->use_master_clock
;
1372 if (use_master_clock
) {
1373 host_tsc
= ka
->master_cycle_now
;
1374 kernel_ns
= ka
->master_kernel_ns
;
1376 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1377 if (!use_master_clock
) {
1378 host_tsc
= native_read_tsc();
1379 kernel_ns
= get_kernel_ns();
1382 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1385 * We may have to catch up the TSC to match elapsed wall clock
1386 * time for two reasons, even if kvmclock is used.
1387 * 1) CPU could have been running below the maximum TSC rate
1388 * 2) Broken TSC compensation resets the base at each VCPU
1389 * entry to avoid unknown leaps of TSC even when running
1390 * again on the same CPU. This may cause apparent elapsed
1391 * time to disappear, and the guest to stand still or run
1394 if (vcpu
->tsc_catchup
) {
1395 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1396 if (tsc
> tsc_timestamp
) {
1397 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1398 tsc_timestamp
= tsc
;
1402 local_irq_restore(flags
);
1404 if (!vcpu
->time_page
)
1408 * Time as measured by the TSC may go backwards when resetting the base
1409 * tsc_timestamp. The reason for this is that the TSC resolution is
1410 * higher than the resolution of the other clock scales. Thus, many
1411 * possible measurments of the TSC correspond to one measurement of any
1412 * other clock, and so a spread of values is possible. This is not a
1413 * problem for the computation of the nanosecond clock; with TSC rates
1414 * around 1GHZ, there can only be a few cycles which correspond to one
1415 * nanosecond value, and any path through this code will inevitably
1416 * take longer than that. However, with the kernel_ns value itself,
1417 * the precision may be much lower, down to HZ granularity. If the
1418 * first sampling of TSC against kernel_ns ends in the low part of the
1419 * range, and the second in the high end of the range, we can get:
1421 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1423 * As the sampling errors potentially range in the thousands of cycles,
1424 * it is possible such a time value has already been observed by the
1425 * guest. To protect against this, we must compute the system time as
1426 * observed by the guest and ensure the new system time is greater.
1429 if (vcpu
->hv_clock
.tsc_timestamp
) {
1430 max_kernel_ns
= vcpu
->last_guest_tsc
-
1431 vcpu
->hv_clock
.tsc_timestamp
;
1432 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1433 vcpu
->hv_clock
.tsc_to_system_mul
,
1434 vcpu
->hv_clock
.tsc_shift
);
1435 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1438 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1439 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1440 &vcpu
->hv_clock
.tsc_shift
,
1441 &vcpu
->hv_clock
.tsc_to_system_mul
);
1442 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1445 /* with a master <monotonic time, tsc value> tuple,
1446 * pvclock clock reads always increase at the (scaled) rate
1447 * of guest TSC - no need to deal with sampling errors.
1449 if (!use_master_clock
) {
1450 if (max_kernel_ns
> kernel_ns
)
1451 kernel_ns
= max_kernel_ns
;
1453 /* With all the info we got, fill in the values */
1454 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1455 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1456 vcpu
->last_kernel_ns
= kernel_ns
;
1457 vcpu
->last_guest_tsc
= tsc_timestamp
;
1460 * The interface expects us to write an even number signaling that the
1461 * update is finished. Since the guest won't see the intermediate
1462 * state, we just increase by 2 at the end.
1464 vcpu
->hv_clock
.version
+= 2;
1466 shared_kaddr
= kmap_atomic(vcpu
->time_page
);
1468 guest_hv_clock
= shared_kaddr
+ vcpu
->time_offset
;
1470 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1471 pvclock_flags
= (guest_hv_clock
->flags
& PVCLOCK_GUEST_STOPPED
);
1473 if (vcpu
->pvclock_set_guest_stopped_request
) {
1474 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1475 vcpu
->pvclock_set_guest_stopped_request
= false;
1478 /* If the host uses TSC clocksource, then it is stable */
1479 if (use_master_clock
)
1480 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1482 vcpu
->hv_clock
.flags
= pvclock_flags
;
1484 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1485 sizeof(vcpu
->hv_clock
));
1487 kunmap_atomic(shared_kaddr
);
1489 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1493 static bool msr_mtrr_valid(unsigned msr
)
1496 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1497 case MSR_MTRRfix64K_00000
:
1498 case MSR_MTRRfix16K_80000
:
1499 case MSR_MTRRfix16K_A0000
:
1500 case MSR_MTRRfix4K_C0000
:
1501 case MSR_MTRRfix4K_C8000
:
1502 case MSR_MTRRfix4K_D0000
:
1503 case MSR_MTRRfix4K_D8000
:
1504 case MSR_MTRRfix4K_E0000
:
1505 case MSR_MTRRfix4K_E8000
:
1506 case MSR_MTRRfix4K_F0000
:
1507 case MSR_MTRRfix4K_F8000
:
1508 case MSR_MTRRdefType
:
1509 case MSR_IA32_CR_PAT
:
1517 static bool valid_pat_type(unsigned t
)
1519 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1522 static bool valid_mtrr_type(unsigned t
)
1524 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1527 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1531 if (!msr_mtrr_valid(msr
))
1534 if (msr
== MSR_IA32_CR_PAT
) {
1535 for (i
= 0; i
< 8; i
++)
1536 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1539 } else if (msr
== MSR_MTRRdefType
) {
1542 return valid_mtrr_type(data
& 0xff);
1543 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1544 for (i
= 0; i
< 8 ; i
++)
1545 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1550 /* variable MTRRs */
1551 return valid_mtrr_type(data
& 0xff);
1554 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1556 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1558 if (!mtrr_valid(vcpu
, msr
, data
))
1561 if (msr
== MSR_MTRRdefType
) {
1562 vcpu
->arch
.mtrr_state
.def_type
= data
;
1563 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1564 } else if (msr
== MSR_MTRRfix64K_00000
)
1566 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1567 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1568 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1569 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1570 else if (msr
== MSR_IA32_CR_PAT
)
1571 vcpu
->arch
.pat
= data
;
1572 else { /* Variable MTRRs */
1573 int idx
, is_mtrr_mask
;
1576 idx
= (msr
- 0x200) / 2;
1577 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1580 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1583 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1587 kvm_mmu_reset_context(vcpu
);
1591 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1593 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1594 unsigned bank_num
= mcg_cap
& 0xff;
1597 case MSR_IA32_MCG_STATUS
:
1598 vcpu
->arch
.mcg_status
= data
;
1600 case MSR_IA32_MCG_CTL
:
1601 if (!(mcg_cap
& MCG_CTL_P
))
1603 if (data
!= 0 && data
!= ~(u64
)0)
1605 vcpu
->arch
.mcg_ctl
= data
;
1608 if (msr
>= MSR_IA32_MC0_CTL
&&
1609 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1610 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1611 /* only 0 or all 1s can be written to IA32_MCi_CTL
1612 * some Linux kernels though clear bit 10 in bank 4 to
1613 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1614 * this to avoid an uncatched #GP in the guest
1616 if ((offset
& 0x3) == 0 &&
1617 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1619 vcpu
->arch
.mce_banks
[offset
] = data
;
1627 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1629 struct kvm
*kvm
= vcpu
->kvm
;
1630 int lm
= is_long_mode(vcpu
);
1631 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1632 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1633 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1634 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1635 u32 page_num
= data
& ~PAGE_MASK
;
1636 u64 page_addr
= data
& PAGE_MASK
;
1641 if (page_num
>= blob_size
)
1644 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1649 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1658 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1660 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1663 static bool kvm_hv_msr_partition_wide(u32 msr
)
1667 case HV_X64_MSR_GUEST_OS_ID
:
1668 case HV_X64_MSR_HYPERCALL
:
1676 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1678 struct kvm
*kvm
= vcpu
->kvm
;
1681 case HV_X64_MSR_GUEST_OS_ID
:
1682 kvm
->arch
.hv_guest_os_id
= data
;
1683 /* setting guest os id to zero disables hypercall page */
1684 if (!kvm
->arch
.hv_guest_os_id
)
1685 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1687 case HV_X64_MSR_HYPERCALL
: {
1692 /* if guest os id is not set hypercall should remain disabled */
1693 if (!kvm
->arch
.hv_guest_os_id
)
1695 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1696 kvm
->arch
.hv_hypercall
= data
;
1699 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1700 addr
= gfn_to_hva(kvm
, gfn
);
1701 if (kvm_is_error_hva(addr
))
1703 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1704 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1705 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1707 kvm
->arch
.hv_hypercall
= data
;
1711 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1712 "data 0x%llx\n", msr
, data
);
1718 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1721 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1724 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1725 vcpu
->arch
.hv_vapic
= data
;
1728 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1729 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1730 if (kvm_is_error_hva(addr
))
1732 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1734 vcpu
->arch
.hv_vapic
= data
;
1737 case HV_X64_MSR_EOI
:
1738 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1739 case HV_X64_MSR_ICR
:
1740 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1741 case HV_X64_MSR_TPR
:
1742 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1744 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1745 "data 0x%llx\n", msr
, data
);
1752 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1754 gpa_t gpa
= data
& ~0x3f;
1756 /* Bits 2:5 are reserved, Should be zero */
1760 vcpu
->arch
.apf
.msr_val
= data
;
1762 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1763 kvm_clear_async_pf_completion_queue(vcpu
);
1764 kvm_async_pf_hash_reset(vcpu
);
1768 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1771 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1772 kvm_async_pf_wakeup_all(vcpu
);
1776 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1778 if (vcpu
->arch
.time_page
) {
1779 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1780 vcpu
->arch
.time_page
= NULL
;
1784 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1788 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1791 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1792 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1793 vcpu
->arch
.st
.accum_steal
= delta
;
1796 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1798 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1801 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1802 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1805 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1806 vcpu
->arch
.st
.steal
.version
+= 2;
1807 vcpu
->arch
.st
.accum_steal
= 0;
1809 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1810 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1813 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1819 return set_efer(vcpu
, data
);
1821 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1822 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1823 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
1825 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1830 case MSR_FAM10H_MMIO_CONF_BASE
:
1832 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1837 case MSR_AMD64_NB_CFG
:
1839 case MSR_IA32_DEBUGCTLMSR
:
1841 /* We support the non-activated case already */
1843 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1844 /* Values other than LBR and BTF are vendor-specific,
1845 thus reserved and should throw a #GP */
1848 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1851 case MSR_IA32_UCODE_REV
:
1852 case MSR_IA32_UCODE_WRITE
:
1853 case MSR_VM_HSAVE_PA
:
1854 case MSR_AMD64_PATCH_LOADER
:
1856 case 0x200 ... 0x2ff:
1857 return set_msr_mtrr(vcpu
, msr
, data
);
1858 case MSR_IA32_APICBASE
:
1859 kvm_set_apic_base(vcpu
, data
);
1861 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1862 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1863 case MSR_IA32_TSCDEADLINE
:
1864 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1866 case MSR_IA32_MISC_ENABLE
:
1867 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1869 case MSR_KVM_WALL_CLOCK_NEW
:
1870 case MSR_KVM_WALL_CLOCK
:
1871 vcpu
->kvm
->arch
.wall_clock
= data
;
1872 kvm_write_wall_clock(vcpu
->kvm
, data
);
1874 case MSR_KVM_SYSTEM_TIME_NEW
:
1875 case MSR_KVM_SYSTEM_TIME
: {
1876 kvmclock_reset(vcpu
);
1878 vcpu
->arch
.time
= data
;
1879 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1881 /* we verify if the enable bit is set... */
1885 /* ...but clean it before doing the actual write */
1886 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1888 vcpu
->arch
.time_page
=
1889 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1891 if (is_error_page(vcpu
->arch
.time_page
))
1892 vcpu
->arch
.time_page
= NULL
;
1896 case MSR_KVM_ASYNC_PF_EN
:
1897 if (kvm_pv_enable_async_pf(vcpu
, data
))
1900 case MSR_KVM_STEAL_TIME
:
1902 if (unlikely(!sched_info_on()))
1905 if (data
& KVM_STEAL_RESERVED_MASK
)
1908 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1909 data
& KVM_STEAL_VALID_BITS
))
1912 vcpu
->arch
.st
.msr_val
= data
;
1914 if (!(data
& KVM_MSR_ENABLED
))
1917 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1920 accumulate_steal_time(vcpu
);
1923 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
1926 case MSR_KVM_PV_EOI_EN
:
1927 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
1931 case MSR_IA32_MCG_CTL
:
1932 case MSR_IA32_MCG_STATUS
:
1933 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1934 return set_msr_mce(vcpu
, msr
, data
);
1936 /* Performance counters are not protected by a CPUID bit,
1937 * so we should check all of them in the generic path for the sake of
1938 * cross vendor migration.
1939 * Writing a zero into the event select MSRs disables them,
1940 * which we perfectly emulate ;-). Any other value should be at least
1941 * reported, some guests depend on them.
1943 case MSR_K7_EVNTSEL0
:
1944 case MSR_K7_EVNTSEL1
:
1945 case MSR_K7_EVNTSEL2
:
1946 case MSR_K7_EVNTSEL3
:
1948 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1949 "0x%x data 0x%llx\n", msr
, data
);
1951 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1952 * so we ignore writes to make it happy.
1954 case MSR_K7_PERFCTR0
:
1955 case MSR_K7_PERFCTR1
:
1956 case MSR_K7_PERFCTR2
:
1957 case MSR_K7_PERFCTR3
:
1958 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1959 "0x%x data 0x%llx\n", msr
, data
);
1961 case MSR_P6_PERFCTR0
:
1962 case MSR_P6_PERFCTR1
:
1964 case MSR_P6_EVNTSEL0
:
1965 case MSR_P6_EVNTSEL1
:
1966 if (kvm_pmu_msr(vcpu
, msr
))
1967 return kvm_pmu_set_msr(vcpu
, msr
, data
);
1969 if (pr
|| data
!= 0)
1970 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
1971 "0x%x data 0x%llx\n", msr
, data
);
1973 case MSR_K7_CLK_CTL
:
1975 * Ignore all writes to this no longer documented MSR.
1976 * Writes are only relevant for old K7 processors,
1977 * all pre-dating SVM, but a recommended workaround from
1978 * AMD for these chips. It is possible to specify the
1979 * affected processor models on the command line, hence
1980 * the need to ignore the workaround.
1983 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1984 if (kvm_hv_msr_partition_wide(msr
)) {
1986 mutex_lock(&vcpu
->kvm
->lock
);
1987 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1988 mutex_unlock(&vcpu
->kvm
->lock
);
1991 return set_msr_hyperv(vcpu
, msr
, data
);
1993 case MSR_IA32_BBL_CR_CTL3
:
1994 /* Drop writes to this legacy MSR -- see rdmsr
1995 * counterpart for further detail.
1997 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
1999 case MSR_AMD64_OSVW_ID_LENGTH
:
2000 if (!guest_cpuid_has_osvw(vcpu
))
2002 vcpu
->arch
.osvw
.length
= data
;
2004 case MSR_AMD64_OSVW_STATUS
:
2005 if (!guest_cpuid_has_osvw(vcpu
))
2007 vcpu
->arch
.osvw
.status
= data
;
2010 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2011 return xen_hvm_config(vcpu
, data
);
2012 if (kvm_pmu_msr(vcpu
, msr
))
2013 return kvm_pmu_set_msr(vcpu
, msr
, data
);
2015 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2019 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2026 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2030 * Reads an msr value (of 'msr_index') into 'pdata'.
2031 * Returns 0 on success, non-0 otherwise.
2032 * Assumes vcpu_load() was already called.
2034 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2036 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2039 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2041 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2043 if (!msr_mtrr_valid(msr
))
2046 if (msr
== MSR_MTRRdefType
)
2047 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2048 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2049 else if (msr
== MSR_MTRRfix64K_00000
)
2051 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2052 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2053 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2054 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2055 else if (msr
== MSR_IA32_CR_PAT
)
2056 *pdata
= vcpu
->arch
.pat
;
2057 else { /* Variable MTRRs */
2058 int idx
, is_mtrr_mask
;
2061 idx
= (msr
- 0x200) / 2;
2062 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2065 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2068 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2075 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2078 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2079 unsigned bank_num
= mcg_cap
& 0xff;
2082 case MSR_IA32_P5_MC_ADDR
:
2083 case MSR_IA32_P5_MC_TYPE
:
2086 case MSR_IA32_MCG_CAP
:
2087 data
= vcpu
->arch
.mcg_cap
;
2089 case MSR_IA32_MCG_CTL
:
2090 if (!(mcg_cap
& MCG_CTL_P
))
2092 data
= vcpu
->arch
.mcg_ctl
;
2094 case MSR_IA32_MCG_STATUS
:
2095 data
= vcpu
->arch
.mcg_status
;
2098 if (msr
>= MSR_IA32_MC0_CTL
&&
2099 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
2100 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2101 data
= vcpu
->arch
.mce_banks
[offset
];
2110 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2113 struct kvm
*kvm
= vcpu
->kvm
;
2116 case HV_X64_MSR_GUEST_OS_ID
:
2117 data
= kvm
->arch
.hv_guest_os_id
;
2119 case HV_X64_MSR_HYPERCALL
:
2120 data
= kvm
->arch
.hv_hypercall
;
2123 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2131 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2136 case HV_X64_MSR_VP_INDEX
: {
2139 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
2144 case HV_X64_MSR_EOI
:
2145 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2146 case HV_X64_MSR_ICR
:
2147 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2148 case HV_X64_MSR_TPR
:
2149 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2150 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2151 data
= vcpu
->arch
.hv_vapic
;
2154 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2161 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2166 case MSR_IA32_PLATFORM_ID
:
2167 case MSR_IA32_EBL_CR_POWERON
:
2168 case MSR_IA32_DEBUGCTLMSR
:
2169 case MSR_IA32_LASTBRANCHFROMIP
:
2170 case MSR_IA32_LASTBRANCHTOIP
:
2171 case MSR_IA32_LASTINTFROMIP
:
2172 case MSR_IA32_LASTINTTOIP
:
2175 case MSR_VM_HSAVE_PA
:
2176 case MSR_K7_EVNTSEL0
:
2177 case MSR_K7_PERFCTR0
:
2178 case MSR_K8_INT_PENDING_MSG
:
2179 case MSR_AMD64_NB_CFG
:
2180 case MSR_FAM10H_MMIO_CONF_BASE
:
2183 case MSR_P6_PERFCTR0
:
2184 case MSR_P6_PERFCTR1
:
2185 case MSR_P6_EVNTSEL0
:
2186 case MSR_P6_EVNTSEL1
:
2187 if (kvm_pmu_msr(vcpu
, msr
))
2188 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2191 case MSR_IA32_UCODE_REV
:
2192 data
= 0x100000000ULL
;
2195 data
= 0x500 | KVM_NR_VAR_MTRR
;
2197 case 0x200 ... 0x2ff:
2198 return get_msr_mtrr(vcpu
, msr
, pdata
);
2199 case 0xcd: /* fsb frequency */
2203 * MSR_EBC_FREQUENCY_ID
2204 * Conservative value valid for even the basic CPU models.
2205 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2206 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2207 * and 266MHz for model 3, or 4. Set Core Clock
2208 * Frequency to System Bus Frequency Ratio to 1 (bits
2209 * 31:24) even though these are only valid for CPU
2210 * models > 2, however guests may end up dividing or
2211 * multiplying by zero otherwise.
2213 case MSR_EBC_FREQUENCY_ID
:
2216 case MSR_IA32_APICBASE
:
2217 data
= kvm_get_apic_base(vcpu
);
2219 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2220 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2222 case MSR_IA32_TSCDEADLINE
:
2223 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2225 case MSR_IA32_MISC_ENABLE
:
2226 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2228 case MSR_IA32_PERF_STATUS
:
2229 /* TSC increment by tick */
2231 /* CPU multiplier */
2232 data
|= (((uint64_t)4ULL) << 40);
2235 data
= vcpu
->arch
.efer
;
2237 case MSR_KVM_WALL_CLOCK
:
2238 case MSR_KVM_WALL_CLOCK_NEW
:
2239 data
= vcpu
->kvm
->arch
.wall_clock
;
2241 case MSR_KVM_SYSTEM_TIME
:
2242 case MSR_KVM_SYSTEM_TIME_NEW
:
2243 data
= vcpu
->arch
.time
;
2245 case MSR_KVM_ASYNC_PF_EN
:
2246 data
= vcpu
->arch
.apf
.msr_val
;
2248 case MSR_KVM_STEAL_TIME
:
2249 data
= vcpu
->arch
.st
.msr_val
;
2251 case MSR_KVM_PV_EOI_EN
:
2252 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2254 case MSR_IA32_P5_MC_ADDR
:
2255 case MSR_IA32_P5_MC_TYPE
:
2256 case MSR_IA32_MCG_CAP
:
2257 case MSR_IA32_MCG_CTL
:
2258 case MSR_IA32_MCG_STATUS
:
2259 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2260 return get_msr_mce(vcpu
, msr
, pdata
);
2261 case MSR_K7_CLK_CTL
:
2263 * Provide expected ramp-up count for K7. All other
2264 * are set to zero, indicating minimum divisors for
2267 * This prevents guest kernels on AMD host with CPU
2268 * type 6, model 8 and higher from exploding due to
2269 * the rdmsr failing.
2273 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2274 if (kvm_hv_msr_partition_wide(msr
)) {
2276 mutex_lock(&vcpu
->kvm
->lock
);
2277 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2278 mutex_unlock(&vcpu
->kvm
->lock
);
2281 return get_msr_hyperv(vcpu
, msr
, pdata
);
2283 case MSR_IA32_BBL_CR_CTL3
:
2284 /* This legacy MSR exists but isn't fully documented in current
2285 * silicon. It is however accessed by winxp in very narrow
2286 * scenarios where it sets bit #19, itself documented as
2287 * a "reserved" bit. Best effort attempt to source coherent
2288 * read data here should the balance of the register be
2289 * interpreted by the guest:
2291 * L2 cache control register 3: 64GB range, 256KB size,
2292 * enabled, latency 0x1, configured
2296 case MSR_AMD64_OSVW_ID_LENGTH
:
2297 if (!guest_cpuid_has_osvw(vcpu
))
2299 data
= vcpu
->arch
.osvw
.length
;
2301 case MSR_AMD64_OSVW_STATUS
:
2302 if (!guest_cpuid_has_osvw(vcpu
))
2304 data
= vcpu
->arch
.osvw
.status
;
2307 if (kvm_pmu_msr(vcpu
, msr
))
2308 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2310 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2313 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2321 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2324 * Read or write a bunch of msrs. All parameters are kernel addresses.
2326 * @return number of msrs set successfully.
2328 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2329 struct kvm_msr_entry
*entries
,
2330 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2331 unsigned index
, u64
*data
))
2335 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2336 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2337 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2339 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2345 * Read or write a bunch of msrs. Parameters are user addresses.
2347 * @return number of msrs set successfully.
2349 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2350 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2351 unsigned index
, u64
*data
),
2354 struct kvm_msrs msrs
;
2355 struct kvm_msr_entry
*entries
;
2360 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2364 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2367 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2368 entries
= memdup_user(user_msrs
->entries
, size
);
2369 if (IS_ERR(entries
)) {
2370 r
= PTR_ERR(entries
);
2374 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2379 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2390 int kvm_dev_ioctl_check_extension(long ext
)
2395 case KVM_CAP_IRQCHIP
:
2397 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2398 case KVM_CAP_SET_TSS_ADDR
:
2399 case KVM_CAP_EXT_CPUID
:
2400 case KVM_CAP_CLOCKSOURCE
:
2402 case KVM_CAP_NOP_IO_DELAY
:
2403 case KVM_CAP_MP_STATE
:
2404 case KVM_CAP_SYNC_MMU
:
2405 case KVM_CAP_USER_NMI
:
2406 case KVM_CAP_REINJECT_CONTROL
:
2407 case KVM_CAP_IRQ_INJECT_STATUS
:
2408 case KVM_CAP_ASSIGN_DEV_IRQ
:
2410 case KVM_CAP_IOEVENTFD
:
2412 case KVM_CAP_PIT_STATE2
:
2413 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2414 case KVM_CAP_XEN_HVM
:
2415 case KVM_CAP_ADJUST_CLOCK
:
2416 case KVM_CAP_VCPU_EVENTS
:
2417 case KVM_CAP_HYPERV
:
2418 case KVM_CAP_HYPERV_VAPIC
:
2419 case KVM_CAP_HYPERV_SPIN
:
2420 case KVM_CAP_PCI_SEGMENT
:
2421 case KVM_CAP_DEBUGREGS
:
2422 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2424 case KVM_CAP_ASYNC_PF
:
2425 case KVM_CAP_GET_TSC_KHZ
:
2426 case KVM_CAP_PCI_2_3
:
2427 case KVM_CAP_KVMCLOCK_CTRL
:
2428 case KVM_CAP_READONLY_MEM
:
2429 case KVM_CAP_IRQFD_RESAMPLE
:
2432 case KVM_CAP_COALESCED_MMIO
:
2433 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2436 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2438 case KVM_CAP_NR_VCPUS
:
2439 r
= KVM_SOFT_MAX_VCPUS
;
2441 case KVM_CAP_MAX_VCPUS
:
2444 case KVM_CAP_NR_MEMSLOTS
:
2445 r
= KVM_MEMORY_SLOTS
;
2447 case KVM_CAP_PV_MMU
: /* obsolete */
2451 r
= iommu_present(&pci_bus_type
);
2454 r
= KVM_MAX_MCE_BANKS
;
2459 case KVM_CAP_TSC_CONTROL
:
2460 r
= kvm_has_tsc_control
;
2462 case KVM_CAP_TSC_DEADLINE_TIMER
:
2463 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2473 long kvm_arch_dev_ioctl(struct file
*filp
,
2474 unsigned int ioctl
, unsigned long arg
)
2476 void __user
*argp
= (void __user
*)arg
;
2480 case KVM_GET_MSR_INDEX_LIST
: {
2481 struct kvm_msr_list __user
*user_msr_list
= argp
;
2482 struct kvm_msr_list msr_list
;
2486 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2489 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2490 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2493 if (n
< msr_list
.nmsrs
)
2496 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2497 num_msrs_to_save
* sizeof(u32
)))
2499 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2501 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2506 case KVM_GET_SUPPORTED_CPUID
: {
2507 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2508 struct kvm_cpuid2 cpuid
;
2511 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2513 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2514 cpuid_arg
->entries
);
2519 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2524 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2527 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2529 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2541 static void wbinvd_ipi(void *garbage
)
2546 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2548 return vcpu
->kvm
->arch
.iommu_domain
&&
2549 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2552 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2554 /* Address WBINVD may be executed by guest */
2555 if (need_emulate_wbinvd(vcpu
)) {
2556 if (kvm_x86_ops
->has_wbinvd_exit())
2557 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2558 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2559 smp_call_function_single(vcpu
->cpu
,
2560 wbinvd_ipi
, NULL
, 1);
2563 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2565 /* Apply any externally detected TSC adjustments (due to suspend) */
2566 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2567 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2568 vcpu
->arch
.tsc_offset_adjustment
= 0;
2569 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2572 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2573 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2574 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2576 mark_tsc_unstable("KVM discovered backwards TSC");
2577 if (check_tsc_unstable()) {
2578 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2579 vcpu
->arch
.last_guest_tsc
);
2580 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2581 vcpu
->arch
.tsc_catchup
= 1;
2583 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2584 if (vcpu
->cpu
!= cpu
)
2585 kvm_migrate_timers(vcpu
);
2589 accumulate_steal_time(vcpu
);
2590 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2593 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2595 kvm_x86_ops
->vcpu_put(vcpu
);
2596 kvm_put_guest_fpu(vcpu
);
2597 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2600 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2601 struct kvm_lapic_state
*s
)
2603 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2608 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2609 struct kvm_lapic_state
*s
)
2611 kvm_apic_post_state_restore(vcpu
, s
);
2612 update_cr8_intercept(vcpu
);
2617 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2618 struct kvm_interrupt
*irq
)
2620 if (irq
->irq
< 0 || irq
->irq
>= KVM_NR_INTERRUPTS
)
2622 if (irqchip_in_kernel(vcpu
->kvm
))
2625 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2626 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2631 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2633 kvm_inject_nmi(vcpu
);
2638 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2639 struct kvm_tpr_access_ctl
*tac
)
2643 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2647 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2651 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2654 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2656 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2659 vcpu
->arch
.mcg_cap
= mcg_cap
;
2660 /* Init IA32_MCG_CTL to all 1s */
2661 if (mcg_cap
& MCG_CTL_P
)
2662 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2663 /* Init IA32_MCi_CTL to all 1s */
2664 for (bank
= 0; bank
< bank_num
; bank
++)
2665 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2670 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2671 struct kvm_x86_mce
*mce
)
2673 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2674 unsigned bank_num
= mcg_cap
& 0xff;
2675 u64
*banks
= vcpu
->arch
.mce_banks
;
2677 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2680 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2681 * reporting is disabled
2683 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2684 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2686 banks
+= 4 * mce
->bank
;
2688 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2689 * reporting is disabled for the bank
2691 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2693 if (mce
->status
& MCI_STATUS_UC
) {
2694 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2695 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2696 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2699 if (banks
[1] & MCI_STATUS_VAL
)
2700 mce
->status
|= MCI_STATUS_OVER
;
2701 banks
[2] = mce
->addr
;
2702 banks
[3] = mce
->misc
;
2703 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2704 banks
[1] = mce
->status
;
2705 kvm_queue_exception(vcpu
, MC_VECTOR
);
2706 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2707 || !(banks
[1] & MCI_STATUS_UC
)) {
2708 if (banks
[1] & MCI_STATUS_VAL
)
2709 mce
->status
|= MCI_STATUS_OVER
;
2710 banks
[2] = mce
->addr
;
2711 banks
[3] = mce
->misc
;
2712 banks
[1] = mce
->status
;
2714 banks
[1] |= MCI_STATUS_OVER
;
2718 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2719 struct kvm_vcpu_events
*events
)
2722 events
->exception
.injected
=
2723 vcpu
->arch
.exception
.pending
&&
2724 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2725 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2726 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2727 events
->exception
.pad
= 0;
2728 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2730 events
->interrupt
.injected
=
2731 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2732 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2733 events
->interrupt
.soft
= 0;
2734 events
->interrupt
.shadow
=
2735 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2736 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2738 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2739 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2740 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2741 events
->nmi
.pad
= 0;
2743 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2745 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2746 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2747 | KVM_VCPUEVENT_VALID_SHADOW
);
2748 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2751 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2752 struct kvm_vcpu_events
*events
)
2754 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2755 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2756 | KVM_VCPUEVENT_VALID_SHADOW
))
2760 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2761 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2762 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2763 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2765 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2766 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2767 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2768 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2769 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2770 events
->interrupt
.shadow
);
2772 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2773 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2774 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2775 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2777 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2778 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2780 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2785 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2786 struct kvm_debugregs
*dbgregs
)
2788 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2789 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2790 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2792 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2795 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2796 struct kvm_debugregs
*dbgregs
)
2801 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2802 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2803 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2808 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2809 struct kvm_xsave
*guest_xsave
)
2812 memcpy(guest_xsave
->region
,
2813 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2816 memcpy(guest_xsave
->region
,
2817 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2818 sizeof(struct i387_fxsave_struct
));
2819 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2824 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2825 struct kvm_xsave
*guest_xsave
)
2828 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2831 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2832 guest_xsave
->region
, xstate_size
);
2834 if (xstate_bv
& ~XSTATE_FPSSE
)
2836 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2837 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2842 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2843 struct kvm_xcrs
*guest_xcrs
)
2845 if (!cpu_has_xsave
) {
2846 guest_xcrs
->nr_xcrs
= 0;
2850 guest_xcrs
->nr_xcrs
= 1;
2851 guest_xcrs
->flags
= 0;
2852 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2853 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2856 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2857 struct kvm_xcrs
*guest_xcrs
)
2864 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2867 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2868 /* Only support XCR0 currently */
2869 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2870 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2871 guest_xcrs
->xcrs
[0].value
);
2880 * kvm_set_guest_paused() indicates to the guest kernel that it has been
2881 * stopped by the hypervisor. This function will be called from the host only.
2882 * EINVAL is returned when the host attempts to set the flag for a guest that
2883 * does not support pv clocks.
2885 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
2887 if (!vcpu
->arch
.time_page
)
2889 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
2890 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2894 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2895 unsigned int ioctl
, unsigned long arg
)
2897 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2898 void __user
*argp
= (void __user
*)arg
;
2901 struct kvm_lapic_state
*lapic
;
2902 struct kvm_xsave
*xsave
;
2903 struct kvm_xcrs
*xcrs
;
2909 case KVM_GET_LAPIC
: {
2911 if (!vcpu
->arch
.apic
)
2913 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2918 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2922 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2927 case KVM_SET_LAPIC
: {
2928 if (!vcpu
->arch
.apic
)
2930 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
2931 if (IS_ERR(u
.lapic
))
2932 return PTR_ERR(u
.lapic
);
2934 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2937 case KVM_INTERRUPT
: {
2938 struct kvm_interrupt irq
;
2941 if (copy_from_user(&irq
, argp
, sizeof irq
))
2943 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2947 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2950 case KVM_SET_CPUID
: {
2951 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2952 struct kvm_cpuid cpuid
;
2955 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2957 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2960 case KVM_SET_CPUID2
: {
2961 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2962 struct kvm_cpuid2 cpuid
;
2965 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2967 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2968 cpuid_arg
->entries
);
2971 case KVM_GET_CPUID2
: {
2972 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2973 struct kvm_cpuid2 cpuid
;
2976 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2978 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2979 cpuid_arg
->entries
);
2983 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2989 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2992 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2994 case KVM_TPR_ACCESS_REPORTING
: {
2995 struct kvm_tpr_access_ctl tac
;
2998 if (copy_from_user(&tac
, argp
, sizeof tac
))
3000 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3004 if (copy_to_user(argp
, &tac
, sizeof tac
))
3009 case KVM_SET_VAPIC_ADDR
: {
3010 struct kvm_vapic_addr va
;
3013 if (!irqchip_in_kernel(vcpu
->kvm
))
3016 if (copy_from_user(&va
, argp
, sizeof va
))
3019 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3022 case KVM_X86_SETUP_MCE
: {
3026 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3028 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3031 case KVM_X86_SET_MCE
: {
3032 struct kvm_x86_mce mce
;
3035 if (copy_from_user(&mce
, argp
, sizeof mce
))
3037 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3040 case KVM_GET_VCPU_EVENTS
: {
3041 struct kvm_vcpu_events events
;
3043 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3046 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3051 case KVM_SET_VCPU_EVENTS
: {
3052 struct kvm_vcpu_events events
;
3055 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3058 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3061 case KVM_GET_DEBUGREGS
: {
3062 struct kvm_debugregs dbgregs
;
3064 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3067 if (copy_to_user(argp
, &dbgregs
,
3068 sizeof(struct kvm_debugregs
)))
3073 case KVM_SET_DEBUGREGS
: {
3074 struct kvm_debugregs dbgregs
;
3077 if (copy_from_user(&dbgregs
, argp
,
3078 sizeof(struct kvm_debugregs
)))
3081 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3084 case KVM_GET_XSAVE
: {
3085 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3090 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3093 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3098 case KVM_SET_XSAVE
: {
3099 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3100 if (IS_ERR(u
.xsave
))
3101 return PTR_ERR(u
.xsave
);
3103 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3106 case KVM_GET_XCRS
: {
3107 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3112 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3115 if (copy_to_user(argp
, u
.xcrs
,
3116 sizeof(struct kvm_xcrs
)))
3121 case KVM_SET_XCRS
: {
3122 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3124 return PTR_ERR(u
.xcrs
);
3126 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3129 case KVM_SET_TSC_KHZ
: {
3133 user_tsc_khz
= (u32
)arg
;
3135 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3138 if (user_tsc_khz
== 0)
3139 user_tsc_khz
= tsc_khz
;
3141 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3146 case KVM_GET_TSC_KHZ
: {
3147 r
= vcpu
->arch
.virtual_tsc_khz
;
3150 case KVM_KVMCLOCK_CTRL
: {
3151 r
= kvm_set_guest_paused(vcpu
);
3162 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3164 return VM_FAULT_SIGBUS
;
3167 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3171 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3173 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3177 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3180 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3184 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3185 u32 kvm_nr_mmu_pages
)
3187 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3190 mutex_lock(&kvm
->slots_lock
);
3191 spin_lock(&kvm
->mmu_lock
);
3193 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3194 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3196 spin_unlock(&kvm
->mmu_lock
);
3197 mutex_unlock(&kvm
->slots_lock
);
3201 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3203 return kvm
->arch
.n_max_mmu_pages
;
3206 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3211 switch (chip
->chip_id
) {
3212 case KVM_IRQCHIP_PIC_MASTER
:
3213 memcpy(&chip
->chip
.pic
,
3214 &pic_irqchip(kvm
)->pics
[0],
3215 sizeof(struct kvm_pic_state
));
3217 case KVM_IRQCHIP_PIC_SLAVE
:
3218 memcpy(&chip
->chip
.pic
,
3219 &pic_irqchip(kvm
)->pics
[1],
3220 sizeof(struct kvm_pic_state
));
3222 case KVM_IRQCHIP_IOAPIC
:
3223 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3232 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3237 switch (chip
->chip_id
) {
3238 case KVM_IRQCHIP_PIC_MASTER
:
3239 spin_lock(&pic_irqchip(kvm
)->lock
);
3240 memcpy(&pic_irqchip(kvm
)->pics
[0],
3242 sizeof(struct kvm_pic_state
));
3243 spin_unlock(&pic_irqchip(kvm
)->lock
);
3245 case KVM_IRQCHIP_PIC_SLAVE
:
3246 spin_lock(&pic_irqchip(kvm
)->lock
);
3247 memcpy(&pic_irqchip(kvm
)->pics
[1],
3249 sizeof(struct kvm_pic_state
));
3250 spin_unlock(&pic_irqchip(kvm
)->lock
);
3252 case KVM_IRQCHIP_IOAPIC
:
3253 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3259 kvm_pic_update_irq(pic_irqchip(kvm
));
3263 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3267 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3268 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3269 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3273 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3277 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3278 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3279 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3280 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3284 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3288 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3289 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3290 sizeof(ps
->channels
));
3291 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3292 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3293 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3297 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3299 int r
= 0, start
= 0;
3300 u32 prev_legacy
, cur_legacy
;
3301 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3302 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3303 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3304 if (!prev_legacy
&& cur_legacy
)
3306 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3307 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3308 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3309 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3310 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3314 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3315 struct kvm_reinject_control
*control
)
3317 if (!kvm
->arch
.vpit
)
3319 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3320 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3321 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3326 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3327 * @kvm: kvm instance
3328 * @log: slot id and address to which we copy the log
3330 * We need to keep it in mind that VCPU threads can write to the bitmap
3331 * concurrently. So, to avoid losing data, we keep the following order for
3334 * 1. Take a snapshot of the bit and clear it if needed.
3335 * 2. Write protect the corresponding page.
3336 * 3. Flush TLB's if needed.
3337 * 4. Copy the snapshot to the userspace.
3339 * Between 2 and 3, the guest may write to the page using the remaining TLB
3340 * entry. This is not a problem because the page will be reported dirty at
3341 * step 4 using the snapshot taken before and step 3 ensures that successive
3342 * writes will be logged for the next call.
3344 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3347 struct kvm_memory_slot
*memslot
;
3349 unsigned long *dirty_bitmap
;
3350 unsigned long *dirty_bitmap_buffer
;
3351 bool is_dirty
= false;
3353 mutex_lock(&kvm
->slots_lock
);
3356 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3359 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3361 dirty_bitmap
= memslot
->dirty_bitmap
;
3366 n
= kvm_dirty_bitmap_bytes(memslot
);
3368 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3369 memset(dirty_bitmap_buffer
, 0, n
);
3371 spin_lock(&kvm
->mmu_lock
);
3373 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3377 if (!dirty_bitmap
[i
])
3382 mask
= xchg(&dirty_bitmap
[i
], 0);
3383 dirty_bitmap_buffer
[i
] = mask
;
3385 offset
= i
* BITS_PER_LONG
;
3386 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3389 kvm_flush_remote_tlbs(kvm
);
3391 spin_unlock(&kvm
->mmu_lock
);
3394 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3399 mutex_unlock(&kvm
->slots_lock
);
3403 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
)
3405 if (!irqchip_in_kernel(kvm
))
3408 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3409 irq_event
->irq
, irq_event
->level
);
3413 long kvm_arch_vm_ioctl(struct file
*filp
,
3414 unsigned int ioctl
, unsigned long arg
)
3416 struct kvm
*kvm
= filp
->private_data
;
3417 void __user
*argp
= (void __user
*)arg
;
3420 * This union makes it completely explicit to gcc-3.x
3421 * that these two variables' stack usage should be
3422 * combined, not added together.
3425 struct kvm_pit_state ps
;
3426 struct kvm_pit_state2 ps2
;
3427 struct kvm_pit_config pit_config
;
3431 case KVM_SET_TSS_ADDR
:
3432 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3434 case KVM_SET_IDENTITY_MAP_ADDR
: {
3438 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3440 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3443 case KVM_SET_NR_MMU_PAGES
:
3444 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3446 case KVM_GET_NR_MMU_PAGES
:
3447 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3449 case KVM_CREATE_IRQCHIP
: {
3450 struct kvm_pic
*vpic
;
3452 mutex_lock(&kvm
->lock
);
3455 goto create_irqchip_unlock
;
3457 if (atomic_read(&kvm
->online_vcpus
))
3458 goto create_irqchip_unlock
;
3460 vpic
= kvm_create_pic(kvm
);
3462 r
= kvm_ioapic_init(kvm
);
3464 mutex_lock(&kvm
->slots_lock
);
3465 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3467 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3469 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3471 mutex_unlock(&kvm
->slots_lock
);
3473 goto create_irqchip_unlock
;
3476 goto create_irqchip_unlock
;
3478 kvm
->arch
.vpic
= vpic
;
3480 r
= kvm_setup_default_irq_routing(kvm
);
3482 mutex_lock(&kvm
->slots_lock
);
3483 mutex_lock(&kvm
->irq_lock
);
3484 kvm_ioapic_destroy(kvm
);
3485 kvm_destroy_pic(kvm
);
3486 mutex_unlock(&kvm
->irq_lock
);
3487 mutex_unlock(&kvm
->slots_lock
);
3489 create_irqchip_unlock
:
3490 mutex_unlock(&kvm
->lock
);
3493 case KVM_CREATE_PIT
:
3494 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3496 case KVM_CREATE_PIT2
:
3498 if (copy_from_user(&u
.pit_config
, argp
,
3499 sizeof(struct kvm_pit_config
)))
3502 mutex_lock(&kvm
->slots_lock
);
3505 goto create_pit_unlock
;
3507 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3511 mutex_unlock(&kvm
->slots_lock
);
3513 case KVM_GET_IRQCHIP
: {
3514 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3515 struct kvm_irqchip
*chip
;
3517 chip
= memdup_user(argp
, sizeof(*chip
));
3524 if (!irqchip_in_kernel(kvm
))
3525 goto get_irqchip_out
;
3526 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3528 goto get_irqchip_out
;
3530 if (copy_to_user(argp
, chip
, sizeof *chip
))
3531 goto get_irqchip_out
;
3537 case KVM_SET_IRQCHIP
: {
3538 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3539 struct kvm_irqchip
*chip
;
3541 chip
= memdup_user(argp
, sizeof(*chip
));
3548 if (!irqchip_in_kernel(kvm
))
3549 goto set_irqchip_out
;
3550 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3552 goto set_irqchip_out
;
3560 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3563 if (!kvm
->arch
.vpit
)
3565 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3569 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3576 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3579 if (!kvm
->arch
.vpit
)
3581 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3584 case KVM_GET_PIT2
: {
3586 if (!kvm
->arch
.vpit
)
3588 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3592 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3597 case KVM_SET_PIT2
: {
3599 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3602 if (!kvm
->arch
.vpit
)
3604 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3607 case KVM_REINJECT_CONTROL
: {
3608 struct kvm_reinject_control control
;
3610 if (copy_from_user(&control
, argp
, sizeof(control
)))
3612 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3615 case KVM_XEN_HVM_CONFIG
: {
3617 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3618 sizeof(struct kvm_xen_hvm_config
)))
3621 if (kvm
->arch
.xen_hvm_config
.flags
)
3626 case KVM_SET_CLOCK
: {
3627 struct kvm_clock_data user_ns
;
3632 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3640 local_irq_disable();
3641 now_ns
= get_kernel_ns();
3642 delta
= user_ns
.clock
- now_ns
;
3644 kvm
->arch
.kvmclock_offset
= delta
;
3647 case KVM_GET_CLOCK
: {
3648 struct kvm_clock_data user_ns
;
3651 local_irq_disable();
3652 now_ns
= get_kernel_ns();
3653 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3656 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3659 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3672 static void kvm_init_msr_list(void)
3677 /* skip the first msrs in the list. KVM-specific */
3678 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3679 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3682 msrs_to_save
[j
] = msrs_to_save
[i
];
3685 num_msrs_to_save
= j
;
3688 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3696 if (!(vcpu
->arch
.apic
&&
3697 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3698 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3709 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3716 if (!(vcpu
->arch
.apic
&&
3717 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3718 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3720 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3730 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3731 struct kvm_segment
*var
, int seg
)
3733 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3736 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3737 struct kvm_segment
*var
, int seg
)
3739 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3742 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3745 struct x86_exception exception
;
3747 BUG_ON(!mmu_is_nested(vcpu
));
3749 /* NPT walks are always user-walks */
3750 access
|= PFERR_USER_MASK
;
3751 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3756 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3757 struct x86_exception
*exception
)
3759 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3760 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3763 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3764 struct x86_exception
*exception
)
3766 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3767 access
|= PFERR_FETCH_MASK
;
3768 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3771 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3772 struct x86_exception
*exception
)
3774 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3775 access
|= PFERR_WRITE_MASK
;
3776 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3779 /* uses this to access any guest's mapped memory without checking CPL */
3780 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3781 struct x86_exception
*exception
)
3783 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3786 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3787 struct kvm_vcpu
*vcpu
, u32 access
,
3788 struct x86_exception
*exception
)
3791 int r
= X86EMUL_CONTINUE
;
3794 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3796 unsigned offset
= addr
& (PAGE_SIZE
-1);
3797 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3800 if (gpa
== UNMAPPED_GVA
)
3801 return X86EMUL_PROPAGATE_FAULT
;
3802 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3804 r
= X86EMUL_IO_NEEDED
;
3816 /* used for instruction fetching */
3817 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3818 gva_t addr
, void *val
, unsigned int bytes
,
3819 struct x86_exception
*exception
)
3821 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3822 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3824 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3825 access
| PFERR_FETCH_MASK
,
3829 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3830 gva_t addr
, void *val
, unsigned int bytes
,
3831 struct x86_exception
*exception
)
3833 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3834 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3836 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3839 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
3841 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3842 gva_t addr
, void *val
, unsigned int bytes
,
3843 struct x86_exception
*exception
)
3845 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3846 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3849 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3850 gva_t addr
, void *val
,
3852 struct x86_exception
*exception
)
3854 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3856 int r
= X86EMUL_CONTINUE
;
3859 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3862 unsigned offset
= addr
& (PAGE_SIZE
-1);
3863 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3866 if (gpa
== UNMAPPED_GVA
)
3867 return X86EMUL_PROPAGATE_FAULT
;
3868 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3870 r
= X86EMUL_IO_NEEDED
;
3881 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
3883 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
3884 gpa_t
*gpa
, struct x86_exception
*exception
,
3887 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
3888 | (write
? PFERR_WRITE_MASK
: 0);
3890 if (vcpu_match_mmio_gva(vcpu
, gva
)
3891 && !permission_fault(vcpu
->arch
.walk_mmu
, vcpu
->arch
.access
, access
)) {
3892 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
3893 (gva
& (PAGE_SIZE
- 1));
3894 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
3898 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3900 if (*gpa
== UNMAPPED_GVA
)
3903 /* For APIC access vmexit */
3904 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3907 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
3908 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
3915 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3916 const void *val
, int bytes
)
3920 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3923 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
3927 struct read_write_emulator_ops
{
3928 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
3930 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3931 void *val
, int bytes
);
3932 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3933 int bytes
, void *val
);
3934 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3935 void *val
, int bytes
);
3939 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
3941 if (vcpu
->mmio_read_completed
) {
3942 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3943 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
3944 vcpu
->mmio_read_completed
= 0;
3951 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3952 void *val
, int bytes
)
3954 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3957 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3958 void *val
, int bytes
)
3960 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
3963 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
3965 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3966 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
3969 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3970 void *val
, int bytes
)
3972 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3973 return X86EMUL_IO_NEEDED
;
3976 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3977 void *val
, int bytes
)
3979 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
3981 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, frag
->len
);
3982 return X86EMUL_CONTINUE
;
3985 static const struct read_write_emulator_ops read_emultor
= {
3986 .read_write_prepare
= read_prepare
,
3987 .read_write_emulate
= read_emulate
,
3988 .read_write_mmio
= vcpu_mmio_read
,
3989 .read_write_exit_mmio
= read_exit_mmio
,
3992 static const struct read_write_emulator_ops write_emultor
= {
3993 .read_write_emulate
= write_emulate
,
3994 .read_write_mmio
= write_mmio
,
3995 .read_write_exit_mmio
= write_exit_mmio
,
3999 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4001 struct x86_exception
*exception
,
4002 struct kvm_vcpu
*vcpu
,
4003 const struct read_write_emulator_ops
*ops
)
4007 bool write
= ops
->write
;
4008 struct kvm_mmio_fragment
*frag
;
4010 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4013 return X86EMUL_PROPAGATE_FAULT
;
4015 /* For APIC access vmexit */
4019 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4020 return X86EMUL_CONTINUE
;
4024 * Is this MMIO handled locally?
4026 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4027 if (handled
== bytes
)
4028 return X86EMUL_CONTINUE
;
4035 unsigned now
= min(bytes
, 8U);
4037 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4046 return X86EMUL_CONTINUE
;
4049 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4050 void *val
, unsigned int bytes
,
4051 struct x86_exception
*exception
,
4052 const struct read_write_emulator_ops
*ops
)
4054 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4058 if (ops
->read_write_prepare
&&
4059 ops
->read_write_prepare(vcpu
, val
, bytes
))
4060 return X86EMUL_CONTINUE
;
4062 vcpu
->mmio_nr_fragments
= 0;
4064 /* Crossing a page boundary? */
4065 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4068 now
= -addr
& ~PAGE_MASK
;
4069 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4072 if (rc
!= X86EMUL_CONTINUE
)
4079 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4081 if (rc
!= X86EMUL_CONTINUE
)
4084 if (!vcpu
->mmio_nr_fragments
)
4087 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4089 vcpu
->mmio_needed
= 1;
4090 vcpu
->mmio_cur_fragment
= 0;
4092 vcpu
->run
->mmio
.len
= vcpu
->mmio_fragments
[0].len
;
4093 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4094 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4095 vcpu
->run
->mmio
.phys_addr
= gpa
;
4097 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4100 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4104 struct x86_exception
*exception
)
4106 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4107 exception
, &read_emultor
);
4110 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4114 struct x86_exception
*exception
)
4116 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4117 exception
, &write_emultor
);
4120 #define CMPXCHG_TYPE(t, ptr, old, new) \
4121 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4123 #ifdef CONFIG_X86_64
4124 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4126 # define CMPXCHG64(ptr, old, new) \
4127 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4130 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4135 struct x86_exception
*exception
)
4137 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4143 /* guests cmpxchg8b have to be emulated atomically */
4144 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4147 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4149 if (gpa
== UNMAPPED_GVA
||
4150 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4153 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4156 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4157 if (is_error_page(page
))
4160 kaddr
= kmap_atomic(page
);
4161 kaddr
+= offset_in_page(gpa
);
4164 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4167 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4170 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4173 exchanged
= CMPXCHG64(kaddr
, old
, new);
4178 kunmap_atomic(kaddr
);
4179 kvm_release_page_dirty(page
);
4182 return X86EMUL_CMPXCHG_FAILED
;
4184 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4186 return X86EMUL_CONTINUE
;
4189 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4191 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4194 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4196 /* TODO: String I/O for in kernel device */
4199 if (vcpu
->arch
.pio
.in
)
4200 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4201 vcpu
->arch
.pio
.size
, pd
);
4203 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4204 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4209 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4210 unsigned short port
, void *val
,
4211 unsigned int count
, bool in
)
4213 trace_kvm_pio(!in
, port
, size
, count
);
4215 vcpu
->arch
.pio
.port
= port
;
4216 vcpu
->arch
.pio
.in
= in
;
4217 vcpu
->arch
.pio
.count
= count
;
4218 vcpu
->arch
.pio
.size
= size
;
4220 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4221 vcpu
->arch
.pio
.count
= 0;
4225 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4226 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4227 vcpu
->run
->io
.size
= size
;
4228 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4229 vcpu
->run
->io
.count
= count
;
4230 vcpu
->run
->io
.port
= port
;
4235 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4236 int size
, unsigned short port
, void *val
,
4239 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4242 if (vcpu
->arch
.pio
.count
)
4245 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4248 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4249 vcpu
->arch
.pio
.count
= 0;
4256 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4257 int size
, unsigned short port
,
4258 const void *val
, unsigned int count
)
4260 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4262 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4263 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4266 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4268 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4271 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4273 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4276 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4278 if (!need_emulate_wbinvd(vcpu
))
4279 return X86EMUL_CONTINUE
;
4281 if (kvm_x86_ops
->has_wbinvd_exit()) {
4282 int cpu
= get_cpu();
4284 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4285 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4286 wbinvd_ipi
, NULL
, 1);
4288 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4291 return X86EMUL_CONTINUE
;
4293 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4295 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4297 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4300 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4302 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4305 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4308 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4311 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4313 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4316 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4318 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4319 unsigned long value
;
4323 value
= kvm_read_cr0(vcpu
);
4326 value
= vcpu
->arch
.cr2
;
4329 value
= kvm_read_cr3(vcpu
);
4332 value
= kvm_read_cr4(vcpu
);
4335 value
= kvm_get_cr8(vcpu
);
4338 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4345 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4347 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4352 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4355 vcpu
->arch
.cr2
= val
;
4358 res
= kvm_set_cr3(vcpu
, val
);
4361 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4364 res
= kvm_set_cr8(vcpu
, val
);
4367 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4374 static void emulator_set_rflags(struct x86_emulate_ctxt
*ctxt
, ulong val
)
4376 kvm_set_rflags(emul_to_vcpu(ctxt
), val
);
4379 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4381 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4384 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4386 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4389 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4391 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4394 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4396 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4399 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4401 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4404 static unsigned long emulator_get_cached_segment_base(
4405 struct x86_emulate_ctxt
*ctxt
, int seg
)
4407 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4410 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4411 struct desc_struct
*desc
, u32
*base3
,
4414 struct kvm_segment var
;
4416 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4417 *selector
= var
.selector
;
4424 set_desc_limit(desc
, var
.limit
);
4425 set_desc_base(desc
, (unsigned long)var
.base
);
4426 #ifdef CONFIG_X86_64
4428 *base3
= var
.base
>> 32;
4430 desc
->type
= var
.type
;
4432 desc
->dpl
= var
.dpl
;
4433 desc
->p
= var
.present
;
4434 desc
->avl
= var
.avl
;
4442 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4443 struct desc_struct
*desc
, u32 base3
,
4446 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4447 struct kvm_segment var
;
4449 var
.selector
= selector
;
4450 var
.base
= get_desc_base(desc
);
4451 #ifdef CONFIG_X86_64
4452 var
.base
|= ((u64
)base3
) << 32;
4454 var
.limit
= get_desc_limit(desc
);
4456 var
.limit
= (var
.limit
<< 12) | 0xfff;
4457 var
.type
= desc
->type
;
4458 var
.present
= desc
->p
;
4459 var
.dpl
= desc
->dpl
;
4464 var
.avl
= desc
->avl
;
4465 var
.present
= desc
->p
;
4466 var
.unusable
= !var
.present
;
4469 kvm_set_segment(vcpu
, &var
, seg
);
4473 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4474 u32 msr_index
, u64
*pdata
)
4476 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4479 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4480 u32 msr_index
, u64 data
)
4482 return kvm_set_msr(emul_to_vcpu(ctxt
), msr_index
, data
);
4485 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4486 u32 pmc
, u64
*pdata
)
4488 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4491 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4493 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4496 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4499 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4501 * CR0.TS may reference the host fpu state, not the guest fpu state,
4502 * so it may be clear at this point.
4507 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4512 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4513 struct x86_instruction_info
*info
,
4514 enum x86_intercept_stage stage
)
4516 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4519 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4520 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4522 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4525 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4527 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4530 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4532 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4535 static const struct x86_emulate_ops emulate_ops
= {
4536 .read_gpr
= emulator_read_gpr
,
4537 .write_gpr
= emulator_write_gpr
,
4538 .read_std
= kvm_read_guest_virt_system
,
4539 .write_std
= kvm_write_guest_virt_system
,
4540 .fetch
= kvm_fetch_guest_virt
,
4541 .read_emulated
= emulator_read_emulated
,
4542 .write_emulated
= emulator_write_emulated
,
4543 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4544 .invlpg
= emulator_invlpg
,
4545 .pio_in_emulated
= emulator_pio_in_emulated
,
4546 .pio_out_emulated
= emulator_pio_out_emulated
,
4547 .get_segment
= emulator_get_segment
,
4548 .set_segment
= emulator_set_segment
,
4549 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4550 .get_gdt
= emulator_get_gdt
,
4551 .get_idt
= emulator_get_idt
,
4552 .set_gdt
= emulator_set_gdt
,
4553 .set_idt
= emulator_set_idt
,
4554 .get_cr
= emulator_get_cr
,
4555 .set_cr
= emulator_set_cr
,
4556 .set_rflags
= emulator_set_rflags
,
4557 .cpl
= emulator_get_cpl
,
4558 .get_dr
= emulator_get_dr
,
4559 .set_dr
= emulator_set_dr
,
4560 .set_msr
= emulator_set_msr
,
4561 .get_msr
= emulator_get_msr
,
4562 .read_pmc
= emulator_read_pmc
,
4563 .halt
= emulator_halt
,
4564 .wbinvd
= emulator_wbinvd
,
4565 .fix_hypercall
= emulator_fix_hypercall
,
4566 .get_fpu
= emulator_get_fpu
,
4567 .put_fpu
= emulator_put_fpu
,
4568 .intercept
= emulator_intercept
,
4569 .get_cpuid
= emulator_get_cpuid
,
4572 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4574 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4576 * an sti; sti; sequence only disable interrupts for the first
4577 * instruction. So, if the last instruction, be it emulated or
4578 * not, left the system with the INT_STI flag enabled, it
4579 * means that the last instruction is an sti. We should not
4580 * leave the flag on in this case. The same goes for mov ss
4582 if (!(int_shadow
& mask
))
4583 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4586 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4588 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4589 if (ctxt
->exception
.vector
== PF_VECTOR
)
4590 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4591 else if (ctxt
->exception
.error_code_valid
)
4592 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4593 ctxt
->exception
.error_code
);
4595 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4598 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
)
4600 memset(&ctxt
->twobyte
, 0,
4601 (void *)&ctxt
->_regs
- (void *)&ctxt
->twobyte
);
4603 ctxt
->fetch
.start
= 0;
4604 ctxt
->fetch
.end
= 0;
4605 ctxt
->io_read
.pos
= 0;
4606 ctxt
->io_read
.end
= 0;
4607 ctxt
->mem_read
.pos
= 0;
4608 ctxt
->mem_read
.end
= 0;
4611 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4613 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4616 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4618 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4619 ctxt
->eip
= kvm_rip_read(vcpu
);
4620 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4621 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4622 cs_l
? X86EMUL_MODE_PROT64
:
4623 cs_db
? X86EMUL_MODE_PROT32
:
4624 X86EMUL_MODE_PROT16
;
4625 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4627 init_decode_cache(ctxt
);
4628 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4631 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4633 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4636 init_emulate_ctxt(vcpu
);
4640 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4641 ret
= emulate_int_real(ctxt
, irq
);
4643 if (ret
!= X86EMUL_CONTINUE
)
4644 return EMULATE_FAIL
;
4646 ctxt
->eip
= ctxt
->_eip
;
4647 kvm_rip_write(vcpu
, ctxt
->eip
);
4648 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4650 if (irq
== NMI_VECTOR
)
4651 vcpu
->arch
.nmi_pending
= 0;
4653 vcpu
->arch
.interrupt
.pending
= false;
4655 return EMULATE_DONE
;
4657 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4659 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4661 int r
= EMULATE_DONE
;
4663 ++vcpu
->stat
.insn_emulation_fail
;
4664 trace_kvm_emulate_insn_failed(vcpu
);
4665 if (!is_guest_mode(vcpu
)) {
4666 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4667 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4668 vcpu
->run
->internal
.ndata
= 0;
4671 kvm_queue_exception(vcpu
, UD_VECTOR
);
4676 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4685 * if emulation was due to access to shadowed page table
4686 * and it failed try to unshadow page and re-enter the
4687 * guest to let CPU execute the instruction.
4689 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4692 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4694 if (gpa
== UNMAPPED_GVA
)
4695 return true; /* let cpu generate fault */
4698 * Do not retry the unhandleable instruction if it faults on the
4699 * readonly host memory, otherwise it will goto a infinite loop:
4700 * retry instruction -> write #PF -> emulation fail -> retry
4701 * instruction -> ...
4703 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
4704 if (!is_error_noslot_pfn(pfn
)) {
4705 kvm_release_pfn_clean(pfn
);
4712 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
4713 unsigned long cr2
, int emulation_type
)
4715 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4716 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
4718 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
4719 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
4722 * If the emulation is caused by #PF and it is non-page_table
4723 * writing instruction, it means the VM-EXIT is caused by shadow
4724 * page protected, we can zap the shadow page and retry this
4725 * instruction directly.
4727 * Note: if the guest uses a non-page-table modifying instruction
4728 * on the PDE that points to the instruction, then we will unmap
4729 * the instruction and go to an infinite loop. So, we cache the
4730 * last retried eip and the last fault address, if we meet the eip
4731 * and the address again, we can break out of the potential infinite
4734 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
4736 if (!(emulation_type
& EMULTYPE_RETRY
))
4739 if (x86_page_table_writing_insn(ctxt
))
4742 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
4745 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
4746 vcpu
->arch
.last_retry_addr
= cr2
;
4748 if (!vcpu
->arch
.mmu
.direct_map
)
4749 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4751 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4756 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
4757 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
4759 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
4766 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4767 bool writeback
= true;
4769 kvm_clear_exception_queue(vcpu
);
4771 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4772 init_emulate_ctxt(vcpu
);
4773 ctxt
->interruptibility
= 0;
4774 ctxt
->have_exception
= false;
4775 ctxt
->perm_ok
= false;
4777 ctxt
->only_vendor_specific_insn
4778 = emulation_type
& EMULTYPE_TRAP_UD
;
4780 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
4782 trace_kvm_emulate_insn_start(vcpu
);
4783 ++vcpu
->stat
.insn_emulation
;
4784 if (r
!= EMULATION_OK
) {
4785 if (emulation_type
& EMULTYPE_TRAP_UD
)
4786 return EMULATE_FAIL
;
4787 if (reexecute_instruction(vcpu
, cr2
))
4788 return EMULATE_DONE
;
4789 if (emulation_type
& EMULTYPE_SKIP
)
4790 return EMULATE_FAIL
;
4791 return handle_emulation_failure(vcpu
);
4795 if (emulation_type
& EMULTYPE_SKIP
) {
4796 kvm_rip_write(vcpu
, ctxt
->_eip
);
4797 return EMULATE_DONE
;
4800 if (retry_instruction(ctxt
, cr2
, emulation_type
))
4801 return EMULATE_DONE
;
4803 /* this is needed for vmware backdoor interface to work since it
4804 changes registers values during IO operation */
4805 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
4806 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4807 emulator_invalidate_register_cache(ctxt
);
4811 r
= x86_emulate_insn(ctxt
);
4813 if (r
== EMULATION_INTERCEPTED
)
4814 return EMULATE_DONE
;
4816 if (r
== EMULATION_FAILED
) {
4817 if (reexecute_instruction(vcpu
, cr2
))
4818 return EMULATE_DONE
;
4820 return handle_emulation_failure(vcpu
);
4823 if (ctxt
->have_exception
) {
4824 inject_emulated_exception(vcpu
);
4826 } else if (vcpu
->arch
.pio
.count
) {
4827 if (!vcpu
->arch
.pio
.in
)
4828 vcpu
->arch
.pio
.count
= 0;
4831 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
4833 r
= EMULATE_DO_MMIO
;
4834 } else if (vcpu
->mmio_needed
) {
4835 if (!vcpu
->mmio_is_write
)
4837 r
= EMULATE_DO_MMIO
;
4838 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
4839 } else if (r
== EMULATION_RESTART
)
4845 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
4846 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4847 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4848 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
4849 kvm_rip_write(vcpu
, ctxt
->eip
);
4851 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
4855 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
4857 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4859 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4860 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
4861 size
, port
, &val
, 1);
4862 /* do not return to emulator after return from userspace */
4863 vcpu
->arch
.pio
.count
= 0;
4866 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4868 static void tsc_bad(void *info
)
4870 __this_cpu_write(cpu_tsc_khz
, 0);
4873 static void tsc_khz_changed(void *data
)
4875 struct cpufreq_freqs
*freq
= data
;
4876 unsigned long khz
= 0;
4880 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4881 khz
= cpufreq_quick_get(raw_smp_processor_id());
4884 __this_cpu_write(cpu_tsc_khz
, khz
);
4887 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4890 struct cpufreq_freqs
*freq
= data
;
4892 struct kvm_vcpu
*vcpu
;
4893 int i
, send_ipi
= 0;
4896 * We allow guests to temporarily run on slowing clocks,
4897 * provided we notify them after, or to run on accelerating
4898 * clocks, provided we notify them before. Thus time never
4901 * However, we have a problem. We can't atomically update
4902 * the frequency of a given CPU from this function; it is
4903 * merely a notifier, which can be called from any CPU.
4904 * Changing the TSC frequency at arbitrary points in time
4905 * requires a recomputation of local variables related to
4906 * the TSC for each VCPU. We must flag these local variables
4907 * to be updated and be sure the update takes place with the
4908 * new frequency before any guests proceed.
4910 * Unfortunately, the combination of hotplug CPU and frequency
4911 * change creates an intractable locking scenario; the order
4912 * of when these callouts happen is undefined with respect to
4913 * CPU hotplug, and they can race with each other. As such,
4914 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4915 * undefined; you can actually have a CPU frequency change take
4916 * place in between the computation of X and the setting of the
4917 * variable. To protect against this problem, all updates of
4918 * the per_cpu tsc_khz variable are done in an interrupt
4919 * protected IPI, and all callers wishing to update the value
4920 * must wait for a synchronous IPI to complete (which is trivial
4921 * if the caller is on the CPU already). This establishes the
4922 * necessary total order on variable updates.
4924 * Note that because a guest time update may take place
4925 * anytime after the setting of the VCPU's request bit, the
4926 * correct TSC value must be set before the request. However,
4927 * to ensure the update actually makes it to any guest which
4928 * starts running in hardware virtualization between the set
4929 * and the acquisition of the spinlock, we must also ping the
4930 * CPU after setting the request bit.
4934 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4936 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4939 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4941 raw_spin_lock(&kvm_lock
);
4942 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4943 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4944 if (vcpu
->cpu
!= freq
->cpu
)
4946 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4947 if (vcpu
->cpu
!= smp_processor_id())
4951 raw_spin_unlock(&kvm_lock
);
4953 if (freq
->old
< freq
->new && send_ipi
) {
4955 * We upscale the frequency. Must make the guest
4956 * doesn't see old kvmclock values while running with
4957 * the new frequency, otherwise we risk the guest sees
4958 * time go backwards.
4960 * In case we update the frequency for another cpu
4961 * (which might be in guest context) send an interrupt
4962 * to kick the cpu out of guest context. Next time
4963 * guest context is entered kvmclock will be updated,
4964 * so the guest will not see stale values.
4966 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4971 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4972 .notifier_call
= kvmclock_cpufreq_notifier
4975 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4976 unsigned long action
, void *hcpu
)
4978 unsigned int cpu
= (unsigned long)hcpu
;
4982 case CPU_DOWN_FAILED
:
4983 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4985 case CPU_DOWN_PREPARE
:
4986 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4992 static struct notifier_block kvmclock_cpu_notifier_block
= {
4993 .notifier_call
= kvmclock_cpu_notifier
,
4994 .priority
= -INT_MAX
4997 static void kvm_timer_init(void)
5001 max_tsc_khz
= tsc_khz
;
5002 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5003 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5004 #ifdef CONFIG_CPU_FREQ
5005 struct cpufreq_policy policy
;
5006 memset(&policy
, 0, sizeof(policy
));
5008 cpufreq_get_policy(&policy
, cpu
);
5009 if (policy
.cpuinfo
.max_freq
)
5010 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5013 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5014 CPUFREQ_TRANSITION_NOTIFIER
);
5016 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5017 for_each_online_cpu(cpu
)
5018 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5021 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5023 int kvm_is_in_guest(void)
5025 return __this_cpu_read(current_vcpu
) != NULL
;
5028 static int kvm_is_user_mode(void)
5032 if (__this_cpu_read(current_vcpu
))
5033 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5035 return user_mode
!= 0;
5038 static unsigned long kvm_get_guest_ip(void)
5040 unsigned long ip
= 0;
5042 if (__this_cpu_read(current_vcpu
))
5043 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5048 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5049 .is_in_guest
= kvm_is_in_guest
,
5050 .is_user_mode
= kvm_is_user_mode
,
5051 .get_guest_ip
= kvm_get_guest_ip
,
5054 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5056 __this_cpu_write(current_vcpu
, vcpu
);
5058 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5060 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5062 __this_cpu_write(current_vcpu
, NULL
);
5064 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5066 static void kvm_set_mmio_spte_mask(void)
5069 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5072 * Set the reserved bits and the present bit of an paging-structure
5073 * entry to generate page fault with PFER.RSV = 1.
5075 mask
= ((1ull << (62 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
5078 #ifdef CONFIG_X86_64
5080 * If reserved bit is not supported, clear the present bit to disable
5083 if (maxphyaddr
== 52)
5087 kvm_mmu_set_mmio_spte_mask(mask
);
5090 #ifdef CONFIG_X86_64
5091 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5095 struct kvm_vcpu
*vcpu
;
5098 raw_spin_lock(&kvm_lock
);
5099 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5100 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5101 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
, &vcpu
->requests
);
5102 atomic_set(&kvm_guest_has_master_clock
, 0);
5103 raw_spin_unlock(&kvm_lock
);
5106 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5109 * Notification about pvclock gtod data update.
5111 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5114 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5115 struct timekeeper
*tk
= priv
;
5117 update_pvclock_gtod(tk
);
5119 /* disable master clock if host does not trust, or does not
5120 * use, TSC clocksource
5122 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5123 atomic_read(&kvm_guest_has_master_clock
) != 0)
5124 queue_work(system_long_wq
, &pvclock_gtod_work
);
5129 static struct notifier_block pvclock_gtod_notifier
= {
5130 .notifier_call
= pvclock_gtod_notify
,
5134 int kvm_arch_init(void *opaque
)
5137 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
5140 printk(KERN_ERR
"kvm: already loaded the other module\n");
5145 if (!ops
->cpu_has_kvm_support()) {
5146 printk(KERN_ERR
"kvm: no hardware support\n");
5150 if (ops
->disabled_by_bios()) {
5151 printk(KERN_ERR
"kvm: disabled by bios\n");
5156 r
= kvm_mmu_module_init();
5160 kvm_set_mmio_spte_mask();
5161 kvm_init_msr_list();
5164 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5165 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5169 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5172 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5175 #ifdef CONFIG_X86_64
5176 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5185 void kvm_arch_exit(void)
5187 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5189 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5190 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5191 CPUFREQ_TRANSITION_NOTIFIER
);
5192 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5193 #ifdef CONFIG_X86_64
5194 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5197 kvm_mmu_module_exit();
5200 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5202 ++vcpu
->stat
.halt_exits
;
5203 if (irqchip_in_kernel(vcpu
->kvm
)) {
5204 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5207 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5211 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5213 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5215 u64 param
, ingpa
, outgpa
, ret
;
5216 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5217 bool fast
, longmode
;
5221 * hypercall generates UD from non zero cpl and real mode
5224 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5225 kvm_queue_exception(vcpu
, UD_VECTOR
);
5229 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5230 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
5233 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5234 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5235 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5236 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5237 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5238 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5240 #ifdef CONFIG_X86_64
5242 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5243 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5244 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5248 code
= param
& 0xffff;
5249 fast
= (param
>> 16) & 0x1;
5250 rep_cnt
= (param
>> 32) & 0xfff;
5251 rep_idx
= (param
>> 48) & 0xfff;
5253 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5256 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5257 kvm_vcpu_on_spin(vcpu
);
5260 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5264 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5266 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5268 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5269 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5275 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5277 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5280 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5281 return kvm_hv_hypercall(vcpu
);
5283 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5284 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5285 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5286 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5287 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5289 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5291 if (!is_long_mode(vcpu
)) {
5299 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5305 case KVM_HC_VAPIC_POLL_IRQ
:
5313 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5314 ++vcpu
->stat
.hypercalls
;
5317 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5319 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5321 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5322 char instruction
[3];
5323 unsigned long rip
= kvm_rip_read(vcpu
);
5326 * Blow out the MMU to ensure that no other VCPU has an active mapping
5327 * to ensure that the updated hypercall appears atomically across all
5330 kvm_mmu_zap_all(vcpu
->kvm
);
5332 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5334 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5338 * Check if userspace requested an interrupt window, and that the
5339 * interrupt window is open.
5341 * No need to exit to userspace if we already have an interrupt queued.
5343 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5345 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5346 vcpu
->run
->request_interrupt_window
&&
5347 kvm_arch_interrupt_allowed(vcpu
));
5350 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5352 struct kvm_run
*kvm_run
= vcpu
->run
;
5354 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5355 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5356 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5357 if (irqchip_in_kernel(vcpu
->kvm
))
5358 kvm_run
->ready_for_interrupt_injection
= 1;
5360 kvm_run
->ready_for_interrupt_injection
=
5361 kvm_arch_interrupt_allowed(vcpu
) &&
5362 !kvm_cpu_has_interrupt(vcpu
) &&
5363 !kvm_event_needs_reinjection(vcpu
);
5366 static int vapic_enter(struct kvm_vcpu
*vcpu
)
5368 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5371 if (!apic
|| !apic
->vapic_addr
)
5374 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5375 if (is_error_page(page
))
5378 vcpu
->arch
.apic
->vapic_page
= page
;
5382 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5384 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5387 if (!apic
|| !apic
->vapic_addr
)
5390 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5391 kvm_release_page_dirty(apic
->vapic_page
);
5392 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5393 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5396 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5400 if (!kvm_x86_ops
->update_cr8_intercept
)
5403 if (!vcpu
->arch
.apic
)
5406 if (!vcpu
->arch
.apic
->vapic_addr
)
5407 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5414 tpr
= kvm_lapic_get_cr8(vcpu
);
5416 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5419 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5421 /* try to reinject previous events if any */
5422 if (vcpu
->arch
.exception
.pending
) {
5423 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5424 vcpu
->arch
.exception
.has_error_code
,
5425 vcpu
->arch
.exception
.error_code
);
5426 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5427 vcpu
->arch
.exception
.has_error_code
,
5428 vcpu
->arch
.exception
.error_code
,
5429 vcpu
->arch
.exception
.reinject
);
5433 if (vcpu
->arch
.nmi_injected
) {
5434 kvm_x86_ops
->set_nmi(vcpu
);
5438 if (vcpu
->arch
.interrupt
.pending
) {
5439 kvm_x86_ops
->set_irq(vcpu
);
5443 /* try to inject new event if pending */
5444 if (vcpu
->arch
.nmi_pending
) {
5445 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5446 --vcpu
->arch
.nmi_pending
;
5447 vcpu
->arch
.nmi_injected
= true;
5448 kvm_x86_ops
->set_nmi(vcpu
);
5450 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5451 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5452 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5454 kvm_x86_ops
->set_irq(vcpu
);
5459 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5461 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5462 !vcpu
->guest_xcr0_loaded
) {
5463 /* kvm_set_xcr() also depends on this */
5464 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5465 vcpu
->guest_xcr0_loaded
= 1;
5469 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5471 if (vcpu
->guest_xcr0_loaded
) {
5472 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5473 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5474 vcpu
->guest_xcr0_loaded
= 0;
5478 static void process_nmi(struct kvm_vcpu
*vcpu
)
5483 * x86 is limited to one NMI running, and one NMI pending after it.
5484 * If an NMI is already in progress, limit further NMIs to just one.
5485 * Otherwise, allow two (and we'll inject the first one immediately).
5487 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5490 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5491 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5492 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5495 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
5497 #ifdef CONFIG_X86_64
5499 struct kvm_vcpu
*vcpu
;
5500 struct kvm_arch
*ka
= &kvm
->arch
;
5502 spin_lock(&ka
->pvclock_gtod_sync_lock
);
5503 kvm_make_mclock_inprogress_request(kvm
);
5504 /* no guest entries from this point */
5505 pvclock_update_vm_gtod_copy(kvm
);
5507 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5508 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
5510 /* guest entries allowed */
5511 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5512 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
5514 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
5518 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5521 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5522 vcpu
->run
->request_interrupt_window
;
5523 bool req_immediate_exit
= 0;
5525 if (vcpu
->requests
) {
5526 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5527 kvm_mmu_unload(vcpu
);
5528 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5529 __kvm_migrate_timers(vcpu
);
5530 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
5531 kvm_gen_update_masterclock(vcpu
->kvm
);
5532 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5533 r
= kvm_guest_time_update(vcpu
);
5537 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5538 kvm_mmu_sync_roots(vcpu
);
5539 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5540 kvm_x86_ops
->tlb_flush(vcpu
);
5541 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5542 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5546 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5547 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5551 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5552 vcpu
->fpu_active
= 0;
5553 kvm_x86_ops
->fpu_deactivate(vcpu
);
5555 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5556 /* Page is swapped out. Do synthetic halt */
5557 vcpu
->arch
.apf
.halted
= true;
5561 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
5562 record_steal_time(vcpu
);
5563 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
5565 req_immediate_exit
=
5566 kvm_check_request(KVM_REQ_IMMEDIATE_EXIT
, vcpu
);
5567 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
5568 kvm_handle_pmu_event(vcpu
);
5569 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
5570 kvm_deliver_pmi(vcpu
);
5573 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5574 inject_pending_event(vcpu
);
5576 /* enable NMI/IRQ window open exits if needed */
5577 if (vcpu
->arch
.nmi_pending
)
5578 kvm_x86_ops
->enable_nmi_window(vcpu
);
5579 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5580 kvm_x86_ops
->enable_irq_window(vcpu
);
5582 if (kvm_lapic_enabled(vcpu
)) {
5583 update_cr8_intercept(vcpu
);
5584 kvm_lapic_sync_to_vapic(vcpu
);
5588 r
= kvm_mmu_reload(vcpu
);
5590 goto cancel_injection
;
5595 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5596 if (vcpu
->fpu_active
)
5597 kvm_load_guest_fpu(vcpu
);
5598 kvm_load_guest_xcr0(vcpu
);
5600 vcpu
->mode
= IN_GUEST_MODE
;
5602 /* We should set ->mode before check ->requests,
5603 * see the comment in make_all_cpus_request.
5607 local_irq_disable();
5609 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5610 || need_resched() || signal_pending(current
)) {
5611 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5616 goto cancel_injection
;
5619 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5621 if (req_immediate_exit
)
5622 smp_send_reschedule(vcpu
->cpu
);
5626 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5628 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5629 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5630 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5631 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5634 trace_kvm_entry(vcpu
->vcpu_id
);
5635 kvm_x86_ops
->run(vcpu
);
5638 * If the guest has used debug registers, at least dr7
5639 * will be disabled while returning to the host.
5640 * If we don't have active breakpoints in the host, we don't
5641 * care about the messed up debug address registers. But if
5642 * we have some of them active, restore the old state.
5644 if (hw_breakpoint_active())
5645 hw_breakpoint_restore();
5647 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
5650 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5657 * We must have an instruction between local_irq_enable() and
5658 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5659 * the interrupt shadow. The stat.exits increment will do nicely.
5660 * But we need to prevent reordering, hence this barrier():
5668 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5671 * Profile KVM exit RIPs:
5673 if (unlikely(prof_on
== KVM_PROFILING
)) {
5674 unsigned long rip
= kvm_rip_read(vcpu
);
5675 profile_hit(KVM_PROFILING
, (void *)rip
);
5678 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
5679 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5681 if (vcpu
->arch
.apic_attention
)
5682 kvm_lapic_sync_from_vapic(vcpu
);
5684 r
= kvm_x86_ops
->handle_exit(vcpu
);
5688 kvm_x86_ops
->cancel_injection(vcpu
);
5689 if (unlikely(vcpu
->arch
.apic_attention
))
5690 kvm_lapic_sync_from_vapic(vcpu
);
5696 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5699 struct kvm
*kvm
= vcpu
->kvm
;
5701 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5702 pr_debug("vcpu %d received sipi with vector # %x\n",
5703 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5704 kvm_lapic_reset(vcpu
);
5705 r
= kvm_vcpu_reset(vcpu
);
5708 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5711 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5712 r
= vapic_enter(vcpu
);
5714 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5720 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5721 !vcpu
->arch
.apf
.halted
)
5722 r
= vcpu_enter_guest(vcpu
);
5724 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5725 kvm_vcpu_block(vcpu
);
5726 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5727 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5729 switch(vcpu
->arch
.mp_state
) {
5730 case KVM_MP_STATE_HALTED
:
5731 vcpu
->arch
.mp_state
=
5732 KVM_MP_STATE_RUNNABLE
;
5733 case KVM_MP_STATE_RUNNABLE
:
5734 vcpu
->arch
.apf
.halted
= false;
5736 case KVM_MP_STATE_SIPI_RECEIVED
:
5747 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5748 if (kvm_cpu_has_pending_timer(vcpu
))
5749 kvm_inject_pending_timer_irqs(vcpu
);
5751 if (dm_request_for_irq_injection(vcpu
)) {
5753 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5754 ++vcpu
->stat
.request_irq_exits
;
5757 kvm_check_async_pf_completion(vcpu
);
5759 if (signal_pending(current
)) {
5761 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5762 ++vcpu
->stat
.signal_exits
;
5764 if (need_resched()) {
5765 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5767 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5771 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5778 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
5781 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5782 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
5783 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5784 if (r
!= EMULATE_DONE
)
5789 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
5791 BUG_ON(!vcpu
->arch
.pio
.count
);
5793 return complete_emulated_io(vcpu
);
5797 * Implements the following, as a state machine:
5812 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
5814 struct kvm_run
*run
= vcpu
->run
;
5815 struct kvm_mmio_fragment
*frag
;
5817 BUG_ON(!vcpu
->mmio_needed
);
5819 /* Complete previous fragment */
5820 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
++];
5821 if (!vcpu
->mmio_is_write
)
5822 memcpy(frag
->data
, run
->mmio
.data
, frag
->len
);
5823 if (vcpu
->mmio_cur_fragment
== vcpu
->mmio_nr_fragments
) {
5824 vcpu
->mmio_needed
= 0;
5825 if (vcpu
->mmio_is_write
)
5827 vcpu
->mmio_read_completed
= 1;
5828 return complete_emulated_io(vcpu
);
5830 /* Initiate next fragment */
5832 run
->exit_reason
= KVM_EXIT_MMIO
;
5833 run
->mmio
.phys_addr
= frag
->gpa
;
5834 if (vcpu
->mmio_is_write
)
5835 memcpy(run
->mmio
.data
, frag
->data
, frag
->len
);
5836 run
->mmio
.len
= frag
->len
;
5837 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
5838 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5843 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5848 if (!tsk_used_math(current
) && init_fpu(current
))
5851 if (vcpu
->sigset_active
)
5852 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5854 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5855 kvm_vcpu_block(vcpu
);
5856 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5861 /* re-sync apic's tpr */
5862 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5863 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
5869 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
5870 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
5871 vcpu
->arch
.complete_userspace_io
= NULL
;
5876 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
5878 r
= __vcpu_run(vcpu
);
5881 post_kvm_run_save(vcpu
);
5882 if (vcpu
->sigset_active
)
5883 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5888 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5890 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
5892 * We are here if userspace calls get_regs() in the middle of
5893 * instruction emulation. Registers state needs to be copied
5894 * back from emulation context to vcpu. Userspace shouldn't do
5895 * that usually, but some bad designed PV devices (vmware
5896 * backdoor interface) need this to work
5898 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
5899 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5901 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5902 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5903 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5904 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5905 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5906 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5907 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5908 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5909 #ifdef CONFIG_X86_64
5910 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5911 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5912 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5913 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5914 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5915 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5916 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5917 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5920 regs
->rip
= kvm_rip_read(vcpu
);
5921 regs
->rflags
= kvm_get_rflags(vcpu
);
5926 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5928 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
5929 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5931 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5932 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5933 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5934 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5935 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5936 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5937 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5938 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5939 #ifdef CONFIG_X86_64
5940 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5941 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5942 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5943 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5944 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5945 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5946 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5947 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5950 kvm_rip_write(vcpu
, regs
->rip
);
5951 kvm_set_rflags(vcpu
, regs
->rflags
);
5953 vcpu
->arch
.exception
.pending
= false;
5955 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5960 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5962 struct kvm_segment cs
;
5964 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5968 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5970 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5971 struct kvm_sregs
*sregs
)
5975 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5976 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5977 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5978 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5979 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5980 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5982 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5983 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5985 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5986 sregs
->idt
.limit
= dt
.size
;
5987 sregs
->idt
.base
= dt
.address
;
5988 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5989 sregs
->gdt
.limit
= dt
.size
;
5990 sregs
->gdt
.base
= dt
.address
;
5992 sregs
->cr0
= kvm_read_cr0(vcpu
);
5993 sregs
->cr2
= vcpu
->arch
.cr2
;
5994 sregs
->cr3
= kvm_read_cr3(vcpu
);
5995 sregs
->cr4
= kvm_read_cr4(vcpu
);
5996 sregs
->cr8
= kvm_get_cr8(vcpu
);
5997 sregs
->efer
= vcpu
->arch
.efer
;
5998 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6000 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6002 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6003 set_bit(vcpu
->arch
.interrupt
.nr
,
6004 (unsigned long *)sregs
->interrupt_bitmap
);
6009 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6010 struct kvm_mp_state
*mp_state
)
6012 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6016 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6017 struct kvm_mp_state
*mp_state
)
6019 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6020 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6024 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6025 int reason
, bool has_error_code
, u32 error_code
)
6027 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6030 init_emulate_ctxt(vcpu
);
6032 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6033 has_error_code
, error_code
);
6036 return EMULATE_FAIL
;
6038 kvm_rip_write(vcpu
, ctxt
->eip
);
6039 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6040 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6041 return EMULATE_DONE
;
6043 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6045 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6046 struct kvm_sregs
*sregs
)
6048 int mmu_reset_needed
= 0;
6049 int pending_vec
, max_bits
, idx
;
6052 dt
.size
= sregs
->idt
.limit
;
6053 dt
.address
= sregs
->idt
.base
;
6054 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6055 dt
.size
= sregs
->gdt
.limit
;
6056 dt
.address
= sregs
->gdt
.base
;
6057 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6059 vcpu
->arch
.cr2
= sregs
->cr2
;
6060 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6061 vcpu
->arch
.cr3
= sregs
->cr3
;
6062 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6064 kvm_set_cr8(vcpu
, sregs
->cr8
);
6066 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6067 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6068 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
6070 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6071 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6072 vcpu
->arch
.cr0
= sregs
->cr0
;
6074 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6075 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6076 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6077 kvm_update_cpuid(vcpu
);
6079 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6080 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6081 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6082 mmu_reset_needed
= 1;
6084 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6086 if (mmu_reset_needed
)
6087 kvm_mmu_reset_context(vcpu
);
6089 max_bits
= KVM_NR_INTERRUPTS
;
6090 pending_vec
= find_first_bit(
6091 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6092 if (pending_vec
< max_bits
) {
6093 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6094 pr_debug("Set back pending irq %d\n", pending_vec
);
6097 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6098 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6099 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6100 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6101 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6102 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6104 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6105 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6107 update_cr8_intercept(vcpu
);
6109 /* Older userspace won't unhalt the vcpu on reset. */
6110 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6111 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6113 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6115 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6120 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6121 struct kvm_guest_debug
*dbg
)
6123 unsigned long rflags
;
6126 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6128 if (vcpu
->arch
.exception
.pending
)
6130 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6131 kvm_queue_exception(vcpu
, DB_VECTOR
);
6133 kvm_queue_exception(vcpu
, BP_VECTOR
);
6137 * Read rflags as long as potentially injected trace flags are still
6140 rflags
= kvm_get_rflags(vcpu
);
6142 vcpu
->guest_debug
= dbg
->control
;
6143 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6144 vcpu
->guest_debug
= 0;
6146 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6147 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6148 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6149 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6151 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6152 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6154 kvm_update_dr7(vcpu
);
6156 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6157 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6158 get_segment_base(vcpu
, VCPU_SREG_CS
);
6161 * Trigger an rflags update that will inject or remove the trace
6164 kvm_set_rflags(vcpu
, rflags
);
6166 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6176 * Translate a guest virtual address to a guest physical address.
6178 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6179 struct kvm_translation
*tr
)
6181 unsigned long vaddr
= tr
->linear_address
;
6185 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6186 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6187 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6188 tr
->physical_address
= gpa
;
6189 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6196 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6198 struct i387_fxsave_struct
*fxsave
=
6199 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6201 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6202 fpu
->fcw
= fxsave
->cwd
;
6203 fpu
->fsw
= fxsave
->swd
;
6204 fpu
->ftwx
= fxsave
->twd
;
6205 fpu
->last_opcode
= fxsave
->fop
;
6206 fpu
->last_ip
= fxsave
->rip
;
6207 fpu
->last_dp
= fxsave
->rdp
;
6208 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6213 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6215 struct i387_fxsave_struct
*fxsave
=
6216 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6218 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6219 fxsave
->cwd
= fpu
->fcw
;
6220 fxsave
->swd
= fpu
->fsw
;
6221 fxsave
->twd
= fpu
->ftwx
;
6222 fxsave
->fop
= fpu
->last_opcode
;
6223 fxsave
->rip
= fpu
->last_ip
;
6224 fxsave
->rdp
= fpu
->last_dp
;
6225 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6230 int fx_init(struct kvm_vcpu
*vcpu
)
6234 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6238 fpu_finit(&vcpu
->arch
.guest_fpu
);
6241 * Ensure guest xcr0 is valid for loading
6243 vcpu
->arch
.xcr0
= XSTATE_FP
;
6245 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6249 EXPORT_SYMBOL_GPL(fx_init
);
6251 static void fx_free(struct kvm_vcpu
*vcpu
)
6253 fpu_free(&vcpu
->arch
.guest_fpu
);
6256 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6258 if (vcpu
->guest_fpu_loaded
)
6262 * Restore all possible states in the guest,
6263 * and assume host would use all available bits.
6264 * Guest xcr0 would be loaded later.
6266 kvm_put_guest_xcr0(vcpu
);
6267 vcpu
->guest_fpu_loaded
= 1;
6268 __kernel_fpu_begin();
6269 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6273 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6275 kvm_put_guest_xcr0(vcpu
);
6277 if (!vcpu
->guest_fpu_loaded
)
6280 vcpu
->guest_fpu_loaded
= 0;
6281 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6283 ++vcpu
->stat
.fpu_reload
;
6284 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6288 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6290 kvmclock_reset(vcpu
);
6292 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6294 kvm_x86_ops
->vcpu_free(vcpu
);
6297 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6300 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6301 printk_once(KERN_WARNING
6302 "kvm: SMP vm created on host with unstable TSC; "
6303 "guest TSC will not be reliable\n");
6304 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6307 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6311 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6312 r
= vcpu_load(vcpu
);
6315 r
= kvm_vcpu_reset(vcpu
);
6317 r
= kvm_mmu_setup(vcpu
);
6323 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6326 vcpu
->arch
.apf
.msr_val
= 0;
6328 r
= vcpu_load(vcpu
);
6330 kvm_mmu_unload(vcpu
);
6334 kvm_x86_ops
->vcpu_free(vcpu
);
6337 static int kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
6339 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6340 vcpu
->arch
.nmi_pending
= 0;
6341 vcpu
->arch
.nmi_injected
= false;
6343 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6344 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6345 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6346 kvm_update_dr7(vcpu
);
6348 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6349 vcpu
->arch
.apf
.msr_val
= 0;
6350 vcpu
->arch
.st
.msr_val
= 0;
6352 kvmclock_reset(vcpu
);
6354 kvm_clear_async_pf_completion_queue(vcpu
);
6355 kvm_async_pf_hash_reset(vcpu
);
6356 vcpu
->arch
.apf
.halted
= false;
6358 kvm_pmu_reset(vcpu
);
6360 return kvm_x86_ops
->vcpu_reset(vcpu
);
6363 int kvm_arch_hardware_enable(void *garbage
)
6366 struct kvm_vcpu
*vcpu
;
6371 bool stable
, backwards_tsc
= false;
6373 kvm_shared_msr_cpu_online();
6374 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6378 local_tsc
= native_read_tsc();
6379 stable
= !check_tsc_unstable();
6380 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6381 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6382 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6383 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6384 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6385 backwards_tsc
= true;
6386 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6387 max_tsc
= vcpu
->arch
.last_host_tsc
;
6393 * Sometimes, even reliable TSCs go backwards. This happens on
6394 * platforms that reset TSC during suspend or hibernate actions, but
6395 * maintain synchronization. We must compensate. Fortunately, we can
6396 * detect that condition here, which happens early in CPU bringup,
6397 * before any KVM threads can be running. Unfortunately, we can't
6398 * bring the TSCs fully up to date with real time, as we aren't yet far
6399 * enough into CPU bringup that we know how much real time has actually
6400 * elapsed; our helper function, get_kernel_ns() will be using boot
6401 * variables that haven't been updated yet.
6403 * So we simply find the maximum observed TSC above, then record the
6404 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6405 * the adjustment will be applied. Note that we accumulate
6406 * adjustments, in case multiple suspend cycles happen before some VCPU
6407 * gets a chance to run again. In the event that no KVM threads get a
6408 * chance to run, we will miss the entire elapsed period, as we'll have
6409 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6410 * loose cycle time. This isn't too big a deal, since the loss will be
6411 * uniform across all VCPUs (not to mention the scenario is extremely
6412 * unlikely). It is possible that a second hibernate recovery happens
6413 * much faster than a first, causing the observed TSC here to be
6414 * smaller; this would require additional padding adjustment, which is
6415 * why we set last_host_tsc to the local tsc observed here.
6417 * N.B. - this code below runs only on platforms with reliable TSC,
6418 * as that is the only way backwards_tsc is set above. Also note
6419 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6420 * have the same delta_cyc adjustment applied if backwards_tsc
6421 * is detected. Note further, this adjustment is only done once,
6422 * as we reset last_host_tsc on all VCPUs to stop this from being
6423 * called multiple times (one for each physical CPU bringup).
6425 * Platforms with unreliable TSCs don't have to deal with this, they
6426 * will be compensated by the logic in vcpu_load, which sets the TSC to
6427 * catchup mode. This will catchup all VCPUs to real time, but cannot
6428 * guarantee that they stay in perfect synchronization.
6430 if (backwards_tsc
) {
6431 u64 delta_cyc
= max_tsc
- local_tsc
;
6432 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6433 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6434 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
6435 vcpu
->arch
.last_host_tsc
= local_tsc
;
6436 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
6441 * We have to disable TSC offset matching.. if you were
6442 * booting a VM while issuing an S4 host suspend....
6443 * you may have some problem. Solving this issue is
6444 * left as an exercise to the reader.
6446 kvm
->arch
.last_tsc_nsec
= 0;
6447 kvm
->arch
.last_tsc_write
= 0;
6454 void kvm_arch_hardware_disable(void *garbage
)
6456 kvm_x86_ops
->hardware_disable(garbage
);
6457 drop_user_return_notifiers(garbage
);
6460 int kvm_arch_hardware_setup(void)
6462 return kvm_x86_ops
->hardware_setup();
6465 void kvm_arch_hardware_unsetup(void)
6467 kvm_x86_ops
->hardware_unsetup();
6470 void kvm_arch_check_processor_compat(void *rtn
)
6472 kvm_x86_ops
->check_processor_compatibility(rtn
);
6475 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
6477 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
6480 struct static_key kvm_no_apic_vcpu __read_mostly
;
6482 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6488 BUG_ON(vcpu
->kvm
== NULL
);
6491 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6492 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6493 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6495 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6497 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6502 vcpu
->arch
.pio_data
= page_address(page
);
6504 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
6506 r
= kvm_mmu_create(vcpu
);
6508 goto fail_free_pio_data
;
6510 if (irqchip_in_kernel(kvm
)) {
6511 r
= kvm_create_lapic(vcpu
);
6513 goto fail_mmu_destroy
;
6515 static_key_slow_inc(&kvm_no_apic_vcpu
);
6517 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6519 if (!vcpu
->arch
.mce_banks
) {
6521 goto fail_free_lapic
;
6523 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6525 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
6526 goto fail_free_mce_banks
;
6528 kvm_async_pf_hash_reset(vcpu
);
6532 fail_free_mce_banks
:
6533 kfree(vcpu
->arch
.mce_banks
);
6535 kvm_free_lapic(vcpu
);
6537 kvm_mmu_destroy(vcpu
);
6539 free_page((unsigned long)vcpu
->arch
.pio_data
);
6544 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6548 kvm_pmu_destroy(vcpu
);
6549 kfree(vcpu
->arch
.mce_banks
);
6550 kvm_free_lapic(vcpu
);
6551 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6552 kvm_mmu_destroy(vcpu
);
6553 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6554 free_page((unsigned long)vcpu
->arch
.pio_data
);
6555 if (!irqchip_in_kernel(vcpu
->kvm
))
6556 static_key_slow_dec(&kvm_no_apic_vcpu
);
6559 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
6564 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
6565 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
6567 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6568 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
6569 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6570 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
6571 &kvm
->arch
.irq_sources_bitmap
);
6573 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6574 mutex_init(&kvm
->arch
.apic_map_lock
);
6575 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
6577 pvclock_update_vm_gtod_copy(kvm
);
6582 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6585 r
= vcpu_load(vcpu
);
6587 kvm_mmu_unload(vcpu
);
6591 static void kvm_free_vcpus(struct kvm
*kvm
)
6594 struct kvm_vcpu
*vcpu
;
6597 * Unpin any mmu pages first.
6599 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6600 kvm_clear_async_pf_completion_queue(vcpu
);
6601 kvm_unload_vcpu_mmu(vcpu
);
6603 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6604 kvm_arch_vcpu_free(vcpu
);
6606 mutex_lock(&kvm
->lock
);
6607 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6608 kvm
->vcpus
[i
] = NULL
;
6610 atomic_set(&kvm
->online_vcpus
, 0);
6611 mutex_unlock(&kvm
->lock
);
6614 void kvm_arch_sync_events(struct kvm
*kvm
)
6616 kvm_free_all_assigned_devices(kvm
);
6620 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6622 kvm_iommu_unmap_guest(kvm
);
6623 kfree(kvm
->arch
.vpic
);
6624 kfree(kvm
->arch
.vioapic
);
6625 kvm_free_vcpus(kvm
);
6626 if (kvm
->arch
.apic_access_page
)
6627 put_page(kvm
->arch
.apic_access_page
);
6628 if (kvm
->arch
.ept_identity_pagetable
)
6629 put_page(kvm
->arch
.ept_identity_pagetable
);
6630 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
6633 void kvm_arch_free_memslot(struct kvm_memory_slot
*free
,
6634 struct kvm_memory_slot
*dont
)
6638 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6639 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
6640 kvm_kvfree(free
->arch
.rmap
[i
]);
6641 free
->arch
.rmap
[i
] = NULL
;
6646 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
6647 dont
->arch
.lpage_info
[i
- 1]) {
6648 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
6649 free
->arch
.lpage_info
[i
- 1] = NULL
;
6654 int kvm_arch_create_memslot(struct kvm_memory_slot
*slot
, unsigned long npages
)
6658 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6663 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
6664 slot
->base_gfn
, level
) + 1;
6666 slot
->arch
.rmap
[i
] =
6667 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
6668 if (!slot
->arch
.rmap
[i
])
6673 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
6674 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
6675 if (!slot
->arch
.lpage_info
[i
- 1])
6678 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
6679 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
6680 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
6681 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
6682 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
6684 * If the gfn and userspace address are not aligned wrt each
6685 * other, or if explicitly asked to, disable large page
6686 * support for this slot
6688 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
6689 !kvm_largepages_enabled()) {
6692 for (j
= 0; j
< lpages
; ++j
)
6693 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
6700 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6701 kvm_kvfree(slot
->arch
.rmap
[i
]);
6702 slot
->arch
.rmap
[i
] = NULL
;
6706 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
6707 slot
->arch
.lpage_info
[i
- 1] = NULL
;
6712 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6713 struct kvm_memory_slot
*memslot
,
6714 struct kvm_memory_slot old
,
6715 struct kvm_userspace_memory_region
*mem
,
6718 int npages
= memslot
->npages
;
6719 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6721 /* Prevent internal slot pages from being moved by fork()/COW. */
6722 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6723 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6725 /*To keep backward compatibility with older userspace,
6726 *x86 needs to handle !user_alloc case.
6729 if (npages
&& !old
.npages
) {
6730 unsigned long userspace_addr
;
6732 userspace_addr
= vm_mmap(NULL
, 0,
6734 PROT_READ
| PROT_WRITE
,
6738 if (IS_ERR((void *)userspace_addr
))
6739 return PTR_ERR((void *)userspace_addr
);
6741 memslot
->userspace_addr
= userspace_addr
;
6749 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6750 struct kvm_userspace_memory_region
*mem
,
6751 struct kvm_memory_slot old
,
6755 int nr_mmu_pages
= 0, npages
= mem
->memory_size
>> PAGE_SHIFT
;
6757 if (!user_alloc
&& !old
.user_alloc
&& old
.npages
&& !npages
) {
6760 ret
= vm_munmap(old
.userspace_addr
,
6761 old
.npages
* PAGE_SIZE
);
6764 "kvm_vm_ioctl_set_memory_region: "
6765 "failed to munmap memory\n");
6768 if (!kvm
->arch
.n_requested_mmu_pages
)
6769 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6771 spin_lock(&kvm
->mmu_lock
);
6773 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6774 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6775 spin_unlock(&kvm
->mmu_lock
);
6777 * If memory slot is created, or moved, we need to clear all
6780 if (npages
&& old
.base_gfn
!= mem
->guest_phys_addr
>> PAGE_SHIFT
) {
6781 kvm_mmu_zap_all(kvm
);
6782 kvm_reload_remote_mmus(kvm
);
6786 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
6788 kvm_mmu_zap_all(kvm
);
6789 kvm_reload_remote_mmus(kvm
);
6792 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
6793 struct kvm_memory_slot
*slot
)
6795 kvm_arch_flush_shadow_all(kvm
);
6798 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6800 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6801 !vcpu
->arch
.apf
.halted
)
6802 || !list_empty_careful(&vcpu
->async_pf
.done
)
6803 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6804 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
6805 (kvm_arch_interrupt_allowed(vcpu
) &&
6806 kvm_cpu_has_interrupt(vcpu
));
6809 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
6811 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
6814 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6816 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6819 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6821 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6822 get_segment_base(vcpu
, VCPU_SREG_CS
);
6824 return current_rip
== linear_rip
;
6826 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6828 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6830 unsigned long rflags
;
6832 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6833 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6834 rflags
&= ~X86_EFLAGS_TF
;
6837 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6839 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6841 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6842 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6843 rflags
|= X86_EFLAGS_TF
;
6844 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6845 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6847 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6849 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6853 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
6854 is_error_page(work
->page
))
6857 r
= kvm_mmu_reload(vcpu
);
6861 if (!vcpu
->arch
.mmu
.direct_map
&&
6862 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
6865 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6868 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6870 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6873 static inline u32
kvm_async_pf_next_probe(u32 key
)
6875 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6878 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6880 u32 key
= kvm_async_pf_hash_fn(gfn
);
6882 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6883 key
= kvm_async_pf_next_probe(key
);
6885 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6888 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6891 u32 key
= kvm_async_pf_hash_fn(gfn
);
6893 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6894 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6895 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6896 key
= kvm_async_pf_next_probe(key
);
6901 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6903 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6906 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6910 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6912 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6914 j
= kvm_async_pf_next_probe(j
);
6915 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6917 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6919 * k lies cyclically in ]i,j]
6921 * |....j i.k.| or |.k..j i...|
6923 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6924 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6929 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6932 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6936 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6937 struct kvm_async_pf
*work
)
6939 struct x86_exception fault
;
6941 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6942 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6944 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6945 (vcpu
->arch
.apf
.send_user_only
&&
6946 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6947 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6948 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6949 fault
.vector
= PF_VECTOR
;
6950 fault
.error_code_valid
= true;
6951 fault
.error_code
= 0;
6952 fault
.nested_page_fault
= false;
6953 fault
.address
= work
->arch
.token
;
6954 kvm_inject_page_fault(vcpu
, &fault
);
6958 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6959 struct kvm_async_pf
*work
)
6961 struct x86_exception fault
;
6963 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6964 if (is_error_page(work
->page
))
6965 work
->arch
.token
= ~0; /* broadcast wakeup */
6967 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6969 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6970 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6971 fault
.vector
= PF_VECTOR
;
6972 fault
.error_code_valid
= true;
6973 fault
.error_code
= 0;
6974 fault
.nested_page_fault
= false;
6975 fault
.address
= work
->arch
.token
;
6976 kvm_inject_page_fault(vcpu
, &fault
);
6978 vcpu
->arch
.apf
.halted
= false;
6979 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6982 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6984 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6987 return !kvm_event_needs_reinjection(vcpu
) &&
6988 kvm_x86_ops
->interrupt_allowed(vcpu
);
6991 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6992 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6993 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6994 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6995 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6996 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6997 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6998 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6999 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7000 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7001 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7002 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);