2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 static bool __read_mostly report_ignored_msrs
= true;
111 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
113 unsigned int min_timer_period_us
= 200;
114 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
116 static bool __read_mostly kvmclock_periodic_sync
= true;
117 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
119 bool __read_mostly kvm_has_tsc_control
;
120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
121 u32 __read_mostly kvm_max_guest_tsc_khz
;
122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
123 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
125 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
127 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
131 static u32 __read_mostly tsc_tolerance_ppm
= 250;
132 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
135 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
136 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
138 static bool __read_mostly vector_hashing
= true;
139 module_param(vector_hashing
, bool, S_IRUGO
);
141 #define KVM_NR_SHARED_MSRS 16
143 struct kvm_shared_msrs_global
{
145 u32 msrs
[KVM_NR_SHARED_MSRS
];
148 struct kvm_shared_msrs
{
149 struct user_return_notifier urn
;
151 struct kvm_shared_msr_values
{
154 } values
[KVM_NR_SHARED_MSRS
];
157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
158 static struct kvm_shared_msrs __percpu
*shared_msrs
;
160 struct kvm_stats_debugfs_item debugfs_entries
[] = {
161 { "pf_fixed", VCPU_STAT(pf_fixed
) },
162 { "pf_guest", VCPU_STAT(pf_guest
) },
163 { "tlb_flush", VCPU_STAT(tlb_flush
) },
164 { "invlpg", VCPU_STAT(invlpg
) },
165 { "exits", VCPU_STAT(exits
) },
166 { "io_exits", VCPU_STAT(io_exits
) },
167 { "mmio_exits", VCPU_STAT(mmio_exits
) },
168 { "signal_exits", VCPU_STAT(signal_exits
) },
169 { "irq_window", VCPU_STAT(irq_window_exits
) },
170 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
171 { "halt_exits", VCPU_STAT(halt_exits
) },
172 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
173 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
174 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
175 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
176 { "hypercalls", VCPU_STAT(hypercalls
) },
177 { "request_irq", VCPU_STAT(request_irq_exits
) },
178 { "irq_exits", VCPU_STAT(irq_exits
) },
179 { "host_state_reload", VCPU_STAT(host_state_reload
) },
180 { "efer_reload", VCPU_STAT(efer_reload
) },
181 { "fpu_reload", VCPU_STAT(fpu_reload
) },
182 { "insn_emulation", VCPU_STAT(insn_emulation
) },
183 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
184 { "irq_injections", VCPU_STAT(irq_injections
) },
185 { "nmi_injections", VCPU_STAT(nmi_injections
) },
186 { "req_event", VCPU_STAT(req_event
) },
187 { "l1d_flush", VCPU_STAT(l1d_flush
) },
188 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
189 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
190 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
191 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
192 { "mmu_flooded", VM_STAT(mmu_flooded
) },
193 { "mmu_recycled", VM_STAT(mmu_recycled
) },
194 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
195 { "mmu_unsync", VM_STAT(mmu_unsync
) },
196 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
197 { "largepages", VM_STAT(lpages
) },
198 { "max_mmu_page_hash_collisions",
199 VM_STAT(max_mmu_page_hash_collisions
) },
203 u64 __read_mostly host_xcr0
;
205 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
207 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
210 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
211 vcpu
->arch
.apf
.gfns
[i
] = ~0;
214 static void kvm_on_user_return(struct user_return_notifier
*urn
)
217 struct kvm_shared_msrs
*locals
218 = container_of(urn
, struct kvm_shared_msrs
, urn
);
219 struct kvm_shared_msr_values
*values
;
223 * Disabling irqs at this point since the following code could be
224 * interrupted and executed through kvm_arch_hardware_disable()
226 local_irq_save(flags
);
227 if (locals
->registered
) {
228 locals
->registered
= false;
229 user_return_notifier_unregister(urn
);
231 local_irq_restore(flags
);
232 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
233 values
= &locals
->values
[slot
];
234 if (values
->host
!= values
->curr
) {
235 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
236 values
->curr
= values
->host
;
241 static void shared_msr_update(unsigned slot
, u32 msr
)
244 unsigned int cpu
= smp_processor_id();
245 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
247 /* only read, and nobody should modify it at this time,
248 * so don't need lock */
249 if (slot
>= shared_msrs_global
.nr
) {
250 printk(KERN_ERR
"kvm: invalid MSR slot!");
253 rdmsrl_safe(msr
, &value
);
254 smsr
->values
[slot
].host
= value
;
255 smsr
->values
[slot
].curr
= value
;
258 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
260 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
261 shared_msrs_global
.msrs
[slot
] = msr
;
262 if (slot
>= shared_msrs_global
.nr
)
263 shared_msrs_global
.nr
= slot
+ 1;
265 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
267 static void kvm_shared_msr_cpu_online(void)
271 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
272 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
275 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
277 unsigned int cpu
= smp_processor_id();
278 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
281 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
283 smsr
->values
[slot
].curr
= value
;
284 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
288 if (!smsr
->registered
) {
289 smsr
->urn
.on_user_return
= kvm_on_user_return
;
290 user_return_notifier_register(&smsr
->urn
);
291 smsr
->registered
= true;
295 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
297 static void drop_user_return_notifiers(void)
299 unsigned int cpu
= smp_processor_id();
300 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
302 if (smsr
->registered
)
303 kvm_on_user_return(&smsr
->urn
);
306 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
308 return vcpu
->arch
.apic_base
;
310 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
312 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
314 u64 old_state
= vcpu
->arch
.apic_base
&
315 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
316 u64 new_state
= msr_info
->data
&
317 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
318 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
319 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
321 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
323 if (!msr_info
->host_initiated
&&
324 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
325 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
326 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
330 kvm_lapic_set_base(vcpu
, msr_info
->data
);
333 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
335 asmlinkage __visible
void kvm_spurious_fault(void)
337 /* Fault while not rebooting. We want the trace. */
340 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
342 #define EXCPT_BENIGN 0
343 #define EXCPT_CONTRIBUTORY 1
346 static int exception_class(int vector
)
356 return EXCPT_CONTRIBUTORY
;
363 #define EXCPT_FAULT 0
365 #define EXCPT_ABORT 2
366 #define EXCPT_INTERRUPT 3
368 static int exception_type(int vector
)
372 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
373 return EXCPT_INTERRUPT
;
377 /* #DB is trap, as instruction watchpoints are handled elsewhere */
378 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
381 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
384 /* Reserved exceptions will result in fault */
388 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
389 unsigned nr
, bool has_error
, u32 error_code
,
395 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
397 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
399 if (has_error
&& !is_protmode(vcpu
))
403 * On vmentry, vcpu->arch.exception.pending is only
404 * true if an event injection was blocked by
405 * nested_run_pending. In that case, however,
406 * vcpu_enter_guest requests an immediate exit,
407 * and the guest shouldn't proceed far enough to
410 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
411 vcpu
->arch
.exception
.injected
= true;
413 vcpu
->arch
.exception
.pending
= true;
414 vcpu
->arch
.exception
.injected
= false;
416 vcpu
->arch
.exception
.has_error_code
= has_error
;
417 vcpu
->arch
.exception
.nr
= nr
;
418 vcpu
->arch
.exception
.error_code
= error_code
;
422 /* to check exception */
423 prev_nr
= vcpu
->arch
.exception
.nr
;
424 if (prev_nr
== DF_VECTOR
) {
425 /* triple fault -> shutdown */
426 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
429 class1
= exception_class(prev_nr
);
430 class2
= exception_class(nr
);
431 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
432 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
434 * Generate double fault per SDM Table 5-5. Set
435 * exception.pending = true so that the double fault
436 * can trigger a nested vmexit.
438 vcpu
->arch
.exception
.pending
= true;
439 vcpu
->arch
.exception
.injected
= false;
440 vcpu
->arch
.exception
.has_error_code
= true;
441 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
442 vcpu
->arch
.exception
.error_code
= 0;
444 /* replace previous exception with a new one in a hope
445 that instruction re-execution will regenerate lost
450 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
452 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
454 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
456 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
458 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
460 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
462 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
465 kvm_inject_gp(vcpu
, 0);
467 return kvm_skip_emulated_instruction(vcpu
);
471 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
473 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
475 ++vcpu
->stat
.pf_guest
;
476 vcpu
->arch
.exception
.nested_apf
=
477 is_guest_mode(vcpu
) && fault
->async_page_fault
;
478 if (vcpu
->arch
.exception
.nested_apf
)
479 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
481 vcpu
->arch
.cr2
= fault
->address
;
482 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
484 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
486 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
488 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
489 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
491 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
493 return fault
->nested_page_fault
;
496 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
498 atomic_inc(&vcpu
->arch
.nmi_queued
);
499 kvm_make_request(KVM_REQ_NMI
, vcpu
);
501 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
503 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
505 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
507 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
509 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
511 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
513 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
516 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
517 * a #GP and return false.
519 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
521 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
523 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
526 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
528 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
530 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
533 kvm_queue_exception(vcpu
, UD_VECTOR
);
536 EXPORT_SYMBOL_GPL(kvm_require_dr
);
539 * This function will be used to read from the physical memory of the currently
540 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
541 * can read from guest physical or from the guest's guest physical memory.
543 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
544 gfn_t ngfn
, void *data
, int offset
, int len
,
547 struct x86_exception exception
;
551 ngpa
= gfn_to_gpa(ngfn
);
552 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
553 if (real_gfn
== UNMAPPED_GVA
)
556 real_gfn
= gpa_to_gfn(real_gfn
);
558 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
560 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
562 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
563 void *data
, int offset
, int len
, u32 access
)
565 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
566 data
, offset
, len
, access
);
570 * Load the pae pdptrs. Return true is they are all valid.
572 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
574 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
575 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
578 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
580 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
581 offset
* sizeof(u64
), sizeof(pdpte
),
582 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
587 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
588 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
590 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
597 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
598 __set_bit(VCPU_EXREG_PDPTR
,
599 (unsigned long *)&vcpu
->arch
.regs_avail
);
600 __set_bit(VCPU_EXREG_PDPTR
,
601 (unsigned long *)&vcpu
->arch
.regs_dirty
);
606 EXPORT_SYMBOL_GPL(load_pdptrs
);
608 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
610 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
616 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
619 if (!test_bit(VCPU_EXREG_PDPTR
,
620 (unsigned long *)&vcpu
->arch
.regs_avail
))
623 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
624 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
625 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
626 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
629 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
634 EXPORT_SYMBOL_GPL(pdptrs_changed
);
636 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
638 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
639 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
644 if (cr0
& 0xffffffff00000000UL
)
648 cr0
&= ~CR0_RESERVED_BITS
;
650 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
653 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
656 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
658 if ((vcpu
->arch
.efer
& EFER_LME
)) {
663 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
668 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
673 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
676 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
678 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
679 kvm_clear_async_pf_completion_queue(vcpu
);
680 kvm_async_pf_hash_reset(vcpu
);
683 if ((cr0
^ old_cr0
) & update_bits
)
684 kvm_mmu_reset_context(vcpu
);
686 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
687 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
688 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
689 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
693 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
695 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
697 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
699 EXPORT_SYMBOL_GPL(kvm_lmsw
);
701 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
703 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
704 !vcpu
->guest_xcr0_loaded
) {
705 /* kvm_set_xcr() also depends on this */
706 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
707 vcpu
->guest_xcr0_loaded
= 1;
711 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
713 if (vcpu
->guest_xcr0_loaded
) {
714 if (vcpu
->arch
.xcr0
!= host_xcr0
)
715 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
716 vcpu
->guest_xcr0_loaded
= 0;
720 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
723 u64 old_xcr0
= vcpu
->arch
.xcr0
;
726 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
727 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
729 if (!(xcr0
& XFEATURE_MASK_FP
))
731 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
735 * Do not allow the guest to set bits that we do not support
736 * saving. However, xcr0 bit 0 is always set, even if the
737 * emulated CPU does not support XSAVE (see fx_init).
739 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
740 if (xcr0
& ~valid_bits
)
743 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
744 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
747 if (xcr0
& XFEATURE_MASK_AVX512
) {
748 if (!(xcr0
& XFEATURE_MASK_YMM
))
750 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
753 vcpu
->arch
.xcr0
= xcr0
;
755 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
756 kvm_update_cpuid(vcpu
);
760 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
762 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
763 __kvm_set_xcr(vcpu
, index
, xcr
)) {
764 kvm_inject_gp(vcpu
, 0);
769 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
771 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
773 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
774 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
775 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
777 if (cr4
& CR4_RESERVED_BITS
)
780 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
783 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
786 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
789 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
792 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
795 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
798 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
801 if (is_long_mode(vcpu
)) {
802 if (!(cr4
& X86_CR4_PAE
))
804 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
805 && ((cr4
^ old_cr4
) & pdptr_bits
)
806 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
810 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
811 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
814 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
815 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
819 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
822 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
823 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
824 kvm_mmu_reset_context(vcpu
);
826 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
827 kvm_update_cpuid(vcpu
);
831 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
833 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
836 cr3
&= ~CR3_PCID_INVD
;
839 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
840 kvm_mmu_sync_roots(vcpu
);
841 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
845 if (is_long_mode(vcpu
) &&
846 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 63)))
848 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
849 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
852 vcpu
->arch
.cr3
= cr3
;
853 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
854 kvm_mmu_new_cr3(vcpu
);
857 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
859 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
861 if (cr8
& CR8_RESERVED_BITS
)
863 if (lapic_in_kernel(vcpu
))
864 kvm_lapic_set_tpr(vcpu
, cr8
);
866 vcpu
->arch
.cr8
= cr8
;
869 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
871 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
873 if (lapic_in_kernel(vcpu
))
874 return kvm_lapic_get_cr8(vcpu
);
876 return vcpu
->arch
.cr8
;
878 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
880 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
884 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
885 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
886 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
887 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
891 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
893 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
894 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
897 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
901 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
902 dr7
= vcpu
->arch
.guest_debug_dr7
;
904 dr7
= vcpu
->arch
.dr7
;
905 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
906 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
907 if (dr7
& DR7_BP_EN_MASK
)
908 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
911 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
913 u64 fixed
= DR6_FIXED_1
;
915 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
920 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
924 vcpu
->arch
.db
[dr
] = val
;
925 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
926 vcpu
->arch
.eff_db
[dr
] = val
;
931 if (val
& 0xffffffff00000000ULL
)
933 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
934 kvm_update_dr6(vcpu
);
939 if (val
& 0xffffffff00000000ULL
)
941 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
942 kvm_update_dr7(vcpu
);
949 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
951 if (__kvm_set_dr(vcpu
, dr
, val
)) {
952 kvm_inject_gp(vcpu
, 0);
957 EXPORT_SYMBOL_GPL(kvm_set_dr
);
959 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
963 *val
= vcpu
->arch
.db
[dr
];
968 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
969 *val
= vcpu
->arch
.dr6
;
971 *val
= kvm_x86_ops
->get_dr6(vcpu
);
976 *val
= vcpu
->arch
.dr7
;
981 EXPORT_SYMBOL_GPL(kvm_get_dr
);
983 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
985 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
989 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
992 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
993 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
996 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
999 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1000 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1002 * This list is modified at module load time to reflect the
1003 * capabilities of the host cpu. This capabilities test skips MSRs that are
1004 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1005 * may depend on host virtualization features rather than host cpu features.
1008 static u32 msrs_to_save
[] = {
1009 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1011 #ifdef CONFIG_X86_64
1012 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1014 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1015 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1016 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1019 static unsigned num_msrs_to_save
;
1021 static u32 emulated_msrs
[] = {
1022 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1023 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1024 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1025 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1026 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1027 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1028 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1030 HV_X64_MSR_VP_INDEX
,
1031 HV_X64_MSR_VP_RUNTIME
,
1032 HV_X64_MSR_SCONTROL
,
1033 HV_X64_MSR_STIMER0_CONFIG
,
1034 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1037 MSR_IA32_TSC_ADJUST
,
1038 MSR_IA32_TSCDEADLINE
,
1039 MSR_IA32_MISC_ENABLE
,
1040 MSR_IA32_MCG_STATUS
,
1042 MSR_IA32_MCG_EXT_CTL
,
1045 MSR_MISC_FEATURES_ENABLES
,
1046 MSR_AMD64_VIRT_SPEC_CTRL
,
1049 static unsigned num_emulated_msrs
;
1052 * List of msr numbers which are used to expose MSR-based features that
1053 * can be used by a hypervisor to validate requested CPU features.
1055 static u32 msr_based_features
[] = {
1058 MSR_IA32_ARCH_CAPABILITIES
,
1061 static unsigned int num_msr_based_features
;
1063 u64
kvm_get_arch_capabilities(void)
1067 rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES
, &data
);
1070 * If we're doing cache flushes (either "always" or "cond")
1071 * we will do one whenever the guest does a vmlaunch/vmresume.
1072 * If an outer hypervisor is doing the cache flush for us
1073 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1074 * capability to the guest too, and if EPT is disabled we're not
1075 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1076 * require a nested hypervisor to do a flush of its own.
1078 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1079 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1083 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities
);
1085 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1087 switch (msr
->index
) {
1088 case MSR_IA32_ARCH_CAPABILITIES
:
1089 msr
->data
= kvm_get_arch_capabilities();
1091 case MSR_IA32_UCODE_REV
:
1092 rdmsrl_safe(msr
->index
, &msr
->data
);
1095 if (kvm_x86_ops
->get_msr_feature(msr
))
1101 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1103 struct kvm_msr_entry msr
;
1107 r
= kvm_get_msr_feature(&msr
);
1116 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1118 if (efer
& efer_reserved_bits
)
1121 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1124 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1129 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1131 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1133 u64 old_efer
= vcpu
->arch
.efer
;
1135 if (!kvm_valid_efer(vcpu
, efer
))
1139 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1143 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1145 kvm_x86_ops
->set_efer(vcpu
, efer
);
1147 /* Update reserved bits */
1148 if ((efer
^ old_efer
) & EFER_NX
)
1149 kvm_mmu_reset_context(vcpu
);
1154 void kvm_enable_efer_bits(u64 mask
)
1156 efer_reserved_bits
&= ~mask
;
1158 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1161 * Writes msr value into into the appropriate "register".
1162 * Returns 0 on success, non-0 otherwise.
1163 * Assumes vcpu_load() was already called.
1165 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1167 switch (msr
->index
) {
1170 case MSR_KERNEL_GS_BASE
:
1173 if (is_noncanonical_address(msr
->data
, vcpu
))
1176 case MSR_IA32_SYSENTER_EIP
:
1177 case MSR_IA32_SYSENTER_ESP
:
1179 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1180 * non-canonical address is written on Intel but not on
1181 * AMD (which ignores the top 32-bits, because it does
1182 * not implement 64-bit SYSENTER).
1184 * 64-bit code should hence be able to write a non-canonical
1185 * value on AMD. Making the address canonical ensures that
1186 * vmentry does not fail on Intel after writing a non-canonical
1187 * value, and that something deterministic happens if the guest
1188 * invokes 64-bit SYSENTER.
1190 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1192 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1194 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1197 * Adapt set_msr() to msr_io()'s calling convention
1199 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1201 struct msr_data msr
;
1205 msr
.host_initiated
= true;
1206 r
= kvm_get_msr(vcpu
, &msr
);
1214 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1216 struct msr_data msr
;
1220 msr
.host_initiated
= true;
1221 return kvm_set_msr(vcpu
, &msr
);
1224 #ifdef CONFIG_X86_64
1225 struct pvclock_gtod_data
{
1228 struct { /* extract of a clocksource struct */
1241 static struct pvclock_gtod_data pvclock_gtod_data
;
1243 static void update_pvclock_gtod(struct timekeeper
*tk
)
1245 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1248 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1250 write_seqcount_begin(&vdata
->seq
);
1252 /* copy pvclock gtod data */
1253 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1254 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1255 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1256 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1257 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1259 vdata
->boot_ns
= boot_ns
;
1260 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1262 vdata
->wall_time_sec
= tk
->xtime_sec
;
1264 write_seqcount_end(&vdata
->seq
);
1268 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1271 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1272 * vcpu_enter_guest. This function is only called from
1273 * the physical CPU that is running vcpu.
1275 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1278 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1282 struct pvclock_wall_clock wc
;
1283 struct timespec64 boot
;
1288 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1293 ++version
; /* first time write, random junk */
1297 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1301 * The guest calculates current wall clock time by adding
1302 * system time (updated by kvm_guest_time_update below) to the
1303 * wall clock specified here. guest system time equals host
1304 * system time for us, thus we must fill in host boot time here.
1306 getboottime64(&boot
);
1308 if (kvm
->arch
.kvmclock_offset
) {
1309 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1310 boot
= timespec64_sub(boot
, ts
);
1312 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1313 wc
.nsec
= boot
.tv_nsec
;
1314 wc
.version
= version
;
1316 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1319 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1322 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1324 do_shl32_div32(dividend
, divisor
);
1328 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1329 s8
*pshift
, u32
*pmultiplier
)
1337 scaled64
= scaled_hz
;
1338 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1343 tps32
= (uint32_t)tps64
;
1344 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1345 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1353 *pmultiplier
= div_frac(scaled64
, tps32
);
1355 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1356 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1359 #ifdef CONFIG_X86_64
1360 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1363 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1364 static unsigned long max_tsc_khz
;
1366 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1368 u64 v
= (u64
)khz
* (1000000 + ppm
);
1373 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1377 /* Guest TSC same frequency as host TSC? */
1379 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1383 /* TSC scaling supported? */
1384 if (!kvm_has_tsc_control
) {
1385 if (user_tsc_khz
> tsc_khz
) {
1386 vcpu
->arch
.tsc_catchup
= 1;
1387 vcpu
->arch
.tsc_always_catchup
= 1;
1390 WARN(1, "user requested TSC rate below hardware speed\n");
1395 /* TSC scaling required - calculate ratio */
1396 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1397 user_tsc_khz
, tsc_khz
);
1399 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1400 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1405 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1409 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1411 u32 thresh_lo
, thresh_hi
;
1412 int use_scaling
= 0;
1414 /* tsc_khz can be zero if TSC calibration fails */
1415 if (user_tsc_khz
== 0) {
1416 /* set tsc_scaling_ratio to a safe value */
1417 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1421 /* Compute a scale to convert nanoseconds in TSC cycles */
1422 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1423 &vcpu
->arch
.virtual_tsc_shift
,
1424 &vcpu
->arch
.virtual_tsc_mult
);
1425 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1428 * Compute the variation in TSC rate which is acceptable
1429 * within the range of tolerance and decide if the
1430 * rate being applied is within that bounds of the hardware
1431 * rate. If so, no scaling or compensation need be done.
1433 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1434 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1435 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1436 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1439 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1442 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1444 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1445 vcpu
->arch
.virtual_tsc_mult
,
1446 vcpu
->arch
.virtual_tsc_shift
);
1447 tsc
+= vcpu
->arch
.this_tsc_write
;
1451 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1453 #ifdef CONFIG_X86_64
1455 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1456 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1458 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1459 atomic_read(&vcpu
->kvm
->online_vcpus
));
1462 * Once the masterclock is enabled, always perform request in
1463 * order to update it.
1465 * In order to enable masterclock, the host clocksource must be TSC
1466 * and the vcpus need to have matched TSCs. When that happens,
1467 * perform request to enable masterclock.
1469 if (ka
->use_master_clock
||
1470 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1471 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1473 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1474 atomic_read(&vcpu
->kvm
->online_vcpus
),
1475 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1479 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1481 u64 curr_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1482 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1486 * Multiply tsc by a fixed point number represented by ratio.
1488 * The most significant 64-N bits (mult) of ratio represent the
1489 * integral part of the fixed point number; the remaining N bits
1490 * (frac) represent the fractional part, ie. ratio represents a fixed
1491 * point number (mult + frac * 2^(-N)).
1493 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1495 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1497 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1500 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1503 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1505 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1506 _tsc
= __scale_tsc(ratio
, tsc
);
1510 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1512 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1516 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1518 return target_tsc
- tsc
;
1521 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1523 u64 tsc_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1525 return tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1527 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1529 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1531 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1532 vcpu
->arch
.tsc_offset
= offset
;
1535 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1537 struct kvm
*kvm
= vcpu
->kvm
;
1538 u64 offset
, ns
, elapsed
;
1539 unsigned long flags
;
1541 bool already_matched
;
1542 u64 data
= msr
->data
;
1543 bool synchronizing
= false;
1545 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1546 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1547 ns
= ktime_get_boot_ns();
1548 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1550 if (vcpu
->arch
.virtual_tsc_khz
) {
1551 if (data
== 0 && msr
->host_initiated
) {
1553 * detection of vcpu initialization -- need to sync
1554 * with other vCPUs. This particularly helps to keep
1555 * kvm_clock stable after CPU hotplug
1557 synchronizing
= true;
1559 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1560 nsec_to_cycles(vcpu
, elapsed
);
1561 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1563 * Special case: TSC write with a small delta (1 second)
1564 * of virtual cycle time against real time is
1565 * interpreted as an attempt to synchronize the CPU.
1567 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1568 data
+ tsc_hz
> tsc_exp
;
1573 * For a reliable TSC, we can match TSC offsets, and for an unstable
1574 * TSC, we add elapsed time in this computation. We could let the
1575 * compensation code attempt to catch up if we fall behind, but
1576 * it's better to try to match offsets from the beginning.
1578 if (synchronizing
&&
1579 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1580 if (!check_tsc_unstable()) {
1581 offset
= kvm
->arch
.cur_tsc_offset
;
1582 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1584 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1586 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1587 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1590 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1593 * We split periods of matched TSC writes into generations.
1594 * For each generation, we track the original measured
1595 * nanosecond time, offset, and write, so if TSCs are in
1596 * sync, we can match exact offset, and if not, we can match
1597 * exact software computation in compute_guest_tsc()
1599 * These values are tracked in kvm->arch.cur_xxx variables.
1601 kvm
->arch
.cur_tsc_generation
++;
1602 kvm
->arch
.cur_tsc_nsec
= ns
;
1603 kvm
->arch
.cur_tsc_write
= data
;
1604 kvm
->arch
.cur_tsc_offset
= offset
;
1606 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1607 kvm
->arch
.cur_tsc_generation
, data
);
1611 * We also track th most recent recorded KHZ, write and time to
1612 * allow the matching interval to be extended at each write.
1614 kvm
->arch
.last_tsc_nsec
= ns
;
1615 kvm
->arch
.last_tsc_write
= data
;
1616 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1618 vcpu
->arch
.last_guest_tsc
= data
;
1620 /* Keep track of which generation this VCPU has synchronized to */
1621 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1622 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1623 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1625 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1626 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1628 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1629 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1631 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1633 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1634 } else if (!already_matched
) {
1635 kvm
->arch
.nr_vcpus_matched_tsc
++;
1638 kvm_track_tsc_matching(vcpu
);
1639 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1642 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1644 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1647 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1650 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1652 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1653 WARN_ON(adjustment
< 0);
1654 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1655 adjust_tsc_offset_guest(vcpu
, adjustment
);
1658 #ifdef CONFIG_X86_64
1660 static u64
read_tsc(void)
1662 u64 ret
= (u64
)rdtsc_ordered();
1663 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1665 if (likely(ret
>= last
))
1669 * GCC likes to generate cmov here, but this branch is extremely
1670 * predictable (it's just a function of time and the likely is
1671 * very likely) and there's a data dependence, so force GCC
1672 * to generate a branch instead. I don't barrier() because
1673 * we don't actually need a barrier, and if this function
1674 * ever gets inlined it will generate worse code.
1680 static inline u64
vgettsc(u64
*cycle_now
)
1683 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1685 *cycle_now
= read_tsc();
1687 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1688 return v
* gtod
->clock
.mult
;
1691 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1693 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1699 seq
= read_seqcount_begin(>od
->seq
);
1700 mode
= gtod
->clock
.vclock_mode
;
1701 ns
= gtod
->nsec_base
;
1702 ns
+= vgettsc(cycle_now
);
1703 ns
>>= gtod
->clock
.shift
;
1704 ns
+= gtod
->boot_ns
;
1705 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1711 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1713 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1719 seq
= read_seqcount_begin(>od
->seq
);
1720 mode
= gtod
->clock
.vclock_mode
;
1721 ts
->tv_sec
= gtod
->wall_time_sec
;
1722 ns
= gtod
->nsec_base
;
1723 ns
+= vgettsc(cycle_now
);
1724 ns
>>= gtod
->clock
.shift
;
1725 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1727 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1733 /* returns true if host is using tsc clocksource */
1734 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1736 /* checked again under seqlock below */
1737 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1740 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1743 /* returns true if host is using tsc clocksource */
1744 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1747 /* checked again under seqlock below */
1748 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1751 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1757 * Assuming a stable TSC across physical CPUS, and a stable TSC
1758 * across virtual CPUs, the following condition is possible.
1759 * Each numbered line represents an event visible to both
1760 * CPUs at the next numbered event.
1762 * "timespecX" represents host monotonic time. "tscX" represents
1765 * VCPU0 on CPU0 | VCPU1 on CPU1
1767 * 1. read timespec0,tsc0
1768 * 2. | timespec1 = timespec0 + N
1770 * 3. transition to guest | transition to guest
1771 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1772 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1773 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1775 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1778 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1780 * - 0 < N - M => M < N
1782 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1783 * always the case (the difference between two distinct xtime instances
1784 * might be smaller then the difference between corresponding TSC reads,
1785 * when updating guest vcpus pvclock areas).
1787 * To avoid that problem, do not allow visibility of distinct
1788 * system_timestamp/tsc_timestamp values simultaneously: use a master
1789 * copy of host monotonic time values. Update that master copy
1792 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1796 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1798 #ifdef CONFIG_X86_64
1799 struct kvm_arch
*ka
= &kvm
->arch
;
1801 bool host_tsc_clocksource
, vcpus_matched
;
1803 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1804 atomic_read(&kvm
->online_vcpus
));
1807 * If the host uses TSC clock, then passthrough TSC as stable
1810 host_tsc_clocksource
= kvm_get_time_and_clockread(
1811 &ka
->master_kernel_ns
,
1812 &ka
->master_cycle_now
);
1814 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1815 && !ka
->backwards_tsc_observed
1816 && !ka
->boot_vcpu_runs_old_kvmclock
;
1818 if (ka
->use_master_clock
)
1819 atomic_set(&kvm_guest_has_master_clock
, 1);
1821 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1822 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1827 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1829 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1832 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1834 #ifdef CONFIG_X86_64
1836 struct kvm_vcpu
*vcpu
;
1837 struct kvm_arch
*ka
= &kvm
->arch
;
1839 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1840 kvm_make_mclock_inprogress_request(kvm
);
1841 /* no guest entries from this point */
1842 pvclock_update_vm_gtod_copy(kvm
);
1844 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1845 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1847 /* guest entries allowed */
1848 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1849 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1851 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1855 u64
get_kvmclock_ns(struct kvm
*kvm
)
1857 struct kvm_arch
*ka
= &kvm
->arch
;
1858 struct pvclock_vcpu_time_info hv_clock
;
1861 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1862 if (!ka
->use_master_clock
) {
1863 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1864 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1867 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1868 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1869 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1871 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1874 if (__this_cpu_read(cpu_tsc_khz
)) {
1875 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1876 &hv_clock
.tsc_shift
,
1877 &hv_clock
.tsc_to_system_mul
);
1878 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1880 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1887 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1889 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1890 struct pvclock_vcpu_time_info guest_hv_clock
;
1892 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1893 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1896 /* This VCPU is paused, but it's legal for a guest to read another
1897 * VCPU's kvmclock, so we really have to follow the specification where
1898 * it says that version is odd if data is being modified, and even after
1901 * Version field updates must be kept separate. This is because
1902 * kvm_write_guest_cached might use a "rep movs" instruction, and
1903 * writes within a string instruction are weakly ordered. So there
1904 * are three writes overall.
1906 * As a small optimization, only write the version field in the first
1907 * and third write. The vcpu->pv_time cache is still valid, because the
1908 * version field is the first in the struct.
1910 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1912 if (guest_hv_clock
.version
& 1)
1913 ++guest_hv_clock
.version
; /* first time write, random junk */
1915 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1916 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1918 sizeof(vcpu
->hv_clock
.version
));
1922 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1923 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1925 if (vcpu
->pvclock_set_guest_stopped_request
) {
1926 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1927 vcpu
->pvclock_set_guest_stopped_request
= false;
1930 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1932 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1934 sizeof(vcpu
->hv_clock
));
1938 vcpu
->hv_clock
.version
++;
1939 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1941 sizeof(vcpu
->hv_clock
.version
));
1944 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1946 unsigned long flags
, tgt_tsc_khz
;
1947 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1948 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1950 u64 tsc_timestamp
, host_tsc
;
1952 bool use_master_clock
;
1958 * If the host uses TSC clock, then passthrough TSC as stable
1961 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1962 use_master_clock
= ka
->use_master_clock
;
1963 if (use_master_clock
) {
1964 host_tsc
= ka
->master_cycle_now
;
1965 kernel_ns
= ka
->master_kernel_ns
;
1967 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1969 /* Keep irq disabled to prevent changes to the clock */
1970 local_irq_save(flags
);
1971 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1972 if (unlikely(tgt_tsc_khz
== 0)) {
1973 local_irq_restore(flags
);
1974 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1977 if (!use_master_clock
) {
1979 kernel_ns
= ktime_get_boot_ns();
1982 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1985 * We may have to catch up the TSC to match elapsed wall clock
1986 * time for two reasons, even if kvmclock is used.
1987 * 1) CPU could have been running below the maximum TSC rate
1988 * 2) Broken TSC compensation resets the base at each VCPU
1989 * entry to avoid unknown leaps of TSC even when running
1990 * again on the same CPU. This may cause apparent elapsed
1991 * time to disappear, and the guest to stand still or run
1994 if (vcpu
->tsc_catchup
) {
1995 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1996 if (tsc
> tsc_timestamp
) {
1997 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1998 tsc_timestamp
= tsc
;
2002 local_irq_restore(flags
);
2004 /* With all the info we got, fill in the values */
2006 if (kvm_has_tsc_control
)
2007 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2009 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2010 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2011 &vcpu
->hv_clock
.tsc_shift
,
2012 &vcpu
->hv_clock
.tsc_to_system_mul
);
2013 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2016 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2017 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2018 vcpu
->last_guest_tsc
= tsc_timestamp
;
2020 /* If the host uses TSC clocksource, then it is stable */
2022 if (use_master_clock
)
2023 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2025 vcpu
->hv_clock
.flags
= pvclock_flags
;
2027 if (vcpu
->pv_time_enabled
)
2028 kvm_setup_pvclock_page(v
);
2029 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2030 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2035 * kvmclock updates which are isolated to a given vcpu, such as
2036 * vcpu->cpu migration, should not allow system_timestamp from
2037 * the rest of the vcpus to remain static. Otherwise ntp frequency
2038 * correction applies to one vcpu's system_timestamp but not
2041 * So in those cases, request a kvmclock update for all vcpus.
2042 * We need to rate-limit these requests though, as they can
2043 * considerably slow guests that have a large number of vcpus.
2044 * The time for a remote vcpu to update its kvmclock is bound
2045 * by the delay we use to rate-limit the updates.
2048 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2050 static void kvmclock_update_fn(struct work_struct
*work
)
2053 struct delayed_work
*dwork
= to_delayed_work(work
);
2054 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2055 kvmclock_update_work
);
2056 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2057 struct kvm_vcpu
*vcpu
;
2059 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2060 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2061 kvm_vcpu_kick(vcpu
);
2065 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2067 struct kvm
*kvm
= v
->kvm
;
2069 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2070 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2071 KVMCLOCK_UPDATE_DELAY
);
2074 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2076 static void kvmclock_sync_fn(struct work_struct
*work
)
2078 struct delayed_work
*dwork
= to_delayed_work(work
);
2079 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2080 kvmclock_sync_work
);
2081 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2083 if (!kvmclock_periodic_sync
)
2086 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2087 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2088 KVMCLOCK_SYNC_PERIOD
);
2091 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2093 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2094 unsigned bank_num
= mcg_cap
& 0xff;
2095 u32 msr
= msr_info
->index
;
2096 u64 data
= msr_info
->data
;
2099 case MSR_IA32_MCG_STATUS
:
2100 vcpu
->arch
.mcg_status
= data
;
2102 case MSR_IA32_MCG_CTL
:
2103 if (!(mcg_cap
& MCG_CTL_P
))
2105 if (data
!= 0 && data
!= ~(u64
)0)
2107 vcpu
->arch
.mcg_ctl
= data
;
2110 if (msr
>= MSR_IA32_MC0_CTL
&&
2111 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2112 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2113 /* only 0 or all 1s can be written to IA32_MCi_CTL
2114 * some Linux kernels though clear bit 10 in bank 4 to
2115 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2116 * this to avoid an uncatched #GP in the guest
2118 if ((offset
& 0x3) == 0 &&
2119 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2121 if (!msr_info
->host_initiated
&&
2122 (offset
& 0x3) == 1 && data
!= 0)
2124 vcpu
->arch
.mce_banks
[offset
] = data
;
2132 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2134 struct kvm
*kvm
= vcpu
->kvm
;
2135 int lm
= is_long_mode(vcpu
);
2136 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2137 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2138 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2139 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2140 u32 page_num
= data
& ~PAGE_MASK
;
2141 u64 page_addr
= data
& PAGE_MASK
;
2146 if (page_num
>= blob_size
)
2149 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2154 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2163 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2165 gpa_t gpa
= data
& ~0x3f;
2167 /* Bits 3:5 are reserved, Should be zero */
2171 vcpu
->arch
.apf
.msr_val
= data
;
2173 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2174 kvm_clear_async_pf_completion_queue(vcpu
);
2175 kvm_async_pf_hash_reset(vcpu
);
2179 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2183 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2184 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2185 kvm_async_pf_wakeup_all(vcpu
);
2189 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2191 vcpu
->arch
.pv_time_enabled
= false;
2194 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2196 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2199 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2200 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2203 vcpu
->arch
.st
.steal
.preempted
= 0;
2205 if (vcpu
->arch
.st
.steal
.version
& 1)
2206 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2208 vcpu
->arch
.st
.steal
.version
+= 1;
2210 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2211 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2215 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2216 vcpu
->arch
.st
.last_steal
;
2217 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2219 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2220 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2224 vcpu
->arch
.st
.steal
.version
+= 1;
2226 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2227 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2230 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2233 u32 msr
= msr_info
->index
;
2234 u64 data
= msr_info
->data
;
2237 case MSR_AMD64_NB_CFG
:
2238 case MSR_IA32_UCODE_WRITE
:
2239 case MSR_VM_HSAVE_PA
:
2240 case MSR_AMD64_PATCH_LOADER
:
2241 case MSR_AMD64_BU_CFG2
:
2242 case MSR_AMD64_DC_CFG
:
2245 case MSR_IA32_UCODE_REV
:
2246 if (msr_info
->host_initiated
)
2247 vcpu
->arch
.microcode_version
= data
;
2250 return set_efer(vcpu
, data
);
2252 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2253 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2254 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2255 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2257 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2262 case MSR_FAM10H_MMIO_CONF_BASE
:
2264 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2269 case MSR_IA32_DEBUGCTLMSR
:
2271 /* We support the non-activated case already */
2273 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2274 /* Values other than LBR and BTF are vendor-specific,
2275 thus reserved and should throw a #GP */
2278 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2281 case 0x200 ... 0x2ff:
2282 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2283 case MSR_IA32_APICBASE
:
2284 return kvm_set_apic_base(vcpu
, msr_info
);
2285 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2286 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2287 case MSR_IA32_TSCDEADLINE
:
2288 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2290 case MSR_IA32_TSC_ADJUST
:
2291 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2292 if (!msr_info
->host_initiated
) {
2293 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2294 adjust_tsc_offset_guest(vcpu
, adj
);
2296 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2299 case MSR_IA32_MISC_ENABLE
:
2300 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2302 case MSR_IA32_SMBASE
:
2303 if (!msr_info
->host_initiated
)
2305 vcpu
->arch
.smbase
= data
;
2308 kvm_write_tsc(vcpu
, msr_info
);
2310 case MSR_KVM_WALL_CLOCK_NEW
:
2311 case MSR_KVM_WALL_CLOCK
:
2312 vcpu
->kvm
->arch
.wall_clock
= data
;
2313 kvm_write_wall_clock(vcpu
->kvm
, data
);
2315 case MSR_KVM_SYSTEM_TIME_NEW
:
2316 case MSR_KVM_SYSTEM_TIME
: {
2317 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2319 kvmclock_reset(vcpu
);
2321 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2322 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2324 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2325 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2327 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2330 vcpu
->arch
.time
= data
;
2331 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2333 /* we verify if the enable bit is set... */
2337 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2338 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2339 sizeof(struct pvclock_vcpu_time_info
)))
2340 vcpu
->arch
.pv_time_enabled
= false;
2342 vcpu
->arch
.pv_time_enabled
= true;
2346 case MSR_KVM_ASYNC_PF_EN
:
2347 if (kvm_pv_enable_async_pf(vcpu
, data
))
2350 case MSR_KVM_STEAL_TIME
:
2352 if (unlikely(!sched_info_on()))
2355 if (data
& KVM_STEAL_RESERVED_MASK
)
2358 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2359 data
& KVM_STEAL_VALID_BITS
,
2360 sizeof(struct kvm_steal_time
)))
2363 vcpu
->arch
.st
.msr_val
= data
;
2365 if (!(data
& KVM_MSR_ENABLED
))
2368 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2371 case MSR_KVM_PV_EOI_EN
:
2372 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2376 case MSR_IA32_MCG_CTL
:
2377 case MSR_IA32_MCG_STATUS
:
2378 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2379 return set_msr_mce(vcpu
, msr_info
);
2381 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2382 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2383 pr
= true; /* fall through */
2384 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2385 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2386 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2387 return kvm_pmu_set_msr(vcpu
, msr_info
);
2389 if (pr
|| data
!= 0)
2390 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2391 "0x%x data 0x%llx\n", msr
, data
);
2393 case MSR_K7_CLK_CTL
:
2395 * Ignore all writes to this no longer documented MSR.
2396 * Writes are only relevant for old K7 processors,
2397 * all pre-dating SVM, but a recommended workaround from
2398 * AMD for these chips. It is possible to specify the
2399 * affected processor models on the command line, hence
2400 * the need to ignore the workaround.
2403 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2404 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2405 case HV_X64_MSR_CRASH_CTL
:
2406 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2407 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2408 msr_info
->host_initiated
);
2409 case MSR_IA32_BBL_CR_CTL3
:
2410 /* Drop writes to this legacy MSR -- see rdmsr
2411 * counterpart for further detail.
2413 if (report_ignored_msrs
)
2414 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2417 case MSR_AMD64_OSVW_ID_LENGTH
:
2418 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2420 vcpu
->arch
.osvw
.length
= data
;
2422 case MSR_AMD64_OSVW_STATUS
:
2423 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2425 vcpu
->arch
.osvw
.status
= data
;
2427 case MSR_PLATFORM_INFO
:
2428 if (!msr_info
->host_initiated
||
2429 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2430 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2431 cpuid_fault_enabled(vcpu
)))
2433 vcpu
->arch
.msr_platform_info
= data
;
2435 case MSR_MISC_FEATURES_ENABLES
:
2436 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2437 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2438 !supports_cpuid_fault(vcpu
)))
2440 vcpu
->arch
.msr_misc_features_enables
= data
;
2443 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2444 return xen_hvm_config(vcpu
, data
);
2445 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2446 return kvm_pmu_set_msr(vcpu
, msr_info
);
2448 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2452 if (report_ignored_msrs
)
2454 "ignored wrmsr: 0x%x data 0x%llx\n",
2461 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2465 * Reads an msr value (of 'msr_index') into 'pdata'.
2466 * Returns 0 on success, non-0 otherwise.
2467 * Assumes vcpu_load() was already called.
2469 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2471 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2473 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2475 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2478 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2479 unsigned bank_num
= mcg_cap
& 0xff;
2482 case MSR_IA32_P5_MC_ADDR
:
2483 case MSR_IA32_P5_MC_TYPE
:
2486 case MSR_IA32_MCG_CAP
:
2487 data
= vcpu
->arch
.mcg_cap
;
2489 case MSR_IA32_MCG_CTL
:
2490 if (!(mcg_cap
& MCG_CTL_P
))
2492 data
= vcpu
->arch
.mcg_ctl
;
2494 case MSR_IA32_MCG_STATUS
:
2495 data
= vcpu
->arch
.mcg_status
;
2498 if (msr
>= MSR_IA32_MC0_CTL
&&
2499 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2500 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2501 data
= vcpu
->arch
.mce_banks
[offset
];
2510 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2512 switch (msr_info
->index
) {
2513 case MSR_IA32_PLATFORM_ID
:
2514 case MSR_IA32_EBL_CR_POWERON
:
2515 case MSR_IA32_DEBUGCTLMSR
:
2516 case MSR_IA32_LASTBRANCHFROMIP
:
2517 case MSR_IA32_LASTBRANCHTOIP
:
2518 case MSR_IA32_LASTINTFROMIP
:
2519 case MSR_IA32_LASTINTTOIP
:
2521 case MSR_K8_TSEG_ADDR
:
2522 case MSR_K8_TSEG_MASK
:
2524 case MSR_VM_HSAVE_PA
:
2525 case MSR_K8_INT_PENDING_MSG
:
2526 case MSR_AMD64_NB_CFG
:
2527 case MSR_FAM10H_MMIO_CONF_BASE
:
2528 case MSR_AMD64_BU_CFG2
:
2529 case MSR_IA32_PERF_CTL
:
2530 case MSR_AMD64_DC_CFG
:
2533 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2534 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2535 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2536 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2537 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2538 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2541 case MSR_IA32_UCODE_REV
:
2542 msr_info
->data
= vcpu
->arch
.microcode_version
;
2545 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + vcpu
->arch
.tsc_offset
;
2548 case 0x200 ... 0x2ff:
2549 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2550 case 0xcd: /* fsb frequency */
2554 * MSR_EBC_FREQUENCY_ID
2555 * Conservative value valid for even the basic CPU models.
2556 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2557 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2558 * and 266MHz for model 3, or 4. Set Core Clock
2559 * Frequency to System Bus Frequency Ratio to 1 (bits
2560 * 31:24) even though these are only valid for CPU
2561 * models > 2, however guests may end up dividing or
2562 * multiplying by zero otherwise.
2564 case MSR_EBC_FREQUENCY_ID
:
2565 msr_info
->data
= 1 << 24;
2567 case MSR_IA32_APICBASE
:
2568 msr_info
->data
= kvm_get_apic_base(vcpu
);
2570 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2571 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2573 case MSR_IA32_TSCDEADLINE
:
2574 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2576 case MSR_IA32_TSC_ADJUST
:
2577 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2579 case MSR_IA32_MISC_ENABLE
:
2580 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2582 case MSR_IA32_SMBASE
:
2583 if (!msr_info
->host_initiated
)
2585 msr_info
->data
= vcpu
->arch
.smbase
;
2587 case MSR_IA32_PERF_STATUS
:
2588 /* TSC increment by tick */
2589 msr_info
->data
= 1000ULL;
2590 /* CPU multiplier */
2591 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2594 msr_info
->data
= vcpu
->arch
.efer
;
2596 case MSR_KVM_WALL_CLOCK
:
2597 case MSR_KVM_WALL_CLOCK_NEW
:
2598 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2600 case MSR_KVM_SYSTEM_TIME
:
2601 case MSR_KVM_SYSTEM_TIME_NEW
:
2602 msr_info
->data
= vcpu
->arch
.time
;
2604 case MSR_KVM_ASYNC_PF_EN
:
2605 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2607 case MSR_KVM_STEAL_TIME
:
2608 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2610 case MSR_KVM_PV_EOI_EN
:
2611 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2613 case MSR_IA32_P5_MC_ADDR
:
2614 case MSR_IA32_P5_MC_TYPE
:
2615 case MSR_IA32_MCG_CAP
:
2616 case MSR_IA32_MCG_CTL
:
2617 case MSR_IA32_MCG_STATUS
:
2618 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2619 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2620 case MSR_K7_CLK_CTL
:
2622 * Provide expected ramp-up count for K7. All other
2623 * are set to zero, indicating minimum divisors for
2626 * This prevents guest kernels on AMD host with CPU
2627 * type 6, model 8 and higher from exploding due to
2628 * the rdmsr failing.
2630 msr_info
->data
= 0x20000000;
2632 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2633 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2634 case HV_X64_MSR_CRASH_CTL
:
2635 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2636 return kvm_hv_get_msr_common(vcpu
,
2637 msr_info
->index
, &msr_info
->data
);
2639 case MSR_IA32_BBL_CR_CTL3
:
2640 /* This legacy MSR exists but isn't fully documented in current
2641 * silicon. It is however accessed by winxp in very narrow
2642 * scenarios where it sets bit #19, itself documented as
2643 * a "reserved" bit. Best effort attempt to source coherent
2644 * read data here should the balance of the register be
2645 * interpreted by the guest:
2647 * L2 cache control register 3: 64GB range, 256KB size,
2648 * enabled, latency 0x1, configured
2650 msr_info
->data
= 0xbe702111;
2652 case MSR_AMD64_OSVW_ID_LENGTH
:
2653 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2655 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2657 case MSR_AMD64_OSVW_STATUS
:
2658 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2660 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2662 case MSR_PLATFORM_INFO
:
2663 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2665 case MSR_MISC_FEATURES_ENABLES
:
2666 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2669 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2670 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2672 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2676 if (report_ignored_msrs
)
2677 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2685 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2688 * Read or write a bunch of msrs. All parameters are kernel addresses.
2690 * @return number of msrs set successfully.
2692 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2693 struct kvm_msr_entry
*entries
,
2694 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2695 unsigned index
, u64
*data
))
2699 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2700 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2707 * Read or write a bunch of msrs. Parameters are user addresses.
2709 * @return number of msrs set successfully.
2711 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2712 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2713 unsigned index
, u64
*data
),
2716 struct kvm_msrs msrs
;
2717 struct kvm_msr_entry
*entries
;
2722 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2726 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2729 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2730 entries
= memdup_user(user_msrs
->entries
, size
);
2731 if (IS_ERR(entries
)) {
2732 r
= PTR_ERR(entries
);
2736 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2741 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2752 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2757 case KVM_CAP_IRQCHIP
:
2759 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2760 case KVM_CAP_SET_TSS_ADDR
:
2761 case KVM_CAP_EXT_CPUID
:
2762 case KVM_CAP_EXT_EMUL_CPUID
:
2763 case KVM_CAP_CLOCKSOURCE
:
2765 case KVM_CAP_NOP_IO_DELAY
:
2766 case KVM_CAP_MP_STATE
:
2767 case KVM_CAP_SYNC_MMU
:
2768 case KVM_CAP_USER_NMI
:
2769 case KVM_CAP_REINJECT_CONTROL
:
2770 case KVM_CAP_IRQ_INJECT_STATUS
:
2771 case KVM_CAP_IOEVENTFD
:
2772 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2774 case KVM_CAP_PIT_STATE2
:
2775 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2776 case KVM_CAP_XEN_HVM
:
2777 case KVM_CAP_VCPU_EVENTS
:
2778 case KVM_CAP_HYPERV
:
2779 case KVM_CAP_HYPERV_VAPIC
:
2780 case KVM_CAP_HYPERV_SPIN
:
2781 case KVM_CAP_HYPERV_SYNIC
:
2782 case KVM_CAP_HYPERV_SYNIC2
:
2783 case KVM_CAP_HYPERV_VP_INDEX
:
2784 case KVM_CAP_PCI_SEGMENT
:
2785 case KVM_CAP_DEBUGREGS
:
2786 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2788 case KVM_CAP_ASYNC_PF
:
2789 case KVM_CAP_GET_TSC_KHZ
:
2790 case KVM_CAP_KVMCLOCK_CTRL
:
2791 case KVM_CAP_READONLY_MEM
:
2792 case KVM_CAP_HYPERV_TIME
:
2793 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2794 case KVM_CAP_TSC_DEADLINE_TIMER
:
2795 case KVM_CAP_ENABLE_CAP_VM
:
2796 case KVM_CAP_DISABLE_QUIRKS
:
2797 case KVM_CAP_SET_BOOT_CPU_ID
:
2798 case KVM_CAP_SPLIT_IRQCHIP
:
2799 case KVM_CAP_IMMEDIATE_EXIT
:
2800 case KVM_CAP_GET_MSR_FEATURES
:
2803 case KVM_CAP_ADJUST_CLOCK
:
2804 r
= KVM_CLOCK_TSC_STABLE
;
2806 case KVM_CAP_X86_GUEST_MWAIT
:
2807 r
= kvm_mwait_in_guest();
2809 case KVM_CAP_X86_SMM
:
2810 /* SMBASE is usually relocated above 1M on modern chipsets,
2811 * and SMM handlers might indeed rely on 4G segment limits,
2812 * so do not report SMM to be available if real mode is
2813 * emulated via vm86 mode. Still, do not go to great lengths
2814 * to avoid userspace's usage of the feature, because it is a
2815 * fringe case that is not enabled except via specific settings
2816 * of the module parameters.
2818 r
= kvm_x86_ops
->has_emulated_msr(MSR_IA32_SMBASE
);
2821 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2823 case KVM_CAP_NR_VCPUS
:
2824 r
= KVM_SOFT_MAX_VCPUS
;
2826 case KVM_CAP_MAX_VCPUS
:
2829 case KVM_CAP_NR_MEMSLOTS
:
2830 r
= KVM_USER_MEM_SLOTS
;
2832 case KVM_CAP_PV_MMU
: /* obsolete */
2836 r
= KVM_MAX_MCE_BANKS
;
2839 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2841 case KVM_CAP_TSC_CONTROL
:
2842 r
= kvm_has_tsc_control
;
2844 case KVM_CAP_X2APIC_API
:
2845 r
= KVM_X2APIC_API_VALID_FLAGS
;
2855 long kvm_arch_dev_ioctl(struct file
*filp
,
2856 unsigned int ioctl
, unsigned long arg
)
2858 void __user
*argp
= (void __user
*)arg
;
2862 case KVM_GET_MSR_INDEX_LIST
: {
2863 struct kvm_msr_list __user
*user_msr_list
= argp
;
2864 struct kvm_msr_list msr_list
;
2868 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2871 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2872 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2875 if (n
< msr_list
.nmsrs
)
2878 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2879 num_msrs_to_save
* sizeof(u32
)))
2881 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2883 num_emulated_msrs
* sizeof(u32
)))
2888 case KVM_GET_SUPPORTED_CPUID
:
2889 case KVM_GET_EMULATED_CPUID
: {
2890 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2891 struct kvm_cpuid2 cpuid
;
2894 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2897 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2903 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2908 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2910 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2911 sizeof(kvm_mce_cap_supported
)))
2915 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
2916 struct kvm_msr_list __user
*user_msr_list
= argp
;
2917 struct kvm_msr_list msr_list
;
2921 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
2924 msr_list
.nmsrs
= num_msr_based_features
;
2925 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
2928 if (n
< msr_list
.nmsrs
)
2931 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
2932 num_msr_based_features
* sizeof(u32
)))
2938 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
2948 static void wbinvd_ipi(void *garbage
)
2953 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2955 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2958 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2960 /* Address WBINVD may be executed by guest */
2961 if (need_emulate_wbinvd(vcpu
)) {
2962 if (kvm_x86_ops
->has_wbinvd_exit())
2963 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2964 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2965 smp_call_function_single(vcpu
->cpu
,
2966 wbinvd_ipi
, NULL
, 1);
2969 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2971 /* Apply any externally detected TSC adjustments (due to suspend) */
2972 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2973 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2974 vcpu
->arch
.tsc_offset_adjustment
= 0;
2975 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2978 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2979 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2980 rdtsc() - vcpu
->arch
.last_host_tsc
;
2982 mark_tsc_unstable("KVM discovered backwards TSC");
2984 if (check_tsc_unstable()) {
2985 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2986 vcpu
->arch
.last_guest_tsc
);
2987 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2988 vcpu
->arch
.tsc_catchup
= 1;
2991 if (kvm_lapic_hv_timer_in_use(vcpu
))
2992 kvm_lapic_restart_hv_timer(vcpu
);
2995 * On a host with synchronized TSC, there is no need to update
2996 * kvmclock on vcpu->cpu migration
2998 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2999 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
3000 if (vcpu
->cpu
!= cpu
)
3001 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
3005 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3008 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
3010 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3013 vcpu
->arch
.st
.steal
.preempted
= 1;
3015 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
3016 &vcpu
->arch
.st
.steal
.preempted
,
3017 offsetof(struct kvm_steal_time
, preempted
),
3018 sizeof(vcpu
->arch
.st
.steal
.preempted
));
3021 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3025 if (vcpu
->preempted
)
3026 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
3029 * Disable page faults because we're in atomic context here.
3030 * kvm_write_guest_offset_cached() would call might_fault()
3031 * that relies on pagefault_disable() to tell if there's a
3032 * bug. NOTE: the write to guest memory may not go through if
3033 * during postcopy live migration or if there's heavy guest
3036 pagefault_disable();
3038 * kvm_memslots() will be called by
3039 * kvm_write_guest_offset_cached() so take the srcu lock.
3041 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3042 kvm_steal_time_set_preempted(vcpu
);
3043 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3045 kvm_x86_ops
->vcpu_put(vcpu
);
3046 vcpu
->arch
.last_host_tsc
= rdtsc();
3048 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3049 * on every vmexit, but if not, we might have a stale dr6 from the
3050 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3055 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3056 struct kvm_lapic_state
*s
)
3058 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
3059 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3061 return kvm_apic_get_state(vcpu
, s
);
3064 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3065 struct kvm_lapic_state
*s
)
3069 r
= kvm_apic_set_state(vcpu
, s
);
3072 update_cr8_intercept(vcpu
);
3077 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3079 return (!lapic_in_kernel(vcpu
) ||
3080 kvm_apic_accept_pic_intr(vcpu
));
3084 * if userspace requested an interrupt window, check that the
3085 * interrupt window is open.
3087 * No need to exit to userspace if we already have an interrupt queued.
3089 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3091 return kvm_arch_interrupt_allowed(vcpu
) &&
3092 !kvm_cpu_has_interrupt(vcpu
) &&
3093 !kvm_event_needs_reinjection(vcpu
) &&
3094 kvm_cpu_accept_dm_intr(vcpu
);
3097 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3098 struct kvm_interrupt
*irq
)
3100 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3103 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3104 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3105 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3110 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3111 * fail for in-kernel 8259.
3113 if (pic_in_kernel(vcpu
->kvm
))
3116 if (vcpu
->arch
.pending_external_vector
!= -1)
3119 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3120 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3124 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3126 kvm_inject_nmi(vcpu
);
3131 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3133 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3138 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3139 struct kvm_tpr_access_ctl
*tac
)
3143 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3147 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3151 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3154 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3156 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3159 vcpu
->arch
.mcg_cap
= mcg_cap
;
3160 /* Init IA32_MCG_CTL to all 1s */
3161 if (mcg_cap
& MCG_CTL_P
)
3162 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3163 /* Init IA32_MCi_CTL to all 1s */
3164 for (bank
= 0; bank
< bank_num
; bank
++)
3165 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3167 if (kvm_x86_ops
->setup_mce
)
3168 kvm_x86_ops
->setup_mce(vcpu
);
3173 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3174 struct kvm_x86_mce
*mce
)
3176 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3177 unsigned bank_num
= mcg_cap
& 0xff;
3178 u64
*banks
= vcpu
->arch
.mce_banks
;
3180 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3183 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3184 * reporting is disabled
3186 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3187 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3189 banks
+= 4 * mce
->bank
;
3191 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3192 * reporting is disabled for the bank
3194 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3196 if (mce
->status
& MCI_STATUS_UC
) {
3197 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3198 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3199 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3202 if (banks
[1] & MCI_STATUS_VAL
)
3203 mce
->status
|= MCI_STATUS_OVER
;
3204 banks
[2] = mce
->addr
;
3205 banks
[3] = mce
->misc
;
3206 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3207 banks
[1] = mce
->status
;
3208 kvm_queue_exception(vcpu
, MC_VECTOR
);
3209 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3210 || !(banks
[1] & MCI_STATUS_UC
)) {
3211 if (banks
[1] & MCI_STATUS_VAL
)
3212 mce
->status
|= MCI_STATUS_OVER
;
3213 banks
[2] = mce
->addr
;
3214 banks
[3] = mce
->misc
;
3215 banks
[1] = mce
->status
;
3217 banks
[1] |= MCI_STATUS_OVER
;
3221 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3222 struct kvm_vcpu_events
*events
)
3226 * FIXME: pass injected and pending separately. This is only
3227 * needed for nested virtualization, whose state cannot be
3228 * migrated yet. For now we can combine them.
3230 events
->exception
.injected
=
3231 (vcpu
->arch
.exception
.pending
||
3232 vcpu
->arch
.exception
.injected
) &&
3233 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3234 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3235 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3236 events
->exception
.pad
= 0;
3237 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3239 events
->interrupt
.injected
=
3240 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3241 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3242 events
->interrupt
.soft
= 0;
3243 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3245 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3246 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3247 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3248 events
->nmi
.pad
= 0;
3250 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3252 events
->smi
.smm
= is_smm(vcpu
);
3253 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3254 events
->smi
.smm_inside_nmi
=
3255 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3256 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3258 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3259 | KVM_VCPUEVENT_VALID_SHADOW
3260 | KVM_VCPUEVENT_VALID_SMM
);
3261 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3264 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3266 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3267 struct kvm_vcpu_events
*events
)
3269 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3270 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3271 | KVM_VCPUEVENT_VALID_SHADOW
3272 | KVM_VCPUEVENT_VALID_SMM
))
3275 if (events
->exception
.injected
&&
3276 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3277 is_guest_mode(vcpu
)))
3280 /* INITs are latched while in SMM */
3281 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3282 (events
->smi
.smm
|| events
->smi
.pending
) &&
3283 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3287 vcpu
->arch
.exception
.injected
= false;
3288 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3289 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3290 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3291 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3293 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3294 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3295 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3296 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3297 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3298 events
->interrupt
.shadow
);
3300 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3301 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3302 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3303 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3305 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3306 lapic_in_kernel(vcpu
))
3307 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3309 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3310 u32 hflags
= vcpu
->arch
.hflags
;
3311 if (events
->smi
.smm
)
3312 hflags
|= HF_SMM_MASK
;
3314 hflags
&= ~HF_SMM_MASK
;
3315 kvm_set_hflags(vcpu
, hflags
);
3317 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3319 if (events
->smi
.smm
) {
3320 if (events
->smi
.smm_inside_nmi
)
3321 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3323 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3324 if (lapic_in_kernel(vcpu
)) {
3325 if (events
->smi
.latched_init
)
3326 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3328 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3333 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3338 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3339 struct kvm_debugregs
*dbgregs
)
3343 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3344 kvm_get_dr(vcpu
, 6, &val
);
3346 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3348 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3351 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3352 struct kvm_debugregs
*dbgregs
)
3357 if (dbgregs
->dr6
& ~0xffffffffull
)
3359 if (dbgregs
->dr7
& ~0xffffffffull
)
3362 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3363 kvm_update_dr0123(vcpu
);
3364 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3365 kvm_update_dr6(vcpu
);
3366 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3367 kvm_update_dr7(vcpu
);
3372 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3374 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3376 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3377 u64 xstate_bv
= xsave
->header
.xfeatures
;
3381 * Copy legacy XSAVE area, to avoid complications with CPUID
3382 * leaves 0 and 1 in the loop below.
3384 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3387 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3388 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3391 * Copy each region from the possibly compacted offset to the
3392 * non-compacted offset.
3394 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3396 u64 feature
= valid
& -valid
;
3397 int index
= fls64(feature
) - 1;
3398 void *src
= get_xsave_addr(xsave
, feature
);
3401 u32 size
, offset
, ecx
, edx
;
3402 cpuid_count(XSTATE_CPUID
, index
,
3403 &size
, &offset
, &ecx
, &edx
);
3404 if (feature
== XFEATURE_MASK_PKRU
)
3405 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3406 sizeof(vcpu
->arch
.pkru
));
3408 memcpy(dest
+ offset
, src
, size
);
3416 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3418 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3419 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3423 * Copy legacy XSAVE area, to avoid complications with CPUID
3424 * leaves 0 and 1 in the loop below.
3426 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3428 /* Set XSTATE_BV and possibly XCOMP_BV. */
3429 xsave
->header
.xfeatures
= xstate_bv
;
3430 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3431 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3434 * Copy each region from the non-compacted offset to the
3435 * possibly compacted offset.
3437 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3439 u64 feature
= valid
& -valid
;
3440 int index
= fls64(feature
) - 1;
3441 void *dest
= get_xsave_addr(xsave
, feature
);
3444 u32 size
, offset
, ecx
, edx
;
3445 cpuid_count(XSTATE_CPUID
, index
,
3446 &size
, &offset
, &ecx
, &edx
);
3447 if (feature
== XFEATURE_MASK_PKRU
)
3448 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3449 sizeof(vcpu
->arch
.pkru
));
3451 memcpy(dest
, src
+ offset
, size
);
3458 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3459 struct kvm_xsave
*guest_xsave
)
3461 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3462 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3463 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3465 memcpy(guest_xsave
->region
,
3466 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3467 sizeof(struct fxregs_state
));
3468 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3469 XFEATURE_MASK_FPSSE
;
3473 #define XSAVE_MXCSR_OFFSET 24
3475 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3476 struct kvm_xsave
*guest_xsave
)
3479 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3480 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3482 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3484 * Here we allow setting states that are not present in
3485 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3486 * with old userspace.
3488 if (xstate_bv
& ~kvm_supported_xcr0() ||
3489 mxcsr
& ~mxcsr_feature_mask
)
3491 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3493 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3494 mxcsr
& ~mxcsr_feature_mask
)
3496 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3497 guest_xsave
->region
, sizeof(struct fxregs_state
));
3502 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3503 struct kvm_xcrs
*guest_xcrs
)
3505 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3506 guest_xcrs
->nr_xcrs
= 0;
3510 guest_xcrs
->nr_xcrs
= 1;
3511 guest_xcrs
->flags
= 0;
3512 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3513 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3516 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3517 struct kvm_xcrs
*guest_xcrs
)
3521 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3524 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3527 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3528 /* Only support XCR0 currently */
3529 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3530 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3531 guest_xcrs
->xcrs
[i
].value
);
3540 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3541 * stopped by the hypervisor. This function will be called from the host only.
3542 * EINVAL is returned when the host attempts to set the flag for a guest that
3543 * does not support pv clocks.
3545 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3547 if (!vcpu
->arch
.pv_time_enabled
)
3549 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3550 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3554 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3555 struct kvm_enable_cap
*cap
)
3561 case KVM_CAP_HYPERV_SYNIC2
:
3564 case KVM_CAP_HYPERV_SYNIC
:
3565 if (!irqchip_in_kernel(vcpu
->kvm
))
3567 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3568 KVM_CAP_HYPERV_SYNIC2
);
3574 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3575 unsigned int ioctl
, unsigned long arg
)
3577 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3578 void __user
*argp
= (void __user
*)arg
;
3581 struct kvm_lapic_state
*lapic
;
3582 struct kvm_xsave
*xsave
;
3583 struct kvm_xcrs
*xcrs
;
3589 case KVM_GET_LAPIC
: {
3591 if (!lapic_in_kernel(vcpu
))
3593 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3598 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3602 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3607 case KVM_SET_LAPIC
: {
3609 if (!lapic_in_kernel(vcpu
))
3611 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3612 if (IS_ERR(u
.lapic
))
3613 return PTR_ERR(u
.lapic
);
3615 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3618 case KVM_INTERRUPT
: {
3619 struct kvm_interrupt irq
;
3622 if (copy_from_user(&irq
, argp
, sizeof irq
))
3624 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3628 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3632 r
= kvm_vcpu_ioctl_smi(vcpu
);
3635 case KVM_SET_CPUID
: {
3636 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3637 struct kvm_cpuid cpuid
;
3640 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3642 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3645 case KVM_SET_CPUID2
: {
3646 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3647 struct kvm_cpuid2 cpuid
;
3650 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3652 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3653 cpuid_arg
->entries
);
3656 case KVM_GET_CPUID2
: {
3657 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3658 struct kvm_cpuid2 cpuid
;
3661 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3663 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3664 cpuid_arg
->entries
);
3668 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3673 case KVM_GET_MSRS
: {
3674 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3675 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3676 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3679 case KVM_SET_MSRS
: {
3680 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3681 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3682 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3685 case KVM_TPR_ACCESS_REPORTING
: {
3686 struct kvm_tpr_access_ctl tac
;
3689 if (copy_from_user(&tac
, argp
, sizeof tac
))
3691 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3695 if (copy_to_user(argp
, &tac
, sizeof tac
))
3700 case KVM_SET_VAPIC_ADDR
: {
3701 struct kvm_vapic_addr va
;
3705 if (!lapic_in_kernel(vcpu
))
3708 if (copy_from_user(&va
, argp
, sizeof va
))
3710 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3711 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3712 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3715 case KVM_X86_SETUP_MCE
: {
3719 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3721 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3724 case KVM_X86_SET_MCE
: {
3725 struct kvm_x86_mce mce
;
3728 if (copy_from_user(&mce
, argp
, sizeof mce
))
3730 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3733 case KVM_GET_VCPU_EVENTS
: {
3734 struct kvm_vcpu_events events
;
3736 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3739 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3744 case KVM_SET_VCPU_EVENTS
: {
3745 struct kvm_vcpu_events events
;
3748 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3751 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3754 case KVM_GET_DEBUGREGS
: {
3755 struct kvm_debugregs dbgregs
;
3757 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3760 if (copy_to_user(argp
, &dbgregs
,
3761 sizeof(struct kvm_debugregs
)))
3766 case KVM_SET_DEBUGREGS
: {
3767 struct kvm_debugregs dbgregs
;
3770 if (copy_from_user(&dbgregs
, argp
,
3771 sizeof(struct kvm_debugregs
)))
3774 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3777 case KVM_GET_XSAVE
: {
3778 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3783 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3786 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3791 case KVM_SET_XSAVE
: {
3792 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3793 if (IS_ERR(u
.xsave
))
3794 return PTR_ERR(u
.xsave
);
3796 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3799 case KVM_GET_XCRS
: {
3800 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3805 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3808 if (copy_to_user(argp
, u
.xcrs
,
3809 sizeof(struct kvm_xcrs
)))
3814 case KVM_SET_XCRS
: {
3815 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3817 return PTR_ERR(u
.xcrs
);
3819 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3822 case KVM_SET_TSC_KHZ
: {
3826 user_tsc_khz
= (u32
)arg
;
3828 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3831 if (user_tsc_khz
== 0)
3832 user_tsc_khz
= tsc_khz
;
3834 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3839 case KVM_GET_TSC_KHZ
: {
3840 r
= vcpu
->arch
.virtual_tsc_khz
;
3843 case KVM_KVMCLOCK_CTRL
: {
3844 r
= kvm_set_guest_paused(vcpu
);
3847 case KVM_ENABLE_CAP
: {
3848 struct kvm_enable_cap cap
;
3851 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3853 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3864 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3866 return VM_FAULT_SIGBUS
;
3869 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3873 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3875 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3879 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3882 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3886 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3887 u32 kvm_nr_mmu_pages
)
3889 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3892 mutex_lock(&kvm
->slots_lock
);
3894 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3895 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3897 mutex_unlock(&kvm
->slots_lock
);
3901 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3903 return kvm
->arch
.n_max_mmu_pages
;
3906 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3908 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3912 switch (chip
->chip_id
) {
3913 case KVM_IRQCHIP_PIC_MASTER
:
3914 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3915 sizeof(struct kvm_pic_state
));
3917 case KVM_IRQCHIP_PIC_SLAVE
:
3918 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3919 sizeof(struct kvm_pic_state
));
3921 case KVM_IRQCHIP_IOAPIC
:
3922 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3931 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3933 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3937 switch (chip
->chip_id
) {
3938 case KVM_IRQCHIP_PIC_MASTER
:
3939 spin_lock(&pic
->lock
);
3940 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3941 sizeof(struct kvm_pic_state
));
3942 spin_unlock(&pic
->lock
);
3944 case KVM_IRQCHIP_PIC_SLAVE
:
3945 spin_lock(&pic
->lock
);
3946 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3947 sizeof(struct kvm_pic_state
));
3948 spin_unlock(&pic
->lock
);
3950 case KVM_IRQCHIP_IOAPIC
:
3951 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3957 kvm_pic_update_irq(pic
);
3961 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3963 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3965 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3967 mutex_lock(&kps
->lock
);
3968 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3969 mutex_unlock(&kps
->lock
);
3973 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3976 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3978 mutex_lock(&pit
->pit_state
.lock
);
3979 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3980 for (i
= 0; i
< 3; i
++)
3981 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3982 mutex_unlock(&pit
->pit_state
.lock
);
3986 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3988 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3989 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3990 sizeof(ps
->channels
));
3991 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3992 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3993 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3997 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4001 u32 prev_legacy
, cur_legacy
;
4002 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4004 mutex_lock(&pit
->pit_state
.lock
);
4005 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4006 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4007 if (!prev_legacy
&& cur_legacy
)
4009 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
4010 sizeof(pit
->pit_state
.channels
));
4011 pit
->pit_state
.flags
= ps
->flags
;
4012 for (i
= 0; i
< 3; i
++)
4013 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
4015 mutex_unlock(&pit
->pit_state
.lock
);
4019 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
4020 struct kvm_reinject_control
*control
)
4022 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4027 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4028 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4029 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4031 mutex_lock(&pit
->pit_state
.lock
);
4032 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
4033 mutex_unlock(&pit
->pit_state
.lock
);
4039 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4040 * @kvm: kvm instance
4041 * @log: slot id and address to which we copy the log
4043 * Steps 1-4 below provide general overview of dirty page logging. See
4044 * kvm_get_dirty_log_protect() function description for additional details.
4046 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4047 * always flush the TLB (step 4) even if previous step failed and the dirty
4048 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4049 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4050 * writes will be marked dirty for next log read.
4052 * 1. Take a snapshot of the bit and clear it if needed.
4053 * 2. Write protect the corresponding page.
4054 * 3. Copy the snapshot to the userspace.
4055 * 4. Flush TLB's if needed.
4057 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
4059 bool is_dirty
= false;
4062 mutex_lock(&kvm
->slots_lock
);
4065 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4067 if (kvm_x86_ops
->flush_log_dirty
)
4068 kvm_x86_ops
->flush_log_dirty(kvm
);
4070 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
4073 * All the TLBs can be flushed out of mmu lock, see the comments in
4074 * kvm_mmu_slot_remove_write_access().
4076 lockdep_assert_held(&kvm
->slots_lock
);
4078 kvm_flush_remote_tlbs(kvm
);
4080 mutex_unlock(&kvm
->slots_lock
);
4084 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4087 if (!irqchip_in_kernel(kvm
))
4090 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4091 irq_event
->irq
, irq_event
->level
,
4096 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4097 struct kvm_enable_cap
*cap
)
4105 case KVM_CAP_DISABLE_QUIRKS
:
4106 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4109 case KVM_CAP_SPLIT_IRQCHIP
: {
4110 mutex_lock(&kvm
->lock
);
4112 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4113 goto split_irqchip_unlock
;
4115 if (irqchip_in_kernel(kvm
))
4116 goto split_irqchip_unlock
;
4117 if (kvm
->created_vcpus
)
4118 goto split_irqchip_unlock
;
4119 r
= kvm_setup_empty_irq_routing(kvm
);
4121 goto split_irqchip_unlock
;
4122 /* Pairs with irqchip_in_kernel. */
4124 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4125 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4127 split_irqchip_unlock
:
4128 mutex_unlock(&kvm
->lock
);
4131 case KVM_CAP_X2APIC_API
:
4133 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4136 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4137 kvm
->arch
.x2apic_format
= true;
4138 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4139 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4150 long kvm_arch_vm_ioctl(struct file
*filp
,
4151 unsigned int ioctl
, unsigned long arg
)
4153 struct kvm
*kvm
= filp
->private_data
;
4154 void __user
*argp
= (void __user
*)arg
;
4157 * This union makes it completely explicit to gcc-3.x
4158 * that these two variables' stack usage should be
4159 * combined, not added together.
4162 struct kvm_pit_state ps
;
4163 struct kvm_pit_state2 ps2
;
4164 struct kvm_pit_config pit_config
;
4168 case KVM_SET_TSS_ADDR
:
4169 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4171 case KVM_SET_IDENTITY_MAP_ADDR
: {
4174 mutex_lock(&kvm
->lock
);
4176 if (kvm
->created_vcpus
)
4177 goto set_identity_unlock
;
4179 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4180 goto set_identity_unlock
;
4181 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4182 set_identity_unlock
:
4183 mutex_unlock(&kvm
->lock
);
4186 case KVM_SET_NR_MMU_PAGES
:
4187 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4189 case KVM_GET_NR_MMU_PAGES
:
4190 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4192 case KVM_CREATE_IRQCHIP
: {
4193 mutex_lock(&kvm
->lock
);
4196 if (irqchip_in_kernel(kvm
))
4197 goto create_irqchip_unlock
;
4200 if (kvm
->created_vcpus
)
4201 goto create_irqchip_unlock
;
4203 r
= kvm_pic_init(kvm
);
4205 goto create_irqchip_unlock
;
4207 r
= kvm_ioapic_init(kvm
);
4209 kvm_pic_destroy(kvm
);
4210 goto create_irqchip_unlock
;
4213 r
= kvm_setup_default_irq_routing(kvm
);
4215 kvm_ioapic_destroy(kvm
);
4216 kvm_pic_destroy(kvm
);
4217 goto create_irqchip_unlock
;
4219 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4221 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4222 create_irqchip_unlock
:
4223 mutex_unlock(&kvm
->lock
);
4226 case KVM_CREATE_PIT
:
4227 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4229 case KVM_CREATE_PIT2
:
4231 if (copy_from_user(&u
.pit_config
, argp
,
4232 sizeof(struct kvm_pit_config
)))
4235 mutex_lock(&kvm
->lock
);
4238 goto create_pit_unlock
;
4240 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4244 mutex_unlock(&kvm
->lock
);
4246 case KVM_GET_IRQCHIP
: {
4247 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4248 struct kvm_irqchip
*chip
;
4250 chip
= memdup_user(argp
, sizeof(*chip
));
4257 if (!irqchip_kernel(kvm
))
4258 goto get_irqchip_out
;
4259 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4261 goto get_irqchip_out
;
4263 if (copy_to_user(argp
, chip
, sizeof *chip
))
4264 goto get_irqchip_out
;
4270 case KVM_SET_IRQCHIP
: {
4271 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4272 struct kvm_irqchip
*chip
;
4274 chip
= memdup_user(argp
, sizeof(*chip
));
4281 if (!irqchip_kernel(kvm
))
4282 goto set_irqchip_out
;
4283 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4285 goto set_irqchip_out
;
4293 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4296 if (!kvm
->arch
.vpit
)
4298 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4302 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4309 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4312 if (!kvm
->arch
.vpit
)
4314 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4317 case KVM_GET_PIT2
: {
4319 if (!kvm
->arch
.vpit
)
4321 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4325 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4330 case KVM_SET_PIT2
: {
4332 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4335 if (!kvm
->arch
.vpit
)
4337 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4340 case KVM_REINJECT_CONTROL
: {
4341 struct kvm_reinject_control control
;
4343 if (copy_from_user(&control
, argp
, sizeof(control
)))
4345 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4348 case KVM_SET_BOOT_CPU_ID
:
4350 mutex_lock(&kvm
->lock
);
4351 if (kvm
->created_vcpus
)
4354 kvm
->arch
.bsp_vcpu_id
= arg
;
4355 mutex_unlock(&kvm
->lock
);
4357 case KVM_XEN_HVM_CONFIG
: {
4358 struct kvm_xen_hvm_config xhc
;
4360 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4365 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4369 case KVM_SET_CLOCK
: {
4370 struct kvm_clock_data user_ns
;
4374 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4383 * TODO: userspace has to take care of races with VCPU_RUN, so
4384 * kvm_gen_update_masterclock() can be cut down to locked
4385 * pvclock_update_vm_gtod_copy().
4387 kvm_gen_update_masterclock(kvm
);
4388 now_ns
= get_kvmclock_ns(kvm
);
4389 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4390 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4393 case KVM_GET_CLOCK
: {
4394 struct kvm_clock_data user_ns
;
4397 now_ns
= get_kvmclock_ns(kvm
);
4398 user_ns
.clock
= now_ns
;
4399 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4400 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4403 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4408 case KVM_ENABLE_CAP
: {
4409 struct kvm_enable_cap cap
;
4412 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4414 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4424 static void kvm_init_msr_list(void)
4429 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4430 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4434 * Even MSRs that are valid in the host may not be exposed
4435 * to the guests in some cases.
4437 switch (msrs_to_save
[i
]) {
4438 case MSR_IA32_BNDCFGS
:
4439 if (!kvm_x86_ops
->mpx_supported())
4443 if (!kvm_x86_ops
->rdtscp_supported())
4451 msrs_to_save
[j
] = msrs_to_save
[i
];
4454 num_msrs_to_save
= j
;
4456 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4457 if (!kvm_x86_ops
->has_emulated_msr(emulated_msrs
[i
]))
4461 emulated_msrs
[j
] = emulated_msrs
[i
];
4464 num_emulated_msrs
= j
;
4466 for (i
= j
= 0; i
< ARRAY_SIZE(msr_based_features
); i
++) {
4467 struct kvm_msr_entry msr
;
4469 msr
.index
= msr_based_features
[i
];
4470 if (kvm_get_msr_feature(&msr
))
4474 msr_based_features
[j
] = msr_based_features
[i
];
4477 num_msr_based_features
= j
;
4480 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4488 if (!(lapic_in_kernel(vcpu
) &&
4489 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4490 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4501 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4508 if (!(lapic_in_kernel(vcpu
) &&
4509 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4511 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4513 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4523 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4524 struct kvm_segment
*var
, int seg
)
4526 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4529 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4530 struct kvm_segment
*var
, int seg
)
4532 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4535 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4536 struct x86_exception
*exception
)
4540 BUG_ON(!mmu_is_nested(vcpu
));
4542 /* NPT walks are always user-walks */
4543 access
|= PFERR_USER_MASK
;
4544 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4549 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4550 struct x86_exception
*exception
)
4552 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4553 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4556 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4557 struct x86_exception
*exception
)
4559 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4560 access
|= PFERR_FETCH_MASK
;
4561 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4564 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4565 struct x86_exception
*exception
)
4567 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4568 access
|= PFERR_WRITE_MASK
;
4569 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4572 /* uses this to access any guest's mapped memory without checking CPL */
4573 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4574 struct x86_exception
*exception
)
4576 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4579 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4580 struct kvm_vcpu
*vcpu
, u32 access
,
4581 struct x86_exception
*exception
)
4584 int r
= X86EMUL_CONTINUE
;
4587 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4589 unsigned offset
= addr
& (PAGE_SIZE
-1);
4590 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4593 if (gpa
== UNMAPPED_GVA
)
4594 return X86EMUL_PROPAGATE_FAULT
;
4595 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4598 r
= X86EMUL_IO_NEEDED
;
4610 /* used for instruction fetching */
4611 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4612 gva_t addr
, void *val
, unsigned int bytes
,
4613 struct x86_exception
*exception
)
4615 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4616 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4620 /* Inline kvm_read_guest_virt_helper for speed. */
4621 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4623 if (unlikely(gpa
== UNMAPPED_GVA
))
4624 return X86EMUL_PROPAGATE_FAULT
;
4626 offset
= addr
& (PAGE_SIZE
-1);
4627 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4628 bytes
= (unsigned)PAGE_SIZE
- offset
;
4629 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4631 if (unlikely(ret
< 0))
4632 return X86EMUL_IO_NEEDED
;
4634 return X86EMUL_CONTINUE
;
4637 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
4638 gva_t addr
, void *val
, unsigned int bytes
,
4639 struct x86_exception
*exception
)
4641 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4644 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
4645 * is returned, but our callers are not ready for that and they blindly
4646 * call kvm_inject_page_fault. Ensure that they at least do not leak
4647 * uninitialized kernel stack memory into cr2 and error code.
4649 memset(exception
, 0, sizeof(*exception
));
4650 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4653 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4655 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
4656 gva_t addr
, void *val
, unsigned int bytes
,
4657 struct x86_exception
*exception
, bool system
)
4659 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4662 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
4663 access
|= PFERR_USER_MASK
;
4665 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
4668 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4669 unsigned long addr
, void *val
, unsigned int bytes
)
4671 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4672 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4674 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4677 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4678 struct kvm_vcpu
*vcpu
, u32 access
,
4679 struct x86_exception
*exception
)
4682 int r
= X86EMUL_CONTINUE
;
4685 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4688 unsigned offset
= addr
& (PAGE_SIZE
-1);
4689 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4692 if (gpa
== UNMAPPED_GVA
)
4693 return X86EMUL_PROPAGATE_FAULT
;
4694 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4696 r
= X86EMUL_IO_NEEDED
;
4708 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
4709 unsigned int bytes
, struct x86_exception
*exception
,
4712 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4713 u32 access
= PFERR_WRITE_MASK
;
4715 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
4716 access
|= PFERR_USER_MASK
;
4718 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4722 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
4723 unsigned int bytes
, struct x86_exception
*exception
)
4725 /* kvm_write_guest_virt_system can pull in tons of pages. */
4726 vcpu
->arch
.l1tf_flush_l1d
= true;
4728 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4729 PFERR_WRITE_MASK
, exception
);
4731 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4733 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4734 gpa_t gpa
, bool write
)
4736 /* For APIC access vmexit */
4737 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4740 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4741 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4748 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4749 gpa_t
*gpa
, struct x86_exception
*exception
,
4752 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4753 | (write
? PFERR_WRITE_MASK
: 0);
4756 * currently PKRU is only applied to ept enabled guest so
4757 * there is no pkey in EPT page table for L1 guest or EPT
4758 * shadow page table for L2 guest.
4760 if (vcpu_match_mmio_gva(vcpu
, gva
)
4761 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4762 vcpu
->arch
.access
, 0, access
)) {
4763 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4764 (gva
& (PAGE_SIZE
- 1));
4765 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4769 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4771 if (*gpa
== UNMAPPED_GVA
)
4774 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4777 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4778 const void *val
, int bytes
)
4782 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4785 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4789 struct read_write_emulator_ops
{
4790 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4792 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4793 void *val
, int bytes
);
4794 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4795 int bytes
, void *val
);
4796 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4797 void *val
, int bytes
);
4801 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4803 if (vcpu
->mmio_read_completed
) {
4804 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4805 vcpu
->mmio_fragments
[0].gpa
, val
);
4806 vcpu
->mmio_read_completed
= 0;
4813 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4814 void *val
, int bytes
)
4816 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4819 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4820 void *val
, int bytes
)
4822 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4825 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4827 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4828 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4831 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4832 void *val
, int bytes
)
4834 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4835 return X86EMUL_IO_NEEDED
;
4838 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4839 void *val
, int bytes
)
4841 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4843 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4844 return X86EMUL_CONTINUE
;
4847 static const struct read_write_emulator_ops read_emultor
= {
4848 .read_write_prepare
= read_prepare
,
4849 .read_write_emulate
= read_emulate
,
4850 .read_write_mmio
= vcpu_mmio_read
,
4851 .read_write_exit_mmio
= read_exit_mmio
,
4854 static const struct read_write_emulator_ops write_emultor
= {
4855 .read_write_emulate
= write_emulate
,
4856 .read_write_mmio
= write_mmio
,
4857 .read_write_exit_mmio
= write_exit_mmio
,
4861 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4863 struct x86_exception
*exception
,
4864 struct kvm_vcpu
*vcpu
,
4865 const struct read_write_emulator_ops
*ops
)
4869 bool write
= ops
->write
;
4870 struct kvm_mmio_fragment
*frag
;
4871 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4874 * If the exit was due to a NPF we may already have a GPA.
4875 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4876 * Note, this cannot be used on string operations since string
4877 * operation using rep will only have the initial GPA from the NPF
4880 if (vcpu
->arch
.gpa_available
&&
4881 emulator_can_use_gpa(ctxt
) &&
4882 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4883 gpa
= vcpu
->arch
.gpa_val
;
4884 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4886 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4888 return X86EMUL_PROPAGATE_FAULT
;
4891 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4892 return X86EMUL_CONTINUE
;
4895 * Is this MMIO handled locally?
4897 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4898 if (handled
== bytes
)
4899 return X86EMUL_CONTINUE
;
4905 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4906 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4910 return X86EMUL_CONTINUE
;
4913 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4915 void *val
, unsigned int bytes
,
4916 struct x86_exception
*exception
,
4917 const struct read_write_emulator_ops
*ops
)
4919 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4923 if (ops
->read_write_prepare
&&
4924 ops
->read_write_prepare(vcpu
, val
, bytes
))
4925 return X86EMUL_CONTINUE
;
4927 vcpu
->mmio_nr_fragments
= 0;
4929 /* Crossing a page boundary? */
4930 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4933 now
= -addr
& ~PAGE_MASK
;
4934 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4937 if (rc
!= X86EMUL_CONTINUE
)
4940 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4946 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4948 if (rc
!= X86EMUL_CONTINUE
)
4951 if (!vcpu
->mmio_nr_fragments
)
4954 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4956 vcpu
->mmio_needed
= 1;
4957 vcpu
->mmio_cur_fragment
= 0;
4959 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4960 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4961 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4962 vcpu
->run
->mmio
.phys_addr
= gpa
;
4964 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4967 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4971 struct x86_exception
*exception
)
4973 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4974 exception
, &read_emultor
);
4977 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4981 struct x86_exception
*exception
)
4983 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4984 exception
, &write_emultor
);
4987 #define CMPXCHG_TYPE(t, ptr, old, new) \
4988 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4990 #ifdef CONFIG_X86_64
4991 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4993 # define CMPXCHG64(ptr, old, new) \
4994 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4997 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
5002 struct x86_exception
*exception
)
5004 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5010 /* guests cmpxchg8b have to be emulated atomically */
5011 if (bytes
> 8 || (bytes
& (bytes
- 1)))
5014 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
5016 if (gpa
== UNMAPPED_GVA
||
5017 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5020 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
5023 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
5024 if (is_error_page(page
))
5027 kaddr
= kmap_atomic(page
);
5028 kaddr
+= offset_in_page(gpa
);
5031 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
5034 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
5037 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
5040 exchanged
= CMPXCHG64(kaddr
, old
, new);
5045 kunmap_atomic(kaddr
);
5046 kvm_release_page_dirty(page
);
5049 return X86EMUL_CMPXCHG_FAILED
;
5051 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
5052 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
5054 return X86EMUL_CONTINUE
;
5057 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
5059 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
5062 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
5066 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
5067 if (vcpu
->arch
.pio
.in
)
5068 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5069 vcpu
->arch
.pio
.size
, pd
);
5071 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5072 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5076 pd
+= vcpu
->arch
.pio
.size
;
5081 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5082 unsigned short port
, void *val
,
5083 unsigned int count
, bool in
)
5085 vcpu
->arch
.pio
.port
= port
;
5086 vcpu
->arch
.pio
.in
= in
;
5087 vcpu
->arch
.pio
.count
= count
;
5088 vcpu
->arch
.pio
.size
= size
;
5090 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5091 vcpu
->arch
.pio
.count
= 0;
5095 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5096 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5097 vcpu
->run
->io
.size
= size
;
5098 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5099 vcpu
->run
->io
.count
= count
;
5100 vcpu
->run
->io
.port
= port
;
5105 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5106 int size
, unsigned short port
, void *val
,
5109 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5112 if (vcpu
->arch
.pio
.count
)
5115 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5117 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5120 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5121 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5122 vcpu
->arch
.pio
.count
= 0;
5129 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
5130 int size
, unsigned short port
,
5131 const void *val
, unsigned int count
)
5133 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5135 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5136 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5137 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
5140 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
5142 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
5145 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
5147 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5150 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5152 if (!need_emulate_wbinvd(vcpu
))
5153 return X86EMUL_CONTINUE
;
5155 if (kvm_x86_ops
->has_wbinvd_exit()) {
5156 int cpu
= get_cpu();
5158 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5159 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5160 wbinvd_ipi
, NULL
, 1);
5162 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5165 return X86EMUL_CONTINUE
;
5168 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5170 kvm_emulate_wbinvd_noskip(vcpu
);
5171 return kvm_skip_emulated_instruction(vcpu
);
5173 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5177 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5179 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5182 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5183 unsigned long *dest
)
5185 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5188 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5189 unsigned long value
)
5192 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5195 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5197 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5200 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5202 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5203 unsigned long value
;
5207 value
= kvm_read_cr0(vcpu
);
5210 value
= vcpu
->arch
.cr2
;
5213 value
= kvm_read_cr3(vcpu
);
5216 value
= kvm_read_cr4(vcpu
);
5219 value
= kvm_get_cr8(vcpu
);
5222 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5229 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5231 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5236 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5239 vcpu
->arch
.cr2
= val
;
5242 res
= kvm_set_cr3(vcpu
, val
);
5245 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5248 res
= kvm_set_cr8(vcpu
, val
);
5251 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5258 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5260 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5263 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5265 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5268 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5270 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5273 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5275 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5278 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5280 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5283 static unsigned long emulator_get_cached_segment_base(
5284 struct x86_emulate_ctxt
*ctxt
, int seg
)
5286 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5289 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5290 struct desc_struct
*desc
, u32
*base3
,
5293 struct kvm_segment var
;
5295 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5296 *selector
= var
.selector
;
5299 memset(desc
, 0, sizeof(*desc
));
5307 set_desc_limit(desc
, var
.limit
);
5308 set_desc_base(desc
, (unsigned long)var
.base
);
5309 #ifdef CONFIG_X86_64
5311 *base3
= var
.base
>> 32;
5313 desc
->type
= var
.type
;
5315 desc
->dpl
= var
.dpl
;
5316 desc
->p
= var
.present
;
5317 desc
->avl
= var
.avl
;
5325 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5326 struct desc_struct
*desc
, u32 base3
,
5329 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5330 struct kvm_segment var
;
5332 var
.selector
= selector
;
5333 var
.base
= get_desc_base(desc
);
5334 #ifdef CONFIG_X86_64
5335 var
.base
|= ((u64
)base3
) << 32;
5337 var
.limit
= get_desc_limit(desc
);
5339 var
.limit
= (var
.limit
<< 12) | 0xfff;
5340 var
.type
= desc
->type
;
5341 var
.dpl
= desc
->dpl
;
5346 var
.avl
= desc
->avl
;
5347 var
.present
= desc
->p
;
5348 var
.unusable
= !var
.present
;
5351 kvm_set_segment(vcpu
, &var
, seg
);
5355 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5356 u32 msr_index
, u64
*pdata
)
5358 struct msr_data msr
;
5361 msr
.index
= msr_index
;
5362 msr
.host_initiated
= false;
5363 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5371 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5372 u32 msr_index
, u64 data
)
5374 struct msr_data msr
;
5377 msr
.index
= msr_index
;
5378 msr
.host_initiated
= false;
5379 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5382 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5384 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5386 return vcpu
->arch
.smbase
;
5389 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5391 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5393 vcpu
->arch
.smbase
= smbase
;
5396 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5399 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5402 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5403 u32 pmc
, u64
*pdata
)
5405 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5408 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5410 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5413 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5414 struct x86_instruction_info
*info
,
5415 enum x86_intercept_stage stage
)
5417 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5420 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5421 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5423 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5426 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5428 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5431 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5433 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5436 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5438 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5441 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5443 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5446 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5448 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5451 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5453 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5456 static const struct x86_emulate_ops emulate_ops
= {
5457 .read_gpr
= emulator_read_gpr
,
5458 .write_gpr
= emulator_write_gpr
,
5459 .read_std
= emulator_read_std
,
5460 .write_std
= emulator_write_std
,
5461 .read_phys
= kvm_read_guest_phys_system
,
5462 .fetch
= kvm_fetch_guest_virt
,
5463 .read_emulated
= emulator_read_emulated
,
5464 .write_emulated
= emulator_write_emulated
,
5465 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5466 .invlpg
= emulator_invlpg
,
5467 .pio_in_emulated
= emulator_pio_in_emulated
,
5468 .pio_out_emulated
= emulator_pio_out_emulated
,
5469 .get_segment
= emulator_get_segment
,
5470 .set_segment
= emulator_set_segment
,
5471 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5472 .get_gdt
= emulator_get_gdt
,
5473 .get_idt
= emulator_get_idt
,
5474 .set_gdt
= emulator_set_gdt
,
5475 .set_idt
= emulator_set_idt
,
5476 .get_cr
= emulator_get_cr
,
5477 .set_cr
= emulator_set_cr
,
5478 .cpl
= emulator_get_cpl
,
5479 .get_dr
= emulator_get_dr
,
5480 .set_dr
= emulator_set_dr
,
5481 .get_smbase
= emulator_get_smbase
,
5482 .set_smbase
= emulator_set_smbase
,
5483 .set_msr
= emulator_set_msr
,
5484 .get_msr
= emulator_get_msr
,
5485 .check_pmc
= emulator_check_pmc
,
5486 .read_pmc
= emulator_read_pmc
,
5487 .halt
= emulator_halt
,
5488 .wbinvd
= emulator_wbinvd
,
5489 .fix_hypercall
= emulator_fix_hypercall
,
5490 .intercept
= emulator_intercept
,
5491 .get_cpuid
= emulator_get_cpuid
,
5492 .set_nmi_mask
= emulator_set_nmi_mask
,
5493 .get_hflags
= emulator_get_hflags
,
5494 .set_hflags
= emulator_set_hflags
,
5495 .pre_leave_smm
= emulator_pre_leave_smm
,
5498 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5500 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5502 * an sti; sti; sequence only disable interrupts for the first
5503 * instruction. So, if the last instruction, be it emulated or
5504 * not, left the system with the INT_STI flag enabled, it
5505 * means that the last instruction is an sti. We should not
5506 * leave the flag on in this case. The same goes for mov ss
5508 if (int_shadow
& mask
)
5510 if (unlikely(int_shadow
|| mask
)) {
5511 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5513 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5517 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5519 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5520 if (ctxt
->exception
.vector
== PF_VECTOR
)
5521 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5523 if (ctxt
->exception
.error_code_valid
)
5524 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5525 ctxt
->exception
.error_code
);
5527 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5531 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5533 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5536 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5538 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5539 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5541 ctxt
->eip
= kvm_rip_read(vcpu
);
5542 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5543 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5544 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5545 cs_db
? X86EMUL_MODE_PROT32
:
5546 X86EMUL_MODE_PROT16
;
5547 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5548 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5549 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5551 init_decode_cache(ctxt
);
5552 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5555 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5557 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5560 init_emulate_ctxt(vcpu
);
5564 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5565 ret
= emulate_int_real(ctxt
, irq
);
5567 if (ret
!= X86EMUL_CONTINUE
)
5568 return EMULATE_FAIL
;
5570 ctxt
->eip
= ctxt
->_eip
;
5571 kvm_rip_write(vcpu
, ctxt
->eip
);
5572 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5574 if (irq
== NMI_VECTOR
)
5575 vcpu
->arch
.nmi_pending
= 0;
5577 vcpu
->arch
.interrupt
.pending
= false;
5579 return EMULATE_DONE
;
5581 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5583 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5585 int r
= EMULATE_DONE
;
5587 ++vcpu
->stat
.insn_emulation_fail
;
5588 trace_kvm_emulate_insn_failed(vcpu
);
5589 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5590 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5591 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5592 vcpu
->run
->internal
.ndata
= 0;
5593 r
= EMULATE_USER_EXIT
;
5595 kvm_queue_exception(vcpu
, UD_VECTOR
);
5600 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5601 bool write_fault_to_shadow_pgtable
,
5607 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5610 if (!vcpu
->arch
.mmu
.direct_map
) {
5612 * Write permission should be allowed since only
5613 * write access need to be emulated.
5615 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5618 * If the mapping is invalid in guest, let cpu retry
5619 * it to generate fault.
5621 if (gpa
== UNMAPPED_GVA
)
5626 * Do not retry the unhandleable instruction if it faults on the
5627 * readonly host memory, otherwise it will goto a infinite loop:
5628 * retry instruction -> write #PF -> emulation fail -> retry
5629 * instruction -> ...
5631 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5634 * If the instruction failed on the error pfn, it can not be fixed,
5635 * report the error to userspace.
5637 if (is_error_noslot_pfn(pfn
))
5640 kvm_release_pfn_clean(pfn
);
5642 /* The instructions are well-emulated on direct mmu. */
5643 if (vcpu
->arch
.mmu
.direct_map
) {
5644 unsigned int indirect_shadow_pages
;
5646 spin_lock(&vcpu
->kvm
->mmu_lock
);
5647 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5648 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5650 if (indirect_shadow_pages
)
5651 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5657 * if emulation was due to access to shadowed page table
5658 * and it failed try to unshadow page and re-enter the
5659 * guest to let CPU execute the instruction.
5661 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5664 * If the access faults on its page table, it can not
5665 * be fixed by unprotecting shadow page and it should
5666 * be reported to userspace.
5668 return !write_fault_to_shadow_pgtable
;
5671 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5672 unsigned long cr2
, int emulation_type
)
5674 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5675 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5677 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5678 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5681 * If the emulation is caused by #PF and it is non-page_table
5682 * writing instruction, it means the VM-EXIT is caused by shadow
5683 * page protected, we can zap the shadow page and retry this
5684 * instruction directly.
5686 * Note: if the guest uses a non-page-table modifying instruction
5687 * on the PDE that points to the instruction, then we will unmap
5688 * the instruction and go to an infinite loop. So, we cache the
5689 * last retried eip and the last fault address, if we meet the eip
5690 * and the address again, we can break out of the potential infinite
5693 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5695 if (!(emulation_type
& EMULTYPE_RETRY
))
5698 if (x86_page_table_writing_insn(ctxt
))
5701 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5704 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5705 vcpu
->arch
.last_retry_addr
= cr2
;
5707 if (!vcpu
->arch
.mmu
.direct_map
)
5708 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5710 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5715 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5716 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5718 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5720 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5721 /* This is a good place to trace that we are exiting SMM. */
5722 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5724 /* Process a latched INIT or SMI, if any. */
5725 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5728 kvm_mmu_reset_context(vcpu
);
5731 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5733 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5735 vcpu
->arch
.hflags
= emul_flags
;
5737 if (changed
& HF_SMM_MASK
)
5738 kvm_smm_changed(vcpu
);
5741 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5750 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5751 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5756 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5758 struct kvm_run
*kvm_run
= vcpu
->run
;
5760 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5761 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5762 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5763 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5764 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5765 *r
= EMULATE_USER_EXIT
;
5768 * "Certain debug exceptions may clear bit 0-3. The
5769 * remaining contents of the DR6 register are never
5770 * cleared by the processor".
5772 vcpu
->arch
.dr6
&= ~15;
5773 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5774 kvm_queue_exception(vcpu
, DB_VECTOR
);
5778 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5780 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5781 int r
= EMULATE_DONE
;
5783 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5786 * rflags is the old, "raw" value of the flags. The new value has
5787 * not been saved yet.
5789 * This is correct even for TF set by the guest, because "the
5790 * processor will not generate this exception after the instruction
5791 * that sets the TF flag".
5793 if (unlikely(rflags
& X86_EFLAGS_TF
))
5794 kvm_vcpu_do_singlestep(vcpu
, &r
);
5795 return r
== EMULATE_DONE
;
5797 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5799 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5801 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5802 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5803 struct kvm_run
*kvm_run
= vcpu
->run
;
5804 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5805 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5806 vcpu
->arch
.guest_debug_dr7
,
5810 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5811 kvm_run
->debug
.arch
.pc
= eip
;
5812 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5813 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5814 *r
= EMULATE_USER_EXIT
;
5819 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5820 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5821 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5822 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5827 vcpu
->arch
.dr6
&= ~15;
5828 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5829 kvm_queue_exception(vcpu
, DB_VECTOR
);
5838 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5845 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5846 bool writeback
= true;
5847 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5849 vcpu
->arch
.l1tf_flush_l1d
= true;
5852 * Clear write_fault_to_shadow_pgtable here to ensure it is
5855 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5856 kvm_clear_exception_queue(vcpu
);
5858 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5859 init_emulate_ctxt(vcpu
);
5862 * We will reenter on the same instruction since
5863 * we do not set complete_userspace_io. This does not
5864 * handle watchpoints yet, those would be handled in
5867 if (!(emulation_type
& EMULTYPE_SKIP
) &&
5868 kvm_vcpu_check_breakpoint(vcpu
, &r
))
5871 ctxt
->interruptibility
= 0;
5872 ctxt
->have_exception
= false;
5873 ctxt
->exception
.vector
= -1;
5874 ctxt
->perm_ok
= false;
5876 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5878 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5880 trace_kvm_emulate_insn_start(vcpu
);
5881 ++vcpu
->stat
.insn_emulation
;
5882 if (r
!= EMULATION_OK
) {
5883 if (emulation_type
& EMULTYPE_TRAP_UD
)
5884 return EMULATE_FAIL
;
5885 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5887 return EMULATE_DONE
;
5888 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
5889 return EMULATE_DONE
;
5890 if (emulation_type
& EMULTYPE_SKIP
)
5891 return EMULATE_FAIL
;
5892 return handle_emulation_failure(vcpu
);
5896 if (emulation_type
& EMULTYPE_SKIP
) {
5897 kvm_rip_write(vcpu
, ctxt
->_eip
);
5898 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5899 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5900 return EMULATE_DONE
;
5903 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5904 return EMULATE_DONE
;
5906 /* this is needed for vmware backdoor interface to work since it
5907 changes registers values during IO operation */
5908 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5909 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5910 emulator_invalidate_register_cache(ctxt
);
5914 /* Save the faulting GPA (cr2) in the address field */
5915 ctxt
->exception
.address
= cr2
;
5917 r
= x86_emulate_insn(ctxt
);
5919 if (r
== EMULATION_INTERCEPTED
)
5920 return EMULATE_DONE
;
5922 if (r
== EMULATION_FAILED
) {
5923 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5925 return EMULATE_DONE
;
5927 return handle_emulation_failure(vcpu
);
5930 if (ctxt
->have_exception
) {
5932 if (inject_emulated_exception(vcpu
))
5934 } else if (vcpu
->arch
.pio
.count
) {
5935 if (!vcpu
->arch
.pio
.in
) {
5936 /* FIXME: return into emulator if single-stepping. */
5937 vcpu
->arch
.pio
.count
= 0;
5940 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5942 r
= EMULATE_USER_EXIT
;
5943 } else if (vcpu
->mmio_needed
) {
5944 if (!vcpu
->mmio_is_write
)
5946 r
= EMULATE_USER_EXIT
;
5947 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5948 } else if (r
== EMULATION_RESTART
)
5954 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5955 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5956 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5957 kvm_rip_write(vcpu
, ctxt
->eip
);
5958 if (r
== EMULATE_DONE
&&
5959 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5960 kvm_vcpu_do_singlestep(vcpu
, &r
);
5961 if (!ctxt
->have_exception
||
5962 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5963 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5966 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5967 * do nothing, and it will be requested again as soon as
5968 * the shadow expires. But we still need to check here,
5969 * because POPF has no interrupt shadow.
5971 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5972 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5974 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5978 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5980 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5982 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5983 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5984 size
, port
, &val
, 1);
5985 /* do not return to emulator after return from userspace */
5986 vcpu
->arch
.pio
.count
= 0;
5989 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5991 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5995 /* We should only ever be called with arch.pio.count equal to 1 */
5996 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5998 /* For size less than 4 we merge, else we zero extend */
5999 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
6003 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6004 * the copy and tracing
6006 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
6007 vcpu
->arch
.pio
.port
, &val
, 1);
6008 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6013 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
6018 /* For size less than 4 we merge, else we zero extend */
6019 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
6021 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
6024 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6028 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
6032 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
6034 static int kvmclock_cpu_down_prep(unsigned int cpu
)
6036 __this_cpu_write(cpu_tsc_khz
, 0);
6040 static void tsc_khz_changed(void *data
)
6042 struct cpufreq_freqs
*freq
= data
;
6043 unsigned long khz
= 0;
6047 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6048 khz
= cpufreq_quick_get(raw_smp_processor_id());
6051 __this_cpu_write(cpu_tsc_khz
, khz
);
6054 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
6057 struct cpufreq_freqs
*freq
= data
;
6059 struct kvm_vcpu
*vcpu
;
6060 int i
, send_ipi
= 0;
6063 * We allow guests to temporarily run on slowing clocks,
6064 * provided we notify them after, or to run on accelerating
6065 * clocks, provided we notify them before. Thus time never
6068 * However, we have a problem. We can't atomically update
6069 * the frequency of a given CPU from this function; it is
6070 * merely a notifier, which can be called from any CPU.
6071 * Changing the TSC frequency at arbitrary points in time
6072 * requires a recomputation of local variables related to
6073 * the TSC for each VCPU. We must flag these local variables
6074 * to be updated and be sure the update takes place with the
6075 * new frequency before any guests proceed.
6077 * Unfortunately, the combination of hotplug CPU and frequency
6078 * change creates an intractable locking scenario; the order
6079 * of when these callouts happen is undefined with respect to
6080 * CPU hotplug, and they can race with each other. As such,
6081 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6082 * undefined; you can actually have a CPU frequency change take
6083 * place in between the computation of X and the setting of the
6084 * variable. To protect against this problem, all updates of
6085 * the per_cpu tsc_khz variable are done in an interrupt
6086 * protected IPI, and all callers wishing to update the value
6087 * must wait for a synchronous IPI to complete (which is trivial
6088 * if the caller is on the CPU already). This establishes the
6089 * necessary total order on variable updates.
6091 * Note that because a guest time update may take place
6092 * anytime after the setting of the VCPU's request bit, the
6093 * correct TSC value must be set before the request. However,
6094 * to ensure the update actually makes it to any guest which
6095 * starts running in hardware virtualization between the set
6096 * and the acquisition of the spinlock, we must also ping the
6097 * CPU after setting the request bit.
6101 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
6103 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
6106 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6108 spin_lock(&kvm_lock
);
6109 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6110 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6111 if (vcpu
->cpu
!= freq
->cpu
)
6113 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6114 if (vcpu
->cpu
!= smp_processor_id())
6118 spin_unlock(&kvm_lock
);
6120 if (freq
->old
< freq
->new && send_ipi
) {
6122 * We upscale the frequency. Must make the guest
6123 * doesn't see old kvmclock values while running with
6124 * the new frequency, otherwise we risk the guest sees
6125 * time go backwards.
6127 * In case we update the frequency for another cpu
6128 * (which might be in guest context) send an interrupt
6129 * to kick the cpu out of guest context. Next time
6130 * guest context is entered kvmclock will be updated,
6131 * so the guest will not see stale values.
6133 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6138 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
6139 .notifier_call
= kvmclock_cpufreq_notifier
6142 static int kvmclock_cpu_online(unsigned int cpu
)
6144 tsc_khz_changed(NULL
);
6148 static void kvm_timer_init(void)
6150 max_tsc_khz
= tsc_khz
;
6152 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6153 #ifdef CONFIG_CPU_FREQ
6154 struct cpufreq_policy policy
;
6157 memset(&policy
, 0, sizeof(policy
));
6159 cpufreq_get_policy(&policy
, cpu
);
6160 if (policy
.cpuinfo
.max_freq
)
6161 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6164 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6165 CPUFREQ_TRANSITION_NOTIFIER
);
6167 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6169 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6170 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6173 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6175 int kvm_is_in_guest(void)
6177 return __this_cpu_read(current_vcpu
) != NULL
;
6180 static int kvm_is_user_mode(void)
6184 if (__this_cpu_read(current_vcpu
))
6185 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6187 return user_mode
!= 0;
6190 static unsigned long kvm_get_guest_ip(void)
6192 unsigned long ip
= 0;
6194 if (__this_cpu_read(current_vcpu
))
6195 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6200 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6201 .is_in_guest
= kvm_is_in_guest
,
6202 .is_user_mode
= kvm_is_user_mode
,
6203 .get_guest_ip
= kvm_get_guest_ip
,
6206 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6208 __this_cpu_write(current_vcpu
, vcpu
);
6210 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6212 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6214 __this_cpu_write(current_vcpu
, NULL
);
6216 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6218 static void kvm_set_mmio_spte_mask(void)
6221 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6224 * Set the reserved bits and the present bit of an paging-structure
6225 * entry to generate page fault with PFER.RSV = 1.
6227 /* Mask the reserved physical address bits. */
6228 mask
= rsvd_bits(maxphyaddr
, 51);
6230 /* Set the present bit. */
6233 #ifdef CONFIG_X86_64
6235 * If reserved bit is not supported, clear the present bit to disable
6238 if (maxphyaddr
== 52)
6242 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6245 #ifdef CONFIG_X86_64
6246 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6250 struct kvm_vcpu
*vcpu
;
6253 spin_lock(&kvm_lock
);
6254 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6255 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6256 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6257 atomic_set(&kvm_guest_has_master_clock
, 0);
6258 spin_unlock(&kvm_lock
);
6261 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6264 * Notification about pvclock gtod data update.
6266 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6269 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6270 struct timekeeper
*tk
= priv
;
6272 update_pvclock_gtod(tk
);
6274 /* disable master clock if host does not trust, or does not
6275 * use, TSC clocksource
6277 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6278 atomic_read(&kvm_guest_has_master_clock
) != 0)
6279 queue_work(system_long_wq
, &pvclock_gtod_work
);
6284 static struct notifier_block pvclock_gtod_notifier
= {
6285 .notifier_call
= pvclock_gtod_notify
,
6289 int kvm_arch_init(void *opaque
)
6292 struct kvm_x86_ops
*ops
= opaque
;
6295 printk(KERN_ERR
"kvm: already loaded the other module\n");
6300 if (!ops
->cpu_has_kvm_support()) {
6301 printk(KERN_ERR
"kvm: no hardware support\n");
6305 if (ops
->disabled_by_bios()) {
6306 printk(KERN_WARNING
"kvm: disabled by bios\n");
6312 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6314 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6318 r
= kvm_mmu_module_init();
6320 goto out_free_percpu
;
6322 kvm_set_mmio_spte_mask();
6326 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6327 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6328 PT_PRESENT_MASK
, 0, sme_me_mask
);
6331 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6333 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6334 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6337 #ifdef CONFIG_X86_64
6338 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6344 free_percpu(shared_msrs
);
6349 void kvm_arch_exit(void)
6352 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6354 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6355 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6356 CPUFREQ_TRANSITION_NOTIFIER
);
6357 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6358 #ifdef CONFIG_X86_64
6359 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6362 kvm_mmu_module_exit();
6363 free_percpu(shared_msrs
);
6366 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6368 ++vcpu
->stat
.halt_exits
;
6369 if (lapic_in_kernel(vcpu
)) {
6370 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6373 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6377 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6379 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6381 int ret
= kvm_skip_emulated_instruction(vcpu
);
6383 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6384 * KVM_EXIT_DEBUG here.
6386 return kvm_vcpu_halt(vcpu
) && ret
;
6388 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6390 #ifdef CONFIG_X86_64
6391 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6392 unsigned long clock_type
)
6394 struct kvm_clock_pairing clock_pairing
;
6399 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6400 return -KVM_EOPNOTSUPP
;
6402 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6403 return -KVM_EOPNOTSUPP
;
6405 clock_pairing
.sec
= ts
.tv_sec
;
6406 clock_pairing
.nsec
= ts
.tv_nsec
;
6407 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6408 clock_pairing
.flags
= 0;
6411 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6412 sizeof(struct kvm_clock_pairing
)))
6420 * kvm_pv_kick_cpu_op: Kick a vcpu.
6422 * @apicid - apicid of vcpu to be kicked.
6424 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6426 struct kvm_lapic_irq lapic_irq
;
6428 lapic_irq
.shorthand
= 0;
6429 lapic_irq
.dest_mode
= 0;
6430 lapic_irq
.level
= 0;
6431 lapic_irq
.dest_id
= apicid
;
6432 lapic_irq
.msi_redir_hint
= false;
6434 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6435 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6438 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6440 vcpu
->arch
.apicv_active
= false;
6441 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6444 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6446 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6449 if (kvm_hv_hypercall_enabled(vcpu
->kvm
)) {
6450 if (!kvm_hv_hypercall(vcpu
))
6455 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6456 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6457 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6458 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6459 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6461 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6463 op_64_bit
= is_64_bit_mode(vcpu
);
6472 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6478 case KVM_HC_VAPIC_POLL_IRQ
:
6481 case KVM_HC_KICK_CPU
:
6482 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6485 #ifdef CONFIG_X86_64
6486 case KVM_HC_CLOCK_PAIRING
:
6487 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6497 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6500 ++vcpu
->stat
.hypercalls
;
6501 return kvm_skip_emulated_instruction(vcpu
);
6503 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6505 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6507 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6508 char instruction
[3];
6509 unsigned long rip
= kvm_rip_read(vcpu
);
6511 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6513 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6517 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6519 return vcpu
->run
->request_interrupt_window
&&
6520 likely(!pic_in_kernel(vcpu
->kvm
));
6523 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6525 struct kvm_run
*kvm_run
= vcpu
->run
;
6527 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6528 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6529 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6530 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6531 kvm_run
->ready_for_interrupt_injection
=
6532 pic_in_kernel(vcpu
->kvm
) ||
6533 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6536 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6540 if (!kvm_x86_ops
->update_cr8_intercept
)
6543 if (!lapic_in_kernel(vcpu
))
6546 if (vcpu
->arch
.apicv_active
)
6549 if (!vcpu
->arch
.apic
->vapic_addr
)
6550 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6557 tpr
= kvm_lapic_get_cr8(vcpu
);
6559 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6562 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6566 /* try to reinject previous events if any */
6567 if (vcpu
->arch
.exception
.injected
) {
6568 kvm_x86_ops
->queue_exception(vcpu
);
6573 * Exceptions must be injected immediately, or the exception
6574 * frame will have the address of the NMI or interrupt handler.
6576 if (!vcpu
->arch
.exception
.pending
) {
6577 if (vcpu
->arch
.nmi_injected
) {
6578 kvm_x86_ops
->set_nmi(vcpu
);
6582 if (vcpu
->arch
.interrupt
.pending
) {
6583 kvm_x86_ops
->set_irq(vcpu
);
6588 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6589 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6594 /* try to inject new event if pending */
6595 if (vcpu
->arch
.exception
.pending
) {
6596 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6597 vcpu
->arch
.exception
.has_error_code
,
6598 vcpu
->arch
.exception
.error_code
);
6600 vcpu
->arch
.exception
.pending
= false;
6601 vcpu
->arch
.exception
.injected
= true;
6603 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6604 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6607 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6608 (vcpu
->arch
.dr7
& DR7_GD
)) {
6609 vcpu
->arch
.dr7
&= ~DR7_GD
;
6610 kvm_update_dr7(vcpu
);
6613 kvm_x86_ops
->queue_exception(vcpu
);
6614 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) && kvm_x86_ops
->smi_allowed(vcpu
)) {
6615 vcpu
->arch
.smi_pending
= false;
6617 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6618 --vcpu
->arch
.nmi_pending
;
6619 vcpu
->arch
.nmi_injected
= true;
6620 kvm_x86_ops
->set_nmi(vcpu
);
6621 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6623 * Because interrupts can be injected asynchronously, we are
6624 * calling check_nested_events again here to avoid a race condition.
6625 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6626 * proposal and current concerns. Perhaps we should be setting
6627 * KVM_REQ_EVENT only on certain events and not unconditionally?
6629 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6630 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6634 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6635 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6637 kvm_x86_ops
->set_irq(vcpu
);
6644 static void process_nmi(struct kvm_vcpu
*vcpu
)
6649 * x86 is limited to one NMI running, and one NMI pending after it.
6650 * If an NMI is already in progress, limit further NMIs to just one.
6651 * Otherwise, allow two (and we'll inject the first one immediately).
6653 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6656 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6657 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6658 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6661 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6664 flags
|= seg
->g
<< 23;
6665 flags
|= seg
->db
<< 22;
6666 flags
|= seg
->l
<< 21;
6667 flags
|= seg
->avl
<< 20;
6668 flags
|= seg
->present
<< 15;
6669 flags
|= seg
->dpl
<< 13;
6670 flags
|= seg
->s
<< 12;
6671 flags
|= seg
->type
<< 8;
6675 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6677 struct kvm_segment seg
;
6680 kvm_get_segment(vcpu
, &seg
, n
);
6681 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6684 offset
= 0x7f84 + n
* 12;
6686 offset
= 0x7f2c + (n
- 3) * 12;
6688 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6689 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6690 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6693 #ifdef CONFIG_X86_64
6694 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6696 struct kvm_segment seg
;
6700 kvm_get_segment(vcpu
, &seg
, n
);
6701 offset
= 0x7e00 + n
* 16;
6703 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6704 put_smstate(u16
, buf
, offset
, seg
.selector
);
6705 put_smstate(u16
, buf
, offset
+ 2, flags
);
6706 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6707 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6711 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6714 struct kvm_segment seg
;
6718 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6719 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6720 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6721 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6723 for (i
= 0; i
< 8; i
++)
6724 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6726 kvm_get_dr(vcpu
, 6, &val
);
6727 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6728 kvm_get_dr(vcpu
, 7, &val
);
6729 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6731 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6732 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6733 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6734 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6735 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6737 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6738 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6739 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6740 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6741 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6743 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6744 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6745 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6747 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6748 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6749 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6751 for (i
= 0; i
< 6; i
++)
6752 enter_smm_save_seg_32(vcpu
, buf
, i
);
6754 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6757 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6758 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6761 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6763 #ifdef CONFIG_X86_64
6765 struct kvm_segment seg
;
6769 for (i
= 0; i
< 16; i
++)
6770 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6772 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6773 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6775 kvm_get_dr(vcpu
, 6, &val
);
6776 put_smstate(u64
, buf
, 0x7f68, val
);
6777 kvm_get_dr(vcpu
, 7, &val
);
6778 put_smstate(u64
, buf
, 0x7f60, val
);
6780 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6781 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6782 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6784 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6787 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6789 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6791 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6792 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6793 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6794 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6795 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6797 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6798 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6799 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6801 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6802 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6803 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6804 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6805 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6807 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6808 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6809 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6811 for (i
= 0; i
< 6; i
++)
6812 enter_smm_save_seg_64(vcpu
, buf
, i
);
6818 static void enter_smm(struct kvm_vcpu
*vcpu
)
6820 struct kvm_segment cs
, ds
;
6825 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6826 memset(buf
, 0, 512);
6827 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6828 enter_smm_save_state_64(vcpu
, buf
);
6830 enter_smm_save_state_32(vcpu
, buf
);
6833 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6834 * vCPU state (e.g. leave guest mode) after we've saved the state into
6835 * the SMM state-save area.
6837 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
6839 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6840 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6842 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6843 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6845 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6847 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6848 kvm_rip_write(vcpu
, 0x8000);
6850 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6851 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6852 vcpu
->arch
.cr0
= cr0
;
6854 kvm_x86_ops
->set_cr4(vcpu
, 0);
6856 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6857 dt
.address
= dt
.size
= 0;
6858 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6860 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6862 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6863 cs
.base
= vcpu
->arch
.smbase
;
6868 cs
.limit
= ds
.limit
= 0xffffffff;
6869 cs
.type
= ds
.type
= 0x3;
6870 cs
.dpl
= ds
.dpl
= 0;
6875 cs
.avl
= ds
.avl
= 0;
6876 cs
.present
= ds
.present
= 1;
6877 cs
.unusable
= ds
.unusable
= 0;
6878 cs
.padding
= ds
.padding
= 0;
6880 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6881 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6882 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6883 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6884 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6885 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6887 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6888 kvm_x86_ops
->set_efer(vcpu
, 0);
6890 kvm_update_cpuid(vcpu
);
6891 kvm_mmu_reset_context(vcpu
);
6894 static void process_smi(struct kvm_vcpu
*vcpu
)
6896 vcpu
->arch
.smi_pending
= true;
6897 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6900 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6902 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6905 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6907 u64 eoi_exit_bitmap
[4];
6909 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6912 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6914 if (irqchip_split(vcpu
->kvm
))
6915 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6917 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6918 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6919 if (ioapic_in_kernel(vcpu
->kvm
))
6920 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6922 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6923 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6924 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6927 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6929 ++vcpu
->stat
.tlb_flush
;
6930 kvm_x86_ops
->tlb_flush(vcpu
);
6933 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
6934 unsigned long start
, unsigned long end
)
6936 unsigned long apic_address
;
6939 * The physical address of apic access page is stored in the VMCS.
6940 * Update it when it becomes invalid.
6942 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6943 if (start
<= apic_address
&& apic_address
< end
)
6944 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6947 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6949 struct page
*page
= NULL
;
6951 if (!lapic_in_kernel(vcpu
))
6954 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6957 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6958 if (is_error_page(page
))
6960 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6963 * Do not pin apic access page in memory, the MMU notifier
6964 * will call us again if it is migrated or swapped out.
6968 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6971 * Returns 1 to let vcpu_run() continue the guest execution loop without
6972 * exiting to the userspace. Otherwise, the value will be returned to the
6975 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6979 dm_request_for_irq_injection(vcpu
) &&
6980 kvm_cpu_accept_dm_intr(vcpu
);
6982 bool req_immediate_exit
= false;
6984 if (kvm_request_pending(vcpu
)) {
6985 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6986 kvm_mmu_unload(vcpu
);
6987 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6988 __kvm_migrate_timers(vcpu
);
6989 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6990 kvm_gen_update_masterclock(vcpu
->kvm
);
6991 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6992 kvm_gen_kvmclock_update(vcpu
);
6993 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6994 r
= kvm_guest_time_update(vcpu
);
6998 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6999 kvm_mmu_sync_roots(vcpu
);
7000 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
7001 kvm_vcpu_flush_tlb(vcpu
);
7002 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
7003 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
7007 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
7008 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
7009 vcpu
->mmio_needed
= 0;
7013 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
7014 /* Page is swapped out. Do synthetic halt */
7015 vcpu
->arch
.apf
.halted
= true;
7019 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
7020 record_steal_time(vcpu
);
7021 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
7023 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
7025 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
7026 kvm_pmu_handle_event(vcpu
);
7027 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
7028 kvm_pmu_deliver_pmi(vcpu
);
7029 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
7030 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
7031 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
7032 vcpu
->arch
.ioapic_handled_vectors
)) {
7033 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
7034 vcpu
->run
->eoi
.vector
=
7035 vcpu
->arch
.pending_ioapic_eoi
;
7040 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
7041 vcpu_scan_ioapic(vcpu
);
7042 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
7043 kvm_vcpu_reload_apic_access_page(vcpu
);
7044 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
7045 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7046 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
7050 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
7051 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7052 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
7056 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
7057 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
7058 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
7064 * KVM_REQ_HV_STIMER has to be processed after
7065 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7066 * depend on the guest clock being up-to-date
7068 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
7069 kvm_hv_process_stimers(vcpu
);
7072 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
7073 ++vcpu
->stat
.req_event
;
7074 kvm_apic_accept_events(vcpu
);
7075 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
7080 if (inject_pending_event(vcpu
, req_int_win
) != 0)
7081 req_immediate_exit
= true;
7083 /* Enable SMI/NMI/IRQ window open exits if needed.
7085 * SMIs have three cases:
7086 * 1) They can be nested, and then there is nothing to
7087 * do here because RSM will cause a vmexit anyway.
7088 * 2) There is an ISA-specific reason why SMI cannot be
7089 * injected, and the moment when this changes can be
7091 * 3) Or the SMI can be pending because
7092 * inject_pending_event has completed the injection
7093 * of an IRQ or NMI from the previous vmexit, and
7094 * then we request an immediate exit to inject the
7097 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
7098 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
7099 req_immediate_exit
= true;
7100 if (vcpu
->arch
.nmi_pending
)
7101 kvm_x86_ops
->enable_nmi_window(vcpu
);
7102 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
7103 kvm_x86_ops
->enable_irq_window(vcpu
);
7104 WARN_ON(vcpu
->arch
.exception
.pending
);
7107 if (kvm_lapic_enabled(vcpu
)) {
7108 update_cr8_intercept(vcpu
);
7109 kvm_lapic_sync_to_vapic(vcpu
);
7113 r
= kvm_mmu_reload(vcpu
);
7115 goto cancel_injection
;
7120 kvm_x86_ops
->prepare_guest_switch(vcpu
);
7123 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7124 * IPI are then delayed after guest entry, which ensures that they
7125 * result in virtual interrupt delivery.
7127 local_irq_disable();
7128 vcpu
->mode
= IN_GUEST_MODE
;
7130 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7133 * 1) We should set ->mode before checking ->requests. Please see
7134 * the comment in kvm_vcpu_exiting_guest_mode().
7136 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7137 * pairs with the memory barrier implicit in pi_test_and_set_on
7138 * (see vmx_deliver_posted_interrupt).
7140 * 3) This also orders the write to mode from any reads to the page
7141 * tables done while the VCPU is running. Please see the comment
7142 * in kvm_flush_remote_tlbs.
7144 smp_mb__after_srcu_read_unlock();
7147 * This handles the case where a posted interrupt was
7148 * notified with kvm_vcpu_kick.
7150 if (kvm_lapic_enabled(vcpu
)) {
7151 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
7152 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7155 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7156 || need_resched() || signal_pending(current
)) {
7157 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7161 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7163 goto cancel_injection
;
7166 kvm_load_guest_xcr0(vcpu
);
7168 if (req_immediate_exit
) {
7169 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7170 smp_send_reschedule(vcpu
->cpu
);
7173 trace_kvm_entry(vcpu
->vcpu_id
);
7174 wait_lapic_expire(vcpu
);
7175 guest_enter_irqoff();
7177 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7179 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7180 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7181 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7182 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7183 set_debugreg(vcpu
->arch
.dr6
, 6);
7184 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7187 kvm_x86_ops
->run(vcpu
);
7190 * Do this here before restoring debug registers on the host. And
7191 * since we do this before handling the vmexit, a DR access vmexit
7192 * can (a) read the correct value of the debug registers, (b) set
7193 * KVM_DEBUGREG_WONT_EXIT again.
7195 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7196 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7197 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7198 kvm_update_dr0123(vcpu
);
7199 kvm_update_dr6(vcpu
);
7200 kvm_update_dr7(vcpu
);
7201 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7205 * If the guest has used debug registers, at least dr7
7206 * will be disabled while returning to the host.
7207 * If we don't have active breakpoints in the host, we don't
7208 * care about the messed up debug address registers. But if
7209 * we have some of them active, restore the old state.
7211 if (hw_breakpoint_active())
7212 hw_breakpoint_restore();
7214 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7216 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7219 kvm_put_guest_xcr0(vcpu
);
7221 kvm_x86_ops
->handle_external_intr(vcpu
);
7225 guest_exit_irqoff();
7230 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7233 * Profile KVM exit RIPs:
7235 if (unlikely(prof_on
== KVM_PROFILING
)) {
7236 unsigned long rip
= kvm_rip_read(vcpu
);
7237 profile_hit(KVM_PROFILING
, (void *)rip
);
7240 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7241 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7243 if (vcpu
->arch
.apic_attention
)
7244 kvm_lapic_sync_from_vapic(vcpu
);
7246 vcpu
->arch
.gpa_available
= false;
7247 r
= kvm_x86_ops
->handle_exit(vcpu
);
7251 kvm_x86_ops
->cancel_injection(vcpu
);
7252 if (unlikely(vcpu
->arch
.apic_attention
))
7253 kvm_lapic_sync_from_vapic(vcpu
);
7258 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7260 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7261 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7262 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7263 kvm_vcpu_block(vcpu
);
7264 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7266 if (kvm_x86_ops
->post_block
)
7267 kvm_x86_ops
->post_block(vcpu
);
7269 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7273 kvm_apic_accept_events(vcpu
);
7274 switch(vcpu
->arch
.mp_state
) {
7275 case KVM_MP_STATE_HALTED
:
7276 vcpu
->arch
.pv
.pv_unhalted
= false;
7277 vcpu
->arch
.mp_state
=
7278 KVM_MP_STATE_RUNNABLE
;
7279 case KVM_MP_STATE_RUNNABLE
:
7280 vcpu
->arch
.apf
.halted
= false;
7282 case KVM_MP_STATE_INIT_RECEIVED
:
7291 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7293 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7294 kvm_x86_ops
->check_nested_events(vcpu
, false);
7296 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7297 !vcpu
->arch
.apf
.halted
);
7300 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7303 struct kvm
*kvm
= vcpu
->kvm
;
7305 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7306 vcpu
->arch
.l1tf_flush_l1d
= true;
7309 if (kvm_vcpu_running(vcpu
)) {
7310 r
= vcpu_enter_guest(vcpu
);
7312 r
= vcpu_block(kvm
, vcpu
);
7318 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7319 if (kvm_cpu_has_pending_timer(vcpu
))
7320 kvm_inject_pending_timer_irqs(vcpu
);
7322 if (dm_request_for_irq_injection(vcpu
) &&
7323 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7325 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7326 ++vcpu
->stat
.request_irq_exits
;
7330 kvm_check_async_pf_completion(vcpu
);
7332 if (signal_pending(current
)) {
7334 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7335 ++vcpu
->stat
.signal_exits
;
7338 if (need_resched()) {
7339 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7341 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7345 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7350 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7353 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7354 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7355 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7356 if (r
!= EMULATE_DONE
)
7361 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7363 BUG_ON(!vcpu
->arch
.pio
.count
);
7365 return complete_emulated_io(vcpu
);
7369 * Implements the following, as a state machine:
7373 * for each mmio piece in the fragment
7381 * for each mmio piece in the fragment
7386 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7388 struct kvm_run
*run
= vcpu
->run
;
7389 struct kvm_mmio_fragment
*frag
;
7392 BUG_ON(!vcpu
->mmio_needed
);
7394 /* Complete previous fragment */
7395 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7396 len
= min(8u, frag
->len
);
7397 if (!vcpu
->mmio_is_write
)
7398 memcpy(frag
->data
, run
->mmio
.data
, len
);
7400 if (frag
->len
<= 8) {
7401 /* Switch to the next fragment. */
7403 vcpu
->mmio_cur_fragment
++;
7405 /* Go forward to the next mmio piece. */
7411 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7412 vcpu
->mmio_needed
= 0;
7414 /* FIXME: return into emulator if single-stepping. */
7415 if (vcpu
->mmio_is_write
)
7417 vcpu
->mmio_read_completed
= 1;
7418 return complete_emulated_io(vcpu
);
7421 run
->exit_reason
= KVM_EXIT_MMIO
;
7422 run
->mmio
.phys_addr
= frag
->gpa
;
7423 if (vcpu
->mmio_is_write
)
7424 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7425 run
->mmio
.len
= min(8u, frag
->len
);
7426 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7427 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7432 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7436 kvm_sigset_activate(vcpu
);
7438 kvm_load_guest_fpu(vcpu
);
7440 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7441 if (kvm_run
->immediate_exit
) {
7445 kvm_vcpu_block(vcpu
);
7446 kvm_apic_accept_events(vcpu
);
7447 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7449 if (signal_pending(current
)) {
7451 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7452 ++vcpu
->stat
.signal_exits
;
7457 /* re-sync apic's tpr */
7458 if (!lapic_in_kernel(vcpu
)) {
7459 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7465 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7466 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7467 vcpu
->arch
.complete_userspace_io
= NULL
;
7472 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7474 if (kvm_run
->immediate_exit
)
7480 kvm_put_guest_fpu(vcpu
);
7481 post_kvm_run_save(vcpu
);
7482 kvm_sigset_deactivate(vcpu
);
7487 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7489 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7491 * We are here if userspace calls get_regs() in the middle of
7492 * instruction emulation. Registers state needs to be copied
7493 * back from emulation context to vcpu. Userspace shouldn't do
7494 * that usually, but some bad designed PV devices (vmware
7495 * backdoor interface) need this to work
7497 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7498 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7500 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7501 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7502 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7503 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7504 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7505 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7506 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7507 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7508 #ifdef CONFIG_X86_64
7509 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7510 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7511 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7512 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7513 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7514 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7515 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7516 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7519 regs
->rip
= kvm_rip_read(vcpu
);
7520 regs
->rflags
= kvm_get_rflags(vcpu
);
7525 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7527 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7528 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7530 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7531 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7532 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7533 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7534 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7535 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7536 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7537 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7538 #ifdef CONFIG_X86_64
7539 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7540 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7541 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7542 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7543 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7544 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7545 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7546 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7549 kvm_rip_write(vcpu
, regs
->rip
);
7550 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7552 vcpu
->arch
.exception
.pending
= false;
7554 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7559 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7561 struct kvm_segment cs
;
7563 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7567 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7569 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7570 struct kvm_sregs
*sregs
)
7574 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7575 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7576 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7577 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7578 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7579 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7581 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7582 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7584 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7585 sregs
->idt
.limit
= dt
.size
;
7586 sregs
->idt
.base
= dt
.address
;
7587 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7588 sregs
->gdt
.limit
= dt
.size
;
7589 sregs
->gdt
.base
= dt
.address
;
7591 sregs
->cr0
= kvm_read_cr0(vcpu
);
7592 sregs
->cr2
= vcpu
->arch
.cr2
;
7593 sregs
->cr3
= kvm_read_cr3(vcpu
);
7594 sregs
->cr4
= kvm_read_cr4(vcpu
);
7595 sregs
->cr8
= kvm_get_cr8(vcpu
);
7596 sregs
->efer
= vcpu
->arch
.efer
;
7597 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7599 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7601 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7602 set_bit(vcpu
->arch
.interrupt
.nr
,
7603 (unsigned long *)sregs
->interrupt_bitmap
);
7608 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7609 struct kvm_mp_state
*mp_state
)
7611 kvm_apic_accept_events(vcpu
);
7612 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7613 vcpu
->arch
.pv
.pv_unhalted
)
7614 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7616 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7621 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7622 struct kvm_mp_state
*mp_state
)
7624 if (!lapic_in_kernel(vcpu
) &&
7625 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7628 /* INITs are latched while in SMM */
7629 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7630 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7631 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7634 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7635 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7636 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7638 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7639 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7643 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7644 int reason
, bool has_error_code
, u32 error_code
)
7646 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7649 init_emulate_ctxt(vcpu
);
7651 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7652 has_error_code
, error_code
);
7655 return EMULATE_FAIL
;
7657 kvm_rip_write(vcpu
, ctxt
->eip
);
7658 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7659 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7660 return EMULATE_DONE
;
7662 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7664 int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7666 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7668 * When EFER.LME and CR0.PG are set, the processor is in
7669 * 64-bit mode (though maybe in a 32-bit code segment).
7670 * CR4.PAE and EFER.LMA must be set.
7672 if (!(sregs
->cr4
& X86_CR4_PAE
)
7673 || !(sregs
->efer
& EFER_LMA
))
7677 * Not in 64-bit mode: EFER.LMA is clear and the code
7678 * segment cannot be 64-bit.
7680 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7687 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7688 struct kvm_sregs
*sregs
)
7690 struct msr_data apic_base_msr
;
7691 int mmu_reset_needed
= 0;
7692 int cpuid_update_needed
= 0;
7693 int pending_vec
, max_bits
, idx
;
7696 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7697 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7700 if (kvm_valid_sregs(vcpu
, sregs
))
7703 apic_base_msr
.data
= sregs
->apic_base
;
7704 apic_base_msr
.host_initiated
= true;
7705 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7708 dt
.size
= sregs
->idt
.limit
;
7709 dt
.address
= sregs
->idt
.base
;
7710 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7711 dt
.size
= sregs
->gdt
.limit
;
7712 dt
.address
= sregs
->gdt
.base
;
7713 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7715 vcpu
->arch
.cr2
= sregs
->cr2
;
7716 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7717 vcpu
->arch
.cr3
= sregs
->cr3
;
7718 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7720 kvm_set_cr8(vcpu
, sregs
->cr8
);
7722 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7723 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7725 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7726 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7727 vcpu
->arch
.cr0
= sregs
->cr0
;
7729 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7730 cpuid_update_needed
|= ((kvm_read_cr4(vcpu
) ^ sregs
->cr4
) &
7731 (X86_CR4_OSXSAVE
| X86_CR4_PKE
));
7732 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7733 if (cpuid_update_needed
)
7734 kvm_update_cpuid(vcpu
);
7736 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7737 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7738 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7739 mmu_reset_needed
= 1;
7741 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7743 if (mmu_reset_needed
)
7744 kvm_mmu_reset_context(vcpu
);
7746 max_bits
= KVM_NR_INTERRUPTS
;
7747 pending_vec
= find_first_bit(
7748 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7749 if (pending_vec
< max_bits
) {
7750 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7751 pr_debug("Set back pending irq %d\n", pending_vec
);
7754 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7755 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7756 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7757 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7758 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7759 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7761 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7762 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7764 update_cr8_intercept(vcpu
);
7766 /* Older userspace won't unhalt the vcpu on reset. */
7767 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7768 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7770 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7772 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7777 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7778 struct kvm_guest_debug
*dbg
)
7780 unsigned long rflags
;
7783 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7785 if (vcpu
->arch
.exception
.pending
)
7787 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7788 kvm_queue_exception(vcpu
, DB_VECTOR
);
7790 kvm_queue_exception(vcpu
, BP_VECTOR
);
7794 * Read rflags as long as potentially injected trace flags are still
7797 rflags
= kvm_get_rflags(vcpu
);
7799 vcpu
->guest_debug
= dbg
->control
;
7800 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7801 vcpu
->guest_debug
= 0;
7803 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7804 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7805 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7806 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7808 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7809 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7811 kvm_update_dr7(vcpu
);
7813 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7814 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7815 get_segment_base(vcpu
, VCPU_SREG_CS
);
7818 * Trigger an rflags update that will inject or remove the trace
7821 kvm_set_rflags(vcpu
, rflags
);
7823 kvm_x86_ops
->update_bp_intercept(vcpu
);
7833 * Translate a guest virtual address to a guest physical address.
7835 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7836 struct kvm_translation
*tr
)
7838 unsigned long vaddr
= tr
->linear_address
;
7842 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7843 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7844 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7845 tr
->physical_address
= gpa
;
7846 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7853 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7855 struct fxregs_state
*fxsave
=
7856 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7858 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7859 fpu
->fcw
= fxsave
->cwd
;
7860 fpu
->fsw
= fxsave
->swd
;
7861 fpu
->ftwx
= fxsave
->twd
;
7862 fpu
->last_opcode
= fxsave
->fop
;
7863 fpu
->last_ip
= fxsave
->rip
;
7864 fpu
->last_dp
= fxsave
->rdp
;
7865 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7870 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7872 struct fxregs_state
*fxsave
=
7873 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7875 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7876 fxsave
->cwd
= fpu
->fcw
;
7877 fxsave
->swd
= fpu
->fsw
;
7878 fxsave
->twd
= fpu
->ftwx
;
7879 fxsave
->fop
= fpu
->last_opcode
;
7880 fxsave
->rip
= fpu
->last_ip
;
7881 fxsave
->rdp
= fpu
->last_dp
;
7882 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7887 static void fx_init(struct kvm_vcpu
*vcpu
)
7889 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7890 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7891 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7892 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7895 * Ensure guest xcr0 is valid for loading
7897 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7899 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7902 /* Swap (qemu) user FPU context for the guest FPU context. */
7903 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7906 copy_fpregs_to_fpstate(&vcpu
->arch
.user_fpu
);
7907 /* PKRU is separately restored in kvm_x86_ops->run. */
7908 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7909 ~XFEATURE_MASK_PKRU
);
7914 /* When vcpu_run ends, restore user space FPU context. */
7915 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7918 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7919 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
.state
);
7921 ++vcpu
->stat
.fpu_reload
;
7925 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7927 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7929 kvmclock_reset(vcpu
);
7931 kvm_x86_ops
->vcpu_free(vcpu
);
7932 free_cpumask_var(wbinvd_dirty_mask
);
7935 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7938 struct kvm_vcpu
*vcpu
;
7940 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7941 printk_once(KERN_WARNING
7942 "kvm: SMP vm created on host with unstable TSC; "
7943 "guest TSC will not be reliable\n");
7945 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7950 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7954 kvm_vcpu_mtrr_init(vcpu
);
7955 r
= vcpu_load(vcpu
);
7958 kvm_vcpu_reset(vcpu
, false);
7959 kvm_mmu_setup(vcpu
);
7964 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7966 struct msr_data msr
;
7967 struct kvm
*kvm
= vcpu
->kvm
;
7969 kvm_hv_vcpu_postcreate(vcpu
);
7971 if (vcpu_load(vcpu
))
7974 msr
.index
= MSR_IA32_TSC
;
7975 msr
.host_initiated
= true;
7976 kvm_write_tsc(vcpu
, &msr
);
7979 if (!kvmclock_periodic_sync
)
7982 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7983 KVMCLOCK_SYNC_PERIOD
);
7986 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7989 vcpu
->arch
.apf
.msr_val
= 0;
7991 r
= vcpu_load(vcpu
);
7993 kvm_mmu_unload(vcpu
);
7996 kvm_x86_ops
->vcpu_free(vcpu
);
7999 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
8001 kvm_lapic_reset(vcpu
, init_event
);
8003 vcpu
->arch
.hflags
= 0;
8005 vcpu
->arch
.smi_pending
= 0;
8006 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
8007 vcpu
->arch
.nmi_pending
= 0;
8008 vcpu
->arch
.nmi_injected
= false;
8009 kvm_clear_interrupt_queue(vcpu
);
8010 kvm_clear_exception_queue(vcpu
);
8011 vcpu
->arch
.exception
.pending
= false;
8013 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
8014 kvm_update_dr0123(vcpu
);
8015 vcpu
->arch
.dr6
= DR6_INIT
;
8016 kvm_update_dr6(vcpu
);
8017 vcpu
->arch
.dr7
= DR7_FIXED_1
;
8018 kvm_update_dr7(vcpu
);
8022 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8023 vcpu
->arch
.apf
.msr_val
= 0;
8024 vcpu
->arch
.st
.msr_val
= 0;
8026 kvmclock_reset(vcpu
);
8028 kvm_clear_async_pf_completion_queue(vcpu
);
8029 kvm_async_pf_hash_reset(vcpu
);
8030 vcpu
->arch
.apf
.halted
= false;
8032 if (kvm_mpx_supported()) {
8033 void *mpx_state_buffer
;
8036 * To avoid have the INIT path from kvm_apic_has_events() that be
8037 * called with loaded FPU and does not let userspace fix the state.
8040 kvm_put_guest_fpu(vcpu
);
8041 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8042 XFEATURE_MASK_BNDREGS
);
8043 if (mpx_state_buffer
)
8044 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
8045 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8046 XFEATURE_MASK_BNDCSR
);
8047 if (mpx_state_buffer
)
8048 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
8050 kvm_load_guest_fpu(vcpu
);
8054 kvm_pmu_reset(vcpu
);
8055 vcpu
->arch
.smbase
= 0x30000;
8057 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
8058 vcpu
->arch
.msr_misc_features_enables
= 0;
8060 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8063 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
8064 vcpu
->arch
.regs_avail
= ~0;
8065 vcpu
->arch
.regs_dirty
= ~0;
8067 vcpu
->arch
.ia32_xss
= 0;
8069 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
8072 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
8074 struct kvm_segment cs
;
8076 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8077 cs
.selector
= vector
<< 8;
8078 cs
.base
= vector
<< 12;
8079 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8080 kvm_rip_write(vcpu
, 0);
8083 int kvm_arch_hardware_enable(void)
8086 struct kvm_vcpu
*vcpu
;
8091 bool stable
, backwards_tsc
= false;
8093 kvm_shared_msr_cpu_online();
8094 ret
= kvm_x86_ops
->hardware_enable();
8098 local_tsc
= rdtsc();
8099 stable
= !check_tsc_unstable();
8100 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8101 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8102 if (!stable
&& vcpu
->cpu
== smp_processor_id())
8103 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8104 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
8105 backwards_tsc
= true;
8106 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
8107 max_tsc
= vcpu
->arch
.last_host_tsc
;
8113 * Sometimes, even reliable TSCs go backwards. This happens on
8114 * platforms that reset TSC during suspend or hibernate actions, but
8115 * maintain synchronization. We must compensate. Fortunately, we can
8116 * detect that condition here, which happens early in CPU bringup,
8117 * before any KVM threads can be running. Unfortunately, we can't
8118 * bring the TSCs fully up to date with real time, as we aren't yet far
8119 * enough into CPU bringup that we know how much real time has actually
8120 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8121 * variables that haven't been updated yet.
8123 * So we simply find the maximum observed TSC above, then record the
8124 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8125 * the adjustment will be applied. Note that we accumulate
8126 * adjustments, in case multiple suspend cycles happen before some VCPU
8127 * gets a chance to run again. In the event that no KVM threads get a
8128 * chance to run, we will miss the entire elapsed period, as we'll have
8129 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8130 * loose cycle time. This isn't too big a deal, since the loss will be
8131 * uniform across all VCPUs (not to mention the scenario is extremely
8132 * unlikely). It is possible that a second hibernate recovery happens
8133 * much faster than a first, causing the observed TSC here to be
8134 * smaller; this would require additional padding adjustment, which is
8135 * why we set last_host_tsc to the local tsc observed here.
8137 * N.B. - this code below runs only on platforms with reliable TSC,
8138 * as that is the only way backwards_tsc is set above. Also note
8139 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8140 * have the same delta_cyc adjustment applied if backwards_tsc
8141 * is detected. Note further, this adjustment is only done once,
8142 * as we reset last_host_tsc on all VCPUs to stop this from being
8143 * called multiple times (one for each physical CPU bringup).
8145 * Platforms with unreliable TSCs don't have to deal with this, they
8146 * will be compensated by the logic in vcpu_load, which sets the TSC to
8147 * catchup mode. This will catchup all VCPUs to real time, but cannot
8148 * guarantee that they stay in perfect synchronization.
8150 if (backwards_tsc
) {
8151 u64 delta_cyc
= max_tsc
- local_tsc
;
8152 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8153 kvm
->arch
.backwards_tsc_observed
= true;
8154 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8155 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
8156 vcpu
->arch
.last_host_tsc
= local_tsc
;
8157 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8161 * We have to disable TSC offset matching.. if you were
8162 * booting a VM while issuing an S4 host suspend....
8163 * you may have some problem. Solving this issue is
8164 * left as an exercise to the reader.
8166 kvm
->arch
.last_tsc_nsec
= 0;
8167 kvm
->arch
.last_tsc_write
= 0;
8174 void kvm_arch_hardware_disable(void)
8176 kvm_x86_ops
->hardware_disable();
8177 drop_user_return_notifiers();
8180 int kvm_arch_hardware_setup(void)
8184 r
= kvm_x86_ops
->hardware_setup();
8188 if (kvm_has_tsc_control
) {
8190 * Make sure the user can only configure tsc_khz values that
8191 * fit into a signed integer.
8192 * A min value is not calculated needed because it will always
8193 * be 1 on all machines.
8195 u64 max
= min(0x7fffffffULL
,
8196 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8197 kvm_max_guest_tsc_khz
= max
;
8199 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8202 kvm_init_msr_list();
8206 void kvm_arch_hardware_unsetup(void)
8208 kvm_x86_ops
->hardware_unsetup();
8211 void kvm_arch_check_processor_compat(void *rtn
)
8213 kvm_x86_ops
->check_processor_compatibility(rtn
);
8216 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8218 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8220 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8222 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8224 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8227 struct static_key kvm_no_apic_vcpu __read_mostly
;
8228 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8230 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8235 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8236 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8237 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8238 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8240 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8242 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8247 vcpu
->arch
.pio_data
= page_address(page
);
8249 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8251 r
= kvm_mmu_create(vcpu
);
8253 goto fail_free_pio_data
;
8255 if (irqchip_in_kernel(vcpu
->kvm
)) {
8256 r
= kvm_create_lapic(vcpu
);
8258 goto fail_mmu_destroy
;
8260 static_key_slow_inc(&kvm_no_apic_vcpu
);
8262 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8264 if (!vcpu
->arch
.mce_banks
) {
8266 goto fail_free_lapic
;
8268 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8270 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8272 goto fail_free_mce_banks
;
8277 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8279 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8281 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8283 kvm_async_pf_hash_reset(vcpu
);
8286 vcpu
->arch
.pending_external_vector
= -1;
8287 vcpu
->arch
.preempted_in_kernel
= false;
8289 kvm_hv_vcpu_init(vcpu
);
8293 fail_free_mce_banks
:
8294 kfree(vcpu
->arch
.mce_banks
);
8296 kvm_free_lapic(vcpu
);
8298 kvm_mmu_destroy(vcpu
);
8300 free_page((unsigned long)vcpu
->arch
.pio_data
);
8305 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8309 kvm_hv_vcpu_uninit(vcpu
);
8310 kvm_pmu_destroy(vcpu
);
8311 kfree(vcpu
->arch
.mce_banks
);
8312 kvm_free_lapic(vcpu
);
8313 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8314 kvm_mmu_destroy(vcpu
);
8315 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8316 free_page((unsigned long)vcpu
->arch
.pio_data
);
8317 if (!lapic_in_kernel(vcpu
))
8318 static_key_slow_dec(&kvm_no_apic_vcpu
);
8321 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8323 vcpu
->arch
.l1tf_flush_l1d
= true;
8324 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8327 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8332 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8333 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8334 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8335 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8336 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8338 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8339 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8340 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8341 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8342 &kvm
->arch
.irq_sources_bitmap
);
8344 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8345 mutex_init(&kvm
->arch
.apic_map_lock
);
8346 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8347 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8349 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8350 pvclock_update_vm_gtod_copy(kvm
);
8352 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8353 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8355 kvm_page_track_init(kvm
);
8356 kvm_mmu_init_vm(kvm
);
8358 if (kvm_x86_ops
->vm_init
)
8359 return kvm_x86_ops
->vm_init(kvm
);
8364 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8367 r
= vcpu_load(vcpu
);
8369 kvm_mmu_unload(vcpu
);
8373 static void kvm_free_vcpus(struct kvm
*kvm
)
8376 struct kvm_vcpu
*vcpu
;
8379 * Unpin any mmu pages first.
8381 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8382 kvm_clear_async_pf_completion_queue(vcpu
);
8383 kvm_unload_vcpu_mmu(vcpu
);
8385 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8386 kvm_arch_vcpu_free(vcpu
);
8388 mutex_lock(&kvm
->lock
);
8389 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8390 kvm
->vcpus
[i
] = NULL
;
8392 atomic_set(&kvm
->online_vcpus
, 0);
8393 mutex_unlock(&kvm
->lock
);
8396 void kvm_arch_sync_events(struct kvm
*kvm
)
8398 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8399 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8403 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8407 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8408 struct kvm_memory_slot
*slot
, old
;
8410 /* Called with kvm->slots_lock held. */
8411 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8414 slot
= id_to_memslot(slots
, id
);
8420 * MAP_SHARED to prevent internal slot pages from being moved
8423 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8424 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8425 if (IS_ERR((void *)hva
))
8426 return PTR_ERR((void *)hva
);
8435 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8436 struct kvm_userspace_memory_region m
;
8438 m
.slot
= id
| (i
<< 16);
8440 m
.guest_phys_addr
= gpa
;
8441 m
.userspace_addr
= hva
;
8442 m
.memory_size
= size
;
8443 r
= __kvm_set_memory_region(kvm
, &m
);
8449 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8453 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8455 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8459 mutex_lock(&kvm
->slots_lock
);
8460 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8461 mutex_unlock(&kvm
->slots_lock
);
8465 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8467 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8469 if (current
->mm
== kvm
->mm
) {
8471 * Free memory regions allocated on behalf of userspace,
8472 * unless the the memory map has changed due to process exit
8475 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8476 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8477 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8479 if (kvm_x86_ops
->vm_destroy
)
8480 kvm_x86_ops
->vm_destroy(kvm
);
8481 kvm_pic_destroy(kvm
);
8482 kvm_ioapic_destroy(kvm
);
8483 kvm_free_vcpus(kvm
);
8484 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8485 kvm_mmu_uninit_vm(kvm
);
8486 kvm_page_track_cleanup(kvm
);
8489 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8490 struct kvm_memory_slot
*dont
)
8494 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8495 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8496 kvfree(free
->arch
.rmap
[i
]);
8497 free
->arch
.rmap
[i
] = NULL
;
8502 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8503 dont
->arch
.lpage_info
[i
- 1]) {
8504 kvfree(free
->arch
.lpage_info
[i
- 1]);
8505 free
->arch
.lpage_info
[i
- 1] = NULL
;
8509 kvm_page_track_free_memslot(free
, dont
);
8512 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8513 unsigned long npages
)
8517 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8518 struct kvm_lpage_info
*linfo
;
8523 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8524 slot
->base_gfn
, level
) + 1;
8526 slot
->arch
.rmap
[i
] =
8527 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8528 if (!slot
->arch
.rmap
[i
])
8533 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8537 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8539 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8540 linfo
[0].disallow_lpage
= 1;
8541 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8542 linfo
[lpages
- 1].disallow_lpage
= 1;
8543 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8545 * If the gfn and userspace address are not aligned wrt each
8546 * other, or if explicitly asked to, disable large page
8547 * support for this slot
8549 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8550 !kvm_largepages_enabled()) {
8553 for (j
= 0; j
< lpages
; ++j
)
8554 linfo
[j
].disallow_lpage
= 1;
8558 if (kvm_page_track_create_memslot(slot
, npages
))
8564 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8565 kvfree(slot
->arch
.rmap
[i
]);
8566 slot
->arch
.rmap
[i
] = NULL
;
8570 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8571 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8576 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8579 * memslots->generation has been incremented.
8580 * mmio generation may have reached its maximum value.
8582 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8585 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8586 struct kvm_memory_slot
*memslot
,
8587 const struct kvm_userspace_memory_region
*mem
,
8588 enum kvm_mr_change change
)
8593 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8594 struct kvm_memory_slot
*new)
8596 /* Still write protect RO slot */
8597 if (new->flags
& KVM_MEM_READONLY
) {
8598 kvm_mmu_slot_remove_write_access(kvm
, new);
8603 * Call kvm_x86_ops dirty logging hooks when they are valid.
8605 * kvm_x86_ops->slot_disable_log_dirty is called when:
8607 * - KVM_MR_CREATE with dirty logging is disabled
8608 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8610 * The reason is, in case of PML, we need to set D-bit for any slots
8611 * with dirty logging disabled in order to eliminate unnecessary GPA
8612 * logging in PML buffer (and potential PML buffer full VMEXT). This
8613 * guarantees leaving PML enabled during guest's lifetime won't have
8614 * any additonal overhead from PML when guest is running with dirty
8615 * logging disabled for memory slots.
8617 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8618 * to dirty logging mode.
8620 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8622 * In case of write protect:
8624 * Write protect all pages for dirty logging.
8626 * All the sptes including the large sptes which point to this
8627 * slot are set to readonly. We can not create any new large
8628 * spte on this slot until the end of the logging.
8630 * See the comments in fast_page_fault().
8632 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8633 if (kvm_x86_ops
->slot_enable_log_dirty
)
8634 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8636 kvm_mmu_slot_remove_write_access(kvm
, new);
8638 if (kvm_x86_ops
->slot_disable_log_dirty
)
8639 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8643 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8644 const struct kvm_userspace_memory_region
*mem
,
8645 const struct kvm_memory_slot
*old
,
8646 const struct kvm_memory_slot
*new,
8647 enum kvm_mr_change change
)
8649 int nr_mmu_pages
= 0;
8651 if (!kvm
->arch
.n_requested_mmu_pages
)
8652 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8655 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8658 * Dirty logging tracks sptes in 4k granularity, meaning that large
8659 * sptes have to be split. If live migration is successful, the guest
8660 * in the source machine will be destroyed and large sptes will be
8661 * created in the destination. However, if the guest continues to run
8662 * in the source machine (for example if live migration fails), small
8663 * sptes will remain around and cause bad performance.
8665 * Scan sptes if dirty logging has been stopped, dropping those
8666 * which can be collapsed into a single large-page spte. Later
8667 * page faults will create the large-page sptes.
8669 if ((change
!= KVM_MR_DELETE
) &&
8670 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8671 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8672 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8675 * Set up write protection and/or dirty logging for the new slot.
8677 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8678 * been zapped so no dirty logging staff is needed for old slot. For
8679 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8680 * new and it's also covered when dealing with the new slot.
8682 * FIXME: const-ify all uses of struct kvm_memory_slot.
8684 if (change
!= KVM_MR_DELETE
)
8685 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8688 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8690 kvm_mmu_invalidate_zap_all_pages(kvm
);
8693 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8694 struct kvm_memory_slot
*slot
)
8696 kvm_page_track_flush_slot(kvm
, slot
);
8699 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8701 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8704 if (kvm_apic_has_events(vcpu
))
8707 if (vcpu
->arch
.pv
.pv_unhalted
)
8710 if (vcpu
->arch
.exception
.pending
)
8713 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8714 (vcpu
->arch
.nmi_pending
&&
8715 kvm_x86_ops
->nmi_allowed(vcpu
)))
8718 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8719 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8722 if (kvm_arch_interrupt_allowed(vcpu
) &&
8723 kvm_cpu_has_interrupt(vcpu
))
8726 if (kvm_hv_has_stimer_pending(vcpu
))
8732 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8734 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8737 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8739 return vcpu
->arch
.preempted_in_kernel
;
8742 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8744 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8747 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8749 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8752 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8754 if (is_64_bit_mode(vcpu
))
8755 return kvm_rip_read(vcpu
);
8756 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8757 kvm_rip_read(vcpu
));
8759 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8761 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8763 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8765 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8767 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8769 unsigned long rflags
;
8771 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8772 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8773 rflags
&= ~X86_EFLAGS_TF
;
8776 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8778 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8780 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8781 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8782 rflags
|= X86_EFLAGS_TF
;
8783 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8786 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8788 __kvm_set_rflags(vcpu
, rflags
);
8789 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8791 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8793 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8797 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8801 r
= kvm_mmu_reload(vcpu
);
8805 if (!vcpu
->arch
.mmu
.direct_map
&&
8806 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8809 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8812 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8814 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8817 static inline u32
kvm_async_pf_next_probe(u32 key
)
8819 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8822 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8824 u32 key
= kvm_async_pf_hash_fn(gfn
);
8826 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8827 key
= kvm_async_pf_next_probe(key
);
8829 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8832 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8835 u32 key
= kvm_async_pf_hash_fn(gfn
);
8837 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8838 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8839 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8840 key
= kvm_async_pf_next_probe(key
);
8845 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8847 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8850 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8854 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8856 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8858 j
= kvm_async_pf_next_probe(j
);
8859 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8861 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8863 * k lies cyclically in ]i,j]
8865 * |....j i.k.| or |.k..j i...|
8867 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8868 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8873 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8876 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8880 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8883 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8887 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8888 struct kvm_async_pf
*work
)
8890 struct x86_exception fault
;
8892 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8893 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8895 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8896 (vcpu
->arch
.apf
.send_user_only
&&
8897 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8898 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8899 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8900 fault
.vector
= PF_VECTOR
;
8901 fault
.error_code_valid
= true;
8902 fault
.error_code
= 0;
8903 fault
.nested_page_fault
= false;
8904 fault
.address
= work
->arch
.token
;
8905 fault
.async_page_fault
= true;
8906 kvm_inject_page_fault(vcpu
, &fault
);
8910 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8911 struct kvm_async_pf
*work
)
8913 struct x86_exception fault
;
8916 if (work
->wakeup_all
)
8917 work
->arch
.token
= ~0; /* broadcast wakeup */
8919 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8920 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8922 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
8923 !apf_get_user(vcpu
, &val
)) {
8924 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
8925 vcpu
->arch
.exception
.pending
&&
8926 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
8927 !apf_put_user(vcpu
, 0)) {
8928 vcpu
->arch
.exception
.injected
= false;
8929 vcpu
->arch
.exception
.pending
= false;
8930 vcpu
->arch
.exception
.nr
= 0;
8931 vcpu
->arch
.exception
.has_error_code
= false;
8932 vcpu
->arch
.exception
.error_code
= 0;
8933 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8934 fault
.vector
= PF_VECTOR
;
8935 fault
.error_code_valid
= true;
8936 fault
.error_code
= 0;
8937 fault
.nested_page_fault
= false;
8938 fault
.address
= work
->arch
.token
;
8939 fault
.async_page_fault
= true;
8940 kvm_inject_page_fault(vcpu
, &fault
);
8943 vcpu
->arch
.apf
.halted
= false;
8944 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8947 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8949 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8952 return kvm_can_do_async_pf(vcpu
);
8955 void kvm_arch_start_assignment(struct kvm
*kvm
)
8957 atomic_inc(&kvm
->arch
.assigned_device_count
);
8959 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8961 void kvm_arch_end_assignment(struct kvm
*kvm
)
8963 atomic_dec(&kvm
->arch
.assigned_device_count
);
8965 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8967 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8969 return atomic_read(&kvm
->arch
.assigned_device_count
);
8971 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8973 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8975 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8977 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8979 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8981 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8983 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8985 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8987 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8989 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8991 bool kvm_arch_has_irq_bypass(void)
8993 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8996 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8997 struct irq_bypass_producer
*prod
)
8999 struct kvm_kernel_irqfd
*irqfd
=
9000 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9002 irqfd
->producer
= prod
;
9004 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
9005 prod
->irq
, irqfd
->gsi
, 1);
9008 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
9009 struct irq_bypass_producer
*prod
)
9012 struct kvm_kernel_irqfd
*irqfd
=
9013 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9015 WARN_ON(irqfd
->producer
!= prod
);
9016 irqfd
->producer
= NULL
;
9019 * When producer of consumer is unregistered, we change back to
9020 * remapped mode, so we can re-use the current implementation
9021 * when the irq is masked/disabled or the consumer side (KVM
9022 * int this case doesn't want to receive the interrupts.
9024 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
9026 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
9027 " fails: %d\n", irqfd
->consumer
.token
, ret
);
9030 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
9031 uint32_t guest_irq
, bool set
)
9033 if (!kvm_x86_ops
->update_pi_irte
)
9036 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
9039 bool kvm_vector_hashing_enabled(void)
9041 return vector_hashing
;
9043 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
9045 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
9046 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
9047 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
9048 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
9049 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
9050 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
9051 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
9052 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
9053 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
9054 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
9055 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
9056 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
9057 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
9058 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
9059 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
9060 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
9061 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
9062 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
9063 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);