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KVM: VMX: Enable XSAVE/XRSTOR for guest
[mirror_ubuntu-artful-kernel.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
10 *
11 * Authors:
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
16 *
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
19 *
20 */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
47
48 #define CREATE_TRACE_POINTS
49 #include "trace.h"
50
51 #include <asm/debugreg.h>
52 #include <asm/msr.h>
53 #include <asm/desc.h>
54 #include <asm/mtrr.h>
55 #include <asm/mce.h>
56 #include <asm/i387.h>
57 #include <asm/xcr.h>
58
59 #define MAX_IO_MSRS 256
60 #define CR0_RESERVED_BITS \
61 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
62 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
63 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
64 #define CR4_RESERVED_BITS \
65 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
66 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
67 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
68 | X86_CR4_OSXSAVE \
69 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
70
71 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
72
73 #define KVM_MAX_MCE_BANKS 32
74 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
75
76 /* EFER defaults:
77 * - enable syscall per default because its emulated by KVM
78 * - enable LME and LMA per default on 64 bit KVM
79 */
80 #ifdef CONFIG_X86_64
81 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
82 #else
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
84 #endif
85
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88
89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
90 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
91 struct kvm_cpuid_entry2 __user *entries);
92
93 struct kvm_x86_ops *kvm_x86_ops;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
95
96 int ignore_msrs = 0;
97 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
98
99 #define KVM_NR_SHARED_MSRS 16
100
101 struct kvm_shared_msrs_global {
102 int nr;
103 u32 msrs[KVM_NR_SHARED_MSRS];
104 };
105
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
108 bool registered;
109 struct kvm_shared_msr_values {
110 u64 host;
111 u64 curr;
112 } values[KVM_NR_SHARED_MSRS];
113 };
114
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
117
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
151 { NULL }
152 };
153
154 u64 __read_mostly host_xcr0;
155
156 static inline u32 bit(int bitno)
157 {
158 return 1 << (bitno & 31);
159 }
160
161 static void kvm_on_user_return(struct user_return_notifier *urn)
162 {
163 unsigned slot;
164 struct kvm_shared_msrs *locals
165 = container_of(urn, struct kvm_shared_msrs, urn);
166 struct kvm_shared_msr_values *values;
167
168 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
169 values = &locals->values[slot];
170 if (values->host != values->curr) {
171 wrmsrl(shared_msrs_global.msrs[slot], values->host);
172 values->curr = values->host;
173 }
174 }
175 locals->registered = false;
176 user_return_notifier_unregister(urn);
177 }
178
179 static void shared_msr_update(unsigned slot, u32 msr)
180 {
181 struct kvm_shared_msrs *smsr;
182 u64 value;
183
184 smsr = &__get_cpu_var(shared_msrs);
185 /* only read, and nobody should modify it at this time,
186 * so don't need lock */
187 if (slot >= shared_msrs_global.nr) {
188 printk(KERN_ERR "kvm: invalid MSR slot!");
189 return;
190 }
191 rdmsrl_safe(msr, &value);
192 smsr->values[slot].host = value;
193 smsr->values[slot].curr = value;
194 }
195
196 void kvm_define_shared_msr(unsigned slot, u32 msr)
197 {
198 if (slot >= shared_msrs_global.nr)
199 shared_msrs_global.nr = slot + 1;
200 shared_msrs_global.msrs[slot] = msr;
201 /* we need ensured the shared_msr_global have been updated */
202 smp_wmb();
203 }
204 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
205
206 static void kvm_shared_msr_cpu_online(void)
207 {
208 unsigned i;
209
210 for (i = 0; i < shared_msrs_global.nr; ++i)
211 shared_msr_update(i, shared_msrs_global.msrs[i]);
212 }
213
214 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
215 {
216 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
217
218 if (((value ^ smsr->values[slot].curr) & mask) == 0)
219 return;
220 smsr->values[slot].curr = value;
221 wrmsrl(shared_msrs_global.msrs[slot], value);
222 if (!smsr->registered) {
223 smsr->urn.on_user_return = kvm_on_user_return;
224 user_return_notifier_register(&smsr->urn);
225 smsr->registered = true;
226 }
227 }
228 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
229
230 static void drop_user_return_notifiers(void *ignore)
231 {
232 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
233
234 if (smsr->registered)
235 kvm_on_user_return(&smsr->urn);
236 }
237
238 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
239 {
240 if (irqchip_in_kernel(vcpu->kvm))
241 return vcpu->arch.apic_base;
242 else
243 return vcpu->arch.apic_base;
244 }
245 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
246
247 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
248 {
249 /* TODO: reserve bits check */
250 if (irqchip_in_kernel(vcpu->kvm))
251 kvm_lapic_set_base(vcpu, data);
252 else
253 vcpu->arch.apic_base = data;
254 }
255 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
256
257 #define EXCPT_BENIGN 0
258 #define EXCPT_CONTRIBUTORY 1
259 #define EXCPT_PF 2
260
261 static int exception_class(int vector)
262 {
263 switch (vector) {
264 case PF_VECTOR:
265 return EXCPT_PF;
266 case DE_VECTOR:
267 case TS_VECTOR:
268 case NP_VECTOR:
269 case SS_VECTOR:
270 case GP_VECTOR:
271 return EXCPT_CONTRIBUTORY;
272 default:
273 break;
274 }
275 return EXCPT_BENIGN;
276 }
277
278 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
279 unsigned nr, bool has_error, u32 error_code,
280 bool reinject)
281 {
282 u32 prev_nr;
283 int class1, class2;
284
285 if (!vcpu->arch.exception.pending) {
286 queue:
287 vcpu->arch.exception.pending = true;
288 vcpu->arch.exception.has_error_code = has_error;
289 vcpu->arch.exception.nr = nr;
290 vcpu->arch.exception.error_code = error_code;
291 vcpu->arch.exception.reinject = reinject;
292 return;
293 }
294
295 /* to check exception */
296 prev_nr = vcpu->arch.exception.nr;
297 if (prev_nr == DF_VECTOR) {
298 /* triple fault -> shutdown */
299 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
300 return;
301 }
302 class1 = exception_class(prev_nr);
303 class2 = exception_class(nr);
304 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
305 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
306 /* generate double fault per SDM Table 5-5 */
307 vcpu->arch.exception.pending = true;
308 vcpu->arch.exception.has_error_code = true;
309 vcpu->arch.exception.nr = DF_VECTOR;
310 vcpu->arch.exception.error_code = 0;
311 } else
312 /* replace previous exception with a new one in a hope
313 that instruction re-execution will regenerate lost
314 exception */
315 goto queue;
316 }
317
318 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
319 {
320 kvm_multiple_exception(vcpu, nr, false, 0, false);
321 }
322 EXPORT_SYMBOL_GPL(kvm_queue_exception);
323
324 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
325 {
326 kvm_multiple_exception(vcpu, nr, false, 0, true);
327 }
328 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
329
330 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
331 u32 error_code)
332 {
333 ++vcpu->stat.pf_guest;
334 vcpu->arch.cr2 = addr;
335 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
336 }
337
338 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
339 {
340 vcpu->arch.nmi_pending = 1;
341 }
342 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
343
344 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
345 {
346 kvm_multiple_exception(vcpu, nr, true, error_code, false);
347 }
348 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
349
350 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
351 {
352 kvm_multiple_exception(vcpu, nr, true, error_code, true);
353 }
354 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
355
356 /*
357 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
358 * a #GP and return false.
359 */
360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
361 {
362 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
363 return true;
364 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
365 return false;
366 }
367 EXPORT_SYMBOL_GPL(kvm_require_cpl);
368
369 /*
370 * Load the pae pdptrs. Return true is they are all valid.
371 */
372 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
373 {
374 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
375 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
376 int i;
377 int ret;
378 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
379
380 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
381 offset * sizeof(u64), sizeof(pdpte));
382 if (ret < 0) {
383 ret = 0;
384 goto out;
385 }
386 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
387 if (is_present_gpte(pdpte[i]) &&
388 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
389 ret = 0;
390 goto out;
391 }
392 }
393 ret = 1;
394
395 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
396 __set_bit(VCPU_EXREG_PDPTR,
397 (unsigned long *)&vcpu->arch.regs_avail);
398 __set_bit(VCPU_EXREG_PDPTR,
399 (unsigned long *)&vcpu->arch.regs_dirty);
400 out:
401
402 return ret;
403 }
404 EXPORT_SYMBOL_GPL(load_pdptrs);
405
406 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
407 {
408 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
409 bool changed = true;
410 int r;
411
412 if (is_long_mode(vcpu) || !is_pae(vcpu))
413 return false;
414
415 if (!test_bit(VCPU_EXREG_PDPTR,
416 (unsigned long *)&vcpu->arch.regs_avail))
417 return true;
418
419 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
420 if (r < 0)
421 goto out;
422 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
423 out:
424
425 return changed;
426 }
427
428 static int __kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
429 {
430 unsigned long old_cr0 = kvm_read_cr0(vcpu);
431 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
432 X86_CR0_CD | X86_CR0_NW;
433
434 cr0 |= X86_CR0_ET;
435
436 #ifdef CONFIG_X86_64
437 if (cr0 & 0xffffffff00000000UL)
438 return 1;
439 #endif
440
441 cr0 &= ~CR0_RESERVED_BITS;
442
443 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
444 return 1;
445
446 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
447 return 1;
448
449 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
450 #ifdef CONFIG_X86_64
451 if ((vcpu->arch.efer & EFER_LME)) {
452 int cs_db, cs_l;
453
454 if (!is_pae(vcpu))
455 return 1;
456 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
457 if (cs_l)
458 return 1;
459 } else
460 #endif
461 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
462 return 1;
463 }
464
465 kvm_x86_ops->set_cr0(vcpu, cr0);
466
467 if ((cr0 ^ old_cr0) & update_bits)
468 kvm_mmu_reset_context(vcpu);
469 return 0;
470 }
471
472 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
473 {
474 if (__kvm_set_cr0(vcpu, cr0))
475 kvm_inject_gp(vcpu, 0);
476 }
477 EXPORT_SYMBOL_GPL(kvm_set_cr0);
478
479 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
480 {
481 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
482 }
483 EXPORT_SYMBOL_GPL(kvm_lmsw);
484
485 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
486 {
487 u64 xcr0;
488
489 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
490 if (index != XCR_XFEATURE_ENABLED_MASK)
491 return 1;
492 xcr0 = xcr;
493 if (kvm_x86_ops->get_cpl(vcpu) != 0)
494 return 1;
495 if (!(xcr0 & XSTATE_FP))
496 return 1;
497 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
498 return 1;
499 if (xcr0 & ~host_xcr0)
500 return 1;
501 vcpu->arch.xcr0 = xcr0;
502 vcpu->guest_xcr0_loaded = 0;
503 return 0;
504 }
505
506 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
507 {
508 if (__kvm_set_xcr(vcpu, index, xcr)) {
509 kvm_inject_gp(vcpu, 0);
510 return 1;
511 }
512 return 0;
513 }
514 EXPORT_SYMBOL_GPL(kvm_set_xcr);
515
516 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
517 {
518 struct kvm_cpuid_entry2 *best;
519
520 best = kvm_find_cpuid_entry(vcpu, 1, 0);
521 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
522 }
523
524 static void update_cpuid(struct kvm_vcpu *vcpu)
525 {
526 struct kvm_cpuid_entry2 *best;
527
528 best = kvm_find_cpuid_entry(vcpu, 1, 0);
529 if (!best)
530 return;
531
532 /* Update OSXSAVE bit */
533 if (cpu_has_xsave && best->function == 0x1) {
534 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
535 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
536 best->ecx |= bit(X86_FEATURE_OSXSAVE);
537 }
538 }
539
540 int __kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
541 {
542 unsigned long old_cr4 = kvm_read_cr4(vcpu);
543 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
544
545 if (cr4 & CR4_RESERVED_BITS)
546 return 1;
547
548 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
549 return 1;
550
551 if (is_long_mode(vcpu)) {
552 if (!(cr4 & X86_CR4_PAE))
553 return 1;
554 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
555 && ((cr4 ^ old_cr4) & pdptr_bits)
556 && !load_pdptrs(vcpu, vcpu->arch.cr3))
557 return 1;
558
559 if (cr4 & X86_CR4_VMXE)
560 return 1;
561
562 kvm_x86_ops->set_cr4(vcpu, cr4);
563
564 if ((cr4 ^ old_cr4) & pdptr_bits)
565 kvm_mmu_reset_context(vcpu);
566
567 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
568 update_cpuid(vcpu);
569
570 return 0;
571 }
572
573 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
574 {
575 if (__kvm_set_cr4(vcpu, cr4))
576 kvm_inject_gp(vcpu, 0);
577 }
578 EXPORT_SYMBOL_GPL(kvm_set_cr4);
579
580 static int __kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
581 {
582 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
583 kvm_mmu_sync_roots(vcpu);
584 kvm_mmu_flush_tlb(vcpu);
585 return 0;
586 }
587
588 if (is_long_mode(vcpu)) {
589 if (cr3 & CR3_L_MODE_RESERVED_BITS)
590 return 1;
591 } else {
592 if (is_pae(vcpu)) {
593 if (cr3 & CR3_PAE_RESERVED_BITS)
594 return 1;
595 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
596 return 1;
597 }
598 /*
599 * We don't check reserved bits in nonpae mode, because
600 * this isn't enforced, and VMware depends on this.
601 */
602 }
603
604 /*
605 * Does the new cr3 value map to physical memory? (Note, we
606 * catch an invalid cr3 even in real-mode, because it would
607 * cause trouble later on when we turn on paging anyway.)
608 *
609 * A real CPU would silently accept an invalid cr3 and would
610 * attempt to use it - with largely undefined (and often hard
611 * to debug) behavior on the guest side.
612 */
613 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
614 return 1;
615 vcpu->arch.cr3 = cr3;
616 vcpu->arch.mmu.new_cr3(vcpu);
617 return 0;
618 }
619
620 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
621 {
622 if (__kvm_set_cr3(vcpu, cr3))
623 kvm_inject_gp(vcpu, 0);
624 }
625 EXPORT_SYMBOL_GPL(kvm_set_cr3);
626
627 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
628 {
629 if (cr8 & CR8_RESERVED_BITS)
630 return 1;
631 if (irqchip_in_kernel(vcpu->kvm))
632 kvm_lapic_set_tpr(vcpu, cr8);
633 else
634 vcpu->arch.cr8 = cr8;
635 return 0;
636 }
637
638 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
639 {
640 if (__kvm_set_cr8(vcpu, cr8))
641 kvm_inject_gp(vcpu, 0);
642 }
643 EXPORT_SYMBOL_GPL(kvm_set_cr8);
644
645 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
646 {
647 if (irqchip_in_kernel(vcpu->kvm))
648 return kvm_lapic_get_cr8(vcpu);
649 else
650 return vcpu->arch.cr8;
651 }
652 EXPORT_SYMBOL_GPL(kvm_get_cr8);
653
654 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
655 {
656 switch (dr) {
657 case 0 ... 3:
658 vcpu->arch.db[dr] = val;
659 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
660 vcpu->arch.eff_db[dr] = val;
661 break;
662 case 4:
663 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
664 return 1; /* #UD */
665 /* fall through */
666 case 6:
667 if (val & 0xffffffff00000000ULL)
668 return -1; /* #GP */
669 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
670 break;
671 case 5:
672 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
673 return 1; /* #UD */
674 /* fall through */
675 default: /* 7 */
676 if (val & 0xffffffff00000000ULL)
677 return -1; /* #GP */
678 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
679 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
680 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
681 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
682 }
683 break;
684 }
685
686 return 0;
687 }
688
689 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
690 {
691 int res;
692
693 res = __kvm_set_dr(vcpu, dr, val);
694 if (res > 0)
695 kvm_queue_exception(vcpu, UD_VECTOR);
696 else if (res < 0)
697 kvm_inject_gp(vcpu, 0);
698
699 return res;
700 }
701 EXPORT_SYMBOL_GPL(kvm_set_dr);
702
703 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
704 {
705 switch (dr) {
706 case 0 ... 3:
707 *val = vcpu->arch.db[dr];
708 break;
709 case 4:
710 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
711 return 1;
712 /* fall through */
713 case 6:
714 *val = vcpu->arch.dr6;
715 break;
716 case 5:
717 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
718 return 1;
719 /* fall through */
720 default: /* 7 */
721 *val = vcpu->arch.dr7;
722 break;
723 }
724
725 return 0;
726 }
727
728 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
729 {
730 if (_kvm_get_dr(vcpu, dr, val)) {
731 kvm_queue_exception(vcpu, UD_VECTOR);
732 return 1;
733 }
734 return 0;
735 }
736 EXPORT_SYMBOL_GPL(kvm_get_dr);
737
738 /*
739 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
740 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
741 *
742 * This list is modified at module load time to reflect the
743 * capabilities of the host cpu. This capabilities test skips MSRs that are
744 * kvm-specific. Those are put in the beginning of the list.
745 */
746
747 #define KVM_SAVE_MSRS_BEGIN 7
748 static u32 msrs_to_save[] = {
749 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
750 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
751 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
752 HV_X64_MSR_APIC_ASSIST_PAGE,
753 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
754 MSR_K6_STAR,
755 #ifdef CONFIG_X86_64
756 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
757 #endif
758 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
759 };
760
761 static unsigned num_msrs_to_save;
762
763 static u32 emulated_msrs[] = {
764 MSR_IA32_MISC_ENABLE,
765 };
766
767 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
768 {
769 u64 old_efer = vcpu->arch.efer;
770
771 if (efer & efer_reserved_bits)
772 return 1;
773
774 if (is_paging(vcpu)
775 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
776 return 1;
777
778 if (efer & EFER_FFXSR) {
779 struct kvm_cpuid_entry2 *feat;
780
781 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
782 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
783 return 1;
784 }
785
786 if (efer & EFER_SVME) {
787 struct kvm_cpuid_entry2 *feat;
788
789 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
790 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
791 return 1;
792 }
793
794 efer &= ~EFER_LMA;
795 efer |= vcpu->arch.efer & EFER_LMA;
796
797 kvm_x86_ops->set_efer(vcpu, efer);
798
799 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
800 kvm_mmu_reset_context(vcpu);
801
802 /* Update reserved bits */
803 if ((efer ^ old_efer) & EFER_NX)
804 kvm_mmu_reset_context(vcpu);
805
806 return 0;
807 }
808
809 void kvm_enable_efer_bits(u64 mask)
810 {
811 efer_reserved_bits &= ~mask;
812 }
813 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
814
815
816 /*
817 * Writes msr value into into the appropriate "register".
818 * Returns 0 on success, non-0 otherwise.
819 * Assumes vcpu_load() was already called.
820 */
821 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
822 {
823 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
824 }
825
826 /*
827 * Adapt set_msr() to msr_io()'s calling convention
828 */
829 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
830 {
831 return kvm_set_msr(vcpu, index, *data);
832 }
833
834 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
835 {
836 int version;
837 int r;
838 struct pvclock_wall_clock wc;
839 struct timespec boot;
840
841 if (!wall_clock)
842 return;
843
844 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
845 if (r)
846 return;
847
848 if (version & 1)
849 ++version; /* first time write, random junk */
850
851 ++version;
852
853 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
854
855 /*
856 * The guest calculates current wall clock time by adding
857 * system time (updated by kvm_write_guest_time below) to the
858 * wall clock specified here. guest system time equals host
859 * system time for us, thus we must fill in host boot time here.
860 */
861 getboottime(&boot);
862
863 wc.sec = boot.tv_sec;
864 wc.nsec = boot.tv_nsec;
865 wc.version = version;
866
867 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
868
869 version++;
870 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
871 }
872
873 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
874 {
875 uint32_t quotient, remainder;
876
877 /* Don't try to replace with do_div(), this one calculates
878 * "(dividend << 32) / divisor" */
879 __asm__ ( "divl %4"
880 : "=a" (quotient), "=d" (remainder)
881 : "0" (0), "1" (dividend), "r" (divisor) );
882 return quotient;
883 }
884
885 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
886 {
887 uint64_t nsecs = 1000000000LL;
888 int32_t shift = 0;
889 uint64_t tps64;
890 uint32_t tps32;
891
892 tps64 = tsc_khz * 1000LL;
893 while (tps64 > nsecs*2) {
894 tps64 >>= 1;
895 shift--;
896 }
897
898 tps32 = (uint32_t)tps64;
899 while (tps32 <= (uint32_t)nsecs) {
900 tps32 <<= 1;
901 shift++;
902 }
903
904 hv_clock->tsc_shift = shift;
905 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
906
907 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
908 __func__, tsc_khz, hv_clock->tsc_shift,
909 hv_clock->tsc_to_system_mul);
910 }
911
912 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
913
914 static void kvm_write_guest_time(struct kvm_vcpu *v)
915 {
916 struct timespec ts;
917 unsigned long flags;
918 struct kvm_vcpu_arch *vcpu = &v->arch;
919 void *shared_kaddr;
920 unsigned long this_tsc_khz;
921
922 if ((!vcpu->time_page))
923 return;
924
925 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
926 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
927 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
928 vcpu->hv_clock_tsc_khz = this_tsc_khz;
929 }
930 put_cpu_var(cpu_tsc_khz);
931
932 /* Keep irq disabled to prevent changes to the clock */
933 local_irq_save(flags);
934 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
935 ktime_get_ts(&ts);
936 monotonic_to_bootbased(&ts);
937 local_irq_restore(flags);
938
939 /* With all the info we got, fill in the values */
940
941 vcpu->hv_clock.system_time = ts.tv_nsec +
942 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
943
944 vcpu->hv_clock.flags = 0;
945
946 /*
947 * The interface expects us to write an even number signaling that the
948 * update is finished. Since the guest won't see the intermediate
949 * state, we just increase by 2 at the end.
950 */
951 vcpu->hv_clock.version += 2;
952
953 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
954
955 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
956 sizeof(vcpu->hv_clock));
957
958 kunmap_atomic(shared_kaddr, KM_USER0);
959
960 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
961 }
962
963 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
964 {
965 struct kvm_vcpu_arch *vcpu = &v->arch;
966
967 if (!vcpu->time_page)
968 return 0;
969 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
970 return 1;
971 }
972
973 static bool msr_mtrr_valid(unsigned msr)
974 {
975 switch (msr) {
976 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
977 case MSR_MTRRfix64K_00000:
978 case MSR_MTRRfix16K_80000:
979 case MSR_MTRRfix16K_A0000:
980 case MSR_MTRRfix4K_C0000:
981 case MSR_MTRRfix4K_C8000:
982 case MSR_MTRRfix4K_D0000:
983 case MSR_MTRRfix4K_D8000:
984 case MSR_MTRRfix4K_E0000:
985 case MSR_MTRRfix4K_E8000:
986 case MSR_MTRRfix4K_F0000:
987 case MSR_MTRRfix4K_F8000:
988 case MSR_MTRRdefType:
989 case MSR_IA32_CR_PAT:
990 return true;
991 case 0x2f8:
992 return true;
993 }
994 return false;
995 }
996
997 static bool valid_pat_type(unsigned t)
998 {
999 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1000 }
1001
1002 static bool valid_mtrr_type(unsigned t)
1003 {
1004 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1005 }
1006
1007 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1008 {
1009 int i;
1010
1011 if (!msr_mtrr_valid(msr))
1012 return false;
1013
1014 if (msr == MSR_IA32_CR_PAT) {
1015 for (i = 0; i < 8; i++)
1016 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1017 return false;
1018 return true;
1019 } else if (msr == MSR_MTRRdefType) {
1020 if (data & ~0xcff)
1021 return false;
1022 return valid_mtrr_type(data & 0xff);
1023 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1024 for (i = 0; i < 8 ; i++)
1025 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1026 return false;
1027 return true;
1028 }
1029
1030 /* variable MTRRs */
1031 return valid_mtrr_type(data & 0xff);
1032 }
1033
1034 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1035 {
1036 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1037
1038 if (!mtrr_valid(vcpu, msr, data))
1039 return 1;
1040
1041 if (msr == MSR_MTRRdefType) {
1042 vcpu->arch.mtrr_state.def_type = data;
1043 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1044 } else if (msr == MSR_MTRRfix64K_00000)
1045 p[0] = data;
1046 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1047 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1048 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1049 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1050 else if (msr == MSR_IA32_CR_PAT)
1051 vcpu->arch.pat = data;
1052 else { /* Variable MTRRs */
1053 int idx, is_mtrr_mask;
1054 u64 *pt;
1055
1056 idx = (msr - 0x200) / 2;
1057 is_mtrr_mask = msr - 0x200 - 2 * idx;
1058 if (!is_mtrr_mask)
1059 pt =
1060 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1061 else
1062 pt =
1063 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1064 *pt = data;
1065 }
1066
1067 kvm_mmu_reset_context(vcpu);
1068 return 0;
1069 }
1070
1071 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1072 {
1073 u64 mcg_cap = vcpu->arch.mcg_cap;
1074 unsigned bank_num = mcg_cap & 0xff;
1075
1076 switch (msr) {
1077 case MSR_IA32_MCG_STATUS:
1078 vcpu->arch.mcg_status = data;
1079 break;
1080 case MSR_IA32_MCG_CTL:
1081 if (!(mcg_cap & MCG_CTL_P))
1082 return 1;
1083 if (data != 0 && data != ~(u64)0)
1084 return -1;
1085 vcpu->arch.mcg_ctl = data;
1086 break;
1087 default:
1088 if (msr >= MSR_IA32_MC0_CTL &&
1089 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1090 u32 offset = msr - MSR_IA32_MC0_CTL;
1091 /* only 0 or all 1s can be written to IA32_MCi_CTL
1092 * some Linux kernels though clear bit 10 in bank 4 to
1093 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1094 * this to avoid an uncatched #GP in the guest
1095 */
1096 if ((offset & 0x3) == 0 &&
1097 data != 0 && (data | (1 << 10)) != ~(u64)0)
1098 return -1;
1099 vcpu->arch.mce_banks[offset] = data;
1100 break;
1101 }
1102 return 1;
1103 }
1104 return 0;
1105 }
1106
1107 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1108 {
1109 struct kvm *kvm = vcpu->kvm;
1110 int lm = is_long_mode(vcpu);
1111 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1112 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1113 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1114 : kvm->arch.xen_hvm_config.blob_size_32;
1115 u32 page_num = data & ~PAGE_MASK;
1116 u64 page_addr = data & PAGE_MASK;
1117 u8 *page;
1118 int r;
1119
1120 r = -E2BIG;
1121 if (page_num >= blob_size)
1122 goto out;
1123 r = -ENOMEM;
1124 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1125 if (!page)
1126 goto out;
1127 r = -EFAULT;
1128 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1129 goto out_free;
1130 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1131 goto out_free;
1132 r = 0;
1133 out_free:
1134 kfree(page);
1135 out:
1136 return r;
1137 }
1138
1139 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1140 {
1141 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1142 }
1143
1144 static bool kvm_hv_msr_partition_wide(u32 msr)
1145 {
1146 bool r = false;
1147 switch (msr) {
1148 case HV_X64_MSR_GUEST_OS_ID:
1149 case HV_X64_MSR_HYPERCALL:
1150 r = true;
1151 break;
1152 }
1153
1154 return r;
1155 }
1156
1157 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1158 {
1159 struct kvm *kvm = vcpu->kvm;
1160
1161 switch (msr) {
1162 case HV_X64_MSR_GUEST_OS_ID:
1163 kvm->arch.hv_guest_os_id = data;
1164 /* setting guest os id to zero disables hypercall page */
1165 if (!kvm->arch.hv_guest_os_id)
1166 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1167 break;
1168 case HV_X64_MSR_HYPERCALL: {
1169 u64 gfn;
1170 unsigned long addr;
1171 u8 instructions[4];
1172
1173 /* if guest os id is not set hypercall should remain disabled */
1174 if (!kvm->arch.hv_guest_os_id)
1175 break;
1176 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1177 kvm->arch.hv_hypercall = data;
1178 break;
1179 }
1180 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1181 addr = gfn_to_hva(kvm, gfn);
1182 if (kvm_is_error_hva(addr))
1183 return 1;
1184 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1185 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1186 if (copy_to_user((void __user *)addr, instructions, 4))
1187 return 1;
1188 kvm->arch.hv_hypercall = data;
1189 break;
1190 }
1191 default:
1192 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1193 "data 0x%llx\n", msr, data);
1194 return 1;
1195 }
1196 return 0;
1197 }
1198
1199 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1200 {
1201 switch (msr) {
1202 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1203 unsigned long addr;
1204
1205 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1206 vcpu->arch.hv_vapic = data;
1207 break;
1208 }
1209 addr = gfn_to_hva(vcpu->kvm, data >>
1210 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1211 if (kvm_is_error_hva(addr))
1212 return 1;
1213 if (clear_user((void __user *)addr, PAGE_SIZE))
1214 return 1;
1215 vcpu->arch.hv_vapic = data;
1216 break;
1217 }
1218 case HV_X64_MSR_EOI:
1219 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1220 case HV_X64_MSR_ICR:
1221 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1222 case HV_X64_MSR_TPR:
1223 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1224 default:
1225 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1226 "data 0x%llx\n", msr, data);
1227 return 1;
1228 }
1229
1230 return 0;
1231 }
1232
1233 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1234 {
1235 switch (msr) {
1236 case MSR_EFER:
1237 return set_efer(vcpu, data);
1238 case MSR_K7_HWCR:
1239 data &= ~(u64)0x40; /* ignore flush filter disable */
1240 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1241 if (data != 0) {
1242 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1243 data);
1244 return 1;
1245 }
1246 break;
1247 case MSR_FAM10H_MMIO_CONF_BASE:
1248 if (data != 0) {
1249 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1250 "0x%llx\n", data);
1251 return 1;
1252 }
1253 break;
1254 case MSR_AMD64_NB_CFG:
1255 break;
1256 case MSR_IA32_DEBUGCTLMSR:
1257 if (!data) {
1258 /* We support the non-activated case already */
1259 break;
1260 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1261 /* Values other than LBR and BTF are vendor-specific,
1262 thus reserved and should throw a #GP */
1263 return 1;
1264 }
1265 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1266 __func__, data);
1267 break;
1268 case MSR_IA32_UCODE_REV:
1269 case MSR_IA32_UCODE_WRITE:
1270 case MSR_VM_HSAVE_PA:
1271 case MSR_AMD64_PATCH_LOADER:
1272 break;
1273 case 0x200 ... 0x2ff:
1274 return set_msr_mtrr(vcpu, msr, data);
1275 case MSR_IA32_APICBASE:
1276 kvm_set_apic_base(vcpu, data);
1277 break;
1278 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1279 return kvm_x2apic_msr_write(vcpu, msr, data);
1280 case MSR_IA32_MISC_ENABLE:
1281 vcpu->arch.ia32_misc_enable_msr = data;
1282 break;
1283 case MSR_KVM_WALL_CLOCK_NEW:
1284 case MSR_KVM_WALL_CLOCK:
1285 vcpu->kvm->arch.wall_clock = data;
1286 kvm_write_wall_clock(vcpu->kvm, data);
1287 break;
1288 case MSR_KVM_SYSTEM_TIME_NEW:
1289 case MSR_KVM_SYSTEM_TIME: {
1290 if (vcpu->arch.time_page) {
1291 kvm_release_page_dirty(vcpu->arch.time_page);
1292 vcpu->arch.time_page = NULL;
1293 }
1294
1295 vcpu->arch.time = data;
1296
1297 /* we verify if the enable bit is set... */
1298 if (!(data & 1))
1299 break;
1300
1301 /* ...but clean it before doing the actual write */
1302 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1303
1304 vcpu->arch.time_page =
1305 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1306
1307 if (is_error_page(vcpu->arch.time_page)) {
1308 kvm_release_page_clean(vcpu->arch.time_page);
1309 vcpu->arch.time_page = NULL;
1310 }
1311
1312 kvm_request_guest_time_update(vcpu);
1313 break;
1314 }
1315 case MSR_IA32_MCG_CTL:
1316 case MSR_IA32_MCG_STATUS:
1317 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1318 return set_msr_mce(vcpu, msr, data);
1319
1320 /* Performance counters are not protected by a CPUID bit,
1321 * so we should check all of them in the generic path for the sake of
1322 * cross vendor migration.
1323 * Writing a zero into the event select MSRs disables them,
1324 * which we perfectly emulate ;-). Any other value should be at least
1325 * reported, some guests depend on them.
1326 */
1327 case MSR_P6_EVNTSEL0:
1328 case MSR_P6_EVNTSEL1:
1329 case MSR_K7_EVNTSEL0:
1330 case MSR_K7_EVNTSEL1:
1331 case MSR_K7_EVNTSEL2:
1332 case MSR_K7_EVNTSEL3:
1333 if (data != 0)
1334 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1335 "0x%x data 0x%llx\n", msr, data);
1336 break;
1337 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1338 * so we ignore writes to make it happy.
1339 */
1340 case MSR_P6_PERFCTR0:
1341 case MSR_P6_PERFCTR1:
1342 case MSR_K7_PERFCTR0:
1343 case MSR_K7_PERFCTR1:
1344 case MSR_K7_PERFCTR2:
1345 case MSR_K7_PERFCTR3:
1346 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1347 "0x%x data 0x%llx\n", msr, data);
1348 break;
1349 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1350 if (kvm_hv_msr_partition_wide(msr)) {
1351 int r;
1352 mutex_lock(&vcpu->kvm->lock);
1353 r = set_msr_hyperv_pw(vcpu, msr, data);
1354 mutex_unlock(&vcpu->kvm->lock);
1355 return r;
1356 } else
1357 return set_msr_hyperv(vcpu, msr, data);
1358 break;
1359 default:
1360 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1361 return xen_hvm_config(vcpu, data);
1362 if (!ignore_msrs) {
1363 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1364 msr, data);
1365 return 1;
1366 } else {
1367 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1368 msr, data);
1369 break;
1370 }
1371 }
1372 return 0;
1373 }
1374 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1375
1376
1377 /*
1378 * Reads an msr value (of 'msr_index') into 'pdata'.
1379 * Returns 0 on success, non-0 otherwise.
1380 * Assumes vcpu_load() was already called.
1381 */
1382 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1383 {
1384 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1385 }
1386
1387 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1388 {
1389 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1390
1391 if (!msr_mtrr_valid(msr))
1392 return 1;
1393
1394 if (msr == MSR_MTRRdefType)
1395 *pdata = vcpu->arch.mtrr_state.def_type +
1396 (vcpu->arch.mtrr_state.enabled << 10);
1397 else if (msr == MSR_MTRRfix64K_00000)
1398 *pdata = p[0];
1399 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1400 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1401 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1402 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1403 else if (msr == MSR_IA32_CR_PAT)
1404 *pdata = vcpu->arch.pat;
1405 else { /* Variable MTRRs */
1406 int idx, is_mtrr_mask;
1407 u64 *pt;
1408
1409 idx = (msr - 0x200) / 2;
1410 is_mtrr_mask = msr - 0x200 - 2 * idx;
1411 if (!is_mtrr_mask)
1412 pt =
1413 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1414 else
1415 pt =
1416 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1417 *pdata = *pt;
1418 }
1419
1420 return 0;
1421 }
1422
1423 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1424 {
1425 u64 data;
1426 u64 mcg_cap = vcpu->arch.mcg_cap;
1427 unsigned bank_num = mcg_cap & 0xff;
1428
1429 switch (msr) {
1430 case MSR_IA32_P5_MC_ADDR:
1431 case MSR_IA32_P5_MC_TYPE:
1432 data = 0;
1433 break;
1434 case MSR_IA32_MCG_CAP:
1435 data = vcpu->arch.mcg_cap;
1436 break;
1437 case MSR_IA32_MCG_CTL:
1438 if (!(mcg_cap & MCG_CTL_P))
1439 return 1;
1440 data = vcpu->arch.mcg_ctl;
1441 break;
1442 case MSR_IA32_MCG_STATUS:
1443 data = vcpu->arch.mcg_status;
1444 break;
1445 default:
1446 if (msr >= MSR_IA32_MC0_CTL &&
1447 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1448 u32 offset = msr - MSR_IA32_MC0_CTL;
1449 data = vcpu->arch.mce_banks[offset];
1450 break;
1451 }
1452 return 1;
1453 }
1454 *pdata = data;
1455 return 0;
1456 }
1457
1458 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1459 {
1460 u64 data = 0;
1461 struct kvm *kvm = vcpu->kvm;
1462
1463 switch (msr) {
1464 case HV_X64_MSR_GUEST_OS_ID:
1465 data = kvm->arch.hv_guest_os_id;
1466 break;
1467 case HV_X64_MSR_HYPERCALL:
1468 data = kvm->arch.hv_hypercall;
1469 break;
1470 default:
1471 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1472 return 1;
1473 }
1474
1475 *pdata = data;
1476 return 0;
1477 }
1478
1479 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1480 {
1481 u64 data = 0;
1482
1483 switch (msr) {
1484 case HV_X64_MSR_VP_INDEX: {
1485 int r;
1486 struct kvm_vcpu *v;
1487 kvm_for_each_vcpu(r, v, vcpu->kvm)
1488 if (v == vcpu)
1489 data = r;
1490 break;
1491 }
1492 case HV_X64_MSR_EOI:
1493 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1494 case HV_X64_MSR_ICR:
1495 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1496 case HV_X64_MSR_TPR:
1497 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1498 default:
1499 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1500 return 1;
1501 }
1502 *pdata = data;
1503 return 0;
1504 }
1505
1506 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1507 {
1508 u64 data;
1509
1510 switch (msr) {
1511 case MSR_IA32_PLATFORM_ID:
1512 case MSR_IA32_UCODE_REV:
1513 case MSR_IA32_EBL_CR_POWERON:
1514 case MSR_IA32_DEBUGCTLMSR:
1515 case MSR_IA32_LASTBRANCHFROMIP:
1516 case MSR_IA32_LASTBRANCHTOIP:
1517 case MSR_IA32_LASTINTFROMIP:
1518 case MSR_IA32_LASTINTTOIP:
1519 case MSR_K8_SYSCFG:
1520 case MSR_K7_HWCR:
1521 case MSR_VM_HSAVE_PA:
1522 case MSR_P6_PERFCTR0:
1523 case MSR_P6_PERFCTR1:
1524 case MSR_P6_EVNTSEL0:
1525 case MSR_P6_EVNTSEL1:
1526 case MSR_K7_EVNTSEL0:
1527 case MSR_K7_PERFCTR0:
1528 case MSR_K8_INT_PENDING_MSG:
1529 case MSR_AMD64_NB_CFG:
1530 case MSR_FAM10H_MMIO_CONF_BASE:
1531 data = 0;
1532 break;
1533 case MSR_MTRRcap:
1534 data = 0x500 | KVM_NR_VAR_MTRR;
1535 break;
1536 case 0x200 ... 0x2ff:
1537 return get_msr_mtrr(vcpu, msr, pdata);
1538 case 0xcd: /* fsb frequency */
1539 data = 3;
1540 break;
1541 case MSR_IA32_APICBASE:
1542 data = kvm_get_apic_base(vcpu);
1543 break;
1544 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1545 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1546 break;
1547 case MSR_IA32_MISC_ENABLE:
1548 data = vcpu->arch.ia32_misc_enable_msr;
1549 break;
1550 case MSR_IA32_PERF_STATUS:
1551 /* TSC increment by tick */
1552 data = 1000ULL;
1553 /* CPU multiplier */
1554 data |= (((uint64_t)4ULL) << 40);
1555 break;
1556 case MSR_EFER:
1557 data = vcpu->arch.efer;
1558 break;
1559 case MSR_KVM_WALL_CLOCK:
1560 case MSR_KVM_WALL_CLOCK_NEW:
1561 data = vcpu->kvm->arch.wall_clock;
1562 break;
1563 case MSR_KVM_SYSTEM_TIME:
1564 case MSR_KVM_SYSTEM_TIME_NEW:
1565 data = vcpu->arch.time;
1566 break;
1567 case MSR_IA32_P5_MC_ADDR:
1568 case MSR_IA32_P5_MC_TYPE:
1569 case MSR_IA32_MCG_CAP:
1570 case MSR_IA32_MCG_CTL:
1571 case MSR_IA32_MCG_STATUS:
1572 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1573 return get_msr_mce(vcpu, msr, pdata);
1574 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1575 if (kvm_hv_msr_partition_wide(msr)) {
1576 int r;
1577 mutex_lock(&vcpu->kvm->lock);
1578 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1579 mutex_unlock(&vcpu->kvm->lock);
1580 return r;
1581 } else
1582 return get_msr_hyperv(vcpu, msr, pdata);
1583 break;
1584 default:
1585 if (!ignore_msrs) {
1586 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1587 return 1;
1588 } else {
1589 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1590 data = 0;
1591 }
1592 break;
1593 }
1594 *pdata = data;
1595 return 0;
1596 }
1597 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1598
1599 /*
1600 * Read or write a bunch of msrs. All parameters are kernel addresses.
1601 *
1602 * @return number of msrs set successfully.
1603 */
1604 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1605 struct kvm_msr_entry *entries,
1606 int (*do_msr)(struct kvm_vcpu *vcpu,
1607 unsigned index, u64 *data))
1608 {
1609 int i, idx;
1610
1611 idx = srcu_read_lock(&vcpu->kvm->srcu);
1612 for (i = 0; i < msrs->nmsrs; ++i)
1613 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1614 break;
1615 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1616
1617 return i;
1618 }
1619
1620 /*
1621 * Read or write a bunch of msrs. Parameters are user addresses.
1622 *
1623 * @return number of msrs set successfully.
1624 */
1625 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1626 int (*do_msr)(struct kvm_vcpu *vcpu,
1627 unsigned index, u64 *data),
1628 int writeback)
1629 {
1630 struct kvm_msrs msrs;
1631 struct kvm_msr_entry *entries;
1632 int r, n;
1633 unsigned size;
1634
1635 r = -EFAULT;
1636 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1637 goto out;
1638
1639 r = -E2BIG;
1640 if (msrs.nmsrs >= MAX_IO_MSRS)
1641 goto out;
1642
1643 r = -ENOMEM;
1644 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1645 entries = kmalloc(size, GFP_KERNEL);
1646 if (!entries)
1647 goto out;
1648
1649 r = -EFAULT;
1650 if (copy_from_user(entries, user_msrs->entries, size))
1651 goto out_free;
1652
1653 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1654 if (r < 0)
1655 goto out_free;
1656
1657 r = -EFAULT;
1658 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1659 goto out_free;
1660
1661 r = n;
1662
1663 out_free:
1664 kfree(entries);
1665 out:
1666 return r;
1667 }
1668
1669 int kvm_dev_ioctl_check_extension(long ext)
1670 {
1671 int r;
1672
1673 switch (ext) {
1674 case KVM_CAP_IRQCHIP:
1675 case KVM_CAP_HLT:
1676 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1677 case KVM_CAP_SET_TSS_ADDR:
1678 case KVM_CAP_EXT_CPUID:
1679 case KVM_CAP_CLOCKSOURCE:
1680 case KVM_CAP_PIT:
1681 case KVM_CAP_NOP_IO_DELAY:
1682 case KVM_CAP_MP_STATE:
1683 case KVM_CAP_SYNC_MMU:
1684 case KVM_CAP_REINJECT_CONTROL:
1685 case KVM_CAP_IRQ_INJECT_STATUS:
1686 case KVM_CAP_ASSIGN_DEV_IRQ:
1687 case KVM_CAP_IRQFD:
1688 case KVM_CAP_IOEVENTFD:
1689 case KVM_CAP_PIT2:
1690 case KVM_CAP_PIT_STATE2:
1691 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1692 case KVM_CAP_XEN_HVM:
1693 case KVM_CAP_ADJUST_CLOCK:
1694 case KVM_CAP_VCPU_EVENTS:
1695 case KVM_CAP_HYPERV:
1696 case KVM_CAP_HYPERV_VAPIC:
1697 case KVM_CAP_HYPERV_SPIN:
1698 case KVM_CAP_PCI_SEGMENT:
1699 case KVM_CAP_DEBUGREGS:
1700 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1701 r = 1;
1702 break;
1703 case KVM_CAP_COALESCED_MMIO:
1704 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1705 break;
1706 case KVM_CAP_VAPIC:
1707 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1708 break;
1709 case KVM_CAP_NR_VCPUS:
1710 r = KVM_MAX_VCPUS;
1711 break;
1712 case KVM_CAP_NR_MEMSLOTS:
1713 r = KVM_MEMORY_SLOTS;
1714 break;
1715 case KVM_CAP_PV_MMU: /* obsolete */
1716 r = 0;
1717 break;
1718 case KVM_CAP_IOMMU:
1719 r = iommu_found();
1720 break;
1721 case KVM_CAP_MCE:
1722 r = KVM_MAX_MCE_BANKS;
1723 break;
1724 default:
1725 r = 0;
1726 break;
1727 }
1728 return r;
1729
1730 }
1731
1732 long kvm_arch_dev_ioctl(struct file *filp,
1733 unsigned int ioctl, unsigned long arg)
1734 {
1735 void __user *argp = (void __user *)arg;
1736 long r;
1737
1738 switch (ioctl) {
1739 case KVM_GET_MSR_INDEX_LIST: {
1740 struct kvm_msr_list __user *user_msr_list = argp;
1741 struct kvm_msr_list msr_list;
1742 unsigned n;
1743
1744 r = -EFAULT;
1745 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1746 goto out;
1747 n = msr_list.nmsrs;
1748 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1749 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1750 goto out;
1751 r = -E2BIG;
1752 if (n < msr_list.nmsrs)
1753 goto out;
1754 r = -EFAULT;
1755 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1756 num_msrs_to_save * sizeof(u32)))
1757 goto out;
1758 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1759 &emulated_msrs,
1760 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1761 goto out;
1762 r = 0;
1763 break;
1764 }
1765 case KVM_GET_SUPPORTED_CPUID: {
1766 struct kvm_cpuid2 __user *cpuid_arg = argp;
1767 struct kvm_cpuid2 cpuid;
1768
1769 r = -EFAULT;
1770 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1771 goto out;
1772 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1773 cpuid_arg->entries);
1774 if (r)
1775 goto out;
1776
1777 r = -EFAULT;
1778 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1779 goto out;
1780 r = 0;
1781 break;
1782 }
1783 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1784 u64 mce_cap;
1785
1786 mce_cap = KVM_MCE_CAP_SUPPORTED;
1787 r = -EFAULT;
1788 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1789 goto out;
1790 r = 0;
1791 break;
1792 }
1793 default:
1794 r = -EINVAL;
1795 }
1796 out:
1797 return r;
1798 }
1799
1800 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1801 {
1802 kvm_x86_ops->vcpu_load(vcpu, cpu);
1803 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1804 unsigned long khz = cpufreq_quick_get(cpu);
1805 if (!khz)
1806 khz = tsc_khz;
1807 per_cpu(cpu_tsc_khz, cpu) = khz;
1808 }
1809 kvm_request_guest_time_update(vcpu);
1810 }
1811
1812 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1813 {
1814 kvm_x86_ops->vcpu_put(vcpu);
1815 kvm_put_guest_fpu(vcpu);
1816 }
1817
1818 static int is_efer_nx(void)
1819 {
1820 unsigned long long efer = 0;
1821
1822 rdmsrl_safe(MSR_EFER, &efer);
1823 return efer & EFER_NX;
1824 }
1825
1826 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1827 {
1828 int i;
1829 struct kvm_cpuid_entry2 *e, *entry;
1830
1831 entry = NULL;
1832 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1833 e = &vcpu->arch.cpuid_entries[i];
1834 if (e->function == 0x80000001) {
1835 entry = e;
1836 break;
1837 }
1838 }
1839 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1840 entry->edx &= ~(1 << 20);
1841 printk(KERN_INFO "kvm: guest NX capability removed\n");
1842 }
1843 }
1844
1845 /* when an old userspace process fills a new kernel module */
1846 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1847 struct kvm_cpuid *cpuid,
1848 struct kvm_cpuid_entry __user *entries)
1849 {
1850 int r, i;
1851 struct kvm_cpuid_entry *cpuid_entries;
1852
1853 r = -E2BIG;
1854 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1855 goto out;
1856 r = -ENOMEM;
1857 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1858 if (!cpuid_entries)
1859 goto out;
1860 r = -EFAULT;
1861 if (copy_from_user(cpuid_entries, entries,
1862 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1863 goto out_free;
1864 for (i = 0; i < cpuid->nent; i++) {
1865 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1866 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1867 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1868 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1869 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1870 vcpu->arch.cpuid_entries[i].index = 0;
1871 vcpu->arch.cpuid_entries[i].flags = 0;
1872 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1873 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1874 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1875 }
1876 vcpu->arch.cpuid_nent = cpuid->nent;
1877 cpuid_fix_nx_cap(vcpu);
1878 r = 0;
1879 kvm_apic_set_version(vcpu);
1880 kvm_x86_ops->cpuid_update(vcpu);
1881 update_cpuid(vcpu);
1882
1883 out_free:
1884 vfree(cpuid_entries);
1885 out:
1886 return r;
1887 }
1888
1889 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1890 struct kvm_cpuid2 *cpuid,
1891 struct kvm_cpuid_entry2 __user *entries)
1892 {
1893 int r;
1894
1895 r = -E2BIG;
1896 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1897 goto out;
1898 r = -EFAULT;
1899 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1900 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1901 goto out;
1902 vcpu->arch.cpuid_nent = cpuid->nent;
1903 kvm_apic_set_version(vcpu);
1904 kvm_x86_ops->cpuid_update(vcpu);
1905 update_cpuid(vcpu);
1906 return 0;
1907
1908 out:
1909 return r;
1910 }
1911
1912 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1913 struct kvm_cpuid2 *cpuid,
1914 struct kvm_cpuid_entry2 __user *entries)
1915 {
1916 int r;
1917
1918 r = -E2BIG;
1919 if (cpuid->nent < vcpu->arch.cpuid_nent)
1920 goto out;
1921 r = -EFAULT;
1922 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1923 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1924 goto out;
1925 return 0;
1926
1927 out:
1928 cpuid->nent = vcpu->arch.cpuid_nent;
1929 return r;
1930 }
1931
1932 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1933 u32 index)
1934 {
1935 entry->function = function;
1936 entry->index = index;
1937 cpuid_count(entry->function, entry->index,
1938 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1939 entry->flags = 0;
1940 }
1941
1942 #define F(x) bit(X86_FEATURE_##x)
1943
1944 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1945 u32 index, int *nent, int maxnent)
1946 {
1947 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1948 #ifdef CONFIG_X86_64
1949 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1950 ? F(GBPAGES) : 0;
1951 unsigned f_lm = F(LM);
1952 #else
1953 unsigned f_gbpages = 0;
1954 unsigned f_lm = 0;
1955 #endif
1956 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1957
1958 /* cpuid 1.edx */
1959 const u32 kvm_supported_word0_x86_features =
1960 F(FPU) | F(VME) | F(DE) | F(PSE) |
1961 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1962 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1963 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1964 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1965 0 /* Reserved, DS, ACPI */ | F(MMX) |
1966 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1967 0 /* HTT, TM, Reserved, PBE */;
1968 /* cpuid 0x80000001.edx */
1969 const u32 kvm_supported_word1_x86_features =
1970 F(FPU) | F(VME) | F(DE) | F(PSE) |
1971 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1972 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1973 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1974 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1975 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1976 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1977 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1978 /* cpuid 1.ecx */
1979 const u32 kvm_supported_word4_x86_features =
1980 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1981 0 /* DS-CPL, VMX, SMX, EST */ |
1982 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1983 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1984 0 /* Reserved, DCA */ | F(XMM4_1) |
1985 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1986 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */;
1987 /* cpuid 0x80000001.ecx */
1988 const u32 kvm_supported_word6_x86_features =
1989 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1990 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1991 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1992 0 /* SKINIT */ | 0 /* WDT */;
1993
1994 /* all calls to cpuid_count() should be made on the same cpu */
1995 get_cpu();
1996 do_cpuid_1_ent(entry, function, index);
1997 ++*nent;
1998
1999 switch (function) {
2000 case 0:
2001 entry->eax = min(entry->eax, (u32)0xd);
2002 break;
2003 case 1:
2004 entry->edx &= kvm_supported_word0_x86_features;
2005 entry->ecx &= kvm_supported_word4_x86_features;
2006 /* we support x2apic emulation even if host does not support
2007 * it since we emulate x2apic in software */
2008 entry->ecx |= F(X2APIC);
2009 break;
2010 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2011 * may return different values. This forces us to get_cpu() before
2012 * issuing the first command, and also to emulate this annoying behavior
2013 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2014 case 2: {
2015 int t, times = entry->eax & 0xff;
2016
2017 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2018 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2019 for (t = 1; t < times && *nent < maxnent; ++t) {
2020 do_cpuid_1_ent(&entry[t], function, 0);
2021 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2022 ++*nent;
2023 }
2024 break;
2025 }
2026 /* function 4 and 0xb have additional index. */
2027 case 4: {
2028 int i, cache_type;
2029
2030 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2031 /* read more entries until cache_type is zero */
2032 for (i = 1; *nent < maxnent; ++i) {
2033 cache_type = entry[i - 1].eax & 0x1f;
2034 if (!cache_type)
2035 break;
2036 do_cpuid_1_ent(&entry[i], function, i);
2037 entry[i].flags |=
2038 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2039 ++*nent;
2040 }
2041 break;
2042 }
2043 case 0xb: {
2044 int i, level_type;
2045
2046 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2047 /* read more entries until level_type is zero */
2048 for (i = 1; *nent < maxnent; ++i) {
2049 level_type = entry[i - 1].ecx & 0xff00;
2050 if (!level_type)
2051 break;
2052 do_cpuid_1_ent(&entry[i], function, i);
2053 entry[i].flags |=
2054 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2055 ++*nent;
2056 }
2057 break;
2058 }
2059 case 0xd: {
2060 int i;
2061
2062 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2063 for (i = 1; *nent < maxnent; ++i) {
2064 if (entry[i - 1].eax == 0 && i != 2)
2065 break;
2066 do_cpuid_1_ent(&entry[i], function, i);
2067 entry[i].flags |=
2068 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2069 ++*nent;
2070 }
2071 break;
2072 }
2073 case KVM_CPUID_SIGNATURE: {
2074 char signature[12] = "KVMKVMKVM\0\0";
2075 u32 *sigptr = (u32 *)signature;
2076 entry->eax = 0;
2077 entry->ebx = sigptr[0];
2078 entry->ecx = sigptr[1];
2079 entry->edx = sigptr[2];
2080 break;
2081 }
2082 case KVM_CPUID_FEATURES:
2083 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2084 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2085 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2086 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2087 entry->ebx = 0;
2088 entry->ecx = 0;
2089 entry->edx = 0;
2090 break;
2091 case 0x80000000:
2092 entry->eax = min(entry->eax, 0x8000001a);
2093 break;
2094 case 0x80000001:
2095 entry->edx &= kvm_supported_word1_x86_features;
2096 entry->ecx &= kvm_supported_word6_x86_features;
2097 break;
2098 }
2099
2100 kvm_x86_ops->set_supported_cpuid(function, entry);
2101
2102 put_cpu();
2103 }
2104
2105 #undef F
2106
2107 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2108 struct kvm_cpuid_entry2 __user *entries)
2109 {
2110 struct kvm_cpuid_entry2 *cpuid_entries;
2111 int limit, nent = 0, r = -E2BIG;
2112 u32 func;
2113
2114 if (cpuid->nent < 1)
2115 goto out;
2116 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2117 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2118 r = -ENOMEM;
2119 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2120 if (!cpuid_entries)
2121 goto out;
2122
2123 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2124 limit = cpuid_entries[0].eax;
2125 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2126 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2127 &nent, cpuid->nent);
2128 r = -E2BIG;
2129 if (nent >= cpuid->nent)
2130 goto out_free;
2131
2132 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2133 limit = cpuid_entries[nent - 1].eax;
2134 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2135 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2136 &nent, cpuid->nent);
2137
2138
2139
2140 r = -E2BIG;
2141 if (nent >= cpuid->nent)
2142 goto out_free;
2143
2144 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2145 cpuid->nent);
2146
2147 r = -E2BIG;
2148 if (nent >= cpuid->nent)
2149 goto out_free;
2150
2151 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2152 cpuid->nent);
2153
2154 r = -E2BIG;
2155 if (nent >= cpuid->nent)
2156 goto out_free;
2157
2158 r = -EFAULT;
2159 if (copy_to_user(entries, cpuid_entries,
2160 nent * sizeof(struct kvm_cpuid_entry2)))
2161 goto out_free;
2162 cpuid->nent = nent;
2163 r = 0;
2164
2165 out_free:
2166 vfree(cpuid_entries);
2167 out:
2168 return r;
2169 }
2170
2171 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2172 struct kvm_lapic_state *s)
2173 {
2174 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2175
2176 return 0;
2177 }
2178
2179 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2180 struct kvm_lapic_state *s)
2181 {
2182 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2183 kvm_apic_post_state_restore(vcpu);
2184 update_cr8_intercept(vcpu);
2185
2186 return 0;
2187 }
2188
2189 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2190 struct kvm_interrupt *irq)
2191 {
2192 if (irq->irq < 0 || irq->irq >= 256)
2193 return -EINVAL;
2194 if (irqchip_in_kernel(vcpu->kvm))
2195 return -ENXIO;
2196
2197 kvm_queue_interrupt(vcpu, irq->irq, false);
2198
2199 return 0;
2200 }
2201
2202 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2203 {
2204 kvm_inject_nmi(vcpu);
2205
2206 return 0;
2207 }
2208
2209 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2210 struct kvm_tpr_access_ctl *tac)
2211 {
2212 if (tac->flags)
2213 return -EINVAL;
2214 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2215 return 0;
2216 }
2217
2218 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2219 u64 mcg_cap)
2220 {
2221 int r;
2222 unsigned bank_num = mcg_cap & 0xff, bank;
2223
2224 r = -EINVAL;
2225 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2226 goto out;
2227 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2228 goto out;
2229 r = 0;
2230 vcpu->arch.mcg_cap = mcg_cap;
2231 /* Init IA32_MCG_CTL to all 1s */
2232 if (mcg_cap & MCG_CTL_P)
2233 vcpu->arch.mcg_ctl = ~(u64)0;
2234 /* Init IA32_MCi_CTL to all 1s */
2235 for (bank = 0; bank < bank_num; bank++)
2236 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2237 out:
2238 return r;
2239 }
2240
2241 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2242 struct kvm_x86_mce *mce)
2243 {
2244 u64 mcg_cap = vcpu->arch.mcg_cap;
2245 unsigned bank_num = mcg_cap & 0xff;
2246 u64 *banks = vcpu->arch.mce_banks;
2247
2248 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2249 return -EINVAL;
2250 /*
2251 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2252 * reporting is disabled
2253 */
2254 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2255 vcpu->arch.mcg_ctl != ~(u64)0)
2256 return 0;
2257 banks += 4 * mce->bank;
2258 /*
2259 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2260 * reporting is disabled for the bank
2261 */
2262 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2263 return 0;
2264 if (mce->status & MCI_STATUS_UC) {
2265 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2266 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2267 printk(KERN_DEBUG "kvm: set_mce: "
2268 "injects mce exception while "
2269 "previous one is in progress!\n");
2270 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2271 return 0;
2272 }
2273 if (banks[1] & MCI_STATUS_VAL)
2274 mce->status |= MCI_STATUS_OVER;
2275 banks[2] = mce->addr;
2276 banks[3] = mce->misc;
2277 vcpu->arch.mcg_status = mce->mcg_status;
2278 banks[1] = mce->status;
2279 kvm_queue_exception(vcpu, MC_VECTOR);
2280 } else if (!(banks[1] & MCI_STATUS_VAL)
2281 || !(banks[1] & MCI_STATUS_UC)) {
2282 if (banks[1] & MCI_STATUS_VAL)
2283 mce->status |= MCI_STATUS_OVER;
2284 banks[2] = mce->addr;
2285 banks[3] = mce->misc;
2286 banks[1] = mce->status;
2287 } else
2288 banks[1] |= MCI_STATUS_OVER;
2289 return 0;
2290 }
2291
2292 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2293 struct kvm_vcpu_events *events)
2294 {
2295 events->exception.injected =
2296 vcpu->arch.exception.pending &&
2297 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2298 events->exception.nr = vcpu->arch.exception.nr;
2299 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2300 events->exception.error_code = vcpu->arch.exception.error_code;
2301
2302 events->interrupt.injected =
2303 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2304 events->interrupt.nr = vcpu->arch.interrupt.nr;
2305 events->interrupt.soft = 0;
2306 events->interrupt.shadow =
2307 kvm_x86_ops->get_interrupt_shadow(vcpu,
2308 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2309
2310 events->nmi.injected = vcpu->arch.nmi_injected;
2311 events->nmi.pending = vcpu->arch.nmi_pending;
2312 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2313
2314 events->sipi_vector = vcpu->arch.sipi_vector;
2315
2316 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2317 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2318 | KVM_VCPUEVENT_VALID_SHADOW);
2319 }
2320
2321 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2322 struct kvm_vcpu_events *events)
2323 {
2324 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2325 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2326 | KVM_VCPUEVENT_VALID_SHADOW))
2327 return -EINVAL;
2328
2329 vcpu->arch.exception.pending = events->exception.injected;
2330 vcpu->arch.exception.nr = events->exception.nr;
2331 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2332 vcpu->arch.exception.error_code = events->exception.error_code;
2333
2334 vcpu->arch.interrupt.pending = events->interrupt.injected;
2335 vcpu->arch.interrupt.nr = events->interrupt.nr;
2336 vcpu->arch.interrupt.soft = events->interrupt.soft;
2337 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2338 kvm_pic_clear_isr_ack(vcpu->kvm);
2339 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2340 kvm_x86_ops->set_interrupt_shadow(vcpu,
2341 events->interrupt.shadow);
2342
2343 vcpu->arch.nmi_injected = events->nmi.injected;
2344 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2345 vcpu->arch.nmi_pending = events->nmi.pending;
2346 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2347
2348 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2349 vcpu->arch.sipi_vector = events->sipi_vector;
2350
2351 return 0;
2352 }
2353
2354 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2355 struct kvm_debugregs *dbgregs)
2356 {
2357 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2358 dbgregs->dr6 = vcpu->arch.dr6;
2359 dbgregs->dr7 = vcpu->arch.dr7;
2360 dbgregs->flags = 0;
2361 }
2362
2363 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2364 struct kvm_debugregs *dbgregs)
2365 {
2366 if (dbgregs->flags)
2367 return -EINVAL;
2368
2369 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2370 vcpu->arch.dr6 = dbgregs->dr6;
2371 vcpu->arch.dr7 = dbgregs->dr7;
2372
2373 return 0;
2374 }
2375
2376 long kvm_arch_vcpu_ioctl(struct file *filp,
2377 unsigned int ioctl, unsigned long arg)
2378 {
2379 struct kvm_vcpu *vcpu = filp->private_data;
2380 void __user *argp = (void __user *)arg;
2381 int r;
2382 struct kvm_lapic_state *lapic = NULL;
2383
2384 switch (ioctl) {
2385 case KVM_GET_LAPIC: {
2386 r = -EINVAL;
2387 if (!vcpu->arch.apic)
2388 goto out;
2389 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2390
2391 r = -ENOMEM;
2392 if (!lapic)
2393 goto out;
2394 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2395 if (r)
2396 goto out;
2397 r = -EFAULT;
2398 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2399 goto out;
2400 r = 0;
2401 break;
2402 }
2403 case KVM_SET_LAPIC: {
2404 r = -EINVAL;
2405 if (!vcpu->arch.apic)
2406 goto out;
2407 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2408 r = -ENOMEM;
2409 if (!lapic)
2410 goto out;
2411 r = -EFAULT;
2412 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2413 goto out;
2414 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2415 if (r)
2416 goto out;
2417 r = 0;
2418 break;
2419 }
2420 case KVM_INTERRUPT: {
2421 struct kvm_interrupt irq;
2422
2423 r = -EFAULT;
2424 if (copy_from_user(&irq, argp, sizeof irq))
2425 goto out;
2426 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2427 if (r)
2428 goto out;
2429 r = 0;
2430 break;
2431 }
2432 case KVM_NMI: {
2433 r = kvm_vcpu_ioctl_nmi(vcpu);
2434 if (r)
2435 goto out;
2436 r = 0;
2437 break;
2438 }
2439 case KVM_SET_CPUID: {
2440 struct kvm_cpuid __user *cpuid_arg = argp;
2441 struct kvm_cpuid cpuid;
2442
2443 r = -EFAULT;
2444 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2445 goto out;
2446 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2447 if (r)
2448 goto out;
2449 break;
2450 }
2451 case KVM_SET_CPUID2: {
2452 struct kvm_cpuid2 __user *cpuid_arg = argp;
2453 struct kvm_cpuid2 cpuid;
2454
2455 r = -EFAULT;
2456 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2457 goto out;
2458 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2459 cpuid_arg->entries);
2460 if (r)
2461 goto out;
2462 break;
2463 }
2464 case KVM_GET_CPUID2: {
2465 struct kvm_cpuid2 __user *cpuid_arg = argp;
2466 struct kvm_cpuid2 cpuid;
2467
2468 r = -EFAULT;
2469 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2470 goto out;
2471 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2472 cpuid_arg->entries);
2473 if (r)
2474 goto out;
2475 r = -EFAULT;
2476 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2477 goto out;
2478 r = 0;
2479 break;
2480 }
2481 case KVM_GET_MSRS:
2482 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2483 break;
2484 case KVM_SET_MSRS:
2485 r = msr_io(vcpu, argp, do_set_msr, 0);
2486 break;
2487 case KVM_TPR_ACCESS_REPORTING: {
2488 struct kvm_tpr_access_ctl tac;
2489
2490 r = -EFAULT;
2491 if (copy_from_user(&tac, argp, sizeof tac))
2492 goto out;
2493 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2494 if (r)
2495 goto out;
2496 r = -EFAULT;
2497 if (copy_to_user(argp, &tac, sizeof tac))
2498 goto out;
2499 r = 0;
2500 break;
2501 };
2502 case KVM_SET_VAPIC_ADDR: {
2503 struct kvm_vapic_addr va;
2504
2505 r = -EINVAL;
2506 if (!irqchip_in_kernel(vcpu->kvm))
2507 goto out;
2508 r = -EFAULT;
2509 if (copy_from_user(&va, argp, sizeof va))
2510 goto out;
2511 r = 0;
2512 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2513 break;
2514 }
2515 case KVM_X86_SETUP_MCE: {
2516 u64 mcg_cap;
2517
2518 r = -EFAULT;
2519 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2520 goto out;
2521 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2522 break;
2523 }
2524 case KVM_X86_SET_MCE: {
2525 struct kvm_x86_mce mce;
2526
2527 r = -EFAULT;
2528 if (copy_from_user(&mce, argp, sizeof mce))
2529 goto out;
2530 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2531 break;
2532 }
2533 case KVM_GET_VCPU_EVENTS: {
2534 struct kvm_vcpu_events events;
2535
2536 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2537
2538 r = -EFAULT;
2539 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2540 break;
2541 r = 0;
2542 break;
2543 }
2544 case KVM_SET_VCPU_EVENTS: {
2545 struct kvm_vcpu_events events;
2546
2547 r = -EFAULT;
2548 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2549 break;
2550
2551 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2552 break;
2553 }
2554 case KVM_GET_DEBUGREGS: {
2555 struct kvm_debugregs dbgregs;
2556
2557 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2558
2559 r = -EFAULT;
2560 if (copy_to_user(argp, &dbgregs,
2561 sizeof(struct kvm_debugregs)))
2562 break;
2563 r = 0;
2564 break;
2565 }
2566 case KVM_SET_DEBUGREGS: {
2567 struct kvm_debugregs dbgregs;
2568
2569 r = -EFAULT;
2570 if (copy_from_user(&dbgregs, argp,
2571 sizeof(struct kvm_debugregs)))
2572 break;
2573
2574 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2575 break;
2576 }
2577 default:
2578 r = -EINVAL;
2579 }
2580 out:
2581 kfree(lapic);
2582 return r;
2583 }
2584
2585 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2586 {
2587 int ret;
2588
2589 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2590 return -1;
2591 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2592 return ret;
2593 }
2594
2595 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2596 u64 ident_addr)
2597 {
2598 kvm->arch.ept_identity_map_addr = ident_addr;
2599 return 0;
2600 }
2601
2602 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2603 u32 kvm_nr_mmu_pages)
2604 {
2605 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2606 return -EINVAL;
2607
2608 mutex_lock(&kvm->slots_lock);
2609 spin_lock(&kvm->mmu_lock);
2610
2611 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2612 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2613
2614 spin_unlock(&kvm->mmu_lock);
2615 mutex_unlock(&kvm->slots_lock);
2616 return 0;
2617 }
2618
2619 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2620 {
2621 return kvm->arch.n_alloc_mmu_pages;
2622 }
2623
2624 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2625 {
2626 int i;
2627 struct kvm_mem_alias *alias;
2628 struct kvm_mem_aliases *aliases;
2629
2630 aliases = kvm_aliases(kvm);
2631
2632 for (i = 0; i < aliases->naliases; ++i) {
2633 alias = &aliases->aliases[i];
2634 if (alias->flags & KVM_ALIAS_INVALID)
2635 continue;
2636 if (gfn >= alias->base_gfn
2637 && gfn < alias->base_gfn + alias->npages)
2638 return alias->target_gfn + gfn - alias->base_gfn;
2639 }
2640 return gfn;
2641 }
2642
2643 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2644 {
2645 int i;
2646 struct kvm_mem_alias *alias;
2647 struct kvm_mem_aliases *aliases;
2648
2649 aliases = kvm_aliases(kvm);
2650
2651 for (i = 0; i < aliases->naliases; ++i) {
2652 alias = &aliases->aliases[i];
2653 if (gfn >= alias->base_gfn
2654 && gfn < alias->base_gfn + alias->npages)
2655 return alias->target_gfn + gfn - alias->base_gfn;
2656 }
2657 return gfn;
2658 }
2659
2660 /*
2661 * Set a new alias region. Aliases map a portion of physical memory into
2662 * another portion. This is useful for memory windows, for example the PC
2663 * VGA region.
2664 */
2665 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2666 struct kvm_memory_alias *alias)
2667 {
2668 int r, n;
2669 struct kvm_mem_alias *p;
2670 struct kvm_mem_aliases *aliases, *old_aliases;
2671
2672 r = -EINVAL;
2673 /* General sanity checks */
2674 if (alias->memory_size & (PAGE_SIZE - 1))
2675 goto out;
2676 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2677 goto out;
2678 if (alias->slot >= KVM_ALIAS_SLOTS)
2679 goto out;
2680 if (alias->guest_phys_addr + alias->memory_size
2681 < alias->guest_phys_addr)
2682 goto out;
2683 if (alias->target_phys_addr + alias->memory_size
2684 < alias->target_phys_addr)
2685 goto out;
2686
2687 r = -ENOMEM;
2688 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2689 if (!aliases)
2690 goto out;
2691
2692 mutex_lock(&kvm->slots_lock);
2693
2694 /* invalidate any gfn reference in case of deletion/shrinking */
2695 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2696 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2697 old_aliases = kvm->arch.aliases;
2698 rcu_assign_pointer(kvm->arch.aliases, aliases);
2699 synchronize_srcu_expedited(&kvm->srcu);
2700 kvm_mmu_zap_all(kvm);
2701 kfree(old_aliases);
2702
2703 r = -ENOMEM;
2704 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2705 if (!aliases)
2706 goto out_unlock;
2707
2708 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2709
2710 p = &aliases->aliases[alias->slot];
2711 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2712 p->npages = alias->memory_size >> PAGE_SHIFT;
2713 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2714 p->flags &= ~(KVM_ALIAS_INVALID);
2715
2716 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2717 if (aliases->aliases[n - 1].npages)
2718 break;
2719 aliases->naliases = n;
2720
2721 old_aliases = kvm->arch.aliases;
2722 rcu_assign_pointer(kvm->arch.aliases, aliases);
2723 synchronize_srcu_expedited(&kvm->srcu);
2724 kfree(old_aliases);
2725 r = 0;
2726
2727 out_unlock:
2728 mutex_unlock(&kvm->slots_lock);
2729 out:
2730 return r;
2731 }
2732
2733 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2734 {
2735 int r;
2736
2737 r = 0;
2738 switch (chip->chip_id) {
2739 case KVM_IRQCHIP_PIC_MASTER:
2740 memcpy(&chip->chip.pic,
2741 &pic_irqchip(kvm)->pics[0],
2742 sizeof(struct kvm_pic_state));
2743 break;
2744 case KVM_IRQCHIP_PIC_SLAVE:
2745 memcpy(&chip->chip.pic,
2746 &pic_irqchip(kvm)->pics[1],
2747 sizeof(struct kvm_pic_state));
2748 break;
2749 case KVM_IRQCHIP_IOAPIC:
2750 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2751 break;
2752 default:
2753 r = -EINVAL;
2754 break;
2755 }
2756 return r;
2757 }
2758
2759 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2760 {
2761 int r;
2762
2763 r = 0;
2764 switch (chip->chip_id) {
2765 case KVM_IRQCHIP_PIC_MASTER:
2766 raw_spin_lock(&pic_irqchip(kvm)->lock);
2767 memcpy(&pic_irqchip(kvm)->pics[0],
2768 &chip->chip.pic,
2769 sizeof(struct kvm_pic_state));
2770 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2771 break;
2772 case KVM_IRQCHIP_PIC_SLAVE:
2773 raw_spin_lock(&pic_irqchip(kvm)->lock);
2774 memcpy(&pic_irqchip(kvm)->pics[1],
2775 &chip->chip.pic,
2776 sizeof(struct kvm_pic_state));
2777 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2778 break;
2779 case KVM_IRQCHIP_IOAPIC:
2780 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2781 break;
2782 default:
2783 r = -EINVAL;
2784 break;
2785 }
2786 kvm_pic_update_irq(pic_irqchip(kvm));
2787 return r;
2788 }
2789
2790 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2791 {
2792 int r = 0;
2793
2794 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2795 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2796 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2797 return r;
2798 }
2799
2800 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2801 {
2802 int r = 0;
2803
2804 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2805 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2806 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2807 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2808 return r;
2809 }
2810
2811 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2812 {
2813 int r = 0;
2814
2815 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2816 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2817 sizeof(ps->channels));
2818 ps->flags = kvm->arch.vpit->pit_state.flags;
2819 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2820 return r;
2821 }
2822
2823 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2824 {
2825 int r = 0, start = 0;
2826 u32 prev_legacy, cur_legacy;
2827 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2828 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2829 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2830 if (!prev_legacy && cur_legacy)
2831 start = 1;
2832 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2833 sizeof(kvm->arch.vpit->pit_state.channels));
2834 kvm->arch.vpit->pit_state.flags = ps->flags;
2835 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2836 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2837 return r;
2838 }
2839
2840 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2841 struct kvm_reinject_control *control)
2842 {
2843 if (!kvm->arch.vpit)
2844 return -ENXIO;
2845 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2846 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2847 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2848 return 0;
2849 }
2850
2851 /*
2852 * Get (and clear) the dirty memory log for a memory slot.
2853 */
2854 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2855 struct kvm_dirty_log *log)
2856 {
2857 int r, i;
2858 struct kvm_memory_slot *memslot;
2859 unsigned long n;
2860 unsigned long is_dirty = 0;
2861
2862 mutex_lock(&kvm->slots_lock);
2863
2864 r = -EINVAL;
2865 if (log->slot >= KVM_MEMORY_SLOTS)
2866 goto out;
2867
2868 memslot = &kvm->memslots->memslots[log->slot];
2869 r = -ENOENT;
2870 if (!memslot->dirty_bitmap)
2871 goto out;
2872
2873 n = kvm_dirty_bitmap_bytes(memslot);
2874
2875 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2876 is_dirty = memslot->dirty_bitmap[i];
2877
2878 /* If nothing is dirty, don't bother messing with page tables. */
2879 if (is_dirty) {
2880 struct kvm_memslots *slots, *old_slots;
2881 unsigned long *dirty_bitmap;
2882
2883 spin_lock(&kvm->mmu_lock);
2884 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2885 spin_unlock(&kvm->mmu_lock);
2886
2887 r = -ENOMEM;
2888 dirty_bitmap = vmalloc(n);
2889 if (!dirty_bitmap)
2890 goto out;
2891 memset(dirty_bitmap, 0, n);
2892
2893 r = -ENOMEM;
2894 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2895 if (!slots) {
2896 vfree(dirty_bitmap);
2897 goto out;
2898 }
2899 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2900 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2901
2902 old_slots = kvm->memslots;
2903 rcu_assign_pointer(kvm->memslots, slots);
2904 synchronize_srcu_expedited(&kvm->srcu);
2905 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2906 kfree(old_slots);
2907
2908 r = -EFAULT;
2909 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2910 vfree(dirty_bitmap);
2911 goto out;
2912 }
2913 vfree(dirty_bitmap);
2914 } else {
2915 r = -EFAULT;
2916 if (clear_user(log->dirty_bitmap, n))
2917 goto out;
2918 }
2919
2920 r = 0;
2921 out:
2922 mutex_unlock(&kvm->slots_lock);
2923 return r;
2924 }
2925
2926 long kvm_arch_vm_ioctl(struct file *filp,
2927 unsigned int ioctl, unsigned long arg)
2928 {
2929 struct kvm *kvm = filp->private_data;
2930 void __user *argp = (void __user *)arg;
2931 int r = -ENOTTY;
2932 /*
2933 * This union makes it completely explicit to gcc-3.x
2934 * that these two variables' stack usage should be
2935 * combined, not added together.
2936 */
2937 union {
2938 struct kvm_pit_state ps;
2939 struct kvm_pit_state2 ps2;
2940 struct kvm_memory_alias alias;
2941 struct kvm_pit_config pit_config;
2942 } u;
2943
2944 switch (ioctl) {
2945 case KVM_SET_TSS_ADDR:
2946 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2947 if (r < 0)
2948 goto out;
2949 break;
2950 case KVM_SET_IDENTITY_MAP_ADDR: {
2951 u64 ident_addr;
2952
2953 r = -EFAULT;
2954 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2955 goto out;
2956 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2957 if (r < 0)
2958 goto out;
2959 break;
2960 }
2961 case KVM_SET_MEMORY_REGION: {
2962 struct kvm_memory_region kvm_mem;
2963 struct kvm_userspace_memory_region kvm_userspace_mem;
2964
2965 r = -EFAULT;
2966 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2967 goto out;
2968 kvm_userspace_mem.slot = kvm_mem.slot;
2969 kvm_userspace_mem.flags = kvm_mem.flags;
2970 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2971 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2972 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2973 if (r)
2974 goto out;
2975 break;
2976 }
2977 case KVM_SET_NR_MMU_PAGES:
2978 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2979 if (r)
2980 goto out;
2981 break;
2982 case KVM_GET_NR_MMU_PAGES:
2983 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2984 break;
2985 case KVM_SET_MEMORY_ALIAS:
2986 r = -EFAULT;
2987 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2988 goto out;
2989 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2990 if (r)
2991 goto out;
2992 break;
2993 case KVM_CREATE_IRQCHIP: {
2994 struct kvm_pic *vpic;
2995
2996 mutex_lock(&kvm->lock);
2997 r = -EEXIST;
2998 if (kvm->arch.vpic)
2999 goto create_irqchip_unlock;
3000 r = -ENOMEM;
3001 vpic = kvm_create_pic(kvm);
3002 if (vpic) {
3003 r = kvm_ioapic_init(kvm);
3004 if (r) {
3005 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3006 &vpic->dev);
3007 kfree(vpic);
3008 goto create_irqchip_unlock;
3009 }
3010 } else
3011 goto create_irqchip_unlock;
3012 smp_wmb();
3013 kvm->arch.vpic = vpic;
3014 smp_wmb();
3015 r = kvm_setup_default_irq_routing(kvm);
3016 if (r) {
3017 mutex_lock(&kvm->irq_lock);
3018 kvm_ioapic_destroy(kvm);
3019 kvm_destroy_pic(kvm);
3020 mutex_unlock(&kvm->irq_lock);
3021 }
3022 create_irqchip_unlock:
3023 mutex_unlock(&kvm->lock);
3024 break;
3025 }
3026 case KVM_CREATE_PIT:
3027 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3028 goto create_pit;
3029 case KVM_CREATE_PIT2:
3030 r = -EFAULT;
3031 if (copy_from_user(&u.pit_config, argp,
3032 sizeof(struct kvm_pit_config)))
3033 goto out;
3034 create_pit:
3035 mutex_lock(&kvm->slots_lock);
3036 r = -EEXIST;
3037 if (kvm->arch.vpit)
3038 goto create_pit_unlock;
3039 r = -ENOMEM;
3040 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3041 if (kvm->arch.vpit)
3042 r = 0;
3043 create_pit_unlock:
3044 mutex_unlock(&kvm->slots_lock);
3045 break;
3046 case KVM_IRQ_LINE_STATUS:
3047 case KVM_IRQ_LINE: {
3048 struct kvm_irq_level irq_event;
3049
3050 r = -EFAULT;
3051 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3052 goto out;
3053 r = -ENXIO;
3054 if (irqchip_in_kernel(kvm)) {
3055 __s32 status;
3056 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3057 irq_event.irq, irq_event.level);
3058 if (ioctl == KVM_IRQ_LINE_STATUS) {
3059 r = -EFAULT;
3060 irq_event.status = status;
3061 if (copy_to_user(argp, &irq_event,
3062 sizeof irq_event))
3063 goto out;
3064 }
3065 r = 0;
3066 }
3067 break;
3068 }
3069 case KVM_GET_IRQCHIP: {
3070 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3071 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3072
3073 r = -ENOMEM;
3074 if (!chip)
3075 goto out;
3076 r = -EFAULT;
3077 if (copy_from_user(chip, argp, sizeof *chip))
3078 goto get_irqchip_out;
3079 r = -ENXIO;
3080 if (!irqchip_in_kernel(kvm))
3081 goto get_irqchip_out;
3082 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3083 if (r)
3084 goto get_irqchip_out;
3085 r = -EFAULT;
3086 if (copy_to_user(argp, chip, sizeof *chip))
3087 goto get_irqchip_out;
3088 r = 0;
3089 get_irqchip_out:
3090 kfree(chip);
3091 if (r)
3092 goto out;
3093 break;
3094 }
3095 case KVM_SET_IRQCHIP: {
3096 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3097 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3098
3099 r = -ENOMEM;
3100 if (!chip)
3101 goto out;
3102 r = -EFAULT;
3103 if (copy_from_user(chip, argp, sizeof *chip))
3104 goto set_irqchip_out;
3105 r = -ENXIO;
3106 if (!irqchip_in_kernel(kvm))
3107 goto set_irqchip_out;
3108 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3109 if (r)
3110 goto set_irqchip_out;
3111 r = 0;
3112 set_irqchip_out:
3113 kfree(chip);
3114 if (r)
3115 goto out;
3116 break;
3117 }
3118 case KVM_GET_PIT: {
3119 r = -EFAULT;
3120 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3121 goto out;
3122 r = -ENXIO;
3123 if (!kvm->arch.vpit)
3124 goto out;
3125 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3126 if (r)
3127 goto out;
3128 r = -EFAULT;
3129 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3130 goto out;
3131 r = 0;
3132 break;
3133 }
3134 case KVM_SET_PIT: {
3135 r = -EFAULT;
3136 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3137 goto out;
3138 r = -ENXIO;
3139 if (!kvm->arch.vpit)
3140 goto out;
3141 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3142 if (r)
3143 goto out;
3144 r = 0;
3145 break;
3146 }
3147 case KVM_GET_PIT2: {
3148 r = -ENXIO;
3149 if (!kvm->arch.vpit)
3150 goto out;
3151 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3152 if (r)
3153 goto out;
3154 r = -EFAULT;
3155 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3156 goto out;
3157 r = 0;
3158 break;
3159 }
3160 case KVM_SET_PIT2: {
3161 r = -EFAULT;
3162 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3163 goto out;
3164 r = -ENXIO;
3165 if (!kvm->arch.vpit)
3166 goto out;
3167 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3168 if (r)
3169 goto out;
3170 r = 0;
3171 break;
3172 }
3173 case KVM_REINJECT_CONTROL: {
3174 struct kvm_reinject_control control;
3175 r = -EFAULT;
3176 if (copy_from_user(&control, argp, sizeof(control)))
3177 goto out;
3178 r = kvm_vm_ioctl_reinject(kvm, &control);
3179 if (r)
3180 goto out;
3181 r = 0;
3182 break;
3183 }
3184 case KVM_XEN_HVM_CONFIG: {
3185 r = -EFAULT;
3186 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3187 sizeof(struct kvm_xen_hvm_config)))
3188 goto out;
3189 r = -EINVAL;
3190 if (kvm->arch.xen_hvm_config.flags)
3191 goto out;
3192 r = 0;
3193 break;
3194 }
3195 case KVM_SET_CLOCK: {
3196 struct timespec now;
3197 struct kvm_clock_data user_ns;
3198 u64 now_ns;
3199 s64 delta;
3200
3201 r = -EFAULT;
3202 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3203 goto out;
3204
3205 r = -EINVAL;
3206 if (user_ns.flags)
3207 goto out;
3208
3209 r = 0;
3210 ktime_get_ts(&now);
3211 now_ns = timespec_to_ns(&now);
3212 delta = user_ns.clock - now_ns;
3213 kvm->arch.kvmclock_offset = delta;
3214 break;
3215 }
3216 case KVM_GET_CLOCK: {
3217 struct timespec now;
3218 struct kvm_clock_data user_ns;
3219 u64 now_ns;
3220
3221 ktime_get_ts(&now);
3222 now_ns = timespec_to_ns(&now);
3223 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3224 user_ns.flags = 0;
3225
3226 r = -EFAULT;
3227 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3228 goto out;
3229 r = 0;
3230 break;
3231 }
3232
3233 default:
3234 ;
3235 }
3236 out:
3237 return r;
3238 }
3239
3240 static void kvm_init_msr_list(void)
3241 {
3242 u32 dummy[2];
3243 unsigned i, j;
3244
3245 /* skip the first msrs in the list. KVM-specific */
3246 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3247 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3248 continue;
3249 if (j < i)
3250 msrs_to_save[j] = msrs_to_save[i];
3251 j++;
3252 }
3253 num_msrs_to_save = j;
3254 }
3255
3256 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3257 const void *v)
3258 {
3259 if (vcpu->arch.apic &&
3260 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3261 return 0;
3262
3263 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3264 }
3265
3266 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3267 {
3268 if (vcpu->arch.apic &&
3269 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3270 return 0;
3271
3272 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3273 }
3274
3275 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3276 struct kvm_segment *var, int seg)
3277 {
3278 kvm_x86_ops->set_segment(vcpu, var, seg);
3279 }
3280
3281 void kvm_get_segment(struct kvm_vcpu *vcpu,
3282 struct kvm_segment *var, int seg)
3283 {
3284 kvm_x86_ops->get_segment(vcpu, var, seg);
3285 }
3286
3287 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3288 {
3289 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3290 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3291 }
3292
3293 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3294 {
3295 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3296 access |= PFERR_FETCH_MASK;
3297 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3298 }
3299
3300 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3301 {
3302 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3303 access |= PFERR_WRITE_MASK;
3304 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3305 }
3306
3307 /* uses this to access any guest's mapped memory without checking CPL */
3308 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3309 {
3310 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3311 }
3312
3313 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3314 struct kvm_vcpu *vcpu, u32 access,
3315 u32 *error)
3316 {
3317 void *data = val;
3318 int r = X86EMUL_CONTINUE;
3319
3320 while (bytes) {
3321 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3322 unsigned offset = addr & (PAGE_SIZE-1);
3323 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3324 int ret;
3325
3326 if (gpa == UNMAPPED_GVA) {
3327 r = X86EMUL_PROPAGATE_FAULT;
3328 goto out;
3329 }
3330 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3331 if (ret < 0) {
3332 r = X86EMUL_IO_NEEDED;
3333 goto out;
3334 }
3335
3336 bytes -= toread;
3337 data += toread;
3338 addr += toread;
3339 }
3340 out:
3341 return r;
3342 }
3343
3344 /* used for instruction fetching */
3345 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3346 struct kvm_vcpu *vcpu, u32 *error)
3347 {
3348 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3349 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3350 access | PFERR_FETCH_MASK, error);
3351 }
3352
3353 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3354 struct kvm_vcpu *vcpu, u32 *error)
3355 {
3356 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3357 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3358 error);
3359 }
3360
3361 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3362 struct kvm_vcpu *vcpu, u32 *error)
3363 {
3364 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3365 }
3366
3367 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3368 unsigned int bytes,
3369 struct kvm_vcpu *vcpu,
3370 u32 *error)
3371 {
3372 void *data = val;
3373 int r = X86EMUL_CONTINUE;
3374
3375 while (bytes) {
3376 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3377 PFERR_WRITE_MASK, error);
3378 unsigned offset = addr & (PAGE_SIZE-1);
3379 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3380 int ret;
3381
3382 if (gpa == UNMAPPED_GVA) {
3383 r = X86EMUL_PROPAGATE_FAULT;
3384 goto out;
3385 }
3386 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3387 if (ret < 0) {
3388 r = X86EMUL_IO_NEEDED;
3389 goto out;
3390 }
3391
3392 bytes -= towrite;
3393 data += towrite;
3394 addr += towrite;
3395 }
3396 out:
3397 return r;
3398 }
3399
3400 static int emulator_read_emulated(unsigned long addr,
3401 void *val,
3402 unsigned int bytes,
3403 unsigned int *error_code,
3404 struct kvm_vcpu *vcpu)
3405 {
3406 gpa_t gpa;
3407
3408 if (vcpu->mmio_read_completed) {
3409 memcpy(val, vcpu->mmio_data, bytes);
3410 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3411 vcpu->mmio_phys_addr, *(u64 *)val);
3412 vcpu->mmio_read_completed = 0;
3413 return X86EMUL_CONTINUE;
3414 }
3415
3416 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3417
3418 if (gpa == UNMAPPED_GVA)
3419 return X86EMUL_PROPAGATE_FAULT;
3420
3421 /* For APIC access vmexit */
3422 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3423 goto mmio;
3424
3425 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3426 == X86EMUL_CONTINUE)
3427 return X86EMUL_CONTINUE;
3428
3429 mmio:
3430 /*
3431 * Is this MMIO handled locally?
3432 */
3433 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3434 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3435 return X86EMUL_CONTINUE;
3436 }
3437
3438 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3439
3440 vcpu->mmio_needed = 1;
3441 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3442 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3443 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3444 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3445
3446 return X86EMUL_IO_NEEDED;
3447 }
3448
3449 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3450 const void *val, int bytes)
3451 {
3452 int ret;
3453
3454 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3455 if (ret < 0)
3456 return 0;
3457 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3458 return 1;
3459 }
3460
3461 static int emulator_write_emulated_onepage(unsigned long addr,
3462 const void *val,
3463 unsigned int bytes,
3464 unsigned int *error_code,
3465 struct kvm_vcpu *vcpu)
3466 {
3467 gpa_t gpa;
3468
3469 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3470
3471 if (gpa == UNMAPPED_GVA)
3472 return X86EMUL_PROPAGATE_FAULT;
3473
3474 /* For APIC access vmexit */
3475 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3476 goto mmio;
3477
3478 if (emulator_write_phys(vcpu, gpa, val, bytes))
3479 return X86EMUL_CONTINUE;
3480
3481 mmio:
3482 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3483 /*
3484 * Is this MMIO handled locally?
3485 */
3486 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3487 return X86EMUL_CONTINUE;
3488
3489 vcpu->mmio_needed = 1;
3490 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3491 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3492 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3493 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3494 memcpy(vcpu->run->mmio.data, val, bytes);
3495
3496 return X86EMUL_CONTINUE;
3497 }
3498
3499 int emulator_write_emulated(unsigned long addr,
3500 const void *val,
3501 unsigned int bytes,
3502 unsigned int *error_code,
3503 struct kvm_vcpu *vcpu)
3504 {
3505 /* Crossing a page boundary? */
3506 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3507 int rc, now;
3508
3509 now = -addr & ~PAGE_MASK;
3510 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3511 vcpu);
3512 if (rc != X86EMUL_CONTINUE)
3513 return rc;
3514 addr += now;
3515 val += now;
3516 bytes -= now;
3517 }
3518 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3519 vcpu);
3520 }
3521
3522 #define CMPXCHG_TYPE(t, ptr, old, new) \
3523 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3524
3525 #ifdef CONFIG_X86_64
3526 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3527 #else
3528 # define CMPXCHG64(ptr, old, new) \
3529 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3530 #endif
3531
3532 static int emulator_cmpxchg_emulated(unsigned long addr,
3533 const void *old,
3534 const void *new,
3535 unsigned int bytes,
3536 unsigned int *error_code,
3537 struct kvm_vcpu *vcpu)
3538 {
3539 gpa_t gpa;
3540 struct page *page;
3541 char *kaddr;
3542 bool exchanged;
3543
3544 /* guests cmpxchg8b have to be emulated atomically */
3545 if (bytes > 8 || (bytes & (bytes - 1)))
3546 goto emul_write;
3547
3548 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3549
3550 if (gpa == UNMAPPED_GVA ||
3551 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3552 goto emul_write;
3553
3554 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3555 goto emul_write;
3556
3557 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3558
3559 kaddr = kmap_atomic(page, KM_USER0);
3560 kaddr += offset_in_page(gpa);
3561 switch (bytes) {
3562 case 1:
3563 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3564 break;
3565 case 2:
3566 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3567 break;
3568 case 4:
3569 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3570 break;
3571 case 8:
3572 exchanged = CMPXCHG64(kaddr, old, new);
3573 break;
3574 default:
3575 BUG();
3576 }
3577 kunmap_atomic(kaddr, KM_USER0);
3578 kvm_release_page_dirty(page);
3579
3580 if (!exchanged)
3581 return X86EMUL_CMPXCHG_FAILED;
3582
3583 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3584
3585 return X86EMUL_CONTINUE;
3586
3587 emul_write:
3588 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3589
3590 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3591 }
3592
3593 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3594 {
3595 /* TODO: String I/O for in kernel device */
3596 int r;
3597
3598 if (vcpu->arch.pio.in)
3599 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3600 vcpu->arch.pio.size, pd);
3601 else
3602 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3603 vcpu->arch.pio.port, vcpu->arch.pio.size,
3604 pd);
3605 return r;
3606 }
3607
3608
3609 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3610 unsigned int count, struct kvm_vcpu *vcpu)
3611 {
3612 if (vcpu->arch.pio.count)
3613 goto data_avail;
3614
3615 trace_kvm_pio(1, port, size, 1);
3616
3617 vcpu->arch.pio.port = port;
3618 vcpu->arch.pio.in = 1;
3619 vcpu->arch.pio.count = count;
3620 vcpu->arch.pio.size = size;
3621
3622 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3623 data_avail:
3624 memcpy(val, vcpu->arch.pio_data, size * count);
3625 vcpu->arch.pio.count = 0;
3626 return 1;
3627 }
3628
3629 vcpu->run->exit_reason = KVM_EXIT_IO;
3630 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3631 vcpu->run->io.size = size;
3632 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3633 vcpu->run->io.count = count;
3634 vcpu->run->io.port = port;
3635
3636 return 0;
3637 }
3638
3639 static int emulator_pio_out_emulated(int size, unsigned short port,
3640 const void *val, unsigned int count,
3641 struct kvm_vcpu *vcpu)
3642 {
3643 trace_kvm_pio(0, port, size, 1);
3644
3645 vcpu->arch.pio.port = port;
3646 vcpu->arch.pio.in = 0;
3647 vcpu->arch.pio.count = count;
3648 vcpu->arch.pio.size = size;
3649
3650 memcpy(vcpu->arch.pio_data, val, size * count);
3651
3652 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3653 vcpu->arch.pio.count = 0;
3654 return 1;
3655 }
3656
3657 vcpu->run->exit_reason = KVM_EXIT_IO;
3658 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3659 vcpu->run->io.size = size;
3660 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3661 vcpu->run->io.count = count;
3662 vcpu->run->io.port = port;
3663
3664 return 0;
3665 }
3666
3667 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3668 {
3669 return kvm_x86_ops->get_segment_base(vcpu, seg);
3670 }
3671
3672 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3673 {
3674 kvm_mmu_invlpg(vcpu, address);
3675 return X86EMUL_CONTINUE;
3676 }
3677
3678 int emulate_clts(struct kvm_vcpu *vcpu)
3679 {
3680 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3681 kvm_x86_ops->fpu_activate(vcpu);
3682 return X86EMUL_CONTINUE;
3683 }
3684
3685 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3686 {
3687 return _kvm_get_dr(vcpu, dr, dest);
3688 }
3689
3690 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3691 {
3692
3693 return __kvm_set_dr(vcpu, dr, value);
3694 }
3695
3696 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3697 {
3698 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3699 }
3700
3701 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3702 {
3703 unsigned long value;
3704
3705 switch (cr) {
3706 case 0:
3707 value = kvm_read_cr0(vcpu);
3708 break;
3709 case 2:
3710 value = vcpu->arch.cr2;
3711 break;
3712 case 3:
3713 value = vcpu->arch.cr3;
3714 break;
3715 case 4:
3716 value = kvm_read_cr4(vcpu);
3717 break;
3718 case 8:
3719 value = kvm_get_cr8(vcpu);
3720 break;
3721 default:
3722 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3723 return 0;
3724 }
3725
3726 return value;
3727 }
3728
3729 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3730 {
3731 int res = 0;
3732
3733 switch (cr) {
3734 case 0:
3735 res = __kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3736 break;
3737 case 2:
3738 vcpu->arch.cr2 = val;
3739 break;
3740 case 3:
3741 res = __kvm_set_cr3(vcpu, val);
3742 break;
3743 case 4:
3744 res = __kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3745 break;
3746 case 8:
3747 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3748 break;
3749 default:
3750 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3751 res = -1;
3752 }
3753
3754 return res;
3755 }
3756
3757 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3758 {
3759 return kvm_x86_ops->get_cpl(vcpu);
3760 }
3761
3762 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3763 {
3764 kvm_x86_ops->get_gdt(vcpu, dt);
3765 }
3766
3767 static unsigned long emulator_get_cached_segment_base(int seg,
3768 struct kvm_vcpu *vcpu)
3769 {
3770 return get_segment_base(vcpu, seg);
3771 }
3772
3773 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3774 struct kvm_vcpu *vcpu)
3775 {
3776 struct kvm_segment var;
3777
3778 kvm_get_segment(vcpu, &var, seg);
3779
3780 if (var.unusable)
3781 return false;
3782
3783 if (var.g)
3784 var.limit >>= 12;
3785 set_desc_limit(desc, var.limit);
3786 set_desc_base(desc, (unsigned long)var.base);
3787 desc->type = var.type;
3788 desc->s = var.s;
3789 desc->dpl = var.dpl;
3790 desc->p = var.present;
3791 desc->avl = var.avl;
3792 desc->l = var.l;
3793 desc->d = var.db;
3794 desc->g = var.g;
3795
3796 return true;
3797 }
3798
3799 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3800 struct kvm_vcpu *vcpu)
3801 {
3802 struct kvm_segment var;
3803
3804 /* needed to preserve selector */
3805 kvm_get_segment(vcpu, &var, seg);
3806
3807 var.base = get_desc_base(desc);
3808 var.limit = get_desc_limit(desc);
3809 if (desc->g)
3810 var.limit = (var.limit << 12) | 0xfff;
3811 var.type = desc->type;
3812 var.present = desc->p;
3813 var.dpl = desc->dpl;
3814 var.db = desc->d;
3815 var.s = desc->s;
3816 var.l = desc->l;
3817 var.g = desc->g;
3818 var.avl = desc->avl;
3819 var.present = desc->p;
3820 var.unusable = !var.present;
3821 var.padding = 0;
3822
3823 kvm_set_segment(vcpu, &var, seg);
3824 return;
3825 }
3826
3827 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3828 {
3829 struct kvm_segment kvm_seg;
3830
3831 kvm_get_segment(vcpu, &kvm_seg, seg);
3832 return kvm_seg.selector;
3833 }
3834
3835 static void emulator_set_segment_selector(u16 sel, int seg,
3836 struct kvm_vcpu *vcpu)
3837 {
3838 struct kvm_segment kvm_seg;
3839
3840 kvm_get_segment(vcpu, &kvm_seg, seg);
3841 kvm_seg.selector = sel;
3842 kvm_set_segment(vcpu, &kvm_seg, seg);
3843 }
3844
3845 static struct x86_emulate_ops emulate_ops = {
3846 .read_std = kvm_read_guest_virt_system,
3847 .write_std = kvm_write_guest_virt_system,
3848 .fetch = kvm_fetch_guest_virt,
3849 .read_emulated = emulator_read_emulated,
3850 .write_emulated = emulator_write_emulated,
3851 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3852 .pio_in_emulated = emulator_pio_in_emulated,
3853 .pio_out_emulated = emulator_pio_out_emulated,
3854 .get_cached_descriptor = emulator_get_cached_descriptor,
3855 .set_cached_descriptor = emulator_set_cached_descriptor,
3856 .get_segment_selector = emulator_get_segment_selector,
3857 .set_segment_selector = emulator_set_segment_selector,
3858 .get_cached_segment_base = emulator_get_cached_segment_base,
3859 .get_gdt = emulator_get_gdt,
3860 .get_cr = emulator_get_cr,
3861 .set_cr = emulator_set_cr,
3862 .cpl = emulator_get_cpl,
3863 .get_dr = emulator_get_dr,
3864 .set_dr = emulator_set_dr,
3865 .set_msr = kvm_set_msr,
3866 .get_msr = kvm_get_msr,
3867 };
3868
3869 static void cache_all_regs(struct kvm_vcpu *vcpu)
3870 {
3871 kvm_register_read(vcpu, VCPU_REGS_RAX);
3872 kvm_register_read(vcpu, VCPU_REGS_RSP);
3873 kvm_register_read(vcpu, VCPU_REGS_RIP);
3874 vcpu->arch.regs_dirty = ~0;
3875 }
3876
3877 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3878 {
3879 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
3880 /*
3881 * an sti; sti; sequence only disable interrupts for the first
3882 * instruction. So, if the last instruction, be it emulated or
3883 * not, left the system with the INT_STI flag enabled, it
3884 * means that the last instruction is an sti. We should not
3885 * leave the flag on in this case. The same goes for mov ss
3886 */
3887 if (!(int_shadow & mask))
3888 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
3889 }
3890
3891 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
3892 {
3893 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
3894 if (ctxt->exception == PF_VECTOR)
3895 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
3896 else if (ctxt->error_code_valid)
3897 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
3898 else
3899 kvm_queue_exception(vcpu, ctxt->exception);
3900 }
3901
3902 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
3903 {
3904 ++vcpu->stat.insn_emulation_fail;
3905 trace_kvm_emulate_insn_failed(vcpu);
3906 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3907 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
3908 vcpu->run->internal.ndata = 0;
3909 kvm_queue_exception(vcpu, UD_VECTOR);
3910 return EMULATE_FAIL;
3911 }
3912
3913 int emulate_instruction(struct kvm_vcpu *vcpu,
3914 unsigned long cr2,
3915 u16 error_code,
3916 int emulation_type)
3917 {
3918 int r;
3919 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
3920
3921 kvm_clear_exception_queue(vcpu);
3922 vcpu->arch.mmio_fault_cr2 = cr2;
3923 /*
3924 * TODO: fix emulate.c to use guest_read/write_register
3925 * instead of direct ->regs accesses, can save hundred cycles
3926 * on Intel for instructions that don't read/change RSP, for
3927 * for example.
3928 */
3929 cache_all_regs(vcpu);
3930
3931 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3932 int cs_db, cs_l;
3933 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3934
3935 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3936 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3937 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3938 vcpu->arch.emulate_ctxt.mode =
3939 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3940 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3941 ? X86EMUL_MODE_VM86 : cs_l
3942 ? X86EMUL_MODE_PROT64 : cs_db
3943 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3944 memset(c, 0, sizeof(struct decode_cache));
3945 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3946 vcpu->arch.emulate_ctxt.interruptibility = 0;
3947 vcpu->arch.emulate_ctxt.exception = -1;
3948
3949 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3950 trace_kvm_emulate_insn_start(vcpu);
3951
3952 /* Only allow emulation of specific instructions on #UD
3953 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3954 if (emulation_type & EMULTYPE_TRAP_UD) {
3955 if (!c->twobyte)
3956 return EMULATE_FAIL;
3957 switch (c->b) {
3958 case 0x01: /* VMMCALL */
3959 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3960 return EMULATE_FAIL;
3961 break;
3962 case 0x34: /* sysenter */
3963 case 0x35: /* sysexit */
3964 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3965 return EMULATE_FAIL;
3966 break;
3967 case 0x05: /* syscall */
3968 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3969 return EMULATE_FAIL;
3970 break;
3971 default:
3972 return EMULATE_FAIL;
3973 }
3974
3975 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3976 return EMULATE_FAIL;
3977 }
3978
3979 ++vcpu->stat.insn_emulation;
3980 if (r) {
3981 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3982 return EMULATE_DONE;
3983 if (emulation_type & EMULTYPE_SKIP)
3984 return EMULATE_FAIL;
3985 return handle_emulation_failure(vcpu);
3986 }
3987 }
3988
3989 if (emulation_type & EMULTYPE_SKIP) {
3990 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3991 return EMULATE_DONE;
3992 }
3993
3994 /* this is needed for vmware backdor interface to work since it
3995 changes registers values during IO operation */
3996 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3997
3998 restart:
3999 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
4000
4001 if (r) { /* emulation failed */
4002 /*
4003 * if emulation was due to access to shadowed page table
4004 * and it failed try to unshadow page and re-entetr the
4005 * guest to let CPU execute the instruction.
4006 */
4007 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
4008 return EMULATE_DONE;
4009
4010 return handle_emulation_failure(vcpu);
4011 }
4012
4013 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4014 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4015 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4016 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4017
4018 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4019 inject_emulated_exception(vcpu);
4020 return EMULATE_DONE;
4021 }
4022
4023 if (vcpu->arch.pio.count) {
4024 if (!vcpu->arch.pio.in)
4025 vcpu->arch.pio.count = 0;
4026 return EMULATE_DO_MMIO;
4027 }
4028
4029 if (vcpu->mmio_needed) {
4030 if (vcpu->mmio_is_write)
4031 vcpu->mmio_needed = 0;
4032 return EMULATE_DO_MMIO;
4033 }
4034
4035 if (vcpu->arch.emulate_ctxt.restart)
4036 goto restart;
4037
4038 return EMULATE_DONE;
4039 }
4040 EXPORT_SYMBOL_GPL(emulate_instruction);
4041
4042 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4043 {
4044 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4045 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4046 /* do not return to emulator after return from userspace */
4047 vcpu->arch.pio.count = 0;
4048 return ret;
4049 }
4050 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4051
4052 static void bounce_off(void *info)
4053 {
4054 /* nothing */
4055 }
4056
4057 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4058 void *data)
4059 {
4060 struct cpufreq_freqs *freq = data;
4061 struct kvm *kvm;
4062 struct kvm_vcpu *vcpu;
4063 int i, send_ipi = 0;
4064
4065 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4066 return 0;
4067 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4068 return 0;
4069 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
4070
4071 spin_lock(&kvm_lock);
4072 list_for_each_entry(kvm, &vm_list, vm_list) {
4073 kvm_for_each_vcpu(i, vcpu, kvm) {
4074 if (vcpu->cpu != freq->cpu)
4075 continue;
4076 if (!kvm_request_guest_time_update(vcpu))
4077 continue;
4078 if (vcpu->cpu != smp_processor_id())
4079 send_ipi++;
4080 }
4081 }
4082 spin_unlock(&kvm_lock);
4083
4084 if (freq->old < freq->new && send_ipi) {
4085 /*
4086 * We upscale the frequency. Must make the guest
4087 * doesn't see old kvmclock values while running with
4088 * the new frequency, otherwise we risk the guest sees
4089 * time go backwards.
4090 *
4091 * In case we update the frequency for another cpu
4092 * (which might be in guest context) send an interrupt
4093 * to kick the cpu out of guest context. Next time
4094 * guest context is entered kvmclock will be updated,
4095 * so the guest will not see stale values.
4096 */
4097 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4098 }
4099 return 0;
4100 }
4101
4102 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4103 .notifier_call = kvmclock_cpufreq_notifier
4104 };
4105
4106 static void kvm_timer_init(void)
4107 {
4108 int cpu;
4109
4110 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4111 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4112 CPUFREQ_TRANSITION_NOTIFIER);
4113 for_each_online_cpu(cpu) {
4114 unsigned long khz = cpufreq_get(cpu);
4115 if (!khz)
4116 khz = tsc_khz;
4117 per_cpu(cpu_tsc_khz, cpu) = khz;
4118 }
4119 } else {
4120 for_each_possible_cpu(cpu)
4121 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4122 }
4123 }
4124
4125 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4126
4127 static int kvm_is_in_guest(void)
4128 {
4129 return percpu_read(current_vcpu) != NULL;
4130 }
4131
4132 static int kvm_is_user_mode(void)
4133 {
4134 int user_mode = 3;
4135
4136 if (percpu_read(current_vcpu))
4137 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4138
4139 return user_mode != 0;
4140 }
4141
4142 static unsigned long kvm_get_guest_ip(void)
4143 {
4144 unsigned long ip = 0;
4145
4146 if (percpu_read(current_vcpu))
4147 ip = kvm_rip_read(percpu_read(current_vcpu));
4148
4149 return ip;
4150 }
4151
4152 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4153 .is_in_guest = kvm_is_in_guest,
4154 .is_user_mode = kvm_is_user_mode,
4155 .get_guest_ip = kvm_get_guest_ip,
4156 };
4157
4158 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4159 {
4160 percpu_write(current_vcpu, vcpu);
4161 }
4162 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4163
4164 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4165 {
4166 percpu_write(current_vcpu, NULL);
4167 }
4168 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4169
4170 int kvm_arch_init(void *opaque)
4171 {
4172 int r;
4173 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4174
4175 if (kvm_x86_ops) {
4176 printk(KERN_ERR "kvm: already loaded the other module\n");
4177 r = -EEXIST;
4178 goto out;
4179 }
4180
4181 if (!ops->cpu_has_kvm_support()) {
4182 printk(KERN_ERR "kvm: no hardware support\n");
4183 r = -EOPNOTSUPP;
4184 goto out;
4185 }
4186 if (ops->disabled_by_bios()) {
4187 printk(KERN_ERR "kvm: disabled by bios\n");
4188 r = -EOPNOTSUPP;
4189 goto out;
4190 }
4191
4192 r = kvm_mmu_module_init();
4193 if (r)
4194 goto out;
4195
4196 kvm_init_msr_list();
4197
4198 kvm_x86_ops = ops;
4199 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4200 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4201 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4202 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4203
4204 kvm_timer_init();
4205
4206 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4207
4208 if (cpu_has_xsave)
4209 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4210
4211 return 0;
4212
4213 out:
4214 return r;
4215 }
4216
4217 void kvm_arch_exit(void)
4218 {
4219 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4220
4221 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4222 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4223 CPUFREQ_TRANSITION_NOTIFIER);
4224 kvm_x86_ops = NULL;
4225 kvm_mmu_module_exit();
4226 }
4227
4228 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4229 {
4230 ++vcpu->stat.halt_exits;
4231 if (irqchip_in_kernel(vcpu->kvm)) {
4232 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4233 return 1;
4234 } else {
4235 vcpu->run->exit_reason = KVM_EXIT_HLT;
4236 return 0;
4237 }
4238 }
4239 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4240
4241 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4242 unsigned long a1)
4243 {
4244 if (is_long_mode(vcpu))
4245 return a0;
4246 else
4247 return a0 | ((gpa_t)a1 << 32);
4248 }
4249
4250 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4251 {
4252 u64 param, ingpa, outgpa, ret;
4253 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4254 bool fast, longmode;
4255 int cs_db, cs_l;
4256
4257 /*
4258 * hypercall generates UD from non zero cpl and real mode
4259 * per HYPER-V spec
4260 */
4261 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4262 kvm_queue_exception(vcpu, UD_VECTOR);
4263 return 0;
4264 }
4265
4266 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4267 longmode = is_long_mode(vcpu) && cs_l == 1;
4268
4269 if (!longmode) {
4270 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4271 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4272 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4273 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4274 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4275 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4276 }
4277 #ifdef CONFIG_X86_64
4278 else {
4279 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4280 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4281 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4282 }
4283 #endif
4284
4285 code = param & 0xffff;
4286 fast = (param >> 16) & 0x1;
4287 rep_cnt = (param >> 32) & 0xfff;
4288 rep_idx = (param >> 48) & 0xfff;
4289
4290 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4291
4292 switch (code) {
4293 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4294 kvm_vcpu_on_spin(vcpu);
4295 break;
4296 default:
4297 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4298 break;
4299 }
4300
4301 ret = res | (((u64)rep_done & 0xfff) << 32);
4302 if (longmode) {
4303 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4304 } else {
4305 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4306 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4307 }
4308
4309 return 1;
4310 }
4311
4312 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4313 {
4314 unsigned long nr, a0, a1, a2, a3, ret;
4315 int r = 1;
4316
4317 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4318 return kvm_hv_hypercall(vcpu);
4319
4320 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4321 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4322 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4323 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4324 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4325
4326 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4327
4328 if (!is_long_mode(vcpu)) {
4329 nr &= 0xFFFFFFFF;
4330 a0 &= 0xFFFFFFFF;
4331 a1 &= 0xFFFFFFFF;
4332 a2 &= 0xFFFFFFFF;
4333 a3 &= 0xFFFFFFFF;
4334 }
4335
4336 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4337 ret = -KVM_EPERM;
4338 goto out;
4339 }
4340
4341 switch (nr) {
4342 case KVM_HC_VAPIC_POLL_IRQ:
4343 ret = 0;
4344 break;
4345 case KVM_HC_MMU_OP:
4346 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4347 break;
4348 default:
4349 ret = -KVM_ENOSYS;
4350 break;
4351 }
4352 out:
4353 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4354 ++vcpu->stat.hypercalls;
4355 return r;
4356 }
4357 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4358
4359 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4360 {
4361 char instruction[3];
4362 unsigned long rip = kvm_rip_read(vcpu);
4363
4364 /*
4365 * Blow out the MMU to ensure that no other VCPU has an active mapping
4366 * to ensure that the updated hypercall appears atomically across all
4367 * VCPUs.
4368 */
4369 kvm_mmu_zap_all(vcpu->kvm);
4370
4371 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4372
4373 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4374 }
4375
4376 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4377 {
4378 struct desc_ptr dt = { limit, base };
4379
4380 kvm_x86_ops->set_gdt(vcpu, &dt);
4381 }
4382
4383 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4384 {
4385 struct desc_ptr dt = { limit, base };
4386
4387 kvm_x86_ops->set_idt(vcpu, &dt);
4388 }
4389
4390 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4391 {
4392 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4393 int j, nent = vcpu->arch.cpuid_nent;
4394
4395 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4396 /* when no next entry is found, the current entry[i] is reselected */
4397 for (j = i + 1; ; j = (j + 1) % nent) {
4398 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4399 if (ej->function == e->function) {
4400 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4401 return j;
4402 }
4403 }
4404 return 0; /* silence gcc, even though control never reaches here */
4405 }
4406
4407 /* find an entry with matching function, matching index (if needed), and that
4408 * should be read next (if it's stateful) */
4409 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4410 u32 function, u32 index)
4411 {
4412 if (e->function != function)
4413 return 0;
4414 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4415 return 0;
4416 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4417 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4418 return 0;
4419 return 1;
4420 }
4421
4422 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4423 u32 function, u32 index)
4424 {
4425 int i;
4426 struct kvm_cpuid_entry2 *best = NULL;
4427
4428 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4429 struct kvm_cpuid_entry2 *e;
4430
4431 e = &vcpu->arch.cpuid_entries[i];
4432 if (is_matching_cpuid_entry(e, function, index)) {
4433 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4434 move_to_next_stateful_cpuid_entry(vcpu, i);
4435 best = e;
4436 break;
4437 }
4438 /*
4439 * Both basic or both extended?
4440 */
4441 if (((e->function ^ function) & 0x80000000) == 0)
4442 if (!best || e->function > best->function)
4443 best = e;
4444 }
4445 return best;
4446 }
4447 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4448
4449 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4450 {
4451 struct kvm_cpuid_entry2 *best;
4452
4453 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4454 if (!best || best->eax < 0x80000008)
4455 goto not_found;
4456 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4457 if (best)
4458 return best->eax & 0xff;
4459 not_found:
4460 return 36;
4461 }
4462
4463 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4464 {
4465 u32 function, index;
4466 struct kvm_cpuid_entry2 *best;
4467
4468 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4469 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4470 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4471 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4472 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4473 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4474 best = kvm_find_cpuid_entry(vcpu, function, index);
4475 if (best) {
4476 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4477 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4478 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4479 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4480 }
4481 kvm_x86_ops->skip_emulated_instruction(vcpu);
4482 trace_kvm_cpuid(function,
4483 kvm_register_read(vcpu, VCPU_REGS_RAX),
4484 kvm_register_read(vcpu, VCPU_REGS_RBX),
4485 kvm_register_read(vcpu, VCPU_REGS_RCX),
4486 kvm_register_read(vcpu, VCPU_REGS_RDX));
4487 }
4488 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4489
4490 /*
4491 * Check if userspace requested an interrupt window, and that the
4492 * interrupt window is open.
4493 *
4494 * No need to exit to userspace if we already have an interrupt queued.
4495 */
4496 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4497 {
4498 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4499 vcpu->run->request_interrupt_window &&
4500 kvm_arch_interrupt_allowed(vcpu));
4501 }
4502
4503 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4504 {
4505 struct kvm_run *kvm_run = vcpu->run;
4506
4507 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4508 kvm_run->cr8 = kvm_get_cr8(vcpu);
4509 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4510 if (irqchip_in_kernel(vcpu->kvm))
4511 kvm_run->ready_for_interrupt_injection = 1;
4512 else
4513 kvm_run->ready_for_interrupt_injection =
4514 kvm_arch_interrupt_allowed(vcpu) &&
4515 !kvm_cpu_has_interrupt(vcpu) &&
4516 !kvm_event_needs_reinjection(vcpu);
4517 }
4518
4519 static void vapic_enter(struct kvm_vcpu *vcpu)
4520 {
4521 struct kvm_lapic *apic = vcpu->arch.apic;
4522 struct page *page;
4523
4524 if (!apic || !apic->vapic_addr)
4525 return;
4526
4527 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4528
4529 vcpu->arch.apic->vapic_page = page;
4530 }
4531
4532 static void vapic_exit(struct kvm_vcpu *vcpu)
4533 {
4534 struct kvm_lapic *apic = vcpu->arch.apic;
4535 int idx;
4536
4537 if (!apic || !apic->vapic_addr)
4538 return;
4539
4540 idx = srcu_read_lock(&vcpu->kvm->srcu);
4541 kvm_release_page_dirty(apic->vapic_page);
4542 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4543 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4544 }
4545
4546 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4547 {
4548 int max_irr, tpr;
4549
4550 if (!kvm_x86_ops->update_cr8_intercept)
4551 return;
4552
4553 if (!vcpu->arch.apic)
4554 return;
4555
4556 if (!vcpu->arch.apic->vapic_addr)
4557 max_irr = kvm_lapic_find_highest_irr(vcpu);
4558 else
4559 max_irr = -1;
4560
4561 if (max_irr != -1)
4562 max_irr >>= 4;
4563
4564 tpr = kvm_lapic_get_cr8(vcpu);
4565
4566 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4567 }
4568
4569 static void inject_pending_event(struct kvm_vcpu *vcpu)
4570 {
4571 /* try to reinject previous events if any */
4572 if (vcpu->arch.exception.pending) {
4573 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4574 vcpu->arch.exception.has_error_code,
4575 vcpu->arch.exception.error_code);
4576 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4577 vcpu->arch.exception.has_error_code,
4578 vcpu->arch.exception.error_code,
4579 vcpu->arch.exception.reinject);
4580 return;
4581 }
4582
4583 if (vcpu->arch.nmi_injected) {
4584 kvm_x86_ops->set_nmi(vcpu);
4585 return;
4586 }
4587
4588 if (vcpu->arch.interrupt.pending) {
4589 kvm_x86_ops->set_irq(vcpu);
4590 return;
4591 }
4592
4593 /* try to inject new event if pending */
4594 if (vcpu->arch.nmi_pending) {
4595 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4596 vcpu->arch.nmi_pending = false;
4597 vcpu->arch.nmi_injected = true;
4598 kvm_x86_ops->set_nmi(vcpu);
4599 }
4600 } else if (kvm_cpu_has_interrupt(vcpu)) {
4601 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4602 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4603 false);
4604 kvm_x86_ops->set_irq(vcpu);
4605 }
4606 }
4607 }
4608
4609 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4610 {
4611 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4612 !vcpu->guest_xcr0_loaded) {
4613 /* kvm_set_xcr() also depends on this */
4614 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4615 vcpu->guest_xcr0_loaded = 1;
4616 }
4617 }
4618
4619 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4620 {
4621 if (vcpu->guest_xcr0_loaded) {
4622 if (vcpu->arch.xcr0 != host_xcr0)
4623 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4624 vcpu->guest_xcr0_loaded = 0;
4625 }
4626 }
4627
4628 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4629 {
4630 int r;
4631 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4632 vcpu->run->request_interrupt_window;
4633
4634 if (vcpu->requests)
4635 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4636 kvm_mmu_unload(vcpu);
4637
4638 r = kvm_mmu_reload(vcpu);
4639 if (unlikely(r))
4640 goto out;
4641
4642 if (vcpu->requests) {
4643 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4644 __kvm_migrate_timers(vcpu);
4645 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4646 kvm_write_guest_time(vcpu);
4647 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4648 kvm_mmu_sync_roots(vcpu);
4649 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4650 kvm_x86_ops->tlb_flush(vcpu);
4651 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4652 &vcpu->requests)) {
4653 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4654 r = 0;
4655 goto out;
4656 }
4657 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4658 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4659 r = 0;
4660 goto out;
4661 }
4662 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4663 vcpu->fpu_active = 0;
4664 kvm_x86_ops->fpu_deactivate(vcpu);
4665 }
4666 }
4667
4668 preempt_disable();
4669
4670 kvm_x86_ops->prepare_guest_switch(vcpu);
4671 if (vcpu->fpu_active)
4672 kvm_load_guest_fpu(vcpu);
4673 kvm_load_guest_xcr0(vcpu);
4674
4675 atomic_set(&vcpu->guest_mode, 1);
4676 smp_wmb();
4677
4678 local_irq_disable();
4679
4680 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4681 || need_resched() || signal_pending(current)) {
4682 atomic_set(&vcpu->guest_mode, 0);
4683 smp_wmb();
4684 local_irq_enable();
4685 preempt_enable();
4686 r = 1;
4687 goto out;
4688 }
4689
4690 inject_pending_event(vcpu);
4691
4692 /* enable NMI/IRQ window open exits if needed */
4693 if (vcpu->arch.nmi_pending)
4694 kvm_x86_ops->enable_nmi_window(vcpu);
4695 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4696 kvm_x86_ops->enable_irq_window(vcpu);
4697
4698 if (kvm_lapic_enabled(vcpu)) {
4699 update_cr8_intercept(vcpu);
4700 kvm_lapic_sync_to_vapic(vcpu);
4701 }
4702
4703 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4704
4705 kvm_guest_enter();
4706
4707 if (unlikely(vcpu->arch.switch_db_regs)) {
4708 set_debugreg(0, 7);
4709 set_debugreg(vcpu->arch.eff_db[0], 0);
4710 set_debugreg(vcpu->arch.eff_db[1], 1);
4711 set_debugreg(vcpu->arch.eff_db[2], 2);
4712 set_debugreg(vcpu->arch.eff_db[3], 3);
4713 }
4714
4715 trace_kvm_entry(vcpu->vcpu_id);
4716 kvm_x86_ops->run(vcpu);
4717
4718 /*
4719 * If the guest has used debug registers, at least dr7
4720 * will be disabled while returning to the host.
4721 * If we don't have active breakpoints in the host, we don't
4722 * care about the messed up debug address registers. But if
4723 * we have some of them active, restore the old state.
4724 */
4725 if (hw_breakpoint_active())
4726 hw_breakpoint_restore();
4727
4728 atomic_set(&vcpu->guest_mode, 0);
4729 smp_wmb();
4730 local_irq_enable();
4731
4732 ++vcpu->stat.exits;
4733
4734 /*
4735 * We must have an instruction between local_irq_enable() and
4736 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4737 * the interrupt shadow. The stat.exits increment will do nicely.
4738 * But we need to prevent reordering, hence this barrier():
4739 */
4740 barrier();
4741
4742 kvm_guest_exit();
4743
4744 preempt_enable();
4745
4746 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4747
4748 /*
4749 * Profile KVM exit RIPs:
4750 */
4751 if (unlikely(prof_on == KVM_PROFILING)) {
4752 unsigned long rip = kvm_rip_read(vcpu);
4753 profile_hit(KVM_PROFILING, (void *)rip);
4754 }
4755
4756
4757 kvm_lapic_sync_from_vapic(vcpu);
4758
4759 r = kvm_x86_ops->handle_exit(vcpu);
4760 out:
4761 return r;
4762 }
4763
4764
4765 static int __vcpu_run(struct kvm_vcpu *vcpu)
4766 {
4767 int r;
4768 struct kvm *kvm = vcpu->kvm;
4769
4770 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4771 pr_debug("vcpu %d received sipi with vector # %x\n",
4772 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4773 kvm_lapic_reset(vcpu);
4774 r = kvm_arch_vcpu_reset(vcpu);
4775 if (r)
4776 return r;
4777 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4778 }
4779
4780 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4781 vapic_enter(vcpu);
4782
4783 r = 1;
4784 while (r > 0) {
4785 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4786 r = vcpu_enter_guest(vcpu);
4787 else {
4788 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4789 kvm_vcpu_block(vcpu);
4790 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4791 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4792 {
4793 switch(vcpu->arch.mp_state) {
4794 case KVM_MP_STATE_HALTED:
4795 vcpu->arch.mp_state =
4796 KVM_MP_STATE_RUNNABLE;
4797 case KVM_MP_STATE_RUNNABLE:
4798 break;
4799 case KVM_MP_STATE_SIPI_RECEIVED:
4800 default:
4801 r = -EINTR;
4802 break;
4803 }
4804 }
4805 }
4806
4807 if (r <= 0)
4808 break;
4809
4810 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4811 if (kvm_cpu_has_pending_timer(vcpu))
4812 kvm_inject_pending_timer_irqs(vcpu);
4813
4814 if (dm_request_for_irq_injection(vcpu)) {
4815 r = -EINTR;
4816 vcpu->run->exit_reason = KVM_EXIT_INTR;
4817 ++vcpu->stat.request_irq_exits;
4818 }
4819 if (signal_pending(current)) {
4820 r = -EINTR;
4821 vcpu->run->exit_reason = KVM_EXIT_INTR;
4822 ++vcpu->stat.signal_exits;
4823 }
4824 if (need_resched()) {
4825 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4826 kvm_resched(vcpu);
4827 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4828 }
4829 }
4830
4831 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4832
4833 vapic_exit(vcpu);
4834
4835 return r;
4836 }
4837
4838 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4839 {
4840 int r;
4841 sigset_t sigsaved;
4842
4843 if (vcpu->sigset_active)
4844 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4845
4846 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4847 kvm_vcpu_block(vcpu);
4848 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4849 r = -EAGAIN;
4850 goto out;
4851 }
4852
4853 /* re-sync apic's tpr */
4854 if (!irqchip_in_kernel(vcpu->kvm))
4855 kvm_set_cr8(vcpu, kvm_run->cr8);
4856
4857 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4858 vcpu->arch.emulate_ctxt.restart) {
4859 if (vcpu->mmio_needed) {
4860 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4861 vcpu->mmio_read_completed = 1;
4862 vcpu->mmio_needed = 0;
4863 }
4864 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4865 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4866 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4867 if (r != EMULATE_DONE) {
4868 r = 0;
4869 goto out;
4870 }
4871 }
4872 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4873 kvm_register_write(vcpu, VCPU_REGS_RAX,
4874 kvm_run->hypercall.ret);
4875
4876 r = __vcpu_run(vcpu);
4877
4878 out:
4879 post_kvm_run_save(vcpu);
4880 if (vcpu->sigset_active)
4881 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4882
4883 return r;
4884 }
4885
4886 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4887 {
4888 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4889 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4890 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4891 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4892 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4893 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4894 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4895 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4896 #ifdef CONFIG_X86_64
4897 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4898 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4899 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4900 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4901 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4902 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4903 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4904 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4905 #endif
4906
4907 regs->rip = kvm_rip_read(vcpu);
4908 regs->rflags = kvm_get_rflags(vcpu);
4909
4910 return 0;
4911 }
4912
4913 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4914 {
4915 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4916 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4917 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4918 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4919 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4920 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4921 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4922 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4923 #ifdef CONFIG_X86_64
4924 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4925 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4926 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4927 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4928 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4929 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4930 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4931 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4932 #endif
4933
4934 kvm_rip_write(vcpu, regs->rip);
4935 kvm_set_rflags(vcpu, regs->rflags);
4936
4937 vcpu->arch.exception.pending = false;
4938
4939 return 0;
4940 }
4941
4942 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4943 {
4944 struct kvm_segment cs;
4945
4946 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4947 *db = cs.db;
4948 *l = cs.l;
4949 }
4950 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4951
4952 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4953 struct kvm_sregs *sregs)
4954 {
4955 struct desc_ptr dt;
4956
4957 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4958 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4959 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4960 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4961 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4962 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4963
4964 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4965 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4966
4967 kvm_x86_ops->get_idt(vcpu, &dt);
4968 sregs->idt.limit = dt.size;
4969 sregs->idt.base = dt.address;
4970 kvm_x86_ops->get_gdt(vcpu, &dt);
4971 sregs->gdt.limit = dt.size;
4972 sregs->gdt.base = dt.address;
4973
4974 sregs->cr0 = kvm_read_cr0(vcpu);
4975 sregs->cr2 = vcpu->arch.cr2;
4976 sregs->cr3 = vcpu->arch.cr3;
4977 sregs->cr4 = kvm_read_cr4(vcpu);
4978 sregs->cr8 = kvm_get_cr8(vcpu);
4979 sregs->efer = vcpu->arch.efer;
4980 sregs->apic_base = kvm_get_apic_base(vcpu);
4981
4982 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4983
4984 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4985 set_bit(vcpu->arch.interrupt.nr,
4986 (unsigned long *)sregs->interrupt_bitmap);
4987
4988 return 0;
4989 }
4990
4991 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4992 struct kvm_mp_state *mp_state)
4993 {
4994 mp_state->mp_state = vcpu->arch.mp_state;
4995 return 0;
4996 }
4997
4998 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4999 struct kvm_mp_state *mp_state)
5000 {
5001 vcpu->arch.mp_state = mp_state->mp_state;
5002 return 0;
5003 }
5004
5005 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5006 bool has_error_code, u32 error_code)
5007 {
5008 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5009 int cs_db, cs_l, ret;
5010 cache_all_regs(vcpu);
5011
5012 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5013
5014 vcpu->arch.emulate_ctxt.vcpu = vcpu;
5015 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
5016 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
5017 vcpu->arch.emulate_ctxt.mode =
5018 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5019 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
5020 ? X86EMUL_MODE_VM86 : cs_l
5021 ? X86EMUL_MODE_PROT64 : cs_db
5022 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
5023 memset(c, 0, sizeof(struct decode_cache));
5024 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
5025
5026 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
5027 tss_selector, reason, has_error_code,
5028 error_code);
5029
5030 if (ret)
5031 return EMULATE_FAIL;
5032
5033 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5034 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5035 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5036 return EMULATE_DONE;
5037 }
5038 EXPORT_SYMBOL_GPL(kvm_task_switch);
5039
5040 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5041 struct kvm_sregs *sregs)
5042 {
5043 int mmu_reset_needed = 0;
5044 int pending_vec, max_bits;
5045 struct desc_ptr dt;
5046
5047 dt.size = sregs->idt.limit;
5048 dt.address = sregs->idt.base;
5049 kvm_x86_ops->set_idt(vcpu, &dt);
5050 dt.size = sregs->gdt.limit;
5051 dt.address = sregs->gdt.base;
5052 kvm_x86_ops->set_gdt(vcpu, &dt);
5053
5054 vcpu->arch.cr2 = sregs->cr2;
5055 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5056 vcpu->arch.cr3 = sregs->cr3;
5057
5058 kvm_set_cr8(vcpu, sregs->cr8);
5059
5060 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5061 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5062 kvm_set_apic_base(vcpu, sregs->apic_base);
5063
5064 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5065 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5066 vcpu->arch.cr0 = sregs->cr0;
5067
5068 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5069 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5070 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5071 load_pdptrs(vcpu, vcpu->arch.cr3);
5072 mmu_reset_needed = 1;
5073 }
5074
5075 if (mmu_reset_needed)
5076 kvm_mmu_reset_context(vcpu);
5077
5078 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5079 pending_vec = find_first_bit(
5080 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5081 if (pending_vec < max_bits) {
5082 kvm_queue_interrupt(vcpu, pending_vec, false);
5083 pr_debug("Set back pending irq %d\n", pending_vec);
5084 if (irqchip_in_kernel(vcpu->kvm))
5085 kvm_pic_clear_isr_ack(vcpu->kvm);
5086 }
5087
5088 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5089 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5090 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5091 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5092 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5093 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5094
5095 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5096 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5097
5098 update_cr8_intercept(vcpu);
5099
5100 /* Older userspace won't unhalt the vcpu on reset. */
5101 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5102 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5103 !is_protmode(vcpu))
5104 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5105
5106 return 0;
5107 }
5108
5109 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5110 struct kvm_guest_debug *dbg)
5111 {
5112 unsigned long rflags;
5113 int i, r;
5114
5115 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5116 r = -EBUSY;
5117 if (vcpu->arch.exception.pending)
5118 goto out;
5119 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5120 kvm_queue_exception(vcpu, DB_VECTOR);
5121 else
5122 kvm_queue_exception(vcpu, BP_VECTOR);
5123 }
5124
5125 /*
5126 * Read rflags as long as potentially injected trace flags are still
5127 * filtered out.
5128 */
5129 rflags = kvm_get_rflags(vcpu);
5130
5131 vcpu->guest_debug = dbg->control;
5132 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5133 vcpu->guest_debug = 0;
5134
5135 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5136 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5137 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5138 vcpu->arch.switch_db_regs =
5139 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5140 } else {
5141 for (i = 0; i < KVM_NR_DB_REGS; i++)
5142 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5143 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5144 }
5145
5146 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5147 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5148 get_segment_base(vcpu, VCPU_SREG_CS);
5149
5150 /*
5151 * Trigger an rflags update that will inject or remove the trace
5152 * flags.
5153 */
5154 kvm_set_rflags(vcpu, rflags);
5155
5156 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5157
5158 r = 0;
5159
5160 out:
5161
5162 return r;
5163 }
5164
5165 /*
5166 * Translate a guest virtual address to a guest physical address.
5167 */
5168 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5169 struct kvm_translation *tr)
5170 {
5171 unsigned long vaddr = tr->linear_address;
5172 gpa_t gpa;
5173 int idx;
5174
5175 idx = srcu_read_lock(&vcpu->kvm->srcu);
5176 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5177 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5178 tr->physical_address = gpa;
5179 tr->valid = gpa != UNMAPPED_GVA;
5180 tr->writeable = 1;
5181 tr->usermode = 0;
5182
5183 return 0;
5184 }
5185
5186 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5187 {
5188 struct i387_fxsave_struct *fxsave =
5189 &vcpu->arch.guest_fpu.state->fxsave;
5190
5191 memcpy(fpu->fpr, fxsave->st_space, 128);
5192 fpu->fcw = fxsave->cwd;
5193 fpu->fsw = fxsave->swd;
5194 fpu->ftwx = fxsave->twd;
5195 fpu->last_opcode = fxsave->fop;
5196 fpu->last_ip = fxsave->rip;
5197 fpu->last_dp = fxsave->rdp;
5198 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5199
5200 return 0;
5201 }
5202
5203 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5204 {
5205 struct i387_fxsave_struct *fxsave =
5206 &vcpu->arch.guest_fpu.state->fxsave;
5207
5208 memcpy(fxsave->st_space, fpu->fpr, 128);
5209 fxsave->cwd = fpu->fcw;
5210 fxsave->swd = fpu->fsw;
5211 fxsave->twd = fpu->ftwx;
5212 fxsave->fop = fpu->last_opcode;
5213 fxsave->rip = fpu->last_ip;
5214 fxsave->rdp = fpu->last_dp;
5215 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5216
5217 return 0;
5218 }
5219
5220 int fx_init(struct kvm_vcpu *vcpu)
5221 {
5222 int err;
5223
5224 err = fpu_alloc(&vcpu->arch.guest_fpu);
5225 if (err)
5226 return err;
5227
5228 fpu_finit(&vcpu->arch.guest_fpu);
5229
5230 /*
5231 * Ensure guest xcr0 is valid for loading
5232 */
5233 vcpu->arch.xcr0 = XSTATE_FP;
5234
5235 vcpu->arch.cr0 |= X86_CR0_ET;
5236
5237 return 0;
5238 }
5239 EXPORT_SYMBOL_GPL(fx_init);
5240
5241 static void fx_free(struct kvm_vcpu *vcpu)
5242 {
5243 fpu_free(&vcpu->arch.guest_fpu);
5244 }
5245
5246 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5247 {
5248 if (vcpu->guest_fpu_loaded)
5249 return;
5250
5251 /*
5252 * Restore all possible states in the guest,
5253 * and assume host would use all available bits.
5254 * Guest xcr0 would be loaded later.
5255 */
5256 kvm_put_guest_xcr0(vcpu);
5257 vcpu->guest_fpu_loaded = 1;
5258 unlazy_fpu(current);
5259 fpu_restore_checking(&vcpu->arch.guest_fpu);
5260 trace_kvm_fpu(1);
5261 }
5262
5263 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5264 {
5265 kvm_put_guest_xcr0(vcpu);
5266
5267 if (!vcpu->guest_fpu_loaded)
5268 return;
5269
5270 vcpu->guest_fpu_loaded = 0;
5271 fpu_save_init(&vcpu->arch.guest_fpu);
5272 ++vcpu->stat.fpu_reload;
5273 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5274 trace_kvm_fpu(0);
5275 }
5276
5277 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5278 {
5279 if (vcpu->arch.time_page) {
5280 kvm_release_page_dirty(vcpu->arch.time_page);
5281 vcpu->arch.time_page = NULL;
5282 }
5283
5284 fx_free(vcpu);
5285 kvm_x86_ops->vcpu_free(vcpu);
5286 }
5287
5288 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5289 unsigned int id)
5290 {
5291 return kvm_x86_ops->vcpu_create(kvm, id);
5292 }
5293
5294 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5295 {
5296 int r;
5297
5298 vcpu->arch.mtrr_state.have_fixed = 1;
5299 vcpu_load(vcpu);
5300 r = kvm_arch_vcpu_reset(vcpu);
5301 if (r == 0)
5302 r = kvm_mmu_setup(vcpu);
5303 vcpu_put(vcpu);
5304 if (r < 0)
5305 goto free_vcpu;
5306
5307 return 0;
5308 free_vcpu:
5309 kvm_x86_ops->vcpu_free(vcpu);
5310 return r;
5311 }
5312
5313 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5314 {
5315 vcpu_load(vcpu);
5316 kvm_mmu_unload(vcpu);
5317 vcpu_put(vcpu);
5318
5319 fx_free(vcpu);
5320 kvm_x86_ops->vcpu_free(vcpu);
5321 }
5322
5323 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5324 {
5325 vcpu->arch.nmi_pending = false;
5326 vcpu->arch.nmi_injected = false;
5327
5328 vcpu->arch.switch_db_regs = 0;
5329 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5330 vcpu->arch.dr6 = DR6_FIXED_1;
5331 vcpu->arch.dr7 = DR7_FIXED_1;
5332
5333 return kvm_x86_ops->vcpu_reset(vcpu);
5334 }
5335
5336 int kvm_arch_hardware_enable(void *garbage)
5337 {
5338 /*
5339 * Since this may be called from a hotplug notifcation,
5340 * we can't get the CPU frequency directly.
5341 */
5342 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5343 int cpu = raw_smp_processor_id();
5344 per_cpu(cpu_tsc_khz, cpu) = 0;
5345 }
5346
5347 kvm_shared_msr_cpu_online();
5348
5349 return kvm_x86_ops->hardware_enable(garbage);
5350 }
5351
5352 void kvm_arch_hardware_disable(void *garbage)
5353 {
5354 kvm_x86_ops->hardware_disable(garbage);
5355 drop_user_return_notifiers(garbage);
5356 }
5357
5358 int kvm_arch_hardware_setup(void)
5359 {
5360 return kvm_x86_ops->hardware_setup();
5361 }
5362
5363 void kvm_arch_hardware_unsetup(void)
5364 {
5365 kvm_x86_ops->hardware_unsetup();
5366 }
5367
5368 void kvm_arch_check_processor_compat(void *rtn)
5369 {
5370 kvm_x86_ops->check_processor_compatibility(rtn);
5371 }
5372
5373 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5374 {
5375 struct page *page;
5376 struct kvm *kvm;
5377 int r;
5378
5379 BUG_ON(vcpu->kvm == NULL);
5380 kvm = vcpu->kvm;
5381
5382 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5383 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5384 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5385 else
5386 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5387
5388 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5389 if (!page) {
5390 r = -ENOMEM;
5391 goto fail;
5392 }
5393 vcpu->arch.pio_data = page_address(page);
5394
5395 r = kvm_mmu_create(vcpu);
5396 if (r < 0)
5397 goto fail_free_pio_data;
5398
5399 if (irqchip_in_kernel(kvm)) {
5400 r = kvm_create_lapic(vcpu);
5401 if (r < 0)
5402 goto fail_mmu_destroy;
5403 }
5404
5405 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5406 GFP_KERNEL);
5407 if (!vcpu->arch.mce_banks) {
5408 r = -ENOMEM;
5409 goto fail_free_lapic;
5410 }
5411 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5412
5413 return 0;
5414 fail_free_lapic:
5415 kvm_free_lapic(vcpu);
5416 fail_mmu_destroy:
5417 kvm_mmu_destroy(vcpu);
5418 fail_free_pio_data:
5419 free_page((unsigned long)vcpu->arch.pio_data);
5420 fail:
5421 return r;
5422 }
5423
5424 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5425 {
5426 int idx;
5427
5428 kfree(vcpu->arch.mce_banks);
5429 kvm_free_lapic(vcpu);
5430 idx = srcu_read_lock(&vcpu->kvm->srcu);
5431 kvm_mmu_destroy(vcpu);
5432 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5433 free_page((unsigned long)vcpu->arch.pio_data);
5434 }
5435
5436 struct kvm *kvm_arch_create_vm(void)
5437 {
5438 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5439
5440 if (!kvm)
5441 return ERR_PTR(-ENOMEM);
5442
5443 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5444 if (!kvm->arch.aliases) {
5445 kfree(kvm);
5446 return ERR_PTR(-ENOMEM);
5447 }
5448
5449 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5450 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5451
5452 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5453 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5454
5455 rdtscll(kvm->arch.vm_init_tsc);
5456
5457 return kvm;
5458 }
5459
5460 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5461 {
5462 vcpu_load(vcpu);
5463 kvm_mmu_unload(vcpu);
5464 vcpu_put(vcpu);
5465 }
5466
5467 static void kvm_free_vcpus(struct kvm *kvm)
5468 {
5469 unsigned int i;
5470 struct kvm_vcpu *vcpu;
5471
5472 /*
5473 * Unpin any mmu pages first.
5474 */
5475 kvm_for_each_vcpu(i, vcpu, kvm)
5476 kvm_unload_vcpu_mmu(vcpu);
5477 kvm_for_each_vcpu(i, vcpu, kvm)
5478 kvm_arch_vcpu_free(vcpu);
5479
5480 mutex_lock(&kvm->lock);
5481 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5482 kvm->vcpus[i] = NULL;
5483
5484 atomic_set(&kvm->online_vcpus, 0);
5485 mutex_unlock(&kvm->lock);
5486 }
5487
5488 void kvm_arch_sync_events(struct kvm *kvm)
5489 {
5490 kvm_free_all_assigned_devices(kvm);
5491 }
5492
5493 void kvm_arch_destroy_vm(struct kvm *kvm)
5494 {
5495 kvm_iommu_unmap_guest(kvm);
5496 kvm_free_pit(kvm);
5497 kfree(kvm->arch.vpic);
5498 kfree(kvm->arch.vioapic);
5499 kvm_free_vcpus(kvm);
5500 kvm_free_physmem(kvm);
5501 if (kvm->arch.apic_access_page)
5502 put_page(kvm->arch.apic_access_page);
5503 if (kvm->arch.ept_identity_pagetable)
5504 put_page(kvm->arch.ept_identity_pagetable);
5505 cleanup_srcu_struct(&kvm->srcu);
5506 kfree(kvm->arch.aliases);
5507 kfree(kvm);
5508 }
5509
5510 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5511 struct kvm_memory_slot *memslot,
5512 struct kvm_memory_slot old,
5513 struct kvm_userspace_memory_region *mem,
5514 int user_alloc)
5515 {
5516 int npages = memslot->npages;
5517
5518 /*To keep backward compatibility with older userspace,
5519 *x86 needs to hanlde !user_alloc case.
5520 */
5521 if (!user_alloc) {
5522 if (npages && !old.rmap) {
5523 unsigned long userspace_addr;
5524
5525 down_write(&current->mm->mmap_sem);
5526 userspace_addr = do_mmap(NULL, 0,
5527 npages * PAGE_SIZE,
5528 PROT_READ | PROT_WRITE,
5529 MAP_PRIVATE | MAP_ANONYMOUS,
5530 0);
5531 up_write(&current->mm->mmap_sem);
5532
5533 if (IS_ERR((void *)userspace_addr))
5534 return PTR_ERR((void *)userspace_addr);
5535
5536 memslot->userspace_addr = userspace_addr;
5537 }
5538 }
5539
5540
5541 return 0;
5542 }
5543
5544 void kvm_arch_commit_memory_region(struct kvm *kvm,
5545 struct kvm_userspace_memory_region *mem,
5546 struct kvm_memory_slot old,
5547 int user_alloc)
5548 {
5549
5550 int npages = mem->memory_size >> PAGE_SHIFT;
5551
5552 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5553 int ret;
5554
5555 down_write(&current->mm->mmap_sem);
5556 ret = do_munmap(current->mm, old.userspace_addr,
5557 old.npages * PAGE_SIZE);
5558 up_write(&current->mm->mmap_sem);
5559 if (ret < 0)
5560 printk(KERN_WARNING
5561 "kvm_vm_ioctl_set_memory_region: "
5562 "failed to munmap memory\n");
5563 }
5564
5565 spin_lock(&kvm->mmu_lock);
5566 if (!kvm->arch.n_requested_mmu_pages) {
5567 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5568 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5569 }
5570
5571 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5572 spin_unlock(&kvm->mmu_lock);
5573 }
5574
5575 void kvm_arch_flush_shadow(struct kvm *kvm)
5576 {
5577 kvm_mmu_zap_all(kvm);
5578 kvm_reload_remote_mmus(kvm);
5579 }
5580
5581 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5582 {
5583 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5584 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5585 || vcpu->arch.nmi_pending ||
5586 (kvm_arch_interrupt_allowed(vcpu) &&
5587 kvm_cpu_has_interrupt(vcpu));
5588 }
5589
5590 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5591 {
5592 int me;
5593 int cpu = vcpu->cpu;
5594
5595 if (waitqueue_active(&vcpu->wq)) {
5596 wake_up_interruptible(&vcpu->wq);
5597 ++vcpu->stat.halt_wakeup;
5598 }
5599
5600 me = get_cpu();
5601 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5602 if (atomic_xchg(&vcpu->guest_mode, 0))
5603 smp_send_reschedule(cpu);
5604 put_cpu();
5605 }
5606
5607 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5608 {
5609 return kvm_x86_ops->interrupt_allowed(vcpu);
5610 }
5611
5612 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5613 {
5614 unsigned long current_rip = kvm_rip_read(vcpu) +
5615 get_segment_base(vcpu, VCPU_SREG_CS);
5616
5617 return current_rip == linear_rip;
5618 }
5619 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5620
5621 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5622 {
5623 unsigned long rflags;
5624
5625 rflags = kvm_x86_ops->get_rflags(vcpu);
5626 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5627 rflags &= ~X86_EFLAGS_TF;
5628 return rflags;
5629 }
5630 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5631
5632 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5633 {
5634 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5635 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5636 rflags |= X86_EFLAGS_TF;
5637 kvm_x86_ops->set_rflags(vcpu, rflags);
5638 }
5639 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5640
5641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5642 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5643 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5644 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5645 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5646 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5647 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5648 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5649 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5650 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5651 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5652 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
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