2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <trace/events/kvm.h>
51 #define CREATE_TRACE_POINTS
54 #include <asm/debugreg.h>
60 #include <asm/fpu-internal.h> /* Ugh! */
62 #include <asm/pvclock.h>
63 #include <asm/div64.h>
65 #define MAX_IO_MSRS 256
66 #define KVM_MAX_MCE_BANKS 32
67 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
69 #define emul_to_vcpu(ctxt) \
70 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
73 * - enable syscall per default because its emulated by KVM
74 * - enable LME and LMA per default on 64 bit KVM
78 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
80 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
83 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
84 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
86 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
87 static void process_nmi(struct kvm_vcpu
*vcpu
);
89 struct kvm_x86_ops
*kvm_x86_ops
;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
92 static bool ignore_msrs
= 0;
93 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
95 bool kvm_has_tsc_control
;
96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
97 u32 kvm_max_guest_tsc_khz
;
98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
100 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
101 static u32 tsc_tolerance_ppm
= 250;
102 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
104 #define KVM_NR_SHARED_MSRS 16
106 struct kvm_shared_msrs_global
{
108 u32 msrs
[KVM_NR_SHARED_MSRS
];
111 struct kvm_shared_msrs
{
112 struct user_return_notifier urn
;
114 struct kvm_shared_msr_values
{
117 } values
[KVM_NR_SHARED_MSRS
];
120 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
121 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
123 struct kvm_stats_debugfs_item debugfs_entries
[] = {
124 { "pf_fixed", VCPU_STAT(pf_fixed
) },
125 { "pf_guest", VCPU_STAT(pf_guest
) },
126 { "tlb_flush", VCPU_STAT(tlb_flush
) },
127 { "invlpg", VCPU_STAT(invlpg
) },
128 { "exits", VCPU_STAT(exits
) },
129 { "io_exits", VCPU_STAT(io_exits
) },
130 { "mmio_exits", VCPU_STAT(mmio_exits
) },
131 { "signal_exits", VCPU_STAT(signal_exits
) },
132 { "irq_window", VCPU_STAT(irq_window_exits
) },
133 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
134 { "halt_exits", VCPU_STAT(halt_exits
) },
135 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
136 { "hypercalls", VCPU_STAT(hypercalls
) },
137 { "request_irq", VCPU_STAT(request_irq_exits
) },
138 { "irq_exits", VCPU_STAT(irq_exits
) },
139 { "host_state_reload", VCPU_STAT(host_state_reload
) },
140 { "efer_reload", VCPU_STAT(efer_reload
) },
141 { "fpu_reload", VCPU_STAT(fpu_reload
) },
142 { "insn_emulation", VCPU_STAT(insn_emulation
) },
143 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
144 { "irq_injections", VCPU_STAT(irq_injections
) },
145 { "nmi_injections", VCPU_STAT(nmi_injections
) },
146 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
147 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
148 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
149 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
150 { "mmu_flooded", VM_STAT(mmu_flooded
) },
151 { "mmu_recycled", VM_STAT(mmu_recycled
) },
152 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
153 { "mmu_unsync", VM_STAT(mmu_unsync
) },
154 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
155 { "largepages", VM_STAT(lpages
) },
159 u64 __read_mostly host_xcr0
;
161 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
163 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
166 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
167 vcpu
->arch
.apf
.gfns
[i
] = ~0;
170 static void kvm_on_user_return(struct user_return_notifier
*urn
)
173 struct kvm_shared_msrs
*locals
174 = container_of(urn
, struct kvm_shared_msrs
, urn
);
175 struct kvm_shared_msr_values
*values
;
177 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
178 values
= &locals
->values
[slot
];
179 if (values
->host
!= values
->curr
) {
180 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
181 values
->curr
= values
->host
;
184 locals
->registered
= false;
185 user_return_notifier_unregister(urn
);
188 static void shared_msr_update(unsigned slot
, u32 msr
)
190 struct kvm_shared_msrs
*smsr
;
193 smsr
= &__get_cpu_var(shared_msrs
);
194 /* only read, and nobody should modify it at this time,
195 * so don't need lock */
196 if (slot
>= shared_msrs_global
.nr
) {
197 printk(KERN_ERR
"kvm: invalid MSR slot!");
200 rdmsrl_safe(msr
, &value
);
201 smsr
->values
[slot
].host
= value
;
202 smsr
->values
[slot
].curr
= value
;
205 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
207 if (slot
>= shared_msrs_global
.nr
)
208 shared_msrs_global
.nr
= slot
+ 1;
209 shared_msrs_global
.msrs
[slot
] = msr
;
210 /* we need ensured the shared_msr_global have been updated */
213 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
215 static void kvm_shared_msr_cpu_online(void)
219 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
220 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
223 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
225 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
227 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
229 smsr
->values
[slot
].curr
= value
;
230 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
231 if (!smsr
->registered
) {
232 smsr
->urn
.on_user_return
= kvm_on_user_return
;
233 user_return_notifier_register(&smsr
->urn
);
234 smsr
->registered
= true;
237 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
239 static void drop_user_return_notifiers(void *ignore
)
241 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
243 if (smsr
->registered
)
244 kvm_on_user_return(&smsr
->urn
);
247 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
249 if (irqchip_in_kernel(vcpu
->kvm
))
250 return vcpu
->arch
.apic_base
;
252 return vcpu
->arch
.apic_base
;
254 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
256 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
258 /* TODO: reserve bits check */
259 if (irqchip_in_kernel(vcpu
->kvm
))
260 kvm_lapic_set_base(vcpu
, data
);
262 vcpu
->arch
.apic_base
= data
;
264 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
266 #define EXCPT_BENIGN 0
267 #define EXCPT_CONTRIBUTORY 1
270 static int exception_class(int vector
)
280 return EXCPT_CONTRIBUTORY
;
287 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
288 unsigned nr
, bool has_error
, u32 error_code
,
294 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
296 if (!vcpu
->arch
.exception
.pending
) {
298 vcpu
->arch
.exception
.pending
= true;
299 vcpu
->arch
.exception
.has_error_code
= has_error
;
300 vcpu
->arch
.exception
.nr
= nr
;
301 vcpu
->arch
.exception
.error_code
= error_code
;
302 vcpu
->arch
.exception
.reinject
= reinject
;
306 /* to check exception */
307 prev_nr
= vcpu
->arch
.exception
.nr
;
308 if (prev_nr
== DF_VECTOR
) {
309 /* triple fault -> shutdown */
310 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
313 class1
= exception_class(prev_nr
);
314 class2
= exception_class(nr
);
315 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
316 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
317 /* generate double fault per SDM Table 5-5 */
318 vcpu
->arch
.exception
.pending
= true;
319 vcpu
->arch
.exception
.has_error_code
= true;
320 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
321 vcpu
->arch
.exception
.error_code
= 0;
323 /* replace previous exception with a new one in a hope
324 that instruction re-execution will regenerate lost
329 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
331 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
333 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
335 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
337 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
339 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
341 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
344 kvm_inject_gp(vcpu
, 0);
346 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
348 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
350 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
352 ++vcpu
->stat
.pf_guest
;
353 vcpu
->arch
.cr2
= fault
->address
;
354 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
356 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
358 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
360 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
361 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
363 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
366 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
368 atomic_inc(&vcpu
->arch
.nmi_queued
);
369 kvm_make_request(KVM_REQ_NMI
, vcpu
);
371 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
373 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
375 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
377 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
379 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
381 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
383 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
386 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
387 * a #GP and return false.
389 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
391 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
393 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
396 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
399 * This function will be used to read from the physical memory of the currently
400 * running guest. The difference to kvm_read_guest_page is that this function
401 * can read from guest physical or from the guest's guest physical memory.
403 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
404 gfn_t ngfn
, void *data
, int offset
, int len
,
410 ngpa
= gfn_to_gpa(ngfn
);
411 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
412 if (real_gfn
== UNMAPPED_GVA
)
415 real_gfn
= gpa_to_gfn(real_gfn
);
417 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
419 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
421 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
422 void *data
, int offset
, int len
, u32 access
)
424 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
425 data
, offset
, len
, access
);
429 * Load the pae pdptrs. Return true is they are all valid.
431 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
433 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
434 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
437 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
439 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
440 offset
* sizeof(u64
), sizeof(pdpte
),
441 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
446 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
447 if (is_present_gpte(pdpte
[i
]) &&
448 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
455 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
456 __set_bit(VCPU_EXREG_PDPTR
,
457 (unsigned long *)&vcpu
->arch
.regs_avail
);
458 __set_bit(VCPU_EXREG_PDPTR
,
459 (unsigned long *)&vcpu
->arch
.regs_dirty
);
464 EXPORT_SYMBOL_GPL(load_pdptrs
);
466 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
468 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
474 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
477 if (!test_bit(VCPU_EXREG_PDPTR
,
478 (unsigned long *)&vcpu
->arch
.regs_avail
))
481 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
482 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
483 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
484 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
487 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
493 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
495 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
496 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
497 X86_CR0_CD
| X86_CR0_NW
;
502 if (cr0
& 0xffffffff00000000UL
)
506 cr0
&= ~CR0_RESERVED_BITS
;
508 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
511 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
514 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
516 if ((vcpu
->arch
.efer
& EFER_LME
)) {
521 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
526 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
531 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
533 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
534 kvm_clear_async_pf_completion_queue(vcpu
);
535 kvm_async_pf_hash_reset(vcpu
);
538 if ((cr0
^ old_cr0
) & update_bits
)
539 kvm_mmu_reset_context(vcpu
);
542 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
544 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
546 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
548 EXPORT_SYMBOL_GPL(kvm_lmsw
);
550 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
554 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
555 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
558 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
560 if (!(xcr0
& XSTATE_FP
))
562 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
564 if (xcr0
& ~host_xcr0
)
566 vcpu
->arch
.xcr0
= xcr0
;
567 vcpu
->guest_xcr0_loaded
= 0;
571 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
573 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
574 kvm_inject_gp(vcpu
, 0);
579 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
581 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
583 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
584 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
585 X86_CR4_PAE
| X86_CR4_SMEP
;
586 if (cr4
& CR4_RESERVED_BITS
)
589 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
592 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
595 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_RDWRGSFS
))
598 if (is_long_mode(vcpu
)) {
599 if (!(cr4
& X86_CR4_PAE
))
601 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
602 && ((cr4
^ old_cr4
) & pdptr_bits
)
603 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
607 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
610 if ((cr4
^ old_cr4
) & pdptr_bits
)
611 kvm_mmu_reset_context(vcpu
);
613 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
614 kvm_update_cpuid(vcpu
);
618 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
620 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
622 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
623 kvm_mmu_sync_roots(vcpu
);
624 kvm_mmu_flush_tlb(vcpu
);
628 if (is_long_mode(vcpu
)) {
629 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
633 if (cr3
& CR3_PAE_RESERVED_BITS
)
635 if (is_paging(vcpu
) &&
636 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
640 * We don't check reserved bits in nonpae mode, because
641 * this isn't enforced, and VMware depends on this.
646 * Does the new cr3 value map to physical memory? (Note, we
647 * catch an invalid cr3 even in real-mode, because it would
648 * cause trouble later on when we turn on paging anyway.)
650 * A real CPU would silently accept an invalid cr3 and would
651 * attempt to use it - with largely undefined (and often hard
652 * to debug) behavior on the guest side.
654 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
656 vcpu
->arch
.cr3
= cr3
;
657 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
658 vcpu
->arch
.mmu
.new_cr3(vcpu
);
661 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
663 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
665 if (cr8
& CR8_RESERVED_BITS
)
667 if (irqchip_in_kernel(vcpu
->kvm
))
668 kvm_lapic_set_tpr(vcpu
, cr8
);
670 vcpu
->arch
.cr8
= cr8
;
673 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
675 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
677 if (irqchip_in_kernel(vcpu
->kvm
))
678 return kvm_lapic_get_cr8(vcpu
);
680 return vcpu
->arch
.cr8
;
682 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
684 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
688 vcpu
->arch
.db
[dr
] = val
;
689 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
690 vcpu
->arch
.eff_db
[dr
] = val
;
693 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
697 if (val
& 0xffffffff00000000ULL
)
699 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
702 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
706 if (val
& 0xffffffff00000000ULL
)
708 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
709 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
710 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
711 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
719 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
723 res
= __kvm_set_dr(vcpu
, dr
, val
);
725 kvm_queue_exception(vcpu
, UD_VECTOR
);
727 kvm_inject_gp(vcpu
, 0);
731 EXPORT_SYMBOL_GPL(kvm_set_dr
);
733 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
737 *val
= vcpu
->arch
.db
[dr
];
740 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
744 *val
= vcpu
->arch
.dr6
;
747 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
751 *val
= vcpu
->arch
.dr7
;
758 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
760 if (_kvm_get_dr(vcpu
, dr
, val
)) {
761 kvm_queue_exception(vcpu
, UD_VECTOR
);
766 EXPORT_SYMBOL_GPL(kvm_get_dr
);
768 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
770 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
774 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
777 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
778 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
781 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
784 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
785 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
787 * This list is modified at module load time to reflect the
788 * capabilities of the host cpu. This capabilities test skips MSRs that are
789 * kvm-specific. Those are put in the beginning of the list.
792 #define KVM_SAVE_MSRS_BEGIN 9
793 static u32 msrs_to_save
[] = {
794 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
795 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
796 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
797 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
798 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
801 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
803 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
806 static unsigned num_msrs_to_save
;
808 static u32 emulated_msrs
[] = {
809 MSR_IA32_TSCDEADLINE
,
810 MSR_IA32_MISC_ENABLE
,
815 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
817 u64 old_efer
= vcpu
->arch
.efer
;
819 if (efer
& efer_reserved_bits
)
823 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
826 if (efer
& EFER_FFXSR
) {
827 struct kvm_cpuid_entry2
*feat
;
829 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
830 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
834 if (efer
& EFER_SVME
) {
835 struct kvm_cpuid_entry2
*feat
;
837 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
838 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
843 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
845 kvm_x86_ops
->set_efer(vcpu
, efer
);
847 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
849 /* Update reserved bits */
850 if ((efer
^ old_efer
) & EFER_NX
)
851 kvm_mmu_reset_context(vcpu
);
856 void kvm_enable_efer_bits(u64 mask
)
858 efer_reserved_bits
&= ~mask
;
860 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
864 * Writes msr value into into the appropriate "register".
865 * Returns 0 on success, non-0 otherwise.
866 * Assumes vcpu_load() was already called.
868 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
870 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
874 * Adapt set_msr() to msr_io()'s calling convention
876 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
878 return kvm_set_msr(vcpu
, index
, *data
);
881 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
885 struct pvclock_wall_clock wc
;
886 struct timespec boot
;
891 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
896 ++version
; /* first time write, random junk */
900 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
903 * The guest calculates current wall clock time by adding
904 * system time (updated by kvm_guest_time_update below) to the
905 * wall clock specified here. guest system time equals host
906 * system time for us, thus we must fill in host boot time here.
910 wc
.sec
= boot
.tv_sec
;
911 wc
.nsec
= boot
.tv_nsec
;
912 wc
.version
= version
;
914 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
917 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
920 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
922 uint32_t quotient
, remainder
;
924 /* Don't try to replace with do_div(), this one calculates
925 * "(dividend << 32) / divisor" */
927 : "=a" (quotient
), "=d" (remainder
)
928 : "0" (0), "1" (dividend
), "r" (divisor
) );
932 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
933 s8
*pshift
, u32
*pmultiplier
)
940 tps64
= base_khz
* 1000LL;
941 scaled64
= scaled_khz
* 1000LL;
942 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
947 tps32
= (uint32_t)tps64
;
948 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
949 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
957 *pmultiplier
= div_frac(scaled64
, tps32
);
959 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
960 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
963 static inline u64
get_kernel_ns(void)
967 WARN_ON(preemptible());
969 monotonic_to_bootbased(&ts
);
970 return timespec_to_ns(&ts
);
973 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
974 unsigned long max_tsc_khz
;
976 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
978 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
979 vcpu
->arch
.virtual_tsc_shift
);
982 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
984 u64 v
= (u64
)khz
* (1000000 + ppm
);
989 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
991 u32 thresh_lo
, thresh_hi
;
994 /* Compute a scale to convert nanoseconds in TSC cycles */
995 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
996 &vcpu
->arch
.virtual_tsc_shift
,
997 &vcpu
->arch
.virtual_tsc_mult
);
998 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1001 * Compute the variation in TSC rate which is acceptable
1002 * within the range of tolerance and decide if the
1003 * rate being applied is within that bounds of the hardware
1004 * rate. If so, no scaling or compensation need be done.
1006 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1007 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1008 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1009 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1012 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1015 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1017 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1018 vcpu
->arch
.virtual_tsc_mult
,
1019 vcpu
->arch
.virtual_tsc_shift
);
1020 tsc
+= vcpu
->arch
.this_tsc_write
;
1024 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1026 struct kvm
*kvm
= vcpu
->kvm
;
1027 u64 offset
, ns
, elapsed
;
1028 unsigned long flags
;
1031 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1032 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1033 ns
= get_kernel_ns();
1034 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1036 /* n.b - signed multiplication and division required */
1037 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1038 #ifdef CONFIG_X86_64
1039 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1041 /* do_div() only does unsigned */
1042 asm("idivl %2; xor %%edx, %%edx"
1044 : "A"(usdiff
* 1000), "rm"(vcpu
->arch
.virtual_tsc_khz
));
1046 do_div(elapsed
, 1000);
1052 * Special case: TSC write with a small delta (1 second) of virtual
1053 * cycle time against real time is interpreted as an attempt to
1054 * synchronize the CPU.
1056 * For a reliable TSC, we can match TSC offsets, and for an unstable
1057 * TSC, we add elapsed time in this computation. We could let the
1058 * compensation code attempt to catch up if we fall behind, but
1059 * it's better to try to match offsets from the beginning.
1061 if (usdiff
< USEC_PER_SEC
&&
1062 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1063 if (!check_tsc_unstable()) {
1064 offset
= kvm
->arch
.cur_tsc_offset
;
1065 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1067 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1069 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1070 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1074 * We split periods of matched TSC writes into generations.
1075 * For each generation, we track the original measured
1076 * nanosecond time, offset, and write, so if TSCs are in
1077 * sync, we can match exact offset, and if not, we can match
1078 * exact software computaion in compute_guest_tsc()
1080 * These values are tracked in kvm->arch.cur_xxx variables.
1082 kvm
->arch
.cur_tsc_generation
++;
1083 kvm
->arch
.cur_tsc_nsec
= ns
;
1084 kvm
->arch
.cur_tsc_write
= data
;
1085 kvm
->arch
.cur_tsc_offset
= offset
;
1086 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1087 kvm
->arch
.cur_tsc_generation
, data
);
1091 * We also track th most recent recorded KHZ, write and time to
1092 * allow the matching interval to be extended at each write.
1094 kvm
->arch
.last_tsc_nsec
= ns
;
1095 kvm
->arch
.last_tsc_write
= data
;
1096 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1098 /* Reset of TSC must disable overshoot protection below */
1099 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1100 vcpu
->arch
.last_guest_tsc
= data
;
1102 /* Keep track of which generation this VCPU has synchronized to */
1103 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1104 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1105 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1107 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1108 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1111 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1113 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1115 unsigned long flags
;
1116 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1118 unsigned long this_tsc_khz
;
1119 s64 kernel_ns
, max_kernel_ns
;
1122 /* Keep irq disabled to prevent changes to the clock */
1123 local_irq_save(flags
);
1124 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
);
1125 kernel_ns
= get_kernel_ns();
1126 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1127 if (unlikely(this_tsc_khz
== 0)) {
1128 local_irq_restore(flags
);
1129 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1134 * We may have to catch up the TSC to match elapsed wall clock
1135 * time for two reasons, even if kvmclock is used.
1136 * 1) CPU could have been running below the maximum TSC rate
1137 * 2) Broken TSC compensation resets the base at each VCPU
1138 * entry to avoid unknown leaps of TSC even when running
1139 * again on the same CPU. This may cause apparent elapsed
1140 * time to disappear, and the guest to stand still or run
1143 if (vcpu
->tsc_catchup
) {
1144 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1145 if (tsc
> tsc_timestamp
) {
1146 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1147 tsc_timestamp
= tsc
;
1151 local_irq_restore(flags
);
1153 if (!vcpu
->time_page
)
1157 * Time as measured by the TSC may go backwards when resetting the base
1158 * tsc_timestamp. The reason for this is that the TSC resolution is
1159 * higher than the resolution of the other clock scales. Thus, many
1160 * possible measurments of the TSC correspond to one measurement of any
1161 * other clock, and so a spread of values is possible. This is not a
1162 * problem for the computation of the nanosecond clock; with TSC rates
1163 * around 1GHZ, there can only be a few cycles which correspond to one
1164 * nanosecond value, and any path through this code will inevitably
1165 * take longer than that. However, with the kernel_ns value itself,
1166 * the precision may be much lower, down to HZ granularity. If the
1167 * first sampling of TSC against kernel_ns ends in the low part of the
1168 * range, and the second in the high end of the range, we can get:
1170 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1172 * As the sampling errors potentially range in the thousands of cycles,
1173 * it is possible such a time value has already been observed by the
1174 * guest. To protect against this, we must compute the system time as
1175 * observed by the guest and ensure the new system time is greater.
1178 if (vcpu
->hv_clock
.tsc_timestamp
) {
1179 max_kernel_ns
= vcpu
->last_guest_tsc
-
1180 vcpu
->hv_clock
.tsc_timestamp
;
1181 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1182 vcpu
->hv_clock
.tsc_to_system_mul
,
1183 vcpu
->hv_clock
.tsc_shift
);
1184 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1187 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1188 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1189 &vcpu
->hv_clock
.tsc_shift
,
1190 &vcpu
->hv_clock
.tsc_to_system_mul
);
1191 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1194 if (max_kernel_ns
> kernel_ns
)
1195 kernel_ns
= max_kernel_ns
;
1197 /* With all the info we got, fill in the values */
1198 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1199 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1200 vcpu
->last_kernel_ns
= kernel_ns
;
1201 vcpu
->last_guest_tsc
= tsc_timestamp
;
1202 vcpu
->hv_clock
.flags
= 0;
1205 * The interface expects us to write an even number signaling that the
1206 * update is finished. Since the guest won't see the intermediate
1207 * state, we just increase by 2 at the end.
1209 vcpu
->hv_clock
.version
+= 2;
1211 shared_kaddr
= kmap_atomic(vcpu
->time_page
);
1213 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1214 sizeof(vcpu
->hv_clock
));
1216 kunmap_atomic(shared_kaddr
);
1218 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1222 static bool msr_mtrr_valid(unsigned msr
)
1225 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1226 case MSR_MTRRfix64K_00000
:
1227 case MSR_MTRRfix16K_80000
:
1228 case MSR_MTRRfix16K_A0000
:
1229 case MSR_MTRRfix4K_C0000
:
1230 case MSR_MTRRfix4K_C8000
:
1231 case MSR_MTRRfix4K_D0000
:
1232 case MSR_MTRRfix4K_D8000
:
1233 case MSR_MTRRfix4K_E0000
:
1234 case MSR_MTRRfix4K_E8000
:
1235 case MSR_MTRRfix4K_F0000
:
1236 case MSR_MTRRfix4K_F8000
:
1237 case MSR_MTRRdefType
:
1238 case MSR_IA32_CR_PAT
:
1246 static bool valid_pat_type(unsigned t
)
1248 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1251 static bool valid_mtrr_type(unsigned t
)
1253 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1256 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1260 if (!msr_mtrr_valid(msr
))
1263 if (msr
== MSR_IA32_CR_PAT
) {
1264 for (i
= 0; i
< 8; i
++)
1265 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1268 } else if (msr
== MSR_MTRRdefType
) {
1271 return valid_mtrr_type(data
& 0xff);
1272 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1273 for (i
= 0; i
< 8 ; i
++)
1274 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1279 /* variable MTRRs */
1280 return valid_mtrr_type(data
& 0xff);
1283 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1285 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1287 if (!mtrr_valid(vcpu
, msr
, data
))
1290 if (msr
== MSR_MTRRdefType
) {
1291 vcpu
->arch
.mtrr_state
.def_type
= data
;
1292 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1293 } else if (msr
== MSR_MTRRfix64K_00000
)
1295 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1296 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1297 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1298 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1299 else if (msr
== MSR_IA32_CR_PAT
)
1300 vcpu
->arch
.pat
= data
;
1301 else { /* Variable MTRRs */
1302 int idx
, is_mtrr_mask
;
1305 idx
= (msr
- 0x200) / 2;
1306 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1309 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1312 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1316 kvm_mmu_reset_context(vcpu
);
1320 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1322 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1323 unsigned bank_num
= mcg_cap
& 0xff;
1326 case MSR_IA32_MCG_STATUS
:
1327 vcpu
->arch
.mcg_status
= data
;
1329 case MSR_IA32_MCG_CTL
:
1330 if (!(mcg_cap
& MCG_CTL_P
))
1332 if (data
!= 0 && data
!= ~(u64
)0)
1334 vcpu
->arch
.mcg_ctl
= data
;
1337 if (msr
>= MSR_IA32_MC0_CTL
&&
1338 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1339 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1340 /* only 0 or all 1s can be written to IA32_MCi_CTL
1341 * some Linux kernels though clear bit 10 in bank 4 to
1342 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1343 * this to avoid an uncatched #GP in the guest
1345 if ((offset
& 0x3) == 0 &&
1346 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1348 vcpu
->arch
.mce_banks
[offset
] = data
;
1356 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1358 struct kvm
*kvm
= vcpu
->kvm
;
1359 int lm
= is_long_mode(vcpu
);
1360 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1361 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1362 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1363 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1364 u32 page_num
= data
& ~PAGE_MASK
;
1365 u64 page_addr
= data
& PAGE_MASK
;
1370 if (page_num
>= blob_size
)
1373 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1378 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1387 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1389 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1392 static bool kvm_hv_msr_partition_wide(u32 msr
)
1396 case HV_X64_MSR_GUEST_OS_ID
:
1397 case HV_X64_MSR_HYPERCALL
:
1405 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1407 struct kvm
*kvm
= vcpu
->kvm
;
1410 case HV_X64_MSR_GUEST_OS_ID
:
1411 kvm
->arch
.hv_guest_os_id
= data
;
1412 /* setting guest os id to zero disables hypercall page */
1413 if (!kvm
->arch
.hv_guest_os_id
)
1414 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1416 case HV_X64_MSR_HYPERCALL
: {
1421 /* if guest os id is not set hypercall should remain disabled */
1422 if (!kvm
->arch
.hv_guest_os_id
)
1424 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1425 kvm
->arch
.hv_hypercall
= data
;
1428 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1429 addr
= gfn_to_hva(kvm
, gfn
);
1430 if (kvm_is_error_hva(addr
))
1432 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1433 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1434 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1436 kvm
->arch
.hv_hypercall
= data
;
1440 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1441 "data 0x%llx\n", msr
, data
);
1447 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1450 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1453 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1454 vcpu
->arch
.hv_vapic
= data
;
1457 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1458 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1459 if (kvm_is_error_hva(addr
))
1461 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1463 vcpu
->arch
.hv_vapic
= data
;
1466 case HV_X64_MSR_EOI
:
1467 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1468 case HV_X64_MSR_ICR
:
1469 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1470 case HV_X64_MSR_TPR
:
1471 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1473 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1474 "data 0x%llx\n", msr
, data
);
1481 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1483 gpa_t gpa
= data
& ~0x3f;
1485 /* Bits 2:5 are resrved, Should be zero */
1489 vcpu
->arch
.apf
.msr_val
= data
;
1491 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1492 kvm_clear_async_pf_completion_queue(vcpu
);
1493 kvm_async_pf_hash_reset(vcpu
);
1497 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1500 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1501 kvm_async_pf_wakeup_all(vcpu
);
1505 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1507 if (vcpu
->arch
.time_page
) {
1508 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1509 vcpu
->arch
.time_page
= NULL
;
1513 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1517 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1520 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1521 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1522 vcpu
->arch
.st
.accum_steal
= delta
;
1525 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1527 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1530 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1531 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1534 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1535 vcpu
->arch
.st
.steal
.version
+= 2;
1536 vcpu
->arch
.st
.accum_steal
= 0;
1538 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1539 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1542 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1548 return set_efer(vcpu
, data
);
1550 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1551 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1552 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
1554 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1559 case MSR_FAM10H_MMIO_CONF_BASE
:
1561 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1566 case MSR_AMD64_NB_CFG
:
1568 case MSR_IA32_DEBUGCTLMSR
:
1570 /* We support the non-activated case already */
1572 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1573 /* Values other than LBR and BTF are vendor-specific,
1574 thus reserved and should throw a #GP */
1577 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1580 case MSR_IA32_UCODE_REV
:
1581 case MSR_IA32_UCODE_WRITE
:
1582 case MSR_VM_HSAVE_PA
:
1583 case MSR_AMD64_PATCH_LOADER
:
1585 case 0x200 ... 0x2ff:
1586 return set_msr_mtrr(vcpu
, msr
, data
);
1587 case MSR_IA32_APICBASE
:
1588 kvm_set_apic_base(vcpu
, data
);
1590 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1591 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1592 case MSR_IA32_TSCDEADLINE
:
1593 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1595 case MSR_IA32_MISC_ENABLE
:
1596 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1598 case MSR_KVM_WALL_CLOCK_NEW
:
1599 case MSR_KVM_WALL_CLOCK
:
1600 vcpu
->kvm
->arch
.wall_clock
= data
;
1601 kvm_write_wall_clock(vcpu
->kvm
, data
);
1603 case MSR_KVM_SYSTEM_TIME_NEW
:
1604 case MSR_KVM_SYSTEM_TIME
: {
1605 kvmclock_reset(vcpu
);
1607 vcpu
->arch
.time
= data
;
1608 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1610 /* we verify if the enable bit is set... */
1614 /* ...but clean it before doing the actual write */
1615 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1617 vcpu
->arch
.time_page
=
1618 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1620 if (is_error_page(vcpu
->arch
.time_page
)) {
1621 kvm_release_page_clean(vcpu
->arch
.time_page
);
1622 vcpu
->arch
.time_page
= NULL
;
1626 case MSR_KVM_ASYNC_PF_EN
:
1627 if (kvm_pv_enable_async_pf(vcpu
, data
))
1630 case MSR_KVM_STEAL_TIME
:
1632 if (unlikely(!sched_info_on()))
1635 if (data
& KVM_STEAL_RESERVED_MASK
)
1638 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1639 data
& KVM_STEAL_VALID_BITS
))
1642 vcpu
->arch
.st
.msr_val
= data
;
1644 if (!(data
& KVM_MSR_ENABLED
))
1647 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1650 accumulate_steal_time(vcpu
);
1653 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
1657 case MSR_IA32_MCG_CTL
:
1658 case MSR_IA32_MCG_STATUS
:
1659 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1660 return set_msr_mce(vcpu
, msr
, data
);
1662 /* Performance counters are not protected by a CPUID bit,
1663 * so we should check all of them in the generic path for the sake of
1664 * cross vendor migration.
1665 * Writing a zero into the event select MSRs disables them,
1666 * which we perfectly emulate ;-). Any other value should be at least
1667 * reported, some guests depend on them.
1669 case MSR_K7_EVNTSEL0
:
1670 case MSR_K7_EVNTSEL1
:
1671 case MSR_K7_EVNTSEL2
:
1672 case MSR_K7_EVNTSEL3
:
1674 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1675 "0x%x data 0x%llx\n", msr
, data
);
1677 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1678 * so we ignore writes to make it happy.
1680 case MSR_K7_PERFCTR0
:
1681 case MSR_K7_PERFCTR1
:
1682 case MSR_K7_PERFCTR2
:
1683 case MSR_K7_PERFCTR3
:
1684 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1685 "0x%x data 0x%llx\n", msr
, data
);
1687 case MSR_P6_PERFCTR0
:
1688 case MSR_P6_PERFCTR1
:
1690 case MSR_P6_EVNTSEL0
:
1691 case MSR_P6_EVNTSEL1
:
1692 if (kvm_pmu_msr(vcpu
, msr
))
1693 return kvm_pmu_set_msr(vcpu
, msr
, data
);
1695 if (pr
|| data
!= 0)
1696 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
1697 "0x%x data 0x%llx\n", msr
, data
);
1699 case MSR_K7_CLK_CTL
:
1701 * Ignore all writes to this no longer documented MSR.
1702 * Writes are only relevant for old K7 processors,
1703 * all pre-dating SVM, but a recommended workaround from
1704 * AMD for these chips. It is possible to speicify the
1705 * affected processor models on the command line, hence
1706 * the need to ignore the workaround.
1709 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1710 if (kvm_hv_msr_partition_wide(msr
)) {
1712 mutex_lock(&vcpu
->kvm
->lock
);
1713 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1714 mutex_unlock(&vcpu
->kvm
->lock
);
1717 return set_msr_hyperv(vcpu
, msr
, data
);
1719 case MSR_IA32_BBL_CR_CTL3
:
1720 /* Drop writes to this legacy MSR -- see rdmsr
1721 * counterpart for further detail.
1723 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
1725 case MSR_AMD64_OSVW_ID_LENGTH
:
1726 if (!guest_cpuid_has_osvw(vcpu
))
1728 vcpu
->arch
.osvw
.length
= data
;
1730 case MSR_AMD64_OSVW_STATUS
:
1731 if (!guest_cpuid_has_osvw(vcpu
))
1733 vcpu
->arch
.osvw
.status
= data
;
1736 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1737 return xen_hvm_config(vcpu
, data
);
1738 if (kvm_pmu_msr(vcpu
, msr
))
1739 return kvm_pmu_set_msr(vcpu
, msr
, data
);
1741 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1745 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1752 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1756 * Reads an msr value (of 'msr_index') into 'pdata'.
1757 * Returns 0 on success, non-0 otherwise.
1758 * Assumes vcpu_load() was already called.
1760 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1762 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1765 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1767 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1769 if (!msr_mtrr_valid(msr
))
1772 if (msr
== MSR_MTRRdefType
)
1773 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1774 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1775 else if (msr
== MSR_MTRRfix64K_00000
)
1777 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1778 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1779 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1780 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1781 else if (msr
== MSR_IA32_CR_PAT
)
1782 *pdata
= vcpu
->arch
.pat
;
1783 else { /* Variable MTRRs */
1784 int idx
, is_mtrr_mask
;
1787 idx
= (msr
- 0x200) / 2;
1788 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1791 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1794 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1801 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1804 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1805 unsigned bank_num
= mcg_cap
& 0xff;
1808 case MSR_IA32_P5_MC_ADDR
:
1809 case MSR_IA32_P5_MC_TYPE
:
1812 case MSR_IA32_MCG_CAP
:
1813 data
= vcpu
->arch
.mcg_cap
;
1815 case MSR_IA32_MCG_CTL
:
1816 if (!(mcg_cap
& MCG_CTL_P
))
1818 data
= vcpu
->arch
.mcg_ctl
;
1820 case MSR_IA32_MCG_STATUS
:
1821 data
= vcpu
->arch
.mcg_status
;
1824 if (msr
>= MSR_IA32_MC0_CTL
&&
1825 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1826 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1827 data
= vcpu
->arch
.mce_banks
[offset
];
1836 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1839 struct kvm
*kvm
= vcpu
->kvm
;
1842 case HV_X64_MSR_GUEST_OS_ID
:
1843 data
= kvm
->arch
.hv_guest_os_id
;
1845 case HV_X64_MSR_HYPERCALL
:
1846 data
= kvm
->arch
.hv_hypercall
;
1849 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1857 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1862 case HV_X64_MSR_VP_INDEX
: {
1865 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1870 case HV_X64_MSR_EOI
:
1871 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1872 case HV_X64_MSR_ICR
:
1873 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1874 case HV_X64_MSR_TPR
:
1875 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1876 case HV_X64_MSR_APIC_ASSIST_PAGE
:
1877 data
= vcpu
->arch
.hv_vapic
;
1880 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1887 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1892 case MSR_IA32_PLATFORM_ID
:
1893 case MSR_IA32_EBL_CR_POWERON
:
1894 case MSR_IA32_DEBUGCTLMSR
:
1895 case MSR_IA32_LASTBRANCHFROMIP
:
1896 case MSR_IA32_LASTBRANCHTOIP
:
1897 case MSR_IA32_LASTINTFROMIP
:
1898 case MSR_IA32_LASTINTTOIP
:
1901 case MSR_VM_HSAVE_PA
:
1902 case MSR_K7_EVNTSEL0
:
1903 case MSR_K7_PERFCTR0
:
1904 case MSR_K8_INT_PENDING_MSG
:
1905 case MSR_AMD64_NB_CFG
:
1906 case MSR_FAM10H_MMIO_CONF_BASE
:
1909 case MSR_P6_PERFCTR0
:
1910 case MSR_P6_PERFCTR1
:
1911 case MSR_P6_EVNTSEL0
:
1912 case MSR_P6_EVNTSEL1
:
1913 if (kvm_pmu_msr(vcpu
, msr
))
1914 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
1917 case MSR_IA32_UCODE_REV
:
1918 data
= 0x100000000ULL
;
1921 data
= 0x500 | KVM_NR_VAR_MTRR
;
1923 case 0x200 ... 0x2ff:
1924 return get_msr_mtrr(vcpu
, msr
, pdata
);
1925 case 0xcd: /* fsb frequency */
1929 * MSR_EBC_FREQUENCY_ID
1930 * Conservative value valid for even the basic CPU models.
1931 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1932 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1933 * and 266MHz for model 3, or 4. Set Core Clock
1934 * Frequency to System Bus Frequency Ratio to 1 (bits
1935 * 31:24) even though these are only valid for CPU
1936 * models > 2, however guests may end up dividing or
1937 * multiplying by zero otherwise.
1939 case MSR_EBC_FREQUENCY_ID
:
1942 case MSR_IA32_APICBASE
:
1943 data
= kvm_get_apic_base(vcpu
);
1945 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1946 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1948 case MSR_IA32_TSCDEADLINE
:
1949 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
1951 case MSR_IA32_MISC_ENABLE
:
1952 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1954 case MSR_IA32_PERF_STATUS
:
1955 /* TSC increment by tick */
1957 /* CPU multiplier */
1958 data
|= (((uint64_t)4ULL) << 40);
1961 data
= vcpu
->arch
.efer
;
1963 case MSR_KVM_WALL_CLOCK
:
1964 case MSR_KVM_WALL_CLOCK_NEW
:
1965 data
= vcpu
->kvm
->arch
.wall_clock
;
1967 case MSR_KVM_SYSTEM_TIME
:
1968 case MSR_KVM_SYSTEM_TIME_NEW
:
1969 data
= vcpu
->arch
.time
;
1971 case MSR_KVM_ASYNC_PF_EN
:
1972 data
= vcpu
->arch
.apf
.msr_val
;
1974 case MSR_KVM_STEAL_TIME
:
1975 data
= vcpu
->arch
.st
.msr_val
;
1977 case MSR_IA32_P5_MC_ADDR
:
1978 case MSR_IA32_P5_MC_TYPE
:
1979 case MSR_IA32_MCG_CAP
:
1980 case MSR_IA32_MCG_CTL
:
1981 case MSR_IA32_MCG_STATUS
:
1982 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1983 return get_msr_mce(vcpu
, msr
, pdata
);
1984 case MSR_K7_CLK_CTL
:
1986 * Provide expected ramp-up count for K7. All other
1987 * are set to zero, indicating minimum divisors for
1990 * This prevents guest kernels on AMD host with CPU
1991 * type 6, model 8 and higher from exploding due to
1992 * the rdmsr failing.
1996 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1997 if (kvm_hv_msr_partition_wide(msr
)) {
1999 mutex_lock(&vcpu
->kvm
->lock
);
2000 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2001 mutex_unlock(&vcpu
->kvm
->lock
);
2004 return get_msr_hyperv(vcpu
, msr
, pdata
);
2006 case MSR_IA32_BBL_CR_CTL3
:
2007 /* This legacy MSR exists but isn't fully documented in current
2008 * silicon. It is however accessed by winxp in very narrow
2009 * scenarios where it sets bit #19, itself documented as
2010 * a "reserved" bit. Best effort attempt to source coherent
2011 * read data here should the balance of the register be
2012 * interpreted by the guest:
2014 * L2 cache control register 3: 64GB range, 256KB size,
2015 * enabled, latency 0x1, configured
2019 case MSR_AMD64_OSVW_ID_LENGTH
:
2020 if (!guest_cpuid_has_osvw(vcpu
))
2022 data
= vcpu
->arch
.osvw
.length
;
2024 case MSR_AMD64_OSVW_STATUS
:
2025 if (!guest_cpuid_has_osvw(vcpu
))
2027 data
= vcpu
->arch
.osvw
.status
;
2030 if (kvm_pmu_msr(vcpu
, msr
))
2031 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2033 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2036 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2044 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2047 * Read or write a bunch of msrs. All parameters are kernel addresses.
2049 * @return number of msrs set successfully.
2051 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2052 struct kvm_msr_entry
*entries
,
2053 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2054 unsigned index
, u64
*data
))
2058 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2059 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2060 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2062 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2068 * Read or write a bunch of msrs. Parameters are user addresses.
2070 * @return number of msrs set successfully.
2072 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2073 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2074 unsigned index
, u64
*data
),
2077 struct kvm_msrs msrs
;
2078 struct kvm_msr_entry
*entries
;
2083 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2087 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2090 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2091 entries
= memdup_user(user_msrs
->entries
, size
);
2092 if (IS_ERR(entries
)) {
2093 r
= PTR_ERR(entries
);
2097 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2102 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2113 int kvm_dev_ioctl_check_extension(long ext
)
2118 case KVM_CAP_IRQCHIP
:
2120 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2121 case KVM_CAP_SET_TSS_ADDR
:
2122 case KVM_CAP_EXT_CPUID
:
2123 case KVM_CAP_CLOCKSOURCE
:
2125 case KVM_CAP_NOP_IO_DELAY
:
2126 case KVM_CAP_MP_STATE
:
2127 case KVM_CAP_SYNC_MMU
:
2128 case KVM_CAP_USER_NMI
:
2129 case KVM_CAP_REINJECT_CONTROL
:
2130 case KVM_CAP_IRQ_INJECT_STATUS
:
2131 case KVM_CAP_ASSIGN_DEV_IRQ
:
2133 case KVM_CAP_IOEVENTFD
:
2135 case KVM_CAP_PIT_STATE2
:
2136 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2137 case KVM_CAP_XEN_HVM
:
2138 case KVM_CAP_ADJUST_CLOCK
:
2139 case KVM_CAP_VCPU_EVENTS
:
2140 case KVM_CAP_HYPERV
:
2141 case KVM_CAP_HYPERV_VAPIC
:
2142 case KVM_CAP_HYPERV_SPIN
:
2143 case KVM_CAP_PCI_SEGMENT
:
2144 case KVM_CAP_DEBUGREGS
:
2145 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2147 case KVM_CAP_ASYNC_PF
:
2148 case KVM_CAP_GET_TSC_KHZ
:
2149 case KVM_CAP_PCI_2_3
:
2150 case KVM_CAP_KVMCLOCK_CTRL
:
2153 case KVM_CAP_COALESCED_MMIO
:
2154 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2157 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2159 case KVM_CAP_NR_VCPUS
:
2160 r
= KVM_SOFT_MAX_VCPUS
;
2162 case KVM_CAP_MAX_VCPUS
:
2165 case KVM_CAP_NR_MEMSLOTS
:
2166 r
= KVM_MEMORY_SLOTS
;
2168 case KVM_CAP_PV_MMU
: /* obsolete */
2172 r
= iommu_present(&pci_bus_type
);
2175 r
= KVM_MAX_MCE_BANKS
;
2180 case KVM_CAP_TSC_CONTROL
:
2181 r
= kvm_has_tsc_control
;
2183 case KVM_CAP_TSC_DEADLINE_TIMER
:
2184 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2194 long kvm_arch_dev_ioctl(struct file
*filp
,
2195 unsigned int ioctl
, unsigned long arg
)
2197 void __user
*argp
= (void __user
*)arg
;
2201 case KVM_GET_MSR_INDEX_LIST
: {
2202 struct kvm_msr_list __user
*user_msr_list
= argp
;
2203 struct kvm_msr_list msr_list
;
2207 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2210 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2211 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2214 if (n
< msr_list
.nmsrs
)
2217 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2218 num_msrs_to_save
* sizeof(u32
)))
2220 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2222 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2227 case KVM_GET_SUPPORTED_CPUID
: {
2228 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2229 struct kvm_cpuid2 cpuid
;
2232 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2234 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2235 cpuid_arg
->entries
);
2240 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2245 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2248 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2250 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2262 static void wbinvd_ipi(void *garbage
)
2267 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2269 return vcpu
->kvm
->arch
.iommu_domain
&&
2270 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2273 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2275 /* Address WBINVD may be executed by guest */
2276 if (need_emulate_wbinvd(vcpu
)) {
2277 if (kvm_x86_ops
->has_wbinvd_exit())
2278 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2279 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2280 smp_call_function_single(vcpu
->cpu
,
2281 wbinvd_ipi
, NULL
, 1);
2284 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2286 /* Apply any externally detected TSC adjustments (due to suspend) */
2287 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2288 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2289 vcpu
->arch
.tsc_offset_adjustment
= 0;
2290 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2293 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2294 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2295 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2297 mark_tsc_unstable("KVM discovered backwards TSC");
2298 if (check_tsc_unstable()) {
2299 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2300 vcpu
->arch
.last_guest_tsc
);
2301 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2302 vcpu
->arch
.tsc_catchup
= 1;
2304 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2305 if (vcpu
->cpu
!= cpu
)
2306 kvm_migrate_timers(vcpu
);
2310 accumulate_steal_time(vcpu
);
2311 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2314 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2316 kvm_x86_ops
->vcpu_put(vcpu
);
2317 kvm_put_guest_fpu(vcpu
);
2318 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2321 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2322 struct kvm_lapic_state
*s
)
2324 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2329 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2330 struct kvm_lapic_state
*s
)
2332 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2333 kvm_apic_post_state_restore(vcpu
);
2334 update_cr8_intercept(vcpu
);
2339 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2340 struct kvm_interrupt
*irq
)
2342 if (irq
->irq
< 0 || irq
->irq
>= 256)
2344 if (irqchip_in_kernel(vcpu
->kvm
))
2347 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2348 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2353 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2355 kvm_inject_nmi(vcpu
);
2360 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2361 struct kvm_tpr_access_ctl
*tac
)
2365 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2369 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2373 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2376 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2378 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2381 vcpu
->arch
.mcg_cap
= mcg_cap
;
2382 /* Init IA32_MCG_CTL to all 1s */
2383 if (mcg_cap
& MCG_CTL_P
)
2384 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2385 /* Init IA32_MCi_CTL to all 1s */
2386 for (bank
= 0; bank
< bank_num
; bank
++)
2387 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2392 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2393 struct kvm_x86_mce
*mce
)
2395 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2396 unsigned bank_num
= mcg_cap
& 0xff;
2397 u64
*banks
= vcpu
->arch
.mce_banks
;
2399 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2402 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2403 * reporting is disabled
2405 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2406 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2408 banks
+= 4 * mce
->bank
;
2410 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2411 * reporting is disabled for the bank
2413 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2415 if (mce
->status
& MCI_STATUS_UC
) {
2416 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2417 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2418 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2421 if (banks
[1] & MCI_STATUS_VAL
)
2422 mce
->status
|= MCI_STATUS_OVER
;
2423 banks
[2] = mce
->addr
;
2424 banks
[3] = mce
->misc
;
2425 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2426 banks
[1] = mce
->status
;
2427 kvm_queue_exception(vcpu
, MC_VECTOR
);
2428 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2429 || !(banks
[1] & MCI_STATUS_UC
)) {
2430 if (banks
[1] & MCI_STATUS_VAL
)
2431 mce
->status
|= MCI_STATUS_OVER
;
2432 banks
[2] = mce
->addr
;
2433 banks
[3] = mce
->misc
;
2434 banks
[1] = mce
->status
;
2436 banks
[1] |= MCI_STATUS_OVER
;
2440 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2441 struct kvm_vcpu_events
*events
)
2444 events
->exception
.injected
=
2445 vcpu
->arch
.exception
.pending
&&
2446 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2447 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2448 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2449 events
->exception
.pad
= 0;
2450 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2452 events
->interrupt
.injected
=
2453 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2454 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2455 events
->interrupt
.soft
= 0;
2456 events
->interrupt
.shadow
=
2457 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2458 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2460 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2461 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2462 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2463 events
->nmi
.pad
= 0;
2465 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2467 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2468 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2469 | KVM_VCPUEVENT_VALID_SHADOW
);
2470 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2473 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2474 struct kvm_vcpu_events
*events
)
2476 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2477 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2478 | KVM_VCPUEVENT_VALID_SHADOW
))
2482 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2483 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2484 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2485 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2487 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2488 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2489 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2490 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2491 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2492 events
->interrupt
.shadow
);
2494 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2495 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2496 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2497 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2499 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2500 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2502 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2507 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2508 struct kvm_debugregs
*dbgregs
)
2510 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2511 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2512 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2514 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2517 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2518 struct kvm_debugregs
*dbgregs
)
2523 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2524 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2525 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2530 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2531 struct kvm_xsave
*guest_xsave
)
2534 memcpy(guest_xsave
->region
,
2535 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2538 memcpy(guest_xsave
->region
,
2539 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2540 sizeof(struct i387_fxsave_struct
));
2541 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2546 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2547 struct kvm_xsave
*guest_xsave
)
2550 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2553 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2554 guest_xsave
->region
, xstate_size
);
2556 if (xstate_bv
& ~XSTATE_FPSSE
)
2558 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2559 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2564 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2565 struct kvm_xcrs
*guest_xcrs
)
2567 if (!cpu_has_xsave
) {
2568 guest_xcrs
->nr_xcrs
= 0;
2572 guest_xcrs
->nr_xcrs
= 1;
2573 guest_xcrs
->flags
= 0;
2574 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2575 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2578 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2579 struct kvm_xcrs
*guest_xcrs
)
2586 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2589 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2590 /* Only support XCR0 currently */
2591 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2592 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2593 guest_xcrs
->xcrs
[0].value
);
2602 * kvm_set_guest_paused() indicates to the guest kernel that it has been
2603 * stopped by the hypervisor. This function will be called from the host only.
2604 * EINVAL is returned when the host attempts to set the flag for a guest that
2605 * does not support pv clocks.
2607 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
2609 struct pvclock_vcpu_time_info
*src
= &vcpu
->arch
.hv_clock
;
2610 if (!vcpu
->arch
.time_page
)
2612 src
->flags
|= PVCLOCK_GUEST_STOPPED
;
2613 mark_page_dirty(vcpu
->kvm
, vcpu
->arch
.time
>> PAGE_SHIFT
);
2614 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2618 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2619 unsigned int ioctl
, unsigned long arg
)
2621 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2622 void __user
*argp
= (void __user
*)arg
;
2625 struct kvm_lapic_state
*lapic
;
2626 struct kvm_xsave
*xsave
;
2627 struct kvm_xcrs
*xcrs
;
2633 case KVM_GET_LAPIC
: {
2635 if (!vcpu
->arch
.apic
)
2637 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2642 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2646 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2651 case KVM_SET_LAPIC
: {
2653 if (!vcpu
->arch
.apic
)
2655 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
2656 if (IS_ERR(u
.lapic
)) {
2657 r
= PTR_ERR(u
.lapic
);
2661 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2667 case KVM_INTERRUPT
: {
2668 struct kvm_interrupt irq
;
2671 if (copy_from_user(&irq
, argp
, sizeof irq
))
2673 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2680 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2686 case KVM_SET_CPUID
: {
2687 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2688 struct kvm_cpuid cpuid
;
2691 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2693 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2698 case KVM_SET_CPUID2
: {
2699 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2700 struct kvm_cpuid2 cpuid
;
2703 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2705 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2706 cpuid_arg
->entries
);
2711 case KVM_GET_CPUID2
: {
2712 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2713 struct kvm_cpuid2 cpuid
;
2716 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2718 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2719 cpuid_arg
->entries
);
2723 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2729 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2732 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2734 case KVM_TPR_ACCESS_REPORTING
: {
2735 struct kvm_tpr_access_ctl tac
;
2738 if (copy_from_user(&tac
, argp
, sizeof tac
))
2740 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2744 if (copy_to_user(argp
, &tac
, sizeof tac
))
2749 case KVM_SET_VAPIC_ADDR
: {
2750 struct kvm_vapic_addr va
;
2753 if (!irqchip_in_kernel(vcpu
->kvm
))
2756 if (copy_from_user(&va
, argp
, sizeof va
))
2759 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2762 case KVM_X86_SETUP_MCE
: {
2766 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2768 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2771 case KVM_X86_SET_MCE
: {
2772 struct kvm_x86_mce mce
;
2775 if (copy_from_user(&mce
, argp
, sizeof mce
))
2777 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2780 case KVM_GET_VCPU_EVENTS
: {
2781 struct kvm_vcpu_events events
;
2783 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2786 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2791 case KVM_SET_VCPU_EVENTS
: {
2792 struct kvm_vcpu_events events
;
2795 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2798 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2801 case KVM_GET_DEBUGREGS
: {
2802 struct kvm_debugregs dbgregs
;
2804 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2807 if (copy_to_user(argp
, &dbgregs
,
2808 sizeof(struct kvm_debugregs
)))
2813 case KVM_SET_DEBUGREGS
: {
2814 struct kvm_debugregs dbgregs
;
2817 if (copy_from_user(&dbgregs
, argp
,
2818 sizeof(struct kvm_debugregs
)))
2821 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2824 case KVM_GET_XSAVE
: {
2825 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2830 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2833 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
2838 case KVM_SET_XSAVE
: {
2839 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
2840 if (IS_ERR(u
.xsave
)) {
2841 r
= PTR_ERR(u
.xsave
);
2845 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
2848 case KVM_GET_XCRS
: {
2849 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2854 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
2857 if (copy_to_user(argp
, u
.xcrs
,
2858 sizeof(struct kvm_xcrs
)))
2863 case KVM_SET_XCRS
: {
2864 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
2865 if (IS_ERR(u
.xcrs
)) {
2866 r
= PTR_ERR(u
.xcrs
);
2870 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
2873 case KVM_SET_TSC_KHZ
: {
2877 user_tsc_khz
= (u32
)arg
;
2879 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
2882 if (user_tsc_khz
== 0)
2883 user_tsc_khz
= tsc_khz
;
2885 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
2890 case KVM_GET_TSC_KHZ
: {
2891 r
= vcpu
->arch
.virtual_tsc_khz
;
2894 case KVM_KVMCLOCK_CTRL
: {
2895 r
= kvm_set_guest_paused(vcpu
);
2906 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
2908 return VM_FAULT_SIGBUS
;
2911 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2915 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2917 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2921 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2924 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2928 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2929 u32 kvm_nr_mmu_pages
)
2931 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2934 mutex_lock(&kvm
->slots_lock
);
2935 spin_lock(&kvm
->mmu_lock
);
2937 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2938 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2940 spin_unlock(&kvm
->mmu_lock
);
2941 mutex_unlock(&kvm
->slots_lock
);
2945 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2947 return kvm
->arch
.n_max_mmu_pages
;
2950 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2955 switch (chip
->chip_id
) {
2956 case KVM_IRQCHIP_PIC_MASTER
:
2957 memcpy(&chip
->chip
.pic
,
2958 &pic_irqchip(kvm
)->pics
[0],
2959 sizeof(struct kvm_pic_state
));
2961 case KVM_IRQCHIP_PIC_SLAVE
:
2962 memcpy(&chip
->chip
.pic
,
2963 &pic_irqchip(kvm
)->pics
[1],
2964 sizeof(struct kvm_pic_state
));
2966 case KVM_IRQCHIP_IOAPIC
:
2967 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2976 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2981 switch (chip
->chip_id
) {
2982 case KVM_IRQCHIP_PIC_MASTER
:
2983 spin_lock(&pic_irqchip(kvm
)->lock
);
2984 memcpy(&pic_irqchip(kvm
)->pics
[0],
2986 sizeof(struct kvm_pic_state
));
2987 spin_unlock(&pic_irqchip(kvm
)->lock
);
2989 case KVM_IRQCHIP_PIC_SLAVE
:
2990 spin_lock(&pic_irqchip(kvm
)->lock
);
2991 memcpy(&pic_irqchip(kvm
)->pics
[1],
2993 sizeof(struct kvm_pic_state
));
2994 spin_unlock(&pic_irqchip(kvm
)->lock
);
2996 case KVM_IRQCHIP_IOAPIC
:
2997 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3003 kvm_pic_update_irq(pic_irqchip(kvm
));
3007 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3011 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3012 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3013 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3017 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3021 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3022 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3023 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3024 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3028 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3032 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3033 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3034 sizeof(ps
->channels
));
3035 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3036 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3037 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3041 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3043 int r
= 0, start
= 0;
3044 u32 prev_legacy
, cur_legacy
;
3045 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3046 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3047 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3048 if (!prev_legacy
&& cur_legacy
)
3050 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3051 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3052 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3053 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3054 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3058 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3059 struct kvm_reinject_control
*control
)
3061 if (!kvm
->arch
.vpit
)
3063 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3064 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3065 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3070 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3071 * @kvm: kvm instance
3072 * @log: slot id and address to which we copy the log
3074 * We need to keep it in mind that VCPU threads can write to the bitmap
3075 * concurrently. So, to avoid losing data, we keep the following order for
3078 * 1. Take a snapshot of the bit and clear it if needed.
3079 * 2. Write protect the corresponding page.
3080 * 3. Flush TLB's if needed.
3081 * 4. Copy the snapshot to the userspace.
3083 * Between 2 and 3, the guest may write to the page using the remaining TLB
3084 * entry. This is not a problem because the page will be reported dirty at
3085 * step 4 using the snapshot taken before and step 3 ensures that successive
3086 * writes will be logged for the next call.
3088 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3091 struct kvm_memory_slot
*memslot
;
3093 unsigned long *dirty_bitmap
;
3094 unsigned long *dirty_bitmap_buffer
;
3095 bool is_dirty
= false;
3097 mutex_lock(&kvm
->slots_lock
);
3100 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3103 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3105 dirty_bitmap
= memslot
->dirty_bitmap
;
3110 n
= kvm_dirty_bitmap_bytes(memslot
);
3112 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3113 memset(dirty_bitmap_buffer
, 0, n
);
3115 spin_lock(&kvm
->mmu_lock
);
3117 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3121 if (!dirty_bitmap
[i
])
3126 mask
= xchg(&dirty_bitmap
[i
], 0);
3127 dirty_bitmap_buffer
[i
] = mask
;
3129 offset
= i
* BITS_PER_LONG
;
3130 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3133 kvm_flush_remote_tlbs(kvm
);
3135 spin_unlock(&kvm
->mmu_lock
);
3138 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3143 mutex_unlock(&kvm
->slots_lock
);
3147 long kvm_arch_vm_ioctl(struct file
*filp
,
3148 unsigned int ioctl
, unsigned long arg
)
3150 struct kvm
*kvm
= filp
->private_data
;
3151 void __user
*argp
= (void __user
*)arg
;
3154 * This union makes it completely explicit to gcc-3.x
3155 * that these two variables' stack usage should be
3156 * combined, not added together.
3159 struct kvm_pit_state ps
;
3160 struct kvm_pit_state2 ps2
;
3161 struct kvm_pit_config pit_config
;
3165 case KVM_SET_TSS_ADDR
:
3166 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3170 case KVM_SET_IDENTITY_MAP_ADDR
: {
3174 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3176 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3181 case KVM_SET_NR_MMU_PAGES
:
3182 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3186 case KVM_GET_NR_MMU_PAGES
:
3187 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3189 case KVM_CREATE_IRQCHIP
: {
3190 struct kvm_pic
*vpic
;
3192 mutex_lock(&kvm
->lock
);
3195 goto create_irqchip_unlock
;
3197 if (atomic_read(&kvm
->online_vcpus
))
3198 goto create_irqchip_unlock
;
3200 vpic
= kvm_create_pic(kvm
);
3202 r
= kvm_ioapic_init(kvm
);
3204 mutex_lock(&kvm
->slots_lock
);
3205 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3207 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3209 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3211 mutex_unlock(&kvm
->slots_lock
);
3213 goto create_irqchip_unlock
;
3216 goto create_irqchip_unlock
;
3218 kvm
->arch
.vpic
= vpic
;
3220 r
= kvm_setup_default_irq_routing(kvm
);
3222 mutex_lock(&kvm
->slots_lock
);
3223 mutex_lock(&kvm
->irq_lock
);
3224 kvm_ioapic_destroy(kvm
);
3225 kvm_destroy_pic(kvm
);
3226 mutex_unlock(&kvm
->irq_lock
);
3227 mutex_unlock(&kvm
->slots_lock
);
3229 create_irqchip_unlock
:
3230 mutex_unlock(&kvm
->lock
);
3233 case KVM_CREATE_PIT
:
3234 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3236 case KVM_CREATE_PIT2
:
3238 if (copy_from_user(&u
.pit_config
, argp
,
3239 sizeof(struct kvm_pit_config
)))
3242 mutex_lock(&kvm
->slots_lock
);
3245 goto create_pit_unlock
;
3247 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3251 mutex_unlock(&kvm
->slots_lock
);
3253 case KVM_IRQ_LINE_STATUS
:
3254 case KVM_IRQ_LINE
: {
3255 struct kvm_irq_level irq_event
;
3258 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3261 if (irqchip_in_kernel(kvm
)) {
3263 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3264 irq_event
.irq
, irq_event
.level
);
3265 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3267 irq_event
.status
= status
;
3268 if (copy_to_user(argp
, &irq_event
,
3276 case KVM_GET_IRQCHIP
: {
3277 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3278 struct kvm_irqchip
*chip
;
3280 chip
= memdup_user(argp
, sizeof(*chip
));
3287 if (!irqchip_in_kernel(kvm
))
3288 goto get_irqchip_out
;
3289 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3291 goto get_irqchip_out
;
3293 if (copy_to_user(argp
, chip
, sizeof *chip
))
3294 goto get_irqchip_out
;
3302 case KVM_SET_IRQCHIP
: {
3303 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3304 struct kvm_irqchip
*chip
;
3306 chip
= memdup_user(argp
, sizeof(*chip
));
3313 if (!irqchip_in_kernel(kvm
))
3314 goto set_irqchip_out
;
3315 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3317 goto set_irqchip_out
;
3327 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3330 if (!kvm
->arch
.vpit
)
3332 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3336 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3343 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3346 if (!kvm
->arch
.vpit
)
3348 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3354 case KVM_GET_PIT2
: {
3356 if (!kvm
->arch
.vpit
)
3358 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3362 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3367 case KVM_SET_PIT2
: {
3369 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3372 if (!kvm
->arch
.vpit
)
3374 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3380 case KVM_REINJECT_CONTROL
: {
3381 struct kvm_reinject_control control
;
3383 if (copy_from_user(&control
, argp
, sizeof(control
)))
3385 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3391 case KVM_XEN_HVM_CONFIG
: {
3393 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3394 sizeof(struct kvm_xen_hvm_config
)))
3397 if (kvm
->arch
.xen_hvm_config
.flags
)
3402 case KVM_SET_CLOCK
: {
3403 struct kvm_clock_data user_ns
;
3408 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3416 local_irq_disable();
3417 now_ns
= get_kernel_ns();
3418 delta
= user_ns
.clock
- now_ns
;
3420 kvm
->arch
.kvmclock_offset
= delta
;
3423 case KVM_GET_CLOCK
: {
3424 struct kvm_clock_data user_ns
;
3427 local_irq_disable();
3428 now_ns
= get_kernel_ns();
3429 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3432 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3435 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3448 static void kvm_init_msr_list(void)
3453 /* skip the first msrs in the list. KVM-specific */
3454 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3455 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3458 msrs_to_save
[j
] = msrs_to_save
[i
];
3461 num_msrs_to_save
= j
;
3464 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3472 if (!(vcpu
->arch
.apic
&&
3473 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3474 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3485 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3492 if (!(vcpu
->arch
.apic
&&
3493 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3494 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3496 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3506 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3507 struct kvm_segment
*var
, int seg
)
3509 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3512 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3513 struct kvm_segment
*var
, int seg
)
3515 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3518 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3521 struct x86_exception exception
;
3523 BUG_ON(!mmu_is_nested(vcpu
));
3525 /* NPT walks are always user-walks */
3526 access
|= PFERR_USER_MASK
;
3527 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3532 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3533 struct x86_exception
*exception
)
3535 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3536 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3539 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3540 struct x86_exception
*exception
)
3542 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3543 access
|= PFERR_FETCH_MASK
;
3544 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3547 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3548 struct x86_exception
*exception
)
3550 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3551 access
|= PFERR_WRITE_MASK
;
3552 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3555 /* uses this to access any guest's mapped memory without checking CPL */
3556 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3557 struct x86_exception
*exception
)
3559 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3562 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3563 struct kvm_vcpu
*vcpu
, u32 access
,
3564 struct x86_exception
*exception
)
3567 int r
= X86EMUL_CONTINUE
;
3570 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3572 unsigned offset
= addr
& (PAGE_SIZE
-1);
3573 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3576 if (gpa
== UNMAPPED_GVA
)
3577 return X86EMUL_PROPAGATE_FAULT
;
3578 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3580 r
= X86EMUL_IO_NEEDED
;
3592 /* used for instruction fetching */
3593 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3594 gva_t addr
, void *val
, unsigned int bytes
,
3595 struct x86_exception
*exception
)
3597 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3598 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3600 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3601 access
| PFERR_FETCH_MASK
,
3605 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3606 gva_t addr
, void *val
, unsigned int bytes
,
3607 struct x86_exception
*exception
)
3609 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3610 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3612 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3615 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
3617 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3618 gva_t addr
, void *val
, unsigned int bytes
,
3619 struct x86_exception
*exception
)
3621 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3622 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3625 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3626 gva_t addr
, void *val
,
3628 struct x86_exception
*exception
)
3630 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3632 int r
= X86EMUL_CONTINUE
;
3635 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3638 unsigned offset
= addr
& (PAGE_SIZE
-1);
3639 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3642 if (gpa
== UNMAPPED_GVA
)
3643 return X86EMUL_PROPAGATE_FAULT
;
3644 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3646 r
= X86EMUL_IO_NEEDED
;
3657 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
3659 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
3660 gpa_t
*gpa
, struct x86_exception
*exception
,
3663 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3665 if (vcpu_match_mmio_gva(vcpu
, gva
) &&
3666 check_write_user_access(vcpu
, write
, access
,
3667 vcpu
->arch
.access
)) {
3668 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
3669 (gva
& (PAGE_SIZE
- 1));
3670 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
3675 access
|= PFERR_WRITE_MASK
;
3677 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3679 if (*gpa
== UNMAPPED_GVA
)
3682 /* For APIC access vmexit */
3683 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3686 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
3687 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
3694 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3695 const void *val
, int bytes
)
3699 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3702 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
3706 struct read_write_emulator_ops
{
3707 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
3709 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3710 void *val
, int bytes
);
3711 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3712 int bytes
, void *val
);
3713 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3714 void *val
, int bytes
);
3718 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
3720 if (vcpu
->mmio_read_completed
) {
3721 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3722 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
3723 vcpu
->mmio_read_completed
= 0;
3730 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3731 void *val
, int bytes
)
3733 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3736 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3737 void *val
, int bytes
)
3739 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
3742 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
3744 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3745 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
3748 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3749 void *val
, int bytes
)
3751 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3752 return X86EMUL_IO_NEEDED
;
3755 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3756 void *val
, int bytes
)
3758 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
3760 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, frag
->len
);
3761 return X86EMUL_CONTINUE
;
3764 static struct read_write_emulator_ops read_emultor
= {
3765 .read_write_prepare
= read_prepare
,
3766 .read_write_emulate
= read_emulate
,
3767 .read_write_mmio
= vcpu_mmio_read
,
3768 .read_write_exit_mmio
= read_exit_mmio
,
3771 static struct read_write_emulator_ops write_emultor
= {
3772 .read_write_emulate
= write_emulate
,
3773 .read_write_mmio
= write_mmio
,
3774 .read_write_exit_mmio
= write_exit_mmio
,
3778 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
3780 struct x86_exception
*exception
,
3781 struct kvm_vcpu
*vcpu
,
3782 struct read_write_emulator_ops
*ops
)
3786 bool write
= ops
->write
;
3787 struct kvm_mmio_fragment
*frag
;
3789 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
3792 return X86EMUL_PROPAGATE_FAULT
;
3794 /* For APIC access vmexit */
3798 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
3799 return X86EMUL_CONTINUE
;
3803 * Is this MMIO handled locally?
3805 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
3806 if (handled
== bytes
)
3807 return X86EMUL_CONTINUE
;
3814 unsigned now
= min(bytes
, 8U);
3816 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
3825 return X86EMUL_CONTINUE
;
3828 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
3829 void *val
, unsigned int bytes
,
3830 struct x86_exception
*exception
,
3831 struct read_write_emulator_ops
*ops
)
3833 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3837 if (ops
->read_write_prepare
&&
3838 ops
->read_write_prepare(vcpu
, val
, bytes
))
3839 return X86EMUL_CONTINUE
;
3841 vcpu
->mmio_nr_fragments
= 0;
3843 /* Crossing a page boundary? */
3844 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3847 now
= -addr
& ~PAGE_MASK
;
3848 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
3851 if (rc
!= X86EMUL_CONTINUE
)
3858 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
3860 if (rc
!= X86EMUL_CONTINUE
)
3863 if (!vcpu
->mmio_nr_fragments
)
3866 gpa
= vcpu
->mmio_fragments
[0].gpa
;
3868 vcpu
->mmio_needed
= 1;
3869 vcpu
->mmio_cur_fragment
= 0;
3871 vcpu
->run
->mmio
.len
= vcpu
->mmio_fragments
[0].len
;
3872 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
3873 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3874 vcpu
->run
->mmio
.phys_addr
= gpa
;
3876 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
3879 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
3883 struct x86_exception
*exception
)
3885 return emulator_read_write(ctxt
, addr
, val
, bytes
,
3886 exception
, &read_emultor
);
3889 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
3893 struct x86_exception
*exception
)
3895 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
3896 exception
, &write_emultor
);
3899 #define CMPXCHG_TYPE(t, ptr, old, new) \
3900 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3902 #ifdef CONFIG_X86_64
3903 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3905 # define CMPXCHG64(ptr, old, new) \
3906 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3909 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
3914 struct x86_exception
*exception
)
3916 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3922 /* guests cmpxchg8b have to be emulated atomically */
3923 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3926 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3928 if (gpa
== UNMAPPED_GVA
||
3929 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3932 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3935 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3936 if (is_error_page(page
)) {
3937 kvm_release_page_clean(page
);
3941 kaddr
= kmap_atomic(page
);
3942 kaddr
+= offset_in_page(gpa
);
3945 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3948 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3951 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3954 exchanged
= CMPXCHG64(kaddr
, old
, new);
3959 kunmap_atomic(kaddr
);
3960 kvm_release_page_dirty(page
);
3963 return X86EMUL_CMPXCHG_FAILED
;
3965 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
3967 return X86EMUL_CONTINUE
;
3970 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3972 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
3975 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3977 /* TODO: String I/O for in kernel device */
3980 if (vcpu
->arch
.pio
.in
)
3981 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3982 vcpu
->arch
.pio
.size
, pd
);
3984 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3985 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3990 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
3991 unsigned short port
, void *val
,
3992 unsigned int count
, bool in
)
3994 trace_kvm_pio(!in
, port
, size
, count
);
3996 vcpu
->arch
.pio
.port
= port
;
3997 vcpu
->arch
.pio
.in
= in
;
3998 vcpu
->arch
.pio
.count
= count
;
3999 vcpu
->arch
.pio
.size
= size
;
4001 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4002 vcpu
->arch
.pio
.count
= 0;
4006 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4007 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4008 vcpu
->run
->io
.size
= size
;
4009 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4010 vcpu
->run
->io
.count
= count
;
4011 vcpu
->run
->io
.port
= port
;
4016 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4017 int size
, unsigned short port
, void *val
,
4020 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4023 if (vcpu
->arch
.pio
.count
)
4026 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4029 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4030 vcpu
->arch
.pio
.count
= 0;
4037 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4038 int size
, unsigned short port
,
4039 const void *val
, unsigned int count
)
4041 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4043 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4044 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4047 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4049 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4052 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4054 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4057 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4059 if (!need_emulate_wbinvd(vcpu
))
4060 return X86EMUL_CONTINUE
;
4062 if (kvm_x86_ops
->has_wbinvd_exit()) {
4063 int cpu
= get_cpu();
4065 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4066 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4067 wbinvd_ipi
, NULL
, 1);
4069 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4072 return X86EMUL_CONTINUE
;
4074 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4076 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4078 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4081 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4083 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4086 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4089 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4092 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4094 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4097 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4099 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4100 unsigned long value
;
4104 value
= kvm_read_cr0(vcpu
);
4107 value
= vcpu
->arch
.cr2
;
4110 value
= kvm_read_cr3(vcpu
);
4113 value
= kvm_read_cr4(vcpu
);
4116 value
= kvm_get_cr8(vcpu
);
4119 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4126 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4128 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4133 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4136 vcpu
->arch
.cr2
= val
;
4139 res
= kvm_set_cr3(vcpu
, val
);
4142 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4145 res
= kvm_set_cr8(vcpu
, val
);
4148 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4155 static void emulator_set_rflags(struct x86_emulate_ctxt
*ctxt
, ulong val
)
4157 kvm_set_rflags(emul_to_vcpu(ctxt
), val
);
4160 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4162 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4165 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4167 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4170 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4172 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4175 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4177 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4180 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4182 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4185 static unsigned long emulator_get_cached_segment_base(
4186 struct x86_emulate_ctxt
*ctxt
, int seg
)
4188 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4191 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4192 struct desc_struct
*desc
, u32
*base3
,
4195 struct kvm_segment var
;
4197 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4198 *selector
= var
.selector
;
4205 set_desc_limit(desc
, var
.limit
);
4206 set_desc_base(desc
, (unsigned long)var
.base
);
4207 #ifdef CONFIG_X86_64
4209 *base3
= var
.base
>> 32;
4211 desc
->type
= var
.type
;
4213 desc
->dpl
= var
.dpl
;
4214 desc
->p
= var
.present
;
4215 desc
->avl
= var
.avl
;
4223 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4224 struct desc_struct
*desc
, u32 base3
,
4227 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4228 struct kvm_segment var
;
4230 var
.selector
= selector
;
4231 var
.base
= get_desc_base(desc
);
4232 #ifdef CONFIG_X86_64
4233 var
.base
|= ((u64
)base3
) << 32;
4235 var
.limit
= get_desc_limit(desc
);
4237 var
.limit
= (var
.limit
<< 12) | 0xfff;
4238 var
.type
= desc
->type
;
4239 var
.present
= desc
->p
;
4240 var
.dpl
= desc
->dpl
;
4245 var
.avl
= desc
->avl
;
4246 var
.present
= desc
->p
;
4247 var
.unusable
= !var
.present
;
4250 kvm_set_segment(vcpu
, &var
, seg
);
4254 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4255 u32 msr_index
, u64
*pdata
)
4257 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4260 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4261 u32 msr_index
, u64 data
)
4263 return kvm_set_msr(emul_to_vcpu(ctxt
), msr_index
, data
);
4266 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4267 u32 pmc
, u64
*pdata
)
4269 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4272 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4274 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4277 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4280 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4282 * CR0.TS may reference the host fpu state, not the guest fpu state,
4283 * so it may be clear at this point.
4288 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4293 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4294 struct x86_instruction_info
*info
,
4295 enum x86_intercept_stage stage
)
4297 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4300 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4301 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4303 struct kvm_cpuid_entry2
*cpuid
= NULL
;
4306 cpuid
= kvm_find_cpuid_entry(emul_to_vcpu(ctxt
),
4322 static struct x86_emulate_ops emulate_ops
= {
4323 .read_std
= kvm_read_guest_virt_system
,
4324 .write_std
= kvm_write_guest_virt_system
,
4325 .fetch
= kvm_fetch_guest_virt
,
4326 .read_emulated
= emulator_read_emulated
,
4327 .write_emulated
= emulator_write_emulated
,
4328 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4329 .invlpg
= emulator_invlpg
,
4330 .pio_in_emulated
= emulator_pio_in_emulated
,
4331 .pio_out_emulated
= emulator_pio_out_emulated
,
4332 .get_segment
= emulator_get_segment
,
4333 .set_segment
= emulator_set_segment
,
4334 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4335 .get_gdt
= emulator_get_gdt
,
4336 .get_idt
= emulator_get_idt
,
4337 .set_gdt
= emulator_set_gdt
,
4338 .set_idt
= emulator_set_idt
,
4339 .get_cr
= emulator_get_cr
,
4340 .set_cr
= emulator_set_cr
,
4341 .set_rflags
= emulator_set_rflags
,
4342 .cpl
= emulator_get_cpl
,
4343 .get_dr
= emulator_get_dr
,
4344 .set_dr
= emulator_set_dr
,
4345 .set_msr
= emulator_set_msr
,
4346 .get_msr
= emulator_get_msr
,
4347 .read_pmc
= emulator_read_pmc
,
4348 .halt
= emulator_halt
,
4349 .wbinvd
= emulator_wbinvd
,
4350 .fix_hypercall
= emulator_fix_hypercall
,
4351 .get_fpu
= emulator_get_fpu
,
4352 .put_fpu
= emulator_put_fpu
,
4353 .intercept
= emulator_intercept
,
4354 .get_cpuid
= emulator_get_cpuid
,
4357 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4359 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4360 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4361 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4362 vcpu
->arch
.regs_dirty
= ~0;
4365 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4367 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4369 * an sti; sti; sequence only disable interrupts for the first
4370 * instruction. So, if the last instruction, be it emulated or
4371 * not, left the system with the INT_STI flag enabled, it
4372 * means that the last instruction is an sti. We should not
4373 * leave the flag on in this case. The same goes for mov ss
4375 if (!(int_shadow
& mask
))
4376 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4379 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4381 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4382 if (ctxt
->exception
.vector
== PF_VECTOR
)
4383 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4384 else if (ctxt
->exception
.error_code_valid
)
4385 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4386 ctxt
->exception
.error_code
);
4388 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4391 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
,
4392 const unsigned long *regs
)
4394 memset(&ctxt
->twobyte
, 0,
4395 (void *)&ctxt
->regs
- (void *)&ctxt
->twobyte
);
4396 memcpy(ctxt
->regs
, regs
, sizeof(ctxt
->regs
));
4398 ctxt
->fetch
.start
= 0;
4399 ctxt
->fetch
.end
= 0;
4400 ctxt
->io_read
.pos
= 0;
4401 ctxt
->io_read
.end
= 0;
4402 ctxt
->mem_read
.pos
= 0;
4403 ctxt
->mem_read
.end
= 0;
4406 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4408 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4412 * TODO: fix emulate.c to use guest_read/write_register
4413 * instead of direct ->regs accesses, can save hundred cycles
4414 * on Intel for instructions that don't read/change RSP, for
4417 cache_all_regs(vcpu
);
4419 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4421 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4422 ctxt
->eip
= kvm_rip_read(vcpu
);
4423 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4424 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4425 cs_l
? X86EMUL_MODE_PROT64
:
4426 cs_db
? X86EMUL_MODE_PROT32
:
4427 X86EMUL_MODE_PROT16
;
4428 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4430 init_decode_cache(ctxt
, vcpu
->arch
.regs
);
4431 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4434 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4436 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4439 init_emulate_ctxt(vcpu
);
4443 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4444 ret
= emulate_int_real(ctxt
, irq
);
4446 if (ret
!= X86EMUL_CONTINUE
)
4447 return EMULATE_FAIL
;
4449 ctxt
->eip
= ctxt
->_eip
;
4450 memcpy(vcpu
->arch
.regs
, ctxt
->regs
, sizeof ctxt
->regs
);
4451 kvm_rip_write(vcpu
, ctxt
->eip
);
4452 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4454 if (irq
== NMI_VECTOR
)
4455 vcpu
->arch
.nmi_pending
= 0;
4457 vcpu
->arch
.interrupt
.pending
= false;
4459 return EMULATE_DONE
;
4461 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4463 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4465 int r
= EMULATE_DONE
;
4467 ++vcpu
->stat
.insn_emulation_fail
;
4468 trace_kvm_emulate_insn_failed(vcpu
);
4469 if (!is_guest_mode(vcpu
)) {
4470 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4471 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4472 vcpu
->run
->internal
.ndata
= 0;
4475 kvm_queue_exception(vcpu
, UD_VECTOR
);
4480 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4488 * if emulation was due to access to shadowed page table
4489 * and it failed try to unshadow page and re-entetr the
4490 * guest to let CPU execute the instruction.
4492 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4495 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4497 if (gpa
== UNMAPPED_GVA
)
4498 return true; /* let cpu generate fault */
4500 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4506 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
4507 unsigned long cr2
, int emulation_type
)
4509 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4510 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
4512 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
4513 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
4516 * If the emulation is caused by #PF and it is non-page_table
4517 * writing instruction, it means the VM-EXIT is caused by shadow
4518 * page protected, we can zap the shadow page and retry this
4519 * instruction directly.
4521 * Note: if the guest uses a non-page-table modifying instruction
4522 * on the PDE that points to the instruction, then we will unmap
4523 * the instruction and go to an infinite loop. So, we cache the
4524 * last retried eip and the last fault address, if we meet the eip
4525 * and the address again, we can break out of the potential infinite
4528 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
4530 if (!(emulation_type
& EMULTYPE_RETRY
))
4533 if (x86_page_table_writing_insn(ctxt
))
4536 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
4539 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
4540 vcpu
->arch
.last_retry_addr
= cr2
;
4542 if (!vcpu
->arch
.mmu
.direct_map
)
4543 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4545 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4550 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
4557 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4558 bool writeback
= true;
4560 kvm_clear_exception_queue(vcpu
);
4562 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4563 init_emulate_ctxt(vcpu
);
4564 ctxt
->interruptibility
= 0;
4565 ctxt
->have_exception
= false;
4566 ctxt
->perm_ok
= false;
4568 ctxt
->only_vendor_specific_insn
4569 = emulation_type
& EMULTYPE_TRAP_UD
;
4571 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
4573 trace_kvm_emulate_insn_start(vcpu
);
4574 ++vcpu
->stat
.insn_emulation
;
4575 if (r
!= EMULATION_OK
) {
4576 if (emulation_type
& EMULTYPE_TRAP_UD
)
4577 return EMULATE_FAIL
;
4578 if (reexecute_instruction(vcpu
, cr2
))
4579 return EMULATE_DONE
;
4580 if (emulation_type
& EMULTYPE_SKIP
)
4581 return EMULATE_FAIL
;
4582 return handle_emulation_failure(vcpu
);
4586 if (emulation_type
& EMULTYPE_SKIP
) {
4587 kvm_rip_write(vcpu
, ctxt
->_eip
);
4588 return EMULATE_DONE
;
4591 if (retry_instruction(ctxt
, cr2
, emulation_type
))
4592 return EMULATE_DONE
;
4594 /* this is needed for vmware backdoor interface to work since it
4595 changes registers values during IO operation */
4596 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
4597 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4598 memcpy(ctxt
->regs
, vcpu
->arch
.regs
, sizeof ctxt
->regs
);
4602 r
= x86_emulate_insn(ctxt
);
4604 if (r
== EMULATION_INTERCEPTED
)
4605 return EMULATE_DONE
;
4607 if (r
== EMULATION_FAILED
) {
4608 if (reexecute_instruction(vcpu
, cr2
))
4609 return EMULATE_DONE
;
4611 return handle_emulation_failure(vcpu
);
4614 if (ctxt
->have_exception
) {
4615 inject_emulated_exception(vcpu
);
4617 } else if (vcpu
->arch
.pio
.count
) {
4618 if (!vcpu
->arch
.pio
.in
)
4619 vcpu
->arch
.pio
.count
= 0;
4622 r
= EMULATE_DO_MMIO
;
4623 } else if (vcpu
->mmio_needed
) {
4624 if (!vcpu
->mmio_is_write
)
4626 r
= EMULATE_DO_MMIO
;
4627 } else if (r
== EMULATION_RESTART
)
4633 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
4634 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4635 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4636 memcpy(vcpu
->arch
.regs
, ctxt
->regs
, sizeof ctxt
->regs
);
4637 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
4638 kvm_rip_write(vcpu
, ctxt
->eip
);
4640 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
4644 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
4646 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4648 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4649 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
4650 size
, port
, &val
, 1);
4651 /* do not return to emulator after return from userspace */
4652 vcpu
->arch
.pio
.count
= 0;
4655 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4657 static void tsc_bad(void *info
)
4659 __this_cpu_write(cpu_tsc_khz
, 0);
4662 static void tsc_khz_changed(void *data
)
4664 struct cpufreq_freqs
*freq
= data
;
4665 unsigned long khz
= 0;
4669 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4670 khz
= cpufreq_quick_get(raw_smp_processor_id());
4673 __this_cpu_write(cpu_tsc_khz
, khz
);
4676 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4679 struct cpufreq_freqs
*freq
= data
;
4681 struct kvm_vcpu
*vcpu
;
4682 int i
, send_ipi
= 0;
4685 * We allow guests to temporarily run on slowing clocks,
4686 * provided we notify them after, or to run on accelerating
4687 * clocks, provided we notify them before. Thus time never
4690 * However, we have a problem. We can't atomically update
4691 * the frequency of a given CPU from this function; it is
4692 * merely a notifier, which can be called from any CPU.
4693 * Changing the TSC frequency at arbitrary points in time
4694 * requires a recomputation of local variables related to
4695 * the TSC for each VCPU. We must flag these local variables
4696 * to be updated and be sure the update takes place with the
4697 * new frequency before any guests proceed.
4699 * Unfortunately, the combination of hotplug CPU and frequency
4700 * change creates an intractable locking scenario; the order
4701 * of when these callouts happen is undefined with respect to
4702 * CPU hotplug, and they can race with each other. As such,
4703 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4704 * undefined; you can actually have a CPU frequency change take
4705 * place in between the computation of X and the setting of the
4706 * variable. To protect against this problem, all updates of
4707 * the per_cpu tsc_khz variable are done in an interrupt
4708 * protected IPI, and all callers wishing to update the value
4709 * must wait for a synchronous IPI to complete (which is trivial
4710 * if the caller is on the CPU already). This establishes the
4711 * necessary total order on variable updates.
4713 * Note that because a guest time update may take place
4714 * anytime after the setting of the VCPU's request bit, the
4715 * correct TSC value must be set before the request. However,
4716 * to ensure the update actually makes it to any guest which
4717 * starts running in hardware virtualization between the set
4718 * and the acquisition of the spinlock, we must also ping the
4719 * CPU after setting the request bit.
4723 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4725 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4728 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4730 raw_spin_lock(&kvm_lock
);
4731 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4732 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4733 if (vcpu
->cpu
!= freq
->cpu
)
4735 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4736 if (vcpu
->cpu
!= smp_processor_id())
4740 raw_spin_unlock(&kvm_lock
);
4742 if (freq
->old
< freq
->new && send_ipi
) {
4744 * We upscale the frequency. Must make the guest
4745 * doesn't see old kvmclock values while running with
4746 * the new frequency, otherwise we risk the guest sees
4747 * time go backwards.
4749 * In case we update the frequency for another cpu
4750 * (which might be in guest context) send an interrupt
4751 * to kick the cpu out of guest context. Next time
4752 * guest context is entered kvmclock will be updated,
4753 * so the guest will not see stale values.
4755 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4760 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4761 .notifier_call
= kvmclock_cpufreq_notifier
4764 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4765 unsigned long action
, void *hcpu
)
4767 unsigned int cpu
= (unsigned long)hcpu
;
4771 case CPU_DOWN_FAILED
:
4772 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4774 case CPU_DOWN_PREPARE
:
4775 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4781 static struct notifier_block kvmclock_cpu_notifier_block
= {
4782 .notifier_call
= kvmclock_cpu_notifier
,
4783 .priority
= -INT_MAX
4786 static void kvm_timer_init(void)
4790 max_tsc_khz
= tsc_khz
;
4791 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4792 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4793 #ifdef CONFIG_CPU_FREQ
4794 struct cpufreq_policy policy
;
4795 memset(&policy
, 0, sizeof(policy
));
4797 cpufreq_get_policy(&policy
, cpu
);
4798 if (policy
.cpuinfo
.max_freq
)
4799 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4802 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4803 CPUFREQ_TRANSITION_NOTIFIER
);
4805 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4806 for_each_online_cpu(cpu
)
4807 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4810 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4812 int kvm_is_in_guest(void)
4814 return __this_cpu_read(current_vcpu
) != NULL
;
4817 static int kvm_is_user_mode(void)
4821 if (__this_cpu_read(current_vcpu
))
4822 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
4824 return user_mode
!= 0;
4827 static unsigned long kvm_get_guest_ip(void)
4829 unsigned long ip
= 0;
4831 if (__this_cpu_read(current_vcpu
))
4832 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
4837 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4838 .is_in_guest
= kvm_is_in_guest
,
4839 .is_user_mode
= kvm_is_user_mode
,
4840 .get_guest_ip
= kvm_get_guest_ip
,
4843 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4845 __this_cpu_write(current_vcpu
, vcpu
);
4847 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4849 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4851 __this_cpu_write(current_vcpu
, NULL
);
4853 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4855 static void kvm_set_mmio_spte_mask(void)
4858 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
4861 * Set the reserved bits and the present bit of an paging-structure
4862 * entry to generate page fault with PFER.RSV = 1.
4864 mask
= ((1ull << (62 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
4867 #ifdef CONFIG_X86_64
4869 * If reserved bit is not supported, clear the present bit to disable
4872 if (maxphyaddr
== 52)
4876 kvm_mmu_set_mmio_spte_mask(mask
);
4879 int kvm_arch_init(void *opaque
)
4882 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4885 printk(KERN_ERR
"kvm: already loaded the other module\n");
4890 if (!ops
->cpu_has_kvm_support()) {
4891 printk(KERN_ERR
"kvm: no hardware support\n");
4895 if (ops
->disabled_by_bios()) {
4896 printk(KERN_ERR
"kvm: disabled by bios\n");
4901 r
= kvm_mmu_module_init();
4905 kvm_set_mmio_spte_mask();
4906 kvm_init_msr_list();
4909 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4910 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4914 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4917 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4925 void kvm_arch_exit(void)
4927 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4929 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4930 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4931 CPUFREQ_TRANSITION_NOTIFIER
);
4932 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4934 kvm_mmu_module_exit();
4937 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4939 ++vcpu
->stat
.halt_exits
;
4940 if (irqchip_in_kernel(vcpu
->kvm
)) {
4941 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4944 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4948 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4950 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4952 u64 param
, ingpa
, outgpa
, ret
;
4953 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4954 bool fast
, longmode
;
4958 * hypercall generates UD from non zero cpl and real mode
4961 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4962 kvm_queue_exception(vcpu
, UD_VECTOR
);
4966 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4967 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4970 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4971 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4972 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4973 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4974 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4975 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4977 #ifdef CONFIG_X86_64
4979 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4980 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4981 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4985 code
= param
& 0xffff;
4986 fast
= (param
>> 16) & 0x1;
4987 rep_cnt
= (param
>> 32) & 0xfff;
4988 rep_idx
= (param
>> 48) & 0xfff;
4990 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
4993 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
4994 kvm_vcpu_on_spin(vcpu
);
4997 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5001 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5003 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5005 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5006 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5012 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5014 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5017 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5018 return kvm_hv_hypercall(vcpu
);
5020 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5021 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5022 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5023 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5024 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5026 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5028 if (!is_long_mode(vcpu
)) {
5036 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5042 case KVM_HC_VAPIC_POLL_IRQ
:
5050 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5051 ++vcpu
->stat
.hypercalls
;
5054 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5056 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5058 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5059 char instruction
[3];
5060 unsigned long rip
= kvm_rip_read(vcpu
);
5063 * Blow out the MMU to ensure that no other VCPU has an active mapping
5064 * to ensure that the updated hypercall appears atomically across all
5067 kvm_mmu_zap_all(vcpu
->kvm
);
5069 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5071 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5075 * Check if userspace requested an interrupt window, and that the
5076 * interrupt window is open.
5078 * No need to exit to userspace if we already have an interrupt queued.
5080 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5082 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5083 vcpu
->run
->request_interrupt_window
&&
5084 kvm_arch_interrupt_allowed(vcpu
));
5087 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5089 struct kvm_run
*kvm_run
= vcpu
->run
;
5091 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5092 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5093 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5094 if (irqchip_in_kernel(vcpu
->kvm
))
5095 kvm_run
->ready_for_interrupt_injection
= 1;
5097 kvm_run
->ready_for_interrupt_injection
=
5098 kvm_arch_interrupt_allowed(vcpu
) &&
5099 !kvm_cpu_has_interrupt(vcpu
) &&
5100 !kvm_event_needs_reinjection(vcpu
);
5103 static void vapic_enter(struct kvm_vcpu
*vcpu
)
5105 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5108 if (!apic
|| !apic
->vapic_addr
)
5111 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5113 vcpu
->arch
.apic
->vapic_page
= page
;
5116 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5118 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5121 if (!apic
|| !apic
->vapic_addr
)
5124 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5125 kvm_release_page_dirty(apic
->vapic_page
);
5126 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5127 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5130 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5134 if (!kvm_x86_ops
->update_cr8_intercept
)
5137 if (!vcpu
->arch
.apic
)
5140 if (!vcpu
->arch
.apic
->vapic_addr
)
5141 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5148 tpr
= kvm_lapic_get_cr8(vcpu
);
5150 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5153 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5155 /* try to reinject previous events if any */
5156 if (vcpu
->arch
.exception
.pending
) {
5157 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5158 vcpu
->arch
.exception
.has_error_code
,
5159 vcpu
->arch
.exception
.error_code
);
5160 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5161 vcpu
->arch
.exception
.has_error_code
,
5162 vcpu
->arch
.exception
.error_code
,
5163 vcpu
->arch
.exception
.reinject
);
5167 if (vcpu
->arch
.nmi_injected
) {
5168 kvm_x86_ops
->set_nmi(vcpu
);
5172 if (vcpu
->arch
.interrupt
.pending
) {
5173 kvm_x86_ops
->set_irq(vcpu
);
5177 /* try to inject new event if pending */
5178 if (vcpu
->arch
.nmi_pending
) {
5179 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5180 --vcpu
->arch
.nmi_pending
;
5181 vcpu
->arch
.nmi_injected
= true;
5182 kvm_x86_ops
->set_nmi(vcpu
);
5184 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5185 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5186 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5188 kvm_x86_ops
->set_irq(vcpu
);
5193 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5195 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5196 !vcpu
->guest_xcr0_loaded
) {
5197 /* kvm_set_xcr() also depends on this */
5198 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5199 vcpu
->guest_xcr0_loaded
= 1;
5203 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5205 if (vcpu
->guest_xcr0_loaded
) {
5206 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5207 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5208 vcpu
->guest_xcr0_loaded
= 0;
5212 static void process_nmi(struct kvm_vcpu
*vcpu
)
5217 * x86 is limited to one NMI running, and one NMI pending after it.
5218 * If an NMI is already in progress, limit further NMIs to just one.
5219 * Otherwise, allow two (and we'll inject the first one immediately).
5221 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5224 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5225 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5226 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5229 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5232 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5233 vcpu
->run
->request_interrupt_window
;
5234 bool req_immediate_exit
= 0;
5236 if (vcpu
->requests
) {
5237 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5238 kvm_mmu_unload(vcpu
);
5239 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5240 __kvm_migrate_timers(vcpu
);
5241 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5242 r
= kvm_guest_time_update(vcpu
);
5246 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5247 kvm_mmu_sync_roots(vcpu
);
5248 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5249 kvm_x86_ops
->tlb_flush(vcpu
);
5250 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5251 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5255 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5256 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5260 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5261 vcpu
->fpu_active
= 0;
5262 kvm_x86_ops
->fpu_deactivate(vcpu
);
5264 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5265 /* Page is swapped out. Do synthetic halt */
5266 vcpu
->arch
.apf
.halted
= true;
5270 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
5271 record_steal_time(vcpu
);
5272 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
5274 req_immediate_exit
=
5275 kvm_check_request(KVM_REQ_IMMEDIATE_EXIT
, vcpu
);
5276 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
5277 kvm_handle_pmu_event(vcpu
);
5278 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
5279 kvm_deliver_pmi(vcpu
);
5282 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5283 inject_pending_event(vcpu
);
5285 /* enable NMI/IRQ window open exits if needed */
5286 if (vcpu
->arch
.nmi_pending
)
5287 kvm_x86_ops
->enable_nmi_window(vcpu
);
5288 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5289 kvm_x86_ops
->enable_irq_window(vcpu
);
5291 if (kvm_lapic_enabled(vcpu
)) {
5292 update_cr8_intercept(vcpu
);
5293 kvm_lapic_sync_to_vapic(vcpu
);
5297 r
= kvm_mmu_reload(vcpu
);
5299 kvm_x86_ops
->cancel_injection(vcpu
);
5305 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5306 if (vcpu
->fpu_active
)
5307 kvm_load_guest_fpu(vcpu
);
5308 kvm_load_guest_xcr0(vcpu
);
5310 vcpu
->mode
= IN_GUEST_MODE
;
5312 /* We should set ->mode before check ->requests,
5313 * see the comment in make_all_cpus_request.
5317 local_irq_disable();
5319 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5320 || need_resched() || signal_pending(current
)) {
5321 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5325 kvm_x86_ops
->cancel_injection(vcpu
);
5330 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5332 if (req_immediate_exit
)
5333 smp_send_reschedule(vcpu
->cpu
);
5337 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5339 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5340 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5341 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5342 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5345 trace_kvm_entry(vcpu
->vcpu_id
);
5346 kvm_x86_ops
->run(vcpu
);
5349 * If the guest has used debug registers, at least dr7
5350 * will be disabled while returning to the host.
5351 * If we don't have active breakpoints in the host, we don't
5352 * care about the messed up debug address registers. But if
5353 * we have some of them active, restore the old state.
5355 if (hw_breakpoint_active())
5356 hw_breakpoint_restore();
5358 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
);
5360 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5367 * We must have an instruction between local_irq_enable() and
5368 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5369 * the interrupt shadow. The stat.exits increment will do nicely.
5370 * But we need to prevent reordering, hence this barrier():
5378 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5381 * Profile KVM exit RIPs:
5383 if (unlikely(prof_on
== KVM_PROFILING
)) {
5384 unsigned long rip
= kvm_rip_read(vcpu
);
5385 profile_hit(KVM_PROFILING
, (void *)rip
);
5388 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
5389 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5391 if (vcpu
->arch
.apic_attention
)
5392 kvm_lapic_sync_from_vapic(vcpu
);
5394 r
= kvm_x86_ops
->handle_exit(vcpu
);
5400 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5403 struct kvm
*kvm
= vcpu
->kvm
;
5405 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5406 pr_debug("vcpu %d received sipi with vector # %x\n",
5407 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5408 kvm_lapic_reset(vcpu
);
5409 r
= kvm_arch_vcpu_reset(vcpu
);
5412 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5415 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5420 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5421 !vcpu
->arch
.apf
.halted
)
5422 r
= vcpu_enter_guest(vcpu
);
5424 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5425 kvm_vcpu_block(vcpu
);
5426 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5427 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5429 switch(vcpu
->arch
.mp_state
) {
5430 case KVM_MP_STATE_HALTED
:
5431 vcpu
->arch
.mp_state
=
5432 KVM_MP_STATE_RUNNABLE
;
5433 case KVM_MP_STATE_RUNNABLE
:
5434 vcpu
->arch
.apf
.halted
= false;
5436 case KVM_MP_STATE_SIPI_RECEIVED
:
5447 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5448 if (kvm_cpu_has_pending_timer(vcpu
))
5449 kvm_inject_pending_timer_irqs(vcpu
);
5451 if (dm_request_for_irq_injection(vcpu
)) {
5453 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5454 ++vcpu
->stat
.request_irq_exits
;
5457 kvm_check_async_pf_completion(vcpu
);
5459 if (signal_pending(current
)) {
5461 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5462 ++vcpu
->stat
.signal_exits
;
5464 if (need_resched()) {
5465 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5467 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5471 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5479 * Implements the following, as a state machine:
5494 static int complete_mmio(struct kvm_vcpu
*vcpu
)
5496 struct kvm_run
*run
= vcpu
->run
;
5497 struct kvm_mmio_fragment
*frag
;
5500 if (!(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
))
5503 if (vcpu
->mmio_needed
) {
5504 /* Complete previous fragment */
5505 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
++];
5506 if (!vcpu
->mmio_is_write
)
5507 memcpy(frag
->data
, run
->mmio
.data
, frag
->len
);
5508 if (vcpu
->mmio_cur_fragment
== vcpu
->mmio_nr_fragments
) {
5509 vcpu
->mmio_needed
= 0;
5510 if (vcpu
->mmio_is_write
)
5512 vcpu
->mmio_read_completed
= 1;
5515 /* Initiate next fragment */
5517 run
->exit_reason
= KVM_EXIT_MMIO
;
5518 run
->mmio
.phys_addr
= frag
->gpa
;
5519 if (vcpu
->mmio_is_write
)
5520 memcpy(run
->mmio
.data
, frag
->data
, frag
->len
);
5521 run
->mmio
.len
= frag
->len
;
5522 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
5527 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5528 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
5529 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5530 if (r
!= EMULATE_DONE
)
5535 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5540 if (!tsk_used_math(current
) && init_fpu(current
))
5543 if (vcpu
->sigset_active
)
5544 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5546 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5547 kvm_vcpu_block(vcpu
);
5548 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5553 /* re-sync apic's tpr */
5554 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5555 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
5561 r
= complete_mmio(vcpu
);
5565 r
= __vcpu_run(vcpu
);
5568 post_kvm_run_save(vcpu
);
5569 if (vcpu
->sigset_active
)
5570 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5575 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5577 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
5579 * We are here if userspace calls get_regs() in the middle of
5580 * instruction emulation. Registers state needs to be copied
5581 * back from emulation context to vcpu. Usrapace shouldn't do
5582 * that usually, but some bad designed PV devices (vmware
5583 * backdoor interface) need this to work
5585 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5586 memcpy(vcpu
->arch
.regs
, ctxt
->regs
, sizeof ctxt
->regs
);
5587 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5589 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5590 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5591 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5592 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5593 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5594 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5595 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5596 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5597 #ifdef CONFIG_X86_64
5598 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5599 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5600 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5601 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5602 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5603 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5604 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5605 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5608 regs
->rip
= kvm_rip_read(vcpu
);
5609 regs
->rflags
= kvm_get_rflags(vcpu
);
5614 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5616 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
5617 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5619 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5620 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5621 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5622 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5623 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5624 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5625 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5626 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5627 #ifdef CONFIG_X86_64
5628 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5629 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5630 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5631 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5632 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5633 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5634 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5635 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5638 kvm_rip_write(vcpu
, regs
->rip
);
5639 kvm_set_rflags(vcpu
, regs
->rflags
);
5641 vcpu
->arch
.exception
.pending
= false;
5643 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5648 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5650 struct kvm_segment cs
;
5652 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5656 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5658 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5659 struct kvm_sregs
*sregs
)
5663 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5664 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5665 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5666 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5667 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5668 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5670 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5671 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5673 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5674 sregs
->idt
.limit
= dt
.size
;
5675 sregs
->idt
.base
= dt
.address
;
5676 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5677 sregs
->gdt
.limit
= dt
.size
;
5678 sregs
->gdt
.base
= dt
.address
;
5680 sregs
->cr0
= kvm_read_cr0(vcpu
);
5681 sregs
->cr2
= vcpu
->arch
.cr2
;
5682 sregs
->cr3
= kvm_read_cr3(vcpu
);
5683 sregs
->cr4
= kvm_read_cr4(vcpu
);
5684 sregs
->cr8
= kvm_get_cr8(vcpu
);
5685 sregs
->efer
= vcpu
->arch
.efer
;
5686 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5688 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5690 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5691 set_bit(vcpu
->arch
.interrupt
.nr
,
5692 (unsigned long *)sregs
->interrupt_bitmap
);
5697 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5698 struct kvm_mp_state
*mp_state
)
5700 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5704 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5705 struct kvm_mp_state
*mp_state
)
5707 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5708 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5712 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
5713 int reason
, bool has_error_code
, u32 error_code
)
5715 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5718 init_emulate_ctxt(vcpu
);
5720 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
5721 has_error_code
, error_code
);
5724 return EMULATE_FAIL
;
5726 memcpy(vcpu
->arch
.regs
, ctxt
->regs
, sizeof ctxt
->regs
);
5727 kvm_rip_write(vcpu
, ctxt
->eip
);
5728 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5729 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5730 return EMULATE_DONE
;
5732 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5734 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5735 struct kvm_sregs
*sregs
)
5737 int mmu_reset_needed
= 0;
5738 int pending_vec
, max_bits
, idx
;
5741 dt
.size
= sregs
->idt
.limit
;
5742 dt
.address
= sregs
->idt
.base
;
5743 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5744 dt
.size
= sregs
->gdt
.limit
;
5745 dt
.address
= sregs
->gdt
.base
;
5746 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5748 vcpu
->arch
.cr2
= sregs
->cr2
;
5749 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
5750 vcpu
->arch
.cr3
= sregs
->cr3
;
5751 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
5753 kvm_set_cr8(vcpu
, sregs
->cr8
);
5755 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5756 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5757 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5759 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5760 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5761 vcpu
->arch
.cr0
= sregs
->cr0
;
5763 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5764 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5765 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5766 kvm_update_cpuid(vcpu
);
5768 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5769 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5770 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
5771 mmu_reset_needed
= 1;
5773 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5775 if (mmu_reset_needed
)
5776 kvm_mmu_reset_context(vcpu
);
5778 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5779 pending_vec
= find_first_bit(
5780 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5781 if (pending_vec
< max_bits
) {
5782 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5783 pr_debug("Set back pending irq %d\n", pending_vec
);
5786 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5787 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5788 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5789 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5790 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5791 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5793 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5794 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5796 update_cr8_intercept(vcpu
);
5798 /* Older userspace won't unhalt the vcpu on reset. */
5799 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5800 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5802 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5804 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5809 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5810 struct kvm_guest_debug
*dbg
)
5812 unsigned long rflags
;
5815 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5817 if (vcpu
->arch
.exception
.pending
)
5819 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5820 kvm_queue_exception(vcpu
, DB_VECTOR
);
5822 kvm_queue_exception(vcpu
, BP_VECTOR
);
5826 * Read rflags as long as potentially injected trace flags are still
5829 rflags
= kvm_get_rflags(vcpu
);
5831 vcpu
->guest_debug
= dbg
->control
;
5832 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5833 vcpu
->guest_debug
= 0;
5835 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5836 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5837 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5838 vcpu
->arch
.switch_db_regs
=
5839 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5841 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5842 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5843 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5846 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5847 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5848 get_segment_base(vcpu
, VCPU_SREG_CS
);
5851 * Trigger an rflags update that will inject or remove the trace
5854 kvm_set_rflags(vcpu
, rflags
);
5856 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5866 * Translate a guest virtual address to a guest physical address.
5868 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5869 struct kvm_translation
*tr
)
5871 unsigned long vaddr
= tr
->linear_address
;
5875 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5876 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5877 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5878 tr
->physical_address
= gpa
;
5879 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5886 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5888 struct i387_fxsave_struct
*fxsave
=
5889 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5891 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5892 fpu
->fcw
= fxsave
->cwd
;
5893 fpu
->fsw
= fxsave
->swd
;
5894 fpu
->ftwx
= fxsave
->twd
;
5895 fpu
->last_opcode
= fxsave
->fop
;
5896 fpu
->last_ip
= fxsave
->rip
;
5897 fpu
->last_dp
= fxsave
->rdp
;
5898 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5903 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5905 struct i387_fxsave_struct
*fxsave
=
5906 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5908 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5909 fxsave
->cwd
= fpu
->fcw
;
5910 fxsave
->swd
= fpu
->fsw
;
5911 fxsave
->twd
= fpu
->ftwx
;
5912 fxsave
->fop
= fpu
->last_opcode
;
5913 fxsave
->rip
= fpu
->last_ip
;
5914 fxsave
->rdp
= fpu
->last_dp
;
5915 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5920 int fx_init(struct kvm_vcpu
*vcpu
)
5924 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5928 fpu_finit(&vcpu
->arch
.guest_fpu
);
5931 * Ensure guest xcr0 is valid for loading
5933 vcpu
->arch
.xcr0
= XSTATE_FP
;
5935 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5939 EXPORT_SYMBOL_GPL(fx_init
);
5941 static void fx_free(struct kvm_vcpu
*vcpu
)
5943 fpu_free(&vcpu
->arch
.guest_fpu
);
5946 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5948 if (vcpu
->guest_fpu_loaded
)
5952 * Restore all possible states in the guest,
5953 * and assume host would use all available bits.
5954 * Guest xcr0 would be loaded later.
5956 kvm_put_guest_xcr0(vcpu
);
5957 vcpu
->guest_fpu_loaded
= 1;
5958 unlazy_fpu(current
);
5959 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5963 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5965 kvm_put_guest_xcr0(vcpu
);
5967 if (!vcpu
->guest_fpu_loaded
)
5970 vcpu
->guest_fpu_loaded
= 0;
5971 fpu_save_init(&vcpu
->arch
.guest_fpu
);
5972 ++vcpu
->stat
.fpu_reload
;
5973 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
5977 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5979 kvmclock_reset(vcpu
);
5981 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
5983 kvm_x86_ops
->vcpu_free(vcpu
);
5986 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5989 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
5990 printk_once(KERN_WARNING
5991 "kvm: SMP vm created on host with unstable TSC; "
5992 "guest TSC will not be reliable\n");
5993 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5996 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6000 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6002 r
= kvm_arch_vcpu_reset(vcpu
);
6004 r
= kvm_mmu_setup(vcpu
);
6010 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6012 vcpu
->arch
.apf
.msr_val
= 0;
6015 kvm_mmu_unload(vcpu
);
6019 kvm_x86_ops
->vcpu_free(vcpu
);
6022 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
6024 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6025 vcpu
->arch
.nmi_pending
= 0;
6026 vcpu
->arch
.nmi_injected
= false;
6028 vcpu
->arch
.switch_db_regs
= 0;
6029 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6030 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6031 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6033 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6034 vcpu
->arch
.apf
.msr_val
= 0;
6035 vcpu
->arch
.st
.msr_val
= 0;
6037 kvmclock_reset(vcpu
);
6039 kvm_clear_async_pf_completion_queue(vcpu
);
6040 kvm_async_pf_hash_reset(vcpu
);
6041 vcpu
->arch
.apf
.halted
= false;
6043 kvm_pmu_reset(vcpu
);
6045 return kvm_x86_ops
->vcpu_reset(vcpu
);
6048 int kvm_arch_hardware_enable(void *garbage
)
6051 struct kvm_vcpu
*vcpu
;
6056 bool stable
, backwards_tsc
= false;
6058 kvm_shared_msr_cpu_online();
6059 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6063 local_tsc
= native_read_tsc();
6064 stable
= !check_tsc_unstable();
6065 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6066 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6067 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6068 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6069 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6070 backwards_tsc
= true;
6071 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6072 max_tsc
= vcpu
->arch
.last_host_tsc
;
6078 * Sometimes, even reliable TSCs go backwards. This happens on
6079 * platforms that reset TSC during suspend or hibernate actions, but
6080 * maintain synchronization. We must compensate. Fortunately, we can
6081 * detect that condition here, which happens early in CPU bringup,
6082 * before any KVM threads can be running. Unfortunately, we can't
6083 * bring the TSCs fully up to date with real time, as we aren't yet far
6084 * enough into CPU bringup that we know how much real time has actually
6085 * elapsed; our helper function, get_kernel_ns() will be using boot
6086 * variables that haven't been updated yet.
6088 * So we simply find the maximum observed TSC above, then record the
6089 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6090 * the adjustment will be applied. Note that we accumulate
6091 * adjustments, in case multiple suspend cycles happen before some VCPU
6092 * gets a chance to run again. In the event that no KVM threads get a
6093 * chance to run, we will miss the entire elapsed period, as we'll have
6094 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6095 * loose cycle time. This isn't too big a deal, since the loss will be
6096 * uniform across all VCPUs (not to mention the scenario is extremely
6097 * unlikely). It is possible that a second hibernate recovery happens
6098 * much faster than a first, causing the observed TSC here to be
6099 * smaller; this would require additional padding adjustment, which is
6100 * why we set last_host_tsc to the local tsc observed here.
6102 * N.B. - this code below runs only on platforms with reliable TSC,
6103 * as that is the only way backwards_tsc is set above. Also note
6104 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6105 * have the same delta_cyc adjustment applied if backwards_tsc
6106 * is detected. Note further, this adjustment is only done once,
6107 * as we reset last_host_tsc on all VCPUs to stop this from being
6108 * called multiple times (one for each physical CPU bringup).
6110 * Platforms with unnreliable TSCs don't have to deal with this, they
6111 * will be compensated by the logic in vcpu_load, which sets the TSC to
6112 * catchup mode. This will catchup all VCPUs to real time, but cannot
6113 * guarantee that they stay in perfect synchronization.
6115 if (backwards_tsc
) {
6116 u64 delta_cyc
= max_tsc
- local_tsc
;
6117 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6118 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6119 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
6120 vcpu
->arch
.last_host_tsc
= local_tsc
;
6124 * We have to disable TSC offset matching.. if you were
6125 * booting a VM while issuing an S4 host suspend....
6126 * you may have some problem. Solving this issue is
6127 * left as an exercise to the reader.
6129 kvm
->arch
.last_tsc_nsec
= 0;
6130 kvm
->arch
.last_tsc_write
= 0;
6137 void kvm_arch_hardware_disable(void *garbage
)
6139 kvm_x86_ops
->hardware_disable(garbage
);
6140 drop_user_return_notifiers(garbage
);
6143 int kvm_arch_hardware_setup(void)
6145 return kvm_x86_ops
->hardware_setup();
6148 void kvm_arch_hardware_unsetup(void)
6150 kvm_x86_ops
->hardware_unsetup();
6153 void kvm_arch_check_processor_compat(void *rtn
)
6155 kvm_x86_ops
->check_processor_compatibility(rtn
);
6158 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
6160 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
6163 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6169 BUG_ON(vcpu
->kvm
== NULL
);
6172 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6173 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6174 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6176 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6178 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6183 vcpu
->arch
.pio_data
= page_address(page
);
6185 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
6187 r
= kvm_mmu_create(vcpu
);
6189 goto fail_free_pio_data
;
6191 if (irqchip_in_kernel(kvm
)) {
6192 r
= kvm_create_lapic(vcpu
);
6194 goto fail_mmu_destroy
;
6197 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6199 if (!vcpu
->arch
.mce_banks
) {
6201 goto fail_free_lapic
;
6203 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6205 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
6206 goto fail_free_mce_banks
;
6208 kvm_async_pf_hash_reset(vcpu
);
6212 fail_free_mce_banks
:
6213 kfree(vcpu
->arch
.mce_banks
);
6215 kvm_free_lapic(vcpu
);
6217 kvm_mmu_destroy(vcpu
);
6219 free_page((unsigned long)vcpu
->arch
.pio_data
);
6224 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6228 kvm_pmu_destroy(vcpu
);
6229 kfree(vcpu
->arch
.mce_banks
);
6230 kvm_free_lapic(vcpu
);
6231 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6232 kvm_mmu_destroy(vcpu
);
6233 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6234 free_page((unsigned long)vcpu
->arch
.pio_data
);
6237 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
6242 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
6243 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
6245 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6246 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
6248 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6253 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6256 kvm_mmu_unload(vcpu
);
6260 static void kvm_free_vcpus(struct kvm
*kvm
)
6263 struct kvm_vcpu
*vcpu
;
6266 * Unpin any mmu pages first.
6268 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6269 kvm_clear_async_pf_completion_queue(vcpu
);
6270 kvm_unload_vcpu_mmu(vcpu
);
6272 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6273 kvm_arch_vcpu_free(vcpu
);
6275 mutex_lock(&kvm
->lock
);
6276 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6277 kvm
->vcpus
[i
] = NULL
;
6279 atomic_set(&kvm
->online_vcpus
, 0);
6280 mutex_unlock(&kvm
->lock
);
6283 void kvm_arch_sync_events(struct kvm
*kvm
)
6285 kvm_free_all_assigned_devices(kvm
);
6289 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6291 kvm_iommu_unmap_guest(kvm
);
6292 kfree(kvm
->arch
.vpic
);
6293 kfree(kvm
->arch
.vioapic
);
6294 kvm_free_vcpus(kvm
);
6295 if (kvm
->arch
.apic_access_page
)
6296 put_page(kvm
->arch
.apic_access_page
);
6297 if (kvm
->arch
.ept_identity_pagetable
)
6298 put_page(kvm
->arch
.ept_identity_pagetable
);
6301 void kvm_arch_free_memslot(struct kvm_memory_slot
*free
,
6302 struct kvm_memory_slot
*dont
)
6306 for (i
= 0; i
< KVM_NR_PAGE_SIZES
- 1; ++i
) {
6307 if (!dont
|| free
->arch
.lpage_info
[i
] != dont
->arch
.lpage_info
[i
]) {
6308 kvm_kvfree(free
->arch
.lpage_info
[i
]);
6309 free
->arch
.lpage_info
[i
] = NULL
;
6314 int kvm_arch_create_memslot(struct kvm_memory_slot
*slot
, unsigned long npages
)
6318 for (i
= 0; i
< KVM_NR_PAGE_SIZES
- 1; ++i
) {
6323 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
6324 slot
->base_gfn
, level
) + 1;
6326 slot
->arch
.lpage_info
[i
] =
6327 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.lpage_info
[i
]));
6328 if (!slot
->arch
.lpage_info
[i
])
6331 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
6332 slot
->arch
.lpage_info
[i
][0].write_count
= 1;
6333 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
6334 slot
->arch
.lpage_info
[i
][lpages
- 1].write_count
= 1;
6335 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
6337 * If the gfn and userspace address are not aligned wrt each
6338 * other, or if explicitly asked to, disable large page
6339 * support for this slot
6341 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
6342 !kvm_largepages_enabled()) {
6345 for (j
= 0; j
< lpages
; ++j
)
6346 slot
->arch
.lpage_info
[i
][j
].write_count
= 1;
6353 for (i
= 0; i
< KVM_NR_PAGE_SIZES
- 1; ++i
) {
6354 kvm_kvfree(slot
->arch
.lpage_info
[i
]);
6355 slot
->arch
.lpage_info
[i
] = NULL
;
6360 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6361 struct kvm_memory_slot
*memslot
,
6362 struct kvm_memory_slot old
,
6363 struct kvm_userspace_memory_region
*mem
,
6366 int npages
= memslot
->npages
;
6367 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6369 /* Prevent internal slot pages from being moved by fork()/COW. */
6370 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6371 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6373 /*To keep backward compatibility with older userspace,
6374 *x86 needs to hanlde !user_alloc case.
6377 if (npages
&& !old
.rmap
) {
6378 unsigned long userspace_addr
;
6380 userspace_addr
= vm_mmap(NULL
, 0,
6382 PROT_READ
| PROT_WRITE
,
6386 if (IS_ERR((void *)userspace_addr
))
6387 return PTR_ERR((void *)userspace_addr
);
6389 memslot
->userspace_addr
= userspace_addr
;
6397 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6398 struct kvm_userspace_memory_region
*mem
,
6399 struct kvm_memory_slot old
,
6403 int nr_mmu_pages
= 0, npages
= mem
->memory_size
>> PAGE_SHIFT
;
6405 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
6408 ret
= vm_munmap(old
.userspace_addr
,
6409 old
.npages
* PAGE_SIZE
);
6412 "kvm_vm_ioctl_set_memory_region: "
6413 "failed to munmap memory\n");
6416 if (!kvm
->arch
.n_requested_mmu_pages
)
6417 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6419 spin_lock(&kvm
->mmu_lock
);
6421 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6422 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6423 spin_unlock(&kvm
->mmu_lock
);
6426 void kvm_arch_flush_shadow(struct kvm
*kvm
)
6428 kvm_mmu_zap_all(kvm
);
6429 kvm_reload_remote_mmus(kvm
);
6432 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6434 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6435 !vcpu
->arch
.apf
.halted
)
6436 || !list_empty_careful(&vcpu
->async_pf
.done
)
6437 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6438 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
6439 (kvm_arch_interrupt_allowed(vcpu
) &&
6440 kvm_cpu_has_interrupt(vcpu
));
6443 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
6445 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
6448 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6450 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6453 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6455 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6456 get_segment_base(vcpu
, VCPU_SREG_CS
);
6458 return current_rip
== linear_rip
;
6460 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6462 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6464 unsigned long rflags
;
6466 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6467 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6468 rflags
&= ~X86_EFLAGS_TF
;
6471 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6473 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6475 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6476 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6477 rflags
|= X86_EFLAGS_TF
;
6478 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6479 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6481 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6483 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6487 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
6488 is_error_page(work
->page
))
6491 r
= kvm_mmu_reload(vcpu
);
6495 if (!vcpu
->arch
.mmu
.direct_map
&&
6496 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
6499 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6502 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6504 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6507 static inline u32
kvm_async_pf_next_probe(u32 key
)
6509 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6512 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6514 u32 key
= kvm_async_pf_hash_fn(gfn
);
6516 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6517 key
= kvm_async_pf_next_probe(key
);
6519 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6522 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6525 u32 key
= kvm_async_pf_hash_fn(gfn
);
6527 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6528 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6529 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6530 key
= kvm_async_pf_next_probe(key
);
6535 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6537 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6540 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6544 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6546 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6548 j
= kvm_async_pf_next_probe(j
);
6549 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6551 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6553 * k lies cyclically in ]i,j]
6555 * |....j i.k.| or |.k..j i...|
6557 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6558 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6563 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6566 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6570 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6571 struct kvm_async_pf
*work
)
6573 struct x86_exception fault
;
6575 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6576 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6578 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6579 (vcpu
->arch
.apf
.send_user_only
&&
6580 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6581 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6582 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6583 fault
.vector
= PF_VECTOR
;
6584 fault
.error_code_valid
= true;
6585 fault
.error_code
= 0;
6586 fault
.nested_page_fault
= false;
6587 fault
.address
= work
->arch
.token
;
6588 kvm_inject_page_fault(vcpu
, &fault
);
6592 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6593 struct kvm_async_pf
*work
)
6595 struct x86_exception fault
;
6597 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6598 if (is_error_page(work
->page
))
6599 work
->arch
.token
= ~0; /* broadcast wakeup */
6601 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6603 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6604 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6605 fault
.vector
= PF_VECTOR
;
6606 fault
.error_code_valid
= true;
6607 fault
.error_code
= 0;
6608 fault
.nested_page_fault
= false;
6609 fault
.address
= work
->arch
.token
;
6610 kvm_inject_page_fault(vcpu
, &fault
);
6612 vcpu
->arch
.apf
.halted
= false;
6613 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6616 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6618 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6621 return !kvm_event_needs_reinjection(vcpu
) &&
6622 kvm_x86_ops
->interrupt_allowed(vcpu
);
6625 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6626 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6627 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6628 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6629 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6630 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6631 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6632 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6633 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6634 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);