2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
32 #include <linux/clocksource.h>
33 #include <linux/interrupt.h>
34 #include <linux/kvm.h>
36 #include <linux/vmalloc.h>
37 #include <linux/module.h>
38 #include <linux/mman.h>
39 #include <linux/highmem.h>
40 #include <linux/iommu.h>
41 #include <linux/intel-iommu.h>
42 #include <linux/cpufreq.h>
43 #include <linux/user-return-notifier.h>
44 #include <linux/srcu.h>
45 #include <linux/slab.h>
46 #include <linux/perf_event.h>
47 #include <linux/uaccess.h>
48 #include <linux/hash.h>
49 #include <linux/pci.h>
50 #include <linux/timekeeper_internal.h>
51 #include <linux/pvclock_gtod.h>
52 #include <trace/events/kvm.h>
54 #define CREATE_TRACE_POINTS
57 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
90 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
92 struct kvm_x86_ops
*kvm_x86_ops
;
93 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
95 static bool ignore_msrs
= 0;
96 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
98 unsigned int min_timer_period_us
= 500;
99 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
101 static bool __read_mostly kvmclock_periodic_sync
= true;
102 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
104 bool kvm_has_tsc_control
;
105 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
106 u32 kvm_max_guest_tsc_khz
;
107 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
109 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
110 static u32 tsc_tolerance_ppm
= 250;
111 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
113 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
114 unsigned int lapic_timer_advance_ns
= 0;
115 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
117 static bool backwards_tsc_observed
= false;
119 #define KVM_NR_SHARED_MSRS 16
121 struct kvm_shared_msrs_global
{
123 u32 msrs
[KVM_NR_SHARED_MSRS
];
126 struct kvm_shared_msrs
{
127 struct user_return_notifier urn
;
129 struct kvm_shared_msr_values
{
132 } values
[KVM_NR_SHARED_MSRS
];
135 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
136 static struct kvm_shared_msrs __percpu
*shared_msrs
;
138 struct kvm_stats_debugfs_item debugfs_entries
[] = {
139 { "pf_fixed", VCPU_STAT(pf_fixed
) },
140 { "pf_guest", VCPU_STAT(pf_guest
) },
141 { "tlb_flush", VCPU_STAT(tlb_flush
) },
142 { "invlpg", VCPU_STAT(invlpg
) },
143 { "exits", VCPU_STAT(exits
) },
144 { "io_exits", VCPU_STAT(io_exits
) },
145 { "mmio_exits", VCPU_STAT(mmio_exits
) },
146 { "signal_exits", VCPU_STAT(signal_exits
) },
147 { "irq_window", VCPU_STAT(irq_window_exits
) },
148 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
149 { "halt_exits", VCPU_STAT(halt_exits
) },
150 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
151 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
152 { "hypercalls", VCPU_STAT(hypercalls
) },
153 { "request_irq", VCPU_STAT(request_irq_exits
) },
154 { "irq_exits", VCPU_STAT(irq_exits
) },
155 { "host_state_reload", VCPU_STAT(host_state_reload
) },
156 { "efer_reload", VCPU_STAT(efer_reload
) },
157 { "fpu_reload", VCPU_STAT(fpu_reload
) },
158 { "insn_emulation", VCPU_STAT(insn_emulation
) },
159 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
160 { "irq_injections", VCPU_STAT(irq_injections
) },
161 { "nmi_injections", VCPU_STAT(nmi_injections
) },
162 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
163 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
164 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
165 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
166 { "mmu_flooded", VM_STAT(mmu_flooded
) },
167 { "mmu_recycled", VM_STAT(mmu_recycled
) },
168 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
169 { "mmu_unsync", VM_STAT(mmu_unsync
) },
170 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
171 { "largepages", VM_STAT(lpages
) },
175 u64 __read_mostly host_xcr0
;
177 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
179 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
182 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
183 vcpu
->arch
.apf
.gfns
[i
] = ~0;
186 static void kvm_on_user_return(struct user_return_notifier
*urn
)
189 struct kvm_shared_msrs
*locals
190 = container_of(urn
, struct kvm_shared_msrs
, urn
);
191 struct kvm_shared_msr_values
*values
;
193 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
194 values
= &locals
->values
[slot
];
195 if (values
->host
!= values
->curr
) {
196 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
197 values
->curr
= values
->host
;
200 locals
->registered
= false;
201 user_return_notifier_unregister(urn
);
204 static void shared_msr_update(unsigned slot
, u32 msr
)
207 unsigned int cpu
= smp_processor_id();
208 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
210 /* only read, and nobody should modify it at this time,
211 * so don't need lock */
212 if (slot
>= shared_msrs_global
.nr
) {
213 printk(KERN_ERR
"kvm: invalid MSR slot!");
216 rdmsrl_safe(msr
, &value
);
217 smsr
->values
[slot
].host
= value
;
218 smsr
->values
[slot
].curr
= value
;
221 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
223 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
224 if (slot
>= shared_msrs_global
.nr
)
225 shared_msrs_global
.nr
= slot
+ 1;
226 shared_msrs_global
.msrs
[slot
] = msr
;
227 /* we need ensured the shared_msr_global have been updated */
230 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
232 static void kvm_shared_msr_cpu_online(void)
236 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
237 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
240 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
242 unsigned int cpu
= smp_processor_id();
243 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
246 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
248 smsr
->values
[slot
].curr
= value
;
249 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
253 if (!smsr
->registered
) {
254 smsr
->urn
.on_user_return
= kvm_on_user_return
;
255 user_return_notifier_register(&smsr
->urn
);
256 smsr
->registered
= true;
260 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
262 static void drop_user_return_notifiers(void)
264 unsigned int cpu
= smp_processor_id();
265 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
267 if (smsr
->registered
)
268 kvm_on_user_return(&smsr
->urn
);
271 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
273 return vcpu
->arch
.apic_base
;
275 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
277 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
279 u64 old_state
= vcpu
->arch
.apic_base
&
280 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
281 u64 new_state
= msr_info
->data
&
282 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
283 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
284 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
286 if (!msr_info
->host_initiated
&&
287 ((msr_info
->data
& reserved_bits
) != 0 ||
288 new_state
== X2APIC_ENABLE
||
289 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
290 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
291 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
295 kvm_lapic_set_base(vcpu
, msr_info
->data
);
298 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
300 asmlinkage __visible
void kvm_spurious_fault(void)
302 /* Fault while not rebooting. We want the trace. */
305 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
307 #define EXCPT_BENIGN 0
308 #define EXCPT_CONTRIBUTORY 1
311 static int exception_class(int vector
)
321 return EXCPT_CONTRIBUTORY
;
328 #define EXCPT_FAULT 0
330 #define EXCPT_ABORT 2
331 #define EXCPT_INTERRUPT 3
333 static int exception_type(int vector
)
337 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
338 return EXCPT_INTERRUPT
;
342 /* #DB is trap, as instruction watchpoints are handled elsewhere */
343 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
346 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
349 /* Reserved exceptions will result in fault */
353 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
354 unsigned nr
, bool has_error
, u32 error_code
,
360 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
362 if (!vcpu
->arch
.exception
.pending
) {
364 if (has_error
&& !is_protmode(vcpu
))
366 vcpu
->arch
.exception
.pending
= true;
367 vcpu
->arch
.exception
.has_error_code
= has_error
;
368 vcpu
->arch
.exception
.nr
= nr
;
369 vcpu
->arch
.exception
.error_code
= error_code
;
370 vcpu
->arch
.exception
.reinject
= reinject
;
374 /* to check exception */
375 prev_nr
= vcpu
->arch
.exception
.nr
;
376 if (prev_nr
== DF_VECTOR
) {
377 /* triple fault -> shutdown */
378 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
381 class1
= exception_class(prev_nr
);
382 class2
= exception_class(nr
);
383 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
384 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
385 /* generate double fault per SDM Table 5-5 */
386 vcpu
->arch
.exception
.pending
= true;
387 vcpu
->arch
.exception
.has_error_code
= true;
388 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
389 vcpu
->arch
.exception
.error_code
= 0;
391 /* replace previous exception with a new one in a hope
392 that instruction re-execution will regenerate lost
397 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
399 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
401 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
403 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
405 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
407 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
409 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
412 kvm_inject_gp(vcpu
, 0);
414 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
416 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
418 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
420 ++vcpu
->stat
.pf_guest
;
421 vcpu
->arch
.cr2
= fault
->address
;
422 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
424 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
426 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
428 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
429 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
431 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
433 return fault
->nested_page_fault
;
436 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
438 atomic_inc(&vcpu
->arch
.nmi_queued
);
439 kvm_make_request(KVM_REQ_NMI
, vcpu
);
441 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
443 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
445 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
447 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
449 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
451 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
453 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
456 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
457 * a #GP and return false.
459 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
461 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
463 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
466 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
468 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
470 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
473 kvm_queue_exception(vcpu
, UD_VECTOR
);
476 EXPORT_SYMBOL_GPL(kvm_require_dr
);
479 * This function will be used to read from the physical memory of the currently
480 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
481 * can read from guest physical or from the guest's guest physical memory.
483 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
484 gfn_t ngfn
, void *data
, int offset
, int len
,
487 struct x86_exception exception
;
491 ngpa
= gfn_to_gpa(ngfn
);
492 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
493 if (real_gfn
== UNMAPPED_GVA
)
496 real_gfn
= gpa_to_gfn(real_gfn
);
498 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
500 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
502 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
503 void *data
, int offset
, int len
, u32 access
)
505 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
506 data
, offset
, len
, access
);
510 * Load the pae pdptrs. Return true is they are all valid.
512 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
514 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
515 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
518 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
520 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
521 offset
* sizeof(u64
), sizeof(pdpte
),
522 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
527 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
528 if (is_present_gpte(pdpte
[i
]) &&
529 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
536 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
537 __set_bit(VCPU_EXREG_PDPTR
,
538 (unsigned long *)&vcpu
->arch
.regs_avail
);
539 __set_bit(VCPU_EXREG_PDPTR
,
540 (unsigned long *)&vcpu
->arch
.regs_dirty
);
545 EXPORT_SYMBOL_GPL(load_pdptrs
);
547 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
549 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
555 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
558 if (!test_bit(VCPU_EXREG_PDPTR
,
559 (unsigned long *)&vcpu
->arch
.regs_avail
))
562 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
563 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
564 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
565 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
568 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
574 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
576 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
577 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
582 if (cr0
& 0xffffffff00000000UL
)
586 cr0
&= ~CR0_RESERVED_BITS
;
588 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
591 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
594 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
596 if ((vcpu
->arch
.efer
& EFER_LME
)) {
601 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
606 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
611 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
614 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
616 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
617 kvm_clear_async_pf_completion_queue(vcpu
);
618 kvm_async_pf_hash_reset(vcpu
);
621 if ((cr0
^ old_cr0
) & update_bits
)
622 kvm_mmu_reset_context(vcpu
);
624 if ((cr0
^ old_cr0
) & X86_CR0_CD
)
625 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
629 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
631 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
633 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
635 EXPORT_SYMBOL_GPL(kvm_lmsw
);
637 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
639 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
640 !vcpu
->guest_xcr0_loaded
) {
641 /* kvm_set_xcr() also depends on this */
642 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
643 vcpu
->guest_xcr0_loaded
= 1;
647 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
649 if (vcpu
->guest_xcr0_loaded
) {
650 if (vcpu
->arch
.xcr0
!= host_xcr0
)
651 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
652 vcpu
->guest_xcr0_loaded
= 0;
656 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
659 u64 old_xcr0
= vcpu
->arch
.xcr0
;
662 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
663 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
665 if (!(xcr0
& XSTATE_FP
))
667 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
671 * Do not allow the guest to set bits that we do not support
672 * saving. However, xcr0 bit 0 is always set, even if the
673 * emulated CPU does not support XSAVE (see fx_init).
675 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
676 if (xcr0
& ~valid_bits
)
679 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
682 if (xcr0
& XSTATE_AVX512
) {
683 if (!(xcr0
& XSTATE_YMM
))
685 if ((xcr0
& XSTATE_AVX512
) != XSTATE_AVX512
)
688 kvm_put_guest_xcr0(vcpu
);
689 vcpu
->arch
.xcr0
= xcr0
;
691 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
692 kvm_update_cpuid(vcpu
);
696 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
698 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
699 __kvm_set_xcr(vcpu
, index
, xcr
)) {
700 kvm_inject_gp(vcpu
, 0);
705 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
707 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
709 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
710 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
711 X86_CR4_SMEP
| X86_CR4_SMAP
;
713 if (cr4
& CR4_RESERVED_BITS
)
716 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
719 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
722 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
725 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
728 if (is_long_mode(vcpu
)) {
729 if (!(cr4
& X86_CR4_PAE
))
731 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
732 && ((cr4
^ old_cr4
) & pdptr_bits
)
733 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
737 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
738 if (!guest_cpuid_has_pcid(vcpu
))
741 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
742 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
746 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
749 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
750 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
751 kvm_mmu_reset_context(vcpu
);
753 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
754 kvm_update_cpuid(vcpu
);
758 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
760 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
763 cr3
&= ~CR3_PCID_INVD
;
766 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
767 kvm_mmu_sync_roots(vcpu
);
768 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
772 if (is_long_mode(vcpu
)) {
773 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
775 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
776 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
779 vcpu
->arch
.cr3
= cr3
;
780 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
781 kvm_mmu_new_cr3(vcpu
);
784 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
786 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
788 if (cr8
& CR8_RESERVED_BITS
)
790 if (irqchip_in_kernel(vcpu
->kvm
))
791 kvm_lapic_set_tpr(vcpu
, cr8
);
793 vcpu
->arch
.cr8
= cr8
;
796 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
798 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
800 if (irqchip_in_kernel(vcpu
->kvm
))
801 return kvm_lapic_get_cr8(vcpu
);
803 return vcpu
->arch
.cr8
;
805 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
807 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
811 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
812 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
813 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
814 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
818 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
820 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
821 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
824 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
828 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
829 dr7
= vcpu
->arch
.guest_debug_dr7
;
831 dr7
= vcpu
->arch
.dr7
;
832 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
833 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
834 if (dr7
& DR7_BP_EN_MASK
)
835 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
838 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
840 u64 fixed
= DR6_FIXED_1
;
842 if (!guest_cpuid_has_rtm(vcpu
))
847 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
851 vcpu
->arch
.db
[dr
] = val
;
852 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
853 vcpu
->arch
.eff_db
[dr
] = val
;
858 if (val
& 0xffffffff00000000ULL
)
860 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
861 kvm_update_dr6(vcpu
);
866 if (val
& 0xffffffff00000000ULL
)
868 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
869 kvm_update_dr7(vcpu
);
876 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
878 if (__kvm_set_dr(vcpu
, dr
, val
)) {
879 kvm_inject_gp(vcpu
, 0);
884 EXPORT_SYMBOL_GPL(kvm_set_dr
);
886 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
890 *val
= vcpu
->arch
.db
[dr
];
895 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
896 *val
= vcpu
->arch
.dr6
;
898 *val
= kvm_x86_ops
->get_dr6(vcpu
);
903 *val
= vcpu
->arch
.dr7
;
908 EXPORT_SYMBOL_GPL(kvm_get_dr
);
910 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
912 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
916 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
919 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
920 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
923 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
926 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
927 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
929 * This list is modified at module load time to reflect the
930 * capabilities of the host cpu. This capabilities test skips MSRs that are
931 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
932 * may depend on host virtualization features rather than host cpu features.
935 static u32 msrs_to_save
[] = {
936 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
939 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
941 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
942 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
945 static unsigned num_msrs_to_save
;
947 static u32 emulated_msrs
[] = {
948 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
949 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
950 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
951 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
952 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
956 MSR_IA32_TSCDEADLINE
,
957 MSR_IA32_MISC_ENABLE
,
963 static unsigned num_emulated_msrs
;
965 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
967 if (efer
& efer_reserved_bits
)
970 if (efer
& EFER_FFXSR
) {
971 struct kvm_cpuid_entry2
*feat
;
973 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
974 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
978 if (efer
& EFER_SVME
) {
979 struct kvm_cpuid_entry2
*feat
;
981 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
982 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
988 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
990 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
992 u64 old_efer
= vcpu
->arch
.efer
;
994 if (!kvm_valid_efer(vcpu
, efer
))
998 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1002 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1004 kvm_x86_ops
->set_efer(vcpu
, efer
);
1006 /* Update reserved bits */
1007 if ((efer
^ old_efer
) & EFER_NX
)
1008 kvm_mmu_reset_context(vcpu
);
1013 void kvm_enable_efer_bits(u64 mask
)
1015 efer_reserved_bits
&= ~mask
;
1017 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1020 * Writes msr value into into the appropriate "register".
1021 * Returns 0 on success, non-0 otherwise.
1022 * Assumes vcpu_load() was already called.
1024 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1026 switch (msr
->index
) {
1029 case MSR_KERNEL_GS_BASE
:
1032 if (is_noncanonical_address(msr
->data
))
1035 case MSR_IA32_SYSENTER_EIP
:
1036 case MSR_IA32_SYSENTER_ESP
:
1038 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1039 * non-canonical address is written on Intel but not on
1040 * AMD (which ignores the top 32-bits, because it does
1041 * not implement 64-bit SYSENTER).
1043 * 64-bit code should hence be able to write a non-canonical
1044 * value on AMD. Making the address canonical ensures that
1045 * vmentry does not fail on Intel after writing a non-canonical
1046 * value, and that something deterministic happens if the guest
1047 * invokes 64-bit SYSENTER.
1049 msr
->data
= get_canonical(msr
->data
);
1051 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1053 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1056 * Adapt set_msr() to msr_io()'s calling convention
1058 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1060 struct msr_data msr
;
1064 msr
.host_initiated
= true;
1065 r
= kvm_get_msr(vcpu
, &msr
);
1073 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1075 struct msr_data msr
;
1079 msr
.host_initiated
= true;
1080 return kvm_set_msr(vcpu
, &msr
);
1083 #ifdef CONFIG_X86_64
1084 struct pvclock_gtod_data
{
1087 struct { /* extract of a clocksource struct */
1099 static struct pvclock_gtod_data pvclock_gtod_data
;
1101 static void update_pvclock_gtod(struct timekeeper
*tk
)
1103 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1106 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1108 write_seqcount_begin(&vdata
->seq
);
1110 /* copy pvclock gtod data */
1111 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1112 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1113 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1114 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1115 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1117 vdata
->boot_ns
= boot_ns
;
1118 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1120 write_seqcount_end(&vdata
->seq
);
1124 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1127 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1128 * vcpu_enter_guest. This function is only called from
1129 * the physical CPU that is running vcpu.
1131 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1134 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1138 struct pvclock_wall_clock wc
;
1139 struct timespec boot
;
1144 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1149 ++version
; /* first time write, random junk */
1153 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1156 * The guest calculates current wall clock time by adding
1157 * system time (updated by kvm_guest_time_update below) to the
1158 * wall clock specified here. guest system time equals host
1159 * system time for us, thus we must fill in host boot time here.
1163 if (kvm
->arch
.kvmclock_offset
) {
1164 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1165 boot
= timespec_sub(boot
, ts
);
1167 wc
.sec
= boot
.tv_sec
;
1168 wc
.nsec
= boot
.tv_nsec
;
1169 wc
.version
= version
;
1171 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1174 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1177 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1179 uint32_t quotient
, remainder
;
1181 /* Don't try to replace with do_div(), this one calculates
1182 * "(dividend << 32) / divisor" */
1184 : "=a" (quotient
), "=d" (remainder
)
1185 : "0" (0), "1" (dividend
), "r" (divisor
) );
1189 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1190 s8
*pshift
, u32
*pmultiplier
)
1197 tps64
= base_khz
* 1000LL;
1198 scaled64
= scaled_khz
* 1000LL;
1199 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1204 tps32
= (uint32_t)tps64
;
1205 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1206 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1214 *pmultiplier
= div_frac(scaled64
, tps32
);
1216 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1217 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1220 static inline u64
get_kernel_ns(void)
1222 return ktime_get_boot_ns();
1225 #ifdef CONFIG_X86_64
1226 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1229 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1230 static unsigned long max_tsc_khz
;
1232 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1234 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1235 vcpu
->arch
.virtual_tsc_shift
);
1238 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1240 u64 v
= (u64
)khz
* (1000000 + ppm
);
1245 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1247 u32 thresh_lo
, thresh_hi
;
1248 int use_scaling
= 0;
1250 /* tsc_khz can be zero if TSC calibration fails */
1251 if (this_tsc_khz
== 0)
1254 /* Compute a scale to convert nanoseconds in TSC cycles */
1255 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1256 &vcpu
->arch
.virtual_tsc_shift
,
1257 &vcpu
->arch
.virtual_tsc_mult
);
1258 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1261 * Compute the variation in TSC rate which is acceptable
1262 * within the range of tolerance and decide if the
1263 * rate being applied is within that bounds of the hardware
1264 * rate. If so, no scaling or compensation need be done.
1266 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1267 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1268 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1269 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1272 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1275 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1277 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1278 vcpu
->arch
.virtual_tsc_mult
,
1279 vcpu
->arch
.virtual_tsc_shift
);
1280 tsc
+= vcpu
->arch
.this_tsc_write
;
1284 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1286 #ifdef CONFIG_X86_64
1288 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1289 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1291 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1292 atomic_read(&vcpu
->kvm
->online_vcpus
));
1295 * Once the masterclock is enabled, always perform request in
1296 * order to update it.
1298 * In order to enable masterclock, the host clocksource must be TSC
1299 * and the vcpus need to have matched TSCs. When that happens,
1300 * perform request to enable masterclock.
1302 if (ka
->use_master_clock
||
1303 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1304 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1306 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1307 atomic_read(&vcpu
->kvm
->online_vcpus
),
1308 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1312 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1314 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1315 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1318 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1320 struct kvm
*kvm
= vcpu
->kvm
;
1321 u64 offset
, ns
, elapsed
;
1322 unsigned long flags
;
1325 bool already_matched
;
1326 u64 data
= msr
->data
;
1328 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1329 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1330 ns
= get_kernel_ns();
1331 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1333 if (vcpu
->arch
.virtual_tsc_khz
) {
1336 /* n.b - signed multiplication and division required */
1337 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1338 #ifdef CONFIG_X86_64
1339 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1341 /* do_div() only does unsigned */
1342 asm("1: idivl %[divisor]\n"
1343 "2: xor %%edx, %%edx\n"
1344 " movl $0, %[faulted]\n"
1346 ".section .fixup,\"ax\"\n"
1347 "4: movl $1, %[faulted]\n"
1351 _ASM_EXTABLE(1b
, 4b
)
1353 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1354 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1357 do_div(elapsed
, 1000);
1362 /* idivl overflow => difference is larger than USEC_PER_SEC */
1364 usdiff
= USEC_PER_SEC
;
1366 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1369 * Special case: TSC write with a small delta (1 second) of virtual
1370 * cycle time against real time is interpreted as an attempt to
1371 * synchronize the CPU.
1373 * For a reliable TSC, we can match TSC offsets, and for an unstable
1374 * TSC, we add elapsed time in this computation. We could let the
1375 * compensation code attempt to catch up if we fall behind, but
1376 * it's better to try to match offsets from the beginning.
1378 if (usdiff
< USEC_PER_SEC
&&
1379 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1380 if (!check_tsc_unstable()) {
1381 offset
= kvm
->arch
.cur_tsc_offset
;
1382 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1384 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1386 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1387 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1390 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1393 * We split periods of matched TSC writes into generations.
1394 * For each generation, we track the original measured
1395 * nanosecond time, offset, and write, so if TSCs are in
1396 * sync, we can match exact offset, and if not, we can match
1397 * exact software computation in compute_guest_tsc()
1399 * These values are tracked in kvm->arch.cur_xxx variables.
1401 kvm
->arch
.cur_tsc_generation
++;
1402 kvm
->arch
.cur_tsc_nsec
= ns
;
1403 kvm
->arch
.cur_tsc_write
= data
;
1404 kvm
->arch
.cur_tsc_offset
= offset
;
1406 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1407 kvm
->arch
.cur_tsc_generation
, data
);
1411 * We also track th most recent recorded KHZ, write and time to
1412 * allow the matching interval to be extended at each write.
1414 kvm
->arch
.last_tsc_nsec
= ns
;
1415 kvm
->arch
.last_tsc_write
= data
;
1416 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1418 vcpu
->arch
.last_guest_tsc
= data
;
1420 /* Keep track of which generation this VCPU has synchronized to */
1421 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1422 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1423 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1425 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1426 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1427 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1428 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1430 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1432 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1433 } else if (!already_matched
) {
1434 kvm
->arch
.nr_vcpus_matched_tsc
++;
1437 kvm_track_tsc_matching(vcpu
);
1438 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1441 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1443 #ifdef CONFIG_X86_64
1445 static cycle_t
read_tsc(void)
1451 * Empirically, a fence (of type that depends on the CPU)
1452 * before rdtsc is enough to ensure that rdtsc is ordered
1453 * with respect to loads. The various CPU manuals are unclear
1454 * as to whether rdtsc can be reordered with later loads,
1455 * but no one has ever seen it happen.
1458 ret
= (cycle_t
)vget_cycles();
1460 last
= pvclock_gtod_data
.clock
.cycle_last
;
1462 if (likely(ret
>= last
))
1466 * GCC likes to generate cmov here, but this branch is extremely
1467 * predictable (it's just a funciton of time and the likely is
1468 * very likely) and there's a data dependence, so force GCC
1469 * to generate a branch instead. I don't barrier() because
1470 * we don't actually need a barrier, and if this function
1471 * ever gets inlined it will generate worse code.
1477 static inline u64
vgettsc(cycle_t
*cycle_now
)
1480 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1482 *cycle_now
= read_tsc();
1484 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1485 return v
* gtod
->clock
.mult
;
1488 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1490 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1496 seq
= read_seqcount_begin(>od
->seq
);
1497 mode
= gtod
->clock
.vclock_mode
;
1498 ns
= gtod
->nsec_base
;
1499 ns
+= vgettsc(cycle_now
);
1500 ns
>>= gtod
->clock
.shift
;
1501 ns
+= gtod
->boot_ns
;
1502 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1508 /* returns true if host is using tsc clocksource */
1509 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1511 /* checked again under seqlock below */
1512 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1515 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1521 * Assuming a stable TSC across physical CPUS, and a stable TSC
1522 * across virtual CPUs, the following condition is possible.
1523 * Each numbered line represents an event visible to both
1524 * CPUs at the next numbered event.
1526 * "timespecX" represents host monotonic time. "tscX" represents
1529 * VCPU0 on CPU0 | VCPU1 on CPU1
1531 * 1. read timespec0,tsc0
1532 * 2. | timespec1 = timespec0 + N
1534 * 3. transition to guest | transition to guest
1535 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1536 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1537 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1539 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1542 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1544 * - 0 < N - M => M < N
1546 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1547 * always the case (the difference between two distinct xtime instances
1548 * might be smaller then the difference between corresponding TSC reads,
1549 * when updating guest vcpus pvclock areas).
1551 * To avoid that problem, do not allow visibility of distinct
1552 * system_timestamp/tsc_timestamp values simultaneously: use a master
1553 * copy of host monotonic time values. Update that master copy
1556 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1560 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1562 #ifdef CONFIG_X86_64
1563 struct kvm_arch
*ka
= &kvm
->arch
;
1565 bool host_tsc_clocksource
, vcpus_matched
;
1567 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1568 atomic_read(&kvm
->online_vcpus
));
1571 * If the host uses TSC clock, then passthrough TSC as stable
1574 host_tsc_clocksource
= kvm_get_time_and_clockread(
1575 &ka
->master_kernel_ns
,
1576 &ka
->master_cycle_now
);
1578 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1579 && !backwards_tsc_observed
1580 && !ka
->boot_vcpu_runs_old_kvmclock
;
1582 if (ka
->use_master_clock
)
1583 atomic_set(&kvm_guest_has_master_clock
, 1);
1585 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1586 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1591 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1593 #ifdef CONFIG_X86_64
1595 struct kvm_vcpu
*vcpu
;
1596 struct kvm_arch
*ka
= &kvm
->arch
;
1598 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1599 kvm_make_mclock_inprogress_request(kvm
);
1600 /* no guest entries from this point */
1601 pvclock_update_vm_gtod_copy(kvm
);
1603 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1604 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1606 /* guest entries allowed */
1607 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1608 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1610 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1614 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1616 unsigned long flags
, this_tsc_khz
;
1617 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1618 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1620 u64 tsc_timestamp
, host_tsc
;
1621 struct pvclock_vcpu_time_info guest_hv_clock
;
1623 bool use_master_clock
;
1629 * If the host uses TSC clock, then passthrough TSC as stable
1632 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1633 use_master_clock
= ka
->use_master_clock
;
1634 if (use_master_clock
) {
1635 host_tsc
= ka
->master_cycle_now
;
1636 kernel_ns
= ka
->master_kernel_ns
;
1638 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1640 /* Keep irq disabled to prevent changes to the clock */
1641 local_irq_save(flags
);
1642 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1643 if (unlikely(this_tsc_khz
== 0)) {
1644 local_irq_restore(flags
);
1645 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1648 if (!use_master_clock
) {
1649 host_tsc
= native_read_tsc();
1650 kernel_ns
= get_kernel_ns();
1653 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1656 * We may have to catch up the TSC to match elapsed wall clock
1657 * time for two reasons, even if kvmclock is used.
1658 * 1) CPU could have been running below the maximum TSC rate
1659 * 2) Broken TSC compensation resets the base at each VCPU
1660 * entry to avoid unknown leaps of TSC even when running
1661 * again on the same CPU. This may cause apparent elapsed
1662 * time to disappear, and the guest to stand still or run
1665 if (vcpu
->tsc_catchup
) {
1666 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1667 if (tsc
> tsc_timestamp
) {
1668 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1669 tsc_timestamp
= tsc
;
1673 local_irq_restore(flags
);
1675 if (!vcpu
->pv_time_enabled
)
1678 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1679 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1680 &vcpu
->hv_clock
.tsc_shift
,
1681 &vcpu
->hv_clock
.tsc_to_system_mul
);
1682 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1685 /* With all the info we got, fill in the values */
1686 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1687 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1688 vcpu
->last_guest_tsc
= tsc_timestamp
;
1690 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1691 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1694 /* This VCPU is paused, but it's legal for a guest to read another
1695 * VCPU's kvmclock, so we really have to follow the specification where
1696 * it says that version is odd if data is being modified, and even after
1699 * Version field updates must be kept separate. This is because
1700 * kvm_write_guest_cached might use a "rep movs" instruction, and
1701 * writes within a string instruction are weakly ordered. So there
1702 * are three writes overall.
1704 * As a small optimization, only write the version field in the first
1705 * and third write. The vcpu->pv_time cache is still valid, because the
1706 * version field is the first in the struct.
1708 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1710 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1711 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1713 sizeof(vcpu
->hv_clock
.version
));
1717 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1718 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1720 if (vcpu
->pvclock_set_guest_stopped_request
) {
1721 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1722 vcpu
->pvclock_set_guest_stopped_request
= false;
1725 pvclock_flags
|= PVCLOCK_COUNTS_FROM_ZERO
;
1727 /* If the host uses TSC clocksource, then it is stable */
1728 if (use_master_clock
)
1729 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1731 vcpu
->hv_clock
.flags
= pvclock_flags
;
1733 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1735 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1737 sizeof(vcpu
->hv_clock
));
1741 vcpu
->hv_clock
.version
++;
1742 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1744 sizeof(vcpu
->hv_clock
.version
));
1749 * kvmclock updates which are isolated to a given vcpu, such as
1750 * vcpu->cpu migration, should not allow system_timestamp from
1751 * the rest of the vcpus to remain static. Otherwise ntp frequency
1752 * correction applies to one vcpu's system_timestamp but not
1755 * So in those cases, request a kvmclock update for all vcpus.
1756 * We need to rate-limit these requests though, as they can
1757 * considerably slow guests that have a large number of vcpus.
1758 * The time for a remote vcpu to update its kvmclock is bound
1759 * by the delay we use to rate-limit the updates.
1762 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1764 static void kvmclock_update_fn(struct work_struct
*work
)
1767 struct delayed_work
*dwork
= to_delayed_work(work
);
1768 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1769 kvmclock_update_work
);
1770 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1771 struct kvm_vcpu
*vcpu
;
1773 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1774 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1775 kvm_vcpu_kick(vcpu
);
1779 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1781 struct kvm
*kvm
= v
->kvm
;
1783 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1784 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1785 KVMCLOCK_UPDATE_DELAY
);
1788 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1790 static void kvmclock_sync_fn(struct work_struct
*work
)
1792 struct delayed_work
*dwork
= to_delayed_work(work
);
1793 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1794 kvmclock_sync_work
);
1795 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1797 if (!kvmclock_periodic_sync
)
1800 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1801 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1802 KVMCLOCK_SYNC_PERIOD
);
1805 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1807 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1808 unsigned bank_num
= mcg_cap
& 0xff;
1811 case MSR_IA32_MCG_STATUS
:
1812 vcpu
->arch
.mcg_status
= data
;
1814 case MSR_IA32_MCG_CTL
:
1815 if (!(mcg_cap
& MCG_CTL_P
))
1817 if (data
!= 0 && data
!= ~(u64
)0)
1819 vcpu
->arch
.mcg_ctl
= data
;
1822 if (msr
>= MSR_IA32_MC0_CTL
&&
1823 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1824 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1825 /* only 0 or all 1s can be written to IA32_MCi_CTL
1826 * some Linux kernels though clear bit 10 in bank 4 to
1827 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1828 * this to avoid an uncatched #GP in the guest
1830 if ((offset
& 0x3) == 0 &&
1831 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1833 vcpu
->arch
.mce_banks
[offset
] = data
;
1841 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1843 struct kvm
*kvm
= vcpu
->kvm
;
1844 int lm
= is_long_mode(vcpu
);
1845 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1846 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1847 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1848 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1849 u32 page_num
= data
& ~PAGE_MASK
;
1850 u64 page_addr
= data
& PAGE_MASK
;
1855 if (page_num
>= blob_size
)
1858 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1863 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
1872 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1874 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1877 static bool kvm_hv_msr_partition_wide(u32 msr
)
1881 case HV_X64_MSR_GUEST_OS_ID
:
1882 case HV_X64_MSR_HYPERCALL
:
1883 case HV_X64_MSR_REFERENCE_TSC
:
1884 case HV_X64_MSR_TIME_REF_COUNT
:
1892 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1894 struct kvm
*kvm
= vcpu
->kvm
;
1897 case HV_X64_MSR_GUEST_OS_ID
:
1898 kvm
->arch
.hv_guest_os_id
= data
;
1899 /* setting guest os id to zero disables hypercall page */
1900 if (!kvm
->arch
.hv_guest_os_id
)
1901 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1903 case HV_X64_MSR_HYPERCALL
: {
1908 /* if guest os id is not set hypercall should remain disabled */
1909 if (!kvm
->arch
.hv_guest_os_id
)
1911 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1912 kvm
->arch
.hv_hypercall
= data
;
1915 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1916 addr
= gfn_to_hva(kvm
, gfn
);
1917 if (kvm_is_error_hva(addr
))
1919 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1920 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1921 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1923 kvm
->arch
.hv_hypercall
= data
;
1924 mark_page_dirty(kvm
, gfn
);
1927 case HV_X64_MSR_REFERENCE_TSC
: {
1929 HV_REFERENCE_TSC_PAGE tsc_ref
;
1930 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1931 kvm
->arch
.hv_tsc_page
= data
;
1932 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1934 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1935 if (kvm_write_guest(kvm
, gfn
<< HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
,
1936 &tsc_ref
, sizeof(tsc_ref
)))
1938 mark_page_dirty(kvm
, gfn
);
1942 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1943 "data 0x%llx\n", msr
, data
);
1949 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1952 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1956 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1957 vcpu
->arch
.hv_vapic
= data
;
1958 if (kvm_lapic_enable_pv_eoi(vcpu
, 0))
1962 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
1963 addr
= kvm_vcpu_gfn_to_hva(vcpu
, gfn
);
1964 if (kvm_is_error_hva(addr
))
1966 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1968 vcpu
->arch
.hv_vapic
= data
;
1969 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
1970 if (kvm_lapic_enable_pv_eoi(vcpu
, gfn_to_gpa(gfn
) | KVM_MSR_ENABLED
))
1974 case HV_X64_MSR_EOI
:
1975 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1976 case HV_X64_MSR_ICR
:
1977 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1978 case HV_X64_MSR_TPR
:
1979 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1981 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1982 "data 0x%llx\n", msr
, data
);
1989 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1991 gpa_t gpa
= data
& ~0x3f;
1993 /* Bits 2:5 are reserved, Should be zero */
1997 vcpu
->arch
.apf
.msr_val
= data
;
1999 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2000 kvm_clear_async_pf_completion_queue(vcpu
);
2001 kvm_async_pf_hash_reset(vcpu
);
2005 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2009 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2010 kvm_async_pf_wakeup_all(vcpu
);
2014 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2016 vcpu
->arch
.pv_time_enabled
= false;
2019 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2023 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2026 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2027 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2028 vcpu
->arch
.st
.accum_steal
= delta
;
2031 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2033 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2036 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2037 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2040 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2041 vcpu
->arch
.st
.steal
.version
+= 2;
2042 vcpu
->arch
.st
.accum_steal
= 0;
2044 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2045 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2048 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2051 u32 msr
= msr_info
->index
;
2052 u64 data
= msr_info
->data
;
2055 case MSR_AMD64_NB_CFG
:
2056 case MSR_IA32_UCODE_REV
:
2057 case MSR_IA32_UCODE_WRITE
:
2058 case MSR_VM_HSAVE_PA
:
2059 case MSR_AMD64_PATCH_LOADER
:
2060 case MSR_AMD64_BU_CFG2
:
2064 return set_efer(vcpu
, data
);
2066 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2067 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2068 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2069 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2071 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2076 case MSR_FAM10H_MMIO_CONF_BASE
:
2078 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2083 case MSR_IA32_DEBUGCTLMSR
:
2085 /* We support the non-activated case already */
2087 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2088 /* Values other than LBR and BTF are vendor-specific,
2089 thus reserved and should throw a #GP */
2092 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2095 case 0x200 ... 0x2ff:
2096 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2097 case MSR_IA32_APICBASE
:
2098 return kvm_set_apic_base(vcpu
, msr_info
);
2099 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2100 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2101 case MSR_IA32_TSCDEADLINE
:
2102 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2104 case MSR_IA32_TSC_ADJUST
:
2105 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2106 if (!msr_info
->host_initiated
) {
2107 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2108 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2110 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2113 case MSR_IA32_MISC_ENABLE
:
2114 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2116 case MSR_IA32_SMBASE
:
2117 if (!msr_info
->host_initiated
)
2119 vcpu
->arch
.smbase
= data
;
2121 case MSR_KVM_WALL_CLOCK_NEW
:
2122 case MSR_KVM_WALL_CLOCK
:
2123 vcpu
->kvm
->arch
.wall_clock
= data
;
2124 kvm_write_wall_clock(vcpu
->kvm
, data
);
2126 case MSR_KVM_SYSTEM_TIME_NEW
:
2127 case MSR_KVM_SYSTEM_TIME
: {
2129 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2131 kvmclock_reset(vcpu
);
2133 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2134 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2136 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2137 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2140 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2142 ka
->kvmclock_offset
= -get_kernel_ns();
2145 vcpu
->arch
.time
= data
;
2146 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2148 /* we verify if the enable bit is set... */
2152 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2154 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2155 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2156 sizeof(struct pvclock_vcpu_time_info
)))
2157 vcpu
->arch
.pv_time_enabled
= false;
2159 vcpu
->arch
.pv_time_enabled
= true;
2163 case MSR_KVM_ASYNC_PF_EN
:
2164 if (kvm_pv_enable_async_pf(vcpu
, data
))
2167 case MSR_KVM_STEAL_TIME
:
2169 if (unlikely(!sched_info_on()))
2172 if (data
& KVM_STEAL_RESERVED_MASK
)
2175 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2176 data
& KVM_STEAL_VALID_BITS
,
2177 sizeof(struct kvm_steal_time
)))
2180 vcpu
->arch
.st
.msr_val
= data
;
2182 if (!(data
& KVM_MSR_ENABLED
))
2185 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2188 accumulate_steal_time(vcpu
);
2191 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2194 case MSR_KVM_PV_EOI_EN
:
2195 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2199 case MSR_IA32_MCG_CTL
:
2200 case MSR_IA32_MCG_STATUS
:
2201 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2202 return set_msr_mce(vcpu
, msr
, data
);
2204 /* Performance counters are not protected by a CPUID bit,
2205 * so we should check all of them in the generic path for the sake of
2206 * cross vendor migration.
2207 * Writing a zero into the event select MSRs disables them,
2208 * which we perfectly emulate ;-). Any other value should be at least
2209 * reported, some guests depend on them.
2211 case MSR_K7_EVNTSEL0
:
2212 case MSR_K7_EVNTSEL1
:
2213 case MSR_K7_EVNTSEL2
:
2214 case MSR_K7_EVNTSEL3
:
2216 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2217 "0x%x data 0x%llx\n", msr
, data
);
2219 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2220 * so we ignore writes to make it happy.
2222 case MSR_K7_PERFCTR0
:
2223 case MSR_K7_PERFCTR1
:
2224 case MSR_K7_PERFCTR2
:
2225 case MSR_K7_PERFCTR3
:
2226 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2227 "0x%x data 0x%llx\n", msr
, data
);
2229 case MSR_P6_PERFCTR0
:
2230 case MSR_P6_PERFCTR1
:
2232 case MSR_P6_EVNTSEL0
:
2233 case MSR_P6_EVNTSEL1
:
2234 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2235 return kvm_pmu_set_msr(vcpu
, msr_info
);
2237 if (pr
|| data
!= 0)
2238 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2239 "0x%x data 0x%llx\n", msr
, data
);
2241 case MSR_K7_CLK_CTL
:
2243 * Ignore all writes to this no longer documented MSR.
2244 * Writes are only relevant for old K7 processors,
2245 * all pre-dating SVM, but a recommended workaround from
2246 * AMD for these chips. It is possible to specify the
2247 * affected processor models on the command line, hence
2248 * the need to ignore the workaround.
2251 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2252 if (kvm_hv_msr_partition_wide(msr
)) {
2254 mutex_lock(&vcpu
->kvm
->lock
);
2255 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2256 mutex_unlock(&vcpu
->kvm
->lock
);
2259 return set_msr_hyperv(vcpu
, msr
, data
);
2261 case MSR_IA32_BBL_CR_CTL3
:
2262 /* Drop writes to this legacy MSR -- see rdmsr
2263 * counterpart for further detail.
2265 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2267 case MSR_AMD64_OSVW_ID_LENGTH
:
2268 if (!guest_cpuid_has_osvw(vcpu
))
2270 vcpu
->arch
.osvw
.length
= data
;
2272 case MSR_AMD64_OSVW_STATUS
:
2273 if (!guest_cpuid_has_osvw(vcpu
))
2275 vcpu
->arch
.osvw
.status
= data
;
2278 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2279 return xen_hvm_config(vcpu
, data
);
2280 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2281 return kvm_pmu_set_msr(vcpu
, msr_info
);
2283 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2287 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2294 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2298 * Reads an msr value (of 'msr_index') into 'pdata'.
2299 * Returns 0 on success, non-0 otherwise.
2300 * Assumes vcpu_load() was already called.
2302 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2304 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2306 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2308 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2311 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2312 unsigned bank_num
= mcg_cap
& 0xff;
2315 case MSR_IA32_P5_MC_ADDR
:
2316 case MSR_IA32_P5_MC_TYPE
:
2319 case MSR_IA32_MCG_CAP
:
2320 data
= vcpu
->arch
.mcg_cap
;
2322 case MSR_IA32_MCG_CTL
:
2323 if (!(mcg_cap
& MCG_CTL_P
))
2325 data
= vcpu
->arch
.mcg_ctl
;
2327 case MSR_IA32_MCG_STATUS
:
2328 data
= vcpu
->arch
.mcg_status
;
2331 if (msr
>= MSR_IA32_MC0_CTL
&&
2332 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2333 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2334 data
= vcpu
->arch
.mce_banks
[offset
];
2343 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2346 struct kvm
*kvm
= vcpu
->kvm
;
2349 case HV_X64_MSR_GUEST_OS_ID
:
2350 data
= kvm
->arch
.hv_guest_os_id
;
2352 case HV_X64_MSR_HYPERCALL
:
2353 data
= kvm
->arch
.hv_hypercall
;
2355 case HV_X64_MSR_TIME_REF_COUNT
: {
2357 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2360 case HV_X64_MSR_REFERENCE_TSC
:
2361 data
= kvm
->arch
.hv_tsc_page
;
2364 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2372 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2377 case HV_X64_MSR_VP_INDEX
: {
2380 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
) {
2388 case HV_X64_MSR_EOI
:
2389 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2390 case HV_X64_MSR_ICR
:
2391 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2392 case HV_X64_MSR_TPR
:
2393 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2394 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2395 data
= vcpu
->arch
.hv_vapic
;
2398 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2405 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2409 switch (msr_info
->index
) {
2410 case MSR_IA32_PLATFORM_ID
:
2411 case MSR_IA32_EBL_CR_POWERON
:
2412 case MSR_IA32_DEBUGCTLMSR
:
2413 case MSR_IA32_LASTBRANCHFROMIP
:
2414 case MSR_IA32_LASTBRANCHTOIP
:
2415 case MSR_IA32_LASTINTFROMIP
:
2416 case MSR_IA32_LASTINTTOIP
:
2419 case MSR_VM_HSAVE_PA
:
2420 case MSR_K7_EVNTSEL0
:
2421 case MSR_K7_EVNTSEL1
:
2422 case MSR_K7_EVNTSEL2
:
2423 case MSR_K7_EVNTSEL3
:
2424 case MSR_K7_PERFCTR0
:
2425 case MSR_K7_PERFCTR1
:
2426 case MSR_K7_PERFCTR2
:
2427 case MSR_K7_PERFCTR3
:
2428 case MSR_K8_INT_PENDING_MSG
:
2429 case MSR_AMD64_NB_CFG
:
2430 case MSR_FAM10H_MMIO_CONF_BASE
:
2431 case MSR_AMD64_BU_CFG2
:
2434 case MSR_P6_PERFCTR0
:
2435 case MSR_P6_PERFCTR1
:
2436 case MSR_P6_EVNTSEL0
:
2437 case MSR_P6_EVNTSEL1
:
2438 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2439 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2442 case MSR_IA32_UCODE_REV
:
2443 msr_info
->data
= 0x100000000ULL
;
2446 case 0x200 ... 0x2ff:
2447 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2448 case 0xcd: /* fsb frequency */
2452 * MSR_EBC_FREQUENCY_ID
2453 * Conservative value valid for even the basic CPU models.
2454 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2455 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2456 * and 266MHz for model 3, or 4. Set Core Clock
2457 * Frequency to System Bus Frequency Ratio to 1 (bits
2458 * 31:24) even though these are only valid for CPU
2459 * models > 2, however guests may end up dividing or
2460 * multiplying by zero otherwise.
2462 case MSR_EBC_FREQUENCY_ID
:
2463 msr_info
->data
= 1 << 24;
2465 case MSR_IA32_APICBASE
:
2466 msr_info
->data
= kvm_get_apic_base(vcpu
);
2468 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2469 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2471 case MSR_IA32_TSCDEADLINE
:
2472 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2474 case MSR_IA32_TSC_ADJUST
:
2475 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2477 case MSR_IA32_MISC_ENABLE
:
2478 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2480 case MSR_IA32_SMBASE
:
2481 if (!msr_info
->host_initiated
)
2483 msr_info
->data
= vcpu
->arch
.smbase
;
2485 case MSR_IA32_PERF_STATUS
:
2486 /* TSC increment by tick */
2487 msr_info
->data
= 1000ULL;
2488 /* CPU multiplier */
2489 data
|= (((uint64_t)4ULL) << 40);
2492 msr_info
->data
= vcpu
->arch
.efer
;
2494 case MSR_KVM_WALL_CLOCK
:
2495 case MSR_KVM_WALL_CLOCK_NEW
:
2496 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2498 case MSR_KVM_SYSTEM_TIME
:
2499 case MSR_KVM_SYSTEM_TIME_NEW
:
2500 msr_info
->data
= vcpu
->arch
.time
;
2502 case MSR_KVM_ASYNC_PF_EN
:
2503 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2505 case MSR_KVM_STEAL_TIME
:
2506 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2508 case MSR_KVM_PV_EOI_EN
:
2509 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2511 case MSR_IA32_P5_MC_ADDR
:
2512 case MSR_IA32_P5_MC_TYPE
:
2513 case MSR_IA32_MCG_CAP
:
2514 case MSR_IA32_MCG_CTL
:
2515 case MSR_IA32_MCG_STATUS
:
2516 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2517 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2518 case MSR_K7_CLK_CTL
:
2520 * Provide expected ramp-up count for K7. All other
2521 * are set to zero, indicating minimum divisors for
2524 * This prevents guest kernels on AMD host with CPU
2525 * type 6, model 8 and higher from exploding due to
2526 * the rdmsr failing.
2528 msr_info
->data
= 0x20000000;
2530 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2531 if (kvm_hv_msr_partition_wide(msr_info
->index
)) {
2533 mutex_lock(&vcpu
->kvm
->lock
);
2534 r
= get_msr_hyperv_pw(vcpu
, msr_info
->index
, &msr_info
->data
);
2535 mutex_unlock(&vcpu
->kvm
->lock
);
2538 return get_msr_hyperv(vcpu
, msr_info
->index
, &msr_info
->data
);
2540 case MSR_IA32_BBL_CR_CTL3
:
2541 /* This legacy MSR exists but isn't fully documented in current
2542 * silicon. It is however accessed by winxp in very narrow
2543 * scenarios where it sets bit #19, itself documented as
2544 * a "reserved" bit. Best effort attempt to source coherent
2545 * read data here should the balance of the register be
2546 * interpreted by the guest:
2548 * L2 cache control register 3: 64GB range, 256KB size,
2549 * enabled, latency 0x1, configured
2551 msr_info
->data
= 0xbe702111;
2553 case MSR_AMD64_OSVW_ID_LENGTH
:
2554 if (!guest_cpuid_has_osvw(vcpu
))
2556 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2558 case MSR_AMD64_OSVW_STATUS
:
2559 if (!guest_cpuid_has_osvw(vcpu
))
2561 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2564 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2565 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2567 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr_info
->index
);
2570 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2577 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2580 * Read or write a bunch of msrs. All parameters are kernel addresses.
2582 * @return number of msrs set successfully.
2584 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2585 struct kvm_msr_entry
*entries
,
2586 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2587 unsigned index
, u64
*data
))
2591 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2592 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2593 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2595 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2601 * Read or write a bunch of msrs. Parameters are user addresses.
2603 * @return number of msrs set successfully.
2605 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2606 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2607 unsigned index
, u64
*data
),
2610 struct kvm_msrs msrs
;
2611 struct kvm_msr_entry
*entries
;
2616 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2620 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2623 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2624 entries
= memdup_user(user_msrs
->entries
, size
);
2625 if (IS_ERR(entries
)) {
2626 r
= PTR_ERR(entries
);
2630 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2635 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2646 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2651 case KVM_CAP_IRQCHIP
:
2653 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2654 case KVM_CAP_SET_TSS_ADDR
:
2655 case KVM_CAP_EXT_CPUID
:
2656 case KVM_CAP_EXT_EMUL_CPUID
:
2657 case KVM_CAP_CLOCKSOURCE
:
2659 case KVM_CAP_NOP_IO_DELAY
:
2660 case KVM_CAP_MP_STATE
:
2661 case KVM_CAP_SYNC_MMU
:
2662 case KVM_CAP_USER_NMI
:
2663 case KVM_CAP_REINJECT_CONTROL
:
2664 case KVM_CAP_IRQ_INJECT_STATUS
:
2665 case KVM_CAP_IOEVENTFD
:
2666 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2668 case KVM_CAP_PIT_STATE2
:
2669 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2670 case KVM_CAP_XEN_HVM
:
2671 case KVM_CAP_ADJUST_CLOCK
:
2672 case KVM_CAP_VCPU_EVENTS
:
2673 case KVM_CAP_HYPERV
:
2674 case KVM_CAP_HYPERV_VAPIC
:
2675 case KVM_CAP_HYPERV_SPIN
:
2676 case KVM_CAP_PCI_SEGMENT
:
2677 case KVM_CAP_DEBUGREGS
:
2678 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2680 case KVM_CAP_ASYNC_PF
:
2681 case KVM_CAP_GET_TSC_KHZ
:
2682 case KVM_CAP_KVMCLOCK_CTRL
:
2683 case KVM_CAP_READONLY_MEM
:
2684 case KVM_CAP_HYPERV_TIME
:
2685 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2686 case KVM_CAP_TSC_DEADLINE_TIMER
:
2687 case KVM_CAP_ENABLE_CAP_VM
:
2688 case KVM_CAP_DISABLE_QUIRKS
:
2689 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2690 case KVM_CAP_ASSIGN_DEV_IRQ
:
2691 case KVM_CAP_PCI_2_3
:
2695 case KVM_CAP_X86_SMM
:
2696 /* SMBASE is usually relocated above 1M on modern chipsets,
2697 * and SMM handlers might indeed rely on 4G segment limits,
2698 * so do not report SMM to be available if real mode is
2699 * emulated via vm86 mode. Still, do not go to great lengths
2700 * to avoid userspace's usage of the feature, because it is a
2701 * fringe case that is not enabled except via specific settings
2702 * of the module parameters.
2704 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2706 case KVM_CAP_COALESCED_MMIO
:
2707 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2710 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2712 case KVM_CAP_NR_VCPUS
:
2713 r
= KVM_SOFT_MAX_VCPUS
;
2715 case KVM_CAP_MAX_VCPUS
:
2718 case KVM_CAP_NR_MEMSLOTS
:
2719 r
= KVM_USER_MEM_SLOTS
;
2721 case KVM_CAP_PV_MMU
: /* obsolete */
2724 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2726 r
= iommu_present(&pci_bus_type
);
2730 r
= KVM_MAX_MCE_BANKS
;
2735 case KVM_CAP_TSC_CONTROL
:
2736 r
= kvm_has_tsc_control
;
2746 long kvm_arch_dev_ioctl(struct file
*filp
,
2747 unsigned int ioctl
, unsigned long arg
)
2749 void __user
*argp
= (void __user
*)arg
;
2753 case KVM_GET_MSR_INDEX_LIST
: {
2754 struct kvm_msr_list __user
*user_msr_list
= argp
;
2755 struct kvm_msr_list msr_list
;
2759 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2762 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2763 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2766 if (n
< msr_list
.nmsrs
)
2769 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2770 num_msrs_to_save
* sizeof(u32
)))
2772 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2774 num_emulated_msrs
* sizeof(u32
)))
2779 case KVM_GET_SUPPORTED_CPUID
:
2780 case KVM_GET_EMULATED_CPUID
: {
2781 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2782 struct kvm_cpuid2 cpuid
;
2785 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2788 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2794 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2799 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2802 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2804 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2816 static void wbinvd_ipi(void *garbage
)
2821 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2823 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2826 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2828 /* Address WBINVD may be executed by guest */
2829 if (need_emulate_wbinvd(vcpu
)) {
2830 if (kvm_x86_ops
->has_wbinvd_exit())
2831 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2832 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2833 smp_call_function_single(vcpu
->cpu
,
2834 wbinvd_ipi
, NULL
, 1);
2837 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2839 /* Apply any externally detected TSC adjustments (due to suspend) */
2840 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2841 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2842 vcpu
->arch
.tsc_offset_adjustment
= 0;
2843 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2846 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2847 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2848 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2850 mark_tsc_unstable("KVM discovered backwards TSC");
2851 if (check_tsc_unstable()) {
2852 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2853 vcpu
->arch
.last_guest_tsc
);
2854 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2855 vcpu
->arch
.tsc_catchup
= 1;
2858 * On a host with synchronized TSC, there is no need to update
2859 * kvmclock on vcpu->cpu migration
2861 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2862 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2863 if (vcpu
->cpu
!= cpu
)
2864 kvm_migrate_timers(vcpu
);
2868 accumulate_steal_time(vcpu
);
2869 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2872 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2874 kvm_x86_ops
->vcpu_put(vcpu
);
2875 kvm_put_guest_fpu(vcpu
);
2876 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2879 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2880 struct kvm_lapic_state
*s
)
2882 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2883 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2888 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2889 struct kvm_lapic_state
*s
)
2891 kvm_apic_post_state_restore(vcpu
, s
);
2892 update_cr8_intercept(vcpu
);
2897 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2898 struct kvm_interrupt
*irq
)
2900 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2902 if (irqchip_in_kernel(vcpu
->kvm
))
2905 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2906 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2911 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2913 kvm_inject_nmi(vcpu
);
2918 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2920 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2925 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2926 struct kvm_tpr_access_ctl
*tac
)
2930 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2934 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2938 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2941 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2943 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2946 vcpu
->arch
.mcg_cap
= mcg_cap
;
2947 /* Init IA32_MCG_CTL to all 1s */
2948 if (mcg_cap
& MCG_CTL_P
)
2949 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2950 /* Init IA32_MCi_CTL to all 1s */
2951 for (bank
= 0; bank
< bank_num
; bank
++)
2952 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2957 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2958 struct kvm_x86_mce
*mce
)
2960 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2961 unsigned bank_num
= mcg_cap
& 0xff;
2962 u64
*banks
= vcpu
->arch
.mce_banks
;
2964 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2967 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2968 * reporting is disabled
2970 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2971 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2973 banks
+= 4 * mce
->bank
;
2975 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2976 * reporting is disabled for the bank
2978 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2980 if (mce
->status
& MCI_STATUS_UC
) {
2981 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2982 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2983 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2986 if (banks
[1] & MCI_STATUS_VAL
)
2987 mce
->status
|= MCI_STATUS_OVER
;
2988 banks
[2] = mce
->addr
;
2989 banks
[3] = mce
->misc
;
2990 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2991 banks
[1] = mce
->status
;
2992 kvm_queue_exception(vcpu
, MC_VECTOR
);
2993 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2994 || !(banks
[1] & MCI_STATUS_UC
)) {
2995 if (banks
[1] & MCI_STATUS_VAL
)
2996 mce
->status
|= MCI_STATUS_OVER
;
2997 banks
[2] = mce
->addr
;
2998 banks
[3] = mce
->misc
;
2999 banks
[1] = mce
->status
;
3001 banks
[1] |= MCI_STATUS_OVER
;
3005 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3006 struct kvm_vcpu_events
*events
)
3009 events
->exception
.injected
=
3010 vcpu
->arch
.exception
.pending
&&
3011 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3012 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3013 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3014 events
->exception
.pad
= 0;
3015 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3017 events
->interrupt
.injected
=
3018 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3019 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3020 events
->interrupt
.soft
= 0;
3021 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3023 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3024 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3025 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3026 events
->nmi
.pad
= 0;
3028 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3030 events
->smi
.smm
= is_smm(vcpu
);
3031 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3032 events
->smi
.smm_inside_nmi
=
3033 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3034 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3036 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3037 | KVM_VCPUEVENT_VALID_SHADOW
3038 | KVM_VCPUEVENT_VALID_SMM
);
3039 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3042 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3043 struct kvm_vcpu_events
*events
)
3045 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3046 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3047 | KVM_VCPUEVENT_VALID_SHADOW
3048 | KVM_VCPUEVENT_VALID_SMM
))
3052 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3053 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3054 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3055 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3057 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3058 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3059 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3060 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3061 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3062 events
->interrupt
.shadow
);
3064 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3065 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3066 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3067 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3069 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3070 kvm_vcpu_has_lapic(vcpu
))
3071 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3073 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3074 if (events
->smi
.smm
)
3075 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
3077 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
3078 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3079 if (events
->smi
.smm_inside_nmi
)
3080 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3082 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3083 if (kvm_vcpu_has_lapic(vcpu
)) {
3084 if (events
->smi
.latched_init
)
3085 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3087 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3091 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3096 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3097 struct kvm_debugregs
*dbgregs
)
3101 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3102 kvm_get_dr(vcpu
, 6, &val
);
3104 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3106 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3109 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3110 struct kvm_debugregs
*dbgregs
)
3115 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3116 kvm_update_dr0123(vcpu
);
3117 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3118 kvm_update_dr6(vcpu
);
3119 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3120 kvm_update_dr7(vcpu
);
3125 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3127 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3129 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3130 u64 xstate_bv
= xsave
->xsave_hdr
.xstate_bv
;
3134 * Copy legacy XSAVE area, to avoid complications with CPUID
3135 * leaves 0 and 1 in the loop below.
3137 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3140 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3143 * Copy each region from the possibly compacted offset to the
3144 * non-compacted offset.
3146 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3148 u64 feature
= valid
& -valid
;
3149 int index
= fls64(feature
) - 1;
3150 void *src
= get_xsave_addr(xsave
, feature
);
3153 u32 size
, offset
, ecx
, edx
;
3154 cpuid_count(XSTATE_CPUID
, index
,
3155 &size
, &offset
, &ecx
, &edx
);
3156 memcpy(dest
+ offset
, src
, size
);
3163 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3165 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3166 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3170 * Copy legacy XSAVE area, to avoid complications with CPUID
3171 * leaves 0 and 1 in the loop below.
3173 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3175 /* Set XSTATE_BV and possibly XCOMP_BV. */
3176 xsave
->xsave_hdr
.xstate_bv
= xstate_bv
;
3178 xsave
->xsave_hdr
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3181 * Copy each region from the non-compacted offset to the
3182 * possibly compacted offset.
3184 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3186 u64 feature
= valid
& -valid
;
3187 int index
= fls64(feature
) - 1;
3188 void *dest
= get_xsave_addr(xsave
, feature
);
3191 u32 size
, offset
, ecx
, edx
;
3192 cpuid_count(XSTATE_CPUID
, index
,
3193 &size
, &offset
, &ecx
, &edx
);
3194 memcpy(dest
, src
+ offset
, size
);
3202 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3203 struct kvm_xsave
*guest_xsave
)
3205 if (cpu_has_xsave
) {
3206 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3207 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3209 memcpy(guest_xsave
->region
,
3210 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3211 sizeof(struct i387_fxsave_struct
));
3212 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3217 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3218 struct kvm_xsave
*guest_xsave
)
3221 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3223 if (cpu_has_xsave
) {
3225 * Here we allow setting states that are not present in
3226 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3227 * with old userspace.
3229 if (xstate_bv
& ~kvm_supported_xcr0())
3231 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3233 if (xstate_bv
& ~XSTATE_FPSSE
)
3235 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3236 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3241 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3242 struct kvm_xcrs
*guest_xcrs
)
3244 if (!cpu_has_xsave
) {
3245 guest_xcrs
->nr_xcrs
= 0;
3249 guest_xcrs
->nr_xcrs
= 1;
3250 guest_xcrs
->flags
= 0;
3251 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3252 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3255 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3256 struct kvm_xcrs
*guest_xcrs
)
3263 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3266 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3267 /* Only support XCR0 currently */
3268 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3269 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3270 guest_xcrs
->xcrs
[i
].value
);
3279 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3280 * stopped by the hypervisor. This function will be called from the host only.
3281 * EINVAL is returned when the host attempts to set the flag for a guest that
3282 * does not support pv clocks.
3284 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3286 if (!vcpu
->arch
.pv_time_enabled
)
3288 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3289 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3293 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3294 unsigned int ioctl
, unsigned long arg
)
3296 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3297 void __user
*argp
= (void __user
*)arg
;
3300 struct kvm_lapic_state
*lapic
;
3301 struct kvm_xsave
*xsave
;
3302 struct kvm_xcrs
*xcrs
;
3308 case KVM_GET_LAPIC
: {
3310 if (!vcpu
->arch
.apic
)
3312 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3317 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3321 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3326 case KVM_SET_LAPIC
: {
3328 if (!vcpu
->arch
.apic
)
3330 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3331 if (IS_ERR(u
.lapic
))
3332 return PTR_ERR(u
.lapic
);
3334 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3337 case KVM_INTERRUPT
: {
3338 struct kvm_interrupt irq
;
3341 if (copy_from_user(&irq
, argp
, sizeof irq
))
3343 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3347 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3351 r
= kvm_vcpu_ioctl_smi(vcpu
);
3354 case KVM_SET_CPUID
: {
3355 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3356 struct kvm_cpuid cpuid
;
3359 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3361 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3364 case KVM_SET_CPUID2
: {
3365 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3366 struct kvm_cpuid2 cpuid
;
3369 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3371 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3372 cpuid_arg
->entries
);
3375 case KVM_GET_CPUID2
: {
3376 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3377 struct kvm_cpuid2 cpuid
;
3380 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3382 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3383 cpuid_arg
->entries
);
3387 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3393 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3396 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3398 case KVM_TPR_ACCESS_REPORTING
: {
3399 struct kvm_tpr_access_ctl tac
;
3402 if (copy_from_user(&tac
, argp
, sizeof tac
))
3404 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3408 if (copy_to_user(argp
, &tac
, sizeof tac
))
3413 case KVM_SET_VAPIC_ADDR
: {
3414 struct kvm_vapic_addr va
;
3417 if (!irqchip_in_kernel(vcpu
->kvm
))
3420 if (copy_from_user(&va
, argp
, sizeof va
))
3422 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3425 case KVM_X86_SETUP_MCE
: {
3429 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3431 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3434 case KVM_X86_SET_MCE
: {
3435 struct kvm_x86_mce mce
;
3438 if (copy_from_user(&mce
, argp
, sizeof mce
))
3440 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3443 case KVM_GET_VCPU_EVENTS
: {
3444 struct kvm_vcpu_events events
;
3446 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3449 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3454 case KVM_SET_VCPU_EVENTS
: {
3455 struct kvm_vcpu_events events
;
3458 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3461 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3464 case KVM_GET_DEBUGREGS
: {
3465 struct kvm_debugregs dbgregs
;
3467 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3470 if (copy_to_user(argp
, &dbgregs
,
3471 sizeof(struct kvm_debugregs
)))
3476 case KVM_SET_DEBUGREGS
: {
3477 struct kvm_debugregs dbgregs
;
3480 if (copy_from_user(&dbgregs
, argp
,
3481 sizeof(struct kvm_debugregs
)))
3484 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3487 case KVM_GET_XSAVE
: {
3488 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3493 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3496 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3501 case KVM_SET_XSAVE
: {
3502 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3503 if (IS_ERR(u
.xsave
))
3504 return PTR_ERR(u
.xsave
);
3506 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3509 case KVM_GET_XCRS
: {
3510 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3515 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3518 if (copy_to_user(argp
, u
.xcrs
,
3519 sizeof(struct kvm_xcrs
)))
3524 case KVM_SET_XCRS
: {
3525 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3527 return PTR_ERR(u
.xcrs
);
3529 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3532 case KVM_SET_TSC_KHZ
: {
3536 user_tsc_khz
= (u32
)arg
;
3538 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3541 if (user_tsc_khz
== 0)
3542 user_tsc_khz
= tsc_khz
;
3544 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3549 case KVM_GET_TSC_KHZ
: {
3550 r
= vcpu
->arch
.virtual_tsc_khz
;
3553 case KVM_KVMCLOCK_CTRL
: {
3554 r
= kvm_set_guest_paused(vcpu
);
3565 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3567 return VM_FAULT_SIGBUS
;
3570 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3574 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3576 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3580 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3583 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3587 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3588 u32 kvm_nr_mmu_pages
)
3590 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3593 mutex_lock(&kvm
->slots_lock
);
3595 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3596 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3598 mutex_unlock(&kvm
->slots_lock
);
3602 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3604 return kvm
->arch
.n_max_mmu_pages
;
3607 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3612 switch (chip
->chip_id
) {
3613 case KVM_IRQCHIP_PIC_MASTER
:
3614 memcpy(&chip
->chip
.pic
,
3615 &pic_irqchip(kvm
)->pics
[0],
3616 sizeof(struct kvm_pic_state
));
3618 case KVM_IRQCHIP_PIC_SLAVE
:
3619 memcpy(&chip
->chip
.pic
,
3620 &pic_irqchip(kvm
)->pics
[1],
3621 sizeof(struct kvm_pic_state
));
3623 case KVM_IRQCHIP_IOAPIC
:
3624 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3633 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3638 switch (chip
->chip_id
) {
3639 case KVM_IRQCHIP_PIC_MASTER
:
3640 spin_lock(&pic_irqchip(kvm
)->lock
);
3641 memcpy(&pic_irqchip(kvm
)->pics
[0],
3643 sizeof(struct kvm_pic_state
));
3644 spin_unlock(&pic_irqchip(kvm
)->lock
);
3646 case KVM_IRQCHIP_PIC_SLAVE
:
3647 spin_lock(&pic_irqchip(kvm
)->lock
);
3648 memcpy(&pic_irqchip(kvm
)->pics
[1],
3650 sizeof(struct kvm_pic_state
));
3651 spin_unlock(&pic_irqchip(kvm
)->lock
);
3653 case KVM_IRQCHIP_IOAPIC
:
3654 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3660 kvm_pic_update_irq(pic_irqchip(kvm
));
3664 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3668 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3669 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3670 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3674 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3678 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3679 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3680 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3681 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3685 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3689 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3690 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3691 sizeof(ps
->channels
));
3692 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3693 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3694 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3698 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3700 int r
= 0, start
= 0;
3701 u32 prev_legacy
, cur_legacy
;
3702 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3703 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3704 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3705 if (!prev_legacy
&& cur_legacy
)
3707 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3708 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3709 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3710 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3711 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3715 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3716 struct kvm_reinject_control
*control
)
3718 if (!kvm
->arch
.vpit
)
3720 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3721 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3722 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3727 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3728 * @kvm: kvm instance
3729 * @log: slot id and address to which we copy the log
3731 * Steps 1-4 below provide general overview of dirty page logging. See
3732 * kvm_get_dirty_log_protect() function description for additional details.
3734 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3735 * always flush the TLB (step 4) even if previous step failed and the dirty
3736 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3737 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3738 * writes will be marked dirty for next log read.
3740 * 1. Take a snapshot of the bit and clear it if needed.
3741 * 2. Write protect the corresponding page.
3742 * 3. Copy the snapshot to the userspace.
3743 * 4. Flush TLB's if needed.
3745 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3747 bool is_dirty
= false;
3750 mutex_lock(&kvm
->slots_lock
);
3753 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3755 if (kvm_x86_ops
->flush_log_dirty
)
3756 kvm_x86_ops
->flush_log_dirty(kvm
);
3758 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3761 * All the TLBs can be flushed out of mmu lock, see the comments in
3762 * kvm_mmu_slot_remove_write_access().
3764 lockdep_assert_held(&kvm
->slots_lock
);
3766 kvm_flush_remote_tlbs(kvm
);
3768 mutex_unlock(&kvm
->slots_lock
);
3772 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3775 if (!irqchip_in_kernel(kvm
))
3778 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3779 irq_event
->irq
, irq_event
->level
,
3784 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3785 struct kvm_enable_cap
*cap
)
3793 case KVM_CAP_DISABLE_QUIRKS
:
3794 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3804 long kvm_arch_vm_ioctl(struct file
*filp
,
3805 unsigned int ioctl
, unsigned long arg
)
3807 struct kvm
*kvm
= filp
->private_data
;
3808 void __user
*argp
= (void __user
*)arg
;
3811 * This union makes it completely explicit to gcc-3.x
3812 * that these two variables' stack usage should be
3813 * combined, not added together.
3816 struct kvm_pit_state ps
;
3817 struct kvm_pit_state2 ps2
;
3818 struct kvm_pit_config pit_config
;
3822 case KVM_SET_TSS_ADDR
:
3823 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3825 case KVM_SET_IDENTITY_MAP_ADDR
: {
3829 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3831 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3834 case KVM_SET_NR_MMU_PAGES
:
3835 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3837 case KVM_GET_NR_MMU_PAGES
:
3838 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3840 case KVM_CREATE_IRQCHIP
: {
3841 struct kvm_pic
*vpic
;
3843 mutex_lock(&kvm
->lock
);
3846 goto create_irqchip_unlock
;
3848 if (atomic_read(&kvm
->online_vcpus
))
3849 goto create_irqchip_unlock
;
3851 vpic
= kvm_create_pic(kvm
);
3853 r
= kvm_ioapic_init(kvm
);
3855 mutex_lock(&kvm
->slots_lock
);
3856 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3858 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3860 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3862 mutex_unlock(&kvm
->slots_lock
);
3864 goto create_irqchip_unlock
;
3867 goto create_irqchip_unlock
;
3869 kvm
->arch
.vpic
= vpic
;
3871 r
= kvm_setup_default_irq_routing(kvm
);
3873 mutex_lock(&kvm
->slots_lock
);
3874 mutex_lock(&kvm
->irq_lock
);
3875 kvm_ioapic_destroy(kvm
);
3876 kvm_destroy_pic(kvm
);
3877 mutex_unlock(&kvm
->irq_lock
);
3878 mutex_unlock(&kvm
->slots_lock
);
3880 create_irqchip_unlock
:
3881 mutex_unlock(&kvm
->lock
);
3884 case KVM_CREATE_PIT
:
3885 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3887 case KVM_CREATE_PIT2
:
3889 if (copy_from_user(&u
.pit_config
, argp
,
3890 sizeof(struct kvm_pit_config
)))
3893 mutex_lock(&kvm
->slots_lock
);
3896 goto create_pit_unlock
;
3898 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3902 mutex_unlock(&kvm
->slots_lock
);
3904 case KVM_GET_IRQCHIP
: {
3905 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3906 struct kvm_irqchip
*chip
;
3908 chip
= memdup_user(argp
, sizeof(*chip
));
3915 if (!irqchip_in_kernel(kvm
))
3916 goto get_irqchip_out
;
3917 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3919 goto get_irqchip_out
;
3921 if (copy_to_user(argp
, chip
, sizeof *chip
))
3922 goto get_irqchip_out
;
3928 case KVM_SET_IRQCHIP
: {
3929 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3930 struct kvm_irqchip
*chip
;
3932 chip
= memdup_user(argp
, sizeof(*chip
));
3939 if (!irqchip_in_kernel(kvm
))
3940 goto set_irqchip_out
;
3941 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3943 goto set_irqchip_out
;
3951 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3954 if (!kvm
->arch
.vpit
)
3956 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3960 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3967 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3970 if (!kvm
->arch
.vpit
)
3972 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3975 case KVM_GET_PIT2
: {
3977 if (!kvm
->arch
.vpit
)
3979 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3983 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3988 case KVM_SET_PIT2
: {
3990 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3993 if (!kvm
->arch
.vpit
)
3995 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3998 case KVM_REINJECT_CONTROL
: {
3999 struct kvm_reinject_control control
;
4001 if (copy_from_user(&control
, argp
, sizeof(control
)))
4003 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4006 case KVM_XEN_HVM_CONFIG
: {
4008 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4009 sizeof(struct kvm_xen_hvm_config
)))
4012 if (kvm
->arch
.xen_hvm_config
.flags
)
4017 case KVM_SET_CLOCK
: {
4018 struct kvm_clock_data user_ns
;
4023 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4031 local_irq_disable();
4032 now_ns
= get_kernel_ns();
4033 delta
= user_ns
.clock
- now_ns
;
4035 kvm
->arch
.kvmclock_offset
= delta
;
4036 kvm_gen_update_masterclock(kvm
);
4039 case KVM_GET_CLOCK
: {
4040 struct kvm_clock_data user_ns
;
4043 local_irq_disable();
4044 now_ns
= get_kernel_ns();
4045 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
4048 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4051 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4056 case KVM_ENABLE_CAP
: {
4057 struct kvm_enable_cap cap
;
4060 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4062 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4066 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4072 static void kvm_init_msr_list(void)
4077 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4078 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4082 * Even MSRs that are valid in the host may not be exposed
4083 * to the guests in some cases. We could work around this
4084 * in VMX with the generic MSR save/load machinery, but it
4085 * is not really worthwhile since it will really only
4086 * happen with nested virtualization.
4088 switch (msrs_to_save
[i
]) {
4089 case MSR_IA32_BNDCFGS
:
4090 if (!kvm_x86_ops
->mpx_supported())
4098 msrs_to_save
[j
] = msrs_to_save
[i
];
4101 num_msrs_to_save
= j
;
4103 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4104 switch (emulated_msrs
[i
]) {
4105 case MSR_IA32_SMBASE
:
4106 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4114 emulated_msrs
[j
] = emulated_msrs
[i
];
4117 num_emulated_msrs
= j
;
4120 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4128 if (!(vcpu
->arch
.apic
&&
4129 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4130 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4141 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4148 if (!(vcpu
->arch
.apic
&&
4149 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4151 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4153 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4163 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4164 struct kvm_segment
*var
, int seg
)
4166 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4169 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4170 struct kvm_segment
*var
, int seg
)
4172 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4175 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4176 struct x86_exception
*exception
)
4180 BUG_ON(!mmu_is_nested(vcpu
));
4182 /* NPT walks are always user-walks */
4183 access
|= PFERR_USER_MASK
;
4184 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4189 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4190 struct x86_exception
*exception
)
4192 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4193 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4196 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4197 struct x86_exception
*exception
)
4199 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4200 access
|= PFERR_FETCH_MASK
;
4201 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4204 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4205 struct x86_exception
*exception
)
4207 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4208 access
|= PFERR_WRITE_MASK
;
4209 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4212 /* uses this to access any guest's mapped memory without checking CPL */
4213 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4214 struct x86_exception
*exception
)
4216 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4219 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4220 struct kvm_vcpu
*vcpu
, u32 access
,
4221 struct x86_exception
*exception
)
4224 int r
= X86EMUL_CONTINUE
;
4227 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4229 unsigned offset
= addr
& (PAGE_SIZE
-1);
4230 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4233 if (gpa
== UNMAPPED_GVA
)
4234 return X86EMUL_PROPAGATE_FAULT
;
4235 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4238 r
= X86EMUL_IO_NEEDED
;
4250 /* used for instruction fetching */
4251 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4252 gva_t addr
, void *val
, unsigned int bytes
,
4253 struct x86_exception
*exception
)
4255 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4256 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4260 /* Inline kvm_read_guest_virt_helper for speed. */
4261 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4263 if (unlikely(gpa
== UNMAPPED_GVA
))
4264 return X86EMUL_PROPAGATE_FAULT
;
4266 offset
= addr
& (PAGE_SIZE
-1);
4267 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4268 bytes
= (unsigned)PAGE_SIZE
- offset
;
4269 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4271 if (unlikely(ret
< 0))
4272 return X86EMUL_IO_NEEDED
;
4274 return X86EMUL_CONTINUE
;
4277 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4278 gva_t addr
, void *val
, unsigned int bytes
,
4279 struct x86_exception
*exception
)
4281 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4282 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4284 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4287 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4289 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4290 gva_t addr
, void *val
, unsigned int bytes
,
4291 struct x86_exception
*exception
)
4293 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4294 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4297 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4298 gva_t addr
, void *val
,
4300 struct x86_exception
*exception
)
4302 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4304 int r
= X86EMUL_CONTINUE
;
4307 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4310 unsigned offset
= addr
& (PAGE_SIZE
-1);
4311 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4314 if (gpa
== UNMAPPED_GVA
)
4315 return X86EMUL_PROPAGATE_FAULT
;
4316 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4318 r
= X86EMUL_IO_NEEDED
;
4329 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4331 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4332 gpa_t
*gpa
, struct x86_exception
*exception
,
4335 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4336 | (write
? PFERR_WRITE_MASK
: 0);
4338 if (vcpu_match_mmio_gva(vcpu
, gva
)
4339 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4340 vcpu
->arch
.access
, access
)) {
4341 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4342 (gva
& (PAGE_SIZE
- 1));
4343 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4347 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4349 if (*gpa
== UNMAPPED_GVA
)
4352 /* For APIC access vmexit */
4353 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4356 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4357 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4364 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4365 const void *val
, int bytes
)
4369 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4372 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4376 struct read_write_emulator_ops
{
4377 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4379 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4380 void *val
, int bytes
);
4381 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4382 int bytes
, void *val
);
4383 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4384 void *val
, int bytes
);
4388 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4390 if (vcpu
->mmio_read_completed
) {
4391 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4392 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4393 vcpu
->mmio_read_completed
= 0;
4400 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4401 void *val
, int bytes
)
4403 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4406 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4407 void *val
, int bytes
)
4409 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4412 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4414 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4415 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4418 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4419 void *val
, int bytes
)
4421 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4422 return X86EMUL_IO_NEEDED
;
4425 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4426 void *val
, int bytes
)
4428 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4430 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4431 return X86EMUL_CONTINUE
;
4434 static const struct read_write_emulator_ops read_emultor
= {
4435 .read_write_prepare
= read_prepare
,
4436 .read_write_emulate
= read_emulate
,
4437 .read_write_mmio
= vcpu_mmio_read
,
4438 .read_write_exit_mmio
= read_exit_mmio
,
4441 static const struct read_write_emulator_ops write_emultor
= {
4442 .read_write_emulate
= write_emulate
,
4443 .read_write_mmio
= write_mmio
,
4444 .read_write_exit_mmio
= write_exit_mmio
,
4448 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4450 struct x86_exception
*exception
,
4451 struct kvm_vcpu
*vcpu
,
4452 const struct read_write_emulator_ops
*ops
)
4456 bool write
= ops
->write
;
4457 struct kvm_mmio_fragment
*frag
;
4459 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4462 return X86EMUL_PROPAGATE_FAULT
;
4464 /* For APIC access vmexit */
4468 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4469 return X86EMUL_CONTINUE
;
4473 * Is this MMIO handled locally?
4475 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4476 if (handled
== bytes
)
4477 return X86EMUL_CONTINUE
;
4483 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4484 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4488 return X86EMUL_CONTINUE
;
4491 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4493 void *val
, unsigned int bytes
,
4494 struct x86_exception
*exception
,
4495 const struct read_write_emulator_ops
*ops
)
4497 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4501 if (ops
->read_write_prepare
&&
4502 ops
->read_write_prepare(vcpu
, val
, bytes
))
4503 return X86EMUL_CONTINUE
;
4505 vcpu
->mmio_nr_fragments
= 0;
4507 /* Crossing a page boundary? */
4508 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4511 now
= -addr
& ~PAGE_MASK
;
4512 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4515 if (rc
!= X86EMUL_CONTINUE
)
4518 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4524 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4526 if (rc
!= X86EMUL_CONTINUE
)
4529 if (!vcpu
->mmio_nr_fragments
)
4532 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4534 vcpu
->mmio_needed
= 1;
4535 vcpu
->mmio_cur_fragment
= 0;
4537 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4538 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4539 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4540 vcpu
->run
->mmio
.phys_addr
= gpa
;
4542 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4545 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4549 struct x86_exception
*exception
)
4551 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4552 exception
, &read_emultor
);
4555 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4559 struct x86_exception
*exception
)
4561 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4562 exception
, &write_emultor
);
4565 #define CMPXCHG_TYPE(t, ptr, old, new) \
4566 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4568 #ifdef CONFIG_X86_64
4569 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4571 # define CMPXCHG64(ptr, old, new) \
4572 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4575 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4580 struct x86_exception
*exception
)
4582 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4588 /* guests cmpxchg8b have to be emulated atomically */
4589 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4592 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4594 if (gpa
== UNMAPPED_GVA
||
4595 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4598 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4601 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4602 if (is_error_page(page
))
4605 kaddr
= kmap_atomic(page
);
4606 kaddr
+= offset_in_page(gpa
);
4609 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4612 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4615 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4618 exchanged
= CMPXCHG64(kaddr
, old
, new);
4623 kunmap_atomic(kaddr
);
4624 kvm_release_page_dirty(page
);
4627 return X86EMUL_CMPXCHG_FAILED
;
4629 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4630 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4632 return X86EMUL_CONTINUE
;
4635 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4637 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4640 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4642 /* TODO: String I/O for in kernel device */
4645 if (vcpu
->arch
.pio
.in
)
4646 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4647 vcpu
->arch
.pio
.size
, pd
);
4649 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4650 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4655 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4656 unsigned short port
, void *val
,
4657 unsigned int count
, bool in
)
4659 vcpu
->arch
.pio
.port
= port
;
4660 vcpu
->arch
.pio
.in
= in
;
4661 vcpu
->arch
.pio
.count
= count
;
4662 vcpu
->arch
.pio
.size
= size
;
4664 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4665 vcpu
->arch
.pio
.count
= 0;
4669 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4670 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4671 vcpu
->run
->io
.size
= size
;
4672 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4673 vcpu
->run
->io
.count
= count
;
4674 vcpu
->run
->io
.port
= port
;
4679 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4680 int size
, unsigned short port
, void *val
,
4683 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4686 if (vcpu
->arch
.pio
.count
)
4689 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4692 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4693 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4694 vcpu
->arch
.pio
.count
= 0;
4701 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4702 int size
, unsigned short port
,
4703 const void *val
, unsigned int count
)
4705 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4707 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4708 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4709 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4712 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4714 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4717 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4719 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4722 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4724 if (!need_emulate_wbinvd(vcpu
))
4725 return X86EMUL_CONTINUE
;
4727 if (kvm_x86_ops
->has_wbinvd_exit()) {
4728 int cpu
= get_cpu();
4730 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4731 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4732 wbinvd_ipi
, NULL
, 1);
4734 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4737 return X86EMUL_CONTINUE
;
4740 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4742 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4743 return kvm_emulate_wbinvd_noskip(vcpu
);
4745 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4749 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4751 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4754 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4755 unsigned long *dest
)
4757 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4760 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4761 unsigned long value
)
4764 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4767 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4769 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4772 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4774 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4775 unsigned long value
;
4779 value
= kvm_read_cr0(vcpu
);
4782 value
= vcpu
->arch
.cr2
;
4785 value
= kvm_read_cr3(vcpu
);
4788 value
= kvm_read_cr4(vcpu
);
4791 value
= kvm_get_cr8(vcpu
);
4794 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4801 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4803 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4808 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4811 vcpu
->arch
.cr2
= val
;
4814 res
= kvm_set_cr3(vcpu
, val
);
4817 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4820 res
= kvm_set_cr8(vcpu
, val
);
4823 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4830 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4832 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4835 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4837 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4840 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4842 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4845 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4847 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4850 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4852 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4855 static unsigned long emulator_get_cached_segment_base(
4856 struct x86_emulate_ctxt
*ctxt
, int seg
)
4858 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4861 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4862 struct desc_struct
*desc
, u32
*base3
,
4865 struct kvm_segment var
;
4867 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4868 *selector
= var
.selector
;
4871 memset(desc
, 0, sizeof(*desc
));
4877 set_desc_limit(desc
, var
.limit
);
4878 set_desc_base(desc
, (unsigned long)var
.base
);
4879 #ifdef CONFIG_X86_64
4881 *base3
= var
.base
>> 32;
4883 desc
->type
= var
.type
;
4885 desc
->dpl
= var
.dpl
;
4886 desc
->p
= var
.present
;
4887 desc
->avl
= var
.avl
;
4895 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4896 struct desc_struct
*desc
, u32 base3
,
4899 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4900 struct kvm_segment var
;
4902 var
.selector
= selector
;
4903 var
.base
= get_desc_base(desc
);
4904 #ifdef CONFIG_X86_64
4905 var
.base
|= ((u64
)base3
) << 32;
4907 var
.limit
= get_desc_limit(desc
);
4909 var
.limit
= (var
.limit
<< 12) | 0xfff;
4910 var
.type
= desc
->type
;
4911 var
.dpl
= desc
->dpl
;
4916 var
.avl
= desc
->avl
;
4917 var
.present
= desc
->p
;
4918 var
.unusable
= !var
.present
;
4921 kvm_set_segment(vcpu
, &var
, seg
);
4925 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4926 u32 msr_index
, u64
*pdata
)
4928 struct msr_data msr
;
4931 msr
.index
= msr_index
;
4932 msr
.host_initiated
= false;
4933 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
4941 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4942 u32 msr_index
, u64 data
)
4944 struct msr_data msr
;
4947 msr
.index
= msr_index
;
4948 msr
.host_initiated
= false;
4949 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4952 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
4954 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4956 return vcpu
->arch
.smbase
;
4959 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
4961 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4963 vcpu
->arch
.smbase
= smbase
;
4966 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4969 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
4972 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4973 u32 pmc
, u64
*pdata
)
4975 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4978 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4980 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4983 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4986 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4988 * CR0.TS may reference the host fpu state, not the guest fpu state,
4989 * so it may be clear at this point.
4994 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4999 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5000 struct x86_instruction_info
*info
,
5001 enum x86_intercept_stage stage
)
5003 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5006 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5007 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5009 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5012 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5014 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5017 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5019 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5022 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5024 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5027 static const struct x86_emulate_ops emulate_ops
= {
5028 .read_gpr
= emulator_read_gpr
,
5029 .write_gpr
= emulator_write_gpr
,
5030 .read_std
= kvm_read_guest_virt_system
,
5031 .write_std
= kvm_write_guest_virt_system
,
5032 .fetch
= kvm_fetch_guest_virt
,
5033 .read_emulated
= emulator_read_emulated
,
5034 .write_emulated
= emulator_write_emulated
,
5035 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5036 .invlpg
= emulator_invlpg
,
5037 .pio_in_emulated
= emulator_pio_in_emulated
,
5038 .pio_out_emulated
= emulator_pio_out_emulated
,
5039 .get_segment
= emulator_get_segment
,
5040 .set_segment
= emulator_set_segment
,
5041 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5042 .get_gdt
= emulator_get_gdt
,
5043 .get_idt
= emulator_get_idt
,
5044 .set_gdt
= emulator_set_gdt
,
5045 .set_idt
= emulator_set_idt
,
5046 .get_cr
= emulator_get_cr
,
5047 .set_cr
= emulator_set_cr
,
5048 .cpl
= emulator_get_cpl
,
5049 .get_dr
= emulator_get_dr
,
5050 .set_dr
= emulator_set_dr
,
5051 .get_smbase
= emulator_get_smbase
,
5052 .set_smbase
= emulator_set_smbase
,
5053 .set_msr
= emulator_set_msr
,
5054 .get_msr
= emulator_get_msr
,
5055 .check_pmc
= emulator_check_pmc
,
5056 .read_pmc
= emulator_read_pmc
,
5057 .halt
= emulator_halt
,
5058 .wbinvd
= emulator_wbinvd
,
5059 .fix_hypercall
= emulator_fix_hypercall
,
5060 .get_fpu
= emulator_get_fpu
,
5061 .put_fpu
= emulator_put_fpu
,
5062 .intercept
= emulator_intercept
,
5063 .get_cpuid
= emulator_get_cpuid
,
5064 .set_nmi_mask
= emulator_set_nmi_mask
,
5067 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5069 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5071 * an sti; sti; sequence only disable interrupts for the first
5072 * instruction. So, if the last instruction, be it emulated or
5073 * not, left the system with the INT_STI flag enabled, it
5074 * means that the last instruction is an sti. We should not
5075 * leave the flag on in this case. The same goes for mov ss
5077 if (int_shadow
& mask
)
5079 if (unlikely(int_shadow
|| mask
)) {
5080 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5082 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5086 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5088 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5089 if (ctxt
->exception
.vector
== PF_VECTOR
)
5090 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5092 if (ctxt
->exception
.error_code_valid
)
5093 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5094 ctxt
->exception
.error_code
);
5096 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5100 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5102 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5105 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5107 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5108 ctxt
->eip
= kvm_rip_read(vcpu
);
5109 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5110 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5111 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5112 cs_db
? X86EMUL_MODE_PROT32
:
5113 X86EMUL_MODE_PROT16
;
5114 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5115 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5116 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5117 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5119 init_decode_cache(ctxt
);
5120 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5123 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5125 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5128 init_emulate_ctxt(vcpu
);
5132 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5133 ret
= emulate_int_real(ctxt
, irq
);
5135 if (ret
!= X86EMUL_CONTINUE
)
5136 return EMULATE_FAIL
;
5138 ctxt
->eip
= ctxt
->_eip
;
5139 kvm_rip_write(vcpu
, ctxt
->eip
);
5140 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5142 if (irq
== NMI_VECTOR
)
5143 vcpu
->arch
.nmi_pending
= 0;
5145 vcpu
->arch
.interrupt
.pending
= false;
5147 return EMULATE_DONE
;
5149 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5151 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5153 int r
= EMULATE_DONE
;
5155 ++vcpu
->stat
.insn_emulation_fail
;
5156 trace_kvm_emulate_insn_failed(vcpu
);
5157 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5158 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5159 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5160 vcpu
->run
->internal
.ndata
= 0;
5163 kvm_queue_exception(vcpu
, UD_VECTOR
);
5168 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5169 bool write_fault_to_shadow_pgtable
,
5175 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5178 if (!vcpu
->arch
.mmu
.direct_map
) {
5180 * Write permission should be allowed since only
5181 * write access need to be emulated.
5183 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5186 * If the mapping is invalid in guest, let cpu retry
5187 * it to generate fault.
5189 if (gpa
== UNMAPPED_GVA
)
5194 * Do not retry the unhandleable instruction if it faults on the
5195 * readonly host memory, otherwise it will goto a infinite loop:
5196 * retry instruction -> write #PF -> emulation fail -> retry
5197 * instruction -> ...
5199 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5202 * If the instruction failed on the error pfn, it can not be fixed,
5203 * report the error to userspace.
5205 if (is_error_noslot_pfn(pfn
))
5208 kvm_release_pfn_clean(pfn
);
5210 /* The instructions are well-emulated on direct mmu. */
5211 if (vcpu
->arch
.mmu
.direct_map
) {
5212 unsigned int indirect_shadow_pages
;
5214 spin_lock(&vcpu
->kvm
->mmu_lock
);
5215 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5216 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5218 if (indirect_shadow_pages
)
5219 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5225 * if emulation was due to access to shadowed page table
5226 * and it failed try to unshadow page and re-enter the
5227 * guest to let CPU execute the instruction.
5229 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5232 * If the access faults on its page table, it can not
5233 * be fixed by unprotecting shadow page and it should
5234 * be reported to userspace.
5236 return !write_fault_to_shadow_pgtable
;
5239 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5240 unsigned long cr2
, int emulation_type
)
5242 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5243 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5245 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5246 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5249 * If the emulation is caused by #PF and it is non-page_table
5250 * writing instruction, it means the VM-EXIT is caused by shadow
5251 * page protected, we can zap the shadow page and retry this
5252 * instruction directly.
5254 * Note: if the guest uses a non-page-table modifying instruction
5255 * on the PDE that points to the instruction, then we will unmap
5256 * the instruction and go to an infinite loop. So, we cache the
5257 * last retried eip and the last fault address, if we meet the eip
5258 * and the address again, we can break out of the potential infinite
5261 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5263 if (!(emulation_type
& EMULTYPE_RETRY
))
5266 if (x86_page_table_writing_insn(ctxt
))
5269 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5272 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5273 vcpu
->arch
.last_retry_addr
= cr2
;
5275 if (!vcpu
->arch
.mmu
.direct_map
)
5276 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5278 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5283 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5284 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5286 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5288 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5289 /* This is a good place to trace that we are exiting SMM. */
5290 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5292 if (unlikely(vcpu
->arch
.smi_pending
)) {
5293 kvm_make_request(KVM_REQ_SMI
, vcpu
);
5294 vcpu
->arch
.smi_pending
= 0;
5296 /* Process a latched INIT, if any. */
5297 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5301 kvm_mmu_reset_context(vcpu
);
5304 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5306 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5308 vcpu
->arch
.hflags
= emul_flags
;
5310 if (changed
& HF_SMM_MASK
)
5311 kvm_smm_changed(vcpu
);
5314 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5323 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5324 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5329 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5331 struct kvm_run
*kvm_run
= vcpu
->run
;
5334 * rflags is the old, "raw" value of the flags. The new value has
5335 * not been saved yet.
5337 * This is correct even for TF set by the guest, because "the
5338 * processor will not generate this exception after the instruction
5339 * that sets the TF flag".
5341 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5342 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5343 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5345 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5346 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5347 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5348 *r
= EMULATE_USER_EXIT
;
5350 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5352 * "Certain debug exceptions may clear bit 0-3. The
5353 * remaining contents of the DR6 register are never
5354 * cleared by the processor".
5356 vcpu
->arch
.dr6
&= ~15;
5357 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5358 kvm_queue_exception(vcpu
, DB_VECTOR
);
5363 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5365 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5366 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5367 struct kvm_run
*kvm_run
= vcpu
->run
;
5368 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5369 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5370 vcpu
->arch
.guest_debug_dr7
,
5374 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5375 kvm_run
->debug
.arch
.pc
= eip
;
5376 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5377 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5378 *r
= EMULATE_USER_EXIT
;
5383 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5384 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5385 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5386 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5391 vcpu
->arch
.dr6
&= ~15;
5392 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5393 kvm_queue_exception(vcpu
, DB_VECTOR
);
5402 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5409 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5410 bool writeback
= true;
5411 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5414 * Clear write_fault_to_shadow_pgtable here to ensure it is
5417 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5418 kvm_clear_exception_queue(vcpu
);
5420 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5421 init_emulate_ctxt(vcpu
);
5424 * We will reenter on the same instruction since
5425 * we do not set complete_userspace_io. This does not
5426 * handle watchpoints yet, those would be handled in
5429 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5432 ctxt
->interruptibility
= 0;
5433 ctxt
->have_exception
= false;
5434 ctxt
->exception
.vector
= -1;
5435 ctxt
->perm_ok
= false;
5437 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5439 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5441 trace_kvm_emulate_insn_start(vcpu
);
5442 ++vcpu
->stat
.insn_emulation
;
5443 if (r
!= EMULATION_OK
) {
5444 if (emulation_type
& EMULTYPE_TRAP_UD
)
5445 return EMULATE_FAIL
;
5446 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5448 return EMULATE_DONE
;
5449 if (emulation_type
& EMULTYPE_SKIP
)
5450 return EMULATE_FAIL
;
5451 return handle_emulation_failure(vcpu
);
5455 if (emulation_type
& EMULTYPE_SKIP
) {
5456 kvm_rip_write(vcpu
, ctxt
->_eip
);
5457 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5458 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5459 return EMULATE_DONE
;
5462 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5463 return EMULATE_DONE
;
5465 /* this is needed for vmware backdoor interface to work since it
5466 changes registers values during IO operation */
5467 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5468 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5469 emulator_invalidate_register_cache(ctxt
);
5473 r
= x86_emulate_insn(ctxt
);
5475 if (r
== EMULATION_INTERCEPTED
)
5476 return EMULATE_DONE
;
5478 if (r
== EMULATION_FAILED
) {
5479 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5481 return EMULATE_DONE
;
5483 return handle_emulation_failure(vcpu
);
5486 if (ctxt
->have_exception
) {
5488 if (inject_emulated_exception(vcpu
))
5490 } else if (vcpu
->arch
.pio
.count
) {
5491 if (!vcpu
->arch
.pio
.in
) {
5492 /* FIXME: return into emulator if single-stepping. */
5493 vcpu
->arch
.pio
.count
= 0;
5496 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5498 r
= EMULATE_USER_EXIT
;
5499 } else if (vcpu
->mmio_needed
) {
5500 if (!vcpu
->mmio_is_write
)
5502 r
= EMULATE_USER_EXIT
;
5503 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5504 } else if (r
== EMULATION_RESTART
)
5510 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5511 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5512 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5513 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5514 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5515 kvm_rip_write(vcpu
, ctxt
->eip
);
5516 if (r
== EMULATE_DONE
)
5517 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5518 if (!ctxt
->have_exception
||
5519 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5520 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5523 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5524 * do nothing, and it will be requested again as soon as
5525 * the shadow expires. But we still need to check here,
5526 * because POPF has no interrupt shadow.
5528 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5529 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5531 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5535 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5537 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5539 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5540 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5541 size
, port
, &val
, 1);
5542 /* do not return to emulator after return from userspace */
5543 vcpu
->arch
.pio
.count
= 0;
5546 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5548 static void tsc_bad(void *info
)
5550 __this_cpu_write(cpu_tsc_khz
, 0);
5553 static void tsc_khz_changed(void *data
)
5555 struct cpufreq_freqs
*freq
= data
;
5556 unsigned long khz
= 0;
5560 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5561 khz
= cpufreq_quick_get(raw_smp_processor_id());
5564 __this_cpu_write(cpu_tsc_khz
, khz
);
5567 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5570 struct cpufreq_freqs
*freq
= data
;
5572 struct kvm_vcpu
*vcpu
;
5573 int i
, send_ipi
= 0;
5576 * We allow guests to temporarily run on slowing clocks,
5577 * provided we notify them after, or to run on accelerating
5578 * clocks, provided we notify them before. Thus time never
5581 * However, we have a problem. We can't atomically update
5582 * the frequency of a given CPU from this function; it is
5583 * merely a notifier, which can be called from any CPU.
5584 * Changing the TSC frequency at arbitrary points in time
5585 * requires a recomputation of local variables related to
5586 * the TSC for each VCPU. We must flag these local variables
5587 * to be updated and be sure the update takes place with the
5588 * new frequency before any guests proceed.
5590 * Unfortunately, the combination of hotplug CPU and frequency
5591 * change creates an intractable locking scenario; the order
5592 * of when these callouts happen is undefined with respect to
5593 * CPU hotplug, and they can race with each other. As such,
5594 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5595 * undefined; you can actually have a CPU frequency change take
5596 * place in between the computation of X and the setting of the
5597 * variable. To protect against this problem, all updates of
5598 * the per_cpu tsc_khz variable are done in an interrupt
5599 * protected IPI, and all callers wishing to update the value
5600 * must wait for a synchronous IPI to complete (which is trivial
5601 * if the caller is on the CPU already). This establishes the
5602 * necessary total order on variable updates.
5604 * Note that because a guest time update may take place
5605 * anytime after the setting of the VCPU's request bit, the
5606 * correct TSC value must be set before the request. However,
5607 * to ensure the update actually makes it to any guest which
5608 * starts running in hardware virtualization between the set
5609 * and the acquisition of the spinlock, we must also ping the
5610 * CPU after setting the request bit.
5614 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5616 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5619 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5621 spin_lock(&kvm_lock
);
5622 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5623 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5624 if (vcpu
->cpu
!= freq
->cpu
)
5626 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5627 if (vcpu
->cpu
!= smp_processor_id())
5631 spin_unlock(&kvm_lock
);
5633 if (freq
->old
< freq
->new && send_ipi
) {
5635 * We upscale the frequency. Must make the guest
5636 * doesn't see old kvmclock values while running with
5637 * the new frequency, otherwise we risk the guest sees
5638 * time go backwards.
5640 * In case we update the frequency for another cpu
5641 * (which might be in guest context) send an interrupt
5642 * to kick the cpu out of guest context. Next time
5643 * guest context is entered kvmclock will be updated,
5644 * so the guest will not see stale values.
5646 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5651 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5652 .notifier_call
= kvmclock_cpufreq_notifier
5655 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5656 unsigned long action
, void *hcpu
)
5658 unsigned int cpu
= (unsigned long)hcpu
;
5662 case CPU_DOWN_FAILED
:
5663 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5665 case CPU_DOWN_PREPARE
:
5666 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5672 static struct notifier_block kvmclock_cpu_notifier_block
= {
5673 .notifier_call
= kvmclock_cpu_notifier
,
5674 .priority
= -INT_MAX
5677 static void kvm_timer_init(void)
5681 max_tsc_khz
= tsc_khz
;
5683 cpu_notifier_register_begin();
5684 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5685 #ifdef CONFIG_CPU_FREQ
5686 struct cpufreq_policy policy
;
5687 memset(&policy
, 0, sizeof(policy
));
5689 cpufreq_get_policy(&policy
, cpu
);
5690 if (policy
.cpuinfo
.max_freq
)
5691 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5694 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5695 CPUFREQ_TRANSITION_NOTIFIER
);
5697 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5698 for_each_online_cpu(cpu
)
5699 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5701 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5702 cpu_notifier_register_done();
5706 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5708 int kvm_is_in_guest(void)
5710 return __this_cpu_read(current_vcpu
) != NULL
;
5713 static int kvm_is_user_mode(void)
5717 if (__this_cpu_read(current_vcpu
))
5718 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5720 return user_mode
!= 0;
5723 static unsigned long kvm_get_guest_ip(void)
5725 unsigned long ip
= 0;
5727 if (__this_cpu_read(current_vcpu
))
5728 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5733 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5734 .is_in_guest
= kvm_is_in_guest
,
5735 .is_user_mode
= kvm_is_user_mode
,
5736 .get_guest_ip
= kvm_get_guest_ip
,
5739 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5741 __this_cpu_write(current_vcpu
, vcpu
);
5743 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5745 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5747 __this_cpu_write(current_vcpu
, NULL
);
5749 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5751 static void kvm_set_mmio_spte_mask(void)
5754 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5757 * Set the reserved bits and the present bit of an paging-structure
5758 * entry to generate page fault with PFER.RSV = 1.
5760 /* Mask the reserved physical address bits. */
5761 mask
= rsvd_bits(maxphyaddr
, 51);
5763 /* Bit 62 is always reserved for 32bit host. */
5764 mask
|= 0x3ull
<< 62;
5766 /* Set the present bit. */
5769 #ifdef CONFIG_X86_64
5771 * If reserved bit is not supported, clear the present bit to disable
5774 if (maxphyaddr
== 52)
5778 kvm_mmu_set_mmio_spte_mask(mask
);
5781 #ifdef CONFIG_X86_64
5782 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5786 struct kvm_vcpu
*vcpu
;
5789 spin_lock(&kvm_lock
);
5790 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5791 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5792 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5793 atomic_set(&kvm_guest_has_master_clock
, 0);
5794 spin_unlock(&kvm_lock
);
5797 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5800 * Notification about pvclock gtod data update.
5802 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5805 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5806 struct timekeeper
*tk
= priv
;
5808 update_pvclock_gtod(tk
);
5810 /* disable master clock if host does not trust, or does not
5811 * use, TSC clocksource
5813 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5814 atomic_read(&kvm_guest_has_master_clock
) != 0)
5815 queue_work(system_long_wq
, &pvclock_gtod_work
);
5820 static struct notifier_block pvclock_gtod_notifier
= {
5821 .notifier_call
= pvclock_gtod_notify
,
5825 int kvm_arch_init(void *opaque
)
5828 struct kvm_x86_ops
*ops
= opaque
;
5831 printk(KERN_ERR
"kvm: already loaded the other module\n");
5836 if (!ops
->cpu_has_kvm_support()) {
5837 printk(KERN_ERR
"kvm: no hardware support\n");
5841 if (ops
->disabled_by_bios()) {
5842 printk(KERN_ERR
"kvm: disabled by bios\n");
5848 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5850 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5854 r
= kvm_mmu_module_init();
5856 goto out_free_percpu
;
5858 kvm_set_mmio_spte_mask();
5862 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5863 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5867 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5870 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5873 #ifdef CONFIG_X86_64
5874 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5880 free_percpu(shared_msrs
);
5885 void kvm_arch_exit(void)
5887 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5889 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5890 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5891 CPUFREQ_TRANSITION_NOTIFIER
);
5892 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5893 #ifdef CONFIG_X86_64
5894 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5897 kvm_mmu_module_exit();
5898 free_percpu(shared_msrs
);
5901 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5903 ++vcpu
->stat
.halt_exits
;
5904 if (irqchip_in_kernel(vcpu
->kvm
)) {
5905 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5908 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5912 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5914 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5916 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5917 return kvm_vcpu_halt(vcpu
);
5919 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5921 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5923 u64 param
, ingpa
, outgpa
, ret
;
5924 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5925 bool fast
, longmode
;
5928 * hypercall generates UD from non zero cpl and real mode
5931 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5932 kvm_queue_exception(vcpu
, UD_VECTOR
);
5936 longmode
= is_64_bit_mode(vcpu
);
5939 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5940 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5941 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5942 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5943 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5944 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5946 #ifdef CONFIG_X86_64
5948 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5949 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5950 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5954 code
= param
& 0xffff;
5955 fast
= (param
>> 16) & 0x1;
5956 rep_cnt
= (param
>> 32) & 0xfff;
5957 rep_idx
= (param
>> 48) & 0xfff;
5959 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5962 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5963 kvm_vcpu_on_spin(vcpu
);
5966 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5970 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5972 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5974 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5975 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5982 * kvm_pv_kick_cpu_op: Kick a vcpu.
5984 * @apicid - apicid of vcpu to be kicked.
5986 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5988 struct kvm_lapic_irq lapic_irq
;
5990 lapic_irq
.shorthand
= 0;
5991 lapic_irq
.dest_mode
= 0;
5992 lapic_irq
.dest_id
= apicid
;
5993 lapic_irq
.msi_redir_hint
= false;
5995 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5996 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
5999 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6001 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6002 int op_64_bit
, r
= 1;
6004 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
6006 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6007 return kvm_hv_hypercall(vcpu
);
6009 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6010 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6011 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6012 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6013 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6015 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6017 op_64_bit
= is_64_bit_mode(vcpu
);
6026 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6032 case KVM_HC_VAPIC_POLL_IRQ
:
6035 case KVM_HC_KICK_CPU
:
6036 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6046 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6047 ++vcpu
->stat
.hypercalls
;
6050 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6052 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6054 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6055 char instruction
[3];
6056 unsigned long rip
= kvm_rip_read(vcpu
);
6058 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6060 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
6064 * Check if userspace requested an interrupt window, and that the
6065 * interrupt window is open.
6067 * No need to exit to userspace if we already have an interrupt queued.
6069 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6071 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
6072 vcpu
->run
->request_interrupt_window
&&
6073 kvm_arch_interrupt_allowed(vcpu
));
6076 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6078 struct kvm_run
*kvm_run
= vcpu
->run
;
6080 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6081 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6082 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6083 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6084 if (irqchip_in_kernel(vcpu
->kvm
))
6085 kvm_run
->ready_for_interrupt_injection
= 1;
6087 kvm_run
->ready_for_interrupt_injection
=
6088 kvm_arch_interrupt_allowed(vcpu
) &&
6089 !kvm_cpu_has_interrupt(vcpu
) &&
6090 !kvm_event_needs_reinjection(vcpu
);
6093 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6097 if (!kvm_x86_ops
->update_cr8_intercept
)
6100 if (!vcpu
->arch
.apic
)
6103 if (!vcpu
->arch
.apic
->vapic_addr
)
6104 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6111 tpr
= kvm_lapic_get_cr8(vcpu
);
6113 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6116 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6120 /* try to reinject previous events if any */
6121 if (vcpu
->arch
.exception
.pending
) {
6122 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6123 vcpu
->arch
.exception
.has_error_code
,
6124 vcpu
->arch
.exception
.error_code
);
6126 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6127 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6130 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6131 (vcpu
->arch
.dr7
& DR7_GD
)) {
6132 vcpu
->arch
.dr7
&= ~DR7_GD
;
6133 kvm_update_dr7(vcpu
);
6136 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6137 vcpu
->arch
.exception
.has_error_code
,
6138 vcpu
->arch
.exception
.error_code
,
6139 vcpu
->arch
.exception
.reinject
);
6143 if (vcpu
->arch
.nmi_injected
) {
6144 kvm_x86_ops
->set_nmi(vcpu
);
6148 if (vcpu
->arch
.interrupt
.pending
) {
6149 kvm_x86_ops
->set_irq(vcpu
);
6153 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6154 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6159 /* try to inject new event if pending */
6160 if (vcpu
->arch
.nmi_pending
) {
6161 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
6162 --vcpu
->arch
.nmi_pending
;
6163 vcpu
->arch
.nmi_injected
= true;
6164 kvm_x86_ops
->set_nmi(vcpu
);
6166 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6168 * Because interrupts can be injected asynchronously, we are
6169 * calling check_nested_events again here to avoid a race condition.
6170 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6171 * proposal and current concerns. Perhaps we should be setting
6172 * KVM_REQ_EVENT only on certain events and not unconditionally?
6174 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6175 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6179 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6180 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6182 kvm_x86_ops
->set_irq(vcpu
);
6188 static void process_nmi(struct kvm_vcpu
*vcpu
)
6193 * x86 is limited to one NMI running, and one NMI pending after it.
6194 * If an NMI is already in progress, limit further NMIs to just one.
6195 * Otherwise, allow two (and we'll inject the first one immediately).
6197 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6200 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6201 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6202 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6205 #define put_smstate(type, buf, offset, val) \
6206 *(type *)((buf) + (offset) - 0x7e00) = val
6208 static u32
process_smi_get_segment_flags(struct kvm_segment
*seg
)
6211 flags
|= seg
->g
<< 23;
6212 flags
|= seg
->db
<< 22;
6213 flags
|= seg
->l
<< 21;
6214 flags
|= seg
->avl
<< 20;
6215 flags
|= seg
->present
<< 15;
6216 flags
|= seg
->dpl
<< 13;
6217 flags
|= seg
->s
<< 12;
6218 flags
|= seg
->type
<< 8;
6222 static void process_smi_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6224 struct kvm_segment seg
;
6227 kvm_get_segment(vcpu
, &seg
, n
);
6228 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6231 offset
= 0x7f84 + n
* 12;
6233 offset
= 0x7f2c + (n
- 3) * 12;
6235 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6236 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6237 put_smstate(u32
, buf
, offset
, process_smi_get_segment_flags(&seg
));
6240 static void process_smi_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6242 struct kvm_segment seg
;
6246 kvm_get_segment(vcpu
, &seg
, n
);
6247 offset
= 0x7e00 + n
* 16;
6249 flags
= process_smi_get_segment_flags(&seg
) >> 8;
6250 put_smstate(u16
, buf
, offset
, seg
.selector
);
6251 put_smstate(u16
, buf
, offset
+ 2, flags
);
6252 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6253 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6256 static void process_smi_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6259 struct kvm_segment seg
;
6263 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6264 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6265 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6266 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6268 for (i
= 0; i
< 8; i
++)
6269 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6271 kvm_get_dr(vcpu
, 6, &val
);
6272 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6273 kvm_get_dr(vcpu
, 7, &val
);
6274 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6276 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6277 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6278 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6279 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6280 put_smstate(u32
, buf
, 0x7f5c, process_smi_get_segment_flags(&seg
));
6282 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6283 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6284 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6285 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6286 put_smstate(u32
, buf
, 0x7f78, process_smi_get_segment_flags(&seg
));
6288 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6289 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6290 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6292 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6293 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6294 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6296 for (i
= 0; i
< 6; i
++)
6297 process_smi_save_seg_32(vcpu
, buf
, i
);
6299 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6302 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6303 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6306 static void process_smi_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6308 #ifdef CONFIG_X86_64
6310 struct kvm_segment seg
;
6314 for (i
= 0; i
< 16; i
++)
6315 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6317 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6318 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6320 kvm_get_dr(vcpu
, 6, &val
);
6321 put_smstate(u64
, buf
, 0x7f68, val
);
6322 kvm_get_dr(vcpu
, 7, &val
);
6323 put_smstate(u64
, buf
, 0x7f60, val
);
6325 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6326 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6327 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6329 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6332 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6334 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6336 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6337 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6338 put_smstate(u16
, buf
, 0x7e92, process_smi_get_segment_flags(&seg
) >> 8);
6339 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6340 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6342 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6343 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6344 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6346 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6347 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6348 put_smstate(u16
, buf
, 0x7e72, process_smi_get_segment_flags(&seg
) >> 8);
6349 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6350 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6352 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6353 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6354 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6356 for (i
= 0; i
< 6; i
++)
6357 process_smi_save_seg_64(vcpu
, buf
, i
);
6363 static void process_smi(struct kvm_vcpu
*vcpu
)
6365 struct kvm_segment cs
, ds
;
6370 vcpu
->arch
.smi_pending
= true;
6374 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6375 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6376 memset(buf
, 0, 512);
6377 if (guest_cpuid_has_longmode(vcpu
))
6378 process_smi_save_state_64(vcpu
, buf
);
6380 process_smi_save_state_32(vcpu
, buf
);
6382 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6384 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6385 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6387 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6389 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6390 kvm_rip_write(vcpu
, 0x8000);
6392 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6393 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6394 vcpu
->arch
.cr0
= cr0
;
6396 kvm_x86_ops
->set_cr4(vcpu
, 0);
6398 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6400 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6401 cs
.base
= vcpu
->arch
.smbase
;
6406 cs
.limit
= ds
.limit
= 0xffffffff;
6407 cs
.type
= ds
.type
= 0x3;
6408 cs
.dpl
= ds
.dpl
= 0;
6413 cs
.avl
= ds
.avl
= 0;
6414 cs
.present
= ds
.present
= 1;
6415 cs
.unusable
= ds
.unusable
= 0;
6416 cs
.padding
= ds
.padding
= 0;
6418 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6419 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6420 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6421 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6422 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6423 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6425 if (guest_cpuid_has_longmode(vcpu
))
6426 kvm_x86_ops
->set_efer(vcpu
, 0);
6428 kvm_update_cpuid(vcpu
);
6429 kvm_mmu_reset_context(vcpu
);
6432 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6434 u64 eoi_exit_bitmap
[4];
6437 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6440 memset(eoi_exit_bitmap
, 0, 32);
6443 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
6444 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6445 kvm_apic_update_tmr(vcpu
, tmr
);
6448 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6450 ++vcpu
->stat
.tlb_flush
;
6451 kvm_x86_ops
->tlb_flush(vcpu
);
6454 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6456 struct page
*page
= NULL
;
6458 if (!irqchip_in_kernel(vcpu
->kvm
))
6461 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6464 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6465 if (is_error_page(page
))
6467 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6470 * Do not pin apic access page in memory, the MMU notifier
6471 * will call us again if it is migrated or swapped out.
6475 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6477 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6478 unsigned long address
)
6481 * The physical address of apic access page is stored in the VMCS.
6482 * Update it when it becomes invalid.
6484 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6485 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6489 * Returns 1 to let vcpu_run() continue the guest execution loop without
6490 * exiting to the userspace. Otherwise, the value will be returned to the
6493 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6496 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
6497 vcpu
->run
->request_interrupt_window
;
6498 bool req_immediate_exit
= false;
6500 if (vcpu
->requests
) {
6501 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6502 kvm_mmu_unload(vcpu
);
6503 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6504 __kvm_migrate_timers(vcpu
);
6505 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6506 kvm_gen_update_masterclock(vcpu
->kvm
);
6507 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6508 kvm_gen_kvmclock_update(vcpu
);
6509 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6510 r
= kvm_guest_time_update(vcpu
);
6514 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6515 kvm_mmu_sync_roots(vcpu
);
6516 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6517 kvm_vcpu_flush_tlb(vcpu
);
6518 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6519 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6523 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6524 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6528 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6529 vcpu
->fpu_active
= 0;
6530 kvm_x86_ops
->fpu_deactivate(vcpu
);
6532 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6533 /* Page is swapped out. Do synthetic halt */
6534 vcpu
->arch
.apf
.halted
= true;
6538 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6539 record_steal_time(vcpu
);
6540 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6542 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6544 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6545 kvm_pmu_handle_event(vcpu
);
6546 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6547 kvm_pmu_deliver_pmi(vcpu
);
6548 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6549 vcpu_scan_ioapic(vcpu
);
6550 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6551 kvm_vcpu_reload_apic_access_page(vcpu
);
6554 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6555 kvm_apic_accept_events(vcpu
);
6556 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6561 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6562 req_immediate_exit
= true;
6563 /* enable NMI/IRQ window open exits if needed */
6564 else if (vcpu
->arch
.nmi_pending
)
6565 kvm_x86_ops
->enable_nmi_window(vcpu
);
6566 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6567 kvm_x86_ops
->enable_irq_window(vcpu
);
6569 if (kvm_lapic_enabled(vcpu
)) {
6571 * Update architecture specific hints for APIC
6572 * virtual interrupt delivery.
6574 if (kvm_x86_ops
->hwapic_irr_update
)
6575 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6576 kvm_lapic_find_highest_irr(vcpu
));
6577 update_cr8_intercept(vcpu
);
6578 kvm_lapic_sync_to_vapic(vcpu
);
6582 r
= kvm_mmu_reload(vcpu
);
6584 goto cancel_injection
;
6589 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6590 if (vcpu
->fpu_active
)
6591 kvm_load_guest_fpu(vcpu
);
6592 kvm_load_guest_xcr0(vcpu
);
6594 vcpu
->mode
= IN_GUEST_MODE
;
6596 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6598 /* We should set ->mode before check ->requests,
6599 * see the comment in make_all_cpus_request.
6601 smp_mb__after_srcu_read_unlock();
6603 local_irq_disable();
6605 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6606 || need_resched() || signal_pending(current
)) {
6607 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6611 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6613 goto cancel_injection
;
6616 if (req_immediate_exit
)
6617 smp_send_reschedule(vcpu
->cpu
);
6619 __kvm_guest_enter();
6621 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6623 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6624 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6625 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6626 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6627 set_debugreg(vcpu
->arch
.dr6
, 6);
6628 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6631 trace_kvm_entry(vcpu
->vcpu_id
);
6632 wait_lapic_expire(vcpu
);
6633 kvm_x86_ops
->run(vcpu
);
6636 * Do this here before restoring debug registers on the host. And
6637 * since we do this before handling the vmexit, a DR access vmexit
6638 * can (a) read the correct value of the debug registers, (b) set
6639 * KVM_DEBUGREG_WONT_EXIT again.
6641 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6644 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6645 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6646 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6647 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6651 * If the guest has used debug registers, at least dr7
6652 * will be disabled while returning to the host.
6653 * If we don't have active breakpoints in the host, we don't
6654 * care about the messed up debug address registers. But if
6655 * we have some of them active, restore the old state.
6657 if (hw_breakpoint_active())
6658 hw_breakpoint_restore();
6660 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6663 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6666 /* Interrupt is enabled by handle_external_intr() */
6667 kvm_x86_ops
->handle_external_intr(vcpu
);
6672 * We must have an instruction between local_irq_enable() and
6673 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6674 * the interrupt shadow. The stat.exits increment will do nicely.
6675 * But we need to prevent reordering, hence this barrier():
6683 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6686 * Profile KVM exit RIPs:
6688 if (unlikely(prof_on
== KVM_PROFILING
)) {
6689 unsigned long rip
= kvm_rip_read(vcpu
);
6690 profile_hit(KVM_PROFILING
, (void *)rip
);
6693 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6694 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6696 if (vcpu
->arch
.apic_attention
)
6697 kvm_lapic_sync_from_vapic(vcpu
);
6699 r
= kvm_x86_ops
->handle_exit(vcpu
);
6703 kvm_x86_ops
->cancel_injection(vcpu
);
6704 if (unlikely(vcpu
->arch
.apic_attention
))
6705 kvm_lapic_sync_from_vapic(vcpu
);
6710 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6712 if (!kvm_arch_vcpu_runnable(vcpu
)) {
6713 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6714 kvm_vcpu_block(vcpu
);
6715 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6716 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6720 kvm_apic_accept_events(vcpu
);
6721 switch(vcpu
->arch
.mp_state
) {
6722 case KVM_MP_STATE_HALTED
:
6723 vcpu
->arch
.pv
.pv_unhalted
= false;
6724 vcpu
->arch
.mp_state
=
6725 KVM_MP_STATE_RUNNABLE
;
6726 case KVM_MP_STATE_RUNNABLE
:
6727 vcpu
->arch
.apf
.halted
= false;
6729 case KVM_MP_STATE_INIT_RECEIVED
:
6738 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6741 struct kvm
*kvm
= vcpu
->kvm
;
6743 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6746 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6747 !vcpu
->arch
.apf
.halted
)
6748 r
= vcpu_enter_guest(vcpu
);
6750 r
= vcpu_block(kvm
, vcpu
);
6754 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6755 if (kvm_cpu_has_pending_timer(vcpu
))
6756 kvm_inject_pending_timer_irqs(vcpu
);
6758 if (dm_request_for_irq_injection(vcpu
)) {
6760 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6761 ++vcpu
->stat
.request_irq_exits
;
6765 kvm_check_async_pf_completion(vcpu
);
6767 if (signal_pending(current
)) {
6769 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6770 ++vcpu
->stat
.signal_exits
;
6773 if (need_resched()) {
6774 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6776 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6780 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6785 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6788 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6789 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6790 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6791 if (r
!= EMULATE_DONE
)
6796 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6798 BUG_ON(!vcpu
->arch
.pio
.count
);
6800 return complete_emulated_io(vcpu
);
6804 * Implements the following, as a state machine:
6808 * for each mmio piece in the fragment
6816 * for each mmio piece in the fragment
6821 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6823 struct kvm_run
*run
= vcpu
->run
;
6824 struct kvm_mmio_fragment
*frag
;
6827 BUG_ON(!vcpu
->mmio_needed
);
6829 /* Complete previous fragment */
6830 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6831 len
= min(8u, frag
->len
);
6832 if (!vcpu
->mmio_is_write
)
6833 memcpy(frag
->data
, run
->mmio
.data
, len
);
6835 if (frag
->len
<= 8) {
6836 /* Switch to the next fragment. */
6838 vcpu
->mmio_cur_fragment
++;
6840 /* Go forward to the next mmio piece. */
6846 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6847 vcpu
->mmio_needed
= 0;
6849 /* FIXME: return into emulator if single-stepping. */
6850 if (vcpu
->mmio_is_write
)
6852 vcpu
->mmio_read_completed
= 1;
6853 return complete_emulated_io(vcpu
);
6856 run
->exit_reason
= KVM_EXIT_MMIO
;
6857 run
->mmio
.phys_addr
= frag
->gpa
;
6858 if (vcpu
->mmio_is_write
)
6859 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6860 run
->mmio
.len
= min(8u, frag
->len
);
6861 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6862 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6867 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6872 if (!tsk_used_math(current
) && init_fpu(current
))
6875 if (vcpu
->sigset_active
)
6876 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6878 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6879 kvm_vcpu_block(vcpu
);
6880 kvm_apic_accept_events(vcpu
);
6881 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6886 /* re-sync apic's tpr */
6887 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6888 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6894 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6895 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6896 vcpu
->arch
.complete_userspace_io
= NULL
;
6901 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6906 post_kvm_run_save(vcpu
);
6907 if (vcpu
->sigset_active
)
6908 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6913 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6915 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6917 * We are here if userspace calls get_regs() in the middle of
6918 * instruction emulation. Registers state needs to be copied
6919 * back from emulation context to vcpu. Userspace shouldn't do
6920 * that usually, but some bad designed PV devices (vmware
6921 * backdoor interface) need this to work
6923 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6924 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6926 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6927 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6928 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6929 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6930 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6931 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6932 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6933 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6934 #ifdef CONFIG_X86_64
6935 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6936 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6937 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6938 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6939 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6940 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6941 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6942 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6945 regs
->rip
= kvm_rip_read(vcpu
);
6946 regs
->rflags
= kvm_get_rflags(vcpu
);
6951 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6953 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6954 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6956 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6957 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6958 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6959 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6960 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6961 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6962 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6963 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6964 #ifdef CONFIG_X86_64
6965 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6966 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6967 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6968 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6969 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6970 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6971 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6972 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6975 kvm_rip_write(vcpu
, regs
->rip
);
6976 kvm_set_rflags(vcpu
, regs
->rflags
);
6978 vcpu
->arch
.exception
.pending
= false;
6980 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6985 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6987 struct kvm_segment cs
;
6989 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6993 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6995 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6996 struct kvm_sregs
*sregs
)
7000 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7001 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7002 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7003 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7004 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7005 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7007 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7008 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7010 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7011 sregs
->idt
.limit
= dt
.size
;
7012 sregs
->idt
.base
= dt
.address
;
7013 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7014 sregs
->gdt
.limit
= dt
.size
;
7015 sregs
->gdt
.base
= dt
.address
;
7017 sregs
->cr0
= kvm_read_cr0(vcpu
);
7018 sregs
->cr2
= vcpu
->arch
.cr2
;
7019 sregs
->cr3
= kvm_read_cr3(vcpu
);
7020 sregs
->cr4
= kvm_read_cr4(vcpu
);
7021 sregs
->cr8
= kvm_get_cr8(vcpu
);
7022 sregs
->efer
= vcpu
->arch
.efer
;
7023 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7025 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7027 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7028 set_bit(vcpu
->arch
.interrupt
.nr
,
7029 (unsigned long *)sregs
->interrupt_bitmap
);
7034 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7035 struct kvm_mp_state
*mp_state
)
7037 kvm_apic_accept_events(vcpu
);
7038 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7039 vcpu
->arch
.pv
.pv_unhalted
)
7040 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7042 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7047 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7048 struct kvm_mp_state
*mp_state
)
7050 if (!kvm_vcpu_has_lapic(vcpu
) &&
7051 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7054 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7055 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7056 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7058 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7059 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7063 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7064 int reason
, bool has_error_code
, u32 error_code
)
7066 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7069 init_emulate_ctxt(vcpu
);
7071 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7072 has_error_code
, error_code
);
7075 return EMULATE_FAIL
;
7077 kvm_rip_write(vcpu
, ctxt
->eip
);
7078 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7079 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7080 return EMULATE_DONE
;
7082 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7084 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7085 struct kvm_sregs
*sregs
)
7087 struct msr_data apic_base_msr
;
7088 int mmu_reset_needed
= 0;
7089 int pending_vec
, max_bits
, idx
;
7092 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7095 dt
.size
= sregs
->idt
.limit
;
7096 dt
.address
= sregs
->idt
.base
;
7097 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7098 dt
.size
= sregs
->gdt
.limit
;
7099 dt
.address
= sregs
->gdt
.base
;
7100 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7102 vcpu
->arch
.cr2
= sregs
->cr2
;
7103 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7104 vcpu
->arch
.cr3
= sregs
->cr3
;
7105 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7107 kvm_set_cr8(vcpu
, sregs
->cr8
);
7109 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7110 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7111 apic_base_msr
.data
= sregs
->apic_base
;
7112 apic_base_msr
.host_initiated
= true;
7113 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7115 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7116 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7117 vcpu
->arch
.cr0
= sregs
->cr0
;
7119 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7120 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7121 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
7122 kvm_update_cpuid(vcpu
);
7124 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7125 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7126 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7127 mmu_reset_needed
= 1;
7129 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7131 if (mmu_reset_needed
)
7132 kvm_mmu_reset_context(vcpu
);
7134 max_bits
= KVM_NR_INTERRUPTS
;
7135 pending_vec
= find_first_bit(
7136 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7137 if (pending_vec
< max_bits
) {
7138 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7139 pr_debug("Set back pending irq %d\n", pending_vec
);
7142 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7143 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7144 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7145 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7146 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7147 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7149 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7150 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7152 update_cr8_intercept(vcpu
);
7154 /* Older userspace won't unhalt the vcpu on reset. */
7155 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7156 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7158 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7160 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7165 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7166 struct kvm_guest_debug
*dbg
)
7168 unsigned long rflags
;
7171 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7173 if (vcpu
->arch
.exception
.pending
)
7175 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7176 kvm_queue_exception(vcpu
, DB_VECTOR
);
7178 kvm_queue_exception(vcpu
, BP_VECTOR
);
7182 * Read rflags as long as potentially injected trace flags are still
7185 rflags
= kvm_get_rflags(vcpu
);
7187 vcpu
->guest_debug
= dbg
->control
;
7188 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7189 vcpu
->guest_debug
= 0;
7191 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7192 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7193 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7194 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7196 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7197 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7199 kvm_update_dr7(vcpu
);
7201 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7202 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7203 get_segment_base(vcpu
, VCPU_SREG_CS
);
7206 * Trigger an rflags update that will inject or remove the trace
7209 kvm_set_rflags(vcpu
, rflags
);
7211 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
7221 * Translate a guest virtual address to a guest physical address.
7223 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7224 struct kvm_translation
*tr
)
7226 unsigned long vaddr
= tr
->linear_address
;
7230 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7231 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7232 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7233 tr
->physical_address
= gpa
;
7234 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7241 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7243 struct i387_fxsave_struct
*fxsave
=
7244 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
7246 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7247 fpu
->fcw
= fxsave
->cwd
;
7248 fpu
->fsw
= fxsave
->swd
;
7249 fpu
->ftwx
= fxsave
->twd
;
7250 fpu
->last_opcode
= fxsave
->fop
;
7251 fpu
->last_ip
= fxsave
->rip
;
7252 fpu
->last_dp
= fxsave
->rdp
;
7253 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7258 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7260 struct i387_fxsave_struct
*fxsave
=
7261 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
7263 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7264 fxsave
->cwd
= fpu
->fcw
;
7265 fxsave
->swd
= fpu
->fsw
;
7266 fxsave
->twd
= fpu
->ftwx
;
7267 fxsave
->fop
= fpu
->last_opcode
;
7268 fxsave
->rip
= fpu
->last_ip
;
7269 fxsave
->rdp
= fpu
->last_dp
;
7270 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7275 int fx_init(struct kvm_vcpu
*vcpu
, bool init_event
)
7279 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
7284 fpu_finit(&vcpu
->arch
.guest_fpu
);
7287 vcpu
->arch
.guest_fpu
.state
->xsave
.xsave_hdr
.xcomp_bv
=
7288 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7291 * Ensure guest xcr0 is valid for loading
7293 vcpu
->arch
.xcr0
= XSTATE_FP
;
7295 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7299 EXPORT_SYMBOL_GPL(fx_init
);
7301 static void fx_free(struct kvm_vcpu
*vcpu
)
7303 fpu_free(&vcpu
->arch
.guest_fpu
);
7306 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7308 if (vcpu
->guest_fpu_loaded
)
7312 * Restore all possible states in the guest,
7313 * and assume host would use all available bits.
7314 * Guest xcr0 would be loaded later.
7316 kvm_put_guest_xcr0(vcpu
);
7317 vcpu
->guest_fpu_loaded
= 1;
7318 __kernel_fpu_begin();
7319 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
7323 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7325 kvm_put_guest_xcr0(vcpu
);
7327 if (!vcpu
->guest_fpu_loaded
) {
7328 vcpu
->fpu_counter
= 0;
7332 vcpu
->guest_fpu_loaded
= 0;
7333 fpu_save_init(&vcpu
->arch
.guest_fpu
);
7335 ++vcpu
->stat
.fpu_reload
;
7337 * If using eager FPU mode, or if the guest is a frequent user
7338 * of the FPU, just leave the FPU active for next time.
7339 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7340 * the FPU in bursts will revert to loading it on demand.
7342 if (!vcpu
->arch
.eager_fpu
) {
7343 if (++vcpu
->fpu_counter
< 5)
7344 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7349 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7351 kvmclock_reset(vcpu
);
7353 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7355 kvm_x86_ops
->vcpu_free(vcpu
);
7358 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7361 struct kvm_vcpu
*vcpu
;
7363 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7364 printk_once(KERN_WARNING
7365 "kvm: SMP vm created on host with unstable TSC; "
7366 "guest TSC will not be reliable\n");
7368 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7371 * Activate fpu unconditionally in case the guest needs eager FPU. It will be
7372 * deactivated soon if it doesn't.
7374 kvm_x86_ops
->fpu_activate(vcpu
);
7378 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7382 kvm_vcpu_mtrr_init(vcpu
);
7383 r
= vcpu_load(vcpu
);
7386 kvm_vcpu_reset(vcpu
, false);
7387 kvm_mmu_setup(vcpu
);
7392 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7394 struct msr_data msr
;
7395 struct kvm
*kvm
= vcpu
->kvm
;
7397 if (vcpu_load(vcpu
))
7400 msr
.index
= MSR_IA32_TSC
;
7401 msr
.host_initiated
= true;
7402 kvm_write_tsc(vcpu
, &msr
);
7405 if (!kvmclock_periodic_sync
)
7408 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7409 KVMCLOCK_SYNC_PERIOD
);
7412 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7415 vcpu
->arch
.apf
.msr_val
= 0;
7417 r
= vcpu_load(vcpu
);
7419 kvm_mmu_unload(vcpu
);
7423 kvm_x86_ops
->vcpu_free(vcpu
);
7426 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7428 vcpu
->arch
.hflags
= 0;
7430 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7431 vcpu
->arch
.nmi_pending
= 0;
7432 vcpu
->arch
.nmi_injected
= false;
7433 kvm_clear_interrupt_queue(vcpu
);
7434 kvm_clear_exception_queue(vcpu
);
7436 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7437 kvm_update_dr0123(vcpu
);
7438 vcpu
->arch
.dr6
= DR6_INIT
;
7439 kvm_update_dr6(vcpu
);
7440 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7441 kvm_update_dr7(vcpu
);
7445 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7446 vcpu
->arch
.apf
.msr_val
= 0;
7447 vcpu
->arch
.st
.msr_val
= 0;
7449 kvmclock_reset(vcpu
);
7451 kvm_clear_async_pf_completion_queue(vcpu
);
7452 kvm_async_pf_hash_reset(vcpu
);
7453 vcpu
->arch
.apf
.halted
= false;
7456 kvm_pmu_reset(vcpu
);
7457 vcpu
->arch
.smbase
= 0x30000;
7460 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7461 vcpu
->arch
.regs_avail
= ~0;
7462 vcpu
->arch
.regs_dirty
= ~0;
7464 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7467 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7469 struct kvm_segment cs
;
7471 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7472 cs
.selector
= vector
<< 8;
7473 cs
.base
= vector
<< 12;
7474 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7475 kvm_rip_write(vcpu
, 0);
7478 int kvm_arch_hardware_enable(void)
7481 struct kvm_vcpu
*vcpu
;
7486 bool stable
, backwards_tsc
= false;
7488 kvm_shared_msr_cpu_online();
7489 ret
= kvm_x86_ops
->hardware_enable();
7493 local_tsc
= native_read_tsc();
7494 stable
= !check_tsc_unstable();
7495 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7496 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7497 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7498 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7499 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7500 backwards_tsc
= true;
7501 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7502 max_tsc
= vcpu
->arch
.last_host_tsc
;
7508 * Sometimes, even reliable TSCs go backwards. This happens on
7509 * platforms that reset TSC during suspend or hibernate actions, but
7510 * maintain synchronization. We must compensate. Fortunately, we can
7511 * detect that condition here, which happens early in CPU bringup,
7512 * before any KVM threads can be running. Unfortunately, we can't
7513 * bring the TSCs fully up to date with real time, as we aren't yet far
7514 * enough into CPU bringup that we know how much real time has actually
7515 * elapsed; our helper function, get_kernel_ns() will be using boot
7516 * variables that haven't been updated yet.
7518 * So we simply find the maximum observed TSC above, then record the
7519 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7520 * the adjustment will be applied. Note that we accumulate
7521 * adjustments, in case multiple suspend cycles happen before some VCPU
7522 * gets a chance to run again. In the event that no KVM threads get a
7523 * chance to run, we will miss the entire elapsed period, as we'll have
7524 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7525 * loose cycle time. This isn't too big a deal, since the loss will be
7526 * uniform across all VCPUs (not to mention the scenario is extremely
7527 * unlikely). It is possible that a second hibernate recovery happens
7528 * much faster than a first, causing the observed TSC here to be
7529 * smaller; this would require additional padding adjustment, which is
7530 * why we set last_host_tsc to the local tsc observed here.
7532 * N.B. - this code below runs only on platforms with reliable TSC,
7533 * as that is the only way backwards_tsc is set above. Also note
7534 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7535 * have the same delta_cyc adjustment applied if backwards_tsc
7536 * is detected. Note further, this adjustment is only done once,
7537 * as we reset last_host_tsc on all VCPUs to stop this from being
7538 * called multiple times (one for each physical CPU bringup).
7540 * Platforms with unreliable TSCs don't have to deal with this, they
7541 * will be compensated by the logic in vcpu_load, which sets the TSC to
7542 * catchup mode. This will catchup all VCPUs to real time, but cannot
7543 * guarantee that they stay in perfect synchronization.
7545 if (backwards_tsc
) {
7546 u64 delta_cyc
= max_tsc
- local_tsc
;
7547 backwards_tsc_observed
= true;
7548 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7549 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7550 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7551 vcpu
->arch
.last_host_tsc
= local_tsc
;
7552 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7556 * We have to disable TSC offset matching.. if you were
7557 * booting a VM while issuing an S4 host suspend....
7558 * you may have some problem. Solving this issue is
7559 * left as an exercise to the reader.
7561 kvm
->arch
.last_tsc_nsec
= 0;
7562 kvm
->arch
.last_tsc_write
= 0;
7569 void kvm_arch_hardware_disable(void)
7571 kvm_x86_ops
->hardware_disable();
7572 drop_user_return_notifiers();
7575 int kvm_arch_hardware_setup(void)
7579 r
= kvm_x86_ops
->hardware_setup();
7583 kvm_init_msr_list();
7587 void kvm_arch_hardware_unsetup(void)
7589 kvm_x86_ops
->hardware_unsetup();
7592 void kvm_arch_check_processor_compat(void *rtn
)
7594 kvm_x86_ops
->check_processor_compatibility(rtn
);
7597 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7599 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
7602 struct static_key kvm_no_apic_vcpu __read_mostly
;
7604 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7610 BUG_ON(vcpu
->kvm
== NULL
);
7613 vcpu
->arch
.pv
.pv_unhalted
= false;
7614 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7615 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7616 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7618 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7620 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7625 vcpu
->arch
.pio_data
= page_address(page
);
7627 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7629 r
= kvm_mmu_create(vcpu
);
7631 goto fail_free_pio_data
;
7633 if (irqchip_in_kernel(kvm
)) {
7634 r
= kvm_create_lapic(vcpu
);
7636 goto fail_mmu_destroy
;
7638 static_key_slow_inc(&kvm_no_apic_vcpu
);
7640 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7642 if (!vcpu
->arch
.mce_banks
) {
7644 goto fail_free_lapic
;
7646 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7648 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7650 goto fail_free_mce_banks
;
7653 r
= fx_init(vcpu
, false);
7655 goto fail_free_wbinvd_dirty_mask
;
7657 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7658 vcpu
->arch
.pv_time_enabled
= false;
7660 vcpu
->arch
.guest_supported_xcr0
= 0;
7661 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7663 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7665 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7667 kvm_async_pf_hash_reset(vcpu
);
7671 fail_free_wbinvd_dirty_mask
:
7672 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7673 fail_free_mce_banks
:
7674 kfree(vcpu
->arch
.mce_banks
);
7676 kvm_free_lapic(vcpu
);
7678 kvm_mmu_destroy(vcpu
);
7680 free_page((unsigned long)vcpu
->arch
.pio_data
);
7685 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7689 kvm_pmu_destroy(vcpu
);
7690 kfree(vcpu
->arch
.mce_banks
);
7691 kvm_free_lapic(vcpu
);
7692 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7693 kvm_mmu_destroy(vcpu
);
7694 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7695 free_page((unsigned long)vcpu
->arch
.pio_data
);
7696 if (!irqchip_in_kernel(vcpu
->kvm
))
7697 static_key_slow_dec(&kvm_no_apic_vcpu
);
7700 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7702 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7705 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7710 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7711 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7712 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7713 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7714 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7716 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7717 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7718 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7719 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7720 &kvm
->arch
.irq_sources_bitmap
);
7722 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7723 mutex_init(&kvm
->arch
.apic_map_lock
);
7724 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7726 pvclock_update_vm_gtod_copy(kvm
);
7728 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7729 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7734 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7737 r
= vcpu_load(vcpu
);
7739 kvm_mmu_unload(vcpu
);
7743 static void kvm_free_vcpus(struct kvm
*kvm
)
7746 struct kvm_vcpu
*vcpu
;
7749 * Unpin any mmu pages first.
7751 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7752 kvm_clear_async_pf_completion_queue(vcpu
);
7753 kvm_unload_vcpu_mmu(vcpu
);
7755 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7756 kvm_arch_vcpu_free(vcpu
);
7758 mutex_lock(&kvm
->lock
);
7759 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7760 kvm
->vcpus
[i
] = NULL
;
7762 atomic_set(&kvm
->online_vcpus
, 0);
7763 mutex_unlock(&kvm
->lock
);
7766 void kvm_arch_sync_events(struct kvm
*kvm
)
7768 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7769 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7770 kvm_free_all_assigned_devices(kvm
);
7774 int __x86_set_memory_region(struct kvm
*kvm
,
7775 const struct kvm_userspace_memory_region
*mem
)
7779 /* Called with kvm->slots_lock held. */
7780 BUG_ON(mem
->slot
>= KVM_MEM_SLOTS_NUM
);
7782 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7783 struct kvm_userspace_memory_region m
= *mem
;
7786 r
= __kvm_set_memory_region(kvm
, &m
);
7793 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
7795 int x86_set_memory_region(struct kvm
*kvm
,
7796 const struct kvm_userspace_memory_region
*mem
)
7800 mutex_lock(&kvm
->slots_lock
);
7801 r
= __x86_set_memory_region(kvm
, mem
);
7802 mutex_unlock(&kvm
->slots_lock
);
7806 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
7808 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7810 if (current
->mm
== kvm
->mm
) {
7812 * Free memory regions allocated on behalf of userspace,
7813 * unless the the memory map has changed due to process exit
7816 struct kvm_userspace_memory_region mem
;
7817 memset(&mem
, 0, sizeof(mem
));
7818 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7819 x86_set_memory_region(kvm
, &mem
);
7821 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7822 x86_set_memory_region(kvm
, &mem
);
7824 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7825 x86_set_memory_region(kvm
, &mem
);
7827 kvm_iommu_unmap_guest(kvm
);
7828 kfree(kvm
->arch
.vpic
);
7829 kfree(kvm
->arch
.vioapic
);
7830 kvm_free_vcpus(kvm
);
7831 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7834 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7835 struct kvm_memory_slot
*dont
)
7839 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7840 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7841 kvfree(free
->arch
.rmap
[i
]);
7842 free
->arch
.rmap
[i
] = NULL
;
7847 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7848 dont
->arch
.lpage_info
[i
- 1]) {
7849 kvfree(free
->arch
.lpage_info
[i
- 1]);
7850 free
->arch
.lpage_info
[i
- 1] = NULL
;
7855 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7856 unsigned long npages
)
7860 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7865 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7866 slot
->base_gfn
, level
) + 1;
7868 slot
->arch
.rmap
[i
] =
7869 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7870 if (!slot
->arch
.rmap
[i
])
7875 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7876 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7877 if (!slot
->arch
.lpage_info
[i
- 1])
7880 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7881 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7882 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7883 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7884 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7886 * If the gfn and userspace address are not aligned wrt each
7887 * other, or if explicitly asked to, disable large page
7888 * support for this slot
7890 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7891 !kvm_largepages_enabled()) {
7894 for (j
= 0; j
< lpages
; ++j
)
7895 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7902 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7903 kvfree(slot
->arch
.rmap
[i
]);
7904 slot
->arch
.rmap
[i
] = NULL
;
7908 kvfree(slot
->arch
.lpage_info
[i
- 1]);
7909 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7914 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
7917 * memslots->generation has been incremented.
7918 * mmio generation may have reached its maximum value.
7920 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
7923 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7924 struct kvm_memory_slot
*memslot
,
7925 const struct kvm_userspace_memory_region
*mem
,
7926 enum kvm_mr_change change
)
7929 * Only private memory slots need to be mapped here since
7930 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7932 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7933 unsigned long userspace_addr
;
7936 * MAP_SHARED to prevent internal slot pages from being moved
7939 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7940 PROT_READ
| PROT_WRITE
,
7941 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7943 if (IS_ERR((void *)userspace_addr
))
7944 return PTR_ERR((void *)userspace_addr
);
7946 memslot
->userspace_addr
= userspace_addr
;
7952 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
7953 struct kvm_memory_slot
*new)
7955 /* Still write protect RO slot */
7956 if (new->flags
& KVM_MEM_READONLY
) {
7957 kvm_mmu_slot_remove_write_access(kvm
, new);
7962 * Call kvm_x86_ops dirty logging hooks when they are valid.
7964 * kvm_x86_ops->slot_disable_log_dirty is called when:
7966 * - KVM_MR_CREATE with dirty logging is disabled
7967 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7969 * The reason is, in case of PML, we need to set D-bit for any slots
7970 * with dirty logging disabled in order to eliminate unnecessary GPA
7971 * logging in PML buffer (and potential PML buffer full VMEXT). This
7972 * guarantees leaving PML enabled during guest's lifetime won't have
7973 * any additonal overhead from PML when guest is running with dirty
7974 * logging disabled for memory slots.
7976 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7977 * to dirty logging mode.
7979 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7981 * In case of write protect:
7983 * Write protect all pages for dirty logging.
7985 * All the sptes including the large sptes which point to this
7986 * slot are set to readonly. We can not create any new large
7987 * spte on this slot until the end of the logging.
7989 * See the comments in fast_page_fault().
7991 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
7992 if (kvm_x86_ops
->slot_enable_log_dirty
)
7993 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
7995 kvm_mmu_slot_remove_write_access(kvm
, new);
7997 if (kvm_x86_ops
->slot_disable_log_dirty
)
7998 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8002 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8003 const struct kvm_userspace_memory_region
*mem
,
8004 const struct kvm_memory_slot
*old
,
8005 const struct kvm_memory_slot
*new,
8006 enum kvm_mr_change change
)
8008 int nr_mmu_pages
= 0;
8010 if (change
== KVM_MR_DELETE
&& old
->id
>= KVM_USER_MEM_SLOTS
) {
8013 ret
= vm_munmap(old
->userspace_addr
,
8014 old
->npages
* PAGE_SIZE
);
8017 "kvm_vm_ioctl_set_memory_region: "
8018 "failed to munmap memory\n");
8021 if (!kvm
->arch
.n_requested_mmu_pages
)
8022 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8025 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8028 * Dirty logging tracks sptes in 4k granularity, meaning that large
8029 * sptes have to be split. If live migration is successful, the guest
8030 * in the source machine will be destroyed and large sptes will be
8031 * created in the destination. However, if the guest continues to run
8032 * in the source machine (for example if live migration fails), small
8033 * sptes will remain around and cause bad performance.
8035 * Scan sptes if dirty logging has been stopped, dropping those
8036 * which can be collapsed into a single large-page spte. Later
8037 * page faults will create the large-page sptes.
8039 if ((change
!= KVM_MR_DELETE
) &&
8040 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8041 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8042 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8045 * Set up write protection and/or dirty logging for the new slot.
8047 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8048 * been zapped so no dirty logging staff is needed for old slot. For
8049 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8050 * new and it's also covered when dealing with the new slot.
8052 * FIXME: const-ify all uses of struct kvm_memory_slot.
8054 if (change
!= KVM_MR_DELETE
)
8055 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8058 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8060 kvm_mmu_invalidate_zap_all_pages(kvm
);
8063 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8064 struct kvm_memory_slot
*slot
)
8066 kvm_mmu_invalidate_zap_all_pages(kvm
);
8069 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8071 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
8072 kvm_x86_ops
->check_nested_events(vcpu
, false);
8074 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
8075 !vcpu
->arch
.apf
.halted
)
8076 || !list_empty_careful(&vcpu
->async_pf
.done
)
8077 || kvm_apic_has_events(vcpu
)
8078 || vcpu
->arch
.pv
.pv_unhalted
8079 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
8080 (kvm_arch_interrupt_allowed(vcpu
) &&
8081 kvm_cpu_has_interrupt(vcpu
));
8084 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8086 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8089 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8091 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8094 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8096 if (is_64_bit_mode(vcpu
))
8097 return kvm_rip_read(vcpu
);
8098 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8099 kvm_rip_read(vcpu
));
8101 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8103 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8105 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8107 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8109 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8111 unsigned long rflags
;
8113 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8114 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8115 rflags
&= ~X86_EFLAGS_TF
;
8118 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8120 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8122 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8123 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8124 rflags
|= X86_EFLAGS_TF
;
8125 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8128 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8130 __kvm_set_rflags(vcpu
, rflags
);
8131 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8133 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8135 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8139 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8143 r
= kvm_mmu_reload(vcpu
);
8147 if (!vcpu
->arch
.mmu
.direct_map
&&
8148 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8151 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8154 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8156 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8159 static inline u32
kvm_async_pf_next_probe(u32 key
)
8161 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8164 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8166 u32 key
= kvm_async_pf_hash_fn(gfn
);
8168 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8169 key
= kvm_async_pf_next_probe(key
);
8171 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8174 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8177 u32 key
= kvm_async_pf_hash_fn(gfn
);
8179 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8180 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8181 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8182 key
= kvm_async_pf_next_probe(key
);
8187 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8189 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8192 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8196 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8198 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8200 j
= kvm_async_pf_next_probe(j
);
8201 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8203 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8205 * k lies cyclically in ]i,j]
8207 * |....j i.k.| or |.k..j i...|
8209 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8210 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8215 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8218 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8222 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8223 struct kvm_async_pf
*work
)
8225 struct x86_exception fault
;
8227 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8228 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8230 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8231 (vcpu
->arch
.apf
.send_user_only
&&
8232 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8233 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8234 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8235 fault
.vector
= PF_VECTOR
;
8236 fault
.error_code_valid
= true;
8237 fault
.error_code
= 0;
8238 fault
.nested_page_fault
= false;
8239 fault
.address
= work
->arch
.token
;
8240 kvm_inject_page_fault(vcpu
, &fault
);
8244 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8245 struct kvm_async_pf
*work
)
8247 struct x86_exception fault
;
8249 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8250 if (work
->wakeup_all
)
8251 work
->arch
.token
= ~0; /* broadcast wakeup */
8253 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8255 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8256 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8257 fault
.vector
= PF_VECTOR
;
8258 fault
.error_code_valid
= true;
8259 fault
.error_code
= 0;
8260 fault
.nested_page_fault
= false;
8261 fault
.address
= work
->arch
.token
;
8262 kvm_inject_page_fault(vcpu
, &fault
);
8264 vcpu
->arch
.apf
.halted
= false;
8265 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8268 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8270 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8273 return !kvm_event_needs_reinjection(vcpu
) &&
8274 kvm_x86_ops
->interrupt_allowed(vcpu
);
8277 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8279 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8281 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8283 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8285 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8287 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8289 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8291 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8293 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8295 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8296 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);