2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
58 #include <trace/events/kvm.h>
60 #include <asm/debugreg.h>
64 #include <linux/kernel_stat.h>
65 #include <asm/fpu/internal.h> /* Ugh! */
66 #include <asm/pvclock.h>
67 #include <asm/div64.h>
68 #include <asm/irq_remapping.h>
70 #define CREATE_TRACE_POINTS
73 #define MAX_IO_MSRS 256
74 #define KVM_MAX_MCE_BANKS 32
75 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
78 #define emul_to_vcpu(ctxt) \
79 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
82 * - enable syscall per default because its emulated by KVM
83 * - enable LME and LMA per default on 64 bit KVM
87 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
89 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
96 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
98 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
99 static void process_nmi(struct kvm_vcpu
*vcpu
);
100 static void enter_smm(struct kvm_vcpu
*vcpu
);
101 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
103 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
104 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
106 static bool __read_mostly ignore_msrs
= 0;
107 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
109 unsigned int min_timer_period_us
= 500;
110 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
112 static bool __read_mostly kvmclock_periodic_sync
= true;
113 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
115 bool __read_mostly kvm_has_tsc_control
;
116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
117 u32 __read_mostly kvm_max_guest_tsc_khz
;
118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
119 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
121 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
123 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
127 static u32 __read_mostly tsc_tolerance_ppm
= 250;
128 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
131 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
132 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
134 static bool __read_mostly vector_hashing
= true;
135 module_param(vector_hashing
, bool, S_IRUGO
);
137 static bool __read_mostly backwards_tsc_observed
= false;
139 #define KVM_NR_SHARED_MSRS 16
141 struct kvm_shared_msrs_global
{
143 u32 msrs
[KVM_NR_SHARED_MSRS
];
146 struct kvm_shared_msrs
{
147 struct user_return_notifier urn
;
149 struct kvm_shared_msr_values
{
152 } values
[KVM_NR_SHARED_MSRS
];
155 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
156 static struct kvm_shared_msrs __percpu
*shared_msrs
;
158 struct kvm_stats_debugfs_item debugfs_entries
[] = {
159 { "pf_fixed", VCPU_STAT(pf_fixed
) },
160 { "pf_guest", VCPU_STAT(pf_guest
) },
161 { "tlb_flush", VCPU_STAT(tlb_flush
) },
162 { "invlpg", VCPU_STAT(invlpg
) },
163 { "exits", VCPU_STAT(exits
) },
164 { "io_exits", VCPU_STAT(io_exits
) },
165 { "mmio_exits", VCPU_STAT(mmio_exits
) },
166 { "signal_exits", VCPU_STAT(signal_exits
) },
167 { "irq_window", VCPU_STAT(irq_window_exits
) },
168 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
169 { "halt_exits", VCPU_STAT(halt_exits
) },
170 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
171 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
172 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
173 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
174 { "hypercalls", VCPU_STAT(hypercalls
) },
175 { "request_irq", VCPU_STAT(request_irq_exits
) },
176 { "irq_exits", VCPU_STAT(irq_exits
) },
177 { "host_state_reload", VCPU_STAT(host_state_reload
) },
178 { "efer_reload", VCPU_STAT(efer_reload
) },
179 { "fpu_reload", VCPU_STAT(fpu_reload
) },
180 { "insn_emulation", VCPU_STAT(insn_emulation
) },
181 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
182 { "irq_injections", VCPU_STAT(irq_injections
) },
183 { "nmi_injections", VCPU_STAT(nmi_injections
) },
184 { "req_event", VCPU_STAT(req_event
) },
185 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
186 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
187 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
188 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
189 { "mmu_flooded", VM_STAT(mmu_flooded
) },
190 { "mmu_recycled", VM_STAT(mmu_recycled
) },
191 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
192 { "mmu_unsync", VM_STAT(mmu_unsync
) },
193 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
194 { "largepages", VM_STAT(lpages
) },
195 { "max_mmu_page_hash_collisions",
196 VM_STAT(max_mmu_page_hash_collisions
) },
200 u64 __read_mostly host_xcr0
;
202 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
204 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
207 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
208 vcpu
->arch
.apf
.gfns
[i
] = ~0;
211 static void kvm_on_user_return(struct user_return_notifier
*urn
)
214 struct kvm_shared_msrs
*locals
215 = container_of(urn
, struct kvm_shared_msrs
, urn
);
216 struct kvm_shared_msr_values
*values
;
220 * Disabling irqs at this point since the following code could be
221 * interrupted and executed through kvm_arch_hardware_disable()
223 local_irq_save(flags
);
224 if (locals
->registered
) {
225 locals
->registered
= false;
226 user_return_notifier_unregister(urn
);
228 local_irq_restore(flags
);
229 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
230 values
= &locals
->values
[slot
];
231 if (values
->host
!= values
->curr
) {
232 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
233 values
->curr
= values
->host
;
238 static void shared_msr_update(unsigned slot
, u32 msr
)
241 unsigned int cpu
= smp_processor_id();
242 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
244 /* only read, and nobody should modify it at this time,
245 * so don't need lock */
246 if (slot
>= shared_msrs_global
.nr
) {
247 printk(KERN_ERR
"kvm: invalid MSR slot!");
250 rdmsrl_safe(msr
, &value
);
251 smsr
->values
[slot
].host
= value
;
252 smsr
->values
[slot
].curr
= value
;
255 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
257 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
258 shared_msrs_global
.msrs
[slot
] = msr
;
259 if (slot
>= shared_msrs_global
.nr
)
260 shared_msrs_global
.nr
= slot
+ 1;
262 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
264 static void kvm_shared_msr_cpu_online(void)
268 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
269 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
272 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
274 unsigned int cpu
= smp_processor_id();
275 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
278 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
280 smsr
->values
[slot
].curr
= value
;
281 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
285 if (!smsr
->registered
) {
286 smsr
->urn
.on_user_return
= kvm_on_user_return
;
287 user_return_notifier_register(&smsr
->urn
);
288 smsr
->registered
= true;
292 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
294 static void drop_user_return_notifiers(void)
296 unsigned int cpu
= smp_processor_id();
297 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
299 if (smsr
->registered
)
300 kvm_on_user_return(&smsr
->urn
);
303 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
305 return vcpu
->arch
.apic_base
;
307 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
309 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
311 u64 old_state
= vcpu
->arch
.apic_base
&
312 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
313 u64 new_state
= msr_info
->data
&
314 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
315 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
316 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
318 if (!msr_info
->host_initiated
&&
319 ((msr_info
->data
& reserved_bits
) != 0 ||
320 new_state
== X2APIC_ENABLE
||
321 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
322 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
323 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
327 kvm_lapic_set_base(vcpu
, msr_info
->data
);
330 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
332 asmlinkage __visible
void kvm_spurious_fault(void)
334 /* Fault while not rebooting. We want the trace. */
337 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
339 #define EXCPT_BENIGN 0
340 #define EXCPT_CONTRIBUTORY 1
343 static int exception_class(int vector
)
353 return EXCPT_CONTRIBUTORY
;
360 #define EXCPT_FAULT 0
362 #define EXCPT_ABORT 2
363 #define EXCPT_INTERRUPT 3
365 static int exception_type(int vector
)
369 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
370 return EXCPT_INTERRUPT
;
374 /* #DB is trap, as instruction watchpoints are handled elsewhere */
375 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
378 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
381 /* Reserved exceptions will result in fault */
385 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
386 unsigned nr
, bool has_error
, u32 error_code
,
392 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
394 if (!vcpu
->arch
.exception
.pending
) {
396 if (has_error
&& !is_protmode(vcpu
))
398 vcpu
->arch
.exception
.pending
= true;
399 vcpu
->arch
.exception
.has_error_code
= has_error
;
400 vcpu
->arch
.exception
.nr
= nr
;
401 vcpu
->arch
.exception
.error_code
= error_code
;
402 vcpu
->arch
.exception
.reinject
= reinject
;
406 /* to check exception */
407 prev_nr
= vcpu
->arch
.exception
.nr
;
408 if (prev_nr
== DF_VECTOR
) {
409 /* triple fault -> shutdown */
410 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
413 class1
= exception_class(prev_nr
);
414 class2
= exception_class(nr
);
415 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
416 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
417 /* generate double fault per SDM Table 5-5 */
418 vcpu
->arch
.exception
.pending
= true;
419 vcpu
->arch
.exception
.has_error_code
= true;
420 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
421 vcpu
->arch
.exception
.error_code
= 0;
423 /* replace previous exception with a new one in a hope
424 that instruction re-execution will regenerate lost
429 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
431 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
433 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
435 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
437 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
439 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
441 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
444 kvm_inject_gp(vcpu
, 0);
446 return kvm_skip_emulated_instruction(vcpu
);
450 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
452 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
454 ++vcpu
->stat
.pf_guest
;
455 vcpu
->arch
.cr2
= fault
->address
;
456 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
458 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
460 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
462 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
463 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
465 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
467 return fault
->nested_page_fault
;
470 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
472 atomic_inc(&vcpu
->arch
.nmi_queued
);
473 kvm_make_request(KVM_REQ_NMI
, vcpu
);
475 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
477 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
479 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
481 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
483 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
485 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
487 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
490 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
491 * a #GP and return false.
493 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
495 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
497 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
500 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
502 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
504 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
507 kvm_queue_exception(vcpu
, UD_VECTOR
);
510 EXPORT_SYMBOL_GPL(kvm_require_dr
);
513 * This function will be used to read from the physical memory of the currently
514 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
515 * can read from guest physical or from the guest's guest physical memory.
517 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
518 gfn_t ngfn
, void *data
, int offset
, int len
,
521 struct x86_exception exception
;
525 ngpa
= gfn_to_gpa(ngfn
);
526 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
527 if (real_gfn
== UNMAPPED_GVA
)
530 real_gfn
= gpa_to_gfn(real_gfn
);
532 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
534 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
536 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
537 void *data
, int offset
, int len
, u32 access
)
539 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
540 data
, offset
, len
, access
);
544 * Load the pae pdptrs. Return true is they are all valid.
546 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
548 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
549 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
552 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
554 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
555 offset
* sizeof(u64
), sizeof(pdpte
),
556 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
561 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
562 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
564 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
571 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
572 __set_bit(VCPU_EXREG_PDPTR
,
573 (unsigned long *)&vcpu
->arch
.regs_avail
);
574 __set_bit(VCPU_EXREG_PDPTR
,
575 (unsigned long *)&vcpu
->arch
.regs_dirty
);
580 EXPORT_SYMBOL_GPL(load_pdptrs
);
582 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
584 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
590 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
593 if (!test_bit(VCPU_EXREG_PDPTR
,
594 (unsigned long *)&vcpu
->arch
.regs_avail
))
597 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
598 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
599 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
600 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
603 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
608 EXPORT_SYMBOL_GPL(pdptrs_changed
);
610 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
612 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
613 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
618 if (cr0
& 0xffffffff00000000UL
)
622 cr0
&= ~CR0_RESERVED_BITS
;
624 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
627 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
630 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
632 if ((vcpu
->arch
.efer
& EFER_LME
)) {
637 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
642 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
647 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
650 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
652 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
653 kvm_clear_async_pf_completion_queue(vcpu
);
654 kvm_async_pf_hash_reset(vcpu
);
657 if ((cr0
^ old_cr0
) & update_bits
)
658 kvm_mmu_reset_context(vcpu
);
660 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
661 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
662 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
663 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
667 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
669 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
671 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
673 EXPORT_SYMBOL_GPL(kvm_lmsw
);
675 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
677 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
678 !vcpu
->guest_xcr0_loaded
) {
679 /* kvm_set_xcr() also depends on this */
680 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
681 vcpu
->guest_xcr0_loaded
= 1;
685 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
687 if (vcpu
->guest_xcr0_loaded
) {
688 if (vcpu
->arch
.xcr0
!= host_xcr0
)
689 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
690 vcpu
->guest_xcr0_loaded
= 0;
694 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
697 u64 old_xcr0
= vcpu
->arch
.xcr0
;
700 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
701 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
703 if (!(xcr0
& XFEATURE_MASK_FP
))
705 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
709 * Do not allow the guest to set bits that we do not support
710 * saving. However, xcr0 bit 0 is always set, even if the
711 * emulated CPU does not support XSAVE (see fx_init).
713 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
714 if (xcr0
& ~valid_bits
)
717 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
718 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
721 if (xcr0
& XFEATURE_MASK_AVX512
) {
722 if (!(xcr0
& XFEATURE_MASK_YMM
))
724 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
727 vcpu
->arch
.xcr0
= xcr0
;
729 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
730 kvm_update_cpuid(vcpu
);
734 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
736 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
737 __kvm_set_xcr(vcpu
, index
, xcr
)) {
738 kvm_inject_gp(vcpu
, 0);
743 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
745 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
747 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
748 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
749 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
751 if (cr4
& CR4_RESERVED_BITS
)
754 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
757 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
760 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
763 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
766 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
769 if (is_long_mode(vcpu
)) {
770 if (!(cr4
& X86_CR4_PAE
))
772 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
773 && ((cr4
^ old_cr4
) & pdptr_bits
)
774 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
778 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
779 if (!guest_cpuid_has_pcid(vcpu
))
782 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
783 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
787 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
790 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
791 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
792 kvm_mmu_reset_context(vcpu
);
794 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
795 kvm_update_cpuid(vcpu
);
799 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
801 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
804 cr3
&= ~CR3_PCID_INVD
;
807 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
808 kvm_mmu_sync_roots(vcpu
);
809 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
813 if (is_long_mode(vcpu
)) {
814 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
816 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
817 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
820 vcpu
->arch
.cr3
= cr3
;
821 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
822 kvm_mmu_new_cr3(vcpu
);
825 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
827 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
829 if (cr8
& CR8_RESERVED_BITS
)
831 if (lapic_in_kernel(vcpu
))
832 kvm_lapic_set_tpr(vcpu
, cr8
);
834 vcpu
->arch
.cr8
= cr8
;
837 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
839 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
841 if (lapic_in_kernel(vcpu
))
842 return kvm_lapic_get_cr8(vcpu
);
844 return vcpu
->arch
.cr8
;
846 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
848 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
852 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
853 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
854 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
855 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
859 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
861 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
862 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
865 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
869 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
870 dr7
= vcpu
->arch
.guest_debug_dr7
;
872 dr7
= vcpu
->arch
.dr7
;
873 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
874 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
875 if (dr7
& DR7_BP_EN_MASK
)
876 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
879 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
881 u64 fixed
= DR6_FIXED_1
;
883 if (!guest_cpuid_has_rtm(vcpu
))
888 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
892 vcpu
->arch
.db
[dr
] = val
;
893 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
894 vcpu
->arch
.eff_db
[dr
] = val
;
899 if (val
& 0xffffffff00000000ULL
)
901 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
902 kvm_update_dr6(vcpu
);
907 if (val
& 0xffffffff00000000ULL
)
909 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
910 kvm_update_dr7(vcpu
);
917 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
919 if (__kvm_set_dr(vcpu
, dr
, val
)) {
920 kvm_inject_gp(vcpu
, 0);
925 EXPORT_SYMBOL_GPL(kvm_set_dr
);
927 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
931 *val
= vcpu
->arch
.db
[dr
];
936 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
937 *val
= vcpu
->arch
.dr6
;
939 *val
= kvm_x86_ops
->get_dr6(vcpu
);
944 *val
= vcpu
->arch
.dr7
;
949 EXPORT_SYMBOL_GPL(kvm_get_dr
);
951 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
953 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
957 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
960 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
961 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
964 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
967 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
968 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
970 * This list is modified at module load time to reflect the
971 * capabilities of the host cpu. This capabilities test skips MSRs that are
972 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
973 * may depend on host virtualization features rather than host cpu features.
976 static u32 msrs_to_save
[] = {
977 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
980 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
982 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
983 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
986 static unsigned num_msrs_to_save
;
988 static u32 emulated_msrs
[] = {
989 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
990 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
991 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
992 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
993 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
994 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
997 HV_X64_MSR_VP_RUNTIME
,
999 HV_X64_MSR_STIMER0_CONFIG
,
1000 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1003 MSR_IA32_TSC_ADJUST
,
1004 MSR_IA32_TSCDEADLINE
,
1005 MSR_IA32_MISC_ENABLE
,
1006 MSR_IA32_MCG_STATUS
,
1008 MSR_IA32_MCG_EXT_CTL
,
1011 MSR_MISC_FEATURES_ENABLES
,
1014 static unsigned num_emulated_msrs
;
1016 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1018 if (efer
& efer_reserved_bits
)
1021 if (efer
& EFER_FFXSR
) {
1022 struct kvm_cpuid_entry2
*feat
;
1024 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1025 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1029 if (efer
& EFER_SVME
) {
1030 struct kvm_cpuid_entry2
*feat
;
1032 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1033 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1039 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1041 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1043 u64 old_efer
= vcpu
->arch
.efer
;
1045 if (!kvm_valid_efer(vcpu
, efer
))
1049 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1053 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1055 kvm_x86_ops
->set_efer(vcpu
, efer
);
1057 /* Update reserved bits */
1058 if ((efer
^ old_efer
) & EFER_NX
)
1059 kvm_mmu_reset_context(vcpu
);
1064 void kvm_enable_efer_bits(u64 mask
)
1066 efer_reserved_bits
&= ~mask
;
1068 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1071 * Writes msr value into into the appropriate "register".
1072 * Returns 0 on success, non-0 otherwise.
1073 * Assumes vcpu_load() was already called.
1075 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1077 switch (msr
->index
) {
1080 case MSR_KERNEL_GS_BASE
:
1083 if (is_noncanonical_address(msr
->data
))
1086 case MSR_IA32_SYSENTER_EIP
:
1087 case MSR_IA32_SYSENTER_ESP
:
1089 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1090 * non-canonical address is written on Intel but not on
1091 * AMD (which ignores the top 32-bits, because it does
1092 * not implement 64-bit SYSENTER).
1094 * 64-bit code should hence be able to write a non-canonical
1095 * value on AMD. Making the address canonical ensures that
1096 * vmentry does not fail on Intel after writing a non-canonical
1097 * value, and that something deterministic happens if the guest
1098 * invokes 64-bit SYSENTER.
1100 msr
->data
= get_canonical(msr
->data
);
1102 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1104 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1107 * Adapt set_msr() to msr_io()'s calling convention
1109 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1111 struct msr_data msr
;
1115 msr
.host_initiated
= true;
1116 r
= kvm_get_msr(vcpu
, &msr
);
1124 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1126 struct msr_data msr
;
1130 msr
.host_initiated
= true;
1131 return kvm_set_msr(vcpu
, &msr
);
1134 #ifdef CONFIG_X86_64
1135 struct pvclock_gtod_data
{
1138 struct { /* extract of a clocksource struct */
1151 static struct pvclock_gtod_data pvclock_gtod_data
;
1153 static void update_pvclock_gtod(struct timekeeper
*tk
)
1155 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1158 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1160 write_seqcount_begin(&vdata
->seq
);
1162 /* copy pvclock gtod data */
1163 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1164 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1165 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1166 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1167 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1169 vdata
->boot_ns
= boot_ns
;
1170 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1172 vdata
->wall_time_sec
= tk
->xtime_sec
;
1174 write_seqcount_end(&vdata
->seq
);
1178 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1181 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1182 * vcpu_enter_guest. This function is only called from
1183 * the physical CPU that is running vcpu.
1185 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1188 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1192 struct pvclock_wall_clock wc
;
1193 struct timespec64 boot
;
1198 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1203 ++version
; /* first time write, random junk */
1207 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1211 * The guest calculates current wall clock time by adding
1212 * system time (updated by kvm_guest_time_update below) to the
1213 * wall clock specified here. guest system time equals host
1214 * system time for us, thus we must fill in host boot time here.
1216 getboottime64(&boot
);
1218 if (kvm
->arch
.kvmclock_offset
) {
1219 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1220 boot
= timespec64_sub(boot
, ts
);
1222 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1223 wc
.nsec
= boot
.tv_nsec
;
1224 wc
.version
= version
;
1226 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1229 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1232 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1234 do_shl32_div32(dividend
, divisor
);
1238 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1239 s8
*pshift
, u32
*pmultiplier
)
1247 scaled64
= scaled_hz
;
1248 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1253 tps32
= (uint32_t)tps64
;
1254 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1255 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1263 *pmultiplier
= div_frac(scaled64
, tps32
);
1265 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1266 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1269 #ifdef CONFIG_X86_64
1270 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1273 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1274 static unsigned long max_tsc_khz
;
1276 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1278 u64 v
= (u64
)khz
* (1000000 + ppm
);
1283 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1287 /* Guest TSC same frequency as host TSC? */
1289 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1293 /* TSC scaling supported? */
1294 if (!kvm_has_tsc_control
) {
1295 if (user_tsc_khz
> tsc_khz
) {
1296 vcpu
->arch
.tsc_catchup
= 1;
1297 vcpu
->arch
.tsc_always_catchup
= 1;
1300 WARN(1, "user requested TSC rate below hardware speed\n");
1305 /* TSC scaling required - calculate ratio */
1306 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1307 user_tsc_khz
, tsc_khz
);
1309 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1310 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1315 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1319 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1321 u32 thresh_lo
, thresh_hi
;
1322 int use_scaling
= 0;
1324 /* tsc_khz can be zero if TSC calibration fails */
1325 if (user_tsc_khz
== 0) {
1326 /* set tsc_scaling_ratio to a safe value */
1327 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1331 /* Compute a scale to convert nanoseconds in TSC cycles */
1332 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1333 &vcpu
->arch
.virtual_tsc_shift
,
1334 &vcpu
->arch
.virtual_tsc_mult
);
1335 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1338 * Compute the variation in TSC rate which is acceptable
1339 * within the range of tolerance and decide if the
1340 * rate being applied is within that bounds of the hardware
1341 * rate. If so, no scaling or compensation need be done.
1343 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1344 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1345 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1346 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1349 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1352 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1354 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1355 vcpu
->arch
.virtual_tsc_mult
,
1356 vcpu
->arch
.virtual_tsc_shift
);
1357 tsc
+= vcpu
->arch
.this_tsc_write
;
1361 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1363 #ifdef CONFIG_X86_64
1365 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1366 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1368 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1369 atomic_read(&vcpu
->kvm
->online_vcpus
));
1372 * Once the masterclock is enabled, always perform request in
1373 * order to update it.
1375 * In order to enable masterclock, the host clocksource must be TSC
1376 * and the vcpus need to have matched TSCs. When that happens,
1377 * perform request to enable masterclock.
1379 if (ka
->use_master_clock
||
1380 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1381 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1383 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1384 atomic_read(&vcpu
->kvm
->online_vcpus
),
1385 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1389 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1391 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1392 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1396 * Multiply tsc by a fixed point number represented by ratio.
1398 * The most significant 64-N bits (mult) of ratio represent the
1399 * integral part of the fixed point number; the remaining N bits
1400 * (frac) represent the fractional part, ie. ratio represents a fixed
1401 * point number (mult + frac * 2^(-N)).
1403 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1405 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1407 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1410 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1413 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1415 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1416 _tsc
= __scale_tsc(ratio
, tsc
);
1420 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1422 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1426 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1428 return target_tsc
- tsc
;
1431 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1433 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1435 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1437 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1439 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1440 vcpu
->arch
.tsc_offset
= offset
;
1443 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1445 struct kvm
*kvm
= vcpu
->kvm
;
1446 u64 offset
, ns
, elapsed
;
1447 unsigned long flags
;
1449 bool already_matched
;
1450 u64 data
= msr
->data
;
1451 bool synchronizing
= false;
1453 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1454 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1455 ns
= ktime_get_boot_ns();
1456 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1458 if (vcpu
->arch
.virtual_tsc_khz
) {
1459 if (data
== 0 && msr
->host_initiated
) {
1461 * detection of vcpu initialization -- need to sync
1462 * with other vCPUs. This particularly helps to keep
1463 * kvm_clock stable after CPU hotplug
1465 synchronizing
= true;
1467 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1468 nsec_to_cycles(vcpu
, elapsed
);
1469 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1471 * Special case: TSC write with a small delta (1 second)
1472 * of virtual cycle time against real time is
1473 * interpreted as an attempt to synchronize the CPU.
1475 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1476 data
+ tsc_hz
> tsc_exp
;
1481 * For a reliable TSC, we can match TSC offsets, and for an unstable
1482 * TSC, we add elapsed time in this computation. We could let the
1483 * compensation code attempt to catch up if we fall behind, but
1484 * it's better to try to match offsets from the beginning.
1486 if (synchronizing
&&
1487 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1488 if (!check_tsc_unstable()) {
1489 offset
= kvm
->arch
.cur_tsc_offset
;
1490 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1492 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1494 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1495 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1498 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1501 * We split periods of matched TSC writes into generations.
1502 * For each generation, we track the original measured
1503 * nanosecond time, offset, and write, so if TSCs are in
1504 * sync, we can match exact offset, and if not, we can match
1505 * exact software computation in compute_guest_tsc()
1507 * These values are tracked in kvm->arch.cur_xxx variables.
1509 kvm
->arch
.cur_tsc_generation
++;
1510 kvm
->arch
.cur_tsc_nsec
= ns
;
1511 kvm
->arch
.cur_tsc_write
= data
;
1512 kvm
->arch
.cur_tsc_offset
= offset
;
1514 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1515 kvm
->arch
.cur_tsc_generation
, data
);
1519 * We also track th most recent recorded KHZ, write and time to
1520 * allow the matching interval to be extended at each write.
1522 kvm
->arch
.last_tsc_nsec
= ns
;
1523 kvm
->arch
.last_tsc_write
= data
;
1524 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1526 vcpu
->arch
.last_guest_tsc
= data
;
1528 /* Keep track of which generation this VCPU has synchronized to */
1529 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1530 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1531 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1533 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1534 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1535 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1536 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1538 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1540 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1541 } else if (!already_matched
) {
1542 kvm
->arch
.nr_vcpus_matched_tsc
++;
1545 kvm_track_tsc_matching(vcpu
);
1546 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1549 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1551 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1554 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1557 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1559 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1560 WARN_ON(adjustment
< 0);
1561 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1562 adjust_tsc_offset_guest(vcpu
, adjustment
);
1565 #ifdef CONFIG_X86_64
1567 static u64
read_tsc(void)
1569 u64 ret
= (u64
)rdtsc_ordered();
1570 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1572 if (likely(ret
>= last
))
1576 * GCC likes to generate cmov here, but this branch is extremely
1577 * predictable (it's just a function of time and the likely is
1578 * very likely) and there's a data dependence, so force GCC
1579 * to generate a branch instead. I don't barrier() because
1580 * we don't actually need a barrier, and if this function
1581 * ever gets inlined it will generate worse code.
1587 static inline u64
vgettsc(u64
*cycle_now
)
1590 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1592 *cycle_now
= read_tsc();
1594 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1595 return v
* gtod
->clock
.mult
;
1598 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1600 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1606 seq
= read_seqcount_begin(>od
->seq
);
1607 mode
= gtod
->clock
.vclock_mode
;
1608 ns
= gtod
->nsec_base
;
1609 ns
+= vgettsc(cycle_now
);
1610 ns
>>= gtod
->clock
.shift
;
1611 ns
+= gtod
->boot_ns
;
1612 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1618 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1620 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1626 seq
= read_seqcount_begin(>od
->seq
);
1627 mode
= gtod
->clock
.vclock_mode
;
1628 ts
->tv_sec
= gtod
->wall_time_sec
;
1629 ns
= gtod
->nsec_base
;
1630 ns
+= vgettsc(cycle_now
);
1631 ns
>>= gtod
->clock
.shift
;
1632 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1634 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1640 /* returns true if host is using tsc clocksource */
1641 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1643 /* checked again under seqlock below */
1644 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1647 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1650 /* returns true if host is using tsc clocksource */
1651 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1654 /* checked again under seqlock below */
1655 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1658 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1664 * Assuming a stable TSC across physical CPUS, and a stable TSC
1665 * across virtual CPUs, the following condition is possible.
1666 * Each numbered line represents an event visible to both
1667 * CPUs at the next numbered event.
1669 * "timespecX" represents host monotonic time. "tscX" represents
1672 * VCPU0 on CPU0 | VCPU1 on CPU1
1674 * 1. read timespec0,tsc0
1675 * 2. | timespec1 = timespec0 + N
1677 * 3. transition to guest | transition to guest
1678 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1679 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1680 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1682 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1685 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1687 * - 0 < N - M => M < N
1689 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1690 * always the case (the difference between two distinct xtime instances
1691 * might be smaller then the difference between corresponding TSC reads,
1692 * when updating guest vcpus pvclock areas).
1694 * To avoid that problem, do not allow visibility of distinct
1695 * system_timestamp/tsc_timestamp values simultaneously: use a master
1696 * copy of host monotonic time values. Update that master copy
1699 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1703 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1705 #ifdef CONFIG_X86_64
1706 struct kvm_arch
*ka
= &kvm
->arch
;
1708 bool host_tsc_clocksource
, vcpus_matched
;
1710 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1711 atomic_read(&kvm
->online_vcpus
));
1714 * If the host uses TSC clock, then passthrough TSC as stable
1717 host_tsc_clocksource
= kvm_get_time_and_clockread(
1718 &ka
->master_kernel_ns
,
1719 &ka
->master_cycle_now
);
1721 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1722 && !backwards_tsc_observed
1723 && !ka
->boot_vcpu_runs_old_kvmclock
;
1725 if (ka
->use_master_clock
)
1726 atomic_set(&kvm_guest_has_master_clock
, 1);
1728 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1729 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1734 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1736 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1739 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1741 #ifdef CONFIG_X86_64
1743 struct kvm_vcpu
*vcpu
;
1744 struct kvm_arch
*ka
= &kvm
->arch
;
1746 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1747 kvm_make_mclock_inprogress_request(kvm
);
1748 /* no guest entries from this point */
1749 pvclock_update_vm_gtod_copy(kvm
);
1751 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1752 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1754 /* guest entries allowed */
1755 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1756 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1758 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1762 u64
get_kvmclock_ns(struct kvm
*kvm
)
1764 struct kvm_arch
*ka
= &kvm
->arch
;
1765 struct pvclock_vcpu_time_info hv_clock
;
1768 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1769 if (!ka
->use_master_clock
) {
1770 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1771 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1774 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1775 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1776 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1778 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1781 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1782 &hv_clock
.tsc_shift
,
1783 &hv_clock
.tsc_to_system_mul
);
1784 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1791 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1793 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1794 struct pvclock_vcpu_time_info guest_hv_clock
;
1796 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1797 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1800 /* This VCPU is paused, but it's legal for a guest to read another
1801 * VCPU's kvmclock, so we really have to follow the specification where
1802 * it says that version is odd if data is being modified, and even after
1805 * Version field updates must be kept separate. This is because
1806 * kvm_write_guest_cached might use a "rep movs" instruction, and
1807 * writes within a string instruction are weakly ordered. So there
1808 * are three writes overall.
1810 * As a small optimization, only write the version field in the first
1811 * and third write. The vcpu->pv_time cache is still valid, because the
1812 * version field is the first in the struct.
1814 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1816 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1817 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1819 sizeof(vcpu
->hv_clock
.version
));
1823 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1824 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1826 if (vcpu
->pvclock_set_guest_stopped_request
) {
1827 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1828 vcpu
->pvclock_set_guest_stopped_request
= false;
1831 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1833 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1835 sizeof(vcpu
->hv_clock
));
1839 vcpu
->hv_clock
.version
++;
1840 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1842 sizeof(vcpu
->hv_clock
.version
));
1845 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1847 unsigned long flags
, tgt_tsc_khz
;
1848 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1849 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1851 u64 tsc_timestamp
, host_tsc
;
1853 bool use_master_clock
;
1859 * If the host uses TSC clock, then passthrough TSC as stable
1862 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1863 use_master_clock
= ka
->use_master_clock
;
1864 if (use_master_clock
) {
1865 host_tsc
= ka
->master_cycle_now
;
1866 kernel_ns
= ka
->master_kernel_ns
;
1868 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1870 /* Keep irq disabled to prevent changes to the clock */
1871 local_irq_save(flags
);
1872 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1873 if (unlikely(tgt_tsc_khz
== 0)) {
1874 local_irq_restore(flags
);
1875 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1878 if (!use_master_clock
) {
1880 kernel_ns
= ktime_get_boot_ns();
1883 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1886 * We may have to catch up the TSC to match elapsed wall clock
1887 * time for two reasons, even if kvmclock is used.
1888 * 1) CPU could have been running below the maximum TSC rate
1889 * 2) Broken TSC compensation resets the base at each VCPU
1890 * entry to avoid unknown leaps of TSC even when running
1891 * again on the same CPU. This may cause apparent elapsed
1892 * time to disappear, and the guest to stand still or run
1895 if (vcpu
->tsc_catchup
) {
1896 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1897 if (tsc
> tsc_timestamp
) {
1898 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1899 tsc_timestamp
= tsc
;
1903 local_irq_restore(flags
);
1905 /* With all the info we got, fill in the values */
1907 if (kvm_has_tsc_control
)
1908 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1910 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1911 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1912 &vcpu
->hv_clock
.tsc_shift
,
1913 &vcpu
->hv_clock
.tsc_to_system_mul
);
1914 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1917 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1918 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1919 vcpu
->last_guest_tsc
= tsc_timestamp
;
1921 /* If the host uses TSC clocksource, then it is stable */
1923 if (use_master_clock
)
1924 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1926 vcpu
->hv_clock
.flags
= pvclock_flags
;
1928 if (vcpu
->pv_time_enabled
)
1929 kvm_setup_pvclock_page(v
);
1930 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1931 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1936 * kvmclock updates which are isolated to a given vcpu, such as
1937 * vcpu->cpu migration, should not allow system_timestamp from
1938 * the rest of the vcpus to remain static. Otherwise ntp frequency
1939 * correction applies to one vcpu's system_timestamp but not
1942 * So in those cases, request a kvmclock update for all vcpus.
1943 * We need to rate-limit these requests though, as they can
1944 * considerably slow guests that have a large number of vcpus.
1945 * The time for a remote vcpu to update its kvmclock is bound
1946 * by the delay we use to rate-limit the updates.
1949 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1951 static void kvmclock_update_fn(struct work_struct
*work
)
1954 struct delayed_work
*dwork
= to_delayed_work(work
);
1955 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1956 kvmclock_update_work
);
1957 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1958 struct kvm_vcpu
*vcpu
;
1960 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1961 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1962 kvm_vcpu_kick(vcpu
);
1966 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1968 struct kvm
*kvm
= v
->kvm
;
1970 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1971 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1972 KVMCLOCK_UPDATE_DELAY
);
1975 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1977 static void kvmclock_sync_fn(struct work_struct
*work
)
1979 struct delayed_work
*dwork
= to_delayed_work(work
);
1980 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1981 kvmclock_sync_work
);
1982 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1984 if (!kvmclock_periodic_sync
)
1987 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1988 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1989 KVMCLOCK_SYNC_PERIOD
);
1992 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1994 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1995 unsigned bank_num
= mcg_cap
& 0xff;
1998 case MSR_IA32_MCG_STATUS
:
1999 vcpu
->arch
.mcg_status
= data
;
2001 case MSR_IA32_MCG_CTL
:
2002 if (!(mcg_cap
& MCG_CTL_P
))
2004 if (data
!= 0 && data
!= ~(u64
)0)
2006 vcpu
->arch
.mcg_ctl
= data
;
2009 if (msr
>= MSR_IA32_MC0_CTL
&&
2010 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2011 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2012 /* only 0 or all 1s can be written to IA32_MCi_CTL
2013 * some Linux kernels though clear bit 10 in bank 4 to
2014 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2015 * this to avoid an uncatched #GP in the guest
2017 if ((offset
& 0x3) == 0 &&
2018 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2020 vcpu
->arch
.mce_banks
[offset
] = data
;
2028 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2030 struct kvm
*kvm
= vcpu
->kvm
;
2031 int lm
= is_long_mode(vcpu
);
2032 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2033 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2034 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2035 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2036 u32 page_num
= data
& ~PAGE_MASK
;
2037 u64 page_addr
= data
& PAGE_MASK
;
2042 if (page_num
>= blob_size
)
2045 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2050 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2059 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2061 gpa_t gpa
= data
& ~0x3f;
2063 /* Bits 2:5 are reserved, Should be zero */
2067 vcpu
->arch
.apf
.msr_val
= data
;
2069 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2070 kvm_clear_async_pf_completion_queue(vcpu
);
2071 kvm_async_pf_hash_reset(vcpu
);
2075 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2079 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2080 kvm_async_pf_wakeup_all(vcpu
);
2084 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2086 vcpu
->arch
.pv_time_enabled
= false;
2089 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2091 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2094 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2095 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2098 vcpu
->arch
.st
.steal
.preempted
= 0;
2100 if (vcpu
->arch
.st
.steal
.version
& 1)
2101 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2103 vcpu
->arch
.st
.steal
.version
+= 1;
2105 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2106 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2110 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2111 vcpu
->arch
.st
.last_steal
;
2112 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2114 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2115 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2119 vcpu
->arch
.st
.steal
.version
+= 1;
2121 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2122 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2125 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2128 u32 msr
= msr_info
->index
;
2129 u64 data
= msr_info
->data
;
2132 case MSR_AMD64_NB_CFG
:
2133 case MSR_IA32_UCODE_REV
:
2134 case MSR_IA32_UCODE_WRITE
:
2135 case MSR_VM_HSAVE_PA
:
2136 case MSR_AMD64_PATCH_LOADER
:
2137 case MSR_AMD64_BU_CFG2
:
2138 case MSR_AMD64_DC_CFG
:
2142 return set_efer(vcpu
, data
);
2144 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2145 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2146 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2147 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2149 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2154 case MSR_FAM10H_MMIO_CONF_BASE
:
2156 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2161 case MSR_IA32_DEBUGCTLMSR
:
2163 /* We support the non-activated case already */
2165 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2166 /* Values other than LBR and BTF are vendor-specific,
2167 thus reserved and should throw a #GP */
2170 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2173 case 0x200 ... 0x2ff:
2174 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2175 case MSR_IA32_APICBASE
:
2176 return kvm_set_apic_base(vcpu
, msr_info
);
2177 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2178 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2179 case MSR_IA32_TSCDEADLINE
:
2180 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2182 case MSR_IA32_TSC_ADJUST
:
2183 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2184 if (!msr_info
->host_initiated
) {
2185 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2186 adjust_tsc_offset_guest(vcpu
, adj
);
2188 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2191 case MSR_IA32_MISC_ENABLE
:
2192 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2194 case MSR_IA32_SMBASE
:
2195 if (!msr_info
->host_initiated
)
2197 vcpu
->arch
.smbase
= data
;
2199 case MSR_KVM_WALL_CLOCK_NEW
:
2200 case MSR_KVM_WALL_CLOCK
:
2201 vcpu
->kvm
->arch
.wall_clock
= data
;
2202 kvm_write_wall_clock(vcpu
->kvm
, data
);
2204 case MSR_KVM_SYSTEM_TIME_NEW
:
2205 case MSR_KVM_SYSTEM_TIME
: {
2206 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2208 kvmclock_reset(vcpu
);
2210 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2211 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2213 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2214 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2216 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2219 vcpu
->arch
.time
= data
;
2220 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2222 /* we verify if the enable bit is set... */
2226 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2227 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2228 sizeof(struct pvclock_vcpu_time_info
)))
2229 vcpu
->arch
.pv_time_enabled
= false;
2231 vcpu
->arch
.pv_time_enabled
= true;
2235 case MSR_KVM_ASYNC_PF_EN
:
2236 if (kvm_pv_enable_async_pf(vcpu
, data
))
2239 case MSR_KVM_STEAL_TIME
:
2241 if (unlikely(!sched_info_on()))
2244 if (data
& KVM_STEAL_RESERVED_MASK
)
2247 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2248 data
& KVM_STEAL_VALID_BITS
,
2249 sizeof(struct kvm_steal_time
)))
2252 vcpu
->arch
.st
.msr_val
= data
;
2254 if (!(data
& KVM_MSR_ENABLED
))
2257 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2260 case MSR_KVM_PV_EOI_EN
:
2261 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2265 case MSR_IA32_MCG_CTL
:
2266 case MSR_IA32_MCG_STATUS
:
2267 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2268 return set_msr_mce(vcpu
, msr
, data
);
2270 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2271 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2272 pr
= true; /* fall through */
2273 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2274 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2275 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2276 return kvm_pmu_set_msr(vcpu
, msr_info
);
2278 if (pr
|| data
!= 0)
2279 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2280 "0x%x data 0x%llx\n", msr
, data
);
2282 case MSR_K7_CLK_CTL
:
2284 * Ignore all writes to this no longer documented MSR.
2285 * Writes are only relevant for old K7 processors,
2286 * all pre-dating SVM, but a recommended workaround from
2287 * AMD for these chips. It is possible to specify the
2288 * affected processor models on the command line, hence
2289 * the need to ignore the workaround.
2292 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2293 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2294 case HV_X64_MSR_CRASH_CTL
:
2295 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2296 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2297 msr_info
->host_initiated
);
2298 case MSR_IA32_BBL_CR_CTL3
:
2299 /* Drop writes to this legacy MSR -- see rdmsr
2300 * counterpart for further detail.
2302 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2304 case MSR_AMD64_OSVW_ID_LENGTH
:
2305 if (!guest_cpuid_has_osvw(vcpu
))
2307 vcpu
->arch
.osvw
.length
= data
;
2309 case MSR_AMD64_OSVW_STATUS
:
2310 if (!guest_cpuid_has_osvw(vcpu
))
2312 vcpu
->arch
.osvw
.status
= data
;
2314 case MSR_PLATFORM_INFO
:
2315 if (!msr_info
->host_initiated
||
2316 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2317 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2318 cpuid_fault_enabled(vcpu
)))
2320 vcpu
->arch
.msr_platform_info
= data
;
2322 case MSR_MISC_FEATURES_ENABLES
:
2323 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2324 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2325 !supports_cpuid_fault(vcpu
)))
2327 vcpu
->arch
.msr_misc_features_enables
= data
;
2330 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2331 return xen_hvm_config(vcpu
, data
);
2332 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2333 return kvm_pmu_set_msr(vcpu
, msr_info
);
2335 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2339 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2346 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2350 * Reads an msr value (of 'msr_index') into 'pdata'.
2351 * Returns 0 on success, non-0 otherwise.
2352 * Assumes vcpu_load() was already called.
2354 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2356 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2358 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2360 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2363 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2364 unsigned bank_num
= mcg_cap
& 0xff;
2367 case MSR_IA32_P5_MC_ADDR
:
2368 case MSR_IA32_P5_MC_TYPE
:
2371 case MSR_IA32_MCG_CAP
:
2372 data
= vcpu
->arch
.mcg_cap
;
2374 case MSR_IA32_MCG_CTL
:
2375 if (!(mcg_cap
& MCG_CTL_P
))
2377 data
= vcpu
->arch
.mcg_ctl
;
2379 case MSR_IA32_MCG_STATUS
:
2380 data
= vcpu
->arch
.mcg_status
;
2383 if (msr
>= MSR_IA32_MC0_CTL
&&
2384 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2385 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2386 data
= vcpu
->arch
.mce_banks
[offset
];
2395 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2397 switch (msr_info
->index
) {
2398 case MSR_IA32_PLATFORM_ID
:
2399 case MSR_IA32_EBL_CR_POWERON
:
2400 case MSR_IA32_DEBUGCTLMSR
:
2401 case MSR_IA32_LASTBRANCHFROMIP
:
2402 case MSR_IA32_LASTBRANCHTOIP
:
2403 case MSR_IA32_LASTINTFROMIP
:
2404 case MSR_IA32_LASTINTTOIP
:
2406 case MSR_K8_TSEG_ADDR
:
2407 case MSR_K8_TSEG_MASK
:
2409 case MSR_VM_HSAVE_PA
:
2410 case MSR_K8_INT_PENDING_MSG
:
2411 case MSR_AMD64_NB_CFG
:
2412 case MSR_FAM10H_MMIO_CONF_BASE
:
2413 case MSR_AMD64_BU_CFG2
:
2414 case MSR_IA32_PERF_CTL
:
2415 case MSR_AMD64_DC_CFG
:
2418 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2419 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2420 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2421 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2422 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2423 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2426 case MSR_IA32_UCODE_REV
:
2427 msr_info
->data
= 0x100000000ULL
;
2430 case 0x200 ... 0x2ff:
2431 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2432 case 0xcd: /* fsb frequency */
2436 * MSR_EBC_FREQUENCY_ID
2437 * Conservative value valid for even the basic CPU models.
2438 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2439 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2440 * and 266MHz for model 3, or 4. Set Core Clock
2441 * Frequency to System Bus Frequency Ratio to 1 (bits
2442 * 31:24) even though these are only valid for CPU
2443 * models > 2, however guests may end up dividing or
2444 * multiplying by zero otherwise.
2446 case MSR_EBC_FREQUENCY_ID
:
2447 msr_info
->data
= 1 << 24;
2449 case MSR_IA32_APICBASE
:
2450 msr_info
->data
= kvm_get_apic_base(vcpu
);
2452 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2453 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2455 case MSR_IA32_TSCDEADLINE
:
2456 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2458 case MSR_IA32_TSC_ADJUST
:
2459 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2461 case MSR_IA32_MISC_ENABLE
:
2462 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2464 case MSR_IA32_SMBASE
:
2465 if (!msr_info
->host_initiated
)
2467 msr_info
->data
= vcpu
->arch
.smbase
;
2469 case MSR_IA32_PERF_STATUS
:
2470 /* TSC increment by tick */
2471 msr_info
->data
= 1000ULL;
2472 /* CPU multiplier */
2473 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2476 msr_info
->data
= vcpu
->arch
.efer
;
2478 case MSR_KVM_WALL_CLOCK
:
2479 case MSR_KVM_WALL_CLOCK_NEW
:
2480 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2482 case MSR_KVM_SYSTEM_TIME
:
2483 case MSR_KVM_SYSTEM_TIME_NEW
:
2484 msr_info
->data
= vcpu
->arch
.time
;
2486 case MSR_KVM_ASYNC_PF_EN
:
2487 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2489 case MSR_KVM_STEAL_TIME
:
2490 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2492 case MSR_KVM_PV_EOI_EN
:
2493 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2495 case MSR_IA32_P5_MC_ADDR
:
2496 case MSR_IA32_P5_MC_TYPE
:
2497 case MSR_IA32_MCG_CAP
:
2498 case MSR_IA32_MCG_CTL
:
2499 case MSR_IA32_MCG_STATUS
:
2500 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2501 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2502 case MSR_K7_CLK_CTL
:
2504 * Provide expected ramp-up count for K7. All other
2505 * are set to zero, indicating minimum divisors for
2508 * This prevents guest kernels on AMD host with CPU
2509 * type 6, model 8 and higher from exploding due to
2510 * the rdmsr failing.
2512 msr_info
->data
= 0x20000000;
2514 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2515 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2516 case HV_X64_MSR_CRASH_CTL
:
2517 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2518 return kvm_hv_get_msr_common(vcpu
,
2519 msr_info
->index
, &msr_info
->data
);
2521 case MSR_IA32_BBL_CR_CTL3
:
2522 /* This legacy MSR exists but isn't fully documented in current
2523 * silicon. It is however accessed by winxp in very narrow
2524 * scenarios where it sets bit #19, itself documented as
2525 * a "reserved" bit. Best effort attempt to source coherent
2526 * read data here should the balance of the register be
2527 * interpreted by the guest:
2529 * L2 cache control register 3: 64GB range, 256KB size,
2530 * enabled, latency 0x1, configured
2532 msr_info
->data
= 0xbe702111;
2534 case MSR_AMD64_OSVW_ID_LENGTH
:
2535 if (!guest_cpuid_has_osvw(vcpu
))
2537 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2539 case MSR_AMD64_OSVW_STATUS
:
2540 if (!guest_cpuid_has_osvw(vcpu
))
2542 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2544 case MSR_PLATFORM_INFO
:
2545 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2547 case MSR_MISC_FEATURES_ENABLES
:
2548 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2551 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2552 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2554 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2558 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2565 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2568 * Read or write a bunch of msrs. All parameters are kernel addresses.
2570 * @return number of msrs set successfully.
2572 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2573 struct kvm_msr_entry
*entries
,
2574 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2575 unsigned index
, u64
*data
))
2579 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2580 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2581 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2583 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2589 * Read or write a bunch of msrs. Parameters are user addresses.
2591 * @return number of msrs set successfully.
2593 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2594 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2595 unsigned index
, u64
*data
),
2598 struct kvm_msrs msrs
;
2599 struct kvm_msr_entry
*entries
;
2604 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2608 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2611 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2612 entries
= memdup_user(user_msrs
->entries
, size
);
2613 if (IS_ERR(entries
)) {
2614 r
= PTR_ERR(entries
);
2618 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2623 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2634 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2639 case KVM_CAP_IRQCHIP
:
2641 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2642 case KVM_CAP_SET_TSS_ADDR
:
2643 case KVM_CAP_EXT_CPUID
:
2644 case KVM_CAP_EXT_EMUL_CPUID
:
2645 case KVM_CAP_CLOCKSOURCE
:
2647 case KVM_CAP_NOP_IO_DELAY
:
2648 case KVM_CAP_MP_STATE
:
2649 case KVM_CAP_SYNC_MMU
:
2650 case KVM_CAP_USER_NMI
:
2651 case KVM_CAP_REINJECT_CONTROL
:
2652 case KVM_CAP_IRQ_INJECT_STATUS
:
2653 case KVM_CAP_IOEVENTFD
:
2654 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2656 case KVM_CAP_PIT_STATE2
:
2657 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2658 case KVM_CAP_XEN_HVM
:
2659 case KVM_CAP_VCPU_EVENTS
:
2660 case KVM_CAP_HYPERV
:
2661 case KVM_CAP_HYPERV_VAPIC
:
2662 case KVM_CAP_HYPERV_SPIN
:
2663 case KVM_CAP_HYPERV_SYNIC
:
2664 case KVM_CAP_PCI_SEGMENT
:
2665 case KVM_CAP_DEBUGREGS
:
2666 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2668 case KVM_CAP_ASYNC_PF
:
2669 case KVM_CAP_GET_TSC_KHZ
:
2670 case KVM_CAP_KVMCLOCK_CTRL
:
2671 case KVM_CAP_READONLY_MEM
:
2672 case KVM_CAP_HYPERV_TIME
:
2673 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2674 case KVM_CAP_TSC_DEADLINE_TIMER
:
2675 case KVM_CAP_ENABLE_CAP_VM
:
2676 case KVM_CAP_DISABLE_QUIRKS
:
2677 case KVM_CAP_SET_BOOT_CPU_ID
:
2678 case KVM_CAP_SPLIT_IRQCHIP
:
2679 case KVM_CAP_IMMEDIATE_EXIT
:
2682 case KVM_CAP_ADJUST_CLOCK
:
2683 r
= KVM_CLOCK_TSC_STABLE
;
2685 case KVM_CAP_X86_GUEST_MWAIT
:
2686 r
= kvm_mwait_in_guest();
2688 case KVM_CAP_X86_SMM
:
2689 /* SMBASE is usually relocated above 1M on modern chipsets,
2690 * and SMM handlers might indeed rely on 4G segment limits,
2691 * so do not report SMM to be available if real mode is
2692 * emulated via vm86 mode. Still, do not go to great lengths
2693 * to avoid userspace's usage of the feature, because it is a
2694 * fringe case that is not enabled except via specific settings
2695 * of the module parameters.
2697 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2700 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2702 case KVM_CAP_NR_VCPUS
:
2703 r
= KVM_SOFT_MAX_VCPUS
;
2705 case KVM_CAP_MAX_VCPUS
:
2708 case KVM_CAP_NR_MEMSLOTS
:
2709 r
= KVM_USER_MEM_SLOTS
;
2711 case KVM_CAP_PV_MMU
: /* obsolete */
2715 r
= KVM_MAX_MCE_BANKS
;
2718 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2720 case KVM_CAP_TSC_CONTROL
:
2721 r
= kvm_has_tsc_control
;
2723 case KVM_CAP_X2APIC_API
:
2724 r
= KVM_X2APIC_API_VALID_FLAGS
;
2734 long kvm_arch_dev_ioctl(struct file
*filp
,
2735 unsigned int ioctl
, unsigned long arg
)
2737 void __user
*argp
= (void __user
*)arg
;
2741 case KVM_GET_MSR_INDEX_LIST
: {
2742 struct kvm_msr_list __user
*user_msr_list
= argp
;
2743 struct kvm_msr_list msr_list
;
2747 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2750 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2751 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2754 if (n
< msr_list
.nmsrs
)
2757 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2758 num_msrs_to_save
* sizeof(u32
)))
2760 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2762 num_emulated_msrs
* sizeof(u32
)))
2767 case KVM_GET_SUPPORTED_CPUID
:
2768 case KVM_GET_EMULATED_CPUID
: {
2769 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2770 struct kvm_cpuid2 cpuid
;
2773 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2776 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2782 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2787 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2789 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2790 sizeof(kvm_mce_cap_supported
)))
2802 static void wbinvd_ipi(void *garbage
)
2807 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2809 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2812 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2814 /* Address WBINVD may be executed by guest */
2815 if (need_emulate_wbinvd(vcpu
)) {
2816 if (kvm_x86_ops
->has_wbinvd_exit())
2817 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2818 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2819 smp_call_function_single(vcpu
->cpu
,
2820 wbinvd_ipi
, NULL
, 1);
2823 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2825 /* Apply any externally detected TSC adjustments (due to suspend) */
2826 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2827 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2828 vcpu
->arch
.tsc_offset_adjustment
= 0;
2829 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2832 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2833 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2834 rdtsc() - vcpu
->arch
.last_host_tsc
;
2836 mark_tsc_unstable("KVM discovered backwards TSC");
2838 if (check_tsc_unstable()) {
2839 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2840 vcpu
->arch
.last_guest_tsc
);
2841 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2842 vcpu
->arch
.tsc_catchup
= 1;
2845 if (kvm_lapic_hv_timer_in_use(vcpu
))
2846 kvm_lapic_restart_hv_timer(vcpu
);
2849 * On a host with synchronized TSC, there is no need to update
2850 * kvmclock on vcpu->cpu migration
2852 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2853 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2854 if (vcpu
->cpu
!= cpu
)
2855 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2859 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2862 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2864 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2867 vcpu
->arch
.st
.steal
.preempted
= 1;
2869 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2870 &vcpu
->arch
.st
.steal
.preempted
,
2871 offsetof(struct kvm_steal_time
, preempted
),
2872 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2875 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2879 * Disable page faults because we're in atomic context here.
2880 * kvm_write_guest_offset_cached() would call might_fault()
2881 * that relies on pagefault_disable() to tell if there's a
2882 * bug. NOTE: the write to guest memory may not go through if
2883 * during postcopy live migration or if there's heavy guest
2886 pagefault_disable();
2888 * kvm_memslots() will be called by
2889 * kvm_write_guest_offset_cached() so take the srcu lock.
2891 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2892 kvm_steal_time_set_preempted(vcpu
);
2893 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2895 kvm_x86_ops
->vcpu_put(vcpu
);
2896 kvm_put_guest_fpu(vcpu
);
2897 vcpu
->arch
.last_host_tsc
= rdtsc();
2900 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2901 struct kvm_lapic_state
*s
)
2903 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2904 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2906 return kvm_apic_get_state(vcpu
, s
);
2909 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2910 struct kvm_lapic_state
*s
)
2914 r
= kvm_apic_set_state(vcpu
, s
);
2917 update_cr8_intercept(vcpu
);
2922 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2924 return (!lapic_in_kernel(vcpu
) ||
2925 kvm_apic_accept_pic_intr(vcpu
));
2929 * if userspace requested an interrupt window, check that the
2930 * interrupt window is open.
2932 * No need to exit to userspace if we already have an interrupt queued.
2934 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2936 return kvm_arch_interrupt_allowed(vcpu
) &&
2937 !kvm_cpu_has_interrupt(vcpu
) &&
2938 !kvm_event_needs_reinjection(vcpu
) &&
2939 kvm_cpu_accept_dm_intr(vcpu
);
2942 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2943 struct kvm_interrupt
*irq
)
2945 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2948 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2949 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2950 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2955 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2956 * fail for in-kernel 8259.
2958 if (pic_in_kernel(vcpu
->kvm
))
2961 if (vcpu
->arch
.pending_external_vector
!= -1)
2964 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2965 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2969 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2971 kvm_inject_nmi(vcpu
);
2976 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2978 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2983 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2984 struct kvm_tpr_access_ctl
*tac
)
2988 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2992 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2996 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2999 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3001 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3004 vcpu
->arch
.mcg_cap
= mcg_cap
;
3005 /* Init IA32_MCG_CTL to all 1s */
3006 if (mcg_cap
& MCG_CTL_P
)
3007 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3008 /* Init IA32_MCi_CTL to all 1s */
3009 for (bank
= 0; bank
< bank_num
; bank
++)
3010 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3012 if (kvm_x86_ops
->setup_mce
)
3013 kvm_x86_ops
->setup_mce(vcpu
);
3018 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3019 struct kvm_x86_mce
*mce
)
3021 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3022 unsigned bank_num
= mcg_cap
& 0xff;
3023 u64
*banks
= vcpu
->arch
.mce_banks
;
3025 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3028 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3029 * reporting is disabled
3031 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3032 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3034 banks
+= 4 * mce
->bank
;
3036 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3037 * reporting is disabled for the bank
3039 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3041 if (mce
->status
& MCI_STATUS_UC
) {
3042 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3043 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3044 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3047 if (banks
[1] & MCI_STATUS_VAL
)
3048 mce
->status
|= MCI_STATUS_OVER
;
3049 banks
[2] = mce
->addr
;
3050 banks
[3] = mce
->misc
;
3051 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3052 banks
[1] = mce
->status
;
3053 kvm_queue_exception(vcpu
, MC_VECTOR
);
3054 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3055 || !(banks
[1] & MCI_STATUS_UC
)) {
3056 if (banks
[1] & MCI_STATUS_VAL
)
3057 mce
->status
|= MCI_STATUS_OVER
;
3058 banks
[2] = mce
->addr
;
3059 banks
[3] = mce
->misc
;
3060 banks
[1] = mce
->status
;
3062 banks
[1] |= MCI_STATUS_OVER
;
3066 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3067 struct kvm_vcpu_events
*events
)
3070 events
->exception
.injected
=
3071 vcpu
->arch
.exception
.pending
&&
3072 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3073 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3074 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3075 events
->exception
.pad
= 0;
3076 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3078 events
->interrupt
.injected
=
3079 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3080 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3081 events
->interrupt
.soft
= 0;
3082 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3084 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3085 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3086 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3087 events
->nmi
.pad
= 0;
3089 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3091 events
->smi
.smm
= is_smm(vcpu
);
3092 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3093 events
->smi
.smm_inside_nmi
=
3094 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3095 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3097 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3098 | KVM_VCPUEVENT_VALID_SHADOW
3099 | KVM_VCPUEVENT_VALID_SMM
);
3100 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3103 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3105 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3106 struct kvm_vcpu_events
*events
)
3108 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3109 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3110 | KVM_VCPUEVENT_VALID_SHADOW
3111 | KVM_VCPUEVENT_VALID_SMM
))
3114 if (events
->exception
.injected
&&
3115 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3116 is_guest_mode(vcpu
)))
3119 /* INITs are latched while in SMM */
3120 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3121 (events
->smi
.smm
|| events
->smi
.pending
) &&
3122 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3126 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3127 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3128 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3129 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3131 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3132 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3133 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3134 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3135 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3136 events
->interrupt
.shadow
);
3138 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3139 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3140 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3141 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3143 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3144 lapic_in_kernel(vcpu
))
3145 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3147 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3148 u32 hflags
= vcpu
->arch
.hflags
;
3149 if (events
->smi
.smm
)
3150 hflags
|= HF_SMM_MASK
;
3152 hflags
&= ~HF_SMM_MASK
;
3153 kvm_set_hflags(vcpu
, hflags
);
3155 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3156 if (events
->smi
.smm_inside_nmi
)
3157 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3159 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3160 if (lapic_in_kernel(vcpu
)) {
3161 if (events
->smi
.latched_init
)
3162 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3164 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3168 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3173 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3174 struct kvm_debugregs
*dbgregs
)
3178 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3179 kvm_get_dr(vcpu
, 6, &val
);
3181 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3183 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3186 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3187 struct kvm_debugregs
*dbgregs
)
3192 if (dbgregs
->dr6
& ~0xffffffffull
)
3194 if (dbgregs
->dr7
& ~0xffffffffull
)
3197 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3198 kvm_update_dr0123(vcpu
);
3199 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3200 kvm_update_dr6(vcpu
);
3201 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3202 kvm_update_dr7(vcpu
);
3207 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3209 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3211 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3212 u64 xstate_bv
= xsave
->header
.xfeatures
;
3216 * Copy legacy XSAVE area, to avoid complications with CPUID
3217 * leaves 0 and 1 in the loop below.
3219 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3222 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3223 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3226 * Copy each region from the possibly compacted offset to the
3227 * non-compacted offset.
3229 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3231 u64 feature
= valid
& -valid
;
3232 int index
= fls64(feature
) - 1;
3233 void *src
= get_xsave_addr(xsave
, feature
);
3236 u32 size
, offset
, ecx
, edx
;
3237 cpuid_count(XSTATE_CPUID
, index
,
3238 &size
, &offset
, &ecx
, &edx
);
3239 memcpy(dest
+ offset
, src
, size
);
3246 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3248 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3249 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3253 * Copy legacy XSAVE area, to avoid complications with CPUID
3254 * leaves 0 and 1 in the loop below.
3256 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3258 /* Set XSTATE_BV and possibly XCOMP_BV. */
3259 xsave
->header
.xfeatures
= xstate_bv
;
3260 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3261 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3264 * Copy each region from the non-compacted offset to the
3265 * possibly compacted offset.
3267 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3269 u64 feature
= valid
& -valid
;
3270 int index
= fls64(feature
) - 1;
3271 void *dest
= get_xsave_addr(xsave
, feature
);
3274 u32 size
, offset
, ecx
, edx
;
3275 cpuid_count(XSTATE_CPUID
, index
,
3276 &size
, &offset
, &ecx
, &edx
);
3277 memcpy(dest
, src
+ offset
, size
);
3284 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3285 struct kvm_xsave
*guest_xsave
)
3287 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3288 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3289 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3291 memcpy(guest_xsave
->region
,
3292 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3293 sizeof(struct fxregs_state
));
3294 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3295 XFEATURE_MASK_FPSSE
;
3299 #define XSAVE_MXCSR_OFFSET 24
3301 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3302 struct kvm_xsave
*guest_xsave
)
3305 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3306 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3308 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3310 * Here we allow setting states that are not present in
3311 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3312 * with old userspace.
3314 if (xstate_bv
& ~kvm_supported_xcr0() ||
3315 mxcsr
& ~mxcsr_feature_mask
)
3317 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3319 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3320 mxcsr
& ~mxcsr_feature_mask
)
3322 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3323 guest_xsave
->region
, sizeof(struct fxregs_state
));
3328 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3329 struct kvm_xcrs
*guest_xcrs
)
3331 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3332 guest_xcrs
->nr_xcrs
= 0;
3336 guest_xcrs
->nr_xcrs
= 1;
3337 guest_xcrs
->flags
= 0;
3338 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3339 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3342 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3343 struct kvm_xcrs
*guest_xcrs
)
3347 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3350 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3353 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3354 /* Only support XCR0 currently */
3355 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3356 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3357 guest_xcrs
->xcrs
[i
].value
);
3366 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3367 * stopped by the hypervisor. This function will be called from the host only.
3368 * EINVAL is returned when the host attempts to set the flag for a guest that
3369 * does not support pv clocks.
3371 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3373 if (!vcpu
->arch
.pv_time_enabled
)
3375 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3376 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3380 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3381 struct kvm_enable_cap
*cap
)
3387 case KVM_CAP_HYPERV_SYNIC
:
3388 if (!irqchip_in_kernel(vcpu
->kvm
))
3390 return kvm_hv_activate_synic(vcpu
);
3396 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3397 unsigned int ioctl
, unsigned long arg
)
3399 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3400 void __user
*argp
= (void __user
*)arg
;
3403 struct kvm_lapic_state
*lapic
;
3404 struct kvm_xsave
*xsave
;
3405 struct kvm_xcrs
*xcrs
;
3411 case KVM_GET_LAPIC
: {
3413 if (!lapic_in_kernel(vcpu
))
3415 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3420 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3424 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3429 case KVM_SET_LAPIC
: {
3431 if (!lapic_in_kernel(vcpu
))
3433 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3434 if (IS_ERR(u
.lapic
))
3435 return PTR_ERR(u
.lapic
);
3437 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3440 case KVM_INTERRUPT
: {
3441 struct kvm_interrupt irq
;
3444 if (copy_from_user(&irq
, argp
, sizeof irq
))
3446 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3450 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3454 r
= kvm_vcpu_ioctl_smi(vcpu
);
3457 case KVM_SET_CPUID
: {
3458 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3459 struct kvm_cpuid cpuid
;
3462 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3464 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3467 case KVM_SET_CPUID2
: {
3468 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3469 struct kvm_cpuid2 cpuid
;
3472 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3474 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3475 cpuid_arg
->entries
);
3478 case KVM_GET_CPUID2
: {
3479 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3480 struct kvm_cpuid2 cpuid
;
3483 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3485 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3486 cpuid_arg
->entries
);
3490 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3496 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3499 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3501 case KVM_TPR_ACCESS_REPORTING
: {
3502 struct kvm_tpr_access_ctl tac
;
3505 if (copy_from_user(&tac
, argp
, sizeof tac
))
3507 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3511 if (copy_to_user(argp
, &tac
, sizeof tac
))
3516 case KVM_SET_VAPIC_ADDR
: {
3517 struct kvm_vapic_addr va
;
3521 if (!lapic_in_kernel(vcpu
))
3524 if (copy_from_user(&va
, argp
, sizeof va
))
3526 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3527 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3528 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3531 case KVM_X86_SETUP_MCE
: {
3535 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3537 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3540 case KVM_X86_SET_MCE
: {
3541 struct kvm_x86_mce mce
;
3544 if (copy_from_user(&mce
, argp
, sizeof mce
))
3546 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3549 case KVM_GET_VCPU_EVENTS
: {
3550 struct kvm_vcpu_events events
;
3552 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3555 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3560 case KVM_SET_VCPU_EVENTS
: {
3561 struct kvm_vcpu_events events
;
3564 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3567 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3570 case KVM_GET_DEBUGREGS
: {
3571 struct kvm_debugregs dbgregs
;
3573 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3576 if (copy_to_user(argp
, &dbgregs
,
3577 sizeof(struct kvm_debugregs
)))
3582 case KVM_SET_DEBUGREGS
: {
3583 struct kvm_debugregs dbgregs
;
3586 if (copy_from_user(&dbgregs
, argp
,
3587 sizeof(struct kvm_debugregs
)))
3590 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3593 case KVM_GET_XSAVE
: {
3594 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3599 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3602 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3607 case KVM_SET_XSAVE
: {
3608 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3609 if (IS_ERR(u
.xsave
))
3610 return PTR_ERR(u
.xsave
);
3612 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3615 case KVM_GET_XCRS
: {
3616 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3621 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3624 if (copy_to_user(argp
, u
.xcrs
,
3625 sizeof(struct kvm_xcrs
)))
3630 case KVM_SET_XCRS
: {
3631 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3633 return PTR_ERR(u
.xcrs
);
3635 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3638 case KVM_SET_TSC_KHZ
: {
3642 user_tsc_khz
= (u32
)arg
;
3644 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3647 if (user_tsc_khz
== 0)
3648 user_tsc_khz
= tsc_khz
;
3650 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3655 case KVM_GET_TSC_KHZ
: {
3656 r
= vcpu
->arch
.virtual_tsc_khz
;
3659 case KVM_KVMCLOCK_CTRL
: {
3660 r
= kvm_set_guest_paused(vcpu
);
3663 case KVM_ENABLE_CAP
: {
3664 struct kvm_enable_cap cap
;
3667 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3669 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3680 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3682 return VM_FAULT_SIGBUS
;
3685 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3689 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3691 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3695 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3698 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3702 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3703 u32 kvm_nr_mmu_pages
)
3705 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3708 mutex_lock(&kvm
->slots_lock
);
3710 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3711 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3713 mutex_unlock(&kvm
->slots_lock
);
3717 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3719 return kvm
->arch
.n_max_mmu_pages
;
3722 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3724 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3728 switch (chip
->chip_id
) {
3729 case KVM_IRQCHIP_PIC_MASTER
:
3730 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3731 sizeof(struct kvm_pic_state
));
3733 case KVM_IRQCHIP_PIC_SLAVE
:
3734 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3735 sizeof(struct kvm_pic_state
));
3737 case KVM_IRQCHIP_IOAPIC
:
3738 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3747 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3749 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3753 switch (chip
->chip_id
) {
3754 case KVM_IRQCHIP_PIC_MASTER
:
3755 spin_lock(&pic
->lock
);
3756 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3757 sizeof(struct kvm_pic_state
));
3758 spin_unlock(&pic
->lock
);
3760 case KVM_IRQCHIP_PIC_SLAVE
:
3761 spin_lock(&pic
->lock
);
3762 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3763 sizeof(struct kvm_pic_state
));
3764 spin_unlock(&pic
->lock
);
3766 case KVM_IRQCHIP_IOAPIC
:
3767 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3773 kvm_pic_update_irq(pic
);
3777 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3779 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3781 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3783 mutex_lock(&kps
->lock
);
3784 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3785 mutex_unlock(&kps
->lock
);
3789 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3792 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3794 mutex_lock(&pit
->pit_state
.lock
);
3795 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3796 for (i
= 0; i
< 3; i
++)
3797 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3798 mutex_unlock(&pit
->pit_state
.lock
);
3802 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3804 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3805 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3806 sizeof(ps
->channels
));
3807 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3808 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3809 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3813 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3817 u32 prev_legacy
, cur_legacy
;
3818 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3820 mutex_lock(&pit
->pit_state
.lock
);
3821 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3822 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3823 if (!prev_legacy
&& cur_legacy
)
3825 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3826 sizeof(pit
->pit_state
.channels
));
3827 pit
->pit_state
.flags
= ps
->flags
;
3828 for (i
= 0; i
< 3; i
++)
3829 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3831 mutex_unlock(&pit
->pit_state
.lock
);
3835 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3836 struct kvm_reinject_control
*control
)
3838 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3843 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3844 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3845 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3847 mutex_lock(&pit
->pit_state
.lock
);
3848 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3849 mutex_unlock(&pit
->pit_state
.lock
);
3855 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3856 * @kvm: kvm instance
3857 * @log: slot id and address to which we copy the log
3859 * Steps 1-4 below provide general overview of dirty page logging. See
3860 * kvm_get_dirty_log_protect() function description for additional details.
3862 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3863 * always flush the TLB (step 4) even if previous step failed and the dirty
3864 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3865 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3866 * writes will be marked dirty for next log read.
3868 * 1. Take a snapshot of the bit and clear it if needed.
3869 * 2. Write protect the corresponding page.
3870 * 3. Copy the snapshot to the userspace.
3871 * 4. Flush TLB's if needed.
3873 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3875 bool is_dirty
= false;
3878 mutex_lock(&kvm
->slots_lock
);
3881 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3883 if (kvm_x86_ops
->flush_log_dirty
)
3884 kvm_x86_ops
->flush_log_dirty(kvm
);
3886 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3889 * All the TLBs can be flushed out of mmu lock, see the comments in
3890 * kvm_mmu_slot_remove_write_access().
3892 lockdep_assert_held(&kvm
->slots_lock
);
3894 kvm_flush_remote_tlbs(kvm
);
3896 mutex_unlock(&kvm
->slots_lock
);
3900 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3903 if (!irqchip_in_kernel(kvm
))
3906 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3907 irq_event
->irq
, irq_event
->level
,
3912 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3913 struct kvm_enable_cap
*cap
)
3921 case KVM_CAP_DISABLE_QUIRKS
:
3922 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3925 case KVM_CAP_SPLIT_IRQCHIP
: {
3926 mutex_lock(&kvm
->lock
);
3928 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3929 goto split_irqchip_unlock
;
3931 if (irqchip_in_kernel(kvm
))
3932 goto split_irqchip_unlock
;
3933 if (kvm
->created_vcpus
)
3934 goto split_irqchip_unlock
;
3935 r
= kvm_setup_empty_irq_routing(kvm
);
3937 goto split_irqchip_unlock
;
3938 /* Pairs with irqchip_in_kernel. */
3940 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
3941 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3943 split_irqchip_unlock
:
3944 mutex_unlock(&kvm
->lock
);
3947 case KVM_CAP_X2APIC_API
:
3949 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3952 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3953 kvm
->arch
.x2apic_format
= true;
3954 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3955 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3966 long kvm_arch_vm_ioctl(struct file
*filp
,
3967 unsigned int ioctl
, unsigned long arg
)
3969 struct kvm
*kvm
= filp
->private_data
;
3970 void __user
*argp
= (void __user
*)arg
;
3973 * This union makes it completely explicit to gcc-3.x
3974 * that these two variables' stack usage should be
3975 * combined, not added together.
3978 struct kvm_pit_state ps
;
3979 struct kvm_pit_state2 ps2
;
3980 struct kvm_pit_config pit_config
;
3984 case KVM_SET_TSS_ADDR
:
3985 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3987 case KVM_SET_IDENTITY_MAP_ADDR
: {
3991 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3993 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3996 case KVM_SET_NR_MMU_PAGES
:
3997 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3999 case KVM_GET_NR_MMU_PAGES
:
4000 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4002 case KVM_CREATE_IRQCHIP
: {
4003 mutex_lock(&kvm
->lock
);
4006 if (irqchip_in_kernel(kvm
))
4007 goto create_irqchip_unlock
;
4010 if (kvm
->created_vcpus
)
4011 goto create_irqchip_unlock
;
4013 r
= kvm_pic_init(kvm
);
4015 goto create_irqchip_unlock
;
4017 r
= kvm_ioapic_init(kvm
);
4019 kvm_pic_destroy(kvm
);
4020 goto create_irqchip_unlock
;
4023 r
= kvm_setup_default_irq_routing(kvm
);
4025 kvm_ioapic_destroy(kvm
);
4026 kvm_pic_destroy(kvm
);
4027 goto create_irqchip_unlock
;
4029 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4031 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4032 create_irqchip_unlock
:
4033 mutex_unlock(&kvm
->lock
);
4036 case KVM_CREATE_PIT
:
4037 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4039 case KVM_CREATE_PIT2
:
4041 if (copy_from_user(&u
.pit_config
, argp
,
4042 sizeof(struct kvm_pit_config
)))
4045 mutex_lock(&kvm
->lock
);
4048 goto create_pit_unlock
;
4050 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4054 mutex_unlock(&kvm
->lock
);
4056 case KVM_GET_IRQCHIP
: {
4057 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4058 struct kvm_irqchip
*chip
;
4060 chip
= memdup_user(argp
, sizeof(*chip
));
4067 if (!irqchip_kernel(kvm
))
4068 goto get_irqchip_out
;
4069 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4071 goto get_irqchip_out
;
4073 if (copy_to_user(argp
, chip
, sizeof *chip
))
4074 goto get_irqchip_out
;
4080 case KVM_SET_IRQCHIP
: {
4081 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4082 struct kvm_irqchip
*chip
;
4084 chip
= memdup_user(argp
, sizeof(*chip
));
4091 if (!irqchip_kernel(kvm
))
4092 goto set_irqchip_out
;
4093 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4095 goto set_irqchip_out
;
4103 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4106 if (!kvm
->arch
.vpit
)
4108 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4112 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4119 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4122 if (!kvm
->arch
.vpit
)
4124 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4127 case KVM_GET_PIT2
: {
4129 if (!kvm
->arch
.vpit
)
4131 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4135 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4140 case KVM_SET_PIT2
: {
4142 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4145 if (!kvm
->arch
.vpit
)
4147 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4150 case KVM_REINJECT_CONTROL
: {
4151 struct kvm_reinject_control control
;
4153 if (copy_from_user(&control
, argp
, sizeof(control
)))
4155 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4158 case KVM_SET_BOOT_CPU_ID
:
4160 mutex_lock(&kvm
->lock
);
4161 if (kvm
->created_vcpus
)
4164 kvm
->arch
.bsp_vcpu_id
= arg
;
4165 mutex_unlock(&kvm
->lock
);
4167 case KVM_XEN_HVM_CONFIG
: {
4169 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4170 sizeof(struct kvm_xen_hvm_config
)))
4173 if (kvm
->arch
.xen_hvm_config
.flags
)
4178 case KVM_SET_CLOCK
: {
4179 struct kvm_clock_data user_ns
;
4183 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4192 * TODO: userspace has to take care of races with VCPU_RUN, so
4193 * kvm_gen_update_masterclock() can be cut down to locked
4194 * pvclock_update_vm_gtod_copy().
4196 kvm_gen_update_masterclock(kvm
);
4197 now_ns
= get_kvmclock_ns(kvm
);
4198 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4199 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4202 case KVM_GET_CLOCK
: {
4203 struct kvm_clock_data user_ns
;
4206 now_ns
= get_kvmclock_ns(kvm
);
4207 user_ns
.clock
= now_ns
;
4208 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4209 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4212 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4217 case KVM_ENABLE_CAP
: {
4218 struct kvm_enable_cap cap
;
4221 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4223 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4233 static void kvm_init_msr_list(void)
4238 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4239 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4243 * Even MSRs that are valid in the host may not be exposed
4244 * to the guests in some cases.
4246 switch (msrs_to_save
[i
]) {
4247 case MSR_IA32_BNDCFGS
:
4248 if (!kvm_x86_ops
->mpx_supported())
4252 if (!kvm_x86_ops
->rdtscp_supported())
4260 msrs_to_save
[j
] = msrs_to_save
[i
];
4263 num_msrs_to_save
= j
;
4265 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4266 switch (emulated_msrs
[i
]) {
4267 case MSR_IA32_SMBASE
:
4268 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4276 emulated_msrs
[j
] = emulated_msrs
[i
];
4279 num_emulated_msrs
= j
;
4282 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4290 if (!(lapic_in_kernel(vcpu
) &&
4291 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4292 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4303 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4310 if (!(lapic_in_kernel(vcpu
) &&
4311 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4313 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4315 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4325 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4326 struct kvm_segment
*var
, int seg
)
4328 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4331 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4332 struct kvm_segment
*var
, int seg
)
4334 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4337 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4338 struct x86_exception
*exception
)
4342 BUG_ON(!mmu_is_nested(vcpu
));
4344 /* NPT walks are always user-walks */
4345 access
|= PFERR_USER_MASK
;
4346 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4351 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4352 struct x86_exception
*exception
)
4354 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4355 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4358 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4359 struct x86_exception
*exception
)
4361 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4362 access
|= PFERR_FETCH_MASK
;
4363 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4366 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4367 struct x86_exception
*exception
)
4369 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4370 access
|= PFERR_WRITE_MASK
;
4371 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4374 /* uses this to access any guest's mapped memory without checking CPL */
4375 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4376 struct x86_exception
*exception
)
4378 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4381 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4382 struct kvm_vcpu
*vcpu
, u32 access
,
4383 struct x86_exception
*exception
)
4386 int r
= X86EMUL_CONTINUE
;
4389 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4391 unsigned offset
= addr
& (PAGE_SIZE
-1);
4392 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4395 if (gpa
== UNMAPPED_GVA
)
4396 return X86EMUL_PROPAGATE_FAULT
;
4397 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4400 r
= X86EMUL_IO_NEEDED
;
4412 /* used for instruction fetching */
4413 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4414 gva_t addr
, void *val
, unsigned int bytes
,
4415 struct x86_exception
*exception
)
4417 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4418 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4422 /* Inline kvm_read_guest_virt_helper for speed. */
4423 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4425 if (unlikely(gpa
== UNMAPPED_GVA
))
4426 return X86EMUL_PROPAGATE_FAULT
;
4428 offset
= addr
& (PAGE_SIZE
-1);
4429 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4430 bytes
= (unsigned)PAGE_SIZE
- offset
;
4431 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4433 if (unlikely(ret
< 0))
4434 return X86EMUL_IO_NEEDED
;
4436 return X86EMUL_CONTINUE
;
4439 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4440 gva_t addr
, void *val
, unsigned int bytes
,
4441 struct x86_exception
*exception
)
4443 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4444 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4446 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4449 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4451 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4452 gva_t addr
, void *val
, unsigned int bytes
,
4453 struct x86_exception
*exception
)
4455 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4456 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4459 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4460 unsigned long addr
, void *val
, unsigned int bytes
)
4462 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4463 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4465 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4468 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4469 gva_t addr
, void *val
,
4471 struct x86_exception
*exception
)
4473 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4475 int r
= X86EMUL_CONTINUE
;
4478 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4481 unsigned offset
= addr
& (PAGE_SIZE
-1);
4482 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4485 if (gpa
== UNMAPPED_GVA
)
4486 return X86EMUL_PROPAGATE_FAULT
;
4487 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4489 r
= X86EMUL_IO_NEEDED
;
4500 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4502 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4503 gpa_t gpa
, bool write
)
4505 /* For APIC access vmexit */
4506 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4509 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4510 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4517 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4518 gpa_t
*gpa
, struct x86_exception
*exception
,
4521 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4522 | (write
? PFERR_WRITE_MASK
: 0);
4525 * currently PKRU is only applied to ept enabled guest so
4526 * there is no pkey in EPT page table for L1 guest or EPT
4527 * shadow page table for L2 guest.
4529 if (vcpu_match_mmio_gva(vcpu
, gva
)
4530 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4531 vcpu
->arch
.access
, 0, access
)) {
4532 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4533 (gva
& (PAGE_SIZE
- 1));
4534 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4538 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4540 if (*gpa
== UNMAPPED_GVA
)
4543 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4546 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4547 const void *val
, int bytes
)
4551 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4554 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4558 struct read_write_emulator_ops
{
4559 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4561 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4562 void *val
, int bytes
);
4563 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4564 int bytes
, void *val
);
4565 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4566 void *val
, int bytes
);
4570 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4572 if (vcpu
->mmio_read_completed
) {
4573 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4574 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4575 vcpu
->mmio_read_completed
= 0;
4582 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4583 void *val
, int bytes
)
4585 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4588 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4589 void *val
, int bytes
)
4591 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4594 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4596 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4597 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4600 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4601 void *val
, int bytes
)
4603 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4604 return X86EMUL_IO_NEEDED
;
4607 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4608 void *val
, int bytes
)
4610 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4612 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4613 return X86EMUL_CONTINUE
;
4616 static const struct read_write_emulator_ops read_emultor
= {
4617 .read_write_prepare
= read_prepare
,
4618 .read_write_emulate
= read_emulate
,
4619 .read_write_mmio
= vcpu_mmio_read
,
4620 .read_write_exit_mmio
= read_exit_mmio
,
4623 static const struct read_write_emulator_ops write_emultor
= {
4624 .read_write_emulate
= write_emulate
,
4625 .read_write_mmio
= write_mmio
,
4626 .read_write_exit_mmio
= write_exit_mmio
,
4630 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4632 struct x86_exception
*exception
,
4633 struct kvm_vcpu
*vcpu
,
4634 const struct read_write_emulator_ops
*ops
)
4638 bool write
= ops
->write
;
4639 struct kvm_mmio_fragment
*frag
;
4640 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4643 * If the exit was due to a NPF we may already have a GPA.
4644 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4645 * Note, this cannot be used on string operations since string
4646 * operation using rep will only have the initial GPA from the NPF
4649 if (vcpu
->arch
.gpa_available
&&
4650 emulator_can_use_gpa(ctxt
) &&
4651 vcpu_is_mmio_gpa(vcpu
, addr
, exception
->address
, write
) &&
4652 (addr
& ~PAGE_MASK
) == (exception
->address
& ~PAGE_MASK
)) {
4653 gpa
= exception
->address
;
4657 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4660 return X86EMUL_PROPAGATE_FAULT
;
4662 /* For APIC access vmexit */
4666 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4667 return X86EMUL_CONTINUE
;
4671 * Is this MMIO handled locally?
4673 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4674 if (handled
== bytes
)
4675 return X86EMUL_CONTINUE
;
4681 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4682 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4686 return X86EMUL_CONTINUE
;
4689 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4691 void *val
, unsigned int bytes
,
4692 struct x86_exception
*exception
,
4693 const struct read_write_emulator_ops
*ops
)
4695 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4699 if (ops
->read_write_prepare
&&
4700 ops
->read_write_prepare(vcpu
, val
, bytes
))
4701 return X86EMUL_CONTINUE
;
4703 vcpu
->mmio_nr_fragments
= 0;
4705 /* Crossing a page boundary? */
4706 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4709 now
= -addr
& ~PAGE_MASK
;
4710 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4713 if (rc
!= X86EMUL_CONTINUE
)
4716 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4722 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4724 if (rc
!= X86EMUL_CONTINUE
)
4727 if (!vcpu
->mmio_nr_fragments
)
4730 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4732 vcpu
->mmio_needed
= 1;
4733 vcpu
->mmio_cur_fragment
= 0;
4735 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4736 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4737 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4738 vcpu
->run
->mmio
.phys_addr
= gpa
;
4740 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4743 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4747 struct x86_exception
*exception
)
4749 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4750 exception
, &read_emultor
);
4753 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4757 struct x86_exception
*exception
)
4759 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4760 exception
, &write_emultor
);
4763 #define CMPXCHG_TYPE(t, ptr, old, new) \
4764 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4766 #ifdef CONFIG_X86_64
4767 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4769 # define CMPXCHG64(ptr, old, new) \
4770 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4773 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4778 struct x86_exception
*exception
)
4780 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4786 /* guests cmpxchg8b have to be emulated atomically */
4787 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4790 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4792 if (gpa
== UNMAPPED_GVA
||
4793 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4796 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4799 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4800 if (is_error_page(page
))
4803 kaddr
= kmap_atomic(page
);
4804 kaddr
+= offset_in_page(gpa
);
4807 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4810 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4813 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4816 exchanged
= CMPXCHG64(kaddr
, old
, new);
4821 kunmap_atomic(kaddr
);
4822 kvm_release_page_dirty(page
);
4825 return X86EMUL_CMPXCHG_FAILED
;
4827 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4828 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4830 return X86EMUL_CONTINUE
;
4833 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4835 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4838 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4842 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
4843 if (vcpu
->arch
.pio
.in
)
4844 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4845 vcpu
->arch
.pio
.size
, pd
);
4847 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4848 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4852 pd
+= vcpu
->arch
.pio
.size
;
4857 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4858 unsigned short port
, void *val
,
4859 unsigned int count
, bool in
)
4861 vcpu
->arch
.pio
.port
= port
;
4862 vcpu
->arch
.pio
.in
= in
;
4863 vcpu
->arch
.pio
.count
= count
;
4864 vcpu
->arch
.pio
.size
= size
;
4866 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4867 vcpu
->arch
.pio
.count
= 0;
4871 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4872 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4873 vcpu
->run
->io
.size
= size
;
4874 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4875 vcpu
->run
->io
.count
= count
;
4876 vcpu
->run
->io
.port
= port
;
4881 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4882 int size
, unsigned short port
, void *val
,
4885 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4888 if (vcpu
->arch
.pio
.count
)
4891 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
4893 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4896 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4897 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4898 vcpu
->arch
.pio
.count
= 0;
4905 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4906 int size
, unsigned short port
,
4907 const void *val
, unsigned int count
)
4909 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4911 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4912 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4913 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4916 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4918 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4921 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4923 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4926 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4928 if (!need_emulate_wbinvd(vcpu
))
4929 return X86EMUL_CONTINUE
;
4931 if (kvm_x86_ops
->has_wbinvd_exit()) {
4932 int cpu
= get_cpu();
4934 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4935 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4936 wbinvd_ipi
, NULL
, 1);
4938 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4941 return X86EMUL_CONTINUE
;
4944 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4946 kvm_emulate_wbinvd_noskip(vcpu
);
4947 return kvm_skip_emulated_instruction(vcpu
);
4949 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4953 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4955 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4958 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4959 unsigned long *dest
)
4961 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4964 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4965 unsigned long value
)
4968 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4971 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4973 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4976 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4978 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4979 unsigned long value
;
4983 value
= kvm_read_cr0(vcpu
);
4986 value
= vcpu
->arch
.cr2
;
4989 value
= kvm_read_cr3(vcpu
);
4992 value
= kvm_read_cr4(vcpu
);
4995 value
= kvm_get_cr8(vcpu
);
4998 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5005 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5007 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5012 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5015 vcpu
->arch
.cr2
= val
;
5018 res
= kvm_set_cr3(vcpu
, val
);
5021 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5024 res
= kvm_set_cr8(vcpu
, val
);
5027 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5034 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5036 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5039 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5041 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5044 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5046 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5049 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5051 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5054 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5056 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5059 static unsigned long emulator_get_cached_segment_base(
5060 struct x86_emulate_ctxt
*ctxt
, int seg
)
5062 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5065 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5066 struct desc_struct
*desc
, u32
*base3
,
5069 struct kvm_segment var
;
5071 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5072 *selector
= var
.selector
;
5075 memset(desc
, 0, sizeof(*desc
));
5083 set_desc_limit(desc
, var
.limit
);
5084 set_desc_base(desc
, (unsigned long)var
.base
);
5085 #ifdef CONFIG_X86_64
5087 *base3
= var
.base
>> 32;
5089 desc
->type
= var
.type
;
5091 desc
->dpl
= var
.dpl
;
5092 desc
->p
= var
.present
;
5093 desc
->avl
= var
.avl
;
5101 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5102 struct desc_struct
*desc
, u32 base3
,
5105 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5106 struct kvm_segment var
;
5108 var
.selector
= selector
;
5109 var
.base
= get_desc_base(desc
);
5110 #ifdef CONFIG_X86_64
5111 var
.base
|= ((u64
)base3
) << 32;
5113 var
.limit
= get_desc_limit(desc
);
5115 var
.limit
= (var
.limit
<< 12) | 0xfff;
5116 var
.type
= desc
->type
;
5117 var
.dpl
= desc
->dpl
;
5122 var
.avl
= desc
->avl
;
5123 var
.present
= desc
->p
;
5124 var
.unusable
= !var
.present
;
5127 kvm_set_segment(vcpu
, &var
, seg
);
5131 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5132 u32 msr_index
, u64
*pdata
)
5134 struct msr_data msr
;
5137 msr
.index
= msr_index
;
5138 msr
.host_initiated
= false;
5139 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5147 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5148 u32 msr_index
, u64 data
)
5150 struct msr_data msr
;
5153 msr
.index
= msr_index
;
5154 msr
.host_initiated
= false;
5155 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5158 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5160 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5162 return vcpu
->arch
.smbase
;
5165 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5167 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5169 vcpu
->arch
.smbase
= smbase
;
5172 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5175 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5178 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5179 u32 pmc
, u64
*pdata
)
5181 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5184 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5186 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5189 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5192 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5195 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5200 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5201 struct x86_instruction_info
*info
,
5202 enum x86_intercept_stage stage
)
5204 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5207 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5208 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5210 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5213 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5215 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5218 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5220 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5223 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5225 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5228 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5230 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5233 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5235 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5238 static const struct x86_emulate_ops emulate_ops
= {
5239 .read_gpr
= emulator_read_gpr
,
5240 .write_gpr
= emulator_write_gpr
,
5241 .read_std
= kvm_read_guest_virt_system
,
5242 .write_std
= kvm_write_guest_virt_system
,
5243 .read_phys
= kvm_read_guest_phys_system
,
5244 .fetch
= kvm_fetch_guest_virt
,
5245 .read_emulated
= emulator_read_emulated
,
5246 .write_emulated
= emulator_write_emulated
,
5247 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5248 .invlpg
= emulator_invlpg
,
5249 .pio_in_emulated
= emulator_pio_in_emulated
,
5250 .pio_out_emulated
= emulator_pio_out_emulated
,
5251 .get_segment
= emulator_get_segment
,
5252 .set_segment
= emulator_set_segment
,
5253 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5254 .get_gdt
= emulator_get_gdt
,
5255 .get_idt
= emulator_get_idt
,
5256 .set_gdt
= emulator_set_gdt
,
5257 .set_idt
= emulator_set_idt
,
5258 .get_cr
= emulator_get_cr
,
5259 .set_cr
= emulator_set_cr
,
5260 .cpl
= emulator_get_cpl
,
5261 .get_dr
= emulator_get_dr
,
5262 .set_dr
= emulator_set_dr
,
5263 .get_smbase
= emulator_get_smbase
,
5264 .set_smbase
= emulator_set_smbase
,
5265 .set_msr
= emulator_set_msr
,
5266 .get_msr
= emulator_get_msr
,
5267 .check_pmc
= emulator_check_pmc
,
5268 .read_pmc
= emulator_read_pmc
,
5269 .halt
= emulator_halt
,
5270 .wbinvd
= emulator_wbinvd
,
5271 .fix_hypercall
= emulator_fix_hypercall
,
5272 .get_fpu
= emulator_get_fpu
,
5273 .put_fpu
= emulator_put_fpu
,
5274 .intercept
= emulator_intercept
,
5275 .get_cpuid
= emulator_get_cpuid
,
5276 .set_nmi_mask
= emulator_set_nmi_mask
,
5277 .get_hflags
= emulator_get_hflags
,
5278 .set_hflags
= emulator_set_hflags
,
5281 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5283 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5285 * an sti; sti; sequence only disable interrupts for the first
5286 * instruction. So, if the last instruction, be it emulated or
5287 * not, left the system with the INT_STI flag enabled, it
5288 * means that the last instruction is an sti. We should not
5289 * leave the flag on in this case. The same goes for mov ss
5291 if (int_shadow
& mask
)
5293 if (unlikely(int_shadow
|| mask
)) {
5294 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5296 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5300 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5302 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5303 if (ctxt
->exception
.vector
== PF_VECTOR
)
5304 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5306 if (ctxt
->exception
.error_code_valid
)
5307 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5308 ctxt
->exception
.error_code
);
5310 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5314 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5316 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5319 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5321 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5322 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5324 ctxt
->eip
= kvm_rip_read(vcpu
);
5325 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5326 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5327 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5328 cs_db
? X86EMUL_MODE_PROT32
:
5329 X86EMUL_MODE_PROT16
;
5330 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5331 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5332 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5334 init_decode_cache(ctxt
);
5335 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5338 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5340 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5343 init_emulate_ctxt(vcpu
);
5347 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5348 ret
= emulate_int_real(ctxt
, irq
);
5350 if (ret
!= X86EMUL_CONTINUE
)
5351 return EMULATE_FAIL
;
5353 ctxt
->eip
= ctxt
->_eip
;
5354 kvm_rip_write(vcpu
, ctxt
->eip
);
5355 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5357 if (irq
== NMI_VECTOR
)
5358 vcpu
->arch
.nmi_pending
= 0;
5360 vcpu
->arch
.interrupt
.pending
= false;
5362 return EMULATE_DONE
;
5364 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5366 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5368 int r
= EMULATE_DONE
;
5370 ++vcpu
->stat
.insn_emulation_fail
;
5371 trace_kvm_emulate_insn_failed(vcpu
);
5372 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5373 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5374 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5375 vcpu
->run
->internal
.ndata
= 0;
5378 kvm_queue_exception(vcpu
, UD_VECTOR
);
5383 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5384 bool write_fault_to_shadow_pgtable
,
5390 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5393 if (!vcpu
->arch
.mmu
.direct_map
) {
5395 * Write permission should be allowed since only
5396 * write access need to be emulated.
5398 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5401 * If the mapping is invalid in guest, let cpu retry
5402 * it to generate fault.
5404 if (gpa
== UNMAPPED_GVA
)
5409 * Do not retry the unhandleable instruction if it faults on the
5410 * readonly host memory, otherwise it will goto a infinite loop:
5411 * retry instruction -> write #PF -> emulation fail -> retry
5412 * instruction -> ...
5414 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5417 * If the instruction failed on the error pfn, it can not be fixed,
5418 * report the error to userspace.
5420 if (is_error_noslot_pfn(pfn
))
5423 kvm_release_pfn_clean(pfn
);
5425 /* The instructions are well-emulated on direct mmu. */
5426 if (vcpu
->arch
.mmu
.direct_map
) {
5427 unsigned int indirect_shadow_pages
;
5429 spin_lock(&vcpu
->kvm
->mmu_lock
);
5430 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5431 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5433 if (indirect_shadow_pages
)
5434 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5440 * if emulation was due to access to shadowed page table
5441 * and it failed try to unshadow page and re-enter the
5442 * guest to let CPU execute the instruction.
5444 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5447 * If the access faults on its page table, it can not
5448 * be fixed by unprotecting shadow page and it should
5449 * be reported to userspace.
5451 return !write_fault_to_shadow_pgtable
;
5454 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5455 unsigned long cr2
, int emulation_type
)
5457 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5458 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5460 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5461 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5464 * If the emulation is caused by #PF and it is non-page_table
5465 * writing instruction, it means the VM-EXIT is caused by shadow
5466 * page protected, we can zap the shadow page and retry this
5467 * instruction directly.
5469 * Note: if the guest uses a non-page-table modifying instruction
5470 * on the PDE that points to the instruction, then we will unmap
5471 * the instruction and go to an infinite loop. So, we cache the
5472 * last retried eip and the last fault address, if we meet the eip
5473 * and the address again, we can break out of the potential infinite
5476 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5478 if (!(emulation_type
& EMULTYPE_RETRY
))
5481 if (x86_page_table_writing_insn(ctxt
))
5484 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5487 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5488 vcpu
->arch
.last_retry_addr
= cr2
;
5490 if (!vcpu
->arch
.mmu
.direct_map
)
5491 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5493 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5498 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5499 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5501 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5503 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5504 /* This is a good place to trace that we are exiting SMM. */
5505 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5507 /* Process a latched INIT or SMI, if any. */
5508 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5511 kvm_mmu_reset_context(vcpu
);
5514 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5516 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5518 vcpu
->arch
.hflags
= emul_flags
;
5520 if (changed
& HF_SMM_MASK
)
5521 kvm_smm_changed(vcpu
);
5524 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5533 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5534 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5539 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5541 struct kvm_run
*kvm_run
= vcpu
->run
;
5543 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5544 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5545 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5546 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5547 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5548 *r
= EMULATE_USER_EXIT
;
5551 * "Certain debug exceptions may clear bit 0-3. The
5552 * remaining contents of the DR6 register are never
5553 * cleared by the processor".
5555 vcpu
->arch
.dr6
&= ~15;
5556 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5557 kvm_queue_exception(vcpu
, DB_VECTOR
);
5561 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5563 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5564 int r
= EMULATE_DONE
;
5566 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5569 * rflags is the old, "raw" value of the flags. The new value has
5570 * not been saved yet.
5572 * This is correct even for TF set by the guest, because "the
5573 * processor will not generate this exception after the instruction
5574 * that sets the TF flag".
5576 if (unlikely(rflags
& X86_EFLAGS_TF
))
5577 kvm_vcpu_do_singlestep(vcpu
, &r
);
5578 return r
== EMULATE_DONE
;
5580 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5582 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5584 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5585 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5586 struct kvm_run
*kvm_run
= vcpu
->run
;
5587 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5588 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5589 vcpu
->arch
.guest_debug_dr7
,
5593 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5594 kvm_run
->debug
.arch
.pc
= eip
;
5595 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5596 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5597 *r
= EMULATE_USER_EXIT
;
5602 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5603 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5604 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5605 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5610 vcpu
->arch
.dr6
&= ~15;
5611 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5612 kvm_queue_exception(vcpu
, DB_VECTOR
);
5621 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5628 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5629 bool writeback
= true;
5630 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5633 * Clear write_fault_to_shadow_pgtable here to ensure it is
5636 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5637 kvm_clear_exception_queue(vcpu
);
5639 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5640 init_emulate_ctxt(vcpu
);
5643 * We will reenter on the same instruction since
5644 * we do not set complete_userspace_io. This does not
5645 * handle watchpoints yet, those would be handled in
5648 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5651 ctxt
->interruptibility
= 0;
5652 ctxt
->have_exception
= false;
5653 ctxt
->exception
.vector
= -1;
5654 ctxt
->perm_ok
= false;
5656 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5658 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5660 trace_kvm_emulate_insn_start(vcpu
);
5661 ++vcpu
->stat
.insn_emulation
;
5662 if (r
!= EMULATION_OK
) {
5663 if (emulation_type
& EMULTYPE_TRAP_UD
)
5664 return EMULATE_FAIL
;
5665 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5667 return EMULATE_DONE
;
5668 if (emulation_type
& EMULTYPE_SKIP
)
5669 return EMULATE_FAIL
;
5670 return handle_emulation_failure(vcpu
);
5674 if (emulation_type
& EMULTYPE_SKIP
) {
5675 kvm_rip_write(vcpu
, ctxt
->_eip
);
5676 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5677 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5678 return EMULATE_DONE
;
5681 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5682 return EMULATE_DONE
;
5684 /* this is needed for vmware backdoor interface to work since it
5685 changes registers values during IO operation */
5686 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5687 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5688 emulator_invalidate_register_cache(ctxt
);
5692 /* Save the faulting GPA (cr2) in the address field */
5693 ctxt
->exception
.address
= cr2
;
5695 r
= x86_emulate_insn(ctxt
);
5697 if (r
== EMULATION_INTERCEPTED
)
5698 return EMULATE_DONE
;
5700 if (r
== EMULATION_FAILED
) {
5701 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5703 return EMULATE_DONE
;
5705 return handle_emulation_failure(vcpu
);
5708 if (ctxt
->have_exception
) {
5710 if (inject_emulated_exception(vcpu
))
5712 } else if (vcpu
->arch
.pio
.count
) {
5713 if (!vcpu
->arch
.pio
.in
) {
5714 /* FIXME: return into emulator if single-stepping. */
5715 vcpu
->arch
.pio
.count
= 0;
5718 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5720 r
= EMULATE_USER_EXIT
;
5721 } else if (vcpu
->mmio_needed
) {
5722 if (!vcpu
->mmio_is_write
)
5724 r
= EMULATE_USER_EXIT
;
5725 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5726 } else if (r
== EMULATION_RESTART
)
5732 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5733 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5734 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5735 kvm_rip_write(vcpu
, ctxt
->eip
);
5736 if (r
== EMULATE_DONE
&&
5737 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5738 kvm_vcpu_do_singlestep(vcpu
, &r
);
5739 if (!ctxt
->have_exception
||
5740 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5741 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5744 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5745 * do nothing, and it will be requested again as soon as
5746 * the shadow expires. But we still need to check here,
5747 * because POPF has no interrupt shadow.
5749 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5750 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5752 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5756 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5758 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5760 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5761 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5762 size
, port
, &val
, 1);
5763 /* do not return to emulator after return from userspace */
5764 vcpu
->arch
.pio
.count
= 0;
5767 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5769 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5773 /* We should only ever be called with arch.pio.count equal to 1 */
5774 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5776 /* For size less than 4 we merge, else we zero extend */
5777 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5781 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5782 * the copy and tracing
5784 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5785 vcpu
->arch
.pio
.port
, &val
, 1);
5786 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5791 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5796 /* For size less than 4 we merge, else we zero extend */
5797 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5799 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5802 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5806 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5810 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5812 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5814 __this_cpu_write(cpu_tsc_khz
, 0);
5818 static void tsc_khz_changed(void *data
)
5820 struct cpufreq_freqs
*freq
= data
;
5821 unsigned long khz
= 0;
5825 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5826 khz
= cpufreq_quick_get(raw_smp_processor_id());
5829 __this_cpu_write(cpu_tsc_khz
, khz
);
5832 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5835 struct cpufreq_freqs
*freq
= data
;
5837 struct kvm_vcpu
*vcpu
;
5838 int i
, send_ipi
= 0;
5841 * We allow guests to temporarily run on slowing clocks,
5842 * provided we notify them after, or to run on accelerating
5843 * clocks, provided we notify them before. Thus time never
5846 * However, we have a problem. We can't atomically update
5847 * the frequency of a given CPU from this function; it is
5848 * merely a notifier, which can be called from any CPU.
5849 * Changing the TSC frequency at arbitrary points in time
5850 * requires a recomputation of local variables related to
5851 * the TSC for each VCPU. We must flag these local variables
5852 * to be updated and be sure the update takes place with the
5853 * new frequency before any guests proceed.
5855 * Unfortunately, the combination of hotplug CPU and frequency
5856 * change creates an intractable locking scenario; the order
5857 * of when these callouts happen is undefined with respect to
5858 * CPU hotplug, and they can race with each other. As such,
5859 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5860 * undefined; you can actually have a CPU frequency change take
5861 * place in between the computation of X and the setting of the
5862 * variable. To protect against this problem, all updates of
5863 * the per_cpu tsc_khz variable are done in an interrupt
5864 * protected IPI, and all callers wishing to update the value
5865 * must wait for a synchronous IPI to complete (which is trivial
5866 * if the caller is on the CPU already). This establishes the
5867 * necessary total order on variable updates.
5869 * Note that because a guest time update may take place
5870 * anytime after the setting of the VCPU's request bit, the
5871 * correct TSC value must be set before the request. However,
5872 * to ensure the update actually makes it to any guest which
5873 * starts running in hardware virtualization between the set
5874 * and the acquisition of the spinlock, we must also ping the
5875 * CPU after setting the request bit.
5879 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5881 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5884 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5886 spin_lock(&kvm_lock
);
5887 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5888 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5889 if (vcpu
->cpu
!= freq
->cpu
)
5891 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5892 if (vcpu
->cpu
!= smp_processor_id())
5896 spin_unlock(&kvm_lock
);
5898 if (freq
->old
< freq
->new && send_ipi
) {
5900 * We upscale the frequency. Must make the guest
5901 * doesn't see old kvmclock values while running with
5902 * the new frequency, otherwise we risk the guest sees
5903 * time go backwards.
5905 * In case we update the frequency for another cpu
5906 * (which might be in guest context) send an interrupt
5907 * to kick the cpu out of guest context. Next time
5908 * guest context is entered kvmclock will be updated,
5909 * so the guest will not see stale values.
5911 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5916 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5917 .notifier_call
= kvmclock_cpufreq_notifier
5920 static int kvmclock_cpu_online(unsigned int cpu
)
5922 tsc_khz_changed(NULL
);
5926 static void kvm_timer_init(void)
5928 max_tsc_khz
= tsc_khz
;
5930 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5931 #ifdef CONFIG_CPU_FREQ
5932 struct cpufreq_policy policy
;
5935 memset(&policy
, 0, sizeof(policy
));
5937 cpufreq_get_policy(&policy
, cpu
);
5938 if (policy
.cpuinfo
.max_freq
)
5939 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5942 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5943 CPUFREQ_TRANSITION_NOTIFIER
);
5945 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5947 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5948 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5951 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5953 int kvm_is_in_guest(void)
5955 return __this_cpu_read(current_vcpu
) != NULL
;
5958 static int kvm_is_user_mode(void)
5962 if (__this_cpu_read(current_vcpu
))
5963 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5965 return user_mode
!= 0;
5968 static unsigned long kvm_get_guest_ip(void)
5970 unsigned long ip
= 0;
5972 if (__this_cpu_read(current_vcpu
))
5973 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5978 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5979 .is_in_guest
= kvm_is_in_guest
,
5980 .is_user_mode
= kvm_is_user_mode
,
5981 .get_guest_ip
= kvm_get_guest_ip
,
5984 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5986 __this_cpu_write(current_vcpu
, vcpu
);
5988 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5990 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5992 __this_cpu_write(current_vcpu
, NULL
);
5994 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5996 static void kvm_set_mmio_spte_mask(void)
5999 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6002 * Set the reserved bits and the present bit of an paging-structure
6003 * entry to generate page fault with PFER.RSV = 1.
6005 /* Mask the reserved physical address bits. */
6006 mask
= rsvd_bits(maxphyaddr
, 51);
6008 /* Set the present bit. */
6011 #ifdef CONFIG_X86_64
6013 * If reserved bit is not supported, clear the present bit to disable
6016 if (maxphyaddr
== 52)
6020 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6023 #ifdef CONFIG_X86_64
6024 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6028 struct kvm_vcpu
*vcpu
;
6031 spin_lock(&kvm_lock
);
6032 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6033 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6034 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6035 atomic_set(&kvm_guest_has_master_clock
, 0);
6036 spin_unlock(&kvm_lock
);
6039 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6042 * Notification about pvclock gtod data update.
6044 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6047 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6048 struct timekeeper
*tk
= priv
;
6050 update_pvclock_gtod(tk
);
6052 /* disable master clock if host does not trust, or does not
6053 * use, TSC clocksource
6055 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6056 atomic_read(&kvm_guest_has_master_clock
) != 0)
6057 queue_work(system_long_wq
, &pvclock_gtod_work
);
6062 static struct notifier_block pvclock_gtod_notifier
= {
6063 .notifier_call
= pvclock_gtod_notify
,
6067 int kvm_arch_init(void *opaque
)
6070 struct kvm_x86_ops
*ops
= opaque
;
6073 printk(KERN_ERR
"kvm: already loaded the other module\n");
6078 if (!ops
->cpu_has_kvm_support()) {
6079 printk(KERN_ERR
"kvm: no hardware support\n");
6083 if (ops
->disabled_by_bios()) {
6084 printk(KERN_ERR
"kvm: disabled by bios\n");
6090 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6092 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6096 r
= kvm_mmu_module_init();
6098 goto out_free_percpu
;
6100 kvm_set_mmio_spte_mask();
6104 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6105 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6106 PT_PRESENT_MASK
, 0);
6109 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6111 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6112 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6115 #ifdef CONFIG_X86_64
6116 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6122 free_percpu(shared_msrs
);
6127 void kvm_arch_exit(void)
6130 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6132 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6133 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6134 CPUFREQ_TRANSITION_NOTIFIER
);
6135 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6136 #ifdef CONFIG_X86_64
6137 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6140 kvm_mmu_module_exit();
6141 free_percpu(shared_msrs
);
6144 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6146 ++vcpu
->stat
.halt_exits
;
6147 if (lapic_in_kernel(vcpu
)) {
6148 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6151 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6155 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6157 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6159 int ret
= kvm_skip_emulated_instruction(vcpu
);
6161 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6162 * KVM_EXIT_DEBUG here.
6164 return kvm_vcpu_halt(vcpu
) && ret
;
6166 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6168 #ifdef CONFIG_X86_64
6169 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6170 unsigned long clock_type
)
6172 struct kvm_clock_pairing clock_pairing
;
6177 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6178 return -KVM_EOPNOTSUPP
;
6180 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6181 return -KVM_EOPNOTSUPP
;
6183 clock_pairing
.sec
= ts
.tv_sec
;
6184 clock_pairing
.nsec
= ts
.tv_nsec
;
6185 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6186 clock_pairing
.flags
= 0;
6189 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6190 sizeof(struct kvm_clock_pairing
)))
6198 * kvm_pv_kick_cpu_op: Kick a vcpu.
6200 * @apicid - apicid of vcpu to be kicked.
6202 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6204 struct kvm_lapic_irq lapic_irq
;
6206 lapic_irq
.shorthand
= 0;
6207 lapic_irq
.dest_mode
= 0;
6208 lapic_irq
.dest_id
= apicid
;
6209 lapic_irq
.msi_redir_hint
= false;
6211 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6212 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6215 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6217 vcpu
->arch
.apicv_active
= false;
6218 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6221 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6223 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6226 r
= kvm_skip_emulated_instruction(vcpu
);
6228 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6229 return kvm_hv_hypercall(vcpu
);
6231 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6232 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6233 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6234 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6235 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6237 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6239 op_64_bit
= is_64_bit_mode(vcpu
);
6248 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6254 case KVM_HC_VAPIC_POLL_IRQ
:
6257 case KVM_HC_KICK_CPU
:
6258 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6261 #ifdef CONFIG_X86_64
6262 case KVM_HC_CLOCK_PAIRING
:
6263 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6273 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6274 ++vcpu
->stat
.hypercalls
;
6277 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6279 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6281 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6282 char instruction
[3];
6283 unsigned long rip
= kvm_rip_read(vcpu
);
6285 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6287 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6291 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6293 return vcpu
->run
->request_interrupt_window
&&
6294 likely(!pic_in_kernel(vcpu
->kvm
));
6297 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6299 struct kvm_run
*kvm_run
= vcpu
->run
;
6301 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6302 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6303 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6304 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6305 kvm_run
->ready_for_interrupt_injection
=
6306 pic_in_kernel(vcpu
->kvm
) ||
6307 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6310 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6314 if (!kvm_x86_ops
->update_cr8_intercept
)
6317 if (!lapic_in_kernel(vcpu
))
6320 if (vcpu
->arch
.apicv_active
)
6323 if (!vcpu
->arch
.apic
->vapic_addr
)
6324 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6331 tpr
= kvm_lapic_get_cr8(vcpu
);
6333 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6336 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6340 /* try to reinject previous events if any */
6341 if (vcpu
->arch
.exception
.pending
) {
6342 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6343 vcpu
->arch
.exception
.has_error_code
,
6344 vcpu
->arch
.exception
.error_code
);
6346 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6347 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6350 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6351 (vcpu
->arch
.dr7
& DR7_GD
)) {
6352 vcpu
->arch
.dr7
&= ~DR7_GD
;
6353 kvm_update_dr7(vcpu
);
6356 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6357 vcpu
->arch
.exception
.has_error_code
,
6358 vcpu
->arch
.exception
.error_code
,
6359 vcpu
->arch
.exception
.reinject
);
6363 if (vcpu
->arch
.nmi_injected
) {
6364 kvm_x86_ops
->set_nmi(vcpu
);
6368 if (vcpu
->arch
.interrupt
.pending
) {
6369 kvm_x86_ops
->set_irq(vcpu
);
6373 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6374 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6379 /* try to inject new event if pending */
6380 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6381 vcpu
->arch
.smi_pending
= false;
6383 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6384 --vcpu
->arch
.nmi_pending
;
6385 vcpu
->arch
.nmi_injected
= true;
6386 kvm_x86_ops
->set_nmi(vcpu
);
6387 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6389 * Because interrupts can be injected asynchronously, we are
6390 * calling check_nested_events again here to avoid a race condition.
6391 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6392 * proposal and current concerns. Perhaps we should be setting
6393 * KVM_REQ_EVENT only on certain events and not unconditionally?
6395 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6396 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6400 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6401 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6403 kvm_x86_ops
->set_irq(vcpu
);
6410 static void process_nmi(struct kvm_vcpu
*vcpu
)
6415 * x86 is limited to one NMI running, and one NMI pending after it.
6416 * If an NMI is already in progress, limit further NMIs to just one.
6417 * Otherwise, allow two (and we'll inject the first one immediately).
6419 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6422 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6423 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6424 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6427 #define put_smstate(type, buf, offset, val) \
6428 *(type *)((buf) + (offset) - 0x7e00) = val
6430 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6433 flags
|= seg
->g
<< 23;
6434 flags
|= seg
->db
<< 22;
6435 flags
|= seg
->l
<< 21;
6436 flags
|= seg
->avl
<< 20;
6437 flags
|= seg
->present
<< 15;
6438 flags
|= seg
->dpl
<< 13;
6439 flags
|= seg
->s
<< 12;
6440 flags
|= seg
->type
<< 8;
6444 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6446 struct kvm_segment seg
;
6449 kvm_get_segment(vcpu
, &seg
, n
);
6450 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6453 offset
= 0x7f84 + n
* 12;
6455 offset
= 0x7f2c + (n
- 3) * 12;
6457 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6458 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6459 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6462 #ifdef CONFIG_X86_64
6463 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6465 struct kvm_segment seg
;
6469 kvm_get_segment(vcpu
, &seg
, n
);
6470 offset
= 0x7e00 + n
* 16;
6472 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6473 put_smstate(u16
, buf
, offset
, seg
.selector
);
6474 put_smstate(u16
, buf
, offset
+ 2, flags
);
6475 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6476 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6480 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6483 struct kvm_segment seg
;
6487 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6488 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6489 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6490 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6492 for (i
= 0; i
< 8; i
++)
6493 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6495 kvm_get_dr(vcpu
, 6, &val
);
6496 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6497 kvm_get_dr(vcpu
, 7, &val
);
6498 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6500 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6501 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6502 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6503 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6504 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6506 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6507 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6508 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6509 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6510 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6512 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6513 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6514 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6516 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6517 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6518 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6520 for (i
= 0; i
< 6; i
++)
6521 enter_smm_save_seg_32(vcpu
, buf
, i
);
6523 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6526 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6527 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6530 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6532 #ifdef CONFIG_X86_64
6534 struct kvm_segment seg
;
6538 for (i
= 0; i
< 16; i
++)
6539 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6541 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6542 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6544 kvm_get_dr(vcpu
, 6, &val
);
6545 put_smstate(u64
, buf
, 0x7f68, val
);
6546 kvm_get_dr(vcpu
, 7, &val
);
6547 put_smstate(u64
, buf
, 0x7f60, val
);
6549 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6550 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6551 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6553 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6556 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6558 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6560 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6561 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6562 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6563 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6564 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6566 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6567 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6568 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6570 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6571 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6572 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6573 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6574 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6576 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6577 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6578 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6580 for (i
= 0; i
< 6; i
++)
6581 enter_smm_save_seg_64(vcpu
, buf
, i
);
6587 static void enter_smm(struct kvm_vcpu
*vcpu
)
6589 struct kvm_segment cs
, ds
;
6594 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6595 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6596 memset(buf
, 0, 512);
6597 if (guest_cpuid_has_longmode(vcpu
))
6598 enter_smm_save_state_64(vcpu
, buf
);
6600 enter_smm_save_state_32(vcpu
, buf
);
6602 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6604 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6605 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6607 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6609 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6610 kvm_rip_write(vcpu
, 0x8000);
6612 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6613 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6614 vcpu
->arch
.cr0
= cr0
;
6616 kvm_x86_ops
->set_cr4(vcpu
, 0);
6618 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6619 dt
.address
= dt
.size
= 0;
6620 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6622 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6624 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6625 cs
.base
= vcpu
->arch
.smbase
;
6630 cs
.limit
= ds
.limit
= 0xffffffff;
6631 cs
.type
= ds
.type
= 0x3;
6632 cs
.dpl
= ds
.dpl
= 0;
6637 cs
.avl
= ds
.avl
= 0;
6638 cs
.present
= ds
.present
= 1;
6639 cs
.unusable
= ds
.unusable
= 0;
6640 cs
.padding
= ds
.padding
= 0;
6642 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6643 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6644 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6645 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6646 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6647 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6649 if (guest_cpuid_has_longmode(vcpu
))
6650 kvm_x86_ops
->set_efer(vcpu
, 0);
6652 kvm_update_cpuid(vcpu
);
6653 kvm_mmu_reset_context(vcpu
);
6656 static void process_smi(struct kvm_vcpu
*vcpu
)
6658 vcpu
->arch
.smi_pending
= true;
6659 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6662 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6664 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6667 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6669 u64 eoi_exit_bitmap
[4];
6671 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6674 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6676 if (irqchip_split(vcpu
->kvm
))
6677 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6679 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6680 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6681 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6683 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6684 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6685 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6688 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6690 ++vcpu
->stat
.tlb_flush
;
6691 kvm_x86_ops
->tlb_flush(vcpu
);
6694 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6696 struct page
*page
= NULL
;
6698 if (!lapic_in_kernel(vcpu
))
6701 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6704 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6705 if (is_error_page(page
))
6707 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6710 * Do not pin apic access page in memory, the MMU notifier
6711 * will call us again if it is migrated or swapped out.
6715 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6717 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6718 unsigned long address
)
6721 * The physical address of apic access page is stored in the VMCS.
6722 * Update it when it becomes invalid.
6724 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6725 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6729 * Returns 1 to let vcpu_run() continue the guest execution loop without
6730 * exiting to the userspace. Otherwise, the value will be returned to the
6733 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6737 dm_request_for_irq_injection(vcpu
) &&
6738 kvm_cpu_accept_dm_intr(vcpu
);
6740 bool req_immediate_exit
= false;
6742 if (kvm_request_pending(vcpu
)) {
6743 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6744 kvm_mmu_unload(vcpu
);
6745 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6746 __kvm_migrate_timers(vcpu
);
6747 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6748 kvm_gen_update_masterclock(vcpu
->kvm
);
6749 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6750 kvm_gen_kvmclock_update(vcpu
);
6751 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6752 r
= kvm_guest_time_update(vcpu
);
6756 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6757 kvm_mmu_sync_roots(vcpu
);
6758 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6759 kvm_vcpu_flush_tlb(vcpu
);
6760 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6761 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6765 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6766 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6770 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6771 /* Page is swapped out. Do synthetic halt */
6772 vcpu
->arch
.apf
.halted
= true;
6776 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6777 record_steal_time(vcpu
);
6778 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6780 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6782 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6783 kvm_pmu_handle_event(vcpu
);
6784 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6785 kvm_pmu_deliver_pmi(vcpu
);
6786 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6787 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6788 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6789 vcpu
->arch
.ioapic_handled_vectors
)) {
6790 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6791 vcpu
->run
->eoi
.vector
=
6792 vcpu
->arch
.pending_ioapic_eoi
;
6797 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6798 vcpu_scan_ioapic(vcpu
);
6799 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6800 kvm_vcpu_reload_apic_access_page(vcpu
);
6801 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6802 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6803 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6807 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6808 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6809 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6813 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6814 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6815 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6821 * KVM_REQ_HV_STIMER has to be processed after
6822 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6823 * depend on the guest clock being up-to-date
6825 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6826 kvm_hv_process_stimers(vcpu
);
6829 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6830 ++vcpu
->stat
.req_event
;
6831 kvm_apic_accept_events(vcpu
);
6832 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6837 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6838 req_immediate_exit
= true;
6840 /* Enable NMI/IRQ window open exits if needed.
6842 * SMIs have two cases: 1) they can be nested, and
6843 * then there is nothing to do here because RSM will
6844 * cause a vmexit anyway; 2) or the SMI can be pending
6845 * because inject_pending_event has completed the
6846 * injection of an IRQ or NMI from the previous vmexit,
6847 * and then we request an immediate exit to inject the SMI.
6849 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6850 req_immediate_exit
= true;
6851 if (vcpu
->arch
.nmi_pending
)
6852 kvm_x86_ops
->enable_nmi_window(vcpu
);
6853 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6854 kvm_x86_ops
->enable_irq_window(vcpu
);
6857 if (kvm_lapic_enabled(vcpu
)) {
6858 update_cr8_intercept(vcpu
);
6859 kvm_lapic_sync_to_vapic(vcpu
);
6863 r
= kvm_mmu_reload(vcpu
);
6865 goto cancel_injection
;
6870 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6871 kvm_load_guest_fpu(vcpu
);
6874 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6875 * IPI are then delayed after guest entry, which ensures that they
6876 * result in virtual interrupt delivery.
6878 local_irq_disable();
6879 vcpu
->mode
= IN_GUEST_MODE
;
6881 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6884 * 1) We should set ->mode before checking ->requests. Please see
6885 * the comment in kvm_vcpu_exiting_guest_mode().
6887 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6888 * pairs with the memory barrier implicit in pi_test_and_set_on
6889 * (see vmx_deliver_posted_interrupt).
6891 * 3) This also orders the write to mode from any reads to the page
6892 * tables done while the VCPU is running. Please see the comment
6893 * in kvm_flush_remote_tlbs.
6895 smp_mb__after_srcu_read_unlock();
6898 * This handles the case where a posted interrupt was
6899 * notified with kvm_vcpu_kick.
6901 if (kvm_lapic_enabled(vcpu
)) {
6902 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6903 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6906 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
6907 || need_resched() || signal_pending(current
)) {
6908 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6912 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6914 goto cancel_injection
;
6917 kvm_load_guest_xcr0(vcpu
);
6919 if (req_immediate_exit
) {
6920 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6921 smp_send_reschedule(vcpu
->cpu
);
6924 trace_kvm_entry(vcpu
->vcpu_id
);
6925 wait_lapic_expire(vcpu
);
6926 guest_enter_irqoff();
6928 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6930 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6931 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6932 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6933 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6934 set_debugreg(vcpu
->arch
.dr6
, 6);
6935 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6938 kvm_x86_ops
->run(vcpu
);
6941 * Do this here before restoring debug registers on the host. And
6942 * since we do this before handling the vmexit, a DR access vmexit
6943 * can (a) read the correct value of the debug registers, (b) set
6944 * KVM_DEBUGREG_WONT_EXIT again.
6946 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6947 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6948 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6949 kvm_update_dr0123(vcpu
);
6950 kvm_update_dr6(vcpu
);
6951 kvm_update_dr7(vcpu
);
6952 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6956 * If the guest has used debug registers, at least dr7
6957 * will be disabled while returning to the host.
6958 * If we don't have active breakpoints in the host, we don't
6959 * care about the messed up debug address registers. But if
6960 * we have some of them active, restore the old state.
6962 if (hw_breakpoint_active())
6963 hw_breakpoint_restore();
6965 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6967 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6970 kvm_put_guest_xcr0(vcpu
);
6972 kvm_x86_ops
->handle_external_intr(vcpu
);
6976 guest_exit_irqoff();
6981 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6984 * Profile KVM exit RIPs:
6986 if (unlikely(prof_on
== KVM_PROFILING
)) {
6987 unsigned long rip
= kvm_rip_read(vcpu
);
6988 profile_hit(KVM_PROFILING
, (void *)rip
);
6991 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6992 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6994 if (vcpu
->arch
.apic_attention
)
6995 kvm_lapic_sync_from_vapic(vcpu
);
6997 r
= kvm_x86_ops
->handle_exit(vcpu
);
7001 kvm_x86_ops
->cancel_injection(vcpu
);
7002 if (unlikely(vcpu
->arch
.apic_attention
))
7003 kvm_lapic_sync_from_vapic(vcpu
);
7008 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7010 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7011 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7012 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7013 kvm_vcpu_block(vcpu
);
7014 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7016 if (kvm_x86_ops
->post_block
)
7017 kvm_x86_ops
->post_block(vcpu
);
7019 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7023 kvm_apic_accept_events(vcpu
);
7024 switch(vcpu
->arch
.mp_state
) {
7025 case KVM_MP_STATE_HALTED
:
7026 vcpu
->arch
.pv
.pv_unhalted
= false;
7027 vcpu
->arch
.mp_state
=
7028 KVM_MP_STATE_RUNNABLE
;
7029 case KVM_MP_STATE_RUNNABLE
:
7030 vcpu
->arch
.apf
.halted
= false;
7032 case KVM_MP_STATE_INIT_RECEIVED
:
7041 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7043 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7044 kvm_x86_ops
->check_nested_events(vcpu
, false);
7046 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7047 !vcpu
->arch
.apf
.halted
);
7050 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7053 struct kvm
*kvm
= vcpu
->kvm
;
7055 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7058 if (kvm_vcpu_running(vcpu
)) {
7059 r
= vcpu_enter_guest(vcpu
);
7061 r
= vcpu_block(kvm
, vcpu
);
7067 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7068 if (kvm_cpu_has_pending_timer(vcpu
))
7069 kvm_inject_pending_timer_irqs(vcpu
);
7071 if (dm_request_for_irq_injection(vcpu
) &&
7072 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7074 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7075 ++vcpu
->stat
.request_irq_exits
;
7079 kvm_check_async_pf_completion(vcpu
);
7081 if (signal_pending(current
)) {
7083 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7084 ++vcpu
->stat
.signal_exits
;
7087 if (need_resched()) {
7088 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7090 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7094 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7099 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7102 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7103 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7104 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7105 if (r
!= EMULATE_DONE
)
7110 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7112 BUG_ON(!vcpu
->arch
.pio
.count
);
7114 return complete_emulated_io(vcpu
);
7118 * Implements the following, as a state machine:
7122 * for each mmio piece in the fragment
7130 * for each mmio piece in the fragment
7135 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7137 struct kvm_run
*run
= vcpu
->run
;
7138 struct kvm_mmio_fragment
*frag
;
7141 BUG_ON(!vcpu
->mmio_needed
);
7143 /* Complete previous fragment */
7144 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7145 len
= min(8u, frag
->len
);
7146 if (!vcpu
->mmio_is_write
)
7147 memcpy(frag
->data
, run
->mmio
.data
, len
);
7149 if (frag
->len
<= 8) {
7150 /* Switch to the next fragment. */
7152 vcpu
->mmio_cur_fragment
++;
7154 /* Go forward to the next mmio piece. */
7160 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7161 vcpu
->mmio_needed
= 0;
7163 /* FIXME: return into emulator if single-stepping. */
7164 if (vcpu
->mmio_is_write
)
7166 vcpu
->mmio_read_completed
= 1;
7167 return complete_emulated_io(vcpu
);
7170 run
->exit_reason
= KVM_EXIT_MMIO
;
7171 run
->mmio
.phys_addr
= frag
->gpa
;
7172 if (vcpu
->mmio_is_write
)
7173 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7174 run
->mmio
.len
= min(8u, frag
->len
);
7175 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7176 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7181 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7183 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7187 fpu__activate_curr(fpu
);
7189 if (vcpu
->sigset_active
)
7190 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7192 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7193 kvm_vcpu_block(vcpu
);
7194 kvm_apic_accept_events(vcpu
);
7195 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7200 /* re-sync apic's tpr */
7201 if (!lapic_in_kernel(vcpu
)) {
7202 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7208 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7209 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7210 vcpu
->arch
.complete_userspace_io
= NULL
;
7215 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7217 if (kvm_run
->immediate_exit
)
7223 post_kvm_run_save(vcpu
);
7224 if (vcpu
->sigset_active
)
7225 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7230 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7232 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7234 * We are here if userspace calls get_regs() in the middle of
7235 * instruction emulation. Registers state needs to be copied
7236 * back from emulation context to vcpu. Userspace shouldn't do
7237 * that usually, but some bad designed PV devices (vmware
7238 * backdoor interface) need this to work
7240 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7241 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7243 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7244 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7245 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7246 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7247 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7248 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7249 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7250 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7251 #ifdef CONFIG_X86_64
7252 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7253 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7254 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7255 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7256 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7257 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7258 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7259 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7262 regs
->rip
= kvm_rip_read(vcpu
);
7263 regs
->rflags
= kvm_get_rflags(vcpu
);
7268 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7270 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7271 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7273 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7274 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7275 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7276 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7277 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7278 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7279 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7280 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7281 #ifdef CONFIG_X86_64
7282 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7283 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7284 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7285 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7286 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7287 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7288 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7289 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7292 kvm_rip_write(vcpu
, regs
->rip
);
7293 kvm_set_rflags(vcpu
, regs
->rflags
);
7295 vcpu
->arch
.exception
.pending
= false;
7297 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7302 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7304 struct kvm_segment cs
;
7306 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7310 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7312 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7313 struct kvm_sregs
*sregs
)
7317 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7318 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7319 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7320 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7321 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7322 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7324 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7325 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7327 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7328 sregs
->idt
.limit
= dt
.size
;
7329 sregs
->idt
.base
= dt
.address
;
7330 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7331 sregs
->gdt
.limit
= dt
.size
;
7332 sregs
->gdt
.base
= dt
.address
;
7334 sregs
->cr0
= kvm_read_cr0(vcpu
);
7335 sregs
->cr2
= vcpu
->arch
.cr2
;
7336 sregs
->cr3
= kvm_read_cr3(vcpu
);
7337 sregs
->cr4
= kvm_read_cr4(vcpu
);
7338 sregs
->cr8
= kvm_get_cr8(vcpu
);
7339 sregs
->efer
= vcpu
->arch
.efer
;
7340 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7342 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7344 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7345 set_bit(vcpu
->arch
.interrupt
.nr
,
7346 (unsigned long *)sregs
->interrupt_bitmap
);
7351 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7352 struct kvm_mp_state
*mp_state
)
7354 kvm_apic_accept_events(vcpu
);
7355 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7356 vcpu
->arch
.pv
.pv_unhalted
)
7357 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7359 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7364 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7365 struct kvm_mp_state
*mp_state
)
7367 if (!lapic_in_kernel(vcpu
) &&
7368 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7371 /* INITs are latched while in SMM */
7372 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7373 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7374 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7377 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7378 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7379 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7381 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7382 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7386 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7387 int reason
, bool has_error_code
, u32 error_code
)
7389 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7392 init_emulate_ctxt(vcpu
);
7394 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7395 has_error_code
, error_code
);
7398 return EMULATE_FAIL
;
7400 kvm_rip_write(vcpu
, ctxt
->eip
);
7401 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7402 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7403 return EMULATE_DONE
;
7405 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7407 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7408 struct kvm_sregs
*sregs
)
7410 struct msr_data apic_base_msr
;
7411 int mmu_reset_needed
= 0;
7412 int pending_vec
, max_bits
, idx
;
7415 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7418 dt
.size
= sregs
->idt
.limit
;
7419 dt
.address
= sregs
->idt
.base
;
7420 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7421 dt
.size
= sregs
->gdt
.limit
;
7422 dt
.address
= sregs
->gdt
.base
;
7423 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7425 vcpu
->arch
.cr2
= sregs
->cr2
;
7426 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7427 vcpu
->arch
.cr3
= sregs
->cr3
;
7428 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7430 kvm_set_cr8(vcpu
, sregs
->cr8
);
7432 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7433 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7434 apic_base_msr
.data
= sregs
->apic_base
;
7435 apic_base_msr
.host_initiated
= true;
7436 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7438 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7439 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7440 vcpu
->arch
.cr0
= sregs
->cr0
;
7442 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7443 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7444 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7445 kvm_update_cpuid(vcpu
);
7447 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7448 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7449 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7450 mmu_reset_needed
= 1;
7452 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7454 if (mmu_reset_needed
)
7455 kvm_mmu_reset_context(vcpu
);
7457 max_bits
= KVM_NR_INTERRUPTS
;
7458 pending_vec
= find_first_bit(
7459 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7460 if (pending_vec
< max_bits
) {
7461 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7462 pr_debug("Set back pending irq %d\n", pending_vec
);
7465 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7466 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7467 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7468 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7469 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7470 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7472 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7473 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7475 update_cr8_intercept(vcpu
);
7477 /* Older userspace won't unhalt the vcpu on reset. */
7478 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7479 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7481 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7483 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7488 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7489 struct kvm_guest_debug
*dbg
)
7491 unsigned long rflags
;
7494 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7496 if (vcpu
->arch
.exception
.pending
)
7498 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7499 kvm_queue_exception(vcpu
, DB_VECTOR
);
7501 kvm_queue_exception(vcpu
, BP_VECTOR
);
7505 * Read rflags as long as potentially injected trace flags are still
7508 rflags
= kvm_get_rflags(vcpu
);
7510 vcpu
->guest_debug
= dbg
->control
;
7511 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7512 vcpu
->guest_debug
= 0;
7514 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7515 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7516 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7517 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7519 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7520 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7522 kvm_update_dr7(vcpu
);
7524 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7525 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7526 get_segment_base(vcpu
, VCPU_SREG_CS
);
7529 * Trigger an rflags update that will inject or remove the trace
7532 kvm_set_rflags(vcpu
, rflags
);
7534 kvm_x86_ops
->update_bp_intercept(vcpu
);
7544 * Translate a guest virtual address to a guest physical address.
7546 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7547 struct kvm_translation
*tr
)
7549 unsigned long vaddr
= tr
->linear_address
;
7553 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7554 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7555 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7556 tr
->physical_address
= gpa
;
7557 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7564 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7566 struct fxregs_state
*fxsave
=
7567 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7569 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7570 fpu
->fcw
= fxsave
->cwd
;
7571 fpu
->fsw
= fxsave
->swd
;
7572 fpu
->ftwx
= fxsave
->twd
;
7573 fpu
->last_opcode
= fxsave
->fop
;
7574 fpu
->last_ip
= fxsave
->rip
;
7575 fpu
->last_dp
= fxsave
->rdp
;
7576 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7581 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7583 struct fxregs_state
*fxsave
=
7584 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7586 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7587 fxsave
->cwd
= fpu
->fcw
;
7588 fxsave
->swd
= fpu
->fsw
;
7589 fxsave
->twd
= fpu
->ftwx
;
7590 fxsave
->fop
= fpu
->last_opcode
;
7591 fxsave
->rip
= fpu
->last_ip
;
7592 fxsave
->rdp
= fpu
->last_dp
;
7593 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7598 static void fx_init(struct kvm_vcpu
*vcpu
)
7600 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7601 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7602 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7603 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7606 * Ensure guest xcr0 is valid for loading
7608 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7610 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7613 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7615 if (vcpu
->guest_fpu_loaded
)
7619 * Restore all possible states in the guest,
7620 * and assume host would use all available bits.
7621 * Guest xcr0 would be loaded later.
7623 vcpu
->guest_fpu_loaded
= 1;
7624 __kernel_fpu_begin();
7625 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7629 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7631 if (!vcpu
->guest_fpu_loaded
)
7634 vcpu
->guest_fpu_loaded
= 0;
7635 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7637 ++vcpu
->stat
.fpu_reload
;
7641 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7643 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7645 kvmclock_reset(vcpu
);
7647 kvm_x86_ops
->vcpu_free(vcpu
);
7648 free_cpumask_var(wbinvd_dirty_mask
);
7651 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7654 struct kvm_vcpu
*vcpu
;
7656 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7657 printk_once(KERN_WARNING
7658 "kvm: SMP vm created on host with unstable TSC; "
7659 "guest TSC will not be reliable\n");
7661 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7666 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7670 kvm_vcpu_mtrr_init(vcpu
);
7671 r
= vcpu_load(vcpu
);
7674 kvm_vcpu_reset(vcpu
, false);
7675 kvm_mmu_setup(vcpu
);
7680 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7682 struct msr_data msr
;
7683 struct kvm
*kvm
= vcpu
->kvm
;
7685 if (vcpu_load(vcpu
))
7688 msr
.index
= MSR_IA32_TSC
;
7689 msr
.host_initiated
= true;
7690 kvm_write_tsc(vcpu
, &msr
);
7693 if (!kvmclock_periodic_sync
)
7696 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7697 KVMCLOCK_SYNC_PERIOD
);
7700 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7703 vcpu
->arch
.apf
.msr_val
= 0;
7705 r
= vcpu_load(vcpu
);
7707 kvm_mmu_unload(vcpu
);
7710 kvm_x86_ops
->vcpu_free(vcpu
);
7713 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7715 vcpu
->arch
.hflags
= 0;
7717 vcpu
->arch
.smi_pending
= 0;
7718 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7719 vcpu
->arch
.nmi_pending
= 0;
7720 vcpu
->arch
.nmi_injected
= false;
7721 kvm_clear_interrupt_queue(vcpu
);
7722 kvm_clear_exception_queue(vcpu
);
7724 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7725 kvm_update_dr0123(vcpu
);
7726 vcpu
->arch
.dr6
= DR6_INIT
;
7727 kvm_update_dr6(vcpu
);
7728 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7729 kvm_update_dr7(vcpu
);
7733 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7734 vcpu
->arch
.apf
.msr_val
= 0;
7735 vcpu
->arch
.st
.msr_val
= 0;
7737 kvmclock_reset(vcpu
);
7739 kvm_clear_async_pf_completion_queue(vcpu
);
7740 kvm_async_pf_hash_reset(vcpu
);
7741 vcpu
->arch
.apf
.halted
= false;
7744 kvm_pmu_reset(vcpu
);
7745 vcpu
->arch
.smbase
= 0x30000;
7747 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7748 vcpu
->arch
.msr_misc_features_enables
= 0;
7751 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7752 vcpu
->arch
.regs_avail
= ~0;
7753 vcpu
->arch
.regs_dirty
= ~0;
7755 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7758 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7760 struct kvm_segment cs
;
7762 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7763 cs
.selector
= vector
<< 8;
7764 cs
.base
= vector
<< 12;
7765 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7766 kvm_rip_write(vcpu
, 0);
7769 int kvm_arch_hardware_enable(void)
7772 struct kvm_vcpu
*vcpu
;
7777 bool stable
, backwards_tsc
= false;
7779 kvm_shared_msr_cpu_online();
7780 ret
= kvm_x86_ops
->hardware_enable();
7784 local_tsc
= rdtsc();
7785 stable
= !check_tsc_unstable();
7786 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7787 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7788 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7789 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7790 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7791 backwards_tsc
= true;
7792 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7793 max_tsc
= vcpu
->arch
.last_host_tsc
;
7799 * Sometimes, even reliable TSCs go backwards. This happens on
7800 * platforms that reset TSC during suspend or hibernate actions, but
7801 * maintain synchronization. We must compensate. Fortunately, we can
7802 * detect that condition here, which happens early in CPU bringup,
7803 * before any KVM threads can be running. Unfortunately, we can't
7804 * bring the TSCs fully up to date with real time, as we aren't yet far
7805 * enough into CPU bringup that we know how much real time has actually
7806 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7807 * variables that haven't been updated yet.
7809 * So we simply find the maximum observed TSC above, then record the
7810 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7811 * the adjustment will be applied. Note that we accumulate
7812 * adjustments, in case multiple suspend cycles happen before some VCPU
7813 * gets a chance to run again. In the event that no KVM threads get a
7814 * chance to run, we will miss the entire elapsed period, as we'll have
7815 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7816 * loose cycle time. This isn't too big a deal, since the loss will be
7817 * uniform across all VCPUs (not to mention the scenario is extremely
7818 * unlikely). It is possible that a second hibernate recovery happens
7819 * much faster than a first, causing the observed TSC here to be
7820 * smaller; this would require additional padding adjustment, which is
7821 * why we set last_host_tsc to the local tsc observed here.
7823 * N.B. - this code below runs only on platforms with reliable TSC,
7824 * as that is the only way backwards_tsc is set above. Also note
7825 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7826 * have the same delta_cyc adjustment applied if backwards_tsc
7827 * is detected. Note further, this adjustment is only done once,
7828 * as we reset last_host_tsc on all VCPUs to stop this from being
7829 * called multiple times (one for each physical CPU bringup).
7831 * Platforms with unreliable TSCs don't have to deal with this, they
7832 * will be compensated by the logic in vcpu_load, which sets the TSC to
7833 * catchup mode. This will catchup all VCPUs to real time, but cannot
7834 * guarantee that they stay in perfect synchronization.
7836 if (backwards_tsc
) {
7837 u64 delta_cyc
= max_tsc
- local_tsc
;
7838 backwards_tsc_observed
= true;
7839 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7840 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7841 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7842 vcpu
->arch
.last_host_tsc
= local_tsc
;
7843 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7847 * We have to disable TSC offset matching.. if you were
7848 * booting a VM while issuing an S4 host suspend....
7849 * you may have some problem. Solving this issue is
7850 * left as an exercise to the reader.
7852 kvm
->arch
.last_tsc_nsec
= 0;
7853 kvm
->arch
.last_tsc_write
= 0;
7860 void kvm_arch_hardware_disable(void)
7862 kvm_x86_ops
->hardware_disable();
7863 drop_user_return_notifiers();
7866 int kvm_arch_hardware_setup(void)
7870 r
= kvm_x86_ops
->hardware_setup();
7874 if (kvm_has_tsc_control
) {
7876 * Make sure the user can only configure tsc_khz values that
7877 * fit into a signed integer.
7878 * A min value is not calculated needed because it will always
7879 * be 1 on all machines.
7881 u64 max
= min(0x7fffffffULL
,
7882 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7883 kvm_max_guest_tsc_khz
= max
;
7885 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7888 kvm_init_msr_list();
7892 void kvm_arch_hardware_unsetup(void)
7894 kvm_x86_ops
->hardware_unsetup();
7897 void kvm_arch_check_processor_compat(void *rtn
)
7899 kvm_x86_ops
->check_processor_compatibility(rtn
);
7902 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7904 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7906 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7908 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7910 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7913 struct static_key kvm_no_apic_vcpu __read_mostly
;
7914 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7916 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7922 BUG_ON(vcpu
->kvm
== NULL
);
7925 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7926 vcpu
->arch
.pv
.pv_unhalted
= false;
7927 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7928 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7929 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7931 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7933 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7938 vcpu
->arch
.pio_data
= page_address(page
);
7940 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7942 r
= kvm_mmu_create(vcpu
);
7944 goto fail_free_pio_data
;
7946 if (irqchip_in_kernel(kvm
)) {
7947 r
= kvm_create_lapic(vcpu
);
7949 goto fail_mmu_destroy
;
7951 static_key_slow_inc(&kvm_no_apic_vcpu
);
7953 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7955 if (!vcpu
->arch
.mce_banks
) {
7957 goto fail_free_lapic
;
7959 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7961 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7963 goto fail_free_mce_banks
;
7968 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7969 vcpu
->arch
.pv_time_enabled
= false;
7971 vcpu
->arch
.guest_supported_xcr0
= 0;
7972 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7974 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7976 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7978 kvm_async_pf_hash_reset(vcpu
);
7981 vcpu
->arch
.pending_external_vector
= -1;
7983 kvm_hv_vcpu_init(vcpu
);
7987 fail_free_mce_banks
:
7988 kfree(vcpu
->arch
.mce_banks
);
7990 kvm_free_lapic(vcpu
);
7992 kvm_mmu_destroy(vcpu
);
7994 free_page((unsigned long)vcpu
->arch
.pio_data
);
7999 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8003 kvm_hv_vcpu_uninit(vcpu
);
8004 kvm_pmu_destroy(vcpu
);
8005 kfree(vcpu
->arch
.mce_banks
);
8006 kvm_free_lapic(vcpu
);
8007 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8008 kvm_mmu_destroy(vcpu
);
8009 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8010 free_page((unsigned long)vcpu
->arch
.pio_data
);
8011 if (!lapic_in_kernel(vcpu
))
8012 static_key_slow_dec(&kvm_no_apic_vcpu
);
8015 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8017 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8020 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8025 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8026 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8027 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8028 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8029 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8031 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8032 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8033 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8034 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8035 &kvm
->arch
.irq_sources_bitmap
);
8037 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8038 mutex_init(&kvm
->arch
.apic_map_lock
);
8039 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8040 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8042 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8043 pvclock_update_vm_gtod_copy(kvm
);
8045 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8046 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8048 kvm_page_track_init(kvm
);
8049 kvm_mmu_init_vm(kvm
);
8051 if (kvm_x86_ops
->vm_init
)
8052 return kvm_x86_ops
->vm_init(kvm
);
8057 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8060 r
= vcpu_load(vcpu
);
8062 kvm_mmu_unload(vcpu
);
8066 static void kvm_free_vcpus(struct kvm
*kvm
)
8069 struct kvm_vcpu
*vcpu
;
8072 * Unpin any mmu pages first.
8074 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8075 kvm_clear_async_pf_completion_queue(vcpu
);
8076 kvm_unload_vcpu_mmu(vcpu
);
8078 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8079 kvm_arch_vcpu_free(vcpu
);
8081 mutex_lock(&kvm
->lock
);
8082 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8083 kvm
->vcpus
[i
] = NULL
;
8085 atomic_set(&kvm
->online_vcpus
, 0);
8086 mutex_unlock(&kvm
->lock
);
8089 void kvm_arch_sync_events(struct kvm
*kvm
)
8091 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8092 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8096 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8100 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8101 struct kvm_memory_slot
*slot
, old
;
8103 /* Called with kvm->slots_lock held. */
8104 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8107 slot
= id_to_memslot(slots
, id
);
8113 * MAP_SHARED to prevent internal slot pages from being moved
8116 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8117 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8118 if (IS_ERR((void *)hva
))
8119 return PTR_ERR((void *)hva
);
8128 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8129 struct kvm_userspace_memory_region m
;
8131 m
.slot
= id
| (i
<< 16);
8133 m
.guest_phys_addr
= gpa
;
8134 m
.userspace_addr
= hva
;
8135 m
.memory_size
= size
;
8136 r
= __kvm_set_memory_region(kvm
, &m
);
8142 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8148 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8150 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8154 mutex_lock(&kvm
->slots_lock
);
8155 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8156 mutex_unlock(&kvm
->slots_lock
);
8160 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8162 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8164 if (current
->mm
== kvm
->mm
) {
8166 * Free memory regions allocated on behalf of userspace,
8167 * unless the the memory map has changed due to process exit
8170 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8171 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8172 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8174 if (kvm_x86_ops
->vm_destroy
)
8175 kvm_x86_ops
->vm_destroy(kvm
);
8176 kvm_pic_destroy(kvm
);
8177 kvm_ioapic_destroy(kvm
);
8178 kvm_free_vcpus(kvm
);
8179 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8180 kvm_mmu_uninit_vm(kvm
);
8181 kvm_page_track_cleanup(kvm
);
8184 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8185 struct kvm_memory_slot
*dont
)
8189 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8190 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8191 kvfree(free
->arch
.rmap
[i
]);
8192 free
->arch
.rmap
[i
] = NULL
;
8197 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8198 dont
->arch
.lpage_info
[i
- 1]) {
8199 kvfree(free
->arch
.lpage_info
[i
- 1]);
8200 free
->arch
.lpage_info
[i
- 1] = NULL
;
8204 kvm_page_track_free_memslot(free
, dont
);
8207 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8208 unsigned long npages
)
8212 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8213 struct kvm_lpage_info
*linfo
;
8218 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8219 slot
->base_gfn
, level
) + 1;
8221 slot
->arch
.rmap
[i
] =
8222 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8223 if (!slot
->arch
.rmap
[i
])
8228 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8232 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8234 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8235 linfo
[0].disallow_lpage
= 1;
8236 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8237 linfo
[lpages
- 1].disallow_lpage
= 1;
8238 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8240 * If the gfn and userspace address are not aligned wrt each
8241 * other, or if explicitly asked to, disable large page
8242 * support for this slot
8244 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8245 !kvm_largepages_enabled()) {
8248 for (j
= 0; j
< lpages
; ++j
)
8249 linfo
[j
].disallow_lpage
= 1;
8253 if (kvm_page_track_create_memslot(slot
, npages
))
8259 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8260 kvfree(slot
->arch
.rmap
[i
]);
8261 slot
->arch
.rmap
[i
] = NULL
;
8265 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8266 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8271 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8274 * memslots->generation has been incremented.
8275 * mmio generation may have reached its maximum value.
8277 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8280 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8281 struct kvm_memory_slot
*memslot
,
8282 const struct kvm_userspace_memory_region
*mem
,
8283 enum kvm_mr_change change
)
8288 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8289 struct kvm_memory_slot
*new)
8291 /* Still write protect RO slot */
8292 if (new->flags
& KVM_MEM_READONLY
) {
8293 kvm_mmu_slot_remove_write_access(kvm
, new);
8298 * Call kvm_x86_ops dirty logging hooks when they are valid.
8300 * kvm_x86_ops->slot_disable_log_dirty is called when:
8302 * - KVM_MR_CREATE with dirty logging is disabled
8303 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8305 * The reason is, in case of PML, we need to set D-bit for any slots
8306 * with dirty logging disabled in order to eliminate unnecessary GPA
8307 * logging in PML buffer (and potential PML buffer full VMEXT). This
8308 * guarantees leaving PML enabled during guest's lifetime won't have
8309 * any additonal overhead from PML when guest is running with dirty
8310 * logging disabled for memory slots.
8312 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8313 * to dirty logging mode.
8315 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8317 * In case of write protect:
8319 * Write protect all pages for dirty logging.
8321 * All the sptes including the large sptes which point to this
8322 * slot are set to readonly. We can not create any new large
8323 * spte on this slot until the end of the logging.
8325 * See the comments in fast_page_fault().
8327 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8328 if (kvm_x86_ops
->slot_enable_log_dirty
)
8329 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8331 kvm_mmu_slot_remove_write_access(kvm
, new);
8333 if (kvm_x86_ops
->slot_disable_log_dirty
)
8334 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8338 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8339 const struct kvm_userspace_memory_region
*mem
,
8340 const struct kvm_memory_slot
*old
,
8341 const struct kvm_memory_slot
*new,
8342 enum kvm_mr_change change
)
8344 int nr_mmu_pages
= 0;
8346 if (!kvm
->arch
.n_requested_mmu_pages
)
8347 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8350 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8353 * Dirty logging tracks sptes in 4k granularity, meaning that large
8354 * sptes have to be split. If live migration is successful, the guest
8355 * in the source machine will be destroyed and large sptes will be
8356 * created in the destination. However, if the guest continues to run
8357 * in the source machine (for example if live migration fails), small
8358 * sptes will remain around and cause bad performance.
8360 * Scan sptes if dirty logging has been stopped, dropping those
8361 * which can be collapsed into a single large-page spte. Later
8362 * page faults will create the large-page sptes.
8364 if ((change
!= KVM_MR_DELETE
) &&
8365 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8366 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8367 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8370 * Set up write protection and/or dirty logging for the new slot.
8372 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8373 * been zapped so no dirty logging staff is needed for old slot. For
8374 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8375 * new and it's also covered when dealing with the new slot.
8377 * FIXME: const-ify all uses of struct kvm_memory_slot.
8379 if (change
!= KVM_MR_DELETE
)
8380 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8383 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8385 kvm_mmu_invalidate_zap_all_pages(kvm
);
8388 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8389 struct kvm_memory_slot
*slot
)
8391 kvm_page_track_flush_slot(kvm
, slot
);
8394 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8396 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8399 if (kvm_apic_has_events(vcpu
))
8402 if (vcpu
->arch
.pv
.pv_unhalted
)
8405 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8406 (vcpu
->arch
.nmi_pending
&&
8407 kvm_x86_ops
->nmi_allowed(vcpu
)))
8410 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8411 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8414 if (kvm_arch_interrupt_allowed(vcpu
) &&
8415 kvm_cpu_has_interrupt(vcpu
))
8418 if (kvm_hv_has_stimer_pending(vcpu
))
8424 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8426 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8429 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8431 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8434 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8436 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8439 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8441 if (is_64_bit_mode(vcpu
))
8442 return kvm_rip_read(vcpu
);
8443 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8444 kvm_rip_read(vcpu
));
8446 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8448 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8450 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8452 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8454 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8456 unsigned long rflags
;
8458 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8459 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8460 rflags
&= ~X86_EFLAGS_TF
;
8463 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8465 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8467 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8468 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8469 rflags
|= X86_EFLAGS_TF
;
8470 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8473 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8475 __kvm_set_rflags(vcpu
, rflags
);
8476 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8478 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8480 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8484 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8488 r
= kvm_mmu_reload(vcpu
);
8492 if (!vcpu
->arch
.mmu
.direct_map
&&
8493 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8496 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8499 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8501 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8504 static inline u32
kvm_async_pf_next_probe(u32 key
)
8506 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8509 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8511 u32 key
= kvm_async_pf_hash_fn(gfn
);
8513 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8514 key
= kvm_async_pf_next_probe(key
);
8516 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8519 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8522 u32 key
= kvm_async_pf_hash_fn(gfn
);
8524 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8525 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8526 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8527 key
= kvm_async_pf_next_probe(key
);
8532 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8534 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8537 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8541 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8543 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8545 j
= kvm_async_pf_next_probe(j
);
8546 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8548 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8550 * k lies cyclically in ]i,j]
8552 * |....j i.k.| or |.k..j i...|
8554 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8555 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8560 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8563 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8567 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8568 struct kvm_async_pf
*work
)
8570 struct x86_exception fault
;
8572 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8573 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8575 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8576 (vcpu
->arch
.apf
.send_user_only
&&
8577 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8578 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8579 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8580 fault
.vector
= PF_VECTOR
;
8581 fault
.error_code_valid
= true;
8582 fault
.error_code
= 0;
8583 fault
.nested_page_fault
= false;
8584 fault
.address
= work
->arch
.token
;
8585 kvm_inject_page_fault(vcpu
, &fault
);
8589 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8590 struct kvm_async_pf
*work
)
8592 struct x86_exception fault
;
8594 if (work
->wakeup_all
)
8595 work
->arch
.token
= ~0; /* broadcast wakeup */
8597 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8598 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8600 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8601 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8602 fault
.vector
= PF_VECTOR
;
8603 fault
.error_code_valid
= true;
8604 fault
.error_code
= 0;
8605 fault
.nested_page_fault
= false;
8606 fault
.address
= work
->arch
.token
;
8607 kvm_inject_page_fault(vcpu
, &fault
);
8609 vcpu
->arch
.apf
.halted
= false;
8610 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8613 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8615 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8618 return kvm_can_do_async_pf(vcpu
);
8621 void kvm_arch_start_assignment(struct kvm
*kvm
)
8623 atomic_inc(&kvm
->arch
.assigned_device_count
);
8625 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8627 void kvm_arch_end_assignment(struct kvm
*kvm
)
8629 atomic_dec(&kvm
->arch
.assigned_device_count
);
8631 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8633 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8635 return atomic_read(&kvm
->arch
.assigned_device_count
);
8637 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8639 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8641 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8643 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8645 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8647 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8649 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8651 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8653 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8655 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8657 bool kvm_arch_has_irq_bypass(void)
8659 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8662 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8663 struct irq_bypass_producer
*prod
)
8665 struct kvm_kernel_irqfd
*irqfd
=
8666 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8668 irqfd
->producer
= prod
;
8670 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8671 prod
->irq
, irqfd
->gsi
, 1);
8674 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8675 struct irq_bypass_producer
*prod
)
8678 struct kvm_kernel_irqfd
*irqfd
=
8679 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8681 WARN_ON(irqfd
->producer
!= prod
);
8682 irqfd
->producer
= NULL
;
8685 * When producer of consumer is unregistered, we change back to
8686 * remapped mode, so we can re-use the current implementation
8687 * when the irq is masked/disabled or the consumer side (KVM
8688 * int this case doesn't want to receive the interrupts.
8690 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8692 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8693 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8696 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8697 uint32_t guest_irq
, bool set
)
8699 if (!kvm_x86_ops
->update_pi_irte
)
8702 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8705 bool kvm_vector_hashing_enabled(void)
8707 return vector_hashing
;
8709 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8711 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8712 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8713 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8714 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8715 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8716 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8717 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8718 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8719 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8720 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8721 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8722 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8723 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8724 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8725 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);