2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 unsigned int min_timer_period_us
= 500;
111 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
113 static bool __read_mostly kvmclock_periodic_sync
= true;
114 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
116 bool __read_mostly kvm_has_tsc_control
;
117 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
118 u32 __read_mostly kvm_max_guest_tsc_khz
;
119 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
120 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
121 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
122 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
123 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
124 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
125 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
127 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
128 static u32 __read_mostly tsc_tolerance_ppm
= 250;
129 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
131 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
132 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
133 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
135 static bool __read_mostly vector_hashing
= true;
136 module_param(vector_hashing
, bool, S_IRUGO
);
138 static bool __read_mostly backwards_tsc_observed
= false;
140 #define KVM_NR_SHARED_MSRS 16
142 struct kvm_shared_msrs_global
{
144 u32 msrs
[KVM_NR_SHARED_MSRS
];
147 struct kvm_shared_msrs
{
148 struct user_return_notifier urn
;
150 struct kvm_shared_msr_values
{
153 } values
[KVM_NR_SHARED_MSRS
];
156 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
157 static struct kvm_shared_msrs __percpu
*shared_msrs
;
159 struct kvm_stats_debugfs_item debugfs_entries
[] = {
160 { "pf_fixed", VCPU_STAT(pf_fixed
) },
161 { "pf_guest", VCPU_STAT(pf_guest
) },
162 { "tlb_flush", VCPU_STAT(tlb_flush
) },
163 { "invlpg", VCPU_STAT(invlpg
) },
164 { "exits", VCPU_STAT(exits
) },
165 { "io_exits", VCPU_STAT(io_exits
) },
166 { "mmio_exits", VCPU_STAT(mmio_exits
) },
167 { "signal_exits", VCPU_STAT(signal_exits
) },
168 { "irq_window", VCPU_STAT(irq_window_exits
) },
169 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
170 { "halt_exits", VCPU_STAT(halt_exits
) },
171 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
172 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
173 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
174 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
175 { "hypercalls", VCPU_STAT(hypercalls
) },
176 { "request_irq", VCPU_STAT(request_irq_exits
) },
177 { "irq_exits", VCPU_STAT(irq_exits
) },
178 { "host_state_reload", VCPU_STAT(host_state_reload
) },
179 { "efer_reload", VCPU_STAT(efer_reload
) },
180 { "fpu_reload", VCPU_STAT(fpu_reload
) },
181 { "insn_emulation", VCPU_STAT(insn_emulation
) },
182 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
183 { "irq_injections", VCPU_STAT(irq_injections
) },
184 { "nmi_injections", VCPU_STAT(nmi_injections
) },
185 { "req_event", VCPU_STAT(req_event
) },
186 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
187 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
188 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
189 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
190 { "mmu_flooded", VM_STAT(mmu_flooded
) },
191 { "mmu_recycled", VM_STAT(mmu_recycled
) },
192 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
193 { "mmu_unsync", VM_STAT(mmu_unsync
) },
194 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
195 { "largepages", VM_STAT(lpages
) },
196 { "max_mmu_page_hash_collisions",
197 VM_STAT(max_mmu_page_hash_collisions
) },
201 u64 __read_mostly host_xcr0
;
203 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
205 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
208 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
209 vcpu
->arch
.apf
.gfns
[i
] = ~0;
212 static void kvm_on_user_return(struct user_return_notifier
*urn
)
215 struct kvm_shared_msrs
*locals
216 = container_of(urn
, struct kvm_shared_msrs
, urn
);
217 struct kvm_shared_msr_values
*values
;
221 * Disabling irqs at this point since the following code could be
222 * interrupted and executed through kvm_arch_hardware_disable()
224 local_irq_save(flags
);
225 if (locals
->registered
) {
226 locals
->registered
= false;
227 user_return_notifier_unregister(urn
);
229 local_irq_restore(flags
);
230 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
231 values
= &locals
->values
[slot
];
232 if (values
->host
!= values
->curr
) {
233 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
234 values
->curr
= values
->host
;
239 static void shared_msr_update(unsigned slot
, u32 msr
)
242 unsigned int cpu
= smp_processor_id();
243 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
245 /* only read, and nobody should modify it at this time,
246 * so don't need lock */
247 if (slot
>= shared_msrs_global
.nr
) {
248 printk(KERN_ERR
"kvm: invalid MSR slot!");
251 rdmsrl_safe(msr
, &value
);
252 smsr
->values
[slot
].host
= value
;
253 smsr
->values
[slot
].curr
= value
;
256 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
258 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
259 shared_msrs_global
.msrs
[slot
] = msr
;
260 if (slot
>= shared_msrs_global
.nr
)
261 shared_msrs_global
.nr
= slot
+ 1;
263 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
265 static void kvm_shared_msr_cpu_online(void)
269 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
270 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
273 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
275 unsigned int cpu
= smp_processor_id();
276 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
279 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
281 smsr
->values
[slot
].curr
= value
;
282 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
286 if (!smsr
->registered
) {
287 smsr
->urn
.on_user_return
= kvm_on_user_return
;
288 user_return_notifier_register(&smsr
->urn
);
289 smsr
->registered
= true;
293 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
295 static void drop_user_return_notifiers(void)
297 unsigned int cpu
= smp_processor_id();
298 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
300 if (smsr
->registered
)
301 kvm_on_user_return(&smsr
->urn
);
304 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
306 return vcpu
->arch
.apic_base
;
308 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
310 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
312 u64 old_state
= vcpu
->arch
.apic_base
&
313 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
314 u64 new_state
= msr_info
->data
&
315 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
316 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
317 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
319 if (!msr_info
->host_initiated
&&
320 ((msr_info
->data
& reserved_bits
) != 0 ||
321 new_state
== X2APIC_ENABLE
||
322 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
323 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
324 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
328 kvm_lapic_set_base(vcpu
, msr_info
->data
);
331 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
333 asmlinkage __visible
void kvm_spurious_fault(void)
335 /* Fault while not rebooting. We want the trace. */
338 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
340 #define EXCPT_BENIGN 0
341 #define EXCPT_CONTRIBUTORY 1
344 static int exception_class(int vector
)
354 return EXCPT_CONTRIBUTORY
;
361 #define EXCPT_FAULT 0
363 #define EXCPT_ABORT 2
364 #define EXCPT_INTERRUPT 3
366 static int exception_type(int vector
)
370 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
371 return EXCPT_INTERRUPT
;
375 /* #DB is trap, as instruction watchpoints are handled elsewhere */
376 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
379 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
382 /* Reserved exceptions will result in fault */
386 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
387 unsigned nr
, bool has_error
, u32 error_code
,
393 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
395 if (!vcpu
->arch
.exception
.pending
) {
397 if (has_error
&& !is_protmode(vcpu
))
399 vcpu
->arch
.exception
.pending
= true;
400 vcpu
->arch
.exception
.has_error_code
= has_error
;
401 vcpu
->arch
.exception
.nr
= nr
;
402 vcpu
->arch
.exception
.error_code
= error_code
;
403 vcpu
->arch
.exception
.reinject
= reinject
;
407 /* to check exception */
408 prev_nr
= vcpu
->arch
.exception
.nr
;
409 if (prev_nr
== DF_VECTOR
) {
410 /* triple fault -> shutdown */
411 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
414 class1
= exception_class(prev_nr
);
415 class2
= exception_class(nr
);
416 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
417 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
418 /* generate double fault per SDM Table 5-5 */
419 vcpu
->arch
.exception
.pending
= true;
420 vcpu
->arch
.exception
.has_error_code
= true;
421 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
422 vcpu
->arch
.exception
.error_code
= 0;
424 /* replace previous exception with a new one in a hope
425 that instruction re-execution will regenerate lost
430 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
432 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
434 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
436 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
438 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
440 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
442 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
445 kvm_inject_gp(vcpu
, 0);
447 return kvm_skip_emulated_instruction(vcpu
);
451 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
453 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
455 ++vcpu
->stat
.pf_guest
;
456 vcpu
->arch
.cr2
= fault
->address
;
457 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
459 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
461 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
463 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
464 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
466 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
468 return fault
->nested_page_fault
;
471 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
473 atomic_inc(&vcpu
->arch
.nmi_queued
);
474 kvm_make_request(KVM_REQ_NMI
, vcpu
);
476 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
478 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
480 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
482 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
484 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
486 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
488 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
491 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
492 * a #GP and return false.
494 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
496 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
498 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
501 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
503 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
505 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
508 kvm_queue_exception(vcpu
, UD_VECTOR
);
511 EXPORT_SYMBOL_GPL(kvm_require_dr
);
514 * This function will be used to read from the physical memory of the currently
515 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
516 * can read from guest physical or from the guest's guest physical memory.
518 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
519 gfn_t ngfn
, void *data
, int offset
, int len
,
522 struct x86_exception exception
;
526 ngpa
= gfn_to_gpa(ngfn
);
527 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
528 if (real_gfn
== UNMAPPED_GVA
)
531 real_gfn
= gpa_to_gfn(real_gfn
);
533 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
535 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
537 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
538 void *data
, int offset
, int len
, u32 access
)
540 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
541 data
, offset
, len
, access
);
545 * Load the pae pdptrs. Return true is they are all valid.
547 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
549 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
550 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
553 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
555 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
556 offset
* sizeof(u64
), sizeof(pdpte
),
557 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
562 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
563 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
565 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
572 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
573 __set_bit(VCPU_EXREG_PDPTR
,
574 (unsigned long *)&vcpu
->arch
.regs_avail
);
575 __set_bit(VCPU_EXREG_PDPTR
,
576 (unsigned long *)&vcpu
->arch
.regs_dirty
);
581 EXPORT_SYMBOL_GPL(load_pdptrs
);
583 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
585 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
591 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
594 if (!test_bit(VCPU_EXREG_PDPTR
,
595 (unsigned long *)&vcpu
->arch
.regs_avail
))
598 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
599 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
600 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
601 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
604 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
609 EXPORT_SYMBOL_GPL(pdptrs_changed
);
611 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
613 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
614 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
619 if (cr0
& 0xffffffff00000000UL
)
623 cr0
&= ~CR0_RESERVED_BITS
;
625 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
628 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
631 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
633 if ((vcpu
->arch
.efer
& EFER_LME
)) {
638 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
643 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
648 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
651 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
653 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
654 kvm_clear_async_pf_completion_queue(vcpu
);
655 kvm_async_pf_hash_reset(vcpu
);
658 if ((cr0
^ old_cr0
) & update_bits
)
659 kvm_mmu_reset_context(vcpu
);
661 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
662 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
663 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
664 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
668 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
670 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
672 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
674 EXPORT_SYMBOL_GPL(kvm_lmsw
);
676 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
678 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
679 !vcpu
->guest_xcr0_loaded
) {
680 /* kvm_set_xcr() also depends on this */
681 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
682 vcpu
->guest_xcr0_loaded
= 1;
686 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
688 if (vcpu
->guest_xcr0_loaded
) {
689 if (vcpu
->arch
.xcr0
!= host_xcr0
)
690 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
691 vcpu
->guest_xcr0_loaded
= 0;
695 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
698 u64 old_xcr0
= vcpu
->arch
.xcr0
;
701 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
702 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
704 if (!(xcr0
& XFEATURE_MASK_FP
))
706 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
710 * Do not allow the guest to set bits that we do not support
711 * saving. However, xcr0 bit 0 is always set, even if the
712 * emulated CPU does not support XSAVE (see fx_init).
714 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
715 if (xcr0
& ~valid_bits
)
718 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
719 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
722 if (xcr0
& XFEATURE_MASK_AVX512
) {
723 if (!(xcr0
& XFEATURE_MASK_YMM
))
725 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
728 vcpu
->arch
.xcr0
= xcr0
;
730 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
731 kvm_update_cpuid(vcpu
);
735 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
737 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
738 __kvm_set_xcr(vcpu
, index
, xcr
)) {
739 kvm_inject_gp(vcpu
, 0);
744 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
746 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
748 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
749 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
750 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
752 if (cr4
& CR4_RESERVED_BITS
)
755 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
758 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
761 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
764 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
767 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
770 if (is_long_mode(vcpu
)) {
771 if (!(cr4
& X86_CR4_PAE
))
773 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
774 && ((cr4
^ old_cr4
) & pdptr_bits
)
775 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
779 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
780 if (!guest_cpuid_has_pcid(vcpu
))
783 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
784 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
788 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
791 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
792 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
793 kvm_mmu_reset_context(vcpu
);
795 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
796 kvm_update_cpuid(vcpu
);
800 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
802 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
805 cr3
&= ~CR3_PCID_INVD
;
808 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
809 kvm_mmu_sync_roots(vcpu
);
810 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
814 if (is_long_mode(vcpu
)) {
815 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
817 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
818 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
821 vcpu
->arch
.cr3
= cr3
;
822 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
823 kvm_mmu_new_cr3(vcpu
);
826 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
828 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
830 if (cr8
& CR8_RESERVED_BITS
)
832 if (lapic_in_kernel(vcpu
))
833 kvm_lapic_set_tpr(vcpu
, cr8
);
835 vcpu
->arch
.cr8
= cr8
;
838 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
840 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
842 if (lapic_in_kernel(vcpu
))
843 return kvm_lapic_get_cr8(vcpu
);
845 return vcpu
->arch
.cr8
;
847 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
849 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
853 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
854 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
855 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
856 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
860 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
862 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
863 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
866 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
870 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
871 dr7
= vcpu
->arch
.guest_debug_dr7
;
873 dr7
= vcpu
->arch
.dr7
;
874 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
875 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
876 if (dr7
& DR7_BP_EN_MASK
)
877 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
880 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
882 u64 fixed
= DR6_FIXED_1
;
884 if (!guest_cpuid_has_rtm(vcpu
))
889 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
893 vcpu
->arch
.db
[dr
] = val
;
894 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
895 vcpu
->arch
.eff_db
[dr
] = val
;
900 if (val
& 0xffffffff00000000ULL
)
902 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
903 kvm_update_dr6(vcpu
);
908 if (val
& 0xffffffff00000000ULL
)
910 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
911 kvm_update_dr7(vcpu
);
918 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
920 if (__kvm_set_dr(vcpu
, dr
, val
)) {
921 kvm_inject_gp(vcpu
, 0);
926 EXPORT_SYMBOL_GPL(kvm_set_dr
);
928 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
932 *val
= vcpu
->arch
.db
[dr
];
937 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
938 *val
= vcpu
->arch
.dr6
;
940 *val
= kvm_x86_ops
->get_dr6(vcpu
);
945 *val
= vcpu
->arch
.dr7
;
950 EXPORT_SYMBOL_GPL(kvm_get_dr
);
952 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
954 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
958 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
961 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
962 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
965 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
968 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
969 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
971 * This list is modified at module load time to reflect the
972 * capabilities of the host cpu. This capabilities test skips MSRs that are
973 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
974 * may depend on host virtualization features rather than host cpu features.
977 static u32 msrs_to_save
[] = {
978 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
981 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
983 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
984 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
987 static unsigned num_msrs_to_save
;
989 static u32 emulated_msrs
[] = {
990 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
991 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
992 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
993 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
994 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
995 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
998 HV_X64_MSR_VP_RUNTIME
,
1000 HV_X64_MSR_STIMER0_CONFIG
,
1001 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1004 MSR_IA32_TSC_ADJUST
,
1005 MSR_IA32_TSCDEADLINE
,
1006 MSR_IA32_MISC_ENABLE
,
1007 MSR_IA32_MCG_STATUS
,
1009 MSR_IA32_MCG_EXT_CTL
,
1013 static unsigned num_emulated_msrs
;
1015 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1017 if (efer
& efer_reserved_bits
)
1020 if (efer
& EFER_FFXSR
) {
1021 struct kvm_cpuid_entry2
*feat
;
1023 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1024 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1028 if (efer
& EFER_SVME
) {
1029 struct kvm_cpuid_entry2
*feat
;
1031 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1032 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1038 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1040 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1042 u64 old_efer
= vcpu
->arch
.efer
;
1044 if (!kvm_valid_efer(vcpu
, efer
))
1048 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1052 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1054 kvm_x86_ops
->set_efer(vcpu
, efer
);
1056 /* Update reserved bits */
1057 if ((efer
^ old_efer
) & EFER_NX
)
1058 kvm_mmu_reset_context(vcpu
);
1063 void kvm_enable_efer_bits(u64 mask
)
1065 efer_reserved_bits
&= ~mask
;
1067 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1070 * Writes msr value into into the appropriate "register".
1071 * Returns 0 on success, non-0 otherwise.
1072 * Assumes vcpu_load() was already called.
1074 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1076 switch (msr
->index
) {
1079 case MSR_KERNEL_GS_BASE
:
1082 if (is_noncanonical_address(msr
->data
))
1085 case MSR_IA32_SYSENTER_EIP
:
1086 case MSR_IA32_SYSENTER_ESP
:
1088 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1089 * non-canonical address is written on Intel but not on
1090 * AMD (which ignores the top 32-bits, because it does
1091 * not implement 64-bit SYSENTER).
1093 * 64-bit code should hence be able to write a non-canonical
1094 * value on AMD. Making the address canonical ensures that
1095 * vmentry does not fail on Intel after writing a non-canonical
1096 * value, and that something deterministic happens if the guest
1097 * invokes 64-bit SYSENTER.
1099 msr
->data
= get_canonical(msr
->data
);
1101 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1103 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1106 * Adapt set_msr() to msr_io()'s calling convention
1108 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1110 struct msr_data msr
;
1114 msr
.host_initiated
= true;
1115 r
= kvm_get_msr(vcpu
, &msr
);
1123 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1125 struct msr_data msr
;
1129 msr
.host_initiated
= true;
1130 return kvm_set_msr(vcpu
, &msr
);
1133 #ifdef CONFIG_X86_64
1134 struct pvclock_gtod_data
{
1137 struct { /* extract of a clocksource struct */
1150 static struct pvclock_gtod_data pvclock_gtod_data
;
1152 static void update_pvclock_gtod(struct timekeeper
*tk
)
1154 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1157 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1159 write_seqcount_begin(&vdata
->seq
);
1161 /* copy pvclock gtod data */
1162 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1163 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1164 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1165 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1166 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1168 vdata
->boot_ns
= boot_ns
;
1169 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1171 vdata
->wall_time_sec
= tk
->xtime_sec
;
1173 write_seqcount_end(&vdata
->seq
);
1177 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1180 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1181 * vcpu_enter_guest. This function is only called from
1182 * the physical CPU that is running vcpu.
1184 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1187 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1191 struct pvclock_wall_clock wc
;
1192 struct timespec64 boot
;
1197 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1202 ++version
; /* first time write, random junk */
1206 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1210 * The guest calculates current wall clock time by adding
1211 * system time (updated by kvm_guest_time_update below) to the
1212 * wall clock specified here. guest system time equals host
1213 * system time for us, thus we must fill in host boot time here.
1215 getboottime64(&boot
);
1217 if (kvm
->arch
.kvmclock_offset
) {
1218 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1219 boot
= timespec64_sub(boot
, ts
);
1221 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1222 wc
.nsec
= boot
.tv_nsec
;
1223 wc
.version
= version
;
1225 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1228 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1231 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1233 do_shl32_div32(dividend
, divisor
);
1237 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1238 s8
*pshift
, u32
*pmultiplier
)
1246 scaled64
= scaled_hz
;
1247 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1252 tps32
= (uint32_t)tps64
;
1253 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1254 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1262 *pmultiplier
= div_frac(scaled64
, tps32
);
1264 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1265 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1268 #ifdef CONFIG_X86_64
1269 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1272 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1273 static unsigned long max_tsc_khz
;
1275 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1277 u64 v
= (u64
)khz
* (1000000 + ppm
);
1282 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1286 /* Guest TSC same frequency as host TSC? */
1288 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1292 /* TSC scaling supported? */
1293 if (!kvm_has_tsc_control
) {
1294 if (user_tsc_khz
> tsc_khz
) {
1295 vcpu
->arch
.tsc_catchup
= 1;
1296 vcpu
->arch
.tsc_always_catchup
= 1;
1299 WARN(1, "user requested TSC rate below hardware speed\n");
1304 /* TSC scaling required - calculate ratio */
1305 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1306 user_tsc_khz
, tsc_khz
);
1308 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1309 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1314 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1318 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1320 u32 thresh_lo
, thresh_hi
;
1321 int use_scaling
= 0;
1323 /* tsc_khz can be zero if TSC calibration fails */
1324 if (user_tsc_khz
== 0) {
1325 /* set tsc_scaling_ratio to a safe value */
1326 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1330 /* Compute a scale to convert nanoseconds in TSC cycles */
1331 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1332 &vcpu
->arch
.virtual_tsc_shift
,
1333 &vcpu
->arch
.virtual_tsc_mult
);
1334 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1337 * Compute the variation in TSC rate which is acceptable
1338 * within the range of tolerance and decide if the
1339 * rate being applied is within that bounds of the hardware
1340 * rate. If so, no scaling or compensation need be done.
1342 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1343 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1344 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1345 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1348 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1351 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1353 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1354 vcpu
->arch
.virtual_tsc_mult
,
1355 vcpu
->arch
.virtual_tsc_shift
);
1356 tsc
+= vcpu
->arch
.this_tsc_write
;
1360 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1362 #ifdef CONFIG_X86_64
1364 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1365 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1367 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1368 atomic_read(&vcpu
->kvm
->online_vcpus
));
1371 * Once the masterclock is enabled, always perform request in
1372 * order to update it.
1374 * In order to enable masterclock, the host clocksource must be TSC
1375 * and the vcpus need to have matched TSCs. When that happens,
1376 * perform request to enable masterclock.
1378 if (ka
->use_master_clock
||
1379 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1380 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1382 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1383 atomic_read(&vcpu
->kvm
->online_vcpus
),
1384 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1388 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1390 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1391 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1395 * Multiply tsc by a fixed point number represented by ratio.
1397 * The most significant 64-N bits (mult) of ratio represent the
1398 * integral part of the fixed point number; the remaining N bits
1399 * (frac) represent the fractional part, ie. ratio represents a fixed
1400 * point number (mult + frac * 2^(-N)).
1402 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1404 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1406 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1409 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1412 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1414 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1415 _tsc
= __scale_tsc(ratio
, tsc
);
1419 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1421 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1425 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1427 return target_tsc
- tsc
;
1430 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1432 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1434 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1436 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1438 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1439 vcpu
->arch
.tsc_offset
= offset
;
1442 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1444 struct kvm
*kvm
= vcpu
->kvm
;
1445 u64 offset
, ns
, elapsed
;
1446 unsigned long flags
;
1449 bool already_matched
;
1450 u64 data
= msr
->data
;
1452 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1453 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1454 ns
= ktime_get_boot_ns();
1455 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1457 if (vcpu
->arch
.virtual_tsc_khz
) {
1460 /* n.b - signed multiplication and division required */
1461 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1462 #ifdef CONFIG_X86_64
1463 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1465 /* do_div() only does unsigned */
1466 asm("1: idivl %[divisor]\n"
1467 "2: xor %%edx, %%edx\n"
1468 " movl $0, %[faulted]\n"
1470 ".section .fixup,\"ax\"\n"
1471 "4: movl $1, %[faulted]\n"
1475 _ASM_EXTABLE(1b
, 4b
)
1477 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1478 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1481 do_div(elapsed
, 1000);
1486 /* idivl overflow => difference is larger than USEC_PER_SEC */
1488 usdiff
= USEC_PER_SEC
;
1490 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1493 * Special case: TSC write with a small delta (1 second) of virtual
1494 * cycle time against real time is interpreted as an attempt to
1495 * synchronize the CPU.
1497 * For a reliable TSC, we can match TSC offsets, and for an unstable
1498 * TSC, we add elapsed time in this computation. We could let the
1499 * compensation code attempt to catch up if we fall behind, but
1500 * it's better to try to match offsets from the beginning.
1502 if (usdiff
< USEC_PER_SEC
&&
1503 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1504 if (!check_tsc_unstable()) {
1505 offset
= kvm
->arch
.cur_tsc_offset
;
1506 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1508 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1510 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1511 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1514 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1517 * We split periods of matched TSC writes into generations.
1518 * For each generation, we track the original measured
1519 * nanosecond time, offset, and write, so if TSCs are in
1520 * sync, we can match exact offset, and if not, we can match
1521 * exact software computation in compute_guest_tsc()
1523 * These values are tracked in kvm->arch.cur_xxx variables.
1525 kvm
->arch
.cur_tsc_generation
++;
1526 kvm
->arch
.cur_tsc_nsec
= ns
;
1527 kvm
->arch
.cur_tsc_write
= data
;
1528 kvm
->arch
.cur_tsc_offset
= offset
;
1530 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1531 kvm
->arch
.cur_tsc_generation
, data
);
1535 * We also track th most recent recorded KHZ, write and time to
1536 * allow the matching interval to be extended at each write.
1538 kvm
->arch
.last_tsc_nsec
= ns
;
1539 kvm
->arch
.last_tsc_write
= data
;
1540 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1542 vcpu
->arch
.last_guest_tsc
= data
;
1544 /* Keep track of which generation this VCPU has synchronized to */
1545 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1546 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1547 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1549 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1550 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1551 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1552 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1554 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1556 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1557 } else if (!already_matched
) {
1558 kvm
->arch
.nr_vcpus_matched_tsc
++;
1561 kvm_track_tsc_matching(vcpu
);
1562 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1565 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1567 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1570 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1573 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1575 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1576 WARN_ON(adjustment
< 0);
1577 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1578 adjust_tsc_offset_guest(vcpu
, adjustment
);
1581 #ifdef CONFIG_X86_64
1583 static u64
read_tsc(void)
1585 u64 ret
= (u64
)rdtsc_ordered();
1586 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1588 if (likely(ret
>= last
))
1592 * GCC likes to generate cmov here, but this branch is extremely
1593 * predictable (it's just a function of time and the likely is
1594 * very likely) and there's a data dependence, so force GCC
1595 * to generate a branch instead. I don't barrier() because
1596 * we don't actually need a barrier, and if this function
1597 * ever gets inlined it will generate worse code.
1603 static inline u64
vgettsc(u64
*cycle_now
)
1606 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1608 *cycle_now
= read_tsc();
1610 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1611 return v
* gtod
->clock
.mult
;
1614 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1616 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1622 seq
= read_seqcount_begin(>od
->seq
);
1623 mode
= gtod
->clock
.vclock_mode
;
1624 ns
= gtod
->nsec_base
;
1625 ns
+= vgettsc(cycle_now
);
1626 ns
>>= gtod
->clock
.shift
;
1627 ns
+= gtod
->boot_ns
;
1628 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1634 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1636 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1642 seq
= read_seqcount_begin(>od
->seq
);
1643 mode
= gtod
->clock
.vclock_mode
;
1644 ts
->tv_sec
= gtod
->wall_time_sec
;
1645 ns
= gtod
->nsec_base
;
1646 ns
+= vgettsc(cycle_now
);
1647 ns
>>= gtod
->clock
.shift
;
1648 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1650 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1656 /* returns true if host is using tsc clocksource */
1657 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1659 /* checked again under seqlock below */
1660 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1663 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1666 /* returns true if host is using tsc clocksource */
1667 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1670 /* checked again under seqlock below */
1671 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1674 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1680 * Assuming a stable TSC across physical CPUS, and a stable TSC
1681 * across virtual CPUs, the following condition is possible.
1682 * Each numbered line represents an event visible to both
1683 * CPUs at the next numbered event.
1685 * "timespecX" represents host monotonic time. "tscX" represents
1688 * VCPU0 on CPU0 | VCPU1 on CPU1
1690 * 1. read timespec0,tsc0
1691 * 2. | timespec1 = timespec0 + N
1693 * 3. transition to guest | transition to guest
1694 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1695 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1696 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1698 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1701 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1703 * - 0 < N - M => M < N
1705 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1706 * always the case (the difference between two distinct xtime instances
1707 * might be smaller then the difference between corresponding TSC reads,
1708 * when updating guest vcpus pvclock areas).
1710 * To avoid that problem, do not allow visibility of distinct
1711 * system_timestamp/tsc_timestamp values simultaneously: use a master
1712 * copy of host monotonic time values. Update that master copy
1715 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1719 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1721 #ifdef CONFIG_X86_64
1722 struct kvm_arch
*ka
= &kvm
->arch
;
1724 bool host_tsc_clocksource
, vcpus_matched
;
1726 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1727 atomic_read(&kvm
->online_vcpus
));
1730 * If the host uses TSC clock, then passthrough TSC as stable
1733 host_tsc_clocksource
= kvm_get_time_and_clockread(
1734 &ka
->master_kernel_ns
,
1735 &ka
->master_cycle_now
);
1737 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1738 && !backwards_tsc_observed
1739 && !ka
->boot_vcpu_runs_old_kvmclock
;
1741 if (ka
->use_master_clock
)
1742 atomic_set(&kvm_guest_has_master_clock
, 1);
1744 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1745 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1750 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1752 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1755 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1757 #ifdef CONFIG_X86_64
1759 struct kvm_vcpu
*vcpu
;
1760 struct kvm_arch
*ka
= &kvm
->arch
;
1762 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1763 kvm_make_mclock_inprogress_request(kvm
);
1764 /* no guest entries from this point */
1765 pvclock_update_vm_gtod_copy(kvm
);
1767 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1768 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1770 /* guest entries allowed */
1771 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1772 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1774 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1778 static u64
__get_kvmclock_ns(struct kvm
*kvm
)
1780 struct kvm_arch
*ka
= &kvm
->arch
;
1781 struct pvclock_vcpu_time_info hv_clock
;
1783 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1784 if (!ka
->use_master_clock
) {
1785 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1786 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1789 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1790 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1791 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1793 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1794 &hv_clock
.tsc_shift
,
1795 &hv_clock
.tsc_to_system_mul
);
1796 return __pvclock_read_cycles(&hv_clock
, rdtsc());
1799 u64
get_kvmclock_ns(struct kvm
*kvm
)
1801 unsigned long flags
;
1804 local_irq_save(flags
);
1805 ns
= __get_kvmclock_ns(kvm
);
1806 local_irq_restore(flags
);
1811 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1813 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1814 struct pvclock_vcpu_time_info guest_hv_clock
;
1816 if (unlikely(kvm_vcpu_read_guest_cached(v
, &vcpu
->pv_time
,
1817 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1820 /* This VCPU is paused, but it's legal for a guest to read another
1821 * VCPU's kvmclock, so we really have to follow the specification where
1822 * it says that version is odd if data is being modified, and even after
1825 * Version field updates must be kept separate. This is because
1826 * kvm_write_guest_cached might use a "rep movs" instruction, and
1827 * writes within a string instruction are weakly ordered. So there
1828 * are three writes overall.
1830 * As a small optimization, only write the version field in the first
1831 * and third write. The vcpu->pv_time cache is still valid, because the
1832 * version field is the first in the struct.
1834 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1836 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1837 kvm_vcpu_write_guest_cached(v
, &vcpu
->pv_time
,
1839 sizeof(vcpu
->hv_clock
.version
));
1843 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1844 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1846 if (vcpu
->pvclock_set_guest_stopped_request
) {
1847 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1848 vcpu
->pvclock_set_guest_stopped_request
= false;
1851 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1853 kvm_vcpu_write_guest_cached(v
, &vcpu
->pv_time
,
1855 sizeof(vcpu
->hv_clock
));
1859 vcpu
->hv_clock
.version
++;
1860 kvm_vcpu_write_guest_cached(v
, &vcpu
->pv_time
,
1862 sizeof(vcpu
->hv_clock
.version
));
1865 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1867 unsigned long flags
, tgt_tsc_khz
;
1868 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1869 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1871 u64 tsc_timestamp
, host_tsc
;
1873 bool use_master_clock
;
1879 * If the host uses TSC clock, then passthrough TSC as stable
1882 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1883 use_master_clock
= ka
->use_master_clock
;
1884 if (use_master_clock
) {
1885 host_tsc
= ka
->master_cycle_now
;
1886 kernel_ns
= ka
->master_kernel_ns
;
1888 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1890 /* Keep irq disabled to prevent changes to the clock */
1891 local_irq_save(flags
);
1892 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1893 if (unlikely(tgt_tsc_khz
== 0)) {
1894 local_irq_restore(flags
);
1895 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1898 if (!use_master_clock
) {
1900 kernel_ns
= ktime_get_boot_ns();
1903 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1906 * We may have to catch up the TSC to match elapsed wall clock
1907 * time for two reasons, even if kvmclock is used.
1908 * 1) CPU could have been running below the maximum TSC rate
1909 * 2) Broken TSC compensation resets the base at each VCPU
1910 * entry to avoid unknown leaps of TSC even when running
1911 * again on the same CPU. This may cause apparent elapsed
1912 * time to disappear, and the guest to stand still or run
1915 if (vcpu
->tsc_catchup
) {
1916 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1917 if (tsc
> tsc_timestamp
) {
1918 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1919 tsc_timestamp
= tsc
;
1923 local_irq_restore(flags
);
1925 /* With all the info we got, fill in the values */
1927 if (kvm_has_tsc_control
)
1928 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1930 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1931 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1932 &vcpu
->hv_clock
.tsc_shift
,
1933 &vcpu
->hv_clock
.tsc_to_system_mul
);
1934 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1937 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1938 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1939 vcpu
->last_guest_tsc
= tsc_timestamp
;
1941 /* If the host uses TSC clocksource, then it is stable */
1943 if (use_master_clock
)
1944 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1946 vcpu
->hv_clock
.flags
= pvclock_flags
;
1948 if (vcpu
->pv_time_enabled
)
1949 kvm_setup_pvclock_page(v
);
1950 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1951 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1956 * kvmclock updates which are isolated to a given vcpu, such as
1957 * vcpu->cpu migration, should not allow system_timestamp from
1958 * the rest of the vcpus to remain static. Otherwise ntp frequency
1959 * correction applies to one vcpu's system_timestamp but not
1962 * So in those cases, request a kvmclock update for all vcpus.
1963 * We need to rate-limit these requests though, as they can
1964 * considerably slow guests that have a large number of vcpus.
1965 * The time for a remote vcpu to update its kvmclock is bound
1966 * by the delay we use to rate-limit the updates.
1969 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1971 static void kvmclock_update_fn(struct work_struct
*work
)
1974 struct delayed_work
*dwork
= to_delayed_work(work
);
1975 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1976 kvmclock_update_work
);
1977 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1978 struct kvm_vcpu
*vcpu
;
1980 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1981 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1982 kvm_vcpu_kick(vcpu
);
1986 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1988 struct kvm
*kvm
= v
->kvm
;
1990 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1991 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1992 KVMCLOCK_UPDATE_DELAY
);
1995 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1997 static void kvmclock_sync_fn(struct work_struct
*work
)
1999 struct delayed_work
*dwork
= to_delayed_work(work
);
2000 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2001 kvmclock_sync_work
);
2002 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2004 if (!kvmclock_periodic_sync
)
2007 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2008 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2009 KVMCLOCK_SYNC_PERIOD
);
2012 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
2014 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2015 unsigned bank_num
= mcg_cap
& 0xff;
2018 case MSR_IA32_MCG_STATUS
:
2019 vcpu
->arch
.mcg_status
= data
;
2021 case MSR_IA32_MCG_CTL
:
2022 if (!(mcg_cap
& MCG_CTL_P
))
2024 if (data
!= 0 && data
!= ~(u64
)0)
2026 vcpu
->arch
.mcg_ctl
= data
;
2029 if (msr
>= MSR_IA32_MC0_CTL
&&
2030 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2031 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2032 /* only 0 or all 1s can be written to IA32_MCi_CTL
2033 * some Linux kernels though clear bit 10 in bank 4 to
2034 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2035 * this to avoid an uncatched #GP in the guest
2037 if ((offset
& 0x3) == 0 &&
2038 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2040 vcpu
->arch
.mce_banks
[offset
] = data
;
2048 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2050 struct kvm
*kvm
= vcpu
->kvm
;
2051 int lm
= is_long_mode(vcpu
);
2052 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2053 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2054 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2055 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2056 u32 page_num
= data
& ~PAGE_MASK
;
2057 u64 page_addr
= data
& PAGE_MASK
;
2062 if (page_num
>= blob_size
)
2065 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2070 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2079 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2081 gpa_t gpa
= data
& ~0x3f;
2083 /* Bits 2:5 are reserved, Should be zero */
2087 vcpu
->arch
.apf
.msr_val
= data
;
2089 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2090 kvm_clear_async_pf_completion_queue(vcpu
);
2091 kvm_async_pf_hash_reset(vcpu
);
2095 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu
, &vcpu
->arch
.apf
.data
, gpa
,
2099 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2100 kvm_async_pf_wakeup_all(vcpu
);
2104 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2106 vcpu
->arch
.pv_time_enabled
= false;
2109 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2111 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2114 if (unlikely(kvm_vcpu_read_guest_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2115 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2118 vcpu
->arch
.st
.steal
.preempted
= 0;
2120 if (vcpu
->arch
.st
.steal
.version
& 1)
2121 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2123 vcpu
->arch
.st
.steal
.version
+= 1;
2125 kvm_vcpu_write_guest_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2126 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2130 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2131 vcpu
->arch
.st
.last_steal
;
2132 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2134 kvm_vcpu_write_guest_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2135 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2139 vcpu
->arch
.st
.steal
.version
+= 1;
2141 kvm_vcpu_write_guest_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2142 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2145 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2148 u32 msr
= msr_info
->index
;
2149 u64 data
= msr_info
->data
;
2152 case MSR_AMD64_NB_CFG
:
2153 case MSR_IA32_UCODE_REV
:
2154 case MSR_IA32_UCODE_WRITE
:
2155 case MSR_VM_HSAVE_PA
:
2156 case MSR_AMD64_PATCH_LOADER
:
2157 case MSR_AMD64_BU_CFG2
:
2161 return set_efer(vcpu
, data
);
2163 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2164 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2165 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2166 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2168 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2173 case MSR_FAM10H_MMIO_CONF_BASE
:
2175 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2180 case MSR_IA32_DEBUGCTLMSR
:
2182 /* We support the non-activated case already */
2184 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2185 /* Values other than LBR and BTF are vendor-specific,
2186 thus reserved and should throw a #GP */
2189 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2192 case 0x200 ... 0x2ff:
2193 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2194 case MSR_IA32_APICBASE
:
2195 return kvm_set_apic_base(vcpu
, msr_info
);
2196 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2197 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2198 case MSR_IA32_TSCDEADLINE
:
2199 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2201 case MSR_IA32_TSC_ADJUST
:
2202 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2203 if (!msr_info
->host_initiated
) {
2204 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2205 adjust_tsc_offset_guest(vcpu
, adj
);
2207 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2210 case MSR_IA32_MISC_ENABLE
:
2211 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2213 case MSR_IA32_SMBASE
:
2214 if (!msr_info
->host_initiated
)
2216 vcpu
->arch
.smbase
= data
;
2218 case MSR_KVM_WALL_CLOCK_NEW
:
2219 case MSR_KVM_WALL_CLOCK
:
2220 vcpu
->kvm
->arch
.wall_clock
= data
;
2221 kvm_write_wall_clock(vcpu
->kvm
, data
);
2223 case MSR_KVM_SYSTEM_TIME_NEW
:
2224 case MSR_KVM_SYSTEM_TIME
: {
2225 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2227 kvmclock_reset(vcpu
);
2229 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2230 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2232 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2233 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2236 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2239 vcpu
->arch
.time
= data
;
2240 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2242 /* we verify if the enable bit is set... */
2246 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu
,
2247 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2248 sizeof(struct pvclock_vcpu_time_info
)))
2249 vcpu
->arch
.pv_time_enabled
= false;
2251 vcpu
->arch
.pv_time_enabled
= true;
2255 case MSR_KVM_ASYNC_PF_EN
:
2256 if (kvm_pv_enable_async_pf(vcpu
, data
))
2259 case MSR_KVM_STEAL_TIME
:
2261 if (unlikely(!sched_info_on()))
2264 if (data
& KVM_STEAL_RESERVED_MASK
)
2267 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu
, &vcpu
->arch
.st
.stime
,
2268 data
& KVM_STEAL_VALID_BITS
,
2269 sizeof(struct kvm_steal_time
)))
2272 vcpu
->arch
.st
.msr_val
= data
;
2274 if (!(data
& KVM_MSR_ENABLED
))
2277 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2280 case MSR_KVM_PV_EOI_EN
:
2281 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2285 case MSR_IA32_MCG_CTL
:
2286 case MSR_IA32_MCG_STATUS
:
2287 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2288 return set_msr_mce(vcpu
, msr
, data
);
2290 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2291 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2292 pr
= true; /* fall through */
2293 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2294 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2295 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2296 return kvm_pmu_set_msr(vcpu
, msr_info
);
2298 if (pr
|| data
!= 0)
2299 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2300 "0x%x data 0x%llx\n", msr
, data
);
2302 case MSR_K7_CLK_CTL
:
2304 * Ignore all writes to this no longer documented MSR.
2305 * Writes are only relevant for old K7 processors,
2306 * all pre-dating SVM, but a recommended workaround from
2307 * AMD for these chips. It is possible to specify the
2308 * affected processor models on the command line, hence
2309 * the need to ignore the workaround.
2312 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2313 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2314 case HV_X64_MSR_CRASH_CTL
:
2315 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2316 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2317 msr_info
->host_initiated
);
2318 case MSR_IA32_BBL_CR_CTL3
:
2319 /* Drop writes to this legacy MSR -- see rdmsr
2320 * counterpart for further detail.
2322 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2324 case MSR_AMD64_OSVW_ID_LENGTH
:
2325 if (!guest_cpuid_has_osvw(vcpu
))
2327 vcpu
->arch
.osvw
.length
= data
;
2329 case MSR_AMD64_OSVW_STATUS
:
2330 if (!guest_cpuid_has_osvw(vcpu
))
2332 vcpu
->arch
.osvw
.status
= data
;
2335 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2336 return xen_hvm_config(vcpu
, data
);
2337 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2338 return kvm_pmu_set_msr(vcpu
, msr_info
);
2340 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2344 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2351 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2355 * Reads an msr value (of 'msr_index') into 'pdata'.
2356 * Returns 0 on success, non-0 otherwise.
2357 * Assumes vcpu_load() was already called.
2359 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2361 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2363 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2365 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2368 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2369 unsigned bank_num
= mcg_cap
& 0xff;
2372 case MSR_IA32_P5_MC_ADDR
:
2373 case MSR_IA32_P5_MC_TYPE
:
2376 case MSR_IA32_MCG_CAP
:
2377 data
= vcpu
->arch
.mcg_cap
;
2379 case MSR_IA32_MCG_CTL
:
2380 if (!(mcg_cap
& MCG_CTL_P
))
2382 data
= vcpu
->arch
.mcg_ctl
;
2384 case MSR_IA32_MCG_STATUS
:
2385 data
= vcpu
->arch
.mcg_status
;
2388 if (msr
>= MSR_IA32_MC0_CTL
&&
2389 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2390 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2391 data
= vcpu
->arch
.mce_banks
[offset
];
2400 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2402 switch (msr_info
->index
) {
2403 case MSR_IA32_PLATFORM_ID
:
2404 case MSR_IA32_EBL_CR_POWERON
:
2405 case MSR_IA32_DEBUGCTLMSR
:
2406 case MSR_IA32_LASTBRANCHFROMIP
:
2407 case MSR_IA32_LASTBRANCHTOIP
:
2408 case MSR_IA32_LASTINTFROMIP
:
2409 case MSR_IA32_LASTINTTOIP
:
2411 case MSR_K8_TSEG_ADDR
:
2412 case MSR_K8_TSEG_MASK
:
2414 case MSR_VM_HSAVE_PA
:
2415 case MSR_K8_INT_PENDING_MSG
:
2416 case MSR_AMD64_NB_CFG
:
2417 case MSR_FAM10H_MMIO_CONF_BASE
:
2418 case MSR_AMD64_BU_CFG2
:
2419 case MSR_IA32_PERF_CTL
:
2422 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2423 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2424 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2425 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2426 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2427 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2430 case MSR_IA32_UCODE_REV
:
2431 msr_info
->data
= 0x100000000ULL
;
2434 case 0x200 ... 0x2ff:
2435 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2436 case 0xcd: /* fsb frequency */
2440 * MSR_EBC_FREQUENCY_ID
2441 * Conservative value valid for even the basic CPU models.
2442 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2443 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2444 * and 266MHz for model 3, or 4. Set Core Clock
2445 * Frequency to System Bus Frequency Ratio to 1 (bits
2446 * 31:24) even though these are only valid for CPU
2447 * models > 2, however guests may end up dividing or
2448 * multiplying by zero otherwise.
2450 case MSR_EBC_FREQUENCY_ID
:
2451 msr_info
->data
= 1 << 24;
2453 case MSR_IA32_APICBASE
:
2454 msr_info
->data
= kvm_get_apic_base(vcpu
);
2456 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2457 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2459 case MSR_IA32_TSCDEADLINE
:
2460 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2462 case MSR_IA32_TSC_ADJUST
:
2463 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2465 case MSR_IA32_MISC_ENABLE
:
2466 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2468 case MSR_IA32_SMBASE
:
2469 if (!msr_info
->host_initiated
)
2471 msr_info
->data
= vcpu
->arch
.smbase
;
2473 case MSR_IA32_PERF_STATUS
:
2474 /* TSC increment by tick */
2475 msr_info
->data
= 1000ULL;
2476 /* CPU multiplier */
2477 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2480 msr_info
->data
= vcpu
->arch
.efer
;
2482 case MSR_KVM_WALL_CLOCK
:
2483 case MSR_KVM_WALL_CLOCK_NEW
:
2484 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2486 case MSR_KVM_SYSTEM_TIME
:
2487 case MSR_KVM_SYSTEM_TIME_NEW
:
2488 msr_info
->data
= vcpu
->arch
.time
;
2490 case MSR_KVM_ASYNC_PF_EN
:
2491 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2493 case MSR_KVM_STEAL_TIME
:
2494 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2496 case MSR_KVM_PV_EOI_EN
:
2497 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2499 case MSR_IA32_P5_MC_ADDR
:
2500 case MSR_IA32_P5_MC_TYPE
:
2501 case MSR_IA32_MCG_CAP
:
2502 case MSR_IA32_MCG_CTL
:
2503 case MSR_IA32_MCG_STATUS
:
2504 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2505 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2506 case MSR_K7_CLK_CTL
:
2508 * Provide expected ramp-up count for K7. All other
2509 * are set to zero, indicating minimum divisors for
2512 * This prevents guest kernels on AMD host with CPU
2513 * type 6, model 8 and higher from exploding due to
2514 * the rdmsr failing.
2516 msr_info
->data
= 0x20000000;
2518 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2519 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2520 case HV_X64_MSR_CRASH_CTL
:
2521 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2522 return kvm_hv_get_msr_common(vcpu
,
2523 msr_info
->index
, &msr_info
->data
);
2525 case MSR_IA32_BBL_CR_CTL3
:
2526 /* This legacy MSR exists but isn't fully documented in current
2527 * silicon. It is however accessed by winxp in very narrow
2528 * scenarios where it sets bit #19, itself documented as
2529 * a "reserved" bit. Best effort attempt to source coherent
2530 * read data here should the balance of the register be
2531 * interpreted by the guest:
2533 * L2 cache control register 3: 64GB range, 256KB size,
2534 * enabled, latency 0x1, configured
2536 msr_info
->data
= 0xbe702111;
2538 case MSR_AMD64_OSVW_ID_LENGTH
:
2539 if (!guest_cpuid_has_osvw(vcpu
))
2541 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2543 case MSR_AMD64_OSVW_STATUS
:
2544 if (!guest_cpuid_has_osvw(vcpu
))
2546 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2549 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2550 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2552 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2556 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2563 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2566 * Read or write a bunch of msrs. All parameters are kernel addresses.
2568 * @return number of msrs set successfully.
2570 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2571 struct kvm_msr_entry
*entries
,
2572 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2573 unsigned index
, u64
*data
))
2577 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2578 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2579 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2581 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2587 * Read or write a bunch of msrs. Parameters are user addresses.
2589 * @return number of msrs set successfully.
2591 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2592 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2593 unsigned index
, u64
*data
),
2596 struct kvm_msrs msrs
;
2597 struct kvm_msr_entry
*entries
;
2602 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2606 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2609 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2610 entries
= memdup_user(user_msrs
->entries
, size
);
2611 if (IS_ERR(entries
)) {
2612 r
= PTR_ERR(entries
);
2616 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2621 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2632 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2637 case KVM_CAP_IRQCHIP
:
2639 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2640 case KVM_CAP_SET_TSS_ADDR
:
2641 case KVM_CAP_EXT_CPUID
:
2642 case KVM_CAP_EXT_EMUL_CPUID
:
2643 case KVM_CAP_CLOCKSOURCE
:
2645 case KVM_CAP_NOP_IO_DELAY
:
2646 case KVM_CAP_MP_STATE
:
2647 case KVM_CAP_SYNC_MMU
:
2648 case KVM_CAP_USER_NMI
:
2649 case KVM_CAP_REINJECT_CONTROL
:
2650 case KVM_CAP_IRQ_INJECT_STATUS
:
2651 case KVM_CAP_IOEVENTFD
:
2652 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2654 case KVM_CAP_PIT_STATE2
:
2655 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2656 case KVM_CAP_XEN_HVM
:
2657 case KVM_CAP_VCPU_EVENTS
:
2658 case KVM_CAP_HYPERV
:
2659 case KVM_CAP_HYPERV_VAPIC
:
2660 case KVM_CAP_HYPERV_SPIN
:
2661 case KVM_CAP_HYPERV_SYNIC
:
2662 case KVM_CAP_PCI_SEGMENT
:
2663 case KVM_CAP_DEBUGREGS
:
2664 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2666 case KVM_CAP_ASYNC_PF
:
2667 case KVM_CAP_GET_TSC_KHZ
:
2668 case KVM_CAP_KVMCLOCK_CTRL
:
2669 case KVM_CAP_READONLY_MEM
:
2670 case KVM_CAP_HYPERV_TIME
:
2671 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2672 case KVM_CAP_TSC_DEADLINE_TIMER
:
2673 case KVM_CAP_ENABLE_CAP_VM
:
2674 case KVM_CAP_DISABLE_QUIRKS
:
2675 case KVM_CAP_SET_BOOT_CPU_ID
:
2676 case KVM_CAP_SPLIT_IRQCHIP
:
2677 case KVM_CAP_IMMEDIATE_EXIT
:
2678 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2679 case KVM_CAP_ASSIGN_DEV_IRQ
:
2680 case KVM_CAP_PCI_2_3
:
2684 case KVM_CAP_ADJUST_CLOCK
:
2685 r
= KVM_CLOCK_TSC_STABLE
;
2687 case KVM_CAP_X86_SMM
:
2688 /* SMBASE is usually relocated above 1M on modern chipsets,
2689 * and SMM handlers might indeed rely on 4G segment limits,
2690 * so do not report SMM to be available if real mode is
2691 * emulated via vm86 mode. Still, do not go to great lengths
2692 * to avoid userspace's usage of the feature, because it is a
2693 * fringe case that is not enabled except via specific settings
2694 * of the module parameters.
2696 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2698 case KVM_CAP_COALESCED_MMIO
:
2699 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2702 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2704 case KVM_CAP_NR_VCPUS
:
2705 r
= KVM_SOFT_MAX_VCPUS
;
2707 case KVM_CAP_MAX_VCPUS
:
2710 case KVM_CAP_NR_MEMSLOTS
:
2711 r
= KVM_USER_MEM_SLOTS
;
2713 case KVM_CAP_PV_MMU
: /* obsolete */
2716 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2718 r
= iommu_present(&pci_bus_type
);
2722 r
= KVM_MAX_MCE_BANKS
;
2725 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2727 case KVM_CAP_TSC_CONTROL
:
2728 r
= kvm_has_tsc_control
;
2730 case KVM_CAP_X2APIC_API
:
2731 r
= KVM_X2APIC_API_VALID_FLAGS
;
2741 long kvm_arch_dev_ioctl(struct file
*filp
,
2742 unsigned int ioctl
, unsigned long arg
)
2744 void __user
*argp
= (void __user
*)arg
;
2748 case KVM_GET_MSR_INDEX_LIST
: {
2749 struct kvm_msr_list __user
*user_msr_list
= argp
;
2750 struct kvm_msr_list msr_list
;
2754 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2757 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2758 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2761 if (n
< msr_list
.nmsrs
)
2764 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2765 num_msrs_to_save
* sizeof(u32
)))
2767 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2769 num_emulated_msrs
* sizeof(u32
)))
2774 case KVM_GET_SUPPORTED_CPUID
:
2775 case KVM_GET_EMULATED_CPUID
: {
2776 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2777 struct kvm_cpuid2 cpuid
;
2780 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2783 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2789 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2794 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2796 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2797 sizeof(kvm_mce_cap_supported
)))
2809 static void wbinvd_ipi(void *garbage
)
2814 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2816 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2819 static inline void kvm_migrate_timers(struct kvm_vcpu
*vcpu
)
2821 set_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
);
2824 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2826 /* Address WBINVD may be executed by guest */
2827 if (need_emulate_wbinvd(vcpu
)) {
2828 if (kvm_x86_ops
->has_wbinvd_exit())
2829 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2830 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2831 smp_call_function_single(vcpu
->cpu
,
2832 wbinvd_ipi
, NULL
, 1);
2835 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2837 /* Apply any externally detected TSC adjustments (due to suspend) */
2838 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2839 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2840 vcpu
->arch
.tsc_offset_adjustment
= 0;
2841 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2844 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2845 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2846 rdtsc() - vcpu
->arch
.last_host_tsc
;
2848 mark_tsc_unstable("KVM discovered backwards TSC");
2850 if (check_tsc_unstable()) {
2851 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2852 vcpu
->arch
.last_guest_tsc
);
2853 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2854 vcpu
->arch
.tsc_catchup
= 1;
2856 if (kvm_lapic_hv_timer_in_use(vcpu
) &&
2857 kvm_x86_ops
->set_hv_timer(vcpu
,
2858 kvm_get_lapic_target_expiration_tsc(vcpu
)))
2859 kvm_lapic_switch_to_sw_timer(vcpu
);
2861 * On a host with synchronized TSC, there is no need to update
2862 * kvmclock on vcpu->cpu migration
2864 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2865 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2866 if (vcpu
->cpu
!= cpu
)
2867 kvm_migrate_timers(vcpu
);
2871 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2874 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2876 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2879 vcpu
->arch
.st
.steal
.preempted
= 1;
2881 kvm_vcpu_write_guest_offset_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2882 &vcpu
->arch
.st
.steal
.preempted
,
2883 offsetof(struct kvm_steal_time
, preempted
),
2884 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2887 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2891 * Disable page faults because we're in atomic context here.
2892 * kvm_write_guest_offset_cached() would call might_fault()
2893 * that relies on pagefault_disable() to tell if there's a
2894 * bug. NOTE: the write to guest memory may not go through if
2895 * during postcopy live migration or if there's heavy guest
2898 pagefault_disable();
2900 * kvm_memslots() will be called by
2901 * kvm_write_guest_offset_cached() so take the srcu lock.
2903 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2904 kvm_steal_time_set_preempted(vcpu
);
2905 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2907 kvm_x86_ops
->vcpu_put(vcpu
);
2908 kvm_put_guest_fpu(vcpu
);
2909 vcpu
->arch
.last_host_tsc
= rdtsc();
2912 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2913 struct kvm_lapic_state
*s
)
2915 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2916 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2918 return kvm_apic_get_state(vcpu
, s
);
2921 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2922 struct kvm_lapic_state
*s
)
2926 r
= kvm_apic_set_state(vcpu
, s
);
2929 update_cr8_intercept(vcpu
);
2934 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2936 return (!lapic_in_kernel(vcpu
) ||
2937 kvm_apic_accept_pic_intr(vcpu
));
2941 * if userspace requested an interrupt window, check that the
2942 * interrupt window is open.
2944 * No need to exit to userspace if we already have an interrupt queued.
2946 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2948 return kvm_arch_interrupt_allowed(vcpu
) &&
2949 !kvm_cpu_has_interrupt(vcpu
) &&
2950 !kvm_event_needs_reinjection(vcpu
) &&
2951 kvm_cpu_accept_dm_intr(vcpu
);
2954 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2955 struct kvm_interrupt
*irq
)
2957 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2960 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2961 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2962 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2967 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2968 * fail for in-kernel 8259.
2970 if (pic_in_kernel(vcpu
->kvm
))
2973 if (vcpu
->arch
.pending_external_vector
!= -1)
2976 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2977 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2981 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2983 kvm_inject_nmi(vcpu
);
2988 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2990 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2995 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2996 struct kvm_tpr_access_ctl
*tac
)
3000 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3004 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3008 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3011 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3013 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3016 vcpu
->arch
.mcg_cap
= mcg_cap
;
3017 /* Init IA32_MCG_CTL to all 1s */
3018 if (mcg_cap
& MCG_CTL_P
)
3019 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3020 /* Init IA32_MCi_CTL to all 1s */
3021 for (bank
= 0; bank
< bank_num
; bank
++)
3022 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3024 if (kvm_x86_ops
->setup_mce
)
3025 kvm_x86_ops
->setup_mce(vcpu
);
3030 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3031 struct kvm_x86_mce
*mce
)
3033 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3034 unsigned bank_num
= mcg_cap
& 0xff;
3035 u64
*banks
= vcpu
->arch
.mce_banks
;
3037 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3040 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3041 * reporting is disabled
3043 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3044 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3046 banks
+= 4 * mce
->bank
;
3048 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3049 * reporting is disabled for the bank
3051 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3053 if (mce
->status
& MCI_STATUS_UC
) {
3054 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3055 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3056 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3059 if (banks
[1] & MCI_STATUS_VAL
)
3060 mce
->status
|= MCI_STATUS_OVER
;
3061 banks
[2] = mce
->addr
;
3062 banks
[3] = mce
->misc
;
3063 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3064 banks
[1] = mce
->status
;
3065 kvm_queue_exception(vcpu
, MC_VECTOR
);
3066 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3067 || !(banks
[1] & MCI_STATUS_UC
)) {
3068 if (banks
[1] & MCI_STATUS_VAL
)
3069 mce
->status
|= MCI_STATUS_OVER
;
3070 banks
[2] = mce
->addr
;
3071 banks
[3] = mce
->misc
;
3072 banks
[1] = mce
->status
;
3074 banks
[1] |= MCI_STATUS_OVER
;
3078 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3079 struct kvm_vcpu_events
*events
)
3082 events
->exception
.injected
=
3083 vcpu
->arch
.exception
.pending
&&
3084 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3085 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3086 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3087 events
->exception
.pad
= 0;
3088 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3090 events
->interrupt
.injected
=
3091 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3092 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3093 events
->interrupt
.soft
= 0;
3094 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3096 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3097 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3098 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3099 events
->nmi
.pad
= 0;
3101 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3103 events
->smi
.smm
= is_smm(vcpu
);
3104 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3105 events
->smi
.smm_inside_nmi
=
3106 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3107 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3109 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3110 | KVM_VCPUEVENT_VALID_SHADOW
3111 | KVM_VCPUEVENT_VALID_SMM
);
3112 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3115 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3117 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3118 struct kvm_vcpu_events
*events
)
3120 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3121 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3122 | KVM_VCPUEVENT_VALID_SHADOW
3123 | KVM_VCPUEVENT_VALID_SMM
))
3126 if (events
->exception
.injected
&&
3127 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
3131 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3132 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3133 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3134 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3136 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3137 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3138 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3139 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3140 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3141 events
->interrupt
.shadow
);
3143 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3144 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3145 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3146 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3148 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3149 lapic_in_kernel(vcpu
))
3150 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3152 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3153 u32 hflags
= vcpu
->arch
.hflags
;
3154 if (events
->smi
.smm
)
3155 hflags
|= HF_SMM_MASK
;
3157 hflags
&= ~HF_SMM_MASK
;
3158 kvm_set_hflags(vcpu
, hflags
);
3160 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3161 if (events
->smi
.smm_inside_nmi
)
3162 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3164 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3165 if (lapic_in_kernel(vcpu
)) {
3166 if (events
->smi
.latched_init
)
3167 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3169 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3173 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3178 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3179 struct kvm_debugregs
*dbgregs
)
3183 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3184 kvm_get_dr(vcpu
, 6, &val
);
3186 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3188 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3191 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3192 struct kvm_debugregs
*dbgregs
)
3197 if (dbgregs
->dr6
& ~0xffffffffull
)
3199 if (dbgregs
->dr7
& ~0xffffffffull
)
3202 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3203 kvm_update_dr0123(vcpu
);
3204 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3205 kvm_update_dr6(vcpu
);
3206 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3207 kvm_update_dr7(vcpu
);
3212 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3214 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3216 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3217 u64 xstate_bv
= xsave
->header
.xfeatures
;
3221 * Copy legacy XSAVE area, to avoid complications with CPUID
3222 * leaves 0 and 1 in the loop below.
3224 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3227 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3228 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3231 * Copy each region from the possibly compacted offset to the
3232 * non-compacted offset.
3234 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3236 u64 feature
= valid
& -valid
;
3237 int index
= fls64(feature
) - 1;
3238 void *src
= get_xsave_addr(xsave
, feature
);
3241 u32 size
, offset
, ecx
, edx
;
3242 cpuid_count(XSTATE_CPUID
, index
,
3243 &size
, &offset
, &ecx
, &edx
);
3244 memcpy(dest
+ offset
, src
, size
);
3251 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3253 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3254 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3258 * Copy legacy XSAVE area, to avoid complications with CPUID
3259 * leaves 0 and 1 in the loop below.
3261 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3263 /* Set XSTATE_BV and possibly XCOMP_BV. */
3264 xsave
->header
.xfeatures
= xstate_bv
;
3265 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3266 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3269 * Copy each region from the non-compacted offset to the
3270 * possibly compacted offset.
3272 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3274 u64 feature
= valid
& -valid
;
3275 int index
= fls64(feature
) - 1;
3276 void *dest
= get_xsave_addr(xsave
, feature
);
3279 u32 size
, offset
, ecx
, edx
;
3280 cpuid_count(XSTATE_CPUID
, index
,
3281 &size
, &offset
, &ecx
, &edx
);
3282 memcpy(dest
, src
+ offset
, size
);
3289 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3290 struct kvm_xsave
*guest_xsave
)
3292 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3293 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3294 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3296 memcpy(guest_xsave
->region
,
3297 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3298 sizeof(struct fxregs_state
));
3299 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3300 XFEATURE_MASK_FPSSE
;
3304 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3305 struct kvm_xsave
*guest_xsave
)
3308 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3310 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3312 * Here we allow setting states that are not present in
3313 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3314 * with old userspace.
3316 if (xstate_bv
& ~kvm_supported_xcr0())
3318 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3320 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
)
3322 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3323 guest_xsave
->region
, sizeof(struct fxregs_state
));
3328 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3329 struct kvm_xcrs
*guest_xcrs
)
3331 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3332 guest_xcrs
->nr_xcrs
= 0;
3336 guest_xcrs
->nr_xcrs
= 1;
3337 guest_xcrs
->flags
= 0;
3338 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3339 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3342 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3343 struct kvm_xcrs
*guest_xcrs
)
3347 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3350 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3353 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3354 /* Only support XCR0 currently */
3355 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3356 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3357 guest_xcrs
->xcrs
[i
].value
);
3366 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3367 * stopped by the hypervisor. This function will be called from the host only.
3368 * EINVAL is returned when the host attempts to set the flag for a guest that
3369 * does not support pv clocks.
3371 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3373 if (!vcpu
->arch
.pv_time_enabled
)
3375 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3376 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3380 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3381 struct kvm_enable_cap
*cap
)
3387 case KVM_CAP_HYPERV_SYNIC
:
3388 if (!irqchip_in_kernel(vcpu
->kvm
))
3390 return kvm_hv_activate_synic(vcpu
);
3396 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3397 unsigned int ioctl
, unsigned long arg
)
3399 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3400 void __user
*argp
= (void __user
*)arg
;
3403 struct kvm_lapic_state
*lapic
;
3404 struct kvm_xsave
*xsave
;
3405 struct kvm_xcrs
*xcrs
;
3411 case KVM_GET_LAPIC
: {
3413 if (!lapic_in_kernel(vcpu
))
3415 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3420 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3424 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3429 case KVM_SET_LAPIC
: {
3431 if (!lapic_in_kernel(vcpu
))
3433 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3434 if (IS_ERR(u
.lapic
))
3435 return PTR_ERR(u
.lapic
);
3437 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3440 case KVM_INTERRUPT
: {
3441 struct kvm_interrupt irq
;
3444 if (copy_from_user(&irq
, argp
, sizeof irq
))
3446 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3450 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3454 r
= kvm_vcpu_ioctl_smi(vcpu
);
3457 case KVM_SET_CPUID
: {
3458 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3459 struct kvm_cpuid cpuid
;
3462 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3464 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3467 case KVM_SET_CPUID2
: {
3468 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3469 struct kvm_cpuid2 cpuid
;
3472 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3474 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3475 cpuid_arg
->entries
);
3478 case KVM_GET_CPUID2
: {
3479 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3480 struct kvm_cpuid2 cpuid
;
3483 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3485 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3486 cpuid_arg
->entries
);
3490 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3496 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3499 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3501 case KVM_TPR_ACCESS_REPORTING
: {
3502 struct kvm_tpr_access_ctl tac
;
3505 if (copy_from_user(&tac
, argp
, sizeof tac
))
3507 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3511 if (copy_to_user(argp
, &tac
, sizeof tac
))
3516 case KVM_SET_VAPIC_ADDR
: {
3517 struct kvm_vapic_addr va
;
3521 if (!lapic_in_kernel(vcpu
))
3524 if (copy_from_user(&va
, argp
, sizeof va
))
3526 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3527 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3528 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3531 case KVM_X86_SETUP_MCE
: {
3535 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3537 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3540 case KVM_X86_SET_MCE
: {
3541 struct kvm_x86_mce mce
;
3544 if (copy_from_user(&mce
, argp
, sizeof mce
))
3546 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3549 case KVM_GET_VCPU_EVENTS
: {
3550 struct kvm_vcpu_events events
;
3552 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3555 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3560 case KVM_SET_VCPU_EVENTS
: {
3561 struct kvm_vcpu_events events
;
3564 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3567 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3570 case KVM_GET_DEBUGREGS
: {
3571 struct kvm_debugregs dbgregs
;
3573 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3576 if (copy_to_user(argp
, &dbgregs
,
3577 sizeof(struct kvm_debugregs
)))
3582 case KVM_SET_DEBUGREGS
: {
3583 struct kvm_debugregs dbgregs
;
3586 if (copy_from_user(&dbgregs
, argp
,
3587 sizeof(struct kvm_debugregs
)))
3590 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3593 case KVM_GET_XSAVE
: {
3594 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3599 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3602 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3607 case KVM_SET_XSAVE
: {
3608 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3609 if (IS_ERR(u
.xsave
))
3610 return PTR_ERR(u
.xsave
);
3612 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3615 case KVM_GET_XCRS
: {
3616 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3621 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3624 if (copy_to_user(argp
, u
.xcrs
,
3625 sizeof(struct kvm_xcrs
)))
3630 case KVM_SET_XCRS
: {
3631 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3633 return PTR_ERR(u
.xcrs
);
3635 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3638 case KVM_SET_TSC_KHZ
: {
3642 user_tsc_khz
= (u32
)arg
;
3644 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3647 if (user_tsc_khz
== 0)
3648 user_tsc_khz
= tsc_khz
;
3650 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3655 case KVM_GET_TSC_KHZ
: {
3656 r
= vcpu
->arch
.virtual_tsc_khz
;
3659 case KVM_KVMCLOCK_CTRL
: {
3660 r
= kvm_set_guest_paused(vcpu
);
3663 case KVM_ENABLE_CAP
: {
3664 struct kvm_enable_cap cap
;
3667 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3669 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3680 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3682 return VM_FAULT_SIGBUS
;
3685 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3689 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3691 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3695 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3698 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3702 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3703 u32 kvm_nr_mmu_pages
)
3705 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3708 mutex_lock(&kvm
->slots_lock
);
3710 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3711 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3713 mutex_unlock(&kvm
->slots_lock
);
3717 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3719 return kvm
->arch
.n_max_mmu_pages
;
3722 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3727 switch (chip
->chip_id
) {
3728 case KVM_IRQCHIP_PIC_MASTER
:
3729 memcpy(&chip
->chip
.pic
,
3730 &pic_irqchip(kvm
)->pics
[0],
3731 sizeof(struct kvm_pic_state
));
3733 case KVM_IRQCHIP_PIC_SLAVE
:
3734 memcpy(&chip
->chip
.pic
,
3735 &pic_irqchip(kvm
)->pics
[1],
3736 sizeof(struct kvm_pic_state
));
3738 case KVM_IRQCHIP_IOAPIC
:
3739 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3748 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3753 switch (chip
->chip_id
) {
3754 case KVM_IRQCHIP_PIC_MASTER
:
3755 spin_lock(&pic_irqchip(kvm
)->lock
);
3756 memcpy(&pic_irqchip(kvm
)->pics
[0],
3758 sizeof(struct kvm_pic_state
));
3759 spin_unlock(&pic_irqchip(kvm
)->lock
);
3761 case KVM_IRQCHIP_PIC_SLAVE
:
3762 spin_lock(&pic_irqchip(kvm
)->lock
);
3763 memcpy(&pic_irqchip(kvm
)->pics
[1],
3765 sizeof(struct kvm_pic_state
));
3766 spin_unlock(&pic_irqchip(kvm
)->lock
);
3768 case KVM_IRQCHIP_IOAPIC
:
3769 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3775 kvm_pic_update_irq(pic_irqchip(kvm
));
3779 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3781 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3783 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3785 mutex_lock(&kps
->lock
);
3786 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3787 mutex_unlock(&kps
->lock
);
3791 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3794 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3796 mutex_lock(&pit
->pit_state
.lock
);
3797 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3798 for (i
= 0; i
< 3; i
++)
3799 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3800 mutex_unlock(&pit
->pit_state
.lock
);
3804 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3806 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3807 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3808 sizeof(ps
->channels
));
3809 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3810 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3811 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3815 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3819 u32 prev_legacy
, cur_legacy
;
3820 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3822 mutex_lock(&pit
->pit_state
.lock
);
3823 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3824 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3825 if (!prev_legacy
&& cur_legacy
)
3827 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3828 sizeof(pit
->pit_state
.channels
));
3829 pit
->pit_state
.flags
= ps
->flags
;
3830 for (i
= 0; i
< 3; i
++)
3831 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3833 mutex_unlock(&pit
->pit_state
.lock
);
3837 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3838 struct kvm_reinject_control
*control
)
3840 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3845 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3846 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3847 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3849 mutex_lock(&pit
->pit_state
.lock
);
3850 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3851 mutex_unlock(&pit
->pit_state
.lock
);
3857 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3858 * @kvm: kvm instance
3859 * @log: slot id and address to which we copy the log
3861 * Steps 1-4 below provide general overview of dirty page logging. See
3862 * kvm_get_dirty_log_protect() function description for additional details.
3864 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3865 * always flush the TLB (step 4) even if previous step failed and the dirty
3866 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3867 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3868 * writes will be marked dirty for next log read.
3870 * 1. Take a snapshot of the bit and clear it if needed.
3871 * 2. Write protect the corresponding page.
3872 * 3. Copy the snapshot to the userspace.
3873 * 4. Flush TLB's if needed.
3875 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3877 bool is_dirty
= false;
3880 mutex_lock(&kvm
->slots_lock
);
3883 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3885 if (kvm_x86_ops
->flush_log_dirty
)
3886 kvm_x86_ops
->flush_log_dirty(kvm
);
3888 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3891 * All the TLBs can be flushed out of mmu lock, see the comments in
3892 * kvm_mmu_slot_remove_write_access().
3894 lockdep_assert_held(&kvm
->slots_lock
);
3896 kvm_flush_remote_tlbs(kvm
);
3898 mutex_unlock(&kvm
->slots_lock
);
3902 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3905 if (!irqchip_in_kernel(kvm
))
3908 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3909 irq_event
->irq
, irq_event
->level
,
3914 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3915 struct kvm_enable_cap
*cap
)
3923 case KVM_CAP_DISABLE_QUIRKS
:
3924 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3927 case KVM_CAP_SPLIT_IRQCHIP
: {
3928 mutex_lock(&kvm
->lock
);
3930 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3931 goto split_irqchip_unlock
;
3933 if (irqchip_in_kernel(kvm
))
3934 goto split_irqchip_unlock
;
3935 if (kvm
->created_vcpus
)
3936 goto split_irqchip_unlock
;
3937 r
= kvm_setup_empty_irq_routing(kvm
);
3939 goto split_irqchip_unlock
;
3940 /* Pairs with irqchip_in_kernel. */
3942 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
3943 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3945 split_irqchip_unlock
:
3946 mutex_unlock(&kvm
->lock
);
3949 case KVM_CAP_X2APIC_API
:
3951 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3954 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3955 kvm
->arch
.x2apic_format
= true;
3956 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3957 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3968 long kvm_arch_vm_ioctl(struct file
*filp
,
3969 unsigned int ioctl
, unsigned long arg
)
3971 struct kvm
*kvm
= filp
->private_data
;
3972 void __user
*argp
= (void __user
*)arg
;
3975 * This union makes it completely explicit to gcc-3.x
3976 * that these two variables' stack usage should be
3977 * combined, not added together.
3980 struct kvm_pit_state ps
;
3981 struct kvm_pit_state2 ps2
;
3982 struct kvm_pit_config pit_config
;
3986 case KVM_SET_TSS_ADDR
:
3987 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3989 case KVM_SET_IDENTITY_MAP_ADDR
: {
3993 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3995 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3998 case KVM_SET_NR_MMU_PAGES
:
3999 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4001 case KVM_GET_NR_MMU_PAGES
:
4002 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4004 case KVM_CREATE_IRQCHIP
: {
4005 mutex_lock(&kvm
->lock
);
4008 if (irqchip_in_kernel(kvm
))
4009 goto create_irqchip_unlock
;
4012 if (kvm
->created_vcpus
)
4013 goto create_irqchip_unlock
;
4015 r
= kvm_pic_init(kvm
);
4017 goto create_irqchip_unlock
;
4019 r
= kvm_ioapic_init(kvm
);
4021 mutex_lock(&kvm
->slots_lock
);
4022 kvm_pic_destroy(kvm
);
4023 mutex_unlock(&kvm
->slots_lock
);
4024 goto create_irqchip_unlock
;
4027 r
= kvm_setup_default_irq_routing(kvm
);
4029 mutex_lock(&kvm
->slots_lock
);
4030 mutex_lock(&kvm
->irq_lock
);
4031 kvm_ioapic_destroy(kvm
);
4032 kvm_pic_destroy(kvm
);
4033 mutex_unlock(&kvm
->irq_lock
);
4034 mutex_unlock(&kvm
->slots_lock
);
4035 goto create_irqchip_unlock
;
4037 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4039 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4040 create_irqchip_unlock
:
4041 mutex_unlock(&kvm
->lock
);
4044 case KVM_CREATE_PIT
:
4045 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4047 case KVM_CREATE_PIT2
:
4049 if (copy_from_user(&u
.pit_config
, argp
,
4050 sizeof(struct kvm_pit_config
)))
4053 mutex_lock(&kvm
->lock
);
4056 goto create_pit_unlock
;
4058 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4062 mutex_unlock(&kvm
->lock
);
4064 case KVM_GET_IRQCHIP
: {
4065 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4066 struct kvm_irqchip
*chip
;
4068 chip
= memdup_user(argp
, sizeof(*chip
));
4075 if (!irqchip_kernel(kvm
))
4076 goto get_irqchip_out
;
4077 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4079 goto get_irqchip_out
;
4081 if (copy_to_user(argp
, chip
, sizeof *chip
))
4082 goto get_irqchip_out
;
4088 case KVM_SET_IRQCHIP
: {
4089 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4090 struct kvm_irqchip
*chip
;
4092 chip
= memdup_user(argp
, sizeof(*chip
));
4099 if (!irqchip_kernel(kvm
))
4100 goto set_irqchip_out
;
4101 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4103 goto set_irqchip_out
;
4111 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4114 if (!kvm
->arch
.vpit
)
4116 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4120 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4127 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4130 if (!kvm
->arch
.vpit
)
4132 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4135 case KVM_GET_PIT2
: {
4137 if (!kvm
->arch
.vpit
)
4139 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4143 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4148 case KVM_SET_PIT2
: {
4150 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4153 if (!kvm
->arch
.vpit
)
4155 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4158 case KVM_REINJECT_CONTROL
: {
4159 struct kvm_reinject_control control
;
4161 if (copy_from_user(&control
, argp
, sizeof(control
)))
4163 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4166 case KVM_SET_BOOT_CPU_ID
:
4168 mutex_lock(&kvm
->lock
);
4169 if (kvm
->created_vcpus
)
4172 kvm
->arch
.bsp_vcpu_id
= arg
;
4173 mutex_unlock(&kvm
->lock
);
4175 case KVM_XEN_HVM_CONFIG
: {
4177 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4178 sizeof(struct kvm_xen_hvm_config
)))
4181 if (kvm
->arch
.xen_hvm_config
.flags
)
4186 case KVM_SET_CLOCK
: {
4187 struct kvm_clock_data user_ns
;
4191 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4199 local_irq_disable();
4200 now_ns
= __get_kvmclock_ns(kvm
);
4201 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4203 kvm_gen_update_masterclock(kvm
);
4206 case KVM_GET_CLOCK
: {
4207 struct kvm_clock_data user_ns
;
4210 local_irq_disable();
4211 now_ns
= __get_kvmclock_ns(kvm
);
4212 user_ns
.clock
= now_ns
;
4213 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4215 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4218 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4223 case KVM_ENABLE_CAP
: {
4224 struct kvm_enable_cap cap
;
4227 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4229 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4233 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4239 static void kvm_init_msr_list(void)
4244 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4245 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4249 * Even MSRs that are valid in the host may not be exposed
4250 * to the guests in some cases.
4252 switch (msrs_to_save
[i
]) {
4253 case MSR_IA32_BNDCFGS
:
4254 if (!kvm_x86_ops
->mpx_supported())
4258 if (!kvm_x86_ops
->rdtscp_supported())
4266 msrs_to_save
[j
] = msrs_to_save
[i
];
4269 num_msrs_to_save
= j
;
4271 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4272 switch (emulated_msrs
[i
]) {
4273 case MSR_IA32_SMBASE
:
4274 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4282 emulated_msrs
[j
] = emulated_msrs
[i
];
4285 num_emulated_msrs
= j
;
4288 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4296 if (!(lapic_in_kernel(vcpu
) &&
4297 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4298 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4309 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4316 if (!(lapic_in_kernel(vcpu
) &&
4317 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4319 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4321 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4331 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4332 struct kvm_segment
*var
, int seg
)
4334 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4337 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4338 struct kvm_segment
*var
, int seg
)
4340 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4343 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4344 struct x86_exception
*exception
)
4348 BUG_ON(!mmu_is_nested(vcpu
));
4350 /* NPT walks are always user-walks */
4351 access
|= PFERR_USER_MASK
;
4352 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4357 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4358 struct x86_exception
*exception
)
4360 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4361 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4364 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4365 struct x86_exception
*exception
)
4367 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4368 access
|= PFERR_FETCH_MASK
;
4369 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4372 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4373 struct x86_exception
*exception
)
4375 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4376 access
|= PFERR_WRITE_MASK
;
4377 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4380 /* uses this to access any guest's mapped memory without checking CPL */
4381 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4382 struct x86_exception
*exception
)
4384 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4387 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4388 struct kvm_vcpu
*vcpu
, u32 access
,
4389 struct x86_exception
*exception
)
4392 int r
= X86EMUL_CONTINUE
;
4395 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4397 unsigned offset
= addr
& (PAGE_SIZE
-1);
4398 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4401 if (gpa
== UNMAPPED_GVA
)
4402 return X86EMUL_PROPAGATE_FAULT
;
4403 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4406 r
= X86EMUL_IO_NEEDED
;
4418 /* used for instruction fetching */
4419 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4420 gva_t addr
, void *val
, unsigned int bytes
,
4421 struct x86_exception
*exception
)
4423 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4424 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4428 /* Inline kvm_read_guest_virt_helper for speed. */
4429 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4431 if (unlikely(gpa
== UNMAPPED_GVA
))
4432 return X86EMUL_PROPAGATE_FAULT
;
4434 offset
= addr
& (PAGE_SIZE
-1);
4435 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4436 bytes
= (unsigned)PAGE_SIZE
- offset
;
4437 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4439 if (unlikely(ret
< 0))
4440 return X86EMUL_IO_NEEDED
;
4442 return X86EMUL_CONTINUE
;
4445 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4446 gva_t addr
, void *val
, unsigned int bytes
,
4447 struct x86_exception
*exception
)
4449 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4450 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4452 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4455 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4457 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4458 gva_t addr
, void *val
, unsigned int bytes
,
4459 struct x86_exception
*exception
)
4461 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4462 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4465 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4466 unsigned long addr
, void *val
, unsigned int bytes
)
4468 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4469 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4471 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4474 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4475 gva_t addr
, void *val
,
4477 struct x86_exception
*exception
)
4479 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4481 int r
= X86EMUL_CONTINUE
;
4484 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4487 unsigned offset
= addr
& (PAGE_SIZE
-1);
4488 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4491 if (gpa
== UNMAPPED_GVA
)
4492 return X86EMUL_PROPAGATE_FAULT
;
4493 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4495 r
= X86EMUL_IO_NEEDED
;
4506 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4508 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4509 gpa_t gpa
, bool write
)
4511 /* For APIC access vmexit */
4512 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4515 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4516 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4523 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4524 gpa_t
*gpa
, struct x86_exception
*exception
,
4527 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4528 | (write
? PFERR_WRITE_MASK
: 0);
4531 * currently PKRU is only applied to ept enabled guest so
4532 * there is no pkey in EPT page table for L1 guest or EPT
4533 * shadow page table for L2 guest.
4535 if (vcpu_match_mmio_gva(vcpu
, gva
)
4536 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4537 vcpu
->arch
.access
, 0, access
)) {
4538 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4539 (gva
& (PAGE_SIZE
- 1));
4540 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4544 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4546 if (*gpa
== UNMAPPED_GVA
)
4549 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4552 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4553 const void *val
, int bytes
)
4557 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4560 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4564 struct read_write_emulator_ops
{
4565 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4567 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4568 void *val
, int bytes
);
4569 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4570 int bytes
, void *val
);
4571 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4572 void *val
, int bytes
);
4576 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4578 if (vcpu
->mmio_read_completed
) {
4579 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4580 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4581 vcpu
->mmio_read_completed
= 0;
4588 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4589 void *val
, int bytes
)
4591 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4594 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4595 void *val
, int bytes
)
4597 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4600 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4602 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4603 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4606 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4607 void *val
, int bytes
)
4609 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4610 return X86EMUL_IO_NEEDED
;
4613 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4614 void *val
, int bytes
)
4616 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4618 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4619 return X86EMUL_CONTINUE
;
4622 static const struct read_write_emulator_ops read_emultor
= {
4623 .read_write_prepare
= read_prepare
,
4624 .read_write_emulate
= read_emulate
,
4625 .read_write_mmio
= vcpu_mmio_read
,
4626 .read_write_exit_mmio
= read_exit_mmio
,
4629 static const struct read_write_emulator_ops write_emultor
= {
4630 .read_write_emulate
= write_emulate
,
4631 .read_write_mmio
= write_mmio
,
4632 .read_write_exit_mmio
= write_exit_mmio
,
4636 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4638 struct x86_exception
*exception
,
4639 struct kvm_vcpu
*vcpu
,
4640 const struct read_write_emulator_ops
*ops
)
4644 bool write
= ops
->write
;
4645 struct kvm_mmio_fragment
*frag
;
4646 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4649 * If the exit was due to a NPF we may already have a GPA.
4650 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4651 * Note, this cannot be used on string operations since string
4652 * operation using rep will only have the initial GPA from the NPF
4655 if (vcpu
->arch
.gpa_available
&&
4656 emulator_can_use_gpa(ctxt
) &&
4657 vcpu_is_mmio_gpa(vcpu
, addr
, exception
->address
, write
) &&
4658 (addr
& ~PAGE_MASK
) == (exception
->address
& ~PAGE_MASK
)) {
4659 gpa
= exception
->address
;
4663 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4666 return X86EMUL_PROPAGATE_FAULT
;
4668 /* For APIC access vmexit */
4672 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4673 return X86EMUL_CONTINUE
;
4677 * Is this MMIO handled locally?
4679 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4680 if (handled
== bytes
)
4681 return X86EMUL_CONTINUE
;
4687 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4688 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4692 return X86EMUL_CONTINUE
;
4695 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4697 void *val
, unsigned int bytes
,
4698 struct x86_exception
*exception
,
4699 const struct read_write_emulator_ops
*ops
)
4701 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4705 if (ops
->read_write_prepare
&&
4706 ops
->read_write_prepare(vcpu
, val
, bytes
))
4707 return X86EMUL_CONTINUE
;
4709 vcpu
->mmio_nr_fragments
= 0;
4711 /* Crossing a page boundary? */
4712 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4715 now
= -addr
& ~PAGE_MASK
;
4716 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4719 if (rc
!= X86EMUL_CONTINUE
)
4722 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4728 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4730 if (rc
!= X86EMUL_CONTINUE
)
4733 if (!vcpu
->mmio_nr_fragments
)
4736 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4738 vcpu
->mmio_needed
= 1;
4739 vcpu
->mmio_cur_fragment
= 0;
4741 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4742 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4743 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4744 vcpu
->run
->mmio
.phys_addr
= gpa
;
4746 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4749 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4753 struct x86_exception
*exception
)
4755 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4756 exception
, &read_emultor
);
4759 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4763 struct x86_exception
*exception
)
4765 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4766 exception
, &write_emultor
);
4769 #define CMPXCHG_TYPE(t, ptr, old, new) \
4770 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4772 #ifdef CONFIG_X86_64
4773 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4775 # define CMPXCHG64(ptr, old, new) \
4776 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4779 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4784 struct x86_exception
*exception
)
4786 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4792 /* guests cmpxchg8b have to be emulated atomically */
4793 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4796 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4798 if (gpa
== UNMAPPED_GVA
||
4799 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4802 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4805 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4806 if (is_error_page(page
))
4809 kaddr
= kmap_atomic(page
);
4810 kaddr
+= offset_in_page(gpa
);
4813 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4816 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4819 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4822 exchanged
= CMPXCHG64(kaddr
, old
, new);
4827 kunmap_atomic(kaddr
);
4828 kvm_release_page_dirty(page
);
4831 return X86EMUL_CMPXCHG_FAILED
;
4833 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4834 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4836 return X86EMUL_CONTINUE
;
4839 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4841 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4844 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4846 /* TODO: String I/O for in kernel device */
4849 if (vcpu
->arch
.pio
.in
)
4850 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4851 vcpu
->arch
.pio
.size
, pd
);
4853 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4854 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4859 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4860 unsigned short port
, void *val
,
4861 unsigned int count
, bool in
)
4863 vcpu
->arch
.pio
.port
= port
;
4864 vcpu
->arch
.pio
.in
= in
;
4865 vcpu
->arch
.pio
.count
= count
;
4866 vcpu
->arch
.pio
.size
= size
;
4868 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4869 vcpu
->arch
.pio
.count
= 0;
4873 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4874 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4875 vcpu
->run
->io
.size
= size
;
4876 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4877 vcpu
->run
->io
.count
= count
;
4878 vcpu
->run
->io
.port
= port
;
4883 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4884 int size
, unsigned short port
, void *val
,
4887 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4890 if (vcpu
->arch
.pio
.count
)
4893 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4896 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4897 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4898 vcpu
->arch
.pio
.count
= 0;
4905 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4906 int size
, unsigned short port
,
4907 const void *val
, unsigned int count
)
4909 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4911 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4912 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4913 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4916 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4918 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4921 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4923 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4926 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4928 if (!need_emulate_wbinvd(vcpu
))
4929 return X86EMUL_CONTINUE
;
4931 if (kvm_x86_ops
->has_wbinvd_exit()) {
4932 int cpu
= get_cpu();
4934 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4935 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4936 wbinvd_ipi
, NULL
, 1);
4938 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4941 return X86EMUL_CONTINUE
;
4944 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4946 kvm_emulate_wbinvd_noskip(vcpu
);
4947 return kvm_skip_emulated_instruction(vcpu
);
4949 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4953 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4955 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4958 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4959 unsigned long *dest
)
4961 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4964 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4965 unsigned long value
)
4968 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4971 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4973 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4976 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4978 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4979 unsigned long value
;
4983 value
= kvm_read_cr0(vcpu
);
4986 value
= vcpu
->arch
.cr2
;
4989 value
= kvm_read_cr3(vcpu
);
4992 value
= kvm_read_cr4(vcpu
);
4995 value
= kvm_get_cr8(vcpu
);
4998 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5005 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5007 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5012 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5015 vcpu
->arch
.cr2
= val
;
5018 res
= kvm_set_cr3(vcpu
, val
);
5021 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5024 res
= kvm_set_cr8(vcpu
, val
);
5027 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5034 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5036 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5039 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5041 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5044 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5046 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5049 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5051 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5054 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5056 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5059 static unsigned long emulator_get_cached_segment_base(
5060 struct x86_emulate_ctxt
*ctxt
, int seg
)
5062 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5065 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5066 struct desc_struct
*desc
, u32
*base3
,
5069 struct kvm_segment var
;
5071 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5072 *selector
= var
.selector
;
5075 memset(desc
, 0, sizeof(*desc
));
5081 set_desc_limit(desc
, var
.limit
);
5082 set_desc_base(desc
, (unsigned long)var
.base
);
5083 #ifdef CONFIG_X86_64
5085 *base3
= var
.base
>> 32;
5087 desc
->type
= var
.type
;
5089 desc
->dpl
= var
.dpl
;
5090 desc
->p
= var
.present
;
5091 desc
->avl
= var
.avl
;
5099 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5100 struct desc_struct
*desc
, u32 base3
,
5103 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5104 struct kvm_segment var
;
5106 var
.selector
= selector
;
5107 var
.base
= get_desc_base(desc
);
5108 #ifdef CONFIG_X86_64
5109 var
.base
|= ((u64
)base3
) << 32;
5111 var
.limit
= get_desc_limit(desc
);
5113 var
.limit
= (var
.limit
<< 12) | 0xfff;
5114 var
.type
= desc
->type
;
5115 var
.dpl
= desc
->dpl
;
5120 var
.avl
= desc
->avl
;
5121 var
.present
= desc
->p
;
5122 var
.unusable
= !var
.present
;
5125 kvm_set_segment(vcpu
, &var
, seg
);
5129 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5130 u32 msr_index
, u64
*pdata
)
5132 struct msr_data msr
;
5135 msr
.index
= msr_index
;
5136 msr
.host_initiated
= false;
5137 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5145 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5146 u32 msr_index
, u64 data
)
5148 struct msr_data msr
;
5151 msr
.index
= msr_index
;
5152 msr
.host_initiated
= false;
5153 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5156 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5158 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5160 return vcpu
->arch
.smbase
;
5163 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5165 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5167 vcpu
->arch
.smbase
= smbase
;
5170 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5173 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5176 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5177 u32 pmc
, u64
*pdata
)
5179 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5182 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5184 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5187 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5190 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5193 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5198 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5199 struct x86_instruction_info
*info
,
5200 enum x86_intercept_stage stage
)
5202 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5205 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5206 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5208 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5211 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5213 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5216 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5218 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5221 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5223 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5226 static const struct x86_emulate_ops emulate_ops
= {
5227 .read_gpr
= emulator_read_gpr
,
5228 .write_gpr
= emulator_write_gpr
,
5229 .read_std
= kvm_read_guest_virt_system
,
5230 .write_std
= kvm_write_guest_virt_system
,
5231 .read_phys
= kvm_read_guest_phys_system
,
5232 .fetch
= kvm_fetch_guest_virt
,
5233 .read_emulated
= emulator_read_emulated
,
5234 .write_emulated
= emulator_write_emulated
,
5235 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5236 .invlpg
= emulator_invlpg
,
5237 .pio_in_emulated
= emulator_pio_in_emulated
,
5238 .pio_out_emulated
= emulator_pio_out_emulated
,
5239 .get_segment
= emulator_get_segment
,
5240 .set_segment
= emulator_set_segment
,
5241 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5242 .get_gdt
= emulator_get_gdt
,
5243 .get_idt
= emulator_get_idt
,
5244 .set_gdt
= emulator_set_gdt
,
5245 .set_idt
= emulator_set_idt
,
5246 .get_cr
= emulator_get_cr
,
5247 .set_cr
= emulator_set_cr
,
5248 .cpl
= emulator_get_cpl
,
5249 .get_dr
= emulator_get_dr
,
5250 .set_dr
= emulator_set_dr
,
5251 .get_smbase
= emulator_get_smbase
,
5252 .set_smbase
= emulator_set_smbase
,
5253 .set_msr
= emulator_set_msr
,
5254 .get_msr
= emulator_get_msr
,
5255 .check_pmc
= emulator_check_pmc
,
5256 .read_pmc
= emulator_read_pmc
,
5257 .halt
= emulator_halt
,
5258 .wbinvd
= emulator_wbinvd
,
5259 .fix_hypercall
= emulator_fix_hypercall
,
5260 .get_fpu
= emulator_get_fpu
,
5261 .put_fpu
= emulator_put_fpu
,
5262 .intercept
= emulator_intercept
,
5263 .get_cpuid
= emulator_get_cpuid
,
5264 .set_nmi_mask
= emulator_set_nmi_mask
,
5267 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5269 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5271 * an sti; sti; sequence only disable interrupts for the first
5272 * instruction. So, if the last instruction, be it emulated or
5273 * not, left the system with the INT_STI flag enabled, it
5274 * means that the last instruction is an sti. We should not
5275 * leave the flag on in this case. The same goes for mov ss
5277 if (int_shadow
& mask
)
5279 if (unlikely(int_shadow
|| mask
)) {
5280 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5282 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5286 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5288 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5289 if (ctxt
->exception
.vector
== PF_VECTOR
)
5290 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5292 if (ctxt
->exception
.error_code_valid
)
5293 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5294 ctxt
->exception
.error_code
);
5296 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5300 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5302 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5305 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5307 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5308 ctxt
->eip
= kvm_rip_read(vcpu
);
5309 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5310 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5311 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5312 cs_db
? X86EMUL_MODE_PROT32
:
5313 X86EMUL_MODE_PROT16
;
5314 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5315 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5316 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5317 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5319 init_decode_cache(ctxt
);
5320 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5323 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5325 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5328 init_emulate_ctxt(vcpu
);
5332 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5333 ret
= emulate_int_real(ctxt
, irq
);
5335 if (ret
!= X86EMUL_CONTINUE
)
5336 return EMULATE_FAIL
;
5338 ctxt
->eip
= ctxt
->_eip
;
5339 kvm_rip_write(vcpu
, ctxt
->eip
);
5340 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5342 if (irq
== NMI_VECTOR
)
5343 vcpu
->arch
.nmi_pending
= 0;
5345 vcpu
->arch
.interrupt
.pending
= false;
5347 return EMULATE_DONE
;
5349 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5351 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5353 int r
= EMULATE_DONE
;
5355 ++vcpu
->stat
.insn_emulation_fail
;
5356 trace_kvm_emulate_insn_failed(vcpu
);
5357 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5358 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5359 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5360 vcpu
->run
->internal
.ndata
= 0;
5363 kvm_queue_exception(vcpu
, UD_VECTOR
);
5368 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5369 bool write_fault_to_shadow_pgtable
,
5375 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5378 if (!vcpu
->arch
.mmu
.direct_map
) {
5380 * Write permission should be allowed since only
5381 * write access need to be emulated.
5383 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5386 * If the mapping is invalid in guest, let cpu retry
5387 * it to generate fault.
5389 if (gpa
== UNMAPPED_GVA
)
5394 * Do not retry the unhandleable instruction if it faults on the
5395 * readonly host memory, otherwise it will goto a infinite loop:
5396 * retry instruction -> write #PF -> emulation fail -> retry
5397 * instruction -> ...
5399 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5402 * If the instruction failed on the error pfn, it can not be fixed,
5403 * report the error to userspace.
5405 if (is_error_noslot_pfn(pfn
))
5408 kvm_release_pfn_clean(pfn
);
5410 /* The instructions are well-emulated on direct mmu. */
5411 if (vcpu
->arch
.mmu
.direct_map
) {
5412 unsigned int indirect_shadow_pages
;
5414 spin_lock(&vcpu
->kvm
->mmu_lock
);
5415 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5416 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5418 if (indirect_shadow_pages
)
5419 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5425 * if emulation was due to access to shadowed page table
5426 * and it failed try to unshadow page and re-enter the
5427 * guest to let CPU execute the instruction.
5429 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5432 * If the access faults on its page table, it can not
5433 * be fixed by unprotecting shadow page and it should
5434 * be reported to userspace.
5436 return !write_fault_to_shadow_pgtable
;
5439 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5440 unsigned long cr2
, int emulation_type
)
5442 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5443 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5445 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5446 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5449 * If the emulation is caused by #PF and it is non-page_table
5450 * writing instruction, it means the VM-EXIT is caused by shadow
5451 * page protected, we can zap the shadow page and retry this
5452 * instruction directly.
5454 * Note: if the guest uses a non-page-table modifying instruction
5455 * on the PDE that points to the instruction, then we will unmap
5456 * the instruction and go to an infinite loop. So, we cache the
5457 * last retried eip and the last fault address, if we meet the eip
5458 * and the address again, we can break out of the potential infinite
5461 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5463 if (!(emulation_type
& EMULTYPE_RETRY
))
5466 if (x86_page_table_writing_insn(ctxt
))
5469 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5472 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5473 vcpu
->arch
.last_retry_addr
= cr2
;
5475 if (!vcpu
->arch
.mmu
.direct_map
)
5476 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5478 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5483 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5484 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5486 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5488 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5489 /* This is a good place to trace that we are exiting SMM. */
5490 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5492 /* Process a latched INIT or SMI, if any. */
5493 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5496 kvm_mmu_reset_context(vcpu
);
5499 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5501 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5503 vcpu
->arch
.hflags
= emul_flags
;
5505 if (changed
& HF_SMM_MASK
)
5506 kvm_smm_changed(vcpu
);
5509 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5518 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5519 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5524 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5526 struct kvm_run
*kvm_run
= vcpu
->run
;
5529 * rflags is the old, "raw" value of the flags. The new value has
5530 * not been saved yet.
5532 * This is correct even for TF set by the guest, because "the
5533 * processor will not generate this exception after the instruction
5534 * that sets the TF flag".
5536 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5537 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5538 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5540 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5541 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5542 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5543 *r
= EMULATE_USER_EXIT
;
5546 * "Certain debug exceptions may clear bit 0-3. The
5547 * remaining contents of the DR6 register are never
5548 * cleared by the processor".
5550 vcpu
->arch
.dr6
&= ~15;
5551 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5552 kvm_queue_exception(vcpu
, DB_VECTOR
);
5557 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5559 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5560 int r
= EMULATE_DONE
;
5562 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5563 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5564 return r
== EMULATE_DONE
;
5566 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5568 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5570 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5571 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5572 struct kvm_run
*kvm_run
= vcpu
->run
;
5573 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5574 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5575 vcpu
->arch
.guest_debug_dr7
,
5579 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5580 kvm_run
->debug
.arch
.pc
= eip
;
5581 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5582 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5583 *r
= EMULATE_USER_EXIT
;
5588 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5589 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5590 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5591 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5596 vcpu
->arch
.dr6
&= ~15;
5597 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5598 kvm_queue_exception(vcpu
, DB_VECTOR
);
5607 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5614 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5615 bool writeback
= true;
5616 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5619 * Clear write_fault_to_shadow_pgtable here to ensure it is
5622 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5623 kvm_clear_exception_queue(vcpu
);
5625 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5626 init_emulate_ctxt(vcpu
);
5629 * We will reenter on the same instruction since
5630 * we do not set complete_userspace_io. This does not
5631 * handle watchpoints yet, those would be handled in
5634 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5637 ctxt
->interruptibility
= 0;
5638 ctxt
->have_exception
= false;
5639 ctxt
->exception
.vector
= -1;
5640 ctxt
->perm_ok
= false;
5642 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5644 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5646 trace_kvm_emulate_insn_start(vcpu
);
5647 ++vcpu
->stat
.insn_emulation
;
5648 if (r
!= EMULATION_OK
) {
5649 if (emulation_type
& EMULTYPE_TRAP_UD
)
5650 return EMULATE_FAIL
;
5651 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5653 return EMULATE_DONE
;
5654 if (emulation_type
& EMULTYPE_SKIP
)
5655 return EMULATE_FAIL
;
5656 return handle_emulation_failure(vcpu
);
5660 if (emulation_type
& EMULTYPE_SKIP
) {
5661 kvm_rip_write(vcpu
, ctxt
->_eip
);
5662 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5663 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5664 return EMULATE_DONE
;
5667 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5668 return EMULATE_DONE
;
5670 /* this is needed for vmware backdoor interface to work since it
5671 changes registers values during IO operation */
5672 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5673 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5674 emulator_invalidate_register_cache(ctxt
);
5678 /* Save the faulting GPA (cr2) in the address field */
5679 ctxt
->exception
.address
= cr2
;
5681 r
= x86_emulate_insn(ctxt
);
5683 if (r
== EMULATION_INTERCEPTED
)
5684 return EMULATE_DONE
;
5686 if (r
== EMULATION_FAILED
) {
5687 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5689 return EMULATE_DONE
;
5691 return handle_emulation_failure(vcpu
);
5694 if (ctxt
->have_exception
) {
5696 if (inject_emulated_exception(vcpu
))
5698 } else if (vcpu
->arch
.pio
.count
) {
5699 if (!vcpu
->arch
.pio
.in
) {
5700 /* FIXME: return into emulator if single-stepping. */
5701 vcpu
->arch
.pio
.count
= 0;
5704 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5706 r
= EMULATE_USER_EXIT
;
5707 } else if (vcpu
->mmio_needed
) {
5708 if (!vcpu
->mmio_is_write
)
5710 r
= EMULATE_USER_EXIT
;
5711 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5712 } else if (r
== EMULATION_RESTART
)
5718 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5719 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5720 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5721 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5722 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5723 kvm_rip_write(vcpu
, ctxt
->eip
);
5724 if (r
== EMULATE_DONE
)
5725 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5726 if (!ctxt
->have_exception
||
5727 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5728 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5731 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5732 * do nothing, and it will be requested again as soon as
5733 * the shadow expires. But we still need to check here,
5734 * because POPF has no interrupt shadow.
5736 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5737 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5739 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5743 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5745 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5747 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5748 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5749 size
, port
, &val
, 1);
5750 /* do not return to emulator after return from userspace */
5751 vcpu
->arch
.pio
.count
= 0;
5754 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5756 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5760 /* We should only ever be called with arch.pio.count equal to 1 */
5761 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5763 /* For size less than 4 we merge, else we zero extend */
5764 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5768 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5769 * the copy and tracing
5771 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5772 vcpu
->arch
.pio
.port
, &val
, 1);
5773 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5778 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5783 /* For size less than 4 we merge, else we zero extend */
5784 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5786 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5789 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5793 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5797 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5799 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5801 __this_cpu_write(cpu_tsc_khz
, 0);
5805 static void tsc_khz_changed(void *data
)
5807 struct cpufreq_freqs
*freq
= data
;
5808 unsigned long khz
= 0;
5812 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5813 khz
= cpufreq_quick_get(raw_smp_processor_id());
5816 __this_cpu_write(cpu_tsc_khz
, khz
);
5819 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5822 struct cpufreq_freqs
*freq
= data
;
5824 struct kvm_vcpu
*vcpu
;
5825 int i
, send_ipi
= 0;
5828 * We allow guests to temporarily run on slowing clocks,
5829 * provided we notify them after, or to run on accelerating
5830 * clocks, provided we notify them before. Thus time never
5833 * However, we have a problem. We can't atomically update
5834 * the frequency of a given CPU from this function; it is
5835 * merely a notifier, which can be called from any CPU.
5836 * Changing the TSC frequency at arbitrary points in time
5837 * requires a recomputation of local variables related to
5838 * the TSC for each VCPU. We must flag these local variables
5839 * to be updated and be sure the update takes place with the
5840 * new frequency before any guests proceed.
5842 * Unfortunately, the combination of hotplug CPU and frequency
5843 * change creates an intractable locking scenario; the order
5844 * of when these callouts happen is undefined with respect to
5845 * CPU hotplug, and they can race with each other. As such,
5846 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5847 * undefined; you can actually have a CPU frequency change take
5848 * place in between the computation of X and the setting of the
5849 * variable. To protect against this problem, all updates of
5850 * the per_cpu tsc_khz variable are done in an interrupt
5851 * protected IPI, and all callers wishing to update the value
5852 * must wait for a synchronous IPI to complete (which is trivial
5853 * if the caller is on the CPU already). This establishes the
5854 * necessary total order on variable updates.
5856 * Note that because a guest time update may take place
5857 * anytime after the setting of the VCPU's request bit, the
5858 * correct TSC value must be set before the request. However,
5859 * to ensure the update actually makes it to any guest which
5860 * starts running in hardware virtualization between the set
5861 * and the acquisition of the spinlock, we must also ping the
5862 * CPU after setting the request bit.
5866 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5868 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5871 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5873 spin_lock(&kvm_lock
);
5874 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5875 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5876 if (vcpu
->cpu
!= freq
->cpu
)
5878 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5879 if (vcpu
->cpu
!= smp_processor_id())
5883 spin_unlock(&kvm_lock
);
5885 if (freq
->old
< freq
->new && send_ipi
) {
5887 * We upscale the frequency. Must make the guest
5888 * doesn't see old kvmclock values while running with
5889 * the new frequency, otherwise we risk the guest sees
5890 * time go backwards.
5892 * In case we update the frequency for another cpu
5893 * (which might be in guest context) send an interrupt
5894 * to kick the cpu out of guest context. Next time
5895 * guest context is entered kvmclock will be updated,
5896 * so the guest will not see stale values.
5898 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5903 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5904 .notifier_call
= kvmclock_cpufreq_notifier
5907 static int kvmclock_cpu_online(unsigned int cpu
)
5909 tsc_khz_changed(NULL
);
5913 static void kvm_timer_init(void)
5915 max_tsc_khz
= tsc_khz
;
5917 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5918 #ifdef CONFIG_CPU_FREQ
5919 struct cpufreq_policy policy
;
5922 memset(&policy
, 0, sizeof(policy
));
5924 cpufreq_get_policy(&policy
, cpu
);
5925 if (policy
.cpuinfo
.max_freq
)
5926 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5929 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5930 CPUFREQ_TRANSITION_NOTIFIER
);
5932 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5934 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5935 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5938 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5940 int kvm_is_in_guest(void)
5942 return __this_cpu_read(current_vcpu
) != NULL
;
5945 static int kvm_is_user_mode(void)
5949 if (__this_cpu_read(current_vcpu
))
5950 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5952 return user_mode
!= 0;
5955 static unsigned long kvm_get_guest_ip(void)
5957 unsigned long ip
= 0;
5959 if (__this_cpu_read(current_vcpu
))
5960 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5965 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5966 .is_in_guest
= kvm_is_in_guest
,
5967 .is_user_mode
= kvm_is_user_mode
,
5968 .get_guest_ip
= kvm_get_guest_ip
,
5971 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5973 __this_cpu_write(current_vcpu
, vcpu
);
5975 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5977 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5979 __this_cpu_write(current_vcpu
, NULL
);
5981 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5983 static void kvm_set_mmio_spte_mask(void)
5986 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5989 * Set the reserved bits and the present bit of an paging-structure
5990 * entry to generate page fault with PFER.RSV = 1.
5992 /* Mask the reserved physical address bits. */
5993 mask
= rsvd_bits(maxphyaddr
, 51);
5995 /* Set the present bit. */
5998 #ifdef CONFIG_X86_64
6000 * If reserved bit is not supported, clear the present bit to disable
6003 if (maxphyaddr
== 52)
6007 kvm_mmu_set_mmio_spte_mask(mask
);
6010 #ifdef CONFIG_X86_64
6011 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6015 struct kvm_vcpu
*vcpu
;
6018 spin_lock(&kvm_lock
);
6019 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6020 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6021 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6022 atomic_set(&kvm_guest_has_master_clock
, 0);
6023 spin_unlock(&kvm_lock
);
6026 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6029 * Notification about pvclock gtod data update.
6031 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6034 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6035 struct timekeeper
*tk
= priv
;
6037 update_pvclock_gtod(tk
);
6039 /* disable master clock if host does not trust, or does not
6040 * use, TSC clocksource
6042 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6043 atomic_read(&kvm_guest_has_master_clock
) != 0)
6044 queue_work(system_long_wq
, &pvclock_gtod_work
);
6049 static struct notifier_block pvclock_gtod_notifier
= {
6050 .notifier_call
= pvclock_gtod_notify
,
6054 int kvm_arch_init(void *opaque
)
6057 struct kvm_x86_ops
*ops
= opaque
;
6060 printk(KERN_ERR
"kvm: already loaded the other module\n");
6065 if (!ops
->cpu_has_kvm_support()) {
6066 printk(KERN_ERR
"kvm: no hardware support\n");
6070 if (ops
->disabled_by_bios()) {
6071 printk(KERN_ERR
"kvm: disabled by bios\n");
6077 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6079 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6083 r
= kvm_mmu_module_init();
6085 goto out_free_percpu
;
6087 kvm_set_mmio_spte_mask();
6091 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6092 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6093 PT_PRESENT_MASK
, 0);
6096 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6098 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6099 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6102 #ifdef CONFIG_X86_64
6103 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6109 free_percpu(shared_msrs
);
6114 void kvm_arch_exit(void)
6117 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6119 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6120 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6121 CPUFREQ_TRANSITION_NOTIFIER
);
6122 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6123 #ifdef CONFIG_X86_64
6124 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6127 kvm_mmu_module_exit();
6128 free_percpu(shared_msrs
);
6131 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6133 ++vcpu
->stat
.halt_exits
;
6134 if (lapic_in_kernel(vcpu
)) {
6135 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6138 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6142 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6144 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6146 int ret
= kvm_skip_emulated_instruction(vcpu
);
6148 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6149 * KVM_EXIT_DEBUG here.
6151 return kvm_vcpu_halt(vcpu
) && ret
;
6153 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6155 #ifdef CONFIG_X86_64
6156 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6157 unsigned long clock_type
)
6159 struct kvm_clock_pairing clock_pairing
;
6164 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6165 return -KVM_EOPNOTSUPP
;
6167 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6168 return -KVM_EOPNOTSUPP
;
6170 clock_pairing
.sec
= ts
.tv_sec
;
6171 clock_pairing
.nsec
= ts
.tv_nsec
;
6172 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6173 clock_pairing
.flags
= 0;
6176 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6177 sizeof(struct kvm_clock_pairing
)))
6185 * kvm_pv_kick_cpu_op: Kick a vcpu.
6187 * @apicid - apicid of vcpu to be kicked.
6189 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6191 struct kvm_lapic_irq lapic_irq
;
6193 lapic_irq
.shorthand
= 0;
6194 lapic_irq
.dest_mode
= 0;
6195 lapic_irq
.dest_id
= apicid
;
6196 lapic_irq
.msi_redir_hint
= false;
6198 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6199 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6202 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6204 vcpu
->arch
.apicv_active
= false;
6205 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6208 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6210 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6213 r
= kvm_skip_emulated_instruction(vcpu
);
6215 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6216 return kvm_hv_hypercall(vcpu
);
6218 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6219 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6220 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6221 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6222 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6224 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6226 op_64_bit
= is_64_bit_mode(vcpu
);
6235 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6241 case KVM_HC_VAPIC_POLL_IRQ
:
6244 case KVM_HC_KICK_CPU
:
6245 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6248 #ifdef CONFIG_X86_64
6249 case KVM_HC_CLOCK_PAIRING
:
6250 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6260 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6261 ++vcpu
->stat
.hypercalls
;
6264 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6266 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6268 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6269 char instruction
[3];
6270 unsigned long rip
= kvm_rip_read(vcpu
);
6272 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6274 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6278 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6280 return vcpu
->run
->request_interrupt_window
&&
6281 likely(!pic_in_kernel(vcpu
->kvm
));
6284 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6286 struct kvm_run
*kvm_run
= vcpu
->run
;
6288 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6289 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6290 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6291 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6292 kvm_run
->ready_for_interrupt_injection
=
6293 pic_in_kernel(vcpu
->kvm
) ||
6294 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6297 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6301 if (!kvm_x86_ops
->update_cr8_intercept
)
6304 if (!lapic_in_kernel(vcpu
))
6307 if (vcpu
->arch
.apicv_active
)
6310 if (!vcpu
->arch
.apic
->vapic_addr
)
6311 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6318 tpr
= kvm_lapic_get_cr8(vcpu
);
6320 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6323 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6327 /* try to reinject previous events if any */
6328 if (vcpu
->arch
.exception
.pending
) {
6329 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6330 vcpu
->arch
.exception
.has_error_code
,
6331 vcpu
->arch
.exception
.error_code
);
6333 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6334 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6337 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6338 (vcpu
->arch
.dr7
& DR7_GD
)) {
6339 vcpu
->arch
.dr7
&= ~DR7_GD
;
6340 kvm_update_dr7(vcpu
);
6343 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6344 vcpu
->arch
.exception
.has_error_code
,
6345 vcpu
->arch
.exception
.error_code
,
6346 vcpu
->arch
.exception
.reinject
);
6350 if (vcpu
->arch
.nmi_injected
) {
6351 kvm_x86_ops
->set_nmi(vcpu
);
6355 if (vcpu
->arch
.interrupt
.pending
) {
6356 kvm_x86_ops
->set_irq(vcpu
);
6360 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6361 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6366 /* try to inject new event if pending */
6367 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6368 vcpu
->arch
.smi_pending
= false;
6370 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6371 --vcpu
->arch
.nmi_pending
;
6372 vcpu
->arch
.nmi_injected
= true;
6373 kvm_x86_ops
->set_nmi(vcpu
);
6374 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6376 * Because interrupts can be injected asynchronously, we are
6377 * calling check_nested_events again here to avoid a race condition.
6378 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6379 * proposal and current concerns. Perhaps we should be setting
6380 * KVM_REQ_EVENT only on certain events and not unconditionally?
6382 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6383 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6387 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6388 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6390 kvm_x86_ops
->set_irq(vcpu
);
6397 static void process_nmi(struct kvm_vcpu
*vcpu
)
6402 * x86 is limited to one NMI running, and one NMI pending after it.
6403 * If an NMI is already in progress, limit further NMIs to just one.
6404 * Otherwise, allow two (and we'll inject the first one immediately).
6406 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6409 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6410 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6411 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6414 #define put_smstate(type, buf, offset, val) \
6415 *(type *)((buf) + (offset) - 0x7e00) = val
6417 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6420 flags
|= seg
->g
<< 23;
6421 flags
|= seg
->db
<< 22;
6422 flags
|= seg
->l
<< 21;
6423 flags
|= seg
->avl
<< 20;
6424 flags
|= seg
->present
<< 15;
6425 flags
|= seg
->dpl
<< 13;
6426 flags
|= seg
->s
<< 12;
6427 flags
|= seg
->type
<< 8;
6431 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6433 struct kvm_segment seg
;
6436 kvm_get_segment(vcpu
, &seg
, n
);
6437 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6440 offset
= 0x7f84 + n
* 12;
6442 offset
= 0x7f2c + (n
- 3) * 12;
6444 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6445 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6446 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6449 #ifdef CONFIG_X86_64
6450 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6452 struct kvm_segment seg
;
6456 kvm_get_segment(vcpu
, &seg
, n
);
6457 offset
= 0x7e00 + n
* 16;
6459 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6460 put_smstate(u16
, buf
, offset
, seg
.selector
);
6461 put_smstate(u16
, buf
, offset
+ 2, flags
);
6462 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6463 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6467 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6470 struct kvm_segment seg
;
6474 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6475 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6476 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6477 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6479 for (i
= 0; i
< 8; i
++)
6480 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6482 kvm_get_dr(vcpu
, 6, &val
);
6483 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6484 kvm_get_dr(vcpu
, 7, &val
);
6485 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6487 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6488 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6489 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6490 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6491 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6493 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6494 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6495 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6496 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6497 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6499 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6500 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6501 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6503 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6504 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6505 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6507 for (i
= 0; i
< 6; i
++)
6508 enter_smm_save_seg_32(vcpu
, buf
, i
);
6510 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6513 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6514 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6517 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6519 #ifdef CONFIG_X86_64
6521 struct kvm_segment seg
;
6525 for (i
= 0; i
< 16; i
++)
6526 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6528 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6529 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6531 kvm_get_dr(vcpu
, 6, &val
);
6532 put_smstate(u64
, buf
, 0x7f68, val
);
6533 kvm_get_dr(vcpu
, 7, &val
);
6534 put_smstate(u64
, buf
, 0x7f60, val
);
6536 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6537 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6538 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6540 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6543 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6545 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6547 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6548 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6549 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6550 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6551 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6553 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6554 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6555 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6557 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6558 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6559 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6560 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6561 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6563 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6564 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6565 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6567 for (i
= 0; i
< 6; i
++)
6568 enter_smm_save_seg_64(vcpu
, buf
, i
);
6574 static void enter_smm(struct kvm_vcpu
*vcpu
)
6576 struct kvm_segment cs
, ds
;
6581 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6582 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6583 memset(buf
, 0, 512);
6584 if (guest_cpuid_has_longmode(vcpu
))
6585 enter_smm_save_state_64(vcpu
, buf
);
6587 enter_smm_save_state_32(vcpu
, buf
);
6589 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6591 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6592 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6594 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6596 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6597 kvm_rip_write(vcpu
, 0x8000);
6599 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6600 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6601 vcpu
->arch
.cr0
= cr0
;
6603 kvm_x86_ops
->set_cr4(vcpu
, 0);
6605 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6606 dt
.address
= dt
.size
= 0;
6607 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6609 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6611 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6612 cs
.base
= vcpu
->arch
.smbase
;
6617 cs
.limit
= ds
.limit
= 0xffffffff;
6618 cs
.type
= ds
.type
= 0x3;
6619 cs
.dpl
= ds
.dpl
= 0;
6624 cs
.avl
= ds
.avl
= 0;
6625 cs
.present
= ds
.present
= 1;
6626 cs
.unusable
= ds
.unusable
= 0;
6627 cs
.padding
= ds
.padding
= 0;
6629 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6630 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6631 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6632 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6633 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6634 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6636 if (guest_cpuid_has_longmode(vcpu
))
6637 kvm_x86_ops
->set_efer(vcpu
, 0);
6639 kvm_update_cpuid(vcpu
);
6640 kvm_mmu_reset_context(vcpu
);
6643 static void process_smi(struct kvm_vcpu
*vcpu
)
6645 vcpu
->arch
.smi_pending
= true;
6646 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6649 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6651 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6654 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6656 u64 eoi_exit_bitmap
[4];
6658 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6661 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6663 if (irqchip_split(vcpu
->kvm
))
6664 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6666 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6667 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6668 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6670 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6671 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6672 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6675 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6677 ++vcpu
->stat
.tlb_flush
;
6678 kvm_x86_ops
->tlb_flush(vcpu
);
6681 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6683 struct page
*page
= NULL
;
6685 if (!lapic_in_kernel(vcpu
))
6688 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6691 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6692 if (is_error_page(page
))
6694 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6697 * Do not pin apic access page in memory, the MMU notifier
6698 * will call us again if it is migrated or swapped out.
6702 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6704 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6705 unsigned long address
)
6708 * The physical address of apic access page is stored in the VMCS.
6709 * Update it when it becomes invalid.
6711 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6712 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6716 * Returns 1 to let vcpu_run() continue the guest execution loop without
6717 * exiting to the userspace. Otherwise, the value will be returned to the
6720 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6724 dm_request_for_irq_injection(vcpu
) &&
6725 kvm_cpu_accept_dm_intr(vcpu
);
6727 bool req_immediate_exit
= false;
6729 if (vcpu
->requests
) {
6730 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6731 kvm_mmu_unload(vcpu
);
6732 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6733 __kvm_migrate_timers(vcpu
);
6734 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6735 kvm_gen_update_masterclock(vcpu
->kvm
);
6736 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6737 kvm_gen_kvmclock_update(vcpu
);
6738 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6739 r
= kvm_guest_time_update(vcpu
);
6743 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6744 kvm_mmu_sync_roots(vcpu
);
6745 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6746 kvm_vcpu_flush_tlb(vcpu
);
6747 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6748 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6752 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6753 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6757 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6758 /* Page is swapped out. Do synthetic halt */
6759 vcpu
->arch
.apf
.halted
= true;
6763 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6764 record_steal_time(vcpu
);
6765 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6767 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6769 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6770 kvm_pmu_handle_event(vcpu
);
6771 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6772 kvm_pmu_deliver_pmi(vcpu
);
6773 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6774 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6775 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6776 vcpu
->arch
.ioapic_handled_vectors
)) {
6777 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6778 vcpu
->run
->eoi
.vector
=
6779 vcpu
->arch
.pending_ioapic_eoi
;
6784 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6785 vcpu_scan_ioapic(vcpu
);
6786 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6787 kvm_vcpu_reload_apic_access_page(vcpu
);
6788 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6789 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6790 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6794 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6795 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6796 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6800 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6801 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6802 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6808 * KVM_REQ_HV_STIMER has to be processed after
6809 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6810 * depend on the guest clock being up-to-date
6812 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6813 kvm_hv_process_stimers(vcpu
);
6816 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6817 ++vcpu
->stat
.req_event
;
6818 kvm_apic_accept_events(vcpu
);
6819 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6824 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6825 req_immediate_exit
= true;
6827 /* Enable NMI/IRQ window open exits if needed.
6829 * SMIs have two cases: 1) they can be nested, and
6830 * then there is nothing to do here because RSM will
6831 * cause a vmexit anyway; 2) or the SMI can be pending
6832 * because inject_pending_event has completed the
6833 * injection of an IRQ or NMI from the previous vmexit,
6834 * and then we request an immediate exit to inject the SMI.
6836 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6837 req_immediate_exit
= true;
6838 if (vcpu
->arch
.nmi_pending
)
6839 kvm_x86_ops
->enable_nmi_window(vcpu
);
6840 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6841 kvm_x86_ops
->enable_irq_window(vcpu
);
6844 if (kvm_lapic_enabled(vcpu
)) {
6845 update_cr8_intercept(vcpu
);
6846 kvm_lapic_sync_to_vapic(vcpu
);
6850 r
= kvm_mmu_reload(vcpu
);
6852 goto cancel_injection
;
6857 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6858 kvm_load_guest_fpu(vcpu
);
6861 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6862 * IPI are then delayed after guest entry, which ensures that they
6863 * result in virtual interrupt delivery.
6865 local_irq_disable();
6866 vcpu
->mode
= IN_GUEST_MODE
;
6868 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6871 * 1) We should set ->mode before checking ->requests. Please see
6872 * the comment in kvm_make_all_cpus_request.
6874 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6875 * pairs with the memory barrier implicit in pi_test_and_set_on
6876 * (see vmx_deliver_posted_interrupt).
6878 * 3) This also orders the write to mode from any reads to the page
6879 * tables done while the VCPU is running. Please see the comment
6880 * in kvm_flush_remote_tlbs.
6882 smp_mb__after_srcu_read_unlock();
6885 * This handles the case where a posted interrupt was
6886 * notified with kvm_vcpu_kick.
6888 if (kvm_lapic_enabled(vcpu
)) {
6889 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6890 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6893 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6894 || need_resched() || signal_pending(current
)) {
6895 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6899 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6901 goto cancel_injection
;
6904 kvm_load_guest_xcr0(vcpu
);
6906 if (req_immediate_exit
) {
6907 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6908 smp_send_reschedule(vcpu
->cpu
);
6911 trace_kvm_entry(vcpu
->vcpu_id
);
6912 wait_lapic_expire(vcpu
);
6913 guest_enter_irqoff();
6915 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6917 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6918 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6919 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6920 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6921 set_debugreg(vcpu
->arch
.dr6
, 6);
6922 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6925 kvm_x86_ops
->run(vcpu
);
6928 * Do this here before restoring debug registers on the host. And
6929 * since we do this before handling the vmexit, a DR access vmexit
6930 * can (a) read the correct value of the debug registers, (b) set
6931 * KVM_DEBUGREG_WONT_EXIT again.
6933 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6934 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6935 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6936 kvm_update_dr0123(vcpu
);
6937 kvm_update_dr6(vcpu
);
6938 kvm_update_dr7(vcpu
);
6939 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6943 * If the guest has used debug registers, at least dr7
6944 * will be disabled while returning to the host.
6945 * If we don't have active breakpoints in the host, we don't
6946 * care about the messed up debug address registers. But if
6947 * we have some of them active, restore the old state.
6949 if (hw_breakpoint_active())
6950 hw_breakpoint_restore();
6952 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6954 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6957 kvm_put_guest_xcr0(vcpu
);
6959 kvm_x86_ops
->handle_external_intr(vcpu
);
6963 guest_exit_irqoff();
6968 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6971 * Profile KVM exit RIPs:
6973 if (unlikely(prof_on
== KVM_PROFILING
)) {
6974 unsigned long rip
= kvm_rip_read(vcpu
);
6975 profile_hit(KVM_PROFILING
, (void *)rip
);
6978 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6979 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6981 if (vcpu
->arch
.apic_attention
)
6982 kvm_lapic_sync_from_vapic(vcpu
);
6984 r
= kvm_x86_ops
->handle_exit(vcpu
);
6988 kvm_x86_ops
->cancel_injection(vcpu
);
6989 if (unlikely(vcpu
->arch
.apic_attention
))
6990 kvm_lapic_sync_from_vapic(vcpu
);
6995 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6997 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6998 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6999 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7000 kvm_vcpu_block(vcpu
);
7001 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7003 if (kvm_x86_ops
->post_block
)
7004 kvm_x86_ops
->post_block(vcpu
);
7006 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7010 kvm_apic_accept_events(vcpu
);
7011 switch(vcpu
->arch
.mp_state
) {
7012 case KVM_MP_STATE_HALTED
:
7013 vcpu
->arch
.pv
.pv_unhalted
= false;
7014 vcpu
->arch
.mp_state
=
7015 KVM_MP_STATE_RUNNABLE
;
7016 case KVM_MP_STATE_RUNNABLE
:
7017 vcpu
->arch
.apf
.halted
= false;
7019 case KVM_MP_STATE_INIT_RECEIVED
:
7028 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7030 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7031 kvm_x86_ops
->check_nested_events(vcpu
, false);
7033 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7034 !vcpu
->arch
.apf
.halted
);
7037 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7040 struct kvm
*kvm
= vcpu
->kvm
;
7042 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7045 if (kvm_vcpu_running(vcpu
)) {
7046 r
= vcpu_enter_guest(vcpu
);
7048 r
= vcpu_block(kvm
, vcpu
);
7054 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
7055 if (kvm_cpu_has_pending_timer(vcpu
))
7056 kvm_inject_pending_timer_irqs(vcpu
);
7058 if (dm_request_for_irq_injection(vcpu
) &&
7059 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7061 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7062 ++vcpu
->stat
.request_irq_exits
;
7066 kvm_check_async_pf_completion(vcpu
);
7068 if (signal_pending(current
)) {
7070 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7071 ++vcpu
->stat
.signal_exits
;
7074 if (need_resched()) {
7075 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7077 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7081 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7086 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7089 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7090 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7091 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7092 if (r
!= EMULATE_DONE
)
7097 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7099 BUG_ON(!vcpu
->arch
.pio
.count
);
7101 return complete_emulated_io(vcpu
);
7105 * Implements the following, as a state machine:
7109 * for each mmio piece in the fragment
7117 * for each mmio piece in the fragment
7122 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7124 struct kvm_run
*run
= vcpu
->run
;
7125 struct kvm_mmio_fragment
*frag
;
7128 BUG_ON(!vcpu
->mmio_needed
);
7130 /* Complete previous fragment */
7131 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7132 len
= min(8u, frag
->len
);
7133 if (!vcpu
->mmio_is_write
)
7134 memcpy(frag
->data
, run
->mmio
.data
, len
);
7136 if (frag
->len
<= 8) {
7137 /* Switch to the next fragment. */
7139 vcpu
->mmio_cur_fragment
++;
7141 /* Go forward to the next mmio piece. */
7147 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7148 vcpu
->mmio_needed
= 0;
7150 /* FIXME: return into emulator if single-stepping. */
7151 if (vcpu
->mmio_is_write
)
7153 vcpu
->mmio_read_completed
= 1;
7154 return complete_emulated_io(vcpu
);
7157 run
->exit_reason
= KVM_EXIT_MMIO
;
7158 run
->mmio
.phys_addr
= frag
->gpa
;
7159 if (vcpu
->mmio_is_write
)
7160 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7161 run
->mmio
.len
= min(8u, frag
->len
);
7162 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7163 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7168 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7170 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7174 fpu__activate_curr(fpu
);
7176 if (vcpu
->sigset_active
)
7177 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7179 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7180 kvm_vcpu_block(vcpu
);
7181 kvm_apic_accept_events(vcpu
);
7182 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
7187 /* re-sync apic's tpr */
7188 if (!lapic_in_kernel(vcpu
)) {
7189 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7195 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7196 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7197 vcpu
->arch
.complete_userspace_io
= NULL
;
7202 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7204 if (kvm_run
->immediate_exit
)
7210 post_kvm_run_save(vcpu
);
7211 if (vcpu
->sigset_active
)
7212 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7217 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7219 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7221 * We are here if userspace calls get_regs() in the middle of
7222 * instruction emulation. Registers state needs to be copied
7223 * back from emulation context to vcpu. Userspace shouldn't do
7224 * that usually, but some bad designed PV devices (vmware
7225 * backdoor interface) need this to work
7227 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7228 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7230 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7231 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7232 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7233 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7234 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7235 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7236 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7237 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7238 #ifdef CONFIG_X86_64
7239 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7240 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7241 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7242 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7243 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7244 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7245 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7246 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7249 regs
->rip
= kvm_rip_read(vcpu
);
7250 regs
->rflags
= kvm_get_rflags(vcpu
);
7255 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7257 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7258 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7260 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7261 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7262 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7263 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7264 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7265 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7266 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7267 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7268 #ifdef CONFIG_X86_64
7269 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7270 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7271 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7272 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7273 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7274 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7275 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7276 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7279 kvm_rip_write(vcpu
, regs
->rip
);
7280 kvm_set_rflags(vcpu
, regs
->rflags
);
7282 vcpu
->arch
.exception
.pending
= false;
7284 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7289 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7291 struct kvm_segment cs
;
7293 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7297 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7299 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7300 struct kvm_sregs
*sregs
)
7304 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7305 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7306 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7307 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7308 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7309 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7311 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7312 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7314 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7315 sregs
->idt
.limit
= dt
.size
;
7316 sregs
->idt
.base
= dt
.address
;
7317 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7318 sregs
->gdt
.limit
= dt
.size
;
7319 sregs
->gdt
.base
= dt
.address
;
7321 sregs
->cr0
= kvm_read_cr0(vcpu
);
7322 sregs
->cr2
= vcpu
->arch
.cr2
;
7323 sregs
->cr3
= kvm_read_cr3(vcpu
);
7324 sregs
->cr4
= kvm_read_cr4(vcpu
);
7325 sregs
->cr8
= kvm_get_cr8(vcpu
);
7326 sregs
->efer
= vcpu
->arch
.efer
;
7327 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7329 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7331 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7332 set_bit(vcpu
->arch
.interrupt
.nr
,
7333 (unsigned long *)sregs
->interrupt_bitmap
);
7338 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7339 struct kvm_mp_state
*mp_state
)
7341 kvm_apic_accept_events(vcpu
);
7342 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7343 vcpu
->arch
.pv
.pv_unhalted
)
7344 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7346 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7351 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7352 struct kvm_mp_state
*mp_state
)
7354 if (!lapic_in_kernel(vcpu
) &&
7355 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7358 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7359 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7360 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7362 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7363 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7367 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7368 int reason
, bool has_error_code
, u32 error_code
)
7370 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7373 init_emulate_ctxt(vcpu
);
7375 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7376 has_error_code
, error_code
);
7379 return EMULATE_FAIL
;
7381 kvm_rip_write(vcpu
, ctxt
->eip
);
7382 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7383 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7384 return EMULATE_DONE
;
7386 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7388 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7389 struct kvm_sregs
*sregs
)
7391 struct msr_data apic_base_msr
;
7392 int mmu_reset_needed
= 0;
7393 int pending_vec
, max_bits
, idx
;
7396 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7399 dt
.size
= sregs
->idt
.limit
;
7400 dt
.address
= sregs
->idt
.base
;
7401 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7402 dt
.size
= sregs
->gdt
.limit
;
7403 dt
.address
= sregs
->gdt
.base
;
7404 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7406 vcpu
->arch
.cr2
= sregs
->cr2
;
7407 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7408 vcpu
->arch
.cr3
= sregs
->cr3
;
7409 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7411 kvm_set_cr8(vcpu
, sregs
->cr8
);
7413 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7414 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7415 apic_base_msr
.data
= sregs
->apic_base
;
7416 apic_base_msr
.host_initiated
= true;
7417 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7419 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7420 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7421 vcpu
->arch
.cr0
= sregs
->cr0
;
7423 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7424 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7425 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7426 kvm_update_cpuid(vcpu
);
7428 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7429 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7430 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7431 mmu_reset_needed
= 1;
7433 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7435 if (mmu_reset_needed
)
7436 kvm_mmu_reset_context(vcpu
);
7438 max_bits
= KVM_NR_INTERRUPTS
;
7439 pending_vec
= find_first_bit(
7440 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7441 if (pending_vec
< max_bits
) {
7442 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7443 pr_debug("Set back pending irq %d\n", pending_vec
);
7446 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7447 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7448 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7449 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7450 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7451 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7453 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7454 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7456 update_cr8_intercept(vcpu
);
7458 /* Older userspace won't unhalt the vcpu on reset. */
7459 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7460 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7462 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7464 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7469 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7470 struct kvm_guest_debug
*dbg
)
7472 unsigned long rflags
;
7475 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7477 if (vcpu
->arch
.exception
.pending
)
7479 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7480 kvm_queue_exception(vcpu
, DB_VECTOR
);
7482 kvm_queue_exception(vcpu
, BP_VECTOR
);
7486 * Read rflags as long as potentially injected trace flags are still
7489 rflags
= kvm_get_rflags(vcpu
);
7491 vcpu
->guest_debug
= dbg
->control
;
7492 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7493 vcpu
->guest_debug
= 0;
7495 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7496 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7497 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7498 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7500 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7501 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7503 kvm_update_dr7(vcpu
);
7505 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7506 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7507 get_segment_base(vcpu
, VCPU_SREG_CS
);
7510 * Trigger an rflags update that will inject or remove the trace
7513 kvm_set_rflags(vcpu
, rflags
);
7515 kvm_x86_ops
->update_bp_intercept(vcpu
);
7525 * Translate a guest virtual address to a guest physical address.
7527 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7528 struct kvm_translation
*tr
)
7530 unsigned long vaddr
= tr
->linear_address
;
7534 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7535 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7536 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7537 tr
->physical_address
= gpa
;
7538 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7545 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7547 struct fxregs_state
*fxsave
=
7548 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7550 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7551 fpu
->fcw
= fxsave
->cwd
;
7552 fpu
->fsw
= fxsave
->swd
;
7553 fpu
->ftwx
= fxsave
->twd
;
7554 fpu
->last_opcode
= fxsave
->fop
;
7555 fpu
->last_ip
= fxsave
->rip
;
7556 fpu
->last_dp
= fxsave
->rdp
;
7557 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7562 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7564 struct fxregs_state
*fxsave
=
7565 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7567 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7568 fxsave
->cwd
= fpu
->fcw
;
7569 fxsave
->swd
= fpu
->fsw
;
7570 fxsave
->twd
= fpu
->ftwx
;
7571 fxsave
->fop
= fpu
->last_opcode
;
7572 fxsave
->rip
= fpu
->last_ip
;
7573 fxsave
->rdp
= fpu
->last_dp
;
7574 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7579 static void fx_init(struct kvm_vcpu
*vcpu
)
7581 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7582 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7583 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7584 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7587 * Ensure guest xcr0 is valid for loading
7589 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7591 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7594 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7596 if (vcpu
->guest_fpu_loaded
)
7600 * Restore all possible states in the guest,
7601 * and assume host would use all available bits.
7602 * Guest xcr0 would be loaded later.
7604 vcpu
->guest_fpu_loaded
= 1;
7605 __kernel_fpu_begin();
7606 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7610 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7612 if (!vcpu
->guest_fpu_loaded
)
7615 vcpu
->guest_fpu_loaded
= 0;
7616 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7618 ++vcpu
->stat
.fpu_reload
;
7622 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7624 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7626 kvmclock_reset(vcpu
);
7628 kvm_x86_ops
->vcpu_free(vcpu
);
7629 free_cpumask_var(wbinvd_dirty_mask
);
7632 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7635 struct kvm_vcpu
*vcpu
;
7637 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7638 printk_once(KERN_WARNING
7639 "kvm: SMP vm created on host with unstable TSC; "
7640 "guest TSC will not be reliable\n");
7642 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7647 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7651 kvm_vcpu_mtrr_init(vcpu
);
7652 r
= vcpu_load(vcpu
);
7655 kvm_vcpu_reset(vcpu
, false);
7656 kvm_mmu_setup(vcpu
);
7661 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7663 struct msr_data msr
;
7664 struct kvm
*kvm
= vcpu
->kvm
;
7666 if (vcpu_load(vcpu
))
7669 msr
.index
= MSR_IA32_TSC
;
7670 msr
.host_initiated
= true;
7671 kvm_write_tsc(vcpu
, &msr
);
7674 if (!kvmclock_periodic_sync
)
7677 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7678 KVMCLOCK_SYNC_PERIOD
);
7681 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7684 vcpu
->arch
.apf
.msr_val
= 0;
7686 r
= vcpu_load(vcpu
);
7688 kvm_mmu_unload(vcpu
);
7691 kvm_x86_ops
->vcpu_free(vcpu
);
7694 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7696 vcpu
->arch
.hflags
= 0;
7698 vcpu
->arch
.smi_pending
= 0;
7699 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7700 vcpu
->arch
.nmi_pending
= 0;
7701 vcpu
->arch
.nmi_injected
= false;
7702 kvm_clear_interrupt_queue(vcpu
);
7703 kvm_clear_exception_queue(vcpu
);
7705 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7706 kvm_update_dr0123(vcpu
);
7707 vcpu
->arch
.dr6
= DR6_INIT
;
7708 kvm_update_dr6(vcpu
);
7709 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7710 kvm_update_dr7(vcpu
);
7714 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7715 vcpu
->arch
.apf
.msr_val
= 0;
7716 vcpu
->arch
.st
.msr_val
= 0;
7718 kvmclock_reset(vcpu
);
7720 kvm_clear_async_pf_completion_queue(vcpu
);
7721 kvm_async_pf_hash_reset(vcpu
);
7722 vcpu
->arch
.apf
.halted
= false;
7725 kvm_pmu_reset(vcpu
);
7726 vcpu
->arch
.smbase
= 0x30000;
7729 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7730 vcpu
->arch
.regs_avail
= ~0;
7731 vcpu
->arch
.regs_dirty
= ~0;
7733 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7736 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7738 struct kvm_segment cs
;
7740 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7741 cs
.selector
= vector
<< 8;
7742 cs
.base
= vector
<< 12;
7743 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7744 kvm_rip_write(vcpu
, 0);
7747 int kvm_arch_hardware_enable(void)
7750 struct kvm_vcpu
*vcpu
;
7755 bool stable
, backwards_tsc
= false;
7757 kvm_shared_msr_cpu_online();
7758 ret
= kvm_x86_ops
->hardware_enable();
7762 local_tsc
= rdtsc();
7763 stable
= !check_tsc_unstable();
7764 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7765 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7766 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7767 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7768 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7769 backwards_tsc
= true;
7770 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7771 max_tsc
= vcpu
->arch
.last_host_tsc
;
7777 * Sometimes, even reliable TSCs go backwards. This happens on
7778 * platforms that reset TSC during suspend or hibernate actions, but
7779 * maintain synchronization. We must compensate. Fortunately, we can
7780 * detect that condition here, which happens early in CPU bringup,
7781 * before any KVM threads can be running. Unfortunately, we can't
7782 * bring the TSCs fully up to date with real time, as we aren't yet far
7783 * enough into CPU bringup that we know how much real time has actually
7784 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7785 * variables that haven't been updated yet.
7787 * So we simply find the maximum observed TSC above, then record the
7788 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7789 * the adjustment will be applied. Note that we accumulate
7790 * adjustments, in case multiple suspend cycles happen before some VCPU
7791 * gets a chance to run again. In the event that no KVM threads get a
7792 * chance to run, we will miss the entire elapsed period, as we'll have
7793 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7794 * loose cycle time. This isn't too big a deal, since the loss will be
7795 * uniform across all VCPUs (not to mention the scenario is extremely
7796 * unlikely). It is possible that a second hibernate recovery happens
7797 * much faster than a first, causing the observed TSC here to be
7798 * smaller; this would require additional padding adjustment, which is
7799 * why we set last_host_tsc to the local tsc observed here.
7801 * N.B. - this code below runs only on platforms with reliable TSC,
7802 * as that is the only way backwards_tsc is set above. Also note
7803 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7804 * have the same delta_cyc adjustment applied if backwards_tsc
7805 * is detected. Note further, this adjustment is only done once,
7806 * as we reset last_host_tsc on all VCPUs to stop this from being
7807 * called multiple times (one for each physical CPU bringup).
7809 * Platforms with unreliable TSCs don't have to deal with this, they
7810 * will be compensated by the logic in vcpu_load, which sets the TSC to
7811 * catchup mode. This will catchup all VCPUs to real time, but cannot
7812 * guarantee that they stay in perfect synchronization.
7814 if (backwards_tsc
) {
7815 u64 delta_cyc
= max_tsc
- local_tsc
;
7816 backwards_tsc_observed
= true;
7817 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7818 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7819 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7820 vcpu
->arch
.last_host_tsc
= local_tsc
;
7821 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7825 * We have to disable TSC offset matching.. if you were
7826 * booting a VM while issuing an S4 host suspend....
7827 * you may have some problem. Solving this issue is
7828 * left as an exercise to the reader.
7830 kvm
->arch
.last_tsc_nsec
= 0;
7831 kvm
->arch
.last_tsc_write
= 0;
7838 void kvm_arch_hardware_disable(void)
7840 kvm_x86_ops
->hardware_disable();
7841 drop_user_return_notifiers();
7844 int kvm_arch_hardware_setup(void)
7848 r
= kvm_x86_ops
->hardware_setup();
7852 if (kvm_has_tsc_control
) {
7854 * Make sure the user can only configure tsc_khz values that
7855 * fit into a signed integer.
7856 * A min value is not calculated needed because it will always
7857 * be 1 on all machines.
7859 u64 max
= min(0x7fffffffULL
,
7860 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7861 kvm_max_guest_tsc_khz
= max
;
7863 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7866 kvm_init_msr_list();
7870 void kvm_arch_hardware_unsetup(void)
7872 kvm_x86_ops
->hardware_unsetup();
7875 void kvm_arch_check_processor_compat(void *rtn
)
7877 kvm_x86_ops
->check_processor_compatibility(rtn
);
7880 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7882 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7884 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7886 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7888 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7891 struct static_key kvm_no_apic_vcpu __read_mostly
;
7892 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7894 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7900 BUG_ON(vcpu
->kvm
== NULL
);
7903 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7904 vcpu
->arch
.pv
.pv_unhalted
= false;
7905 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7906 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7907 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7909 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7911 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7916 vcpu
->arch
.pio_data
= page_address(page
);
7918 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7920 r
= kvm_mmu_create(vcpu
);
7922 goto fail_free_pio_data
;
7924 if (irqchip_in_kernel(kvm
)) {
7925 r
= kvm_create_lapic(vcpu
);
7927 goto fail_mmu_destroy
;
7929 static_key_slow_inc(&kvm_no_apic_vcpu
);
7931 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7933 if (!vcpu
->arch
.mce_banks
) {
7935 goto fail_free_lapic
;
7937 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7939 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7941 goto fail_free_mce_banks
;
7946 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7947 vcpu
->arch
.pv_time_enabled
= false;
7949 vcpu
->arch
.guest_supported_xcr0
= 0;
7950 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7952 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7954 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7956 kvm_async_pf_hash_reset(vcpu
);
7959 vcpu
->arch
.pending_external_vector
= -1;
7961 kvm_hv_vcpu_init(vcpu
);
7965 fail_free_mce_banks
:
7966 kfree(vcpu
->arch
.mce_banks
);
7968 kvm_free_lapic(vcpu
);
7970 kvm_mmu_destroy(vcpu
);
7972 free_page((unsigned long)vcpu
->arch
.pio_data
);
7977 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7981 kvm_hv_vcpu_uninit(vcpu
);
7982 kvm_pmu_destroy(vcpu
);
7983 kfree(vcpu
->arch
.mce_banks
);
7984 kvm_free_lapic(vcpu
);
7985 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7986 kvm_mmu_destroy(vcpu
);
7987 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7988 free_page((unsigned long)vcpu
->arch
.pio_data
);
7989 if (!lapic_in_kernel(vcpu
))
7990 static_key_slow_dec(&kvm_no_apic_vcpu
);
7993 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7995 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7998 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8003 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8004 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8005 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8006 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8007 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8009 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8010 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8011 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8012 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8013 &kvm
->arch
.irq_sources_bitmap
);
8015 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8016 mutex_init(&kvm
->arch
.apic_map_lock
);
8017 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8018 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8020 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8021 pvclock_update_vm_gtod_copy(kvm
);
8023 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8024 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8026 kvm_page_track_init(kvm
);
8027 kvm_mmu_init_vm(kvm
);
8029 if (kvm_x86_ops
->vm_init
)
8030 return kvm_x86_ops
->vm_init(kvm
);
8035 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8038 r
= vcpu_load(vcpu
);
8040 kvm_mmu_unload(vcpu
);
8044 static void kvm_free_vcpus(struct kvm
*kvm
)
8047 struct kvm_vcpu
*vcpu
;
8050 * Unpin any mmu pages first.
8052 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8053 kvm_clear_async_pf_completion_queue(vcpu
);
8054 kvm_unload_vcpu_mmu(vcpu
);
8056 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8057 kvm_arch_vcpu_free(vcpu
);
8059 mutex_lock(&kvm
->lock
);
8060 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8061 kvm
->vcpus
[i
] = NULL
;
8063 atomic_set(&kvm
->online_vcpus
, 0);
8064 mutex_unlock(&kvm
->lock
);
8067 void kvm_arch_sync_events(struct kvm
*kvm
)
8069 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8070 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8071 kvm_free_all_assigned_devices(kvm
);
8075 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8079 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8080 struct kvm_memory_slot
*slot
, old
;
8082 /* Called with kvm->slots_lock held. */
8083 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8086 slot
= id_to_memslot(slots
, id
);
8092 * MAP_SHARED to prevent internal slot pages from being moved
8095 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8096 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8097 if (IS_ERR((void *)hva
))
8098 return PTR_ERR((void *)hva
);
8107 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8108 struct kvm_userspace_memory_region m
;
8110 m
.slot
= id
| (i
<< 16);
8112 m
.guest_phys_addr
= gpa
;
8113 m
.userspace_addr
= hva
;
8114 m
.memory_size
= size
;
8115 r
= __kvm_set_memory_region(kvm
, &m
);
8121 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8127 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8129 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8133 mutex_lock(&kvm
->slots_lock
);
8134 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8135 mutex_unlock(&kvm
->slots_lock
);
8139 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8141 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8143 if (current
->mm
== kvm
->mm
) {
8145 * Free memory regions allocated on behalf of userspace,
8146 * unless the the memory map has changed due to process exit
8149 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8150 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8151 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8153 if (kvm_x86_ops
->vm_destroy
)
8154 kvm_x86_ops
->vm_destroy(kvm
);
8155 kvm_iommu_unmap_guest(kvm
);
8156 kvm_pic_destroy(kvm
);
8157 kvm_ioapic_destroy(kvm
);
8158 kvm_free_vcpus(kvm
);
8159 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8160 kvm_mmu_uninit_vm(kvm
);
8161 kvm_page_track_cleanup(kvm
);
8164 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8165 struct kvm_memory_slot
*dont
)
8169 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8170 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8171 kvfree(free
->arch
.rmap
[i
]);
8172 free
->arch
.rmap
[i
] = NULL
;
8177 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8178 dont
->arch
.lpage_info
[i
- 1]) {
8179 kvfree(free
->arch
.lpage_info
[i
- 1]);
8180 free
->arch
.lpage_info
[i
- 1] = NULL
;
8184 kvm_page_track_free_memslot(free
, dont
);
8187 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8188 unsigned long npages
)
8192 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8193 struct kvm_lpage_info
*linfo
;
8198 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8199 slot
->base_gfn
, level
) + 1;
8201 slot
->arch
.rmap
[i
] =
8202 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
8203 if (!slot
->arch
.rmap
[i
])
8208 linfo
= kvm_kvzalloc(lpages
* sizeof(*linfo
));
8212 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8214 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8215 linfo
[0].disallow_lpage
= 1;
8216 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8217 linfo
[lpages
- 1].disallow_lpage
= 1;
8218 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8220 * If the gfn and userspace address are not aligned wrt each
8221 * other, or if explicitly asked to, disable large page
8222 * support for this slot
8224 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8225 !kvm_largepages_enabled()) {
8228 for (j
= 0; j
< lpages
; ++j
)
8229 linfo
[j
].disallow_lpage
= 1;
8233 if (kvm_page_track_create_memslot(slot
, npages
))
8239 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8240 kvfree(slot
->arch
.rmap
[i
]);
8241 slot
->arch
.rmap
[i
] = NULL
;
8245 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8246 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8251 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8254 * memslots->generation has been incremented.
8255 * mmio generation may have reached its maximum value.
8257 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8260 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8261 struct kvm_memory_slot
*memslot
,
8262 const struct kvm_userspace_memory_region
*mem
,
8263 enum kvm_mr_change change
)
8268 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8269 struct kvm_memory_slot
*new)
8271 /* Still write protect RO slot */
8272 if (new->flags
& KVM_MEM_READONLY
) {
8273 kvm_mmu_slot_remove_write_access(kvm
, new);
8278 * Call kvm_x86_ops dirty logging hooks when they are valid.
8280 * kvm_x86_ops->slot_disable_log_dirty is called when:
8282 * - KVM_MR_CREATE with dirty logging is disabled
8283 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8285 * The reason is, in case of PML, we need to set D-bit for any slots
8286 * with dirty logging disabled in order to eliminate unnecessary GPA
8287 * logging in PML buffer (and potential PML buffer full VMEXT). This
8288 * guarantees leaving PML enabled during guest's lifetime won't have
8289 * any additonal overhead from PML when guest is running with dirty
8290 * logging disabled for memory slots.
8292 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8293 * to dirty logging mode.
8295 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8297 * In case of write protect:
8299 * Write protect all pages for dirty logging.
8301 * All the sptes including the large sptes which point to this
8302 * slot are set to readonly. We can not create any new large
8303 * spte on this slot until the end of the logging.
8305 * See the comments in fast_page_fault().
8307 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8308 if (kvm_x86_ops
->slot_enable_log_dirty
)
8309 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8311 kvm_mmu_slot_remove_write_access(kvm
, new);
8313 if (kvm_x86_ops
->slot_disable_log_dirty
)
8314 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8318 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8319 const struct kvm_userspace_memory_region
*mem
,
8320 const struct kvm_memory_slot
*old
,
8321 const struct kvm_memory_slot
*new,
8322 enum kvm_mr_change change
)
8324 int nr_mmu_pages
= 0;
8326 if (!kvm
->arch
.n_requested_mmu_pages
)
8327 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8330 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8333 * Dirty logging tracks sptes in 4k granularity, meaning that large
8334 * sptes have to be split. If live migration is successful, the guest
8335 * in the source machine will be destroyed and large sptes will be
8336 * created in the destination. However, if the guest continues to run
8337 * in the source machine (for example if live migration fails), small
8338 * sptes will remain around and cause bad performance.
8340 * Scan sptes if dirty logging has been stopped, dropping those
8341 * which can be collapsed into a single large-page spte. Later
8342 * page faults will create the large-page sptes.
8344 if ((change
!= KVM_MR_DELETE
) &&
8345 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8346 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8347 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8350 * Set up write protection and/or dirty logging for the new slot.
8352 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8353 * been zapped so no dirty logging staff is needed for old slot. For
8354 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8355 * new and it's also covered when dealing with the new slot.
8357 * FIXME: const-ify all uses of struct kvm_memory_slot.
8359 if (change
!= KVM_MR_DELETE
)
8360 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8363 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8365 kvm_mmu_invalidate_zap_all_pages(kvm
);
8368 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8369 struct kvm_memory_slot
*slot
)
8371 kvm_page_track_flush_slot(kvm
, slot
);
8374 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8376 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8379 if (kvm_apic_has_events(vcpu
))
8382 if (vcpu
->arch
.pv
.pv_unhalted
)
8385 if (atomic_read(&vcpu
->arch
.nmi_queued
))
8388 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
8391 if (kvm_arch_interrupt_allowed(vcpu
) &&
8392 kvm_cpu_has_interrupt(vcpu
))
8395 if (kvm_hv_has_stimer_pending(vcpu
))
8401 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8403 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8406 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8408 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8411 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8413 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8416 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8418 if (is_64_bit_mode(vcpu
))
8419 return kvm_rip_read(vcpu
);
8420 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8421 kvm_rip_read(vcpu
));
8423 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8425 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8427 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8429 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8431 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8433 unsigned long rflags
;
8435 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8436 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8437 rflags
&= ~X86_EFLAGS_TF
;
8440 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8442 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8444 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8445 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8446 rflags
|= X86_EFLAGS_TF
;
8447 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8450 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8452 __kvm_set_rflags(vcpu
, rflags
);
8453 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8455 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8457 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8461 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8465 r
= kvm_mmu_reload(vcpu
);
8469 if (!vcpu
->arch
.mmu
.direct_map
&&
8470 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8473 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8476 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8478 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8481 static inline u32
kvm_async_pf_next_probe(u32 key
)
8483 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8486 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8488 u32 key
= kvm_async_pf_hash_fn(gfn
);
8490 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8491 key
= kvm_async_pf_next_probe(key
);
8493 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8496 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8499 u32 key
= kvm_async_pf_hash_fn(gfn
);
8501 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8502 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8503 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8504 key
= kvm_async_pf_next_probe(key
);
8509 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8511 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8514 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8518 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8520 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8522 j
= kvm_async_pf_next_probe(j
);
8523 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8525 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8527 * k lies cyclically in ]i,j]
8529 * |....j i.k.| or |.k..j i...|
8531 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8532 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8537 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8539 return kvm_vcpu_write_guest_cached(vcpu
, &vcpu
->arch
.apf
.data
, &val
,
8543 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8544 struct kvm_async_pf
*work
)
8546 struct x86_exception fault
;
8548 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8549 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8551 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8552 (vcpu
->arch
.apf
.send_user_only
&&
8553 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8554 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8555 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8556 fault
.vector
= PF_VECTOR
;
8557 fault
.error_code_valid
= true;
8558 fault
.error_code
= 0;
8559 fault
.nested_page_fault
= false;
8560 fault
.address
= work
->arch
.token
;
8561 kvm_inject_page_fault(vcpu
, &fault
);
8565 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8566 struct kvm_async_pf
*work
)
8568 struct x86_exception fault
;
8570 if (work
->wakeup_all
)
8571 work
->arch
.token
= ~0; /* broadcast wakeup */
8573 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8574 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8576 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8577 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8578 fault
.vector
= PF_VECTOR
;
8579 fault
.error_code_valid
= true;
8580 fault
.error_code
= 0;
8581 fault
.nested_page_fault
= false;
8582 fault
.address
= work
->arch
.token
;
8583 kvm_inject_page_fault(vcpu
, &fault
);
8585 vcpu
->arch
.apf
.halted
= false;
8586 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8589 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8591 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8594 return !kvm_event_needs_reinjection(vcpu
) &&
8595 kvm_x86_ops
->interrupt_allowed(vcpu
);
8598 void kvm_arch_start_assignment(struct kvm
*kvm
)
8600 atomic_inc(&kvm
->arch
.assigned_device_count
);
8602 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8604 void kvm_arch_end_assignment(struct kvm
*kvm
)
8606 atomic_dec(&kvm
->arch
.assigned_device_count
);
8608 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8610 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8612 return atomic_read(&kvm
->arch
.assigned_device_count
);
8614 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8616 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8618 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8620 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8622 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8624 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8626 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8628 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8630 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8632 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8634 bool kvm_arch_has_irq_bypass(void)
8636 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8639 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8640 struct irq_bypass_producer
*prod
)
8642 struct kvm_kernel_irqfd
*irqfd
=
8643 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8645 irqfd
->producer
= prod
;
8647 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8648 prod
->irq
, irqfd
->gsi
, 1);
8651 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8652 struct irq_bypass_producer
*prod
)
8655 struct kvm_kernel_irqfd
*irqfd
=
8656 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8658 WARN_ON(irqfd
->producer
!= prod
);
8659 irqfd
->producer
= NULL
;
8662 * When producer of consumer is unregistered, we change back to
8663 * remapped mode, so we can re-use the current implementation
8664 * when the irq is masked/disabled or the consumer side (KVM
8665 * int this case doesn't want to receive the interrupts.
8667 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8669 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8670 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8673 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8674 uint32_t guest_irq
, bool set
)
8676 if (!kvm_x86_ops
->update_pi_irte
)
8679 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8682 bool kvm_vector_hashing_enabled(void)
8684 return vector_hashing
;
8686 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8691 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8692 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8693 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8694 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8695 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8696 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8697 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8698 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8699 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8700 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8701 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8702 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8703 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8704 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8705 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8706 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);