2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/module.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <trace/events/kvm.h>
58 #define CREATE_TRACE_POINTS
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define MAX_IO_MSRS 256
72 #define KVM_MAX_MCE_BANKS 32
73 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
74 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
76 #define emul_to_vcpu(ctxt) \
77 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
80 * - enable syscall per default because its emulated by KVM
81 * - enable LME and LMA per default on 64 bit KVM
85 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
87 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
90 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
91 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
93 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS)
95 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
96 static void process_nmi(struct kvm_vcpu
*vcpu
);
97 static void enter_smm(struct kvm_vcpu
*vcpu
);
98 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
100 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
101 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
103 static bool __read_mostly ignore_msrs
= 0;
104 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
106 unsigned int min_timer_period_us
= 500;
107 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
109 static bool __read_mostly kvmclock_periodic_sync
= true;
110 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
112 bool __read_mostly kvm_has_tsc_control
;
113 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
114 u32 __read_mostly kvm_max_guest_tsc_khz
;
115 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
116 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
117 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
118 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
119 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
120 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
121 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
123 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
124 static u32 __read_mostly tsc_tolerance_ppm
= 250;
125 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
127 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
128 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
129 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
131 static bool __read_mostly vector_hashing
= true;
132 module_param(vector_hashing
, bool, S_IRUGO
);
134 static bool __read_mostly backwards_tsc_observed
= false;
136 #define KVM_NR_SHARED_MSRS 16
138 struct kvm_shared_msrs_global
{
140 u32 msrs
[KVM_NR_SHARED_MSRS
];
143 struct kvm_shared_msrs
{
144 struct user_return_notifier urn
;
146 struct kvm_shared_msr_values
{
149 } values
[KVM_NR_SHARED_MSRS
];
152 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
153 static struct kvm_shared_msrs __percpu
*shared_msrs
;
155 struct kvm_stats_debugfs_item debugfs_entries
[] = {
156 { "pf_fixed", VCPU_STAT(pf_fixed
) },
157 { "pf_guest", VCPU_STAT(pf_guest
) },
158 { "tlb_flush", VCPU_STAT(tlb_flush
) },
159 { "invlpg", VCPU_STAT(invlpg
) },
160 { "exits", VCPU_STAT(exits
) },
161 { "io_exits", VCPU_STAT(io_exits
) },
162 { "mmio_exits", VCPU_STAT(mmio_exits
) },
163 { "signal_exits", VCPU_STAT(signal_exits
) },
164 { "irq_window", VCPU_STAT(irq_window_exits
) },
165 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
166 { "halt_exits", VCPU_STAT(halt_exits
) },
167 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
168 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
169 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
170 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
171 { "hypercalls", VCPU_STAT(hypercalls
) },
172 { "request_irq", VCPU_STAT(request_irq_exits
) },
173 { "irq_exits", VCPU_STAT(irq_exits
) },
174 { "host_state_reload", VCPU_STAT(host_state_reload
) },
175 { "efer_reload", VCPU_STAT(efer_reload
) },
176 { "fpu_reload", VCPU_STAT(fpu_reload
) },
177 { "insn_emulation", VCPU_STAT(insn_emulation
) },
178 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
179 { "irq_injections", VCPU_STAT(irq_injections
) },
180 { "nmi_injections", VCPU_STAT(nmi_injections
) },
181 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
182 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
183 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
184 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
185 { "mmu_flooded", VM_STAT(mmu_flooded
) },
186 { "mmu_recycled", VM_STAT(mmu_recycled
) },
187 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
188 { "mmu_unsync", VM_STAT(mmu_unsync
) },
189 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
190 { "largepages", VM_STAT(lpages
) },
194 u64 __read_mostly host_xcr0
;
196 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
198 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
201 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
202 vcpu
->arch
.apf
.gfns
[i
] = ~0;
205 static void kvm_on_user_return(struct user_return_notifier
*urn
)
208 struct kvm_shared_msrs
*locals
209 = container_of(urn
, struct kvm_shared_msrs
, urn
);
210 struct kvm_shared_msr_values
*values
;
212 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
213 values
= &locals
->values
[slot
];
214 if (values
->host
!= values
->curr
) {
215 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
216 values
->curr
= values
->host
;
219 locals
->registered
= false;
220 user_return_notifier_unregister(urn
);
223 static void shared_msr_update(unsigned slot
, u32 msr
)
226 unsigned int cpu
= smp_processor_id();
227 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
229 /* only read, and nobody should modify it at this time,
230 * so don't need lock */
231 if (slot
>= shared_msrs_global
.nr
) {
232 printk(KERN_ERR
"kvm: invalid MSR slot!");
235 rdmsrl_safe(msr
, &value
);
236 smsr
->values
[slot
].host
= value
;
237 smsr
->values
[slot
].curr
= value
;
240 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
242 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
243 shared_msrs_global
.msrs
[slot
] = msr
;
244 if (slot
>= shared_msrs_global
.nr
)
245 shared_msrs_global
.nr
= slot
+ 1;
247 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
249 static void kvm_shared_msr_cpu_online(void)
253 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
254 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
257 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
259 unsigned int cpu
= smp_processor_id();
260 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
263 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
265 smsr
->values
[slot
].curr
= value
;
266 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
270 if (!smsr
->registered
) {
271 smsr
->urn
.on_user_return
= kvm_on_user_return
;
272 user_return_notifier_register(&smsr
->urn
);
273 smsr
->registered
= true;
277 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
279 static void drop_user_return_notifiers(void)
281 unsigned int cpu
= smp_processor_id();
282 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
284 if (smsr
->registered
)
285 kvm_on_user_return(&smsr
->urn
);
288 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
290 return vcpu
->arch
.apic_base
;
292 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
294 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
296 u64 old_state
= vcpu
->arch
.apic_base
&
297 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
298 u64 new_state
= msr_info
->data
&
299 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
300 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
301 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
303 if (!msr_info
->host_initiated
&&
304 ((msr_info
->data
& reserved_bits
) != 0 ||
305 new_state
== X2APIC_ENABLE
||
306 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
307 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
308 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
312 kvm_lapic_set_base(vcpu
, msr_info
->data
);
315 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
317 asmlinkage __visible
void kvm_spurious_fault(void)
319 /* Fault while not rebooting. We want the trace. */
322 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
324 #define EXCPT_BENIGN 0
325 #define EXCPT_CONTRIBUTORY 1
328 static int exception_class(int vector
)
338 return EXCPT_CONTRIBUTORY
;
345 #define EXCPT_FAULT 0
347 #define EXCPT_ABORT 2
348 #define EXCPT_INTERRUPT 3
350 static int exception_type(int vector
)
354 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
355 return EXCPT_INTERRUPT
;
359 /* #DB is trap, as instruction watchpoints are handled elsewhere */
360 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
363 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
366 /* Reserved exceptions will result in fault */
370 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
371 unsigned nr
, bool has_error
, u32 error_code
,
377 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
379 if (!vcpu
->arch
.exception
.pending
) {
381 if (has_error
&& !is_protmode(vcpu
))
383 vcpu
->arch
.exception
.pending
= true;
384 vcpu
->arch
.exception
.has_error_code
= has_error
;
385 vcpu
->arch
.exception
.nr
= nr
;
386 vcpu
->arch
.exception
.error_code
= error_code
;
387 vcpu
->arch
.exception
.reinject
= reinject
;
391 /* to check exception */
392 prev_nr
= vcpu
->arch
.exception
.nr
;
393 if (prev_nr
== DF_VECTOR
) {
394 /* triple fault -> shutdown */
395 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
398 class1
= exception_class(prev_nr
);
399 class2
= exception_class(nr
);
400 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
401 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
402 /* generate double fault per SDM Table 5-5 */
403 vcpu
->arch
.exception
.pending
= true;
404 vcpu
->arch
.exception
.has_error_code
= true;
405 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
406 vcpu
->arch
.exception
.error_code
= 0;
408 /* replace previous exception with a new one in a hope
409 that instruction re-execution will regenerate lost
414 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
416 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
418 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
420 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
422 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
424 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
426 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
429 kvm_inject_gp(vcpu
, 0);
431 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
433 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
435 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
437 ++vcpu
->stat
.pf_guest
;
438 vcpu
->arch
.cr2
= fault
->address
;
439 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
441 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
443 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
445 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
446 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
448 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
450 return fault
->nested_page_fault
;
453 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
455 atomic_inc(&vcpu
->arch
.nmi_queued
);
456 kvm_make_request(KVM_REQ_NMI
, vcpu
);
458 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
460 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
462 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
464 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
466 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
468 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
470 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
473 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
474 * a #GP and return false.
476 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
478 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
480 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
483 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
485 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
487 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
490 kvm_queue_exception(vcpu
, UD_VECTOR
);
493 EXPORT_SYMBOL_GPL(kvm_require_dr
);
496 * This function will be used to read from the physical memory of the currently
497 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
498 * can read from guest physical or from the guest's guest physical memory.
500 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
501 gfn_t ngfn
, void *data
, int offset
, int len
,
504 struct x86_exception exception
;
508 ngpa
= gfn_to_gpa(ngfn
);
509 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
510 if (real_gfn
== UNMAPPED_GVA
)
513 real_gfn
= gpa_to_gfn(real_gfn
);
515 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
517 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
519 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
520 void *data
, int offset
, int len
, u32 access
)
522 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
523 data
, offset
, len
, access
);
527 * Load the pae pdptrs. Return true is they are all valid.
529 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
531 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
532 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
535 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
537 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
538 offset
* sizeof(u64
), sizeof(pdpte
),
539 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
544 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
545 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
547 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
554 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
555 __set_bit(VCPU_EXREG_PDPTR
,
556 (unsigned long *)&vcpu
->arch
.regs_avail
);
557 __set_bit(VCPU_EXREG_PDPTR
,
558 (unsigned long *)&vcpu
->arch
.regs_dirty
);
563 EXPORT_SYMBOL_GPL(load_pdptrs
);
565 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
567 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
573 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
576 if (!test_bit(VCPU_EXREG_PDPTR
,
577 (unsigned long *)&vcpu
->arch
.regs_avail
))
580 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
581 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
582 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
583 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
586 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
592 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
594 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
595 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
600 if (cr0
& 0xffffffff00000000UL
)
604 cr0
&= ~CR0_RESERVED_BITS
;
606 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
609 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
612 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
614 if ((vcpu
->arch
.efer
& EFER_LME
)) {
619 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
624 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
629 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
632 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
634 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
635 kvm_clear_async_pf_completion_queue(vcpu
);
636 kvm_async_pf_hash_reset(vcpu
);
639 if ((cr0
^ old_cr0
) & update_bits
)
640 kvm_mmu_reset_context(vcpu
);
642 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
643 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
644 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
645 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
649 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
651 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
653 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
655 EXPORT_SYMBOL_GPL(kvm_lmsw
);
657 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
659 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
660 !vcpu
->guest_xcr0_loaded
) {
661 /* kvm_set_xcr() also depends on this */
662 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
663 vcpu
->guest_xcr0_loaded
= 1;
667 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
669 if (vcpu
->guest_xcr0_loaded
) {
670 if (vcpu
->arch
.xcr0
!= host_xcr0
)
671 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
672 vcpu
->guest_xcr0_loaded
= 0;
676 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
679 u64 old_xcr0
= vcpu
->arch
.xcr0
;
682 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
683 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
685 if (!(xcr0
& XFEATURE_MASK_FP
))
687 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
691 * Do not allow the guest to set bits that we do not support
692 * saving. However, xcr0 bit 0 is always set, even if the
693 * emulated CPU does not support XSAVE (see fx_init).
695 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
696 if (xcr0
& ~valid_bits
)
699 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
700 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
703 if (xcr0
& XFEATURE_MASK_AVX512
) {
704 if (!(xcr0
& XFEATURE_MASK_YMM
))
706 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
709 vcpu
->arch
.xcr0
= xcr0
;
711 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
712 kvm_update_cpuid(vcpu
);
716 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
718 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
719 __kvm_set_xcr(vcpu
, index
, xcr
)) {
720 kvm_inject_gp(vcpu
, 0);
725 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
727 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
729 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
730 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
731 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
733 if (cr4
& CR4_RESERVED_BITS
)
736 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
739 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
742 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
745 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
748 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
751 if (is_long_mode(vcpu
)) {
752 if (!(cr4
& X86_CR4_PAE
))
754 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
755 && ((cr4
^ old_cr4
) & pdptr_bits
)
756 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
760 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
761 if (!guest_cpuid_has_pcid(vcpu
))
764 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
765 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
769 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
772 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
773 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
774 kvm_mmu_reset_context(vcpu
);
776 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
777 kvm_update_cpuid(vcpu
);
781 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
783 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
786 cr3
&= ~CR3_PCID_INVD
;
789 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
790 kvm_mmu_sync_roots(vcpu
);
791 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
795 if (is_long_mode(vcpu
)) {
796 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
798 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
799 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
802 vcpu
->arch
.cr3
= cr3
;
803 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
804 kvm_mmu_new_cr3(vcpu
);
807 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
809 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
811 if (cr8
& CR8_RESERVED_BITS
)
813 if (lapic_in_kernel(vcpu
))
814 kvm_lapic_set_tpr(vcpu
, cr8
);
816 vcpu
->arch
.cr8
= cr8
;
819 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
821 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
823 if (lapic_in_kernel(vcpu
))
824 return kvm_lapic_get_cr8(vcpu
);
826 return vcpu
->arch
.cr8
;
828 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
830 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
834 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
835 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
836 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
837 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
841 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
843 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
844 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
847 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
851 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
852 dr7
= vcpu
->arch
.guest_debug_dr7
;
854 dr7
= vcpu
->arch
.dr7
;
855 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
856 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
857 if (dr7
& DR7_BP_EN_MASK
)
858 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
861 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
863 u64 fixed
= DR6_FIXED_1
;
865 if (!guest_cpuid_has_rtm(vcpu
))
870 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
874 vcpu
->arch
.db
[dr
] = val
;
875 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
876 vcpu
->arch
.eff_db
[dr
] = val
;
881 if (val
& 0xffffffff00000000ULL
)
883 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
884 kvm_update_dr6(vcpu
);
889 if (val
& 0xffffffff00000000ULL
)
891 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
892 kvm_update_dr7(vcpu
);
899 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
901 if (__kvm_set_dr(vcpu
, dr
, val
)) {
902 kvm_inject_gp(vcpu
, 0);
907 EXPORT_SYMBOL_GPL(kvm_set_dr
);
909 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
913 *val
= vcpu
->arch
.db
[dr
];
918 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
919 *val
= vcpu
->arch
.dr6
;
921 *val
= kvm_x86_ops
->get_dr6(vcpu
);
926 *val
= vcpu
->arch
.dr7
;
931 EXPORT_SYMBOL_GPL(kvm_get_dr
);
933 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
935 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
939 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
942 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
943 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
946 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
949 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
950 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
952 * This list is modified at module load time to reflect the
953 * capabilities of the host cpu. This capabilities test skips MSRs that are
954 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
955 * may depend on host virtualization features rather than host cpu features.
958 static u32 msrs_to_save
[] = {
959 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
962 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
964 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
965 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
968 static unsigned num_msrs_to_save
;
970 static u32 emulated_msrs
[] = {
971 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
972 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
973 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
974 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
975 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
976 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
979 HV_X64_MSR_VP_RUNTIME
,
981 HV_X64_MSR_STIMER0_CONFIG
,
982 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
986 MSR_IA32_TSCDEADLINE
,
987 MSR_IA32_MISC_ENABLE
,
990 MSR_IA32_MCG_EXT_CTL
,
994 static unsigned num_emulated_msrs
;
996 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
998 if (efer
& efer_reserved_bits
)
1001 if (efer
& EFER_FFXSR
) {
1002 struct kvm_cpuid_entry2
*feat
;
1004 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1005 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1009 if (efer
& EFER_SVME
) {
1010 struct kvm_cpuid_entry2
*feat
;
1012 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1013 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1019 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1021 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1023 u64 old_efer
= vcpu
->arch
.efer
;
1025 if (!kvm_valid_efer(vcpu
, efer
))
1029 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1033 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1035 kvm_x86_ops
->set_efer(vcpu
, efer
);
1037 /* Update reserved bits */
1038 if ((efer
^ old_efer
) & EFER_NX
)
1039 kvm_mmu_reset_context(vcpu
);
1044 void kvm_enable_efer_bits(u64 mask
)
1046 efer_reserved_bits
&= ~mask
;
1048 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1051 * Writes msr value into into the appropriate "register".
1052 * Returns 0 on success, non-0 otherwise.
1053 * Assumes vcpu_load() was already called.
1055 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1057 switch (msr
->index
) {
1060 case MSR_KERNEL_GS_BASE
:
1063 if (is_noncanonical_address(msr
->data
))
1066 case MSR_IA32_SYSENTER_EIP
:
1067 case MSR_IA32_SYSENTER_ESP
:
1069 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1070 * non-canonical address is written on Intel but not on
1071 * AMD (which ignores the top 32-bits, because it does
1072 * not implement 64-bit SYSENTER).
1074 * 64-bit code should hence be able to write a non-canonical
1075 * value on AMD. Making the address canonical ensures that
1076 * vmentry does not fail on Intel after writing a non-canonical
1077 * value, and that something deterministic happens if the guest
1078 * invokes 64-bit SYSENTER.
1080 msr
->data
= get_canonical(msr
->data
);
1082 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1084 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1087 * Adapt set_msr() to msr_io()'s calling convention
1089 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1091 struct msr_data msr
;
1095 msr
.host_initiated
= true;
1096 r
= kvm_get_msr(vcpu
, &msr
);
1104 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1106 struct msr_data msr
;
1110 msr
.host_initiated
= true;
1111 return kvm_set_msr(vcpu
, &msr
);
1114 #ifdef CONFIG_X86_64
1115 struct pvclock_gtod_data
{
1118 struct { /* extract of a clocksource struct */
1130 static struct pvclock_gtod_data pvclock_gtod_data
;
1132 static void update_pvclock_gtod(struct timekeeper
*tk
)
1134 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1137 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1139 write_seqcount_begin(&vdata
->seq
);
1141 /* copy pvclock gtod data */
1142 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1143 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1144 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1145 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1146 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1148 vdata
->boot_ns
= boot_ns
;
1149 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1151 write_seqcount_end(&vdata
->seq
);
1155 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1158 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1159 * vcpu_enter_guest. This function is only called from
1160 * the physical CPU that is running vcpu.
1162 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1165 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1169 struct pvclock_wall_clock wc
;
1170 struct timespec64 boot
;
1175 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1180 ++version
; /* first time write, random junk */
1184 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1188 * The guest calculates current wall clock time by adding
1189 * system time (updated by kvm_guest_time_update below) to the
1190 * wall clock specified here. guest system time equals host
1191 * system time for us, thus we must fill in host boot time here.
1193 getboottime64(&boot
);
1195 if (kvm
->arch
.kvmclock_offset
) {
1196 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1197 boot
= timespec64_sub(boot
, ts
);
1199 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1200 wc
.nsec
= boot
.tv_nsec
;
1201 wc
.version
= version
;
1203 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1206 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1209 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1211 do_shl32_div32(dividend
, divisor
);
1215 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1216 s8
*pshift
, u32
*pmultiplier
)
1224 scaled64
= scaled_hz
;
1225 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1230 tps32
= (uint32_t)tps64
;
1231 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1232 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1240 *pmultiplier
= div_frac(scaled64
, tps32
);
1242 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1243 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1246 #ifdef CONFIG_X86_64
1247 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1250 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1251 static unsigned long max_tsc_khz
;
1253 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1255 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1256 vcpu
->arch
.virtual_tsc_shift
);
1259 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1261 u64 v
= (u64
)khz
* (1000000 + ppm
);
1266 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1270 /* Guest TSC same frequency as host TSC? */
1272 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1276 /* TSC scaling supported? */
1277 if (!kvm_has_tsc_control
) {
1278 if (user_tsc_khz
> tsc_khz
) {
1279 vcpu
->arch
.tsc_catchup
= 1;
1280 vcpu
->arch
.tsc_always_catchup
= 1;
1283 WARN(1, "user requested TSC rate below hardware speed\n");
1288 /* TSC scaling required - calculate ratio */
1289 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1290 user_tsc_khz
, tsc_khz
);
1292 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1293 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1298 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1302 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1304 u32 thresh_lo
, thresh_hi
;
1305 int use_scaling
= 0;
1307 /* tsc_khz can be zero if TSC calibration fails */
1308 if (user_tsc_khz
== 0) {
1309 /* set tsc_scaling_ratio to a safe value */
1310 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1314 /* Compute a scale to convert nanoseconds in TSC cycles */
1315 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1316 &vcpu
->arch
.virtual_tsc_shift
,
1317 &vcpu
->arch
.virtual_tsc_mult
);
1318 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1321 * Compute the variation in TSC rate which is acceptable
1322 * within the range of tolerance and decide if the
1323 * rate being applied is within that bounds of the hardware
1324 * rate. If so, no scaling or compensation need be done.
1326 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1327 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1328 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1329 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1332 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1335 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1337 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1338 vcpu
->arch
.virtual_tsc_mult
,
1339 vcpu
->arch
.virtual_tsc_shift
);
1340 tsc
+= vcpu
->arch
.this_tsc_write
;
1344 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1346 #ifdef CONFIG_X86_64
1348 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1349 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1351 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1352 atomic_read(&vcpu
->kvm
->online_vcpus
));
1355 * Once the masterclock is enabled, always perform request in
1356 * order to update it.
1358 * In order to enable masterclock, the host clocksource must be TSC
1359 * and the vcpus need to have matched TSCs. When that happens,
1360 * perform request to enable masterclock.
1362 if (ka
->use_master_clock
||
1363 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1364 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1366 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1367 atomic_read(&vcpu
->kvm
->online_vcpus
),
1368 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1372 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1374 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1375 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1379 * Multiply tsc by a fixed point number represented by ratio.
1381 * The most significant 64-N bits (mult) of ratio represent the
1382 * integral part of the fixed point number; the remaining N bits
1383 * (frac) represent the fractional part, ie. ratio represents a fixed
1384 * point number (mult + frac * 2^(-N)).
1386 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1388 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1390 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1393 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1396 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1398 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1399 _tsc
= __scale_tsc(ratio
, tsc
);
1403 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1405 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1409 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1411 return target_tsc
- tsc
;
1414 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1416 return kvm_x86_ops
->read_l1_tsc(vcpu
, kvm_scale_tsc(vcpu
, host_tsc
));
1418 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1420 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1422 struct kvm
*kvm
= vcpu
->kvm
;
1423 u64 offset
, ns
, elapsed
;
1424 unsigned long flags
;
1427 bool already_matched
;
1428 u64 data
= msr
->data
;
1430 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1431 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1432 ns
= get_kernel_ns();
1433 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1435 if (vcpu
->arch
.virtual_tsc_khz
) {
1438 /* n.b - signed multiplication and division required */
1439 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1440 #ifdef CONFIG_X86_64
1441 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1443 /* do_div() only does unsigned */
1444 asm("1: idivl %[divisor]\n"
1445 "2: xor %%edx, %%edx\n"
1446 " movl $0, %[faulted]\n"
1448 ".section .fixup,\"ax\"\n"
1449 "4: movl $1, %[faulted]\n"
1453 _ASM_EXTABLE(1b
, 4b
)
1455 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1456 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1459 do_div(elapsed
, 1000);
1464 /* idivl overflow => difference is larger than USEC_PER_SEC */
1466 usdiff
= USEC_PER_SEC
;
1468 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1471 * Special case: TSC write with a small delta (1 second) of virtual
1472 * cycle time against real time is interpreted as an attempt to
1473 * synchronize the CPU.
1475 * For a reliable TSC, we can match TSC offsets, and for an unstable
1476 * TSC, we add elapsed time in this computation. We could let the
1477 * compensation code attempt to catch up if we fall behind, but
1478 * it's better to try to match offsets from the beginning.
1480 if (usdiff
< USEC_PER_SEC
&&
1481 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1482 if (!check_tsc_unstable()) {
1483 offset
= kvm
->arch
.cur_tsc_offset
;
1484 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1486 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1488 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1489 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1492 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1495 * We split periods of matched TSC writes into generations.
1496 * For each generation, we track the original measured
1497 * nanosecond time, offset, and write, so if TSCs are in
1498 * sync, we can match exact offset, and if not, we can match
1499 * exact software computation in compute_guest_tsc()
1501 * These values are tracked in kvm->arch.cur_xxx variables.
1503 kvm
->arch
.cur_tsc_generation
++;
1504 kvm
->arch
.cur_tsc_nsec
= ns
;
1505 kvm
->arch
.cur_tsc_write
= data
;
1506 kvm
->arch
.cur_tsc_offset
= offset
;
1508 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1509 kvm
->arch
.cur_tsc_generation
, data
);
1513 * We also track th most recent recorded KHZ, write and time to
1514 * allow the matching interval to be extended at each write.
1516 kvm
->arch
.last_tsc_nsec
= ns
;
1517 kvm
->arch
.last_tsc_write
= data
;
1518 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1520 vcpu
->arch
.last_guest_tsc
= data
;
1522 /* Keep track of which generation this VCPU has synchronized to */
1523 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1524 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1525 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1527 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1528 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1529 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1530 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1532 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1534 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1535 } else if (!already_matched
) {
1536 kvm
->arch
.nr_vcpus_matched_tsc
++;
1539 kvm_track_tsc_matching(vcpu
);
1540 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1543 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1545 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1548 kvm_x86_ops
->adjust_tsc_offset_guest(vcpu
, adjustment
);
1551 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1553 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1554 WARN_ON(adjustment
< 0);
1555 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1556 kvm_x86_ops
->adjust_tsc_offset_guest(vcpu
, adjustment
);
1559 #ifdef CONFIG_X86_64
1561 static cycle_t
read_tsc(void)
1563 cycle_t ret
= (cycle_t
)rdtsc_ordered();
1564 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1566 if (likely(ret
>= last
))
1570 * GCC likes to generate cmov here, but this branch is extremely
1571 * predictable (it's just a function of time and the likely is
1572 * very likely) and there's a data dependence, so force GCC
1573 * to generate a branch instead. I don't barrier() because
1574 * we don't actually need a barrier, and if this function
1575 * ever gets inlined it will generate worse code.
1581 static inline u64
vgettsc(cycle_t
*cycle_now
)
1584 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1586 *cycle_now
= read_tsc();
1588 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1589 return v
* gtod
->clock
.mult
;
1592 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1594 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1600 seq
= read_seqcount_begin(>od
->seq
);
1601 mode
= gtod
->clock
.vclock_mode
;
1602 ns
= gtod
->nsec_base
;
1603 ns
+= vgettsc(cycle_now
);
1604 ns
>>= gtod
->clock
.shift
;
1605 ns
+= gtod
->boot_ns
;
1606 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1612 /* returns true if host is using tsc clocksource */
1613 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1615 /* checked again under seqlock below */
1616 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1619 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1625 * Assuming a stable TSC across physical CPUS, and a stable TSC
1626 * across virtual CPUs, the following condition is possible.
1627 * Each numbered line represents an event visible to both
1628 * CPUs at the next numbered event.
1630 * "timespecX" represents host monotonic time. "tscX" represents
1633 * VCPU0 on CPU0 | VCPU1 on CPU1
1635 * 1. read timespec0,tsc0
1636 * 2. | timespec1 = timespec0 + N
1638 * 3. transition to guest | transition to guest
1639 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1640 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1641 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1643 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1646 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1648 * - 0 < N - M => M < N
1650 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1651 * always the case (the difference between two distinct xtime instances
1652 * might be smaller then the difference between corresponding TSC reads,
1653 * when updating guest vcpus pvclock areas).
1655 * To avoid that problem, do not allow visibility of distinct
1656 * system_timestamp/tsc_timestamp values simultaneously: use a master
1657 * copy of host monotonic time values. Update that master copy
1660 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1664 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1666 #ifdef CONFIG_X86_64
1667 struct kvm_arch
*ka
= &kvm
->arch
;
1669 bool host_tsc_clocksource
, vcpus_matched
;
1671 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1672 atomic_read(&kvm
->online_vcpus
));
1675 * If the host uses TSC clock, then passthrough TSC as stable
1678 host_tsc_clocksource
= kvm_get_time_and_clockread(
1679 &ka
->master_kernel_ns
,
1680 &ka
->master_cycle_now
);
1682 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1683 && !backwards_tsc_observed
1684 && !ka
->boot_vcpu_runs_old_kvmclock
;
1686 if (ka
->use_master_clock
)
1687 atomic_set(&kvm_guest_has_master_clock
, 1);
1689 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1690 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1695 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1697 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1700 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1702 #ifdef CONFIG_X86_64
1704 struct kvm_vcpu
*vcpu
;
1705 struct kvm_arch
*ka
= &kvm
->arch
;
1707 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1708 kvm_make_mclock_inprogress_request(kvm
);
1709 /* no guest entries from this point */
1710 pvclock_update_vm_gtod_copy(kvm
);
1712 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1713 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1715 /* guest entries allowed */
1716 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1717 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1719 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1723 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1725 unsigned long flags
, tgt_tsc_khz
;
1726 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1727 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1729 u64 tsc_timestamp
, host_tsc
;
1730 struct pvclock_vcpu_time_info guest_hv_clock
;
1732 bool use_master_clock
;
1738 * If the host uses TSC clock, then passthrough TSC as stable
1741 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1742 use_master_clock
= ka
->use_master_clock
;
1743 if (use_master_clock
) {
1744 host_tsc
= ka
->master_cycle_now
;
1745 kernel_ns
= ka
->master_kernel_ns
;
1747 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1749 /* Keep irq disabled to prevent changes to the clock */
1750 local_irq_save(flags
);
1751 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1752 if (unlikely(tgt_tsc_khz
== 0)) {
1753 local_irq_restore(flags
);
1754 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1757 if (!use_master_clock
) {
1759 kernel_ns
= get_kernel_ns();
1762 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1765 * We may have to catch up the TSC to match elapsed wall clock
1766 * time for two reasons, even if kvmclock is used.
1767 * 1) CPU could have been running below the maximum TSC rate
1768 * 2) Broken TSC compensation resets the base at each VCPU
1769 * entry to avoid unknown leaps of TSC even when running
1770 * again on the same CPU. This may cause apparent elapsed
1771 * time to disappear, and the guest to stand still or run
1774 if (vcpu
->tsc_catchup
) {
1775 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1776 if (tsc
> tsc_timestamp
) {
1777 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1778 tsc_timestamp
= tsc
;
1782 local_irq_restore(flags
);
1784 if (!vcpu
->pv_time_enabled
)
1787 if (kvm_has_tsc_control
)
1788 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1790 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1791 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1792 &vcpu
->hv_clock
.tsc_shift
,
1793 &vcpu
->hv_clock
.tsc_to_system_mul
);
1794 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1797 /* With all the info we got, fill in the values */
1798 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1799 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1800 vcpu
->last_guest_tsc
= tsc_timestamp
;
1802 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1803 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1806 /* This VCPU is paused, but it's legal for a guest to read another
1807 * VCPU's kvmclock, so we really have to follow the specification where
1808 * it says that version is odd if data is being modified, and even after
1811 * Version field updates must be kept separate. This is because
1812 * kvm_write_guest_cached might use a "rep movs" instruction, and
1813 * writes within a string instruction are weakly ordered. So there
1814 * are three writes overall.
1816 * As a small optimization, only write the version field in the first
1817 * and third write. The vcpu->pv_time cache is still valid, because the
1818 * version field is the first in the struct.
1820 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1822 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1823 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1825 sizeof(vcpu
->hv_clock
.version
));
1829 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1830 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1832 if (vcpu
->pvclock_set_guest_stopped_request
) {
1833 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1834 vcpu
->pvclock_set_guest_stopped_request
= false;
1837 /* If the host uses TSC clocksource, then it is stable */
1838 if (use_master_clock
)
1839 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1841 vcpu
->hv_clock
.flags
= pvclock_flags
;
1843 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1845 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1847 sizeof(vcpu
->hv_clock
));
1851 vcpu
->hv_clock
.version
++;
1852 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1854 sizeof(vcpu
->hv_clock
.version
));
1859 * kvmclock updates which are isolated to a given vcpu, such as
1860 * vcpu->cpu migration, should not allow system_timestamp from
1861 * the rest of the vcpus to remain static. Otherwise ntp frequency
1862 * correction applies to one vcpu's system_timestamp but not
1865 * So in those cases, request a kvmclock update for all vcpus.
1866 * We need to rate-limit these requests though, as they can
1867 * considerably slow guests that have a large number of vcpus.
1868 * The time for a remote vcpu to update its kvmclock is bound
1869 * by the delay we use to rate-limit the updates.
1872 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1874 static void kvmclock_update_fn(struct work_struct
*work
)
1877 struct delayed_work
*dwork
= to_delayed_work(work
);
1878 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1879 kvmclock_update_work
);
1880 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1881 struct kvm_vcpu
*vcpu
;
1883 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1884 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1885 kvm_vcpu_kick(vcpu
);
1889 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1891 struct kvm
*kvm
= v
->kvm
;
1893 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1894 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1895 KVMCLOCK_UPDATE_DELAY
);
1898 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1900 static void kvmclock_sync_fn(struct work_struct
*work
)
1902 struct delayed_work
*dwork
= to_delayed_work(work
);
1903 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1904 kvmclock_sync_work
);
1905 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1907 if (!kvmclock_periodic_sync
)
1910 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1911 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1912 KVMCLOCK_SYNC_PERIOD
);
1915 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1917 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1918 unsigned bank_num
= mcg_cap
& 0xff;
1921 case MSR_IA32_MCG_STATUS
:
1922 vcpu
->arch
.mcg_status
= data
;
1924 case MSR_IA32_MCG_CTL
:
1925 if (!(mcg_cap
& MCG_CTL_P
))
1927 if (data
!= 0 && data
!= ~(u64
)0)
1929 vcpu
->arch
.mcg_ctl
= data
;
1932 if (msr
>= MSR_IA32_MC0_CTL
&&
1933 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1934 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1935 /* only 0 or all 1s can be written to IA32_MCi_CTL
1936 * some Linux kernels though clear bit 10 in bank 4 to
1937 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1938 * this to avoid an uncatched #GP in the guest
1940 if ((offset
& 0x3) == 0 &&
1941 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1943 vcpu
->arch
.mce_banks
[offset
] = data
;
1951 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1953 struct kvm
*kvm
= vcpu
->kvm
;
1954 int lm
= is_long_mode(vcpu
);
1955 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1956 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1957 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1958 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1959 u32 page_num
= data
& ~PAGE_MASK
;
1960 u64 page_addr
= data
& PAGE_MASK
;
1965 if (page_num
>= blob_size
)
1968 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1973 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
1982 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1984 gpa_t gpa
= data
& ~0x3f;
1986 /* Bits 2:5 are reserved, Should be zero */
1990 vcpu
->arch
.apf
.msr_val
= data
;
1992 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1993 kvm_clear_async_pf_completion_queue(vcpu
);
1994 kvm_async_pf_hash_reset(vcpu
);
1998 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2002 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2003 kvm_async_pf_wakeup_all(vcpu
);
2007 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2009 vcpu
->arch
.pv_time_enabled
= false;
2012 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2014 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2017 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2018 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2021 if (vcpu
->arch
.st
.steal
.version
& 1)
2022 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2024 vcpu
->arch
.st
.steal
.version
+= 1;
2026 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2027 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2031 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2032 vcpu
->arch
.st
.last_steal
;
2033 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2035 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2036 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2040 vcpu
->arch
.st
.steal
.version
+= 1;
2042 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2043 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2046 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2049 u32 msr
= msr_info
->index
;
2050 u64 data
= msr_info
->data
;
2053 case MSR_AMD64_NB_CFG
:
2054 case MSR_IA32_UCODE_REV
:
2055 case MSR_IA32_UCODE_WRITE
:
2056 case MSR_VM_HSAVE_PA
:
2057 case MSR_AMD64_PATCH_LOADER
:
2058 case MSR_AMD64_BU_CFG2
:
2062 return set_efer(vcpu
, data
);
2064 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2065 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2066 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2067 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2069 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2074 case MSR_FAM10H_MMIO_CONF_BASE
:
2076 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2081 case MSR_IA32_DEBUGCTLMSR
:
2083 /* We support the non-activated case already */
2085 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2086 /* Values other than LBR and BTF are vendor-specific,
2087 thus reserved and should throw a #GP */
2090 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2093 case 0x200 ... 0x2ff:
2094 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2095 case MSR_IA32_APICBASE
:
2096 return kvm_set_apic_base(vcpu
, msr_info
);
2097 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2098 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2099 case MSR_IA32_TSCDEADLINE
:
2100 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2102 case MSR_IA32_TSC_ADJUST
:
2103 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2104 if (!msr_info
->host_initiated
) {
2105 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2106 adjust_tsc_offset_guest(vcpu
, adj
);
2108 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2111 case MSR_IA32_MISC_ENABLE
:
2112 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2114 case MSR_IA32_SMBASE
:
2115 if (!msr_info
->host_initiated
)
2117 vcpu
->arch
.smbase
= data
;
2119 case MSR_KVM_WALL_CLOCK_NEW
:
2120 case MSR_KVM_WALL_CLOCK
:
2121 vcpu
->kvm
->arch
.wall_clock
= data
;
2122 kvm_write_wall_clock(vcpu
->kvm
, data
);
2124 case MSR_KVM_SYSTEM_TIME_NEW
:
2125 case MSR_KVM_SYSTEM_TIME
: {
2127 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2129 kvmclock_reset(vcpu
);
2131 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2132 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2134 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2135 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2138 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2141 vcpu
->arch
.time
= data
;
2142 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2144 /* we verify if the enable bit is set... */
2148 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2150 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2151 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2152 sizeof(struct pvclock_vcpu_time_info
)))
2153 vcpu
->arch
.pv_time_enabled
= false;
2155 vcpu
->arch
.pv_time_enabled
= true;
2159 case MSR_KVM_ASYNC_PF_EN
:
2160 if (kvm_pv_enable_async_pf(vcpu
, data
))
2163 case MSR_KVM_STEAL_TIME
:
2165 if (unlikely(!sched_info_on()))
2168 if (data
& KVM_STEAL_RESERVED_MASK
)
2171 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2172 data
& KVM_STEAL_VALID_BITS
,
2173 sizeof(struct kvm_steal_time
)))
2176 vcpu
->arch
.st
.msr_val
= data
;
2178 if (!(data
& KVM_MSR_ENABLED
))
2181 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2184 case MSR_KVM_PV_EOI_EN
:
2185 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2189 case MSR_IA32_MCG_CTL
:
2190 case MSR_IA32_MCG_STATUS
:
2191 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2192 return set_msr_mce(vcpu
, msr
, data
);
2194 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2195 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2196 pr
= true; /* fall through */
2197 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2198 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2199 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2200 return kvm_pmu_set_msr(vcpu
, msr_info
);
2202 if (pr
|| data
!= 0)
2203 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2204 "0x%x data 0x%llx\n", msr
, data
);
2206 case MSR_K7_CLK_CTL
:
2208 * Ignore all writes to this no longer documented MSR.
2209 * Writes are only relevant for old K7 processors,
2210 * all pre-dating SVM, but a recommended workaround from
2211 * AMD for these chips. It is possible to specify the
2212 * affected processor models on the command line, hence
2213 * the need to ignore the workaround.
2216 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2217 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2218 case HV_X64_MSR_CRASH_CTL
:
2219 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2220 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2221 msr_info
->host_initiated
);
2222 case MSR_IA32_BBL_CR_CTL3
:
2223 /* Drop writes to this legacy MSR -- see rdmsr
2224 * counterpart for further detail.
2226 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2228 case MSR_AMD64_OSVW_ID_LENGTH
:
2229 if (!guest_cpuid_has_osvw(vcpu
))
2231 vcpu
->arch
.osvw
.length
= data
;
2233 case MSR_AMD64_OSVW_STATUS
:
2234 if (!guest_cpuid_has_osvw(vcpu
))
2236 vcpu
->arch
.osvw
.status
= data
;
2239 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2240 return xen_hvm_config(vcpu
, data
);
2241 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2242 return kvm_pmu_set_msr(vcpu
, msr_info
);
2244 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2248 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2255 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2259 * Reads an msr value (of 'msr_index') into 'pdata'.
2260 * Returns 0 on success, non-0 otherwise.
2261 * Assumes vcpu_load() was already called.
2263 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2265 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2267 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2269 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2272 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2273 unsigned bank_num
= mcg_cap
& 0xff;
2276 case MSR_IA32_P5_MC_ADDR
:
2277 case MSR_IA32_P5_MC_TYPE
:
2280 case MSR_IA32_MCG_CAP
:
2281 data
= vcpu
->arch
.mcg_cap
;
2283 case MSR_IA32_MCG_CTL
:
2284 if (!(mcg_cap
& MCG_CTL_P
))
2286 data
= vcpu
->arch
.mcg_ctl
;
2288 case MSR_IA32_MCG_STATUS
:
2289 data
= vcpu
->arch
.mcg_status
;
2292 if (msr
>= MSR_IA32_MC0_CTL
&&
2293 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2294 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2295 data
= vcpu
->arch
.mce_banks
[offset
];
2304 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2306 switch (msr_info
->index
) {
2307 case MSR_IA32_PLATFORM_ID
:
2308 case MSR_IA32_EBL_CR_POWERON
:
2309 case MSR_IA32_DEBUGCTLMSR
:
2310 case MSR_IA32_LASTBRANCHFROMIP
:
2311 case MSR_IA32_LASTBRANCHTOIP
:
2312 case MSR_IA32_LASTINTFROMIP
:
2313 case MSR_IA32_LASTINTTOIP
:
2315 case MSR_K8_TSEG_ADDR
:
2316 case MSR_K8_TSEG_MASK
:
2318 case MSR_VM_HSAVE_PA
:
2319 case MSR_K8_INT_PENDING_MSG
:
2320 case MSR_AMD64_NB_CFG
:
2321 case MSR_FAM10H_MMIO_CONF_BASE
:
2322 case MSR_AMD64_BU_CFG2
:
2323 case MSR_IA32_PERF_CTL
:
2326 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2327 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2328 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2329 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2330 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2331 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2334 case MSR_IA32_UCODE_REV
:
2335 msr_info
->data
= 0x100000000ULL
;
2338 case 0x200 ... 0x2ff:
2339 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2340 case 0xcd: /* fsb frequency */
2344 * MSR_EBC_FREQUENCY_ID
2345 * Conservative value valid for even the basic CPU models.
2346 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2347 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2348 * and 266MHz for model 3, or 4. Set Core Clock
2349 * Frequency to System Bus Frequency Ratio to 1 (bits
2350 * 31:24) even though these are only valid for CPU
2351 * models > 2, however guests may end up dividing or
2352 * multiplying by zero otherwise.
2354 case MSR_EBC_FREQUENCY_ID
:
2355 msr_info
->data
= 1 << 24;
2357 case MSR_IA32_APICBASE
:
2358 msr_info
->data
= kvm_get_apic_base(vcpu
);
2360 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2361 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2363 case MSR_IA32_TSCDEADLINE
:
2364 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2366 case MSR_IA32_TSC_ADJUST
:
2367 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2369 case MSR_IA32_MISC_ENABLE
:
2370 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2372 case MSR_IA32_SMBASE
:
2373 if (!msr_info
->host_initiated
)
2375 msr_info
->data
= vcpu
->arch
.smbase
;
2377 case MSR_IA32_PERF_STATUS
:
2378 /* TSC increment by tick */
2379 msr_info
->data
= 1000ULL;
2380 /* CPU multiplier */
2381 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2384 msr_info
->data
= vcpu
->arch
.efer
;
2386 case MSR_KVM_WALL_CLOCK
:
2387 case MSR_KVM_WALL_CLOCK_NEW
:
2388 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2390 case MSR_KVM_SYSTEM_TIME
:
2391 case MSR_KVM_SYSTEM_TIME_NEW
:
2392 msr_info
->data
= vcpu
->arch
.time
;
2394 case MSR_KVM_ASYNC_PF_EN
:
2395 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2397 case MSR_KVM_STEAL_TIME
:
2398 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2400 case MSR_KVM_PV_EOI_EN
:
2401 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2403 case MSR_IA32_P5_MC_ADDR
:
2404 case MSR_IA32_P5_MC_TYPE
:
2405 case MSR_IA32_MCG_CAP
:
2406 case MSR_IA32_MCG_CTL
:
2407 case MSR_IA32_MCG_STATUS
:
2408 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2409 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2410 case MSR_K7_CLK_CTL
:
2412 * Provide expected ramp-up count for K7. All other
2413 * are set to zero, indicating minimum divisors for
2416 * This prevents guest kernels on AMD host with CPU
2417 * type 6, model 8 and higher from exploding due to
2418 * the rdmsr failing.
2420 msr_info
->data
= 0x20000000;
2422 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2423 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2424 case HV_X64_MSR_CRASH_CTL
:
2425 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2426 return kvm_hv_get_msr_common(vcpu
,
2427 msr_info
->index
, &msr_info
->data
);
2429 case MSR_IA32_BBL_CR_CTL3
:
2430 /* This legacy MSR exists but isn't fully documented in current
2431 * silicon. It is however accessed by winxp in very narrow
2432 * scenarios where it sets bit #19, itself documented as
2433 * a "reserved" bit. Best effort attempt to source coherent
2434 * read data here should the balance of the register be
2435 * interpreted by the guest:
2437 * L2 cache control register 3: 64GB range, 256KB size,
2438 * enabled, latency 0x1, configured
2440 msr_info
->data
= 0xbe702111;
2442 case MSR_AMD64_OSVW_ID_LENGTH
:
2443 if (!guest_cpuid_has_osvw(vcpu
))
2445 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2447 case MSR_AMD64_OSVW_STATUS
:
2448 if (!guest_cpuid_has_osvw(vcpu
))
2450 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2453 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2454 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2456 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr_info
->index
);
2459 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2466 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2469 * Read or write a bunch of msrs. All parameters are kernel addresses.
2471 * @return number of msrs set successfully.
2473 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2474 struct kvm_msr_entry
*entries
,
2475 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2476 unsigned index
, u64
*data
))
2480 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2481 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2482 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2484 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2490 * Read or write a bunch of msrs. Parameters are user addresses.
2492 * @return number of msrs set successfully.
2494 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2495 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2496 unsigned index
, u64
*data
),
2499 struct kvm_msrs msrs
;
2500 struct kvm_msr_entry
*entries
;
2505 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2509 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2512 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2513 entries
= memdup_user(user_msrs
->entries
, size
);
2514 if (IS_ERR(entries
)) {
2515 r
= PTR_ERR(entries
);
2519 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2524 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2535 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2540 case KVM_CAP_IRQCHIP
:
2542 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2543 case KVM_CAP_SET_TSS_ADDR
:
2544 case KVM_CAP_EXT_CPUID
:
2545 case KVM_CAP_EXT_EMUL_CPUID
:
2546 case KVM_CAP_CLOCKSOURCE
:
2548 case KVM_CAP_NOP_IO_DELAY
:
2549 case KVM_CAP_MP_STATE
:
2550 case KVM_CAP_SYNC_MMU
:
2551 case KVM_CAP_USER_NMI
:
2552 case KVM_CAP_REINJECT_CONTROL
:
2553 case KVM_CAP_IRQ_INJECT_STATUS
:
2554 case KVM_CAP_IOEVENTFD
:
2555 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2557 case KVM_CAP_PIT_STATE2
:
2558 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2559 case KVM_CAP_XEN_HVM
:
2560 case KVM_CAP_ADJUST_CLOCK
:
2561 case KVM_CAP_VCPU_EVENTS
:
2562 case KVM_CAP_HYPERV
:
2563 case KVM_CAP_HYPERV_VAPIC
:
2564 case KVM_CAP_HYPERV_SPIN
:
2565 case KVM_CAP_HYPERV_SYNIC
:
2566 case KVM_CAP_PCI_SEGMENT
:
2567 case KVM_CAP_DEBUGREGS
:
2568 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2570 case KVM_CAP_ASYNC_PF
:
2571 case KVM_CAP_GET_TSC_KHZ
:
2572 case KVM_CAP_KVMCLOCK_CTRL
:
2573 case KVM_CAP_READONLY_MEM
:
2574 case KVM_CAP_HYPERV_TIME
:
2575 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2576 case KVM_CAP_TSC_DEADLINE_TIMER
:
2577 case KVM_CAP_ENABLE_CAP_VM
:
2578 case KVM_CAP_DISABLE_QUIRKS
:
2579 case KVM_CAP_SET_BOOT_CPU_ID
:
2580 case KVM_CAP_SPLIT_IRQCHIP
:
2581 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2582 case KVM_CAP_ASSIGN_DEV_IRQ
:
2583 case KVM_CAP_PCI_2_3
:
2587 case KVM_CAP_X86_SMM
:
2588 /* SMBASE is usually relocated above 1M on modern chipsets,
2589 * and SMM handlers might indeed rely on 4G segment limits,
2590 * so do not report SMM to be available if real mode is
2591 * emulated via vm86 mode. Still, do not go to great lengths
2592 * to avoid userspace's usage of the feature, because it is a
2593 * fringe case that is not enabled except via specific settings
2594 * of the module parameters.
2596 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2598 case KVM_CAP_COALESCED_MMIO
:
2599 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2602 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2604 case KVM_CAP_NR_VCPUS
:
2605 r
= KVM_SOFT_MAX_VCPUS
;
2607 case KVM_CAP_MAX_VCPUS
:
2610 case KVM_CAP_NR_MEMSLOTS
:
2611 r
= KVM_USER_MEM_SLOTS
;
2613 case KVM_CAP_PV_MMU
: /* obsolete */
2616 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2618 r
= iommu_present(&pci_bus_type
);
2622 r
= KVM_MAX_MCE_BANKS
;
2625 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2627 case KVM_CAP_TSC_CONTROL
:
2628 r
= kvm_has_tsc_control
;
2630 case KVM_CAP_X2APIC_API
:
2631 r
= KVM_X2APIC_API_VALID_FLAGS
;
2641 long kvm_arch_dev_ioctl(struct file
*filp
,
2642 unsigned int ioctl
, unsigned long arg
)
2644 void __user
*argp
= (void __user
*)arg
;
2648 case KVM_GET_MSR_INDEX_LIST
: {
2649 struct kvm_msr_list __user
*user_msr_list
= argp
;
2650 struct kvm_msr_list msr_list
;
2654 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2657 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2658 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2661 if (n
< msr_list
.nmsrs
)
2664 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2665 num_msrs_to_save
* sizeof(u32
)))
2667 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2669 num_emulated_msrs
* sizeof(u32
)))
2674 case KVM_GET_SUPPORTED_CPUID
:
2675 case KVM_GET_EMULATED_CPUID
: {
2676 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2677 struct kvm_cpuid2 cpuid
;
2680 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2683 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2689 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2694 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2696 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2697 sizeof(kvm_mce_cap_supported
)))
2709 static void wbinvd_ipi(void *garbage
)
2714 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2716 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2719 static inline void kvm_migrate_timers(struct kvm_vcpu
*vcpu
)
2721 set_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
);
2724 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2726 /* Address WBINVD may be executed by guest */
2727 if (need_emulate_wbinvd(vcpu
)) {
2728 if (kvm_x86_ops
->has_wbinvd_exit())
2729 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2730 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2731 smp_call_function_single(vcpu
->cpu
,
2732 wbinvd_ipi
, NULL
, 1);
2735 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2737 /* Apply any externally detected TSC adjustments (due to suspend) */
2738 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2739 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2740 vcpu
->arch
.tsc_offset_adjustment
= 0;
2741 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2744 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2745 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2746 rdtsc() - vcpu
->arch
.last_host_tsc
;
2748 mark_tsc_unstable("KVM discovered backwards TSC");
2750 if (kvm_lapic_hv_timer_in_use(vcpu
) &&
2751 kvm_x86_ops
->set_hv_timer(vcpu
,
2752 kvm_get_lapic_tscdeadline_msr(vcpu
)))
2753 kvm_lapic_switch_to_sw_timer(vcpu
);
2754 if (check_tsc_unstable()) {
2755 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2756 vcpu
->arch
.last_guest_tsc
);
2757 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2758 vcpu
->arch
.tsc_catchup
= 1;
2761 * On a host with synchronized TSC, there is no need to update
2762 * kvmclock on vcpu->cpu migration
2764 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2765 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2766 if (vcpu
->cpu
!= cpu
)
2767 kvm_migrate_timers(vcpu
);
2771 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2774 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2776 kvm_x86_ops
->vcpu_put(vcpu
);
2777 kvm_put_guest_fpu(vcpu
);
2778 vcpu
->arch
.last_host_tsc
= rdtsc();
2781 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2782 struct kvm_lapic_state
*s
)
2784 if (vcpu
->arch
.apicv_active
)
2785 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2787 return kvm_apic_get_state(vcpu
, s
);
2790 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2791 struct kvm_lapic_state
*s
)
2795 r
= kvm_apic_set_state(vcpu
, s
);
2798 update_cr8_intercept(vcpu
);
2803 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2805 return (!lapic_in_kernel(vcpu
) ||
2806 kvm_apic_accept_pic_intr(vcpu
));
2810 * if userspace requested an interrupt window, check that the
2811 * interrupt window is open.
2813 * No need to exit to userspace if we already have an interrupt queued.
2815 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2817 return kvm_arch_interrupt_allowed(vcpu
) &&
2818 !kvm_cpu_has_interrupt(vcpu
) &&
2819 !kvm_event_needs_reinjection(vcpu
) &&
2820 kvm_cpu_accept_dm_intr(vcpu
);
2823 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2824 struct kvm_interrupt
*irq
)
2826 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2829 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2830 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2831 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2836 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2837 * fail for in-kernel 8259.
2839 if (pic_in_kernel(vcpu
->kvm
))
2842 if (vcpu
->arch
.pending_external_vector
!= -1)
2845 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2846 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2850 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2852 kvm_inject_nmi(vcpu
);
2857 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2859 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2864 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2865 struct kvm_tpr_access_ctl
*tac
)
2869 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2873 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2877 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2880 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2882 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
2885 vcpu
->arch
.mcg_cap
= mcg_cap
;
2886 /* Init IA32_MCG_CTL to all 1s */
2887 if (mcg_cap
& MCG_CTL_P
)
2888 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2889 /* Init IA32_MCi_CTL to all 1s */
2890 for (bank
= 0; bank
< bank_num
; bank
++)
2891 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2893 if (kvm_x86_ops
->setup_mce
)
2894 kvm_x86_ops
->setup_mce(vcpu
);
2899 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2900 struct kvm_x86_mce
*mce
)
2902 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2903 unsigned bank_num
= mcg_cap
& 0xff;
2904 u64
*banks
= vcpu
->arch
.mce_banks
;
2906 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2909 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2910 * reporting is disabled
2912 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2913 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2915 banks
+= 4 * mce
->bank
;
2917 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2918 * reporting is disabled for the bank
2920 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2922 if (mce
->status
& MCI_STATUS_UC
) {
2923 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2924 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2925 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2928 if (banks
[1] & MCI_STATUS_VAL
)
2929 mce
->status
|= MCI_STATUS_OVER
;
2930 banks
[2] = mce
->addr
;
2931 banks
[3] = mce
->misc
;
2932 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2933 banks
[1] = mce
->status
;
2934 kvm_queue_exception(vcpu
, MC_VECTOR
);
2935 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2936 || !(banks
[1] & MCI_STATUS_UC
)) {
2937 if (banks
[1] & MCI_STATUS_VAL
)
2938 mce
->status
|= MCI_STATUS_OVER
;
2939 banks
[2] = mce
->addr
;
2940 banks
[3] = mce
->misc
;
2941 banks
[1] = mce
->status
;
2943 banks
[1] |= MCI_STATUS_OVER
;
2947 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2948 struct kvm_vcpu_events
*events
)
2951 events
->exception
.injected
=
2952 vcpu
->arch
.exception
.pending
&&
2953 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2954 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2955 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2956 events
->exception
.pad
= 0;
2957 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2959 events
->interrupt
.injected
=
2960 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2961 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2962 events
->interrupt
.soft
= 0;
2963 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
2965 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2966 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2967 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2968 events
->nmi
.pad
= 0;
2970 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2972 events
->smi
.smm
= is_smm(vcpu
);
2973 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
2974 events
->smi
.smm_inside_nmi
=
2975 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
2976 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
2978 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2979 | KVM_VCPUEVENT_VALID_SHADOW
2980 | KVM_VCPUEVENT_VALID_SMM
);
2981 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2984 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2985 struct kvm_vcpu_events
*events
)
2987 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2988 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2989 | KVM_VCPUEVENT_VALID_SHADOW
2990 | KVM_VCPUEVENT_VALID_SMM
))
2993 if (events
->exception
.injected
&&
2994 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
2998 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2999 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3000 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3001 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3003 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3004 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3005 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3006 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3007 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3008 events
->interrupt
.shadow
);
3010 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3011 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3012 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3013 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3015 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3016 lapic_in_kernel(vcpu
))
3017 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3019 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3020 if (events
->smi
.smm
)
3021 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
3023 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
3024 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3025 if (events
->smi
.smm_inside_nmi
)
3026 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3028 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3029 if (lapic_in_kernel(vcpu
)) {
3030 if (events
->smi
.latched_init
)
3031 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3033 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3037 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3042 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3043 struct kvm_debugregs
*dbgregs
)
3047 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3048 kvm_get_dr(vcpu
, 6, &val
);
3050 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3052 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3055 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3056 struct kvm_debugregs
*dbgregs
)
3061 if (dbgregs
->dr6
& ~0xffffffffull
)
3063 if (dbgregs
->dr7
& ~0xffffffffull
)
3066 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3067 kvm_update_dr0123(vcpu
);
3068 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3069 kvm_update_dr6(vcpu
);
3070 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3071 kvm_update_dr7(vcpu
);
3076 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3078 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3080 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3081 u64 xstate_bv
= xsave
->header
.xfeatures
;
3085 * Copy legacy XSAVE area, to avoid complications with CPUID
3086 * leaves 0 and 1 in the loop below.
3088 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3091 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3094 * Copy each region from the possibly compacted offset to the
3095 * non-compacted offset.
3097 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3099 u64 feature
= valid
& -valid
;
3100 int index
= fls64(feature
) - 1;
3101 void *src
= get_xsave_addr(xsave
, feature
);
3104 u32 size
, offset
, ecx
, edx
;
3105 cpuid_count(XSTATE_CPUID
, index
,
3106 &size
, &offset
, &ecx
, &edx
);
3107 memcpy(dest
+ offset
, src
, size
);
3114 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3116 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3117 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3121 * Copy legacy XSAVE area, to avoid complications with CPUID
3122 * leaves 0 and 1 in the loop below.
3124 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3126 /* Set XSTATE_BV and possibly XCOMP_BV. */
3127 xsave
->header
.xfeatures
= xstate_bv
;
3128 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3129 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3132 * Copy each region from the non-compacted offset to the
3133 * possibly compacted offset.
3135 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3137 u64 feature
= valid
& -valid
;
3138 int index
= fls64(feature
) - 1;
3139 void *dest
= get_xsave_addr(xsave
, feature
);
3142 u32 size
, offset
, ecx
, edx
;
3143 cpuid_count(XSTATE_CPUID
, index
,
3144 &size
, &offset
, &ecx
, &edx
);
3145 memcpy(dest
, src
+ offset
, size
);
3152 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3153 struct kvm_xsave
*guest_xsave
)
3155 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3156 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3157 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3159 memcpy(guest_xsave
->region
,
3160 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3161 sizeof(struct fxregs_state
));
3162 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3163 XFEATURE_MASK_FPSSE
;
3167 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3168 struct kvm_xsave
*guest_xsave
)
3171 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3173 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3175 * Here we allow setting states that are not present in
3176 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3177 * with old userspace.
3179 if (xstate_bv
& ~kvm_supported_xcr0())
3181 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3183 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
)
3185 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3186 guest_xsave
->region
, sizeof(struct fxregs_state
));
3191 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3192 struct kvm_xcrs
*guest_xcrs
)
3194 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3195 guest_xcrs
->nr_xcrs
= 0;
3199 guest_xcrs
->nr_xcrs
= 1;
3200 guest_xcrs
->flags
= 0;
3201 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3202 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3205 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3206 struct kvm_xcrs
*guest_xcrs
)
3210 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3213 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3216 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3217 /* Only support XCR0 currently */
3218 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3219 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3220 guest_xcrs
->xcrs
[i
].value
);
3229 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3230 * stopped by the hypervisor. This function will be called from the host only.
3231 * EINVAL is returned when the host attempts to set the flag for a guest that
3232 * does not support pv clocks.
3234 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3236 if (!vcpu
->arch
.pv_time_enabled
)
3238 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3239 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3243 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3244 struct kvm_enable_cap
*cap
)
3250 case KVM_CAP_HYPERV_SYNIC
:
3251 return kvm_hv_activate_synic(vcpu
);
3257 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3258 unsigned int ioctl
, unsigned long arg
)
3260 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3261 void __user
*argp
= (void __user
*)arg
;
3264 struct kvm_lapic_state
*lapic
;
3265 struct kvm_xsave
*xsave
;
3266 struct kvm_xcrs
*xcrs
;
3272 case KVM_GET_LAPIC
: {
3274 if (!lapic_in_kernel(vcpu
))
3276 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3281 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3285 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3290 case KVM_SET_LAPIC
: {
3292 if (!lapic_in_kernel(vcpu
))
3294 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3295 if (IS_ERR(u
.lapic
))
3296 return PTR_ERR(u
.lapic
);
3298 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3301 case KVM_INTERRUPT
: {
3302 struct kvm_interrupt irq
;
3305 if (copy_from_user(&irq
, argp
, sizeof irq
))
3307 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3311 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3315 r
= kvm_vcpu_ioctl_smi(vcpu
);
3318 case KVM_SET_CPUID
: {
3319 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3320 struct kvm_cpuid cpuid
;
3323 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3325 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3328 case KVM_SET_CPUID2
: {
3329 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3330 struct kvm_cpuid2 cpuid
;
3333 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3335 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3336 cpuid_arg
->entries
);
3339 case KVM_GET_CPUID2
: {
3340 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3341 struct kvm_cpuid2 cpuid
;
3344 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3346 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3347 cpuid_arg
->entries
);
3351 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3357 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3360 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3362 case KVM_TPR_ACCESS_REPORTING
: {
3363 struct kvm_tpr_access_ctl tac
;
3366 if (copy_from_user(&tac
, argp
, sizeof tac
))
3368 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3372 if (copy_to_user(argp
, &tac
, sizeof tac
))
3377 case KVM_SET_VAPIC_ADDR
: {
3378 struct kvm_vapic_addr va
;
3381 if (!lapic_in_kernel(vcpu
))
3384 if (copy_from_user(&va
, argp
, sizeof va
))
3386 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3389 case KVM_X86_SETUP_MCE
: {
3393 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3395 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3398 case KVM_X86_SET_MCE
: {
3399 struct kvm_x86_mce mce
;
3402 if (copy_from_user(&mce
, argp
, sizeof mce
))
3404 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3407 case KVM_GET_VCPU_EVENTS
: {
3408 struct kvm_vcpu_events events
;
3410 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3413 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3418 case KVM_SET_VCPU_EVENTS
: {
3419 struct kvm_vcpu_events events
;
3422 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3425 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3428 case KVM_GET_DEBUGREGS
: {
3429 struct kvm_debugregs dbgregs
;
3431 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3434 if (copy_to_user(argp
, &dbgregs
,
3435 sizeof(struct kvm_debugregs
)))
3440 case KVM_SET_DEBUGREGS
: {
3441 struct kvm_debugregs dbgregs
;
3444 if (copy_from_user(&dbgregs
, argp
,
3445 sizeof(struct kvm_debugregs
)))
3448 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3451 case KVM_GET_XSAVE
: {
3452 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3457 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3460 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3465 case KVM_SET_XSAVE
: {
3466 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3467 if (IS_ERR(u
.xsave
))
3468 return PTR_ERR(u
.xsave
);
3470 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3473 case KVM_GET_XCRS
: {
3474 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3479 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3482 if (copy_to_user(argp
, u
.xcrs
,
3483 sizeof(struct kvm_xcrs
)))
3488 case KVM_SET_XCRS
: {
3489 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3491 return PTR_ERR(u
.xcrs
);
3493 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3496 case KVM_SET_TSC_KHZ
: {
3500 user_tsc_khz
= (u32
)arg
;
3502 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3505 if (user_tsc_khz
== 0)
3506 user_tsc_khz
= tsc_khz
;
3508 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3513 case KVM_GET_TSC_KHZ
: {
3514 r
= vcpu
->arch
.virtual_tsc_khz
;
3517 case KVM_KVMCLOCK_CTRL
: {
3518 r
= kvm_set_guest_paused(vcpu
);
3521 case KVM_ENABLE_CAP
: {
3522 struct kvm_enable_cap cap
;
3525 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3527 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3538 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3540 return VM_FAULT_SIGBUS
;
3543 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3547 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3549 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3553 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3556 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3560 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3561 u32 kvm_nr_mmu_pages
)
3563 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3566 mutex_lock(&kvm
->slots_lock
);
3568 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3569 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3571 mutex_unlock(&kvm
->slots_lock
);
3575 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3577 return kvm
->arch
.n_max_mmu_pages
;
3580 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3585 switch (chip
->chip_id
) {
3586 case KVM_IRQCHIP_PIC_MASTER
:
3587 memcpy(&chip
->chip
.pic
,
3588 &pic_irqchip(kvm
)->pics
[0],
3589 sizeof(struct kvm_pic_state
));
3591 case KVM_IRQCHIP_PIC_SLAVE
:
3592 memcpy(&chip
->chip
.pic
,
3593 &pic_irqchip(kvm
)->pics
[1],
3594 sizeof(struct kvm_pic_state
));
3596 case KVM_IRQCHIP_IOAPIC
:
3597 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3606 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3611 switch (chip
->chip_id
) {
3612 case KVM_IRQCHIP_PIC_MASTER
:
3613 spin_lock(&pic_irqchip(kvm
)->lock
);
3614 memcpy(&pic_irqchip(kvm
)->pics
[0],
3616 sizeof(struct kvm_pic_state
));
3617 spin_unlock(&pic_irqchip(kvm
)->lock
);
3619 case KVM_IRQCHIP_PIC_SLAVE
:
3620 spin_lock(&pic_irqchip(kvm
)->lock
);
3621 memcpy(&pic_irqchip(kvm
)->pics
[1],
3623 sizeof(struct kvm_pic_state
));
3624 spin_unlock(&pic_irqchip(kvm
)->lock
);
3626 case KVM_IRQCHIP_IOAPIC
:
3627 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3633 kvm_pic_update_irq(pic_irqchip(kvm
));
3637 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3639 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3641 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3643 mutex_lock(&kps
->lock
);
3644 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3645 mutex_unlock(&kps
->lock
);
3649 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3652 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3654 mutex_lock(&pit
->pit_state
.lock
);
3655 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3656 for (i
= 0; i
< 3; i
++)
3657 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3658 mutex_unlock(&pit
->pit_state
.lock
);
3662 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3664 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3665 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3666 sizeof(ps
->channels
));
3667 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3668 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3669 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3673 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3677 u32 prev_legacy
, cur_legacy
;
3678 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3680 mutex_lock(&pit
->pit_state
.lock
);
3681 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3682 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3683 if (!prev_legacy
&& cur_legacy
)
3685 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3686 sizeof(pit
->pit_state
.channels
));
3687 pit
->pit_state
.flags
= ps
->flags
;
3688 for (i
= 0; i
< 3; i
++)
3689 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3691 mutex_unlock(&pit
->pit_state
.lock
);
3695 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3696 struct kvm_reinject_control
*control
)
3698 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3703 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3704 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3705 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3707 mutex_lock(&pit
->pit_state
.lock
);
3708 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3709 mutex_unlock(&pit
->pit_state
.lock
);
3715 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3716 * @kvm: kvm instance
3717 * @log: slot id and address to which we copy the log
3719 * Steps 1-4 below provide general overview of dirty page logging. See
3720 * kvm_get_dirty_log_protect() function description for additional details.
3722 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3723 * always flush the TLB (step 4) even if previous step failed and the dirty
3724 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3725 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3726 * writes will be marked dirty for next log read.
3728 * 1. Take a snapshot of the bit and clear it if needed.
3729 * 2. Write protect the corresponding page.
3730 * 3. Copy the snapshot to the userspace.
3731 * 4. Flush TLB's if needed.
3733 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3735 bool is_dirty
= false;
3738 mutex_lock(&kvm
->slots_lock
);
3741 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3743 if (kvm_x86_ops
->flush_log_dirty
)
3744 kvm_x86_ops
->flush_log_dirty(kvm
);
3746 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3749 * All the TLBs can be flushed out of mmu lock, see the comments in
3750 * kvm_mmu_slot_remove_write_access().
3752 lockdep_assert_held(&kvm
->slots_lock
);
3754 kvm_flush_remote_tlbs(kvm
);
3756 mutex_unlock(&kvm
->slots_lock
);
3760 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3763 if (!irqchip_in_kernel(kvm
))
3766 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3767 irq_event
->irq
, irq_event
->level
,
3772 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3773 struct kvm_enable_cap
*cap
)
3781 case KVM_CAP_DISABLE_QUIRKS
:
3782 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3785 case KVM_CAP_SPLIT_IRQCHIP
: {
3786 mutex_lock(&kvm
->lock
);
3788 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3789 goto split_irqchip_unlock
;
3791 if (irqchip_in_kernel(kvm
))
3792 goto split_irqchip_unlock
;
3793 if (kvm
->created_vcpus
)
3794 goto split_irqchip_unlock
;
3795 r
= kvm_setup_empty_irq_routing(kvm
);
3797 goto split_irqchip_unlock
;
3798 /* Pairs with irqchip_in_kernel. */
3800 kvm
->arch
.irqchip_split
= true;
3801 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3803 split_irqchip_unlock
:
3804 mutex_unlock(&kvm
->lock
);
3807 case KVM_CAP_X2APIC_API
:
3809 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3812 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3813 kvm
->arch
.x2apic_format
= true;
3824 long kvm_arch_vm_ioctl(struct file
*filp
,
3825 unsigned int ioctl
, unsigned long arg
)
3827 struct kvm
*kvm
= filp
->private_data
;
3828 void __user
*argp
= (void __user
*)arg
;
3831 * This union makes it completely explicit to gcc-3.x
3832 * that these two variables' stack usage should be
3833 * combined, not added together.
3836 struct kvm_pit_state ps
;
3837 struct kvm_pit_state2 ps2
;
3838 struct kvm_pit_config pit_config
;
3842 case KVM_SET_TSS_ADDR
:
3843 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3845 case KVM_SET_IDENTITY_MAP_ADDR
: {
3849 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3851 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3854 case KVM_SET_NR_MMU_PAGES
:
3855 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3857 case KVM_GET_NR_MMU_PAGES
:
3858 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3860 case KVM_CREATE_IRQCHIP
: {
3861 struct kvm_pic
*vpic
;
3863 mutex_lock(&kvm
->lock
);
3866 goto create_irqchip_unlock
;
3868 if (kvm
->created_vcpus
)
3869 goto create_irqchip_unlock
;
3871 vpic
= kvm_create_pic(kvm
);
3873 r
= kvm_ioapic_init(kvm
);
3875 mutex_lock(&kvm
->slots_lock
);
3876 kvm_destroy_pic(vpic
);
3877 mutex_unlock(&kvm
->slots_lock
);
3878 goto create_irqchip_unlock
;
3881 goto create_irqchip_unlock
;
3882 r
= kvm_setup_default_irq_routing(kvm
);
3884 mutex_lock(&kvm
->slots_lock
);
3885 mutex_lock(&kvm
->irq_lock
);
3886 kvm_ioapic_destroy(kvm
);
3887 kvm_destroy_pic(vpic
);
3888 mutex_unlock(&kvm
->irq_lock
);
3889 mutex_unlock(&kvm
->slots_lock
);
3890 goto create_irqchip_unlock
;
3892 /* Write kvm->irq_routing before kvm->arch.vpic. */
3894 kvm
->arch
.vpic
= vpic
;
3895 create_irqchip_unlock
:
3896 mutex_unlock(&kvm
->lock
);
3899 case KVM_CREATE_PIT
:
3900 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3902 case KVM_CREATE_PIT2
:
3904 if (copy_from_user(&u
.pit_config
, argp
,
3905 sizeof(struct kvm_pit_config
)))
3908 mutex_lock(&kvm
->lock
);
3911 goto create_pit_unlock
;
3913 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3917 mutex_unlock(&kvm
->lock
);
3919 case KVM_GET_IRQCHIP
: {
3920 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3921 struct kvm_irqchip
*chip
;
3923 chip
= memdup_user(argp
, sizeof(*chip
));
3930 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3931 goto get_irqchip_out
;
3932 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3934 goto get_irqchip_out
;
3936 if (copy_to_user(argp
, chip
, sizeof *chip
))
3937 goto get_irqchip_out
;
3943 case KVM_SET_IRQCHIP
: {
3944 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3945 struct kvm_irqchip
*chip
;
3947 chip
= memdup_user(argp
, sizeof(*chip
));
3954 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3955 goto set_irqchip_out
;
3956 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3958 goto set_irqchip_out
;
3966 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3969 if (!kvm
->arch
.vpit
)
3971 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3975 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3982 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3985 if (!kvm
->arch
.vpit
)
3987 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3990 case KVM_GET_PIT2
: {
3992 if (!kvm
->arch
.vpit
)
3994 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3998 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4003 case KVM_SET_PIT2
: {
4005 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4008 if (!kvm
->arch
.vpit
)
4010 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4013 case KVM_REINJECT_CONTROL
: {
4014 struct kvm_reinject_control control
;
4016 if (copy_from_user(&control
, argp
, sizeof(control
)))
4018 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4021 case KVM_SET_BOOT_CPU_ID
:
4023 mutex_lock(&kvm
->lock
);
4024 if (kvm
->created_vcpus
)
4027 kvm
->arch
.bsp_vcpu_id
= arg
;
4028 mutex_unlock(&kvm
->lock
);
4030 case KVM_XEN_HVM_CONFIG
: {
4032 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4033 sizeof(struct kvm_xen_hvm_config
)))
4036 if (kvm
->arch
.xen_hvm_config
.flags
)
4041 case KVM_SET_CLOCK
: {
4042 struct kvm_clock_data user_ns
;
4047 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4055 local_irq_disable();
4056 now_ns
= get_kernel_ns();
4057 delta
= user_ns
.clock
- now_ns
;
4059 kvm
->arch
.kvmclock_offset
= delta
;
4060 kvm_gen_update_masterclock(kvm
);
4063 case KVM_GET_CLOCK
: {
4064 struct kvm_clock_data user_ns
;
4067 local_irq_disable();
4068 now_ns
= get_kernel_ns();
4069 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
4072 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4075 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4080 case KVM_ENABLE_CAP
: {
4081 struct kvm_enable_cap cap
;
4084 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4086 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4090 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4096 static void kvm_init_msr_list(void)
4101 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4102 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4106 * Even MSRs that are valid in the host may not be exposed
4107 * to the guests in some cases.
4109 switch (msrs_to_save
[i
]) {
4110 case MSR_IA32_BNDCFGS
:
4111 if (!kvm_x86_ops
->mpx_supported())
4115 if (!kvm_x86_ops
->rdtscp_supported())
4123 msrs_to_save
[j
] = msrs_to_save
[i
];
4126 num_msrs_to_save
= j
;
4128 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4129 switch (emulated_msrs
[i
]) {
4130 case MSR_IA32_SMBASE
:
4131 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4139 emulated_msrs
[j
] = emulated_msrs
[i
];
4142 num_emulated_msrs
= j
;
4145 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4153 if (!(lapic_in_kernel(vcpu
) &&
4154 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4155 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4166 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4173 if (!(lapic_in_kernel(vcpu
) &&
4174 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4176 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4178 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4188 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4189 struct kvm_segment
*var
, int seg
)
4191 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4194 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4195 struct kvm_segment
*var
, int seg
)
4197 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4200 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4201 struct x86_exception
*exception
)
4205 BUG_ON(!mmu_is_nested(vcpu
));
4207 /* NPT walks are always user-walks */
4208 access
|= PFERR_USER_MASK
;
4209 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4214 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4215 struct x86_exception
*exception
)
4217 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4218 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4221 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4222 struct x86_exception
*exception
)
4224 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4225 access
|= PFERR_FETCH_MASK
;
4226 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4229 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4230 struct x86_exception
*exception
)
4232 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4233 access
|= PFERR_WRITE_MASK
;
4234 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4237 /* uses this to access any guest's mapped memory without checking CPL */
4238 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4239 struct x86_exception
*exception
)
4241 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4244 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4245 struct kvm_vcpu
*vcpu
, u32 access
,
4246 struct x86_exception
*exception
)
4249 int r
= X86EMUL_CONTINUE
;
4252 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4254 unsigned offset
= addr
& (PAGE_SIZE
-1);
4255 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4258 if (gpa
== UNMAPPED_GVA
)
4259 return X86EMUL_PROPAGATE_FAULT
;
4260 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4263 r
= X86EMUL_IO_NEEDED
;
4275 /* used for instruction fetching */
4276 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4277 gva_t addr
, void *val
, unsigned int bytes
,
4278 struct x86_exception
*exception
)
4280 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4281 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4285 /* Inline kvm_read_guest_virt_helper for speed. */
4286 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4288 if (unlikely(gpa
== UNMAPPED_GVA
))
4289 return X86EMUL_PROPAGATE_FAULT
;
4291 offset
= addr
& (PAGE_SIZE
-1);
4292 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4293 bytes
= (unsigned)PAGE_SIZE
- offset
;
4294 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4296 if (unlikely(ret
< 0))
4297 return X86EMUL_IO_NEEDED
;
4299 return X86EMUL_CONTINUE
;
4302 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4303 gva_t addr
, void *val
, unsigned int bytes
,
4304 struct x86_exception
*exception
)
4306 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4307 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4309 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4312 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4314 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4315 gva_t addr
, void *val
, unsigned int bytes
,
4316 struct x86_exception
*exception
)
4318 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4319 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4322 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4323 unsigned long addr
, void *val
, unsigned int bytes
)
4325 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4326 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4328 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4331 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4332 gva_t addr
, void *val
,
4334 struct x86_exception
*exception
)
4336 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4338 int r
= X86EMUL_CONTINUE
;
4341 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4344 unsigned offset
= addr
& (PAGE_SIZE
-1);
4345 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4348 if (gpa
== UNMAPPED_GVA
)
4349 return X86EMUL_PROPAGATE_FAULT
;
4350 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4352 r
= X86EMUL_IO_NEEDED
;
4363 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4365 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4366 gpa_t
*gpa
, struct x86_exception
*exception
,
4369 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4370 | (write
? PFERR_WRITE_MASK
: 0);
4373 * currently PKRU is only applied to ept enabled guest so
4374 * there is no pkey in EPT page table for L1 guest or EPT
4375 * shadow page table for L2 guest.
4377 if (vcpu_match_mmio_gva(vcpu
, gva
)
4378 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4379 vcpu
->arch
.access
, 0, access
)) {
4380 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4381 (gva
& (PAGE_SIZE
- 1));
4382 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4386 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4388 if (*gpa
== UNMAPPED_GVA
)
4391 /* For APIC access vmexit */
4392 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4395 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4396 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4403 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4404 const void *val
, int bytes
)
4408 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4411 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4415 struct read_write_emulator_ops
{
4416 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4418 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4419 void *val
, int bytes
);
4420 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4421 int bytes
, void *val
);
4422 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4423 void *val
, int bytes
);
4427 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4429 if (vcpu
->mmio_read_completed
) {
4430 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4431 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4432 vcpu
->mmio_read_completed
= 0;
4439 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4440 void *val
, int bytes
)
4442 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4445 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4446 void *val
, int bytes
)
4448 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4451 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4453 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4454 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4457 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4458 void *val
, int bytes
)
4460 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4461 return X86EMUL_IO_NEEDED
;
4464 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4465 void *val
, int bytes
)
4467 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4469 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4470 return X86EMUL_CONTINUE
;
4473 static const struct read_write_emulator_ops read_emultor
= {
4474 .read_write_prepare
= read_prepare
,
4475 .read_write_emulate
= read_emulate
,
4476 .read_write_mmio
= vcpu_mmio_read
,
4477 .read_write_exit_mmio
= read_exit_mmio
,
4480 static const struct read_write_emulator_ops write_emultor
= {
4481 .read_write_emulate
= write_emulate
,
4482 .read_write_mmio
= write_mmio
,
4483 .read_write_exit_mmio
= write_exit_mmio
,
4487 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4489 struct x86_exception
*exception
,
4490 struct kvm_vcpu
*vcpu
,
4491 const struct read_write_emulator_ops
*ops
)
4495 bool write
= ops
->write
;
4496 struct kvm_mmio_fragment
*frag
;
4498 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4501 return X86EMUL_PROPAGATE_FAULT
;
4503 /* For APIC access vmexit */
4507 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4508 return X86EMUL_CONTINUE
;
4512 * Is this MMIO handled locally?
4514 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4515 if (handled
== bytes
)
4516 return X86EMUL_CONTINUE
;
4522 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4523 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4527 return X86EMUL_CONTINUE
;
4530 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4532 void *val
, unsigned int bytes
,
4533 struct x86_exception
*exception
,
4534 const struct read_write_emulator_ops
*ops
)
4536 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4540 if (ops
->read_write_prepare
&&
4541 ops
->read_write_prepare(vcpu
, val
, bytes
))
4542 return X86EMUL_CONTINUE
;
4544 vcpu
->mmio_nr_fragments
= 0;
4546 /* Crossing a page boundary? */
4547 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4550 now
= -addr
& ~PAGE_MASK
;
4551 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4554 if (rc
!= X86EMUL_CONTINUE
)
4557 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4563 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4565 if (rc
!= X86EMUL_CONTINUE
)
4568 if (!vcpu
->mmio_nr_fragments
)
4571 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4573 vcpu
->mmio_needed
= 1;
4574 vcpu
->mmio_cur_fragment
= 0;
4576 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4577 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4578 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4579 vcpu
->run
->mmio
.phys_addr
= gpa
;
4581 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4584 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4588 struct x86_exception
*exception
)
4590 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4591 exception
, &read_emultor
);
4594 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4598 struct x86_exception
*exception
)
4600 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4601 exception
, &write_emultor
);
4604 #define CMPXCHG_TYPE(t, ptr, old, new) \
4605 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4607 #ifdef CONFIG_X86_64
4608 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4610 # define CMPXCHG64(ptr, old, new) \
4611 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4614 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4619 struct x86_exception
*exception
)
4621 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4627 /* guests cmpxchg8b have to be emulated atomically */
4628 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4631 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4633 if (gpa
== UNMAPPED_GVA
||
4634 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4637 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4640 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4641 if (is_error_page(page
))
4644 kaddr
= kmap_atomic(page
);
4645 kaddr
+= offset_in_page(gpa
);
4648 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4651 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4654 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4657 exchanged
= CMPXCHG64(kaddr
, old
, new);
4662 kunmap_atomic(kaddr
);
4663 kvm_release_page_dirty(page
);
4666 return X86EMUL_CMPXCHG_FAILED
;
4668 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4669 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4671 return X86EMUL_CONTINUE
;
4674 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4676 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4679 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4681 /* TODO: String I/O for in kernel device */
4684 if (vcpu
->arch
.pio
.in
)
4685 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4686 vcpu
->arch
.pio
.size
, pd
);
4688 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4689 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4694 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4695 unsigned short port
, void *val
,
4696 unsigned int count
, bool in
)
4698 vcpu
->arch
.pio
.port
= port
;
4699 vcpu
->arch
.pio
.in
= in
;
4700 vcpu
->arch
.pio
.count
= count
;
4701 vcpu
->arch
.pio
.size
= size
;
4703 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4704 vcpu
->arch
.pio
.count
= 0;
4708 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4709 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4710 vcpu
->run
->io
.size
= size
;
4711 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4712 vcpu
->run
->io
.count
= count
;
4713 vcpu
->run
->io
.port
= port
;
4718 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4719 int size
, unsigned short port
, void *val
,
4722 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4725 if (vcpu
->arch
.pio
.count
)
4728 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4731 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4732 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4733 vcpu
->arch
.pio
.count
= 0;
4740 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4741 int size
, unsigned short port
,
4742 const void *val
, unsigned int count
)
4744 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4746 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4747 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4748 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4751 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4753 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4756 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4758 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4761 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4763 if (!need_emulate_wbinvd(vcpu
))
4764 return X86EMUL_CONTINUE
;
4766 if (kvm_x86_ops
->has_wbinvd_exit()) {
4767 int cpu
= get_cpu();
4769 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4770 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4771 wbinvd_ipi
, NULL
, 1);
4773 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4776 return X86EMUL_CONTINUE
;
4779 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4781 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4782 return kvm_emulate_wbinvd_noskip(vcpu
);
4784 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4788 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4790 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4793 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4794 unsigned long *dest
)
4796 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4799 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4800 unsigned long value
)
4803 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4806 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4808 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4811 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4813 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4814 unsigned long value
;
4818 value
= kvm_read_cr0(vcpu
);
4821 value
= vcpu
->arch
.cr2
;
4824 value
= kvm_read_cr3(vcpu
);
4827 value
= kvm_read_cr4(vcpu
);
4830 value
= kvm_get_cr8(vcpu
);
4833 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4840 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4842 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4847 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4850 vcpu
->arch
.cr2
= val
;
4853 res
= kvm_set_cr3(vcpu
, val
);
4856 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4859 res
= kvm_set_cr8(vcpu
, val
);
4862 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4869 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4871 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4874 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4876 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4879 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4881 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4884 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4886 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4889 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4891 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4894 static unsigned long emulator_get_cached_segment_base(
4895 struct x86_emulate_ctxt
*ctxt
, int seg
)
4897 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4900 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4901 struct desc_struct
*desc
, u32
*base3
,
4904 struct kvm_segment var
;
4906 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4907 *selector
= var
.selector
;
4910 memset(desc
, 0, sizeof(*desc
));
4916 set_desc_limit(desc
, var
.limit
);
4917 set_desc_base(desc
, (unsigned long)var
.base
);
4918 #ifdef CONFIG_X86_64
4920 *base3
= var
.base
>> 32;
4922 desc
->type
= var
.type
;
4924 desc
->dpl
= var
.dpl
;
4925 desc
->p
= var
.present
;
4926 desc
->avl
= var
.avl
;
4934 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4935 struct desc_struct
*desc
, u32 base3
,
4938 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4939 struct kvm_segment var
;
4941 var
.selector
= selector
;
4942 var
.base
= get_desc_base(desc
);
4943 #ifdef CONFIG_X86_64
4944 var
.base
|= ((u64
)base3
) << 32;
4946 var
.limit
= get_desc_limit(desc
);
4948 var
.limit
= (var
.limit
<< 12) | 0xfff;
4949 var
.type
= desc
->type
;
4950 var
.dpl
= desc
->dpl
;
4955 var
.avl
= desc
->avl
;
4956 var
.present
= desc
->p
;
4957 var
.unusable
= !var
.present
;
4960 kvm_set_segment(vcpu
, &var
, seg
);
4964 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4965 u32 msr_index
, u64
*pdata
)
4967 struct msr_data msr
;
4970 msr
.index
= msr_index
;
4971 msr
.host_initiated
= false;
4972 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
4980 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4981 u32 msr_index
, u64 data
)
4983 struct msr_data msr
;
4986 msr
.index
= msr_index
;
4987 msr
.host_initiated
= false;
4988 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4991 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
4993 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4995 return vcpu
->arch
.smbase
;
4998 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5000 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5002 vcpu
->arch
.smbase
= smbase
;
5005 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5008 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5011 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5012 u32 pmc
, u64
*pdata
)
5014 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5017 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5019 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5022 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5025 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5027 * CR0.TS may reference the host fpu state, not the guest fpu state,
5028 * so it may be clear at this point.
5033 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5038 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5039 struct x86_instruction_info
*info
,
5040 enum x86_intercept_stage stage
)
5042 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5045 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5046 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5048 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5051 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5053 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5056 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5058 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5061 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5063 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5066 static const struct x86_emulate_ops emulate_ops
= {
5067 .read_gpr
= emulator_read_gpr
,
5068 .write_gpr
= emulator_write_gpr
,
5069 .read_std
= kvm_read_guest_virt_system
,
5070 .write_std
= kvm_write_guest_virt_system
,
5071 .read_phys
= kvm_read_guest_phys_system
,
5072 .fetch
= kvm_fetch_guest_virt
,
5073 .read_emulated
= emulator_read_emulated
,
5074 .write_emulated
= emulator_write_emulated
,
5075 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5076 .invlpg
= emulator_invlpg
,
5077 .pio_in_emulated
= emulator_pio_in_emulated
,
5078 .pio_out_emulated
= emulator_pio_out_emulated
,
5079 .get_segment
= emulator_get_segment
,
5080 .set_segment
= emulator_set_segment
,
5081 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5082 .get_gdt
= emulator_get_gdt
,
5083 .get_idt
= emulator_get_idt
,
5084 .set_gdt
= emulator_set_gdt
,
5085 .set_idt
= emulator_set_idt
,
5086 .get_cr
= emulator_get_cr
,
5087 .set_cr
= emulator_set_cr
,
5088 .cpl
= emulator_get_cpl
,
5089 .get_dr
= emulator_get_dr
,
5090 .set_dr
= emulator_set_dr
,
5091 .get_smbase
= emulator_get_smbase
,
5092 .set_smbase
= emulator_set_smbase
,
5093 .set_msr
= emulator_set_msr
,
5094 .get_msr
= emulator_get_msr
,
5095 .check_pmc
= emulator_check_pmc
,
5096 .read_pmc
= emulator_read_pmc
,
5097 .halt
= emulator_halt
,
5098 .wbinvd
= emulator_wbinvd
,
5099 .fix_hypercall
= emulator_fix_hypercall
,
5100 .get_fpu
= emulator_get_fpu
,
5101 .put_fpu
= emulator_put_fpu
,
5102 .intercept
= emulator_intercept
,
5103 .get_cpuid
= emulator_get_cpuid
,
5104 .set_nmi_mask
= emulator_set_nmi_mask
,
5107 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5109 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5111 * an sti; sti; sequence only disable interrupts for the first
5112 * instruction. So, if the last instruction, be it emulated or
5113 * not, left the system with the INT_STI flag enabled, it
5114 * means that the last instruction is an sti. We should not
5115 * leave the flag on in this case. The same goes for mov ss
5117 if (int_shadow
& mask
)
5119 if (unlikely(int_shadow
|| mask
)) {
5120 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5122 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5126 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5128 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5129 if (ctxt
->exception
.vector
== PF_VECTOR
)
5130 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5132 if (ctxt
->exception
.error_code_valid
)
5133 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5134 ctxt
->exception
.error_code
);
5136 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5140 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5142 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5145 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5147 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5148 ctxt
->eip
= kvm_rip_read(vcpu
);
5149 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5150 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5151 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5152 cs_db
? X86EMUL_MODE_PROT32
:
5153 X86EMUL_MODE_PROT16
;
5154 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5155 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5156 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5157 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5159 init_decode_cache(ctxt
);
5160 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5163 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5165 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5168 init_emulate_ctxt(vcpu
);
5172 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5173 ret
= emulate_int_real(ctxt
, irq
);
5175 if (ret
!= X86EMUL_CONTINUE
)
5176 return EMULATE_FAIL
;
5178 ctxt
->eip
= ctxt
->_eip
;
5179 kvm_rip_write(vcpu
, ctxt
->eip
);
5180 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5182 if (irq
== NMI_VECTOR
)
5183 vcpu
->arch
.nmi_pending
= 0;
5185 vcpu
->arch
.interrupt
.pending
= false;
5187 return EMULATE_DONE
;
5189 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5191 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5193 int r
= EMULATE_DONE
;
5195 ++vcpu
->stat
.insn_emulation_fail
;
5196 trace_kvm_emulate_insn_failed(vcpu
);
5197 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5198 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5199 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5200 vcpu
->run
->internal
.ndata
= 0;
5203 kvm_queue_exception(vcpu
, UD_VECTOR
);
5208 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5209 bool write_fault_to_shadow_pgtable
,
5215 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5218 if (!vcpu
->arch
.mmu
.direct_map
) {
5220 * Write permission should be allowed since only
5221 * write access need to be emulated.
5223 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5226 * If the mapping is invalid in guest, let cpu retry
5227 * it to generate fault.
5229 if (gpa
== UNMAPPED_GVA
)
5234 * Do not retry the unhandleable instruction if it faults on the
5235 * readonly host memory, otherwise it will goto a infinite loop:
5236 * retry instruction -> write #PF -> emulation fail -> retry
5237 * instruction -> ...
5239 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5242 * If the instruction failed on the error pfn, it can not be fixed,
5243 * report the error to userspace.
5245 if (is_error_noslot_pfn(pfn
))
5248 kvm_release_pfn_clean(pfn
);
5250 /* The instructions are well-emulated on direct mmu. */
5251 if (vcpu
->arch
.mmu
.direct_map
) {
5252 unsigned int indirect_shadow_pages
;
5254 spin_lock(&vcpu
->kvm
->mmu_lock
);
5255 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5256 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5258 if (indirect_shadow_pages
)
5259 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5265 * if emulation was due to access to shadowed page table
5266 * and it failed try to unshadow page and re-enter the
5267 * guest to let CPU execute the instruction.
5269 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5272 * If the access faults on its page table, it can not
5273 * be fixed by unprotecting shadow page and it should
5274 * be reported to userspace.
5276 return !write_fault_to_shadow_pgtable
;
5279 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5280 unsigned long cr2
, int emulation_type
)
5282 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5283 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5285 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5286 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5289 * If the emulation is caused by #PF and it is non-page_table
5290 * writing instruction, it means the VM-EXIT is caused by shadow
5291 * page protected, we can zap the shadow page and retry this
5292 * instruction directly.
5294 * Note: if the guest uses a non-page-table modifying instruction
5295 * on the PDE that points to the instruction, then we will unmap
5296 * the instruction and go to an infinite loop. So, we cache the
5297 * last retried eip and the last fault address, if we meet the eip
5298 * and the address again, we can break out of the potential infinite
5301 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5303 if (!(emulation_type
& EMULTYPE_RETRY
))
5306 if (x86_page_table_writing_insn(ctxt
))
5309 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5312 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5313 vcpu
->arch
.last_retry_addr
= cr2
;
5315 if (!vcpu
->arch
.mmu
.direct_map
)
5316 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5318 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5323 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5324 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5326 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5328 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5329 /* This is a good place to trace that we are exiting SMM. */
5330 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5332 /* Process a latched INIT or SMI, if any. */
5333 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5336 kvm_mmu_reset_context(vcpu
);
5339 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5341 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5343 vcpu
->arch
.hflags
= emul_flags
;
5345 if (changed
& HF_SMM_MASK
)
5346 kvm_smm_changed(vcpu
);
5349 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5358 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5359 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5364 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5366 struct kvm_run
*kvm_run
= vcpu
->run
;
5369 * rflags is the old, "raw" value of the flags. The new value has
5370 * not been saved yet.
5372 * This is correct even for TF set by the guest, because "the
5373 * processor will not generate this exception after the instruction
5374 * that sets the TF flag".
5376 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5377 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5378 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5380 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5381 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5382 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5383 *r
= EMULATE_USER_EXIT
;
5385 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5387 * "Certain debug exceptions may clear bit 0-3. The
5388 * remaining contents of the DR6 register are never
5389 * cleared by the processor".
5391 vcpu
->arch
.dr6
&= ~15;
5392 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5393 kvm_queue_exception(vcpu
, DB_VECTOR
);
5398 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5400 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5401 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5402 struct kvm_run
*kvm_run
= vcpu
->run
;
5403 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5404 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5405 vcpu
->arch
.guest_debug_dr7
,
5409 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5410 kvm_run
->debug
.arch
.pc
= eip
;
5411 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5412 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5413 *r
= EMULATE_USER_EXIT
;
5418 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5419 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5420 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5421 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5426 vcpu
->arch
.dr6
&= ~15;
5427 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5428 kvm_queue_exception(vcpu
, DB_VECTOR
);
5437 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5444 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5445 bool writeback
= true;
5446 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5449 * Clear write_fault_to_shadow_pgtable here to ensure it is
5452 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5453 kvm_clear_exception_queue(vcpu
);
5455 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5456 init_emulate_ctxt(vcpu
);
5459 * We will reenter on the same instruction since
5460 * we do not set complete_userspace_io. This does not
5461 * handle watchpoints yet, those would be handled in
5464 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5467 ctxt
->interruptibility
= 0;
5468 ctxt
->have_exception
= false;
5469 ctxt
->exception
.vector
= -1;
5470 ctxt
->perm_ok
= false;
5472 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5474 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5476 trace_kvm_emulate_insn_start(vcpu
);
5477 ++vcpu
->stat
.insn_emulation
;
5478 if (r
!= EMULATION_OK
) {
5479 if (emulation_type
& EMULTYPE_TRAP_UD
)
5480 return EMULATE_FAIL
;
5481 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5483 return EMULATE_DONE
;
5484 if (emulation_type
& EMULTYPE_SKIP
)
5485 return EMULATE_FAIL
;
5486 return handle_emulation_failure(vcpu
);
5490 if (emulation_type
& EMULTYPE_SKIP
) {
5491 kvm_rip_write(vcpu
, ctxt
->_eip
);
5492 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5493 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5494 return EMULATE_DONE
;
5497 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5498 return EMULATE_DONE
;
5500 /* this is needed for vmware backdoor interface to work since it
5501 changes registers values during IO operation */
5502 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5503 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5504 emulator_invalidate_register_cache(ctxt
);
5508 r
= x86_emulate_insn(ctxt
);
5510 if (r
== EMULATION_INTERCEPTED
)
5511 return EMULATE_DONE
;
5513 if (r
== EMULATION_FAILED
) {
5514 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5516 return EMULATE_DONE
;
5518 return handle_emulation_failure(vcpu
);
5521 if (ctxt
->have_exception
) {
5523 if (inject_emulated_exception(vcpu
))
5525 } else if (vcpu
->arch
.pio
.count
) {
5526 if (!vcpu
->arch
.pio
.in
) {
5527 /* FIXME: return into emulator if single-stepping. */
5528 vcpu
->arch
.pio
.count
= 0;
5531 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5533 r
= EMULATE_USER_EXIT
;
5534 } else if (vcpu
->mmio_needed
) {
5535 if (!vcpu
->mmio_is_write
)
5537 r
= EMULATE_USER_EXIT
;
5538 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5539 } else if (r
== EMULATION_RESTART
)
5545 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5546 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5547 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5548 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5549 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5550 kvm_rip_write(vcpu
, ctxt
->eip
);
5551 if (r
== EMULATE_DONE
)
5552 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5553 if (!ctxt
->have_exception
||
5554 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5555 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5558 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5559 * do nothing, and it will be requested again as soon as
5560 * the shadow expires. But we still need to check here,
5561 * because POPF has no interrupt shadow.
5563 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5564 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5566 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5570 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5572 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5574 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5575 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5576 size
, port
, &val
, 1);
5577 /* do not return to emulator after return from userspace */
5578 vcpu
->arch
.pio
.count
= 0;
5581 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5583 static void tsc_bad(void *info
)
5585 __this_cpu_write(cpu_tsc_khz
, 0);
5588 static void tsc_khz_changed(void *data
)
5590 struct cpufreq_freqs
*freq
= data
;
5591 unsigned long khz
= 0;
5595 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5596 khz
= cpufreq_quick_get(raw_smp_processor_id());
5599 __this_cpu_write(cpu_tsc_khz
, khz
);
5602 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5605 struct cpufreq_freqs
*freq
= data
;
5607 struct kvm_vcpu
*vcpu
;
5608 int i
, send_ipi
= 0;
5611 * We allow guests to temporarily run on slowing clocks,
5612 * provided we notify them after, or to run on accelerating
5613 * clocks, provided we notify them before. Thus time never
5616 * However, we have a problem. We can't atomically update
5617 * the frequency of a given CPU from this function; it is
5618 * merely a notifier, which can be called from any CPU.
5619 * Changing the TSC frequency at arbitrary points in time
5620 * requires a recomputation of local variables related to
5621 * the TSC for each VCPU. We must flag these local variables
5622 * to be updated and be sure the update takes place with the
5623 * new frequency before any guests proceed.
5625 * Unfortunately, the combination of hotplug CPU and frequency
5626 * change creates an intractable locking scenario; the order
5627 * of when these callouts happen is undefined with respect to
5628 * CPU hotplug, and they can race with each other. As such,
5629 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5630 * undefined; you can actually have a CPU frequency change take
5631 * place in between the computation of X and the setting of the
5632 * variable. To protect against this problem, all updates of
5633 * the per_cpu tsc_khz variable are done in an interrupt
5634 * protected IPI, and all callers wishing to update the value
5635 * must wait for a synchronous IPI to complete (which is trivial
5636 * if the caller is on the CPU already). This establishes the
5637 * necessary total order on variable updates.
5639 * Note that because a guest time update may take place
5640 * anytime after the setting of the VCPU's request bit, the
5641 * correct TSC value must be set before the request. However,
5642 * to ensure the update actually makes it to any guest which
5643 * starts running in hardware virtualization between the set
5644 * and the acquisition of the spinlock, we must also ping the
5645 * CPU after setting the request bit.
5649 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5651 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5654 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5656 spin_lock(&kvm_lock
);
5657 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5658 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5659 if (vcpu
->cpu
!= freq
->cpu
)
5661 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5662 if (vcpu
->cpu
!= smp_processor_id())
5666 spin_unlock(&kvm_lock
);
5668 if (freq
->old
< freq
->new && send_ipi
) {
5670 * We upscale the frequency. Must make the guest
5671 * doesn't see old kvmclock values while running with
5672 * the new frequency, otherwise we risk the guest sees
5673 * time go backwards.
5675 * In case we update the frequency for another cpu
5676 * (which might be in guest context) send an interrupt
5677 * to kick the cpu out of guest context. Next time
5678 * guest context is entered kvmclock will be updated,
5679 * so the guest will not see stale values.
5681 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5686 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5687 .notifier_call
= kvmclock_cpufreq_notifier
5690 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5691 unsigned long action
, void *hcpu
)
5693 unsigned int cpu
= (unsigned long)hcpu
;
5697 case CPU_DOWN_FAILED
:
5698 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5700 case CPU_DOWN_PREPARE
:
5701 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5707 static struct notifier_block kvmclock_cpu_notifier_block
= {
5708 .notifier_call
= kvmclock_cpu_notifier
,
5709 .priority
= -INT_MAX
5712 static void kvm_timer_init(void)
5716 max_tsc_khz
= tsc_khz
;
5718 cpu_notifier_register_begin();
5719 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5720 #ifdef CONFIG_CPU_FREQ
5721 struct cpufreq_policy policy
;
5722 memset(&policy
, 0, sizeof(policy
));
5724 cpufreq_get_policy(&policy
, cpu
);
5725 if (policy
.cpuinfo
.max_freq
)
5726 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5729 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5730 CPUFREQ_TRANSITION_NOTIFIER
);
5732 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5733 for_each_online_cpu(cpu
)
5734 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5736 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5737 cpu_notifier_register_done();
5741 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5743 int kvm_is_in_guest(void)
5745 return __this_cpu_read(current_vcpu
) != NULL
;
5748 static int kvm_is_user_mode(void)
5752 if (__this_cpu_read(current_vcpu
))
5753 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5755 return user_mode
!= 0;
5758 static unsigned long kvm_get_guest_ip(void)
5760 unsigned long ip
= 0;
5762 if (__this_cpu_read(current_vcpu
))
5763 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5768 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5769 .is_in_guest
= kvm_is_in_guest
,
5770 .is_user_mode
= kvm_is_user_mode
,
5771 .get_guest_ip
= kvm_get_guest_ip
,
5774 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5776 __this_cpu_write(current_vcpu
, vcpu
);
5778 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5780 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5782 __this_cpu_write(current_vcpu
, NULL
);
5784 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5786 static void kvm_set_mmio_spte_mask(void)
5789 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5792 * Set the reserved bits and the present bit of an paging-structure
5793 * entry to generate page fault with PFER.RSV = 1.
5795 /* Mask the reserved physical address bits. */
5796 mask
= rsvd_bits(maxphyaddr
, 51);
5798 /* Bit 62 is always reserved for 32bit host. */
5799 mask
|= 0x3ull
<< 62;
5801 /* Set the present bit. */
5804 #ifdef CONFIG_X86_64
5806 * If reserved bit is not supported, clear the present bit to disable
5809 if (maxphyaddr
== 52)
5813 kvm_mmu_set_mmio_spte_mask(mask
);
5816 #ifdef CONFIG_X86_64
5817 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5821 struct kvm_vcpu
*vcpu
;
5824 spin_lock(&kvm_lock
);
5825 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5826 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5827 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5828 atomic_set(&kvm_guest_has_master_clock
, 0);
5829 spin_unlock(&kvm_lock
);
5832 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5835 * Notification about pvclock gtod data update.
5837 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5840 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5841 struct timekeeper
*tk
= priv
;
5843 update_pvclock_gtod(tk
);
5845 /* disable master clock if host does not trust, or does not
5846 * use, TSC clocksource
5848 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5849 atomic_read(&kvm_guest_has_master_clock
) != 0)
5850 queue_work(system_long_wq
, &pvclock_gtod_work
);
5855 static struct notifier_block pvclock_gtod_notifier
= {
5856 .notifier_call
= pvclock_gtod_notify
,
5860 int kvm_arch_init(void *opaque
)
5863 struct kvm_x86_ops
*ops
= opaque
;
5866 printk(KERN_ERR
"kvm: already loaded the other module\n");
5871 if (!ops
->cpu_has_kvm_support()) {
5872 printk(KERN_ERR
"kvm: no hardware support\n");
5876 if (ops
->disabled_by_bios()) {
5877 printk(KERN_ERR
"kvm: disabled by bios\n");
5883 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5885 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5889 r
= kvm_mmu_module_init();
5891 goto out_free_percpu
;
5893 kvm_set_mmio_spte_mask();
5897 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5898 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
5902 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5904 if (boot_cpu_has(X86_FEATURE_XSAVE
))
5905 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5908 #ifdef CONFIG_X86_64
5909 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5915 free_percpu(shared_msrs
);
5920 void kvm_arch_exit(void)
5922 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5924 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5925 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5926 CPUFREQ_TRANSITION_NOTIFIER
);
5927 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5928 #ifdef CONFIG_X86_64
5929 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5932 kvm_mmu_module_exit();
5933 free_percpu(shared_msrs
);
5936 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5938 ++vcpu
->stat
.halt_exits
;
5939 if (lapic_in_kernel(vcpu
)) {
5940 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5943 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5947 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5949 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5951 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5952 return kvm_vcpu_halt(vcpu
);
5954 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5957 * kvm_pv_kick_cpu_op: Kick a vcpu.
5959 * @apicid - apicid of vcpu to be kicked.
5961 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5963 struct kvm_lapic_irq lapic_irq
;
5965 lapic_irq
.shorthand
= 0;
5966 lapic_irq
.dest_mode
= 0;
5967 lapic_irq
.dest_id
= apicid
;
5968 lapic_irq
.msi_redir_hint
= false;
5970 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5971 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
5974 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
5976 vcpu
->arch
.apicv_active
= false;
5977 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
5980 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5982 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5983 int op_64_bit
, r
= 1;
5985 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5987 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5988 return kvm_hv_hypercall(vcpu
);
5990 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5991 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5992 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5993 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5994 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5996 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5998 op_64_bit
= is_64_bit_mode(vcpu
);
6007 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6013 case KVM_HC_VAPIC_POLL_IRQ
:
6016 case KVM_HC_KICK_CPU
:
6017 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6027 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6028 ++vcpu
->stat
.hypercalls
;
6031 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6033 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6035 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6036 char instruction
[3];
6037 unsigned long rip
= kvm_rip_read(vcpu
);
6039 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6041 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
6044 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6046 return vcpu
->run
->request_interrupt_window
&&
6047 likely(!pic_in_kernel(vcpu
->kvm
));
6050 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6052 struct kvm_run
*kvm_run
= vcpu
->run
;
6054 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6055 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6056 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6057 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6058 kvm_run
->ready_for_interrupt_injection
=
6059 pic_in_kernel(vcpu
->kvm
) ||
6060 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6063 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6067 if (!kvm_x86_ops
->update_cr8_intercept
)
6070 if (!lapic_in_kernel(vcpu
))
6073 if (vcpu
->arch
.apicv_active
)
6076 if (!vcpu
->arch
.apic
->vapic_addr
)
6077 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6084 tpr
= kvm_lapic_get_cr8(vcpu
);
6086 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6089 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6093 /* try to reinject previous events if any */
6094 if (vcpu
->arch
.exception
.pending
) {
6095 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6096 vcpu
->arch
.exception
.has_error_code
,
6097 vcpu
->arch
.exception
.error_code
);
6099 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6100 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6103 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6104 (vcpu
->arch
.dr7
& DR7_GD
)) {
6105 vcpu
->arch
.dr7
&= ~DR7_GD
;
6106 kvm_update_dr7(vcpu
);
6109 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6110 vcpu
->arch
.exception
.has_error_code
,
6111 vcpu
->arch
.exception
.error_code
,
6112 vcpu
->arch
.exception
.reinject
);
6116 if (vcpu
->arch
.nmi_injected
) {
6117 kvm_x86_ops
->set_nmi(vcpu
);
6121 if (vcpu
->arch
.interrupt
.pending
) {
6122 kvm_x86_ops
->set_irq(vcpu
);
6126 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6127 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6132 /* try to inject new event if pending */
6133 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6134 vcpu
->arch
.smi_pending
= false;
6136 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6137 --vcpu
->arch
.nmi_pending
;
6138 vcpu
->arch
.nmi_injected
= true;
6139 kvm_x86_ops
->set_nmi(vcpu
);
6140 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6142 * Because interrupts can be injected asynchronously, we are
6143 * calling check_nested_events again here to avoid a race condition.
6144 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6145 * proposal and current concerns. Perhaps we should be setting
6146 * KVM_REQ_EVENT only on certain events and not unconditionally?
6148 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6149 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6153 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6154 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6156 kvm_x86_ops
->set_irq(vcpu
);
6163 static void process_nmi(struct kvm_vcpu
*vcpu
)
6168 * x86 is limited to one NMI running, and one NMI pending after it.
6169 * If an NMI is already in progress, limit further NMIs to just one.
6170 * Otherwise, allow two (and we'll inject the first one immediately).
6172 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6175 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6176 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6177 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6180 #define put_smstate(type, buf, offset, val) \
6181 *(type *)((buf) + (offset) - 0x7e00) = val
6183 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6186 flags
|= seg
->g
<< 23;
6187 flags
|= seg
->db
<< 22;
6188 flags
|= seg
->l
<< 21;
6189 flags
|= seg
->avl
<< 20;
6190 flags
|= seg
->present
<< 15;
6191 flags
|= seg
->dpl
<< 13;
6192 flags
|= seg
->s
<< 12;
6193 flags
|= seg
->type
<< 8;
6197 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6199 struct kvm_segment seg
;
6202 kvm_get_segment(vcpu
, &seg
, n
);
6203 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6206 offset
= 0x7f84 + n
* 12;
6208 offset
= 0x7f2c + (n
- 3) * 12;
6210 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6211 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6212 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6215 #ifdef CONFIG_X86_64
6216 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6218 struct kvm_segment seg
;
6222 kvm_get_segment(vcpu
, &seg
, n
);
6223 offset
= 0x7e00 + n
* 16;
6225 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6226 put_smstate(u16
, buf
, offset
, seg
.selector
);
6227 put_smstate(u16
, buf
, offset
+ 2, flags
);
6228 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6229 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6233 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6236 struct kvm_segment seg
;
6240 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6241 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6242 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6243 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6245 for (i
= 0; i
< 8; i
++)
6246 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6248 kvm_get_dr(vcpu
, 6, &val
);
6249 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6250 kvm_get_dr(vcpu
, 7, &val
);
6251 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6253 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6254 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6255 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6256 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6257 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6259 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6260 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6261 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6262 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6263 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6265 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6266 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6267 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6269 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6270 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6271 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6273 for (i
= 0; i
< 6; i
++)
6274 enter_smm_save_seg_32(vcpu
, buf
, i
);
6276 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6279 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6280 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6283 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6285 #ifdef CONFIG_X86_64
6287 struct kvm_segment seg
;
6291 for (i
= 0; i
< 16; i
++)
6292 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6294 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6295 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6297 kvm_get_dr(vcpu
, 6, &val
);
6298 put_smstate(u64
, buf
, 0x7f68, val
);
6299 kvm_get_dr(vcpu
, 7, &val
);
6300 put_smstate(u64
, buf
, 0x7f60, val
);
6302 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6303 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6304 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6306 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6309 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6311 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6313 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6314 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6315 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6316 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6317 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6319 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6320 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6321 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6323 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6324 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6325 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6326 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6327 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6329 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6330 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6331 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6333 for (i
= 0; i
< 6; i
++)
6334 enter_smm_save_seg_64(vcpu
, buf
, i
);
6340 static void enter_smm(struct kvm_vcpu
*vcpu
)
6342 struct kvm_segment cs
, ds
;
6347 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6348 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6349 memset(buf
, 0, 512);
6350 if (guest_cpuid_has_longmode(vcpu
))
6351 enter_smm_save_state_64(vcpu
, buf
);
6353 enter_smm_save_state_32(vcpu
, buf
);
6355 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6357 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6358 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6360 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6362 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6363 kvm_rip_write(vcpu
, 0x8000);
6365 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6366 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6367 vcpu
->arch
.cr0
= cr0
;
6369 kvm_x86_ops
->set_cr4(vcpu
, 0);
6371 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6372 dt
.address
= dt
.size
= 0;
6373 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6375 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6377 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6378 cs
.base
= vcpu
->arch
.smbase
;
6383 cs
.limit
= ds
.limit
= 0xffffffff;
6384 cs
.type
= ds
.type
= 0x3;
6385 cs
.dpl
= ds
.dpl
= 0;
6390 cs
.avl
= ds
.avl
= 0;
6391 cs
.present
= ds
.present
= 1;
6392 cs
.unusable
= ds
.unusable
= 0;
6393 cs
.padding
= ds
.padding
= 0;
6395 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6396 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6397 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6398 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6399 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6400 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6402 if (guest_cpuid_has_longmode(vcpu
))
6403 kvm_x86_ops
->set_efer(vcpu
, 0);
6405 kvm_update_cpuid(vcpu
);
6406 kvm_mmu_reset_context(vcpu
);
6409 static void process_smi(struct kvm_vcpu
*vcpu
)
6411 vcpu
->arch
.smi_pending
= true;
6412 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6415 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6417 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6420 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6422 u64 eoi_exit_bitmap
[4];
6424 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6427 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6429 if (irqchip_split(vcpu
->kvm
))
6430 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6432 if (vcpu
->arch
.apicv_active
)
6433 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6434 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6436 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6437 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6438 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6441 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6443 ++vcpu
->stat
.tlb_flush
;
6444 kvm_x86_ops
->tlb_flush(vcpu
);
6447 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6449 struct page
*page
= NULL
;
6451 if (!lapic_in_kernel(vcpu
))
6454 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6457 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6458 if (is_error_page(page
))
6460 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6463 * Do not pin apic access page in memory, the MMU notifier
6464 * will call us again if it is migrated or swapped out.
6468 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6470 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6471 unsigned long address
)
6474 * The physical address of apic access page is stored in the VMCS.
6475 * Update it when it becomes invalid.
6477 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6478 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6482 * Returns 1 to let vcpu_run() continue the guest execution loop without
6483 * exiting to the userspace. Otherwise, the value will be returned to the
6486 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6490 dm_request_for_irq_injection(vcpu
) &&
6491 kvm_cpu_accept_dm_intr(vcpu
);
6493 bool req_immediate_exit
= false;
6495 if (vcpu
->requests
) {
6496 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6497 kvm_mmu_unload(vcpu
);
6498 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6499 __kvm_migrate_timers(vcpu
);
6500 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6501 kvm_gen_update_masterclock(vcpu
->kvm
);
6502 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6503 kvm_gen_kvmclock_update(vcpu
);
6504 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6505 r
= kvm_guest_time_update(vcpu
);
6509 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6510 kvm_mmu_sync_roots(vcpu
);
6511 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6512 kvm_vcpu_flush_tlb(vcpu
);
6513 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6514 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6518 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6519 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6523 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6524 vcpu
->fpu_active
= 0;
6525 kvm_x86_ops
->fpu_deactivate(vcpu
);
6527 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6528 /* Page is swapped out. Do synthetic halt */
6529 vcpu
->arch
.apf
.halted
= true;
6533 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6534 record_steal_time(vcpu
);
6535 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6537 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6539 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6540 kvm_pmu_handle_event(vcpu
);
6541 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6542 kvm_pmu_deliver_pmi(vcpu
);
6543 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6544 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6545 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6546 vcpu
->arch
.ioapic_handled_vectors
)) {
6547 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6548 vcpu
->run
->eoi
.vector
=
6549 vcpu
->arch
.pending_ioapic_eoi
;
6554 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6555 vcpu_scan_ioapic(vcpu
);
6556 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6557 kvm_vcpu_reload_apic_access_page(vcpu
);
6558 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6559 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6560 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6564 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6565 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6566 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6570 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6571 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6572 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6578 * KVM_REQ_HV_STIMER has to be processed after
6579 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6580 * depend on the guest clock being up-to-date
6582 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6583 kvm_hv_process_stimers(vcpu
);
6587 * KVM_REQ_EVENT is not set when posted interrupts are set by
6588 * VT-d hardware, so we have to update RVI unconditionally.
6590 if (kvm_lapic_enabled(vcpu
)) {
6592 * Update architecture specific hints for APIC
6593 * virtual interrupt delivery.
6595 if (vcpu
->arch
.apicv_active
)
6596 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6597 kvm_lapic_find_highest_irr(vcpu
));
6600 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6601 kvm_apic_accept_events(vcpu
);
6602 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6607 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6608 req_immediate_exit
= true;
6610 /* Enable NMI/IRQ window open exits if needed.
6612 * SMIs have two cases: 1) they can be nested, and
6613 * then there is nothing to do here because RSM will
6614 * cause a vmexit anyway; 2) or the SMI can be pending
6615 * because inject_pending_event has completed the
6616 * injection of an IRQ or NMI from the previous vmexit,
6617 * and then we request an immediate exit to inject the SMI.
6619 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6620 req_immediate_exit
= true;
6621 if (vcpu
->arch
.nmi_pending
)
6622 kvm_x86_ops
->enable_nmi_window(vcpu
);
6623 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6624 kvm_x86_ops
->enable_irq_window(vcpu
);
6627 if (kvm_lapic_enabled(vcpu
)) {
6628 update_cr8_intercept(vcpu
);
6629 kvm_lapic_sync_to_vapic(vcpu
);
6633 r
= kvm_mmu_reload(vcpu
);
6635 goto cancel_injection
;
6640 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6641 if (vcpu
->fpu_active
)
6642 kvm_load_guest_fpu(vcpu
);
6643 vcpu
->mode
= IN_GUEST_MODE
;
6645 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6648 * We should set ->mode before check ->requests,
6649 * Please see the comment in kvm_make_all_cpus_request.
6650 * This also orders the write to mode from any reads
6651 * to the page tables done while the VCPU is running.
6652 * Please see the comment in kvm_flush_remote_tlbs.
6654 smp_mb__after_srcu_read_unlock();
6656 local_irq_disable();
6658 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6659 || need_resched() || signal_pending(current
)) {
6660 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6664 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6666 goto cancel_injection
;
6669 kvm_load_guest_xcr0(vcpu
);
6671 if (req_immediate_exit
) {
6672 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6673 smp_send_reschedule(vcpu
->cpu
);
6676 trace_kvm_entry(vcpu
->vcpu_id
);
6677 wait_lapic_expire(vcpu
);
6678 guest_enter_irqoff();
6680 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6682 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6683 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6684 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6685 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6686 set_debugreg(vcpu
->arch
.dr6
, 6);
6687 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6690 kvm_x86_ops
->run(vcpu
);
6693 * Do this here before restoring debug registers on the host. And
6694 * since we do this before handling the vmexit, a DR access vmexit
6695 * can (a) read the correct value of the debug registers, (b) set
6696 * KVM_DEBUGREG_WONT_EXIT again.
6698 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6699 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6700 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6701 kvm_update_dr0123(vcpu
);
6702 kvm_update_dr6(vcpu
);
6703 kvm_update_dr7(vcpu
);
6704 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6708 * If the guest has used debug registers, at least dr7
6709 * will be disabled while returning to the host.
6710 * If we don't have active breakpoints in the host, we don't
6711 * care about the messed up debug address registers. But if
6712 * we have some of them active, restore the old state.
6714 if (hw_breakpoint_active())
6715 hw_breakpoint_restore();
6717 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6719 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6722 kvm_put_guest_xcr0(vcpu
);
6724 /* Interrupt is enabled by handle_external_intr() */
6725 kvm_x86_ops
->handle_external_intr(vcpu
);
6729 guest_exit_irqoff();
6734 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6737 * Profile KVM exit RIPs:
6739 if (unlikely(prof_on
== KVM_PROFILING
)) {
6740 unsigned long rip
= kvm_rip_read(vcpu
);
6741 profile_hit(KVM_PROFILING
, (void *)rip
);
6744 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6745 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6747 if (vcpu
->arch
.apic_attention
)
6748 kvm_lapic_sync_from_vapic(vcpu
);
6750 r
= kvm_x86_ops
->handle_exit(vcpu
);
6754 kvm_x86_ops
->cancel_injection(vcpu
);
6755 if (unlikely(vcpu
->arch
.apic_attention
))
6756 kvm_lapic_sync_from_vapic(vcpu
);
6761 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6763 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6764 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6765 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6766 kvm_vcpu_block(vcpu
);
6767 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6769 if (kvm_x86_ops
->post_block
)
6770 kvm_x86_ops
->post_block(vcpu
);
6772 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6776 kvm_apic_accept_events(vcpu
);
6777 switch(vcpu
->arch
.mp_state
) {
6778 case KVM_MP_STATE_HALTED
:
6779 vcpu
->arch
.pv
.pv_unhalted
= false;
6780 vcpu
->arch
.mp_state
=
6781 KVM_MP_STATE_RUNNABLE
;
6782 case KVM_MP_STATE_RUNNABLE
:
6783 vcpu
->arch
.apf
.halted
= false;
6785 case KVM_MP_STATE_INIT_RECEIVED
:
6794 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
6796 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6797 !vcpu
->arch
.apf
.halted
);
6800 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6803 struct kvm
*kvm
= vcpu
->kvm
;
6805 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6808 if (kvm_vcpu_running(vcpu
)) {
6809 r
= vcpu_enter_guest(vcpu
);
6811 r
= vcpu_block(kvm
, vcpu
);
6817 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6818 if (kvm_cpu_has_pending_timer(vcpu
))
6819 kvm_inject_pending_timer_irqs(vcpu
);
6821 if (dm_request_for_irq_injection(vcpu
) &&
6822 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
6824 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
6825 ++vcpu
->stat
.request_irq_exits
;
6829 kvm_check_async_pf_completion(vcpu
);
6831 if (signal_pending(current
)) {
6833 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6834 ++vcpu
->stat
.signal_exits
;
6837 if (need_resched()) {
6838 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6840 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6844 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6849 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6852 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6853 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6854 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6855 if (r
!= EMULATE_DONE
)
6860 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6862 BUG_ON(!vcpu
->arch
.pio
.count
);
6864 return complete_emulated_io(vcpu
);
6868 * Implements the following, as a state machine:
6872 * for each mmio piece in the fragment
6880 * for each mmio piece in the fragment
6885 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6887 struct kvm_run
*run
= vcpu
->run
;
6888 struct kvm_mmio_fragment
*frag
;
6891 BUG_ON(!vcpu
->mmio_needed
);
6893 /* Complete previous fragment */
6894 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6895 len
= min(8u, frag
->len
);
6896 if (!vcpu
->mmio_is_write
)
6897 memcpy(frag
->data
, run
->mmio
.data
, len
);
6899 if (frag
->len
<= 8) {
6900 /* Switch to the next fragment. */
6902 vcpu
->mmio_cur_fragment
++;
6904 /* Go forward to the next mmio piece. */
6910 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6911 vcpu
->mmio_needed
= 0;
6913 /* FIXME: return into emulator if single-stepping. */
6914 if (vcpu
->mmio_is_write
)
6916 vcpu
->mmio_read_completed
= 1;
6917 return complete_emulated_io(vcpu
);
6920 run
->exit_reason
= KVM_EXIT_MMIO
;
6921 run
->mmio
.phys_addr
= frag
->gpa
;
6922 if (vcpu
->mmio_is_write
)
6923 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6924 run
->mmio
.len
= min(8u, frag
->len
);
6925 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6926 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6931 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6933 struct fpu
*fpu
= ¤t
->thread
.fpu
;
6937 fpu__activate_curr(fpu
);
6939 if (vcpu
->sigset_active
)
6940 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6942 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6943 kvm_vcpu_block(vcpu
);
6944 kvm_apic_accept_events(vcpu
);
6945 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6950 /* re-sync apic's tpr */
6951 if (!lapic_in_kernel(vcpu
)) {
6952 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6958 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6959 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6960 vcpu
->arch
.complete_userspace_io
= NULL
;
6965 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6970 post_kvm_run_save(vcpu
);
6971 if (vcpu
->sigset_active
)
6972 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6977 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6979 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6981 * We are here if userspace calls get_regs() in the middle of
6982 * instruction emulation. Registers state needs to be copied
6983 * back from emulation context to vcpu. Userspace shouldn't do
6984 * that usually, but some bad designed PV devices (vmware
6985 * backdoor interface) need this to work
6987 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6988 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6990 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6991 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6992 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6993 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6994 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6995 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6996 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6997 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6998 #ifdef CONFIG_X86_64
6999 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7000 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7001 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7002 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7003 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7004 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7005 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7006 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7009 regs
->rip
= kvm_rip_read(vcpu
);
7010 regs
->rflags
= kvm_get_rflags(vcpu
);
7015 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7017 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7018 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7020 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7021 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7022 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7023 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7024 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7025 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7026 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7027 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7028 #ifdef CONFIG_X86_64
7029 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7030 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7031 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7032 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7033 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7034 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7035 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7036 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7039 kvm_rip_write(vcpu
, regs
->rip
);
7040 kvm_set_rflags(vcpu
, regs
->rflags
);
7042 vcpu
->arch
.exception
.pending
= false;
7044 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7049 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7051 struct kvm_segment cs
;
7053 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7057 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7059 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7060 struct kvm_sregs
*sregs
)
7064 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7065 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7066 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7067 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7068 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7069 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7071 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7072 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7074 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7075 sregs
->idt
.limit
= dt
.size
;
7076 sregs
->idt
.base
= dt
.address
;
7077 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7078 sregs
->gdt
.limit
= dt
.size
;
7079 sregs
->gdt
.base
= dt
.address
;
7081 sregs
->cr0
= kvm_read_cr0(vcpu
);
7082 sregs
->cr2
= vcpu
->arch
.cr2
;
7083 sregs
->cr3
= kvm_read_cr3(vcpu
);
7084 sregs
->cr4
= kvm_read_cr4(vcpu
);
7085 sregs
->cr8
= kvm_get_cr8(vcpu
);
7086 sregs
->efer
= vcpu
->arch
.efer
;
7087 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7089 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7091 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7092 set_bit(vcpu
->arch
.interrupt
.nr
,
7093 (unsigned long *)sregs
->interrupt_bitmap
);
7098 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7099 struct kvm_mp_state
*mp_state
)
7101 kvm_apic_accept_events(vcpu
);
7102 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7103 vcpu
->arch
.pv
.pv_unhalted
)
7104 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7106 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7111 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7112 struct kvm_mp_state
*mp_state
)
7114 if (!lapic_in_kernel(vcpu
) &&
7115 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7118 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7119 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7120 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7122 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7123 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7127 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7128 int reason
, bool has_error_code
, u32 error_code
)
7130 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7133 init_emulate_ctxt(vcpu
);
7135 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7136 has_error_code
, error_code
);
7139 return EMULATE_FAIL
;
7141 kvm_rip_write(vcpu
, ctxt
->eip
);
7142 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7143 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7144 return EMULATE_DONE
;
7146 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7148 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7149 struct kvm_sregs
*sregs
)
7151 struct msr_data apic_base_msr
;
7152 int mmu_reset_needed
= 0;
7153 int pending_vec
, max_bits
, idx
;
7156 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7159 dt
.size
= sregs
->idt
.limit
;
7160 dt
.address
= sregs
->idt
.base
;
7161 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7162 dt
.size
= sregs
->gdt
.limit
;
7163 dt
.address
= sregs
->gdt
.base
;
7164 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7166 vcpu
->arch
.cr2
= sregs
->cr2
;
7167 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7168 vcpu
->arch
.cr3
= sregs
->cr3
;
7169 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7171 kvm_set_cr8(vcpu
, sregs
->cr8
);
7173 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7174 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7175 apic_base_msr
.data
= sregs
->apic_base
;
7176 apic_base_msr
.host_initiated
= true;
7177 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7179 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7180 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7181 vcpu
->arch
.cr0
= sregs
->cr0
;
7183 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7184 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7185 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7186 kvm_update_cpuid(vcpu
);
7188 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7189 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7190 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7191 mmu_reset_needed
= 1;
7193 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7195 if (mmu_reset_needed
)
7196 kvm_mmu_reset_context(vcpu
);
7198 max_bits
= KVM_NR_INTERRUPTS
;
7199 pending_vec
= find_first_bit(
7200 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7201 if (pending_vec
< max_bits
) {
7202 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7203 pr_debug("Set back pending irq %d\n", pending_vec
);
7206 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7207 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7208 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7209 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7210 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7211 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7213 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7214 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7216 update_cr8_intercept(vcpu
);
7218 /* Older userspace won't unhalt the vcpu on reset. */
7219 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7220 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7222 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7224 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7229 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7230 struct kvm_guest_debug
*dbg
)
7232 unsigned long rflags
;
7235 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7237 if (vcpu
->arch
.exception
.pending
)
7239 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7240 kvm_queue_exception(vcpu
, DB_VECTOR
);
7242 kvm_queue_exception(vcpu
, BP_VECTOR
);
7246 * Read rflags as long as potentially injected trace flags are still
7249 rflags
= kvm_get_rflags(vcpu
);
7251 vcpu
->guest_debug
= dbg
->control
;
7252 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7253 vcpu
->guest_debug
= 0;
7255 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7256 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7257 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7258 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7260 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7261 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7263 kvm_update_dr7(vcpu
);
7265 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7266 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7267 get_segment_base(vcpu
, VCPU_SREG_CS
);
7270 * Trigger an rflags update that will inject or remove the trace
7273 kvm_set_rflags(vcpu
, rflags
);
7275 kvm_x86_ops
->update_bp_intercept(vcpu
);
7285 * Translate a guest virtual address to a guest physical address.
7287 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7288 struct kvm_translation
*tr
)
7290 unsigned long vaddr
= tr
->linear_address
;
7294 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7295 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7296 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7297 tr
->physical_address
= gpa
;
7298 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7305 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7307 struct fxregs_state
*fxsave
=
7308 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7310 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7311 fpu
->fcw
= fxsave
->cwd
;
7312 fpu
->fsw
= fxsave
->swd
;
7313 fpu
->ftwx
= fxsave
->twd
;
7314 fpu
->last_opcode
= fxsave
->fop
;
7315 fpu
->last_ip
= fxsave
->rip
;
7316 fpu
->last_dp
= fxsave
->rdp
;
7317 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7322 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7324 struct fxregs_state
*fxsave
=
7325 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7327 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7328 fxsave
->cwd
= fpu
->fcw
;
7329 fxsave
->swd
= fpu
->fsw
;
7330 fxsave
->twd
= fpu
->ftwx
;
7331 fxsave
->fop
= fpu
->last_opcode
;
7332 fxsave
->rip
= fpu
->last_ip
;
7333 fxsave
->rdp
= fpu
->last_dp
;
7334 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7339 static void fx_init(struct kvm_vcpu
*vcpu
)
7341 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7342 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7343 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7344 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7347 * Ensure guest xcr0 is valid for loading
7349 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7351 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7354 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7356 if (vcpu
->guest_fpu_loaded
)
7360 * Restore all possible states in the guest,
7361 * and assume host would use all available bits.
7362 * Guest xcr0 would be loaded later.
7364 vcpu
->guest_fpu_loaded
= 1;
7365 __kernel_fpu_begin();
7366 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7370 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7372 if (!vcpu
->guest_fpu_loaded
) {
7373 vcpu
->fpu_counter
= 0;
7377 vcpu
->guest_fpu_loaded
= 0;
7378 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7380 ++vcpu
->stat
.fpu_reload
;
7382 * If using eager FPU mode, or if the guest is a frequent user
7383 * of the FPU, just leave the FPU active for next time.
7384 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7385 * the FPU in bursts will revert to loading it on demand.
7387 if (!use_eager_fpu()) {
7388 if (++vcpu
->fpu_counter
< 5)
7389 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7394 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7396 kvmclock_reset(vcpu
);
7398 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7399 kvm_x86_ops
->vcpu_free(vcpu
);
7402 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7405 struct kvm_vcpu
*vcpu
;
7407 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7408 printk_once(KERN_WARNING
7409 "kvm: SMP vm created on host with unstable TSC; "
7410 "guest TSC will not be reliable\n");
7412 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7417 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7421 kvm_vcpu_mtrr_init(vcpu
);
7422 r
= vcpu_load(vcpu
);
7425 kvm_vcpu_reset(vcpu
, false);
7426 kvm_mmu_setup(vcpu
);
7431 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7433 struct msr_data msr
;
7434 struct kvm
*kvm
= vcpu
->kvm
;
7436 if (vcpu_load(vcpu
))
7439 msr
.index
= MSR_IA32_TSC
;
7440 msr
.host_initiated
= true;
7441 kvm_write_tsc(vcpu
, &msr
);
7444 if (!kvmclock_periodic_sync
)
7447 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7448 KVMCLOCK_SYNC_PERIOD
);
7451 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7454 vcpu
->arch
.apf
.msr_val
= 0;
7456 r
= vcpu_load(vcpu
);
7458 kvm_mmu_unload(vcpu
);
7461 kvm_x86_ops
->vcpu_free(vcpu
);
7464 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7466 vcpu
->arch
.hflags
= 0;
7468 vcpu
->arch
.smi_pending
= 0;
7469 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7470 vcpu
->arch
.nmi_pending
= 0;
7471 vcpu
->arch
.nmi_injected
= false;
7472 kvm_clear_interrupt_queue(vcpu
);
7473 kvm_clear_exception_queue(vcpu
);
7475 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7476 kvm_update_dr0123(vcpu
);
7477 vcpu
->arch
.dr6
= DR6_INIT
;
7478 kvm_update_dr6(vcpu
);
7479 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7480 kvm_update_dr7(vcpu
);
7484 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7485 vcpu
->arch
.apf
.msr_val
= 0;
7486 vcpu
->arch
.st
.msr_val
= 0;
7488 kvmclock_reset(vcpu
);
7490 kvm_clear_async_pf_completion_queue(vcpu
);
7491 kvm_async_pf_hash_reset(vcpu
);
7492 vcpu
->arch
.apf
.halted
= false;
7495 kvm_pmu_reset(vcpu
);
7496 vcpu
->arch
.smbase
= 0x30000;
7499 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7500 vcpu
->arch
.regs_avail
= ~0;
7501 vcpu
->arch
.regs_dirty
= ~0;
7503 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7506 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7508 struct kvm_segment cs
;
7510 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7511 cs
.selector
= vector
<< 8;
7512 cs
.base
= vector
<< 12;
7513 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7514 kvm_rip_write(vcpu
, 0);
7517 int kvm_arch_hardware_enable(void)
7520 struct kvm_vcpu
*vcpu
;
7525 bool stable
, backwards_tsc
= false;
7527 kvm_shared_msr_cpu_online();
7528 ret
= kvm_x86_ops
->hardware_enable();
7532 local_tsc
= rdtsc();
7533 stable
= !check_tsc_unstable();
7534 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7535 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7536 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7537 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7538 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7539 backwards_tsc
= true;
7540 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7541 max_tsc
= vcpu
->arch
.last_host_tsc
;
7547 * Sometimes, even reliable TSCs go backwards. This happens on
7548 * platforms that reset TSC during suspend or hibernate actions, but
7549 * maintain synchronization. We must compensate. Fortunately, we can
7550 * detect that condition here, which happens early in CPU bringup,
7551 * before any KVM threads can be running. Unfortunately, we can't
7552 * bring the TSCs fully up to date with real time, as we aren't yet far
7553 * enough into CPU bringup that we know how much real time has actually
7554 * elapsed; our helper function, get_kernel_ns() will be using boot
7555 * variables that haven't been updated yet.
7557 * So we simply find the maximum observed TSC above, then record the
7558 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7559 * the adjustment will be applied. Note that we accumulate
7560 * adjustments, in case multiple suspend cycles happen before some VCPU
7561 * gets a chance to run again. In the event that no KVM threads get a
7562 * chance to run, we will miss the entire elapsed period, as we'll have
7563 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7564 * loose cycle time. This isn't too big a deal, since the loss will be
7565 * uniform across all VCPUs (not to mention the scenario is extremely
7566 * unlikely). It is possible that a second hibernate recovery happens
7567 * much faster than a first, causing the observed TSC here to be
7568 * smaller; this would require additional padding adjustment, which is
7569 * why we set last_host_tsc to the local tsc observed here.
7571 * N.B. - this code below runs only on platforms with reliable TSC,
7572 * as that is the only way backwards_tsc is set above. Also note
7573 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7574 * have the same delta_cyc adjustment applied if backwards_tsc
7575 * is detected. Note further, this adjustment is only done once,
7576 * as we reset last_host_tsc on all VCPUs to stop this from being
7577 * called multiple times (one for each physical CPU bringup).
7579 * Platforms with unreliable TSCs don't have to deal with this, they
7580 * will be compensated by the logic in vcpu_load, which sets the TSC to
7581 * catchup mode. This will catchup all VCPUs to real time, but cannot
7582 * guarantee that they stay in perfect synchronization.
7584 if (backwards_tsc
) {
7585 u64 delta_cyc
= max_tsc
- local_tsc
;
7586 backwards_tsc_observed
= true;
7587 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7588 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7589 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7590 vcpu
->arch
.last_host_tsc
= local_tsc
;
7591 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7595 * We have to disable TSC offset matching.. if you were
7596 * booting a VM while issuing an S4 host suspend....
7597 * you may have some problem. Solving this issue is
7598 * left as an exercise to the reader.
7600 kvm
->arch
.last_tsc_nsec
= 0;
7601 kvm
->arch
.last_tsc_write
= 0;
7608 void kvm_arch_hardware_disable(void)
7610 kvm_x86_ops
->hardware_disable();
7611 drop_user_return_notifiers();
7614 int kvm_arch_hardware_setup(void)
7618 r
= kvm_x86_ops
->hardware_setup();
7622 if (kvm_has_tsc_control
) {
7624 * Make sure the user can only configure tsc_khz values that
7625 * fit into a signed integer.
7626 * A min value is not calculated needed because it will always
7627 * be 1 on all machines.
7629 u64 max
= min(0x7fffffffULL
,
7630 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7631 kvm_max_guest_tsc_khz
= max
;
7633 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7636 kvm_init_msr_list();
7640 void kvm_arch_hardware_unsetup(void)
7642 kvm_x86_ops
->hardware_unsetup();
7645 void kvm_arch_check_processor_compat(void *rtn
)
7647 kvm_x86_ops
->check_processor_compatibility(rtn
);
7650 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7652 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7654 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7656 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7658 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7661 struct static_key kvm_no_apic_vcpu __read_mostly
;
7662 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7664 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7670 BUG_ON(vcpu
->kvm
== NULL
);
7673 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7674 vcpu
->arch
.pv
.pv_unhalted
= false;
7675 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7676 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7677 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7679 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7681 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7686 vcpu
->arch
.pio_data
= page_address(page
);
7688 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7690 r
= kvm_mmu_create(vcpu
);
7692 goto fail_free_pio_data
;
7694 if (irqchip_in_kernel(kvm
)) {
7695 r
= kvm_create_lapic(vcpu
);
7697 goto fail_mmu_destroy
;
7699 static_key_slow_inc(&kvm_no_apic_vcpu
);
7701 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7703 if (!vcpu
->arch
.mce_banks
) {
7705 goto fail_free_lapic
;
7707 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7709 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7711 goto fail_free_mce_banks
;
7716 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7717 vcpu
->arch
.pv_time_enabled
= false;
7719 vcpu
->arch
.guest_supported_xcr0
= 0;
7720 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7722 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7724 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7726 kvm_async_pf_hash_reset(vcpu
);
7729 vcpu
->arch
.pending_external_vector
= -1;
7731 kvm_hv_vcpu_init(vcpu
);
7735 fail_free_mce_banks
:
7736 kfree(vcpu
->arch
.mce_banks
);
7738 kvm_free_lapic(vcpu
);
7740 kvm_mmu_destroy(vcpu
);
7742 free_page((unsigned long)vcpu
->arch
.pio_data
);
7747 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7751 kvm_hv_vcpu_uninit(vcpu
);
7752 kvm_pmu_destroy(vcpu
);
7753 kfree(vcpu
->arch
.mce_banks
);
7754 kvm_free_lapic(vcpu
);
7755 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7756 kvm_mmu_destroy(vcpu
);
7757 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7758 free_page((unsigned long)vcpu
->arch
.pio_data
);
7759 if (!lapic_in_kernel(vcpu
))
7760 static_key_slow_dec(&kvm_no_apic_vcpu
);
7763 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7765 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7768 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7773 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7774 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7775 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7776 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7777 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7779 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7780 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7781 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7782 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7783 &kvm
->arch
.irq_sources_bitmap
);
7785 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7786 mutex_init(&kvm
->arch
.apic_map_lock
);
7787 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7789 pvclock_update_vm_gtod_copy(kvm
);
7791 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7792 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7794 kvm_page_track_init(kvm
);
7795 kvm_mmu_init_vm(kvm
);
7797 if (kvm_x86_ops
->vm_init
)
7798 return kvm_x86_ops
->vm_init(kvm
);
7803 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7806 r
= vcpu_load(vcpu
);
7808 kvm_mmu_unload(vcpu
);
7812 static void kvm_free_vcpus(struct kvm
*kvm
)
7815 struct kvm_vcpu
*vcpu
;
7818 * Unpin any mmu pages first.
7820 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7821 kvm_clear_async_pf_completion_queue(vcpu
);
7822 kvm_unload_vcpu_mmu(vcpu
);
7824 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7825 kvm_arch_vcpu_free(vcpu
);
7827 mutex_lock(&kvm
->lock
);
7828 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7829 kvm
->vcpus
[i
] = NULL
;
7831 atomic_set(&kvm
->online_vcpus
, 0);
7832 mutex_unlock(&kvm
->lock
);
7835 void kvm_arch_sync_events(struct kvm
*kvm
)
7837 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7838 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7839 kvm_free_all_assigned_devices(kvm
);
7843 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7847 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
7848 struct kvm_memory_slot
*slot
, old
;
7850 /* Called with kvm->slots_lock held. */
7851 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
7854 slot
= id_to_memslot(slots
, id
);
7860 * MAP_SHARED to prevent internal slot pages from being moved
7863 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
7864 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7865 if (IS_ERR((void *)hva
))
7866 return PTR_ERR((void *)hva
);
7875 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7876 struct kvm_userspace_memory_region m
;
7878 m
.slot
= id
| (i
<< 16);
7880 m
.guest_phys_addr
= gpa
;
7881 m
.userspace_addr
= hva
;
7882 m
.memory_size
= size
;
7883 r
= __kvm_set_memory_region(kvm
, &m
);
7889 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
7895 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
7897 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7901 mutex_lock(&kvm
->slots_lock
);
7902 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
7903 mutex_unlock(&kvm
->slots_lock
);
7907 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
7909 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7911 if (current
->mm
== kvm
->mm
) {
7913 * Free memory regions allocated on behalf of userspace,
7914 * unless the the memory map has changed due to process exit
7917 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
7918 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
7919 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
7921 if (kvm_x86_ops
->vm_destroy
)
7922 kvm_x86_ops
->vm_destroy(kvm
);
7923 kvm_iommu_unmap_guest(kvm
);
7924 kfree(kvm
->arch
.vpic
);
7925 kfree(kvm
->arch
.vioapic
);
7926 kvm_free_vcpus(kvm
);
7927 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7928 kvm_mmu_uninit_vm(kvm
);
7931 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7932 struct kvm_memory_slot
*dont
)
7936 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7937 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7938 kvfree(free
->arch
.rmap
[i
]);
7939 free
->arch
.rmap
[i
] = NULL
;
7944 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7945 dont
->arch
.lpage_info
[i
- 1]) {
7946 kvfree(free
->arch
.lpage_info
[i
- 1]);
7947 free
->arch
.lpage_info
[i
- 1] = NULL
;
7951 kvm_page_track_free_memslot(free
, dont
);
7954 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7955 unsigned long npages
)
7959 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7960 struct kvm_lpage_info
*linfo
;
7965 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7966 slot
->base_gfn
, level
) + 1;
7968 slot
->arch
.rmap
[i
] =
7969 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7970 if (!slot
->arch
.rmap
[i
])
7975 linfo
= kvm_kvzalloc(lpages
* sizeof(*linfo
));
7979 slot
->arch
.lpage_info
[i
- 1] = linfo
;
7981 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7982 linfo
[0].disallow_lpage
= 1;
7983 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7984 linfo
[lpages
- 1].disallow_lpage
= 1;
7985 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7987 * If the gfn and userspace address are not aligned wrt each
7988 * other, or if explicitly asked to, disable large page
7989 * support for this slot
7991 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7992 !kvm_largepages_enabled()) {
7995 for (j
= 0; j
< lpages
; ++j
)
7996 linfo
[j
].disallow_lpage
= 1;
8000 if (kvm_page_track_create_memslot(slot
, npages
))
8006 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8007 kvfree(slot
->arch
.rmap
[i
]);
8008 slot
->arch
.rmap
[i
] = NULL
;
8012 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8013 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8018 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8021 * memslots->generation has been incremented.
8022 * mmio generation may have reached its maximum value.
8024 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8027 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8028 struct kvm_memory_slot
*memslot
,
8029 const struct kvm_userspace_memory_region
*mem
,
8030 enum kvm_mr_change change
)
8035 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8036 struct kvm_memory_slot
*new)
8038 /* Still write protect RO slot */
8039 if (new->flags
& KVM_MEM_READONLY
) {
8040 kvm_mmu_slot_remove_write_access(kvm
, new);
8045 * Call kvm_x86_ops dirty logging hooks when they are valid.
8047 * kvm_x86_ops->slot_disable_log_dirty is called when:
8049 * - KVM_MR_CREATE with dirty logging is disabled
8050 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8052 * The reason is, in case of PML, we need to set D-bit for any slots
8053 * with dirty logging disabled in order to eliminate unnecessary GPA
8054 * logging in PML buffer (and potential PML buffer full VMEXT). This
8055 * guarantees leaving PML enabled during guest's lifetime won't have
8056 * any additonal overhead from PML when guest is running with dirty
8057 * logging disabled for memory slots.
8059 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8060 * to dirty logging mode.
8062 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8064 * In case of write protect:
8066 * Write protect all pages for dirty logging.
8068 * All the sptes including the large sptes which point to this
8069 * slot are set to readonly. We can not create any new large
8070 * spte on this slot until the end of the logging.
8072 * See the comments in fast_page_fault().
8074 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8075 if (kvm_x86_ops
->slot_enable_log_dirty
)
8076 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8078 kvm_mmu_slot_remove_write_access(kvm
, new);
8080 if (kvm_x86_ops
->slot_disable_log_dirty
)
8081 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8085 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8086 const struct kvm_userspace_memory_region
*mem
,
8087 const struct kvm_memory_slot
*old
,
8088 const struct kvm_memory_slot
*new,
8089 enum kvm_mr_change change
)
8091 int nr_mmu_pages
= 0;
8093 if (!kvm
->arch
.n_requested_mmu_pages
)
8094 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8097 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8100 * Dirty logging tracks sptes in 4k granularity, meaning that large
8101 * sptes have to be split. If live migration is successful, the guest
8102 * in the source machine will be destroyed and large sptes will be
8103 * created in the destination. However, if the guest continues to run
8104 * in the source machine (for example if live migration fails), small
8105 * sptes will remain around and cause bad performance.
8107 * Scan sptes if dirty logging has been stopped, dropping those
8108 * which can be collapsed into a single large-page spte. Later
8109 * page faults will create the large-page sptes.
8111 if ((change
!= KVM_MR_DELETE
) &&
8112 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8113 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8114 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8117 * Set up write protection and/or dirty logging for the new slot.
8119 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8120 * been zapped so no dirty logging staff is needed for old slot. For
8121 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8122 * new and it's also covered when dealing with the new slot.
8124 * FIXME: const-ify all uses of struct kvm_memory_slot.
8126 if (change
!= KVM_MR_DELETE
)
8127 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8130 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8132 kvm_mmu_invalidate_zap_all_pages(kvm
);
8135 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8136 struct kvm_memory_slot
*slot
)
8138 kvm_mmu_invalidate_zap_all_pages(kvm
);
8141 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8143 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8146 if (kvm_apic_has_events(vcpu
))
8149 if (vcpu
->arch
.pv
.pv_unhalted
)
8152 if (atomic_read(&vcpu
->arch
.nmi_queued
))
8155 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
8158 if (kvm_arch_interrupt_allowed(vcpu
) &&
8159 kvm_cpu_has_interrupt(vcpu
))
8162 if (kvm_hv_has_stimer_pending(vcpu
))
8168 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8170 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
8171 kvm_x86_ops
->check_nested_events(vcpu
, false);
8173 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8176 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8178 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8181 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8183 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8186 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8188 if (is_64_bit_mode(vcpu
))
8189 return kvm_rip_read(vcpu
);
8190 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8191 kvm_rip_read(vcpu
));
8193 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8195 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8197 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8199 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8201 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8203 unsigned long rflags
;
8205 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8206 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8207 rflags
&= ~X86_EFLAGS_TF
;
8210 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8212 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8214 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8215 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8216 rflags
|= X86_EFLAGS_TF
;
8217 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8220 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8222 __kvm_set_rflags(vcpu
, rflags
);
8223 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8225 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8227 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8231 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8235 r
= kvm_mmu_reload(vcpu
);
8239 if (!vcpu
->arch
.mmu
.direct_map
&&
8240 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8243 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8246 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8248 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8251 static inline u32
kvm_async_pf_next_probe(u32 key
)
8253 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8256 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8258 u32 key
= kvm_async_pf_hash_fn(gfn
);
8260 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8261 key
= kvm_async_pf_next_probe(key
);
8263 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8266 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8269 u32 key
= kvm_async_pf_hash_fn(gfn
);
8271 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8272 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8273 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8274 key
= kvm_async_pf_next_probe(key
);
8279 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8281 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8284 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8288 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8290 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8292 j
= kvm_async_pf_next_probe(j
);
8293 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8295 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8297 * k lies cyclically in ]i,j]
8299 * |....j i.k.| or |.k..j i...|
8301 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8302 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8307 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8310 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8314 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8315 struct kvm_async_pf
*work
)
8317 struct x86_exception fault
;
8319 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8320 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8322 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8323 (vcpu
->arch
.apf
.send_user_only
&&
8324 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8325 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8326 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8327 fault
.vector
= PF_VECTOR
;
8328 fault
.error_code_valid
= true;
8329 fault
.error_code
= 0;
8330 fault
.nested_page_fault
= false;
8331 fault
.address
= work
->arch
.token
;
8332 kvm_inject_page_fault(vcpu
, &fault
);
8336 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8337 struct kvm_async_pf
*work
)
8339 struct x86_exception fault
;
8341 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8342 if (work
->wakeup_all
)
8343 work
->arch
.token
= ~0; /* broadcast wakeup */
8345 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8347 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8348 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8349 fault
.vector
= PF_VECTOR
;
8350 fault
.error_code_valid
= true;
8351 fault
.error_code
= 0;
8352 fault
.nested_page_fault
= false;
8353 fault
.address
= work
->arch
.token
;
8354 kvm_inject_page_fault(vcpu
, &fault
);
8356 vcpu
->arch
.apf
.halted
= false;
8357 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8360 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8362 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8365 return !kvm_event_needs_reinjection(vcpu
) &&
8366 kvm_x86_ops
->interrupt_allowed(vcpu
);
8369 void kvm_arch_start_assignment(struct kvm
*kvm
)
8371 atomic_inc(&kvm
->arch
.assigned_device_count
);
8373 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8375 void kvm_arch_end_assignment(struct kvm
*kvm
)
8377 atomic_dec(&kvm
->arch
.assigned_device_count
);
8379 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8381 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8383 return atomic_read(&kvm
->arch
.assigned_device_count
);
8385 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8387 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8389 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8391 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8393 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8395 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8397 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8399 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8401 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8403 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8405 bool kvm_arch_has_irq_bypass(void)
8407 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8410 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8411 struct irq_bypass_producer
*prod
)
8413 struct kvm_kernel_irqfd
*irqfd
=
8414 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8416 irqfd
->producer
= prod
;
8418 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8419 prod
->irq
, irqfd
->gsi
, 1);
8422 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8423 struct irq_bypass_producer
*prod
)
8426 struct kvm_kernel_irqfd
*irqfd
=
8427 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8429 WARN_ON(irqfd
->producer
!= prod
);
8430 irqfd
->producer
= NULL
;
8433 * When producer of consumer is unregistered, we change back to
8434 * remapped mode, so we can re-use the current implementation
8435 * when the irq is masked/disabled or the consumer side (KVM
8436 * int this case doesn't want to receive the interrupts.
8438 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8440 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8441 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8444 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8445 uint32_t guest_irq
, bool set
)
8447 if (!kvm_x86_ops
->update_pi_irte
)
8450 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8453 bool kvm_vector_hashing_enabled(void)
8455 return vector_hashing
;
8457 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8459 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8460 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8461 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8462 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8463 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8464 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8465 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8466 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8467 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8468 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8469 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8470 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8471 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8472 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8473 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8474 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8475 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8476 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8477 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);