2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
70 #include <asm/mshyperv.h>
71 #include <asm/hypervisor.h>
73 #define CREATE_TRACE_POINTS
76 #define MAX_IO_MSRS 256
77 #define KVM_MAX_MCE_BANKS 32
78 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
81 #define emul_to_vcpu(ctxt) \
82 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
85 * - enable syscall per default because its emulated by KVM
86 * - enable LME and LMA per default on 64 bit KVM
90 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
92 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
99 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
101 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
102 static void process_nmi(struct kvm_vcpu
*vcpu
);
103 static void enter_smm(struct kvm_vcpu
*vcpu
);
104 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
106 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
107 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
109 static bool __read_mostly ignore_msrs
= 0;
110 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
112 static bool __read_mostly report_ignored_msrs
= true;
113 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
115 unsigned int min_timer_period_us
= 500;
116 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
118 static bool __read_mostly kvmclock_periodic_sync
= true;
119 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
121 bool __read_mostly kvm_has_tsc_control
;
122 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
123 u32 __read_mostly kvm_max_guest_tsc_khz
;
124 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
125 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
126 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
127 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
129 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
130 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
132 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
133 static u32 __read_mostly tsc_tolerance_ppm
= 250;
134 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
136 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
137 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
138 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
140 static bool __read_mostly vector_hashing
= true;
141 module_param(vector_hashing
, bool, S_IRUGO
);
143 #define KVM_NR_SHARED_MSRS 16
145 struct kvm_shared_msrs_global
{
147 u32 msrs
[KVM_NR_SHARED_MSRS
];
150 struct kvm_shared_msrs
{
151 struct user_return_notifier urn
;
153 struct kvm_shared_msr_values
{
156 } values
[KVM_NR_SHARED_MSRS
];
159 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
160 static struct kvm_shared_msrs __percpu
*shared_msrs
;
162 struct kvm_stats_debugfs_item debugfs_entries
[] = {
163 { "pf_fixed", VCPU_STAT(pf_fixed
) },
164 { "pf_guest", VCPU_STAT(pf_guest
) },
165 { "tlb_flush", VCPU_STAT(tlb_flush
) },
166 { "invlpg", VCPU_STAT(invlpg
) },
167 { "exits", VCPU_STAT(exits
) },
168 { "io_exits", VCPU_STAT(io_exits
) },
169 { "mmio_exits", VCPU_STAT(mmio_exits
) },
170 { "signal_exits", VCPU_STAT(signal_exits
) },
171 { "irq_window", VCPU_STAT(irq_window_exits
) },
172 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
173 { "halt_exits", VCPU_STAT(halt_exits
) },
174 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
175 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
176 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
177 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
178 { "hypercalls", VCPU_STAT(hypercalls
) },
179 { "request_irq", VCPU_STAT(request_irq_exits
) },
180 { "irq_exits", VCPU_STAT(irq_exits
) },
181 { "host_state_reload", VCPU_STAT(host_state_reload
) },
182 { "fpu_reload", VCPU_STAT(fpu_reload
) },
183 { "insn_emulation", VCPU_STAT(insn_emulation
) },
184 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
185 { "irq_injections", VCPU_STAT(irq_injections
) },
186 { "nmi_injections", VCPU_STAT(nmi_injections
) },
187 { "req_event", VCPU_STAT(req_event
) },
188 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
189 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
190 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
191 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
192 { "mmu_flooded", VM_STAT(mmu_flooded
) },
193 { "mmu_recycled", VM_STAT(mmu_recycled
) },
194 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
195 { "mmu_unsync", VM_STAT(mmu_unsync
) },
196 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
197 { "largepages", VM_STAT(lpages
) },
198 { "max_mmu_page_hash_collisions",
199 VM_STAT(max_mmu_page_hash_collisions
) },
203 u64 __read_mostly host_xcr0
;
205 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
207 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
210 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
211 vcpu
->arch
.apf
.gfns
[i
] = ~0;
214 static void kvm_on_user_return(struct user_return_notifier
*urn
)
217 struct kvm_shared_msrs
*locals
218 = container_of(urn
, struct kvm_shared_msrs
, urn
);
219 struct kvm_shared_msr_values
*values
;
223 * Disabling irqs at this point since the following code could be
224 * interrupted and executed through kvm_arch_hardware_disable()
226 local_irq_save(flags
);
227 if (locals
->registered
) {
228 locals
->registered
= false;
229 user_return_notifier_unregister(urn
);
231 local_irq_restore(flags
);
232 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
233 values
= &locals
->values
[slot
];
234 if (values
->host
!= values
->curr
) {
235 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
236 values
->curr
= values
->host
;
241 static void shared_msr_update(unsigned slot
, u32 msr
)
244 unsigned int cpu
= smp_processor_id();
245 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
247 /* only read, and nobody should modify it at this time,
248 * so don't need lock */
249 if (slot
>= shared_msrs_global
.nr
) {
250 printk(KERN_ERR
"kvm: invalid MSR slot!");
253 rdmsrl_safe(msr
, &value
);
254 smsr
->values
[slot
].host
= value
;
255 smsr
->values
[slot
].curr
= value
;
258 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
260 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
261 shared_msrs_global
.msrs
[slot
] = msr
;
262 if (slot
>= shared_msrs_global
.nr
)
263 shared_msrs_global
.nr
= slot
+ 1;
265 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
267 static void kvm_shared_msr_cpu_online(void)
271 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
272 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
275 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
277 unsigned int cpu
= smp_processor_id();
278 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
281 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
283 smsr
->values
[slot
].curr
= value
;
284 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
288 if (!smsr
->registered
) {
289 smsr
->urn
.on_user_return
= kvm_on_user_return
;
290 user_return_notifier_register(&smsr
->urn
);
291 smsr
->registered
= true;
295 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
297 static void drop_user_return_notifiers(void)
299 unsigned int cpu
= smp_processor_id();
300 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
302 if (smsr
->registered
)
303 kvm_on_user_return(&smsr
->urn
);
306 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
308 return vcpu
->arch
.apic_base
;
310 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
312 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
314 u64 old_state
= vcpu
->arch
.apic_base
&
315 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
316 u64 new_state
= msr_info
->data
&
317 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
318 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
319 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
321 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
323 if (!msr_info
->host_initiated
&&
324 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
325 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
326 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
330 kvm_lapic_set_base(vcpu
, msr_info
->data
);
333 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
335 asmlinkage __visible
void kvm_spurious_fault(void)
337 /* Fault while not rebooting. We want the trace. */
340 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
342 #define EXCPT_BENIGN 0
343 #define EXCPT_CONTRIBUTORY 1
346 static int exception_class(int vector
)
356 return EXCPT_CONTRIBUTORY
;
363 #define EXCPT_FAULT 0
365 #define EXCPT_ABORT 2
366 #define EXCPT_INTERRUPT 3
368 static int exception_type(int vector
)
372 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
373 return EXCPT_INTERRUPT
;
377 /* #DB is trap, as instruction watchpoints are handled elsewhere */
378 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
381 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
384 /* Reserved exceptions will result in fault */
388 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
389 unsigned nr
, bool has_error
, u32 error_code
,
395 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
397 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
399 if (has_error
&& !is_protmode(vcpu
))
403 * On vmentry, vcpu->arch.exception.pending is only
404 * true if an event injection was blocked by
405 * nested_run_pending. In that case, however,
406 * vcpu_enter_guest requests an immediate exit,
407 * and the guest shouldn't proceed far enough to
410 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
411 vcpu
->arch
.exception
.injected
= true;
413 vcpu
->arch
.exception
.pending
= true;
414 vcpu
->arch
.exception
.injected
= false;
416 vcpu
->arch
.exception
.has_error_code
= has_error
;
417 vcpu
->arch
.exception
.nr
= nr
;
418 vcpu
->arch
.exception
.error_code
= error_code
;
422 /* to check exception */
423 prev_nr
= vcpu
->arch
.exception
.nr
;
424 if (prev_nr
== DF_VECTOR
) {
425 /* triple fault -> shutdown */
426 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
429 class1
= exception_class(prev_nr
);
430 class2
= exception_class(nr
);
431 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
432 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
434 * Generate double fault per SDM Table 5-5. Set
435 * exception.pending = true so that the double fault
436 * can trigger a nested vmexit.
438 vcpu
->arch
.exception
.pending
= true;
439 vcpu
->arch
.exception
.injected
= false;
440 vcpu
->arch
.exception
.has_error_code
= true;
441 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
442 vcpu
->arch
.exception
.error_code
= 0;
444 /* replace previous exception with a new one in a hope
445 that instruction re-execution will regenerate lost
450 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
452 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
454 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
456 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
458 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
460 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
462 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
465 kvm_inject_gp(vcpu
, 0);
467 return kvm_skip_emulated_instruction(vcpu
);
471 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
473 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
475 ++vcpu
->stat
.pf_guest
;
476 vcpu
->arch
.exception
.nested_apf
=
477 is_guest_mode(vcpu
) && fault
->async_page_fault
;
478 if (vcpu
->arch
.exception
.nested_apf
)
479 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
481 vcpu
->arch
.cr2
= fault
->address
;
482 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
484 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
486 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
488 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
489 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
491 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
493 return fault
->nested_page_fault
;
496 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
498 atomic_inc(&vcpu
->arch
.nmi_queued
);
499 kvm_make_request(KVM_REQ_NMI
, vcpu
);
501 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
503 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
505 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
507 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
509 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
511 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
513 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
516 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
517 * a #GP and return false.
519 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
521 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
523 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
526 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
528 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
530 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
533 kvm_queue_exception(vcpu
, UD_VECTOR
);
536 EXPORT_SYMBOL_GPL(kvm_require_dr
);
539 * This function will be used to read from the physical memory of the currently
540 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
541 * can read from guest physical or from the guest's guest physical memory.
543 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
544 gfn_t ngfn
, void *data
, int offset
, int len
,
547 struct x86_exception exception
;
551 ngpa
= gfn_to_gpa(ngfn
);
552 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
553 if (real_gfn
== UNMAPPED_GVA
)
556 real_gfn
= gpa_to_gfn(real_gfn
);
558 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
560 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
562 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
563 void *data
, int offset
, int len
, u32 access
)
565 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
566 data
, offset
, len
, access
);
570 * Load the pae pdptrs. Return true is they are all valid.
572 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
574 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
575 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
578 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
580 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
581 offset
* sizeof(u64
), sizeof(pdpte
),
582 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
587 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
588 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
590 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
597 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
598 __set_bit(VCPU_EXREG_PDPTR
,
599 (unsigned long *)&vcpu
->arch
.regs_avail
);
600 __set_bit(VCPU_EXREG_PDPTR
,
601 (unsigned long *)&vcpu
->arch
.regs_dirty
);
606 EXPORT_SYMBOL_GPL(load_pdptrs
);
608 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
610 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
616 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
619 if (!test_bit(VCPU_EXREG_PDPTR
,
620 (unsigned long *)&vcpu
->arch
.regs_avail
))
623 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
624 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
625 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
626 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
629 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
634 EXPORT_SYMBOL_GPL(pdptrs_changed
);
636 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
638 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
639 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
644 if (cr0
& 0xffffffff00000000UL
)
648 cr0
&= ~CR0_RESERVED_BITS
;
650 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
653 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
656 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
658 if ((vcpu
->arch
.efer
& EFER_LME
)) {
663 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
668 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
673 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
676 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
678 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
679 kvm_clear_async_pf_completion_queue(vcpu
);
680 kvm_async_pf_hash_reset(vcpu
);
683 if ((cr0
^ old_cr0
) & update_bits
)
684 kvm_mmu_reset_context(vcpu
);
686 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
687 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
688 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
689 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
693 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
695 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
697 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
699 EXPORT_SYMBOL_GPL(kvm_lmsw
);
701 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
703 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
704 !vcpu
->guest_xcr0_loaded
) {
705 /* kvm_set_xcr() also depends on this */
706 if (vcpu
->arch
.xcr0
!= host_xcr0
)
707 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
708 vcpu
->guest_xcr0_loaded
= 1;
712 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
714 if (vcpu
->guest_xcr0_loaded
) {
715 if (vcpu
->arch
.xcr0
!= host_xcr0
)
716 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
717 vcpu
->guest_xcr0_loaded
= 0;
721 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
724 u64 old_xcr0
= vcpu
->arch
.xcr0
;
727 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
728 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
730 if (!(xcr0
& XFEATURE_MASK_FP
))
732 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
736 * Do not allow the guest to set bits that we do not support
737 * saving. However, xcr0 bit 0 is always set, even if the
738 * emulated CPU does not support XSAVE (see fx_init).
740 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
741 if (xcr0
& ~valid_bits
)
744 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
745 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
748 if (xcr0
& XFEATURE_MASK_AVX512
) {
749 if (!(xcr0
& XFEATURE_MASK_YMM
))
751 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
754 vcpu
->arch
.xcr0
= xcr0
;
756 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
757 kvm_update_cpuid(vcpu
);
761 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
763 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
764 __kvm_set_xcr(vcpu
, index
, xcr
)) {
765 kvm_inject_gp(vcpu
, 0);
770 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
772 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
774 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
775 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
776 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
778 if (cr4
& CR4_RESERVED_BITS
)
781 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
784 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
787 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
790 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
793 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
796 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
799 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
802 if (is_long_mode(vcpu
)) {
803 if (!(cr4
& X86_CR4_PAE
))
805 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
806 && ((cr4
^ old_cr4
) & pdptr_bits
)
807 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
811 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
812 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
815 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
816 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
820 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
823 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
824 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
825 kvm_mmu_reset_context(vcpu
);
827 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
828 kvm_update_cpuid(vcpu
);
832 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
834 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
837 cr3
&= ~CR3_PCID_INVD
;
840 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
841 kvm_mmu_sync_roots(vcpu
);
842 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
846 if (is_long_mode(vcpu
) &&
847 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 62)))
849 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
850 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
853 vcpu
->arch
.cr3
= cr3
;
854 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
855 kvm_mmu_new_cr3(vcpu
);
858 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
860 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
862 if (cr8
& CR8_RESERVED_BITS
)
864 if (lapic_in_kernel(vcpu
))
865 kvm_lapic_set_tpr(vcpu
, cr8
);
867 vcpu
->arch
.cr8
= cr8
;
870 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
872 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
874 if (lapic_in_kernel(vcpu
))
875 return kvm_lapic_get_cr8(vcpu
);
877 return vcpu
->arch
.cr8
;
879 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
881 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
885 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
886 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
887 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
888 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
892 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
894 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
895 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
898 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
902 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
903 dr7
= vcpu
->arch
.guest_debug_dr7
;
905 dr7
= vcpu
->arch
.dr7
;
906 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
907 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
908 if (dr7
& DR7_BP_EN_MASK
)
909 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
912 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
914 u64 fixed
= DR6_FIXED_1
;
916 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
921 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
925 vcpu
->arch
.db
[dr
] = val
;
926 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
927 vcpu
->arch
.eff_db
[dr
] = val
;
932 if (val
& 0xffffffff00000000ULL
)
934 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
935 kvm_update_dr6(vcpu
);
940 if (val
& 0xffffffff00000000ULL
)
942 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
943 kvm_update_dr7(vcpu
);
950 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
952 if (__kvm_set_dr(vcpu
, dr
, val
)) {
953 kvm_inject_gp(vcpu
, 0);
958 EXPORT_SYMBOL_GPL(kvm_set_dr
);
960 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
964 *val
= vcpu
->arch
.db
[dr
];
969 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
970 *val
= vcpu
->arch
.dr6
;
972 *val
= kvm_x86_ops
->get_dr6(vcpu
);
977 *val
= vcpu
->arch
.dr7
;
982 EXPORT_SYMBOL_GPL(kvm_get_dr
);
984 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
986 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
990 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
993 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
994 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
997 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
1000 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1001 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1003 * This list is modified at module load time to reflect the
1004 * capabilities of the host cpu. This capabilities test skips MSRs that are
1005 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1006 * may depend on host virtualization features rather than host cpu features.
1009 static u32 msrs_to_save
[] = {
1010 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1012 #ifdef CONFIG_X86_64
1013 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1015 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1016 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1017 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1020 static unsigned num_msrs_to_save
;
1022 static u32 emulated_msrs
[] = {
1023 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1024 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1025 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1026 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1027 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1028 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1029 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1031 HV_X64_MSR_VP_INDEX
,
1032 HV_X64_MSR_VP_RUNTIME
,
1033 HV_X64_MSR_SCONTROL
,
1034 HV_X64_MSR_STIMER0_CONFIG
,
1035 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1038 MSR_IA32_TSC_ADJUST
,
1039 MSR_IA32_TSCDEADLINE
,
1040 MSR_IA32_MISC_ENABLE
,
1041 MSR_IA32_MCG_STATUS
,
1043 MSR_IA32_MCG_EXT_CTL
,
1047 MSR_MISC_FEATURES_ENABLES
,
1050 static unsigned num_emulated_msrs
;
1053 * List of msr numbers which are used to expose MSR-based features that
1054 * can be used by a hypervisor to validate requested CPU features.
1056 static u32 msr_based_features
[] = {
1060 static unsigned int num_msr_based_features
;
1062 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1064 switch (msr
->index
) {
1066 if (kvm_x86_ops
->get_msr_feature(msr
))
1072 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1074 struct kvm_msr_entry msr
;
1078 r
= kvm_get_msr_feature(&msr
);
1087 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1089 if (efer
& efer_reserved_bits
)
1092 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1095 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1100 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1102 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1104 u64 old_efer
= vcpu
->arch
.efer
;
1106 if (!kvm_valid_efer(vcpu
, efer
))
1110 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1114 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1116 kvm_x86_ops
->set_efer(vcpu
, efer
);
1118 /* Update reserved bits */
1119 if ((efer
^ old_efer
) & EFER_NX
)
1120 kvm_mmu_reset_context(vcpu
);
1125 void kvm_enable_efer_bits(u64 mask
)
1127 efer_reserved_bits
&= ~mask
;
1129 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1132 * Writes msr value into into the appropriate "register".
1133 * Returns 0 on success, non-0 otherwise.
1134 * Assumes vcpu_load() was already called.
1136 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1138 switch (msr
->index
) {
1141 case MSR_KERNEL_GS_BASE
:
1144 if (is_noncanonical_address(msr
->data
, vcpu
))
1147 case MSR_IA32_SYSENTER_EIP
:
1148 case MSR_IA32_SYSENTER_ESP
:
1150 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1151 * non-canonical address is written on Intel but not on
1152 * AMD (which ignores the top 32-bits, because it does
1153 * not implement 64-bit SYSENTER).
1155 * 64-bit code should hence be able to write a non-canonical
1156 * value on AMD. Making the address canonical ensures that
1157 * vmentry does not fail on Intel after writing a non-canonical
1158 * value, and that something deterministic happens if the guest
1159 * invokes 64-bit SYSENTER.
1161 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1163 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1165 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1168 * Adapt set_msr() to msr_io()'s calling convention
1170 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1172 struct msr_data msr
;
1176 msr
.host_initiated
= true;
1177 r
= kvm_get_msr(vcpu
, &msr
);
1185 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1187 struct msr_data msr
;
1191 msr
.host_initiated
= true;
1192 return kvm_set_msr(vcpu
, &msr
);
1195 #ifdef CONFIG_X86_64
1196 struct pvclock_gtod_data
{
1199 struct { /* extract of a clocksource struct */
1212 static struct pvclock_gtod_data pvclock_gtod_data
;
1214 static void update_pvclock_gtod(struct timekeeper
*tk
)
1216 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1219 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1221 write_seqcount_begin(&vdata
->seq
);
1223 /* copy pvclock gtod data */
1224 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1225 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1226 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1227 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1228 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1230 vdata
->boot_ns
= boot_ns
;
1231 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1233 vdata
->wall_time_sec
= tk
->xtime_sec
;
1235 write_seqcount_end(&vdata
->seq
);
1239 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1242 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1243 * vcpu_enter_guest. This function is only called from
1244 * the physical CPU that is running vcpu.
1246 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1249 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1253 struct pvclock_wall_clock wc
;
1254 struct timespec64 boot
;
1259 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1264 ++version
; /* first time write, random junk */
1268 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1272 * The guest calculates current wall clock time by adding
1273 * system time (updated by kvm_guest_time_update below) to the
1274 * wall clock specified here. guest system time equals host
1275 * system time for us, thus we must fill in host boot time here.
1277 getboottime64(&boot
);
1279 if (kvm
->arch
.kvmclock_offset
) {
1280 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1281 boot
= timespec64_sub(boot
, ts
);
1283 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1284 wc
.nsec
= boot
.tv_nsec
;
1285 wc
.version
= version
;
1287 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1290 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1293 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1295 do_shl32_div32(dividend
, divisor
);
1299 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1300 s8
*pshift
, u32
*pmultiplier
)
1308 scaled64
= scaled_hz
;
1309 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1314 tps32
= (uint32_t)tps64
;
1315 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1316 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1324 *pmultiplier
= div_frac(scaled64
, tps32
);
1326 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1327 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1330 #ifdef CONFIG_X86_64
1331 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1334 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1335 static unsigned long max_tsc_khz
;
1337 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1339 u64 v
= (u64
)khz
* (1000000 + ppm
);
1344 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1348 /* Guest TSC same frequency as host TSC? */
1350 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1354 /* TSC scaling supported? */
1355 if (!kvm_has_tsc_control
) {
1356 if (user_tsc_khz
> tsc_khz
) {
1357 vcpu
->arch
.tsc_catchup
= 1;
1358 vcpu
->arch
.tsc_always_catchup
= 1;
1361 WARN(1, "user requested TSC rate below hardware speed\n");
1366 /* TSC scaling required - calculate ratio */
1367 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1368 user_tsc_khz
, tsc_khz
);
1370 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1371 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1376 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1380 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1382 u32 thresh_lo
, thresh_hi
;
1383 int use_scaling
= 0;
1385 /* tsc_khz can be zero if TSC calibration fails */
1386 if (user_tsc_khz
== 0) {
1387 /* set tsc_scaling_ratio to a safe value */
1388 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1392 /* Compute a scale to convert nanoseconds in TSC cycles */
1393 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1394 &vcpu
->arch
.virtual_tsc_shift
,
1395 &vcpu
->arch
.virtual_tsc_mult
);
1396 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1399 * Compute the variation in TSC rate which is acceptable
1400 * within the range of tolerance and decide if the
1401 * rate being applied is within that bounds of the hardware
1402 * rate. If so, no scaling or compensation need be done.
1404 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1405 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1406 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1407 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1410 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1413 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1415 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1416 vcpu
->arch
.virtual_tsc_mult
,
1417 vcpu
->arch
.virtual_tsc_shift
);
1418 tsc
+= vcpu
->arch
.this_tsc_write
;
1422 static inline int gtod_is_based_on_tsc(int mode
)
1424 return mode
== VCLOCK_TSC
|| mode
== VCLOCK_HVCLOCK
;
1427 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1429 #ifdef CONFIG_X86_64
1431 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1432 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1434 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1435 atomic_read(&vcpu
->kvm
->online_vcpus
));
1438 * Once the masterclock is enabled, always perform request in
1439 * order to update it.
1441 * In order to enable masterclock, the host clocksource must be TSC
1442 * and the vcpus need to have matched TSCs. When that happens,
1443 * perform request to enable masterclock.
1445 if (ka
->use_master_clock
||
1446 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
1447 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1449 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1450 atomic_read(&vcpu
->kvm
->online_vcpus
),
1451 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1455 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1457 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1458 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1462 * Multiply tsc by a fixed point number represented by ratio.
1464 * The most significant 64-N bits (mult) of ratio represent the
1465 * integral part of the fixed point number; the remaining N bits
1466 * (frac) represent the fractional part, ie. ratio represents a fixed
1467 * point number (mult + frac * 2^(-N)).
1469 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1471 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1473 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1476 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1479 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1481 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1482 _tsc
= __scale_tsc(ratio
, tsc
);
1486 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1488 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1492 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1494 return target_tsc
- tsc
;
1497 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1499 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1501 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1503 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1505 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1506 vcpu
->arch
.tsc_offset
= offset
;
1509 static inline bool kvm_check_tsc_unstable(void)
1511 #ifdef CONFIG_X86_64
1513 * TSC is marked unstable when we're running on Hyper-V,
1514 * 'TSC page' clocksource is good.
1516 if (pvclock_gtod_data
.clock
.vclock_mode
== VCLOCK_HVCLOCK
)
1519 return check_tsc_unstable();
1522 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1524 struct kvm
*kvm
= vcpu
->kvm
;
1525 u64 offset
, ns
, elapsed
;
1526 unsigned long flags
;
1528 bool already_matched
;
1529 u64 data
= msr
->data
;
1530 bool synchronizing
= false;
1532 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1533 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1534 ns
= ktime_get_boot_ns();
1535 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1537 if (vcpu
->arch
.virtual_tsc_khz
) {
1538 if (data
== 0 && msr
->host_initiated
) {
1540 * detection of vcpu initialization -- need to sync
1541 * with other vCPUs. This particularly helps to keep
1542 * kvm_clock stable after CPU hotplug
1544 synchronizing
= true;
1546 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1547 nsec_to_cycles(vcpu
, elapsed
);
1548 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1550 * Special case: TSC write with a small delta (1 second)
1551 * of virtual cycle time against real time is
1552 * interpreted as an attempt to synchronize the CPU.
1554 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1555 data
+ tsc_hz
> tsc_exp
;
1560 * For a reliable TSC, we can match TSC offsets, and for an unstable
1561 * TSC, we add elapsed time in this computation. We could let the
1562 * compensation code attempt to catch up if we fall behind, but
1563 * it's better to try to match offsets from the beginning.
1565 if (synchronizing
&&
1566 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1567 if (!kvm_check_tsc_unstable()) {
1568 offset
= kvm
->arch
.cur_tsc_offset
;
1569 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1571 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1573 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1574 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1577 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1580 * We split periods of matched TSC writes into generations.
1581 * For each generation, we track the original measured
1582 * nanosecond time, offset, and write, so if TSCs are in
1583 * sync, we can match exact offset, and if not, we can match
1584 * exact software computation in compute_guest_tsc()
1586 * These values are tracked in kvm->arch.cur_xxx variables.
1588 kvm
->arch
.cur_tsc_generation
++;
1589 kvm
->arch
.cur_tsc_nsec
= ns
;
1590 kvm
->arch
.cur_tsc_write
= data
;
1591 kvm
->arch
.cur_tsc_offset
= offset
;
1593 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1594 kvm
->arch
.cur_tsc_generation
, data
);
1598 * We also track th most recent recorded KHZ, write and time to
1599 * allow the matching interval to be extended at each write.
1601 kvm
->arch
.last_tsc_nsec
= ns
;
1602 kvm
->arch
.last_tsc_write
= data
;
1603 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1605 vcpu
->arch
.last_guest_tsc
= data
;
1607 /* Keep track of which generation this VCPU has synchronized to */
1608 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1609 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1610 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1612 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1613 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1615 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1616 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1618 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1620 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1621 } else if (!already_matched
) {
1622 kvm
->arch
.nr_vcpus_matched_tsc
++;
1625 kvm_track_tsc_matching(vcpu
);
1626 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1629 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1631 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1634 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1637 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1639 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1640 WARN_ON(adjustment
< 0);
1641 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1642 adjust_tsc_offset_guest(vcpu
, adjustment
);
1645 #ifdef CONFIG_X86_64
1647 static u64
read_tsc(void)
1649 u64 ret
= (u64
)rdtsc_ordered();
1650 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1652 if (likely(ret
>= last
))
1656 * GCC likes to generate cmov here, but this branch is extremely
1657 * predictable (it's just a function of time and the likely is
1658 * very likely) and there's a data dependence, so force GCC
1659 * to generate a branch instead. I don't barrier() because
1660 * we don't actually need a barrier, and if this function
1661 * ever gets inlined it will generate worse code.
1667 static inline u64
vgettsc(u64
*tsc_timestamp
, int *mode
)
1670 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1673 switch (gtod
->clock
.vclock_mode
) {
1674 case VCLOCK_HVCLOCK
:
1675 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
1677 if (tsc_pg_val
!= U64_MAX
) {
1678 /* TSC page valid */
1679 *mode
= VCLOCK_HVCLOCK
;
1680 v
= (tsc_pg_val
- gtod
->clock
.cycle_last
) &
1683 /* TSC page invalid */
1684 *mode
= VCLOCK_NONE
;
1689 *tsc_timestamp
= read_tsc();
1690 v
= (*tsc_timestamp
- gtod
->clock
.cycle_last
) &
1694 *mode
= VCLOCK_NONE
;
1697 if (*mode
== VCLOCK_NONE
)
1698 *tsc_timestamp
= v
= 0;
1700 return v
* gtod
->clock
.mult
;
1703 static int do_monotonic_boot(s64
*t
, u64
*tsc_timestamp
)
1705 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1711 seq
= read_seqcount_begin(>od
->seq
);
1712 ns
= gtod
->nsec_base
;
1713 ns
+= vgettsc(tsc_timestamp
, &mode
);
1714 ns
>>= gtod
->clock
.shift
;
1715 ns
+= gtod
->boot_ns
;
1716 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1722 static int do_realtime(struct timespec
*ts
, u64
*tsc_timestamp
)
1724 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1730 seq
= read_seqcount_begin(>od
->seq
);
1731 ts
->tv_sec
= gtod
->wall_time_sec
;
1732 ns
= gtod
->nsec_base
;
1733 ns
+= vgettsc(tsc_timestamp
, &mode
);
1734 ns
>>= gtod
->clock
.shift
;
1735 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1737 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1743 /* returns true if host is using TSC based clocksource */
1744 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
1746 /* checked again under seqlock below */
1747 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
1750 return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns
,
1754 /* returns true if host is using TSC based clocksource */
1755 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1758 /* checked again under seqlock below */
1759 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
1762 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
1768 * Assuming a stable TSC across physical CPUS, and a stable TSC
1769 * across virtual CPUs, the following condition is possible.
1770 * Each numbered line represents an event visible to both
1771 * CPUs at the next numbered event.
1773 * "timespecX" represents host monotonic time. "tscX" represents
1776 * VCPU0 on CPU0 | VCPU1 on CPU1
1778 * 1. read timespec0,tsc0
1779 * 2. | timespec1 = timespec0 + N
1781 * 3. transition to guest | transition to guest
1782 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1783 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1784 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1786 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1789 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1791 * - 0 < N - M => M < N
1793 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1794 * always the case (the difference between two distinct xtime instances
1795 * might be smaller then the difference between corresponding TSC reads,
1796 * when updating guest vcpus pvclock areas).
1798 * To avoid that problem, do not allow visibility of distinct
1799 * system_timestamp/tsc_timestamp values simultaneously: use a master
1800 * copy of host monotonic time values. Update that master copy
1803 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1807 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1809 #ifdef CONFIG_X86_64
1810 struct kvm_arch
*ka
= &kvm
->arch
;
1812 bool host_tsc_clocksource
, vcpus_matched
;
1814 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1815 atomic_read(&kvm
->online_vcpus
));
1818 * If the host uses TSC clock, then passthrough TSC as stable
1821 host_tsc_clocksource
= kvm_get_time_and_clockread(
1822 &ka
->master_kernel_ns
,
1823 &ka
->master_cycle_now
);
1825 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1826 && !ka
->backwards_tsc_observed
1827 && !ka
->boot_vcpu_runs_old_kvmclock
;
1829 if (ka
->use_master_clock
)
1830 atomic_set(&kvm_guest_has_master_clock
, 1);
1832 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1833 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1838 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1840 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1843 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1845 #ifdef CONFIG_X86_64
1847 struct kvm_vcpu
*vcpu
;
1848 struct kvm_arch
*ka
= &kvm
->arch
;
1850 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1851 kvm_make_mclock_inprogress_request(kvm
);
1852 /* no guest entries from this point */
1853 pvclock_update_vm_gtod_copy(kvm
);
1855 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1856 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1858 /* guest entries allowed */
1859 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1860 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1862 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1866 u64
get_kvmclock_ns(struct kvm
*kvm
)
1868 struct kvm_arch
*ka
= &kvm
->arch
;
1869 struct pvclock_vcpu_time_info hv_clock
;
1872 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1873 if (!ka
->use_master_clock
) {
1874 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1875 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1878 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1879 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1880 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1882 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1885 if (__this_cpu_read(cpu_tsc_khz
)) {
1886 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1887 &hv_clock
.tsc_shift
,
1888 &hv_clock
.tsc_to_system_mul
);
1889 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1891 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1898 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1900 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1901 struct pvclock_vcpu_time_info guest_hv_clock
;
1903 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1904 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1907 /* This VCPU is paused, but it's legal for a guest to read another
1908 * VCPU's kvmclock, so we really have to follow the specification where
1909 * it says that version is odd if data is being modified, and even after
1912 * Version field updates must be kept separate. This is because
1913 * kvm_write_guest_cached might use a "rep movs" instruction, and
1914 * writes within a string instruction are weakly ordered. So there
1915 * are three writes overall.
1917 * As a small optimization, only write the version field in the first
1918 * and third write. The vcpu->pv_time cache is still valid, because the
1919 * version field is the first in the struct.
1921 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1923 if (guest_hv_clock
.version
& 1)
1924 ++guest_hv_clock
.version
; /* first time write, random junk */
1926 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1927 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1929 sizeof(vcpu
->hv_clock
.version
));
1933 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1934 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1936 if (vcpu
->pvclock_set_guest_stopped_request
) {
1937 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1938 vcpu
->pvclock_set_guest_stopped_request
= false;
1941 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1943 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1945 sizeof(vcpu
->hv_clock
));
1949 vcpu
->hv_clock
.version
++;
1950 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1952 sizeof(vcpu
->hv_clock
.version
));
1955 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1957 unsigned long flags
, tgt_tsc_khz
;
1958 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1959 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1961 u64 tsc_timestamp
, host_tsc
;
1963 bool use_master_clock
;
1969 * If the host uses TSC clock, then passthrough TSC as stable
1972 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1973 use_master_clock
= ka
->use_master_clock
;
1974 if (use_master_clock
) {
1975 host_tsc
= ka
->master_cycle_now
;
1976 kernel_ns
= ka
->master_kernel_ns
;
1978 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1980 /* Keep irq disabled to prevent changes to the clock */
1981 local_irq_save(flags
);
1982 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1983 if (unlikely(tgt_tsc_khz
== 0)) {
1984 local_irq_restore(flags
);
1985 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1988 if (!use_master_clock
) {
1990 kernel_ns
= ktime_get_boot_ns();
1993 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1996 * We may have to catch up the TSC to match elapsed wall clock
1997 * time for two reasons, even if kvmclock is used.
1998 * 1) CPU could have been running below the maximum TSC rate
1999 * 2) Broken TSC compensation resets the base at each VCPU
2000 * entry to avoid unknown leaps of TSC even when running
2001 * again on the same CPU. This may cause apparent elapsed
2002 * time to disappear, and the guest to stand still or run
2005 if (vcpu
->tsc_catchup
) {
2006 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2007 if (tsc
> tsc_timestamp
) {
2008 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2009 tsc_timestamp
= tsc
;
2013 local_irq_restore(flags
);
2015 /* With all the info we got, fill in the values */
2017 if (kvm_has_tsc_control
)
2018 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2020 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2021 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2022 &vcpu
->hv_clock
.tsc_shift
,
2023 &vcpu
->hv_clock
.tsc_to_system_mul
);
2024 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2027 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2028 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2029 vcpu
->last_guest_tsc
= tsc_timestamp
;
2031 /* If the host uses TSC clocksource, then it is stable */
2033 if (use_master_clock
)
2034 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2036 vcpu
->hv_clock
.flags
= pvclock_flags
;
2038 if (vcpu
->pv_time_enabled
)
2039 kvm_setup_pvclock_page(v
);
2040 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2041 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2046 * kvmclock updates which are isolated to a given vcpu, such as
2047 * vcpu->cpu migration, should not allow system_timestamp from
2048 * the rest of the vcpus to remain static. Otherwise ntp frequency
2049 * correction applies to one vcpu's system_timestamp but not
2052 * So in those cases, request a kvmclock update for all vcpus.
2053 * We need to rate-limit these requests though, as they can
2054 * considerably slow guests that have a large number of vcpus.
2055 * The time for a remote vcpu to update its kvmclock is bound
2056 * by the delay we use to rate-limit the updates.
2059 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2061 static void kvmclock_update_fn(struct work_struct
*work
)
2064 struct delayed_work
*dwork
= to_delayed_work(work
);
2065 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2066 kvmclock_update_work
);
2067 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2068 struct kvm_vcpu
*vcpu
;
2070 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2071 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2072 kvm_vcpu_kick(vcpu
);
2076 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2078 struct kvm
*kvm
= v
->kvm
;
2080 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2081 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2082 KVMCLOCK_UPDATE_DELAY
);
2085 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2087 static void kvmclock_sync_fn(struct work_struct
*work
)
2089 struct delayed_work
*dwork
= to_delayed_work(work
);
2090 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2091 kvmclock_sync_work
);
2092 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2094 if (!kvmclock_periodic_sync
)
2097 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2098 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2099 KVMCLOCK_SYNC_PERIOD
);
2102 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2104 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2105 unsigned bank_num
= mcg_cap
& 0xff;
2106 u32 msr
= msr_info
->index
;
2107 u64 data
= msr_info
->data
;
2110 case MSR_IA32_MCG_STATUS
:
2111 vcpu
->arch
.mcg_status
= data
;
2113 case MSR_IA32_MCG_CTL
:
2114 if (!(mcg_cap
& MCG_CTL_P
))
2116 if (data
!= 0 && data
!= ~(u64
)0)
2118 vcpu
->arch
.mcg_ctl
= data
;
2121 if (msr
>= MSR_IA32_MC0_CTL
&&
2122 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2123 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2124 /* only 0 or all 1s can be written to IA32_MCi_CTL
2125 * some Linux kernels though clear bit 10 in bank 4 to
2126 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2127 * this to avoid an uncatched #GP in the guest
2129 if ((offset
& 0x3) == 0 &&
2130 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2132 if (!msr_info
->host_initiated
&&
2133 (offset
& 0x3) == 1 && data
!= 0)
2135 vcpu
->arch
.mce_banks
[offset
] = data
;
2143 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2145 struct kvm
*kvm
= vcpu
->kvm
;
2146 int lm
= is_long_mode(vcpu
);
2147 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2148 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2149 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2150 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2151 u32 page_num
= data
& ~PAGE_MASK
;
2152 u64 page_addr
= data
& PAGE_MASK
;
2157 if (page_num
>= blob_size
)
2160 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2165 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2174 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2176 gpa_t gpa
= data
& ~0x3f;
2178 /* Bits 3:5 are reserved, Should be zero */
2182 vcpu
->arch
.apf
.msr_val
= data
;
2184 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2185 kvm_clear_async_pf_completion_queue(vcpu
);
2186 kvm_async_pf_hash_reset(vcpu
);
2190 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2194 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2195 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2196 kvm_async_pf_wakeup_all(vcpu
);
2200 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2202 vcpu
->arch
.pv_time_enabled
= false;
2205 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
, bool invalidate_gpa
)
2207 ++vcpu
->stat
.tlb_flush
;
2208 kvm_x86_ops
->tlb_flush(vcpu
, invalidate_gpa
);
2211 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2213 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2216 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2217 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2221 * Doing a TLB flush here, on the guest's behalf, can avoid
2224 if (xchg(&vcpu
->arch
.st
.steal
.preempted
, 0) & KVM_VCPU_FLUSH_TLB
)
2225 kvm_vcpu_flush_tlb(vcpu
, false);
2227 if (vcpu
->arch
.st
.steal
.version
& 1)
2228 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2230 vcpu
->arch
.st
.steal
.version
+= 1;
2232 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2233 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2237 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2238 vcpu
->arch
.st
.last_steal
;
2239 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2241 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2242 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2246 vcpu
->arch
.st
.steal
.version
+= 1;
2248 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2249 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2252 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2255 u32 msr
= msr_info
->index
;
2256 u64 data
= msr_info
->data
;
2259 case MSR_AMD64_NB_CFG
:
2260 case MSR_IA32_UCODE_REV
:
2261 case MSR_IA32_UCODE_WRITE
:
2262 case MSR_VM_HSAVE_PA
:
2263 case MSR_AMD64_PATCH_LOADER
:
2264 case MSR_AMD64_BU_CFG2
:
2265 case MSR_AMD64_DC_CFG
:
2269 return set_efer(vcpu
, data
);
2271 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2272 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2273 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2274 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2276 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2281 case MSR_FAM10H_MMIO_CONF_BASE
:
2283 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2288 case MSR_IA32_DEBUGCTLMSR
:
2290 /* We support the non-activated case already */
2292 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2293 /* Values other than LBR and BTF are vendor-specific,
2294 thus reserved and should throw a #GP */
2297 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2300 case 0x200 ... 0x2ff:
2301 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2302 case MSR_IA32_APICBASE
:
2303 return kvm_set_apic_base(vcpu
, msr_info
);
2304 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2305 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2306 case MSR_IA32_TSCDEADLINE
:
2307 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2309 case MSR_IA32_TSC_ADJUST
:
2310 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2311 if (!msr_info
->host_initiated
) {
2312 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2313 adjust_tsc_offset_guest(vcpu
, adj
);
2315 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2318 case MSR_IA32_MISC_ENABLE
:
2319 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2321 case MSR_IA32_SMBASE
:
2322 if (!msr_info
->host_initiated
)
2324 vcpu
->arch
.smbase
= data
;
2327 if (!msr_info
->host_initiated
)
2329 vcpu
->arch
.smi_count
= data
;
2331 case MSR_KVM_WALL_CLOCK_NEW
:
2332 case MSR_KVM_WALL_CLOCK
:
2333 vcpu
->kvm
->arch
.wall_clock
= data
;
2334 kvm_write_wall_clock(vcpu
->kvm
, data
);
2336 case MSR_KVM_SYSTEM_TIME_NEW
:
2337 case MSR_KVM_SYSTEM_TIME
: {
2338 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2340 kvmclock_reset(vcpu
);
2342 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2343 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2345 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2346 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2348 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2351 vcpu
->arch
.time
= data
;
2352 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2354 /* we verify if the enable bit is set... */
2358 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2359 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2360 sizeof(struct pvclock_vcpu_time_info
)))
2361 vcpu
->arch
.pv_time_enabled
= false;
2363 vcpu
->arch
.pv_time_enabled
= true;
2367 case MSR_KVM_ASYNC_PF_EN
:
2368 if (kvm_pv_enable_async_pf(vcpu
, data
))
2371 case MSR_KVM_STEAL_TIME
:
2373 if (unlikely(!sched_info_on()))
2376 if (data
& KVM_STEAL_RESERVED_MASK
)
2379 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2380 data
& KVM_STEAL_VALID_BITS
,
2381 sizeof(struct kvm_steal_time
)))
2384 vcpu
->arch
.st
.msr_val
= data
;
2386 if (!(data
& KVM_MSR_ENABLED
))
2389 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2392 case MSR_KVM_PV_EOI_EN
:
2393 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2397 case MSR_IA32_MCG_CTL
:
2398 case MSR_IA32_MCG_STATUS
:
2399 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2400 return set_msr_mce(vcpu
, msr_info
);
2402 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2403 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2404 pr
= true; /* fall through */
2405 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2406 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2407 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2408 return kvm_pmu_set_msr(vcpu
, msr_info
);
2410 if (pr
|| data
!= 0)
2411 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2412 "0x%x data 0x%llx\n", msr
, data
);
2414 case MSR_K7_CLK_CTL
:
2416 * Ignore all writes to this no longer documented MSR.
2417 * Writes are only relevant for old K7 processors,
2418 * all pre-dating SVM, but a recommended workaround from
2419 * AMD for these chips. It is possible to specify the
2420 * affected processor models on the command line, hence
2421 * the need to ignore the workaround.
2424 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2425 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2426 case HV_X64_MSR_CRASH_CTL
:
2427 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2428 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2429 msr_info
->host_initiated
);
2430 case MSR_IA32_BBL_CR_CTL3
:
2431 /* Drop writes to this legacy MSR -- see rdmsr
2432 * counterpart for further detail.
2434 if (report_ignored_msrs
)
2435 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2438 case MSR_AMD64_OSVW_ID_LENGTH
:
2439 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2441 vcpu
->arch
.osvw
.length
= data
;
2443 case MSR_AMD64_OSVW_STATUS
:
2444 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2446 vcpu
->arch
.osvw
.status
= data
;
2448 case MSR_PLATFORM_INFO
:
2449 if (!msr_info
->host_initiated
||
2450 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2451 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2452 cpuid_fault_enabled(vcpu
)))
2454 vcpu
->arch
.msr_platform_info
= data
;
2456 case MSR_MISC_FEATURES_ENABLES
:
2457 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2458 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2459 !supports_cpuid_fault(vcpu
)))
2461 vcpu
->arch
.msr_misc_features_enables
= data
;
2464 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2465 return xen_hvm_config(vcpu
, data
);
2466 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2467 return kvm_pmu_set_msr(vcpu
, msr_info
);
2469 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2473 if (report_ignored_msrs
)
2475 "ignored wrmsr: 0x%x data 0x%llx\n",
2482 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2486 * Reads an msr value (of 'msr_index') into 'pdata'.
2487 * Returns 0 on success, non-0 otherwise.
2488 * Assumes vcpu_load() was already called.
2490 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2492 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2494 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2496 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2499 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2500 unsigned bank_num
= mcg_cap
& 0xff;
2503 case MSR_IA32_P5_MC_ADDR
:
2504 case MSR_IA32_P5_MC_TYPE
:
2507 case MSR_IA32_MCG_CAP
:
2508 data
= vcpu
->arch
.mcg_cap
;
2510 case MSR_IA32_MCG_CTL
:
2511 if (!(mcg_cap
& MCG_CTL_P
))
2513 data
= vcpu
->arch
.mcg_ctl
;
2515 case MSR_IA32_MCG_STATUS
:
2516 data
= vcpu
->arch
.mcg_status
;
2519 if (msr
>= MSR_IA32_MC0_CTL
&&
2520 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2521 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2522 data
= vcpu
->arch
.mce_banks
[offset
];
2531 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2533 switch (msr_info
->index
) {
2534 case MSR_IA32_PLATFORM_ID
:
2535 case MSR_IA32_EBL_CR_POWERON
:
2536 case MSR_IA32_DEBUGCTLMSR
:
2537 case MSR_IA32_LASTBRANCHFROMIP
:
2538 case MSR_IA32_LASTBRANCHTOIP
:
2539 case MSR_IA32_LASTINTFROMIP
:
2540 case MSR_IA32_LASTINTTOIP
:
2542 case MSR_K8_TSEG_ADDR
:
2543 case MSR_K8_TSEG_MASK
:
2545 case MSR_VM_HSAVE_PA
:
2546 case MSR_K8_INT_PENDING_MSG
:
2547 case MSR_AMD64_NB_CFG
:
2548 case MSR_FAM10H_MMIO_CONF_BASE
:
2549 case MSR_AMD64_BU_CFG2
:
2550 case MSR_IA32_PERF_CTL
:
2551 case MSR_AMD64_DC_CFG
:
2554 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2555 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2556 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2557 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2558 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2559 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2562 case MSR_IA32_UCODE_REV
:
2563 msr_info
->data
= 0x100000000ULL
;
2566 case 0x200 ... 0x2ff:
2567 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2568 case 0xcd: /* fsb frequency */
2572 * MSR_EBC_FREQUENCY_ID
2573 * Conservative value valid for even the basic CPU models.
2574 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2575 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2576 * and 266MHz for model 3, or 4. Set Core Clock
2577 * Frequency to System Bus Frequency Ratio to 1 (bits
2578 * 31:24) even though these are only valid for CPU
2579 * models > 2, however guests may end up dividing or
2580 * multiplying by zero otherwise.
2582 case MSR_EBC_FREQUENCY_ID
:
2583 msr_info
->data
= 1 << 24;
2585 case MSR_IA32_APICBASE
:
2586 msr_info
->data
= kvm_get_apic_base(vcpu
);
2588 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2589 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2591 case MSR_IA32_TSCDEADLINE
:
2592 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2594 case MSR_IA32_TSC_ADJUST
:
2595 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2597 case MSR_IA32_MISC_ENABLE
:
2598 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2600 case MSR_IA32_SMBASE
:
2601 if (!msr_info
->host_initiated
)
2603 msr_info
->data
= vcpu
->arch
.smbase
;
2606 msr_info
->data
= vcpu
->arch
.smi_count
;
2608 case MSR_IA32_PERF_STATUS
:
2609 /* TSC increment by tick */
2610 msr_info
->data
= 1000ULL;
2611 /* CPU multiplier */
2612 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2615 msr_info
->data
= vcpu
->arch
.efer
;
2617 case MSR_KVM_WALL_CLOCK
:
2618 case MSR_KVM_WALL_CLOCK_NEW
:
2619 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2621 case MSR_KVM_SYSTEM_TIME
:
2622 case MSR_KVM_SYSTEM_TIME_NEW
:
2623 msr_info
->data
= vcpu
->arch
.time
;
2625 case MSR_KVM_ASYNC_PF_EN
:
2626 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2628 case MSR_KVM_STEAL_TIME
:
2629 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2631 case MSR_KVM_PV_EOI_EN
:
2632 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2634 case MSR_IA32_P5_MC_ADDR
:
2635 case MSR_IA32_P5_MC_TYPE
:
2636 case MSR_IA32_MCG_CAP
:
2637 case MSR_IA32_MCG_CTL
:
2638 case MSR_IA32_MCG_STATUS
:
2639 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2640 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2641 case MSR_K7_CLK_CTL
:
2643 * Provide expected ramp-up count for K7. All other
2644 * are set to zero, indicating minimum divisors for
2647 * This prevents guest kernels on AMD host with CPU
2648 * type 6, model 8 and higher from exploding due to
2649 * the rdmsr failing.
2651 msr_info
->data
= 0x20000000;
2653 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2654 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2655 case HV_X64_MSR_CRASH_CTL
:
2656 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2657 return kvm_hv_get_msr_common(vcpu
,
2658 msr_info
->index
, &msr_info
->data
);
2660 case MSR_IA32_BBL_CR_CTL3
:
2661 /* This legacy MSR exists but isn't fully documented in current
2662 * silicon. It is however accessed by winxp in very narrow
2663 * scenarios where it sets bit #19, itself documented as
2664 * a "reserved" bit. Best effort attempt to source coherent
2665 * read data here should the balance of the register be
2666 * interpreted by the guest:
2668 * L2 cache control register 3: 64GB range, 256KB size,
2669 * enabled, latency 0x1, configured
2671 msr_info
->data
= 0xbe702111;
2673 case MSR_AMD64_OSVW_ID_LENGTH
:
2674 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2676 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2678 case MSR_AMD64_OSVW_STATUS
:
2679 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2681 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2683 case MSR_PLATFORM_INFO
:
2684 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2686 case MSR_MISC_FEATURES_ENABLES
:
2687 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2690 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2691 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2693 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2697 if (report_ignored_msrs
)
2698 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2706 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2709 * Read or write a bunch of msrs. All parameters are kernel addresses.
2711 * @return number of msrs set successfully.
2713 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2714 struct kvm_msr_entry
*entries
,
2715 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2716 unsigned index
, u64
*data
))
2720 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2721 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2728 * Read or write a bunch of msrs. Parameters are user addresses.
2730 * @return number of msrs set successfully.
2732 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2733 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2734 unsigned index
, u64
*data
),
2737 struct kvm_msrs msrs
;
2738 struct kvm_msr_entry
*entries
;
2743 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2747 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2750 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2751 entries
= memdup_user(user_msrs
->entries
, size
);
2752 if (IS_ERR(entries
)) {
2753 r
= PTR_ERR(entries
);
2757 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2762 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2773 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2778 case KVM_CAP_IRQCHIP
:
2780 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2781 case KVM_CAP_SET_TSS_ADDR
:
2782 case KVM_CAP_EXT_CPUID
:
2783 case KVM_CAP_EXT_EMUL_CPUID
:
2784 case KVM_CAP_CLOCKSOURCE
:
2786 case KVM_CAP_NOP_IO_DELAY
:
2787 case KVM_CAP_MP_STATE
:
2788 case KVM_CAP_SYNC_MMU
:
2789 case KVM_CAP_USER_NMI
:
2790 case KVM_CAP_REINJECT_CONTROL
:
2791 case KVM_CAP_IRQ_INJECT_STATUS
:
2792 case KVM_CAP_IOEVENTFD
:
2793 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2795 case KVM_CAP_PIT_STATE2
:
2796 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2797 case KVM_CAP_XEN_HVM
:
2798 case KVM_CAP_VCPU_EVENTS
:
2799 case KVM_CAP_HYPERV
:
2800 case KVM_CAP_HYPERV_VAPIC
:
2801 case KVM_CAP_HYPERV_SPIN
:
2802 case KVM_CAP_HYPERV_SYNIC
:
2803 case KVM_CAP_HYPERV_SYNIC2
:
2804 case KVM_CAP_HYPERV_VP_INDEX
:
2805 case KVM_CAP_PCI_SEGMENT
:
2806 case KVM_CAP_DEBUGREGS
:
2807 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2809 case KVM_CAP_ASYNC_PF
:
2810 case KVM_CAP_GET_TSC_KHZ
:
2811 case KVM_CAP_KVMCLOCK_CTRL
:
2812 case KVM_CAP_READONLY_MEM
:
2813 case KVM_CAP_HYPERV_TIME
:
2814 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2815 case KVM_CAP_TSC_DEADLINE_TIMER
:
2816 case KVM_CAP_ENABLE_CAP_VM
:
2817 case KVM_CAP_DISABLE_QUIRKS
:
2818 case KVM_CAP_SET_BOOT_CPU_ID
:
2819 case KVM_CAP_SPLIT_IRQCHIP
:
2820 case KVM_CAP_IMMEDIATE_EXIT
:
2821 case KVM_CAP_GET_MSR_FEATURES
:
2824 case KVM_CAP_ADJUST_CLOCK
:
2825 r
= KVM_CLOCK_TSC_STABLE
;
2827 case KVM_CAP_X86_GUEST_MWAIT
:
2828 r
= kvm_mwait_in_guest();
2830 case KVM_CAP_X86_SMM
:
2831 /* SMBASE is usually relocated above 1M on modern chipsets,
2832 * and SMM handlers might indeed rely on 4G segment limits,
2833 * so do not report SMM to be available if real mode is
2834 * emulated via vm86 mode. Still, do not go to great lengths
2835 * to avoid userspace's usage of the feature, because it is a
2836 * fringe case that is not enabled except via specific settings
2837 * of the module parameters.
2839 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2842 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2844 case KVM_CAP_NR_VCPUS
:
2845 r
= KVM_SOFT_MAX_VCPUS
;
2847 case KVM_CAP_MAX_VCPUS
:
2850 case KVM_CAP_NR_MEMSLOTS
:
2851 r
= KVM_USER_MEM_SLOTS
;
2853 case KVM_CAP_PV_MMU
: /* obsolete */
2857 r
= KVM_MAX_MCE_BANKS
;
2860 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2862 case KVM_CAP_TSC_CONTROL
:
2863 r
= kvm_has_tsc_control
;
2865 case KVM_CAP_X2APIC_API
:
2866 r
= KVM_X2APIC_API_VALID_FLAGS
;
2876 long kvm_arch_dev_ioctl(struct file
*filp
,
2877 unsigned int ioctl
, unsigned long arg
)
2879 void __user
*argp
= (void __user
*)arg
;
2883 case KVM_GET_MSR_INDEX_LIST
: {
2884 struct kvm_msr_list __user
*user_msr_list
= argp
;
2885 struct kvm_msr_list msr_list
;
2889 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2892 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2893 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2896 if (n
< msr_list
.nmsrs
)
2899 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2900 num_msrs_to_save
* sizeof(u32
)))
2902 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2904 num_emulated_msrs
* sizeof(u32
)))
2909 case KVM_GET_SUPPORTED_CPUID
:
2910 case KVM_GET_EMULATED_CPUID
: {
2911 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2912 struct kvm_cpuid2 cpuid
;
2915 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2918 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2924 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2929 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2931 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2932 sizeof(kvm_mce_cap_supported
)))
2936 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
2937 struct kvm_msr_list __user
*user_msr_list
= argp
;
2938 struct kvm_msr_list msr_list
;
2942 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
2945 msr_list
.nmsrs
= num_msr_based_features
;
2946 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
2949 if (n
< msr_list
.nmsrs
)
2952 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
2953 num_msr_based_features
* sizeof(u32
)))
2959 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
2969 static void wbinvd_ipi(void *garbage
)
2974 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2976 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2979 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2981 /* Address WBINVD may be executed by guest */
2982 if (need_emulate_wbinvd(vcpu
)) {
2983 if (kvm_x86_ops
->has_wbinvd_exit())
2984 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2985 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2986 smp_call_function_single(vcpu
->cpu
,
2987 wbinvd_ipi
, NULL
, 1);
2990 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2992 /* Apply any externally detected TSC adjustments (due to suspend) */
2993 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2994 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2995 vcpu
->arch
.tsc_offset_adjustment
= 0;
2996 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2999 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
3000 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3001 rdtsc() - vcpu
->arch
.last_host_tsc
;
3003 mark_tsc_unstable("KVM discovered backwards TSC");
3005 if (kvm_check_tsc_unstable()) {
3006 u64 offset
= kvm_compute_tsc_offset(vcpu
,
3007 vcpu
->arch
.last_guest_tsc
);
3008 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
3009 vcpu
->arch
.tsc_catchup
= 1;
3012 if (kvm_lapic_hv_timer_in_use(vcpu
))
3013 kvm_lapic_restart_hv_timer(vcpu
);
3016 * On a host with synchronized TSC, there is no need to update
3017 * kvmclock on vcpu->cpu migration
3019 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
3020 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
3021 if (vcpu
->cpu
!= cpu
)
3022 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
3026 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3029 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
3031 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3034 vcpu
->arch
.st
.steal
.preempted
= KVM_VCPU_PREEMPTED
;
3036 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
3037 &vcpu
->arch
.st
.steal
.preempted
,
3038 offsetof(struct kvm_steal_time
, preempted
),
3039 sizeof(vcpu
->arch
.st
.steal
.preempted
));
3042 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3046 if (vcpu
->preempted
)
3047 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
3050 * Disable page faults because we're in atomic context here.
3051 * kvm_write_guest_offset_cached() would call might_fault()
3052 * that relies on pagefault_disable() to tell if there's a
3053 * bug. NOTE: the write to guest memory may not go through if
3054 * during postcopy live migration or if there's heavy guest
3057 pagefault_disable();
3059 * kvm_memslots() will be called by
3060 * kvm_write_guest_offset_cached() so take the srcu lock.
3062 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3063 kvm_steal_time_set_preempted(vcpu
);
3064 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3066 kvm_x86_ops
->vcpu_put(vcpu
);
3067 vcpu
->arch
.last_host_tsc
= rdtsc();
3069 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3070 * on every vmexit, but if not, we might have a stale dr6 from the
3071 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3076 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3077 struct kvm_lapic_state
*s
)
3079 if (vcpu
->arch
.apicv_active
)
3080 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3082 return kvm_apic_get_state(vcpu
, s
);
3085 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3086 struct kvm_lapic_state
*s
)
3090 r
= kvm_apic_set_state(vcpu
, s
);
3093 update_cr8_intercept(vcpu
);
3098 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3100 return (!lapic_in_kernel(vcpu
) ||
3101 kvm_apic_accept_pic_intr(vcpu
));
3105 * if userspace requested an interrupt window, check that the
3106 * interrupt window is open.
3108 * No need to exit to userspace if we already have an interrupt queued.
3110 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3112 return kvm_arch_interrupt_allowed(vcpu
) &&
3113 !kvm_cpu_has_interrupt(vcpu
) &&
3114 !kvm_event_needs_reinjection(vcpu
) &&
3115 kvm_cpu_accept_dm_intr(vcpu
);
3118 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3119 struct kvm_interrupt
*irq
)
3121 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3124 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3125 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3126 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3131 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3132 * fail for in-kernel 8259.
3134 if (pic_in_kernel(vcpu
->kvm
))
3137 if (vcpu
->arch
.pending_external_vector
!= -1)
3140 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3141 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3145 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3147 kvm_inject_nmi(vcpu
);
3152 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3154 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3159 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3160 struct kvm_tpr_access_ctl
*tac
)
3164 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3168 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3172 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3175 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3177 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3180 vcpu
->arch
.mcg_cap
= mcg_cap
;
3181 /* Init IA32_MCG_CTL to all 1s */
3182 if (mcg_cap
& MCG_CTL_P
)
3183 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3184 /* Init IA32_MCi_CTL to all 1s */
3185 for (bank
= 0; bank
< bank_num
; bank
++)
3186 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3188 if (kvm_x86_ops
->setup_mce
)
3189 kvm_x86_ops
->setup_mce(vcpu
);
3194 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3195 struct kvm_x86_mce
*mce
)
3197 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3198 unsigned bank_num
= mcg_cap
& 0xff;
3199 u64
*banks
= vcpu
->arch
.mce_banks
;
3201 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3204 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3205 * reporting is disabled
3207 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3208 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3210 banks
+= 4 * mce
->bank
;
3212 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3213 * reporting is disabled for the bank
3215 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3217 if (mce
->status
& MCI_STATUS_UC
) {
3218 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3219 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3220 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3223 if (banks
[1] & MCI_STATUS_VAL
)
3224 mce
->status
|= MCI_STATUS_OVER
;
3225 banks
[2] = mce
->addr
;
3226 banks
[3] = mce
->misc
;
3227 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3228 banks
[1] = mce
->status
;
3229 kvm_queue_exception(vcpu
, MC_VECTOR
);
3230 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3231 || !(banks
[1] & MCI_STATUS_UC
)) {
3232 if (banks
[1] & MCI_STATUS_VAL
)
3233 mce
->status
|= MCI_STATUS_OVER
;
3234 banks
[2] = mce
->addr
;
3235 banks
[3] = mce
->misc
;
3236 banks
[1] = mce
->status
;
3238 banks
[1] |= MCI_STATUS_OVER
;
3242 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3243 struct kvm_vcpu_events
*events
)
3247 * FIXME: pass injected and pending separately. This is only
3248 * needed for nested virtualization, whose state cannot be
3249 * migrated yet. For now we can combine them.
3251 events
->exception
.injected
=
3252 (vcpu
->arch
.exception
.pending
||
3253 vcpu
->arch
.exception
.injected
) &&
3254 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3255 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3256 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3257 events
->exception
.pad
= 0;
3258 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3260 events
->interrupt
.injected
=
3261 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3262 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3263 events
->interrupt
.soft
= 0;
3264 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3266 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3267 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3268 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3269 events
->nmi
.pad
= 0;
3271 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3273 events
->smi
.smm
= is_smm(vcpu
);
3274 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3275 events
->smi
.smm_inside_nmi
=
3276 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3277 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3279 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3280 | KVM_VCPUEVENT_VALID_SHADOW
3281 | KVM_VCPUEVENT_VALID_SMM
);
3282 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3285 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3287 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3288 struct kvm_vcpu_events
*events
)
3290 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3291 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3292 | KVM_VCPUEVENT_VALID_SHADOW
3293 | KVM_VCPUEVENT_VALID_SMM
))
3296 if (events
->exception
.injected
&&
3297 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3298 is_guest_mode(vcpu
)))
3301 /* INITs are latched while in SMM */
3302 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3303 (events
->smi
.smm
|| events
->smi
.pending
) &&
3304 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3308 vcpu
->arch
.exception
.injected
= false;
3309 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3310 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3311 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3312 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3314 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3315 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3316 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3317 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3318 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3319 events
->interrupt
.shadow
);
3321 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3322 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3323 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3324 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3326 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3327 lapic_in_kernel(vcpu
))
3328 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3330 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3331 u32 hflags
= vcpu
->arch
.hflags
;
3332 if (events
->smi
.smm
)
3333 hflags
|= HF_SMM_MASK
;
3335 hflags
&= ~HF_SMM_MASK
;
3336 kvm_set_hflags(vcpu
, hflags
);
3338 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3340 if (events
->smi
.smm
) {
3341 if (events
->smi
.smm_inside_nmi
)
3342 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3344 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3345 if (lapic_in_kernel(vcpu
)) {
3346 if (events
->smi
.latched_init
)
3347 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3349 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3354 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3359 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3360 struct kvm_debugregs
*dbgregs
)
3364 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3365 kvm_get_dr(vcpu
, 6, &val
);
3367 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3369 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3372 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3373 struct kvm_debugregs
*dbgregs
)
3378 if (dbgregs
->dr6
& ~0xffffffffull
)
3380 if (dbgregs
->dr7
& ~0xffffffffull
)
3383 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3384 kvm_update_dr0123(vcpu
);
3385 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3386 kvm_update_dr6(vcpu
);
3387 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3388 kvm_update_dr7(vcpu
);
3393 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3395 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3397 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3398 u64 xstate_bv
= xsave
->header
.xfeatures
;
3402 * Copy legacy XSAVE area, to avoid complications with CPUID
3403 * leaves 0 and 1 in the loop below.
3405 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3408 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3409 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3412 * Copy each region from the possibly compacted offset to the
3413 * non-compacted offset.
3415 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3417 u64 feature
= valid
& -valid
;
3418 int index
= fls64(feature
) - 1;
3419 void *src
= get_xsave_addr(xsave
, feature
);
3422 u32 size
, offset
, ecx
, edx
;
3423 cpuid_count(XSTATE_CPUID
, index
,
3424 &size
, &offset
, &ecx
, &edx
);
3425 if (feature
== XFEATURE_MASK_PKRU
)
3426 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3427 sizeof(vcpu
->arch
.pkru
));
3429 memcpy(dest
+ offset
, src
, size
);
3437 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3439 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3440 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3444 * Copy legacy XSAVE area, to avoid complications with CPUID
3445 * leaves 0 and 1 in the loop below.
3447 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3449 /* Set XSTATE_BV and possibly XCOMP_BV. */
3450 xsave
->header
.xfeatures
= xstate_bv
;
3451 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3452 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3455 * Copy each region from the non-compacted offset to the
3456 * possibly compacted offset.
3458 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3460 u64 feature
= valid
& -valid
;
3461 int index
= fls64(feature
) - 1;
3462 void *dest
= get_xsave_addr(xsave
, feature
);
3465 u32 size
, offset
, ecx
, edx
;
3466 cpuid_count(XSTATE_CPUID
, index
,
3467 &size
, &offset
, &ecx
, &edx
);
3468 if (feature
== XFEATURE_MASK_PKRU
)
3469 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3470 sizeof(vcpu
->arch
.pkru
));
3472 memcpy(dest
, src
+ offset
, size
);
3479 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3480 struct kvm_xsave
*guest_xsave
)
3482 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3483 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3484 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3486 memcpy(guest_xsave
->region
,
3487 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3488 sizeof(struct fxregs_state
));
3489 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3490 XFEATURE_MASK_FPSSE
;
3494 #define XSAVE_MXCSR_OFFSET 24
3496 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3497 struct kvm_xsave
*guest_xsave
)
3500 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3501 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3503 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3505 * Here we allow setting states that are not present in
3506 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3507 * with old userspace.
3509 if (xstate_bv
& ~kvm_supported_xcr0() ||
3510 mxcsr
& ~mxcsr_feature_mask
)
3512 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3514 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3515 mxcsr
& ~mxcsr_feature_mask
)
3517 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3518 guest_xsave
->region
, sizeof(struct fxregs_state
));
3523 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3524 struct kvm_xcrs
*guest_xcrs
)
3526 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3527 guest_xcrs
->nr_xcrs
= 0;
3531 guest_xcrs
->nr_xcrs
= 1;
3532 guest_xcrs
->flags
= 0;
3533 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3534 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3537 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3538 struct kvm_xcrs
*guest_xcrs
)
3542 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3545 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3548 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3549 /* Only support XCR0 currently */
3550 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3551 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3552 guest_xcrs
->xcrs
[i
].value
);
3561 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3562 * stopped by the hypervisor. This function will be called from the host only.
3563 * EINVAL is returned when the host attempts to set the flag for a guest that
3564 * does not support pv clocks.
3566 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3568 if (!vcpu
->arch
.pv_time_enabled
)
3570 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3571 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3575 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3576 struct kvm_enable_cap
*cap
)
3582 case KVM_CAP_HYPERV_SYNIC2
:
3585 case KVM_CAP_HYPERV_SYNIC
:
3586 if (!irqchip_in_kernel(vcpu
->kvm
))
3588 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3589 KVM_CAP_HYPERV_SYNIC2
);
3595 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3596 unsigned int ioctl
, unsigned long arg
)
3598 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3599 void __user
*argp
= (void __user
*)arg
;
3602 struct kvm_lapic_state
*lapic
;
3603 struct kvm_xsave
*xsave
;
3604 struct kvm_xcrs
*xcrs
;
3612 case KVM_GET_LAPIC
: {
3614 if (!lapic_in_kernel(vcpu
))
3616 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3621 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3625 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3630 case KVM_SET_LAPIC
: {
3632 if (!lapic_in_kernel(vcpu
))
3634 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3635 if (IS_ERR(u
.lapic
)) {
3636 r
= PTR_ERR(u
.lapic
);
3640 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3643 case KVM_INTERRUPT
: {
3644 struct kvm_interrupt irq
;
3647 if (copy_from_user(&irq
, argp
, sizeof irq
))
3649 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3653 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3657 r
= kvm_vcpu_ioctl_smi(vcpu
);
3660 case KVM_SET_CPUID
: {
3661 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3662 struct kvm_cpuid cpuid
;
3665 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3667 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3670 case KVM_SET_CPUID2
: {
3671 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3672 struct kvm_cpuid2 cpuid
;
3675 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3677 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3678 cpuid_arg
->entries
);
3681 case KVM_GET_CPUID2
: {
3682 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3683 struct kvm_cpuid2 cpuid
;
3686 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3688 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3689 cpuid_arg
->entries
);
3693 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3698 case KVM_GET_MSRS
: {
3699 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3700 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3701 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3704 case KVM_SET_MSRS
: {
3705 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3706 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3707 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3710 case KVM_TPR_ACCESS_REPORTING
: {
3711 struct kvm_tpr_access_ctl tac
;
3714 if (copy_from_user(&tac
, argp
, sizeof tac
))
3716 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3720 if (copy_to_user(argp
, &tac
, sizeof tac
))
3725 case KVM_SET_VAPIC_ADDR
: {
3726 struct kvm_vapic_addr va
;
3730 if (!lapic_in_kernel(vcpu
))
3733 if (copy_from_user(&va
, argp
, sizeof va
))
3735 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3736 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3737 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3740 case KVM_X86_SETUP_MCE
: {
3744 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3746 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3749 case KVM_X86_SET_MCE
: {
3750 struct kvm_x86_mce mce
;
3753 if (copy_from_user(&mce
, argp
, sizeof mce
))
3755 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3758 case KVM_GET_VCPU_EVENTS
: {
3759 struct kvm_vcpu_events events
;
3761 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3764 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3769 case KVM_SET_VCPU_EVENTS
: {
3770 struct kvm_vcpu_events events
;
3773 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3776 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3779 case KVM_GET_DEBUGREGS
: {
3780 struct kvm_debugregs dbgregs
;
3782 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3785 if (copy_to_user(argp
, &dbgregs
,
3786 sizeof(struct kvm_debugregs
)))
3791 case KVM_SET_DEBUGREGS
: {
3792 struct kvm_debugregs dbgregs
;
3795 if (copy_from_user(&dbgregs
, argp
,
3796 sizeof(struct kvm_debugregs
)))
3799 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3802 case KVM_GET_XSAVE
: {
3803 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3808 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3811 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3816 case KVM_SET_XSAVE
: {
3817 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3818 if (IS_ERR(u
.xsave
)) {
3819 r
= PTR_ERR(u
.xsave
);
3823 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3826 case KVM_GET_XCRS
: {
3827 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3832 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3835 if (copy_to_user(argp
, u
.xcrs
,
3836 sizeof(struct kvm_xcrs
)))
3841 case KVM_SET_XCRS
: {
3842 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3843 if (IS_ERR(u
.xcrs
)) {
3844 r
= PTR_ERR(u
.xcrs
);
3848 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3851 case KVM_SET_TSC_KHZ
: {
3855 user_tsc_khz
= (u32
)arg
;
3857 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3860 if (user_tsc_khz
== 0)
3861 user_tsc_khz
= tsc_khz
;
3863 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3868 case KVM_GET_TSC_KHZ
: {
3869 r
= vcpu
->arch
.virtual_tsc_khz
;
3872 case KVM_KVMCLOCK_CTRL
: {
3873 r
= kvm_set_guest_paused(vcpu
);
3876 case KVM_ENABLE_CAP
: {
3877 struct kvm_enable_cap cap
;
3880 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3882 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3895 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3897 return VM_FAULT_SIGBUS
;
3900 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3904 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3906 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3910 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3913 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3917 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3918 u32 kvm_nr_mmu_pages
)
3920 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3923 mutex_lock(&kvm
->slots_lock
);
3925 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3926 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3928 mutex_unlock(&kvm
->slots_lock
);
3932 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3934 return kvm
->arch
.n_max_mmu_pages
;
3937 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3939 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3943 switch (chip
->chip_id
) {
3944 case KVM_IRQCHIP_PIC_MASTER
:
3945 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3946 sizeof(struct kvm_pic_state
));
3948 case KVM_IRQCHIP_PIC_SLAVE
:
3949 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3950 sizeof(struct kvm_pic_state
));
3952 case KVM_IRQCHIP_IOAPIC
:
3953 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3962 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3964 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3968 switch (chip
->chip_id
) {
3969 case KVM_IRQCHIP_PIC_MASTER
:
3970 spin_lock(&pic
->lock
);
3971 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3972 sizeof(struct kvm_pic_state
));
3973 spin_unlock(&pic
->lock
);
3975 case KVM_IRQCHIP_PIC_SLAVE
:
3976 spin_lock(&pic
->lock
);
3977 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3978 sizeof(struct kvm_pic_state
));
3979 spin_unlock(&pic
->lock
);
3981 case KVM_IRQCHIP_IOAPIC
:
3982 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3988 kvm_pic_update_irq(pic
);
3992 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3994 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3996 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3998 mutex_lock(&kps
->lock
);
3999 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
4000 mutex_unlock(&kps
->lock
);
4004 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4007 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4009 mutex_lock(&pit
->pit_state
.lock
);
4010 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
4011 for (i
= 0; i
< 3; i
++)
4012 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
4013 mutex_unlock(&pit
->pit_state
.lock
);
4017 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4019 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
4020 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
4021 sizeof(ps
->channels
));
4022 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
4023 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
4024 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
4028 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4032 u32 prev_legacy
, cur_legacy
;
4033 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4035 mutex_lock(&pit
->pit_state
.lock
);
4036 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4037 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4038 if (!prev_legacy
&& cur_legacy
)
4040 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
4041 sizeof(pit
->pit_state
.channels
));
4042 pit
->pit_state
.flags
= ps
->flags
;
4043 for (i
= 0; i
< 3; i
++)
4044 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
4046 mutex_unlock(&pit
->pit_state
.lock
);
4050 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
4051 struct kvm_reinject_control
*control
)
4053 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4058 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4059 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4060 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4062 mutex_lock(&pit
->pit_state
.lock
);
4063 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
4064 mutex_unlock(&pit
->pit_state
.lock
);
4070 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4071 * @kvm: kvm instance
4072 * @log: slot id and address to which we copy the log
4074 * Steps 1-4 below provide general overview of dirty page logging. See
4075 * kvm_get_dirty_log_protect() function description for additional details.
4077 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4078 * always flush the TLB (step 4) even if previous step failed and the dirty
4079 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4080 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4081 * writes will be marked dirty for next log read.
4083 * 1. Take a snapshot of the bit and clear it if needed.
4084 * 2. Write protect the corresponding page.
4085 * 3. Copy the snapshot to the userspace.
4086 * 4. Flush TLB's if needed.
4088 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
4090 bool is_dirty
= false;
4093 mutex_lock(&kvm
->slots_lock
);
4096 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4098 if (kvm_x86_ops
->flush_log_dirty
)
4099 kvm_x86_ops
->flush_log_dirty(kvm
);
4101 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
4104 * All the TLBs can be flushed out of mmu lock, see the comments in
4105 * kvm_mmu_slot_remove_write_access().
4107 lockdep_assert_held(&kvm
->slots_lock
);
4109 kvm_flush_remote_tlbs(kvm
);
4111 mutex_unlock(&kvm
->slots_lock
);
4115 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4118 if (!irqchip_in_kernel(kvm
))
4121 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4122 irq_event
->irq
, irq_event
->level
,
4127 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4128 struct kvm_enable_cap
*cap
)
4136 case KVM_CAP_DISABLE_QUIRKS
:
4137 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4140 case KVM_CAP_SPLIT_IRQCHIP
: {
4141 mutex_lock(&kvm
->lock
);
4143 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4144 goto split_irqchip_unlock
;
4146 if (irqchip_in_kernel(kvm
))
4147 goto split_irqchip_unlock
;
4148 if (kvm
->created_vcpus
)
4149 goto split_irqchip_unlock
;
4150 r
= kvm_setup_empty_irq_routing(kvm
);
4152 goto split_irqchip_unlock
;
4153 /* Pairs with irqchip_in_kernel. */
4155 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4156 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4158 split_irqchip_unlock
:
4159 mutex_unlock(&kvm
->lock
);
4162 case KVM_CAP_X2APIC_API
:
4164 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4167 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4168 kvm
->arch
.x2apic_format
= true;
4169 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4170 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4181 long kvm_arch_vm_ioctl(struct file
*filp
,
4182 unsigned int ioctl
, unsigned long arg
)
4184 struct kvm
*kvm
= filp
->private_data
;
4185 void __user
*argp
= (void __user
*)arg
;
4188 * This union makes it completely explicit to gcc-3.x
4189 * that these two variables' stack usage should be
4190 * combined, not added together.
4193 struct kvm_pit_state ps
;
4194 struct kvm_pit_state2 ps2
;
4195 struct kvm_pit_config pit_config
;
4199 case KVM_SET_TSS_ADDR
:
4200 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4202 case KVM_SET_IDENTITY_MAP_ADDR
: {
4205 mutex_lock(&kvm
->lock
);
4207 if (kvm
->created_vcpus
)
4208 goto set_identity_unlock
;
4210 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4211 goto set_identity_unlock
;
4212 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4213 set_identity_unlock
:
4214 mutex_unlock(&kvm
->lock
);
4217 case KVM_SET_NR_MMU_PAGES
:
4218 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4220 case KVM_GET_NR_MMU_PAGES
:
4221 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4223 case KVM_CREATE_IRQCHIP
: {
4224 mutex_lock(&kvm
->lock
);
4227 if (irqchip_in_kernel(kvm
))
4228 goto create_irqchip_unlock
;
4231 if (kvm
->created_vcpus
)
4232 goto create_irqchip_unlock
;
4234 r
= kvm_pic_init(kvm
);
4236 goto create_irqchip_unlock
;
4238 r
= kvm_ioapic_init(kvm
);
4240 kvm_pic_destroy(kvm
);
4241 goto create_irqchip_unlock
;
4244 r
= kvm_setup_default_irq_routing(kvm
);
4246 kvm_ioapic_destroy(kvm
);
4247 kvm_pic_destroy(kvm
);
4248 goto create_irqchip_unlock
;
4250 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4252 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4253 create_irqchip_unlock
:
4254 mutex_unlock(&kvm
->lock
);
4257 case KVM_CREATE_PIT
:
4258 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4260 case KVM_CREATE_PIT2
:
4262 if (copy_from_user(&u
.pit_config
, argp
,
4263 sizeof(struct kvm_pit_config
)))
4266 mutex_lock(&kvm
->lock
);
4269 goto create_pit_unlock
;
4271 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4275 mutex_unlock(&kvm
->lock
);
4277 case KVM_GET_IRQCHIP
: {
4278 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4279 struct kvm_irqchip
*chip
;
4281 chip
= memdup_user(argp
, sizeof(*chip
));
4288 if (!irqchip_kernel(kvm
))
4289 goto get_irqchip_out
;
4290 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4292 goto get_irqchip_out
;
4294 if (copy_to_user(argp
, chip
, sizeof *chip
))
4295 goto get_irqchip_out
;
4301 case KVM_SET_IRQCHIP
: {
4302 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4303 struct kvm_irqchip
*chip
;
4305 chip
= memdup_user(argp
, sizeof(*chip
));
4312 if (!irqchip_kernel(kvm
))
4313 goto set_irqchip_out
;
4314 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4316 goto set_irqchip_out
;
4324 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4327 if (!kvm
->arch
.vpit
)
4329 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4333 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4340 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4343 if (!kvm
->arch
.vpit
)
4345 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4348 case KVM_GET_PIT2
: {
4350 if (!kvm
->arch
.vpit
)
4352 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4356 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4361 case KVM_SET_PIT2
: {
4363 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4366 if (!kvm
->arch
.vpit
)
4368 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4371 case KVM_REINJECT_CONTROL
: {
4372 struct kvm_reinject_control control
;
4374 if (copy_from_user(&control
, argp
, sizeof(control
)))
4376 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4379 case KVM_SET_BOOT_CPU_ID
:
4381 mutex_lock(&kvm
->lock
);
4382 if (kvm
->created_vcpus
)
4385 kvm
->arch
.bsp_vcpu_id
= arg
;
4386 mutex_unlock(&kvm
->lock
);
4388 case KVM_XEN_HVM_CONFIG
: {
4389 struct kvm_xen_hvm_config xhc
;
4391 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4396 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4400 case KVM_SET_CLOCK
: {
4401 struct kvm_clock_data user_ns
;
4405 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4414 * TODO: userspace has to take care of races with VCPU_RUN, so
4415 * kvm_gen_update_masterclock() can be cut down to locked
4416 * pvclock_update_vm_gtod_copy().
4418 kvm_gen_update_masterclock(kvm
);
4419 now_ns
= get_kvmclock_ns(kvm
);
4420 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4421 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4424 case KVM_GET_CLOCK
: {
4425 struct kvm_clock_data user_ns
;
4428 now_ns
= get_kvmclock_ns(kvm
);
4429 user_ns
.clock
= now_ns
;
4430 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4431 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4434 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4439 case KVM_ENABLE_CAP
: {
4440 struct kvm_enable_cap cap
;
4443 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4445 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4448 case KVM_MEMORY_ENCRYPT_OP
: {
4450 if (kvm_x86_ops
->mem_enc_op
)
4451 r
= kvm_x86_ops
->mem_enc_op(kvm
, argp
);
4454 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
4455 struct kvm_enc_region region
;
4458 if (copy_from_user(®ion
, argp
, sizeof(region
)))
4462 if (kvm_x86_ops
->mem_enc_reg_region
)
4463 r
= kvm_x86_ops
->mem_enc_reg_region(kvm
, ®ion
);
4466 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
4467 struct kvm_enc_region region
;
4470 if (copy_from_user(®ion
, argp
, sizeof(region
)))
4474 if (kvm_x86_ops
->mem_enc_unreg_region
)
4475 r
= kvm_x86_ops
->mem_enc_unreg_region(kvm
, ®ion
);
4485 static void kvm_init_msr_list(void)
4490 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4491 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4495 * Even MSRs that are valid in the host may not be exposed
4496 * to the guests in some cases.
4498 switch (msrs_to_save
[i
]) {
4499 case MSR_IA32_BNDCFGS
:
4500 if (!kvm_x86_ops
->mpx_supported())
4504 if (!kvm_x86_ops
->rdtscp_supported())
4512 msrs_to_save
[j
] = msrs_to_save
[i
];
4515 num_msrs_to_save
= j
;
4517 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4518 switch (emulated_msrs
[i
]) {
4519 case MSR_IA32_SMBASE
:
4520 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4528 emulated_msrs
[j
] = emulated_msrs
[i
];
4531 num_emulated_msrs
= j
;
4533 for (i
= j
= 0; i
< ARRAY_SIZE(msr_based_features
); i
++) {
4534 struct kvm_msr_entry msr
;
4536 msr
.index
= msr_based_features
[i
];
4537 if (kvm_get_msr_feature(&msr
))
4541 msr_based_features
[j
] = msr_based_features
[i
];
4544 num_msr_based_features
= j
;
4547 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4555 if (!(lapic_in_kernel(vcpu
) &&
4556 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4557 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4568 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4575 if (!(lapic_in_kernel(vcpu
) &&
4576 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4578 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4580 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4590 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4591 struct kvm_segment
*var
, int seg
)
4593 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4596 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4597 struct kvm_segment
*var
, int seg
)
4599 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4602 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4603 struct x86_exception
*exception
)
4607 BUG_ON(!mmu_is_nested(vcpu
));
4609 /* NPT walks are always user-walks */
4610 access
|= PFERR_USER_MASK
;
4611 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4616 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4617 struct x86_exception
*exception
)
4619 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4620 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4623 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4624 struct x86_exception
*exception
)
4626 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4627 access
|= PFERR_FETCH_MASK
;
4628 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4631 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4632 struct x86_exception
*exception
)
4634 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4635 access
|= PFERR_WRITE_MASK
;
4636 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4639 /* uses this to access any guest's mapped memory without checking CPL */
4640 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4641 struct x86_exception
*exception
)
4643 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4646 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4647 struct kvm_vcpu
*vcpu
, u32 access
,
4648 struct x86_exception
*exception
)
4651 int r
= X86EMUL_CONTINUE
;
4654 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4656 unsigned offset
= addr
& (PAGE_SIZE
-1);
4657 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4660 if (gpa
== UNMAPPED_GVA
)
4661 return X86EMUL_PROPAGATE_FAULT
;
4662 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4665 r
= X86EMUL_IO_NEEDED
;
4677 /* used for instruction fetching */
4678 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4679 gva_t addr
, void *val
, unsigned int bytes
,
4680 struct x86_exception
*exception
)
4682 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4683 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4687 /* Inline kvm_read_guest_virt_helper for speed. */
4688 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4690 if (unlikely(gpa
== UNMAPPED_GVA
))
4691 return X86EMUL_PROPAGATE_FAULT
;
4693 offset
= addr
& (PAGE_SIZE
-1);
4694 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4695 bytes
= (unsigned)PAGE_SIZE
- offset
;
4696 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4698 if (unlikely(ret
< 0))
4699 return X86EMUL_IO_NEEDED
;
4701 return X86EMUL_CONTINUE
;
4704 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4705 gva_t addr
, void *val
, unsigned int bytes
,
4706 struct x86_exception
*exception
)
4708 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4709 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4711 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4714 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4716 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4717 gva_t addr
, void *val
, unsigned int bytes
,
4718 struct x86_exception
*exception
)
4720 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4721 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4724 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4725 unsigned long addr
, void *val
, unsigned int bytes
)
4727 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4728 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4730 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4733 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4734 gva_t addr
, void *val
,
4736 struct x86_exception
*exception
)
4738 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4740 int r
= X86EMUL_CONTINUE
;
4743 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4746 unsigned offset
= addr
& (PAGE_SIZE
-1);
4747 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4750 if (gpa
== UNMAPPED_GVA
)
4751 return X86EMUL_PROPAGATE_FAULT
;
4752 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4754 r
= X86EMUL_IO_NEEDED
;
4765 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4767 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4768 gpa_t gpa
, bool write
)
4770 /* For APIC access vmexit */
4771 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4774 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4775 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4782 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4783 gpa_t
*gpa
, struct x86_exception
*exception
,
4786 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4787 | (write
? PFERR_WRITE_MASK
: 0);
4790 * currently PKRU is only applied to ept enabled guest so
4791 * there is no pkey in EPT page table for L1 guest or EPT
4792 * shadow page table for L2 guest.
4794 if (vcpu_match_mmio_gva(vcpu
, gva
)
4795 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4796 vcpu
->arch
.access
, 0, access
)) {
4797 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4798 (gva
& (PAGE_SIZE
- 1));
4799 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4803 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4805 if (*gpa
== UNMAPPED_GVA
)
4808 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4811 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4812 const void *val
, int bytes
)
4816 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4819 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4823 struct read_write_emulator_ops
{
4824 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4826 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4827 void *val
, int bytes
);
4828 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4829 int bytes
, void *val
);
4830 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4831 void *val
, int bytes
);
4835 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4837 if (vcpu
->mmio_read_completed
) {
4838 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4839 vcpu
->mmio_fragments
[0].gpa
, val
);
4840 vcpu
->mmio_read_completed
= 0;
4847 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4848 void *val
, int bytes
)
4850 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4853 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4854 void *val
, int bytes
)
4856 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4859 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4861 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4862 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4865 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4866 void *val
, int bytes
)
4868 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4869 return X86EMUL_IO_NEEDED
;
4872 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4873 void *val
, int bytes
)
4875 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4877 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4878 return X86EMUL_CONTINUE
;
4881 static const struct read_write_emulator_ops read_emultor
= {
4882 .read_write_prepare
= read_prepare
,
4883 .read_write_emulate
= read_emulate
,
4884 .read_write_mmio
= vcpu_mmio_read
,
4885 .read_write_exit_mmio
= read_exit_mmio
,
4888 static const struct read_write_emulator_ops write_emultor
= {
4889 .read_write_emulate
= write_emulate
,
4890 .read_write_mmio
= write_mmio
,
4891 .read_write_exit_mmio
= write_exit_mmio
,
4895 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4897 struct x86_exception
*exception
,
4898 struct kvm_vcpu
*vcpu
,
4899 const struct read_write_emulator_ops
*ops
)
4903 bool write
= ops
->write
;
4904 struct kvm_mmio_fragment
*frag
;
4905 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4908 * If the exit was due to a NPF we may already have a GPA.
4909 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4910 * Note, this cannot be used on string operations since string
4911 * operation using rep will only have the initial GPA from the NPF
4914 if (vcpu
->arch
.gpa_available
&&
4915 emulator_can_use_gpa(ctxt
) &&
4916 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4917 gpa
= vcpu
->arch
.gpa_val
;
4918 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4920 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4922 return X86EMUL_PROPAGATE_FAULT
;
4925 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4926 return X86EMUL_CONTINUE
;
4929 * Is this MMIO handled locally?
4931 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4932 if (handled
== bytes
)
4933 return X86EMUL_CONTINUE
;
4939 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4940 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4944 return X86EMUL_CONTINUE
;
4947 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4949 void *val
, unsigned int bytes
,
4950 struct x86_exception
*exception
,
4951 const struct read_write_emulator_ops
*ops
)
4953 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4957 if (ops
->read_write_prepare
&&
4958 ops
->read_write_prepare(vcpu
, val
, bytes
))
4959 return X86EMUL_CONTINUE
;
4961 vcpu
->mmio_nr_fragments
= 0;
4963 /* Crossing a page boundary? */
4964 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4967 now
= -addr
& ~PAGE_MASK
;
4968 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4971 if (rc
!= X86EMUL_CONTINUE
)
4974 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4980 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4982 if (rc
!= X86EMUL_CONTINUE
)
4985 if (!vcpu
->mmio_nr_fragments
)
4988 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4990 vcpu
->mmio_needed
= 1;
4991 vcpu
->mmio_cur_fragment
= 0;
4993 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4994 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4995 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4996 vcpu
->run
->mmio
.phys_addr
= gpa
;
4998 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
5001 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
5005 struct x86_exception
*exception
)
5007 return emulator_read_write(ctxt
, addr
, val
, bytes
,
5008 exception
, &read_emultor
);
5011 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
5015 struct x86_exception
*exception
)
5017 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
5018 exception
, &write_emultor
);
5021 #define CMPXCHG_TYPE(t, ptr, old, new) \
5022 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5024 #ifdef CONFIG_X86_64
5025 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5027 # define CMPXCHG64(ptr, old, new) \
5028 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5031 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
5036 struct x86_exception
*exception
)
5038 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5044 /* guests cmpxchg8b have to be emulated atomically */
5045 if (bytes
> 8 || (bytes
& (bytes
- 1)))
5048 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
5050 if (gpa
== UNMAPPED_GVA
||
5051 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5054 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
5057 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
5058 if (is_error_page(page
))
5061 kaddr
= kmap_atomic(page
);
5062 kaddr
+= offset_in_page(gpa
);
5065 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
5068 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
5071 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
5074 exchanged
= CMPXCHG64(kaddr
, old
, new);
5079 kunmap_atomic(kaddr
);
5080 kvm_release_page_dirty(page
);
5083 return X86EMUL_CMPXCHG_FAILED
;
5085 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
5086 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
5088 return X86EMUL_CONTINUE
;
5091 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
5093 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
5096 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
5100 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
5101 if (vcpu
->arch
.pio
.in
)
5102 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5103 vcpu
->arch
.pio
.size
, pd
);
5105 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5106 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5110 pd
+= vcpu
->arch
.pio
.size
;
5115 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5116 unsigned short port
, void *val
,
5117 unsigned int count
, bool in
)
5119 vcpu
->arch
.pio
.port
= port
;
5120 vcpu
->arch
.pio
.in
= in
;
5121 vcpu
->arch
.pio
.count
= count
;
5122 vcpu
->arch
.pio
.size
= size
;
5124 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5125 vcpu
->arch
.pio
.count
= 0;
5129 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5130 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5131 vcpu
->run
->io
.size
= size
;
5132 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5133 vcpu
->run
->io
.count
= count
;
5134 vcpu
->run
->io
.port
= port
;
5139 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5140 int size
, unsigned short port
, void *val
,
5143 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5146 if (vcpu
->arch
.pio
.count
)
5149 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5151 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5154 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5155 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5156 vcpu
->arch
.pio
.count
= 0;
5163 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
5164 int size
, unsigned short port
,
5165 const void *val
, unsigned int count
)
5167 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5169 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5170 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5171 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
5174 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
5176 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
5179 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
5181 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5184 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5186 if (!need_emulate_wbinvd(vcpu
))
5187 return X86EMUL_CONTINUE
;
5189 if (kvm_x86_ops
->has_wbinvd_exit()) {
5190 int cpu
= get_cpu();
5192 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5193 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5194 wbinvd_ipi
, NULL
, 1);
5196 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5199 return X86EMUL_CONTINUE
;
5202 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5204 kvm_emulate_wbinvd_noskip(vcpu
);
5205 return kvm_skip_emulated_instruction(vcpu
);
5207 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5211 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5213 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5216 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5217 unsigned long *dest
)
5219 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5222 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5223 unsigned long value
)
5226 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5229 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5231 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5234 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5236 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5237 unsigned long value
;
5241 value
= kvm_read_cr0(vcpu
);
5244 value
= vcpu
->arch
.cr2
;
5247 value
= kvm_read_cr3(vcpu
);
5250 value
= kvm_read_cr4(vcpu
);
5253 value
= kvm_get_cr8(vcpu
);
5256 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5263 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5265 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5270 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5273 vcpu
->arch
.cr2
= val
;
5276 res
= kvm_set_cr3(vcpu
, val
);
5279 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5282 res
= kvm_set_cr8(vcpu
, val
);
5285 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5292 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5294 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5297 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5299 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5302 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5304 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5307 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5309 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5312 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5314 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5317 static unsigned long emulator_get_cached_segment_base(
5318 struct x86_emulate_ctxt
*ctxt
, int seg
)
5320 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5323 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5324 struct desc_struct
*desc
, u32
*base3
,
5327 struct kvm_segment var
;
5329 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5330 *selector
= var
.selector
;
5333 memset(desc
, 0, sizeof(*desc
));
5341 set_desc_limit(desc
, var
.limit
);
5342 set_desc_base(desc
, (unsigned long)var
.base
);
5343 #ifdef CONFIG_X86_64
5345 *base3
= var
.base
>> 32;
5347 desc
->type
= var
.type
;
5349 desc
->dpl
= var
.dpl
;
5350 desc
->p
= var
.present
;
5351 desc
->avl
= var
.avl
;
5359 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5360 struct desc_struct
*desc
, u32 base3
,
5363 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5364 struct kvm_segment var
;
5366 var
.selector
= selector
;
5367 var
.base
= get_desc_base(desc
);
5368 #ifdef CONFIG_X86_64
5369 var
.base
|= ((u64
)base3
) << 32;
5371 var
.limit
= get_desc_limit(desc
);
5373 var
.limit
= (var
.limit
<< 12) | 0xfff;
5374 var
.type
= desc
->type
;
5375 var
.dpl
= desc
->dpl
;
5380 var
.avl
= desc
->avl
;
5381 var
.present
= desc
->p
;
5382 var
.unusable
= !var
.present
;
5385 kvm_set_segment(vcpu
, &var
, seg
);
5389 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5390 u32 msr_index
, u64
*pdata
)
5392 struct msr_data msr
;
5395 msr
.index
= msr_index
;
5396 msr
.host_initiated
= false;
5397 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5405 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5406 u32 msr_index
, u64 data
)
5408 struct msr_data msr
;
5411 msr
.index
= msr_index
;
5412 msr
.host_initiated
= false;
5413 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5416 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5418 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5420 return vcpu
->arch
.smbase
;
5423 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5425 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5427 vcpu
->arch
.smbase
= smbase
;
5430 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5433 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5436 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5437 u32 pmc
, u64
*pdata
)
5439 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5442 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5444 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5447 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5448 struct x86_instruction_info
*info
,
5449 enum x86_intercept_stage stage
)
5451 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5454 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5455 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5457 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5460 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5462 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5465 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5467 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5470 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5472 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5475 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5477 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5480 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5482 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5485 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5487 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5490 static const struct x86_emulate_ops emulate_ops
= {
5491 .read_gpr
= emulator_read_gpr
,
5492 .write_gpr
= emulator_write_gpr
,
5493 .read_std
= kvm_read_guest_virt_system
,
5494 .write_std
= kvm_write_guest_virt_system
,
5495 .read_phys
= kvm_read_guest_phys_system
,
5496 .fetch
= kvm_fetch_guest_virt
,
5497 .read_emulated
= emulator_read_emulated
,
5498 .write_emulated
= emulator_write_emulated
,
5499 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5500 .invlpg
= emulator_invlpg
,
5501 .pio_in_emulated
= emulator_pio_in_emulated
,
5502 .pio_out_emulated
= emulator_pio_out_emulated
,
5503 .get_segment
= emulator_get_segment
,
5504 .set_segment
= emulator_set_segment
,
5505 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5506 .get_gdt
= emulator_get_gdt
,
5507 .get_idt
= emulator_get_idt
,
5508 .set_gdt
= emulator_set_gdt
,
5509 .set_idt
= emulator_set_idt
,
5510 .get_cr
= emulator_get_cr
,
5511 .set_cr
= emulator_set_cr
,
5512 .cpl
= emulator_get_cpl
,
5513 .get_dr
= emulator_get_dr
,
5514 .set_dr
= emulator_set_dr
,
5515 .get_smbase
= emulator_get_smbase
,
5516 .set_smbase
= emulator_set_smbase
,
5517 .set_msr
= emulator_set_msr
,
5518 .get_msr
= emulator_get_msr
,
5519 .check_pmc
= emulator_check_pmc
,
5520 .read_pmc
= emulator_read_pmc
,
5521 .halt
= emulator_halt
,
5522 .wbinvd
= emulator_wbinvd
,
5523 .fix_hypercall
= emulator_fix_hypercall
,
5524 .intercept
= emulator_intercept
,
5525 .get_cpuid
= emulator_get_cpuid
,
5526 .set_nmi_mask
= emulator_set_nmi_mask
,
5527 .get_hflags
= emulator_get_hflags
,
5528 .set_hflags
= emulator_set_hflags
,
5529 .pre_leave_smm
= emulator_pre_leave_smm
,
5532 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5534 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5536 * an sti; sti; sequence only disable interrupts for the first
5537 * instruction. So, if the last instruction, be it emulated or
5538 * not, left the system with the INT_STI flag enabled, it
5539 * means that the last instruction is an sti. We should not
5540 * leave the flag on in this case. The same goes for mov ss
5542 if (int_shadow
& mask
)
5544 if (unlikely(int_shadow
|| mask
)) {
5545 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5547 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5551 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5553 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5554 if (ctxt
->exception
.vector
== PF_VECTOR
)
5555 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5557 if (ctxt
->exception
.error_code_valid
)
5558 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5559 ctxt
->exception
.error_code
);
5561 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5565 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5567 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5570 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5572 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5573 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5575 ctxt
->eip
= kvm_rip_read(vcpu
);
5576 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5577 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5578 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5579 cs_db
? X86EMUL_MODE_PROT32
:
5580 X86EMUL_MODE_PROT16
;
5581 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5582 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5583 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5585 init_decode_cache(ctxt
);
5586 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5589 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5591 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5594 init_emulate_ctxt(vcpu
);
5598 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5599 ret
= emulate_int_real(ctxt
, irq
);
5601 if (ret
!= X86EMUL_CONTINUE
)
5602 return EMULATE_FAIL
;
5604 ctxt
->eip
= ctxt
->_eip
;
5605 kvm_rip_write(vcpu
, ctxt
->eip
);
5606 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5608 if (irq
== NMI_VECTOR
)
5609 vcpu
->arch
.nmi_pending
= 0;
5611 vcpu
->arch
.interrupt
.pending
= false;
5613 return EMULATE_DONE
;
5615 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5617 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5619 int r
= EMULATE_DONE
;
5621 ++vcpu
->stat
.insn_emulation_fail
;
5622 trace_kvm_emulate_insn_failed(vcpu
);
5623 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5624 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5625 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5626 vcpu
->run
->internal
.ndata
= 0;
5627 r
= EMULATE_USER_EXIT
;
5629 kvm_queue_exception(vcpu
, UD_VECTOR
);
5634 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5635 bool write_fault_to_shadow_pgtable
,
5641 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5644 if (!vcpu
->arch
.mmu
.direct_map
) {
5646 * Write permission should be allowed since only
5647 * write access need to be emulated.
5649 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5652 * If the mapping is invalid in guest, let cpu retry
5653 * it to generate fault.
5655 if (gpa
== UNMAPPED_GVA
)
5660 * Do not retry the unhandleable instruction if it faults on the
5661 * readonly host memory, otherwise it will goto a infinite loop:
5662 * retry instruction -> write #PF -> emulation fail -> retry
5663 * instruction -> ...
5665 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5668 * If the instruction failed on the error pfn, it can not be fixed,
5669 * report the error to userspace.
5671 if (is_error_noslot_pfn(pfn
))
5674 kvm_release_pfn_clean(pfn
);
5676 /* The instructions are well-emulated on direct mmu. */
5677 if (vcpu
->arch
.mmu
.direct_map
) {
5678 unsigned int indirect_shadow_pages
;
5680 spin_lock(&vcpu
->kvm
->mmu_lock
);
5681 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5682 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5684 if (indirect_shadow_pages
)
5685 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5691 * if emulation was due to access to shadowed page table
5692 * and it failed try to unshadow page and re-enter the
5693 * guest to let CPU execute the instruction.
5695 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5698 * If the access faults on its page table, it can not
5699 * be fixed by unprotecting shadow page and it should
5700 * be reported to userspace.
5702 return !write_fault_to_shadow_pgtable
;
5705 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5706 unsigned long cr2
, int emulation_type
)
5708 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5709 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5711 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5712 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5715 * If the emulation is caused by #PF and it is non-page_table
5716 * writing instruction, it means the VM-EXIT is caused by shadow
5717 * page protected, we can zap the shadow page and retry this
5718 * instruction directly.
5720 * Note: if the guest uses a non-page-table modifying instruction
5721 * on the PDE that points to the instruction, then we will unmap
5722 * the instruction and go to an infinite loop. So, we cache the
5723 * last retried eip and the last fault address, if we meet the eip
5724 * and the address again, we can break out of the potential infinite
5727 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5729 if (!(emulation_type
& EMULTYPE_RETRY
))
5732 if (x86_page_table_writing_insn(ctxt
))
5735 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5738 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5739 vcpu
->arch
.last_retry_addr
= cr2
;
5741 if (!vcpu
->arch
.mmu
.direct_map
)
5742 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5744 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5749 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5750 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5752 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5754 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5755 /* This is a good place to trace that we are exiting SMM. */
5756 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5758 /* Process a latched INIT or SMI, if any. */
5759 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5762 kvm_mmu_reset_context(vcpu
);
5765 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5767 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5769 vcpu
->arch
.hflags
= emul_flags
;
5771 if (changed
& HF_SMM_MASK
)
5772 kvm_smm_changed(vcpu
);
5775 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5784 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5785 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5790 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5792 struct kvm_run
*kvm_run
= vcpu
->run
;
5794 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5795 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5796 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5797 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5798 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5799 *r
= EMULATE_USER_EXIT
;
5802 * "Certain debug exceptions may clear bit 0-3. The
5803 * remaining contents of the DR6 register are never
5804 * cleared by the processor".
5806 vcpu
->arch
.dr6
&= ~15;
5807 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5808 kvm_queue_exception(vcpu
, DB_VECTOR
);
5812 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5814 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5815 int r
= EMULATE_DONE
;
5817 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5820 * rflags is the old, "raw" value of the flags. The new value has
5821 * not been saved yet.
5823 * This is correct even for TF set by the guest, because "the
5824 * processor will not generate this exception after the instruction
5825 * that sets the TF flag".
5827 if (unlikely(rflags
& X86_EFLAGS_TF
))
5828 kvm_vcpu_do_singlestep(vcpu
, &r
);
5829 return r
== EMULATE_DONE
;
5831 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5833 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5835 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5836 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5837 struct kvm_run
*kvm_run
= vcpu
->run
;
5838 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5839 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5840 vcpu
->arch
.guest_debug_dr7
,
5844 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5845 kvm_run
->debug
.arch
.pc
= eip
;
5846 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5847 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5848 *r
= EMULATE_USER_EXIT
;
5853 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5854 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5855 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5856 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5861 vcpu
->arch
.dr6
&= ~15;
5862 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5863 kvm_queue_exception(vcpu
, DB_VECTOR
);
5872 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5879 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5880 bool writeback
= true;
5881 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5884 * Clear write_fault_to_shadow_pgtable here to ensure it is
5887 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5888 kvm_clear_exception_queue(vcpu
);
5890 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5891 init_emulate_ctxt(vcpu
);
5894 * We will reenter on the same instruction since
5895 * we do not set complete_userspace_io. This does not
5896 * handle watchpoints yet, those would be handled in
5899 if (!(emulation_type
& EMULTYPE_SKIP
) &&
5900 kvm_vcpu_check_breakpoint(vcpu
, &r
))
5903 ctxt
->interruptibility
= 0;
5904 ctxt
->have_exception
= false;
5905 ctxt
->exception
.vector
= -1;
5906 ctxt
->perm_ok
= false;
5908 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5910 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5912 trace_kvm_emulate_insn_start(vcpu
);
5913 ++vcpu
->stat
.insn_emulation
;
5914 if (r
!= EMULATION_OK
) {
5915 if (emulation_type
& EMULTYPE_TRAP_UD
)
5916 return EMULATE_FAIL
;
5917 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5919 return EMULATE_DONE
;
5920 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
5921 return EMULATE_DONE
;
5922 if (emulation_type
& EMULTYPE_SKIP
)
5923 return EMULATE_FAIL
;
5924 return handle_emulation_failure(vcpu
);
5928 if (emulation_type
& EMULTYPE_SKIP
) {
5929 kvm_rip_write(vcpu
, ctxt
->_eip
);
5930 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5931 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5932 return EMULATE_DONE
;
5935 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5936 return EMULATE_DONE
;
5938 /* this is needed for vmware backdoor interface to work since it
5939 changes registers values during IO operation */
5940 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5941 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5942 emulator_invalidate_register_cache(ctxt
);
5946 /* Save the faulting GPA (cr2) in the address field */
5947 ctxt
->exception
.address
= cr2
;
5949 r
= x86_emulate_insn(ctxt
);
5951 if (r
== EMULATION_INTERCEPTED
)
5952 return EMULATE_DONE
;
5954 if (r
== EMULATION_FAILED
) {
5955 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5957 return EMULATE_DONE
;
5959 return handle_emulation_failure(vcpu
);
5962 if (ctxt
->have_exception
) {
5964 if (inject_emulated_exception(vcpu
))
5966 } else if (vcpu
->arch
.pio
.count
) {
5967 if (!vcpu
->arch
.pio
.in
) {
5968 /* FIXME: return into emulator if single-stepping. */
5969 vcpu
->arch
.pio
.count
= 0;
5972 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5974 r
= EMULATE_USER_EXIT
;
5975 } else if (vcpu
->mmio_needed
) {
5976 if (!vcpu
->mmio_is_write
)
5978 r
= EMULATE_USER_EXIT
;
5979 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5980 } else if (r
== EMULATION_RESTART
)
5986 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5987 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5988 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5989 kvm_rip_write(vcpu
, ctxt
->eip
);
5990 if (r
== EMULATE_DONE
&&
5991 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5992 kvm_vcpu_do_singlestep(vcpu
, &r
);
5993 if (!ctxt
->have_exception
||
5994 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5995 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5998 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5999 * do nothing, and it will be requested again as soon as
6000 * the shadow expires. But we still need to check here,
6001 * because POPF has no interrupt shadow.
6003 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
6004 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6006 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
6010 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
6012 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
6014 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6015 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
6016 size
, port
, &val
, 1);
6017 /* do not return to emulator after return from userspace */
6018 vcpu
->arch
.pio
.count
= 0;
6021 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
6023 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
6027 /* We should only ever be called with arch.pio.count equal to 1 */
6028 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
6030 /* For size less than 4 we merge, else we zero extend */
6031 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
6035 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6036 * the copy and tracing
6038 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
6039 vcpu
->arch
.pio
.port
, &val
, 1);
6040 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6045 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
6050 /* For size less than 4 we merge, else we zero extend */
6051 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
6053 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
6056 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6060 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
6064 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
6066 static int kvmclock_cpu_down_prep(unsigned int cpu
)
6068 __this_cpu_write(cpu_tsc_khz
, 0);
6072 static void tsc_khz_changed(void *data
)
6074 struct cpufreq_freqs
*freq
= data
;
6075 unsigned long khz
= 0;
6079 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6080 khz
= cpufreq_quick_get(raw_smp_processor_id());
6083 __this_cpu_write(cpu_tsc_khz
, khz
);
6086 #ifdef CONFIG_X86_64
6087 static void kvm_hyperv_tsc_notifier(void)
6090 struct kvm_vcpu
*vcpu
;
6093 spin_lock(&kvm_lock
);
6094 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6095 kvm_make_mclock_inprogress_request(kvm
);
6097 hyperv_stop_tsc_emulation();
6099 /* TSC frequency always matches when on Hyper-V */
6100 for_each_present_cpu(cpu
)
6101 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
6102 kvm_max_guest_tsc_khz
= tsc_khz
;
6104 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6105 struct kvm_arch
*ka
= &kvm
->arch
;
6107 spin_lock(&ka
->pvclock_gtod_sync_lock
);
6109 pvclock_update_vm_gtod_copy(kvm
);
6111 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
6112 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6114 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
6115 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
6117 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
6119 spin_unlock(&kvm_lock
);
6123 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
6126 struct cpufreq_freqs
*freq
= data
;
6128 struct kvm_vcpu
*vcpu
;
6129 int i
, send_ipi
= 0;
6132 * We allow guests to temporarily run on slowing clocks,
6133 * provided we notify them after, or to run on accelerating
6134 * clocks, provided we notify them before. Thus time never
6137 * However, we have a problem. We can't atomically update
6138 * the frequency of a given CPU from this function; it is
6139 * merely a notifier, which can be called from any CPU.
6140 * Changing the TSC frequency at arbitrary points in time
6141 * requires a recomputation of local variables related to
6142 * the TSC for each VCPU. We must flag these local variables
6143 * to be updated and be sure the update takes place with the
6144 * new frequency before any guests proceed.
6146 * Unfortunately, the combination of hotplug CPU and frequency
6147 * change creates an intractable locking scenario; the order
6148 * of when these callouts happen is undefined with respect to
6149 * CPU hotplug, and they can race with each other. As such,
6150 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6151 * undefined; you can actually have a CPU frequency change take
6152 * place in between the computation of X and the setting of the
6153 * variable. To protect against this problem, all updates of
6154 * the per_cpu tsc_khz variable are done in an interrupt
6155 * protected IPI, and all callers wishing to update the value
6156 * must wait for a synchronous IPI to complete (which is trivial
6157 * if the caller is on the CPU already). This establishes the
6158 * necessary total order on variable updates.
6160 * Note that because a guest time update may take place
6161 * anytime after the setting of the VCPU's request bit, the
6162 * correct TSC value must be set before the request. However,
6163 * to ensure the update actually makes it to any guest which
6164 * starts running in hardware virtualization between the set
6165 * and the acquisition of the spinlock, we must also ping the
6166 * CPU after setting the request bit.
6170 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
6172 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
6175 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6177 spin_lock(&kvm_lock
);
6178 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6179 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6180 if (vcpu
->cpu
!= freq
->cpu
)
6182 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6183 if (vcpu
->cpu
!= smp_processor_id())
6187 spin_unlock(&kvm_lock
);
6189 if (freq
->old
< freq
->new && send_ipi
) {
6191 * We upscale the frequency. Must make the guest
6192 * doesn't see old kvmclock values while running with
6193 * the new frequency, otherwise we risk the guest sees
6194 * time go backwards.
6196 * In case we update the frequency for another cpu
6197 * (which might be in guest context) send an interrupt
6198 * to kick the cpu out of guest context. Next time
6199 * guest context is entered kvmclock will be updated,
6200 * so the guest will not see stale values.
6202 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6207 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
6208 .notifier_call
= kvmclock_cpufreq_notifier
6211 static int kvmclock_cpu_online(unsigned int cpu
)
6213 tsc_khz_changed(NULL
);
6217 static void kvm_timer_init(void)
6219 max_tsc_khz
= tsc_khz
;
6221 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6222 #ifdef CONFIG_CPU_FREQ
6223 struct cpufreq_policy policy
;
6226 memset(&policy
, 0, sizeof(policy
));
6228 cpufreq_get_policy(&policy
, cpu
);
6229 if (policy
.cpuinfo
.max_freq
)
6230 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6233 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6234 CPUFREQ_TRANSITION_NOTIFIER
);
6236 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6238 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6239 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6242 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6244 int kvm_is_in_guest(void)
6246 return __this_cpu_read(current_vcpu
) != NULL
;
6249 static int kvm_is_user_mode(void)
6253 if (__this_cpu_read(current_vcpu
))
6254 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6256 return user_mode
!= 0;
6259 static unsigned long kvm_get_guest_ip(void)
6261 unsigned long ip
= 0;
6263 if (__this_cpu_read(current_vcpu
))
6264 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6269 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6270 .is_in_guest
= kvm_is_in_guest
,
6271 .is_user_mode
= kvm_is_user_mode
,
6272 .get_guest_ip
= kvm_get_guest_ip
,
6275 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6277 __this_cpu_write(current_vcpu
, vcpu
);
6279 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6281 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6283 __this_cpu_write(current_vcpu
, NULL
);
6285 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6287 static void kvm_set_mmio_spte_mask(void)
6290 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6293 * Set the reserved bits and the present bit of an paging-structure
6294 * entry to generate page fault with PFER.RSV = 1.
6296 /* Mask the reserved physical address bits. */
6297 mask
= rsvd_bits(maxphyaddr
, 51);
6299 /* Set the present bit. */
6302 #ifdef CONFIG_X86_64
6304 * If reserved bit is not supported, clear the present bit to disable
6307 if (maxphyaddr
== 52)
6311 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6314 #ifdef CONFIG_X86_64
6315 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6319 struct kvm_vcpu
*vcpu
;
6322 spin_lock(&kvm_lock
);
6323 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6324 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6325 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6326 atomic_set(&kvm_guest_has_master_clock
, 0);
6327 spin_unlock(&kvm_lock
);
6330 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6333 * Notification about pvclock gtod data update.
6335 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6338 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6339 struct timekeeper
*tk
= priv
;
6341 update_pvclock_gtod(tk
);
6343 /* disable master clock if host does not trust, or does not
6344 * use, TSC based clocksource.
6346 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
6347 atomic_read(&kvm_guest_has_master_clock
) != 0)
6348 queue_work(system_long_wq
, &pvclock_gtod_work
);
6353 static struct notifier_block pvclock_gtod_notifier
= {
6354 .notifier_call
= pvclock_gtod_notify
,
6358 int kvm_arch_init(void *opaque
)
6361 struct kvm_x86_ops
*ops
= opaque
;
6364 printk(KERN_ERR
"kvm: already loaded the other module\n");
6369 if (!ops
->cpu_has_kvm_support()) {
6370 printk(KERN_ERR
"kvm: no hardware support\n");
6374 if (ops
->disabled_by_bios()) {
6375 printk(KERN_ERR
"kvm: disabled by bios\n");
6381 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6383 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6387 r
= kvm_mmu_module_init();
6389 goto out_free_percpu
;
6391 kvm_set_mmio_spte_mask();
6395 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6396 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6397 PT_PRESENT_MASK
, 0, sme_me_mask
);
6400 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6402 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6403 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6406 #ifdef CONFIG_X86_64
6407 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6409 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
6410 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
6416 free_percpu(shared_msrs
);
6421 void kvm_arch_exit(void)
6423 #ifdef CONFIG_X86_64
6424 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
6425 clear_hv_tscchange_cb();
6428 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6430 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6431 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6432 CPUFREQ_TRANSITION_NOTIFIER
);
6433 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6434 #ifdef CONFIG_X86_64
6435 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6438 kvm_mmu_module_exit();
6439 free_percpu(shared_msrs
);
6442 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6444 ++vcpu
->stat
.halt_exits
;
6445 if (lapic_in_kernel(vcpu
)) {
6446 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6449 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6453 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6455 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6457 int ret
= kvm_skip_emulated_instruction(vcpu
);
6459 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6460 * KVM_EXIT_DEBUG here.
6462 return kvm_vcpu_halt(vcpu
) && ret
;
6464 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6466 #ifdef CONFIG_X86_64
6467 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6468 unsigned long clock_type
)
6470 struct kvm_clock_pairing clock_pairing
;
6475 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6476 return -KVM_EOPNOTSUPP
;
6478 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6479 return -KVM_EOPNOTSUPP
;
6481 clock_pairing
.sec
= ts
.tv_sec
;
6482 clock_pairing
.nsec
= ts
.tv_nsec
;
6483 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6484 clock_pairing
.flags
= 0;
6487 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6488 sizeof(struct kvm_clock_pairing
)))
6496 * kvm_pv_kick_cpu_op: Kick a vcpu.
6498 * @apicid - apicid of vcpu to be kicked.
6500 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6502 struct kvm_lapic_irq lapic_irq
;
6504 lapic_irq
.shorthand
= 0;
6505 lapic_irq
.dest_mode
= 0;
6506 lapic_irq
.level
= 0;
6507 lapic_irq
.dest_id
= apicid
;
6508 lapic_irq
.msi_redir_hint
= false;
6510 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6511 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6514 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6516 vcpu
->arch
.apicv_active
= false;
6517 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6520 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6522 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6525 r
= kvm_skip_emulated_instruction(vcpu
);
6527 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6528 return kvm_hv_hypercall(vcpu
);
6530 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6531 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6532 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6533 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6534 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6536 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6538 op_64_bit
= is_64_bit_mode(vcpu
);
6547 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6553 case KVM_HC_VAPIC_POLL_IRQ
:
6556 case KVM_HC_KICK_CPU
:
6557 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6560 #ifdef CONFIG_X86_64
6561 case KVM_HC_CLOCK_PAIRING
:
6562 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6572 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6573 ++vcpu
->stat
.hypercalls
;
6576 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6578 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6580 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6581 char instruction
[3];
6582 unsigned long rip
= kvm_rip_read(vcpu
);
6584 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6586 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6590 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6592 return vcpu
->run
->request_interrupt_window
&&
6593 likely(!pic_in_kernel(vcpu
->kvm
));
6596 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6598 struct kvm_run
*kvm_run
= vcpu
->run
;
6600 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6601 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6602 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6603 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6604 kvm_run
->ready_for_interrupt_injection
=
6605 pic_in_kernel(vcpu
->kvm
) ||
6606 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6609 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6613 if (!kvm_x86_ops
->update_cr8_intercept
)
6616 if (!lapic_in_kernel(vcpu
))
6619 if (vcpu
->arch
.apicv_active
)
6622 if (!vcpu
->arch
.apic
->vapic_addr
)
6623 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6630 tpr
= kvm_lapic_get_cr8(vcpu
);
6632 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6635 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6639 /* try to reinject previous events if any */
6640 if (vcpu
->arch
.exception
.injected
) {
6641 kvm_x86_ops
->queue_exception(vcpu
);
6646 * Exceptions must be injected immediately, or the exception
6647 * frame will have the address of the NMI or interrupt handler.
6649 if (!vcpu
->arch
.exception
.pending
) {
6650 if (vcpu
->arch
.nmi_injected
) {
6651 kvm_x86_ops
->set_nmi(vcpu
);
6655 if (vcpu
->arch
.interrupt
.pending
) {
6656 kvm_x86_ops
->set_irq(vcpu
);
6661 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6662 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6667 /* try to inject new event if pending */
6668 if (vcpu
->arch
.exception
.pending
) {
6669 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6670 vcpu
->arch
.exception
.has_error_code
,
6671 vcpu
->arch
.exception
.error_code
);
6673 vcpu
->arch
.exception
.pending
= false;
6674 vcpu
->arch
.exception
.injected
= true;
6676 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6677 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6680 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6681 (vcpu
->arch
.dr7
& DR7_GD
)) {
6682 vcpu
->arch
.dr7
&= ~DR7_GD
;
6683 kvm_update_dr7(vcpu
);
6686 kvm_x86_ops
->queue_exception(vcpu
);
6687 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) && kvm_x86_ops
->smi_allowed(vcpu
)) {
6688 vcpu
->arch
.smi_pending
= false;
6689 ++vcpu
->arch
.smi_count
;
6691 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6692 --vcpu
->arch
.nmi_pending
;
6693 vcpu
->arch
.nmi_injected
= true;
6694 kvm_x86_ops
->set_nmi(vcpu
);
6695 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6697 * Because interrupts can be injected asynchronously, we are
6698 * calling check_nested_events again here to avoid a race condition.
6699 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6700 * proposal and current concerns. Perhaps we should be setting
6701 * KVM_REQ_EVENT only on certain events and not unconditionally?
6703 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6704 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6708 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6709 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6711 kvm_x86_ops
->set_irq(vcpu
);
6718 static void process_nmi(struct kvm_vcpu
*vcpu
)
6723 * x86 is limited to one NMI running, and one NMI pending after it.
6724 * If an NMI is already in progress, limit further NMIs to just one.
6725 * Otherwise, allow two (and we'll inject the first one immediately).
6727 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6730 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6731 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6732 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6735 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6738 flags
|= seg
->g
<< 23;
6739 flags
|= seg
->db
<< 22;
6740 flags
|= seg
->l
<< 21;
6741 flags
|= seg
->avl
<< 20;
6742 flags
|= seg
->present
<< 15;
6743 flags
|= seg
->dpl
<< 13;
6744 flags
|= seg
->s
<< 12;
6745 flags
|= seg
->type
<< 8;
6749 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6751 struct kvm_segment seg
;
6754 kvm_get_segment(vcpu
, &seg
, n
);
6755 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6758 offset
= 0x7f84 + n
* 12;
6760 offset
= 0x7f2c + (n
- 3) * 12;
6762 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6763 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6764 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6767 #ifdef CONFIG_X86_64
6768 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6770 struct kvm_segment seg
;
6774 kvm_get_segment(vcpu
, &seg
, n
);
6775 offset
= 0x7e00 + n
* 16;
6777 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6778 put_smstate(u16
, buf
, offset
, seg
.selector
);
6779 put_smstate(u16
, buf
, offset
+ 2, flags
);
6780 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6781 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6785 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6788 struct kvm_segment seg
;
6792 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6793 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6794 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6795 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6797 for (i
= 0; i
< 8; i
++)
6798 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6800 kvm_get_dr(vcpu
, 6, &val
);
6801 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6802 kvm_get_dr(vcpu
, 7, &val
);
6803 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6805 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6806 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6807 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6808 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6809 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6811 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6812 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6813 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6814 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6815 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6817 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6818 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6819 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6821 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6822 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6823 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6825 for (i
= 0; i
< 6; i
++)
6826 enter_smm_save_seg_32(vcpu
, buf
, i
);
6828 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6831 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6832 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6835 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6837 #ifdef CONFIG_X86_64
6839 struct kvm_segment seg
;
6843 for (i
= 0; i
< 16; i
++)
6844 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6846 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6847 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6849 kvm_get_dr(vcpu
, 6, &val
);
6850 put_smstate(u64
, buf
, 0x7f68, val
);
6851 kvm_get_dr(vcpu
, 7, &val
);
6852 put_smstate(u64
, buf
, 0x7f60, val
);
6854 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6855 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6856 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6858 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6861 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6863 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6865 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6866 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6867 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6868 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6869 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6871 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6872 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6873 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6875 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6876 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6877 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6878 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6879 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6881 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6882 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6883 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6885 for (i
= 0; i
< 6; i
++)
6886 enter_smm_save_seg_64(vcpu
, buf
, i
);
6892 static void enter_smm(struct kvm_vcpu
*vcpu
)
6894 struct kvm_segment cs
, ds
;
6899 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6900 memset(buf
, 0, 512);
6901 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6902 enter_smm_save_state_64(vcpu
, buf
);
6904 enter_smm_save_state_32(vcpu
, buf
);
6907 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6908 * vCPU state (e.g. leave guest mode) after we've saved the state into
6909 * the SMM state-save area.
6911 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
6913 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6914 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6916 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6917 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6919 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6921 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6922 kvm_rip_write(vcpu
, 0x8000);
6924 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6925 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6926 vcpu
->arch
.cr0
= cr0
;
6928 kvm_x86_ops
->set_cr4(vcpu
, 0);
6930 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6931 dt
.address
= dt
.size
= 0;
6932 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6934 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6936 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6937 cs
.base
= vcpu
->arch
.smbase
;
6942 cs
.limit
= ds
.limit
= 0xffffffff;
6943 cs
.type
= ds
.type
= 0x3;
6944 cs
.dpl
= ds
.dpl
= 0;
6949 cs
.avl
= ds
.avl
= 0;
6950 cs
.present
= ds
.present
= 1;
6951 cs
.unusable
= ds
.unusable
= 0;
6952 cs
.padding
= ds
.padding
= 0;
6954 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6955 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6956 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6957 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6958 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6959 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6961 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6962 kvm_x86_ops
->set_efer(vcpu
, 0);
6964 kvm_update_cpuid(vcpu
);
6965 kvm_mmu_reset_context(vcpu
);
6968 static void process_smi(struct kvm_vcpu
*vcpu
)
6970 vcpu
->arch
.smi_pending
= true;
6971 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6974 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6976 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6979 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6981 u64 eoi_exit_bitmap
[4];
6983 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6986 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6988 if (irqchip_split(vcpu
->kvm
))
6989 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6991 if (vcpu
->arch
.apicv_active
)
6992 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6993 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6995 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6996 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6997 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
7000 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
7001 unsigned long start
, unsigned long end
)
7003 unsigned long apic_address
;
7006 * The physical address of apic access page is stored in the VMCS.
7007 * Update it when it becomes invalid.
7009 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
7010 if (start
<= apic_address
&& apic_address
< end
)
7011 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
7014 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
7016 struct page
*page
= NULL
;
7018 if (!lapic_in_kernel(vcpu
))
7021 if (!kvm_x86_ops
->set_apic_access_page_addr
)
7024 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
7025 if (is_error_page(page
))
7027 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
7030 * Do not pin apic access page in memory, the MMU notifier
7031 * will call us again if it is migrated or swapped out.
7035 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
7038 * Returns 1 to let vcpu_run() continue the guest execution loop without
7039 * exiting to the userspace. Otherwise, the value will be returned to the
7042 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
7046 dm_request_for_irq_injection(vcpu
) &&
7047 kvm_cpu_accept_dm_intr(vcpu
);
7049 bool req_immediate_exit
= false;
7051 if (kvm_request_pending(vcpu
)) {
7052 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
7053 kvm_mmu_unload(vcpu
);
7054 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
7055 __kvm_migrate_timers(vcpu
);
7056 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
7057 kvm_gen_update_masterclock(vcpu
->kvm
);
7058 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
7059 kvm_gen_kvmclock_update(vcpu
);
7060 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
7061 r
= kvm_guest_time_update(vcpu
);
7065 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
7066 kvm_mmu_sync_roots(vcpu
);
7067 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
7068 kvm_vcpu_flush_tlb(vcpu
, true);
7069 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
7070 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
7074 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
7075 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
7076 vcpu
->mmio_needed
= 0;
7080 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
7081 /* Page is swapped out. Do synthetic halt */
7082 vcpu
->arch
.apf
.halted
= true;
7086 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
7087 record_steal_time(vcpu
);
7088 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
7090 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
7092 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
7093 kvm_pmu_handle_event(vcpu
);
7094 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
7095 kvm_pmu_deliver_pmi(vcpu
);
7096 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
7097 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
7098 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
7099 vcpu
->arch
.ioapic_handled_vectors
)) {
7100 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
7101 vcpu
->run
->eoi
.vector
=
7102 vcpu
->arch
.pending_ioapic_eoi
;
7107 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
7108 vcpu_scan_ioapic(vcpu
);
7109 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
7110 kvm_vcpu_reload_apic_access_page(vcpu
);
7111 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
7112 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7113 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
7117 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
7118 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7119 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
7123 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
7124 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
7125 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
7131 * KVM_REQ_HV_STIMER has to be processed after
7132 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7133 * depend on the guest clock being up-to-date
7135 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
7136 kvm_hv_process_stimers(vcpu
);
7139 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
7140 ++vcpu
->stat
.req_event
;
7141 kvm_apic_accept_events(vcpu
);
7142 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
7147 if (inject_pending_event(vcpu
, req_int_win
) != 0)
7148 req_immediate_exit
= true;
7150 /* Enable SMI/NMI/IRQ window open exits if needed.
7152 * SMIs have three cases:
7153 * 1) They can be nested, and then there is nothing to
7154 * do here because RSM will cause a vmexit anyway.
7155 * 2) There is an ISA-specific reason why SMI cannot be
7156 * injected, and the moment when this changes can be
7158 * 3) Or the SMI can be pending because
7159 * inject_pending_event has completed the injection
7160 * of an IRQ or NMI from the previous vmexit, and
7161 * then we request an immediate exit to inject the
7164 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
7165 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
7166 req_immediate_exit
= true;
7167 if (vcpu
->arch
.nmi_pending
)
7168 kvm_x86_ops
->enable_nmi_window(vcpu
);
7169 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
7170 kvm_x86_ops
->enable_irq_window(vcpu
);
7171 WARN_ON(vcpu
->arch
.exception
.pending
);
7174 if (kvm_lapic_enabled(vcpu
)) {
7175 update_cr8_intercept(vcpu
);
7176 kvm_lapic_sync_to_vapic(vcpu
);
7180 r
= kvm_mmu_reload(vcpu
);
7182 goto cancel_injection
;
7187 kvm_x86_ops
->prepare_guest_switch(vcpu
);
7190 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7191 * IPI are then delayed after guest entry, which ensures that they
7192 * result in virtual interrupt delivery.
7194 local_irq_disable();
7195 vcpu
->mode
= IN_GUEST_MODE
;
7197 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7200 * 1) We should set ->mode before checking ->requests. Please see
7201 * the comment in kvm_vcpu_exiting_guest_mode().
7203 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7204 * pairs with the memory barrier implicit in pi_test_and_set_on
7205 * (see vmx_deliver_posted_interrupt).
7207 * 3) This also orders the write to mode from any reads to the page
7208 * tables done while the VCPU is running. Please see the comment
7209 * in kvm_flush_remote_tlbs.
7211 smp_mb__after_srcu_read_unlock();
7214 * This handles the case where a posted interrupt was
7215 * notified with kvm_vcpu_kick.
7217 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
7218 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7220 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7221 || need_resched() || signal_pending(current
)) {
7222 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7226 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7228 goto cancel_injection
;
7231 kvm_load_guest_xcr0(vcpu
);
7233 if (req_immediate_exit
) {
7234 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7235 smp_send_reschedule(vcpu
->cpu
);
7238 trace_kvm_entry(vcpu
->vcpu_id
);
7239 if (lapic_timer_advance_ns
)
7240 wait_lapic_expire(vcpu
);
7241 guest_enter_irqoff();
7243 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7245 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7246 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7247 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7248 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7249 set_debugreg(vcpu
->arch
.dr6
, 6);
7250 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7253 kvm_x86_ops
->run(vcpu
);
7256 * Do this here before restoring debug registers on the host. And
7257 * since we do this before handling the vmexit, a DR access vmexit
7258 * can (a) read the correct value of the debug registers, (b) set
7259 * KVM_DEBUGREG_WONT_EXIT again.
7261 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7262 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7263 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7264 kvm_update_dr0123(vcpu
);
7265 kvm_update_dr6(vcpu
);
7266 kvm_update_dr7(vcpu
);
7267 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7271 * If the guest has used debug registers, at least dr7
7272 * will be disabled while returning to the host.
7273 * If we don't have active breakpoints in the host, we don't
7274 * care about the messed up debug address registers. But if
7275 * we have some of them active, restore the old state.
7277 if (hw_breakpoint_active())
7278 hw_breakpoint_restore();
7280 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7282 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7285 kvm_put_guest_xcr0(vcpu
);
7287 kvm_x86_ops
->handle_external_intr(vcpu
);
7291 guest_exit_irqoff();
7296 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7299 * Profile KVM exit RIPs:
7301 if (unlikely(prof_on
== KVM_PROFILING
)) {
7302 unsigned long rip
= kvm_rip_read(vcpu
);
7303 profile_hit(KVM_PROFILING
, (void *)rip
);
7306 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7307 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7309 if (vcpu
->arch
.apic_attention
)
7310 kvm_lapic_sync_from_vapic(vcpu
);
7312 vcpu
->arch
.gpa_available
= false;
7313 r
= kvm_x86_ops
->handle_exit(vcpu
);
7317 kvm_x86_ops
->cancel_injection(vcpu
);
7318 if (unlikely(vcpu
->arch
.apic_attention
))
7319 kvm_lapic_sync_from_vapic(vcpu
);
7324 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7326 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7327 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7328 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7329 kvm_vcpu_block(vcpu
);
7330 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7332 if (kvm_x86_ops
->post_block
)
7333 kvm_x86_ops
->post_block(vcpu
);
7335 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7339 kvm_apic_accept_events(vcpu
);
7340 switch(vcpu
->arch
.mp_state
) {
7341 case KVM_MP_STATE_HALTED
:
7342 vcpu
->arch
.pv
.pv_unhalted
= false;
7343 vcpu
->arch
.mp_state
=
7344 KVM_MP_STATE_RUNNABLE
;
7345 case KVM_MP_STATE_RUNNABLE
:
7346 vcpu
->arch
.apf
.halted
= false;
7348 case KVM_MP_STATE_INIT_RECEIVED
:
7357 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7359 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7360 kvm_x86_ops
->check_nested_events(vcpu
, false);
7362 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7363 !vcpu
->arch
.apf
.halted
);
7366 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7369 struct kvm
*kvm
= vcpu
->kvm
;
7371 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7374 if (kvm_vcpu_running(vcpu
)) {
7375 r
= vcpu_enter_guest(vcpu
);
7377 r
= vcpu_block(kvm
, vcpu
);
7383 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7384 if (kvm_cpu_has_pending_timer(vcpu
))
7385 kvm_inject_pending_timer_irqs(vcpu
);
7387 if (dm_request_for_irq_injection(vcpu
) &&
7388 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7390 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7391 ++vcpu
->stat
.request_irq_exits
;
7395 kvm_check_async_pf_completion(vcpu
);
7397 if (signal_pending(current
)) {
7399 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7400 ++vcpu
->stat
.signal_exits
;
7403 if (need_resched()) {
7404 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7406 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7410 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7415 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7418 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7419 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7420 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7421 if (r
!= EMULATE_DONE
)
7426 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7428 BUG_ON(!vcpu
->arch
.pio
.count
);
7430 return complete_emulated_io(vcpu
);
7434 * Implements the following, as a state machine:
7438 * for each mmio piece in the fragment
7446 * for each mmio piece in the fragment
7451 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7453 struct kvm_run
*run
= vcpu
->run
;
7454 struct kvm_mmio_fragment
*frag
;
7457 BUG_ON(!vcpu
->mmio_needed
);
7459 /* Complete previous fragment */
7460 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7461 len
= min(8u, frag
->len
);
7462 if (!vcpu
->mmio_is_write
)
7463 memcpy(frag
->data
, run
->mmio
.data
, len
);
7465 if (frag
->len
<= 8) {
7466 /* Switch to the next fragment. */
7468 vcpu
->mmio_cur_fragment
++;
7470 /* Go forward to the next mmio piece. */
7476 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7477 vcpu
->mmio_needed
= 0;
7479 /* FIXME: return into emulator if single-stepping. */
7480 if (vcpu
->mmio_is_write
)
7482 vcpu
->mmio_read_completed
= 1;
7483 return complete_emulated_io(vcpu
);
7486 run
->exit_reason
= KVM_EXIT_MMIO
;
7487 run
->mmio
.phys_addr
= frag
->gpa
;
7488 if (vcpu
->mmio_is_write
)
7489 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7490 run
->mmio
.len
= min(8u, frag
->len
);
7491 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7492 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7497 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7502 kvm_sigset_activate(vcpu
);
7503 kvm_load_guest_fpu(vcpu
);
7505 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7506 if (kvm_run
->immediate_exit
) {
7510 kvm_vcpu_block(vcpu
);
7511 kvm_apic_accept_events(vcpu
);
7512 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7514 if (signal_pending(current
)) {
7516 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7517 ++vcpu
->stat
.signal_exits
;
7522 /* re-sync apic's tpr */
7523 if (!lapic_in_kernel(vcpu
)) {
7524 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7530 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7531 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7532 vcpu
->arch
.complete_userspace_io
= NULL
;
7537 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7539 if (kvm_run
->immediate_exit
)
7545 kvm_put_guest_fpu(vcpu
);
7546 post_kvm_run_save(vcpu
);
7547 kvm_sigset_deactivate(vcpu
);
7553 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7557 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7559 * We are here if userspace calls get_regs() in the middle of
7560 * instruction emulation. Registers state needs to be copied
7561 * back from emulation context to vcpu. Userspace shouldn't do
7562 * that usually, but some bad designed PV devices (vmware
7563 * backdoor interface) need this to work
7565 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7566 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7568 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7569 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7570 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7571 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7572 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7573 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7574 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7575 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7576 #ifdef CONFIG_X86_64
7577 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7578 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7579 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7580 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7581 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7582 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7583 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7584 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7587 regs
->rip
= kvm_rip_read(vcpu
);
7588 regs
->rflags
= kvm_get_rflags(vcpu
);
7594 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7598 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7599 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7601 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7602 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7603 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7604 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7605 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7606 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7607 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7608 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7609 #ifdef CONFIG_X86_64
7610 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7611 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7612 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7613 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7614 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7615 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7616 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7617 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7620 kvm_rip_write(vcpu
, regs
->rip
);
7621 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7623 vcpu
->arch
.exception
.pending
= false;
7625 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7631 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7633 struct kvm_segment cs
;
7635 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7639 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7641 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7642 struct kvm_sregs
*sregs
)
7648 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7649 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7650 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7651 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7652 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7653 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7655 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7656 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7658 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7659 sregs
->idt
.limit
= dt
.size
;
7660 sregs
->idt
.base
= dt
.address
;
7661 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7662 sregs
->gdt
.limit
= dt
.size
;
7663 sregs
->gdt
.base
= dt
.address
;
7665 sregs
->cr0
= kvm_read_cr0(vcpu
);
7666 sregs
->cr2
= vcpu
->arch
.cr2
;
7667 sregs
->cr3
= kvm_read_cr3(vcpu
);
7668 sregs
->cr4
= kvm_read_cr4(vcpu
);
7669 sregs
->cr8
= kvm_get_cr8(vcpu
);
7670 sregs
->efer
= vcpu
->arch
.efer
;
7671 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7673 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7675 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7676 set_bit(vcpu
->arch
.interrupt
.nr
,
7677 (unsigned long *)sregs
->interrupt_bitmap
);
7683 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7684 struct kvm_mp_state
*mp_state
)
7688 kvm_apic_accept_events(vcpu
);
7689 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7690 vcpu
->arch
.pv
.pv_unhalted
)
7691 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7693 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7699 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7700 struct kvm_mp_state
*mp_state
)
7706 if (!lapic_in_kernel(vcpu
) &&
7707 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7710 /* INITs are latched while in SMM */
7711 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7712 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7713 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7716 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7717 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7718 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7720 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7721 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7729 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7730 int reason
, bool has_error_code
, u32 error_code
)
7732 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7735 init_emulate_ctxt(vcpu
);
7737 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7738 has_error_code
, error_code
);
7741 return EMULATE_FAIL
;
7743 kvm_rip_write(vcpu
, ctxt
->eip
);
7744 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7745 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7746 return EMULATE_DONE
;
7748 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7750 int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7752 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7754 * When EFER.LME and CR0.PG are set, the processor is in
7755 * 64-bit mode (though maybe in a 32-bit code segment).
7756 * CR4.PAE and EFER.LMA must be set.
7758 if (!(sregs
->cr4
& X86_CR4_PAE
)
7759 || !(sregs
->efer
& EFER_LMA
))
7763 * Not in 64-bit mode: EFER.LMA is clear and the code
7764 * segment cannot be 64-bit.
7766 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7773 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7774 struct kvm_sregs
*sregs
)
7776 struct msr_data apic_base_msr
;
7777 int mmu_reset_needed
= 0;
7778 int pending_vec
, max_bits
, idx
;
7784 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7785 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7788 if (kvm_valid_sregs(vcpu
, sregs
))
7791 apic_base_msr
.data
= sregs
->apic_base
;
7792 apic_base_msr
.host_initiated
= true;
7793 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7796 dt
.size
= sregs
->idt
.limit
;
7797 dt
.address
= sregs
->idt
.base
;
7798 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7799 dt
.size
= sregs
->gdt
.limit
;
7800 dt
.address
= sregs
->gdt
.base
;
7801 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7803 vcpu
->arch
.cr2
= sregs
->cr2
;
7804 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7805 vcpu
->arch
.cr3
= sregs
->cr3
;
7806 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7808 kvm_set_cr8(vcpu
, sregs
->cr8
);
7810 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7811 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7813 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7814 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7815 vcpu
->arch
.cr0
= sregs
->cr0
;
7817 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7818 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7819 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7820 kvm_update_cpuid(vcpu
);
7822 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7823 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7824 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7825 mmu_reset_needed
= 1;
7827 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7829 if (mmu_reset_needed
)
7830 kvm_mmu_reset_context(vcpu
);
7832 max_bits
= KVM_NR_INTERRUPTS
;
7833 pending_vec
= find_first_bit(
7834 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7835 if (pending_vec
< max_bits
) {
7836 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7837 pr_debug("Set back pending irq %d\n", pending_vec
);
7840 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7841 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7842 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7843 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7844 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7845 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7847 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7848 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7850 update_cr8_intercept(vcpu
);
7852 /* Older userspace won't unhalt the vcpu on reset. */
7853 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7854 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7856 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7858 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7866 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7867 struct kvm_guest_debug
*dbg
)
7869 unsigned long rflags
;
7874 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7876 if (vcpu
->arch
.exception
.pending
)
7878 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7879 kvm_queue_exception(vcpu
, DB_VECTOR
);
7881 kvm_queue_exception(vcpu
, BP_VECTOR
);
7885 * Read rflags as long as potentially injected trace flags are still
7888 rflags
= kvm_get_rflags(vcpu
);
7890 vcpu
->guest_debug
= dbg
->control
;
7891 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7892 vcpu
->guest_debug
= 0;
7894 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7895 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7896 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7897 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7899 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7900 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7902 kvm_update_dr7(vcpu
);
7904 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7905 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7906 get_segment_base(vcpu
, VCPU_SREG_CS
);
7909 * Trigger an rflags update that will inject or remove the trace
7912 kvm_set_rflags(vcpu
, rflags
);
7914 kvm_x86_ops
->update_bp_intercept(vcpu
);
7924 * Translate a guest virtual address to a guest physical address.
7926 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7927 struct kvm_translation
*tr
)
7929 unsigned long vaddr
= tr
->linear_address
;
7935 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7936 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7937 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7938 tr
->physical_address
= gpa
;
7939 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7947 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7949 struct fxregs_state
*fxsave
;
7953 fxsave
= &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7954 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7955 fpu
->fcw
= fxsave
->cwd
;
7956 fpu
->fsw
= fxsave
->swd
;
7957 fpu
->ftwx
= fxsave
->twd
;
7958 fpu
->last_opcode
= fxsave
->fop
;
7959 fpu
->last_ip
= fxsave
->rip
;
7960 fpu
->last_dp
= fxsave
->rdp
;
7961 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7967 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7969 struct fxregs_state
*fxsave
;
7973 fxsave
= &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7975 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7976 fxsave
->cwd
= fpu
->fcw
;
7977 fxsave
->swd
= fpu
->fsw
;
7978 fxsave
->twd
= fpu
->ftwx
;
7979 fxsave
->fop
= fpu
->last_opcode
;
7980 fxsave
->rip
= fpu
->last_ip
;
7981 fxsave
->rdp
= fpu
->last_dp
;
7982 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7988 static void fx_init(struct kvm_vcpu
*vcpu
)
7990 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7991 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7992 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7993 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7996 * Ensure guest xcr0 is valid for loading
7998 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8000 vcpu
->arch
.cr0
|= X86_CR0_ET
;
8003 /* Swap (qemu) user FPU context for the guest FPU context. */
8004 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
8007 copy_fpregs_to_fpstate(&vcpu
->arch
.user_fpu
);
8008 /* PKRU is separately restored in kvm_x86_ops->run. */
8009 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
8010 ~XFEATURE_MASK_PKRU
);
8015 /* When vcpu_run ends, restore user space FPU context. */
8016 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
8019 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
8020 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
.state
);
8022 ++vcpu
->stat
.fpu_reload
;
8026 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
8028 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
8030 kvmclock_reset(vcpu
);
8032 kvm_x86_ops
->vcpu_free(vcpu
);
8033 free_cpumask_var(wbinvd_dirty_mask
);
8036 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
8039 struct kvm_vcpu
*vcpu
;
8041 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
8042 printk_once(KERN_WARNING
8043 "kvm: SMP vm created on host with unstable TSC; "
8044 "guest TSC will not be reliable\n");
8046 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
8051 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
8053 kvm_vcpu_mtrr_init(vcpu
);
8055 kvm_vcpu_reset(vcpu
, false);
8056 kvm_lapic_reset(vcpu
, false);
8057 kvm_mmu_setup(vcpu
);
8062 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
8064 struct msr_data msr
;
8065 struct kvm
*kvm
= vcpu
->kvm
;
8067 kvm_hv_vcpu_postcreate(vcpu
);
8069 if (mutex_lock_killable(&vcpu
->mutex
))
8073 msr
.index
= MSR_IA32_TSC
;
8074 msr
.host_initiated
= true;
8075 kvm_write_tsc(vcpu
, &msr
);
8077 mutex_unlock(&vcpu
->mutex
);
8079 if (!kvmclock_periodic_sync
)
8082 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
8083 KVMCLOCK_SYNC_PERIOD
);
8086 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
8088 vcpu
->arch
.apf
.msr_val
= 0;
8091 kvm_mmu_unload(vcpu
);
8094 kvm_x86_ops
->vcpu_free(vcpu
);
8097 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
8099 vcpu
->arch
.hflags
= 0;
8101 vcpu
->arch
.smi_pending
= 0;
8102 vcpu
->arch
.smi_count
= 0;
8103 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
8104 vcpu
->arch
.nmi_pending
= 0;
8105 vcpu
->arch
.nmi_injected
= false;
8106 kvm_clear_interrupt_queue(vcpu
);
8107 kvm_clear_exception_queue(vcpu
);
8108 vcpu
->arch
.exception
.pending
= false;
8110 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
8111 kvm_update_dr0123(vcpu
);
8112 vcpu
->arch
.dr6
= DR6_INIT
;
8113 kvm_update_dr6(vcpu
);
8114 vcpu
->arch
.dr7
= DR7_FIXED_1
;
8115 kvm_update_dr7(vcpu
);
8119 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8120 vcpu
->arch
.apf
.msr_val
= 0;
8121 vcpu
->arch
.st
.msr_val
= 0;
8123 kvmclock_reset(vcpu
);
8125 kvm_clear_async_pf_completion_queue(vcpu
);
8126 kvm_async_pf_hash_reset(vcpu
);
8127 vcpu
->arch
.apf
.halted
= false;
8129 if (kvm_mpx_supported()) {
8130 void *mpx_state_buffer
;
8133 * To avoid have the INIT path from kvm_apic_has_events() that be
8134 * called with loaded FPU and does not let userspace fix the state.
8137 kvm_put_guest_fpu(vcpu
);
8138 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8139 XFEATURE_MASK_BNDREGS
);
8140 if (mpx_state_buffer
)
8141 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
8142 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8143 XFEATURE_MASK_BNDCSR
);
8144 if (mpx_state_buffer
)
8145 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
8147 kvm_load_guest_fpu(vcpu
);
8151 kvm_pmu_reset(vcpu
);
8152 vcpu
->arch
.smbase
= 0x30000;
8154 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
8155 vcpu
->arch
.msr_misc_features_enables
= 0;
8157 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8160 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
8161 vcpu
->arch
.regs_avail
= ~0;
8162 vcpu
->arch
.regs_dirty
= ~0;
8164 vcpu
->arch
.ia32_xss
= 0;
8166 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
8169 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
8171 struct kvm_segment cs
;
8173 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8174 cs
.selector
= vector
<< 8;
8175 cs
.base
= vector
<< 12;
8176 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8177 kvm_rip_write(vcpu
, 0);
8180 int kvm_arch_hardware_enable(void)
8183 struct kvm_vcpu
*vcpu
;
8188 bool stable
, backwards_tsc
= false;
8190 kvm_shared_msr_cpu_online();
8191 ret
= kvm_x86_ops
->hardware_enable();
8195 local_tsc
= rdtsc();
8196 stable
= !kvm_check_tsc_unstable();
8197 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8198 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8199 if (!stable
&& vcpu
->cpu
== smp_processor_id())
8200 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8201 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
8202 backwards_tsc
= true;
8203 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
8204 max_tsc
= vcpu
->arch
.last_host_tsc
;
8210 * Sometimes, even reliable TSCs go backwards. This happens on
8211 * platforms that reset TSC during suspend or hibernate actions, but
8212 * maintain synchronization. We must compensate. Fortunately, we can
8213 * detect that condition here, which happens early in CPU bringup,
8214 * before any KVM threads can be running. Unfortunately, we can't
8215 * bring the TSCs fully up to date with real time, as we aren't yet far
8216 * enough into CPU bringup that we know how much real time has actually
8217 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8218 * variables that haven't been updated yet.
8220 * So we simply find the maximum observed TSC above, then record the
8221 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8222 * the adjustment will be applied. Note that we accumulate
8223 * adjustments, in case multiple suspend cycles happen before some VCPU
8224 * gets a chance to run again. In the event that no KVM threads get a
8225 * chance to run, we will miss the entire elapsed period, as we'll have
8226 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8227 * loose cycle time. This isn't too big a deal, since the loss will be
8228 * uniform across all VCPUs (not to mention the scenario is extremely
8229 * unlikely). It is possible that a second hibernate recovery happens
8230 * much faster than a first, causing the observed TSC here to be
8231 * smaller; this would require additional padding adjustment, which is
8232 * why we set last_host_tsc to the local tsc observed here.
8234 * N.B. - this code below runs only on platforms with reliable TSC,
8235 * as that is the only way backwards_tsc is set above. Also note
8236 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8237 * have the same delta_cyc adjustment applied if backwards_tsc
8238 * is detected. Note further, this adjustment is only done once,
8239 * as we reset last_host_tsc on all VCPUs to stop this from being
8240 * called multiple times (one for each physical CPU bringup).
8242 * Platforms with unreliable TSCs don't have to deal with this, they
8243 * will be compensated by the logic in vcpu_load, which sets the TSC to
8244 * catchup mode. This will catchup all VCPUs to real time, but cannot
8245 * guarantee that they stay in perfect synchronization.
8247 if (backwards_tsc
) {
8248 u64 delta_cyc
= max_tsc
- local_tsc
;
8249 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8250 kvm
->arch
.backwards_tsc_observed
= true;
8251 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8252 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
8253 vcpu
->arch
.last_host_tsc
= local_tsc
;
8254 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8258 * We have to disable TSC offset matching.. if you were
8259 * booting a VM while issuing an S4 host suspend....
8260 * you may have some problem. Solving this issue is
8261 * left as an exercise to the reader.
8263 kvm
->arch
.last_tsc_nsec
= 0;
8264 kvm
->arch
.last_tsc_write
= 0;
8271 void kvm_arch_hardware_disable(void)
8273 kvm_x86_ops
->hardware_disable();
8274 drop_user_return_notifiers();
8277 int kvm_arch_hardware_setup(void)
8281 r
= kvm_x86_ops
->hardware_setup();
8285 if (kvm_has_tsc_control
) {
8287 * Make sure the user can only configure tsc_khz values that
8288 * fit into a signed integer.
8289 * A min value is not calculated needed because it will always
8290 * be 1 on all machines.
8292 u64 max
= min(0x7fffffffULL
,
8293 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8294 kvm_max_guest_tsc_khz
= max
;
8296 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8299 kvm_init_msr_list();
8303 void kvm_arch_hardware_unsetup(void)
8305 kvm_x86_ops
->hardware_unsetup();
8308 void kvm_arch_check_processor_compat(void *rtn
)
8310 kvm_x86_ops
->check_processor_compatibility(rtn
);
8313 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8315 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8317 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8319 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8321 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8324 struct static_key kvm_no_apic_vcpu __read_mostly
;
8325 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8327 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8332 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8333 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8334 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8335 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8337 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8339 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8344 vcpu
->arch
.pio_data
= page_address(page
);
8346 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8348 r
= kvm_mmu_create(vcpu
);
8350 goto fail_free_pio_data
;
8352 if (irqchip_in_kernel(vcpu
->kvm
)) {
8353 r
= kvm_create_lapic(vcpu
);
8355 goto fail_mmu_destroy
;
8357 static_key_slow_inc(&kvm_no_apic_vcpu
);
8359 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8361 if (!vcpu
->arch
.mce_banks
) {
8363 goto fail_free_lapic
;
8365 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8367 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8369 goto fail_free_mce_banks
;
8374 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8376 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8378 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8380 kvm_async_pf_hash_reset(vcpu
);
8383 vcpu
->arch
.pending_external_vector
= -1;
8384 vcpu
->arch
.preempted_in_kernel
= false;
8386 kvm_hv_vcpu_init(vcpu
);
8390 fail_free_mce_banks
:
8391 kfree(vcpu
->arch
.mce_banks
);
8393 kvm_free_lapic(vcpu
);
8395 kvm_mmu_destroy(vcpu
);
8397 free_page((unsigned long)vcpu
->arch
.pio_data
);
8402 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8406 kvm_hv_vcpu_uninit(vcpu
);
8407 kvm_pmu_destroy(vcpu
);
8408 kfree(vcpu
->arch
.mce_banks
);
8409 kvm_free_lapic(vcpu
);
8410 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8411 kvm_mmu_destroy(vcpu
);
8412 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8413 free_page((unsigned long)vcpu
->arch
.pio_data
);
8414 if (!lapic_in_kernel(vcpu
))
8415 static_key_slow_dec(&kvm_no_apic_vcpu
);
8418 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8420 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8423 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8428 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8429 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8430 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8431 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8432 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8434 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8435 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8436 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8437 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8438 &kvm
->arch
.irq_sources_bitmap
);
8440 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8441 mutex_init(&kvm
->arch
.apic_map_lock
);
8442 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8443 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8445 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8446 pvclock_update_vm_gtod_copy(kvm
);
8448 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8449 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8451 kvm_page_track_init(kvm
);
8452 kvm_mmu_init_vm(kvm
);
8454 if (kvm_x86_ops
->vm_init
)
8455 return kvm_x86_ops
->vm_init(kvm
);
8460 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8463 kvm_mmu_unload(vcpu
);
8467 static void kvm_free_vcpus(struct kvm
*kvm
)
8470 struct kvm_vcpu
*vcpu
;
8473 * Unpin any mmu pages first.
8475 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8476 kvm_clear_async_pf_completion_queue(vcpu
);
8477 kvm_unload_vcpu_mmu(vcpu
);
8479 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8480 kvm_arch_vcpu_free(vcpu
);
8482 mutex_lock(&kvm
->lock
);
8483 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8484 kvm
->vcpus
[i
] = NULL
;
8486 atomic_set(&kvm
->online_vcpus
, 0);
8487 mutex_unlock(&kvm
->lock
);
8490 void kvm_arch_sync_events(struct kvm
*kvm
)
8492 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8493 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8497 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8501 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8502 struct kvm_memory_slot
*slot
, old
;
8504 /* Called with kvm->slots_lock held. */
8505 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8508 slot
= id_to_memslot(slots
, id
);
8514 * MAP_SHARED to prevent internal slot pages from being moved
8517 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8518 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8519 if (IS_ERR((void *)hva
))
8520 return PTR_ERR((void *)hva
);
8529 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8530 struct kvm_userspace_memory_region m
;
8532 m
.slot
= id
| (i
<< 16);
8534 m
.guest_phys_addr
= gpa
;
8535 m
.userspace_addr
= hva
;
8536 m
.memory_size
= size
;
8537 r
= __kvm_set_memory_region(kvm
, &m
);
8543 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8547 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8549 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8553 mutex_lock(&kvm
->slots_lock
);
8554 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8555 mutex_unlock(&kvm
->slots_lock
);
8559 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8561 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8563 if (current
->mm
== kvm
->mm
) {
8565 * Free memory regions allocated on behalf of userspace,
8566 * unless the the memory map has changed due to process exit
8569 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8570 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8571 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8573 if (kvm_x86_ops
->vm_destroy
)
8574 kvm_x86_ops
->vm_destroy(kvm
);
8575 kvm_pic_destroy(kvm
);
8576 kvm_ioapic_destroy(kvm
);
8577 kvm_free_vcpus(kvm
);
8578 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8579 kvm_mmu_uninit_vm(kvm
);
8580 kvm_page_track_cleanup(kvm
);
8583 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8584 struct kvm_memory_slot
*dont
)
8588 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8589 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8590 kvfree(free
->arch
.rmap
[i
]);
8591 free
->arch
.rmap
[i
] = NULL
;
8596 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8597 dont
->arch
.lpage_info
[i
- 1]) {
8598 kvfree(free
->arch
.lpage_info
[i
- 1]);
8599 free
->arch
.lpage_info
[i
- 1] = NULL
;
8603 kvm_page_track_free_memslot(free
, dont
);
8606 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8607 unsigned long npages
)
8611 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8612 struct kvm_lpage_info
*linfo
;
8617 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8618 slot
->base_gfn
, level
) + 1;
8620 slot
->arch
.rmap
[i
] =
8621 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8622 if (!slot
->arch
.rmap
[i
])
8627 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8631 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8633 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8634 linfo
[0].disallow_lpage
= 1;
8635 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8636 linfo
[lpages
- 1].disallow_lpage
= 1;
8637 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8639 * If the gfn and userspace address are not aligned wrt each
8640 * other, or if explicitly asked to, disable large page
8641 * support for this slot
8643 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8644 !kvm_largepages_enabled()) {
8647 for (j
= 0; j
< lpages
; ++j
)
8648 linfo
[j
].disallow_lpage
= 1;
8652 if (kvm_page_track_create_memslot(slot
, npages
))
8658 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8659 kvfree(slot
->arch
.rmap
[i
]);
8660 slot
->arch
.rmap
[i
] = NULL
;
8664 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8665 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8670 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8673 * memslots->generation has been incremented.
8674 * mmio generation may have reached its maximum value.
8676 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8679 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8680 struct kvm_memory_slot
*memslot
,
8681 const struct kvm_userspace_memory_region
*mem
,
8682 enum kvm_mr_change change
)
8687 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8688 struct kvm_memory_slot
*new)
8690 /* Still write protect RO slot */
8691 if (new->flags
& KVM_MEM_READONLY
) {
8692 kvm_mmu_slot_remove_write_access(kvm
, new);
8697 * Call kvm_x86_ops dirty logging hooks when they are valid.
8699 * kvm_x86_ops->slot_disable_log_dirty is called when:
8701 * - KVM_MR_CREATE with dirty logging is disabled
8702 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8704 * The reason is, in case of PML, we need to set D-bit for any slots
8705 * with dirty logging disabled in order to eliminate unnecessary GPA
8706 * logging in PML buffer (and potential PML buffer full VMEXT). This
8707 * guarantees leaving PML enabled during guest's lifetime won't have
8708 * any additonal overhead from PML when guest is running with dirty
8709 * logging disabled for memory slots.
8711 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8712 * to dirty logging mode.
8714 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8716 * In case of write protect:
8718 * Write protect all pages for dirty logging.
8720 * All the sptes including the large sptes which point to this
8721 * slot are set to readonly. We can not create any new large
8722 * spte on this slot until the end of the logging.
8724 * See the comments in fast_page_fault().
8726 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8727 if (kvm_x86_ops
->slot_enable_log_dirty
)
8728 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8730 kvm_mmu_slot_remove_write_access(kvm
, new);
8732 if (kvm_x86_ops
->slot_disable_log_dirty
)
8733 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8737 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8738 const struct kvm_userspace_memory_region
*mem
,
8739 const struct kvm_memory_slot
*old
,
8740 const struct kvm_memory_slot
*new,
8741 enum kvm_mr_change change
)
8743 int nr_mmu_pages
= 0;
8745 if (!kvm
->arch
.n_requested_mmu_pages
)
8746 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8749 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8752 * Dirty logging tracks sptes in 4k granularity, meaning that large
8753 * sptes have to be split. If live migration is successful, the guest
8754 * in the source machine will be destroyed and large sptes will be
8755 * created in the destination. However, if the guest continues to run
8756 * in the source machine (for example if live migration fails), small
8757 * sptes will remain around and cause bad performance.
8759 * Scan sptes if dirty logging has been stopped, dropping those
8760 * which can be collapsed into a single large-page spte. Later
8761 * page faults will create the large-page sptes.
8763 if ((change
!= KVM_MR_DELETE
) &&
8764 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8765 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8766 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8769 * Set up write protection and/or dirty logging for the new slot.
8771 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8772 * been zapped so no dirty logging staff is needed for old slot. For
8773 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8774 * new and it's also covered when dealing with the new slot.
8776 * FIXME: const-ify all uses of struct kvm_memory_slot.
8778 if (change
!= KVM_MR_DELETE
)
8779 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8782 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8784 kvm_mmu_invalidate_zap_all_pages(kvm
);
8787 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8788 struct kvm_memory_slot
*slot
)
8790 kvm_page_track_flush_slot(kvm
, slot
);
8793 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8795 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8798 if (kvm_apic_has_events(vcpu
))
8801 if (vcpu
->arch
.pv
.pv_unhalted
)
8804 if (vcpu
->arch
.exception
.pending
)
8807 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8808 (vcpu
->arch
.nmi_pending
&&
8809 kvm_x86_ops
->nmi_allowed(vcpu
)))
8812 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8813 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8816 if (kvm_arch_interrupt_allowed(vcpu
) &&
8817 kvm_cpu_has_interrupt(vcpu
))
8820 if (kvm_hv_has_stimer_pending(vcpu
))
8826 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8828 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8831 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8833 return vcpu
->arch
.preempted_in_kernel
;
8836 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8838 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8841 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8843 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8846 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8848 if (is_64_bit_mode(vcpu
))
8849 return kvm_rip_read(vcpu
);
8850 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8851 kvm_rip_read(vcpu
));
8853 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8855 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8857 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8859 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8861 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8863 unsigned long rflags
;
8865 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8866 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8867 rflags
&= ~X86_EFLAGS_TF
;
8870 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8872 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8874 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8875 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8876 rflags
|= X86_EFLAGS_TF
;
8877 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8880 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8882 __kvm_set_rflags(vcpu
, rflags
);
8883 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8885 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8887 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8891 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8895 r
= kvm_mmu_reload(vcpu
);
8899 if (!vcpu
->arch
.mmu
.direct_map
&&
8900 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8903 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8906 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8908 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8911 static inline u32
kvm_async_pf_next_probe(u32 key
)
8913 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8916 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8918 u32 key
= kvm_async_pf_hash_fn(gfn
);
8920 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8921 key
= kvm_async_pf_next_probe(key
);
8923 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8926 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8929 u32 key
= kvm_async_pf_hash_fn(gfn
);
8931 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8932 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8933 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8934 key
= kvm_async_pf_next_probe(key
);
8939 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8941 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8944 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8948 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8950 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8952 j
= kvm_async_pf_next_probe(j
);
8953 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8955 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8957 * k lies cyclically in ]i,j]
8959 * |....j i.k.| or |.k..j i...|
8961 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8962 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8967 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8970 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8974 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8977 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8981 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8982 struct kvm_async_pf
*work
)
8984 struct x86_exception fault
;
8986 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8987 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8989 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8990 (vcpu
->arch
.apf
.send_user_only
&&
8991 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8992 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8993 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8994 fault
.vector
= PF_VECTOR
;
8995 fault
.error_code_valid
= true;
8996 fault
.error_code
= 0;
8997 fault
.nested_page_fault
= false;
8998 fault
.address
= work
->arch
.token
;
8999 fault
.async_page_fault
= true;
9000 kvm_inject_page_fault(vcpu
, &fault
);
9004 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
9005 struct kvm_async_pf
*work
)
9007 struct x86_exception fault
;
9010 if (work
->wakeup_all
)
9011 work
->arch
.token
= ~0; /* broadcast wakeup */
9013 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
9014 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
9016 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
9017 !apf_get_user(vcpu
, &val
)) {
9018 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
9019 vcpu
->arch
.exception
.pending
&&
9020 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
9021 !apf_put_user(vcpu
, 0)) {
9022 vcpu
->arch
.exception
.injected
= false;
9023 vcpu
->arch
.exception
.pending
= false;
9024 vcpu
->arch
.exception
.nr
= 0;
9025 vcpu
->arch
.exception
.has_error_code
= false;
9026 vcpu
->arch
.exception
.error_code
= 0;
9027 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
9028 fault
.vector
= PF_VECTOR
;
9029 fault
.error_code_valid
= true;
9030 fault
.error_code
= 0;
9031 fault
.nested_page_fault
= false;
9032 fault
.address
= work
->arch
.token
;
9033 fault
.async_page_fault
= true;
9034 kvm_inject_page_fault(vcpu
, &fault
);
9037 vcpu
->arch
.apf
.halted
= false;
9038 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9041 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
9043 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
9046 return kvm_can_do_async_pf(vcpu
);
9049 void kvm_arch_start_assignment(struct kvm
*kvm
)
9051 atomic_inc(&kvm
->arch
.assigned_device_count
);
9053 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
9055 void kvm_arch_end_assignment(struct kvm
*kvm
)
9057 atomic_dec(&kvm
->arch
.assigned_device_count
);
9059 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
9061 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
9063 return atomic_read(&kvm
->arch
.assigned_device_count
);
9065 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
9067 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
9069 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
9071 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
9073 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
9075 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
9077 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
9079 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
9081 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
9083 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
9085 bool kvm_arch_has_irq_bypass(void)
9087 return kvm_x86_ops
->update_pi_irte
!= NULL
;
9090 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
9091 struct irq_bypass_producer
*prod
)
9093 struct kvm_kernel_irqfd
*irqfd
=
9094 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9096 irqfd
->producer
= prod
;
9098 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
9099 prod
->irq
, irqfd
->gsi
, 1);
9102 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
9103 struct irq_bypass_producer
*prod
)
9106 struct kvm_kernel_irqfd
*irqfd
=
9107 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9109 WARN_ON(irqfd
->producer
!= prod
);
9110 irqfd
->producer
= NULL
;
9113 * When producer of consumer is unregistered, we change back to
9114 * remapped mode, so we can re-use the current implementation
9115 * when the irq is masked/disabled or the consumer side (KVM
9116 * int this case doesn't want to receive the interrupts.
9118 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
9120 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
9121 " fails: %d\n", irqfd
->consumer
.token
, ret
);
9124 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
9125 uint32_t guest_irq
, bool set
)
9127 if (!kvm_x86_ops
->update_pi_irte
)
9130 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
9133 bool kvm_vector_hashing_enabled(void)
9135 return vector_hashing
;
9137 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
9139 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
9140 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
9141 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
9142 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
9143 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
9144 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
9145 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
9146 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
9147 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
9148 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
9149 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
9150 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
9151 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
9152 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
9153 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
9154 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
9155 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
9156 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
9157 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);