2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <trace/events/kvm.h>
59 #include <asm/debugreg.h>
63 #include <linux/kernel_stat.h>
64 #include <asm/fpu/internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
67 #include <asm/irq_remapping.h>
69 #define CREATE_TRACE_POINTS
72 #define MAX_IO_MSRS 256
73 #define KVM_MAX_MCE_BANKS 32
74 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
75 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
77 #define emul_to_vcpu(ctxt) \
78 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
81 * - enable syscall per default because its emulated by KVM
82 * - enable LME and LMA per default on 64 bit KVM
86 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
88 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
91 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
92 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
94 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
95 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
97 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
98 static void process_nmi(struct kvm_vcpu
*vcpu
);
99 static void enter_smm(struct kvm_vcpu
*vcpu
);
100 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
102 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
103 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
105 static bool __read_mostly ignore_msrs
= 0;
106 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
108 unsigned int min_timer_period_us
= 500;
109 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
111 static bool __read_mostly kvmclock_periodic_sync
= true;
112 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
114 bool __read_mostly kvm_has_tsc_control
;
115 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
116 u32 __read_mostly kvm_max_guest_tsc_khz
;
117 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
118 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
119 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
120 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
121 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
122 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
123 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
125 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
126 static u32 __read_mostly tsc_tolerance_ppm
= 250;
127 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
129 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
130 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
131 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
133 static bool __read_mostly vector_hashing
= true;
134 module_param(vector_hashing
, bool, S_IRUGO
);
136 static bool __read_mostly backwards_tsc_observed
= false;
138 #define KVM_NR_SHARED_MSRS 16
140 struct kvm_shared_msrs_global
{
142 u32 msrs
[KVM_NR_SHARED_MSRS
];
145 struct kvm_shared_msrs
{
146 struct user_return_notifier urn
;
148 struct kvm_shared_msr_values
{
151 } values
[KVM_NR_SHARED_MSRS
];
154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
155 static struct kvm_shared_msrs __percpu
*shared_msrs
;
157 struct kvm_stats_debugfs_item debugfs_entries
[] = {
158 { "pf_fixed", VCPU_STAT(pf_fixed
) },
159 { "pf_guest", VCPU_STAT(pf_guest
) },
160 { "tlb_flush", VCPU_STAT(tlb_flush
) },
161 { "invlpg", VCPU_STAT(invlpg
) },
162 { "exits", VCPU_STAT(exits
) },
163 { "io_exits", VCPU_STAT(io_exits
) },
164 { "mmio_exits", VCPU_STAT(mmio_exits
) },
165 { "signal_exits", VCPU_STAT(signal_exits
) },
166 { "irq_window", VCPU_STAT(irq_window_exits
) },
167 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
168 { "halt_exits", VCPU_STAT(halt_exits
) },
169 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
170 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
171 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
172 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
173 { "hypercalls", VCPU_STAT(hypercalls
) },
174 { "request_irq", VCPU_STAT(request_irq_exits
) },
175 { "irq_exits", VCPU_STAT(irq_exits
) },
176 { "host_state_reload", VCPU_STAT(host_state_reload
) },
177 { "efer_reload", VCPU_STAT(efer_reload
) },
178 { "fpu_reload", VCPU_STAT(fpu_reload
) },
179 { "insn_emulation", VCPU_STAT(insn_emulation
) },
180 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
181 { "irq_injections", VCPU_STAT(irq_injections
) },
182 { "nmi_injections", VCPU_STAT(nmi_injections
) },
183 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
184 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
185 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
186 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
187 { "mmu_flooded", VM_STAT(mmu_flooded
) },
188 { "mmu_recycled", VM_STAT(mmu_recycled
) },
189 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
190 { "mmu_unsync", VM_STAT(mmu_unsync
) },
191 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
192 { "largepages", VM_STAT(lpages
) },
196 u64 __read_mostly host_xcr0
;
198 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
200 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
203 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
204 vcpu
->arch
.apf
.gfns
[i
] = ~0;
207 static void kvm_on_user_return(struct user_return_notifier
*urn
)
210 struct kvm_shared_msrs
*locals
211 = container_of(urn
, struct kvm_shared_msrs
, urn
);
212 struct kvm_shared_msr_values
*values
;
214 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
215 values
= &locals
->values
[slot
];
216 if (values
->host
!= values
->curr
) {
217 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
218 values
->curr
= values
->host
;
221 locals
->registered
= false;
222 user_return_notifier_unregister(urn
);
225 static void shared_msr_update(unsigned slot
, u32 msr
)
228 unsigned int cpu
= smp_processor_id();
229 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
231 /* only read, and nobody should modify it at this time,
232 * so don't need lock */
233 if (slot
>= shared_msrs_global
.nr
) {
234 printk(KERN_ERR
"kvm: invalid MSR slot!");
237 rdmsrl_safe(msr
, &value
);
238 smsr
->values
[slot
].host
= value
;
239 smsr
->values
[slot
].curr
= value
;
242 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
244 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
245 shared_msrs_global
.msrs
[slot
] = msr
;
246 if (slot
>= shared_msrs_global
.nr
)
247 shared_msrs_global
.nr
= slot
+ 1;
249 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
251 static void kvm_shared_msr_cpu_online(void)
255 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
256 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
259 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
261 unsigned int cpu
= smp_processor_id();
262 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
265 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
267 smsr
->values
[slot
].curr
= value
;
268 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
272 if (!smsr
->registered
) {
273 smsr
->urn
.on_user_return
= kvm_on_user_return
;
274 user_return_notifier_register(&smsr
->urn
);
275 smsr
->registered
= true;
279 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
281 static void drop_user_return_notifiers(void)
283 unsigned int cpu
= smp_processor_id();
284 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
286 if (smsr
->registered
)
287 kvm_on_user_return(&smsr
->urn
);
290 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
292 return vcpu
->arch
.apic_base
;
294 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
296 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
298 u64 old_state
= vcpu
->arch
.apic_base
&
299 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
300 u64 new_state
= msr_info
->data
&
301 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
302 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
303 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
305 if (!msr_info
->host_initiated
&&
306 ((msr_info
->data
& reserved_bits
) != 0 ||
307 new_state
== X2APIC_ENABLE
||
308 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
309 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
310 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
314 kvm_lapic_set_base(vcpu
, msr_info
->data
);
317 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
319 asmlinkage __visible
void kvm_spurious_fault(void)
321 /* Fault while not rebooting. We want the trace. */
324 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
326 #define EXCPT_BENIGN 0
327 #define EXCPT_CONTRIBUTORY 1
330 static int exception_class(int vector
)
340 return EXCPT_CONTRIBUTORY
;
347 #define EXCPT_FAULT 0
349 #define EXCPT_ABORT 2
350 #define EXCPT_INTERRUPT 3
352 static int exception_type(int vector
)
356 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
357 return EXCPT_INTERRUPT
;
361 /* #DB is trap, as instruction watchpoints are handled elsewhere */
362 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
365 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
368 /* Reserved exceptions will result in fault */
372 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
373 unsigned nr
, bool has_error
, u32 error_code
,
379 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
381 if (!vcpu
->arch
.exception
.pending
) {
383 if (has_error
&& !is_protmode(vcpu
))
385 vcpu
->arch
.exception
.pending
= true;
386 vcpu
->arch
.exception
.has_error_code
= has_error
;
387 vcpu
->arch
.exception
.nr
= nr
;
388 vcpu
->arch
.exception
.error_code
= error_code
;
389 vcpu
->arch
.exception
.reinject
= reinject
;
393 /* to check exception */
394 prev_nr
= vcpu
->arch
.exception
.nr
;
395 if (prev_nr
== DF_VECTOR
) {
396 /* triple fault -> shutdown */
397 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
400 class1
= exception_class(prev_nr
);
401 class2
= exception_class(nr
);
402 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
403 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
404 /* generate double fault per SDM Table 5-5 */
405 vcpu
->arch
.exception
.pending
= true;
406 vcpu
->arch
.exception
.has_error_code
= true;
407 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
408 vcpu
->arch
.exception
.error_code
= 0;
410 /* replace previous exception with a new one in a hope
411 that instruction re-execution will regenerate lost
416 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
418 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
420 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
422 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
424 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
426 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
428 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
431 kvm_inject_gp(vcpu
, 0);
433 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
435 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
437 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
439 ++vcpu
->stat
.pf_guest
;
440 vcpu
->arch
.cr2
= fault
->address
;
441 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
443 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
445 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
447 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
448 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
450 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
452 return fault
->nested_page_fault
;
455 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
457 atomic_inc(&vcpu
->arch
.nmi_queued
);
458 kvm_make_request(KVM_REQ_NMI
, vcpu
);
460 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
462 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
464 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
466 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
468 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
470 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
472 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
475 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
476 * a #GP and return false.
478 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
480 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
482 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
485 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
487 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
489 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
492 kvm_queue_exception(vcpu
, UD_VECTOR
);
495 EXPORT_SYMBOL_GPL(kvm_require_dr
);
498 * This function will be used to read from the physical memory of the currently
499 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
500 * can read from guest physical or from the guest's guest physical memory.
502 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
503 gfn_t ngfn
, void *data
, int offset
, int len
,
506 struct x86_exception exception
;
510 ngpa
= gfn_to_gpa(ngfn
);
511 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
512 if (real_gfn
== UNMAPPED_GVA
)
515 real_gfn
= gpa_to_gfn(real_gfn
);
517 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
519 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
521 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
522 void *data
, int offset
, int len
, u32 access
)
524 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
525 data
, offset
, len
, access
);
529 * Load the pae pdptrs. Return true is they are all valid.
531 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
533 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
534 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
537 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
539 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
540 offset
* sizeof(u64
), sizeof(pdpte
),
541 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
546 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
547 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
549 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
556 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
557 __set_bit(VCPU_EXREG_PDPTR
,
558 (unsigned long *)&vcpu
->arch
.regs_avail
);
559 __set_bit(VCPU_EXREG_PDPTR
,
560 (unsigned long *)&vcpu
->arch
.regs_dirty
);
565 EXPORT_SYMBOL_GPL(load_pdptrs
);
567 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
569 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
575 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
578 if (!test_bit(VCPU_EXREG_PDPTR
,
579 (unsigned long *)&vcpu
->arch
.regs_avail
))
582 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
583 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
584 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
585 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
588 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
594 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
596 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
597 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
602 if (cr0
& 0xffffffff00000000UL
)
606 cr0
&= ~CR0_RESERVED_BITS
;
608 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
611 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
614 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
616 if ((vcpu
->arch
.efer
& EFER_LME
)) {
621 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
626 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
631 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
634 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
636 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
637 kvm_clear_async_pf_completion_queue(vcpu
);
638 kvm_async_pf_hash_reset(vcpu
);
641 if ((cr0
^ old_cr0
) & update_bits
)
642 kvm_mmu_reset_context(vcpu
);
644 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
645 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
646 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
647 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
651 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
653 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
655 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
657 EXPORT_SYMBOL_GPL(kvm_lmsw
);
659 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
661 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
662 !vcpu
->guest_xcr0_loaded
) {
663 /* kvm_set_xcr() also depends on this */
664 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
665 vcpu
->guest_xcr0_loaded
= 1;
669 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
671 if (vcpu
->guest_xcr0_loaded
) {
672 if (vcpu
->arch
.xcr0
!= host_xcr0
)
673 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
674 vcpu
->guest_xcr0_loaded
= 0;
678 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
681 u64 old_xcr0
= vcpu
->arch
.xcr0
;
684 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
685 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
687 if (!(xcr0
& XFEATURE_MASK_FP
))
689 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
693 * Do not allow the guest to set bits that we do not support
694 * saving. However, xcr0 bit 0 is always set, even if the
695 * emulated CPU does not support XSAVE (see fx_init).
697 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
698 if (xcr0
& ~valid_bits
)
701 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
702 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
705 if (xcr0
& XFEATURE_MASK_AVX512
) {
706 if (!(xcr0
& XFEATURE_MASK_YMM
))
708 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
711 vcpu
->arch
.xcr0
= xcr0
;
713 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
714 kvm_update_cpuid(vcpu
);
718 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
720 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
721 __kvm_set_xcr(vcpu
, index
, xcr
)) {
722 kvm_inject_gp(vcpu
, 0);
727 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
729 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
731 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
732 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
733 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
735 if (cr4
& CR4_RESERVED_BITS
)
738 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
741 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
744 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
747 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
750 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
753 if (is_long_mode(vcpu
)) {
754 if (!(cr4
& X86_CR4_PAE
))
756 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
757 && ((cr4
^ old_cr4
) & pdptr_bits
)
758 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
762 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
763 if (!guest_cpuid_has_pcid(vcpu
))
766 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
767 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
771 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
774 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
775 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
776 kvm_mmu_reset_context(vcpu
);
778 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
779 kvm_update_cpuid(vcpu
);
783 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
785 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
788 cr3
&= ~CR3_PCID_INVD
;
791 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
792 kvm_mmu_sync_roots(vcpu
);
793 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
797 if (is_long_mode(vcpu
)) {
798 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
800 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
801 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
804 vcpu
->arch
.cr3
= cr3
;
805 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
806 kvm_mmu_new_cr3(vcpu
);
809 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
811 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
813 if (cr8
& CR8_RESERVED_BITS
)
815 if (lapic_in_kernel(vcpu
))
816 kvm_lapic_set_tpr(vcpu
, cr8
);
818 vcpu
->arch
.cr8
= cr8
;
821 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
823 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
825 if (lapic_in_kernel(vcpu
))
826 return kvm_lapic_get_cr8(vcpu
);
828 return vcpu
->arch
.cr8
;
830 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
832 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
836 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
837 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
838 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
839 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
843 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
845 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
846 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
849 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
853 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
854 dr7
= vcpu
->arch
.guest_debug_dr7
;
856 dr7
= vcpu
->arch
.dr7
;
857 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
858 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
859 if (dr7
& DR7_BP_EN_MASK
)
860 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
863 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
865 u64 fixed
= DR6_FIXED_1
;
867 if (!guest_cpuid_has_rtm(vcpu
))
872 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
876 vcpu
->arch
.db
[dr
] = val
;
877 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
878 vcpu
->arch
.eff_db
[dr
] = val
;
883 if (val
& 0xffffffff00000000ULL
)
885 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
886 kvm_update_dr6(vcpu
);
891 if (val
& 0xffffffff00000000ULL
)
893 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
894 kvm_update_dr7(vcpu
);
901 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
903 if (__kvm_set_dr(vcpu
, dr
, val
)) {
904 kvm_inject_gp(vcpu
, 0);
909 EXPORT_SYMBOL_GPL(kvm_set_dr
);
911 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
915 *val
= vcpu
->arch
.db
[dr
];
920 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
921 *val
= vcpu
->arch
.dr6
;
923 *val
= kvm_x86_ops
->get_dr6(vcpu
);
928 *val
= vcpu
->arch
.dr7
;
933 EXPORT_SYMBOL_GPL(kvm_get_dr
);
935 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
937 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
941 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
944 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
945 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
948 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
951 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
952 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
954 * This list is modified at module load time to reflect the
955 * capabilities of the host cpu. This capabilities test skips MSRs that are
956 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
957 * may depend on host virtualization features rather than host cpu features.
960 static u32 msrs_to_save
[] = {
961 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
964 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
966 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
967 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
970 static unsigned num_msrs_to_save
;
972 static u32 emulated_msrs
[] = {
973 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
974 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
975 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
976 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
977 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
978 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
981 HV_X64_MSR_VP_RUNTIME
,
983 HV_X64_MSR_STIMER0_CONFIG
,
984 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
988 MSR_IA32_TSCDEADLINE
,
989 MSR_IA32_MISC_ENABLE
,
992 MSR_IA32_MCG_EXT_CTL
,
996 static unsigned num_emulated_msrs
;
998 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1000 if (efer
& efer_reserved_bits
)
1003 if (efer
& EFER_FFXSR
) {
1004 struct kvm_cpuid_entry2
*feat
;
1006 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1007 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1011 if (efer
& EFER_SVME
) {
1012 struct kvm_cpuid_entry2
*feat
;
1014 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1015 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1021 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1023 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1025 u64 old_efer
= vcpu
->arch
.efer
;
1027 if (!kvm_valid_efer(vcpu
, efer
))
1031 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1035 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1037 kvm_x86_ops
->set_efer(vcpu
, efer
);
1039 /* Update reserved bits */
1040 if ((efer
^ old_efer
) & EFER_NX
)
1041 kvm_mmu_reset_context(vcpu
);
1046 void kvm_enable_efer_bits(u64 mask
)
1048 efer_reserved_bits
&= ~mask
;
1050 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1053 * Writes msr value into into the appropriate "register".
1054 * Returns 0 on success, non-0 otherwise.
1055 * Assumes vcpu_load() was already called.
1057 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1059 switch (msr
->index
) {
1062 case MSR_KERNEL_GS_BASE
:
1065 if (is_noncanonical_address(msr
->data
))
1068 case MSR_IA32_SYSENTER_EIP
:
1069 case MSR_IA32_SYSENTER_ESP
:
1071 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1072 * non-canonical address is written on Intel but not on
1073 * AMD (which ignores the top 32-bits, because it does
1074 * not implement 64-bit SYSENTER).
1076 * 64-bit code should hence be able to write a non-canonical
1077 * value on AMD. Making the address canonical ensures that
1078 * vmentry does not fail on Intel after writing a non-canonical
1079 * value, and that something deterministic happens if the guest
1080 * invokes 64-bit SYSENTER.
1082 msr
->data
= get_canonical(msr
->data
);
1084 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1086 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1089 * Adapt set_msr() to msr_io()'s calling convention
1091 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1093 struct msr_data msr
;
1097 msr
.host_initiated
= true;
1098 r
= kvm_get_msr(vcpu
, &msr
);
1106 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1108 struct msr_data msr
;
1112 msr
.host_initiated
= true;
1113 return kvm_set_msr(vcpu
, &msr
);
1116 #ifdef CONFIG_X86_64
1117 struct pvclock_gtod_data
{
1120 struct { /* extract of a clocksource struct */
1132 static struct pvclock_gtod_data pvclock_gtod_data
;
1134 static void update_pvclock_gtod(struct timekeeper
*tk
)
1136 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1139 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1141 write_seqcount_begin(&vdata
->seq
);
1143 /* copy pvclock gtod data */
1144 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1145 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1146 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1147 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1148 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1150 vdata
->boot_ns
= boot_ns
;
1151 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1153 write_seqcount_end(&vdata
->seq
);
1157 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1160 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1161 * vcpu_enter_guest. This function is only called from
1162 * the physical CPU that is running vcpu.
1164 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1167 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1171 struct pvclock_wall_clock wc
;
1172 struct timespec64 boot
;
1177 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1182 ++version
; /* first time write, random junk */
1186 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1190 * The guest calculates current wall clock time by adding
1191 * system time (updated by kvm_guest_time_update below) to the
1192 * wall clock specified here. guest system time equals host
1193 * system time for us, thus we must fill in host boot time here.
1195 getboottime64(&boot
);
1197 if (kvm
->arch
.kvmclock_offset
) {
1198 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1199 boot
= timespec64_sub(boot
, ts
);
1201 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1202 wc
.nsec
= boot
.tv_nsec
;
1203 wc
.version
= version
;
1205 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1208 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1211 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1213 do_shl32_div32(dividend
, divisor
);
1217 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1218 s8
*pshift
, u32
*pmultiplier
)
1226 scaled64
= scaled_hz
;
1227 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1232 tps32
= (uint32_t)tps64
;
1233 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1234 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1242 *pmultiplier
= div_frac(scaled64
, tps32
);
1244 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1245 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1248 #ifdef CONFIG_X86_64
1249 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1252 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1253 static unsigned long max_tsc_khz
;
1255 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1257 u64 v
= (u64
)khz
* (1000000 + ppm
);
1262 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1266 /* Guest TSC same frequency as host TSC? */
1268 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1272 /* TSC scaling supported? */
1273 if (!kvm_has_tsc_control
) {
1274 if (user_tsc_khz
> tsc_khz
) {
1275 vcpu
->arch
.tsc_catchup
= 1;
1276 vcpu
->arch
.tsc_always_catchup
= 1;
1279 WARN(1, "user requested TSC rate below hardware speed\n");
1284 /* TSC scaling required - calculate ratio */
1285 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1286 user_tsc_khz
, tsc_khz
);
1288 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1289 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1294 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1298 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1300 u32 thresh_lo
, thresh_hi
;
1301 int use_scaling
= 0;
1303 /* tsc_khz can be zero if TSC calibration fails */
1304 if (user_tsc_khz
== 0) {
1305 /* set tsc_scaling_ratio to a safe value */
1306 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1310 /* Compute a scale to convert nanoseconds in TSC cycles */
1311 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1312 &vcpu
->arch
.virtual_tsc_shift
,
1313 &vcpu
->arch
.virtual_tsc_mult
);
1314 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1317 * Compute the variation in TSC rate which is acceptable
1318 * within the range of tolerance and decide if the
1319 * rate being applied is within that bounds of the hardware
1320 * rate. If so, no scaling or compensation need be done.
1322 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1323 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1324 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1325 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1328 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1331 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1333 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1334 vcpu
->arch
.virtual_tsc_mult
,
1335 vcpu
->arch
.virtual_tsc_shift
);
1336 tsc
+= vcpu
->arch
.this_tsc_write
;
1340 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1342 #ifdef CONFIG_X86_64
1344 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1345 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1347 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1348 atomic_read(&vcpu
->kvm
->online_vcpus
));
1351 * Once the masterclock is enabled, always perform request in
1352 * order to update it.
1354 * In order to enable masterclock, the host clocksource must be TSC
1355 * and the vcpus need to have matched TSCs. When that happens,
1356 * perform request to enable masterclock.
1358 if (ka
->use_master_clock
||
1359 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1360 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1362 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1363 atomic_read(&vcpu
->kvm
->online_vcpus
),
1364 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1368 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1370 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1371 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1375 * Multiply tsc by a fixed point number represented by ratio.
1377 * The most significant 64-N bits (mult) of ratio represent the
1378 * integral part of the fixed point number; the remaining N bits
1379 * (frac) represent the fractional part, ie. ratio represents a fixed
1380 * point number (mult + frac * 2^(-N)).
1382 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1384 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1386 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1389 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1392 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1394 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1395 _tsc
= __scale_tsc(ratio
, tsc
);
1399 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1401 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1405 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1407 return target_tsc
- tsc
;
1410 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1412 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1414 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1416 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1418 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1419 vcpu
->arch
.tsc_offset
= offset
;
1422 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1424 struct kvm
*kvm
= vcpu
->kvm
;
1425 u64 offset
, ns
, elapsed
;
1426 unsigned long flags
;
1429 bool already_matched
;
1430 u64 data
= msr
->data
;
1432 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1433 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1434 ns
= ktime_get_boot_ns();
1435 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1437 if (vcpu
->arch
.virtual_tsc_khz
) {
1440 /* n.b - signed multiplication and division required */
1441 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1442 #ifdef CONFIG_X86_64
1443 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1445 /* do_div() only does unsigned */
1446 asm("1: idivl %[divisor]\n"
1447 "2: xor %%edx, %%edx\n"
1448 " movl $0, %[faulted]\n"
1450 ".section .fixup,\"ax\"\n"
1451 "4: movl $1, %[faulted]\n"
1455 _ASM_EXTABLE(1b
, 4b
)
1457 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1458 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1461 do_div(elapsed
, 1000);
1466 /* idivl overflow => difference is larger than USEC_PER_SEC */
1468 usdiff
= USEC_PER_SEC
;
1470 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1473 * Special case: TSC write with a small delta (1 second) of virtual
1474 * cycle time against real time is interpreted as an attempt to
1475 * synchronize the CPU.
1477 * For a reliable TSC, we can match TSC offsets, and for an unstable
1478 * TSC, we add elapsed time in this computation. We could let the
1479 * compensation code attempt to catch up if we fall behind, but
1480 * it's better to try to match offsets from the beginning.
1482 if (usdiff
< USEC_PER_SEC
&&
1483 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1484 if (!check_tsc_unstable()) {
1485 offset
= kvm
->arch
.cur_tsc_offset
;
1486 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1488 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1490 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1491 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1494 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1497 * We split periods of matched TSC writes into generations.
1498 * For each generation, we track the original measured
1499 * nanosecond time, offset, and write, so if TSCs are in
1500 * sync, we can match exact offset, and if not, we can match
1501 * exact software computation in compute_guest_tsc()
1503 * These values are tracked in kvm->arch.cur_xxx variables.
1505 kvm
->arch
.cur_tsc_generation
++;
1506 kvm
->arch
.cur_tsc_nsec
= ns
;
1507 kvm
->arch
.cur_tsc_write
= data
;
1508 kvm
->arch
.cur_tsc_offset
= offset
;
1510 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1511 kvm
->arch
.cur_tsc_generation
, data
);
1515 * We also track th most recent recorded KHZ, write and time to
1516 * allow the matching interval to be extended at each write.
1518 kvm
->arch
.last_tsc_nsec
= ns
;
1519 kvm
->arch
.last_tsc_write
= data
;
1520 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1522 vcpu
->arch
.last_guest_tsc
= data
;
1524 /* Keep track of which generation this VCPU has synchronized to */
1525 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1526 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1527 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1529 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1530 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1531 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1532 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1534 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1536 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1537 } else if (!already_matched
) {
1538 kvm
->arch
.nr_vcpus_matched_tsc
++;
1541 kvm_track_tsc_matching(vcpu
);
1542 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1545 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1547 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1550 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1553 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1555 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1556 WARN_ON(adjustment
< 0);
1557 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1558 adjust_tsc_offset_guest(vcpu
, adjustment
);
1561 #ifdef CONFIG_X86_64
1563 static cycle_t
read_tsc(void)
1565 cycle_t ret
= (cycle_t
)rdtsc_ordered();
1566 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1568 if (likely(ret
>= last
))
1572 * GCC likes to generate cmov here, but this branch is extremely
1573 * predictable (it's just a function of time and the likely is
1574 * very likely) and there's a data dependence, so force GCC
1575 * to generate a branch instead. I don't barrier() because
1576 * we don't actually need a barrier, and if this function
1577 * ever gets inlined it will generate worse code.
1583 static inline u64
vgettsc(cycle_t
*cycle_now
)
1586 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1588 *cycle_now
= read_tsc();
1590 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1591 return v
* gtod
->clock
.mult
;
1594 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1596 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1602 seq
= read_seqcount_begin(>od
->seq
);
1603 mode
= gtod
->clock
.vclock_mode
;
1604 ns
= gtod
->nsec_base
;
1605 ns
+= vgettsc(cycle_now
);
1606 ns
>>= gtod
->clock
.shift
;
1607 ns
+= gtod
->boot_ns
;
1608 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1614 /* returns true if host is using tsc clocksource */
1615 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1617 /* checked again under seqlock below */
1618 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1621 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1627 * Assuming a stable TSC across physical CPUS, and a stable TSC
1628 * across virtual CPUs, the following condition is possible.
1629 * Each numbered line represents an event visible to both
1630 * CPUs at the next numbered event.
1632 * "timespecX" represents host monotonic time. "tscX" represents
1635 * VCPU0 on CPU0 | VCPU1 on CPU1
1637 * 1. read timespec0,tsc0
1638 * 2. | timespec1 = timespec0 + N
1640 * 3. transition to guest | transition to guest
1641 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1642 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1643 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1645 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1648 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1650 * - 0 < N - M => M < N
1652 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1653 * always the case (the difference between two distinct xtime instances
1654 * might be smaller then the difference between corresponding TSC reads,
1655 * when updating guest vcpus pvclock areas).
1657 * To avoid that problem, do not allow visibility of distinct
1658 * system_timestamp/tsc_timestamp values simultaneously: use a master
1659 * copy of host monotonic time values. Update that master copy
1662 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1666 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1668 #ifdef CONFIG_X86_64
1669 struct kvm_arch
*ka
= &kvm
->arch
;
1671 bool host_tsc_clocksource
, vcpus_matched
;
1673 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1674 atomic_read(&kvm
->online_vcpus
));
1677 * If the host uses TSC clock, then passthrough TSC as stable
1680 host_tsc_clocksource
= kvm_get_time_and_clockread(
1681 &ka
->master_kernel_ns
,
1682 &ka
->master_cycle_now
);
1684 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1685 && !backwards_tsc_observed
1686 && !ka
->boot_vcpu_runs_old_kvmclock
;
1688 if (ka
->use_master_clock
)
1689 atomic_set(&kvm_guest_has_master_clock
, 1);
1691 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1692 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1697 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1699 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1702 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1704 #ifdef CONFIG_X86_64
1706 struct kvm_vcpu
*vcpu
;
1707 struct kvm_arch
*ka
= &kvm
->arch
;
1709 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1710 kvm_make_mclock_inprogress_request(kvm
);
1711 /* no guest entries from this point */
1712 pvclock_update_vm_gtod_copy(kvm
);
1714 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1715 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1717 /* guest entries allowed */
1718 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1719 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1721 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1725 static u64
__get_kvmclock_ns(struct kvm
*kvm
)
1727 struct kvm_vcpu
*vcpu
= kvm_get_vcpu(kvm
, 0);
1728 struct kvm_arch
*ka
= &kvm
->arch
;
1731 if (vcpu
->arch
.hv_clock
.flags
& PVCLOCK_TSC_STABLE_BIT
) {
1732 u64 tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
1733 ns
= __pvclock_read_cycles(&vcpu
->arch
.hv_clock
, tsc
);
1735 ns
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1741 u64
get_kvmclock_ns(struct kvm
*kvm
)
1743 unsigned long flags
;
1746 local_irq_save(flags
);
1747 ns
= __get_kvmclock_ns(kvm
);
1748 local_irq_restore(flags
);
1753 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1755 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1756 struct pvclock_vcpu_time_info guest_hv_clock
;
1758 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1759 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1762 /* This VCPU is paused, but it's legal for a guest to read another
1763 * VCPU's kvmclock, so we really have to follow the specification where
1764 * it says that version is odd if data is being modified, and even after
1767 * Version field updates must be kept separate. This is because
1768 * kvm_write_guest_cached might use a "rep movs" instruction, and
1769 * writes within a string instruction are weakly ordered. So there
1770 * are three writes overall.
1772 * As a small optimization, only write the version field in the first
1773 * and third write. The vcpu->pv_time cache is still valid, because the
1774 * version field is the first in the struct.
1776 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1778 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1779 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1781 sizeof(vcpu
->hv_clock
.version
));
1785 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1786 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1788 if (vcpu
->pvclock_set_guest_stopped_request
) {
1789 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1790 vcpu
->pvclock_set_guest_stopped_request
= false;
1793 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1795 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1797 sizeof(vcpu
->hv_clock
));
1801 vcpu
->hv_clock
.version
++;
1802 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1804 sizeof(vcpu
->hv_clock
.version
));
1807 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1809 unsigned long flags
, tgt_tsc_khz
;
1810 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1811 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1813 u64 tsc_timestamp
, host_tsc
;
1815 bool use_master_clock
;
1821 * If the host uses TSC clock, then passthrough TSC as stable
1824 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1825 use_master_clock
= ka
->use_master_clock
;
1826 if (use_master_clock
) {
1827 host_tsc
= ka
->master_cycle_now
;
1828 kernel_ns
= ka
->master_kernel_ns
;
1830 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1832 /* Keep irq disabled to prevent changes to the clock */
1833 local_irq_save(flags
);
1834 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1835 if (unlikely(tgt_tsc_khz
== 0)) {
1836 local_irq_restore(flags
);
1837 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1840 if (!use_master_clock
) {
1842 kernel_ns
= ktime_get_boot_ns();
1845 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1848 * We may have to catch up the TSC to match elapsed wall clock
1849 * time for two reasons, even if kvmclock is used.
1850 * 1) CPU could have been running below the maximum TSC rate
1851 * 2) Broken TSC compensation resets the base at each VCPU
1852 * entry to avoid unknown leaps of TSC even when running
1853 * again on the same CPU. This may cause apparent elapsed
1854 * time to disappear, and the guest to stand still or run
1857 if (vcpu
->tsc_catchup
) {
1858 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1859 if (tsc
> tsc_timestamp
) {
1860 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1861 tsc_timestamp
= tsc
;
1865 local_irq_restore(flags
);
1867 /* With all the info we got, fill in the values */
1869 if (kvm_has_tsc_control
)
1870 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1872 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1873 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1874 &vcpu
->hv_clock
.tsc_shift
,
1875 &vcpu
->hv_clock
.tsc_to_system_mul
);
1876 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1879 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1880 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1881 vcpu
->last_guest_tsc
= tsc_timestamp
;
1883 /* If the host uses TSC clocksource, then it is stable */
1885 if (use_master_clock
)
1886 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1888 vcpu
->hv_clock
.flags
= pvclock_flags
;
1890 if (vcpu
->pv_time_enabled
)
1891 kvm_setup_pvclock_page(v
);
1892 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1893 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1898 * kvmclock updates which are isolated to a given vcpu, such as
1899 * vcpu->cpu migration, should not allow system_timestamp from
1900 * the rest of the vcpus to remain static. Otherwise ntp frequency
1901 * correction applies to one vcpu's system_timestamp but not
1904 * So in those cases, request a kvmclock update for all vcpus.
1905 * We need to rate-limit these requests though, as they can
1906 * considerably slow guests that have a large number of vcpus.
1907 * The time for a remote vcpu to update its kvmclock is bound
1908 * by the delay we use to rate-limit the updates.
1911 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1913 static void kvmclock_update_fn(struct work_struct
*work
)
1916 struct delayed_work
*dwork
= to_delayed_work(work
);
1917 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1918 kvmclock_update_work
);
1919 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1920 struct kvm_vcpu
*vcpu
;
1922 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1923 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1924 kvm_vcpu_kick(vcpu
);
1928 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1930 struct kvm
*kvm
= v
->kvm
;
1932 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1933 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1934 KVMCLOCK_UPDATE_DELAY
);
1937 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1939 static void kvmclock_sync_fn(struct work_struct
*work
)
1941 struct delayed_work
*dwork
= to_delayed_work(work
);
1942 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1943 kvmclock_sync_work
);
1944 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1946 if (!kvmclock_periodic_sync
)
1949 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1950 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1951 KVMCLOCK_SYNC_PERIOD
);
1954 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1956 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1957 unsigned bank_num
= mcg_cap
& 0xff;
1960 case MSR_IA32_MCG_STATUS
:
1961 vcpu
->arch
.mcg_status
= data
;
1963 case MSR_IA32_MCG_CTL
:
1964 if (!(mcg_cap
& MCG_CTL_P
))
1966 if (data
!= 0 && data
!= ~(u64
)0)
1968 vcpu
->arch
.mcg_ctl
= data
;
1971 if (msr
>= MSR_IA32_MC0_CTL
&&
1972 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1973 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1974 /* only 0 or all 1s can be written to IA32_MCi_CTL
1975 * some Linux kernels though clear bit 10 in bank 4 to
1976 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1977 * this to avoid an uncatched #GP in the guest
1979 if ((offset
& 0x3) == 0 &&
1980 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1982 vcpu
->arch
.mce_banks
[offset
] = data
;
1990 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1992 struct kvm
*kvm
= vcpu
->kvm
;
1993 int lm
= is_long_mode(vcpu
);
1994 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1995 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1996 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1997 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1998 u32 page_num
= data
& ~PAGE_MASK
;
1999 u64 page_addr
= data
& PAGE_MASK
;
2004 if (page_num
>= blob_size
)
2007 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2012 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2021 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2023 gpa_t gpa
= data
& ~0x3f;
2025 /* Bits 2:5 are reserved, Should be zero */
2029 vcpu
->arch
.apf
.msr_val
= data
;
2031 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2032 kvm_clear_async_pf_completion_queue(vcpu
);
2033 kvm_async_pf_hash_reset(vcpu
);
2037 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2041 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2042 kvm_async_pf_wakeup_all(vcpu
);
2046 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2048 vcpu
->arch
.pv_time_enabled
= false;
2051 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2053 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2056 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2057 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2060 if (vcpu
->arch
.st
.steal
.version
& 1)
2061 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2063 vcpu
->arch
.st
.steal
.version
+= 1;
2065 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2066 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2070 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2071 vcpu
->arch
.st
.last_steal
;
2072 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2074 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2075 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2079 vcpu
->arch
.st
.steal
.version
+= 1;
2081 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2082 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2085 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2088 u32 msr
= msr_info
->index
;
2089 u64 data
= msr_info
->data
;
2092 case MSR_AMD64_NB_CFG
:
2093 case MSR_IA32_UCODE_REV
:
2094 case MSR_IA32_UCODE_WRITE
:
2095 case MSR_VM_HSAVE_PA
:
2096 case MSR_AMD64_PATCH_LOADER
:
2097 case MSR_AMD64_BU_CFG2
:
2101 return set_efer(vcpu
, data
);
2103 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2104 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2105 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2106 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2108 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2113 case MSR_FAM10H_MMIO_CONF_BASE
:
2115 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2120 case MSR_IA32_DEBUGCTLMSR
:
2122 /* We support the non-activated case already */
2124 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2125 /* Values other than LBR and BTF are vendor-specific,
2126 thus reserved and should throw a #GP */
2129 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2132 case 0x200 ... 0x2ff:
2133 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2134 case MSR_IA32_APICBASE
:
2135 return kvm_set_apic_base(vcpu
, msr_info
);
2136 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2137 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2138 case MSR_IA32_TSCDEADLINE
:
2139 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2141 case MSR_IA32_TSC_ADJUST
:
2142 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2143 if (!msr_info
->host_initiated
) {
2144 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2145 adjust_tsc_offset_guest(vcpu
, adj
);
2147 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2150 case MSR_IA32_MISC_ENABLE
:
2151 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2153 case MSR_IA32_SMBASE
:
2154 if (!msr_info
->host_initiated
)
2156 vcpu
->arch
.smbase
= data
;
2158 case MSR_KVM_WALL_CLOCK_NEW
:
2159 case MSR_KVM_WALL_CLOCK
:
2160 vcpu
->kvm
->arch
.wall_clock
= data
;
2161 kvm_write_wall_clock(vcpu
->kvm
, data
);
2163 case MSR_KVM_SYSTEM_TIME_NEW
:
2164 case MSR_KVM_SYSTEM_TIME
: {
2165 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2167 kvmclock_reset(vcpu
);
2169 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2170 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2172 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2173 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2176 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2179 vcpu
->arch
.time
= data
;
2180 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2182 /* we verify if the enable bit is set... */
2186 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2187 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2188 sizeof(struct pvclock_vcpu_time_info
)))
2189 vcpu
->arch
.pv_time_enabled
= false;
2191 vcpu
->arch
.pv_time_enabled
= true;
2195 case MSR_KVM_ASYNC_PF_EN
:
2196 if (kvm_pv_enable_async_pf(vcpu
, data
))
2199 case MSR_KVM_STEAL_TIME
:
2201 if (unlikely(!sched_info_on()))
2204 if (data
& KVM_STEAL_RESERVED_MASK
)
2207 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2208 data
& KVM_STEAL_VALID_BITS
,
2209 sizeof(struct kvm_steal_time
)))
2212 vcpu
->arch
.st
.msr_val
= data
;
2214 if (!(data
& KVM_MSR_ENABLED
))
2217 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2220 case MSR_KVM_PV_EOI_EN
:
2221 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2225 case MSR_IA32_MCG_CTL
:
2226 case MSR_IA32_MCG_STATUS
:
2227 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2228 return set_msr_mce(vcpu
, msr
, data
);
2230 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2231 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2232 pr
= true; /* fall through */
2233 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2234 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2235 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2236 return kvm_pmu_set_msr(vcpu
, msr_info
);
2238 if (pr
|| data
!= 0)
2239 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2240 "0x%x data 0x%llx\n", msr
, data
);
2242 case MSR_K7_CLK_CTL
:
2244 * Ignore all writes to this no longer documented MSR.
2245 * Writes are only relevant for old K7 processors,
2246 * all pre-dating SVM, but a recommended workaround from
2247 * AMD for these chips. It is possible to specify the
2248 * affected processor models on the command line, hence
2249 * the need to ignore the workaround.
2252 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2253 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2254 case HV_X64_MSR_CRASH_CTL
:
2255 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2256 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2257 msr_info
->host_initiated
);
2258 case MSR_IA32_BBL_CR_CTL3
:
2259 /* Drop writes to this legacy MSR -- see rdmsr
2260 * counterpart for further detail.
2262 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2264 case MSR_AMD64_OSVW_ID_LENGTH
:
2265 if (!guest_cpuid_has_osvw(vcpu
))
2267 vcpu
->arch
.osvw
.length
= data
;
2269 case MSR_AMD64_OSVW_STATUS
:
2270 if (!guest_cpuid_has_osvw(vcpu
))
2272 vcpu
->arch
.osvw
.status
= data
;
2275 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2276 return xen_hvm_config(vcpu
, data
);
2277 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2278 return kvm_pmu_set_msr(vcpu
, msr_info
);
2280 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2284 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2291 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2295 * Reads an msr value (of 'msr_index') into 'pdata'.
2296 * Returns 0 on success, non-0 otherwise.
2297 * Assumes vcpu_load() was already called.
2299 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2301 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2303 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2305 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2308 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2309 unsigned bank_num
= mcg_cap
& 0xff;
2312 case MSR_IA32_P5_MC_ADDR
:
2313 case MSR_IA32_P5_MC_TYPE
:
2316 case MSR_IA32_MCG_CAP
:
2317 data
= vcpu
->arch
.mcg_cap
;
2319 case MSR_IA32_MCG_CTL
:
2320 if (!(mcg_cap
& MCG_CTL_P
))
2322 data
= vcpu
->arch
.mcg_ctl
;
2324 case MSR_IA32_MCG_STATUS
:
2325 data
= vcpu
->arch
.mcg_status
;
2328 if (msr
>= MSR_IA32_MC0_CTL
&&
2329 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2330 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2331 data
= vcpu
->arch
.mce_banks
[offset
];
2340 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2342 switch (msr_info
->index
) {
2343 case MSR_IA32_PLATFORM_ID
:
2344 case MSR_IA32_EBL_CR_POWERON
:
2345 case MSR_IA32_DEBUGCTLMSR
:
2346 case MSR_IA32_LASTBRANCHFROMIP
:
2347 case MSR_IA32_LASTBRANCHTOIP
:
2348 case MSR_IA32_LASTINTFROMIP
:
2349 case MSR_IA32_LASTINTTOIP
:
2351 case MSR_K8_TSEG_ADDR
:
2352 case MSR_K8_TSEG_MASK
:
2354 case MSR_VM_HSAVE_PA
:
2355 case MSR_K8_INT_PENDING_MSG
:
2356 case MSR_AMD64_NB_CFG
:
2357 case MSR_FAM10H_MMIO_CONF_BASE
:
2358 case MSR_AMD64_BU_CFG2
:
2359 case MSR_IA32_PERF_CTL
:
2362 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2363 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2364 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2365 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2366 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2367 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2370 case MSR_IA32_UCODE_REV
:
2371 msr_info
->data
= 0x100000000ULL
;
2374 case 0x200 ... 0x2ff:
2375 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2376 case 0xcd: /* fsb frequency */
2380 * MSR_EBC_FREQUENCY_ID
2381 * Conservative value valid for even the basic CPU models.
2382 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2383 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2384 * and 266MHz for model 3, or 4. Set Core Clock
2385 * Frequency to System Bus Frequency Ratio to 1 (bits
2386 * 31:24) even though these are only valid for CPU
2387 * models > 2, however guests may end up dividing or
2388 * multiplying by zero otherwise.
2390 case MSR_EBC_FREQUENCY_ID
:
2391 msr_info
->data
= 1 << 24;
2393 case MSR_IA32_APICBASE
:
2394 msr_info
->data
= kvm_get_apic_base(vcpu
);
2396 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2397 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2399 case MSR_IA32_TSCDEADLINE
:
2400 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2402 case MSR_IA32_TSC_ADJUST
:
2403 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2405 case MSR_IA32_MISC_ENABLE
:
2406 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2408 case MSR_IA32_SMBASE
:
2409 if (!msr_info
->host_initiated
)
2411 msr_info
->data
= vcpu
->arch
.smbase
;
2413 case MSR_IA32_PERF_STATUS
:
2414 /* TSC increment by tick */
2415 msr_info
->data
= 1000ULL;
2416 /* CPU multiplier */
2417 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2420 msr_info
->data
= vcpu
->arch
.efer
;
2422 case MSR_KVM_WALL_CLOCK
:
2423 case MSR_KVM_WALL_CLOCK_NEW
:
2424 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2426 case MSR_KVM_SYSTEM_TIME
:
2427 case MSR_KVM_SYSTEM_TIME_NEW
:
2428 msr_info
->data
= vcpu
->arch
.time
;
2430 case MSR_KVM_ASYNC_PF_EN
:
2431 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2433 case MSR_KVM_STEAL_TIME
:
2434 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2436 case MSR_KVM_PV_EOI_EN
:
2437 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2439 case MSR_IA32_P5_MC_ADDR
:
2440 case MSR_IA32_P5_MC_TYPE
:
2441 case MSR_IA32_MCG_CAP
:
2442 case MSR_IA32_MCG_CTL
:
2443 case MSR_IA32_MCG_STATUS
:
2444 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2445 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2446 case MSR_K7_CLK_CTL
:
2448 * Provide expected ramp-up count for K7. All other
2449 * are set to zero, indicating minimum divisors for
2452 * This prevents guest kernels on AMD host with CPU
2453 * type 6, model 8 and higher from exploding due to
2454 * the rdmsr failing.
2456 msr_info
->data
= 0x20000000;
2458 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2459 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2460 case HV_X64_MSR_CRASH_CTL
:
2461 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2462 return kvm_hv_get_msr_common(vcpu
,
2463 msr_info
->index
, &msr_info
->data
);
2465 case MSR_IA32_BBL_CR_CTL3
:
2466 /* This legacy MSR exists but isn't fully documented in current
2467 * silicon. It is however accessed by winxp in very narrow
2468 * scenarios where it sets bit #19, itself documented as
2469 * a "reserved" bit. Best effort attempt to source coherent
2470 * read data here should the balance of the register be
2471 * interpreted by the guest:
2473 * L2 cache control register 3: 64GB range, 256KB size,
2474 * enabled, latency 0x1, configured
2476 msr_info
->data
= 0xbe702111;
2478 case MSR_AMD64_OSVW_ID_LENGTH
:
2479 if (!guest_cpuid_has_osvw(vcpu
))
2481 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2483 case MSR_AMD64_OSVW_STATUS
:
2484 if (!guest_cpuid_has_osvw(vcpu
))
2486 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2489 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2490 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2492 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2496 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2503 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2506 * Read or write a bunch of msrs. All parameters are kernel addresses.
2508 * @return number of msrs set successfully.
2510 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2511 struct kvm_msr_entry
*entries
,
2512 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2513 unsigned index
, u64
*data
))
2517 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2518 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2519 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2521 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2527 * Read or write a bunch of msrs. Parameters are user addresses.
2529 * @return number of msrs set successfully.
2531 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2532 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2533 unsigned index
, u64
*data
),
2536 struct kvm_msrs msrs
;
2537 struct kvm_msr_entry
*entries
;
2542 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2546 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2549 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2550 entries
= memdup_user(user_msrs
->entries
, size
);
2551 if (IS_ERR(entries
)) {
2552 r
= PTR_ERR(entries
);
2556 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2561 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2572 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2577 case KVM_CAP_IRQCHIP
:
2579 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2580 case KVM_CAP_SET_TSS_ADDR
:
2581 case KVM_CAP_EXT_CPUID
:
2582 case KVM_CAP_EXT_EMUL_CPUID
:
2583 case KVM_CAP_CLOCKSOURCE
:
2585 case KVM_CAP_NOP_IO_DELAY
:
2586 case KVM_CAP_MP_STATE
:
2587 case KVM_CAP_SYNC_MMU
:
2588 case KVM_CAP_USER_NMI
:
2589 case KVM_CAP_REINJECT_CONTROL
:
2590 case KVM_CAP_IRQ_INJECT_STATUS
:
2591 case KVM_CAP_IOEVENTFD
:
2592 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2594 case KVM_CAP_PIT_STATE2
:
2595 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2596 case KVM_CAP_XEN_HVM
:
2597 case KVM_CAP_ADJUST_CLOCK
:
2598 case KVM_CAP_VCPU_EVENTS
:
2599 case KVM_CAP_HYPERV
:
2600 case KVM_CAP_HYPERV_VAPIC
:
2601 case KVM_CAP_HYPERV_SPIN
:
2602 case KVM_CAP_HYPERV_SYNIC
:
2603 case KVM_CAP_PCI_SEGMENT
:
2604 case KVM_CAP_DEBUGREGS
:
2605 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2607 case KVM_CAP_ASYNC_PF
:
2608 case KVM_CAP_GET_TSC_KHZ
:
2609 case KVM_CAP_KVMCLOCK_CTRL
:
2610 case KVM_CAP_READONLY_MEM
:
2611 case KVM_CAP_HYPERV_TIME
:
2612 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2613 case KVM_CAP_TSC_DEADLINE_TIMER
:
2614 case KVM_CAP_ENABLE_CAP_VM
:
2615 case KVM_CAP_DISABLE_QUIRKS
:
2616 case KVM_CAP_SET_BOOT_CPU_ID
:
2617 case KVM_CAP_SPLIT_IRQCHIP
:
2618 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2619 case KVM_CAP_ASSIGN_DEV_IRQ
:
2620 case KVM_CAP_PCI_2_3
:
2624 case KVM_CAP_X86_SMM
:
2625 /* SMBASE is usually relocated above 1M on modern chipsets,
2626 * and SMM handlers might indeed rely on 4G segment limits,
2627 * so do not report SMM to be available if real mode is
2628 * emulated via vm86 mode. Still, do not go to great lengths
2629 * to avoid userspace's usage of the feature, because it is a
2630 * fringe case that is not enabled except via specific settings
2631 * of the module parameters.
2633 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2635 case KVM_CAP_COALESCED_MMIO
:
2636 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2639 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2641 case KVM_CAP_NR_VCPUS
:
2642 r
= KVM_SOFT_MAX_VCPUS
;
2644 case KVM_CAP_MAX_VCPUS
:
2647 case KVM_CAP_NR_MEMSLOTS
:
2648 r
= KVM_USER_MEM_SLOTS
;
2650 case KVM_CAP_PV_MMU
: /* obsolete */
2653 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2655 r
= iommu_present(&pci_bus_type
);
2659 r
= KVM_MAX_MCE_BANKS
;
2662 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2664 case KVM_CAP_TSC_CONTROL
:
2665 r
= kvm_has_tsc_control
;
2667 case KVM_CAP_X2APIC_API
:
2668 r
= KVM_X2APIC_API_VALID_FLAGS
;
2678 long kvm_arch_dev_ioctl(struct file
*filp
,
2679 unsigned int ioctl
, unsigned long arg
)
2681 void __user
*argp
= (void __user
*)arg
;
2685 case KVM_GET_MSR_INDEX_LIST
: {
2686 struct kvm_msr_list __user
*user_msr_list
= argp
;
2687 struct kvm_msr_list msr_list
;
2691 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2694 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2695 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2698 if (n
< msr_list
.nmsrs
)
2701 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2702 num_msrs_to_save
* sizeof(u32
)))
2704 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2706 num_emulated_msrs
* sizeof(u32
)))
2711 case KVM_GET_SUPPORTED_CPUID
:
2712 case KVM_GET_EMULATED_CPUID
: {
2713 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2714 struct kvm_cpuid2 cpuid
;
2717 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2720 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2726 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2731 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2733 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2734 sizeof(kvm_mce_cap_supported
)))
2746 static void wbinvd_ipi(void *garbage
)
2751 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2753 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2756 static inline void kvm_migrate_timers(struct kvm_vcpu
*vcpu
)
2758 set_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
);
2761 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2763 /* Address WBINVD may be executed by guest */
2764 if (need_emulate_wbinvd(vcpu
)) {
2765 if (kvm_x86_ops
->has_wbinvd_exit())
2766 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2767 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2768 smp_call_function_single(vcpu
->cpu
,
2769 wbinvd_ipi
, NULL
, 1);
2772 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2774 /* Apply any externally detected TSC adjustments (due to suspend) */
2775 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2776 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2777 vcpu
->arch
.tsc_offset_adjustment
= 0;
2778 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2781 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2782 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2783 rdtsc() - vcpu
->arch
.last_host_tsc
;
2785 mark_tsc_unstable("KVM discovered backwards TSC");
2787 if (check_tsc_unstable()) {
2788 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2789 vcpu
->arch
.last_guest_tsc
);
2790 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2791 vcpu
->arch
.tsc_catchup
= 1;
2793 if (kvm_lapic_hv_timer_in_use(vcpu
) &&
2794 kvm_x86_ops
->set_hv_timer(vcpu
,
2795 kvm_get_lapic_target_expiration_tsc(vcpu
)))
2796 kvm_lapic_switch_to_sw_timer(vcpu
);
2798 * On a host with synchronized TSC, there is no need to update
2799 * kvmclock on vcpu->cpu migration
2801 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2802 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2803 if (vcpu
->cpu
!= cpu
)
2804 kvm_migrate_timers(vcpu
);
2808 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2811 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2813 kvm_x86_ops
->vcpu_put(vcpu
);
2814 kvm_put_guest_fpu(vcpu
);
2815 vcpu
->arch
.last_host_tsc
= rdtsc();
2818 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2819 struct kvm_lapic_state
*s
)
2821 if (vcpu
->arch
.apicv_active
)
2822 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2824 return kvm_apic_get_state(vcpu
, s
);
2827 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2828 struct kvm_lapic_state
*s
)
2832 r
= kvm_apic_set_state(vcpu
, s
);
2835 update_cr8_intercept(vcpu
);
2840 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2842 return (!lapic_in_kernel(vcpu
) ||
2843 kvm_apic_accept_pic_intr(vcpu
));
2847 * if userspace requested an interrupt window, check that the
2848 * interrupt window is open.
2850 * No need to exit to userspace if we already have an interrupt queued.
2852 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2854 return kvm_arch_interrupt_allowed(vcpu
) &&
2855 !kvm_cpu_has_interrupt(vcpu
) &&
2856 !kvm_event_needs_reinjection(vcpu
) &&
2857 kvm_cpu_accept_dm_intr(vcpu
);
2860 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2861 struct kvm_interrupt
*irq
)
2863 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2866 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2867 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2868 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2873 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2874 * fail for in-kernel 8259.
2876 if (pic_in_kernel(vcpu
->kvm
))
2879 if (vcpu
->arch
.pending_external_vector
!= -1)
2882 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2883 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2887 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2889 kvm_inject_nmi(vcpu
);
2894 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2896 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2901 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2902 struct kvm_tpr_access_ctl
*tac
)
2906 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2910 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2914 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2917 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2919 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
2922 vcpu
->arch
.mcg_cap
= mcg_cap
;
2923 /* Init IA32_MCG_CTL to all 1s */
2924 if (mcg_cap
& MCG_CTL_P
)
2925 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2926 /* Init IA32_MCi_CTL to all 1s */
2927 for (bank
= 0; bank
< bank_num
; bank
++)
2928 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2930 if (kvm_x86_ops
->setup_mce
)
2931 kvm_x86_ops
->setup_mce(vcpu
);
2936 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2937 struct kvm_x86_mce
*mce
)
2939 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2940 unsigned bank_num
= mcg_cap
& 0xff;
2941 u64
*banks
= vcpu
->arch
.mce_banks
;
2943 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2946 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2947 * reporting is disabled
2949 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2950 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2952 banks
+= 4 * mce
->bank
;
2954 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2955 * reporting is disabled for the bank
2957 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2959 if (mce
->status
& MCI_STATUS_UC
) {
2960 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2961 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2962 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2965 if (banks
[1] & MCI_STATUS_VAL
)
2966 mce
->status
|= MCI_STATUS_OVER
;
2967 banks
[2] = mce
->addr
;
2968 banks
[3] = mce
->misc
;
2969 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2970 banks
[1] = mce
->status
;
2971 kvm_queue_exception(vcpu
, MC_VECTOR
);
2972 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2973 || !(banks
[1] & MCI_STATUS_UC
)) {
2974 if (banks
[1] & MCI_STATUS_VAL
)
2975 mce
->status
|= MCI_STATUS_OVER
;
2976 banks
[2] = mce
->addr
;
2977 banks
[3] = mce
->misc
;
2978 banks
[1] = mce
->status
;
2980 banks
[1] |= MCI_STATUS_OVER
;
2984 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2985 struct kvm_vcpu_events
*events
)
2988 events
->exception
.injected
=
2989 vcpu
->arch
.exception
.pending
&&
2990 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2991 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2992 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2993 events
->exception
.pad
= 0;
2994 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2996 events
->interrupt
.injected
=
2997 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2998 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2999 events
->interrupt
.soft
= 0;
3000 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3002 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3003 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3004 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3005 events
->nmi
.pad
= 0;
3007 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3009 events
->smi
.smm
= is_smm(vcpu
);
3010 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3011 events
->smi
.smm_inside_nmi
=
3012 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3013 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3015 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3016 | KVM_VCPUEVENT_VALID_SHADOW
3017 | KVM_VCPUEVENT_VALID_SMM
);
3018 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3021 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3022 struct kvm_vcpu_events
*events
)
3024 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3025 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3026 | KVM_VCPUEVENT_VALID_SHADOW
3027 | KVM_VCPUEVENT_VALID_SMM
))
3030 if (events
->exception
.injected
&&
3031 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
3035 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3036 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3037 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3038 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3040 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3041 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3042 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3043 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3044 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3045 events
->interrupt
.shadow
);
3047 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3048 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3049 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3050 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3052 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3053 lapic_in_kernel(vcpu
))
3054 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3056 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3057 if (events
->smi
.smm
)
3058 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
3060 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
3061 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3062 if (events
->smi
.smm_inside_nmi
)
3063 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3065 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3066 if (lapic_in_kernel(vcpu
)) {
3067 if (events
->smi
.latched_init
)
3068 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3070 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3074 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3079 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3080 struct kvm_debugregs
*dbgregs
)
3084 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3085 kvm_get_dr(vcpu
, 6, &val
);
3087 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3089 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3092 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3093 struct kvm_debugregs
*dbgregs
)
3098 if (dbgregs
->dr6
& ~0xffffffffull
)
3100 if (dbgregs
->dr7
& ~0xffffffffull
)
3103 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3104 kvm_update_dr0123(vcpu
);
3105 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3106 kvm_update_dr6(vcpu
);
3107 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3108 kvm_update_dr7(vcpu
);
3113 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3115 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3117 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3118 u64 xstate_bv
= xsave
->header
.xfeatures
;
3122 * Copy legacy XSAVE area, to avoid complications with CPUID
3123 * leaves 0 and 1 in the loop below.
3125 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3128 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3131 * Copy each region from the possibly compacted offset to the
3132 * non-compacted offset.
3134 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3136 u64 feature
= valid
& -valid
;
3137 int index
= fls64(feature
) - 1;
3138 void *src
= get_xsave_addr(xsave
, feature
);
3141 u32 size
, offset
, ecx
, edx
;
3142 cpuid_count(XSTATE_CPUID
, index
,
3143 &size
, &offset
, &ecx
, &edx
);
3144 memcpy(dest
+ offset
, src
, size
);
3151 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3153 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3154 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3158 * Copy legacy XSAVE area, to avoid complications with CPUID
3159 * leaves 0 and 1 in the loop below.
3161 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3163 /* Set XSTATE_BV and possibly XCOMP_BV. */
3164 xsave
->header
.xfeatures
= xstate_bv
;
3165 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3166 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3169 * Copy each region from the non-compacted offset to the
3170 * possibly compacted offset.
3172 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3174 u64 feature
= valid
& -valid
;
3175 int index
= fls64(feature
) - 1;
3176 void *dest
= get_xsave_addr(xsave
, feature
);
3179 u32 size
, offset
, ecx
, edx
;
3180 cpuid_count(XSTATE_CPUID
, index
,
3181 &size
, &offset
, &ecx
, &edx
);
3182 memcpy(dest
, src
+ offset
, size
);
3189 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3190 struct kvm_xsave
*guest_xsave
)
3192 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3193 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3194 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3196 memcpy(guest_xsave
->region
,
3197 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3198 sizeof(struct fxregs_state
));
3199 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3200 XFEATURE_MASK_FPSSE
;
3204 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3205 struct kvm_xsave
*guest_xsave
)
3208 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3210 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3212 * Here we allow setting states that are not present in
3213 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3214 * with old userspace.
3216 if (xstate_bv
& ~kvm_supported_xcr0())
3218 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3220 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
)
3222 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3223 guest_xsave
->region
, sizeof(struct fxregs_state
));
3228 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3229 struct kvm_xcrs
*guest_xcrs
)
3231 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3232 guest_xcrs
->nr_xcrs
= 0;
3236 guest_xcrs
->nr_xcrs
= 1;
3237 guest_xcrs
->flags
= 0;
3238 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3239 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3242 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3243 struct kvm_xcrs
*guest_xcrs
)
3247 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3250 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3253 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3254 /* Only support XCR0 currently */
3255 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3256 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3257 guest_xcrs
->xcrs
[i
].value
);
3266 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3267 * stopped by the hypervisor. This function will be called from the host only.
3268 * EINVAL is returned when the host attempts to set the flag for a guest that
3269 * does not support pv clocks.
3271 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3273 if (!vcpu
->arch
.pv_time_enabled
)
3275 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3276 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3280 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3281 struct kvm_enable_cap
*cap
)
3287 case KVM_CAP_HYPERV_SYNIC
:
3288 return kvm_hv_activate_synic(vcpu
);
3294 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3295 unsigned int ioctl
, unsigned long arg
)
3297 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3298 void __user
*argp
= (void __user
*)arg
;
3301 struct kvm_lapic_state
*lapic
;
3302 struct kvm_xsave
*xsave
;
3303 struct kvm_xcrs
*xcrs
;
3309 case KVM_GET_LAPIC
: {
3311 if (!lapic_in_kernel(vcpu
))
3313 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3318 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3322 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3327 case KVM_SET_LAPIC
: {
3329 if (!lapic_in_kernel(vcpu
))
3331 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3332 if (IS_ERR(u
.lapic
))
3333 return PTR_ERR(u
.lapic
);
3335 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3338 case KVM_INTERRUPT
: {
3339 struct kvm_interrupt irq
;
3342 if (copy_from_user(&irq
, argp
, sizeof irq
))
3344 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3348 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3352 r
= kvm_vcpu_ioctl_smi(vcpu
);
3355 case KVM_SET_CPUID
: {
3356 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3357 struct kvm_cpuid cpuid
;
3360 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3362 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3365 case KVM_SET_CPUID2
: {
3366 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3367 struct kvm_cpuid2 cpuid
;
3370 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3372 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3373 cpuid_arg
->entries
);
3376 case KVM_GET_CPUID2
: {
3377 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3378 struct kvm_cpuid2 cpuid
;
3381 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3383 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3384 cpuid_arg
->entries
);
3388 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3394 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3397 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3399 case KVM_TPR_ACCESS_REPORTING
: {
3400 struct kvm_tpr_access_ctl tac
;
3403 if (copy_from_user(&tac
, argp
, sizeof tac
))
3405 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3409 if (copy_to_user(argp
, &tac
, sizeof tac
))
3414 case KVM_SET_VAPIC_ADDR
: {
3415 struct kvm_vapic_addr va
;
3418 if (!lapic_in_kernel(vcpu
))
3421 if (copy_from_user(&va
, argp
, sizeof va
))
3423 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3426 case KVM_X86_SETUP_MCE
: {
3430 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3432 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3435 case KVM_X86_SET_MCE
: {
3436 struct kvm_x86_mce mce
;
3439 if (copy_from_user(&mce
, argp
, sizeof mce
))
3441 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3444 case KVM_GET_VCPU_EVENTS
: {
3445 struct kvm_vcpu_events events
;
3447 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3450 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3455 case KVM_SET_VCPU_EVENTS
: {
3456 struct kvm_vcpu_events events
;
3459 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3462 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3465 case KVM_GET_DEBUGREGS
: {
3466 struct kvm_debugregs dbgregs
;
3468 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3471 if (copy_to_user(argp
, &dbgregs
,
3472 sizeof(struct kvm_debugregs
)))
3477 case KVM_SET_DEBUGREGS
: {
3478 struct kvm_debugregs dbgregs
;
3481 if (copy_from_user(&dbgregs
, argp
,
3482 sizeof(struct kvm_debugregs
)))
3485 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3488 case KVM_GET_XSAVE
: {
3489 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3494 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3497 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3502 case KVM_SET_XSAVE
: {
3503 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3504 if (IS_ERR(u
.xsave
))
3505 return PTR_ERR(u
.xsave
);
3507 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3510 case KVM_GET_XCRS
: {
3511 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3516 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3519 if (copy_to_user(argp
, u
.xcrs
,
3520 sizeof(struct kvm_xcrs
)))
3525 case KVM_SET_XCRS
: {
3526 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3528 return PTR_ERR(u
.xcrs
);
3530 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3533 case KVM_SET_TSC_KHZ
: {
3537 user_tsc_khz
= (u32
)arg
;
3539 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3542 if (user_tsc_khz
== 0)
3543 user_tsc_khz
= tsc_khz
;
3545 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3550 case KVM_GET_TSC_KHZ
: {
3551 r
= vcpu
->arch
.virtual_tsc_khz
;
3554 case KVM_KVMCLOCK_CTRL
: {
3555 r
= kvm_set_guest_paused(vcpu
);
3558 case KVM_ENABLE_CAP
: {
3559 struct kvm_enable_cap cap
;
3562 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3564 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3575 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3577 return VM_FAULT_SIGBUS
;
3580 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3584 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3586 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3590 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3593 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3597 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3598 u32 kvm_nr_mmu_pages
)
3600 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3603 mutex_lock(&kvm
->slots_lock
);
3605 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3606 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3608 mutex_unlock(&kvm
->slots_lock
);
3612 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3614 return kvm
->arch
.n_max_mmu_pages
;
3617 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3622 switch (chip
->chip_id
) {
3623 case KVM_IRQCHIP_PIC_MASTER
:
3624 memcpy(&chip
->chip
.pic
,
3625 &pic_irqchip(kvm
)->pics
[0],
3626 sizeof(struct kvm_pic_state
));
3628 case KVM_IRQCHIP_PIC_SLAVE
:
3629 memcpy(&chip
->chip
.pic
,
3630 &pic_irqchip(kvm
)->pics
[1],
3631 sizeof(struct kvm_pic_state
));
3633 case KVM_IRQCHIP_IOAPIC
:
3634 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3643 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3648 switch (chip
->chip_id
) {
3649 case KVM_IRQCHIP_PIC_MASTER
:
3650 spin_lock(&pic_irqchip(kvm
)->lock
);
3651 memcpy(&pic_irqchip(kvm
)->pics
[0],
3653 sizeof(struct kvm_pic_state
));
3654 spin_unlock(&pic_irqchip(kvm
)->lock
);
3656 case KVM_IRQCHIP_PIC_SLAVE
:
3657 spin_lock(&pic_irqchip(kvm
)->lock
);
3658 memcpy(&pic_irqchip(kvm
)->pics
[1],
3660 sizeof(struct kvm_pic_state
));
3661 spin_unlock(&pic_irqchip(kvm
)->lock
);
3663 case KVM_IRQCHIP_IOAPIC
:
3664 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3670 kvm_pic_update_irq(pic_irqchip(kvm
));
3674 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3676 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3678 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3680 mutex_lock(&kps
->lock
);
3681 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3682 mutex_unlock(&kps
->lock
);
3686 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3689 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3691 mutex_lock(&pit
->pit_state
.lock
);
3692 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3693 for (i
= 0; i
< 3; i
++)
3694 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3695 mutex_unlock(&pit
->pit_state
.lock
);
3699 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3701 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3702 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3703 sizeof(ps
->channels
));
3704 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3705 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3706 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3710 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3714 u32 prev_legacy
, cur_legacy
;
3715 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3717 mutex_lock(&pit
->pit_state
.lock
);
3718 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3719 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3720 if (!prev_legacy
&& cur_legacy
)
3722 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3723 sizeof(pit
->pit_state
.channels
));
3724 pit
->pit_state
.flags
= ps
->flags
;
3725 for (i
= 0; i
< 3; i
++)
3726 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3728 mutex_unlock(&pit
->pit_state
.lock
);
3732 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3733 struct kvm_reinject_control
*control
)
3735 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3740 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3741 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3742 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3744 mutex_lock(&pit
->pit_state
.lock
);
3745 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3746 mutex_unlock(&pit
->pit_state
.lock
);
3752 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3753 * @kvm: kvm instance
3754 * @log: slot id and address to which we copy the log
3756 * Steps 1-4 below provide general overview of dirty page logging. See
3757 * kvm_get_dirty_log_protect() function description for additional details.
3759 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3760 * always flush the TLB (step 4) even if previous step failed and the dirty
3761 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3762 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3763 * writes will be marked dirty for next log read.
3765 * 1. Take a snapshot of the bit and clear it if needed.
3766 * 2. Write protect the corresponding page.
3767 * 3. Copy the snapshot to the userspace.
3768 * 4. Flush TLB's if needed.
3770 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3772 bool is_dirty
= false;
3775 mutex_lock(&kvm
->slots_lock
);
3778 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3780 if (kvm_x86_ops
->flush_log_dirty
)
3781 kvm_x86_ops
->flush_log_dirty(kvm
);
3783 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3786 * All the TLBs can be flushed out of mmu lock, see the comments in
3787 * kvm_mmu_slot_remove_write_access().
3789 lockdep_assert_held(&kvm
->slots_lock
);
3791 kvm_flush_remote_tlbs(kvm
);
3793 mutex_unlock(&kvm
->slots_lock
);
3797 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3800 if (!irqchip_in_kernel(kvm
))
3803 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3804 irq_event
->irq
, irq_event
->level
,
3809 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3810 struct kvm_enable_cap
*cap
)
3818 case KVM_CAP_DISABLE_QUIRKS
:
3819 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3822 case KVM_CAP_SPLIT_IRQCHIP
: {
3823 mutex_lock(&kvm
->lock
);
3825 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3826 goto split_irqchip_unlock
;
3828 if (irqchip_in_kernel(kvm
))
3829 goto split_irqchip_unlock
;
3830 if (kvm
->created_vcpus
)
3831 goto split_irqchip_unlock
;
3832 r
= kvm_setup_empty_irq_routing(kvm
);
3834 goto split_irqchip_unlock
;
3835 /* Pairs with irqchip_in_kernel. */
3837 kvm
->arch
.irqchip_split
= true;
3838 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3840 split_irqchip_unlock
:
3841 mutex_unlock(&kvm
->lock
);
3844 case KVM_CAP_X2APIC_API
:
3846 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3849 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3850 kvm
->arch
.x2apic_format
= true;
3851 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3852 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3863 long kvm_arch_vm_ioctl(struct file
*filp
,
3864 unsigned int ioctl
, unsigned long arg
)
3866 struct kvm
*kvm
= filp
->private_data
;
3867 void __user
*argp
= (void __user
*)arg
;
3870 * This union makes it completely explicit to gcc-3.x
3871 * that these two variables' stack usage should be
3872 * combined, not added together.
3875 struct kvm_pit_state ps
;
3876 struct kvm_pit_state2 ps2
;
3877 struct kvm_pit_config pit_config
;
3881 case KVM_SET_TSS_ADDR
:
3882 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3884 case KVM_SET_IDENTITY_MAP_ADDR
: {
3888 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3890 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3893 case KVM_SET_NR_MMU_PAGES
:
3894 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3896 case KVM_GET_NR_MMU_PAGES
:
3897 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3899 case KVM_CREATE_IRQCHIP
: {
3900 struct kvm_pic
*vpic
;
3902 mutex_lock(&kvm
->lock
);
3905 goto create_irqchip_unlock
;
3907 if (kvm
->created_vcpus
)
3908 goto create_irqchip_unlock
;
3910 vpic
= kvm_create_pic(kvm
);
3912 r
= kvm_ioapic_init(kvm
);
3914 mutex_lock(&kvm
->slots_lock
);
3915 kvm_destroy_pic(vpic
);
3916 mutex_unlock(&kvm
->slots_lock
);
3917 goto create_irqchip_unlock
;
3920 goto create_irqchip_unlock
;
3921 r
= kvm_setup_default_irq_routing(kvm
);
3923 mutex_lock(&kvm
->slots_lock
);
3924 mutex_lock(&kvm
->irq_lock
);
3925 kvm_ioapic_destroy(kvm
);
3926 kvm_destroy_pic(vpic
);
3927 mutex_unlock(&kvm
->irq_lock
);
3928 mutex_unlock(&kvm
->slots_lock
);
3929 goto create_irqchip_unlock
;
3931 /* Write kvm->irq_routing before kvm->arch.vpic. */
3933 kvm
->arch
.vpic
= vpic
;
3934 create_irqchip_unlock
:
3935 mutex_unlock(&kvm
->lock
);
3938 case KVM_CREATE_PIT
:
3939 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3941 case KVM_CREATE_PIT2
:
3943 if (copy_from_user(&u
.pit_config
, argp
,
3944 sizeof(struct kvm_pit_config
)))
3947 mutex_lock(&kvm
->lock
);
3950 goto create_pit_unlock
;
3952 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3956 mutex_unlock(&kvm
->lock
);
3958 case KVM_GET_IRQCHIP
: {
3959 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3960 struct kvm_irqchip
*chip
;
3962 chip
= memdup_user(argp
, sizeof(*chip
));
3969 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3970 goto get_irqchip_out
;
3971 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3973 goto get_irqchip_out
;
3975 if (copy_to_user(argp
, chip
, sizeof *chip
))
3976 goto get_irqchip_out
;
3982 case KVM_SET_IRQCHIP
: {
3983 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3984 struct kvm_irqchip
*chip
;
3986 chip
= memdup_user(argp
, sizeof(*chip
));
3993 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3994 goto set_irqchip_out
;
3995 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3997 goto set_irqchip_out
;
4005 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4008 if (!kvm
->arch
.vpit
)
4010 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4014 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4021 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4024 if (!kvm
->arch
.vpit
)
4026 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4029 case KVM_GET_PIT2
: {
4031 if (!kvm
->arch
.vpit
)
4033 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4037 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4042 case KVM_SET_PIT2
: {
4044 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4047 if (!kvm
->arch
.vpit
)
4049 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4052 case KVM_REINJECT_CONTROL
: {
4053 struct kvm_reinject_control control
;
4055 if (copy_from_user(&control
, argp
, sizeof(control
)))
4057 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4060 case KVM_SET_BOOT_CPU_ID
:
4062 mutex_lock(&kvm
->lock
);
4063 if (kvm
->created_vcpus
)
4066 kvm
->arch
.bsp_vcpu_id
= arg
;
4067 mutex_unlock(&kvm
->lock
);
4069 case KVM_XEN_HVM_CONFIG
: {
4071 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4072 sizeof(struct kvm_xen_hvm_config
)))
4075 if (kvm
->arch
.xen_hvm_config
.flags
)
4080 case KVM_SET_CLOCK
: {
4081 struct kvm_clock_data user_ns
;
4085 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4093 local_irq_disable();
4094 now_ns
= __get_kvmclock_ns(kvm
);
4095 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4097 kvm_gen_update_masterclock(kvm
);
4100 case KVM_GET_CLOCK
: {
4101 struct kvm_clock_data user_ns
;
4104 now_ns
= get_kvmclock_ns(kvm
);
4105 user_ns
.clock
= now_ns
;
4107 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4110 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4115 case KVM_ENABLE_CAP
: {
4116 struct kvm_enable_cap cap
;
4119 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4121 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4125 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4131 static void kvm_init_msr_list(void)
4136 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4137 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4141 * Even MSRs that are valid in the host may not be exposed
4142 * to the guests in some cases.
4144 switch (msrs_to_save
[i
]) {
4145 case MSR_IA32_BNDCFGS
:
4146 if (!kvm_x86_ops
->mpx_supported())
4150 if (!kvm_x86_ops
->rdtscp_supported())
4158 msrs_to_save
[j
] = msrs_to_save
[i
];
4161 num_msrs_to_save
= j
;
4163 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4164 switch (emulated_msrs
[i
]) {
4165 case MSR_IA32_SMBASE
:
4166 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4174 emulated_msrs
[j
] = emulated_msrs
[i
];
4177 num_emulated_msrs
= j
;
4180 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4188 if (!(lapic_in_kernel(vcpu
) &&
4189 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4190 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4201 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4208 if (!(lapic_in_kernel(vcpu
) &&
4209 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4211 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4213 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4223 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4224 struct kvm_segment
*var
, int seg
)
4226 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4229 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4230 struct kvm_segment
*var
, int seg
)
4232 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4235 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4236 struct x86_exception
*exception
)
4240 BUG_ON(!mmu_is_nested(vcpu
));
4242 /* NPT walks are always user-walks */
4243 access
|= PFERR_USER_MASK
;
4244 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4249 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4250 struct x86_exception
*exception
)
4252 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4253 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4256 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4257 struct x86_exception
*exception
)
4259 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4260 access
|= PFERR_FETCH_MASK
;
4261 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4264 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4265 struct x86_exception
*exception
)
4267 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4268 access
|= PFERR_WRITE_MASK
;
4269 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4272 /* uses this to access any guest's mapped memory without checking CPL */
4273 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4274 struct x86_exception
*exception
)
4276 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4279 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4280 struct kvm_vcpu
*vcpu
, u32 access
,
4281 struct x86_exception
*exception
)
4284 int r
= X86EMUL_CONTINUE
;
4287 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4289 unsigned offset
= addr
& (PAGE_SIZE
-1);
4290 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4293 if (gpa
== UNMAPPED_GVA
)
4294 return X86EMUL_PROPAGATE_FAULT
;
4295 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4298 r
= X86EMUL_IO_NEEDED
;
4310 /* used for instruction fetching */
4311 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4312 gva_t addr
, void *val
, unsigned int bytes
,
4313 struct x86_exception
*exception
)
4315 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4316 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4320 /* Inline kvm_read_guest_virt_helper for speed. */
4321 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4323 if (unlikely(gpa
== UNMAPPED_GVA
))
4324 return X86EMUL_PROPAGATE_FAULT
;
4326 offset
= addr
& (PAGE_SIZE
-1);
4327 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4328 bytes
= (unsigned)PAGE_SIZE
- offset
;
4329 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4331 if (unlikely(ret
< 0))
4332 return X86EMUL_IO_NEEDED
;
4334 return X86EMUL_CONTINUE
;
4337 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4338 gva_t addr
, void *val
, unsigned int bytes
,
4339 struct x86_exception
*exception
)
4341 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4342 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4344 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4347 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4349 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4350 gva_t addr
, void *val
, unsigned int bytes
,
4351 struct x86_exception
*exception
)
4353 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4354 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4357 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4358 unsigned long addr
, void *val
, unsigned int bytes
)
4360 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4361 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4363 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4366 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4367 gva_t addr
, void *val
,
4369 struct x86_exception
*exception
)
4371 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4373 int r
= X86EMUL_CONTINUE
;
4376 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4379 unsigned offset
= addr
& (PAGE_SIZE
-1);
4380 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4383 if (gpa
== UNMAPPED_GVA
)
4384 return X86EMUL_PROPAGATE_FAULT
;
4385 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4387 r
= X86EMUL_IO_NEEDED
;
4398 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4400 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4401 gpa_t
*gpa
, struct x86_exception
*exception
,
4404 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4405 | (write
? PFERR_WRITE_MASK
: 0);
4408 * currently PKRU is only applied to ept enabled guest so
4409 * there is no pkey in EPT page table for L1 guest or EPT
4410 * shadow page table for L2 guest.
4412 if (vcpu_match_mmio_gva(vcpu
, gva
)
4413 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4414 vcpu
->arch
.access
, 0, access
)) {
4415 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4416 (gva
& (PAGE_SIZE
- 1));
4417 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4421 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4423 if (*gpa
== UNMAPPED_GVA
)
4426 /* For APIC access vmexit */
4427 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4430 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4431 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4438 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4439 const void *val
, int bytes
)
4443 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4446 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4450 struct read_write_emulator_ops
{
4451 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4453 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4454 void *val
, int bytes
);
4455 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4456 int bytes
, void *val
);
4457 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4458 void *val
, int bytes
);
4462 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4464 if (vcpu
->mmio_read_completed
) {
4465 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4466 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4467 vcpu
->mmio_read_completed
= 0;
4474 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4475 void *val
, int bytes
)
4477 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4480 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4481 void *val
, int bytes
)
4483 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4486 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4488 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4489 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4492 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4493 void *val
, int bytes
)
4495 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4496 return X86EMUL_IO_NEEDED
;
4499 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4500 void *val
, int bytes
)
4502 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4504 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4505 return X86EMUL_CONTINUE
;
4508 static const struct read_write_emulator_ops read_emultor
= {
4509 .read_write_prepare
= read_prepare
,
4510 .read_write_emulate
= read_emulate
,
4511 .read_write_mmio
= vcpu_mmio_read
,
4512 .read_write_exit_mmio
= read_exit_mmio
,
4515 static const struct read_write_emulator_ops write_emultor
= {
4516 .read_write_emulate
= write_emulate
,
4517 .read_write_mmio
= write_mmio
,
4518 .read_write_exit_mmio
= write_exit_mmio
,
4522 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4524 struct x86_exception
*exception
,
4525 struct kvm_vcpu
*vcpu
,
4526 const struct read_write_emulator_ops
*ops
)
4530 bool write
= ops
->write
;
4531 struct kvm_mmio_fragment
*frag
;
4533 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4536 return X86EMUL_PROPAGATE_FAULT
;
4538 /* For APIC access vmexit */
4542 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4543 return X86EMUL_CONTINUE
;
4547 * Is this MMIO handled locally?
4549 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4550 if (handled
== bytes
)
4551 return X86EMUL_CONTINUE
;
4557 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4558 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4562 return X86EMUL_CONTINUE
;
4565 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4567 void *val
, unsigned int bytes
,
4568 struct x86_exception
*exception
,
4569 const struct read_write_emulator_ops
*ops
)
4571 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4575 if (ops
->read_write_prepare
&&
4576 ops
->read_write_prepare(vcpu
, val
, bytes
))
4577 return X86EMUL_CONTINUE
;
4579 vcpu
->mmio_nr_fragments
= 0;
4581 /* Crossing a page boundary? */
4582 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4585 now
= -addr
& ~PAGE_MASK
;
4586 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4589 if (rc
!= X86EMUL_CONTINUE
)
4592 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4598 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4600 if (rc
!= X86EMUL_CONTINUE
)
4603 if (!vcpu
->mmio_nr_fragments
)
4606 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4608 vcpu
->mmio_needed
= 1;
4609 vcpu
->mmio_cur_fragment
= 0;
4611 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4612 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4613 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4614 vcpu
->run
->mmio
.phys_addr
= gpa
;
4616 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4619 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4623 struct x86_exception
*exception
)
4625 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4626 exception
, &read_emultor
);
4629 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4633 struct x86_exception
*exception
)
4635 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4636 exception
, &write_emultor
);
4639 #define CMPXCHG_TYPE(t, ptr, old, new) \
4640 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4642 #ifdef CONFIG_X86_64
4643 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4645 # define CMPXCHG64(ptr, old, new) \
4646 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4649 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4654 struct x86_exception
*exception
)
4656 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4662 /* guests cmpxchg8b have to be emulated atomically */
4663 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4666 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4668 if (gpa
== UNMAPPED_GVA
||
4669 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4672 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4675 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4676 if (is_error_page(page
))
4679 kaddr
= kmap_atomic(page
);
4680 kaddr
+= offset_in_page(gpa
);
4683 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4686 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4689 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4692 exchanged
= CMPXCHG64(kaddr
, old
, new);
4697 kunmap_atomic(kaddr
);
4698 kvm_release_page_dirty(page
);
4701 return X86EMUL_CMPXCHG_FAILED
;
4703 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4704 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4706 return X86EMUL_CONTINUE
;
4709 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4711 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4714 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4716 /* TODO: String I/O for in kernel device */
4719 if (vcpu
->arch
.pio
.in
)
4720 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4721 vcpu
->arch
.pio
.size
, pd
);
4723 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4724 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4729 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4730 unsigned short port
, void *val
,
4731 unsigned int count
, bool in
)
4733 vcpu
->arch
.pio
.port
= port
;
4734 vcpu
->arch
.pio
.in
= in
;
4735 vcpu
->arch
.pio
.count
= count
;
4736 vcpu
->arch
.pio
.size
= size
;
4738 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4739 vcpu
->arch
.pio
.count
= 0;
4743 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4744 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4745 vcpu
->run
->io
.size
= size
;
4746 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4747 vcpu
->run
->io
.count
= count
;
4748 vcpu
->run
->io
.port
= port
;
4753 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4754 int size
, unsigned short port
, void *val
,
4757 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4760 if (vcpu
->arch
.pio
.count
)
4763 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4766 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4767 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4768 vcpu
->arch
.pio
.count
= 0;
4775 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4776 int size
, unsigned short port
,
4777 const void *val
, unsigned int count
)
4779 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4781 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4782 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4783 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4786 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4788 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4791 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4793 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4796 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4798 if (!need_emulate_wbinvd(vcpu
))
4799 return X86EMUL_CONTINUE
;
4801 if (kvm_x86_ops
->has_wbinvd_exit()) {
4802 int cpu
= get_cpu();
4804 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4805 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4806 wbinvd_ipi
, NULL
, 1);
4808 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4811 return X86EMUL_CONTINUE
;
4814 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4816 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4817 return kvm_emulate_wbinvd_noskip(vcpu
);
4819 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4823 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4825 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4828 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4829 unsigned long *dest
)
4831 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4834 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4835 unsigned long value
)
4838 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4841 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4843 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4846 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4848 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4849 unsigned long value
;
4853 value
= kvm_read_cr0(vcpu
);
4856 value
= vcpu
->arch
.cr2
;
4859 value
= kvm_read_cr3(vcpu
);
4862 value
= kvm_read_cr4(vcpu
);
4865 value
= kvm_get_cr8(vcpu
);
4868 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4875 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4877 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4882 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4885 vcpu
->arch
.cr2
= val
;
4888 res
= kvm_set_cr3(vcpu
, val
);
4891 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4894 res
= kvm_set_cr8(vcpu
, val
);
4897 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4904 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4906 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4909 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4911 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4914 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4916 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4919 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4921 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4924 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4926 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4929 static unsigned long emulator_get_cached_segment_base(
4930 struct x86_emulate_ctxt
*ctxt
, int seg
)
4932 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4935 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4936 struct desc_struct
*desc
, u32
*base3
,
4939 struct kvm_segment var
;
4941 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4942 *selector
= var
.selector
;
4945 memset(desc
, 0, sizeof(*desc
));
4951 set_desc_limit(desc
, var
.limit
);
4952 set_desc_base(desc
, (unsigned long)var
.base
);
4953 #ifdef CONFIG_X86_64
4955 *base3
= var
.base
>> 32;
4957 desc
->type
= var
.type
;
4959 desc
->dpl
= var
.dpl
;
4960 desc
->p
= var
.present
;
4961 desc
->avl
= var
.avl
;
4969 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4970 struct desc_struct
*desc
, u32 base3
,
4973 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4974 struct kvm_segment var
;
4976 var
.selector
= selector
;
4977 var
.base
= get_desc_base(desc
);
4978 #ifdef CONFIG_X86_64
4979 var
.base
|= ((u64
)base3
) << 32;
4981 var
.limit
= get_desc_limit(desc
);
4983 var
.limit
= (var
.limit
<< 12) | 0xfff;
4984 var
.type
= desc
->type
;
4985 var
.dpl
= desc
->dpl
;
4990 var
.avl
= desc
->avl
;
4991 var
.present
= desc
->p
;
4992 var
.unusable
= !var
.present
;
4995 kvm_set_segment(vcpu
, &var
, seg
);
4999 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5000 u32 msr_index
, u64
*pdata
)
5002 struct msr_data msr
;
5005 msr
.index
= msr_index
;
5006 msr
.host_initiated
= false;
5007 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5015 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5016 u32 msr_index
, u64 data
)
5018 struct msr_data msr
;
5021 msr
.index
= msr_index
;
5022 msr
.host_initiated
= false;
5023 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5026 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5028 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5030 return vcpu
->arch
.smbase
;
5033 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5035 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5037 vcpu
->arch
.smbase
= smbase
;
5040 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5043 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5046 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5047 u32 pmc
, u64
*pdata
)
5049 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5052 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5054 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5057 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5060 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5062 * CR0.TS may reference the host fpu state, not the guest fpu state,
5063 * so it may be clear at this point.
5068 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5073 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5074 struct x86_instruction_info
*info
,
5075 enum x86_intercept_stage stage
)
5077 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5080 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5081 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5083 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5086 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5088 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5091 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5093 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5096 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5098 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5101 static const struct x86_emulate_ops emulate_ops
= {
5102 .read_gpr
= emulator_read_gpr
,
5103 .write_gpr
= emulator_write_gpr
,
5104 .read_std
= kvm_read_guest_virt_system
,
5105 .write_std
= kvm_write_guest_virt_system
,
5106 .read_phys
= kvm_read_guest_phys_system
,
5107 .fetch
= kvm_fetch_guest_virt
,
5108 .read_emulated
= emulator_read_emulated
,
5109 .write_emulated
= emulator_write_emulated
,
5110 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5111 .invlpg
= emulator_invlpg
,
5112 .pio_in_emulated
= emulator_pio_in_emulated
,
5113 .pio_out_emulated
= emulator_pio_out_emulated
,
5114 .get_segment
= emulator_get_segment
,
5115 .set_segment
= emulator_set_segment
,
5116 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5117 .get_gdt
= emulator_get_gdt
,
5118 .get_idt
= emulator_get_idt
,
5119 .set_gdt
= emulator_set_gdt
,
5120 .set_idt
= emulator_set_idt
,
5121 .get_cr
= emulator_get_cr
,
5122 .set_cr
= emulator_set_cr
,
5123 .cpl
= emulator_get_cpl
,
5124 .get_dr
= emulator_get_dr
,
5125 .set_dr
= emulator_set_dr
,
5126 .get_smbase
= emulator_get_smbase
,
5127 .set_smbase
= emulator_set_smbase
,
5128 .set_msr
= emulator_set_msr
,
5129 .get_msr
= emulator_get_msr
,
5130 .check_pmc
= emulator_check_pmc
,
5131 .read_pmc
= emulator_read_pmc
,
5132 .halt
= emulator_halt
,
5133 .wbinvd
= emulator_wbinvd
,
5134 .fix_hypercall
= emulator_fix_hypercall
,
5135 .get_fpu
= emulator_get_fpu
,
5136 .put_fpu
= emulator_put_fpu
,
5137 .intercept
= emulator_intercept
,
5138 .get_cpuid
= emulator_get_cpuid
,
5139 .set_nmi_mask
= emulator_set_nmi_mask
,
5142 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5144 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5146 * an sti; sti; sequence only disable interrupts for the first
5147 * instruction. So, if the last instruction, be it emulated or
5148 * not, left the system with the INT_STI flag enabled, it
5149 * means that the last instruction is an sti. We should not
5150 * leave the flag on in this case. The same goes for mov ss
5152 if (int_shadow
& mask
)
5154 if (unlikely(int_shadow
|| mask
)) {
5155 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5157 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5161 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5163 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5164 if (ctxt
->exception
.vector
== PF_VECTOR
)
5165 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5167 if (ctxt
->exception
.error_code_valid
)
5168 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5169 ctxt
->exception
.error_code
);
5171 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5175 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5177 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5180 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5182 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5183 ctxt
->eip
= kvm_rip_read(vcpu
);
5184 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5185 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5186 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5187 cs_db
? X86EMUL_MODE_PROT32
:
5188 X86EMUL_MODE_PROT16
;
5189 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5190 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5191 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5192 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5194 init_decode_cache(ctxt
);
5195 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5198 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5200 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5203 init_emulate_ctxt(vcpu
);
5207 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5208 ret
= emulate_int_real(ctxt
, irq
);
5210 if (ret
!= X86EMUL_CONTINUE
)
5211 return EMULATE_FAIL
;
5213 ctxt
->eip
= ctxt
->_eip
;
5214 kvm_rip_write(vcpu
, ctxt
->eip
);
5215 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5217 if (irq
== NMI_VECTOR
)
5218 vcpu
->arch
.nmi_pending
= 0;
5220 vcpu
->arch
.interrupt
.pending
= false;
5222 return EMULATE_DONE
;
5224 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5226 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5228 int r
= EMULATE_DONE
;
5230 ++vcpu
->stat
.insn_emulation_fail
;
5231 trace_kvm_emulate_insn_failed(vcpu
);
5232 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5233 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5234 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5235 vcpu
->run
->internal
.ndata
= 0;
5238 kvm_queue_exception(vcpu
, UD_VECTOR
);
5243 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5244 bool write_fault_to_shadow_pgtable
,
5250 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5253 if (!vcpu
->arch
.mmu
.direct_map
) {
5255 * Write permission should be allowed since only
5256 * write access need to be emulated.
5258 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5261 * If the mapping is invalid in guest, let cpu retry
5262 * it to generate fault.
5264 if (gpa
== UNMAPPED_GVA
)
5269 * Do not retry the unhandleable instruction if it faults on the
5270 * readonly host memory, otherwise it will goto a infinite loop:
5271 * retry instruction -> write #PF -> emulation fail -> retry
5272 * instruction -> ...
5274 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5277 * If the instruction failed on the error pfn, it can not be fixed,
5278 * report the error to userspace.
5280 if (is_error_noslot_pfn(pfn
))
5283 kvm_release_pfn_clean(pfn
);
5285 /* The instructions are well-emulated on direct mmu. */
5286 if (vcpu
->arch
.mmu
.direct_map
) {
5287 unsigned int indirect_shadow_pages
;
5289 spin_lock(&vcpu
->kvm
->mmu_lock
);
5290 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5291 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5293 if (indirect_shadow_pages
)
5294 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5300 * if emulation was due to access to shadowed page table
5301 * and it failed try to unshadow page and re-enter the
5302 * guest to let CPU execute the instruction.
5304 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5307 * If the access faults on its page table, it can not
5308 * be fixed by unprotecting shadow page and it should
5309 * be reported to userspace.
5311 return !write_fault_to_shadow_pgtable
;
5314 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5315 unsigned long cr2
, int emulation_type
)
5317 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5318 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5320 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5321 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5324 * If the emulation is caused by #PF and it is non-page_table
5325 * writing instruction, it means the VM-EXIT is caused by shadow
5326 * page protected, we can zap the shadow page and retry this
5327 * instruction directly.
5329 * Note: if the guest uses a non-page-table modifying instruction
5330 * on the PDE that points to the instruction, then we will unmap
5331 * the instruction and go to an infinite loop. So, we cache the
5332 * last retried eip and the last fault address, if we meet the eip
5333 * and the address again, we can break out of the potential infinite
5336 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5338 if (!(emulation_type
& EMULTYPE_RETRY
))
5341 if (x86_page_table_writing_insn(ctxt
))
5344 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5347 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5348 vcpu
->arch
.last_retry_addr
= cr2
;
5350 if (!vcpu
->arch
.mmu
.direct_map
)
5351 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5353 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5358 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5359 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5361 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5363 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5364 /* This is a good place to trace that we are exiting SMM. */
5365 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5367 /* Process a latched INIT or SMI, if any. */
5368 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5371 kvm_mmu_reset_context(vcpu
);
5374 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5376 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5378 vcpu
->arch
.hflags
= emul_flags
;
5380 if (changed
& HF_SMM_MASK
)
5381 kvm_smm_changed(vcpu
);
5384 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5393 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5394 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5399 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5401 struct kvm_run
*kvm_run
= vcpu
->run
;
5404 * rflags is the old, "raw" value of the flags. The new value has
5405 * not been saved yet.
5407 * This is correct even for TF set by the guest, because "the
5408 * processor will not generate this exception after the instruction
5409 * that sets the TF flag".
5411 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5412 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5413 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5415 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5416 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5417 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5418 *r
= EMULATE_USER_EXIT
;
5420 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5422 * "Certain debug exceptions may clear bit 0-3. The
5423 * remaining contents of the DR6 register are never
5424 * cleared by the processor".
5426 vcpu
->arch
.dr6
&= ~15;
5427 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5428 kvm_queue_exception(vcpu
, DB_VECTOR
);
5433 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5435 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5436 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5437 struct kvm_run
*kvm_run
= vcpu
->run
;
5438 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5439 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5440 vcpu
->arch
.guest_debug_dr7
,
5444 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5445 kvm_run
->debug
.arch
.pc
= eip
;
5446 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5447 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5448 *r
= EMULATE_USER_EXIT
;
5453 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5454 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5455 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5456 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5461 vcpu
->arch
.dr6
&= ~15;
5462 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5463 kvm_queue_exception(vcpu
, DB_VECTOR
);
5472 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5479 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5480 bool writeback
= true;
5481 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5484 * Clear write_fault_to_shadow_pgtable here to ensure it is
5487 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5488 kvm_clear_exception_queue(vcpu
);
5490 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5491 init_emulate_ctxt(vcpu
);
5494 * We will reenter on the same instruction since
5495 * we do not set complete_userspace_io. This does not
5496 * handle watchpoints yet, those would be handled in
5499 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5502 ctxt
->interruptibility
= 0;
5503 ctxt
->have_exception
= false;
5504 ctxt
->exception
.vector
= -1;
5505 ctxt
->perm_ok
= false;
5507 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5509 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5511 trace_kvm_emulate_insn_start(vcpu
);
5512 ++vcpu
->stat
.insn_emulation
;
5513 if (r
!= EMULATION_OK
) {
5514 if (emulation_type
& EMULTYPE_TRAP_UD
)
5515 return EMULATE_FAIL
;
5516 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5518 return EMULATE_DONE
;
5519 if (emulation_type
& EMULTYPE_SKIP
)
5520 return EMULATE_FAIL
;
5521 return handle_emulation_failure(vcpu
);
5525 if (emulation_type
& EMULTYPE_SKIP
) {
5526 kvm_rip_write(vcpu
, ctxt
->_eip
);
5527 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5528 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5529 return EMULATE_DONE
;
5532 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5533 return EMULATE_DONE
;
5535 /* this is needed for vmware backdoor interface to work since it
5536 changes registers values during IO operation */
5537 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5538 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5539 emulator_invalidate_register_cache(ctxt
);
5543 r
= x86_emulate_insn(ctxt
);
5545 if (r
== EMULATION_INTERCEPTED
)
5546 return EMULATE_DONE
;
5548 if (r
== EMULATION_FAILED
) {
5549 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5551 return EMULATE_DONE
;
5553 return handle_emulation_failure(vcpu
);
5556 if (ctxt
->have_exception
) {
5558 if (inject_emulated_exception(vcpu
))
5560 } else if (vcpu
->arch
.pio
.count
) {
5561 if (!vcpu
->arch
.pio
.in
) {
5562 /* FIXME: return into emulator if single-stepping. */
5563 vcpu
->arch
.pio
.count
= 0;
5566 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5568 r
= EMULATE_USER_EXIT
;
5569 } else if (vcpu
->mmio_needed
) {
5570 if (!vcpu
->mmio_is_write
)
5572 r
= EMULATE_USER_EXIT
;
5573 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5574 } else if (r
== EMULATION_RESTART
)
5580 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5581 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5582 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5583 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5584 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5585 kvm_rip_write(vcpu
, ctxt
->eip
);
5586 if (r
== EMULATE_DONE
)
5587 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5588 if (!ctxt
->have_exception
||
5589 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5590 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5593 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5594 * do nothing, and it will be requested again as soon as
5595 * the shadow expires. But we still need to check here,
5596 * because POPF has no interrupt shadow.
5598 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5599 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5601 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5605 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5607 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5609 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5610 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5611 size
, port
, &val
, 1);
5612 /* do not return to emulator after return from userspace */
5613 vcpu
->arch
.pio
.count
= 0;
5616 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5618 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5622 /* We should only ever be called with arch.pio.count equal to 1 */
5623 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5625 /* For size less than 4 we merge, else we zero extend */
5626 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5630 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5631 * the copy and tracing
5633 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5634 vcpu
->arch
.pio
.port
, &val
, 1);
5635 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5640 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5645 /* For size less than 4 we merge, else we zero extend */
5646 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5648 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5651 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5655 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5659 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5661 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5663 __this_cpu_write(cpu_tsc_khz
, 0);
5667 static void tsc_khz_changed(void *data
)
5669 struct cpufreq_freqs
*freq
= data
;
5670 unsigned long khz
= 0;
5674 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5675 khz
= cpufreq_quick_get(raw_smp_processor_id());
5678 __this_cpu_write(cpu_tsc_khz
, khz
);
5681 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5684 struct cpufreq_freqs
*freq
= data
;
5686 struct kvm_vcpu
*vcpu
;
5687 int i
, send_ipi
= 0;
5690 * We allow guests to temporarily run on slowing clocks,
5691 * provided we notify them after, or to run on accelerating
5692 * clocks, provided we notify them before. Thus time never
5695 * However, we have a problem. We can't atomically update
5696 * the frequency of a given CPU from this function; it is
5697 * merely a notifier, which can be called from any CPU.
5698 * Changing the TSC frequency at arbitrary points in time
5699 * requires a recomputation of local variables related to
5700 * the TSC for each VCPU. We must flag these local variables
5701 * to be updated and be sure the update takes place with the
5702 * new frequency before any guests proceed.
5704 * Unfortunately, the combination of hotplug CPU and frequency
5705 * change creates an intractable locking scenario; the order
5706 * of when these callouts happen is undefined with respect to
5707 * CPU hotplug, and they can race with each other. As such,
5708 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5709 * undefined; you can actually have a CPU frequency change take
5710 * place in between the computation of X and the setting of the
5711 * variable. To protect against this problem, all updates of
5712 * the per_cpu tsc_khz variable are done in an interrupt
5713 * protected IPI, and all callers wishing to update the value
5714 * must wait for a synchronous IPI to complete (which is trivial
5715 * if the caller is on the CPU already). This establishes the
5716 * necessary total order on variable updates.
5718 * Note that because a guest time update may take place
5719 * anytime after the setting of the VCPU's request bit, the
5720 * correct TSC value must be set before the request. However,
5721 * to ensure the update actually makes it to any guest which
5722 * starts running in hardware virtualization between the set
5723 * and the acquisition of the spinlock, we must also ping the
5724 * CPU after setting the request bit.
5728 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5730 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5733 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5735 spin_lock(&kvm_lock
);
5736 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5737 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5738 if (vcpu
->cpu
!= freq
->cpu
)
5740 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5741 if (vcpu
->cpu
!= smp_processor_id())
5745 spin_unlock(&kvm_lock
);
5747 if (freq
->old
< freq
->new && send_ipi
) {
5749 * We upscale the frequency. Must make the guest
5750 * doesn't see old kvmclock values while running with
5751 * the new frequency, otherwise we risk the guest sees
5752 * time go backwards.
5754 * In case we update the frequency for another cpu
5755 * (which might be in guest context) send an interrupt
5756 * to kick the cpu out of guest context. Next time
5757 * guest context is entered kvmclock will be updated,
5758 * so the guest will not see stale values.
5760 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5765 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5766 .notifier_call
= kvmclock_cpufreq_notifier
5769 static int kvmclock_cpu_online(unsigned int cpu
)
5771 tsc_khz_changed(NULL
);
5775 static void kvm_timer_init(void)
5777 max_tsc_khz
= tsc_khz
;
5779 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5780 #ifdef CONFIG_CPU_FREQ
5781 struct cpufreq_policy policy
;
5784 memset(&policy
, 0, sizeof(policy
));
5786 cpufreq_get_policy(&policy
, cpu
);
5787 if (policy
.cpuinfo
.max_freq
)
5788 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5791 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5792 CPUFREQ_TRANSITION_NOTIFIER
);
5794 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5796 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "AP_X86_KVM_CLK_ONLINE",
5797 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5800 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5802 int kvm_is_in_guest(void)
5804 return __this_cpu_read(current_vcpu
) != NULL
;
5807 static int kvm_is_user_mode(void)
5811 if (__this_cpu_read(current_vcpu
))
5812 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5814 return user_mode
!= 0;
5817 static unsigned long kvm_get_guest_ip(void)
5819 unsigned long ip
= 0;
5821 if (__this_cpu_read(current_vcpu
))
5822 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5827 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5828 .is_in_guest
= kvm_is_in_guest
,
5829 .is_user_mode
= kvm_is_user_mode
,
5830 .get_guest_ip
= kvm_get_guest_ip
,
5833 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5835 __this_cpu_write(current_vcpu
, vcpu
);
5837 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5839 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5841 __this_cpu_write(current_vcpu
, NULL
);
5843 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5845 static void kvm_set_mmio_spte_mask(void)
5848 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5851 * Set the reserved bits and the present bit of an paging-structure
5852 * entry to generate page fault with PFER.RSV = 1.
5854 /* Mask the reserved physical address bits. */
5855 mask
= rsvd_bits(maxphyaddr
, 51);
5857 /* Bit 62 is always reserved for 32bit host. */
5858 mask
|= 0x3ull
<< 62;
5860 /* Set the present bit. */
5863 #ifdef CONFIG_X86_64
5865 * If reserved bit is not supported, clear the present bit to disable
5868 if (maxphyaddr
== 52)
5872 kvm_mmu_set_mmio_spte_mask(mask
);
5875 #ifdef CONFIG_X86_64
5876 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5880 struct kvm_vcpu
*vcpu
;
5883 spin_lock(&kvm_lock
);
5884 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5885 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5886 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5887 atomic_set(&kvm_guest_has_master_clock
, 0);
5888 spin_unlock(&kvm_lock
);
5891 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5894 * Notification about pvclock gtod data update.
5896 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5899 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5900 struct timekeeper
*tk
= priv
;
5902 update_pvclock_gtod(tk
);
5904 /* disable master clock if host does not trust, or does not
5905 * use, TSC clocksource
5907 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5908 atomic_read(&kvm_guest_has_master_clock
) != 0)
5909 queue_work(system_long_wq
, &pvclock_gtod_work
);
5914 static struct notifier_block pvclock_gtod_notifier
= {
5915 .notifier_call
= pvclock_gtod_notify
,
5919 int kvm_arch_init(void *opaque
)
5922 struct kvm_x86_ops
*ops
= opaque
;
5925 printk(KERN_ERR
"kvm: already loaded the other module\n");
5930 if (!ops
->cpu_has_kvm_support()) {
5931 printk(KERN_ERR
"kvm: no hardware support\n");
5935 if (ops
->disabled_by_bios()) {
5936 printk(KERN_ERR
"kvm: disabled by bios\n");
5942 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5944 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5948 r
= kvm_mmu_module_init();
5950 goto out_free_percpu
;
5952 kvm_set_mmio_spte_mask();
5956 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5957 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
5961 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5963 if (boot_cpu_has(X86_FEATURE_XSAVE
))
5964 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5967 #ifdef CONFIG_X86_64
5968 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5974 free_percpu(shared_msrs
);
5979 void kvm_arch_exit(void)
5981 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5983 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5984 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5985 CPUFREQ_TRANSITION_NOTIFIER
);
5986 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
5987 #ifdef CONFIG_X86_64
5988 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5991 kvm_mmu_module_exit();
5992 free_percpu(shared_msrs
);
5995 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5997 ++vcpu
->stat
.halt_exits
;
5998 if (lapic_in_kernel(vcpu
)) {
5999 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6002 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6006 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6008 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6010 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
6011 return kvm_vcpu_halt(vcpu
);
6013 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6016 * kvm_pv_kick_cpu_op: Kick a vcpu.
6018 * @apicid - apicid of vcpu to be kicked.
6020 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6022 struct kvm_lapic_irq lapic_irq
;
6024 lapic_irq
.shorthand
= 0;
6025 lapic_irq
.dest_mode
= 0;
6026 lapic_irq
.dest_id
= apicid
;
6027 lapic_irq
.msi_redir_hint
= false;
6029 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6030 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6033 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6035 vcpu
->arch
.apicv_active
= false;
6036 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6039 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6041 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6042 int op_64_bit
, r
= 1;
6044 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
6046 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6047 return kvm_hv_hypercall(vcpu
);
6049 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6050 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6051 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6052 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6053 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6055 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6057 op_64_bit
= is_64_bit_mode(vcpu
);
6066 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6072 case KVM_HC_VAPIC_POLL_IRQ
:
6075 case KVM_HC_KICK_CPU
:
6076 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6086 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6087 ++vcpu
->stat
.hypercalls
;
6090 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6092 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6094 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6095 char instruction
[3];
6096 unsigned long rip
= kvm_rip_read(vcpu
);
6098 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6100 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
6103 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6105 return vcpu
->run
->request_interrupt_window
&&
6106 likely(!pic_in_kernel(vcpu
->kvm
));
6109 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6111 struct kvm_run
*kvm_run
= vcpu
->run
;
6113 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6114 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6115 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6116 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6117 kvm_run
->ready_for_interrupt_injection
=
6118 pic_in_kernel(vcpu
->kvm
) ||
6119 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6122 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6126 if (!kvm_x86_ops
->update_cr8_intercept
)
6129 if (!lapic_in_kernel(vcpu
))
6132 if (vcpu
->arch
.apicv_active
)
6135 if (!vcpu
->arch
.apic
->vapic_addr
)
6136 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6143 tpr
= kvm_lapic_get_cr8(vcpu
);
6145 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6148 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6152 /* try to reinject previous events if any */
6153 if (vcpu
->arch
.exception
.pending
) {
6154 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6155 vcpu
->arch
.exception
.has_error_code
,
6156 vcpu
->arch
.exception
.error_code
);
6158 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6159 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6162 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6163 (vcpu
->arch
.dr7
& DR7_GD
)) {
6164 vcpu
->arch
.dr7
&= ~DR7_GD
;
6165 kvm_update_dr7(vcpu
);
6168 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6169 vcpu
->arch
.exception
.has_error_code
,
6170 vcpu
->arch
.exception
.error_code
,
6171 vcpu
->arch
.exception
.reinject
);
6175 if (vcpu
->arch
.nmi_injected
) {
6176 kvm_x86_ops
->set_nmi(vcpu
);
6180 if (vcpu
->arch
.interrupt
.pending
) {
6181 kvm_x86_ops
->set_irq(vcpu
);
6185 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6186 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6191 /* try to inject new event if pending */
6192 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6193 vcpu
->arch
.smi_pending
= false;
6195 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6196 --vcpu
->arch
.nmi_pending
;
6197 vcpu
->arch
.nmi_injected
= true;
6198 kvm_x86_ops
->set_nmi(vcpu
);
6199 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6201 * Because interrupts can be injected asynchronously, we are
6202 * calling check_nested_events again here to avoid a race condition.
6203 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6204 * proposal and current concerns. Perhaps we should be setting
6205 * KVM_REQ_EVENT only on certain events and not unconditionally?
6207 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6208 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6212 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6213 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6215 kvm_x86_ops
->set_irq(vcpu
);
6222 static void process_nmi(struct kvm_vcpu
*vcpu
)
6227 * x86 is limited to one NMI running, and one NMI pending after it.
6228 * If an NMI is already in progress, limit further NMIs to just one.
6229 * Otherwise, allow two (and we'll inject the first one immediately).
6231 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6234 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6235 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6236 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6239 #define put_smstate(type, buf, offset, val) \
6240 *(type *)((buf) + (offset) - 0x7e00) = val
6242 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6245 flags
|= seg
->g
<< 23;
6246 flags
|= seg
->db
<< 22;
6247 flags
|= seg
->l
<< 21;
6248 flags
|= seg
->avl
<< 20;
6249 flags
|= seg
->present
<< 15;
6250 flags
|= seg
->dpl
<< 13;
6251 flags
|= seg
->s
<< 12;
6252 flags
|= seg
->type
<< 8;
6256 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6258 struct kvm_segment seg
;
6261 kvm_get_segment(vcpu
, &seg
, n
);
6262 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6265 offset
= 0x7f84 + n
* 12;
6267 offset
= 0x7f2c + (n
- 3) * 12;
6269 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6270 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6271 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6274 #ifdef CONFIG_X86_64
6275 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6277 struct kvm_segment seg
;
6281 kvm_get_segment(vcpu
, &seg
, n
);
6282 offset
= 0x7e00 + n
* 16;
6284 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6285 put_smstate(u16
, buf
, offset
, seg
.selector
);
6286 put_smstate(u16
, buf
, offset
+ 2, flags
);
6287 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6288 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6292 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6295 struct kvm_segment seg
;
6299 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6300 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6301 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6302 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6304 for (i
= 0; i
< 8; i
++)
6305 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6307 kvm_get_dr(vcpu
, 6, &val
);
6308 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6309 kvm_get_dr(vcpu
, 7, &val
);
6310 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6312 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6313 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6314 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6315 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6316 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6318 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6319 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6320 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6321 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6322 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6324 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6325 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6326 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6328 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6329 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6330 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6332 for (i
= 0; i
< 6; i
++)
6333 enter_smm_save_seg_32(vcpu
, buf
, i
);
6335 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6338 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6339 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6342 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6344 #ifdef CONFIG_X86_64
6346 struct kvm_segment seg
;
6350 for (i
= 0; i
< 16; i
++)
6351 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6353 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6354 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6356 kvm_get_dr(vcpu
, 6, &val
);
6357 put_smstate(u64
, buf
, 0x7f68, val
);
6358 kvm_get_dr(vcpu
, 7, &val
);
6359 put_smstate(u64
, buf
, 0x7f60, val
);
6361 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6362 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6363 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6365 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6368 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6370 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6372 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6373 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6374 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6375 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6376 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6378 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6379 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6380 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6382 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6383 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6384 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6385 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6386 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6388 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6389 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6390 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6392 for (i
= 0; i
< 6; i
++)
6393 enter_smm_save_seg_64(vcpu
, buf
, i
);
6399 static void enter_smm(struct kvm_vcpu
*vcpu
)
6401 struct kvm_segment cs
, ds
;
6406 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6407 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6408 memset(buf
, 0, 512);
6409 if (guest_cpuid_has_longmode(vcpu
))
6410 enter_smm_save_state_64(vcpu
, buf
);
6412 enter_smm_save_state_32(vcpu
, buf
);
6414 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6416 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6417 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6419 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6421 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6422 kvm_rip_write(vcpu
, 0x8000);
6424 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6425 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6426 vcpu
->arch
.cr0
= cr0
;
6428 kvm_x86_ops
->set_cr4(vcpu
, 0);
6430 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6431 dt
.address
= dt
.size
= 0;
6432 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6434 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6436 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6437 cs
.base
= vcpu
->arch
.smbase
;
6442 cs
.limit
= ds
.limit
= 0xffffffff;
6443 cs
.type
= ds
.type
= 0x3;
6444 cs
.dpl
= ds
.dpl
= 0;
6449 cs
.avl
= ds
.avl
= 0;
6450 cs
.present
= ds
.present
= 1;
6451 cs
.unusable
= ds
.unusable
= 0;
6452 cs
.padding
= ds
.padding
= 0;
6454 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6455 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6456 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6457 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6458 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6459 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6461 if (guest_cpuid_has_longmode(vcpu
))
6462 kvm_x86_ops
->set_efer(vcpu
, 0);
6464 kvm_update_cpuid(vcpu
);
6465 kvm_mmu_reset_context(vcpu
);
6468 static void process_smi(struct kvm_vcpu
*vcpu
)
6470 vcpu
->arch
.smi_pending
= true;
6471 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6474 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6476 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6479 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6481 u64 eoi_exit_bitmap
[4];
6483 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6486 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6488 if (irqchip_split(vcpu
->kvm
))
6489 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6491 if (vcpu
->arch
.apicv_active
)
6492 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6493 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6495 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6496 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6497 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6500 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6502 ++vcpu
->stat
.tlb_flush
;
6503 kvm_x86_ops
->tlb_flush(vcpu
);
6506 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6508 struct page
*page
= NULL
;
6510 if (!lapic_in_kernel(vcpu
))
6513 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6516 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6517 if (is_error_page(page
))
6519 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6522 * Do not pin apic access page in memory, the MMU notifier
6523 * will call us again if it is migrated or swapped out.
6527 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6529 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6530 unsigned long address
)
6533 * The physical address of apic access page is stored in the VMCS.
6534 * Update it when it becomes invalid.
6536 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6537 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6541 * Returns 1 to let vcpu_run() continue the guest execution loop without
6542 * exiting to the userspace. Otherwise, the value will be returned to the
6545 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6549 dm_request_for_irq_injection(vcpu
) &&
6550 kvm_cpu_accept_dm_intr(vcpu
);
6552 bool req_immediate_exit
= false;
6554 if (vcpu
->requests
) {
6555 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6556 kvm_mmu_unload(vcpu
);
6557 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6558 __kvm_migrate_timers(vcpu
);
6559 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6560 kvm_gen_update_masterclock(vcpu
->kvm
);
6561 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6562 kvm_gen_kvmclock_update(vcpu
);
6563 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6564 r
= kvm_guest_time_update(vcpu
);
6568 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6569 kvm_mmu_sync_roots(vcpu
);
6570 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6571 kvm_vcpu_flush_tlb(vcpu
);
6572 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6573 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6577 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6578 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6582 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6583 vcpu
->fpu_active
= 0;
6584 kvm_x86_ops
->fpu_deactivate(vcpu
);
6586 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6587 /* Page is swapped out. Do synthetic halt */
6588 vcpu
->arch
.apf
.halted
= true;
6592 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6593 record_steal_time(vcpu
);
6594 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6596 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6598 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6599 kvm_pmu_handle_event(vcpu
);
6600 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6601 kvm_pmu_deliver_pmi(vcpu
);
6602 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6603 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6604 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6605 vcpu
->arch
.ioapic_handled_vectors
)) {
6606 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6607 vcpu
->run
->eoi
.vector
=
6608 vcpu
->arch
.pending_ioapic_eoi
;
6613 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6614 vcpu_scan_ioapic(vcpu
);
6615 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6616 kvm_vcpu_reload_apic_access_page(vcpu
);
6617 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6618 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6619 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6623 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6624 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6625 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6629 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6630 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6631 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6637 * KVM_REQ_HV_STIMER has to be processed after
6638 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6639 * depend on the guest clock being up-to-date
6641 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6642 kvm_hv_process_stimers(vcpu
);
6646 * KVM_REQ_EVENT is not set when posted interrupts are set by
6647 * VT-d hardware, so we have to update RVI unconditionally.
6649 if (kvm_lapic_enabled(vcpu
)) {
6651 * Update architecture specific hints for APIC
6652 * virtual interrupt delivery.
6654 if (vcpu
->arch
.apicv_active
)
6655 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6656 kvm_lapic_find_highest_irr(vcpu
));
6659 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6660 kvm_apic_accept_events(vcpu
);
6661 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6666 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6667 req_immediate_exit
= true;
6669 /* Enable NMI/IRQ window open exits if needed.
6671 * SMIs have two cases: 1) they can be nested, and
6672 * then there is nothing to do here because RSM will
6673 * cause a vmexit anyway; 2) or the SMI can be pending
6674 * because inject_pending_event has completed the
6675 * injection of an IRQ or NMI from the previous vmexit,
6676 * and then we request an immediate exit to inject the SMI.
6678 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6679 req_immediate_exit
= true;
6680 if (vcpu
->arch
.nmi_pending
)
6681 kvm_x86_ops
->enable_nmi_window(vcpu
);
6682 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6683 kvm_x86_ops
->enable_irq_window(vcpu
);
6686 if (kvm_lapic_enabled(vcpu
)) {
6687 update_cr8_intercept(vcpu
);
6688 kvm_lapic_sync_to_vapic(vcpu
);
6692 r
= kvm_mmu_reload(vcpu
);
6694 goto cancel_injection
;
6699 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6700 if (vcpu
->fpu_active
)
6701 kvm_load_guest_fpu(vcpu
);
6702 vcpu
->mode
= IN_GUEST_MODE
;
6704 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6707 * We should set ->mode before check ->requests,
6708 * Please see the comment in kvm_make_all_cpus_request.
6709 * This also orders the write to mode from any reads
6710 * to the page tables done while the VCPU is running.
6711 * Please see the comment in kvm_flush_remote_tlbs.
6713 smp_mb__after_srcu_read_unlock();
6715 local_irq_disable();
6717 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6718 || need_resched() || signal_pending(current
)) {
6719 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6723 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6725 goto cancel_injection
;
6728 kvm_load_guest_xcr0(vcpu
);
6730 if (req_immediate_exit
) {
6731 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6732 smp_send_reschedule(vcpu
->cpu
);
6735 trace_kvm_entry(vcpu
->vcpu_id
);
6736 wait_lapic_expire(vcpu
);
6737 guest_enter_irqoff();
6739 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6741 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6742 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6743 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6744 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6745 set_debugreg(vcpu
->arch
.dr6
, 6);
6746 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6749 kvm_x86_ops
->run(vcpu
);
6752 * Do this here before restoring debug registers on the host. And
6753 * since we do this before handling the vmexit, a DR access vmexit
6754 * can (a) read the correct value of the debug registers, (b) set
6755 * KVM_DEBUGREG_WONT_EXIT again.
6757 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6758 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6759 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6760 kvm_update_dr0123(vcpu
);
6761 kvm_update_dr6(vcpu
);
6762 kvm_update_dr7(vcpu
);
6763 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6767 * If the guest has used debug registers, at least dr7
6768 * will be disabled while returning to the host.
6769 * If we don't have active breakpoints in the host, we don't
6770 * care about the messed up debug address registers. But if
6771 * we have some of them active, restore the old state.
6773 if (hw_breakpoint_active())
6774 hw_breakpoint_restore();
6776 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6778 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6781 kvm_put_guest_xcr0(vcpu
);
6783 kvm_x86_ops
->handle_external_intr(vcpu
);
6787 guest_exit_irqoff();
6792 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6795 * Profile KVM exit RIPs:
6797 if (unlikely(prof_on
== KVM_PROFILING
)) {
6798 unsigned long rip
= kvm_rip_read(vcpu
);
6799 profile_hit(KVM_PROFILING
, (void *)rip
);
6802 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6803 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6805 if (vcpu
->arch
.apic_attention
)
6806 kvm_lapic_sync_from_vapic(vcpu
);
6808 r
= kvm_x86_ops
->handle_exit(vcpu
);
6812 kvm_x86_ops
->cancel_injection(vcpu
);
6813 if (unlikely(vcpu
->arch
.apic_attention
))
6814 kvm_lapic_sync_from_vapic(vcpu
);
6819 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6821 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6822 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6823 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6824 kvm_vcpu_block(vcpu
);
6825 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6827 if (kvm_x86_ops
->post_block
)
6828 kvm_x86_ops
->post_block(vcpu
);
6830 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6834 kvm_apic_accept_events(vcpu
);
6835 switch(vcpu
->arch
.mp_state
) {
6836 case KVM_MP_STATE_HALTED
:
6837 vcpu
->arch
.pv
.pv_unhalted
= false;
6838 vcpu
->arch
.mp_state
=
6839 KVM_MP_STATE_RUNNABLE
;
6840 case KVM_MP_STATE_RUNNABLE
:
6841 vcpu
->arch
.apf
.halted
= false;
6843 case KVM_MP_STATE_INIT_RECEIVED
:
6852 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
6854 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6855 !vcpu
->arch
.apf
.halted
);
6858 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6861 struct kvm
*kvm
= vcpu
->kvm
;
6863 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6866 if (kvm_vcpu_running(vcpu
)) {
6867 r
= vcpu_enter_guest(vcpu
);
6869 r
= vcpu_block(kvm
, vcpu
);
6875 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6876 if (kvm_cpu_has_pending_timer(vcpu
))
6877 kvm_inject_pending_timer_irqs(vcpu
);
6879 if (dm_request_for_irq_injection(vcpu
) &&
6880 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
6882 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
6883 ++vcpu
->stat
.request_irq_exits
;
6887 kvm_check_async_pf_completion(vcpu
);
6889 if (signal_pending(current
)) {
6891 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6892 ++vcpu
->stat
.signal_exits
;
6895 if (need_resched()) {
6896 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6898 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6902 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6907 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6910 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6911 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6912 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6913 if (r
!= EMULATE_DONE
)
6918 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6920 BUG_ON(!vcpu
->arch
.pio
.count
);
6922 return complete_emulated_io(vcpu
);
6926 * Implements the following, as a state machine:
6930 * for each mmio piece in the fragment
6938 * for each mmio piece in the fragment
6943 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6945 struct kvm_run
*run
= vcpu
->run
;
6946 struct kvm_mmio_fragment
*frag
;
6949 BUG_ON(!vcpu
->mmio_needed
);
6951 /* Complete previous fragment */
6952 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6953 len
= min(8u, frag
->len
);
6954 if (!vcpu
->mmio_is_write
)
6955 memcpy(frag
->data
, run
->mmio
.data
, len
);
6957 if (frag
->len
<= 8) {
6958 /* Switch to the next fragment. */
6960 vcpu
->mmio_cur_fragment
++;
6962 /* Go forward to the next mmio piece. */
6968 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6969 vcpu
->mmio_needed
= 0;
6971 /* FIXME: return into emulator if single-stepping. */
6972 if (vcpu
->mmio_is_write
)
6974 vcpu
->mmio_read_completed
= 1;
6975 return complete_emulated_io(vcpu
);
6978 run
->exit_reason
= KVM_EXIT_MMIO
;
6979 run
->mmio
.phys_addr
= frag
->gpa
;
6980 if (vcpu
->mmio_is_write
)
6981 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6982 run
->mmio
.len
= min(8u, frag
->len
);
6983 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6984 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6989 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6991 struct fpu
*fpu
= ¤t
->thread
.fpu
;
6995 fpu__activate_curr(fpu
);
6997 if (vcpu
->sigset_active
)
6998 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7000 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7001 kvm_vcpu_block(vcpu
);
7002 kvm_apic_accept_events(vcpu
);
7003 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
7008 /* re-sync apic's tpr */
7009 if (!lapic_in_kernel(vcpu
)) {
7010 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7016 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7017 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7018 vcpu
->arch
.complete_userspace_io
= NULL
;
7023 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7028 post_kvm_run_save(vcpu
);
7029 if (vcpu
->sigset_active
)
7030 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7035 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7037 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7039 * We are here if userspace calls get_regs() in the middle of
7040 * instruction emulation. Registers state needs to be copied
7041 * back from emulation context to vcpu. Userspace shouldn't do
7042 * that usually, but some bad designed PV devices (vmware
7043 * backdoor interface) need this to work
7045 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7046 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7048 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7049 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7050 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7051 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7052 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7053 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7054 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7055 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7056 #ifdef CONFIG_X86_64
7057 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7058 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7059 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7060 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7061 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7062 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7063 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7064 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7067 regs
->rip
= kvm_rip_read(vcpu
);
7068 regs
->rflags
= kvm_get_rflags(vcpu
);
7073 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7075 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7076 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7078 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7079 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7080 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7081 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7082 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7083 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7084 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7085 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7086 #ifdef CONFIG_X86_64
7087 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7088 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7089 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7090 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7091 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7092 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7093 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7094 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7097 kvm_rip_write(vcpu
, regs
->rip
);
7098 kvm_set_rflags(vcpu
, regs
->rflags
);
7100 vcpu
->arch
.exception
.pending
= false;
7102 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7107 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7109 struct kvm_segment cs
;
7111 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7115 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7117 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7118 struct kvm_sregs
*sregs
)
7122 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7123 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7124 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7125 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7126 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7127 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7129 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7130 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7132 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7133 sregs
->idt
.limit
= dt
.size
;
7134 sregs
->idt
.base
= dt
.address
;
7135 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7136 sregs
->gdt
.limit
= dt
.size
;
7137 sregs
->gdt
.base
= dt
.address
;
7139 sregs
->cr0
= kvm_read_cr0(vcpu
);
7140 sregs
->cr2
= vcpu
->arch
.cr2
;
7141 sregs
->cr3
= kvm_read_cr3(vcpu
);
7142 sregs
->cr4
= kvm_read_cr4(vcpu
);
7143 sregs
->cr8
= kvm_get_cr8(vcpu
);
7144 sregs
->efer
= vcpu
->arch
.efer
;
7145 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7147 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7149 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7150 set_bit(vcpu
->arch
.interrupt
.nr
,
7151 (unsigned long *)sregs
->interrupt_bitmap
);
7156 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7157 struct kvm_mp_state
*mp_state
)
7159 kvm_apic_accept_events(vcpu
);
7160 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7161 vcpu
->arch
.pv
.pv_unhalted
)
7162 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7164 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7169 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7170 struct kvm_mp_state
*mp_state
)
7172 if (!lapic_in_kernel(vcpu
) &&
7173 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7176 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7177 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7178 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7180 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7181 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7185 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7186 int reason
, bool has_error_code
, u32 error_code
)
7188 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7191 init_emulate_ctxt(vcpu
);
7193 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7194 has_error_code
, error_code
);
7197 return EMULATE_FAIL
;
7199 kvm_rip_write(vcpu
, ctxt
->eip
);
7200 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7201 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7202 return EMULATE_DONE
;
7204 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7206 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7207 struct kvm_sregs
*sregs
)
7209 struct msr_data apic_base_msr
;
7210 int mmu_reset_needed
= 0;
7211 int pending_vec
, max_bits
, idx
;
7214 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7217 dt
.size
= sregs
->idt
.limit
;
7218 dt
.address
= sregs
->idt
.base
;
7219 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7220 dt
.size
= sregs
->gdt
.limit
;
7221 dt
.address
= sregs
->gdt
.base
;
7222 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7224 vcpu
->arch
.cr2
= sregs
->cr2
;
7225 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7226 vcpu
->arch
.cr3
= sregs
->cr3
;
7227 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7229 kvm_set_cr8(vcpu
, sregs
->cr8
);
7231 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7232 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7233 apic_base_msr
.data
= sregs
->apic_base
;
7234 apic_base_msr
.host_initiated
= true;
7235 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7237 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7238 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7239 vcpu
->arch
.cr0
= sregs
->cr0
;
7241 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7242 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7243 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7244 kvm_update_cpuid(vcpu
);
7246 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7247 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7248 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7249 mmu_reset_needed
= 1;
7251 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7253 if (mmu_reset_needed
)
7254 kvm_mmu_reset_context(vcpu
);
7256 max_bits
= KVM_NR_INTERRUPTS
;
7257 pending_vec
= find_first_bit(
7258 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7259 if (pending_vec
< max_bits
) {
7260 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7261 pr_debug("Set back pending irq %d\n", pending_vec
);
7264 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7265 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7266 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7267 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7268 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7269 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7271 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7272 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7274 update_cr8_intercept(vcpu
);
7276 /* Older userspace won't unhalt the vcpu on reset. */
7277 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7278 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7280 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7282 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7287 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7288 struct kvm_guest_debug
*dbg
)
7290 unsigned long rflags
;
7293 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7295 if (vcpu
->arch
.exception
.pending
)
7297 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7298 kvm_queue_exception(vcpu
, DB_VECTOR
);
7300 kvm_queue_exception(vcpu
, BP_VECTOR
);
7304 * Read rflags as long as potentially injected trace flags are still
7307 rflags
= kvm_get_rflags(vcpu
);
7309 vcpu
->guest_debug
= dbg
->control
;
7310 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7311 vcpu
->guest_debug
= 0;
7313 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7314 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7315 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7316 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7318 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7319 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7321 kvm_update_dr7(vcpu
);
7323 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7324 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7325 get_segment_base(vcpu
, VCPU_SREG_CS
);
7328 * Trigger an rflags update that will inject or remove the trace
7331 kvm_set_rflags(vcpu
, rflags
);
7333 kvm_x86_ops
->update_bp_intercept(vcpu
);
7343 * Translate a guest virtual address to a guest physical address.
7345 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7346 struct kvm_translation
*tr
)
7348 unsigned long vaddr
= tr
->linear_address
;
7352 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7353 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7354 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7355 tr
->physical_address
= gpa
;
7356 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7363 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7365 struct fxregs_state
*fxsave
=
7366 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7368 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7369 fpu
->fcw
= fxsave
->cwd
;
7370 fpu
->fsw
= fxsave
->swd
;
7371 fpu
->ftwx
= fxsave
->twd
;
7372 fpu
->last_opcode
= fxsave
->fop
;
7373 fpu
->last_ip
= fxsave
->rip
;
7374 fpu
->last_dp
= fxsave
->rdp
;
7375 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7380 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7382 struct fxregs_state
*fxsave
=
7383 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7385 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7386 fxsave
->cwd
= fpu
->fcw
;
7387 fxsave
->swd
= fpu
->fsw
;
7388 fxsave
->twd
= fpu
->ftwx
;
7389 fxsave
->fop
= fpu
->last_opcode
;
7390 fxsave
->rip
= fpu
->last_ip
;
7391 fxsave
->rdp
= fpu
->last_dp
;
7392 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7397 static void fx_init(struct kvm_vcpu
*vcpu
)
7399 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7400 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7401 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7402 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7405 * Ensure guest xcr0 is valid for loading
7407 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7409 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7412 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7414 if (vcpu
->guest_fpu_loaded
)
7418 * Restore all possible states in the guest,
7419 * and assume host would use all available bits.
7420 * Guest xcr0 would be loaded later.
7422 vcpu
->guest_fpu_loaded
= 1;
7423 __kernel_fpu_begin();
7424 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7428 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7430 if (!vcpu
->guest_fpu_loaded
) {
7431 vcpu
->fpu_counter
= 0;
7435 vcpu
->guest_fpu_loaded
= 0;
7436 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7438 ++vcpu
->stat
.fpu_reload
;
7440 * If using eager FPU mode, or if the guest is a frequent user
7441 * of the FPU, just leave the FPU active for next time.
7442 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7443 * the FPU in bursts will revert to loading it on demand.
7445 if (!use_eager_fpu()) {
7446 if (++vcpu
->fpu_counter
< 5)
7447 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7452 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7454 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7456 kvmclock_reset(vcpu
);
7458 kvm_x86_ops
->vcpu_free(vcpu
);
7459 free_cpumask_var(wbinvd_dirty_mask
);
7462 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7465 struct kvm_vcpu
*vcpu
;
7467 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7468 printk_once(KERN_WARNING
7469 "kvm: SMP vm created on host with unstable TSC; "
7470 "guest TSC will not be reliable\n");
7472 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7477 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7481 kvm_vcpu_mtrr_init(vcpu
);
7482 r
= vcpu_load(vcpu
);
7485 kvm_vcpu_reset(vcpu
, false);
7486 kvm_mmu_setup(vcpu
);
7491 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7493 struct msr_data msr
;
7494 struct kvm
*kvm
= vcpu
->kvm
;
7496 if (vcpu_load(vcpu
))
7499 msr
.index
= MSR_IA32_TSC
;
7500 msr
.host_initiated
= true;
7501 kvm_write_tsc(vcpu
, &msr
);
7504 if (!kvmclock_periodic_sync
)
7507 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7508 KVMCLOCK_SYNC_PERIOD
);
7511 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7514 vcpu
->arch
.apf
.msr_val
= 0;
7516 r
= vcpu_load(vcpu
);
7518 kvm_mmu_unload(vcpu
);
7521 kvm_x86_ops
->vcpu_free(vcpu
);
7524 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7526 vcpu
->arch
.hflags
= 0;
7528 vcpu
->arch
.smi_pending
= 0;
7529 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7530 vcpu
->arch
.nmi_pending
= 0;
7531 vcpu
->arch
.nmi_injected
= false;
7532 kvm_clear_interrupt_queue(vcpu
);
7533 kvm_clear_exception_queue(vcpu
);
7535 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7536 kvm_update_dr0123(vcpu
);
7537 vcpu
->arch
.dr6
= DR6_INIT
;
7538 kvm_update_dr6(vcpu
);
7539 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7540 kvm_update_dr7(vcpu
);
7544 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7545 vcpu
->arch
.apf
.msr_val
= 0;
7546 vcpu
->arch
.st
.msr_val
= 0;
7548 kvmclock_reset(vcpu
);
7550 kvm_clear_async_pf_completion_queue(vcpu
);
7551 kvm_async_pf_hash_reset(vcpu
);
7552 vcpu
->arch
.apf
.halted
= false;
7555 kvm_pmu_reset(vcpu
);
7556 vcpu
->arch
.smbase
= 0x30000;
7559 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7560 vcpu
->arch
.regs_avail
= ~0;
7561 vcpu
->arch
.regs_dirty
= ~0;
7563 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7566 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7568 struct kvm_segment cs
;
7570 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7571 cs
.selector
= vector
<< 8;
7572 cs
.base
= vector
<< 12;
7573 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7574 kvm_rip_write(vcpu
, 0);
7577 int kvm_arch_hardware_enable(void)
7580 struct kvm_vcpu
*vcpu
;
7585 bool stable
, backwards_tsc
= false;
7587 kvm_shared_msr_cpu_online();
7588 ret
= kvm_x86_ops
->hardware_enable();
7592 local_tsc
= rdtsc();
7593 stable
= !check_tsc_unstable();
7594 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7595 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7596 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7597 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7598 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7599 backwards_tsc
= true;
7600 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7601 max_tsc
= vcpu
->arch
.last_host_tsc
;
7607 * Sometimes, even reliable TSCs go backwards. This happens on
7608 * platforms that reset TSC during suspend or hibernate actions, but
7609 * maintain synchronization. We must compensate. Fortunately, we can
7610 * detect that condition here, which happens early in CPU bringup,
7611 * before any KVM threads can be running. Unfortunately, we can't
7612 * bring the TSCs fully up to date with real time, as we aren't yet far
7613 * enough into CPU bringup that we know how much real time has actually
7614 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7615 * variables that haven't been updated yet.
7617 * So we simply find the maximum observed TSC above, then record the
7618 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7619 * the adjustment will be applied. Note that we accumulate
7620 * adjustments, in case multiple suspend cycles happen before some VCPU
7621 * gets a chance to run again. In the event that no KVM threads get a
7622 * chance to run, we will miss the entire elapsed period, as we'll have
7623 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7624 * loose cycle time. This isn't too big a deal, since the loss will be
7625 * uniform across all VCPUs (not to mention the scenario is extremely
7626 * unlikely). It is possible that a second hibernate recovery happens
7627 * much faster than a first, causing the observed TSC here to be
7628 * smaller; this would require additional padding adjustment, which is
7629 * why we set last_host_tsc to the local tsc observed here.
7631 * N.B. - this code below runs only on platforms with reliable TSC,
7632 * as that is the only way backwards_tsc is set above. Also note
7633 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7634 * have the same delta_cyc adjustment applied if backwards_tsc
7635 * is detected. Note further, this adjustment is only done once,
7636 * as we reset last_host_tsc on all VCPUs to stop this from being
7637 * called multiple times (one for each physical CPU bringup).
7639 * Platforms with unreliable TSCs don't have to deal with this, they
7640 * will be compensated by the logic in vcpu_load, which sets the TSC to
7641 * catchup mode. This will catchup all VCPUs to real time, but cannot
7642 * guarantee that they stay in perfect synchronization.
7644 if (backwards_tsc
) {
7645 u64 delta_cyc
= max_tsc
- local_tsc
;
7646 backwards_tsc_observed
= true;
7647 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7648 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7649 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7650 vcpu
->arch
.last_host_tsc
= local_tsc
;
7651 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7655 * We have to disable TSC offset matching.. if you were
7656 * booting a VM while issuing an S4 host suspend....
7657 * you may have some problem. Solving this issue is
7658 * left as an exercise to the reader.
7660 kvm
->arch
.last_tsc_nsec
= 0;
7661 kvm
->arch
.last_tsc_write
= 0;
7668 void kvm_arch_hardware_disable(void)
7670 kvm_x86_ops
->hardware_disable();
7671 drop_user_return_notifiers();
7674 int kvm_arch_hardware_setup(void)
7678 r
= kvm_x86_ops
->hardware_setup();
7682 if (kvm_has_tsc_control
) {
7684 * Make sure the user can only configure tsc_khz values that
7685 * fit into a signed integer.
7686 * A min value is not calculated needed because it will always
7687 * be 1 on all machines.
7689 u64 max
= min(0x7fffffffULL
,
7690 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7691 kvm_max_guest_tsc_khz
= max
;
7693 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7696 kvm_init_msr_list();
7700 void kvm_arch_hardware_unsetup(void)
7702 kvm_x86_ops
->hardware_unsetup();
7705 void kvm_arch_check_processor_compat(void *rtn
)
7707 kvm_x86_ops
->check_processor_compatibility(rtn
);
7710 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7712 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7714 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7716 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7718 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7721 struct static_key kvm_no_apic_vcpu __read_mostly
;
7722 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7724 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7730 BUG_ON(vcpu
->kvm
== NULL
);
7733 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7734 vcpu
->arch
.pv
.pv_unhalted
= false;
7735 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7736 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7737 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7739 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7741 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7746 vcpu
->arch
.pio_data
= page_address(page
);
7748 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7750 r
= kvm_mmu_create(vcpu
);
7752 goto fail_free_pio_data
;
7754 if (irqchip_in_kernel(kvm
)) {
7755 r
= kvm_create_lapic(vcpu
);
7757 goto fail_mmu_destroy
;
7759 static_key_slow_inc(&kvm_no_apic_vcpu
);
7761 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7763 if (!vcpu
->arch
.mce_banks
) {
7765 goto fail_free_lapic
;
7767 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7769 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7771 goto fail_free_mce_banks
;
7776 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7777 vcpu
->arch
.pv_time_enabled
= false;
7779 vcpu
->arch
.guest_supported_xcr0
= 0;
7780 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7782 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7784 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7786 kvm_async_pf_hash_reset(vcpu
);
7789 vcpu
->arch
.pending_external_vector
= -1;
7791 kvm_hv_vcpu_init(vcpu
);
7795 fail_free_mce_banks
:
7796 kfree(vcpu
->arch
.mce_banks
);
7798 kvm_free_lapic(vcpu
);
7800 kvm_mmu_destroy(vcpu
);
7802 free_page((unsigned long)vcpu
->arch
.pio_data
);
7807 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7811 kvm_hv_vcpu_uninit(vcpu
);
7812 kvm_pmu_destroy(vcpu
);
7813 kfree(vcpu
->arch
.mce_banks
);
7814 kvm_free_lapic(vcpu
);
7815 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7816 kvm_mmu_destroy(vcpu
);
7817 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7818 free_page((unsigned long)vcpu
->arch
.pio_data
);
7819 if (!lapic_in_kernel(vcpu
))
7820 static_key_slow_dec(&kvm_no_apic_vcpu
);
7823 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7825 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7828 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7833 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7834 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7835 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7836 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7837 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7839 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7840 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7841 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7842 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7843 &kvm
->arch
.irq_sources_bitmap
);
7845 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7846 mutex_init(&kvm
->arch
.apic_map_lock
);
7847 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7849 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
7850 pvclock_update_vm_gtod_copy(kvm
);
7852 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7853 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7855 kvm_page_track_init(kvm
);
7856 kvm_mmu_init_vm(kvm
);
7858 if (kvm_x86_ops
->vm_init
)
7859 return kvm_x86_ops
->vm_init(kvm
);
7864 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7867 r
= vcpu_load(vcpu
);
7869 kvm_mmu_unload(vcpu
);
7873 static void kvm_free_vcpus(struct kvm
*kvm
)
7876 struct kvm_vcpu
*vcpu
;
7879 * Unpin any mmu pages first.
7881 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7882 kvm_clear_async_pf_completion_queue(vcpu
);
7883 kvm_unload_vcpu_mmu(vcpu
);
7885 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7886 kvm_arch_vcpu_free(vcpu
);
7888 mutex_lock(&kvm
->lock
);
7889 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7890 kvm
->vcpus
[i
] = NULL
;
7892 atomic_set(&kvm
->online_vcpus
, 0);
7893 mutex_unlock(&kvm
->lock
);
7896 void kvm_arch_sync_events(struct kvm
*kvm
)
7898 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7899 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7900 kvm_free_all_assigned_devices(kvm
);
7904 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7908 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
7909 struct kvm_memory_slot
*slot
, old
;
7911 /* Called with kvm->slots_lock held. */
7912 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
7915 slot
= id_to_memslot(slots
, id
);
7921 * MAP_SHARED to prevent internal slot pages from being moved
7924 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
7925 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7926 if (IS_ERR((void *)hva
))
7927 return PTR_ERR((void *)hva
);
7936 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7937 struct kvm_userspace_memory_region m
;
7939 m
.slot
= id
| (i
<< 16);
7941 m
.guest_phys_addr
= gpa
;
7942 m
.userspace_addr
= hva
;
7943 m
.memory_size
= size
;
7944 r
= __kvm_set_memory_region(kvm
, &m
);
7950 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
7956 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
7958 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7962 mutex_lock(&kvm
->slots_lock
);
7963 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
7964 mutex_unlock(&kvm
->slots_lock
);
7968 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
7970 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7972 if (current
->mm
== kvm
->mm
) {
7974 * Free memory regions allocated on behalf of userspace,
7975 * unless the the memory map has changed due to process exit
7978 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
7979 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
7980 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
7982 if (kvm_x86_ops
->vm_destroy
)
7983 kvm_x86_ops
->vm_destroy(kvm
);
7984 kvm_iommu_unmap_guest(kvm
);
7985 kfree(kvm
->arch
.vpic
);
7986 kfree(kvm
->arch
.vioapic
);
7987 kvm_free_vcpus(kvm
);
7988 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7989 kvm_mmu_uninit_vm(kvm
);
7992 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7993 struct kvm_memory_slot
*dont
)
7997 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7998 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7999 kvfree(free
->arch
.rmap
[i
]);
8000 free
->arch
.rmap
[i
] = NULL
;
8005 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8006 dont
->arch
.lpage_info
[i
- 1]) {
8007 kvfree(free
->arch
.lpage_info
[i
- 1]);
8008 free
->arch
.lpage_info
[i
- 1] = NULL
;
8012 kvm_page_track_free_memslot(free
, dont
);
8015 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8016 unsigned long npages
)
8020 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8021 struct kvm_lpage_info
*linfo
;
8026 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8027 slot
->base_gfn
, level
) + 1;
8029 slot
->arch
.rmap
[i
] =
8030 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
8031 if (!slot
->arch
.rmap
[i
])
8036 linfo
= kvm_kvzalloc(lpages
* sizeof(*linfo
));
8040 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8042 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8043 linfo
[0].disallow_lpage
= 1;
8044 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8045 linfo
[lpages
- 1].disallow_lpage
= 1;
8046 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8048 * If the gfn and userspace address are not aligned wrt each
8049 * other, or if explicitly asked to, disable large page
8050 * support for this slot
8052 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8053 !kvm_largepages_enabled()) {
8056 for (j
= 0; j
< lpages
; ++j
)
8057 linfo
[j
].disallow_lpage
= 1;
8061 if (kvm_page_track_create_memslot(slot
, npages
))
8067 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8068 kvfree(slot
->arch
.rmap
[i
]);
8069 slot
->arch
.rmap
[i
] = NULL
;
8073 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8074 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8079 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8082 * memslots->generation has been incremented.
8083 * mmio generation may have reached its maximum value.
8085 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8088 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8089 struct kvm_memory_slot
*memslot
,
8090 const struct kvm_userspace_memory_region
*mem
,
8091 enum kvm_mr_change change
)
8096 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8097 struct kvm_memory_slot
*new)
8099 /* Still write protect RO slot */
8100 if (new->flags
& KVM_MEM_READONLY
) {
8101 kvm_mmu_slot_remove_write_access(kvm
, new);
8106 * Call kvm_x86_ops dirty logging hooks when they are valid.
8108 * kvm_x86_ops->slot_disable_log_dirty is called when:
8110 * - KVM_MR_CREATE with dirty logging is disabled
8111 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8113 * The reason is, in case of PML, we need to set D-bit for any slots
8114 * with dirty logging disabled in order to eliminate unnecessary GPA
8115 * logging in PML buffer (and potential PML buffer full VMEXT). This
8116 * guarantees leaving PML enabled during guest's lifetime won't have
8117 * any additonal overhead from PML when guest is running with dirty
8118 * logging disabled for memory slots.
8120 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8121 * to dirty logging mode.
8123 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8125 * In case of write protect:
8127 * Write protect all pages for dirty logging.
8129 * All the sptes including the large sptes which point to this
8130 * slot are set to readonly. We can not create any new large
8131 * spte on this slot until the end of the logging.
8133 * See the comments in fast_page_fault().
8135 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8136 if (kvm_x86_ops
->slot_enable_log_dirty
)
8137 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8139 kvm_mmu_slot_remove_write_access(kvm
, new);
8141 if (kvm_x86_ops
->slot_disable_log_dirty
)
8142 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8146 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8147 const struct kvm_userspace_memory_region
*mem
,
8148 const struct kvm_memory_slot
*old
,
8149 const struct kvm_memory_slot
*new,
8150 enum kvm_mr_change change
)
8152 int nr_mmu_pages
= 0;
8154 if (!kvm
->arch
.n_requested_mmu_pages
)
8155 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8158 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8161 * Dirty logging tracks sptes in 4k granularity, meaning that large
8162 * sptes have to be split. If live migration is successful, the guest
8163 * in the source machine will be destroyed and large sptes will be
8164 * created in the destination. However, if the guest continues to run
8165 * in the source machine (for example if live migration fails), small
8166 * sptes will remain around and cause bad performance.
8168 * Scan sptes if dirty logging has been stopped, dropping those
8169 * which can be collapsed into a single large-page spte. Later
8170 * page faults will create the large-page sptes.
8172 if ((change
!= KVM_MR_DELETE
) &&
8173 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8174 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8175 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8178 * Set up write protection and/or dirty logging for the new slot.
8180 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8181 * been zapped so no dirty logging staff is needed for old slot. For
8182 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8183 * new and it's also covered when dealing with the new slot.
8185 * FIXME: const-ify all uses of struct kvm_memory_slot.
8187 if (change
!= KVM_MR_DELETE
)
8188 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8191 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8193 kvm_mmu_invalidate_zap_all_pages(kvm
);
8196 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8197 struct kvm_memory_slot
*slot
)
8199 kvm_page_track_flush_slot(kvm
, slot
);
8202 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8204 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8207 if (kvm_apic_has_events(vcpu
))
8210 if (vcpu
->arch
.pv
.pv_unhalted
)
8213 if (atomic_read(&vcpu
->arch
.nmi_queued
))
8216 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
8219 if (kvm_arch_interrupt_allowed(vcpu
) &&
8220 kvm_cpu_has_interrupt(vcpu
))
8223 if (kvm_hv_has_stimer_pending(vcpu
))
8229 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8231 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
8232 kvm_x86_ops
->check_nested_events(vcpu
, false);
8234 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8237 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8239 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8242 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8244 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8247 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8249 if (is_64_bit_mode(vcpu
))
8250 return kvm_rip_read(vcpu
);
8251 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8252 kvm_rip_read(vcpu
));
8254 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8256 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8258 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8260 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8262 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8264 unsigned long rflags
;
8266 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8267 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8268 rflags
&= ~X86_EFLAGS_TF
;
8271 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8273 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8275 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8276 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8277 rflags
|= X86_EFLAGS_TF
;
8278 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8281 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8283 __kvm_set_rflags(vcpu
, rflags
);
8284 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8286 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8288 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8292 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8296 r
= kvm_mmu_reload(vcpu
);
8300 if (!vcpu
->arch
.mmu
.direct_map
&&
8301 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8304 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8307 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8309 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8312 static inline u32
kvm_async_pf_next_probe(u32 key
)
8314 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8317 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8319 u32 key
= kvm_async_pf_hash_fn(gfn
);
8321 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8322 key
= kvm_async_pf_next_probe(key
);
8324 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8327 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8330 u32 key
= kvm_async_pf_hash_fn(gfn
);
8332 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8333 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8334 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8335 key
= kvm_async_pf_next_probe(key
);
8340 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8342 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8345 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8349 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8351 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8353 j
= kvm_async_pf_next_probe(j
);
8354 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8356 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8358 * k lies cyclically in ]i,j]
8360 * |....j i.k.| or |.k..j i...|
8362 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8363 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8368 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8371 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8375 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8376 struct kvm_async_pf
*work
)
8378 struct x86_exception fault
;
8380 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8381 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8383 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8384 (vcpu
->arch
.apf
.send_user_only
&&
8385 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8386 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8387 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8388 fault
.vector
= PF_VECTOR
;
8389 fault
.error_code_valid
= true;
8390 fault
.error_code
= 0;
8391 fault
.nested_page_fault
= false;
8392 fault
.address
= work
->arch
.token
;
8393 kvm_inject_page_fault(vcpu
, &fault
);
8397 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8398 struct kvm_async_pf
*work
)
8400 struct x86_exception fault
;
8402 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8403 if (work
->wakeup_all
)
8404 work
->arch
.token
= ~0; /* broadcast wakeup */
8406 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8408 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8409 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8410 fault
.vector
= PF_VECTOR
;
8411 fault
.error_code_valid
= true;
8412 fault
.error_code
= 0;
8413 fault
.nested_page_fault
= false;
8414 fault
.address
= work
->arch
.token
;
8415 kvm_inject_page_fault(vcpu
, &fault
);
8417 vcpu
->arch
.apf
.halted
= false;
8418 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8421 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8423 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8426 return !kvm_event_needs_reinjection(vcpu
) &&
8427 kvm_x86_ops
->interrupt_allowed(vcpu
);
8430 void kvm_arch_start_assignment(struct kvm
*kvm
)
8432 atomic_inc(&kvm
->arch
.assigned_device_count
);
8434 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8436 void kvm_arch_end_assignment(struct kvm
*kvm
)
8438 atomic_dec(&kvm
->arch
.assigned_device_count
);
8440 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8442 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8444 return atomic_read(&kvm
->arch
.assigned_device_count
);
8446 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8448 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8450 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8452 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8454 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8456 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8458 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8460 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8462 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8464 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8466 bool kvm_arch_has_irq_bypass(void)
8468 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8471 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8472 struct irq_bypass_producer
*prod
)
8474 struct kvm_kernel_irqfd
*irqfd
=
8475 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8477 irqfd
->producer
= prod
;
8479 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8480 prod
->irq
, irqfd
->gsi
, 1);
8483 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8484 struct irq_bypass_producer
*prod
)
8487 struct kvm_kernel_irqfd
*irqfd
=
8488 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8490 WARN_ON(irqfd
->producer
!= prod
);
8491 irqfd
->producer
= NULL
;
8494 * When producer of consumer is unregistered, we change back to
8495 * remapped mode, so we can re-use the current implementation
8496 * when the irq is masked/disabled or the consumer side (KVM
8497 * int this case doesn't want to receive the interrupts.
8499 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8501 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8502 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8505 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8506 uint32_t guest_irq
, bool set
)
8508 if (!kvm_x86_ops
->update_pi_irte
)
8511 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8514 bool kvm_vector_hashing_enabled(void)
8516 return vector_hashing
;
8518 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8520 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8521 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8522 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8523 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8524 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8525 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8526 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8527 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8528 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8529 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8530 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8531 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8532 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8533 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8534 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8535 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8536 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8537 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8538 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);