2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/module.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <trace/events/kvm.h>
58 #define CREATE_TRACE_POINTS
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define MAX_IO_MSRS 256
72 #define KVM_MAX_MCE_BANKS 32
73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
75 #define emul_to_vcpu(ctxt) \
76 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
84 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
86 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
93 static void process_nmi(struct kvm_vcpu
*vcpu
);
94 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
96 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
99 static bool __read_mostly ignore_msrs
= 0;
100 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
102 unsigned int min_timer_period_us
= 500;
103 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
105 static bool __read_mostly kvmclock_periodic_sync
= true;
106 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
108 bool __read_mostly kvm_has_tsc_control
;
109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
110 u32 __read_mostly kvm_max_guest_tsc_khz
;
111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
113 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
114 static u32 __read_mostly tsc_tolerance_ppm
= 250;
115 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
117 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
118 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
119 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
121 static bool __read_mostly backwards_tsc_observed
= false;
123 #define KVM_NR_SHARED_MSRS 16
125 struct kvm_shared_msrs_global
{
127 u32 msrs
[KVM_NR_SHARED_MSRS
];
130 struct kvm_shared_msrs
{
131 struct user_return_notifier urn
;
133 struct kvm_shared_msr_values
{
136 } values
[KVM_NR_SHARED_MSRS
];
139 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
140 static struct kvm_shared_msrs __percpu
*shared_msrs
;
142 struct kvm_stats_debugfs_item debugfs_entries
[] = {
143 { "pf_fixed", VCPU_STAT(pf_fixed
) },
144 { "pf_guest", VCPU_STAT(pf_guest
) },
145 { "tlb_flush", VCPU_STAT(tlb_flush
) },
146 { "invlpg", VCPU_STAT(invlpg
) },
147 { "exits", VCPU_STAT(exits
) },
148 { "io_exits", VCPU_STAT(io_exits
) },
149 { "mmio_exits", VCPU_STAT(mmio_exits
) },
150 { "signal_exits", VCPU_STAT(signal_exits
) },
151 { "irq_window", VCPU_STAT(irq_window_exits
) },
152 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
153 { "halt_exits", VCPU_STAT(halt_exits
) },
154 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
155 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
156 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
157 { "hypercalls", VCPU_STAT(hypercalls
) },
158 { "request_irq", VCPU_STAT(request_irq_exits
) },
159 { "irq_exits", VCPU_STAT(irq_exits
) },
160 { "host_state_reload", VCPU_STAT(host_state_reload
) },
161 { "efer_reload", VCPU_STAT(efer_reload
) },
162 { "fpu_reload", VCPU_STAT(fpu_reload
) },
163 { "insn_emulation", VCPU_STAT(insn_emulation
) },
164 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
165 { "irq_injections", VCPU_STAT(irq_injections
) },
166 { "nmi_injections", VCPU_STAT(nmi_injections
) },
167 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
168 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
169 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
170 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
171 { "mmu_flooded", VM_STAT(mmu_flooded
) },
172 { "mmu_recycled", VM_STAT(mmu_recycled
) },
173 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
174 { "mmu_unsync", VM_STAT(mmu_unsync
) },
175 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
176 { "largepages", VM_STAT(lpages
) },
180 u64 __read_mostly host_xcr0
;
182 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
184 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
187 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
188 vcpu
->arch
.apf
.gfns
[i
] = ~0;
191 static void kvm_on_user_return(struct user_return_notifier
*urn
)
194 struct kvm_shared_msrs
*locals
195 = container_of(urn
, struct kvm_shared_msrs
, urn
);
196 struct kvm_shared_msr_values
*values
;
198 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
199 values
= &locals
->values
[slot
];
200 if (values
->host
!= values
->curr
) {
201 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
202 values
->curr
= values
->host
;
205 locals
->registered
= false;
206 user_return_notifier_unregister(urn
);
209 static void shared_msr_update(unsigned slot
, u32 msr
)
212 unsigned int cpu
= smp_processor_id();
213 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
215 /* only read, and nobody should modify it at this time,
216 * so don't need lock */
217 if (slot
>= shared_msrs_global
.nr
) {
218 printk(KERN_ERR
"kvm: invalid MSR slot!");
221 rdmsrl_safe(msr
, &value
);
222 smsr
->values
[slot
].host
= value
;
223 smsr
->values
[slot
].curr
= value
;
226 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
228 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
229 shared_msrs_global
.msrs
[slot
] = msr
;
230 if (slot
>= shared_msrs_global
.nr
)
231 shared_msrs_global
.nr
= slot
+ 1;
233 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
235 static void kvm_shared_msr_cpu_online(void)
239 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
240 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
243 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
245 unsigned int cpu
= smp_processor_id();
246 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
249 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
251 smsr
->values
[slot
].curr
= value
;
252 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
256 if (!smsr
->registered
) {
257 smsr
->urn
.on_user_return
= kvm_on_user_return
;
258 user_return_notifier_register(&smsr
->urn
);
259 smsr
->registered
= true;
263 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
265 static void drop_user_return_notifiers(void)
267 unsigned int cpu
= smp_processor_id();
268 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
270 if (smsr
->registered
)
271 kvm_on_user_return(&smsr
->urn
);
274 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
276 return vcpu
->arch
.apic_base
;
278 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
280 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
282 u64 old_state
= vcpu
->arch
.apic_base
&
283 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
284 u64 new_state
= msr_info
->data
&
285 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
286 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
287 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
289 if (!msr_info
->host_initiated
&&
290 ((msr_info
->data
& reserved_bits
) != 0 ||
291 new_state
== X2APIC_ENABLE
||
292 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
293 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
294 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
298 kvm_lapic_set_base(vcpu
, msr_info
->data
);
301 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
303 asmlinkage __visible
void kvm_spurious_fault(void)
305 /* Fault while not rebooting. We want the trace. */
308 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
310 #define EXCPT_BENIGN 0
311 #define EXCPT_CONTRIBUTORY 1
314 static int exception_class(int vector
)
324 return EXCPT_CONTRIBUTORY
;
331 #define EXCPT_FAULT 0
333 #define EXCPT_ABORT 2
334 #define EXCPT_INTERRUPT 3
336 static int exception_type(int vector
)
340 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
341 return EXCPT_INTERRUPT
;
345 /* #DB is trap, as instruction watchpoints are handled elsewhere */
346 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
349 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
352 /* Reserved exceptions will result in fault */
356 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
357 unsigned nr
, bool has_error
, u32 error_code
,
363 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
365 if (!vcpu
->arch
.exception
.pending
) {
367 if (has_error
&& !is_protmode(vcpu
))
369 vcpu
->arch
.exception
.pending
= true;
370 vcpu
->arch
.exception
.has_error_code
= has_error
;
371 vcpu
->arch
.exception
.nr
= nr
;
372 vcpu
->arch
.exception
.error_code
= error_code
;
373 vcpu
->arch
.exception
.reinject
= reinject
;
377 /* to check exception */
378 prev_nr
= vcpu
->arch
.exception
.nr
;
379 if (prev_nr
== DF_VECTOR
) {
380 /* triple fault -> shutdown */
381 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
384 class1
= exception_class(prev_nr
);
385 class2
= exception_class(nr
);
386 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
387 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
388 /* generate double fault per SDM Table 5-5 */
389 vcpu
->arch
.exception
.pending
= true;
390 vcpu
->arch
.exception
.has_error_code
= true;
391 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
392 vcpu
->arch
.exception
.error_code
= 0;
394 /* replace previous exception with a new one in a hope
395 that instruction re-execution will regenerate lost
400 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
402 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
404 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
406 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
408 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
410 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
412 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
415 kvm_inject_gp(vcpu
, 0);
417 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
419 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
421 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
423 ++vcpu
->stat
.pf_guest
;
424 vcpu
->arch
.cr2
= fault
->address
;
425 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
427 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
429 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
431 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
432 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
434 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
436 return fault
->nested_page_fault
;
439 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
441 atomic_inc(&vcpu
->arch
.nmi_queued
);
442 kvm_make_request(KVM_REQ_NMI
, vcpu
);
444 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
446 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
448 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
450 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
452 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
454 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
456 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
459 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
460 * a #GP and return false.
462 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
464 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
466 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
469 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
471 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
473 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
476 kvm_queue_exception(vcpu
, UD_VECTOR
);
479 EXPORT_SYMBOL_GPL(kvm_require_dr
);
482 * This function will be used to read from the physical memory of the currently
483 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
484 * can read from guest physical or from the guest's guest physical memory.
486 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
487 gfn_t ngfn
, void *data
, int offset
, int len
,
490 struct x86_exception exception
;
494 ngpa
= gfn_to_gpa(ngfn
);
495 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
496 if (real_gfn
== UNMAPPED_GVA
)
499 real_gfn
= gpa_to_gfn(real_gfn
);
501 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
503 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
505 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
506 void *data
, int offset
, int len
, u32 access
)
508 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
509 data
, offset
, len
, access
);
513 * Load the pae pdptrs. Return true is they are all valid.
515 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
517 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
518 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
521 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
523 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
524 offset
* sizeof(u64
), sizeof(pdpte
),
525 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
530 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
531 if (is_present_gpte(pdpte
[i
]) &&
533 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
540 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
541 __set_bit(VCPU_EXREG_PDPTR
,
542 (unsigned long *)&vcpu
->arch
.regs_avail
);
543 __set_bit(VCPU_EXREG_PDPTR
,
544 (unsigned long *)&vcpu
->arch
.regs_dirty
);
549 EXPORT_SYMBOL_GPL(load_pdptrs
);
551 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
553 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
559 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
562 if (!test_bit(VCPU_EXREG_PDPTR
,
563 (unsigned long *)&vcpu
->arch
.regs_avail
))
566 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
567 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
568 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
569 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
572 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
578 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
580 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
581 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
586 if (cr0
& 0xffffffff00000000UL
)
590 cr0
&= ~CR0_RESERVED_BITS
;
592 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
595 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
598 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
600 if ((vcpu
->arch
.efer
& EFER_LME
)) {
605 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
610 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
615 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
618 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
620 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
621 kvm_clear_async_pf_completion_queue(vcpu
);
622 kvm_async_pf_hash_reset(vcpu
);
625 if ((cr0
^ old_cr0
) & update_bits
)
626 kvm_mmu_reset_context(vcpu
);
628 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
629 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
630 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
631 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
635 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
637 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
639 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
641 EXPORT_SYMBOL_GPL(kvm_lmsw
);
643 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
645 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
646 !vcpu
->guest_xcr0_loaded
) {
647 /* kvm_set_xcr() also depends on this */
648 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
649 vcpu
->guest_xcr0_loaded
= 1;
653 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
655 if (vcpu
->guest_xcr0_loaded
) {
656 if (vcpu
->arch
.xcr0
!= host_xcr0
)
657 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
658 vcpu
->guest_xcr0_loaded
= 0;
662 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
665 u64 old_xcr0
= vcpu
->arch
.xcr0
;
668 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
669 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
671 if (!(xcr0
& XSTATE_FP
))
673 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
677 * Do not allow the guest to set bits that we do not support
678 * saving. However, xcr0 bit 0 is always set, even if the
679 * emulated CPU does not support XSAVE (see fx_init).
681 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
682 if (xcr0
& ~valid_bits
)
685 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
688 if (xcr0
& XSTATE_AVX512
) {
689 if (!(xcr0
& XSTATE_YMM
))
691 if ((xcr0
& XSTATE_AVX512
) != XSTATE_AVX512
)
694 kvm_put_guest_xcr0(vcpu
);
695 vcpu
->arch
.xcr0
= xcr0
;
697 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
698 kvm_update_cpuid(vcpu
);
702 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
704 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
705 __kvm_set_xcr(vcpu
, index
, xcr
)) {
706 kvm_inject_gp(vcpu
, 0);
711 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
713 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
715 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
716 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
717 X86_CR4_SMEP
| X86_CR4_SMAP
;
719 if (cr4
& CR4_RESERVED_BITS
)
722 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
725 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
728 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
731 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
734 if (is_long_mode(vcpu
)) {
735 if (!(cr4
& X86_CR4_PAE
))
737 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
738 && ((cr4
^ old_cr4
) & pdptr_bits
)
739 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
743 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
744 if (!guest_cpuid_has_pcid(vcpu
))
747 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
748 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
752 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
755 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
756 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
757 kvm_mmu_reset_context(vcpu
);
759 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
760 kvm_update_cpuid(vcpu
);
764 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
766 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
769 cr3
&= ~CR3_PCID_INVD
;
772 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
773 kvm_mmu_sync_roots(vcpu
);
774 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
778 if (is_long_mode(vcpu
)) {
779 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
781 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
782 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
785 vcpu
->arch
.cr3
= cr3
;
786 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
787 kvm_mmu_new_cr3(vcpu
);
790 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
792 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
794 if (cr8
& CR8_RESERVED_BITS
)
796 if (lapic_in_kernel(vcpu
))
797 kvm_lapic_set_tpr(vcpu
, cr8
);
799 vcpu
->arch
.cr8
= cr8
;
802 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
804 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
806 if (lapic_in_kernel(vcpu
))
807 return kvm_lapic_get_cr8(vcpu
);
809 return vcpu
->arch
.cr8
;
811 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
813 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
817 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
818 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
819 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
820 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
824 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
826 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
827 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
830 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
834 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
835 dr7
= vcpu
->arch
.guest_debug_dr7
;
837 dr7
= vcpu
->arch
.dr7
;
838 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
839 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
840 if (dr7
& DR7_BP_EN_MASK
)
841 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
844 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
846 u64 fixed
= DR6_FIXED_1
;
848 if (!guest_cpuid_has_rtm(vcpu
))
853 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
857 vcpu
->arch
.db
[dr
] = val
;
858 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
859 vcpu
->arch
.eff_db
[dr
] = val
;
864 if (val
& 0xffffffff00000000ULL
)
866 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
867 kvm_update_dr6(vcpu
);
872 if (val
& 0xffffffff00000000ULL
)
874 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
875 kvm_update_dr7(vcpu
);
882 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
884 if (__kvm_set_dr(vcpu
, dr
, val
)) {
885 kvm_inject_gp(vcpu
, 0);
890 EXPORT_SYMBOL_GPL(kvm_set_dr
);
892 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
896 *val
= vcpu
->arch
.db
[dr
];
901 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
902 *val
= vcpu
->arch
.dr6
;
904 *val
= kvm_x86_ops
->get_dr6(vcpu
);
909 *val
= vcpu
->arch
.dr7
;
914 EXPORT_SYMBOL_GPL(kvm_get_dr
);
916 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
918 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
922 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
925 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
926 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
929 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
932 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
933 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
935 * This list is modified at module load time to reflect the
936 * capabilities of the host cpu. This capabilities test skips MSRs that are
937 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
938 * may depend on host virtualization features rather than host cpu features.
941 static u32 msrs_to_save
[] = {
942 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
945 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
947 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
948 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
951 static unsigned num_msrs_to_save
;
953 static u32 emulated_msrs
[] = {
954 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
955 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
956 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
957 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
958 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
959 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
962 HV_X64_MSR_VP_RUNTIME
,
963 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
967 MSR_IA32_TSCDEADLINE
,
968 MSR_IA32_MISC_ENABLE
,
974 static unsigned num_emulated_msrs
;
976 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
978 if (efer
& efer_reserved_bits
)
981 if (efer
& EFER_FFXSR
) {
982 struct kvm_cpuid_entry2
*feat
;
984 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
985 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
989 if (efer
& EFER_SVME
) {
990 struct kvm_cpuid_entry2
*feat
;
992 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
993 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
999 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1001 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1003 u64 old_efer
= vcpu
->arch
.efer
;
1005 if (!kvm_valid_efer(vcpu
, efer
))
1009 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1013 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1015 kvm_x86_ops
->set_efer(vcpu
, efer
);
1017 /* Update reserved bits */
1018 if ((efer
^ old_efer
) & EFER_NX
)
1019 kvm_mmu_reset_context(vcpu
);
1024 void kvm_enable_efer_bits(u64 mask
)
1026 efer_reserved_bits
&= ~mask
;
1028 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1031 * Writes msr value into into the appropriate "register".
1032 * Returns 0 on success, non-0 otherwise.
1033 * Assumes vcpu_load() was already called.
1035 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1037 switch (msr
->index
) {
1040 case MSR_KERNEL_GS_BASE
:
1043 if (is_noncanonical_address(msr
->data
))
1046 case MSR_IA32_SYSENTER_EIP
:
1047 case MSR_IA32_SYSENTER_ESP
:
1049 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1050 * non-canonical address is written on Intel but not on
1051 * AMD (which ignores the top 32-bits, because it does
1052 * not implement 64-bit SYSENTER).
1054 * 64-bit code should hence be able to write a non-canonical
1055 * value on AMD. Making the address canonical ensures that
1056 * vmentry does not fail on Intel after writing a non-canonical
1057 * value, and that something deterministic happens if the guest
1058 * invokes 64-bit SYSENTER.
1060 msr
->data
= get_canonical(msr
->data
);
1062 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1064 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1067 * Adapt set_msr() to msr_io()'s calling convention
1069 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1071 struct msr_data msr
;
1075 msr
.host_initiated
= true;
1076 r
= kvm_get_msr(vcpu
, &msr
);
1084 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1086 struct msr_data msr
;
1090 msr
.host_initiated
= true;
1091 return kvm_set_msr(vcpu
, &msr
);
1094 #ifdef CONFIG_X86_64
1095 struct pvclock_gtod_data
{
1098 struct { /* extract of a clocksource struct */
1110 static struct pvclock_gtod_data pvclock_gtod_data
;
1112 static void update_pvclock_gtod(struct timekeeper
*tk
)
1114 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1117 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1119 write_seqcount_begin(&vdata
->seq
);
1121 /* copy pvclock gtod data */
1122 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1123 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1124 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1125 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1126 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1128 vdata
->boot_ns
= boot_ns
;
1129 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1131 write_seqcount_end(&vdata
->seq
);
1135 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1138 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1139 * vcpu_enter_guest. This function is only called from
1140 * the physical CPU that is running vcpu.
1142 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1145 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1149 struct pvclock_wall_clock wc
;
1150 struct timespec boot
;
1155 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1160 ++version
; /* first time write, random junk */
1164 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1167 * The guest calculates current wall clock time by adding
1168 * system time (updated by kvm_guest_time_update below) to the
1169 * wall clock specified here. guest system time equals host
1170 * system time for us, thus we must fill in host boot time here.
1174 if (kvm
->arch
.kvmclock_offset
) {
1175 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1176 boot
= timespec_sub(boot
, ts
);
1178 wc
.sec
= boot
.tv_sec
;
1179 wc
.nsec
= boot
.tv_nsec
;
1180 wc
.version
= version
;
1182 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1185 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1188 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1190 uint32_t quotient
, remainder
;
1192 /* Don't try to replace with do_div(), this one calculates
1193 * "(dividend << 32) / divisor" */
1195 : "=a" (quotient
), "=d" (remainder
)
1196 : "0" (0), "1" (dividend
), "r" (divisor
) );
1200 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1201 s8
*pshift
, u32
*pmultiplier
)
1208 tps64
= base_khz
* 1000LL;
1209 scaled64
= scaled_khz
* 1000LL;
1210 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1215 tps32
= (uint32_t)tps64
;
1216 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1217 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1225 *pmultiplier
= div_frac(scaled64
, tps32
);
1227 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1228 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1231 #ifdef CONFIG_X86_64
1232 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1235 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1236 static unsigned long max_tsc_khz
;
1238 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1240 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1241 vcpu
->arch
.virtual_tsc_shift
);
1244 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1246 u64 v
= (u64
)khz
* (1000000 + ppm
);
1251 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1253 u32 thresh_lo
, thresh_hi
;
1254 int use_scaling
= 0;
1256 /* tsc_khz can be zero if TSC calibration fails */
1257 if (this_tsc_khz
== 0)
1260 /* Compute a scale to convert nanoseconds in TSC cycles */
1261 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1262 &vcpu
->arch
.virtual_tsc_shift
,
1263 &vcpu
->arch
.virtual_tsc_mult
);
1264 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1267 * Compute the variation in TSC rate which is acceptable
1268 * within the range of tolerance and decide if the
1269 * rate being applied is within that bounds of the hardware
1270 * rate. If so, no scaling or compensation need be done.
1272 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1273 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1274 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1275 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1278 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1281 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1283 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1284 vcpu
->arch
.virtual_tsc_mult
,
1285 vcpu
->arch
.virtual_tsc_shift
);
1286 tsc
+= vcpu
->arch
.this_tsc_write
;
1290 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1292 #ifdef CONFIG_X86_64
1294 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1295 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1297 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1298 atomic_read(&vcpu
->kvm
->online_vcpus
));
1301 * Once the masterclock is enabled, always perform request in
1302 * order to update it.
1304 * In order to enable masterclock, the host clocksource must be TSC
1305 * and the vcpus need to have matched TSCs. When that happens,
1306 * perform request to enable masterclock.
1308 if (ka
->use_master_clock
||
1309 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1310 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1312 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1313 atomic_read(&vcpu
->kvm
->online_vcpus
),
1314 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1318 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1320 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1321 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1324 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1326 struct kvm
*kvm
= vcpu
->kvm
;
1327 u64 offset
, ns
, elapsed
;
1328 unsigned long flags
;
1331 bool already_matched
;
1332 u64 data
= msr
->data
;
1334 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1335 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1336 ns
= get_kernel_ns();
1337 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1339 if (vcpu
->arch
.virtual_tsc_khz
) {
1342 /* n.b - signed multiplication and division required */
1343 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1344 #ifdef CONFIG_X86_64
1345 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1347 /* do_div() only does unsigned */
1348 asm("1: idivl %[divisor]\n"
1349 "2: xor %%edx, %%edx\n"
1350 " movl $0, %[faulted]\n"
1352 ".section .fixup,\"ax\"\n"
1353 "4: movl $1, %[faulted]\n"
1357 _ASM_EXTABLE(1b
, 4b
)
1359 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1360 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1363 do_div(elapsed
, 1000);
1368 /* idivl overflow => difference is larger than USEC_PER_SEC */
1370 usdiff
= USEC_PER_SEC
;
1372 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1375 * Special case: TSC write with a small delta (1 second) of virtual
1376 * cycle time against real time is interpreted as an attempt to
1377 * synchronize the CPU.
1379 * For a reliable TSC, we can match TSC offsets, and for an unstable
1380 * TSC, we add elapsed time in this computation. We could let the
1381 * compensation code attempt to catch up if we fall behind, but
1382 * it's better to try to match offsets from the beginning.
1384 if (usdiff
< USEC_PER_SEC
&&
1385 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1386 if (!check_tsc_unstable()) {
1387 offset
= kvm
->arch
.cur_tsc_offset
;
1388 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1390 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1392 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1393 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1396 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1399 * We split periods of matched TSC writes into generations.
1400 * For each generation, we track the original measured
1401 * nanosecond time, offset, and write, so if TSCs are in
1402 * sync, we can match exact offset, and if not, we can match
1403 * exact software computation in compute_guest_tsc()
1405 * These values are tracked in kvm->arch.cur_xxx variables.
1407 kvm
->arch
.cur_tsc_generation
++;
1408 kvm
->arch
.cur_tsc_nsec
= ns
;
1409 kvm
->arch
.cur_tsc_write
= data
;
1410 kvm
->arch
.cur_tsc_offset
= offset
;
1412 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1413 kvm
->arch
.cur_tsc_generation
, data
);
1417 * We also track th most recent recorded KHZ, write and time to
1418 * allow the matching interval to be extended at each write.
1420 kvm
->arch
.last_tsc_nsec
= ns
;
1421 kvm
->arch
.last_tsc_write
= data
;
1422 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1424 vcpu
->arch
.last_guest_tsc
= data
;
1426 /* Keep track of which generation this VCPU has synchronized to */
1427 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1428 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1429 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1431 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1432 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1433 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1434 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1436 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1438 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1439 } else if (!already_matched
) {
1440 kvm
->arch
.nr_vcpus_matched_tsc
++;
1443 kvm_track_tsc_matching(vcpu
);
1444 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1447 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1449 #ifdef CONFIG_X86_64
1451 static cycle_t
read_tsc(void)
1453 cycle_t ret
= (cycle_t
)rdtsc_ordered();
1454 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1456 if (likely(ret
>= last
))
1460 * GCC likes to generate cmov here, but this branch is extremely
1461 * predictable (it's just a funciton of time and the likely is
1462 * very likely) and there's a data dependence, so force GCC
1463 * to generate a branch instead. I don't barrier() because
1464 * we don't actually need a barrier, and if this function
1465 * ever gets inlined it will generate worse code.
1471 static inline u64
vgettsc(cycle_t
*cycle_now
)
1474 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1476 *cycle_now
= read_tsc();
1478 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1479 return v
* gtod
->clock
.mult
;
1482 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1484 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1490 seq
= read_seqcount_begin(>od
->seq
);
1491 mode
= gtod
->clock
.vclock_mode
;
1492 ns
= gtod
->nsec_base
;
1493 ns
+= vgettsc(cycle_now
);
1494 ns
>>= gtod
->clock
.shift
;
1495 ns
+= gtod
->boot_ns
;
1496 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1502 /* returns true if host is using tsc clocksource */
1503 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1505 /* checked again under seqlock below */
1506 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1509 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1515 * Assuming a stable TSC across physical CPUS, and a stable TSC
1516 * across virtual CPUs, the following condition is possible.
1517 * Each numbered line represents an event visible to both
1518 * CPUs at the next numbered event.
1520 * "timespecX" represents host monotonic time. "tscX" represents
1523 * VCPU0 on CPU0 | VCPU1 on CPU1
1525 * 1. read timespec0,tsc0
1526 * 2. | timespec1 = timespec0 + N
1528 * 3. transition to guest | transition to guest
1529 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1530 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1531 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1533 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1536 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1538 * - 0 < N - M => M < N
1540 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1541 * always the case (the difference between two distinct xtime instances
1542 * might be smaller then the difference between corresponding TSC reads,
1543 * when updating guest vcpus pvclock areas).
1545 * To avoid that problem, do not allow visibility of distinct
1546 * system_timestamp/tsc_timestamp values simultaneously: use a master
1547 * copy of host monotonic time values. Update that master copy
1550 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1554 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1556 #ifdef CONFIG_X86_64
1557 struct kvm_arch
*ka
= &kvm
->arch
;
1559 bool host_tsc_clocksource
, vcpus_matched
;
1561 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1562 atomic_read(&kvm
->online_vcpus
));
1565 * If the host uses TSC clock, then passthrough TSC as stable
1568 host_tsc_clocksource
= kvm_get_time_and_clockread(
1569 &ka
->master_kernel_ns
,
1570 &ka
->master_cycle_now
);
1572 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1573 && !backwards_tsc_observed
1574 && !ka
->boot_vcpu_runs_old_kvmclock
;
1576 if (ka
->use_master_clock
)
1577 atomic_set(&kvm_guest_has_master_clock
, 1);
1579 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1580 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1585 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1587 #ifdef CONFIG_X86_64
1589 struct kvm_vcpu
*vcpu
;
1590 struct kvm_arch
*ka
= &kvm
->arch
;
1592 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1593 kvm_make_mclock_inprogress_request(kvm
);
1594 /* no guest entries from this point */
1595 pvclock_update_vm_gtod_copy(kvm
);
1597 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1598 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1600 /* guest entries allowed */
1601 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1602 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1604 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1608 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1610 unsigned long flags
, this_tsc_khz
;
1611 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1612 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1614 u64 tsc_timestamp
, host_tsc
;
1615 struct pvclock_vcpu_time_info guest_hv_clock
;
1617 bool use_master_clock
;
1623 * If the host uses TSC clock, then passthrough TSC as stable
1626 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1627 use_master_clock
= ka
->use_master_clock
;
1628 if (use_master_clock
) {
1629 host_tsc
= ka
->master_cycle_now
;
1630 kernel_ns
= ka
->master_kernel_ns
;
1632 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1634 /* Keep irq disabled to prevent changes to the clock */
1635 local_irq_save(flags
);
1636 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1637 if (unlikely(this_tsc_khz
== 0)) {
1638 local_irq_restore(flags
);
1639 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1642 if (!use_master_clock
) {
1644 kernel_ns
= get_kernel_ns();
1647 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1650 * We may have to catch up the TSC to match elapsed wall clock
1651 * time for two reasons, even if kvmclock is used.
1652 * 1) CPU could have been running below the maximum TSC rate
1653 * 2) Broken TSC compensation resets the base at each VCPU
1654 * entry to avoid unknown leaps of TSC even when running
1655 * again on the same CPU. This may cause apparent elapsed
1656 * time to disappear, and the guest to stand still or run
1659 if (vcpu
->tsc_catchup
) {
1660 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1661 if (tsc
> tsc_timestamp
) {
1662 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1663 tsc_timestamp
= tsc
;
1667 local_irq_restore(flags
);
1669 if (!vcpu
->pv_time_enabled
)
1672 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1673 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1674 &vcpu
->hv_clock
.tsc_shift
,
1675 &vcpu
->hv_clock
.tsc_to_system_mul
);
1676 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1679 /* With all the info we got, fill in the values */
1680 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1681 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1682 vcpu
->last_guest_tsc
= tsc_timestamp
;
1684 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1685 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1688 /* This VCPU is paused, but it's legal for a guest to read another
1689 * VCPU's kvmclock, so we really have to follow the specification where
1690 * it says that version is odd if data is being modified, and even after
1693 * Version field updates must be kept separate. This is because
1694 * kvm_write_guest_cached might use a "rep movs" instruction, and
1695 * writes within a string instruction are weakly ordered. So there
1696 * are three writes overall.
1698 * As a small optimization, only write the version field in the first
1699 * and third write. The vcpu->pv_time cache is still valid, because the
1700 * version field is the first in the struct.
1702 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1704 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1705 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1707 sizeof(vcpu
->hv_clock
.version
));
1711 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1712 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1714 if (vcpu
->pvclock_set_guest_stopped_request
) {
1715 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1716 vcpu
->pvclock_set_guest_stopped_request
= false;
1719 /* If the host uses TSC clocksource, then it is stable */
1720 if (use_master_clock
)
1721 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1723 vcpu
->hv_clock
.flags
= pvclock_flags
;
1725 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1727 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1729 sizeof(vcpu
->hv_clock
));
1733 vcpu
->hv_clock
.version
++;
1734 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1736 sizeof(vcpu
->hv_clock
.version
));
1741 * kvmclock updates which are isolated to a given vcpu, such as
1742 * vcpu->cpu migration, should not allow system_timestamp from
1743 * the rest of the vcpus to remain static. Otherwise ntp frequency
1744 * correction applies to one vcpu's system_timestamp but not
1747 * So in those cases, request a kvmclock update for all vcpus.
1748 * We need to rate-limit these requests though, as they can
1749 * considerably slow guests that have a large number of vcpus.
1750 * The time for a remote vcpu to update its kvmclock is bound
1751 * by the delay we use to rate-limit the updates.
1754 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1756 static void kvmclock_update_fn(struct work_struct
*work
)
1759 struct delayed_work
*dwork
= to_delayed_work(work
);
1760 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1761 kvmclock_update_work
);
1762 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1763 struct kvm_vcpu
*vcpu
;
1765 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1766 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1767 kvm_vcpu_kick(vcpu
);
1771 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1773 struct kvm
*kvm
= v
->kvm
;
1775 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1776 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1777 KVMCLOCK_UPDATE_DELAY
);
1780 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1782 static void kvmclock_sync_fn(struct work_struct
*work
)
1784 struct delayed_work
*dwork
= to_delayed_work(work
);
1785 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1786 kvmclock_sync_work
);
1787 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1789 if (!kvmclock_periodic_sync
)
1792 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1793 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1794 KVMCLOCK_SYNC_PERIOD
);
1797 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1799 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1800 unsigned bank_num
= mcg_cap
& 0xff;
1803 case MSR_IA32_MCG_STATUS
:
1804 vcpu
->arch
.mcg_status
= data
;
1806 case MSR_IA32_MCG_CTL
:
1807 if (!(mcg_cap
& MCG_CTL_P
))
1809 if (data
!= 0 && data
!= ~(u64
)0)
1811 vcpu
->arch
.mcg_ctl
= data
;
1814 if (msr
>= MSR_IA32_MC0_CTL
&&
1815 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1816 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1817 /* only 0 or all 1s can be written to IA32_MCi_CTL
1818 * some Linux kernels though clear bit 10 in bank 4 to
1819 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1820 * this to avoid an uncatched #GP in the guest
1822 if ((offset
& 0x3) == 0 &&
1823 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1825 vcpu
->arch
.mce_banks
[offset
] = data
;
1833 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1835 struct kvm
*kvm
= vcpu
->kvm
;
1836 int lm
= is_long_mode(vcpu
);
1837 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1838 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1839 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1840 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1841 u32 page_num
= data
& ~PAGE_MASK
;
1842 u64 page_addr
= data
& PAGE_MASK
;
1847 if (page_num
>= blob_size
)
1850 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1855 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
1864 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1866 gpa_t gpa
= data
& ~0x3f;
1868 /* Bits 2:5 are reserved, Should be zero */
1872 vcpu
->arch
.apf
.msr_val
= data
;
1874 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1875 kvm_clear_async_pf_completion_queue(vcpu
);
1876 kvm_async_pf_hash_reset(vcpu
);
1880 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1884 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1885 kvm_async_pf_wakeup_all(vcpu
);
1889 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1891 vcpu
->arch
.pv_time_enabled
= false;
1894 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1898 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1901 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1902 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1903 vcpu
->arch
.st
.accum_steal
= delta
;
1906 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1908 accumulate_steal_time(vcpu
);
1910 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1913 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1914 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1917 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1918 vcpu
->arch
.st
.steal
.version
+= 2;
1919 vcpu
->arch
.st
.accum_steal
= 0;
1921 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1922 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1925 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1928 u32 msr
= msr_info
->index
;
1929 u64 data
= msr_info
->data
;
1932 case MSR_AMD64_NB_CFG
:
1933 case MSR_IA32_UCODE_REV
:
1934 case MSR_IA32_UCODE_WRITE
:
1935 case MSR_VM_HSAVE_PA
:
1936 case MSR_AMD64_PATCH_LOADER
:
1937 case MSR_AMD64_BU_CFG2
:
1941 return set_efer(vcpu
, data
);
1943 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1944 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1945 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
1946 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
1948 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1953 case MSR_FAM10H_MMIO_CONF_BASE
:
1955 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1960 case MSR_IA32_DEBUGCTLMSR
:
1962 /* We support the non-activated case already */
1964 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1965 /* Values other than LBR and BTF are vendor-specific,
1966 thus reserved and should throw a #GP */
1969 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1972 case 0x200 ... 0x2ff:
1973 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
1974 case MSR_IA32_APICBASE
:
1975 return kvm_set_apic_base(vcpu
, msr_info
);
1976 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1977 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1978 case MSR_IA32_TSCDEADLINE
:
1979 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1981 case MSR_IA32_TSC_ADJUST
:
1982 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
1983 if (!msr_info
->host_initiated
) {
1984 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
1985 adjust_tsc_offset_guest(vcpu
, adj
);
1987 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
1990 case MSR_IA32_MISC_ENABLE
:
1991 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1993 case MSR_IA32_SMBASE
:
1994 if (!msr_info
->host_initiated
)
1996 vcpu
->arch
.smbase
= data
;
1998 case MSR_KVM_WALL_CLOCK_NEW
:
1999 case MSR_KVM_WALL_CLOCK
:
2000 vcpu
->kvm
->arch
.wall_clock
= data
;
2001 kvm_write_wall_clock(vcpu
->kvm
, data
);
2003 case MSR_KVM_SYSTEM_TIME_NEW
:
2004 case MSR_KVM_SYSTEM_TIME
: {
2006 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2008 kvmclock_reset(vcpu
);
2010 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2011 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2013 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2014 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2017 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2020 vcpu
->arch
.time
= data
;
2021 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2023 /* we verify if the enable bit is set... */
2027 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2029 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2030 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2031 sizeof(struct pvclock_vcpu_time_info
)))
2032 vcpu
->arch
.pv_time_enabled
= false;
2034 vcpu
->arch
.pv_time_enabled
= true;
2038 case MSR_KVM_ASYNC_PF_EN
:
2039 if (kvm_pv_enable_async_pf(vcpu
, data
))
2042 case MSR_KVM_STEAL_TIME
:
2044 if (unlikely(!sched_info_on()))
2047 if (data
& KVM_STEAL_RESERVED_MASK
)
2050 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2051 data
& KVM_STEAL_VALID_BITS
,
2052 sizeof(struct kvm_steal_time
)))
2055 vcpu
->arch
.st
.msr_val
= data
;
2057 if (!(data
& KVM_MSR_ENABLED
))
2060 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2063 case MSR_KVM_PV_EOI_EN
:
2064 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2068 case MSR_IA32_MCG_CTL
:
2069 case MSR_IA32_MCG_STATUS
:
2070 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2071 return set_msr_mce(vcpu
, msr
, data
);
2073 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2074 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2075 pr
= true; /* fall through */
2076 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2077 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2078 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2079 return kvm_pmu_set_msr(vcpu
, msr_info
);
2081 if (pr
|| data
!= 0)
2082 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2083 "0x%x data 0x%llx\n", msr
, data
);
2085 case MSR_K7_CLK_CTL
:
2087 * Ignore all writes to this no longer documented MSR.
2088 * Writes are only relevant for old K7 processors,
2089 * all pre-dating SVM, but a recommended workaround from
2090 * AMD for these chips. It is possible to specify the
2091 * affected processor models on the command line, hence
2092 * the need to ignore the workaround.
2095 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2096 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2097 case HV_X64_MSR_CRASH_CTL
:
2098 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2099 msr_info
->host_initiated
);
2100 case MSR_IA32_BBL_CR_CTL3
:
2101 /* Drop writes to this legacy MSR -- see rdmsr
2102 * counterpart for further detail.
2104 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2106 case MSR_AMD64_OSVW_ID_LENGTH
:
2107 if (!guest_cpuid_has_osvw(vcpu
))
2109 vcpu
->arch
.osvw
.length
= data
;
2111 case MSR_AMD64_OSVW_STATUS
:
2112 if (!guest_cpuid_has_osvw(vcpu
))
2114 vcpu
->arch
.osvw
.status
= data
;
2117 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2118 return xen_hvm_config(vcpu
, data
);
2119 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2120 return kvm_pmu_set_msr(vcpu
, msr_info
);
2122 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2126 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2133 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2137 * Reads an msr value (of 'msr_index') into 'pdata'.
2138 * Returns 0 on success, non-0 otherwise.
2139 * Assumes vcpu_load() was already called.
2141 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2143 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2145 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2147 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2150 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2151 unsigned bank_num
= mcg_cap
& 0xff;
2154 case MSR_IA32_P5_MC_ADDR
:
2155 case MSR_IA32_P5_MC_TYPE
:
2158 case MSR_IA32_MCG_CAP
:
2159 data
= vcpu
->arch
.mcg_cap
;
2161 case MSR_IA32_MCG_CTL
:
2162 if (!(mcg_cap
& MCG_CTL_P
))
2164 data
= vcpu
->arch
.mcg_ctl
;
2166 case MSR_IA32_MCG_STATUS
:
2167 data
= vcpu
->arch
.mcg_status
;
2170 if (msr
>= MSR_IA32_MC0_CTL
&&
2171 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2172 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2173 data
= vcpu
->arch
.mce_banks
[offset
];
2182 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2184 switch (msr_info
->index
) {
2185 case MSR_IA32_PLATFORM_ID
:
2186 case MSR_IA32_EBL_CR_POWERON
:
2187 case MSR_IA32_DEBUGCTLMSR
:
2188 case MSR_IA32_LASTBRANCHFROMIP
:
2189 case MSR_IA32_LASTBRANCHTOIP
:
2190 case MSR_IA32_LASTINTFROMIP
:
2191 case MSR_IA32_LASTINTTOIP
:
2193 case MSR_K8_TSEG_ADDR
:
2194 case MSR_K8_TSEG_MASK
:
2196 case MSR_VM_HSAVE_PA
:
2197 case MSR_K8_INT_PENDING_MSG
:
2198 case MSR_AMD64_NB_CFG
:
2199 case MSR_FAM10H_MMIO_CONF_BASE
:
2200 case MSR_AMD64_BU_CFG2
:
2203 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2204 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2205 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2206 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2207 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2208 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2211 case MSR_IA32_UCODE_REV
:
2212 msr_info
->data
= 0x100000000ULL
;
2215 case 0x200 ... 0x2ff:
2216 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2217 case 0xcd: /* fsb frequency */
2221 * MSR_EBC_FREQUENCY_ID
2222 * Conservative value valid for even the basic CPU models.
2223 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2224 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2225 * and 266MHz for model 3, or 4. Set Core Clock
2226 * Frequency to System Bus Frequency Ratio to 1 (bits
2227 * 31:24) even though these are only valid for CPU
2228 * models > 2, however guests may end up dividing or
2229 * multiplying by zero otherwise.
2231 case MSR_EBC_FREQUENCY_ID
:
2232 msr_info
->data
= 1 << 24;
2234 case MSR_IA32_APICBASE
:
2235 msr_info
->data
= kvm_get_apic_base(vcpu
);
2237 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2238 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2240 case MSR_IA32_TSCDEADLINE
:
2241 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2243 case MSR_IA32_TSC_ADJUST
:
2244 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2246 case MSR_IA32_MISC_ENABLE
:
2247 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2249 case MSR_IA32_SMBASE
:
2250 if (!msr_info
->host_initiated
)
2252 msr_info
->data
= vcpu
->arch
.smbase
;
2254 case MSR_IA32_PERF_STATUS
:
2255 /* TSC increment by tick */
2256 msr_info
->data
= 1000ULL;
2257 /* CPU multiplier */
2258 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2261 msr_info
->data
= vcpu
->arch
.efer
;
2263 case MSR_KVM_WALL_CLOCK
:
2264 case MSR_KVM_WALL_CLOCK_NEW
:
2265 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2267 case MSR_KVM_SYSTEM_TIME
:
2268 case MSR_KVM_SYSTEM_TIME_NEW
:
2269 msr_info
->data
= vcpu
->arch
.time
;
2271 case MSR_KVM_ASYNC_PF_EN
:
2272 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2274 case MSR_KVM_STEAL_TIME
:
2275 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2277 case MSR_KVM_PV_EOI_EN
:
2278 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2280 case MSR_IA32_P5_MC_ADDR
:
2281 case MSR_IA32_P5_MC_TYPE
:
2282 case MSR_IA32_MCG_CAP
:
2283 case MSR_IA32_MCG_CTL
:
2284 case MSR_IA32_MCG_STATUS
:
2285 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2286 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2287 case MSR_K7_CLK_CTL
:
2289 * Provide expected ramp-up count for K7. All other
2290 * are set to zero, indicating minimum divisors for
2293 * This prevents guest kernels on AMD host with CPU
2294 * type 6, model 8 and higher from exploding due to
2295 * the rdmsr failing.
2297 msr_info
->data
= 0x20000000;
2299 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2300 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2301 case HV_X64_MSR_CRASH_CTL
:
2302 return kvm_hv_get_msr_common(vcpu
,
2303 msr_info
->index
, &msr_info
->data
);
2305 case MSR_IA32_BBL_CR_CTL3
:
2306 /* This legacy MSR exists but isn't fully documented in current
2307 * silicon. It is however accessed by winxp in very narrow
2308 * scenarios where it sets bit #19, itself documented as
2309 * a "reserved" bit. Best effort attempt to source coherent
2310 * read data here should the balance of the register be
2311 * interpreted by the guest:
2313 * L2 cache control register 3: 64GB range, 256KB size,
2314 * enabled, latency 0x1, configured
2316 msr_info
->data
= 0xbe702111;
2318 case MSR_AMD64_OSVW_ID_LENGTH
:
2319 if (!guest_cpuid_has_osvw(vcpu
))
2321 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2323 case MSR_AMD64_OSVW_STATUS
:
2324 if (!guest_cpuid_has_osvw(vcpu
))
2326 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2329 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2330 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2332 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr_info
->index
);
2335 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2342 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2345 * Read or write a bunch of msrs. All parameters are kernel addresses.
2347 * @return number of msrs set successfully.
2349 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2350 struct kvm_msr_entry
*entries
,
2351 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2352 unsigned index
, u64
*data
))
2356 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2357 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2358 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2360 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2366 * Read or write a bunch of msrs. Parameters are user addresses.
2368 * @return number of msrs set successfully.
2370 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2371 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2372 unsigned index
, u64
*data
),
2375 struct kvm_msrs msrs
;
2376 struct kvm_msr_entry
*entries
;
2381 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2385 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2388 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2389 entries
= memdup_user(user_msrs
->entries
, size
);
2390 if (IS_ERR(entries
)) {
2391 r
= PTR_ERR(entries
);
2395 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2400 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2411 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2416 case KVM_CAP_IRQCHIP
:
2418 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2419 case KVM_CAP_SET_TSS_ADDR
:
2420 case KVM_CAP_EXT_CPUID
:
2421 case KVM_CAP_EXT_EMUL_CPUID
:
2422 case KVM_CAP_CLOCKSOURCE
:
2424 case KVM_CAP_NOP_IO_DELAY
:
2425 case KVM_CAP_MP_STATE
:
2426 case KVM_CAP_SYNC_MMU
:
2427 case KVM_CAP_USER_NMI
:
2428 case KVM_CAP_REINJECT_CONTROL
:
2429 case KVM_CAP_IRQ_INJECT_STATUS
:
2430 case KVM_CAP_IOEVENTFD
:
2431 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2433 case KVM_CAP_PIT_STATE2
:
2434 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2435 case KVM_CAP_XEN_HVM
:
2436 case KVM_CAP_ADJUST_CLOCK
:
2437 case KVM_CAP_VCPU_EVENTS
:
2438 case KVM_CAP_HYPERV
:
2439 case KVM_CAP_HYPERV_VAPIC
:
2440 case KVM_CAP_HYPERV_SPIN
:
2441 case KVM_CAP_PCI_SEGMENT
:
2442 case KVM_CAP_DEBUGREGS
:
2443 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2445 case KVM_CAP_ASYNC_PF
:
2446 case KVM_CAP_GET_TSC_KHZ
:
2447 case KVM_CAP_KVMCLOCK_CTRL
:
2448 case KVM_CAP_READONLY_MEM
:
2449 case KVM_CAP_HYPERV_TIME
:
2450 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2451 case KVM_CAP_TSC_DEADLINE_TIMER
:
2452 case KVM_CAP_ENABLE_CAP_VM
:
2453 case KVM_CAP_DISABLE_QUIRKS
:
2454 case KVM_CAP_SET_BOOT_CPU_ID
:
2455 case KVM_CAP_SPLIT_IRQCHIP
:
2456 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2457 case KVM_CAP_ASSIGN_DEV_IRQ
:
2458 case KVM_CAP_PCI_2_3
:
2462 case KVM_CAP_X86_SMM
:
2463 /* SMBASE is usually relocated above 1M on modern chipsets,
2464 * and SMM handlers might indeed rely on 4G segment limits,
2465 * so do not report SMM to be available if real mode is
2466 * emulated via vm86 mode. Still, do not go to great lengths
2467 * to avoid userspace's usage of the feature, because it is a
2468 * fringe case that is not enabled except via specific settings
2469 * of the module parameters.
2471 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2473 case KVM_CAP_COALESCED_MMIO
:
2474 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2477 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2479 case KVM_CAP_NR_VCPUS
:
2480 r
= KVM_SOFT_MAX_VCPUS
;
2482 case KVM_CAP_MAX_VCPUS
:
2485 case KVM_CAP_NR_MEMSLOTS
:
2486 r
= KVM_USER_MEM_SLOTS
;
2488 case KVM_CAP_PV_MMU
: /* obsolete */
2491 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2493 r
= iommu_present(&pci_bus_type
);
2497 r
= KVM_MAX_MCE_BANKS
;
2502 case KVM_CAP_TSC_CONTROL
:
2503 r
= kvm_has_tsc_control
;
2513 long kvm_arch_dev_ioctl(struct file
*filp
,
2514 unsigned int ioctl
, unsigned long arg
)
2516 void __user
*argp
= (void __user
*)arg
;
2520 case KVM_GET_MSR_INDEX_LIST
: {
2521 struct kvm_msr_list __user
*user_msr_list
= argp
;
2522 struct kvm_msr_list msr_list
;
2526 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2529 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2530 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2533 if (n
< msr_list
.nmsrs
)
2536 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2537 num_msrs_to_save
* sizeof(u32
)))
2539 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2541 num_emulated_msrs
* sizeof(u32
)))
2546 case KVM_GET_SUPPORTED_CPUID
:
2547 case KVM_GET_EMULATED_CPUID
: {
2548 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2549 struct kvm_cpuid2 cpuid
;
2552 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2555 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2561 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2566 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2569 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2571 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2583 static void wbinvd_ipi(void *garbage
)
2588 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2590 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2593 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2595 /* Address WBINVD may be executed by guest */
2596 if (need_emulate_wbinvd(vcpu
)) {
2597 if (kvm_x86_ops
->has_wbinvd_exit())
2598 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2599 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2600 smp_call_function_single(vcpu
->cpu
,
2601 wbinvd_ipi
, NULL
, 1);
2604 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2606 /* Apply any externally detected TSC adjustments (due to suspend) */
2607 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2608 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2609 vcpu
->arch
.tsc_offset_adjustment
= 0;
2610 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2613 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2614 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2615 rdtsc() - vcpu
->arch
.last_host_tsc
;
2617 mark_tsc_unstable("KVM discovered backwards TSC");
2618 if (check_tsc_unstable()) {
2619 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2620 vcpu
->arch
.last_guest_tsc
);
2621 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2622 vcpu
->arch
.tsc_catchup
= 1;
2625 * On a host with synchronized TSC, there is no need to update
2626 * kvmclock on vcpu->cpu migration
2628 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2629 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2630 if (vcpu
->cpu
!= cpu
)
2631 kvm_migrate_timers(vcpu
);
2635 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2638 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2640 kvm_x86_ops
->vcpu_put(vcpu
);
2641 kvm_put_guest_fpu(vcpu
);
2642 vcpu
->arch
.last_host_tsc
= rdtsc();
2645 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2646 struct kvm_lapic_state
*s
)
2648 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2649 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2654 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2655 struct kvm_lapic_state
*s
)
2657 kvm_apic_post_state_restore(vcpu
, s
);
2658 update_cr8_intercept(vcpu
);
2663 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2664 struct kvm_interrupt
*irq
)
2666 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2669 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2670 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2671 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2676 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2677 * fail for in-kernel 8259.
2679 if (pic_in_kernel(vcpu
->kvm
))
2682 if (vcpu
->arch
.pending_external_vector
!= -1)
2685 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2689 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2691 kvm_inject_nmi(vcpu
);
2696 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2698 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2703 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2704 struct kvm_tpr_access_ctl
*tac
)
2708 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2712 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2716 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2719 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2721 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2724 vcpu
->arch
.mcg_cap
= mcg_cap
;
2725 /* Init IA32_MCG_CTL to all 1s */
2726 if (mcg_cap
& MCG_CTL_P
)
2727 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2728 /* Init IA32_MCi_CTL to all 1s */
2729 for (bank
= 0; bank
< bank_num
; bank
++)
2730 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2735 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2736 struct kvm_x86_mce
*mce
)
2738 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2739 unsigned bank_num
= mcg_cap
& 0xff;
2740 u64
*banks
= vcpu
->arch
.mce_banks
;
2742 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2745 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2746 * reporting is disabled
2748 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2749 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2751 banks
+= 4 * mce
->bank
;
2753 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2754 * reporting is disabled for the bank
2756 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2758 if (mce
->status
& MCI_STATUS_UC
) {
2759 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2760 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2761 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2764 if (banks
[1] & MCI_STATUS_VAL
)
2765 mce
->status
|= MCI_STATUS_OVER
;
2766 banks
[2] = mce
->addr
;
2767 banks
[3] = mce
->misc
;
2768 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2769 banks
[1] = mce
->status
;
2770 kvm_queue_exception(vcpu
, MC_VECTOR
);
2771 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2772 || !(banks
[1] & MCI_STATUS_UC
)) {
2773 if (banks
[1] & MCI_STATUS_VAL
)
2774 mce
->status
|= MCI_STATUS_OVER
;
2775 banks
[2] = mce
->addr
;
2776 banks
[3] = mce
->misc
;
2777 banks
[1] = mce
->status
;
2779 banks
[1] |= MCI_STATUS_OVER
;
2783 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2784 struct kvm_vcpu_events
*events
)
2787 events
->exception
.injected
=
2788 vcpu
->arch
.exception
.pending
&&
2789 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2790 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2791 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2792 events
->exception
.pad
= 0;
2793 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2795 events
->interrupt
.injected
=
2796 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2797 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2798 events
->interrupt
.soft
= 0;
2799 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
2801 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2802 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2803 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2804 events
->nmi
.pad
= 0;
2806 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2808 events
->smi
.smm
= is_smm(vcpu
);
2809 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
2810 events
->smi
.smm_inside_nmi
=
2811 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
2812 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
2814 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2815 | KVM_VCPUEVENT_VALID_SHADOW
2816 | KVM_VCPUEVENT_VALID_SMM
);
2817 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2820 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2821 struct kvm_vcpu_events
*events
)
2823 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2824 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2825 | KVM_VCPUEVENT_VALID_SHADOW
2826 | KVM_VCPUEVENT_VALID_SMM
))
2830 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2831 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2832 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2833 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2835 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2836 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2837 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2838 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2839 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2840 events
->interrupt
.shadow
);
2842 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2843 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2844 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2845 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2847 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
2848 kvm_vcpu_has_lapic(vcpu
))
2849 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
2851 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
2852 if (events
->smi
.smm
)
2853 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
2855 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
2856 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
2857 if (events
->smi
.smm_inside_nmi
)
2858 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
2860 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
2861 if (kvm_vcpu_has_lapic(vcpu
)) {
2862 if (events
->smi
.latched_init
)
2863 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
2865 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
2869 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2874 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2875 struct kvm_debugregs
*dbgregs
)
2879 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2880 kvm_get_dr(vcpu
, 6, &val
);
2882 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2884 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2887 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2888 struct kvm_debugregs
*dbgregs
)
2893 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2894 kvm_update_dr0123(vcpu
);
2895 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2896 kvm_update_dr6(vcpu
);
2897 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2898 kvm_update_dr7(vcpu
);
2903 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2905 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
2907 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
2908 u64 xstate_bv
= xsave
->header
.xfeatures
;
2912 * Copy legacy XSAVE area, to avoid complications with CPUID
2913 * leaves 0 and 1 in the loop below.
2915 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
2918 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
2921 * Copy each region from the possibly compacted offset to the
2922 * non-compacted offset.
2924 valid
= xstate_bv
& ~XSTATE_FPSSE
;
2926 u64 feature
= valid
& -valid
;
2927 int index
= fls64(feature
) - 1;
2928 void *src
= get_xsave_addr(xsave
, feature
);
2931 u32 size
, offset
, ecx
, edx
;
2932 cpuid_count(XSTATE_CPUID
, index
,
2933 &size
, &offset
, &ecx
, &edx
);
2934 memcpy(dest
+ offset
, src
, size
);
2941 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
2943 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
2944 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
2948 * Copy legacy XSAVE area, to avoid complications with CPUID
2949 * leaves 0 and 1 in the loop below.
2951 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
2953 /* Set XSTATE_BV and possibly XCOMP_BV. */
2954 xsave
->header
.xfeatures
= xstate_bv
;
2956 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
2959 * Copy each region from the non-compacted offset to the
2960 * possibly compacted offset.
2962 valid
= xstate_bv
& ~XSTATE_FPSSE
;
2964 u64 feature
= valid
& -valid
;
2965 int index
= fls64(feature
) - 1;
2966 void *dest
= get_xsave_addr(xsave
, feature
);
2969 u32 size
, offset
, ecx
, edx
;
2970 cpuid_count(XSTATE_CPUID
, index
,
2971 &size
, &offset
, &ecx
, &edx
);
2972 memcpy(dest
, src
+ offset
, size
);
2979 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2980 struct kvm_xsave
*guest_xsave
)
2982 if (cpu_has_xsave
) {
2983 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
2984 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
2986 memcpy(guest_xsave
->region
,
2987 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
2988 sizeof(struct fxregs_state
));
2989 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2994 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2995 struct kvm_xsave
*guest_xsave
)
2998 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3000 if (cpu_has_xsave
) {
3002 * Here we allow setting states that are not present in
3003 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3004 * with old userspace.
3006 if (xstate_bv
& ~kvm_supported_xcr0())
3008 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3010 if (xstate_bv
& ~XSTATE_FPSSE
)
3012 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3013 guest_xsave
->region
, sizeof(struct fxregs_state
));
3018 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3019 struct kvm_xcrs
*guest_xcrs
)
3021 if (!cpu_has_xsave
) {
3022 guest_xcrs
->nr_xcrs
= 0;
3026 guest_xcrs
->nr_xcrs
= 1;
3027 guest_xcrs
->flags
= 0;
3028 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3029 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3032 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3033 struct kvm_xcrs
*guest_xcrs
)
3040 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3043 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3044 /* Only support XCR0 currently */
3045 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3046 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3047 guest_xcrs
->xcrs
[i
].value
);
3056 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3057 * stopped by the hypervisor. This function will be called from the host only.
3058 * EINVAL is returned when the host attempts to set the flag for a guest that
3059 * does not support pv clocks.
3061 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3063 if (!vcpu
->arch
.pv_time_enabled
)
3065 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3066 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3070 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3071 unsigned int ioctl
, unsigned long arg
)
3073 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3074 void __user
*argp
= (void __user
*)arg
;
3077 struct kvm_lapic_state
*lapic
;
3078 struct kvm_xsave
*xsave
;
3079 struct kvm_xcrs
*xcrs
;
3085 case KVM_GET_LAPIC
: {
3087 if (!vcpu
->arch
.apic
)
3089 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3094 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3098 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3103 case KVM_SET_LAPIC
: {
3105 if (!vcpu
->arch
.apic
)
3107 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3108 if (IS_ERR(u
.lapic
))
3109 return PTR_ERR(u
.lapic
);
3111 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3114 case KVM_INTERRUPT
: {
3115 struct kvm_interrupt irq
;
3118 if (copy_from_user(&irq
, argp
, sizeof irq
))
3120 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3124 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3128 r
= kvm_vcpu_ioctl_smi(vcpu
);
3131 case KVM_SET_CPUID
: {
3132 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3133 struct kvm_cpuid cpuid
;
3136 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3138 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3141 case KVM_SET_CPUID2
: {
3142 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3143 struct kvm_cpuid2 cpuid
;
3146 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3148 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3149 cpuid_arg
->entries
);
3152 case KVM_GET_CPUID2
: {
3153 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3154 struct kvm_cpuid2 cpuid
;
3157 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3159 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3160 cpuid_arg
->entries
);
3164 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3170 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3173 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3175 case KVM_TPR_ACCESS_REPORTING
: {
3176 struct kvm_tpr_access_ctl tac
;
3179 if (copy_from_user(&tac
, argp
, sizeof tac
))
3181 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3185 if (copy_to_user(argp
, &tac
, sizeof tac
))
3190 case KVM_SET_VAPIC_ADDR
: {
3191 struct kvm_vapic_addr va
;
3194 if (!lapic_in_kernel(vcpu
))
3197 if (copy_from_user(&va
, argp
, sizeof va
))
3199 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3202 case KVM_X86_SETUP_MCE
: {
3206 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3208 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3211 case KVM_X86_SET_MCE
: {
3212 struct kvm_x86_mce mce
;
3215 if (copy_from_user(&mce
, argp
, sizeof mce
))
3217 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3220 case KVM_GET_VCPU_EVENTS
: {
3221 struct kvm_vcpu_events events
;
3223 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3226 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3231 case KVM_SET_VCPU_EVENTS
: {
3232 struct kvm_vcpu_events events
;
3235 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3238 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3241 case KVM_GET_DEBUGREGS
: {
3242 struct kvm_debugregs dbgregs
;
3244 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3247 if (copy_to_user(argp
, &dbgregs
,
3248 sizeof(struct kvm_debugregs
)))
3253 case KVM_SET_DEBUGREGS
: {
3254 struct kvm_debugregs dbgregs
;
3257 if (copy_from_user(&dbgregs
, argp
,
3258 sizeof(struct kvm_debugregs
)))
3261 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3264 case KVM_GET_XSAVE
: {
3265 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3270 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3273 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3278 case KVM_SET_XSAVE
: {
3279 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3280 if (IS_ERR(u
.xsave
))
3281 return PTR_ERR(u
.xsave
);
3283 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3286 case KVM_GET_XCRS
: {
3287 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3292 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3295 if (copy_to_user(argp
, u
.xcrs
,
3296 sizeof(struct kvm_xcrs
)))
3301 case KVM_SET_XCRS
: {
3302 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3304 return PTR_ERR(u
.xcrs
);
3306 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3309 case KVM_SET_TSC_KHZ
: {
3313 user_tsc_khz
= (u32
)arg
;
3315 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3318 if (user_tsc_khz
== 0)
3319 user_tsc_khz
= tsc_khz
;
3321 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3326 case KVM_GET_TSC_KHZ
: {
3327 r
= vcpu
->arch
.virtual_tsc_khz
;
3330 case KVM_KVMCLOCK_CTRL
: {
3331 r
= kvm_set_guest_paused(vcpu
);
3342 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3344 return VM_FAULT_SIGBUS
;
3347 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3351 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3353 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3357 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3360 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3364 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3365 u32 kvm_nr_mmu_pages
)
3367 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3370 mutex_lock(&kvm
->slots_lock
);
3372 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3373 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3375 mutex_unlock(&kvm
->slots_lock
);
3379 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3381 return kvm
->arch
.n_max_mmu_pages
;
3384 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3389 switch (chip
->chip_id
) {
3390 case KVM_IRQCHIP_PIC_MASTER
:
3391 memcpy(&chip
->chip
.pic
,
3392 &pic_irqchip(kvm
)->pics
[0],
3393 sizeof(struct kvm_pic_state
));
3395 case KVM_IRQCHIP_PIC_SLAVE
:
3396 memcpy(&chip
->chip
.pic
,
3397 &pic_irqchip(kvm
)->pics
[1],
3398 sizeof(struct kvm_pic_state
));
3400 case KVM_IRQCHIP_IOAPIC
:
3401 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3410 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3415 switch (chip
->chip_id
) {
3416 case KVM_IRQCHIP_PIC_MASTER
:
3417 spin_lock(&pic_irqchip(kvm
)->lock
);
3418 memcpy(&pic_irqchip(kvm
)->pics
[0],
3420 sizeof(struct kvm_pic_state
));
3421 spin_unlock(&pic_irqchip(kvm
)->lock
);
3423 case KVM_IRQCHIP_PIC_SLAVE
:
3424 spin_lock(&pic_irqchip(kvm
)->lock
);
3425 memcpy(&pic_irqchip(kvm
)->pics
[1],
3427 sizeof(struct kvm_pic_state
));
3428 spin_unlock(&pic_irqchip(kvm
)->lock
);
3430 case KVM_IRQCHIP_IOAPIC
:
3431 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3437 kvm_pic_update_irq(pic_irqchip(kvm
));
3441 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3443 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3444 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3445 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3449 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3451 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3452 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3453 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3454 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3458 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3460 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3461 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3462 sizeof(ps
->channels
));
3463 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3464 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3465 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3469 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3472 u32 prev_legacy
, cur_legacy
;
3473 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3474 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3475 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3476 if (!prev_legacy
&& cur_legacy
)
3478 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3479 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3480 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3481 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3482 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3486 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3487 struct kvm_reinject_control
*control
)
3489 if (!kvm
->arch
.vpit
)
3491 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3492 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3493 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3498 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3499 * @kvm: kvm instance
3500 * @log: slot id and address to which we copy the log
3502 * Steps 1-4 below provide general overview of dirty page logging. See
3503 * kvm_get_dirty_log_protect() function description for additional details.
3505 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3506 * always flush the TLB (step 4) even if previous step failed and the dirty
3507 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3508 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3509 * writes will be marked dirty for next log read.
3511 * 1. Take a snapshot of the bit and clear it if needed.
3512 * 2. Write protect the corresponding page.
3513 * 3. Copy the snapshot to the userspace.
3514 * 4. Flush TLB's if needed.
3516 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3518 bool is_dirty
= false;
3521 mutex_lock(&kvm
->slots_lock
);
3524 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3526 if (kvm_x86_ops
->flush_log_dirty
)
3527 kvm_x86_ops
->flush_log_dirty(kvm
);
3529 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3532 * All the TLBs can be flushed out of mmu lock, see the comments in
3533 * kvm_mmu_slot_remove_write_access().
3535 lockdep_assert_held(&kvm
->slots_lock
);
3537 kvm_flush_remote_tlbs(kvm
);
3539 mutex_unlock(&kvm
->slots_lock
);
3543 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3546 if (!irqchip_in_kernel(kvm
))
3549 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3550 irq_event
->irq
, irq_event
->level
,
3555 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3556 struct kvm_enable_cap
*cap
)
3564 case KVM_CAP_DISABLE_QUIRKS
:
3565 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3568 case KVM_CAP_SPLIT_IRQCHIP
: {
3569 mutex_lock(&kvm
->lock
);
3571 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3572 goto split_irqchip_unlock
;
3574 if (irqchip_in_kernel(kvm
))
3575 goto split_irqchip_unlock
;
3576 if (atomic_read(&kvm
->online_vcpus
))
3577 goto split_irqchip_unlock
;
3578 r
= kvm_setup_empty_irq_routing(kvm
);
3580 goto split_irqchip_unlock
;
3581 /* Pairs with irqchip_in_kernel. */
3583 kvm
->arch
.irqchip_split
= true;
3584 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3586 split_irqchip_unlock
:
3587 mutex_unlock(&kvm
->lock
);
3597 long kvm_arch_vm_ioctl(struct file
*filp
,
3598 unsigned int ioctl
, unsigned long arg
)
3600 struct kvm
*kvm
= filp
->private_data
;
3601 void __user
*argp
= (void __user
*)arg
;
3604 * This union makes it completely explicit to gcc-3.x
3605 * that these two variables' stack usage should be
3606 * combined, not added together.
3609 struct kvm_pit_state ps
;
3610 struct kvm_pit_state2 ps2
;
3611 struct kvm_pit_config pit_config
;
3615 case KVM_SET_TSS_ADDR
:
3616 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3618 case KVM_SET_IDENTITY_MAP_ADDR
: {
3622 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3624 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3627 case KVM_SET_NR_MMU_PAGES
:
3628 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3630 case KVM_GET_NR_MMU_PAGES
:
3631 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3633 case KVM_CREATE_IRQCHIP
: {
3634 struct kvm_pic
*vpic
;
3636 mutex_lock(&kvm
->lock
);
3639 goto create_irqchip_unlock
;
3641 if (atomic_read(&kvm
->online_vcpus
))
3642 goto create_irqchip_unlock
;
3644 vpic
= kvm_create_pic(kvm
);
3646 r
= kvm_ioapic_init(kvm
);
3648 mutex_lock(&kvm
->slots_lock
);
3649 kvm_destroy_pic(vpic
);
3650 mutex_unlock(&kvm
->slots_lock
);
3651 goto create_irqchip_unlock
;
3654 goto create_irqchip_unlock
;
3655 r
= kvm_setup_default_irq_routing(kvm
);
3657 mutex_lock(&kvm
->slots_lock
);
3658 mutex_lock(&kvm
->irq_lock
);
3659 kvm_ioapic_destroy(kvm
);
3660 kvm_destroy_pic(vpic
);
3661 mutex_unlock(&kvm
->irq_lock
);
3662 mutex_unlock(&kvm
->slots_lock
);
3663 goto create_irqchip_unlock
;
3665 /* Write kvm->irq_routing before kvm->arch.vpic. */
3667 kvm
->arch
.vpic
= vpic
;
3668 create_irqchip_unlock
:
3669 mutex_unlock(&kvm
->lock
);
3672 case KVM_CREATE_PIT
:
3673 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3675 case KVM_CREATE_PIT2
:
3677 if (copy_from_user(&u
.pit_config
, argp
,
3678 sizeof(struct kvm_pit_config
)))
3681 mutex_lock(&kvm
->slots_lock
);
3684 goto create_pit_unlock
;
3686 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3690 mutex_unlock(&kvm
->slots_lock
);
3692 case KVM_GET_IRQCHIP
: {
3693 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3694 struct kvm_irqchip
*chip
;
3696 chip
= memdup_user(argp
, sizeof(*chip
));
3703 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3704 goto get_irqchip_out
;
3705 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3707 goto get_irqchip_out
;
3709 if (copy_to_user(argp
, chip
, sizeof *chip
))
3710 goto get_irqchip_out
;
3716 case KVM_SET_IRQCHIP
: {
3717 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3718 struct kvm_irqchip
*chip
;
3720 chip
= memdup_user(argp
, sizeof(*chip
));
3727 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3728 goto set_irqchip_out
;
3729 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3731 goto set_irqchip_out
;
3739 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3742 if (!kvm
->arch
.vpit
)
3744 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3748 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3755 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3758 if (!kvm
->arch
.vpit
)
3760 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3763 case KVM_GET_PIT2
: {
3765 if (!kvm
->arch
.vpit
)
3767 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3771 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3776 case KVM_SET_PIT2
: {
3778 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3781 if (!kvm
->arch
.vpit
)
3783 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3786 case KVM_REINJECT_CONTROL
: {
3787 struct kvm_reinject_control control
;
3789 if (copy_from_user(&control
, argp
, sizeof(control
)))
3791 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3794 case KVM_SET_BOOT_CPU_ID
:
3796 mutex_lock(&kvm
->lock
);
3797 if (atomic_read(&kvm
->online_vcpus
) != 0)
3800 kvm
->arch
.bsp_vcpu_id
= arg
;
3801 mutex_unlock(&kvm
->lock
);
3803 case KVM_XEN_HVM_CONFIG
: {
3805 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3806 sizeof(struct kvm_xen_hvm_config
)))
3809 if (kvm
->arch
.xen_hvm_config
.flags
)
3814 case KVM_SET_CLOCK
: {
3815 struct kvm_clock_data user_ns
;
3820 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3828 local_irq_disable();
3829 now_ns
= get_kernel_ns();
3830 delta
= user_ns
.clock
- now_ns
;
3832 kvm
->arch
.kvmclock_offset
= delta
;
3833 kvm_gen_update_masterclock(kvm
);
3836 case KVM_GET_CLOCK
: {
3837 struct kvm_clock_data user_ns
;
3840 local_irq_disable();
3841 now_ns
= get_kernel_ns();
3842 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3845 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3848 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3853 case KVM_ENABLE_CAP
: {
3854 struct kvm_enable_cap cap
;
3857 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3859 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
3863 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
3869 static void kvm_init_msr_list(void)
3874 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3875 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3879 * Even MSRs that are valid in the host may not be exposed
3880 * to the guests in some cases. We could work around this
3881 * in VMX with the generic MSR save/load machinery, but it
3882 * is not really worthwhile since it will really only
3883 * happen with nested virtualization.
3885 switch (msrs_to_save
[i
]) {
3886 case MSR_IA32_BNDCFGS
:
3887 if (!kvm_x86_ops
->mpx_supported())
3895 msrs_to_save
[j
] = msrs_to_save
[i
];
3898 num_msrs_to_save
= j
;
3900 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
3901 switch (emulated_msrs
[i
]) {
3902 case MSR_IA32_SMBASE
:
3903 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
3911 emulated_msrs
[j
] = emulated_msrs
[i
];
3914 num_emulated_msrs
= j
;
3917 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3925 if (!(vcpu
->arch
.apic
&&
3926 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3927 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
3938 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3945 if (!(vcpu
->arch
.apic
&&
3946 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
3948 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
3950 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3960 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3961 struct kvm_segment
*var
, int seg
)
3963 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3966 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3967 struct kvm_segment
*var
, int seg
)
3969 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3972 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
3973 struct x86_exception
*exception
)
3977 BUG_ON(!mmu_is_nested(vcpu
));
3979 /* NPT walks are always user-walks */
3980 access
|= PFERR_USER_MASK
;
3981 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
3986 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3987 struct x86_exception
*exception
)
3989 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3990 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3993 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3994 struct x86_exception
*exception
)
3996 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3997 access
|= PFERR_FETCH_MASK
;
3998 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4001 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4002 struct x86_exception
*exception
)
4004 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4005 access
|= PFERR_WRITE_MASK
;
4006 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4009 /* uses this to access any guest's mapped memory without checking CPL */
4010 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4011 struct x86_exception
*exception
)
4013 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4016 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4017 struct kvm_vcpu
*vcpu
, u32 access
,
4018 struct x86_exception
*exception
)
4021 int r
= X86EMUL_CONTINUE
;
4024 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4026 unsigned offset
= addr
& (PAGE_SIZE
-1);
4027 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4030 if (gpa
== UNMAPPED_GVA
)
4031 return X86EMUL_PROPAGATE_FAULT
;
4032 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4035 r
= X86EMUL_IO_NEEDED
;
4047 /* used for instruction fetching */
4048 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4049 gva_t addr
, void *val
, unsigned int bytes
,
4050 struct x86_exception
*exception
)
4052 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4053 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4057 /* Inline kvm_read_guest_virt_helper for speed. */
4058 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4060 if (unlikely(gpa
== UNMAPPED_GVA
))
4061 return X86EMUL_PROPAGATE_FAULT
;
4063 offset
= addr
& (PAGE_SIZE
-1);
4064 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4065 bytes
= (unsigned)PAGE_SIZE
- offset
;
4066 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4068 if (unlikely(ret
< 0))
4069 return X86EMUL_IO_NEEDED
;
4071 return X86EMUL_CONTINUE
;
4074 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4075 gva_t addr
, void *val
, unsigned int bytes
,
4076 struct x86_exception
*exception
)
4078 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4079 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4081 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4084 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4086 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4087 gva_t addr
, void *val
, unsigned int bytes
,
4088 struct x86_exception
*exception
)
4090 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4091 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4094 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4095 unsigned long addr
, void *val
, unsigned int bytes
)
4097 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4098 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4100 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4103 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4104 gva_t addr
, void *val
,
4106 struct x86_exception
*exception
)
4108 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4110 int r
= X86EMUL_CONTINUE
;
4113 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4116 unsigned offset
= addr
& (PAGE_SIZE
-1);
4117 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4120 if (gpa
== UNMAPPED_GVA
)
4121 return X86EMUL_PROPAGATE_FAULT
;
4122 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4124 r
= X86EMUL_IO_NEEDED
;
4135 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4137 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4138 gpa_t
*gpa
, struct x86_exception
*exception
,
4141 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4142 | (write
? PFERR_WRITE_MASK
: 0);
4144 if (vcpu_match_mmio_gva(vcpu
, gva
)
4145 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4146 vcpu
->arch
.access
, access
)) {
4147 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4148 (gva
& (PAGE_SIZE
- 1));
4149 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4153 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4155 if (*gpa
== UNMAPPED_GVA
)
4158 /* For APIC access vmexit */
4159 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4162 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4163 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4170 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4171 const void *val
, int bytes
)
4175 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4178 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4182 struct read_write_emulator_ops
{
4183 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4185 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4186 void *val
, int bytes
);
4187 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4188 int bytes
, void *val
);
4189 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4190 void *val
, int bytes
);
4194 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4196 if (vcpu
->mmio_read_completed
) {
4197 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4198 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4199 vcpu
->mmio_read_completed
= 0;
4206 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4207 void *val
, int bytes
)
4209 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4212 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4213 void *val
, int bytes
)
4215 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4218 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4220 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4221 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4224 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4225 void *val
, int bytes
)
4227 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4228 return X86EMUL_IO_NEEDED
;
4231 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4232 void *val
, int bytes
)
4234 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4236 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4237 return X86EMUL_CONTINUE
;
4240 static const struct read_write_emulator_ops read_emultor
= {
4241 .read_write_prepare
= read_prepare
,
4242 .read_write_emulate
= read_emulate
,
4243 .read_write_mmio
= vcpu_mmio_read
,
4244 .read_write_exit_mmio
= read_exit_mmio
,
4247 static const struct read_write_emulator_ops write_emultor
= {
4248 .read_write_emulate
= write_emulate
,
4249 .read_write_mmio
= write_mmio
,
4250 .read_write_exit_mmio
= write_exit_mmio
,
4254 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4256 struct x86_exception
*exception
,
4257 struct kvm_vcpu
*vcpu
,
4258 const struct read_write_emulator_ops
*ops
)
4262 bool write
= ops
->write
;
4263 struct kvm_mmio_fragment
*frag
;
4265 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4268 return X86EMUL_PROPAGATE_FAULT
;
4270 /* For APIC access vmexit */
4274 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4275 return X86EMUL_CONTINUE
;
4279 * Is this MMIO handled locally?
4281 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4282 if (handled
== bytes
)
4283 return X86EMUL_CONTINUE
;
4289 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4290 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4294 return X86EMUL_CONTINUE
;
4297 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4299 void *val
, unsigned int bytes
,
4300 struct x86_exception
*exception
,
4301 const struct read_write_emulator_ops
*ops
)
4303 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4307 if (ops
->read_write_prepare
&&
4308 ops
->read_write_prepare(vcpu
, val
, bytes
))
4309 return X86EMUL_CONTINUE
;
4311 vcpu
->mmio_nr_fragments
= 0;
4313 /* Crossing a page boundary? */
4314 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4317 now
= -addr
& ~PAGE_MASK
;
4318 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4321 if (rc
!= X86EMUL_CONTINUE
)
4324 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4330 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4332 if (rc
!= X86EMUL_CONTINUE
)
4335 if (!vcpu
->mmio_nr_fragments
)
4338 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4340 vcpu
->mmio_needed
= 1;
4341 vcpu
->mmio_cur_fragment
= 0;
4343 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4344 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4345 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4346 vcpu
->run
->mmio
.phys_addr
= gpa
;
4348 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4351 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4355 struct x86_exception
*exception
)
4357 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4358 exception
, &read_emultor
);
4361 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4365 struct x86_exception
*exception
)
4367 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4368 exception
, &write_emultor
);
4371 #define CMPXCHG_TYPE(t, ptr, old, new) \
4372 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4374 #ifdef CONFIG_X86_64
4375 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4377 # define CMPXCHG64(ptr, old, new) \
4378 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4381 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4386 struct x86_exception
*exception
)
4388 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4394 /* guests cmpxchg8b have to be emulated atomically */
4395 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4398 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4400 if (gpa
== UNMAPPED_GVA
||
4401 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4404 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4407 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4408 if (is_error_page(page
))
4411 kaddr
= kmap_atomic(page
);
4412 kaddr
+= offset_in_page(gpa
);
4415 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4418 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4421 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4424 exchanged
= CMPXCHG64(kaddr
, old
, new);
4429 kunmap_atomic(kaddr
);
4430 kvm_release_page_dirty(page
);
4433 return X86EMUL_CMPXCHG_FAILED
;
4435 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4436 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4438 return X86EMUL_CONTINUE
;
4441 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4443 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4446 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4448 /* TODO: String I/O for in kernel device */
4451 if (vcpu
->arch
.pio
.in
)
4452 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4453 vcpu
->arch
.pio
.size
, pd
);
4455 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4456 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4461 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4462 unsigned short port
, void *val
,
4463 unsigned int count
, bool in
)
4465 vcpu
->arch
.pio
.port
= port
;
4466 vcpu
->arch
.pio
.in
= in
;
4467 vcpu
->arch
.pio
.count
= count
;
4468 vcpu
->arch
.pio
.size
= size
;
4470 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4471 vcpu
->arch
.pio
.count
= 0;
4475 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4476 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4477 vcpu
->run
->io
.size
= size
;
4478 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4479 vcpu
->run
->io
.count
= count
;
4480 vcpu
->run
->io
.port
= port
;
4485 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4486 int size
, unsigned short port
, void *val
,
4489 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4492 if (vcpu
->arch
.pio
.count
)
4495 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4498 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4499 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4500 vcpu
->arch
.pio
.count
= 0;
4507 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4508 int size
, unsigned short port
,
4509 const void *val
, unsigned int count
)
4511 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4513 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4514 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4515 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4518 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4520 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4523 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4525 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4528 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4530 if (!need_emulate_wbinvd(vcpu
))
4531 return X86EMUL_CONTINUE
;
4533 if (kvm_x86_ops
->has_wbinvd_exit()) {
4534 int cpu
= get_cpu();
4536 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4537 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4538 wbinvd_ipi
, NULL
, 1);
4540 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4543 return X86EMUL_CONTINUE
;
4546 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4548 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4549 return kvm_emulate_wbinvd_noskip(vcpu
);
4551 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4555 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4557 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4560 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4561 unsigned long *dest
)
4563 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4566 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4567 unsigned long value
)
4570 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4573 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4575 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4578 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4580 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4581 unsigned long value
;
4585 value
= kvm_read_cr0(vcpu
);
4588 value
= vcpu
->arch
.cr2
;
4591 value
= kvm_read_cr3(vcpu
);
4594 value
= kvm_read_cr4(vcpu
);
4597 value
= kvm_get_cr8(vcpu
);
4600 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4607 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4609 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4614 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4617 vcpu
->arch
.cr2
= val
;
4620 res
= kvm_set_cr3(vcpu
, val
);
4623 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4626 res
= kvm_set_cr8(vcpu
, val
);
4629 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4636 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4638 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4641 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4643 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4646 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4648 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4651 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4653 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4656 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4658 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4661 static unsigned long emulator_get_cached_segment_base(
4662 struct x86_emulate_ctxt
*ctxt
, int seg
)
4664 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4667 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4668 struct desc_struct
*desc
, u32
*base3
,
4671 struct kvm_segment var
;
4673 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4674 *selector
= var
.selector
;
4677 memset(desc
, 0, sizeof(*desc
));
4683 set_desc_limit(desc
, var
.limit
);
4684 set_desc_base(desc
, (unsigned long)var
.base
);
4685 #ifdef CONFIG_X86_64
4687 *base3
= var
.base
>> 32;
4689 desc
->type
= var
.type
;
4691 desc
->dpl
= var
.dpl
;
4692 desc
->p
= var
.present
;
4693 desc
->avl
= var
.avl
;
4701 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4702 struct desc_struct
*desc
, u32 base3
,
4705 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4706 struct kvm_segment var
;
4708 var
.selector
= selector
;
4709 var
.base
= get_desc_base(desc
);
4710 #ifdef CONFIG_X86_64
4711 var
.base
|= ((u64
)base3
) << 32;
4713 var
.limit
= get_desc_limit(desc
);
4715 var
.limit
= (var
.limit
<< 12) | 0xfff;
4716 var
.type
= desc
->type
;
4717 var
.dpl
= desc
->dpl
;
4722 var
.avl
= desc
->avl
;
4723 var
.present
= desc
->p
;
4724 var
.unusable
= !var
.present
;
4727 kvm_set_segment(vcpu
, &var
, seg
);
4731 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4732 u32 msr_index
, u64
*pdata
)
4734 struct msr_data msr
;
4737 msr
.index
= msr_index
;
4738 msr
.host_initiated
= false;
4739 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
4747 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4748 u32 msr_index
, u64 data
)
4750 struct msr_data msr
;
4753 msr
.index
= msr_index
;
4754 msr
.host_initiated
= false;
4755 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4758 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
4760 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4762 return vcpu
->arch
.smbase
;
4765 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
4767 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4769 vcpu
->arch
.smbase
= smbase
;
4772 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4775 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
4778 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4779 u32 pmc
, u64
*pdata
)
4781 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4784 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4786 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4789 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4792 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4794 * CR0.TS may reference the host fpu state, not the guest fpu state,
4795 * so it may be clear at this point.
4800 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4805 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4806 struct x86_instruction_info
*info
,
4807 enum x86_intercept_stage stage
)
4809 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4812 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4813 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4815 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4818 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4820 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4823 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4825 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4828 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
4830 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
4833 static const struct x86_emulate_ops emulate_ops
= {
4834 .read_gpr
= emulator_read_gpr
,
4835 .write_gpr
= emulator_write_gpr
,
4836 .read_std
= kvm_read_guest_virt_system
,
4837 .write_std
= kvm_write_guest_virt_system
,
4838 .read_phys
= kvm_read_guest_phys_system
,
4839 .fetch
= kvm_fetch_guest_virt
,
4840 .read_emulated
= emulator_read_emulated
,
4841 .write_emulated
= emulator_write_emulated
,
4842 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4843 .invlpg
= emulator_invlpg
,
4844 .pio_in_emulated
= emulator_pio_in_emulated
,
4845 .pio_out_emulated
= emulator_pio_out_emulated
,
4846 .get_segment
= emulator_get_segment
,
4847 .set_segment
= emulator_set_segment
,
4848 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4849 .get_gdt
= emulator_get_gdt
,
4850 .get_idt
= emulator_get_idt
,
4851 .set_gdt
= emulator_set_gdt
,
4852 .set_idt
= emulator_set_idt
,
4853 .get_cr
= emulator_get_cr
,
4854 .set_cr
= emulator_set_cr
,
4855 .cpl
= emulator_get_cpl
,
4856 .get_dr
= emulator_get_dr
,
4857 .set_dr
= emulator_set_dr
,
4858 .get_smbase
= emulator_get_smbase
,
4859 .set_smbase
= emulator_set_smbase
,
4860 .set_msr
= emulator_set_msr
,
4861 .get_msr
= emulator_get_msr
,
4862 .check_pmc
= emulator_check_pmc
,
4863 .read_pmc
= emulator_read_pmc
,
4864 .halt
= emulator_halt
,
4865 .wbinvd
= emulator_wbinvd
,
4866 .fix_hypercall
= emulator_fix_hypercall
,
4867 .get_fpu
= emulator_get_fpu
,
4868 .put_fpu
= emulator_put_fpu
,
4869 .intercept
= emulator_intercept
,
4870 .get_cpuid
= emulator_get_cpuid
,
4871 .set_nmi_mask
= emulator_set_nmi_mask
,
4874 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4876 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
4878 * an sti; sti; sequence only disable interrupts for the first
4879 * instruction. So, if the last instruction, be it emulated or
4880 * not, left the system with the INT_STI flag enabled, it
4881 * means that the last instruction is an sti. We should not
4882 * leave the flag on in this case. The same goes for mov ss
4884 if (int_shadow
& mask
)
4886 if (unlikely(int_shadow
|| mask
)) {
4887 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4889 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4893 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4895 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4896 if (ctxt
->exception
.vector
== PF_VECTOR
)
4897 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4899 if (ctxt
->exception
.error_code_valid
)
4900 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4901 ctxt
->exception
.error_code
);
4903 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4907 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4909 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4912 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4914 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4915 ctxt
->eip
= kvm_rip_read(vcpu
);
4916 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4917 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4918 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
4919 cs_db
? X86EMUL_MODE_PROT32
:
4920 X86EMUL_MODE_PROT16
;
4921 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
4922 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
4923 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
4924 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
4926 init_decode_cache(ctxt
);
4927 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4930 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4932 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4935 init_emulate_ctxt(vcpu
);
4939 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4940 ret
= emulate_int_real(ctxt
, irq
);
4942 if (ret
!= X86EMUL_CONTINUE
)
4943 return EMULATE_FAIL
;
4945 ctxt
->eip
= ctxt
->_eip
;
4946 kvm_rip_write(vcpu
, ctxt
->eip
);
4947 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4949 if (irq
== NMI_VECTOR
)
4950 vcpu
->arch
.nmi_pending
= 0;
4952 vcpu
->arch
.interrupt
.pending
= false;
4954 return EMULATE_DONE
;
4956 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4958 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4960 int r
= EMULATE_DONE
;
4962 ++vcpu
->stat
.insn_emulation_fail
;
4963 trace_kvm_emulate_insn_failed(vcpu
);
4964 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
4965 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4966 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4967 vcpu
->run
->internal
.ndata
= 0;
4970 kvm_queue_exception(vcpu
, UD_VECTOR
);
4975 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
4976 bool write_fault_to_shadow_pgtable
,
4982 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
4985 if (!vcpu
->arch
.mmu
.direct_map
) {
4987 * Write permission should be allowed since only
4988 * write access need to be emulated.
4990 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4993 * If the mapping is invalid in guest, let cpu retry
4994 * it to generate fault.
4996 if (gpa
== UNMAPPED_GVA
)
5001 * Do not retry the unhandleable instruction if it faults on the
5002 * readonly host memory, otherwise it will goto a infinite loop:
5003 * retry instruction -> write #PF -> emulation fail -> retry
5004 * instruction -> ...
5006 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5009 * If the instruction failed on the error pfn, it can not be fixed,
5010 * report the error to userspace.
5012 if (is_error_noslot_pfn(pfn
))
5015 kvm_release_pfn_clean(pfn
);
5017 /* The instructions are well-emulated on direct mmu. */
5018 if (vcpu
->arch
.mmu
.direct_map
) {
5019 unsigned int indirect_shadow_pages
;
5021 spin_lock(&vcpu
->kvm
->mmu_lock
);
5022 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5023 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5025 if (indirect_shadow_pages
)
5026 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5032 * if emulation was due to access to shadowed page table
5033 * and it failed try to unshadow page and re-enter the
5034 * guest to let CPU execute the instruction.
5036 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5039 * If the access faults on its page table, it can not
5040 * be fixed by unprotecting shadow page and it should
5041 * be reported to userspace.
5043 return !write_fault_to_shadow_pgtable
;
5046 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5047 unsigned long cr2
, int emulation_type
)
5049 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5050 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5052 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5053 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5056 * If the emulation is caused by #PF and it is non-page_table
5057 * writing instruction, it means the VM-EXIT is caused by shadow
5058 * page protected, we can zap the shadow page and retry this
5059 * instruction directly.
5061 * Note: if the guest uses a non-page-table modifying instruction
5062 * on the PDE that points to the instruction, then we will unmap
5063 * the instruction and go to an infinite loop. So, we cache the
5064 * last retried eip and the last fault address, if we meet the eip
5065 * and the address again, we can break out of the potential infinite
5068 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5070 if (!(emulation_type
& EMULTYPE_RETRY
))
5073 if (x86_page_table_writing_insn(ctxt
))
5076 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5079 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5080 vcpu
->arch
.last_retry_addr
= cr2
;
5082 if (!vcpu
->arch
.mmu
.direct_map
)
5083 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5085 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5090 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5091 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5093 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5095 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5096 /* This is a good place to trace that we are exiting SMM. */
5097 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5099 if (unlikely(vcpu
->arch
.smi_pending
)) {
5100 kvm_make_request(KVM_REQ_SMI
, vcpu
);
5101 vcpu
->arch
.smi_pending
= 0;
5103 /* Process a latched INIT, if any. */
5104 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5108 kvm_mmu_reset_context(vcpu
);
5111 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5113 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5115 vcpu
->arch
.hflags
= emul_flags
;
5117 if (changed
& HF_SMM_MASK
)
5118 kvm_smm_changed(vcpu
);
5121 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5130 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5131 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5136 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5138 struct kvm_run
*kvm_run
= vcpu
->run
;
5141 * rflags is the old, "raw" value of the flags. The new value has
5142 * not been saved yet.
5144 * This is correct even for TF set by the guest, because "the
5145 * processor will not generate this exception after the instruction
5146 * that sets the TF flag".
5148 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5149 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5150 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5152 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5153 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5154 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5155 *r
= EMULATE_USER_EXIT
;
5157 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5159 * "Certain debug exceptions may clear bit 0-3. The
5160 * remaining contents of the DR6 register are never
5161 * cleared by the processor".
5163 vcpu
->arch
.dr6
&= ~15;
5164 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5165 kvm_queue_exception(vcpu
, DB_VECTOR
);
5170 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5172 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5173 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5174 struct kvm_run
*kvm_run
= vcpu
->run
;
5175 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5176 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5177 vcpu
->arch
.guest_debug_dr7
,
5181 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5182 kvm_run
->debug
.arch
.pc
= eip
;
5183 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5184 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5185 *r
= EMULATE_USER_EXIT
;
5190 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5191 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5192 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5193 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5198 vcpu
->arch
.dr6
&= ~15;
5199 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5200 kvm_queue_exception(vcpu
, DB_VECTOR
);
5209 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5216 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5217 bool writeback
= true;
5218 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5221 * Clear write_fault_to_shadow_pgtable here to ensure it is
5224 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5225 kvm_clear_exception_queue(vcpu
);
5227 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5228 init_emulate_ctxt(vcpu
);
5231 * We will reenter on the same instruction since
5232 * we do not set complete_userspace_io. This does not
5233 * handle watchpoints yet, those would be handled in
5236 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5239 ctxt
->interruptibility
= 0;
5240 ctxt
->have_exception
= false;
5241 ctxt
->exception
.vector
= -1;
5242 ctxt
->perm_ok
= false;
5244 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5246 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5248 trace_kvm_emulate_insn_start(vcpu
);
5249 ++vcpu
->stat
.insn_emulation
;
5250 if (r
!= EMULATION_OK
) {
5251 if (emulation_type
& EMULTYPE_TRAP_UD
)
5252 return EMULATE_FAIL
;
5253 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5255 return EMULATE_DONE
;
5256 if (emulation_type
& EMULTYPE_SKIP
)
5257 return EMULATE_FAIL
;
5258 return handle_emulation_failure(vcpu
);
5262 if (emulation_type
& EMULTYPE_SKIP
) {
5263 kvm_rip_write(vcpu
, ctxt
->_eip
);
5264 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5265 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5266 return EMULATE_DONE
;
5269 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5270 return EMULATE_DONE
;
5272 /* this is needed for vmware backdoor interface to work since it
5273 changes registers values during IO operation */
5274 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5275 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5276 emulator_invalidate_register_cache(ctxt
);
5280 r
= x86_emulate_insn(ctxt
);
5282 if (r
== EMULATION_INTERCEPTED
)
5283 return EMULATE_DONE
;
5285 if (r
== EMULATION_FAILED
) {
5286 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5288 return EMULATE_DONE
;
5290 return handle_emulation_failure(vcpu
);
5293 if (ctxt
->have_exception
) {
5295 if (inject_emulated_exception(vcpu
))
5297 } else if (vcpu
->arch
.pio
.count
) {
5298 if (!vcpu
->arch
.pio
.in
) {
5299 /* FIXME: return into emulator if single-stepping. */
5300 vcpu
->arch
.pio
.count
= 0;
5303 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5305 r
= EMULATE_USER_EXIT
;
5306 } else if (vcpu
->mmio_needed
) {
5307 if (!vcpu
->mmio_is_write
)
5309 r
= EMULATE_USER_EXIT
;
5310 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5311 } else if (r
== EMULATION_RESTART
)
5317 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5318 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5319 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5320 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5321 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5322 kvm_rip_write(vcpu
, ctxt
->eip
);
5323 if (r
== EMULATE_DONE
)
5324 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5325 if (!ctxt
->have_exception
||
5326 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5327 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5330 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5331 * do nothing, and it will be requested again as soon as
5332 * the shadow expires. But we still need to check here,
5333 * because POPF has no interrupt shadow.
5335 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5336 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5338 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5342 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5344 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5346 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5347 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5348 size
, port
, &val
, 1);
5349 /* do not return to emulator after return from userspace */
5350 vcpu
->arch
.pio
.count
= 0;
5353 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5355 static void tsc_bad(void *info
)
5357 __this_cpu_write(cpu_tsc_khz
, 0);
5360 static void tsc_khz_changed(void *data
)
5362 struct cpufreq_freqs
*freq
= data
;
5363 unsigned long khz
= 0;
5367 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5368 khz
= cpufreq_quick_get(raw_smp_processor_id());
5371 __this_cpu_write(cpu_tsc_khz
, khz
);
5374 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5377 struct cpufreq_freqs
*freq
= data
;
5379 struct kvm_vcpu
*vcpu
;
5380 int i
, send_ipi
= 0;
5383 * We allow guests to temporarily run on slowing clocks,
5384 * provided we notify them after, or to run on accelerating
5385 * clocks, provided we notify them before. Thus time never
5388 * However, we have a problem. We can't atomically update
5389 * the frequency of a given CPU from this function; it is
5390 * merely a notifier, which can be called from any CPU.
5391 * Changing the TSC frequency at arbitrary points in time
5392 * requires a recomputation of local variables related to
5393 * the TSC for each VCPU. We must flag these local variables
5394 * to be updated and be sure the update takes place with the
5395 * new frequency before any guests proceed.
5397 * Unfortunately, the combination of hotplug CPU and frequency
5398 * change creates an intractable locking scenario; the order
5399 * of when these callouts happen is undefined with respect to
5400 * CPU hotplug, and they can race with each other. As such,
5401 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5402 * undefined; you can actually have a CPU frequency change take
5403 * place in between the computation of X and the setting of the
5404 * variable. To protect against this problem, all updates of
5405 * the per_cpu tsc_khz variable are done in an interrupt
5406 * protected IPI, and all callers wishing to update the value
5407 * must wait for a synchronous IPI to complete (which is trivial
5408 * if the caller is on the CPU already). This establishes the
5409 * necessary total order on variable updates.
5411 * Note that because a guest time update may take place
5412 * anytime after the setting of the VCPU's request bit, the
5413 * correct TSC value must be set before the request. However,
5414 * to ensure the update actually makes it to any guest which
5415 * starts running in hardware virtualization between the set
5416 * and the acquisition of the spinlock, we must also ping the
5417 * CPU after setting the request bit.
5421 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5423 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5426 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5428 spin_lock(&kvm_lock
);
5429 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5430 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5431 if (vcpu
->cpu
!= freq
->cpu
)
5433 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5434 if (vcpu
->cpu
!= smp_processor_id())
5438 spin_unlock(&kvm_lock
);
5440 if (freq
->old
< freq
->new && send_ipi
) {
5442 * We upscale the frequency. Must make the guest
5443 * doesn't see old kvmclock values while running with
5444 * the new frequency, otherwise we risk the guest sees
5445 * time go backwards.
5447 * In case we update the frequency for another cpu
5448 * (which might be in guest context) send an interrupt
5449 * to kick the cpu out of guest context. Next time
5450 * guest context is entered kvmclock will be updated,
5451 * so the guest will not see stale values.
5453 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5458 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5459 .notifier_call
= kvmclock_cpufreq_notifier
5462 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5463 unsigned long action
, void *hcpu
)
5465 unsigned int cpu
= (unsigned long)hcpu
;
5469 case CPU_DOWN_FAILED
:
5470 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5472 case CPU_DOWN_PREPARE
:
5473 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5479 static struct notifier_block kvmclock_cpu_notifier_block
= {
5480 .notifier_call
= kvmclock_cpu_notifier
,
5481 .priority
= -INT_MAX
5484 static void kvm_timer_init(void)
5488 max_tsc_khz
= tsc_khz
;
5490 cpu_notifier_register_begin();
5491 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5492 #ifdef CONFIG_CPU_FREQ
5493 struct cpufreq_policy policy
;
5494 memset(&policy
, 0, sizeof(policy
));
5496 cpufreq_get_policy(&policy
, cpu
);
5497 if (policy
.cpuinfo
.max_freq
)
5498 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5501 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5502 CPUFREQ_TRANSITION_NOTIFIER
);
5504 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5505 for_each_online_cpu(cpu
)
5506 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5508 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5509 cpu_notifier_register_done();
5513 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5515 int kvm_is_in_guest(void)
5517 return __this_cpu_read(current_vcpu
) != NULL
;
5520 static int kvm_is_user_mode(void)
5524 if (__this_cpu_read(current_vcpu
))
5525 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5527 return user_mode
!= 0;
5530 static unsigned long kvm_get_guest_ip(void)
5532 unsigned long ip
= 0;
5534 if (__this_cpu_read(current_vcpu
))
5535 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5540 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5541 .is_in_guest
= kvm_is_in_guest
,
5542 .is_user_mode
= kvm_is_user_mode
,
5543 .get_guest_ip
= kvm_get_guest_ip
,
5546 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5548 __this_cpu_write(current_vcpu
, vcpu
);
5550 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5552 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5554 __this_cpu_write(current_vcpu
, NULL
);
5556 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5558 static void kvm_set_mmio_spte_mask(void)
5561 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5564 * Set the reserved bits and the present bit of an paging-structure
5565 * entry to generate page fault with PFER.RSV = 1.
5567 /* Mask the reserved physical address bits. */
5568 mask
= rsvd_bits(maxphyaddr
, 51);
5570 /* Bit 62 is always reserved for 32bit host. */
5571 mask
|= 0x3ull
<< 62;
5573 /* Set the present bit. */
5576 #ifdef CONFIG_X86_64
5578 * If reserved bit is not supported, clear the present bit to disable
5581 if (maxphyaddr
== 52)
5585 kvm_mmu_set_mmio_spte_mask(mask
);
5588 #ifdef CONFIG_X86_64
5589 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5593 struct kvm_vcpu
*vcpu
;
5596 spin_lock(&kvm_lock
);
5597 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5598 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5599 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5600 atomic_set(&kvm_guest_has_master_clock
, 0);
5601 spin_unlock(&kvm_lock
);
5604 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5607 * Notification about pvclock gtod data update.
5609 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5612 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5613 struct timekeeper
*tk
= priv
;
5615 update_pvclock_gtod(tk
);
5617 /* disable master clock if host does not trust, or does not
5618 * use, TSC clocksource
5620 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5621 atomic_read(&kvm_guest_has_master_clock
) != 0)
5622 queue_work(system_long_wq
, &pvclock_gtod_work
);
5627 static struct notifier_block pvclock_gtod_notifier
= {
5628 .notifier_call
= pvclock_gtod_notify
,
5632 int kvm_arch_init(void *opaque
)
5635 struct kvm_x86_ops
*ops
= opaque
;
5638 printk(KERN_ERR
"kvm: already loaded the other module\n");
5643 if (!ops
->cpu_has_kvm_support()) {
5644 printk(KERN_ERR
"kvm: no hardware support\n");
5648 if (ops
->disabled_by_bios()) {
5649 printk(KERN_ERR
"kvm: disabled by bios\n");
5655 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5657 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5661 r
= kvm_mmu_module_init();
5663 goto out_free_percpu
;
5665 kvm_set_mmio_spte_mask();
5669 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5670 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5674 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5677 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5680 #ifdef CONFIG_X86_64
5681 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5687 free_percpu(shared_msrs
);
5692 void kvm_arch_exit(void)
5694 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5696 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5697 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5698 CPUFREQ_TRANSITION_NOTIFIER
);
5699 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5700 #ifdef CONFIG_X86_64
5701 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5704 kvm_mmu_module_exit();
5705 free_percpu(shared_msrs
);
5708 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5710 ++vcpu
->stat
.halt_exits
;
5711 if (lapic_in_kernel(vcpu
)) {
5712 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5715 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5719 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5721 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5723 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5724 return kvm_vcpu_halt(vcpu
);
5726 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5729 * kvm_pv_kick_cpu_op: Kick a vcpu.
5731 * @apicid - apicid of vcpu to be kicked.
5733 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5735 struct kvm_lapic_irq lapic_irq
;
5737 lapic_irq
.shorthand
= 0;
5738 lapic_irq
.dest_mode
= 0;
5739 lapic_irq
.dest_id
= apicid
;
5740 lapic_irq
.msi_redir_hint
= false;
5742 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5743 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
5746 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5748 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5749 int op_64_bit
, r
= 1;
5751 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5753 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5754 return kvm_hv_hypercall(vcpu
);
5756 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5757 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5758 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5759 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5760 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5762 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5764 op_64_bit
= is_64_bit_mode(vcpu
);
5773 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5779 case KVM_HC_VAPIC_POLL_IRQ
:
5782 case KVM_HC_KICK_CPU
:
5783 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5793 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5794 ++vcpu
->stat
.hypercalls
;
5797 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5799 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5801 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5802 char instruction
[3];
5803 unsigned long rip
= kvm_rip_read(vcpu
);
5805 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5807 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5811 * Check if userspace requested an interrupt window, and that the
5812 * interrupt window is open.
5814 * No need to exit to userspace if we already have an interrupt queued.
5816 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5818 if (!vcpu
->run
->request_interrupt_window
|| pic_in_kernel(vcpu
->kvm
))
5821 if (kvm_cpu_has_interrupt(vcpu
))
5824 return (irqchip_split(vcpu
->kvm
)
5825 ? kvm_apic_accept_pic_intr(vcpu
)
5826 : kvm_arch_interrupt_allowed(vcpu
));
5829 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5831 struct kvm_run
*kvm_run
= vcpu
->run
;
5833 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5834 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
5835 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5836 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5837 if (!irqchip_in_kernel(vcpu
->kvm
))
5838 kvm_run
->ready_for_interrupt_injection
=
5839 kvm_arch_interrupt_allowed(vcpu
) &&
5840 !kvm_cpu_has_interrupt(vcpu
) &&
5841 !kvm_event_needs_reinjection(vcpu
);
5842 else if (!pic_in_kernel(vcpu
->kvm
))
5843 kvm_run
->ready_for_interrupt_injection
=
5844 kvm_apic_accept_pic_intr(vcpu
) &&
5845 !kvm_cpu_has_interrupt(vcpu
);
5847 kvm_run
->ready_for_interrupt_injection
= 1;
5850 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5854 if (!kvm_x86_ops
->update_cr8_intercept
)
5857 if (!vcpu
->arch
.apic
)
5860 if (!vcpu
->arch
.apic
->vapic_addr
)
5861 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5868 tpr
= kvm_lapic_get_cr8(vcpu
);
5870 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5873 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
5877 /* try to reinject previous events if any */
5878 if (vcpu
->arch
.exception
.pending
) {
5879 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5880 vcpu
->arch
.exception
.has_error_code
,
5881 vcpu
->arch
.exception
.error_code
);
5883 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
5884 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
5887 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
5888 (vcpu
->arch
.dr7
& DR7_GD
)) {
5889 vcpu
->arch
.dr7
&= ~DR7_GD
;
5890 kvm_update_dr7(vcpu
);
5893 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5894 vcpu
->arch
.exception
.has_error_code
,
5895 vcpu
->arch
.exception
.error_code
,
5896 vcpu
->arch
.exception
.reinject
);
5900 if (vcpu
->arch
.nmi_injected
) {
5901 kvm_x86_ops
->set_nmi(vcpu
);
5905 if (vcpu
->arch
.interrupt
.pending
) {
5906 kvm_x86_ops
->set_irq(vcpu
);
5910 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5911 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5916 /* try to inject new event if pending */
5917 if (vcpu
->arch
.nmi_pending
) {
5918 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5919 --vcpu
->arch
.nmi_pending
;
5920 vcpu
->arch
.nmi_injected
= true;
5921 kvm_x86_ops
->set_nmi(vcpu
);
5923 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5925 * Because interrupts can be injected asynchronously, we are
5926 * calling check_nested_events again here to avoid a race condition.
5927 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5928 * proposal and current concerns. Perhaps we should be setting
5929 * KVM_REQ_EVENT only on certain events and not unconditionally?
5931 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5932 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5936 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5937 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5939 kvm_x86_ops
->set_irq(vcpu
);
5945 static void process_nmi(struct kvm_vcpu
*vcpu
)
5950 * x86 is limited to one NMI running, and one NMI pending after it.
5951 * If an NMI is already in progress, limit further NMIs to just one.
5952 * Otherwise, allow two (and we'll inject the first one immediately).
5954 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5957 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5958 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5959 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5962 #define put_smstate(type, buf, offset, val) \
5963 *(type *)((buf) + (offset) - 0x7e00) = val
5965 static u32
process_smi_get_segment_flags(struct kvm_segment
*seg
)
5968 flags
|= seg
->g
<< 23;
5969 flags
|= seg
->db
<< 22;
5970 flags
|= seg
->l
<< 21;
5971 flags
|= seg
->avl
<< 20;
5972 flags
|= seg
->present
<< 15;
5973 flags
|= seg
->dpl
<< 13;
5974 flags
|= seg
->s
<< 12;
5975 flags
|= seg
->type
<< 8;
5979 static void process_smi_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
5981 struct kvm_segment seg
;
5984 kvm_get_segment(vcpu
, &seg
, n
);
5985 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
5988 offset
= 0x7f84 + n
* 12;
5990 offset
= 0x7f2c + (n
- 3) * 12;
5992 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
5993 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
5994 put_smstate(u32
, buf
, offset
, process_smi_get_segment_flags(&seg
));
5997 #ifdef CONFIG_X86_64
5998 static void process_smi_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6000 struct kvm_segment seg
;
6004 kvm_get_segment(vcpu
, &seg
, n
);
6005 offset
= 0x7e00 + n
* 16;
6007 flags
= process_smi_get_segment_flags(&seg
) >> 8;
6008 put_smstate(u16
, buf
, offset
, seg
.selector
);
6009 put_smstate(u16
, buf
, offset
+ 2, flags
);
6010 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6011 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6015 static void process_smi_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6018 struct kvm_segment seg
;
6022 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6023 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6024 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6025 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6027 for (i
= 0; i
< 8; i
++)
6028 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6030 kvm_get_dr(vcpu
, 6, &val
);
6031 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6032 kvm_get_dr(vcpu
, 7, &val
);
6033 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6035 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6036 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6037 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6038 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6039 put_smstate(u32
, buf
, 0x7f5c, process_smi_get_segment_flags(&seg
));
6041 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6042 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6043 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6044 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6045 put_smstate(u32
, buf
, 0x7f78, process_smi_get_segment_flags(&seg
));
6047 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6048 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6049 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6051 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6052 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6053 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6055 for (i
= 0; i
< 6; i
++)
6056 process_smi_save_seg_32(vcpu
, buf
, i
);
6058 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6061 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6062 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6065 static void process_smi_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6067 #ifdef CONFIG_X86_64
6069 struct kvm_segment seg
;
6073 for (i
= 0; i
< 16; i
++)
6074 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6076 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6077 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6079 kvm_get_dr(vcpu
, 6, &val
);
6080 put_smstate(u64
, buf
, 0x7f68, val
);
6081 kvm_get_dr(vcpu
, 7, &val
);
6082 put_smstate(u64
, buf
, 0x7f60, val
);
6084 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6085 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6086 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6088 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6091 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6093 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6095 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6096 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6097 put_smstate(u16
, buf
, 0x7e92, process_smi_get_segment_flags(&seg
) >> 8);
6098 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6099 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6101 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6102 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6103 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6105 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6106 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6107 put_smstate(u16
, buf
, 0x7e72, process_smi_get_segment_flags(&seg
) >> 8);
6108 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6109 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6111 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6112 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6113 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6115 for (i
= 0; i
< 6; i
++)
6116 process_smi_save_seg_64(vcpu
, buf
, i
);
6122 static void process_smi(struct kvm_vcpu
*vcpu
)
6124 struct kvm_segment cs
, ds
;
6130 vcpu
->arch
.smi_pending
= true;
6134 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6135 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6136 memset(buf
, 0, 512);
6137 if (guest_cpuid_has_longmode(vcpu
))
6138 process_smi_save_state_64(vcpu
, buf
);
6140 process_smi_save_state_32(vcpu
, buf
);
6142 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6144 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6145 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6147 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6149 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6150 kvm_rip_write(vcpu
, 0x8000);
6152 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6153 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6154 vcpu
->arch
.cr0
= cr0
;
6156 kvm_x86_ops
->set_cr4(vcpu
, 0);
6158 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6159 dt
.address
= dt
.size
= 0;
6160 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6162 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6164 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6165 cs
.base
= vcpu
->arch
.smbase
;
6170 cs
.limit
= ds
.limit
= 0xffffffff;
6171 cs
.type
= ds
.type
= 0x3;
6172 cs
.dpl
= ds
.dpl
= 0;
6177 cs
.avl
= ds
.avl
= 0;
6178 cs
.present
= ds
.present
= 1;
6179 cs
.unusable
= ds
.unusable
= 0;
6180 cs
.padding
= ds
.padding
= 0;
6182 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6183 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6184 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6185 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6186 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6187 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6189 if (guest_cpuid_has_longmode(vcpu
))
6190 kvm_x86_ops
->set_efer(vcpu
, 0);
6192 kvm_update_cpuid(vcpu
);
6193 kvm_mmu_reset_context(vcpu
);
6196 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6198 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6201 memset(vcpu
->arch
.eoi_exit_bitmap
, 0, 256 / 8);
6203 if (irqchip_split(vcpu
->kvm
))
6204 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.eoi_exit_bitmap
);
6206 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6207 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.eoi_exit_bitmap
);
6209 kvm_x86_ops
->load_eoi_exitmap(vcpu
);
6212 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6214 ++vcpu
->stat
.tlb_flush
;
6215 kvm_x86_ops
->tlb_flush(vcpu
);
6218 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6220 struct page
*page
= NULL
;
6222 if (!lapic_in_kernel(vcpu
))
6225 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6228 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6229 if (is_error_page(page
))
6231 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6234 * Do not pin apic access page in memory, the MMU notifier
6235 * will call us again if it is migrated or swapped out.
6239 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6241 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6242 unsigned long address
)
6245 * The physical address of apic access page is stored in the VMCS.
6246 * Update it when it becomes invalid.
6248 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6249 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6253 * Returns 1 to let vcpu_run() continue the guest execution loop without
6254 * exiting to the userspace. Otherwise, the value will be returned to the
6257 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6260 bool req_int_win
= !lapic_in_kernel(vcpu
) &&
6261 vcpu
->run
->request_interrupt_window
;
6262 bool req_immediate_exit
= false;
6264 if (vcpu
->requests
) {
6265 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6266 kvm_mmu_unload(vcpu
);
6267 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6268 __kvm_migrate_timers(vcpu
);
6269 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6270 kvm_gen_update_masterclock(vcpu
->kvm
);
6271 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6272 kvm_gen_kvmclock_update(vcpu
);
6273 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6274 r
= kvm_guest_time_update(vcpu
);
6278 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6279 kvm_mmu_sync_roots(vcpu
);
6280 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6281 kvm_vcpu_flush_tlb(vcpu
);
6282 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6283 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6287 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6288 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6292 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6293 vcpu
->fpu_active
= 0;
6294 kvm_x86_ops
->fpu_deactivate(vcpu
);
6296 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6297 /* Page is swapped out. Do synthetic halt */
6298 vcpu
->arch
.apf
.halted
= true;
6302 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6303 record_steal_time(vcpu
);
6304 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6306 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6308 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6309 kvm_pmu_handle_event(vcpu
);
6310 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6311 kvm_pmu_deliver_pmi(vcpu
);
6312 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6313 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6314 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6315 (void *) vcpu
->arch
.eoi_exit_bitmap
)) {
6316 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6317 vcpu
->run
->eoi
.vector
=
6318 vcpu
->arch
.pending_ioapic_eoi
;
6323 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6324 vcpu_scan_ioapic(vcpu
);
6325 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6326 kvm_vcpu_reload_apic_access_page(vcpu
);
6327 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6328 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6329 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6333 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6334 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6335 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6342 * KVM_REQ_EVENT is not set when posted interrupts are set by
6343 * VT-d hardware, so we have to update RVI unconditionally.
6345 if (kvm_lapic_enabled(vcpu
)) {
6347 * Update architecture specific hints for APIC
6348 * virtual interrupt delivery.
6350 if (kvm_x86_ops
->hwapic_irr_update
)
6351 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6352 kvm_lapic_find_highest_irr(vcpu
));
6355 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6356 kvm_apic_accept_events(vcpu
);
6357 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6362 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6363 req_immediate_exit
= true;
6364 /* enable NMI/IRQ window open exits if needed */
6365 else if (vcpu
->arch
.nmi_pending
)
6366 kvm_x86_ops
->enable_nmi_window(vcpu
);
6367 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6368 kvm_x86_ops
->enable_irq_window(vcpu
);
6370 if (kvm_lapic_enabled(vcpu
)) {
6371 update_cr8_intercept(vcpu
);
6372 kvm_lapic_sync_to_vapic(vcpu
);
6376 r
= kvm_mmu_reload(vcpu
);
6378 goto cancel_injection
;
6383 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6384 if (vcpu
->fpu_active
)
6385 kvm_load_guest_fpu(vcpu
);
6386 kvm_load_guest_xcr0(vcpu
);
6388 vcpu
->mode
= IN_GUEST_MODE
;
6390 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6392 /* We should set ->mode before check ->requests,
6393 * see the comment in make_all_cpus_request.
6395 smp_mb__after_srcu_read_unlock();
6397 local_irq_disable();
6399 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6400 || need_resched() || signal_pending(current
)) {
6401 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6405 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6407 goto cancel_injection
;
6410 if (req_immediate_exit
)
6411 smp_send_reschedule(vcpu
->cpu
);
6413 __kvm_guest_enter();
6415 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6417 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6418 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6419 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6420 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6421 set_debugreg(vcpu
->arch
.dr6
, 6);
6422 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6425 trace_kvm_entry(vcpu
->vcpu_id
);
6426 wait_lapic_expire(vcpu
);
6427 kvm_x86_ops
->run(vcpu
);
6430 * Do this here before restoring debug registers on the host. And
6431 * since we do this before handling the vmexit, a DR access vmexit
6432 * can (a) read the correct value of the debug registers, (b) set
6433 * KVM_DEBUGREG_WONT_EXIT again.
6435 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6438 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6439 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6440 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6441 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6445 * If the guest has used debug registers, at least dr7
6446 * will be disabled while returning to the host.
6447 * If we don't have active breakpoints in the host, we don't
6448 * care about the messed up debug address registers. But if
6449 * we have some of them active, restore the old state.
6451 if (hw_breakpoint_active())
6452 hw_breakpoint_restore();
6454 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6457 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6460 /* Interrupt is enabled by handle_external_intr() */
6461 kvm_x86_ops
->handle_external_intr(vcpu
);
6466 * We must have an instruction between local_irq_enable() and
6467 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6468 * the interrupt shadow. The stat.exits increment will do nicely.
6469 * But we need to prevent reordering, hence this barrier():
6477 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6480 * Profile KVM exit RIPs:
6482 if (unlikely(prof_on
== KVM_PROFILING
)) {
6483 unsigned long rip
= kvm_rip_read(vcpu
);
6484 profile_hit(KVM_PROFILING
, (void *)rip
);
6487 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6488 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6490 if (vcpu
->arch
.apic_attention
)
6491 kvm_lapic_sync_from_vapic(vcpu
);
6493 r
= kvm_x86_ops
->handle_exit(vcpu
);
6497 kvm_x86_ops
->cancel_injection(vcpu
);
6498 if (unlikely(vcpu
->arch
.apic_attention
))
6499 kvm_lapic_sync_from_vapic(vcpu
);
6504 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6506 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6507 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6508 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6509 kvm_vcpu_block(vcpu
);
6510 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6512 if (kvm_x86_ops
->post_block
)
6513 kvm_x86_ops
->post_block(vcpu
);
6515 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6519 kvm_apic_accept_events(vcpu
);
6520 switch(vcpu
->arch
.mp_state
) {
6521 case KVM_MP_STATE_HALTED
:
6522 vcpu
->arch
.pv
.pv_unhalted
= false;
6523 vcpu
->arch
.mp_state
=
6524 KVM_MP_STATE_RUNNABLE
;
6525 case KVM_MP_STATE_RUNNABLE
:
6526 vcpu
->arch
.apf
.halted
= false;
6528 case KVM_MP_STATE_INIT_RECEIVED
:
6537 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
6539 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6540 !vcpu
->arch
.apf
.halted
);
6543 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6546 struct kvm
*kvm
= vcpu
->kvm
;
6548 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6551 if (kvm_vcpu_running(vcpu
)) {
6552 r
= vcpu_enter_guest(vcpu
);
6554 r
= vcpu_block(kvm
, vcpu
);
6560 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6561 if (kvm_cpu_has_pending_timer(vcpu
))
6562 kvm_inject_pending_timer_irqs(vcpu
);
6564 if (dm_request_for_irq_injection(vcpu
)) {
6566 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
6567 ++vcpu
->stat
.request_irq_exits
;
6571 kvm_check_async_pf_completion(vcpu
);
6573 if (signal_pending(current
)) {
6575 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6576 ++vcpu
->stat
.signal_exits
;
6579 if (need_resched()) {
6580 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6582 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6586 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6591 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6594 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6595 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6596 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6597 if (r
!= EMULATE_DONE
)
6602 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6604 BUG_ON(!vcpu
->arch
.pio
.count
);
6606 return complete_emulated_io(vcpu
);
6610 * Implements the following, as a state machine:
6614 * for each mmio piece in the fragment
6622 * for each mmio piece in the fragment
6627 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6629 struct kvm_run
*run
= vcpu
->run
;
6630 struct kvm_mmio_fragment
*frag
;
6633 BUG_ON(!vcpu
->mmio_needed
);
6635 /* Complete previous fragment */
6636 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6637 len
= min(8u, frag
->len
);
6638 if (!vcpu
->mmio_is_write
)
6639 memcpy(frag
->data
, run
->mmio
.data
, len
);
6641 if (frag
->len
<= 8) {
6642 /* Switch to the next fragment. */
6644 vcpu
->mmio_cur_fragment
++;
6646 /* Go forward to the next mmio piece. */
6652 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6653 vcpu
->mmio_needed
= 0;
6655 /* FIXME: return into emulator if single-stepping. */
6656 if (vcpu
->mmio_is_write
)
6658 vcpu
->mmio_read_completed
= 1;
6659 return complete_emulated_io(vcpu
);
6662 run
->exit_reason
= KVM_EXIT_MMIO
;
6663 run
->mmio
.phys_addr
= frag
->gpa
;
6664 if (vcpu
->mmio_is_write
)
6665 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6666 run
->mmio
.len
= min(8u, frag
->len
);
6667 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6668 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6673 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6675 struct fpu
*fpu
= ¤t
->thread
.fpu
;
6679 fpu__activate_curr(fpu
);
6681 if (vcpu
->sigset_active
)
6682 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6684 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6685 kvm_vcpu_block(vcpu
);
6686 kvm_apic_accept_events(vcpu
);
6687 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6692 /* re-sync apic's tpr */
6693 if (!lapic_in_kernel(vcpu
)) {
6694 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6700 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6701 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6702 vcpu
->arch
.complete_userspace_io
= NULL
;
6707 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6712 post_kvm_run_save(vcpu
);
6713 if (vcpu
->sigset_active
)
6714 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6719 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6721 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6723 * We are here if userspace calls get_regs() in the middle of
6724 * instruction emulation. Registers state needs to be copied
6725 * back from emulation context to vcpu. Userspace shouldn't do
6726 * that usually, but some bad designed PV devices (vmware
6727 * backdoor interface) need this to work
6729 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6730 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6732 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6733 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6734 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6735 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6736 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6737 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6738 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6739 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6740 #ifdef CONFIG_X86_64
6741 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6742 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6743 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6744 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6745 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6746 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6747 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6748 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6751 regs
->rip
= kvm_rip_read(vcpu
);
6752 regs
->rflags
= kvm_get_rflags(vcpu
);
6757 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6759 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6760 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6762 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6763 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6764 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6765 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6766 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6767 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6768 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6769 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6770 #ifdef CONFIG_X86_64
6771 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6772 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6773 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6774 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6775 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6776 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6777 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6778 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6781 kvm_rip_write(vcpu
, regs
->rip
);
6782 kvm_set_rflags(vcpu
, regs
->rflags
);
6784 vcpu
->arch
.exception
.pending
= false;
6786 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6791 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6793 struct kvm_segment cs
;
6795 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6799 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6801 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6802 struct kvm_sregs
*sregs
)
6806 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6807 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6808 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6809 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6810 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6811 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6813 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6814 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6816 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6817 sregs
->idt
.limit
= dt
.size
;
6818 sregs
->idt
.base
= dt
.address
;
6819 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6820 sregs
->gdt
.limit
= dt
.size
;
6821 sregs
->gdt
.base
= dt
.address
;
6823 sregs
->cr0
= kvm_read_cr0(vcpu
);
6824 sregs
->cr2
= vcpu
->arch
.cr2
;
6825 sregs
->cr3
= kvm_read_cr3(vcpu
);
6826 sregs
->cr4
= kvm_read_cr4(vcpu
);
6827 sregs
->cr8
= kvm_get_cr8(vcpu
);
6828 sregs
->efer
= vcpu
->arch
.efer
;
6829 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6831 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6833 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6834 set_bit(vcpu
->arch
.interrupt
.nr
,
6835 (unsigned long *)sregs
->interrupt_bitmap
);
6840 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6841 struct kvm_mp_state
*mp_state
)
6843 kvm_apic_accept_events(vcpu
);
6844 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6845 vcpu
->arch
.pv
.pv_unhalted
)
6846 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6848 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6853 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6854 struct kvm_mp_state
*mp_state
)
6856 if (!kvm_vcpu_has_lapic(vcpu
) &&
6857 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6860 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6861 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6862 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6864 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6865 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6869 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6870 int reason
, bool has_error_code
, u32 error_code
)
6872 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6875 init_emulate_ctxt(vcpu
);
6877 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6878 has_error_code
, error_code
);
6881 return EMULATE_FAIL
;
6883 kvm_rip_write(vcpu
, ctxt
->eip
);
6884 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6885 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6886 return EMULATE_DONE
;
6888 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6890 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6891 struct kvm_sregs
*sregs
)
6893 struct msr_data apic_base_msr
;
6894 int mmu_reset_needed
= 0;
6895 int pending_vec
, max_bits
, idx
;
6898 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6901 dt
.size
= sregs
->idt
.limit
;
6902 dt
.address
= sregs
->idt
.base
;
6903 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6904 dt
.size
= sregs
->gdt
.limit
;
6905 dt
.address
= sregs
->gdt
.base
;
6906 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6908 vcpu
->arch
.cr2
= sregs
->cr2
;
6909 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6910 vcpu
->arch
.cr3
= sregs
->cr3
;
6911 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6913 kvm_set_cr8(vcpu
, sregs
->cr8
);
6915 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6916 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6917 apic_base_msr
.data
= sregs
->apic_base
;
6918 apic_base_msr
.host_initiated
= true;
6919 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6921 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6922 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6923 vcpu
->arch
.cr0
= sregs
->cr0
;
6925 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6926 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6927 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6928 kvm_update_cpuid(vcpu
);
6930 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6931 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6932 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6933 mmu_reset_needed
= 1;
6935 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6937 if (mmu_reset_needed
)
6938 kvm_mmu_reset_context(vcpu
);
6940 max_bits
= KVM_NR_INTERRUPTS
;
6941 pending_vec
= find_first_bit(
6942 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6943 if (pending_vec
< max_bits
) {
6944 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6945 pr_debug("Set back pending irq %d\n", pending_vec
);
6948 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6949 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6950 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6951 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6952 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6953 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6955 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6956 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6958 update_cr8_intercept(vcpu
);
6960 /* Older userspace won't unhalt the vcpu on reset. */
6961 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6962 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6964 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6966 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6971 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6972 struct kvm_guest_debug
*dbg
)
6974 unsigned long rflags
;
6977 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6979 if (vcpu
->arch
.exception
.pending
)
6981 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6982 kvm_queue_exception(vcpu
, DB_VECTOR
);
6984 kvm_queue_exception(vcpu
, BP_VECTOR
);
6988 * Read rflags as long as potentially injected trace flags are still
6991 rflags
= kvm_get_rflags(vcpu
);
6993 vcpu
->guest_debug
= dbg
->control
;
6994 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6995 vcpu
->guest_debug
= 0;
6997 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6998 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6999 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7000 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7002 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7003 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7005 kvm_update_dr7(vcpu
);
7007 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7008 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7009 get_segment_base(vcpu
, VCPU_SREG_CS
);
7012 * Trigger an rflags update that will inject or remove the trace
7015 kvm_set_rflags(vcpu
, rflags
);
7017 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
7027 * Translate a guest virtual address to a guest physical address.
7029 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7030 struct kvm_translation
*tr
)
7032 unsigned long vaddr
= tr
->linear_address
;
7036 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7037 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7038 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7039 tr
->physical_address
= gpa
;
7040 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7047 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7049 struct fxregs_state
*fxsave
=
7050 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7052 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7053 fpu
->fcw
= fxsave
->cwd
;
7054 fpu
->fsw
= fxsave
->swd
;
7055 fpu
->ftwx
= fxsave
->twd
;
7056 fpu
->last_opcode
= fxsave
->fop
;
7057 fpu
->last_ip
= fxsave
->rip
;
7058 fpu
->last_dp
= fxsave
->rdp
;
7059 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7064 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7066 struct fxregs_state
*fxsave
=
7067 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7069 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7070 fxsave
->cwd
= fpu
->fcw
;
7071 fxsave
->swd
= fpu
->fsw
;
7072 fxsave
->twd
= fpu
->ftwx
;
7073 fxsave
->fop
= fpu
->last_opcode
;
7074 fxsave
->rip
= fpu
->last_ip
;
7075 fxsave
->rdp
= fpu
->last_dp
;
7076 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7081 static void fx_init(struct kvm_vcpu
*vcpu
)
7083 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7085 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7086 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7089 * Ensure guest xcr0 is valid for loading
7091 vcpu
->arch
.xcr0
= XSTATE_FP
;
7093 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7096 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7098 if (vcpu
->guest_fpu_loaded
)
7102 * Restore all possible states in the guest,
7103 * and assume host would use all available bits.
7104 * Guest xcr0 would be loaded later.
7106 kvm_put_guest_xcr0(vcpu
);
7107 vcpu
->guest_fpu_loaded
= 1;
7108 __kernel_fpu_begin();
7109 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7113 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7115 kvm_put_guest_xcr0(vcpu
);
7117 if (!vcpu
->guest_fpu_loaded
) {
7118 vcpu
->fpu_counter
= 0;
7122 vcpu
->guest_fpu_loaded
= 0;
7123 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7125 ++vcpu
->stat
.fpu_reload
;
7127 * If using eager FPU mode, or if the guest is a frequent user
7128 * of the FPU, just leave the FPU active for next time.
7129 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7130 * the FPU in bursts will revert to loading it on demand.
7132 if (!vcpu
->arch
.eager_fpu
) {
7133 if (++vcpu
->fpu_counter
< 5)
7134 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7139 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7141 kvmclock_reset(vcpu
);
7143 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7144 kvm_x86_ops
->vcpu_free(vcpu
);
7147 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7150 struct kvm_vcpu
*vcpu
;
7152 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7153 printk_once(KERN_WARNING
7154 "kvm: SMP vm created on host with unstable TSC; "
7155 "guest TSC will not be reliable\n");
7157 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7162 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7166 kvm_vcpu_mtrr_init(vcpu
);
7167 r
= vcpu_load(vcpu
);
7170 kvm_vcpu_reset(vcpu
, false);
7171 kvm_mmu_setup(vcpu
);
7176 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7178 struct msr_data msr
;
7179 struct kvm
*kvm
= vcpu
->kvm
;
7181 if (vcpu_load(vcpu
))
7184 msr
.index
= MSR_IA32_TSC
;
7185 msr
.host_initiated
= true;
7186 kvm_write_tsc(vcpu
, &msr
);
7189 if (!kvmclock_periodic_sync
)
7192 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7193 KVMCLOCK_SYNC_PERIOD
);
7196 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7199 vcpu
->arch
.apf
.msr_val
= 0;
7201 r
= vcpu_load(vcpu
);
7203 kvm_mmu_unload(vcpu
);
7206 kvm_x86_ops
->vcpu_free(vcpu
);
7209 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7211 vcpu
->arch
.hflags
= 0;
7213 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7214 vcpu
->arch
.nmi_pending
= 0;
7215 vcpu
->arch
.nmi_injected
= false;
7216 kvm_clear_interrupt_queue(vcpu
);
7217 kvm_clear_exception_queue(vcpu
);
7219 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7220 kvm_update_dr0123(vcpu
);
7221 vcpu
->arch
.dr6
= DR6_INIT
;
7222 kvm_update_dr6(vcpu
);
7223 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7224 kvm_update_dr7(vcpu
);
7228 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7229 vcpu
->arch
.apf
.msr_val
= 0;
7230 vcpu
->arch
.st
.msr_val
= 0;
7232 kvmclock_reset(vcpu
);
7234 kvm_clear_async_pf_completion_queue(vcpu
);
7235 kvm_async_pf_hash_reset(vcpu
);
7236 vcpu
->arch
.apf
.halted
= false;
7239 kvm_pmu_reset(vcpu
);
7240 vcpu
->arch
.smbase
= 0x30000;
7243 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7244 vcpu
->arch
.regs_avail
= ~0;
7245 vcpu
->arch
.regs_dirty
= ~0;
7247 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7250 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7252 struct kvm_segment cs
;
7254 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7255 cs
.selector
= vector
<< 8;
7256 cs
.base
= vector
<< 12;
7257 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7258 kvm_rip_write(vcpu
, 0);
7261 int kvm_arch_hardware_enable(void)
7264 struct kvm_vcpu
*vcpu
;
7269 bool stable
, backwards_tsc
= false;
7271 kvm_shared_msr_cpu_online();
7272 ret
= kvm_x86_ops
->hardware_enable();
7276 local_tsc
= rdtsc();
7277 stable
= !check_tsc_unstable();
7278 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7279 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7280 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7281 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7282 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7283 backwards_tsc
= true;
7284 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7285 max_tsc
= vcpu
->arch
.last_host_tsc
;
7291 * Sometimes, even reliable TSCs go backwards. This happens on
7292 * platforms that reset TSC during suspend or hibernate actions, but
7293 * maintain synchronization. We must compensate. Fortunately, we can
7294 * detect that condition here, which happens early in CPU bringup,
7295 * before any KVM threads can be running. Unfortunately, we can't
7296 * bring the TSCs fully up to date with real time, as we aren't yet far
7297 * enough into CPU bringup that we know how much real time has actually
7298 * elapsed; our helper function, get_kernel_ns() will be using boot
7299 * variables that haven't been updated yet.
7301 * So we simply find the maximum observed TSC above, then record the
7302 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7303 * the adjustment will be applied. Note that we accumulate
7304 * adjustments, in case multiple suspend cycles happen before some VCPU
7305 * gets a chance to run again. In the event that no KVM threads get a
7306 * chance to run, we will miss the entire elapsed period, as we'll have
7307 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7308 * loose cycle time. This isn't too big a deal, since the loss will be
7309 * uniform across all VCPUs (not to mention the scenario is extremely
7310 * unlikely). It is possible that a second hibernate recovery happens
7311 * much faster than a first, causing the observed TSC here to be
7312 * smaller; this would require additional padding adjustment, which is
7313 * why we set last_host_tsc to the local tsc observed here.
7315 * N.B. - this code below runs only on platforms with reliable TSC,
7316 * as that is the only way backwards_tsc is set above. Also note
7317 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7318 * have the same delta_cyc adjustment applied if backwards_tsc
7319 * is detected. Note further, this adjustment is only done once,
7320 * as we reset last_host_tsc on all VCPUs to stop this from being
7321 * called multiple times (one for each physical CPU bringup).
7323 * Platforms with unreliable TSCs don't have to deal with this, they
7324 * will be compensated by the logic in vcpu_load, which sets the TSC to
7325 * catchup mode. This will catchup all VCPUs to real time, but cannot
7326 * guarantee that they stay in perfect synchronization.
7328 if (backwards_tsc
) {
7329 u64 delta_cyc
= max_tsc
- local_tsc
;
7330 backwards_tsc_observed
= true;
7331 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7332 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7333 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7334 vcpu
->arch
.last_host_tsc
= local_tsc
;
7335 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7339 * We have to disable TSC offset matching.. if you were
7340 * booting a VM while issuing an S4 host suspend....
7341 * you may have some problem. Solving this issue is
7342 * left as an exercise to the reader.
7344 kvm
->arch
.last_tsc_nsec
= 0;
7345 kvm
->arch
.last_tsc_write
= 0;
7352 void kvm_arch_hardware_disable(void)
7354 kvm_x86_ops
->hardware_disable();
7355 drop_user_return_notifiers();
7358 int kvm_arch_hardware_setup(void)
7362 r
= kvm_x86_ops
->hardware_setup();
7366 kvm_init_msr_list();
7370 void kvm_arch_hardware_unsetup(void)
7372 kvm_x86_ops
->hardware_unsetup();
7375 void kvm_arch_check_processor_compat(void *rtn
)
7377 kvm_x86_ops
->check_processor_compatibility(rtn
);
7380 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7382 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7384 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7386 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7388 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7391 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7393 return irqchip_in_kernel(vcpu
->kvm
) == lapic_in_kernel(vcpu
);
7396 struct static_key kvm_no_apic_vcpu __read_mostly
;
7398 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7404 BUG_ON(vcpu
->kvm
== NULL
);
7407 vcpu
->arch
.pv
.pv_unhalted
= false;
7408 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7409 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7410 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7412 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7414 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7419 vcpu
->arch
.pio_data
= page_address(page
);
7421 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7423 r
= kvm_mmu_create(vcpu
);
7425 goto fail_free_pio_data
;
7427 if (irqchip_in_kernel(kvm
)) {
7428 r
= kvm_create_lapic(vcpu
);
7430 goto fail_mmu_destroy
;
7432 static_key_slow_inc(&kvm_no_apic_vcpu
);
7434 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7436 if (!vcpu
->arch
.mce_banks
) {
7438 goto fail_free_lapic
;
7440 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7442 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7444 goto fail_free_mce_banks
;
7449 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7450 vcpu
->arch
.pv_time_enabled
= false;
7452 vcpu
->arch
.guest_supported_xcr0
= 0;
7453 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7455 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7457 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7459 kvm_async_pf_hash_reset(vcpu
);
7462 vcpu
->arch
.pending_external_vector
= -1;
7466 fail_free_mce_banks
:
7467 kfree(vcpu
->arch
.mce_banks
);
7469 kvm_free_lapic(vcpu
);
7471 kvm_mmu_destroy(vcpu
);
7473 free_page((unsigned long)vcpu
->arch
.pio_data
);
7478 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7482 kvm_pmu_destroy(vcpu
);
7483 kfree(vcpu
->arch
.mce_banks
);
7484 kvm_free_lapic(vcpu
);
7485 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7486 kvm_mmu_destroy(vcpu
);
7487 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7488 free_page((unsigned long)vcpu
->arch
.pio_data
);
7489 if (!lapic_in_kernel(vcpu
))
7490 static_key_slow_dec(&kvm_no_apic_vcpu
);
7493 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7495 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7498 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7503 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7504 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7505 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7506 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7507 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7509 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7510 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7511 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7512 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7513 &kvm
->arch
.irq_sources_bitmap
);
7515 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7516 mutex_init(&kvm
->arch
.apic_map_lock
);
7517 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7519 pvclock_update_vm_gtod_copy(kvm
);
7521 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7522 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7527 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7530 r
= vcpu_load(vcpu
);
7532 kvm_mmu_unload(vcpu
);
7536 static void kvm_free_vcpus(struct kvm
*kvm
)
7539 struct kvm_vcpu
*vcpu
;
7542 * Unpin any mmu pages first.
7544 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7545 kvm_clear_async_pf_completion_queue(vcpu
);
7546 kvm_unload_vcpu_mmu(vcpu
);
7548 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7549 kvm_arch_vcpu_free(vcpu
);
7551 mutex_lock(&kvm
->lock
);
7552 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7553 kvm
->vcpus
[i
] = NULL
;
7555 atomic_set(&kvm
->online_vcpus
, 0);
7556 mutex_unlock(&kvm
->lock
);
7559 void kvm_arch_sync_events(struct kvm
*kvm
)
7561 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7562 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7563 kvm_free_all_assigned_devices(kvm
);
7567 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7571 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
7572 struct kvm_memory_slot
*slot
, old
;
7574 /* Called with kvm->slots_lock held. */
7575 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
7578 slot
= id_to_memslot(slots
, id
);
7580 if (WARN_ON(slot
->npages
))
7584 * MAP_SHARED to prevent internal slot pages from being moved
7587 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
7588 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7589 if (IS_ERR((void *)hva
))
7590 return PTR_ERR((void *)hva
);
7599 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7600 struct kvm_userspace_memory_region m
;
7602 m
.slot
= id
| (i
<< 16);
7604 m
.guest_phys_addr
= gpa
;
7605 m
.userspace_addr
= hva
;
7606 m
.memory_size
= size
;
7607 r
= __kvm_set_memory_region(kvm
, &m
);
7613 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
7619 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
7621 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7625 mutex_lock(&kvm
->slots_lock
);
7626 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
7627 mutex_unlock(&kvm
->slots_lock
);
7631 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
7633 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7635 if (current
->mm
== kvm
->mm
) {
7637 * Free memory regions allocated on behalf of userspace,
7638 * unless the the memory map has changed due to process exit
7641 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
7642 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
7643 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
7645 kvm_iommu_unmap_guest(kvm
);
7646 kfree(kvm
->arch
.vpic
);
7647 kfree(kvm
->arch
.vioapic
);
7648 kvm_free_vcpus(kvm
);
7649 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7652 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7653 struct kvm_memory_slot
*dont
)
7657 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7658 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7659 kvfree(free
->arch
.rmap
[i
]);
7660 free
->arch
.rmap
[i
] = NULL
;
7665 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7666 dont
->arch
.lpage_info
[i
- 1]) {
7667 kvfree(free
->arch
.lpage_info
[i
- 1]);
7668 free
->arch
.lpage_info
[i
- 1] = NULL
;
7673 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7674 unsigned long npages
)
7678 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7683 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7684 slot
->base_gfn
, level
) + 1;
7686 slot
->arch
.rmap
[i
] =
7687 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7688 if (!slot
->arch
.rmap
[i
])
7693 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7694 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7695 if (!slot
->arch
.lpage_info
[i
- 1])
7698 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7699 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7700 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7701 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7702 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7704 * If the gfn and userspace address are not aligned wrt each
7705 * other, or if explicitly asked to, disable large page
7706 * support for this slot
7708 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7709 !kvm_largepages_enabled()) {
7712 for (j
= 0; j
< lpages
; ++j
)
7713 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7720 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7721 kvfree(slot
->arch
.rmap
[i
]);
7722 slot
->arch
.rmap
[i
] = NULL
;
7726 kvfree(slot
->arch
.lpage_info
[i
- 1]);
7727 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7732 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
7735 * memslots->generation has been incremented.
7736 * mmio generation may have reached its maximum value.
7738 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
7741 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7742 struct kvm_memory_slot
*memslot
,
7743 const struct kvm_userspace_memory_region
*mem
,
7744 enum kvm_mr_change change
)
7749 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
7750 struct kvm_memory_slot
*new)
7752 /* Still write protect RO slot */
7753 if (new->flags
& KVM_MEM_READONLY
) {
7754 kvm_mmu_slot_remove_write_access(kvm
, new);
7759 * Call kvm_x86_ops dirty logging hooks when they are valid.
7761 * kvm_x86_ops->slot_disable_log_dirty is called when:
7763 * - KVM_MR_CREATE with dirty logging is disabled
7764 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7766 * The reason is, in case of PML, we need to set D-bit for any slots
7767 * with dirty logging disabled in order to eliminate unnecessary GPA
7768 * logging in PML buffer (and potential PML buffer full VMEXT). This
7769 * guarantees leaving PML enabled during guest's lifetime won't have
7770 * any additonal overhead from PML when guest is running with dirty
7771 * logging disabled for memory slots.
7773 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7774 * to dirty logging mode.
7776 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7778 * In case of write protect:
7780 * Write protect all pages for dirty logging.
7782 * All the sptes including the large sptes which point to this
7783 * slot are set to readonly. We can not create any new large
7784 * spte on this slot until the end of the logging.
7786 * See the comments in fast_page_fault().
7788 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
7789 if (kvm_x86_ops
->slot_enable_log_dirty
)
7790 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
7792 kvm_mmu_slot_remove_write_access(kvm
, new);
7794 if (kvm_x86_ops
->slot_disable_log_dirty
)
7795 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
7799 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7800 const struct kvm_userspace_memory_region
*mem
,
7801 const struct kvm_memory_slot
*old
,
7802 const struct kvm_memory_slot
*new,
7803 enum kvm_mr_change change
)
7805 int nr_mmu_pages
= 0;
7807 if (!kvm
->arch
.n_requested_mmu_pages
)
7808 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7811 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7814 * Dirty logging tracks sptes in 4k granularity, meaning that large
7815 * sptes have to be split. If live migration is successful, the guest
7816 * in the source machine will be destroyed and large sptes will be
7817 * created in the destination. However, if the guest continues to run
7818 * in the source machine (for example if live migration fails), small
7819 * sptes will remain around and cause bad performance.
7821 * Scan sptes if dirty logging has been stopped, dropping those
7822 * which can be collapsed into a single large-page spte. Later
7823 * page faults will create the large-page sptes.
7825 if ((change
!= KVM_MR_DELETE
) &&
7826 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
7827 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7828 kvm_mmu_zap_collapsible_sptes(kvm
, new);
7831 * Set up write protection and/or dirty logging for the new slot.
7833 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7834 * been zapped so no dirty logging staff is needed for old slot. For
7835 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7836 * new and it's also covered when dealing with the new slot.
7838 * FIXME: const-ify all uses of struct kvm_memory_slot.
7840 if (change
!= KVM_MR_DELETE
)
7841 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
7844 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7846 kvm_mmu_invalidate_zap_all_pages(kvm
);
7849 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7850 struct kvm_memory_slot
*slot
)
7852 kvm_mmu_invalidate_zap_all_pages(kvm
);
7855 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
7857 if (!list_empty_careful(&vcpu
->async_pf
.done
))
7860 if (kvm_apic_has_events(vcpu
))
7863 if (vcpu
->arch
.pv
.pv_unhalted
)
7866 if (atomic_read(&vcpu
->arch
.nmi_queued
))
7869 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
7872 if (kvm_arch_interrupt_allowed(vcpu
) &&
7873 kvm_cpu_has_interrupt(vcpu
))
7879 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7881 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7882 kvm_x86_ops
->check_nested_events(vcpu
, false);
7884 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
7887 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7889 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7892 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7894 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7897 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
7899 if (is_64_bit_mode(vcpu
))
7900 return kvm_rip_read(vcpu
);
7901 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
7902 kvm_rip_read(vcpu
));
7904 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
7906 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7908 return kvm_get_linear_rip(vcpu
) == linear_rip
;
7910 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7912 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7914 unsigned long rflags
;
7916 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7917 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7918 rflags
&= ~X86_EFLAGS_TF
;
7921 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7923 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7925 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7926 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7927 rflags
|= X86_EFLAGS_TF
;
7928 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7931 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7933 __kvm_set_rflags(vcpu
, rflags
);
7934 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7936 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7938 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7942 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7946 r
= kvm_mmu_reload(vcpu
);
7950 if (!vcpu
->arch
.mmu
.direct_map
&&
7951 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7954 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7957 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7959 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7962 static inline u32
kvm_async_pf_next_probe(u32 key
)
7964 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7967 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7969 u32 key
= kvm_async_pf_hash_fn(gfn
);
7971 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7972 key
= kvm_async_pf_next_probe(key
);
7974 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7977 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7980 u32 key
= kvm_async_pf_hash_fn(gfn
);
7982 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7983 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7984 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7985 key
= kvm_async_pf_next_probe(key
);
7990 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7992 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7995 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7999 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8001 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8003 j
= kvm_async_pf_next_probe(j
);
8004 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8006 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8008 * k lies cyclically in ]i,j]
8010 * |....j i.k.| or |.k..j i...|
8012 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8013 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8018 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8021 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8025 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8026 struct kvm_async_pf
*work
)
8028 struct x86_exception fault
;
8030 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8031 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8033 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8034 (vcpu
->arch
.apf
.send_user_only
&&
8035 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8036 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8037 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8038 fault
.vector
= PF_VECTOR
;
8039 fault
.error_code_valid
= true;
8040 fault
.error_code
= 0;
8041 fault
.nested_page_fault
= false;
8042 fault
.address
= work
->arch
.token
;
8043 kvm_inject_page_fault(vcpu
, &fault
);
8047 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8048 struct kvm_async_pf
*work
)
8050 struct x86_exception fault
;
8052 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8053 if (work
->wakeup_all
)
8054 work
->arch
.token
= ~0; /* broadcast wakeup */
8056 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8058 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8059 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8060 fault
.vector
= PF_VECTOR
;
8061 fault
.error_code_valid
= true;
8062 fault
.error_code
= 0;
8063 fault
.nested_page_fault
= false;
8064 fault
.address
= work
->arch
.token
;
8065 kvm_inject_page_fault(vcpu
, &fault
);
8067 vcpu
->arch
.apf
.halted
= false;
8068 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8071 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8073 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8076 return !kvm_event_needs_reinjection(vcpu
) &&
8077 kvm_x86_ops
->interrupt_allowed(vcpu
);
8080 void kvm_arch_start_assignment(struct kvm
*kvm
)
8082 atomic_inc(&kvm
->arch
.assigned_device_count
);
8084 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8086 void kvm_arch_end_assignment(struct kvm
*kvm
)
8088 atomic_dec(&kvm
->arch
.assigned_device_count
);
8090 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8092 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8094 return atomic_read(&kvm
->arch
.assigned_device_count
);
8096 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8098 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8100 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8102 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8104 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8106 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8108 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8110 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8112 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8114 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8116 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8117 struct irq_bypass_producer
*prod
)
8119 struct kvm_kernel_irqfd
*irqfd
=
8120 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8122 if (kvm_x86_ops
->update_pi_irte
) {
8123 irqfd
->producer
= prod
;
8124 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8125 prod
->irq
, irqfd
->gsi
, 1);
8131 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8132 struct irq_bypass_producer
*prod
)
8135 struct kvm_kernel_irqfd
*irqfd
=
8136 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8138 if (!kvm_x86_ops
->update_pi_irte
) {
8139 WARN_ON(irqfd
->producer
!= NULL
);
8143 WARN_ON(irqfd
->producer
!= prod
);
8144 irqfd
->producer
= NULL
;
8147 * When producer of consumer is unregistered, we change back to
8148 * remapped mode, so we can re-use the current implementation
8149 * when the irq is masked/disabed or the consumer side (KVM
8150 * int this case doesn't want to receive the interrupts.
8152 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8154 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8155 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8158 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8159 uint32_t guest_irq
, bool set
)
8161 if (!kvm_x86_ops
->update_pi_irte
)
8164 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8167 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8168 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8169 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8170 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8171 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8172 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8173 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8174 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8175 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8176 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8177 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8178 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8179 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8180 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8181 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8182 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8183 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);