2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 static bool __read_mostly report_ignored_msrs
= true;
111 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
113 unsigned int min_timer_period_us
= 200;
114 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
116 static bool __read_mostly kvmclock_periodic_sync
= true;
117 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
119 bool __read_mostly kvm_has_tsc_control
;
120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
121 u32 __read_mostly kvm_max_guest_tsc_khz
;
122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
123 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
125 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
127 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
131 static u32 __read_mostly tsc_tolerance_ppm
= 250;
132 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
135 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
136 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
138 static bool __read_mostly vector_hashing
= true;
139 module_param(vector_hashing
, bool, S_IRUGO
);
141 #define KVM_NR_SHARED_MSRS 16
143 struct kvm_shared_msrs_global
{
145 u32 msrs
[KVM_NR_SHARED_MSRS
];
148 struct kvm_shared_msrs
{
149 struct user_return_notifier urn
;
151 struct kvm_shared_msr_values
{
154 } values
[KVM_NR_SHARED_MSRS
];
157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
158 static struct kvm_shared_msrs __percpu
*shared_msrs
;
160 struct kvm_stats_debugfs_item debugfs_entries
[] = {
161 { "pf_fixed", VCPU_STAT(pf_fixed
) },
162 { "pf_guest", VCPU_STAT(pf_guest
) },
163 { "tlb_flush", VCPU_STAT(tlb_flush
) },
164 { "invlpg", VCPU_STAT(invlpg
) },
165 { "exits", VCPU_STAT(exits
) },
166 { "io_exits", VCPU_STAT(io_exits
) },
167 { "mmio_exits", VCPU_STAT(mmio_exits
) },
168 { "signal_exits", VCPU_STAT(signal_exits
) },
169 { "irq_window", VCPU_STAT(irq_window_exits
) },
170 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
171 { "halt_exits", VCPU_STAT(halt_exits
) },
172 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
173 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
174 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
175 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
176 { "hypercalls", VCPU_STAT(hypercalls
) },
177 { "request_irq", VCPU_STAT(request_irq_exits
) },
178 { "irq_exits", VCPU_STAT(irq_exits
) },
179 { "host_state_reload", VCPU_STAT(host_state_reload
) },
180 { "efer_reload", VCPU_STAT(efer_reload
) },
181 { "fpu_reload", VCPU_STAT(fpu_reload
) },
182 { "insn_emulation", VCPU_STAT(insn_emulation
) },
183 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
184 { "irq_injections", VCPU_STAT(irq_injections
) },
185 { "nmi_injections", VCPU_STAT(nmi_injections
) },
186 { "req_event", VCPU_STAT(req_event
) },
187 { "l1d_flush", VCPU_STAT(l1d_flush
) },
188 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
189 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
190 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
191 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
192 { "mmu_flooded", VM_STAT(mmu_flooded
) },
193 { "mmu_recycled", VM_STAT(mmu_recycled
) },
194 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
195 { "mmu_unsync", VM_STAT(mmu_unsync
) },
196 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
197 { "largepages", VM_STAT(lpages
) },
198 { "max_mmu_page_hash_collisions",
199 VM_STAT(max_mmu_page_hash_collisions
) },
203 u64 __read_mostly host_xcr0
;
205 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
207 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
210 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
211 vcpu
->arch
.apf
.gfns
[i
] = ~0;
214 static void kvm_on_user_return(struct user_return_notifier
*urn
)
217 struct kvm_shared_msrs
*locals
218 = container_of(urn
, struct kvm_shared_msrs
, urn
);
219 struct kvm_shared_msr_values
*values
;
223 * Disabling irqs at this point since the following code could be
224 * interrupted and executed through kvm_arch_hardware_disable()
226 local_irq_save(flags
);
227 if (locals
->registered
) {
228 locals
->registered
= false;
229 user_return_notifier_unregister(urn
);
231 local_irq_restore(flags
);
232 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
233 values
= &locals
->values
[slot
];
234 if (values
->host
!= values
->curr
) {
235 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
236 values
->curr
= values
->host
;
241 static void shared_msr_update(unsigned slot
, u32 msr
)
244 unsigned int cpu
= smp_processor_id();
245 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
247 /* only read, and nobody should modify it at this time,
248 * so don't need lock */
249 if (slot
>= shared_msrs_global
.nr
) {
250 printk(KERN_ERR
"kvm: invalid MSR slot!");
253 rdmsrl_safe(msr
, &value
);
254 smsr
->values
[slot
].host
= value
;
255 smsr
->values
[slot
].curr
= value
;
258 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
260 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
261 shared_msrs_global
.msrs
[slot
] = msr
;
262 if (slot
>= shared_msrs_global
.nr
)
263 shared_msrs_global
.nr
= slot
+ 1;
265 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
267 static void kvm_shared_msr_cpu_online(void)
271 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
272 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
275 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
277 unsigned int cpu
= smp_processor_id();
278 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
281 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
283 smsr
->values
[slot
].curr
= value
;
284 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
288 if (!smsr
->registered
) {
289 smsr
->urn
.on_user_return
= kvm_on_user_return
;
290 user_return_notifier_register(&smsr
->urn
);
291 smsr
->registered
= true;
295 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
297 static void drop_user_return_notifiers(void)
299 unsigned int cpu
= smp_processor_id();
300 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
302 if (smsr
->registered
)
303 kvm_on_user_return(&smsr
->urn
);
306 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
308 return vcpu
->arch
.apic_base
;
310 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
312 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
314 u64 old_state
= vcpu
->arch
.apic_base
&
315 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
316 u64 new_state
= msr_info
->data
&
317 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
318 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
319 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
321 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
323 if (!msr_info
->host_initiated
&&
324 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
325 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
326 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
330 kvm_lapic_set_base(vcpu
, msr_info
->data
);
333 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
335 asmlinkage __visible
void kvm_spurious_fault(void)
337 /* Fault while not rebooting. We want the trace. */
340 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
342 #define EXCPT_BENIGN 0
343 #define EXCPT_CONTRIBUTORY 1
346 static int exception_class(int vector
)
356 return EXCPT_CONTRIBUTORY
;
363 #define EXCPT_FAULT 0
365 #define EXCPT_ABORT 2
366 #define EXCPT_INTERRUPT 3
368 static int exception_type(int vector
)
372 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
373 return EXCPT_INTERRUPT
;
377 /* #DB is trap, as instruction watchpoints are handled elsewhere */
378 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
381 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
384 /* Reserved exceptions will result in fault */
388 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
389 unsigned nr
, bool has_error
, u32 error_code
,
395 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
397 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
399 if (has_error
&& !is_protmode(vcpu
))
403 * On vmentry, vcpu->arch.exception.pending is only
404 * true if an event injection was blocked by
405 * nested_run_pending. In that case, however,
406 * vcpu_enter_guest requests an immediate exit,
407 * and the guest shouldn't proceed far enough to
410 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
411 vcpu
->arch
.exception
.injected
= true;
413 vcpu
->arch
.exception
.pending
= true;
414 vcpu
->arch
.exception
.injected
= false;
416 vcpu
->arch
.exception
.has_error_code
= has_error
;
417 vcpu
->arch
.exception
.nr
= nr
;
418 vcpu
->arch
.exception
.error_code
= error_code
;
422 /* to check exception */
423 prev_nr
= vcpu
->arch
.exception
.nr
;
424 if (prev_nr
== DF_VECTOR
) {
425 /* triple fault -> shutdown */
426 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
429 class1
= exception_class(prev_nr
);
430 class2
= exception_class(nr
);
431 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
432 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
434 * Generate double fault per SDM Table 5-5. Set
435 * exception.pending = true so that the double fault
436 * can trigger a nested vmexit.
438 vcpu
->arch
.exception
.pending
= true;
439 vcpu
->arch
.exception
.injected
= false;
440 vcpu
->arch
.exception
.has_error_code
= true;
441 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
442 vcpu
->arch
.exception
.error_code
= 0;
444 /* replace previous exception with a new one in a hope
445 that instruction re-execution will regenerate lost
450 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
452 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
454 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
456 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
458 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
460 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
462 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
465 kvm_inject_gp(vcpu
, 0);
467 return kvm_skip_emulated_instruction(vcpu
);
471 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
473 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
475 ++vcpu
->stat
.pf_guest
;
476 vcpu
->arch
.exception
.nested_apf
=
477 is_guest_mode(vcpu
) && fault
->async_page_fault
;
478 if (vcpu
->arch
.exception
.nested_apf
)
479 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
481 vcpu
->arch
.cr2
= fault
->address
;
482 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
484 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
486 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
488 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
489 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
491 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
493 return fault
->nested_page_fault
;
496 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
498 atomic_inc(&vcpu
->arch
.nmi_queued
);
499 kvm_make_request(KVM_REQ_NMI
, vcpu
);
501 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
503 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
505 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
507 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
509 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
511 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
513 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
516 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
517 * a #GP and return false.
519 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
521 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
523 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
526 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
528 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
530 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
533 kvm_queue_exception(vcpu
, UD_VECTOR
);
536 EXPORT_SYMBOL_GPL(kvm_require_dr
);
539 * This function will be used to read from the physical memory of the currently
540 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
541 * can read from guest physical or from the guest's guest physical memory.
543 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
544 gfn_t ngfn
, void *data
, int offset
, int len
,
547 struct x86_exception exception
;
551 ngpa
= gfn_to_gpa(ngfn
);
552 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
553 if (real_gfn
== UNMAPPED_GVA
)
556 real_gfn
= gpa_to_gfn(real_gfn
);
558 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
560 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
562 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
563 void *data
, int offset
, int len
, u32 access
)
565 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
566 data
, offset
, len
, access
);
570 * Load the pae pdptrs. Return true is they are all valid.
572 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
574 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
575 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
578 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
580 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
581 offset
* sizeof(u64
), sizeof(pdpte
),
582 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
587 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
588 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
590 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
597 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
598 __set_bit(VCPU_EXREG_PDPTR
,
599 (unsigned long *)&vcpu
->arch
.regs_avail
);
600 __set_bit(VCPU_EXREG_PDPTR
,
601 (unsigned long *)&vcpu
->arch
.regs_dirty
);
606 EXPORT_SYMBOL_GPL(load_pdptrs
);
608 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
610 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
616 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
619 if (!test_bit(VCPU_EXREG_PDPTR
,
620 (unsigned long *)&vcpu
->arch
.regs_avail
))
623 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
624 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
625 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
626 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
629 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
634 EXPORT_SYMBOL_GPL(pdptrs_changed
);
636 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
638 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
639 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
644 if (cr0
& 0xffffffff00000000UL
)
648 cr0
&= ~CR0_RESERVED_BITS
;
650 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
653 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
656 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
658 if ((vcpu
->arch
.efer
& EFER_LME
)) {
663 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
668 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
673 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
676 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
678 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
679 kvm_clear_async_pf_completion_queue(vcpu
);
680 kvm_async_pf_hash_reset(vcpu
);
683 if ((cr0
^ old_cr0
) & update_bits
)
684 kvm_mmu_reset_context(vcpu
);
686 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
687 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
688 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
689 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
693 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
695 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
697 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
699 EXPORT_SYMBOL_GPL(kvm_lmsw
);
701 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
703 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
704 !vcpu
->guest_xcr0_loaded
) {
705 /* kvm_set_xcr() also depends on this */
706 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
707 vcpu
->guest_xcr0_loaded
= 1;
711 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
713 if (vcpu
->guest_xcr0_loaded
) {
714 if (vcpu
->arch
.xcr0
!= host_xcr0
)
715 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
716 vcpu
->guest_xcr0_loaded
= 0;
720 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
723 u64 old_xcr0
= vcpu
->arch
.xcr0
;
726 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
727 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
729 if (!(xcr0
& XFEATURE_MASK_FP
))
731 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
735 * Do not allow the guest to set bits that we do not support
736 * saving. However, xcr0 bit 0 is always set, even if the
737 * emulated CPU does not support XSAVE (see fx_init).
739 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
740 if (xcr0
& ~valid_bits
)
743 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
744 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
747 if (xcr0
& XFEATURE_MASK_AVX512
) {
748 if (!(xcr0
& XFEATURE_MASK_YMM
))
750 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
753 vcpu
->arch
.xcr0
= xcr0
;
755 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
756 kvm_update_cpuid(vcpu
);
760 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
762 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
763 __kvm_set_xcr(vcpu
, index
, xcr
)) {
764 kvm_inject_gp(vcpu
, 0);
769 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
771 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
773 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
774 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
775 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
777 if (cr4
& CR4_RESERVED_BITS
)
780 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
783 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
786 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
789 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
792 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
795 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
798 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
801 if (is_long_mode(vcpu
)) {
802 if (!(cr4
& X86_CR4_PAE
))
804 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
805 && ((cr4
^ old_cr4
) & pdptr_bits
)
806 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
810 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
811 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
814 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
815 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
819 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
822 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
823 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
824 kvm_mmu_reset_context(vcpu
);
826 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
827 kvm_update_cpuid(vcpu
);
831 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
833 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
836 cr3
&= ~CR3_PCID_INVD
;
839 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
840 kvm_mmu_sync_roots(vcpu
);
841 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
845 if (is_long_mode(vcpu
) &&
846 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 63)))
848 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
849 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
852 vcpu
->arch
.cr3
= cr3
;
853 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
854 kvm_mmu_new_cr3(vcpu
);
857 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
859 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
861 if (cr8
& CR8_RESERVED_BITS
)
863 if (lapic_in_kernel(vcpu
))
864 kvm_lapic_set_tpr(vcpu
, cr8
);
866 vcpu
->arch
.cr8
= cr8
;
869 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
871 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
873 if (lapic_in_kernel(vcpu
))
874 return kvm_lapic_get_cr8(vcpu
);
876 return vcpu
->arch
.cr8
;
878 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
880 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
884 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
885 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
886 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
887 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
891 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
893 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
894 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
897 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
901 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
902 dr7
= vcpu
->arch
.guest_debug_dr7
;
904 dr7
= vcpu
->arch
.dr7
;
905 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
906 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
907 if (dr7
& DR7_BP_EN_MASK
)
908 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
911 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
913 u64 fixed
= DR6_FIXED_1
;
915 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
920 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
924 vcpu
->arch
.db
[dr
] = val
;
925 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
926 vcpu
->arch
.eff_db
[dr
] = val
;
931 if (val
& 0xffffffff00000000ULL
)
933 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
934 kvm_update_dr6(vcpu
);
939 if (val
& 0xffffffff00000000ULL
)
941 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
942 kvm_update_dr7(vcpu
);
949 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
951 if (__kvm_set_dr(vcpu
, dr
, val
)) {
952 kvm_inject_gp(vcpu
, 0);
957 EXPORT_SYMBOL_GPL(kvm_set_dr
);
959 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
963 *val
= vcpu
->arch
.db
[dr
];
968 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
969 *val
= vcpu
->arch
.dr6
;
971 *val
= kvm_x86_ops
->get_dr6(vcpu
);
976 *val
= vcpu
->arch
.dr7
;
981 EXPORT_SYMBOL_GPL(kvm_get_dr
);
983 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
985 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
989 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
992 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
993 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
996 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
999 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1000 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1002 * This list is modified at module load time to reflect the
1003 * capabilities of the host cpu. This capabilities test skips MSRs that are
1004 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1005 * may depend on host virtualization features rather than host cpu features.
1008 static u32 msrs_to_save
[] = {
1009 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1011 #ifdef CONFIG_X86_64
1012 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1014 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1015 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1016 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1019 static unsigned num_msrs_to_save
;
1021 static u32 emulated_msrs
[] = {
1022 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1023 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1024 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1025 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1026 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1027 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1028 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1030 HV_X64_MSR_VP_INDEX
,
1031 HV_X64_MSR_VP_RUNTIME
,
1032 HV_X64_MSR_SCONTROL
,
1033 HV_X64_MSR_STIMER0_CONFIG
,
1034 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1037 MSR_IA32_TSC_ADJUST
,
1038 MSR_IA32_TSCDEADLINE
,
1039 MSR_IA32_MISC_ENABLE
,
1040 MSR_IA32_MCG_STATUS
,
1042 MSR_IA32_MCG_EXT_CTL
,
1045 MSR_MISC_FEATURES_ENABLES
,
1046 MSR_AMD64_VIRT_SPEC_CTRL
,
1049 static unsigned num_emulated_msrs
;
1052 * List of msr numbers which are used to expose MSR-based features that
1053 * can be used by a hypervisor to validate requested CPU features.
1055 static u32 msr_based_features
[] = {
1058 MSR_IA32_ARCH_CAPABILITIES
,
1061 static unsigned int num_msr_based_features
;
1063 u64
kvm_get_arch_capabilities(void)
1067 rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES
, &data
);
1070 * If we're doing cache flushes (either "always" or "cond")
1071 * we will do one whenever the guest does a vmlaunch/vmresume.
1072 * If an outer hypervisor is doing the cache flush for us
1073 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1074 * capability to the guest too, and if EPT is disabled we're not
1075 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1076 * require a nested hypervisor to do a flush of its own.
1078 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1079 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1083 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities
);
1085 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1087 switch (msr
->index
) {
1088 case MSR_IA32_ARCH_CAPABILITIES
:
1089 msr
->data
= kvm_get_arch_capabilities();
1091 case MSR_IA32_UCODE_REV
:
1092 rdmsrl_safe(msr
->index
, &msr
->data
);
1095 if (kvm_x86_ops
->get_msr_feature(msr
))
1101 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1103 struct kvm_msr_entry msr
;
1107 r
= kvm_get_msr_feature(&msr
);
1116 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1118 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1121 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1127 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1129 if (efer
& efer_reserved_bits
)
1132 return __kvm_valid_efer(vcpu
, efer
);
1134 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1136 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1138 u64 old_efer
= vcpu
->arch
.efer
;
1139 u64 efer
= msr_info
->data
;
1141 if (efer
& efer_reserved_bits
)
1144 if (!msr_info
->host_initiated
) {
1145 if (!__kvm_valid_efer(vcpu
, efer
))
1148 if (is_paging(vcpu
) &&
1149 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1154 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1156 kvm_x86_ops
->set_efer(vcpu
, efer
);
1158 /* Update reserved bits */
1159 if ((efer
^ old_efer
) & EFER_NX
)
1160 kvm_mmu_reset_context(vcpu
);
1165 void kvm_enable_efer_bits(u64 mask
)
1167 efer_reserved_bits
&= ~mask
;
1169 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1172 * Writes msr value into into the appropriate "register".
1173 * Returns 0 on success, non-0 otherwise.
1174 * Assumes vcpu_load() was already called.
1176 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1178 switch (msr
->index
) {
1181 case MSR_KERNEL_GS_BASE
:
1184 if (is_noncanonical_address(msr
->data
, vcpu
))
1187 case MSR_IA32_SYSENTER_EIP
:
1188 case MSR_IA32_SYSENTER_ESP
:
1190 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1191 * non-canonical address is written on Intel but not on
1192 * AMD (which ignores the top 32-bits, because it does
1193 * not implement 64-bit SYSENTER).
1195 * 64-bit code should hence be able to write a non-canonical
1196 * value on AMD. Making the address canonical ensures that
1197 * vmentry does not fail on Intel after writing a non-canonical
1198 * value, and that something deterministic happens if the guest
1199 * invokes 64-bit SYSENTER.
1201 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1203 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1205 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1208 * Adapt set_msr() to msr_io()'s calling convention
1210 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1212 struct msr_data msr
;
1216 msr
.host_initiated
= true;
1217 r
= kvm_get_msr(vcpu
, &msr
);
1225 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1227 struct msr_data msr
;
1231 msr
.host_initiated
= true;
1232 return kvm_set_msr(vcpu
, &msr
);
1235 #ifdef CONFIG_X86_64
1236 struct pvclock_gtod_data
{
1239 struct { /* extract of a clocksource struct */
1252 static struct pvclock_gtod_data pvclock_gtod_data
;
1254 static void update_pvclock_gtod(struct timekeeper
*tk
)
1256 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1259 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1261 write_seqcount_begin(&vdata
->seq
);
1263 /* copy pvclock gtod data */
1264 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1265 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1266 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1267 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1268 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1270 vdata
->boot_ns
= boot_ns
;
1271 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1273 vdata
->wall_time_sec
= tk
->xtime_sec
;
1275 write_seqcount_end(&vdata
->seq
);
1279 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1282 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1283 * vcpu_enter_guest. This function is only called from
1284 * the physical CPU that is running vcpu.
1286 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1289 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1293 struct pvclock_wall_clock wc
;
1294 struct timespec64 boot
;
1299 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1304 ++version
; /* first time write, random junk */
1308 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1312 * The guest calculates current wall clock time by adding
1313 * system time (updated by kvm_guest_time_update below) to the
1314 * wall clock specified here. guest system time equals host
1315 * system time for us, thus we must fill in host boot time here.
1317 getboottime64(&boot
);
1319 if (kvm
->arch
.kvmclock_offset
) {
1320 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1321 boot
= timespec64_sub(boot
, ts
);
1323 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1324 wc
.nsec
= boot
.tv_nsec
;
1325 wc
.version
= version
;
1327 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1330 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1333 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1335 do_shl32_div32(dividend
, divisor
);
1339 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1340 s8
*pshift
, u32
*pmultiplier
)
1348 scaled64
= scaled_hz
;
1349 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1354 tps32
= (uint32_t)tps64
;
1355 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1356 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1364 *pmultiplier
= div_frac(scaled64
, tps32
);
1366 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1367 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1370 #ifdef CONFIG_X86_64
1371 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1374 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1375 static unsigned long max_tsc_khz
;
1377 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1379 u64 v
= (u64
)khz
* (1000000 + ppm
);
1384 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1388 /* Guest TSC same frequency as host TSC? */
1390 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1394 /* TSC scaling supported? */
1395 if (!kvm_has_tsc_control
) {
1396 if (user_tsc_khz
> tsc_khz
) {
1397 vcpu
->arch
.tsc_catchup
= 1;
1398 vcpu
->arch
.tsc_always_catchup
= 1;
1401 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1406 /* TSC scaling required - calculate ratio */
1407 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1408 user_tsc_khz
, tsc_khz
);
1410 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1411 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1416 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1420 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1422 u32 thresh_lo
, thresh_hi
;
1423 int use_scaling
= 0;
1425 /* tsc_khz can be zero if TSC calibration fails */
1426 if (user_tsc_khz
== 0) {
1427 /* set tsc_scaling_ratio to a safe value */
1428 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1432 /* Compute a scale to convert nanoseconds in TSC cycles */
1433 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1434 &vcpu
->arch
.virtual_tsc_shift
,
1435 &vcpu
->arch
.virtual_tsc_mult
);
1436 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1439 * Compute the variation in TSC rate which is acceptable
1440 * within the range of tolerance and decide if the
1441 * rate being applied is within that bounds of the hardware
1442 * rate. If so, no scaling or compensation need be done.
1444 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1445 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1446 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1447 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1450 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1453 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1455 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1456 vcpu
->arch
.virtual_tsc_mult
,
1457 vcpu
->arch
.virtual_tsc_shift
);
1458 tsc
+= vcpu
->arch
.this_tsc_write
;
1462 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1464 #ifdef CONFIG_X86_64
1466 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1467 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1469 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1470 atomic_read(&vcpu
->kvm
->online_vcpus
));
1473 * Once the masterclock is enabled, always perform request in
1474 * order to update it.
1476 * In order to enable masterclock, the host clocksource must be TSC
1477 * and the vcpus need to have matched TSCs. When that happens,
1478 * perform request to enable masterclock.
1480 if (ka
->use_master_clock
||
1481 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1482 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1484 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1485 atomic_read(&vcpu
->kvm
->online_vcpus
),
1486 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1490 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1492 u64 curr_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1493 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1497 * Multiply tsc by a fixed point number represented by ratio.
1499 * The most significant 64-N bits (mult) of ratio represent the
1500 * integral part of the fixed point number; the remaining N bits
1501 * (frac) represent the fractional part, ie. ratio represents a fixed
1502 * point number (mult + frac * 2^(-N)).
1504 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1506 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1508 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1511 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1514 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1516 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1517 _tsc
= __scale_tsc(ratio
, tsc
);
1521 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1523 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1527 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1529 return target_tsc
- tsc
;
1532 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1534 u64 tsc_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1536 return tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1538 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1540 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1542 vcpu
->arch
.tsc_offset
= kvm_x86_ops
->write_l1_tsc_offset(vcpu
, offset
);
1545 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1547 struct kvm
*kvm
= vcpu
->kvm
;
1548 u64 offset
, ns
, elapsed
;
1549 unsigned long flags
;
1551 bool already_matched
;
1552 u64 data
= msr
->data
;
1553 bool synchronizing
= false;
1555 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1556 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1557 ns
= ktime_get_boot_ns();
1558 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1560 if (vcpu
->arch
.virtual_tsc_khz
) {
1561 if (data
== 0 && msr
->host_initiated
) {
1563 * detection of vcpu initialization -- need to sync
1564 * with other vCPUs. This particularly helps to keep
1565 * kvm_clock stable after CPU hotplug
1567 synchronizing
= true;
1569 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1570 nsec_to_cycles(vcpu
, elapsed
);
1571 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1573 * Special case: TSC write with a small delta (1 second)
1574 * of virtual cycle time against real time is
1575 * interpreted as an attempt to synchronize the CPU.
1577 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1578 data
+ tsc_hz
> tsc_exp
;
1583 * For a reliable TSC, we can match TSC offsets, and for an unstable
1584 * TSC, we add elapsed time in this computation. We could let the
1585 * compensation code attempt to catch up if we fall behind, but
1586 * it's better to try to match offsets from the beginning.
1588 if (synchronizing
&&
1589 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1590 if (!check_tsc_unstable()) {
1591 offset
= kvm
->arch
.cur_tsc_offset
;
1592 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1594 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1596 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1597 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1600 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1603 * We split periods of matched TSC writes into generations.
1604 * For each generation, we track the original measured
1605 * nanosecond time, offset, and write, so if TSCs are in
1606 * sync, we can match exact offset, and if not, we can match
1607 * exact software computation in compute_guest_tsc()
1609 * These values are tracked in kvm->arch.cur_xxx variables.
1611 kvm
->arch
.cur_tsc_generation
++;
1612 kvm
->arch
.cur_tsc_nsec
= ns
;
1613 kvm
->arch
.cur_tsc_write
= data
;
1614 kvm
->arch
.cur_tsc_offset
= offset
;
1616 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1617 kvm
->arch
.cur_tsc_generation
, data
);
1621 * We also track th most recent recorded KHZ, write and time to
1622 * allow the matching interval to be extended at each write.
1624 kvm
->arch
.last_tsc_nsec
= ns
;
1625 kvm
->arch
.last_tsc_write
= data
;
1626 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1628 vcpu
->arch
.last_guest_tsc
= data
;
1630 /* Keep track of which generation this VCPU has synchronized to */
1631 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1632 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1633 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1635 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1636 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1638 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1639 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1641 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1643 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1644 } else if (!already_matched
) {
1645 kvm
->arch
.nr_vcpus_matched_tsc
++;
1648 kvm_track_tsc_matching(vcpu
);
1649 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1652 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1654 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1657 u64 tsc_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1658 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
1661 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1663 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1664 WARN_ON(adjustment
< 0);
1665 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1666 adjust_tsc_offset_guest(vcpu
, adjustment
);
1669 #ifdef CONFIG_X86_64
1671 static u64
read_tsc(void)
1673 u64 ret
= (u64
)rdtsc_ordered();
1674 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1676 if (likely(ret
>= last
))
1680 * GCC likes to generate cmov here, but this branch is extremely
1681 * predictable (it's just a function of time and the likely is
1682 * very likely) and there's a data dependence, so force GCC
1683 * to generate a branch instead. I don't barrier() because
1684 * we don't actually need a barrier, and if this function
1685 * ever gets inlined it will generate worse code.
1691 static inline u64
vgettsc(u64
*cycle_now
)
1694 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1696 *cycle_now
= read_tsc();
1698 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1699 return v
* gtod
->clock
.mult
;
1702 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1704 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1710 seq
= read_seqcount_begin(>od
->seq
);
1711 mode
= gtod
->clock
.vclock_mode
;
1712 ns
= gtod
->nsec_base
;
1713 ns
+= vgettsc(cycle_now
);
1714 ns
>>= gtod
->clock
.shift
;
1715 ns
+= gtod
->boot_ns
;
1716 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1722 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1724 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1730 seq
= read_seqcount_begin(>od
->seq
);
1731 mode
= gtod
->clock
.vclock_mode
;
1732 ts
->tv_sec
= gtod
->wall_time_sec
;
1733 ns
= gtod
->nsec_base
;
1734 ns
+= vgettsc(cycle_now
);
1735 ns
>>= gtod
->clock
.shift
;
1736 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1738 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1744 /* returns true if host is using tsc clocksource */
1745 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1747 /* checked again under seqlock below */
1748 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1751 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1754 /* returns true if host is using tsc clocksource */
1755 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1758 /* checked again under seqlock below */
1759 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1762 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1768 * Assuming a stable TSC across physical CPUS, and a stable TSC
1769 * across virtual CPUs, the following condition is possible.
1770 * Each numbered line represents an event visible to both
1771 * CPUs at the next numbered event.
1773 * "timespecX" represents host monotonic time. "tscX" represents
1776 * VCPU0 on CPU0 | VCPU1 on CPU1
1778 * 1. read timespec0,tsc0
1779 * 2. | timespec1 = timespec0 + N
1781 * 3. transition to guest | transition to guest
1782 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1783 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1784 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1786 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1789 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1791 * - 0 < N - M => M < N
1793 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1794 * always the case (the difference between two distinct xtime instances
1795 * might be smaller then the difference between corresponding TSC reads,
1796 * when updating guest vcpus pvclock areas).
1798 * To avoid that problem, do not allow visibility of distinct
1799 * system_timestamp/tsc_timestamp values simultaneously: use a master
1800 * copy of host monotonic time values. Update that master copy
1803 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1807 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1809 #ifdef CONFIG_X86_64
1810 struct kvm_arch
*ka
= &kvm
->arch
;
1812 bool host_tsc_clocksource
, vcpus_matched
;
1814 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1815 atomic_read(&kvm
->online_vcpus
));
1818 * If the host uses TSC clock, then passthrough TSC as stable
1821 host_tsc_clocksource
= kvm_get_time_and_clockread(
1822 &ka
->master_kernel_ns
,
1823 &ka
->master_cycle_now
);
1825 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1826 && !ka
->backwards_tsc_observed
1827 && !ka
->boot_vcpu_runs_old_kvmclock
;
1829 if (ka
->use_master_clock
)
1830 atomic_set(&kvm_guest_has_master_clock
, 1);
1832 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1833 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1838 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1840 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1843 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1845 #ifdef CONFIG_X86_64
1847 struct kvm_vcpu
*vcpu
;
1848 struct kvm_arch
*ka
= &kvm
->arch
;
1850 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1851 kvm_make_mclock_inprogress_request(kvm
);
1852 /* no guest entries from this point */
1853 pvclock_update_vm_gtod_copy(kvm
);
1855 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1856 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1858 /* guest entries allowed */
1859 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1860 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1862 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1866 u64
get_kvmclock_ns(struct kvm
*kvm
)
1868 struct kvm_arch
*ka
= &kvm
->arch
;
1869 struct pvclock_vcpu_time_info hv_clock
;
1872 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1873 if (!ka
->use_master_clock
) {
1874 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1875 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1878 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1879 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1880 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1882 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1885 if (__this_cpu_read(cpu_tsc_khz
)) {
1886 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1887 &hv_clock
.tsc_shift
,
1888 &hv_clock
.tsc_to_system_mul
);
1889 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1891 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1898 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1900 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1901 struct pvclock_vcpu_time_info guest_hv_clock
;
1903 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1904 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1907 /* This VCPU is paused, but it's legal for a guest to read another
1908 * VCPU's kvmclock, so we really have to follow the specification where
1909 * it says that version is odd if data is being modified, and even after
1912 * Version field updates must be kept separate. This is because
1913 * kvm_write_guest_cached might use a "rep movs" instruction, and
1914 * writes within a string instruction are weakly ordered. So there
1915 * are three writes overall.
1917 * As a small optimization, only write the version field in the first
1918 * and third write. The vcpu->pv_time cache is still valid, because the
1919 * version field is the first in the struct.
1921 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1923 if (guest_hv_clock
.version
& 1)
1924 ++guest_hv_clock
.version
; /* first time write, random junk */
1926 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1927 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1929 sizeof(vcpu
->hv_clock
.version
));
1933 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1934 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1936 if (vcpu
->pvclock_set_guest_stopped_request
) {
1937 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1938 vcpu
->pvclock_set_guest_stopped_request
= false;
1941 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1943 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1945 sizeof(vcpu
->hv_clock
));
1949 vcpu
->hv_clock
.version
++;
1950 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1952 sizeof(vcpu
->hv_clock
.version
));
1955 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1957 unsigned long flags
, tgt_tsc_khz
;
1958 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1959 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1961 u64 tsc_timestamp
, host_tsc
;
1963 bool use_master_clock
;
1969 * If the host uses TSC clock, then passthrough TSC as stable
1972 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1973 use_master_clock
= ka
->use_master_clock
;
1974 if (use_master_clock
) {
1975 host_tsc
= ka
->master_cycle_now
;
1976 kernel_ns
= ka
->master_kernel_ns
;
1978 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1980 /* Keep irq disabled to prevent changes to the clock */
1981 local_irq_save(flags
);
1982 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1983 if (unlikely(tgt_tsc_khz
== 0)) {
1984 local_irq_restore(flags
);
1985 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1988 if (!use_master_clock
) {
1990 kernel_ns
= ktime_get_boot_ns();
1993 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1996 * We may have to catch up the TSC to match elapsed wall clock
1997 * time for two reasons, even if kvmclock is used.
1998 * 1) CPU could have been running below the maximum TSC rate
1999 * 2) Broken TSC compensation resets the base at each VCPU
2000 * entry to avoid unknown leaps of TSC even when running
2001 * again on the same CPU. This may cause apparent elapsed
2002 * time to disappear, and the guest to stand still or run
2005 if (vcpu
->tsc_catchup
) {
2006 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2007 if (tsc
> tsc_timestamp
) {
2008 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2009 tsc_timestamp
= tsc
;
2013 local_irq_restore(flags
);
2015 /* With all the info we got, fill in the values */
2017 if (kvm_has_tsc_control
)
2018 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2020 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2021 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2022 &vcpu
->hv_clock
.tsc_shift
,
2023 &vcpu
->hv_clock
.tsc_to_system_mul
);
2024 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2027 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2028 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2029 vcpu
->last_guest_tsc
= tsc_timestamp
;
2031 /* If the host uses TSC clocksource, then it is stable */
2033 if (use_master_clock
)
2034 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2036 vcpu
->hv_clock
.flags
= pvclock_flags
;
2038 if (vcpu
->pv_time_enabled
)
2039 kvm_setup_pvclock_page(v
);
2040 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2041 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2046 * kvmclock updates which are isolated to a given vcpu, such as
2047 * vcpu->cpu migration, should not allow system_timestamp from
2048 * the rest of the vcpus to remain static. Otherwise ntp frequency
2049 * correction applies to one vcpu's system_timestamp but not
2052 * So in those cases, request a kvmclock update for all vcpus.
2053 * We need to rate-limit these requests though, as they can
2054 * considerably slow guests that have a large number of vcpus.
2055 * The time for a remote vcpu to update its kvmclock is bound
2056 * by the delay we use to rate-limit the updates.
2059 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2061 static void kvmclock_update_fn(struct work_struct
*work
)
2064 struct delayed_work
*dwork
= to_delayed_work(work
);
2065 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2066 kvmclock_update_work
);
2067 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2068 struct kvm_vcpu
*vcpu
;
2070 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2071 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2072 kvm_vcpu_kick(vcpu
);
2076 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2078 struct kvm
*kvm
= v
->kvm
;
2080 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2081 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2082 KVMCLOCK_UPDATE_DELAY
);
2085 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2087 static void kvmclock_sync_fn(struct work_struct
*work
)
2089 struct delayed_work
*dwork
= to_delayed_work(work
);
2090 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2091 kvmclock_sync_work
);
2092 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2094 if (!kvmclock_periodic_sync
)
2097 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2098 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2099 KVMCLOCK_SYNC_PERIOD
);
2102 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2104 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2105 unsigned bank_num
= mcg_cap
& 0xff;
2106 u32 msr
= msr_info
->index
;
2107 u64 data
= msr_info
->data
;
2110 case MSR_IA32_MCG_STATUS
:
2111 vcpu
->arch
.mcg_status
= data
;
2113 case MSR_IA32_MCG_CTL
:
2114 if (!(mcg_cap
& MCG_CTL_P
) &&
2115 (data
|| !msr_info
->host_initiated
))
2117 if (data
!= 0 && data
!= ~(u64
)0)
2119 vcpu
->arch
.mcg_ctl
= data
;
2122 if (msr
>= MSR_IA32_MC0_CTL
&&
2123 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2124 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2125 /* only 0 or all 1s can be written to IA32_MCi_CTL
2126 * some Linux kernels though clear bit 10 in bank 4 to
2127 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2128 * this to avoid an uncatched #GP in the guest
2130 if ((offset
& 0x3) == 0 &&
2131 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2133 if (!msr_info
->host_initiated
&&
2134 (offset
& 0x3) == 1 && data
!= 0)
2136 vcpu
->arch
.mce_banks
[offset
] = data
;
2144 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2146 struct kvm
*kvm
= vcpu
->kvm
;
2147 int lm
= is_long_mode(vcpu
);
2148 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2149 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2150 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2151 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2152 u32 page_num
= data
& ~PAGE_MASK
;
2153 u64 page_addr
= data
& PAGE_MASK
;
2158 if (page_num
>= blob_size
)
2161 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2166 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2175 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2177 gpa_t gpa
= data
& ~0x3f;
2179 /* Bits 3:5 are reserved, Should be zero */
2183 vcpu
->arch
.apf
.msr_val
= data
;
2185 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2186 kvm_clear_async_pf_completion_queue(vcpu
);
2187 kvm_async_pf_hash_reset(vcpu
);
2191 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2195 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2196 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2197 kvm_async_pf_wakeup_all(vcpu
);
2201 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2203 vcpu
->arch
.pv_time_enabled
= false;
2206 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2208 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2211 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2212 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2215 vcpu
->arch
.st
.steal
.preempted
= 0;
2217 if (vcpu
->arch
.st
.steal
.version
& 1)
2218 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2220 vcpu
->arch
.st
.steal
.version
+= 1;
2222 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2223 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2227 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2228 vcpu
->arch
.st
.last_steal
;
2229 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2231 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2232 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2236 vcpu
->arch
.st
.steal
.version
+= 1;
2238 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2239 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2242 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2245 u32 msr
= msr_info
->index
;
2246 u64 data
= msr_info
->data
;
2249 case MSR_AMD64_NB_CFG
:
2250 case MSR_IA32_UCODE_WRITE
:
2251 case MSR_VM_HSAVE_PA
:
2252 case MSR_AMD64_PATCH_LOADER
:
2253 case MSR_AMD64_BU_CFG2
:
2254 case MSR_AMD64_DC_CFG
:
2255 case MSR_F15H_EX_CFG
:
2258 case MSR_IA32_UCODE_REV
:
2259 if (msr_info
->host_initiated
)
2260 vcpu
->arch
.microcode_version
= data
;
2262 case MSR_IA32_ARCH_CAPABILITIES
:
2263 if (!msr_info
->host_initiated
)
2265 vcpu
->arch
.arch_capabilities
= data
;
2268 return set_efer(vcpu
, msr_info
);
2270 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2271 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2272 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2273 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2275 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2280 case MSR_FAM10H_MMIO_CONF_BASE
:
2282 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2287 case MSR_IA32_DEBUGCTLMSR
:
2289 /* We support the non-activated case already */
2291 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2292 /* Values other than LBR and BTF are vendor-specific,
2293 thus reserved and should throw a #GP */
2296 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2299 case 0x200 ... 0x2ff:
2300 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2301 case MSR_IA32_APICBASE
:
2302 return kvm_set_apic_base(vcpu
, msr_info
);
2303 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2304 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2305 case MSR_IA32_TSCDEADLINE
:
2306 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2308 case MSR_IA32_TSC_ADJUST
:
2309 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2310 if (!msr_info
->host_initiated
) {
2311 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2312 adjust_tsc_offset_guest(vcpu
, adj
);
2314 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2317 case MSR_IA32_MISC_ENABLE
:
2318 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2320 case MSR_IA32_SMBASE
:
2321 if (!msr_info
->host_initiated
)
2323 vcpu
->arch
.smbase
= data
;
2326 kvm_write_tsc(vcpu
, msr_info
);
2328 case MSR_KVM_WALL_CLOCK_NEW
:
2329 case MSR_KVM_WALL_CLOCK
:
2330 vcpu
->kvm
->arch
.wall_clock
= data
;
2331 kvm_write_wall_clock(vcpu
->kvm
, data
);
2333 case MSR_KVM_SYSTEM_TIME_NEW
:
2334 case MSR_KVM_SYSTEM_TIME
: {
2335 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2337 kvmclock_reset(vcpu
);
2339 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2340 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2342 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2343 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2345 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2348 vcpu
->arch
.time
= data
;
2349 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2351 /* we verify if the enable bit is set... */
2355 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2356 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2357 sizeof(struct pvclock_vcpu_time_info
)))
2358 vcpu
->arch
.pv_time_enabled
= false;
2360 vcpu
->arch
.pv_time_enabled
= true;
2364 case MSR_KVM_ASYNC_PF_EN
:
2365 if (kvm_pv_enable_async_pf(vcpu
, data
))
2368 case MSR_KVM_STEAL_TIME
:
2370 if (unlikely(!sched_info_on()))
2373 if (data
& KVM_STEAL_RESERVED_MASK
)
2376 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2377 data
& KVM_STEAL_VALID_BITS
,
2378 sizeof(struct kvm_steal_time
)))
2381 vcpu
->arch
.st
.msr_val
= data
;
2383 if (!(data
& KVM_MSR_ENABLED
))
2386 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2389 case MSR_KVM_PV_EOI_EN
:
2390 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2394 case MSR_IA32_MCG_CTL
:
2395 case MSR_IA32_MCG_STATUS
:
2396 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2397 return set_msr_mce(vcpu
, msr_info
);
2399 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2400 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2401 pr
= true; /* fall through */
2402 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2403 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2404 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2405 return kvm_pmu_set_msr(vcpu
, msr_info
);
2407 if (pr
|| data
!= 0)
2408 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2409 "0x%x data 0x%llx\n", msr
, data
);
2411 case MSR_K7_CLK_CTL
:
2413 * Ignore all writes to this no longer documented MSR.
2414 * Writes are only relevant for old K7 processors,
2415 * all pre-dating SVM, but a recommended workaround from
2416 * AMD for these chips. It is possible to specify the
2417 * affected processor models on the command line, hence
2418 * the need to ignore the workaround.
2421 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2422 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2423 case HV_X64_MSR_CRASH_CTL
:
2424 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2425 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2426 msr_info
->host_initiated
);
2427 case MSR_IA32_BBL_CR_CTL3
:
2428 /* Drop writes to this legacy MSR -- see rdmsr
2429 * counterpart for further detail.
2431 if (report_ignored_msrs
)
2432 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2435 case MSR_AMD64_OSVW_ID_LENGTH
:
2436 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2438 vcpu
->arch
.osvw
.length
= data
;
2440 case MSR_AMD64_OSVW_STATUS
:
2441 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2443 vcpu
->arch
.osvw
.status
= data
;
2445 case MSR_PLATFORM_INFO
:
2446 if (!msr_info
->host_initiated
||
2447 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2448 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2449 cpuid_fault_enabled(vcpu
)))
2451 vcpu
->arch
.msr_platform_info
= data
;
2453 case MSR_MISC_FEATURES_ENABLES
:
2454 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2455 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2456 !supports_cpuid_fault(vcpu
)))
2458 vcpu
->arch
.msr_misc_features_enables
= data
;
2461 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2462 return xen_hvm_config(vcpu
, data
);
2463 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2464 return kvm_pmu_set_msr(vcpu
, msr_info
);
2466 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2470 if (report_ignored_msrs
)
2472 "ignored wrmsr: 0x%x data 0x%llx\n",
2479 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2483 * Reads an msr value (of 'msr_index') into 'pdata'.
2484 * Returns 0 on success, non-0 otherwise.
2485 * Assumes vcpu_load() was already called.
2487 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2489 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2491 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2493 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
2496 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2497 unsigned bank_num
= mcg_cap
& 0xff;
2500 case MSR_IA32_P5_MC_ADDR
:
2501 case MSR_IA32_P5_MC_TYPE
:
2504 case MSR_IA32_MCG_CAP
:
2505 data
= vcpu
->arch
.mcg_cap
;
2507 case MSR_IA32_MCG_CTL
:
2508 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
2510 data
= vcpu
->arch
.mcg_ctl
;
2512 case MSR_IA32_MCG_STATUS
:
2513 data
= vcpu
->arch
.mcg_status
;
2516 if (msr
>= MSR_IA32_MC0_CTL
&&
2517 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2518 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2519 data
= vcpu
->arch
.mce_banks
[offset
];
2528 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2530 switch (msr_info
->index
) {
2531 case MSR_IA32_PLATFORM_ID
:
2532 case MSR_IA32_EBL_CR_POWERON
:
2533 case MSR_IA32_DEBUGCTLMSR
:
2534 case MSR_IA32_LASTBRANCHFROMIP
:
2535 case MSR_IA32_LASTBRANCHTOIP
:
2536 case MSR_IA32_LASTINTFROMIP
:
2537 case MSR_IA32_LASTINTTOIP
:
2539 case MSR_K8_TSEG_ADDR
:
2540 case MSR_K8_TSEG_MASK
:
2542 case MSR_VM_HSAVE_PA
:
2543 case MSR_K8_INT_PENDING_MSG
:
2544 case MSR_AMD64_NB_CFG
:
2545 case MSR_FAM10H_MMIO_CONF_BASE
:
2546 case MSR_AMD64_BU_CFG2
:
2547 case MSR_IA32_PERF_CTL
:
2548 case MSR_AMD64_DC_CFG
:
2549 case MSR_F15H_EX_CFG
:
2552 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2553 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2554 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2555 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2556 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2557 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2560 case MSR_IA32_UCODE_REV
:
2561 msr_info
->data
= vcpu
->arch
.microcode_version
;
2564 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + vcpu
->arch
.tsc_offset
;
2566 case MSR_IA32_ARCH_CAPABILITIES
:
2567 if (!msr_info
->host_initiated
&&
2568 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
2570 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
2573 case 0x200 ... 0x2ff:
2574 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2575 case 0xcd: /* fsb frequency */
2579 * MSR_EBC_FREQUENCY_ID
2580 * Conservative value valid for even the basic CPU models.
2581 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2582 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2583 * and 266MHz for model 3, or 4. Set Core Clock
2584 * Frequency to System Bus Frequency Ratio to 1 (bits
2585 * 31:24) even though these are only valid for CPU
2586 * models > 2, however guests may end up dividing or
2587 * multiplying by zero otherwise.
2589 case MSR_EBC_FREQUENCY_ID
:
2590 msr_info
->data
= 1 << 24;
2592 case MSR_IA32_APICBASE
:
2593 msr_info
->data
= kvm_get_apic_base(vcpu
);
2595 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2596 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2598 case MSR_IA32_TSCDEADLINE
:
2599 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2601 case MSR_IA32_TSC_ADJUST
:
2602 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2604 case MSR_IA32_MISC_ENABLE
:
2605 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2607 case MSR_IA32_SMBASE
:
2608 if (!msr_info
->host_initiated
)
2610 msr_info
->data
= vcpu
->arch
.smbase
;
2612 case MSR_IA32_PERF_STATUS
:
2613 /* TSC increment by tick */
2614 msr_info
->data
= 1000ULL;
2615 /* CPU multiplier */
2616 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2619 msr_info
->data
= vcpu
->arch
.efer
;
2621 case MSR_KVM_WALL_CLOCK
:
2622 case MSR_KVM_WALL_CLOCK_NEW
:
2623 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2625 case MSR_KVM_SYSTEM_TIME
:
2626 case MSR_KVM_SYSTEM_TIME_NEW
:
2627 msr_info
->data
= vcpu
->arch
.time
;
2629 case MSR_KVM_ASYNC_PF_EN
:
2630 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2632 case MSR_KVM_STEAL_TIME
:
2633 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2635 case MSR_KVM_PV_EOI_EN
:
2636 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2638 case MSR_IA32_P5_MC_ADDR
:
2639 case MSR_IA32_P5_MC_TYPE
:
2640 case MSR_IA32_MCG_CAP
:
2641 case MSR_IA32_MCG_CTL
:
2642 case MSR_IA32_MCG_STATUS
:
2643 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2644 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
2645 msr_info
->host_initiated
);
2646 case MSR_K7_CLK_CTL
:
2648 * Provide expected ramp-up count for K7. All other
2649 * are set to zero, indicating minimum divisors for
2652 * This prevents guest kernels on AMD host with CPU
2653 * type 6, model 8 and higher from exploding due to
2654 * the rdmsr failing.
2656 msr_info
->data
= 0x20000000;
2658 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2659 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2660 case HV_X64_MSR_CRASH_CTL
:
2661 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2662 return kvm_hv_get_msr_common(vcpu
,
2663 msr_info
->index
, &msr_info
->data
,
2664 msr_info
->host_initiated
);
2666 case MSR_IA32_BBL_CR_CTL3
:
2667 /* This legacy MSR exists but isn't fully documented in current
2668 * silicon. It is however accessed by winxp in very narrow
2669 * scenarios where it sets bit #19, itself documented as
2670 * a "reserved" bit. Best effort attempt to source coherent
2671 * read data here should the balance of the register be
2672 * interpreted by the guest:
2674 * L2 cache control register 3: 64GB range, 256KB size,
2675 * enabled, latency 0x1, configured
2677 msr_info
->data
= 0xbe702111;
2679 case MSR_AMD64_OSVW_ID_LENGTH
:
2680 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2682 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2684 case MSR_AMD64_OSVW_STATUS
:
2685 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2687 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2689 case MSR_PLATFORM_INFO
:
2690 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2692 case MSR_MISC_FEATURES_ENABLES
:
2693 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2696 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2697 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2699 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2703 if (report_ignored_msrs
)
2704 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2712 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2715 * Read or write a bunch of msrs. All parameters are kernel addresses.
2717 * @return number of msrs set successfully.
2719 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2720 struct kvm_msr_entry
*entries
,
2721 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2722 unsigned index
, u64
*data
))
2726 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2727 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2734 * Read or write a bunch of msrs. Parameters are user addresses.
2736 * @return number of msrs set successfully.
2738 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2739 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2740 unsigned index
, u64
*data
),
2743 struct kvm_msrs msrs
;
2744 struct kvm_msr_entry
*entries
;
2749 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2753 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2756 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2757 entries
= memdup_user(user_msrs
->entries
, size
);
2758 if (IS_ERR(entries
)) {
2759 r
= PTR_ERR(entries
);
2763 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2768 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2779 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2784 case KVM_CAP_IRQCHIP
:
2786 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2787 case KVM_CAP_SET_TSS_ADDR
:
2788 case KVM_CAP_EXT_CPUID
:
2789 case KVM_CAP_EXT_EMUL_CPUID
:
2790 case KVM_CAP_CLOCKSOURCE
:
2792 case KVM_CAP_NOP_IO_DELAY
:
2793 case KVM_CAP_MP_STATE
:
2794 case KVM_CAP_SYNC_MMU
:
2795 case KVM_CAP_USER_NMI
:
2796 case KVM_CAP_REINJECT_CONTROL
:
2797 case KVM_CAP_IRQ_INJECT_STATUS
:
2798 case KVM_CAP_IOEVENTFD
:
2799 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2801 case KVM_CAP_PIT_STATE2
:
2802 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2803 case KVM_CAP_XEN_HVM
:
2804 case KVM_CAP_VCPU_EVENTS
:
2805 case KVM_CAP_HYPERV
:
2806 case KVM_CAP_HYPERV_VAPIC
:
2807 case KVM_CAP_HYPERV_SPIN
:
2808 case KVM_CAP_HYPERV_SYNIC
:
2809 case KVM_CAP_HYPERV_SYNIC2
:
2810 case KVM_CAP_HYPERV_VP_INDEX
:
2811 case KVM_CAP_PCI_SEGMENT
:
2812 case KVM_CAP_DEBUGREGS
:
2813 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2815 case KVM_CAP_ASYNC_PF
:
2816 case KVM_CAP_GET_TSC_KHZ
:
2817 case KVM_CAP_KVMCLOCK_CTRL
:
2818 case KVM_CAP_READONLY_MEM
:
2819 case KVM_CAP_HYPERV_TIME
:
2820 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2821 case KVM_CAP_TSC_DEADLINE_TIMER
:
2822 case KVM_CAP_ENABLE_CAP_VM
:
2823 case KVM_CAP_DISABLE_QUIRKS
:
2824 case KVM_CAP_SET_BOOT_CPU_ID
:
2825 case KVM_CAP_SPLIT_IRQCHIP
:
2826 case KVM_CAP_IMMEDIATE_EXIT
:
2827 case KVM_CAP_GET_MSR_FEATURES
:
2830 case KVM_CAP_ADJUST_CLOCK
:
2831 r
= KVM_CLOCK_TSC_STABLE
;
2833 case KVM_CAP_X86_GUEST_MWAIT
:
2834 r
= kvm_mwait_in_guest();
2836 case KVM_CAP_X86_SMM
:
2837 /* SMBASE is usually relocated above 1M on modern chipsets,
2838 * and SMM handlers might indeed rely on 4G segment limits,
2839 * so do not report SMM to be available if real mode is
2840 * emulated via vm86 mode. Still, do not go to great lengths
2841 * to avoid userspace's usage of the feature, because it is a
2842 * fringe case that is not enabled except via specific settings
2843 * of the module parameters.
2845 r
= kvm_x86_ops
->has_emulated_msr(MSR_IA32_SMBASE
);
2848 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2850 case KVM_CAP_NR_VCPUS
:
2851 r
= KVM_SOFT_MAX_VCPUS
;
2853 case KVM_CAP_MAX_VCPUS
:
2856 case KVM_CAP_MAX_VCPU_ID
:
2857 r
= KVM_MAX_VCPU_ID
;
2859 case KVM_CAP_NR_MEMSLOTS
:
2860 r
= KVM_USER_MEM_SLOTS
;
2862 case KVM_CAP_PV_MMU
: /* obsolete */
2866 r
= KVM_MAX_MCE_BANKS
;
2869 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2871 case KVM_CAP_TSC_CONTROL
:
2872 r
= kvm_has_tsc_control
;
2874 case KVM_CAP_X2APIC_API
:
2875 r
= KVM_X2APIC_API_VALID_FLAGS
;
2885 long kvm_arch_dev_ioctl(struct file
*filp
,
2886 unsigned int ioctl
, unsigned long arg
)
2888 void __user
*argp
= (void __user
*)arg
;
2892 case KVM_GET_MSR_INDEX_LIST
: {
2893 struct kvm_msr_list __user
*user_msr_list
= argp
;
2894 struct kvm_msr_list msr_list
;
2898 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2901 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2902 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2905 if (n
< msr_list
.nmsrs
)
2908 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2909 num_msrs_to_save
* sizeof(u32
)))
2911 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2913 num_emulated_msrs
* sizeof(u32
)))
2918 case KVM_GET_SUPPORTED_CPUID
:
2919 case KVM_GET_EMULATED_CPUID
: {
2920 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2921 struct kvm_cpuid2 cpuid
;
2924 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2927 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2933 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2938 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2940 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2941 sizeof(kvm_mce_cap_supported
)))
2945 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
2946 struct kvm_msr_list __user
*user_msr_list
= argp
;
2947 struct kvm_msr_list msr_list
;
2951 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
2954 msr_list
.nmsrs
= num_msr_based_features
;
2955 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
2958 if (n
< msr_list
.nmsrs
)
2961 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
2962 num_msr_based_features
* sizeof(u32
)))
2968 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
2978 static void wbinvd_ipi(void *garbage
)
2983 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2985 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2988 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2990 /* Address WBINVD may be executed by guest */
2991 if (need_emulate_wbinvd(vcpu
)) {
2992 if (kvm_x86_ops
->has_wbinvd_exit())
2993 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2994 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2995 smp_call_function_single(vcpu
->cpu
,
2996 wbinvd_ipi
, NULL
, 1);
2999 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
3001 /* Apply any externally detected TSC adjustments (due to suspend) */
3002 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
3003 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
3004 vcpu
->arch
.tsc_offset_adjustment
= 0;
3005 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3008 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
3009 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3010 rdtsc() - vcpu
->arch
.last_host_tsc
;
3012 mark_tsc_unstable("KVM discovered backwards TSC");
3014 if (check_tsc_unstable()) {
3015 u64 offset
= kvm_compute_tsc_offset(vcpu
,
3016 vcpu
->arch
.last_guest_tsc
);
3017 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
3018 vcpu
->arch
.tsc_catchup
= 1;
3021 if (kvm_lapic_hv_timer_in_use(vcpu
))
3022 kvm_lapic_restart_hv_timer(vcpu
);
3025 * On a host with synchronized TSC, there is no need to update
3026 * kvmclock on vcpu->cpu migration
3028 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
3029 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
3030 if (vcpu
->cpu
!= cpu
)
3031 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
3035 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3038 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
3040 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3043 vcpu
->arch
.st
.steal
.preempted
= 1;
3045 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
3046 &vcpu
->arch
.st
.steal
.preempted
,
3047 offsetof(struct kvm_steal_time
, preempted
),
3048 sizeof(vcpu
->arch
.st
.steal
.preempted
));
3051 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3055 if (vcpu
->preempted
)
3056 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
3059 * Disable page faults because we're in atomic context here.
3060 * kvm_write_guest_offset_cached() would call might_fault()
3061 * that relies on pagefault_disable() to tell if there's a
3062 * bug. NOTE: the write to guest memory may not go through if
3063 * during postcopy live migration or if there's heavy guest
3066 pagefault_disable();
3068 * kvm_memslots() will be called by
3069 * kvm_write_guest_offset_cached() so take the srcu lock.
3071 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3072 kvm_steal_time_set_preempted(vcpu
);
3073 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3075 kvm_x86_ops
->vcpu_put(vcpu
);
3076 vcpu
->arch
.last_host_tsc
= rdtsc();
3078 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3079 * on every vmexit, but if not, we might have a stale dr6 from the
3080 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3085 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3086 struct kvm_lapic_state
*s
)
3088 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
3089 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3091 return kvm_apic_get_state(vcpu
, s
);
3094 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3095 struct kvm_lapic_state
*s
)
3099 r
= kvm_apic_set_state(vcpu
, s
);
3102 update_cr8_intercept(vcpu
);
3107 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3109 return (!lapic_in_kernel(vcpu
) ||
3110 kvm_apic_accept_pic_intr(vcpu
));
3114 * if userspace requested an interrupt window, check that the
3115 * interrupt window is open.
3117 * No need to exit to userspace if we already have an interrupt queued.
3119 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3121 return kvm_arch_interrupt_allowed(vcpu
) &&
3122 !kvm_cpu_has_interrupt(vcpu
) &&
3123 !kvm_event_needs_reinjection(vcpu
) &&
3124 kvm_cpu_accept_dm_intr(vcpu
);
3127 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3128 struct kvm_interrupt
*irq
)
3130 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3133 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3134 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3135 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3140 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3141 * fail for in-kernel 8259.
3143 if (pic_in_kernel(vcpu
->kvm
))
3146 if (vcpu
->arch
.pending_external_vector
!= -1)
3149 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3150 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3154 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3156 kvm_inject_nmi(vcpu
);
3161 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3163 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3168 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3169 struct kvm_tpr_access_ctl
*tac
)
3173 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3177 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3181 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3184 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3186 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3189 vcpu
->arch
.mcg_cap
= mcg_cap
;
3190 /* Init IA32_MCG_CTL to all 1s */
3191 if (mcg_cap
& MCG_CTL_P
)
3192 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3193 /* Init IA32_MCi_CTL to all 1s */
3194 for (bank
= 0; bank
< bank_num
; bank
++)
3195 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3197 if (kvm_x86_ops
->setup_mce
)
3198 kvm_x86_ops
->setup_mce(vcpu
);
3203 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3204 struct kvm_x86_mce
*mce
)
3206 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3207 unsigned bank_num
= mcg_cap
& 0xff;
3208 u64
*banks
= vcpu
->arch
.mce_banks
;
3210 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3213 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3214 * reporting is disabled
3216 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3217 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3219 banks
+= 4 * mce
->bank
;
3221 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3222 * reporting is disabled for the bank
3224 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3226 if (mce
->status
& MCI_STATUS_UC
) {
3227 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3228 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3229 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3232 if (banks
[1] & MCI_STATUS_VAL
)
3233 mce
->status
|= MCI_STATUS_OVER
;
3234 banks
[2] = mce
->addr
;
3235 banks
[3] = mce
->misc
;
3236 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3237 banks
[1] = mce
->status
;
3238 kvm_queue_exception(vcpu
, MC_VECTOR
);
3239 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3240 || !(banks
[1] & MCI_STATUS_UC
)) {
3241 if (banks
[1] & MCI_STATUS_VAL
)
3242 mce
->status
|= MCI_STATUS_OVER
;
3243 banks
[2] = mce
->addr
;
3244 banks
[3] = mce
->misc
;
3245 banks
[1] = mce
->status
;
3247 banks
[1] |= MCI_STATUS_OVER
;
3251 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3252 struct kvm_vcpu_events
*events
)
3256 * FIXME: pass injected and pending separately. This is only
3257 * needed for nested virtualization, whose state cannot be
3258 * migrated yet. For now we can combine them.
3260 events
->exception
.injected
=
3261 (vcpu
->arch
.exception
.pending
||
3262 vcpu
->arch
.exception
.injected
) &&
3263 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3264 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3265 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3266 events
->exception
.pad
= 0;
3267 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3269 events
->interrupt
.injected
=
3270 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3271 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3272 events
->interrupt
.soft
= 0;
3273 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3275 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3276 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3277 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3278 events
->nmi
.pad
= 0;
3280 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3282 events
->smi
.smm
= is_smm(vcpu
);
3283 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3284 events
->smi
.smm_inside_nmi
=
3285 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3286 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3288 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3289 | KVM_VCPUEVENT_VALID_SHADOW
3290 | KVM_VCPUEVENT_VALID_SMM
);
3291 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3294 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3296 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3297 struct kvm_vcpu_events
*events
)
3299 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3300 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3301 | KVM_VCPUEVENT_VALID_SHADOW
3302 | KVM_VCPUEVENT_VALID_SMM
))
3305 if (events
->exception
.injected
&&
3306 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3307 is_guest_mode(vcpu
)))
3310 /* INITs are latched while in SMM */
3311 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3312 (events
->smi
.smm
|| events
->smi
.pending
) &&
3313 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3317 vcpu
->arch
.exception
.injected
= false;
3318 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3319 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3320 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3321 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3323 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3324 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3325 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3326 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3327 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3328 events
->interrupt
.shadow
);
3330 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3331 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3332 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3333 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3335 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3336 lapic_in_kernel(vcpu
))
3337 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3339 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3340 u32 hflags
= vcpu
->arch
.hflags
;
3341 if (events
->smi
.smm
)
3342 hflags
|= HF_SMM_MASK
;
3344 hflags
&= ~HF_SMM_MASK
;
3345 kvm_set_hflags(vcpu
, hflags
);
3347 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3349 if (events
->smi
.smm
) {
3350 if (events
->smi
.smm_inside_nmi
)
3351 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3353 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3354 if (lapic_in_kernel(vcpu
)) {
3355 if (events
->smi
.latched_init
)
3356 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3358 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3363 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3368 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3369 struct kvm_debugregs
*dbgregs
)
3373 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3374 kvm_get_dr(vcpu
, 6, &val
);
3376 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3378 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3381 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3382 struct kvm_debugregs
*dbgregs
)
3387 if (dbgregs
->dr6
& ~0xffffffffull
)
3389 if (dbgregs
->dr7
& ~0xffffffffull
)
3392 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3393 kvm_update_dr0123(vcpu
);
3394 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3395 kvm_update_dr6(vcpu
);
3396 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3397 kvm_update_dr7(vcpu
);
3402 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3404 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3406 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3407 u64 xstate_bv
= xsave
->header
.xfeatures
;
3411 * Copy legacy XSAVE area, to avoid complications with CPUID
3412 * leaves 0 and 1 in the loop below.
3414 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3417 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3418 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3421 * Copy each region from the possibly compacted offset to the
3422 * non-compacted offset.
3424 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3426 u64 feature
= valid
& -valid
;
3427 int index
= fls64(feature
) - 1;
3428 void *src
= get_xsave_addr(xsave
, feature
);
3431 u32 size
, offset
, ecx
, edx
;
3432 cpuid_count(XSTATE_CPUID
, index
,
3433 &size
, &offset
, &ecx
, &edx
);
3434 if (feature
== XFEATURE_MASK_PKRU
)
3435 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3436 sizeof(vcpu
->arch
.pkru
));
3438 memcpy(dest
+ offset
, src
, size
);
3446 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3448 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3449 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3453 * Copy legacy XSAVE area, to avoid complications with CPUID
3454 * leaves 0 and 1 in the loop below.
3456 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3458 /* Set XSTATE_BV and possibly XCOMP_BV. */
3459 xsave
->header
.xfeatures
= xstate_bv
;
3460 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3461 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3464 * Copy each region from the non-compacted offset to the
3465 * possibly compacted offset.
3467 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3469 u64 feature
= valid
& -valid
;
3470 int index
= fls64(feature
) - 1;
3471 void *dest
= get_xsave_addr(xsave
, feature
);
3474 u32 size
, offset
, ecx
, edx
;
3475 cpuid_count(XSTATE_CPUID
, index
,
3476 &size
, &offset
, &ecx
, &edx
);
3477 if (feature
== XFEATURE_MASK_PKRU
)
3478 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3479 sizeof(vcpu
->arch
.pkru
));
3481 memcpy(dest
, src
+ offset
, size
);
3488 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3489 struct kvm_xsave
*guest_xsave
)
3491 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3492 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3493 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3495 memcpy(guest_xsave
->region
,
3496 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3497 sizeof(struct fxregs_state
));
3498 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3499 XFEATURE_MASK_FPSSE
;
3503 #define XSAVE_MXCSR_OFFSET 24
3505 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3506 struct kvm_xsave
*guest_xsave
)
3509 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3510 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3512 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3514 * Here we allow setting states that are not present in
3515 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3516 * with old userspace.
3518 if (xstate_bv
& ~kvm_supported_xcr0() ||
3519 mxcsr
& ~mxcsr_feature_mask
)
3521 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3523 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3524 mxcsr
& ~mxcsr_feature_mask
)
3526 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3527 guest_xsave
->region
, sizeof(struct fxregs_state
));
3532 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3533 struct kvm_xcrs
*guest_xcrs
)
3535 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3536 guest_xcrs
->nr_xcrs
= 0;
3540 guest_xcrs
->nr_xcrs
= 1;
3541 guest_xcrs
->flags
= 0;
3542 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3543 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3546 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3547 struct kvm_xcrs
*guest_xcrs
)
3551 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3554 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3557 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3558 /* Only support XCR0 currently */
3559 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3560 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3561 guest_xcrs
->xcrs
[i
].value
);
3570 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3571 * stopped by the hypervisor. This function will be called from the host only.
3572 * EINVAL is returned when the host attempts to set the flag for a guest that
3573 * does not support pv clocks.
3575 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3577 if (!vcpu
->arch
.pv_time_enabled
)
3579 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3580 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3584 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3585 struct kvm_enable_cap
*cap
)
3591 case KVM_CAP_HYPERV_SYNIC2
:
3594 case KVM_CAP_HYPERV_SYNIC
:
3595 if (!irqchip_in_kernel(vcpu
->kvm
))
3597 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3598 KVM_CAP_HYPERV_SYNIC2
);
3604 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3605 unsigned int ioctl
, unsigned long arg
)
3607 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3608 void __user
*argp
= (void __user
*)arg
;
3611 struct kvm_lapic_state
*lapic
;
3612 struct kvm_xsave
*xsave
;
3613 struct kvm_xcrs
*xcrs
;
3619 case KVM_GET_LAPIC
: {
3621 if (!lapic_in_kernel(vcpu
))
3623 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3628 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3632 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3637 case KVM_SET_LAPIC
: {
3639 if (!lapic_in_kernel(vcpu
))
3641 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3642 if (IS_ERR(u
.lapic
))
3643 return PTR_ERR(u
.lapic
);
3645 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3648 case KVM_INTERRUPT
: {
3649 struct kvm_interrupt irq
;
3652 if (copy_from_user(&irq
, argp
, sizeof irq
))
3654 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3658 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3662 r
= kvm_vcpu_ioctl_smi(vcpu
);
3665 case KVM_SET_CPUID
: {
3666 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3667 struct kvm_cpuid cpuid
;
3670 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3672 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3675 case KVM_SET_CPUID2
: {
3676 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3677 struct kvm_cpuid2 cpuid
;
3680 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3682 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3683 cpuid_arg
->entries
);
3686 case KVM_GET_CPUID2
: {
3687 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3688 struct kvm_cpuid2 cpuid
;
3691 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3693 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3694 cpuid_arg
->entries
);
3698 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3703 case KVM_GET_MSRS
: {
3704 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3705 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3706 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3709 case KVM_SET_MSRS
: {
3710 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3711 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3712 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3715 case KVM_TPR_ACCESS_REPORTING
: {
3716 struct kvm_tpr_access_ctl tac
;
3719 if (copy_from_user(&tac
, argp
, sizeof tac
))
3721 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3725 if (copy_to_user(argp
, &tac
, sizeof tac
))
3730 case KVM_SET_VAPIC_ADDR
: {
3731 struct kvm_vapic_addr va
;
3735 if (!lapic_in_kernel(vcpu
))
3738 if (copy_from_user(&va
, argp
, sizeof va
))
3740 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3741 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3742 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3745 case KVM_X86_SETUP_MCE
: {
3749 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3751 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3754 case KVM_X86_SET_MCE
: {
3755 struct kvm_x86_mce mce
;
3758 if (copy_from_user(&mce
, argp
, sizeof mce
))
3760 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3763 case KVM_GET_VCPU_EVENTS
: {
3764 struct kvm_vcpu_events events
;
3766 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3769 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3774 case KVM_SET_VCPU_EVENTS
: {
3775 struct kvm_vcpu_events events
;
3778 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3781 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3784 case KVM_GET_DEBUGREGS
: {
3785 struct kvm_debugregs dbgregs
;
3787 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3790 if (copy_to_user(argp
, &dbgregs
,
3791 sizeof(struct kvm_debugregs
)))
3796 case KVM_SET_DEBUGREGS
: {
3797 struct kvm_debugregs dbgregs
;
3800 if (copy_from_user(&dbgregs
, argp
,
3801 sizeof(struct kvm_debugregs
)))
3804 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3807 case KVM_GET_XSAVE
: {
3808 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3813 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3816 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3821 case KVM_SET_XSAVE
: {
3822 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3823 if (IS_ERR(u
.xsave
))
3824 return PTR_ERR(u
.xsave
);
3826 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3829 case KVM_GET_XCRS
: {
3830 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3835 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3838 if (copy_to_user(argp
, u
.xcrs
,
3839 sizeof(struct kvm_xcrs
)))
3844 case KVM_SET_XCRS
: {
3845 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3847 return PTR_ERR(u
.xcrs
);
3849 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3852 case KVM_SET_TSC_KHZ
: {
3856 user_tsc_khz
= (u32
)arg
;
3858 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3861 if (user_tsc_khz
== 0)
3862 user_tsc_khz
= tsc_khz
;
3864 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3869 case KVM_GET_TSC_KHZ
: {
3870 r
= vcpu
->arch
.virtual_tsc_khz
;
3873 case KVM_KVMCLOCK_CTRL
: {
3874 r
= kvm_set_guest_paused(vcpu
);
3877 case KVM_ENABLE_CAP
: {
3878 struct kvm_enable_cap cap
;
3881 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3883 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3894 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3896 return VM_FAULT_SIGBUS
;
3899 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3903 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3905 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3909 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3912 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3916 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3917 u32 kvm_nr_mmu_pages
)
3919 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3922 mutex_lock(&kvm
->slots_lock
);
3924 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3925 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3927 mutex_unlock(&kvm
->slots_lock
);
3931 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3933 return kvm
->arch
.n_max_mmu_pages
;
3936 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3938 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3942 switch (chip
->chip_id
) {
3943 case KVM_IRQCHIP_PIC_MASTER
:
3944 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3945 sizeof(struct kvm_pic_state
));
3947 case KVM_IRQCHIP_PIC_SLAVE
:
3948 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3949 sizeof(struct kvm_pic_state
));
3951 case KVM_IRQCHIP_IOAPIC
:
3952 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3961 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3963 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3967 switch (chip
->chip_id
) {
3968 case KVM_IRQCHIP_PIC_MASTER
:
3969 spin_lock(&pic
->lock
);
3970 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3971 sizeof(struct kvm_pic_state
));
3972 spin_unlock(&pic
->lock
);
3974 case KVM_IRQCHIP_PIC_SLAVE
:
3975 spin_lock(&pic
->lock
);
3976 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3977 sizeof(struct kvm_pic_state
));
3978 spin_unlock(&pic
->lock
);
3980 case KVM_IRQCHIP_IOAPIC
:
3981 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3987 kvm_pic_update_irq(pic
);
3991 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3993 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3995 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3997 mutex_lock(&kps
->lock
);
3998 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3999 mutex_unlock(&kps
->lock
);
4003 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4006 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4008 mutex_lock(&pit
->pit_state
.lock
);
4009 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
4010 for (i
= 0; i
< 3; i
++)
4011 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
4012 mutex_unlock(&pit
->pit_state
.lock
);
4016 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4018 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
4019 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
4020 sizeof(ps
->channels
));
4021 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
4022 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
4023 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
4027 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4031 u32 prev_legacy
, cur_legacy
;
4032 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4034 mutex_lock(&pit
->pit_state
.lock
);
4035 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4036 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4037 if (!prev_legacy
&& cur_legacy
)
4039 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
4040 sizeof(pit
->pit_state
.channels
));
4041 pit
->pit_state
.flags
= ps
->flags
;
4042 for (i
= 0; i
< 3; i
++)
4043 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
4045 mutex_unlock(&pit
->pit_state
.lock
);
4049 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
4050 struct kvm_reinject_control
*control
)
4052 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4057 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4058 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4059 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4061 mutex_lock(&pit
->pit_state
.lock
);
4062 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
4063 mutex_unlock(&pit
->pit_state
.lock
);
4069 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4070 * @kvm: kvm instance
4071 * @log: slot id and address to which we copy the log
4073 * Steps 1-4 below provide general overview of dirty page logging. See
4074 * kvm_get_dirty_log_protect() function description for additional details.
4076 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4077 * always flush the TLB (step 4) even if previous step failed and the dirty
4078 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4079 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4080 * writes will be marked dirty for next log read.
4082 * 1. Take a snapshot of the bit and clear it if needed.
4083 * 2. Write protect the corresponding page.
4084 * 3. Copy the snapshot to the userspace.
4085 * 4. Flush TLB's if needed.
4087 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
4089 bool is_dirty
= false;
4092 mutex_lock(&kvm
->slots_lock
);
4095 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4097 if (kvm_x86_ops
->flush_log_dirty
)
4098 kvm_x86_ops
->flush_log_dirty(kvm
);
4100 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
4103 * All the TLBs can be flushed out of mmu lock, see the comments in
4104 * kvm_mmu_slot_remove_write_access().
4106 lockdep_assert_held(&kvm
->slots_lock
);
4108 kvm_flush_remote_tlbs(kvm
);
4110 mutex_unlock(&kvm
->slots_lock
);
4114 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4117 if (!irqchip_in_kernel(kvm
))
4120 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4121 irq_event
->irq
, irq_event
->level
,
4126 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4127 struct kvm_enable_cap
*cap
)
4135 case KVM_CAP_DISABLE_QUIRKS
:
4136 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4139 case KVM_CAP_SPLIT_IRQCHIP
: {
4140 mutex_lock(&kvm
->lock
);
4142 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4143 goto split_irqchip_unlock
;
4145 if (irqchip_in_kernel(kvm
))
4146 goto split_irqchip_unlock
;
4147 if (kvm
->created_vcpus
)
4148 goto split_irqchip_unlock
;
4149 r
= kvm_setup_empty_irq_routing(kvm
);
4151 goto split_irqchip_unlock
;
4152 /* Pairs with irqchip_in_kernel. */
4154 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4155 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4157 split_irqchip_unlock
:
4158 mutex_unlock(&kvm
->lock
);
4161 case KVM_CAP_X2APIC_API
:
4163 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4166 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4167 kvm
->arch
.x2apic_format
= true;
4168 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4169 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4180 long kvm_arch_vm_ioctl(struct file
*filp
,
4181 unsigned int ioctl
, unsigned long arg
)
4183 struct kvm
*kvm
= filp
->private_data
;
4184 void __user
*argp
= (void __user
*)arg
;
4187 * This union makes it completely explicit to gcc-3.x
4188 * that these two variables' stack usage should be
4189 * combined, not added together.
4192 struct kvm_pit_state ps
;
4193 struct kvm_pit_state2 ps2
;
4194 struct kvm_pit_config pit_config
;
4198 case KVM_SET_TSS_ADDR
:
4199 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4201 case KVM_SET_IDENTITY_MAP_ADDR
: {
4204 mutex_lock(&kvm
->lock
);
4206 if (kvm
->created_vcpus
)
4207 goto set_identity_unlock
;
4209 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4210 goto set_identity_unlock
;
4211 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4212 set_identity_unlock
:
4213 mutex_unlock(&kvm
->lock
);
4216 case KVM_SET_NR_MMU_PAGES
:
4217 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4219 case KVM_GET_NR_MMU_PAGES
:
4220 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4222 case KVM_CREATE_IRQCHIP
: {
4223 mutex_lock(&kvm
->lock
);
4226 if (irqchip_in_kernel(kvm
))
4227 goto create_irqchip_unlock
;
4230 if (kvm
->created_vcpus
)
4231 goto create_irqchip_unlock
;
4233 r
= kvm_pic_init(kvm
);
4235 goto create_irqchip_unlock
;
4237 r
= kvm_ioapic_init(kvm
);
4239 kvm_pic_destroy(kvm
);
4240 goto create_irqchip_unlock
;
4243 r
= kvm_setup_default_irq_routing(kvm
);
4245 kvm_ioapic_destroy(kvm
);
4246 kvm_pic_destroy(kvm
);
4247 goto create_irqchip_unlock
;
4249 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4251 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4252 create_irqchip_unlock
:
4253 mutex_unlock(&kvm
->lock
);
4256 case KVM_CREATE_PIT
:
4257 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4259 case KVM_CREATE_PIT2
:
4261 if (copy_from_user(&u
.pit_config
, argp
,
4262 sizeof(struct kvm_pit_config
)))
4265 mutex_lock(&kvm
->lock
);
4268 goto create_pit_unlock
;
4270 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4274 mutex_unlock(&kvm
->lock
);
4276 case KVM_GET_IRQCHIP
: {
4277 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4278 struct kvm_irqchip
*chip
;
4280 chip
= memdup_user(argp
, sizeof(*chip
));
4287 if (!irqchip_kernel(kvm
))
4288 goto get_irqchip_out
;
4289 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4291 goto get_irqchip_out
;
4293 if (copy_to_user(argp
, chip
, sizeof *chip
))
4294 goto get_irqchip_out
;
4300 case KVM_SET_IRQCHIP
: {
4301 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4302 struct kvm_irqchip
*chip
;
4304 chip
= memdup_user(argp
, sizeof(*chip
));
4311 if (!irqchip_kernel(kvm
))
4312 goto set_irqchip_out
;
4313 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4315 goto set_irqchip_out
;
4323 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4326 if (!kvm
->arch
.vpit
)
4328 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4332 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4339 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4342 if (!kvm
->arch
.vpit
)
4344 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4347 case KVM_GET_PIT2
: {
4349 if (!kvm
->arch
.vpit
)
4351 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4355 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4360 case KVM_SET_PIT2
: {
4362 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4365 if (!kvm
->arch
.vpit
)
4367 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4370 case KVM_REINJECT_CONTROL
: {
4371 struct kvm_reinject_control control
;
4373 if (copy_from_user(&control
, argp
, sizeof(control
)))
4375 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4378 case KVM_SET_BOOT_CPU_ID
:
4380 mutex_lock(&kvm
->lock
);
4381 if (kvm
->created_vcpus
)
4384 kvm
->arch
.bsp_vcpu_id
= arg
;
4385 mutex_unlock(&kvm
->lock
);
4387 case KVM_XEN_HVM_CONFIG
: {
4388 struct kvm_xen_hvm_config xhc
;
4390 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4395 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4399 case KVM_SET_CLOCK
: {
4400 struct kvm_clock_data user_ns
;
4404 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4413 * TODO: userspace has to take care of races with VCPU_RUN, so
4414 * kvm_gen_update_masterclock() can be cut down to locked
4415 * pvclock_update_vm_gtod_copy().
4417 kvm_gen_update_masterclock(kvm
);
4418 now_ns
= get_kvmclock_ns(kvm
);
4419 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4420 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4423 case KVM_GET_CLOCK
: {
4424 struct kvm_clock_data user_ns
;
4427 now_ns
= get_kvmclock_ns(kvm
);
4428 user_ns
.clock
= now_ns
;
4429 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4430 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4433 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4438 case KVM_ENABLE_CAP
: {
4439 struct kvm_enable_cap cap
;
4442 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4444 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4454 static void kvm_init_msr_list(void)
4459 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4460 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4464 * Even MSRs that are valid in the host may not be exposed
4465 * to the guests in some cases.
4467 switch (msrs_to_save
[i
]) {
4468 case MSR_IA32_BNDCFGS
:
4469 if (!kvm_x86_ops
->mpx_supported())
4473 if (!kvm_x86_ops
->rdtscp_supported())
4481 msrs_to_save
[j
] = msrs_to_save
[i
];
4484 num_msrs_to_save
= j
;
4486 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4487 if (!kvm_x86_ops
->has_emulated_msr(emulated_msrs
[i
]))
4491 emulated_msrs
[j
] = emulated_msrs
[i
];
4494 num_emulated_msrs
= j
;
4496 for (i
= j
= 0; i
< ARRAY_SIZE(msr_based_features
); i
++) {
4497 struct kvm_msr_entry msr
;
4499 msr
.index
= msr_based_features
[i
];
4500 if (kvm_get_msr_feature(&msr
))
4504 msr_based_features
[j
] = msr_based_features
[i
];
4507 num_msr_based_features
= j
;
4510 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4518 if (!(lapic_in_kernel(vcpu
) &&
4519 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4520 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4531 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4538 if (!(lapic_in_kernel(vcpu
) &&
4539 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4541 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4543 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4553 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4554 struct kvm_segment
*var
, int seg
)
4556 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4559 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4560 struct kvm_segment
*var
, int seg
)
4562 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4565 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4566 struct x86_exception
*exception
)
4570 BUG_ON(!mmu_is_nested(vcpu
));
4572 /* NPT walks are always user-walks */
4573 access
|= PFERR_USER_MASK
;
4574 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4579 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4580 struct x86_exception
*exception
)
4582 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4583 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4586 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4587 struct x86_exception
*exception
)
4589 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4590 access
|= PFERR_FETCH_MASK
;
4591 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4594 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4595 struct x86_exception
*exception
)
4597 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4598 access
|= PFERR_WRITE_MASK
;
4599 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4602 /* uses this to access any guest's mapped memory without checking CPL */
4603 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4604 struct x86_exception
*exception
)
4606 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4609 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4610 struct kvm_vcpu
*vcpu
, u32 access
,
4611 struct x86_exception
*exception
)
4614 int r
= X86EMUL_CONTINUE
;
4617 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4619 unsigned offset
= addr
& (PAGE_SIZE
-1);
4620 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4623 if (gpa
== UNMAPPED_GVA
)
4624 return X86EMUL_PROPAGATE_FAULT
;
4625 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4628 r
= X86EMUL_IO_NEEDED
;
4640 /* used for instruction fetching */
4641 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4642 gva_t addr
, void *val
, unsigned int bytes
,
4643 struct x86_exception
*exception
)
4645 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4646 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4650 /* Inline kvm_read_guest_virt_helper for speed. */
4651 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4653 if (unlikely(gpa
== UNMAPPED_GVA
))
4654 return X86EMUL_PROPAGATE_FAULT
;
4656 offset
= addr
& (PAGE_SIZE
-1);
4657 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4658 bytes
= (unsigned)PAGE_SIZE
- offset
;
4659 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4661 if (unlikely(ret
< 0))
4662 return X86EMUL_IO_NEEDED
;
4664 return X86EMUL_CONTINUE
;
4667 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
4668 gva_t addr
, void *val
, unsigned int bytes
,
4669 struct x86_exception
*exception
)
4671 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4674 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
4675 * is returned, but our callers are not ready for that and they blindly
4676 * call kvm_inject_page_fault. Ensure that they at least do not leak
4677 * uninitialized kernel stack memory into cr2 and error code.
4679 memset(exception
, 0, sizeof(*exception
));
4680 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4683 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4685 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
4686 gva_t addr
, void *val
, unsigned int bytes
,
4687 struct x86_exception
*exception
, bool system
)
4689 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4692 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
4693 access
|= PFERR_USER_MASK
;
4695 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
4698 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4699 unsigned long addr
, void *val
, unsigned int bytes
)
4701 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4702 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4704 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4707 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4708 struct kvm_vcpu
*vcpu
, u32 access
,
4709 struct x86_exception
*exception
)
4712 int r
= X86EMUL_CONTINUE
;
4715 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4718 unsigned offset
= addr
& (PAGE_SIZE
-1);
4719 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4722 if (gpa
== UNMAPPED_GVA
)
4723 return X86EMUL_PROPAGATE_FAULT
;
4724 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4726 r
= X86EMUL_IO_NEEDED
;
4738 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
4739 unsigned int bytes
, struct x86_exception
*exception
,
4742 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4743 u32 access
= PFERR_WRITE_MASK
;
4745 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
4746 access
|= PFERR_USER_MASK
;
4748 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4752 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
4753 unsigned int bytes
, struct x86_exception
*exception
)
4755 /* kvm_write_guest_virt_system can pull in tons of pages. */
4756 vcpu
->arch
.l1tf_flush_l1d
= true;
4758 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4759 PFERR_WRITE_MASK
, exception
);
4761 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4763 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4764 gpa_t gpa
, bool write
)
4766 /* For APIC access vmexit */
4767 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4770 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4771 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4778 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4779 gpa_t
*gpa
, struct x86_exception
*exception
,
4782 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4783 | (write
? PFERR_WRITE_MASK
: 0);
4786 * currently PKRU is only applied to ept enabled guest so
4787 * there is no pkey in EPT page table for L1 guest or EPT
4788 * shadow page table for L2 guest.
4790 if (vcpu_match_mmio_gva(vcpu
, gva
)
4791 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4792 vcpu
->arch
.access
, 0, access
)) {
4793 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4794 (gva
& (PAGE_SIZE
- 1));
4795 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4799 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4801 if (*gpa
== UNMAPPED_GVA
)
4804 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4807 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4808 const void *val
, int bytes
)
4812 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4815 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4819 struct read_write_emulator_ops
{
4820 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4822 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4823 void *val
, int bytes
);
4824 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4825 int bytes
, void *val
);
4826 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4827 void *val
, int bytes
);
4831 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4833 if (vcpu
->mmio_read_completed
) {
4834 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4835 vcpu
->mmio_fragments
[0].gpa
, val
);
4836 vcpu
->mmio_read_completed
= 0;
4843 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4844 void *val
, int bytes
)
4846 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4849 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4850 void *val
, int bytes
)
4852 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4855 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4857 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4858 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4861 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4862 void *val
, int bytes
)
4864 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4865 return X86EMUL_IO_NEEDED
;
4868 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4869 void *val
, int bytes
)
4871 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4873 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4874 return X86EMUL_CONTINUE
;
4877 static const struct read_write_emulator_ops read_emultor
= {
4878 .read_write_prepare
= read_prepare
,
4879 .read_write_emulate
= read_emulate
,
4880 .read_write_mmio
= vcpu_mmio_read
,
4881 .read_write_exit_mmio
= read_exit_mmio
,
4884 static const struct read_write_emulator_ops write_emultor
= {
4885 .read_write_emulate
= write_emulate
,
4886 .read_write_mmio
= write_mmio
,
4887 .read_write_exit_mmio
= write_exit_mmio
,
4891 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4893 struct x86_exception
*exception
,
4894 struct kvm_vcpu
*vcpu
,
4895 const struct read_write_emulator_ops
*ops
)
4899 bool write
= ops
->write
;
4900 struct kvm_mmio_fragment
*frag
;
4901 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4904 * If the exit was due to a NPF we may already have a GPA.
4905 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4906 * Note, this cannot be used on string operations since string
4907 * operation using rep will only have the initial GPA from the NPF
4910 if (vcpu
->arch
.gpa_available
&&
4911 emulator_can_use_gpa(ctxt
) &&
4912 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4913 gpa
= vcpu
->arch
.gpa_val
;
4914 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4916 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4918 return X86EMUL_PROPAGATE_FAULT
;
4921 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4922 return X86EMUL_CONTINUE
;
4925 * Is this MMIO handled locally?
4927 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4928 if (handled
== bytes
)
4929 return X86EMUL_CONTINUE
;
4935 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4936 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4940 return X86EMUL_CONTINUE
;
4943 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4945 void *val
, unsigned int bytes
,
4946 struct x86_exception
*exception
,
4947 const struct read_write_emulator_ops
*ops
)
4949 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4953 if (ops
->read_write_prepare
&&
4954 ops
->read_write_prepare(vcpu
, val
, bytes
))
4955 return X86EMUL_CONTINUE
;
4957 vcpu
->mmio_nr_fragments
= 0;
4959 /* Crossing a page boundary? */
4960 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4963 now
= -addr
& ~PAGE_MASK
;
4964 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4967 if (rc
!= X86EMUL_CONTINUE
)
4970 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4976 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4978 if (rc
!= X86EMUL_CONTINUE
)
4981 if (!vcpu
->mmio_nr_fragments
)
4984 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4986 vcpu
->mmio_needed
= 1;
4987 vcpu
->mmio_cur_fragment
= 0;
4989 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4990 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4991 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4992 vcpu
->run
->mmio
.phys_addr
= gpa
;
4994 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4997 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
5001 struct x86_exception
*exception
)
5003 return emulator_read_write(ctxt
, addr
, val
, bytes
,
5004 exception
, &read_emultor
);
5007 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
5011 struct x86_exception
*exception
)
5013 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
5014 exception
, &write_emultor
);
5017 #define CMPXCHG_TYPE(t, ptr, old, new) \
5018 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5020 #ifdef CONFIG_X86_64
5021 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5023 # define CMPXCHG64(ptr, old, new) \
5024 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5027 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
5032 struct x86_exception
*exception
)
5034 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5040 /* guests cmpxchg8b have to be emulated atomically */
5041 if (bytes
> 8 || (bytes
& (bytes
- 1)))
5044 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
5046 if (gpa
== UNMAPPED_GVA
||
5047 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5050 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
5053 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
5054 if (is_error_page(page
))
5057 kaddr
= kmap_atomic(page
);
5058 kaddr
+= offset_in_page(gpa
);
5061 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
5064 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
5067 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
5070 exchanged
= CMPXCHG64(kaddr
, old
, new);
5075 kunmap_atomic(kaddr
);
5076 kvm_release_page_dirty(page
);
5079 return X86EMUL_CMPXCHG_FAILED
;
5081 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
5082 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
5084 return X86EMUL_CONTINUE
;
5087 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
5089 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
5092 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
5096 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
5097 if (vcpu
->arch
.pio
.in
)
5098 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5099 vcpu
->arch
.pio
.size
, pd
);
5101 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5102 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5106 pd
+= vcpu
->arch
.pio
.size
;
5111 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5112 unsigned short port
, void *val
,
5113 unsigned int count
, bool in
)
5115 vcpu
->arch
.pio
.port
= port
;
5116 vcpu
->arch
.pio
.in
= in
;
5117 vcpu
->arch
.pio
.count
= count
;
5118 vcpu
->arch
.pio
.size
= size
;
5120 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5121 vcpu
->arch
.pio
.count
= 0;
5125 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5126 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5127 vcpu
->run
->io
.size
= size
;
5128 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5129 vcpu
->run
->io
.count
= count
;
5130 vcpu
->run
->io
.port
= port
;
5135 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5136 int size
, unsigned short port
, void *val
,
5139 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5142 if (vcpu
->arch
.pio
.count
)
5145 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5147 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5150 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5151 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5152 vcpu
->arch
.pio
.count
= 0;
5159 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
5160 int size
, unsigned short port
,
5161 const void *val
, unsigned int count
)
5163 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5165 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5166 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5167 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
5170 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
5172 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
5175 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
5177 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5180 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5182 if (!need_emulate_wbinvd(vcpu
))
5183 return X86EMUL_CONTINUE
;
5185 if (kvm_x86_ops
->has_wbinvd_exit()) {
5186 int cpu
= get_cpu();
5188 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5189 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5190 wbinvd_ipi
, NULL
, 1);
5192 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5195 return X86EMUL_CONTINUE
;
5198 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5200 kvm_emulate_wbinvd_noskip(vcpu
);
5201 return kvm_skip_emulated_instruction(vcpu
);
5203 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5207 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5209 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5212 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5213 unsigned long *dest
)
5215 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5218 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5219 unsigned long value
)
5222 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5225 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5227 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5230 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5232 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5233 unsigned long value
;
5237 value
= kvm_read_cr0(vcpu
);
5240 value
= vcpu
->arch
.cr2
;
5243 value
= kvm_read_cr3(vcpu
);
5246 value
= kvm_read_cr4(vcpu
);
5249 value
= kvm_get_cr8(vcpu
);
5252 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5259 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5261 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5266 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5269 vcpu
->arch
.cr2
= val
;
5272 res
= kvm_set_cr3(vcpu
, val
);
5275 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5278 res
= kvm_set_cr8(vcpu
, val
);
5281 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5288 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5290 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5293 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5295 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5298 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5300 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5303 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5305 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5308 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5310 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5313 static unsigned long emulator_get_cached_segment_base(
5314 struct x86_emulate_ctxt
*ctxt
, int seg
)
5316 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5319 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5320 struct desc_struct
*desc
, u32
*base3
,
5323 struct kvm_segment var
;
5325 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5326 *selector
= var
.selector
;
5329 memset(desc
, 0, sizeof(*desc
));
5337 set_desc_limit(desc
, var
.limit
);
5338 set_desc_base(desc
, (unsigned long)var
.base
);
5339 #ifdef CONFIG_X86_64
5341 *base3
= var
.base
>> 32;
5343 desc
->type
= var
.type
;
5345 desc
->dpl
= var
.dpl
;
5346 desc
->p
= var
.present
;
5347 desc
->avl
= var
.avl
;
5355 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5356 struct desc_struct
*desc
, u32 base3
,
5359 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5360 struct kvm_segment var
;
5362 var
.selector
= selector
;
5363 var
.base
= get_desc_base(desc
);
5364 #ifdef CONFIG_X86_64
5365 var
.base
|= ((u64
)base3
) << 32;
5367 var
.limit
= get_desc_limit(desc
);
5369 var
.limit
= (var
.limit
<< 12) | 0xfff;
5370 var
.type
= desc
->type
;
5371 var
.dpl
= desc
->dpl
;
5376 var
.avl
= desc
->avl
;
5377 var
.present
= desc
->p
;
5378 var
.unusable
= !var
.present
;
5381 kvm_set_segment(vcpu
, &var
, seg
);
5385 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5386 u32 msr_index
, u64
*pdata
)
5388 struct msr_data msr
;
5391 msr
.index
= msr_index
;
5392 msr
.host_initiated
= false;
5393 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5401 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5402 u32 msr_index
, u64 data
)
5404 struct msr_data msr
;
5407 msr
.index
= msr_index
;
5408 msr
.host_initiated
= false;
5409 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5412 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5414 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5416 return vcpu
->arch
.smbase
;
5419 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5421 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5423 vcpu
->arch
.smbase
= smbase
;
5426 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5429 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5432 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5433 u32 pmc
, u64
*pdata
)
5435 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5438 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5440 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5443 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5444 struct x86_instruction_info
*info
,
5445 enum x86_intercept_stage stage
)
5447 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5450 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5451 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5453 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5456 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5458 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5461 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5463 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5466 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5468 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5471 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5473 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5476 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5478 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5481 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5483 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5486 static const struct x86_emulate_ops emulate_ops
= {
5487 .read_gpr
= emulator_read_gpr
,
5488 .write_gpr
= emulator_write_gpr
,
5489 .read_std
= emulator_read_std
,
5490 .write_std
= emulator_write_std
,
5491 .read_phys
= kvm_read_guest_phys_system
,
5492 .fetch
= kvm_fetch_guest_virt
,
5493 .read_emulated
= emulator_read_emulated
,
5494 .write_emulated
= emulator_write_emulated
,
5495 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5496 .invlpg
= emulator_invlpg
,
5497 .pio_in_emulated
= emulator_pio_in_emulated
,
5498 .pio_out_emulated
= emulator_pio_out_emulated
,
5499 .get_segment
= emulator_get_segment
,
5500 .set_segment
= emulator_set_segment
,
5501 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5502 .get_gdt
= emulator_get_gdt
,
5503 .get_idt
= emulator_get_idt
,
5504 .set_gdt
= emulator_set_gdt
,
5505 .set_idt
= emulator_set_idt
,
5506 .get_cr
= emulator_get_cr
,
5507 .set_cr
= emulator_set_cr
,
5508 .cpl
= emulator_get_cpl
,
5509 .get_dr
= emulator_get_dr
,
5510 .set_dr
= emulator_set_dr
,
5511 .get_smbase
= emulator_get_smbase
,
5512 .set_smbase
= emulator_set_smbase
,
5513 .set_msr
= emulator_set_msr
,
5514 .get_msr
= emulator_get_msr
,
5515 .check_pmc
= emulator_check_pmc
,
5516 .read_pmc
= emulator_read_pmc
,
5517 .halt
= emulator_halt
,
5518 .wbinvd
= emulator_wbinvd
,
5519 .fix_hypercall
= emulator_fix_hypercall
,
5520 .intercept
= emulator_intercept
,
5521 .get_cpuid
= emulator_get_cpuid
,
5522 .set_nmi_mask
= emulator_set_nmi_mask
,
5523 .get_hflags
= emulator_get_hflags
,
5524 .set_hflags
= emulator_set_hflags
,
5525 .pre_leave_smm
= emulator_pre_leave_smm
,
5528 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5530 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5532 * an sti; sti; sequence only disable interrupts for the first
5533 * instruction. So, if the last instruction, be it emulated or
5534 * not, left the system with the INT_STI flag enabled, it
5535 * means that the last instruction is an sti. We should not
5536 * leave the flag on in this case. The same goes for mov ss
5538 if (int_shadow
& mask
)
5540 if (unlikely(int_shadow
|| mask
)) {
5541 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5543 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5547 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5549 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5550 if (ctxt
->exception
.vector
== PF_VECTOR
)
5551 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5553 if (ctxt
->exception
.error_code_valid
)
5554 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5555 ctxt
->exception
.error_code
);
5557 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5561 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5563 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5566 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5568 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5569 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5571 ctxt
->eip
= kvm_rip_read(vcpu
);
5572 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5573 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5574 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5575 cs_db
? X86EMUL_MODE_PROT32
:
5576 X86EMUL_MODE_PROT16
;
5577 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5578 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5579 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5581 init_decode_cache(ctxt
);
5582 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5585 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5587 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5590 init_emulate_ctxt(vcpu
);
5594 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5595 ret
= emulate_int_real(ctxt
, irq
);
5597 if (ret
!= X86EMUL_CONTINUE
)
5598 return EMULATE_FAIL
;
5600 ctxt
->eip
= ctxt
->_eip
;
5601 kvm_rip_write(vcpu
, ctxt
->eip
);
5602 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5604 if (irq
== NMI_VECTOR
)
5605 vcpu
->arch
.nmi_pending
= 0;
5607 vcpu
->arch
.interrupt
.pending
= false;
5609 return EMULATE_DONE
;
5611 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5613 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5615 int r
= EMULATE_DONE
;
5617 ++vcpu
->stat
.insn_emulation_fail
;
5618 trace_kvm_emulate_insn_failed(vcpu
);
5619 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5620 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5621 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5622 vcpu
->run
->internal
.ndata
= 0;
5623 r
= EMULATE_USER_EXIT
;
5625 kvm_queue_exception(vcpu
, UD_VECTOR
);
5630 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5631 bool write_fault_to_shadow_pgtable
,
5637 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5640 if (!vcpu
->arch
.mmu
.direct_map
) {
5642 * Write permission should be allowed since only
5643 * write access need to be emulated.
5645 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5648 * If the mapping is invalid in guest, let cpu retry
5649 * it to generate fault.
5651 if (gpa
== UNMAPPED_GVA
)
5656 * Do not retry the unhandleable instruction if it faults on the
5657 * readonly host memory, otherwise it will goto a infinite loop:
5658 * retry instruction -> write #PF -> emulation fail -> retry
5659 * instruction -> ...
5661 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5664 * If the instruction failed on the error pfn, it can not be fixed,
5665 * report the error to userspace.
5667 if (is_error_noslot_pfn(pfn
))
5670 kvm_release_pfn_clean(pfn
);
5672 /* The instructions are well-emulated on direct mmu. */
5673 if (vcpu
->arch
.mmu
.direct_map
) {
5674 unsigned int indirect_shadow_pages
;
5676 spin_lock(&vcpu
->kvm
->mmu_lock
);
5677 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5678 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5680 if (indirect_shadow_pages
)
5681 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5687 * if emulation was due to access to shadowed page table
5688 * and it failed try to unshadow page and re-enter the
5689 * guest to let CPU execute the instruction.
5691 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5694 * If the access faults on its page table, it can not
5695 * be fixed by unprotecting shadow page and it should
5696 * be reported to userspace.
5698 return !write_fault_to_shadow_pgtable
;
5701 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5702 unsigned long cr2
, int emulation_type
)
5704 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5705 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5707 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5708 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5711 * If the emulation is caused by #PF and it is non-page_table
5712 * writing instruction, it means the VM-EXIT is caused by shadow
5713 * page protected, we can zap the shadow page and retry this
5714 * instruction directly.
5716 * Note: if the guest uses a non-page-table modifying instruction
5717 * on the PDE that points to the instruction, then we will unmap
5718 * the instruction and go to an infinite loop. So, we cache the
5719 * last retried eip and the last fault address, if we meet the eip
5720 * and the address again, we can break out of the potential infinite
5723 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5725 if (!(emulation_type
& EMULTYPE_RETRY
))
5728 if (x86_page_table_writing_insn(ctxt
))
5731 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5734 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5735 vcpu
->arch
.last_retry_addr
= cr2
;
5737 if (!vcpu
->arch
.mmu
.direct_map
)
5738 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5740 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5745 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5746 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5748 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5750 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5751 /* This is a good place to trace that we are exiting SMM. */
5752 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5754 /* Process a latched INIT or SMI, if any. */
5755 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5758 kvm_mmu_reset_context(vcpu
);
5761 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5763 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5765 vcpu
->arch
.hflags
= emul_flags
;
5767 if (changed
& HF_SMM_MASK
)
5768 kvm_smm_changed(vcpu
);
5771 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5780 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5781 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5786 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5788 struct kvm_run
*kvm_run
= vcpu
->run
;
5790 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5791 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5792 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5793 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5794 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5795 *r
= EMULATE_USER_EXIT
;
5798 * "Certain debug exceptions may clear bit 0-3. The
5799 * remaining contents of the DR6 register are never
5800 * cleared by the processor".
5802 vcpu
->arch
.dr6
&= ~15;
5803 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5804 kvm_queue_exception(vcpu
, DB_VECTOR
);
5808 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5810 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5811 int r
= EMULATE_DONE
;
5813 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5816 * rflags is the old, "raw" value of the flags. The new value has
5817 * not been saved yet.
5819 * This is correct even for TF set by the guest, because "the
5820 * processor will not generate this exception after the instruction
5821 * that sets the TF flag".
5823 if (unlikely(rflags
& X86_EFLAGS_TF
))
5824 kvm_vcpu_do_singlestep(vcpu
, &r
);
5825 return r
== EMULATE_DONE
;
5827 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5829 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5831 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5832 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5833 struct kvm_run
*kvm_run
= vcpu
->run
;
5834 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5835 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5836 vcpu
->arch
.guest_debug_dr7
,
5840 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5841 kvm_run
->debug
.arch
.pc
= eip
;
5842 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5843 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5844 *r
= EMULATE_USER_EXIT
;
5849 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5850 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5851 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5852 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5857 vcpu
->arch
.dr6
&= ~15;
5858 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5859 kvm_queue_exception(vcpu
, DB_VECTOR
);
5868 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5875 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5876 bool writeback
= true;
5877 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5879 vcpu
->arch
.l1tf_flush_l1d
= true;
5882 * Clear write_fault_to_shadow_pgtable here to ensure it is
5885 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5886 kvm_clear_exception_queue(vcpu
);
5888 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5889 init_emulate_ctxt(vcpu
);
5892 * We will reenter on the same instruction since
5893 * we do not set complete_userspace_io. This does not
5894 * handle watchpoints yet, those would be handled in
5897 if (!(emulation_type
& EMULTYPE_SKIP
) &&
5898 kvm_vcpu_check_breakpoint(vcpu
, &r
))
5901 ctxt
->interruptibility
= 0;
5902 ctxt
->have_exception
= false;
5903 ctxt
->exception
.vector
= -1;
5904 ctxt
->perm_ok
= false;
5906 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5908 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5910 trace_kvm_emulate_insn_start(vcpu
);
5911 ++vcpu
->stat
.insn_emulation
;
5912 if (r
!= EMULATION_OK
) {
5913 if (emulation_type
& EMULTYPE_TRAP_UD
)
5914 return EMULATE_FAIL
;
5915 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5917 return EMULATE_DONE
;
5918 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
5919 return EMULATE_DONE
;
5920 if (emulation_type
& EMULTYPE_SKIP
)
5921 return EMULATE_FAIL
;
5922 return handle_emulation_failure(vcpu
);
5926 if (emulation_type
& EMULTYPE_SKIP
) {
5927 kvm_rip_write(vcpu
, ctxt
->_eip
);
5928 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5929 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5930 return EMULATE_DONE
;
5933 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5934 return EMULATE_DONE
;
5936 /* this is needed for vmware backdoor interface to work since it
5937 changes registers values during IO operation */
5938 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5939 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5940 emulator_invalidate_register_cache(ctxt
);
5944 /* Save the faulting GPA (cr2) in the address field */
5945 ctxt
->exception
.address
= cr2
;
5947 r
= x86_emulate_insn(ctxt
);
5949 if (r
== EMULATION_INTERCEPTED
)
5950 return EMULATE_DONE
;
5952 if (r
== EMULATION_FAILED
) {
5953 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5955 return EMULATE_DONE
;
5957 return handle_emulation_failure(vcpu
);
5960 if (ctxt
->have_exception
) {
5962 if (inject_emulated_exception(vcpu
))
5964 } else if (vcpu
->arch
.pio
.count
) {
5965 if (!vcpu
->arch
.pio
.in
) {
5966 /* FIXME: return into emulator if single-stepping. */
5967 vcpu
->arch
.pio
.count
= 0;
5970 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5972 r
= EMULATE_USER_EXIT
;
5973 } else if (vcpu
->mmio_needed
) {
5974 if (!vcpu
->mmio_is_write
)
5976 r
= EMULATE_USER_EXIT
;
5977 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5978 } else if (r
== EMULATION_RESTART
)
5984 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5985 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5986 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5987 kvm_rip_write(vcpu
, ctxt
->eip
);
5988 if (r
== EMULATE_DONE
&& ctxt
->tf
)
5989 kvm_vcpu_do_singlestep(vcpu
, &r
);
5990 if (!ctxt
->have_exception
||
5991 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5992 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5995 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5996 * do nothing, and it will be requested again as soon as
5997 * the shadow expires. But we still need to check here,
5998 * because POPF has no interrupt shadow.
6000 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
6001 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6003 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
6007 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
6009 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
6011 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6012 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
6013 size
, port
, &val
, 1);
6014 /* do not return to emulator after return from userspace */
6015 vcpu
->arch
.pio
.count
= 0;
6018 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
6020 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
6024 /* We should only ever be called with arch.pio.count equal to 1 */
6025 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
6027 /* For size less than 4 we merge, else we zero extend */
6028 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
6032 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6033 * the copy and tracing
6035 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
6036 vcpu
->arch
.pio
.port
, &val
, 1);
6037 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6042 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
6047 /* For size less than 4 we merge, else we zero extend */
6048 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
6050 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
6053 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6057 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
6061 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
6063 static int kvmclock_cpu_down_prep(unsigned int cpu
)
6065 __this_cpu_write(cpu_tsc_khz
, 0);
6069 static void tsc_khz_changed(void *data
)
6071 struct cpufreq_freqs
*freq
= data
;
6072 unsigned long khz
= 0;
6076 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6077 khz
= cpufreq_quick_get(raw_smp_processor_id());
6080 __this_cpu_write(cpu_tsc_khz
, khz
);
6083 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
6086 struct cpufreq_freqs
*freq
= data
;
6088 struct kvm_vcpu
*vcpu
;
6089 int i
, send_ipi
= 0;
6092 * We allow guests to temporarily run on slowing clocks,
6093 * provided we notify them after, or to run on accelerating
6094 * clocks, provided we notify them before. Thus time never
6097 * However, we have a problem. We can't atomically update
6098 * the frequency of a given CPU from this function; it is
6099 * merely a notifier, which can be called from any CPU.
6100 * Changing the TSC frequency at arbitrary points in time
6101 * requires a recomputation of local variables related to
6102 * the TSC for each VCPU. We must flag these local variables
6103 * to be updated and be sure the update takes place with the
6104 * new frequency before any guests proceed.
6106 * Unfortunately, the combination of hotplug CPU and frequency
6107 * change creates an intractable locking scenario; the order
6108 * of when these callouts happen is undefined with respect to
6109 * CPU hotplug, and they can race with each other. As such,
6110 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6111 * undefined; you can actually have a CPU frequency change take
6112 * place in between the computation of X and the setting of the
6113 * variable. To protect against this problem, all updates of
6114 * the per_cpu tsc_khz variable are done in an interrupt
6115 * protected IPI, and all callers wishing to update the value
6116 * must wait for a synchronous IPI to complete (which is trivial
6117 * if the caller is on the CPU already). This establishes the
6118 * necessary total order on variable updates.
6120 * Note that because a guest time update may take place
6121 * anytime after the setting of the VCPU's request bit, the
6122 * correct TSC value must be set before the request. However,
6123 * to ensure the update actually makes it to any guest which
6124 * starts running in hardware virtualization between the set
6125 * and the acquisition of the spinlock, we must also ping the
6126 * CPU after setting the request bit.
6130 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
6132 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
6135 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6137 spin_lock(&kvm_lock
);
6138 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6139 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6140 if (vcpu
->cpu
!= freq
->cpu
)
6142 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6143 if (vcpu
->cpu
!= smp_processor_id())
6147 spin_unlock(&kvm_lock
);
6149 if (freq
->old
< freq
->new && send_ipi
) {
6151 * We upscale the frequency. Must make the guest
6152 * doesn't see old kvmclock values while running with
6153 * the new frequency, otherwise we risk the guest sees
6154 * time go backwards.
6156 * In case we update the frequency for another cpu
6157 * (which might be in guest context) send an interrupt
6158 * to kick the cpu out of guest context. Next time
6159 * guest context is entered kvmclock will be updated,
6160 * so the guest will not see stale values.
6162 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6167 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
6168 .notifier_call
= kvmclock_cpufreq_notifier
6171 static int kvmclock_cpu_online(unsigned int cpu
)
6173 tsc_khz_changed(NULL
);
6177 static void kvm_timer_init(void)
6179 max_tsc_khz
= tsc_khz
;
6181 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6182 #ifdef CONFIG_CPU_FREQ
6183 struct cpufreq_policy policy
;
6186 memset(&policy
, 0, sizeof(policy
));
6188 cpufreq_get_policy(&policy
, cpu
);
6189 if (policy
.cpuinfo
.max_freq
)
6190 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6193 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6194 CPUFREQ_TRANSITION_NOTIFIER
);
6196 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6198 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6199 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6202 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6204 int kvm_is_in_guest(void)
6206 return __this_cpu_read(current_vcpu
) != NULL
;
6209 static int kvm_is_user_mode(void)
6213 if (__this_cpu_read(current_vcpu
))
6214 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6216 return user_mode
!= 0;
6219 static unsigned long kvm_get_guest_ip(void)
6221 unsigned long ip
= 0;
6223 if (__this_cpu_read(current_vcpu
))
6224 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6229 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6230 .is_in_guest
= kvm_is_in_guest
,
6231 .is_user_mode
= kvm_is_user_mode
,
6232 .get_guest_ip
= kvm_get_guest_ip
,
6235 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6237 __this_cpu_write(current_vcpu
, vcpu
);
6239 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6241 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6243 __this_cpu_write(current_vcpu
, NULL
);
6245 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6247 static void kvm_set_mmio_spte_mask(void)
6250 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6253 * Set the reserved bits and the present bit of an paging-structure
6254 * entry to generate page fault with PFER.RSV = 1.
6258 * Mask the uppermost physical address bit, which would be reserved as
6259 * long as the supported physical address width is less than 52.
6263 /* Set the present bit. */
6267 * If reserved bit is not supported, clear the present bit to disable
6270 if (IS_ENABLED(CONFIG_X86_64
) && maxphyaddr
== 52)
6273 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6276 #ifdef CONFIG_X86_64
6277 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6281 struct kvm_vcpu
*vcpu
;
6284 spin_lock(&kvm_lock
);
6285 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6286 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6287 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6288 atomic_set(&kvm_guest_has_master_clock
, 0);
6289 spin_unlock(&kvm_lock
);
6292 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6295 * Notification about pvclock gtod data update.
6297 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6300 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6301 struct timekeeper
*tk
= priv
;
6303 update_pvclock_gtod(tk
);
6305 /* disable master clock if host does not trust, or does not
6306 * use, TSC clocksource
6308 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6309 atomic_read(&kvm_guest_has_master_clock
) != 0)
6310 queue_work(system_long_wq
, &pvclock_gtod_work
);
6315 static struct notifier_block pvclock_gtod_notifier
= {
6316 .notifier_call
= pvclock_gtod_notify
,
6320 int kvm_arch_init(void *opaque
)
6323 struct kvm_x86_ops
*ops
= opaque
;
6326 printk(KERN_ERR
"kvm: already loaded the other module\n");
6331 if (!ops
->cpu_has_kvm_support()) {
6332 printk(KERN_ERR
"kvm: no hardware support\n");
6336 if (ops
->disabled_by_bios()) {
6337 printk(KERN_WARNING
"kvm: disabled by bios\n");
6343 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6345 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6349 r
= kvm_mmu_module_init();
6351 goto out_free_percpu
;
6353 kvm_set_mmio_spte_mask();
6357 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6358 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6359 PT_PRESENT_MASK
, 0, sme_me_mask
);
6362 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6364 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6365 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6368 #ifdef CONFIG_X86_64
6369 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6375 free_percpu(shared_msrs
);
6380 void kvm_arch_exit(void)
6383 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6385 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6386 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6387 CPUFREQ_TRANSITION_NOTIFIER
);
6388 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6389 #ifdef CONFIG_X86_64
6390 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6393 kvm_mmu_module_exit();
6394 free_percpu(shared_msrs
);
6397 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6399 ++vcpu
->stat
.halt_exits
;
6400 if (lapic_in_kernel(vcpu
)) {
6401 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6404 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6408 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6410 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6412 int ret
= kvm_skip_emulated_instruction(vcpu
);
6414 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6415 * KVM_EXIT_DEBUG here.
6417 return kvm_vcpu_halt(vcpu
) && ret
;
6419 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6421 #ifdef CONFIG_X86_64
6422 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6423 unsigned long clock_type
)
6425 struct kvm_clock_pairing clock_pairing
;
6430 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6431 return -KVM_EOPNOTSUPP
;
6433 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6434 return -KVM_EOPNOTSUPP
;
6436 clock_pairing
.sec
= ts
.tv_sec
;
6437 clock_pairing
.nsec
= ts
.tv_nsec
;
6438 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6439 clock_pairing
.flags
= 0;
6440 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
6443 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6444 sizeof(struct kvm_clock_pairing
)))
6452 * kvm_pv_kick_cpu_op: Kick a vcpu.
6454 * @apicid - apicid of vcpu to be kicked.
6456 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6458 struct kvm_lapic_irq lapic_irq
;
6460 lapic_irq
.shorthand
= 0;
6461 lapic_irq
.dest_mode
= 0;
6462 lapic_irq
.level
= 0;
6463 lapic_irq
.dest_id
= apicid
;
6464 lapic_irq
.msi_redir_hint
= false;
6466 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6467 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6470 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6472 vcpu
->arch
.apicv_active
= false;
6473 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6476 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6478 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6481 if (kvm_hv_hypercall_enabled(vcpu
->kvm
)) {
6482 if (!kvm_hv_hypercall(vcpu
))
6487 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6488 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6489 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6490 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6491 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6493 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6495 op_64_bit
= is_64_bit_mode(vcpu
);
6504 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6510 case KVM_HC_VAPIC_POLL_IRQ
:
6513 case KVM_HC_KICK_CPU
:
6514 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6517 #ifdef CONFIG_X86_64
6518 case KVM_HC_CLOCK_PAIRING
:
6519 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6529 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6532 ++vcpu
->stat
.hypercalls
;
6533 return kvm_skip_emulated_instruction(vcpu
);
6535 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6537 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6539 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6540 char instruction
[3];
6541 unsigned long rip
= kvm_rip_read(vcpu
);
6543 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6545 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6549 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6551 return vcpu
->run
->request_interrupt_window
&&
6552 likely(!pic_in_kernel(vcpu
->kvm
));
6555 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6557 struct kvm_run
*kvm_run
= vcpu
->run
;
6559 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6560 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6561 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6562 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6563 kvm_run
->ready_for_interrupt_injection
=
6564 pic_in_kernel(vcpu
->kvm
) ||
6565 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6568 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6572 if (!kvm_x86_ops
->update_cr8_intercept
)
6575 if (!lapic_in_kernel(vcpu
))
6578 if (vcpu
->arch
.apicv_active
)
6581 if (!vcpu
->arch
.apic
->vapic_addr
)
6582 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6589 tpr
= kvm_lapic_get_cr8(vcpu
);
6591 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6594 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6598 /* try to reinject previous events if any */
6599 if (vcpu
->arch
.exception
.injected
) {
6600 kvm_x86_ops
->queue_exception(vcpu
);
6605 * Exceptions must be injected immediately, or the exception
6606 * frame will have the address of the NMI or interrupt handler.
6608 if (!vcpu
->arch
.exception
.pending
) {
6609 if (vcpu
->arch
.nmi_injected
) {
6610 kvm_x86_ops
->set_nmi(vcpu
);
6614 if (vcpu
->arch
.interrupt
.pending
) {
6615 kvm_x86_ops
->set_irq(vcpu
);
6620 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6621 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6626 /* try to inject new event if pending */
6627 if (vcpu
->arch
.exception
.pending
) {
6628 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6629 vcpu
->arch
.exception
.has_error_code
,
6630 vcpu
->arch
.exception
.error_code
);
6632 vcpu
->arch
.exception
.pending
= false;
6633 vcpu
->arch
.exception
.injected
= true;
6635 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6636 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6639 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6640 (vcpu
->arch
.dr7
& DR7_GD
)) {
6641 vcpu
->arch
.dr7
&= ~DR7_GD
;
6642 kvm_update_dr7(vcpu
);
6645 kvm_x86_ops
->queue_exception(vcpu
);
6646 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) && kvm_x86_ops
->smi_allowed(vcpu
)) {
6647 vcpu
->arch
.smi_pending
= false;
6649 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6650 --vcpu
->arch
.nmi_pending
;
6651 vcpu
->arch
.nmi_injected
= true;
6652 kvm_x86_ops
->set_nmi(vcpu
);
6653 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6655 * Because interrupts can be injected asynchronously, we are
6656 * calling check_nested_events again here to avoid a race condition.
6657 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6658 * proposal and current concerns. Perhaps we should be setting
6659 * KVM_REQ_EVENT only on certain events and not unconditionally?
6661 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6662 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6666 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6667 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6669 kvm_x86_ops
->set_irq(vcpu
);
6676 static void process_nmi(struct kvm_vcpu
*vcpu
)
6681 * x86 is limited to one NMI running, and one NMI pending after it.
6682 * If an NMI is already in progress, limit further NMIs to just one.
6683 * Otherwise, allow two (and we'll inject the first one immediately).
6685 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6688 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6689 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6690 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6693 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6696 flags
|= seg
->g
<< 23;
6697 flags
|= seg
->db
<< 22;
6698 flags
|= seg
->l
<< 21;
6699 flags
|= seg
->avl
<< 20;
6700 flags
|= seg
->present
<< 15;
6701 flags
|= seg
->dpl
<< 13;
6702 flags
|= seg
->s
<< 12;
6703 flags
|= seg
->type
<< 8;
6707 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6709 struct kvm_segment seg
;
6712 kvm_get_segment(vcpu
, &seg
, n
);
6713 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6716 offset
= 0x7f84 + n
* 12;
6718 offset
= 0x7f2c + (n
- 3) * 12;
6720 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6721 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6722 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6725 #ifdef CONFIG_X86_64
6726 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6728 struct kvm_segment seg
;
6732 kvm_get_segment(vcpu
, &seg
, n
);
6733 offset
= 0x7e00 + n
* 16;
6735 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6736 put_smstate(u16
, buf
, offset
, seg
.selector
);
6737 put_smstate(u16
, buf
, offset
+ 2, flags
);
6738 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6739 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6743 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6746 struct kvm_segment seg
;
6750 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6751 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6752 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6753 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6755 for (i
= 0; i
< 8; i
++)
6756 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6758 kvm_get_dr(vcpu
, 6, &val
);
6759 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6760 kvm_get_dr(vcpu
, 7, &val
);
6761 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6763 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6764 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6765 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6766 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6767 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6769 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6770 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6771 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6772 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6773 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6775 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6776 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6777 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6779 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6780 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6781 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6783 for (i
= 0; i
< 6; i
++)
6784 enter_smm_save_seg_32(vcpu
, buf
, i
);
6786 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6789 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6790 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6793 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6795 #ifdef CONFIG_X86_64
6797 struct kvm_segment seg
;
6801 for (i
= 0; i
< 16; i
++)
6802 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6804 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6805 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6807 kvm_get_dr(vcpu
, 6, &val
);
6808 put_smstate(u64
, buf
, 0x7f68, val
);
6809 kvm_get_dr(vcpu
, 7, &val
);
6810 put_smstate(u64
, buf
, 0x7f60, val
);
6812 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6813 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6814 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6816 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6819 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6821 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6823 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6824 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6825 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6826 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6827 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6829 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6830 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6831 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6833 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6834 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6835 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6836 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6837 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6839 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6840 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6841 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6843 for (i
= 0; i
< 6; i
++)
6844 enter_smm_save_seg_64(vcpu
, buf
, i
);
6850 static void enter_smm(struct kvm_vcpu
*vcpu
)
6852 struct kvm_segment cs
, ds
;
6857 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6858 memset(buf
, 0, 512);
6859 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6860 enter_smm_save_state_64(vcpu
, buf
);
6862 enter_smm_save_state_32(vcpu
, buf
);
6865 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6866 * vCPU state (e.g. leave guest mode) after we've saved the state into
6867 * the SMM state-save area.
6869 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
6871 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6872 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6874 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6875 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6877 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6879 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6880 kvm_rip_write(vcpu
, 0x8000);
6882 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6883 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6884 vcpu
->arch
.cr0
= cr0
;
6886 kvm_x86_ops
->set_cr4(vcpu
, 0);
6888 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6889 dt
.address
= dt
.size
= 0;
6890 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6892 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6894 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6895 cs
.base
= vcpu
->arch
.smbase
;
6900 cs
.limit
= ds
.limit
= 0xffffffff;
6901 cs
.type
= ds
.type
= 0x3;
6902 cs
.dpl
= ds
.dpl
= 0;
6907 cs
.avl
= ds
.avl
= 0;
6908 cs
.present
= ds
.present
= 1;
6909 cs
.unusable
= ds
.unusable
= 0;
6910 cs
.padding
= ds
.padding
= 0;
6912 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6913 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6914 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6915 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6916 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6917 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6919 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6920 kvm_x86_ops
->set_efer(vcpu
, 0);
6922 kvm_update_cpuid(vcpu
);
6923 kvm_mmu_reset_context(vcpu
);
6926 static void process_smi(struct kvm_vcpu
*vcpu
)
6928 vcpu
->arch
.smi_pending
= true;
6929 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6932 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6934 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6937 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6939 u64 eoi_exit_bitmap
[4];
6941 if (!kvm_apic_present(vcpu
))
6944 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6946 if (irqchip_split(vcpu
->kvm
))
6947 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6949 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6950 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6951 if (ioapic_in_kernel(vcpu
->kvm
))
6952 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6954 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6955 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6956 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6959 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6961 ++vcpu
->stat
.tlb_flush
;
6962 kvm_x86_ops
->tlb_flush(vcpu
);
6965 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
6966 unsigned long start
, unsigned long end
)
6968 unsigned long apic_address
;
6971 * The physical address of apic access page is stored in the VMCS.
6972 * Update it when it becomes invalid.
6974 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6975 if (start
<= apic_address
&& apic_address
< end
)
6976 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6979 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6981 struct page
*page
= NULL
;
6983 if (!lapic_in_kernel(vcpu
))
6986 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6989 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6990 if (is_error_page(page
))
6992 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6995 * Do not pin apic access page in memory, the MMU notifier
6996 * will call us again if it is migrated or swapped out.
7000 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
7003 * Returns 1 to let vcpu_run() continue the guest execution loop without
7004 * exiting to the userspace. Otherwise, the value will be returned to the
7007 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
7011 dm_request_for_irq_injection(vcpu
) &&
7012 kvm_cpu_accept_dm_intr(vcpu
);
7014 bool req_immediate_exit
= false;
7016 if (kvm_request_pending(vcpu
)) {
7017 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
7018 kvm_mmu_unload(vcpu
);
7019 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
7020 __kvm_migrate_timers(vcpu
);
7021 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
7022 kvm_gen_update_masterclock(vcpu
->kvm
);
7023 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
7024 kvm_gen_kvmclock_update(vcpu
);
7025 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
7026 r
= kvm_guest_time_update(vcpu
);
7030 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
7031 kvm_mmu_sync_roots(vcpu
);
7032 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
7033 kvm_vcpu_flush_tlb(vcpu
);
7034 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
7035 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
7039 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
7040 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
7041 vcpu
->mmio_needed
= 0;
7045 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
7046 /* Page is swapped out. Do synthetic halt */
7047 vcpu
->arch
.apf
.halted
= true;
7051 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
7052 record_steal_time(vcpu
);
7053 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
7055 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
7057 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
7058 kvm_pmu_handle_event(vcpu
);
7059 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
7060 kvm_pmu_deliver_pmi(vcpu
);
7061 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
7062 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
7063 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
7064 vcpu
->arch
.ioapic_handled_vectors
)) {
7065 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
7066 vcpu
->run
->eoi
.vector
=
7067 vcpu
->arch
.pending_ioapic_eoi
;
7072 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
7073 vcpu_scan_ioapic(vcpu
);
7074 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
7075 kvm_vcpu_reload_apic_access_page(vcpu
);
7076 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
7077 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7078 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
7082 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
7083 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7084 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
7088 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
7089 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
7090 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
7096 * KVM_REQ_HV_STIMER has to be processed after
7097 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7098 * depend on the guest clock being up-to-date
7100 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
7101 kvm_hv_process_stimers(vcpu
);
7104 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
7105 ++vcpu
->stat
.req_event
;
7106 kvm_apic_accept_events(vcpu
);
7107 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
7112 if (inject_pending_event(vcpu
, req_int_win
) != 0)
7113 req_immediate_exit
= true;
7115 /* Enable SMI/NMI/IRQ window open exits if needed.
7117 * SMIs have three cases:
7118 * 1) They can be nested, and then there is nothing to
7119 * do here because RSM will cause a vmexit anyway.
7120 * 2) There is an ISA-specific reason why SMI cannot be
7121 * injected, and the moment when this changes can be
7123 * 3) Or the SMI can be pending because
7124 * inject_pending_event has completed the injection
7125 * of an IRQ or NMI from the previous vmexit, and
7126 * then we request an immediate exit to inject the
7129 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
7130 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
7131 req_immediate_exit
= true;
7132 if (vcpu
->arch
.nmi_pending
)
7133 kvm_x86_ops
->enable_nmi_window(vcpu
);
7134 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
7135 kvm_x86_ops
->enable_irq_window(vcpu
);
7136 WARN_ON(vcpu
->arch
.exception
.pending
);
7139 if (kvm_lapic_enabled(vcpu
)) {
7140 update_cr8_intercept(vcpu
);
7141 kvm_lapic_sync_to_vapic(vcpu
);
7145 r
= kvm_mmu_reload(vcpu
);
7147 goto cancel_injection
;
7152 kvm_x86_ops
->prepare_guest_switch(vcpu
);
7155 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7156 * IPI are then delayed after guest entry, which ensures that they
7157 * result in virtual interrupt delivery.
7159 local_irq_disable();
7160 vcpu
->mode
= IN_GUEST_MODE
;
7162 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7165 * 1) We should set ->mode before checking ->requests. Please see
7166 * the comment in kvm_vcpu_exiting_guest_mode().
7168 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7169 * pairs with the memory barrier implicit in pi_test_and_set_on
7170 * (see vmx_deliver_posted_interrupt).
7172 * 3) This also orders the write to mode from any reads to the page
7173 * tables done while the VCPU is running. Please see the comment
7174 * in kvm_flush_remote_tlbs.
7176 smp_mb__after_srcu_read_unlock();
7179 * This handles the case where a posted interrupt was
7180 * notified with kvm_vcpu_kick.
7182 if (kvm_lapic_enabled(vcpu
)) {
7183 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
7184 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7187 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7188 || need_resched() || signal_pending(current
)) {
7189 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7193 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7195 goto cancel_injection
;
7198 kvm_load_guest_xcr0(vcpu
);
7200 if (req_immediate_exit
) {
7201 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7202 smp_send_reschedule(vcpu
->cpu
);
7205 trace_kvm_entry(vcpu
->vcpu_id
);
7206 wait_lapic_expire(vcpu
);
7207 guest_enter_irqoff();
7209 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7211 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7212 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7213 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7214 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7215 set_debugreg(vcpu
->arch
.dr6
, 6);
7216 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7219 kvm_x86_ops
->run(vcpu
);
7222 * Do this here before restoring debug registers on the host. And
7223 * since we do this before handling the vmexit, a DR access vmexit
7224 * can (a) read the correct value of the debug registers, (b) set
7225 * KVM_DEBUGREG_WONT_EXIT again.
7227 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7228 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7229 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7230 kvm_update_dr0123(vcpu
);
7231 kvm_update_dr6(vcpu
);
7232 kvm_update_dr7(vcpu
);
7233 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7237 * If the guest has used debug registers, at least dr7
7238 * will be disabled while returning to the host.
7239 * If we don't have active breakpoints in the host, we don't
7240 * care about the messed up debug address registers. But if
7241 * we have some of them active, restore the old state.
7243 if (hw_breakpoint_active())
7244 hw_breakpoint_restore();
7246 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7248 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7251 kvm_put_guest_xcr0(vcpu
);
7253 kvm_x86_ops
->handle_external_intr(vcpu
);
7257 guest_exit_irqoff();
7262 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7265 * Profile KVM exit RIPs:
7267 if (unlikely(prof_on
== KVM_PROFILING
)) {
7268 unsigned long rip
= kvm_rip_read(vcpu
);
7269 profile_hit(KVM_PROFILING
, (void *)rip
);
7272 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7273 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7275 if (vcpu
->arch
.apic_attention
)
7276 kvm_lapic_sync_from_vapic(vcpu
);
7278 vcpu
->arch
.gpa_available
= false;
7279 r
= kvm_x86_ops
->handle_exit(vcpu
);
7283 kvm_x86_ops
->cancel_injection(vcpu
);
7284 if (unlikely(vcpu
->arch
.apic_attention
))
7285 kvm_lapic_sync_from_vapic(vcpu
);
7290 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7292 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7293 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7294 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7295 kvm_vcpu_block(vcpu
);
7296 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7298 if (kvm_x86_ops
->post_block
)
7299 kvm_x86_ops
->post_block(vcpu
);
7301 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7305 kvm_apic_accept_events(vcpu
);
7306 switch(vcpu
->arch
.mp_state
) {
7307 case KVM_MP_STATE_HALTED
:
7308 vcpu
->arch
.pv
.pv_unhalted
= false;
7309 vcpu
->arch
.mp_state
=
7310 KVM_MP_STATE_RUNNABLE
;
7311 case KVM_MP_STATE_RUNNABLE
:
7312 vcpu
->arch
.apf
.halted
= false;
7314 case KVM_MP_STATE_INIT_RECEIVED
:
7323 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7325 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7326 kvm_x86_ops
->check_nested_events(vcpu
, false);
7328 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7329 !vcpu
->arch
.apf
.halted
);
7332 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7335 struct kvm
*kvm
= vcpu
->kvm
;
7337 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7338 vcpu
->arch
.l1tf_flush_l1d
= true;
7341 if (kvm_vcpu_running(vcpu
)) {
7342 r
= vcpu_enter_guest(vcpu
);
7344 r
= vcpu_block(kvm
, vcpu
);
7350 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7351 if (kvm_cpu_has_pending_timer(vcpu
))
7352 kvm_inject_pending_timer_irqs(vcpu
);
7354 if (dm_request_for_irq_injection(vcpu
) &&
7355 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7357 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7358 ++vcpu
->stat
.request_irq_exits
;
7362 kvm_check_async_pf_completion(vcpu
);
7364 if (signal_pending(current
)) {
7366 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7367 ++vcpu
->stat
.signal_exits
;
7370 if (need_resched()) {
7371 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7373 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7377 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7382 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7385 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7386 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7387 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7388 if (r
!= EMULATE_DONE
)
7393 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7395 BUG_ON(!vcpu
->arch
.pio
.count
);
7397 return complete_emulated_io(vcpu
);
7401 * Implements the following, as a state machine:
7405 * for each mmio piece in the fragment
7413 * for each mmio piece in the fragment
7418 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7420 struct kvm_run
*run
= vcpu
->run
;
7421 struct kvm_mmio_fragment
*frag
;
7424 BUG_ON(!vcpu
->mmio_needed
);
7426 /* Complete previous fragment */
7427 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7428 len
= min(8u, frag
->len
);
7429 if (!vcpu
->mmio_is_write
)
7430 memcpy(frag
->data
, run
->mmio
.data
, len
);
7432 if (frag
->len
<= 8) {
7433 /* Switch to the next fragment. */
7435 vcpu
->mmio_cur_fragment
++;
7437 /* Go forward to the next mmio piece. */
7443 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7444 vcpu
->mmio_needed
= 0;
7446 /* FIXME: return into emulator if single-stepping. */
7447 if (vcpu
->mmio_is_write
)
7449 vcpu
->mmio_read_completed
= 1;
7450 return complete_emulated_io(vcpu
);
7453 run
->exit_reason
= KVM_EXIT_MMIO
;
7454 run
->mmio
.phys_addr
= frag
->gpa
;
7455 if (vcpu
->mmio_is_write
)
7456 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7457 run
->mmio
.len
= min(8u, frag
->len
);
7458 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7459 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7464 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7468 kvm_sigset_activate(vcpu
);
7470 kvm_load_guest_fpu(vcpu
);
7472 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7473 if (kvm_run
->immediate_exit
) {
7477 kvm_vcpu_block(vcpu
);
7478 kvm_apic_accept_events(vcpu
);
7479 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7481 if (signal_pending(current
)) {
7483 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7484 ++vcpu
->stat
.signal_exits
;
7489 /* re-sync apic's tpr */
7490 if (!lapic_in_kernel(vcpu
)) {
7491 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7497 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7498 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7499 vcpu
->arch
.complete_userspace_io
= NULL
;
7504 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7506 if (kvm_run
->immediate_exit
)
7512 kvm_put_guest_fpu(vcpu
);
7513 post_kvm_run_save(vcpu
);
7514 kvm_sigset_deactivate(vcpu
);
7519 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7521 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7523 * We are here if userspace calls get_regs() in the middle of
7524 * instruction emulation. Registers state needs to be copied
7525 * back from emulation context to vcpu. Userspace shouldn't do
7526 * that usually, but some bad designed PV devices (vmware
7527 * backdoor interface) need this to work
7529 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7530 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7532 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7533 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7534 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7535 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7536 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7537 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7538 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7539 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7540 #ifdef CONFIG_X86_64
7541 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7542 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7543 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7544 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7545 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7546 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7547 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7548 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7551 regs
->rip
= kvm_rip_read(vcpu
);
7552 regs
->rflags
= kvm_get_rflags(vcpu
);
7557 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7559 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7560 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7562 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7563 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7564 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7565 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7566 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7567 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7568 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7569 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7570 #ifdef CONFIG_X86_64
7571 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7572 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7573 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7574 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7575 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7576 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7577 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7578 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7581 kvm_rip_write(vcpu
, regs
->rip
);
7582 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7584 vcpu
->arch
.exception
.pending
= false;
7586 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7591 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7593 struct kvm_segment cs
;
7595 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7599 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7601 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7602 struct kvm_sregs
*sregs
)
7606 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7607 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7608 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7609 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7610 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7611 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7613 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7614 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7616 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7617 sregs
->idt
.limit
= dt
.size
;
7618 sregs
->idt
.base
= dt
.address
;
7619 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7620 sregs
->gdt
.limit
= dt
.size
;
7621 sregs
->gdt
.base
= dt
.address
;
7623 sregs
->cr0
= kvm_read_cr0(vcpu
);
7624 sregs
->cr2
= vcpu
->arch
.cr2
;
7625 sregs
->cr3
= kvm_read_cr3(vcpu
);
7626 sregs
->cr4
= kvm_read_cr4(vcpu
);
7627 sregs
->cr8
= kvm_get_cr8(vcpu
);
7628 sregs
->efer
= vcpu
->arch
.efer
;
7629 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7631 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7633 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7634 set_bit(vcpu
->arch
.interrupt
.nr
,
7635 (unsigned long *)sregs
->interrupt_bitmap
);
7640 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7641 struct kvm_mp_state
*mp_state
)
7643 kvm_apic_accept_events(vcpu
);
7644 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7645 vcpu
->arch
.pv
.pv_unhalted
)
7646 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7648 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7653 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7654 struct kvm_mp_state
*mp_state
)
7656 if (!lapic_in_kernel(vcpu
) &&
7657 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7660 /* INITs are latched while in SMM */
7661 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7662 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7663 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7666 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7667 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7668 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7670 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7671 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7675 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7676 int reason
, bool has_error_code
, u32 error_code
)
7678 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7681 init_emulate_ctxt(vcpu
);
7683 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7684 has_error_code
, error_code
);
7687 return EMULATE_FAIL
;
7689 kvm_rip_write(vcpu
, ctxt
->eip
);
7690 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7691 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7692 return EMULATE_DONE
;
7694 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7696 int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7698 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7700 * When EFER.LME and CR0.PG are set, the processor is in
7701 * 64-bit mode (though maybe in a 32-bit code segment).
7702 * CR4.PAE and EFER.LMA must be set.
7704 if (!(sregs
->cr4
& X86_CR4_PAE
)
7705 || !(sregs
->efer
& EFER_LMA
))
7709 * Not in 64-bit mode: EFER.LMA is clear and the code
7710 * segment cannot be 64-bit.
7712 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7719 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7720 struct kvm_sregs
*sregs
)
7722 struct msr_data apic_base_msr
;
7723 int mmu_reset_needed
= 0;
7724 int cpuid_update_needed
= 0;
7725 int pending_vec
, max_bits
, idx
;
7728 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7729 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7732 if (kvm_valid_sregs(vcpu
, sregs
))
7735 apic_base_msr
.data
= sregs
->apic_base
;
7736 apic_base_msr
.host_initiated
= true;
7737 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7740 dt
.size
= sregs
->idt
.limit
;
7741 dt
.address
= sregs
->idt
.base
;
7742 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7743 dt
.size
= sregs
->gdt
.limit
;
7744 dt
.address
= sregs
->gdt
.base
;
7745 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7747 vcpu
->arch
.cr2
= sregs
->cr2
;
7748 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7749 vcpu
->arch
.cr3
= sregs
->cr3
;
7750 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7752 kvm_set_cr8(vcpu
, sregs
->cr8
);
7754 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7755 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7757 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7758 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7759 vcpu
->arch
.cr0
= sregs
->cr0
;
7761 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7762 cpuid_update_needed
|= ((kvm_read_cr4(vcpu
) ^ sregs
->cr4
) &
7763 (X86_CR4_OSXSAVE
| X86_CR4_PKE
));
7764 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7765 if (cpuid_update_needed
)
7766 kvm_update_cpuid(vcpu
);
7768 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7769 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7770 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7771 mmu_reset_needed
= 1;
7773 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7775 if (mmu_reset_needed
)
7776 kvm_mmu_reset_context(vcpu
);
7778 max_bits
= KVM_NR_INTERRUPTS
;
7779 pending_vec
= find_first_bit(
7780 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7781 if (pending_vec
< max_bits
) {
7782 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7783 pr_debug("Set back pending irq %d\n", pending_vec
);
7786 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7787 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7788 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7789 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7790 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7791 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7793 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7794 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7796 update_cr8_intercept(vcpu
);
7798 /* Older userspace won't unhalt the vcpu on reset. */
7799 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7800 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7802 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7804 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7809 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7810 struct kvm_guest_debug
*dbg
)
7812 unsigned long rflags
;
7815 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7817 if (vcpu
->arch
.exception
.pending
)
7819 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7820 kvm_queue_exception(vcpu
, DB_VECTOR
);
7822 kvm_queue_exception(vcpu
, BP_VECTOR
);
7826 * Read rflags as long as potentially injected trace flags are still
7829 rflags
= kvm_get_rflags(vcpu
);
7831 vcpu
->guest_debug
= dbg
->control
;
7832 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7833 vcpu
->guest_debug
= 0;
7835 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7836 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7837 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7838 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7840 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7841 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7843 kvm_update_dr7(vcpu
);
7845 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7846 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7847 get_segment_base(vcpu
, VCPU_SREG_CS
);
7850 * Trigger an rflags update that will inject or remove the trace
7853 kvm_set_rflags(vcpu
, rflags
);
7855 kvm_x86_ops
->update_bp_intercept(vcpu
);
7865 * Translate a guest virtual address to a guest physical address.
7867 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7868 struct kvm_translation
*tr
)
7870 unsigned long vaddr
= tr
->linear_address
;
7874 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7875 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7876 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7877 tr
->physical_address
= gpa
;
7878 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7885 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7887 struct fxregs_state
*fxsave
=
7888 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7890 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7891 fpu
->fcw
= fxsave
->cwd
;
7892 fpu
->fsw
= fxsave
->swd
;
7893 fpu
->ftwx
= fxsave
->twd
;
7894 fpu
->last_opcode
= fxsave
->fop
;
7895 fpu
->last_ip
= fxsave
->rip
;
7896 fpu
->last_dp
= fxsave
->rdp
;
7897 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7902 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7904 struct fxregs_state
*fxsave
=
7905 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7907 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7908 fxsave
->cwd
= fpu
->fcw
;
7909 fxsave
->swd
= fpu
->fsw
;
7910 fxsave
->twd
= fpu
->ftwx
;
7911 fxsave
->fop
= fpu
->last_opcode
;
7912 fxsave
->rip
= fpu
->last_ip
;
7913 fxsave
->rdp
= fpu
->last_dp
;
7914 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7919 static void fx_init(struct kvm_vcpu
*vcpu
)
7921 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7922 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7923 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7924 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7927 * Ensure guest xcr0 is valid for loading
7929 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7931 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7934 /* Swap (qemu) user FPU context for the guest FPU context. */
7935 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7938 copy_fpregs_to_fpstate(&vcpu
->arch
.user_fpu
);
7939 /* PKRU is separately restored in kvm_x86_ops->run. */
7940 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7941 ~XFEATURE_MASK_PKRU
);
7946 /* When vcpu_run ends, restore user space FPU context. */
7947 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7950 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7951 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
.state
);
7953 ++vcpu
->stat
.fpu_reload
;
7957 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7959 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7961 kvmclock_reset(vcpu
);
7963 kvm_x86_ops
->vcpu_free(vcpu
);
7964 free_cpumask_var(wbinvd_dirty_mask
);
7967 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7970 struct kvm_vcpu
*vcpu
;
7972 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7973 printk_once(KERN_WARNING
7974 "kvm: SMP vm created on host with unstable TSC; "
7975 "guest TSC will not be reliable\n");
7977 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7982 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7986 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
7987 kvm_vcpu_mtrr_init(vcpu
);
7988 r
= vcpu_load(vcpu
);
7991 kvm_vcpu_reset(vcpu
, false);
7992 kvm_mmu_setup(vcpu
);
7997 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7999 struct msr_data msr
;
8000 struct kvm
*kvm
= vcpu
->kvm
;
8002 kvm_hv_vcpu_postcreate(vcpu
);
8004 if (vcpu_load(vcpu
))
8007 msr
.index
= MSR_IA32_TSC
;
8008 msr
.host_initiated
= true;
8009 kvm_write_tsc(vcpu
, &msr
);
8012 if (!kvmclock_periodic_sync
)
8015 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
8016 KVMCLOCK_SYNC_PERIOD
);
8019 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
8022 vcpu
->arch
.apf
.msr_val
= 0;
8024 r
= vcpu_load(vcpu
);
8026 kvm_mmu_unload(vcpu
);
8029 kvm_x86_ops
->vcpu_free(vcpu
);
8032 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
8034 kvm_lapic_reset(vcpu
, init_event
);
8036 vcpu
->arch
.hflags
= 0;
8038 vcpu
->arch
.smi_pending
= 0;
8039 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
8040 vcpu
->arch
.nmi_pending
= 0;
8041 vcpu
->arch
.nmi_injected
= false;
8042 kvm_clear_interrupt_queue(vcpu
);
8043 kvm_clear_exception_queue(vcpu
);
8044 vcpu
->arch
.exception
.pending
= false;
8046 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
8047 kvm_update_dr0123(vcpu
);
8048 vcpu
->arch
.dr6
= DR6_INIT
;
8049 kvm_update_dr6(vcpu
);
8050 vcpu
->arch
.dr7
= DR7_FIXED_1
;
8051 kvm_update_dr7(vcpu
);
8055 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8056 vcpu
->arch
.apf
.msr_val
= 0;
8057 vcpu
->arch
.st
.msr_val
= 0;
8059 kvmclock_reset(vcpu
);
8061 kvm_clear_async_pf_completion_queue(vcpu
);
8062 kvm_async_pf_hash_reset(vcpu
);
8063 vcpu
->arch
.apf
.halted
= false;
8065 if (kvm_mpx_supported()) {
8066 void *mpx_state_buffer
;
8069 * To avoid have the INIT path from kvm_apic_has_events() that be
8070 * called with loaded FPU and does not let userspace fix the state.
8073 kvm_put_guest_fpu(vcpu
);
8074 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8075 XFEATURE_MASK_BNDREGS
);
8076 if (mpx_state_buffer
)
8077 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
8078 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8079 XFEATURE_MASK_BNDCSR
);
8080 if (mpx_state_buffer
)
8081 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
8083 kvm_load_guest_fpu(vcpu
);
8087 kvm_pmu_reset(vcpu
);
8088 vcpu
->arch
.smbase
= 0x30000;
8090 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
8091 vcpu
->arch
.msr_misc_features_enables
= 0;
8093 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8096 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
8097 vcpu
->arch
.regs_avail
= ~0;
8098 vcpu
->arch
.regs_dirty
= ~0;
8100 vcpu
->arch
.ia32_xss
= 0;
8102 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
8105 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
8107 struct kvm_segment cs
;
8109 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8110 cs
.selector
= vector
<< 8;
8111 cs
.base
= vector
<< 12;
8112 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8113 kvm_rip_write(vcpu
, 0);
8116 int kvm_arch_hardware_enable(void)
8119 struct kvm_vcpu
*vcpu
;
8124 bool stable
, backwards_tsc
= false;
8126 kvm_shared_msr_cpu_online();
8127 ret
= kvm_x86_ops
->hardware_enable();
8131 local_tsc
= rdtsc();
8132 stable
= !check_tsc_unstable();
8133 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8134 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8135 if (!stable
&& vcpu
->cpu
== smp_processor_id())
8136 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8137 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
8138 backwards_tsc
= true;
8139 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
8140 max_tsc
= vcpu
->arch
.last_host_tsc
;
8146 * Sometimes, even reliable TSCs go backwards. This happens on
8147 * platforms that reset TSC during suspend or hibernate actions, but
8148 * maintain synchronization. We must compensate. Fortunately, we can
8149 * detect that condition here, which happens early in CPU bringup,
8150 * before any KVM threads can be running. Unfortunately, we can't
8151 * bring the TSCs fully up to date with real time, as we aren't yet far
8152 * enough into CPU bringup that we know how much real time has actually
8153 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8154 * variables that haven't been updated yet.
8156 * So we simply find the maximum observed TSC above, then record the
8157 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8158 * the adjustment will be applied. Note that we accumulate
8159 * adjustments, in case multiple suspend cycles happen before some VCPU
8160 * gets a chance to run again. In the event that no KVM threads get a
8161 * chance to run, we will miss the entire elapsed period, as we'll have
8162 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8163 * loose cycle time. This isn't too big a deal, since the loss will be
8164 * uniform across all VCPUs (not to mention the scenario is extremely
8165 * unlikely). It is possible that a second hibernate recovery happens
8166 * much faster than a first, causing the observed TSC here to be
8167 * smaller; this would require additional padding adjustment, which is
8168 * why we set last_host_tsc to the local tsc observed here.
8170 * N.B. - this code below runs only on platforms with reliable TSC,
8171 * as that is the only way backwards_tsc is set above. Also note
8172 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8173 * have the same delta_cyc adjustment applied if backwards_tsc
8174 * is detected. Note further, this adjustment is only done once,
8175 * as we reset last_host_tsc on all VCPUs to stop this from being
8176 * called multiple times (one for each physical CPU bringup).
8178 * Platforms with unreliable TSCs don't have to deal with this, they
8179 * will be compensated by the logic in vcpu_load, which sets the TSC to
8180 * catchup mode. This will catchup all VCPUs to real time, but cannot
8181 * guarantee that they stay in perfect synchronization.
8183 if (backwards_tsc
) {
8184 u64 delta_cyc
= max_tsc
- local_tsc
;
8185 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8186 kvm
->arch
.backwards_tsc_observed
= true;
8187 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8188 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
8189 vcpu
->arch
.last_host_tsc
= local_tsc
;
8190 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8194 * We have to disable TSC offset matching.. if you were
8195 * booting a VM while issuing an S4 host suspend....
8196 * you may have some problem. Solving this issue is
8197 * left as an exercise to the reader.
8199 kvm
->arch
.last_tsc_nsec
= 0;
8200 kvm
->arch
.last_tsc_write
= 0;
8207 void kvm_arch_hardware_disable(void)
8209 kvm_x86_ops
->hardware_disable();
8210 drop_user_return_notifiers();
8213 int kvm_arch_hardware_setup(void)
8217 r
= kvm_x86_ops
->hardware_setup();
8221 if (kvm_has_tsc_control
) {
8223 * Make sure the user can only configure tsc_khz values that
8224 * fit into a signed integer.
8225 * A min value is not calculated needed because it will always
8226 * be 1 on all machines.
8228 u64 max
= min(0x7fffffffULL
,
8229 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8230 kvm_max_guest_tsc_khz
= max
;
8232 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8235 kvm_init_msr_list();
8239 void kvm_arch_hardware_unsetup(void)
8241 kvm_x86_ops
->hardware_unsetup();
8244 void kvm_arch_check_processor_compat(void *rtn
)
8246 kvm_x86_ops
->check_processor_compatibility(rtn
);
8249 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8251 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8253 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8255 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8257 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8260 struct static_key kvm_no_apic_vcpu __read_mostly
;
8261 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8263 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8268 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8269 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8270 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8271 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8273 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8275 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8280 vcpu
->arch
.pio_data
= page_address(page
);
8282 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8284 r
= kvm_mmu_create(vcpu
);
8286 goto fail_free_pio_data
;
8288 if (irqchip_in_kernel(vcpu
->kvm
)) {
8289 r
= kvm_create_lapic(vcpu
);
8291 goto fail_mmu_destroy
;
8293 static_key_slow_inc(&kvm_no_apic_vcpu
);
8295 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8297 if (!vcpu
->arch
.mce_banks
) {
8299 goto fail_free_lapic
;
8301 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8303 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8305 goto fail_free_mce_banks
;
8310 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8312 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8314 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8316 kvm_async_pf_hash_reset(vcpu
);
8319 vcpu
->arch
.pending_external_vector
= -1;
8320 vcpu
->arch
.preempted_in_kernel
= false;
8322 kvm_hv_vcpu_init(vcpu
);
8326 fail_free_mce_banks
:
8327 kfree(vcpu
->arch
.mce_banks
);
8329 kvm_free_lapic(vcpu
);
8331 kvm_mmu_destroy(vcpu
);
8333 free_page((unsigned long)vcpu
->arch
.pio_data
);
8338 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8342 kvm_hv_vcpu_uninit(vcpu
);
8343 kvm_pmu_destroy(vcpu
);
8344 kfree(vcpu
->arch
.mce_banks
);
8345 kvm_free_lapic(vcpu
);
8346 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8347 kvm_mmu_destroy(vcpu
);
8348 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8349 free_page((unsigned long)vcpu
->arch
.pio_data
);
8350 if (!lapic_in_kernel(vcpu
))
8351 static_key_slow_dec(&kvm_no_apic_vcpu
);
8354 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8356 vcpu
->arch
.l1tf_flush_l1d
= true;
8357 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8360 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8365 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8366 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8367 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8368 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8369 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8371 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8372 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8373 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8374 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8375 &kvm
->arch
.irq_sources_bitmap
);
8377 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8378 mutex_init(&kvm
->arch
.apic_map_lock
);
8379 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8380 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8382 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8383 pvclock_update_vm_gtod_copy(kvm
);
8385 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8386 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8388 kvm_page_track_init(kvm
);
8389 kvm_mmu_init_vm(kvm
);
8391 if (kvm_x86_ops
->vm_init
)
8392 return kvm_x86_ops
->vm_init(kvm
);
8397 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8400 r
= vcpu_load(vcpu
);
8402 kvm_mmu_unload(vcpu
);
8406 static void kvm_free_vcpus(struct kvm
*kvm
)
8409 struct kvm_vcpu
*vcpu
;
8412 * Unpin any mmu pages first.
8414 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8415 kvm_clear_async_pf_completion_queue(vcpu
);
8416 kvm_unload_vcpu_mmu(vcpu
);
8418 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8419 kvm_arch_vcpu_free(vcpu
);
8421 mutex_lock(&kvm
->lock
);
8422 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8423 kvm
->vcpus
[i
] = NULL
;
8425 atomic_set(&kvm
->online_vcpus
, 0);
8426 mutex_unlock(&kvm
->lock
);
8429 void kvm_arch_sync_events(struct kvm
*kvm
)
8431 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8432 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8436 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8440 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8441 struct kvm_memory_slot
*slot
, old
;
8443 /* Called with kvm->slots_lock held. */
8444 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8447 slot
= id_to_memslot(slots
, id
);
8453 * MAP_SHARED to prevent internal slot pages from being moved
8456 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8457 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8458 if (IS_ERR((void *)hva
))
8459 return PTR_ERR((void *)hva
);
8468 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8469 struct kvm_userspace_memory_region m
;
8471 m
.slot
= id
| (i
<< 16);
8473 m
.guest_phys_addr
= gpa
;
8474 m
.userspace_addr
= hva
;
8475 m
.memory_size
= size
;
8476 r
= __kvm_set_memory_region(kvm
, &m
);
8482 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8486 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8488 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8492 mutex_lock(&kvm
->slots_lock
);
8493 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8494 mutex_unlock(&kvm
->slots_lock
);
8498 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8500 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8502 if (current
->mm
== kvm
->mm
) {
8504 * Free memory regions allocated on behalf of userspace,
8505 * unless the the memory map has changed due to process exit
8508 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8509 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8510 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8512 if (kvm_x86_ops
->vm_destroy
)
8513 kvm_x86_ops
->vm_destroy(kvm
);
8514 kvm_pic_destroy(kvm
);
8515 kvm_ioapic_destroy(kvm
);
8516 kvm_free_vcpus(kvm
);
8517 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8518 kvm_mmu_uninit_vm(kvm
);
8519 kvm_page_track_cleanup(kvm
);
8522 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8523 struct kvm_memory_slot
*dont
)
8527 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8528 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8529 kvfree(free
->arch
.rmap
[i
]);
8530 free
->arch
.rmap
[i
] = NULL
;
8535 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8536 dont
->arch
.lpage_info
[i
- 1]) {
8537 kvfree(free
->arch
.lpage_info
[i
- 1]);
8538 free
->arch
.lpage_info
[i
- 1] = NULL
;
8542 kvm_page_track_free_memslot(free
, dont
);
8545 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8546 unsigned long npages
)
8550 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8551 struct kvm_lpage_info
*linfo
;
8556 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8557 slot
->base_gfn
, level
) + 1;
8559 slot
->arch
.rmap
[i
] =
8560 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8561 if (!slot
->arch
.rmap
[i
])
8566 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8570 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8572 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8573 linfo
[0].disallow_lpage
= 1;
8574 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8575 linfo
[lpages
- 1].disallow_lpage
= 1;
8576 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8578 * If the gfn and userspace address are not aligned wrt each
8579 * other, or if explicitly asked to, disable large page
8580 * support for this slot
8582 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8583 !kvm_largepages_enabled()) {
8586 for (j
= 0; j
< lpages
; ++j
)
8587 linfo
[j
].disallow_lpage
= 1;
8591 if (kvm_page_track_create_memslot(slot
, npages
))
8597 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8598 kvfree(slot
->arch
.rmap
[i
]);
8599 slot
->arch
.rmap
[i
] = NULL
;
8603 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8604 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8609 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
8612 * memslots->generation has been incremented.
8613 * mmio generation may have reached its maximum value.
8615 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
8618 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8619 struct kvm_memory_slot
*memslot
,
8620 const struct kvm_userspace_memory_region
*mem
,
8621 enum kvm_mr_change change
)
8626 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8627 struct kvm_memory_slot
*new)
8629 /* Still write protect RO slot */
8630 if (new->flags
& KVM_MEM_READONLY
) {
8631 kvm_mmu_slot_remove_write_access(kvm
, new);
8636 * Call kvm_x86_ops dirty logging hooks when they are valid.
8638 * kvm_x86_ops->slot_disable_log_dirty is called when:
8640 * - KVM_MR_CREATE with dirty logging is disabled
8641 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8643 * The reason is, in case of PML, we need to set D-bit for any slots
8644 * with dirty logging disabled in order to eliminate unnecessary GPA
8645 * logging in PML buffer (and potential PML buffer full VMEXT). This
8646 * guarantees leaving PML enabled during guest's lifetime won't have
8647 * any additonal overhead from PML when guest is running with dirty
8648 * logging disabled for memory slots.
8650 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8651 * to dirty logging mode.
8653 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8655 * In case of write protect:
8657 * Write protect all pages for dirty logging.
8659 * All the sptes including the large sptes which point to this
8660 * slot are set to readonly. We can not create any new large
8661 * spte on this slot until the end of the logging.
8663 * See the comments in fast_page_fault().
8665 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8666 if (kvm_x86_ops
->slot_enable_log_dirty
)
8667 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8669 kvm_mmu_slot_remove_write_access(kvm
, new);
8671 if (kvm_x86_ops
->slot_disable_log_dirty
)
8672 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8676 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8677 const struct kvm_userspace_memory_region
*mem
,
8678 const struct kvm_memory_slot
*old
,
8679 const struct kvm_memory_slot
*new,
8680 enum kvm_mr_change change
)
8682 int nr_mmu_pages
= 0;
8684 if (!kvm
->arch
.n_requested_mmu_pages
)
8685 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8688 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8691 * Dirty logging tracks sptes in 4k granularity, meaning that large
8692 * sptes have to be split. If live migration is successful, the guest
8693 * in the source machine will be destroyed and large sptes will be
8694 * created in the destination. However, if the guest continues to run
8695 * in the source machine (for example if live migration fails), small
8696 * sptes will remain around and cause bad performance.
8698 * Scan sptes if dirty logging has been stopped, dropping those
8699 * which can be collapsed into a single large-page spte. Later
8700 * page faults will create the large-page sptes.
8702 if ((change
!= KVM_MR_DELETE
) &&
8703 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8704 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8705 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8708 * Set up write protection and/or dirty logging for the new slot.
8710 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8711 * been zapped so no dirty logging staff is needed for old slot. For
8712 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8713 * new and it's also covered when dealing with the new slot.
8715 * FIXME: const-ify all uses of struct kvm_memory_slot.
8717 if (change
!= KVM_MR_DELETE
)
8718 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8721 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8723 kvm_mmu_invalidate_zap_all_pages(kvm
);
8726 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8727 struct kvm_memory_slot
*slot
)
8729 kvm_page_track_flush_slot(kvm
, slot
);
8732 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8734 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8737 if (kvm_apic_has_events(vcpu
))
8740 if (vcpu
->arch
.pv
.pv_unhalted
)
8743 if (vcpu
->arch
.exception
.pending
)
8746 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8747 (vcpu
->arch
.nmi_pending
&&
8748 kvm_x86_ops
->nmi_allowed(vcpu
)))
8751 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8752 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8755 if (kvm_arch_interrupt_allowed(vcpu
) &&
8756 kvm_cpu_has_interrupt(vcpu
))
8759 if (kvm_hv_has_stimer_pending(vcpu
))
8765 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8767 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8770 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
8772 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
8775 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8776 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8777 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
8780 if (vcpu
->arch
.apicv_active
&& kvm_x86_ops
->dy_apicv_has_pending_interrupt(vcpu
))
8786 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8788 return vcpu
->arch
.preempted_in_kernel
;
8791 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8793 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8796 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8798 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8801 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8803 if (is_64_bit_mode(vcpu
))
8804 return kvm_rip_read(vcpu
);
8805 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8806 kvm_rip_read(vcpu
));
8808 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8810 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8812 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8814 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8816 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8818 unsigned long rflags
;
8820 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8821 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8822 rflags
&= ~X86_EFLAGS_TF
;
8825 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8827 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8829 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8830 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8831 rflags
|= X86_EFLAGS_TF
;
8832 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8835 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8837 __kvm_set_rflags(vcpu
, rflags
);
8838 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8840 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8842 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8846 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8850 r
= kvm_mmu_reload(vcpu
);
8854 if (!vcpu
->arch
.mmu
.direct_map
&&
8855 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8858 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8861 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8863 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8866 static inline u32
kvm_async_pf_next_probe(u32 key
)
8868 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8871 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8873 u32 key
= kvm_async_pf_hash_fn(gfn
);
8875 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8876 key
= kvm_async_pf_next_probe(key
);
8878 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8881 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8884 u32 key
= kvm_async_pf_hash_fn(gfn
);
8886 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8887 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8888 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8889 key
= kvm_async_pf_next_probe(key
);
8894 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8896 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8899 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8903 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8905 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8907 j
= kvm_async_pf_next_probe(j
);
8908 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8910 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8912 * k lies cyclically in ]i,j]
8914 * |....j i.k.| or |.k..j i...|
8916 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8917 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8922 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8925 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8929 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8932 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8936 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8937 struct kvm_async_pf
*work
)
8939 struct x86_exception fault
;
8941 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8942 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8944 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8945 (vcpu
->arch
.apf
.send_user_only
&&
8946 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8947 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8948 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8949 fault
.vector
= PF_VECTOR
;
8950 fault
.error_code_valid
= true;
8951 fault
.error_code
= 0;
8952 fault
.nested_page_fault
= false;
8953 fault
.address
= work
->arch
.token
;
8954 fault
.async_page_fault
= true;
8955 kvm_inject_page_fault(vcpu
, &fault
);
8959 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8960 struct kvm_async_pf
*work
)
8962 struct x86_exception fault
;
8965 if (work
->wakeup_all
)
8966 work
->arch
.token
= ~0; /* broadcast wakeup */
8968 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8969 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8971 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
8972 !apf_get_user(vcpu
, &val
)) {
8973 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
8974 vcpu
->arch
.exception
.pending
&&
8975 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
8976 !apf_put_user(vcpu
, 0)) {
8977 vcpu
->arch
.exception
.injected
= false;
8978 vcpu
->arch
.exception
.pending
= false;
8979 vcpu
->arch
.exception
.nr
= 0;
8980 vcpu
->arch
.exception
.has_error_code
= false;
8981 vcpu
->arch
.exception
.error_code
= 0;
8982 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8983 fault
.vector
= PF_VECTOR
;
8984 fault
.error_code_valid
= true;
8985 fault
.error_code
= 0;
8986 fault
.nested_page_fault
= false;
8987 fault
.address
= work
->arch
.token
;
8988 fault
.async_page_fault
= true;
8989 kvm_inject_page_fault(vcpu
, &fault
);
8992 vcpu
->arch
.apf
.halted
= false;
8993 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8996 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8998 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
9001 return kvm_can_do_async_pf(vcpu
);
9004 void kvm_arch_start_assignment(struct kvm
*kvm
)
9006 atomic_inc(&kvm
->arch
.assigned_device_count
);
9008 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
9010 void kvm_arch_end_assignment(struct kvm
*kvm
)
9012 atomic_dec(&kvm
->arch
.assigned_device_count
);
9014 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
9016 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
9018 return atomic_read(&kvm
->arch
.assigned_device_count
);
9020 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
9022 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
9024 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
9026 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
9028 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
9030 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
9032 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
9034 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
9036 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
9038 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
9040 bool kvm_arch_has_irq_bypass(void)
9042 return kvm_x86_ops
->update_pi_irte
!= NULL
;
9045 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
9046 struct irq_bypass_producer
*prod
)
9048 struct kvm_kernel_irqfd
*irqfd
=
9049 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9051 irqfd
->producer
= prod
;
9053 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
9054 prod
->irq
, irqfd
->gsi
, 1);
9057 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
9058 struct irq_bypass_producer
*prod
)
9061 struct kvm_kernel_irqfd
*irqfd
=
9062 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9064 WARN_ON(irqfd
->producer
!= prod
);
9065 irqfd
->producer
= NULL
;
9068 * When producer of consumer is unregistered, we change back to
9069 * remapped mode, so we can re-use the current implementation
9070 * when the irq is masked/disabled or the consumer side (KVM
9071 * int this case doesn't want to receive the interrupts.
9073 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
9075 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
9076 " fails: %d\n", irqfd
->consumer
.token
, ret
);
9079 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
9080 uint32_t guest_irq
, bool set
)
9082 if (!kvm_x86_ops
->update_pi_irte
)
9085 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
9088 bool kvm_vector_hashing_enabled(void)
9090 return vector_hashing
;
9092 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
9094 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
9095 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
9096 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
9097 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
9098 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
9099 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
9100 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
9101 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
9102 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
9103 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
9104 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
9105 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
9106 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
9107 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
9108 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
9109 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
9110 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
9111 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
9112 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);