1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/api.h>
72 #include <asm/fpu/xcr.h>
73 #include <asm/fpu/xstate.h>
74 #include <asm/pvclock.h>
75 #include <asm/div64.h>
76 #include <asm/irq_remapping.h>
77 #include <asm/mshyperv.h>
78 #include <asm/hypervisor.h>
79 #include <asm/tlbflush.h>
80 #include <asm/intel_pt.h>
81 #include <asm/emulate_prefix.h>
83 #include <clocksource/hyperv_timer.h>
85 #define CREATE_TRACE_POINTS
88 #define MAX_IO_MSRS 256
89 #define KVM_MAX_MCE_BANKS 32
90 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
93 #define emul_to_vcpu(ctxt) \
94 ((struct kvm_vcpu *)(ctxt)->vcpu)
97 * - enable syscall per default because its emulated by KVM
98 * - enable LME and LMA per default on 64 bit KVM
102 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
104 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
107 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
109 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
111 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
112 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
114 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
115 static void process_nmi(struct kvm_vcpu
*vcpu
);
116 static void process_smi(struct kvm_vcpu
*vcpu
);
117 static void enter_smm(struct kvm_vcpu
*vcpu
);
118 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
119 static void store_regs(struct kvm_vcpu
*vcpu
);
120 static int sync_regs(struct kvm_vcpu
*vcpu
);
122 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
123 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
125 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
126 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
128 #define KVM_X86_OP(func) \
129 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
130 *(((struct kvm_x86_ops *)0)->func));
131 #define KVM_X86_OP_NULL KVM_X86_OP
132 #include <asm/kvm-x86-ops.h>
133 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
134 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
135 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current
);
137 static bool __read_mostly ignore_msrs
= 0;
138 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
140 bool __read_mostly report_ignored_msrs
= true;
141 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
142 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
144 unsigned int min_timer_period_us
= 200;
145 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
147 static bool __read_mostly kvmclock_periodic_sync
= true;
148 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
150 bool __read_mostly kvm_has_tsc_control
;
151 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
152 u32 __read_mostly kvm_max_guest_tsc_khz
;
153 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
154 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
155 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
156 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
157 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
158 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
159 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
160 bool __read_mostly kvm_has_bus_lock_exit
;
161 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit
);
163 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
164 static u32 __read_mostly tsc_tolerance_ppm
= 250;
165 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
168 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
169 * adaptive tuning starting from default advancement of 1000ns. '0' disables
170 * advancement entirely. Any other value is used as-is and disables adaptive
171 * tuning, i.e. allows privileged userspace to set an exact advancement time.
173 static int __read_mostly lapic_timer_advance_ns
= -1;
174 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
176 static bool __read_mostly vector_hashing
= true;
177 module_param(vector_hashing
, bool, S_IRUGO
);
179 bool __read_mostly enable_vmware_backdoor
= false;
180 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
181 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
183 static bool __read_mostly force_emulation_prefix
= false;
184 module_param(force_emulation_prefix
, bool, S_IRUGO
);
186 int __read_mostly pi_inject_timer
= -1;
187 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
190 * Restoring the host value for MSRs that are only consumed when running in
191 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
192 * returns to userspace, i.e. the kernel can run with the guest's value.
194 #define KVM_MAX_NR_USER_RETURN_MSRS 16
196 struct kvm_user_return_msrs
{
197 struct user_return_notifier urn
;
199 struct kvm_user_return_msr_values
{
202 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
205 u32 __read_mostly kvm_nr_uret_msrs
;
206 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
207 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
208 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
210 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
211 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
212 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
213 | XFEATURE_MASK_PKRU)
215 u64 __read_mostly host_efer
;
216 EXPORT_SYMBOL_GPL(host_efer
);
218 bool __read_mostly allow_smaller_maxphyaddr
= 0;
219 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
221 bool __read_mostly enable_apicv
= true;
222 EXPORT_SYMBOL_GPL(enable_apicv
);
224 u64 __read_mostly host_xss
;
225 EXPORT_SYMBOL_GPL(host_xss
);
226 u64 __read_mostly supported_xss
;
227 EXPORT_SYMBOL_GPL(supported_xss
);
229 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
230 KVM_GENERIC_VM_STATS(),
231 STATS_DESC_COUNTER(VM
, mmu_shadow_zapped
),
232 STATS_DESC_COUNTER(VM
, mmu_pte_write
),
233 STATS_DESC_COUNTER(VM
, mmu_pde_zapped
),
234 STATS_DESC_COUNTER(VM
, mmu_flooded
),
235 STATS_DESC_COUNTER(VM
, mmu_recycled
),
236 STATS_DESC_COUNTER(VM
, mmu_cache_miss
),
237 STATS_DESC_ICOUNTER(VM
, mmu_unsync
),
238 STATS_DESC_ICOUNTER(VM
, pages_4k
),
239 STATS_DESC_ICOUNTER(VM
, pages_2m
),
240 STATS_DESC_ICOUNTER(VM
, pages_1g
),
241 STATS_DESC_ICOUNTER(VM
, nx_lpage_splits
),
242 STATS_DESC_PCOUNTER(VM
, max_mmu_rmap_size
),
243 STATS_DESC_PCOUNTER(VM
, max_mmu_page_hash_collisions
)
246 const struct kvm_stats_header kvm_vm_stats_header
= {
247 .name_size
= KVM_STATS_NAME_SIZE
,
248 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
249 .id_offset
= sizeof(struct kvm_stats_header
),
250 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
251 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
252 sizeof(kvm_vm_stats_desc
),
255 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
256 KVM_GENERIC_VCPU_STATS(),
257 STATS_DESC_COUNTER(VCPU
, pf_fixed
),
258 STATS_DESC_COUNTER(VCPU
, pf_guest
),
259 STATS_DESC_COUNTER(VCPU
, tlb_flush
),
260 STATS_DESC_COUNTER(VCPU
, invlpg
),
261 STATS_DESC_COUNTER(VCPU
, exits
),
262 STATS_DESC_COUNTER(VCPU
, io_exits
),
263 STATS_DESC_COUNTER(VCPU
, mmio_exits
),
264 STATS_DESC_COUNTER(VCPU
, signal_exits
),
265 STATS_DESC_COUNTER(VCPU
, irq_window_exits
),
266 STATS_DESC_COUNTER(VCPU
, nmi_window_exits
),
267 STATS_DESC_COUNTER(VCPU
, l1d_flush
),
268 STATS_DESC_COUNTER(VCPU
, halt_exits
),
269 STATS_DESC_COUNTER(VCPU
, request_irq_exits
),
270 STATS_DESC_COUNTER(VCPU
, irq_exits
),
271 STATS_DESC_COUNTER(VCPU
, host_state_reload
),
272 STATS_DESC_COUNTER(VCPU
, fpu_reload
),
273 STATS_DESC_COUNTER(VCPU
, insn_emulation
),
274 STATS_DESC_COUNTER(VCPU
, insn_emulation_fail
),
275 STATS_DESC_COUNTER(VCPU
, hypercalls
),
276 STATS_DESC_COUNTER(VCPU
, irq_injections
),
277 STATS_DESC_COUNTER(VCPU
, nmi_injections
),
278 STATS_DESC_COUNTER(VCPU
, req_event
),
279 STATS_DESC_COUNTER(VCPU
, nested_run
),
280 STATS_DESC_COUNTER(VCPU
, directed_yield_attempted
),
281 STATS_DESC_COUNTER(VCPU
, directed_yield_successful
),
282 STATS_DESC_ICOUNTER(VCPU
, guest_mode
)
285 const struct kvm_stats_header kvm_vcpu_stats_header
= {
286 .name_size
= KVM_STATS_NAME_SIZE
,
287 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
288 .id_offset
= sizeof(struct kvm_stats_header
),
289 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
290 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
291 sizeof(kvm_vcpu_stats_desc
),
294 u64 __read_mostly host_xcr0
;
295 u64 __read_mostly supported_xcr0
;
296 EXPORT_SYMBOL_GPL(supported_xcr0
);
298 static struct kmem_cache
*x86_emulator_cache
;
301 * When called, it means the previous get/set msr reached an invalid msr.
302 * Return true if we want to ignore/silent this failed msr access.
304 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
306 const char *op
= write
? "wrmsr" : "rdmsr";
309 if (report_ignored_msrs
)
310 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
315 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
321 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
323 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
324 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
326 return kmem_cache_create_usercopy("x86_emulator", size
,
327 __alignof__(struct x86_emulate_ctxt
),
328 SLAB_ACCOUNT
, useroffset
,
329 size
- useroffset
, NULL
);
332 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
337 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
338 vcpu
->arch
.apf
.gfns
[i
] = ~0;
341 static void kvm_on_user_return(struct user_return_notifier
*urn
)
344 struct kvm_user_return_msrs
*msrs
345 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
346 struct kvm_user_return_msr_values
*values
;
350 * Disabling irqs at this point since the following code could be
351 * interrupted and executed through kvm_arch_hardware_disable()
353 local_irq_save(flags
);
354 if (msrs
->registered
) {
355 msrs
->registered
= false;
356 user_return_notifier_unregister(urn
);
358 local_irq_restore(flags
);
359 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
360 values
= &msrs
->values
[slot
];
361 if (values
->host
!= values
->curr
) {
362 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
363 values
->curr
= values
->host
;
368 static int kvm_probe_user_return_msr(u32 msr
)
374 ret
= rdmsrl_safe(msr
, &val
);
377 ret
= wrmsrl_safe(msr
, val
);
383 int kvm_add_user_return_msr(u32 msr
)
385 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
387 if (kvm_probe_user_return_msr(msr
))
390 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
391 return kvm_nr_uret_msrs
++;
393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
395 int kvm_find_user_return_msr(u32 msr
)
399 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
400 if (kvm_uret_msrs_list
[i
] == msr
)
405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
407 static void kvm_user_return_msr_cpu_online(void)
409 unsigned int cpu
= smp_processor_id();
410 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
414 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
415 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
416 msrs
->values
[i
].host
= value
;
417 msrs
->values
[i
].curr
= value
;
421 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
423 unsigned int cpu
= smp_processor_id();
424 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
427 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
428 if (value
== msrs
->values
[slot
].curr
)
430 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
434 msrs
->values
[slot
].curr
= value
;
435 if (!msrs
->registered
) {
436 msrs
->urn
.on_user_return
= kvm_on_user_return
;
437 user_return_notifier_register(&msrs
->urn
);
438 msrs
->registered
= true;
442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
444 static void drop_user_return_notifiers(void)
446 unsigned int cpu
= smp_processor_id();
447 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
449 if (msrs
->registered
)
450 kvm_on_user_return(&msrs
->urn
);
453 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
455 return vcpu
->arch
.apic_base
;
457 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
459 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
461 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
465 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
467 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
468 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
469 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
470 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
472 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
474 if (!msr_info
->host_initiated
) {
475 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
477 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
481 kvm_lapic_set_base(vcpu
, msr_info
->data
);
482 kvm_recalculate_apic_map(vcpu
->kvm
);
485 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
488 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
490 * Hardware virtualization extension instructions may fault if a reboot turns
491 * off virtualization while processes are running. Usually after catching the
492 * fault we just panic; during reboot instead the instruction is ignored.
494 noinstr
void kvm_spurious_fault(void)
496 /* Fault while not rebooting. We want the trace. */
497 BUG_ON(!kvm_rebooting
);
499 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
501 #define EXCPT_BENIGN 0
502 #define EXCPT_CONTRIBUTORY 1
505 static int exception_class(int vector
)
515 return EXCPT_CONTRIBUTORY
;
522 #define EXCPT_FAULT 0
524 #define EXCPT_ABORT 2
525 #define EXCPT_INTERRUPT 3
527 static int exception_type(int vector
)
531 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
532 return EXCPT_INTERRUPT
;
536 /* #DB is trap, as instruction watchpoints are handled elsewhere */
537 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
540 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
543 /* Reserved exceptions will result in fault */
547 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
549 unsigned nr
= vcpu
->arch
.exception
.nr
;
550 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
551 unsigned long payload
= vcpu
->arch
.exception
.payload
;
559 * "Certain debug exceptions may clear bit 0-3. The
560 * remaining contents of the DR6 register are never
561 * cleared by the processor".
563 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
565 * In order to reflect the #DB exception payload in guest
566 * dr6, three components need to be considered: active low
567 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
569 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
570 * In the target guest dr6:
571 * FIXED_1 bits should always be set.
572 * Active low bits should be cleared if 1-setting in payload.
573 * Active high bits should be set if 1-setting in payload.
575 * Note, the payload is compatible with the pending debug
576 * exceptions/exit qualification under VMX, that active_low bits
577 * are active high in payload.
578 * So they need to be flipped for DR6.
580 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
581 vcpu
->arch
.dr6
|= payload
;
582 vcpu
->arch
.dr6
^= payload
& DR6_ACTIVE_LOW
;
585 * The #DB payload is defined as compatible with the 'pending
586 * debug exceptions' field under VMX, not DR6. While bit 12 is
587 * defined in the 'pending debug exceptions' field (enabled
588 * breakpoint), it is reserved and must be zero in DR6.
590 vcpu
->arch
.dr6
&= ~BIT(12);
593 vcpu
->arch
.cr2
= payload
;
597 vcpu
->arch
.exception
.has_payload
= false;
598 vcpu
->arch
.exception
.payload
= 0;
600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
602 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
603 unsigned nr
, bool has_error
, u32 error_code
,
604 bool has_payload
, unsigned long payload
, bool reinject
)
609 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
611 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
615 * On vmentry, vcpu->arch.exception.pending is only
616 * true if an event injection was blocked by
617 * nested_run_pending. In that case, however,
618 * vcpu_enter_guest requests an immediate exit,
619 * and the guest shouldn't proceed far enough to
622 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
623 vcpu
->arch
.exception
.injected
= true;
624 if (WARN_ON_ONCE(has_payload
)) {
626 * A reinjected event has already
627 * delivered its payload.
633 vcpu
->arch
.exception
.pending
= true;
634 vcpu
->arch
.exception
.injected
= false;
636 vcpu
->arch
.exception
.has_error_code
= has_error
;
637 vcpu
->arch
.exception
.nr
= nr
;
638 vcpu
->arch
.exception
.error_code
= error_code
;
639 vcpu
->arch
.exception
.has_payload
= has_payload
;
640 vcpu
->arch
.exception
.payload
= payload
;
641 if (!is_guest_mode(vcpu
))
642 kvm_deliver_exception_payload(vcpu
);
646 /* to check exception */
647 prev_nr
= vcpu
->arch
.exception
.nr
;
648 if (prev_nr
== DF_VECTOR
) {
649 /* triple fault -> shutdown */
650 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
653 class1
= exception_class(prev_nr
);
654 class2
= exception_class(nr
);
655 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
656 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
658 * Generate double fault per SDM Table 5-5. Set
659 * exception.pending = true so that the double fault
660 * can trigger a nested vmexit.
662 vcpu
->arch
.exception
.pending
= true;
663 vcpu
->arch
.exception
.injected
= false;
664 vcpu
->arch
.exception
.has_error_code
= true;
665 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
666 vcpu
->arch
.exception
.error_code
= 0;
667 vcpu
->arch
.exception
.has_payload
= false;
668 vcpu
->arch
.exception
.payload
= 0;
670 /* replace previous exception with a new one in a hope
671 that instruction re-execution will regenerate lost
676 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
678 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
680 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
682 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
684 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
686 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
688 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
689 unsigned long payload
)
691 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
695 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
696 u32 error_code
, unsigned long payload
)
698 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
699 true, payload
, false);
702 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
705 kvm_inject_gp(vcpu
, 0);
707 return kvm_skip_emulated_instruction(vcpu
);
711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
713 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
715 ++vcpu
->stat
.pf_guest
;
716 vcpu
->arch
.exception
.nested_apf
=
717 is_guest_mode(vcpu
) && fault
->async_page_fault
;
718 if (vcpu
->arch
.exception
.nested_apf
) {
719 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
720 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
722 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
729 struct x86_exception
*fault
)
731 struct kvm_mmu
*fault_mmu
;
732 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
734 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
738 * Invalidate the TLB entry for the faulting address, if it exists,
739 * else the access will fault indefinitely (and to emulate hardware).
741 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
742 !(fault
->error_code
& PFERR_RSVD_MASK
))
743 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
744 fault_mmu
->root_hpa
);
746 fault_mmu
->inject_page_fault(vcpu
, fault
);
747 return fault
->nested_page_fault
;
749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
751 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
753 atomic_inc(&vcpu
->arch
.nmi_queued
);
754 kvm_make_request(KVM_REQ_NMI
, vcpu
);
756 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
758 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
760 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
764 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
766 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
771 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
772 * a #GP and return false.
774 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
776 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
778 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
781 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
783 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
785 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
788 kvm_queue_exception(vcpu
, UD_VECTOR
);
791 EXPORT_SYMBOL_GPL(kvm_require_dr
);
794 * This function will be used to read from the physical memory of the currently
795 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
796 * can read from guest physical or from the guest's guest physical memory.
798 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
799 gfn_t ngfn
, void *data
, int offset
, int len
,
802 struct x86_exception exception
;
806 ngpa
= gfn_to_gpa(ngfn
);
807 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
808 if (real_gfn
== UNMAPPED_GVA
)
811 real_gfn
= gpa_to_gfn(real_gfn
);
813 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
815 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
817 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
819 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
823 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
825 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
827 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
828 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
831 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
833 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
834 offset
* sizeof(u64
), sizeof(pdpte
),
835 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
840 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
841 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
842 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
849 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
850 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
851 kvm_make_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
);
852 vcpu
->arch
.pdptrs_from_userspace
= false;
858 EXPORT_SYMBOL_GPL(load_pdptrs
);
860 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
862 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
863 kvm_clear_async_pf_completion_queue(vcpu
);
864 kvm_async_pf_hash_reset(vcpu
);
867 if ((cr0
^ old_cr0
) & KVM_MMU_CR0_ROLE_BITS
)
868 kvm_mmu_reset_context(vcpu
);
870 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
871 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
872 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
873 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
875 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
877 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
879 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
880 unsigned long pdptr_bits
= X86_CR0_CD
| X86_CR0_NW
| X86_CR0_PG
;
885 if (cr0
& 0xffffffff00000000UL
)
889 cr0
&= ~CR0_RESERVED_BITS
;
891 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
894 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
898 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
899 (cr0
& X86_CR0_PG
)) {
904 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
909 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
910 is_pae(vcpu
) && ((cr0
^ old_cr0
) & pdptr_bits
) &&
911 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
)))
914 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
917 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
919 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
923 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
925 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
927 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
929 EXPORT_SYMBOL_GPL(kvm_lmsw
);
931 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
933 if (vcpu
->arch
.guest_state_protected
)
936 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
938 if (vcpu
->arch
.xcr0
!= host_xcr0
)
939 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
941 if (vcpu
->arch
.xsaves_enabled
&&
942 vcpu
->arch
.ia32_xss
!= host_xss
)
943 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
946 if (static_cpu_has(X86_FEATURE_PKU
) &&
947 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
948 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
949 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
950 write_pkru(vcpu
->arch
.pkru
);
952 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
954 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
956 if (vcpu
->arch
.guest_state_protected
)
959 if (static_cpu_has(X86_FEATURE_PKU
) &&
960 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
961 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
962 vcpu
->arch
.pkru
= rdpkru();
963 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
964 write_pkru(vcpu
->arch
.host_pkru
);
967 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
969 if (vcpu
->arch
.xcr0
!= host_xcr0
)
970 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
972 if (vcpu
->arch
.xsaves_enabled
&&
973 vcpu
->arch
.ia32_xss
!= host_xss
)
974 wrmsrl(MSR_IA32_XSS
, host_xss
);
978 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
980 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
983 u64 old_xcr0
= vcpu
->arch
.xcr0
;
986 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
987 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
989 if (!(xcr0
& XFEATURE_MASK_FP
))
991 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
995 * Do not allow the guest to set bits that we do not support
996 * saving. However, xcr0 bit 0 is always set, even if the
997 * emulated CPU does not support XSAVE (see fx_init).
999 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
1000 if (xcr0
& ~valid_bits
)
1003 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
1004 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1007 if (xcr0
& XFEATURE_MASK_AVX512
) {
1008 if (!(xcr0
& XFEATURE_MASK_YMM
))
1010 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1013 vcpu
->arch
.xcr0
= xcr0
;
1015 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1016 kvm_update_cpuid_runtime(vcpu
);
1020 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1022 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1023 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1024 kvm_inject_gp(vcpu
, 0);
1028 return kvm_skip_emulated_instruction(vcpu
);
1030 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1032 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1034 if (cr4
& cr4_reserved_bits
)
1037 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1040 return static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1042 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
1044 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1046 if (((cr4
^ old_cr4
) & KVM_MMU_CR4_ROLE_BITS
) ||
1047 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1048 kvm_mmu_reset_context(vcpu
);
1050 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1052 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1054 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1055 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1058 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1061 if (is_long_mode(vcpu
)) {
1062 if (!(cr4
& X86_CR4_PAE
))
1064 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1066 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1067 && ((cr4
^ old_cr4
) & pdptr_bits
)
1068 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
1069 kvm_read_cr3(vcpu
)))
1072 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1073 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1076 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1077 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1081 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1083 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1087 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1089 static void kvm_invalidate_pcid(struct kvm_vcpu
*vcpu
, unsigned long pcid
)
1091 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
1092 unsigned long roots_to_free
= 0;
1096 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1097 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1098 * also via the emulator. KVM's TDP page tables are not in the scope of
1099 * the invalidation, but the guest's TLB entries need to be flushed as
1100 * the CPU may have cached entries in its TLB for the target PCID.
1102 if (unlikely(tdp_enabled
)) {
1103 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1108 * If neither the current CR3 nor any of the prev_roots use the given
1109 * PCID, then nothing needs to be done here because a resync will
1110 * happen anyway before switching to any other CR3.
1112 if (kvm_get_active_pcid(vcpu
) == pcid
) {
1113 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1114 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1117 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
1118 if (kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
) == pcid
)
1119 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
1121 kvm_mmu_free_roots(vcpu
, mmu
, roots_to_free
);
1124 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1126 bool skip_tlb_flush
= false;
1127 unsigned long pcid
= 0;
1128 #ifdef CONFIG_X86_64
1129 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1132 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1133 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1134 pcid
= cr3
& X86_CR3_PCID_MASK
;
1138 /* PDPTRs are always reloaded for PAE paging. */
1139 if (cr3
== kvm_read_cr3(vcpu
) && !is_pae_paging(vcpu
))
1140 goto handle_tlb_flush
;
1143 * Do not condition the GPA check on long mode, this helper is used to
1144 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1145 * the current vCPU mode is accurate.
1147 if (kvm_vcpu_is_illegal_gpa(vcpu
, cr3
))
1150 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1153 if (cr3
!= kvm_read_cr3(vcpu
))
1154 kvm_mmu_new_pgd(vcpu
, cr3
);
1156 vcpu
->arch
.cr3
= cr3
;
1157 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1161 * A load of CR3 that flushes the TLB flushes only the current PCID,
1162 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1163 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1164 * and it's impossible to use a non-zero PCID when PCID is disabled,
1165 * i.e. only PCID=0 can be relevant.
1167 if (!skip_tlb_flush
)
1168 kvm_invalidate_pcid(vcpu
, pcid
);
1172 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1174 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1176 if (cr8
& CR8_RESERVED_BITS
)
1178 if (lapic_in_kernel(vcpu
))
1179 kvm_lapic_set_tpr(vcpu
, cr8
);
1181 vcpu
->arch
.cr8
= cr8
;
1184 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1186 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1188 if (lapic_in_kernel(vcpu
))
1189 return kvm_lapic_get_cr8(vcpu
);
1191 return vcpu
->arch
.cr8
;
1193 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1195 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1199 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1200 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1201 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1205 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1209 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1210 dr7
= vcpu
->arch
.guest_debug_dr7
;
1212 dr7
= vcpu
->arch
.dr7
;
1213 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1214 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1215 if (dr7
& DR7_BP_EN_MASK
)
1216 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1218 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1220 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1222 u64 fixed
= DR6_FIXED_1
;
1224 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1227 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1228 fixed
|= DR6_BUS_LOCK
;
1232 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1234 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1238 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1239 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1240 vcpu
->arch
.eff_db
[dr
] = val
;
1244 if (!kvm_dr6_valid(val
))
1246 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1250 if (!kvm_dr7_valid(val
))
1252 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1253 kvm_update_dr7(vcpu
);
1259 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1261 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1263 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1267 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1271 *val
= vcpu
->arch
.dr6
;
1275 *val
= vcpu
->arch
.dr7
;
1279 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1281 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1283 u32 ecx
= kvm_rcx_read(vcpu
);
1286 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1287 kvm_inject_gp(vcpu
, 0);
1291 kvm_rax_write(vcpu
, (u32
)data
);
1292 kvm_rdx_write(vcpu
, data
>> 32);
1293 return kvm_skip_emulated_instruction(vcpu
);
1295 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1298 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1299 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1301 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1302 * extract the supported MSRs from the related const lists.
1303 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1304 * capabilities of the host cpu. This capabilities test skips MSRs that are
1305 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1306 * may depend on host virtualization features rather than host cpu features.
1309 static const u32 msrs_to_save_all
[] = {
1310 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1312 #ifdef CONFIG_X86_64
1313 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1315 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1316 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1318 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1319 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1320 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1321 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1322 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1323 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1324 MSR_IA32_UMWAIT_CONTROL
,
1326 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1327 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2,
1328 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1329 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1330 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1331 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1332 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1333 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1334 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1335 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1336 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1337 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1338 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1339 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1340 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1341 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1342 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1343 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1344 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1345 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1346 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1347 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1349 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1350 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1351 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1352 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1353 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1354 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1357 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1358 static unsigned num_msrs_to_save
;
1360 static const u32 emulated_msrs_all
[] = {
1361 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1362 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1363 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1364 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1365 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1366 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1367 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1369 HV_X64_MSR_VP_INDEX
,
1370 HV_X64_MSR_VP_RUNTIME
,
1371 HV_X64_MSR_SCONTROL
,
1372 HV_X64_MSR_STIMER0_CONFIG
,
1373 HV_X64_MSR_VP_ASSIST_PAGE
,
1374 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1375 HV_X64_MSR_TSC_EMULATION_STATUS
,
1376 HV_X64_MSR_SYNDBG_OPTIONS
,
1377 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1378 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1379 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1381 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1382 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1384 MSR_IA32_TSC_ADJUST
,
1385 MSR_IA32_TSC_DEADLINE
,
1386 MSR_IA32_ARCH_CAPABILITIES
,
1387 MSR_IA32_PERF_CAPABILITIES
,
1388 MSR_IA32_MISC_ENABLE
,
1389 MSR_IA32_MCG_STATUS
,
1391 MSR_IA32_MCG_EXT_CTL
,
1395 MSR_MISC_FEATURES_ENABLES
,
1396 MSR_AMD64_VIRT_SPEC_CTRL
,
1401 * The following list leaves out MSRs whose values are determined
1402 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1403 * We always support the "true" VMX control MSRs, even if the host
1404 * processor does not, so I am putting these registers here rather
1405 * than in msrs_to_save_all.
1408 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1409 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1410 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1411 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1413 MSR_IA32_VMX_CR0_FIXED0
,
1414 MSR_IA32_VMX_CR4_FIXED0
,
1415 MSR_IA32_VMX_VMCS_ENUM
,
1416 MSR_IA32_VMX_PROCBASED_CTLS2
,
1417 MSR_IA32_VMX_EPT_VPID_CAP
,
1418 MSR_IA32_VMX_VMFUNC
,
1421 MSR_KVM_POLL_CONTROL
,
1424 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1425 static unsigned num_emulated_msrs
;
1428 * List of msr numbers which are used to expose MSR-based features that
1429 * can be used by a hypervisor to validate requested CPU features.
1431 static const u32 msr_based_features_all
[] = {
1433 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1434 MSR_IA32_VMX_PINBASED_CTLS
,
1435 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1436 MSR_IA32_VMX_PROCBASED_CTLS
,
1437 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1438 MSR_IA32_VMX_EXIT_CTLS
,
1439 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1440 MSR_IA32_VMX_ENTRY_CTLS
,
1442 MSR_IA32_VMX_CR0_FIXED0
,
1443 MSR_IA32_VMX_CR0_FIXED1
,
1444 MSR_IA32_VMX_CR4_FIXED0
,
1445 MSR_IA32_VMX_CR4_FIXED1
,
1446 MSR_IA32_VMX_VMCS_ENUM
,
1447 MSR_IA32_VMX_PROCBASED_CTLS2
,
1448 MSR_IA32_VMX_EPT_VPID_CAP
,
1449 MSR_IA32_VMX_VMFUNC
,
1453 MSR_IA32_ARCH_CAPABILITIES
,
1454 MSR_IA32_PERF_CAPABILITIES
,
1457 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1458 static unsigned int num_msr_based_features
;
1460 static u64
kvm_get_arch_capabilities(void)
1464 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1465 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1468 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1469 * the nested hypervisor runs with NX huge pages. If it is not,
1470 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1471 * L1 guests, so it need not worry about its own (L2) guests.
1473 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1476 * If we're doing cache flushes (either "always" or "cond")
1477 * we will do one whenever the guest does a vmlaunch/vmresume.
1478 * If an outer hypervisor is doing the cache flush for us
1479 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1480 * capability to the guest too, and if EPT is disabled we're not
1481 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1482 * require a nested hypervisor to do a flush of its own.
1484 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1485 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1487 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1488 data
|= ARCH_CAP_RDCL_NO
;
1489 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1490 data
|= ARCH_CAP_SSB_NO
;
1491 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1492 data
|= ARCH_CAP_MDS_NO
;
1494 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1496 * If RTM=0 because the kernel has disabled TSX, the host might
1497 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1498 * and therefore knows that there cannot be TAA) but keep
1499 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1500 * and we want to allow migrating those guests to tsx=off hosts.
1502 data
&= ~ARCH_CAP_TAA_NO
;
1503 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1504 data
|= ARCH_CAP_TAA_NO
;
1507 * Nothing to do here; we emulate TSX_CTRL if present on the
1508 * host so the guest can choose between disabling TSX or
1509 * using VERW to clear CPU buffers.
1516 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1518 switch (msr
->index
) {
1519 case MSR_IA32_ARCH_CAPABILITIES
:
1520 msr
->data
= kvm_get_arch_capabilities();
1522 case MSR_IA32_UCODE_REV
:
1523 rdmsrl_safe(msr
->index
, &msr
->data
);
1526 return static_call(kvm_x86_get_msr_feature
)(msr
);
1531 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1533 struct kvm_msr_entry msr
;
1537 r
= kvm_get_msr_feature(&msr
);
1539 if (r
== KVM_MSR_RET_INVALID
) {
1540 /* Unconditionally clear the output for simplicity */
1542 if (kvm_msr_ignored_check(index
, 0, false))
1554 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1556 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1559 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1562 if (efer
& (EFER_LME
| EFER_LMA
) &&
1563 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1566 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1572 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1574 if (efer
& efer_reserved_bits
)
1577 return __kvm_valid_efer(vcpu
, efer
);
1579 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1581 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1583 u64 old_efer
= vcpu
->arch
.efer
;
1584 u64 efer
= msr_info
->data
;
1587 if (efer
& efer_reserved_bits
)
1590 if (!msr_info
->host_initiated
) {
1591 if (!__kvm_valid_efer(vcpu
, efer
))
1594 if (is_paging(vcpu
) &&
1595 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1600 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1602 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1608 if ((efer
^ old_efer
) & KVM_MMU_EFER_ROLE_BITS
)
1609 kvm_mmu_reset_context(vcpu
);
1614 void kvm_enable_efer_bits(u64 mask
)
1616 efer_reserved_bits
&= ~mask
;
1618 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1620 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1622 struct kvm_x86_msr_filter
*msr_filter
;
1623 struct msr_bitmap_range
*ranges
;
1624 struct kvm
*kvm
= vcpu
->kvm
;
1629 /* x2APIC MSRs do not support filtering. */
1630 if (index
>= 0x800 && index
<= 0x8ff)
1633 idx
= srcu_read_lock(&kvm
->srcu
);
1635 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1641 allowed
= msr_filter
->default_allow
;
1642 ranges
= msr_filter
->ranges
;
1644 for (i
= 0; i
< msr_filter
->count
; i
++) {
1645 u32 start
= ranges
[i
].base
;
1646 u32 end
= start
+ ranges
[i
].nmsrs
;
1647 u32 flags
= ranges
[i
].flags
;
1648 unsigned long *bitmap
= ranges
[i
].bitmap
;
1650 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1651 allowed
= !!test_bit(index
- start
, bitmap
);
1657 srcu_read_unlock(&kvm
->srcu
, idx
);
1661 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1664 * Write @data into the MSR specified by @index. Select MSR specific fault
1665 * checks are bypassed if @host_initiated is %true.
1666 * Returns 0 on success, non-0 otherwise.
1667 * Assumes vcpu_load() was already called.
1669 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1670 bool host_initiated
)
1672 struct msr_data msr
;
1674 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1675 return KVM_MSR_RET_FILTERED
;
1680 case MSR_KERNEL_GS_BASE
:
1683 if (is_noncanonical_address(data
, vcpu
))
1686 case MSR_IA32_SYSENTER_EIP
:
1687 case MSR_IA32_SYSENTER_ESP
:
1689 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1690 * non-canonical address is written on Intel but not on
1691 * AMD (which ignores the top 32-bits, because it does
1692 * not implement 64-bit SYSENTER).
1694 * 64-bit code should hence be able to write a non-canonical
1695 * value on AMD. Making the address canonical ensures that
1696 * vmentry does not fail on Intel after writing a non-canonical
1697 * value, and that something deterministic happens if the guest
1698 * invokes 64-bit SYSENTER.
1700 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1703 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1706 if (!host_initiated
&&
1707 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1708 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1712 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1713 * incomplete and conflicting architectural behavior. Current
1714 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1715 * reserved and always read as zeros. Enforce Intel's reserved
1716 * bits check if and only if the guest CPU is Intel, and clear
1717 * the bits in all other cases. This ensures cross-vendor
1718 * migration will provide consistent behavior for the guest.
1720 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1729 msr
.host_initiated
= host_initiated
;
1731 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1734 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1735 u32 index
, u64 data
, bool host_initiated
)
1737 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1739 if (ret
== KVM_MSR_RET_INVALID
)
1740 if (kvm_msr_ignored_check(index
, data
, true))
1747 * Read the MSR specified by @index into @data. Select MSR specific fault
1748 * checks are bypassed if @host_initiated is %true.
1749 * Returns 0 on success, non-0 otherwise.
1750 * Assumes vcpu_load() was already called.
1752 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1753 bool host_initiated
)
1755 struct msr_data msr
;
1758 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1759 return KVM_MSR_RET_FILTERED
;
1763 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1766 if (!host_initiated
&&
1767 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1768 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1774 msr
.host_initiated
= host_initiated
;
1776 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1782 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1783 u32 index
, u64
*data
, bool host_initiated
)
1785 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1787 if (ret
== KVM_MSR_RET_INVALID
) {
1788 /* Unconditionally clear *data for simplicity */
1790 if (kvm_msr_ignored_check(index
, 0, false))
1797 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1799 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1801 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1803 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1805 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1807 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1809 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1811 int err
= vcpu
->run
->msr
.error
;
1813 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1814 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1817 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, err
);
1820 static int complete_emulated_wrmsr(struct kvm_vcpu
*vcpu
)
1822 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
1825 static u64
kvm_msr_reason(int r
)
1828 case KVM_MSR_RET_INVALID
:
1829 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1830 case KVM_MSR_RET_FILTERED
:
1831 return KVM_MSR_EXIT_REASON_FILTER
;
1833 return KVM_MSR_EXIT_REASON_INVAL
;
1837 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1838 u32 exit_reason
, u64 data
,
1839 int (*completion
)(struct kvm_vcpu
*vcpu
),
1842 u64 msr_reason
= kvm_msr_reason(r
);
1844 /* Check if the user wanted to know about this MSR fault */
1845 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1848 vcpu
->run
->exit_reason
= exit_reason
;
1849 vcpu
->run
->msr
.error
= 0;
1850 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1851 vcpu
->run
->msr
.reason
= msr_reason
;
1852 vcpu
->run
->msr
.index
= index
;
1853 vcpu
->run
->msr
.data
= data
;
1854 vcpu
->arch
.complete_userspace_io
= completion
;
1859 static int kvm_get_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, int r
)
1861 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_RDMSR
, 0,
1862 complete_emulated_rdmsr
, r
);
1865 static int kvm_set_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
, int r
)
1867 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_WRMSR
, data
,
1868 complete_emulated_wrmsr
, r
);
1871 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1873 u32 ecx
= kvm_rcx_read(vcpu
);
1877 r
= kvm_get_msr(vcpu
, ecx
, &data
);
1879 /* MSR read failed? See if we should ask user space */
1880 if (r
&& kvm_get_msr_user_space(vcpu
, ecx
, r
)) {
1881 /* Bounce to user space */
1886 trace_kvm_msr_read(ecx
, data
);
1888 kvm_rax_write(vcpu
, data
& -1u);
1889 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1891 trace_kvm_msr_read_ex(ecx
);
1894 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1896 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1898 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1900 u32 ecx
= kvm_rcx_read(vcpu
);
1901 u64 data
= kvm_read_edx_eax(vcpu
);
1904 r
= kvm_set_msr(vcpu
, ecx
, data
);
1906 /* MSR write failed? See if we should ask user space */
1907 if (r
&& kvm_set_msr_user_space(vcpu
, ecx
, data
, r
))
1908 /* Bounce to user space */
1911 /* Signal all other negative errors to userspace */
1916 trace_kvm_msr_write(ecx
, data
);
1918 trace_kvm_msr_write_ex(ecx
, data
);
1920 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1922 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1924 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
1926 return kvm_skip_emulated_instruction(vcpu
);
1928 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop
);
1930 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
1932 /* Treat an INVD instruction as a NOP and just skip it. */
1933 return kvm_emulate_as_nop(vcpu
);
1935 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
1937 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
1939 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1940 return kvm_emulate_as_nop(vcpu
);
1942 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
1944 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
1946 kvm_queue_exception(vcpu
, UD_VECTOR
);
1949 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
1951 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
1953 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1954 return kvm_emulate_as_nop(vcpu
);
1956 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
1958 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
1960 xfer_to_guest_mode_prepare();
1961 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
1962 xfer_to_guest_mode_work_pending();
1966 * The fast path for frequent and performance sensitive wrmsr emulation,
1967 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1968 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1969 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1970 * other cases which must be called after interrupts are enabled on the host.
1972 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1974 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1977 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1978 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1979 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1980 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1983 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1984 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1985 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1986 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1993 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
1995 if (!kvm_can_use_hv_timer(vcpu
))
1998 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2002 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
2004 u32 msr
= kvm_rcx_read(vcpu
);
2006 fastpath_t ret
= EXIT_FASTPATH_NONE
;
2009 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
2010 data
= kvm_read_edx_eax(vcpu
);
2011 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
2012 kvm_skip_emulated_instruction(vcpu
);
2013 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
2016 case MSR_IA32_TSC_DEADLINE
:
2017 data
= kvm_read_edx_eax(vcpu
);
2018 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
2019 kvm_skip_emulated_instruction(vcpu
);
2020 ret
= EXIT_FASTPATH_REENTER_GUEST
;
2027 if (ret
!= EXIT_FASTPATH_NONE
)
2028 trace_kvm_msr_write(msr
, data
);
2032 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
2035 * Adapt set_msr() to msr_io()'s calling convention
2037 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2039 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
2042 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2044 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2047 #ifdef CONFIG_X86_64
2048 struct pvclock_clock
{
2058 struct pvclock_gtod_data
{
2061 struct pvclock_clock clock
; /* extract of a clocksource struct */
2062 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2068 static struct pvclock_gtod_data pvclock_gtod_data
;
2070 static void update_pvclock_gtod(struct timekeeper
*tk
)
2072 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2074 write_seqcount_begin(&vdata
->seq
);
2076 /* copy pvclock gtod data */
2077 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2078 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2079 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2080 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2081 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2082 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2083 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2085 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2086 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2087 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2088 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2089 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2090 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2091 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2093 vdata
->wall_time_sec
= tk
->xtime_sec
;
2095 vdata
->offs_boot
= tk
->offs_boot
;
2097 write_seqcount_end(&vdata
->seq
);
2100 static s64
get_kvmclock_base_ns(void)
2102 /* Count up from boot time, but with the frequency of the raw clock. */
2103 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2106 static s64
get_kvmclock_base_ns(void)
2108 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2109 return ktime_get_boottime_ns();
2113 void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2117 struct pvclock_wall_clock wc
;
2124 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2129 ++version
; /* first time write, random junk */
2133 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2137 * The guest calculates current wall clock time by adding
2138 * system time (updated by kvm_guest_time_update below) to the
2139 * wall clock specified here. We do the reverse here.
2141 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
2143 wc
.nsec
= do_div(wall_nsec
, 1000000000);
2144 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2145 wc
.version
= version
;
2147 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2150 wc_sec_hi
= wall_nsec
>> 32;
2151 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2152 &wc_sec_hi
, sizeof(wc_sec_hi
));
2156 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2159 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2160 bool old_msr
, bool host_initiated
)
2162 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2164 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2165 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2166 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2168 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2171 vcpu
->arch
.time
= system_time
;
2172 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2174 /* we verify if the enable bit is set... */
2175 vcpu
->arch
.pv_time_enabled
= false;
2176 if (!(system_time
& 1))
2179 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2180 &vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2181 sizeof(struct pvclock_vcpu_time_info
)))
2182 vcpu
->arch
.pv_time_enabled
= true;
2187 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2189 do_shl32_div32(dividend
, divisor
);
2193 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2194 s8
*pshift
, u32
*pmultiplier
)
2202 scaled64
= scaled_hz
;
2203 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2208 tps32
= (uint32_t)tps64
;
2209 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2210 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2218 *pmultiplier
= div_frac(scaled64
, tps32
);
2221 #ifdef CONFIG_X86_64
2222 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2225 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2226 static unsigned long max_tsc_khz
;
2228 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2230 u64 v
= (u64
)khz
* (1000000 + ppm
);
2235 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
);
2237 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2241 /* Guest TSC same frequency as host TSC? */
2243 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2247 /* TSC scaling supported? */
2248 if (!kvm_has_tsc_control
) {
2249 if (user_tsc_khz
> tsc_khz
) {
2250 vcpu
->arch
.tsc_catchup
= 1;
2251 vcpu
->arch
.tsc_always_catchup
= 1;
2254 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2259 /* TSC scaling required - calculate ratio */
2260 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2261 user_tsc_khz
, tsc_khz
);
2263 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2264 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2269 kvm_vcpu_write_tsc_multiplier(vcpu
, ratio
);
2273 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2275 u32 thresh_lo
, thresh_hi
;
2276 int use_scaling
= 0;
2278 /* tsc_khz can be zero if TSC calibration fails */
2279 if (user_tsc_khz
== 0) {
2280 /* set tsc_scaling_ratio to a safe value */
2281 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2285 /* Compute a scale to convert nanoseconds in TSC cycles */
2286 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2287 &vcpu
->arch
.virtual_tsc_shift
,
2288 &vcpu
->arch
.virtual_tsc_mult
);
2289 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2292 * Compute the variation in TSC rate which is acceptable
2293 * within the range of tolerance and decide if the
2294 * rate being applied is within that bounds of the hardware
2295 * rate. If so, no scaling or compensation need be done.
2297 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2298 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2299 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2300 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2303 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2306 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2308 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2309 vcpu
->arch
.virtual_tsc_mult
,
2310 vcpu
->arch
.virtual_tsc_shift
);
2311 tsc
+= vcpu
->arch
.this_tsc_write
;
2315 static inline int gtod_is_based_on_tsc(int mode
)
2317 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2320 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2322 #ifdef CONFIG_X86_64
2324 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2325 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2327 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2328 atomic_read(&vcpu
->kvm
->online_vcpus
));
2331 * Once the masterclock is enabled, always perform request in
2332 * order to update it.
2334 * In order to enable masterclock, the host clocksource must be TSC
2335 * and the vcpus need to have matched TSCs. When that happens,
2336 * perform request to enable masterclock.
2338 if (ka
->use_master_clock
||
2339 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2340 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2342 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2343 atomic_read(&vcpu
->kvm
->online_vcpus
),
2344 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2349 * Multiply tsc by a fixed point number represented by ratio.
2351 * The most significant 64-N bits (mult) of ratio represent the
2352 * integral part of the fixed point number; the remaining N bits
2353 * (frac) represent the fractional part, ie. ratio represents a fixed
2354 * point number (mult + frac * 2^(-N)).
2356 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2358 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2360 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2363 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
, u64 ratio
)
2367 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2368 _tsc
= __scale_tsc(ratio
, tsc
);
2372 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2374 static u64
kvm_compute_l1_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2378 tsc
= kvm_scale_tsc(vcpu
, rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
);
2380 return target_tsc
- tsc
;
2383 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2385 return vcpu
->arch
.l1_tsc_offset
+
2386 kvm_scale_tsc(vcpu
, host_tsc
, vcpu
->arch
.l1_tsc_scaling_ratio
);
2388 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2390 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
)
2394 if (l2_multiplier
== kvm_default_tsc_scaling_ratio
)
2395 nested_offset
= l1_offset
;
2397 nested_offset
= mul_s64_u64_shr((s64
) l1_offset
, l2_multiplier
,
2398 kvm_tsc_scaling_ratio_frac_bits
);
2400 nested_offset
+= l2_offset
;
2401 return nested_offset
;
2403 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset
);
2405 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
)
2407 if (l2_multiplier
!= kvm_default_tsc_scaling_ratio
)
2408 return mul_u64_u64_shr(l1_multiplier
, l2_multiplier
,
2409 kvm_tsc_scaling_ratio_frac_bits
);
2411 return l1_multiplier
;
2413 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier
);
2415 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 l1_offset
)
2417 trace_kvm_write_tsc_offset(vcpu
->vcpu_id
,
2418 vcpu
->arch
.l1_tsc_offset
,
2421 vcpu
->arch
.l1_tsc_offset
= l1_offset
;
2424 * If we are here because L1 chose not to trap WRMSR to TSC then
2425 * according to the spec this should set L1's TSC (as opposed to
2426 * setting L1's offset for L2).
2428 if (is_guest_mode(vcpu
))
2429 vcpu
->arch
.tsc_offset
= kvm_calc_nested_tsc_offset(
2431 static_call(kvm_x86_get_l2_tsc_offset
)(vcpu
),
2432 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2434 vcpu
->arch
.tsc_offset
= l1_offset
;
2436 static_call(kvm_x86_write_tsc_offset
)(vcpu
, vcpu
->arch
.tsc_offset
);
2439 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
)
2441 vcpu
->arch
.l1_tsc_scaling_ratio
= l1_multiplier
;
2443 /* Userspace is changing the multiplier while L2 is active */
2444 if (is_guest_mode(vcpu
))
2445 vcpu
->arch
.tsc_scaling_ratio
= kvm_calc_nested_tsc_multiplier(
2447 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2449 vcpu
->arch
.tsc_scaling_ratio
= l1_multiplier
;
2451 if (kvm_has_tsc_control
)
2452 static_call(kvm_x86_write_tsc_multiplier
)(
2453 vcpu
, vcpu
->arch
.tsc_scaling_ratio
);
2456 static inline bool kvm_check_tsc_unstable(void)
2458 #ifdef CONFIG_X86_64
2460 * TSC is marked unstable when we're running on Hyper-V,
2461 * 'TSC page' clocksource is good.
2463 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2466 return check_tsc_unstable();
2469 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2471 struct kvm
*kvm
= vcpu
->kvm
;
2472 u64 offset
, ns
, elapsed
;
2473 unsigned long flags
;
2475 bool already_matched
;
2476 bool synchronizing
= false;
2478 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2479 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2480 ns
= get_kvmclock_base_ns();
2481 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2483 if (vcpu
->arch
.virtual_tsc_khz
) {
2486 * detection of vcpu initialization -- need to sync
2487 * with other vCPUs. This particularly helps to keep
2488 * kvm_clock stable after CPU hotplug
2490 synchronizing
= true;
2492 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2493 nsec_to_cycles(vcpu
, elapsed
);
2494 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2496 * Special case: TSC write with a small delta (1 second)
2497 * of virtual cycle time against real time is
2498 * interpreted as an attempt to synchronize the CPU.
2500 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2501 data
+ tsc_hz
> tsc_exp
;
2506 * For a reliable TSC, we can match TSC offsets, and for an unstable
2507 * TSC, we add elapsed time in this computation. We could let the
2508 * compensation code attempt to catch up if we fall behind, but
2509 * it's better to try to match offsets from the beginning.
2511 if (synchronizing
&&
2512 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2513 if (!kvm_check_tsc_unstable()) {
2514 offset
= kvm
->arch
.cur_tsc_offset
;
2516 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2518 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2521 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2524 * We split periods of matched TSC writes into generations.
2525 * For each generation, we track the original measured
2526 * nanosecond time, offset, and write, so if TSCs are in
2527 * sync, we can match exact offset, and if not, we can match
2528 * exact software computation in compute_guest_tsc()
2530 * These values are tracked in kvm->arch.cur_xxx variables.
2532 kvm
->arch
.cur_tsc_generation
++;
2533 kvm
->arch
.cur_tsc_nsec
= ns
;
2534 kvm
->arch
.cur_tsc_write
= data
;
2535 kvm
->arch
.cur_tsc_offset
= offset
;
2540 * We also track th most recent recorded KHZ, write and time to
2541 * allow the matching interval to be extended at each write.
2543 kvm
->arch
.last_tsc_nsec
= ns
;
2544 kvm
->arch
.last_tsc_write
= data
;
2545 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2547 vcpu
->arch
.last_guest_tsc
= data
;
2549 /* Keep track of which generation this VCPU has synchronized to */
2550 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2551 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2552 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2554 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2555 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2557 raw_spin_lock_irqsave(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2559 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2560 } else if (!already_matched
) {
2561 kvm
->arch
.nr_vcpus_matched_tsc
++;
2564 kvm_track_tsc_matching(vcpu
);
2565 raw_spin_unlock_irqrestore(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2568 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2571 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2572 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2575 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2577 if (vcpu
->arch
.l1_tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2578 WARN_ON(adjustment
< 0);
2579 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
,
2580 vcpu
->arch
.l1_tsc_scaling_ratio
);
2581 adjust_tsc_offset_guest(vcpu
, adjustment
);
2584 #ifdef CONFIG_X86_64
2586 static u64
read_tsc(void)
2588 u64 ret
= (u64
)rdtsc_ordered();
2589 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2591 if (likely(ret
>= last
))
2595 * GCC likes to generate cmov here, but this branch is extremely
2596 * predictable (it's just a function of time and the likely is
2597 * very likely) and there's a data dependence, so force GCC
2598 * to generate a branch instead. I don't barrier() because
2599 * we don't actually need a barrier, and if this function
2600 * ever gets inlined it will generate worse code.
2606 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2612 switch (clock
->vclock_mode
) {
2613 case VDSO_CLOCKMODE_HVCLOCK
:
2614 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2616 if (tsc_pg_val
!= U64_MAX
) {
2617 /* TSC page valid */
2618 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2619 v
= (tsc_pg_val
- clock
->cycle_last
) &
2622 /* TSC page invalid */
2623 *mode
= VDSO_CLOCKMODE_NONE
;
2626 case VDSO_CLOCKMODE_TSC
:
2627 *mode
= VDSO_CLOCKMODE_TSC
;
2628 *tsc_timestamp
= read_tsc();
2629 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2633 *mode
= VDSO_CLOCKMODE_NONE
;
2636 if (*mode
== VDSO_CLOCKMODE_NONE
)
2637 *tsc_timestamp
= v
= 0;
2639 return v
* clock
->mult
;
2642 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2644 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2650 seq
= read_seqcount_begin(>od
->seq
);
2651 ns
= gtod
->raw_clock
.base_cycles
;
2652 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2653 ns
>>= gtod
->raw_clock
.shift
;
2654 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2655 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2661 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2663 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2669 seq
= read_seqcount_begin(>od
->seq
);
2670 ts
->tv_sec
= gtod
->wall_time_sec
;
2671 ns
= gtod
->clock
.base_cycles
;
2672 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2673 ns
>>= gtod
->clock
.shift
;
2674 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2676 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2682 /* returns true if host is using TSC based clocksource */
2683 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2685 /* checked again under seqlock below */
2686 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2689 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2693 /* returns true if host is using TSC based clocksource */
2694 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2697 /* checked again under seqlock below */
2698 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2701 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2707 * Assuming a stable TSC across physical CPUS, and a stable TSC
2708 * across virtual CPUs, the following condition is possible.
2709 * Each numbered line represents an event visible to both
2710 * CPUs at the next numbered event.
2712 * "timespecX" represents host monotonic time. "tscX" represents
2715 * VCPU0 on CPU0 | VCPU1 on CPU1
2717 * 1. read timespec0,tsc0
2718 * 2. | timespec1 = timespec0 + N
2720 * 3. transition to guest | transition to guest
2721 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2722 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2723 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2725 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2728 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2730 * - 0 < N - M => M < N
2732 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2733 * always the case (the difference between two distinct xtime instances
2734 * might be smaller then the difference between corresponding TSC reads,
2735 * when updating guest vcpus pvclock areas).
2737 * To avoid that problem, do not allow visibility of distinct
2738 * system_timestamp/tsc_timestamp values simultaneously: use a master
2739 * copy of host monotonic time values. Update that master copy
2742 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2746 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2748 #ifdef CONFIG_X86_64
2749 struct kvm_arch
*ka
= &kvm
->arch
;
2751 bool host_tsc_clocksource
, vcpus_matched
;
2753 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2754 atomic_read(&kvm
->online_vcpus
));
2757 * If the host uses TSC clock, then passthrough TSC as stable
2760 host_tsc_clocksource
= kvm_get_time_and_clockread(
2761 &ka
->master_kernel_ns
,
2762 &ka
->master_cycle_now
);
2764 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2765 && !ka
->backwards_tsc_observed
2766 && !ka
->boot_vcpu_runs_old_kvmclock
;
2768 if (ka
->use_master_clock
)
2769 atomic_set(&kvm_guest_has_master_clock
, 1);
2771 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2772 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2777 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2779 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2782 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2784 #ifdef CONFIG_X86_64
2786 struct kvm_vcpu
*vcpu
;
2787 struct kvm_arch
*ka
= &kvm
->arch
;
2788 unsigned long flags
;
2790 kvm_hv_invalidate_tsc_page(kvm
);
2792 kvm_make_mclock_inprogress_request(kvm
);
2794 /* no guest entries from this point */
2795 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2796 pvclock_update_vm_gtod_copy(kvm
);
2797 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2799 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2800 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2802 /* guest entries allowed */
2803 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2804 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2808 u64
get_kvmclock_ns(struct kvm
*kvm
)
2810 struct kvm_arch
*ka
= &kvm
->arch
;
2811 struct pvclock_vcpu_time_info hv_clock
;
2812 unsigned long flags
;
2815 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2816 if (!ka
->use_master_clock
) {
2817 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2818 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2821 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2822 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2823 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2825 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2828 if (__this_cpu_read(cpu_tsc_khz
)) {
2829 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2830 &hv_clock
.tsc_shift
,
2831 &hv_clock
.tsc_to_system_mul
);
2832 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2834 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2841 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
,
2842 struct gfn_to_hva_cache
*cache
,
2843 unsigned int offset
)
2845 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2846 struct pvclock_vcpu_time_info guest_hv_clock
;
2848 if (unlikely(kvm_read_guest_offset_cached(v
->kvm
, cache
,
2849 &guest_hv_clock
, offset
, sizeof(guest_hv_clock
))))
2852 /* This VCPU is paused, but it's legal for a guest to read another
2853 * VCPU's kvmclock, so we really have to follow the specification where
2854 * it says that version is odd if data is being modified, and even after
2857 * Version field updates must be kept separate. This is because
2858 * kvm_write_guest_cached might use a "rep movs" instruction, and
2859 * writes within a string instruction are weakly ordered. So there
2860 * are three writes overall.
2862 * As a small optimization, only write the version field in the first
2863 * and third write. The vcpu->pv_time cache is still valid, because the
2864 * version field is the first in the struct.
2866 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2868 if (guest_hv_clock
.version
& 1)
2869 ++guest_hv_clock
.version
; /* first time write, random junk */
2871 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2872 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2873 &vcpu
->hv_clock
, offset
,
2874 sizeof(vcpu
->hv_clock
.version
));
2878 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2879 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2881 if (vcpu
->pvclock_set_guest_stopped_request
) {
2882 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2883 vcpu
->pvclock_set_guest_stopped_request
= false;
2886 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2888 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2889 &vcpu
->hv_clock
, offset
,
2890 sizeof(vcpu
->hv_clock
));
2894 vcpu
->hv_clock
.version
++;
2895 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2896 &vcpu
->hv_clock
, offset
,
2897 sizeof(vcpu
->hv_clock
.version
));
2900 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2902 unsigned long flags
, tgt_tsc_khz
;
2903 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2904 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2906 u64 tsc_timestamp
, host_tsc
;
2908 bool use_master_clock
;
2914 * If the host uses TSC clock, then passthrough TSC as stable
2917 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2918 use_master_clock
= ka
->use_master_clock
;
2919 if (use_master_clock
) {
2920 host_tsc
= ka
->master_cycle_now
;
2921 kernel_ns
= ka
->master_kernel_ns
;
2923 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2925 /* Keep irq disabled to prevent changes to the clock */
2926 local_irq_save(flags
);
2927 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2928 if (unlikely(tgt_tsc_khz
== 0)) {
2929 local_irq_restore(flags
);
2930 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2933 if (!use_master_clock
) {
2935 kernel_ns
= get_kvmclock_base_ns();
2938 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2941 * We may have to catch up the TSC to match elapsed wall clock
2942 * time for two reasons, even if kvmclock is used.
2943 * 1) CPU could have been running below the maximum TSC rate
2944 * 2) Broken TSC compensation resets the base at each VCPU
2945 * entry to avoid unknown leaps of TSC even when running
2946 * again on the same CPU. This may cause apparent elapsed
2947 * time to disappear, and the guest to stand still or run
2950 if (vcpu
->tsc_catchup
) {
2951 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2952 if (tsc
> tsc_timestamp
) {
2953 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2954 tsc_timestamp
= tsc
;
2958 local_irq_restore(flags
);
2960 /* With all the info we got, fill in the values */
2962 if (kvm_has_tsc_control
)
2963 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
,
2964 v
->arch
.l1_tsc_scaling_ratio
);
2966 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2967 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2968 &vcpu
->hv_clock
.tsc_shift
,
2969 &vcpu
->hv_clock
.tsc_to_system_mul
);
2970 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2973 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2974 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2975 vcpu
->last_guest_tsc
= tsc_timestamp
;
2977 /* If the host uses TSC clocksource, then it is stable */
2979 if (use_master_clock
)
2980 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2982 vcpu
->hv_clock
.flags
= pvclock_flags
;
2984 if (vcpu
->pv_time_enabled
)
2985 kvm_setup_pvclock_page(v
, &vcpu
->pv_time
, 0);
2986 if (vcpu
->xen
.vcpu_info_set
)
2987 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_info_cache
,
2988 offsetof(struct compat_vcpu_info
, time
));
2989 if (vcpu
->xen
.vcpu_time_info_set
)
2990 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0);
2992 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2997 * kvmclock updates which are isolated to a given vcpu, such as
2998 * vcpu->cpu migration, should not allow system_timestamp from
2999 * the rest of the vcpus to remain static. Otherwise ntp frequency
3000 * correction applies to one vcpu's system_timestamp but not
3003 * So in those cases, request a kvmclock update for all vcpus.
3004 * We need to rate-limit these requests though, as they can
3005 * considerably slow guests that have a large number of vcpus.
3006 * The time for a remote vcpu to update its kvmclock is bound
3007 * by the delay we use to rate-limit the updates.
3010 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3012 static void kvmclock_update_fn(struct work_struct
*work
)
3015 struct delayed_work
*dwork
= to_delayed_work(work
);
3016 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3017 kvmclock_update_work
);
3018 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3019 struct kvm_vcpu
*vcpu
;
3021 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3022 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3023 kvm_vcpu_kick(vcpu
);
3027 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
3029 struct kvm
*kvm
= v
->kvm
;
3031 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3032 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
3033 KVMCLOCK_UPDATE_DELAY
);
3036 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3038 static void kvmclock_sync_fn(struct work_struct
*work
)
3040 struct delayed_work
*dwork
= to_delayed_work(work
);
3041 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3042 kvmclock_sync_work
);
3043 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3045 if (!kvmclock_periodic_sync
)
3048 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
3049 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
3050 KVMCLOCK_SYNC_PERIOD
);
3054 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3056 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
3058 /* McStatusWrEn enabled? */
3059 if (guest_cpuid_is_amd_or_hygon(vcpu
))
3060 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
3065 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3067 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3068 unsigned bank_num
= mcg_cap
& 0xff;
3069 u32 msr
= msr_info
->index
;
3070 u64 data
= msr_info
->data
;
3073 case MSR_IA32_MCG_STATUS
:
3074 vcpu
->arch
.mcg_status
= data
;
3076 case MSR_IA32_MCG_CTL
:
3077 if (!(mcg_cap
& MCG_CTL_P
) &&
3078 (data
|| !msr_info
->host_initiated
))
3080 if (data
!= 0 && data
!= ~(u64
)0)
3082 vcpu
->arch
.mcg_ctl
= data
;
3085 if (msr
>= MSR_IA32_MC0_CTL
&&
3086 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3087 u32 offset
= array_index_nospec(
3088 msr
- MSR_IA32_MC0_CTL
,
3089 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3091 /* only 0 or all 1s can be written to IA32_MCi_CTL
3092 * some Linux kernels though clear bit 10 in bank 4 to
3093 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3094 * this to avoid an uncatched #GP in the guest
3096 if ((offset
& 0x3) == 0 &&
3097 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
3101 if (!msr_info
->host_initiated
&&
3102 (offset
& 0x3) == 1 && data
!= 0) {
3103 if (!can_set_mci_status(vcpu
))
3107 vcpu
->arch
.mce_banks
[offset
] = data
;
3115 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3117 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3119 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3122 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3124 gpa_t gpa
= data
& ~0x3f;
3126 /* Bits 4:5 are reserved, Should be zero */
3130 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3131 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3134 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3135 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3138 if (!lapic_in_kernel(vcpu
))
3139 return data
? 1 : 0;
3141 vcpu
->arch
.apf
.msr_en_val
= data
;
3143 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3144 kvm_clear_async_pf_completion_queue(vcpu
);
3145 kvm_async_pf_hash_reset(vcpu
);
3149 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3153 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3154 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3156 kvm_async_pf_wakeup_all(vcpu
);
3161 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3163 /* Bits 8-63 are reserved */
3167 if (!lapic_in_kernel(vcpu
))
3170 vcpu
->arch
.apf
.msr_int_val
= data
;
3172 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3177 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3179 vcpu
->arch
.pv_time_enabled
= false;
3180 vcpu
->arch
.time
= 0;
3183 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3185 ++vcpu
->stat
.tlb_flush
;
3186 static_call(kvm_x86_tlb_flush_all
)(vcpu
);
3189 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3191 ++vcpu
->stat
.tlb_flush
;
3195 * A TLB flush on behalf of the guest is equivalent to
3196 * INVPCID(all), toggling CR4.PGE, etc., which requires
3197 * a forced sync of the shadow page tables. Unload the
3198 * entire MMU here and the subsequent load will sync the
3199 * shadow page tables, and also flush the TLB.
3201 kvm_mmu_unload(vcpu
);
3205 static_call(kvm_x86_tlb_flush_guest
)(vcpu
);
3209 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu
*vcpu
)
3211 ++vcpu
->stat
.tlb_flush
;
3212 static_call(kvm_x86_tlb_flush_current
)(vcpu
);
3216 * Service "local" TLB flush requests, which are specific to the current MMU
3217 * context. In addition to the generic event handling in vcpu_enter_guest(),
3218 * TLB flushes that are targeted at an MMU context also need to be serviced
3219 * prior before nested VM-Enter/VM-Exit.
3221 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu
*vcpu
)
3223 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
3224 kvm_vcpu_flush_tlb_current(vcpu
);
3226 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
3227 kvm_vcpu_flush_tlb_guest(vcpu
);
3229 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests
);
3231 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3233 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3234 struct kvm_steal_time __user
*st
;
3235 struct kvm_memslots
*slots
;
3239 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3240 kvm_xen_runstate_set_running(vcpu
);
3244 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3247 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3250 slots
= kvm_memslots(vcpu
->kvm
);
3252 if (unlikely(slots
->generation
!= ghc
->generation
||
3253 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3254 gfn_t gfn
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3256 /* We rely on the fact that it fits in a single page. */
3257 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3259 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gfn
, sizeof(*st
)) ||
3260 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3264 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3266 * Doing a TLB flush here, on the guest's behalf, can avoid
3269 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3270 u8 st_preempted
= 0;
3273 if (!user_access_begin(st
, sizeof(*st
)))
3276 asm volatile("1: xchgb %0, %2\n"
3279 _ASM_EXTABLE_UA(1b
, 2b
)
3280 : "+q" (st_preempted
),
3282 "+m" (st
->preempted
));
3288 vcpu
->arch
.st
.preempted
= 0;
3290 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3291 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3292 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3293 kvm_vcpu_flush_tlb_guest(vcpu
);
3295 if (!user_access_begin(st
, sizeof(*st
)))
3298 if (!user_access_begin(st
, sizeof(*st
)))
3301 unsafe_put_user(0, &st
->preempted
, out
);
3302 vcpu
->arch
.st
.preempted
= 0;
3305 unsafe_get_user(version
, &st
->version
, out
);
3307 version
+= 1; /* first time write, random junk */
3310 unsafe_put_user(version
, &st
->version
, out
);
3314 unsafe_get_user(steal
, &st
->steal
, out
);
3315 steal
+= current
->sched_info
.run_delay
-
3316 vcpu
->arch
.st
.last_steal
;
3317 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3318 unsafe_put_user(steal
, &st
->steal
, out
);
3321 unsafe_put_user(version
, &st
->version
, out
);
3326 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3329 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3332 u32 msr
= msr_info
->index
;
3333 u64 data
= msr_info
->data
;
3335 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3336 return kvm_xen_write_hypercall_page(vcpu
, data
);
3339 case MSR_AMD64_NB_CFG
:
3340 case MSR_IA32_UCODE_WRITE
:
3341 case MSR_VM_HSAVE_PA
:
3342 case MSR_AMD64_PATCH_LOADER
:
3343 case MSR_AMD64_BU_CFG2
:
3344 case MSR_AMD64_DC_CFG
:
3345 case MSR_F15H_EX_CFG
:
3348 case MSR_IA32_UCODE_REV
:
3349 if (msr_info
->host_initiated
)
3350 vcpu
->arch
.microcode_version
= data
;
3352 case MSR_IA32_ARCH_CAPABILITIES
:
3353 if (!msr_info
->host_initiated
)
3355 vcpu
->arch
.arch_capabilities
= data
;
3357 case MSR_IA32_PERF_CAPABILITIES
: {
3358 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3360 if (!msr_info
->host_initiated
)
3362 if (kvm_get_msr_feature(&msr_ent
))
3364 if (data
& ~msr_ent
.data
)
3367 vcpu
->arch
.perf_capabilities
= data
;
3372 return set_efer(vcpu
, msr_info
);
3374 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3375 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3376 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3378 /* Handle McStatusWrEn */
3379 if (data
== BIT_ULL(18)) {
3380 vcpu
->arch
.msr_hwcr
= data
;
3381 } else if (data
!= 0) {
3382 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3387 case MSR_FAM10H_MMIO_CONF_BASE
:
3389 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3394 case 0x200 ... 0x2ff:
3395 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3396 case MSR_IA32_APICBASE
:
3397 return kvm_set_apic_base(vcpu
, msr_info
);
3398 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3399 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3400 case MSR_IA32_TSC_DEADLINE
:
3401 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3403 case MSR_IA32_TSC_ADJUST
:
3404 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3405 if (!msr_info
->host_initiated
) {
3406 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3407 adjust_tsc_offset_guest(vcpu
, adj
);
3408 /* Before back to guest, tsc_timestamp must be adjusted
3409 * as well, otherwise guest's percpu pvclock time could jump.
3411 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3413 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3416 case MSR_IA32_MISC_ENABLE
:
3417 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3418 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3419 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3421 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3422 kvm_update_cpuid_runtime(vcpu
);
3424 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3427 case MSR_IA32_SMBASE
:
3428 if (!msr_info
->host_initiated
)
3430 vcpu
->arch
.smbase
= data
;
3432 case MSR_IA32_POWER_CTL
:
3433 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3436 if (msr_info
->host_initiated
) {
3437 kvm_synchronize_tsc(vcpu
, data
);
3439 u64 adj
= kvm_compute_l1_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3440 adjust_tsc_offset_guest(vcpu
, adj
);
3441 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3445 if (!msr_info
->host_initiated
&&
3446 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3449 * KVM supports exposing PT to the guest, but does not support
3450 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3451 * XSAVES/XRSTORS to save/restore PT MSRs.
3453 if (data
& ~supported_xss
)
3455 vcpu
->arch
.ia32_xss
= data
;
3456 kvm_update_cpuid_runtime(vcpu
);
3459 if (!msr_info
->host_initiated
)
3461 vcpu
->arch
.smi_count
= data
;
3463 case MSR_KVM_WALL_CLOCK_NEW
:
3464 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3467 vcpu
->kvm
->arch
.wall_clock
= data
;
3468 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3470 case MSR_KVM_WALL_CLOCK
:
3471 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3474 vcpu
->kvm
->arch
.wall_clock
= data
;
3475 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3477 case MSR_KVM_SYSTEM_TIME_NEW
:
3478 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3481 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3483 case MSR_KVM_SYSTEM_TIME
:
3484 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3487 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3489 case MSR_KVM_ASYNC_PF_EN
:
3490 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3493 if (kvm_pv_enable_async_pf(vcpu
, data
))
3496 case MSR_KVM_ASYNC_PF_INT
:
3497 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3500 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3503 case MSR_KVM_ASYNC_PF_ACK
:
3504 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3507 vcpu
->arch
.apf
.pageready_pending
= false;
3508 kvm_check_async_pf_completion(vcpu
);
3511 case MSR_KVM_STEAL_TIME
:
3512 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3515 if (unlikely(!sched_info_on()))
3518 if (data
& KVM_STEAL_RESERVED_MASK
)
3521 vcpu
->arch
.st
.msr_val
= data
;
3523 if (!(data
& KVM_MSR_ENABLED
))
3526 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3529 case MSR_KVM_PV_EOI_EN
:
3530 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3533 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
3537 case MSR_KVM_POLL_CONTROL
:
3538 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3541 /* only enable bit supported */
3542 if (data
& (-1ULL << 1))
3545 vcpu
->arch
.msr_kvm_poll_control
= data
;
3548 case MSR_IA32_MCG_CTL
:
3549 case MSR_IA32_MCG_STATUS
:
3550 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3551 return set_msr_mce(vcpu
, msr_info
);
3553 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3554 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3557 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3558 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3559 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3560 return kvm_pmu_set_msr(vcpu
, msr_info
);
3562 if (pr
|| data
!= 0)
3563 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3564 "0x%x data 0x%llx\n", msr
, data
);
3566 case MSR_K7_CLK_CTL
:
3568 * Ignore all writes to this no longer documented MSR.
3569 * Writes are only relevant for old K7 processors,
3570 * all pre-dating SVM, but a recommended workaround from
3571 * AMD for these chips. It is possible to specify the
3572 * affected processor models on the command line, hence
3573 * the need to ignore the workaround.
3576 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3577 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3578 case HV_X64_MSR_SYNDBG_OPTIONS
:
3579 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3580 case HV_X64_MSR_CRASH_CTL
:
3581 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3582 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3583 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3584 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3585 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3586 msr_info
->host_initiated
);
3587 case MSR_IA32_BBL_CR_CTL3
:
3588 /* Drop writes to this legacy MSR -- see rdmsr
3589 * counterpart for further detail.
3591 if (report_ignored_msrs
)
3592 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3595 case MSR_AMD64_OSVW_ID_LENGTH
:
3596 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3598 vcpu
->arch
.osvw
.length
= data
;
3600 case MSR_AMD64_OSVW_STATUS
:
3601 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3603 vcpu
->arch
.osvw
.status
= data
;
3605 case MSR_PLATFORM_INFO
:
3606 if (!msr_info
->host_initiated
||
3607 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3608 cpuid_fault_enabled(vcpu
)))
3610 vcpu
->arch
.msr_platform_info
= data
;
3612 case MSR_MISC_FEATURES_ENABLES
:
3613 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3614 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3615 !supports_cpuid_fault(vcpu
)))
3617 vcpu
->arch
.msr_misc_features_enables
= data
;
3620 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3621 return kvm_pmu_set_msr(vcpu
, msr_info
);
3622 return KVM_MSR_RET_INVALID
;
3626 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3628 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3631 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3632 unsigned bank_num
= mcg_cap
& 0xff;
3635 case MSR_IA32_P5_MC_ADDR
:
3636 case MSR_IA32_P5_MC_TYPE
:
3639 case MSR_IA32_MCG_CAP
:
3640 data
= vcpu
->arch
.mcg_cap
;
3642 case MSR_IA32_MCG_CTL
:
3643 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3645 data
= vcpu
->arch
.mcg_ctl
;
3647 case MSR_IA32_MCG_STATUS
:
3648 data
= vcpu
->arch
.mcg_status
;
3651 if (msr
>= MSR_IA32_MC0_CTL
&&
3652 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3653 u32 offset
= array_index_nospec(
3654 msr
- MSR_IA32_MC0_CTL
,
3655 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3657 data
= vcpu
->arch
.mce_banks
[offset
];
3666 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3668 switch (msr_info
->index
) {
3669 case MSR_IA32_PLATFORM_ID
:
3670 case MSR_IA32_EBL_CR_POWERON
:
3671 case MSR_IA32_LASTBRANCHFROMIP
:
3672 case MSR_IA32_LASTBRANCHTOIP
:
3673 case MSR_IA32_LASTINTFROMIP
:
3674 case MSR_IA32_LASTINTTOIP
:
3675 case MSR_AMD64_SYSCFG
:
3676 case MSR_K8_TSEG_ADDR
:
3677 case MSR_K8_TSEG_MASK
:
3678 case MSR_VM_HSAVE_PA
:
3679 case MSR_K8_INT_PENDING_MSG
:
3680 case MSR_AMD64_NB_CFG
:
3681 case MSR_FAM10H_MMIO_CONF_BASE
:
3682 case MSR_AMD64_BU_CFG2
:
3683 case MSR_IA32_PERF_CTL
:
3684 case MSR_AMD64_DC_CFG
:
3685 case MSR_F15H_EX_CFG
:
3687 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3688 * limit) MSRs. Just return 0, as we do not want to expose the host
3689 * data here. Do not conditionalize this on CPUID, as KVM does not do
3690 * so for existing CPU-specific MSRs.
3692 case MSR_RAPL_POWER_UNIT
:
3693 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3694 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3695 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3696 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3699 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3700 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3701 return kvm_pmu_get_msr(vcpu
, msr_info
);
3702 if (!msr_info
->host_initiated
)
3706 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3707 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3708 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3709 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3710 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3711 return kvm_pmu_get_msr(vcpu
, msr_info
);
3714 case MSR_IA32_UCODE_REV
:
3715 msr_info
->data
= vcpu
->arch
.microcode_version
;
3717 case MSR_IA32_ARCH_CAPABILITIES
:
3718 if (!msr_info
->host_initiated
&&
3719 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3721 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3723 case MSR_IA32_PERF_CAPABILITIES
:
3724 if (!msr_info
->host_initiated
&&
3725 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3727 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3729 case MSR_IA32_POWER_CTL
:
3730 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3732 case MSR_IA32_TSC
: {
3734 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3735 * even when not intercepted. AMD manual doesn't explicitly
3736 * state this but appears to behave the same.
3738 * On userspace reads and writes, however, we unconditionally
3739 * return L1's TSC value to ensure backwards-compatible
3740 * behavior for migration.
3744 if (msr_info
->host_initiated
) {
3745 offset
= vcpu
->arch
.l1_tsc_offset
;
3746 ratio
= vcpu
->arch
.l1_tsc_scaling_ratio
;
3748 offset
= vcpu
->arch
.tsc_offset
;
3749 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
3752 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc(), ratio
) + offset
;
3756 case 0x200 ... 0x2ff:
3757 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3758 case 0xcd: /* fsb frequency */
3762 * MSR_EBC_FREQUENCY_ID
3763 * Conservative value valid for even the basic CPU models.
3764 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3765 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3766 * and 266MHz for model 3, or 4. Set Core Clock
3767 * Frequency to System Bus Frequency Ratio to 1 (bits
3768 * 31:24) even though these are only valid for CPU
3769 * models > 2, however guests may end up dividing or
3770 * multiplying by zero otherwise.
3772 case MSR_EBC_FREQUENCY_ID
:
3773 msr_info
->data
= 1 << 24;
3775 case MSR_IA32_APICBASE
:
3776 msr_info
->data
= kvm_get_apic_base(vcpu
);
3778 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3779 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3780 case MSR_IA32_TSC_DEADLINE
:
3781 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3783 case MSR_IA32_TSC_ADJUST
:
3784 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3786 case MSR_IA32_MISC_ENABLE
:
3787 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3789 case MSR_IA32_SMBASE
:
3790 if (!msr_info
->host_initiated
)
3792 msr_info
->data
= vcpu
->arch
.smbase
;
3795 msr_info
->data
= vcpu
->arch
.smi_count
;
3797 case MSR_IA32_PERF_STATUS
:
3798 /* TSC increment by tick */
3799 msr_info
->data
= 1000ULL;
3800 /* CPU multiplier */
3801 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3804 msr_info
->data
= vcpu
->arch
.efer
;
3806 case MSR_KVM_WALL_CLOCK
:
3807 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3810 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3812 case MSR_KVM_WALL_CLOCK_NEW
:
3813 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3816 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3818 case MSR_KVM_SYSTEM_TIME
:
3819 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3822 msr_info
->data
= vcpu
->arch
.time
;
3824 case MSR_KVM_SYSTEM_TIME_NEW
:
3825 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3828 msr_info
->data
= vcpu
->arch
.time
;
3830 case MSR_KVM_ASYNC_PF_EN
:
3831 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3834 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
3836 case MSR_KVM_ASYNC_PF_INT
:
3837 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3840 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
3842 case MSR_KVM_ASYNC_PF_ACK
:
3843 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3848 case MSR_KVM_STEAL_TIME
:
3849 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3852 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3854 case MSR_KVM_PV_EOI_EN
:
3855 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3858 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3860 case MSR_KVM_POLL_CONTROL
:
3861 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3864 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3866 case MSR_IA32_P5_MC_ADDR
:
3867 case MSR_IA32_P5_MC_TYPE
:
3868 case MSR_IA32_MCG_CAP
:
3869 case MSR_IA32_MCG_CTL
:
3870 case MSR_IA32_MCG_STATUS
:
3871 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3872 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3873 msr_info
->host_initiated
);
3875 if (!msr_info
->host_initiated
&&
3876 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3878 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3880 case MSR_K7_CLK_CTL
:
3882 * Provide expected ramp-up count for K7. All other
3883 * are set to zero, indicating minimum divisors for
3886 * This prevents guest kernels on AMD host with CPU
3887 * type 6, model 8 and higher from exploding due to
3888 * the rdmsr failing.
3890 msr_info
->data
= 0x20000000;
3892 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3893 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3894 case HV_X64_MSR_SYNDBG_OPTIONS
:
3895 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3896 case HV_X64_MSR_CRASH_CTL
:
3897 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3898 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3899 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3900 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3901 return kvm_hv_get_msr_common(vcpu
,
3902 msr_info
->index
, &msr_info
->data
,
3903 msr_info
->host_initiated
);
3904 case MSR_IA32_BBL_CR_CTL3
:
3905 /* This legacy MSR exists but isn't fully documented in current
3906 * silicon. It is however accessed by winxp in very narrow
3907 * scenarios where it sets bit #19, itself documented as
3908 * a "reserved" bit. Best effort attempt to source coherent
3909 * read data here should the balance of the register be
3910 * interpreted by the guest:
3912 * L2 cache control register 3: 64GB range, 256KB size,
3913 * enabled, latency 0x1, configured
3915 msr_info
->data
= 0xbe702111;
3917 case MSR_AMD64_OSVW_ID_LENGTH
:
3918 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3920 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3922 case MSR_AMD64_OSVW_STATUS
:
3923 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3925 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3927 case MSR_PLATFORM_INFO
:
3928 if (!msr_info
->host_initiated
&&
3929 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3931 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3933 case MSR_MISC_FEATURES_ENABLES
:
3934 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3937 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3940 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3941 return kvm_pmu_get_msr(vcpu
, msr_info
);
3942 return KVM_MSR_RET_INVALID
;
3946 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3949 * Read or write a bunch of msrs. All parameters are kernel addresses.
3951 * @return number of msrs set successfully.
3953 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3954 struct kvm_msr_entry
*entries
,
3955 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3956 unsigned index
, u64
*data
))
3960 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3961 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3968 * Read or write a bunch of msrs. Parameters are user addresses.
3970 * @return number of msrs set successfully.
3972 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3973 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3974 unsigned index
, u64
*data
),
3977 struct kvm_msrs msrs
;
3978 struct kvm_msr_entry
*entries
;
3983 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3987 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3990 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3991 entries
= memdup_user(user_msrs
->entries
, size
);
3992 if (IS_ERR(entries
)) {
3993 r
= PTR_ERR(entries
);
3997 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
4002 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
4013 static inline bool kvm_can_mwait_in_guest(void)
4015 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
4016 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
4017 boot_cpu_has(X86_FEATURE_ARAT
);
4020 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
4021 struct kvm_cpuid2 __user
*cpuid_arg
)
4023 struct kvm_cpuid2 cpuid
;
4027 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4030 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4035 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4041 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
4046 case KVM_CAP_IRQCHIP
:
4048 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
4049 case KVM_CAP_SET_TSS_ADDR
:
4050 case KVM_CAP_EXT_CPUID
:
4051 case KVM_CAP_EXT_EMUL_CPUID
:
4052 case KVM_CAP_CLOCKSOURCE
:
4054 case KVM_CAP_NOP_IO_DELAY
:
4055 case KVM_CAP_MP_STATE
:
4056 case KVM_CAP_SYNC_MMU
:
4057 case KVM_CAP_USER_NMI
:
4058 case KVM_CAP_REINJECT_CONTROL
:
4059 case KVM_CAP_IRQ_INJECT_STATUS
:
4060 case KVM_CAP_IOEVENTFD
:
4061 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
4063 case KVM_CAP_PIT_STATE2
:
4064 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
4065 case KVM_CAP_VCPU_EVENTS
:
4066 case KVM_CAP_HYPERV
:
4067 case KVM_CAP_HYPERV_VAPIC
:
4068 case KVM_CAP_HYPERV_SPIN
:
4069 case KVM_CAP_HYPERV_SYNIC
:
4070 case KVM_CAP_HYPERV_SYNIC2
:
4071 case KVM_CAP_HYPERV_VP_INDEX
:
4072 case KVM_CAP_HYPERV_EVENTFD
:
4073 case KVM_CAP_HYPERV_TLBFLUSH
:
4074 case KVM_CAP_HYPERV_SEND_IPI
:
4075 case KVM_CAP_HYPERV_CPUID
:
4076 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4077 case KVM_CAP_SYS_HYPERV_CPUID
:
4078 case KVM_CAP_PCI_SEGMENT
:
4079 case KVM_CAP_DEBUGREGS
:
4080 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
4082 case KVM_CAP_ASYNC_PF
:
4083 case KVM_CAP_ASYNC_PF_INT
:
4084 case KVM_CAP_GET_TSC_KHZ
:
4085 case KVM_CAP_KVMCLOCK_CTRL
:
4086 case KVM_CAP_READONLY_MEM
:
4087 case KVM_CAP_HYPERV_TIME
:
4088 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
4089 case KVM_CAP_TSC_DEADLINE_TIMER
:
4090 case KVM_CAP_DISABLE_QUIRKS
:
4091 case KVM_CAP_SET_BOOT_CPU_ID
:
4092 case KVM_CAP_SPLIT_IRQCHIP
:
4093 case KVM_CAP_IMMEDIATE_EXIT
:
4094 case KVM_CAP_PMU_EVENT_FILTER
:
4095 case KVM_CAP_GET_MSR_FEATURES
:
4096 case KVM_CAP_MSR_PLATFORM_INFO
:
4097 case KVM_CAP_EXCEPTION_PAYLOAD
:
4098 case KVM_CAP_SET_GUEST_DEBUG
:
4099 case KVM_CAP_LAST_CPU
:
4100 case KVM_CAP_X86_USER_SPACE_MSR
:
4101 case KVM_CAP_X86_MSR_FILTER
:
4102 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4103 #ifdef CONFIG_X86_SGX_KVM
4104 case KVM_CAP_SGX_ATTRIBUTE
:
4106 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
4107 case KVM_CAP_SREGS2
:
4108 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
4111 case KVM_CAP_EXIT_HYPERCALL
:
4112 r
= KVM_EXIT_HYPERCALL_VALID_MASK
;
4114 case KVM_CAP_SET_GUEST_DEBUG2
:
4115 return KVM_GUESTDBG_VALID_MASK
;
4116 #ifdef CONFIG_KVM_XEN
4117 case KVM_CAP_XEN_HVM
:
4118 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
4119 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
4120 KVM_XEN_HVM_CONFIG_SHARED_INFO
;
4121 if (sched_info_on())
4122 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
;
4125 case KVM_CAP_SYNC_REGS
:
4126 r
= KVM_SYNC_X86_VALID_FIELDS
;
4128 case KVM_CAP_ADJUST_CLOCK
:
4129 r
= KVM_CLOCK_TSC_STABLE
;
4131 case KVM_CAP_X86_DISABLE_EXITS
:
4132 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
4133 KVM_X86_DISABLE_EXITS_CSTATE
;
4134 if(kvm_can_mwait_in_guest())
4135 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4137 case KVM_CAP_X86_SMM
:
4138 /* SMBASE is usually relocated above 1M on modern chipsets,
4139 * and SMM handlers might indeed rely on 4G segment limits,
4140 * so do not report SMM to be available if real mode is
4141 * emulated via vm86 mode. Still, do not go to great lengths
4142 * to avoid userspace's usage of the feature, because it is a
4143 * fringe case that is not enabled except via specific settings
4144 * of the module parameters.
4146 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4149 r
= !static_call(kvm_x86_cpu_has_accelerated_tpr
)();
4151 case KVM_CAP_NR_VCPUS
:
4152 r
= KVM_SOFT_MAX_VCPUS
;
4154 case KVM_CAP_MAX_VCPUS
:
4157 case KVM_CAP_MAX_VCPU_ID
:
4158 r
= KVM_MAX_VCPU_ID
;
4160 case KVM_CAP_PV_MMU
: /* obsolete */
4164 r
= KVM_MAX_MCE_BANKS
;
4167 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4169 case KVM_CAP_TSC_CONTROL
:
4170 r
= kvm_has_tsc_control
;
4172 case KVM_CAP_X2APIC_API
:
4173 r
= KVM_X2APIC_API_VALID_FLAGS
;
4175 case KVM_CAP_NESTED_STATE
:
4176 r
= kvm_x86_ops
.nested_ops
->get_state
?
4177 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4179 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4180 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
4182 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4183 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4185 case KVM_CAP_SMALLER_MAXPHYADDR
:
4186 r
= (int) allow_smaller_maxphyaddr
;
4188 case KVM_CAP_STEAL_TIME
:
4189 r
= sched_info_on();
4191 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4192 if (kvm_has_bus_lock_exit
)
4193 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4194 KVM_BUS_LOCK_DETECTION_EXIT
;
4205 long kvm_arch_dev_ioctl(struct file
*filp
,
4206 unsigned int ioctl
, unsigned long arg
)
4208 void __user
*argp
= (void __user
*)arg
;
4212 case KVM_GET_MSR_INDEX_LIST
: {
4213 struct kvm_msr_list __user
*user_msr_list
= argp
;
4214 struct kvm_msr_list msr_list
;
4218 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4221 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4222 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4225 if (n
< msr_list
.nmsrs
)
4228 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4229 num_msrs_to_save
* sizeof(u32
)))
4231 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4233 num_emulated_msrs
* sizeof(u32
)))
4238 case KVM_GET_SUPPORTED_CPUID
:
4239 case KVM_GET_EMULATED_CPUID
: {
4240 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4241 struct kvm_cpuid2 cpuid
;
4244 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4247 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4253 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4258 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4260 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
4261 sizeof(kvm_mce_cap_supported
)))
4265 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4266 struct kvm_msr_list __user
*user_msr_list
= argp
;
4267 struct kvm_msr_list msr_list
;
4271 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4274 msr_list
.nmsrs
= num_msr_based_features
;
4275 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4278 if (n
< msr_list
.nmsrs
)
4281 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4282 num_msr_based_features
* sizeof(u32
)))
4288 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4290 case KVM_GET_SUPPORTED_HV_CPUID
:
4291 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4301 static void wbinvd_ipi(void *garbage
)
4306 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4308 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4311 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4313 /* Address WBINVD may be executed by guest */
4314 if (need_emulate_wbinvd(vcpu
)) {
4315 if (static_call(kvm_x86_has_wbinvd_exit
)())
4316 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4317 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4318 smp_call_function_single(vcpu
->cpu
,
4319 wbinvd_ipi
, NULL
, 1);
4322 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4324 /* Save host pkru register if supported */
4325 vcpu
->arch
.host_pkru
= read_pkru();
4327 /* Apply any externally detected TSC adjustments (due to suspend) */
4328 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4329 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4330 vcpu
->arch
.tsc_offset_adjustment
= 0;
4331 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4334 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4335 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4336 rdtsc() - vcpu
->arch
.last_host_tsc
;
4338 mark_tsc_unstable("KVM discovered backwards TSC");
4340 if (kvm_check_tsc_unstable()) {
4341 u64 offset
= kvm_compute_l1_tsc_offset(vcpu
,
4342 vcpu
->arch
.last_guest_tsc
);
4343 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4344 vcpu
->arch
.tsc_catchup
= 1;
4347 if (kvm_lapic_hv_timer_in_use(vcpu
))
4348 kvm_lapic_restart_hv_timer(vcpu
);
4351 * On a host with synchronized TSC, there is no need to update
4352 * kvmclock on vcpu->cpu migration
4354 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4355 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4356 if (vcpu
->cpu
!= cpu
)
4357 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4361 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4364 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4366 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
4367 struct kvm_steal_time __user
*st
;
4368 struct kvm_memslots
*slots
;
4369 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
4371 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4374 if (vcpu
->arch
.st
.preempted
)
4377 /* This happens on process exit */
4378 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
4381 slots
= kvm_memslots(vcpu
->kvm
);
4383 if (unlikely(slots
->generation
!= ghc
->generation
||
4384 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
4387 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
4388 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
4390 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
4391 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4393 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
4396 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4400 if (vcpu
->preempted
&& !vcpu
->arch
.guest_state_protected
)
4401 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
4404 * Take the srcu lock as memslots will be accessed to check the gfn
4405 * cache generation against the memslots generation.
4407 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4408 if (kvm_xen_msr_enabled(vcpu
->kvm
))
4409 kvm_xen_runstate_set_preempted(vcpu
);
4411 kvm_steal_time_set_preempted(vcpu
);
4412 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4414 static_call(kvm_x86_vcpu_put
)(vcpu
);
4415 vcpu
->arch
.last_host_tsc
= rdtsc();
4418 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4419 struct kvm_lapic_state
*s
)
4421 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
4423 return kvm_apic_get_state(vcpu
, s
);
4426 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4427 struct kvm_lapic_state
*s
)
4431 r
= kvm_apic_set_state(vcpu
, s
);
4434 update_cr8_intercept(vcpu
);
4439 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4442 * We can accept userspace's request for interrupt injection
4443 * as long as we have a place to store the interrupt number.
4444 * The actual injection will happen when the CPU is able to
4445 * deliver the interrupt.
4447 if (kvm_cpu_has_extint(vcpu
))
4450 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4451 return (!lapic_in_kernel(vcpu
) ||
4452 kvm_apic_accept_pic_intr(vcpu
));
4455 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4458 * Do not cause an interrupt window exit if an exception
4459 * is pending or an event needs reinjection; userspace
4460 * might want to inject the interrupt manually using KVM_SET_REGS
4461 * or KVM_SET_SREGS. For that to work, we must be at an
4462 * instruction boundary and with no events half-injected.
4464 return (kvm_arch_interrupt_allowed(vcpu
) &&
4465 kvm_cpu_accept_dm_intr(vcpu
) &&
4466 !kvm_event_needs_reinjection(vcpu
) &&
4467 !vcpu
->arch
.exception
.pending
);
4470 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4471 struct kvm_interrupt
*irq
)
4473 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4476 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4477 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4478 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4483 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4484 * fail for in-kernel 8259.
4486 if (pic_in_kernel(vcpu
->kvm
))
4489 if (vcpu
->arch
.pending_external_vector
!= -1)
4492 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4493 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4497 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4499 kvm_inject_nmi(vcpu
);
4504 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4506 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4511 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4512 struct kvm_tpr_access_ctl
*tac
)
4516 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4520 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4524 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4527 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4529 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4532 vcpu
->arch
.mcg_cap
= mcg_cap
;
4533 /* Init IA32_MCG_CTL to all 1s */
4534 if (mcg_cap
& MCG_CTL_P
)
4535 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4536 /* Init IA32_MCi_CTL to all 1s */
4537 for (bank
= 0; bank
< bank_num
; bank
++)
4538 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4540 static_call(kvm_x86_setup_mce
)(vcpu
);
4545 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4546 struct kvm_x86_mce
*mce
)
4548 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4549 unsigned bank_num
= mcg_cap
& 0xff;
4550 u64
*banks
= vcpu
->arch
.mce_banks
;
4552 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4555 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4556 * reporting is disabled
4558 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4559 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4561 banks
+= 4 * mce
->bank
;
4563 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4564 * reporting is disabled for the bank
4566 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4568 if (mce
->status
& MCI_STATUS_UC
) {
4569 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4570 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4571 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4574 if (banks
[1] & MCI_STATUS_VAL
)
4575 mce
->status
|= MCI_STATUS_OVER
;
4576 banks
[2] = mce
->addr
;
4577 banks
[3] = mce
->misc
;
4578 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4579 banks
[1] = mce
->status
;
4580 kvm_queue_exception(vcpu
, MC_VECTOR
);
4581 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4582 || !(banks
[1] & MCI_STATUS_UC
)) {
4583 if (banks
[1] & MCI_STATUS_VAL
)
4584 mce
->status
|= MCI_STATUS_OVER
;
4585 banks
[2] = mce
->addr
;
4586 banks
[3] = mce
->misc
;
4587 banks
[1] = mce
->status
;
4589 banks
[1] |= MCI_STATUS_OVER
;
4593 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4594 struct kvm_vcpu_events
*events
)
4598 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
4602 * In guest mode, payload delivery should be deferred,
4603 * so that the L1 hypervisor can intercept #PF before
4604 * CR2 is modified (or intercept #DB before DR6 is
4605 * modified under nVMX). Unless the per-VM capability,
4606 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4607 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4608 * opportunistically defer the exception payload, deliver it if the
4609 * capability hasn't been requested before processing a
4610 * KVM_GET_VCPU_EVENTS.
4612 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4613 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4614 kvm_deliver_exception_payload(vcpu
);
4617 * The API doesn't provide the instruction length for software
4618 * exceptions, so don't report them. As long as the guest RIP
4619 * isn't advanced, we should expect to encounter the exception
4622 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4623 events
->exception
.injected
= 0;
4624 events
->exception
.pending
= 0;
4626 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4627 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4629 * For ABI compatibility, deliberately conflate
4630 * pending and injected exceptions when
4631 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4633 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4634 events
->exception
.injected
|=
4635 vcpu
->arch
.exception
.pending
;
4637 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4638 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4639 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4640 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4641 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4643 events
->interrupt
.injected
=
4644 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4645 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4646 events
->interrupt
.soft
= 0;
4647 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
4649 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4650 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4651 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
4652 events
->nmi
.pad
= 0;
4654 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4656 events
->smi
.smm
= is_smm(vcpu
);
4657 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4658 events
->smi
.smm_inside_nmi
=
4659 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4660 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4662 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4663 | KVM_VCPUEVENT_VALID_SHADOW
4664 | KVM_VCPUEVENT_VALID_SMM
);
4665 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4666 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4668 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4671 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
);
4673 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4674 struct kvm_vcpu_events
*events
)
4676 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4677 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4678 | KVM_VCPUEVENT_VALID_SHADOW
4679 | KVM_VCPUEVENT_VALID_SMM
4680 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4683 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4684 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4686 if (events
->exception
.pending
)
4687 events
->exception
.injected
= 0;
4689 events
->exception_has_payload
= 0;
4691 events
->exception
.pending
= 0;
4692 events
->exception_has_payload
= 0;
4695 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4696 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4699 /* INITs are latched while in SMM */
4700 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4701 (events
->smi
.smm
|| events
->smi
.pending
) &&
4702 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4706 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4707 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4708 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4709 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4710 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4711 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4712 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4714 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4715 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4716 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4717 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4718 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
4719 events
->interrupt
.shadow
);
4721 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4722 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
4723 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
4724 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
4726 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
4727 lapic_in_kernel(vcpu
))
4728 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
4730 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
4731 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
4732 kvm_x86_ops
.nested_ops
->leave_nested(vcpu
);
4733 kvm_smm_changed(vcpu
, events
->smi
.smm
);
4736 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
4738 if (events
->smi
.smm
) {
4739 if (events
->smi
.smm_inside_nmi
)
4740 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
4742 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
4745 if (lapic_in_kernel(vcpu
)) {
4746 if (events
->smi
.latched_init
)
4747 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4749 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4753 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4758 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
4759 struct kvm_debugregs
*dbgregs
)
4763 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
4764 kvm_get_dr(vcpu
, 6, &val
);
4766 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4768 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4771 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4772 struct kvm_debugregs
*dbgregs
)
4777 if (!kvm_dr6_valid(dbgregs
->dr6
))
4779 if (!kvm_dr7_valid(dbgregs
->dr7
))
4782 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4783 kvm_update_dr0123(vcpu
);
4784 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4785 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4786 kvm_update_dr7(vcpu
);
4791 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4792 struct kvm_xsave
*guest_xsave
)
4794 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
4797 fpu_copy_guest_fpstate_to_uabi(&vcpu
->arch
.guest_fpu
,
4798 guest_xsave
->region
,
4799 sizeof(guest_xsave
->region
),
4803 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4804 struct kvm_xsave
*guest_xsave
)
4806 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
4809 return fpu_copy_uabi_to_guest_fpstate(&vcpu
->arch
.guest_fpu
,
4810 guest_xsave
->region
,
4811 supported_xcr0
, &vcpu
->arch
.pkru
);
4814 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4815 struct kvm_xcrs
*guest_xcrs
)
4817 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4818 guest_xcrs
->nr_xcrs
= 0;
4822 guest_xcrs
->nr_xcrs
= 1;
4823 guest_xcrs
->flags
= 0;
4824 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4825 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4828 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4829 struct kvm_xcrs
*guest_xcrs
)
4833 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4836 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4839 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4840 /* Only support XCR0 currently */
4841 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4842 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4843 guest_xcrs
->xcrs
[i
].value
);
4852 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4853 * stopped by the hypervisor. This function will be called from the host only.
4854 * EINVAL is returned when the host attempts to set the flag for a guest that
4855 * does not support pv clocks.
4857 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4859 if (!vcpu
->arch
.pv_time_enabled
)
4861 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4862 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4866 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4867 struct kvm_enable_cap
*cap
)
4870 uint16_t vmcs_version
;
4871 void __user
*user_ptr
;
4877 case KVM_CAP_HYPERV_SYNIC2
:
4882 case KVM_CAP_HYPERV_SYNIC
:
4883 if (!irqchip_in_kernel(vcpu
->kvm
))
4885 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
4886 KVM_CAP_HYPERV_SYNIC2
);
4887 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4888 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
4890 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
4892 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
4893 if (copy_to_user(user_ptr
, &vmcs_version
,
4894 sizeof(vmcs_version
)))
4898 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4899 if (!kvm_x86_ops
.enable_direct_tlbflush
)
4902 return static_call(kvm_x86_enable_direct_tlbflush
)(vcpu
);
4904 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4905 return kvm_hv_set_enforce_cpuid(vcpu
, cap
->args
[0]);
4907 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4908 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
4909 if (vcpu
->arch
.pv_cpuid
.enforce
)
4910 kvm_update_pv_runtime(vcpu
);
4918 long kvm_arch_vcpu_ioctl(struct file
*filp
,
4919 unsigned int ioctl
, unsigned long arg
)
4921 struct kvm_vcpu
*vcpu
= filp
->private_data
;
4922 void __user
*argp
= (void __user
*)arg
;
4925 struct kvm_sregs2
*sregs2
;
4926 struct kvm_lapic_state
*lapic
;
4927 struct kvm_xsave
*xsave
;
4928 struct kvm_xcrs
*xcrs
;
4936 case KVM_GET_LAPIC
: {
4938 if (!lapic_in_kernel(vcpu
))
4940 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
4941 GFP_KERNEL_ACCOUNT
);
4946 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
4950 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
4955 case KVM_SET_LAPIC
: {
4957 if (!lapic_in_kernel(vcpu
))
4959 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
4960 if (IS_ERR(u
.lapic
)) {
4961 r
= PTR_ERR(u
.lapic
);
4965 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
4968 case KVM_INTERRUPT
: {
4969 struct kvm_interrupt irq
;
4972 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
4974 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
4978 r
= kvm_vcpu_ioctl_nmi(vcpu
);
4982 r
= kvm_vcpu_ioctl_smi(vcpu
);
4985 case KVM_SET_CPUID
: {
4986 struct kvm_cpuid __user
*cpuid_arg
= argp
;
4987 struct kvm_cpuid cpuid
;
4990 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4992 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4995 case KVM_SET_CPUID2
: {
4996 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4997 struct kvm_cpuid2 cpuid
;
5000 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5002 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
5003 cpuid_arg
->entries
);
5006 case KVM_GET_CPUID2
: {
5007 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5008 struct kvm_cpuid2 cpuid
;
5011 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5013 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5014 cpuid_arg
->entries
);
5018 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5023 case KVM_GET_MSRS
: {
5024 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5025 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5026 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5029 case KVM_SET_MSRS
: {
5030 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5031 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5032 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5035 case KVM_TPR_ACCESS_REPORTING
: {
5036 struct kvm_tpr_access_ctl tac
;
5039 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5041 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5045 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5050 case KVM_SET_VAPIC_ADDR
: {
5051 struct kvm_vapic_addr va
;
5055 if (!lapic_in_kernel(vcpu
))
5058 if (copy_from_user(&va
, argp
, sizeof(va
)))
5060 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5061 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5062 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5065 case KVM_X86_SETUP_MCE
: {
5069 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5071 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5074 case KVM_X86_SET_MCE
: {
5075 struct kvm_x86_mce mce
;
5078 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5080 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5083 case KVM_GET_VCPU_EVENTS
: {
5084 struct kvm_vcpu_events events
;
5086 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5089 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5094 case KVM_SET_VCPU_EVENTS
: {
5095 struct kvm_vcpu_events events
;
5098 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5101 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5104 case KVM_GET_DEBUGREGS
: {
5105 struct kvm_debugregs dbgregs
;
5107 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5110 if (copy_to_user(argp
, &dbgregs
,
5111 sizeof(struct kvm_debugregs
)))
5116 case KVM_SET_DEBUGREGS
: {
5117 struct kvm_debugregs dbgregs
;
5120 if (copy_from_user(&dbgregs
, argp
,
5121 sizeof(struct kvm_debugregs
)))
5124 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
5127 case KVM_GET_XSAVE
: {
5128 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
5133 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
5136 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
5141 case KVM_SET_XSAVE
: {
5142 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
5143 if (IS_ERR(u
.xsave
)) {
5144 r
= PTR_ERR(u
.xsave
);
5148 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
5151 case KVM_GET_XCRS
: {
5152 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
5157 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
5160 if (copy_to_user(argp
, u
.xcrs
,
5161 sizeof(struct kvm_xcrs
)))
5166 case KVM_SET_XCRS
: {
5167 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
5168 if (IS_ERR(u
.xcrs
)) {
5169 r
= PTR_ERR(u
.xcrs
);
5173 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
5176 case KVM_SET_TSC_KHZ
: {
5180 user_tsc_khz
= (u32
)arg
;
5182 if (kvm_has_tsc_control
&&
5183 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
5186 if (user_tsc_khz
== 0)
5187 user_tsc_khz
= tsc_khz
;
5189 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
5194 case KVM_GET_TSC_KHZ
: {
5195 r
= vcpu
->arch
.virtual_tsc_khz
;
5198 case KVM_KVMCLOCK_CTRL
: {
5199 r
= kvm_set_guest_paused(vcpu
);
5202 case KVM_ENABLE_CAP
: {
5203 struct kvm_enable_cap cap
;
5206 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
5208 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
5211 case KVM_GET_NESTED_STATE
: {
5212 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5216 if (!kvm_x86_ops
.nested_ops
->get_state
)
5219 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
5221 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
5224 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
5229 if (r
> user_data_size
) {
5230 if (put_user(r
, &user_kvm_nested_state
->size
))
5240 case KVM_SET_NESTED_STATE
: {
5241 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5242 struct kvm_nested_state kvm_state
;
5246 if (!kvm_x86_ops
.nested_ops
->set_state
)
5250 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5254 if (kvm_state
.size
< sizeof(kvm_state
))
5257 if (kvm_state
.flags
&
5258 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5259 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5260 | KVM_STATE_NESTED_GIF_SET
))
5263 /* nested_run_pending implies guest_mode. */
5264 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5265 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5268 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5269 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5270 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5273 case KVM_GET_SUPPORTED_HV_CPUID
:
5274 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5276 #ifdef CONFIG_KVM_XEN
5277 case KVM_XEN_VCPU_GET_ATTR
: {
5278 struct kvm_xen_vcpu_attr xva
;
5281 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5283 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
5284 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
5288 case KVM_XEN_VCPU_SET_ATTR
: {
5289 struct kvm_xen_vcpu_attr xva
;
5292 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5294 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
5298 case KVM_GET_SREGS2
: {
5299 u
.sregs2
= kzalloc(sizeof(struct kvm_sregs2
), GFP_KERNEL
);
5303 __get_sregs2(vcpu
, u
.sregs2
);
5305 if (copy_to_user(argp
, u
.sregs2
, sizeof(struct kvm_sregs2
)))
5310 case KVM_SET_SREGS2
: {
5311 u
.sregs2
= memdup_user(argp
, sizeof(struct kvm_sregs2
));
5312 if (IS_ERR(u
.sregs2
)) {
5313 r
= PTR_ERR(u
.sregs2
);
5317 r
= __set_sregs2(vcpu
, u
.sregs2
);
5330 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5332 return VM_FAULT_SIGBUS
;
5335 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5339 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5341 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
5345 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5348 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
5351 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5352 unsigned long kvm_nr_mmu_pages
)
5354 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5357 mutex_lock(&kvm
->slots_lock
);
5359 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5360 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5362 mutex_unlock(&kvm
->slots_lock
);
5366 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5368 return kvm
->arch
.n_max_mmu_pages
;
5371 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5373 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5377 switch (chip
->chip_id
) {
5378 case KVM_IRQCHIP_PIC_MASTER
:
5379 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5380 sizeof(struct kvm_pic_state
));
5382 case KVM_IRQCHIP_PIC_SLAVE
:
5383 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5384 sizeof(struct kvm_pic_state
));
5386 case KVM_IRQCHIP_IOAPIC
:
5387 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5396 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5398 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5402 switch (chip
->chip_id
) {
5403 case KVM_IRQCHIP_PIC_MASTER
:
5404 spin_lock(&pic
->lock
);
5405 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5406 sizeof(struct kvm_pic_state
));
5407 spin_unlock(&pic
->lock
);
5409 case KVM_IRQCHIP_PIC_SLAVE
:
5410 spin_lock(&pic
->lock
);
5411 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5412 sizeof(struct kvm_pic_state
));
5413 spin_unlock(&pic
->lock
);
5415 case KVM_IRQCHIP_IOAPIC
:
5416 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5422 kvm_pic_update_irq(pic
);
5426 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5428 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5430 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5432 mutex_lock(&kps
->lock
);
5433 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5434 mutex_unlock(&kps
->lock
);
5438 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5441 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5443 mutex_lock(&pit
->pit_state
.lock
);
5444 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5445 for (i
= 0; i
< 3; i
++)
5446 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5447 mutex_unlock(&pit
->pit_state
.lock
);
5451 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5453 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5454 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5455 sizeof(ps
->channels
));
5456 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5457 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5458 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5462 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5466 u32 prev_legacy
, cur_legacy
;
5467 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5469 mutex_lock(&pit
->pit_state
.lock
);
5470 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5471 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5472 if (!prev_legacy
&& cur_legacy
)
5474 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5475 sizeof(pit
->pit_state
.channels
));
5476 pit
->pit_state
.flags
= ps
->flags
;
5477 for (i
= 0; i
< 3; i
++)
5478 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5480 mutex_unlock(&pit
->pit_state
.lock
);
5484 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5485 struct kvm_reinject_control
*control
)
5487 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5489 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5490 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5491 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5493 mutex_lock(&pit
->pit_state
.lock
);
5494 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5495 mutex_unlock(&pit
->pit_state
.lock
);
5500 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5504 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5505 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5506 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5509 struct kvm_vcpu
*vcpu
;
5512 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5513 kvm_vcpu_kick(vcpu
);
5516 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5519 if (!irqchip_in_kernel(kvm
))
5522 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5523 irq_event
->irq
, irq_event
->level
,
5528 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5529 struct kvm_enable_cap
*cap
)
5537 case KVM_CAP_DISABLE_QUIRKS
:
5538 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5541 case KVM_CAP_SPLIT_IRQCHIP
: {
5542 mutex_lock(&kvm
->lock
);
5544 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5545 goto split_irqchip_unlock
;
5547 if (irqchip_in_kernel(kvm
))
5548 goto split_irqchip_unlock
;
5549 if (kvm
->created_vcpus
)
5550 goto split_irqchip_unlock
;
5551 r
= kvm_setup_empty_irq_routing(kvm
);
5553 goto split_irqchip_unlock
;
5554 /* Pairs with irqchip_in_kernel. */
5556 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5557 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5559 split_irqchip_unlock
:
5560 mutex_unlock(&kvm
->lock
);
5563 case KVM_CAP_X2APIC_API
:
5565 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
5568 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
5569 kvm
->arch
.x2apic_format
= true;
5570 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
5571 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
5575 case KVM_CAP_X86_DISABLE_EXITS
:
5577 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
5580 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
5581 kvm_can_mwait_in_guest())
5582 kvm
->arch
.mwait_in_guest
= true;
5583 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
5584 kvm
->arch
.hlt_in_guest
= true;
5585 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
5586 kvm
->arch
.pause_in_guest
= true;
5587 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
5588 kvm
->arch
.cstate_in_guest
= true;
5591 case KVM_CAP_MSR_PLATFORM_INFO
:
5592 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
5595 case KVM_CAP_EXCEPTION_PAYLOAD
:
5596 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
5599 case KVM_CAP_X86_USER_SPACE_MSR
:
5600 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
5603 case KVM_CAP_X86_BUS_LOCK_EXIT
:
5605 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
5608 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
5609 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
5612 if (kvm_has_bus_lock_exit
&&
5613 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
5614 kvm
->arch
.bus_lock_detection_enabled
= true;
5617 #ifdef CONFIG_X86_SGX_KVM
5618 case KVM_CAP_SGX_ATTRIBUTE
: {
5619 unsigned long allowed_attributes
= 0;
5621 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
5625 /* KVM only supports the PROVISIONKEY privileged attribute. */
5626 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
5627 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
5628 kvm
->arch
.sgx_provisioning_allowed
= true;
5634 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
5636 if (kvm_x86_ops
.vm_copy_enc_context_from
)
5637 r
= kvm_x86_ops
.vm_copy_enc_context_from(kvm
, cap
->args
[0]);
5639 case KVM_CAP_EXIT_HYPERCALL
:
5640 if (cap
->args
[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK
) {
5644 kvm
->arch
.hypercall_exit_enabled
= cap
->args
[0];
5647 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
5649 if (cap
->args
[0] & ~1)
5651 kvm
->arch
.exit_on_emulation_error
= cap
->args
[0];
5661 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
5663 struct kvm_x86_msr_filter
*msr_filter
;
5665 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
5669 msr_filter
->default_allow
= default_allow
;
5673 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
5680 for (i
= 0; i
< msr_filter
->count
; i
++)
5681 kfree(msr_filter
->ranges
[i
].bitmap
);
5686 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
5687 struct kvm_msr_filter_range
*user_range
)
5689 unsigned long *bitmap
= NULL
;
5692 if (!user_range
->nmsrs
)
5695 if (user_range
->flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
))
5698 if (!user_range
->flags
)
5701 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
5702 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
5705 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
5707 return PTR_ERR(bitmap
);
5709 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
5710 .flags
= user_range
->flags
,
5711 .base
= user_range
->base
,
5712 .nmsrs
= user_range
->nmsrs
,
5716 msr_filter
->count
++;
5720 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
5722 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
5723 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
5724 struct kvm_msr_filter filter
;
5730 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
5733 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
5734 empty
&= !filter
.ranges
[i
].nmsrs
;
5736 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
5737 if (empty
&& !default_allow
)
5740 new_filter
= kvm_alloc_msr_filter(default_allow
);
5744 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
5745 r
= kvm_add_msr_filter(new_filter
, &filter
.ranges
[i
]);
5747 kvm_free_msr_filter(new_filter
);
5752 mutex_lock(&kvm
->lock
);
5754 /* The per-VM filter is protected by kvm->lock... */
5755 old_filter
= srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1);
5757 rcu_assign_pointer(kvm
->arch
.msr_filter
, new_filter
);
5758 synchronize_srcu(&kvm
->srcu
);
5760 kvm_free_msr_filter(old_filter
);
5762 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
5763 mutex_unlock(&kvm
->lock
);
5768 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5769 static int kvm_arch_suspend_notifier(struct kvm
*kvm
)
5771 struct kvm_vcpu
*vcpu
;
5774 mutex_lock(&kvm
->lock
);
5775 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5776 if (!vcpu
->arch
.pv_time_enabled
)
5779 ret
= kvm_set_guest_paused(vcpu
);
5781 kvm_err("Failed to pause guest VCPU%d: %d\n",
5782 vcpu
->vcpu_id
, ret
);
5786 mutex_unlock(&kvm
->lock
);
5788 return ret
? NOTIFY_BAD
: NOTIFY_DONE
;
5791 int kvm_arch_pm_notifier(struct kvm
*kvm
, unsigned long state
)
5794 case PM_HIBERNATION_PREPARE
:
5795 case PM_SUSPEND_PREPARE
:
5796 return kvm_arch_suspend_notifier(kvm
);
5801 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5803 long kvm_arch_vm_ioctl(struct file
*filp
,
5804 unsigned int ioctl
, unsigned long arg
)
5806 struct kvm
*kvm
= filp
->private_data
;
5807 void __user
*argp
= (void __user
*)arg
;
5810 * This union makes it completely explicit to gcc-3.x
5811 * that these two variables' stack usage should be
5812 * combined, not added together.
5815 struct kvm_pit_state ps
;
5816 struct kvm_pit_state2 ps2
;
5817 struct kvm_pit_config pit_config
;
5821 case KVM_SET_TSS_ADDR
:
5822 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
5824 case KVM_SET_IDENTITY_MAP_ADDR
: {
5827 mutex_lock(&kvm
->lock
);
5829 if (kvm
->created_vcpus
)
5830 goto set_identity_unlock
;
5832 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
5833 goto set_identity_unlock
;
5834 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
5835 set_identity_unlock
:
5836 mutex_unlock(&kvm
->lock
);
5839 case KVM_SET_NR_MMU_PAGES
:
5840 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
5842 case KVM_GET_NR_MMU_PAGES
:
5843 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
5845 case KVM_CREATE_IRQCHIP
: {
5846 mutex_lock(&kvm
->lock
);
5849 if (irqchip_in_kernel(kvm
))
5850 goto create_irqchip_unlock
;
5853 if (kvm
->created_vcpus
)
5854 goto create_irqchip_unlock
;
5856 r
= kvm_pic_init(kvm
);
5858 goto create_irqchip_unlock
;
5860 r
= kvm_ioapic_init(kvm
);
5862 kvm_pic_destroy(kvm
);
5863 goto create_irqchip_unlock
;
5866 r
= kvm_setup_default_irq_routing(kvm
);
5868 kvm_ioapic_destroy(kvm
);
5869 kvm_pic_destroy(kvm
);
5870 goto create_irqchip_unlock
;
5872 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5874 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
5875 create_irqchip_unlock
:
5876 mutex_unlock(&kvm
->lock
);
5879 case KVM_CREATE_PIT
:
5880 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
5882 case KVM_CREATE_PIT2
:
5884 if (copy_from_user(&u
.pit_config
, argp
,
5885 sizeof(struct kvm_pit_config
)))
5888 mutex_lock(&kvm
->lock
);
5891 goto create_pit_unlock
;
5893 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
5897 mutex_unlock(&kvm
->lock
);
5899 case KVM_GET_IRQCHIP
: {
5900 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5901 struct kvm_irqchip
*chip
;
5903 chip
= memdup_user(argp
, sizeof(*chip
));
5910 if (!irqchip_kernel(kvm
))
5911 goto get_irqchip_out
;
5912 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
5914 goto get_irqchip_out
;
5916 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
5917 goto get_irqchip_out
;
5923 case KVM_SET_IRQCHIP
: {
5924 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5925 struct kvm_irqchip
*chip
;
5927 chip
= memdup_user(argp
, sizeof(*chip
));
5934 if (!irqchip_kernel(kvm
))
5935 goto set_irqchip_out
;
5936 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
5943 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
5946 if (!kvm
->arch
.vpit
)
5948 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
5952 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
5959 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
5961 mutex_lock(&kvm
->lock
);
5963 if (!kvm
->arch
.vpit
)
5965 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
5967 mutex_unlock(&kvm
->lock
);
5970 case KVM_GET_PIT2
: {
5972 if (!kvm
->arch
.vpit
)
5974 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
5978 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
5983 case KVM_SET_PIT2
: {
5985 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
5987 mutex_lock(&kvm
->lock
);
5989 if (!kvm
->arch
.vpit
)
5991 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
5993 mutex_unlock(&kvm
->lock
);
5996 case KVM_REINJECT_CONTROL
: {
5997 struct kvm_reinject_control control
;
5999 if (copy_from_user(&control
, argp
, sizeof(control
)))
6002 if (!kvm
->arch
.vpit
)
6004 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
6007 case KVM_SET_BOOT_CPU_ID
:
6009 mutex_lock(&kvm
->lock
);
6010 if (kvm
->created_vcpus
)
6013 kvm
->arch
.bsp_vcpu_id
= arg
;
6014 mutex_unlock(&kvm
->lock
);
6016 #ifdef CONFIG_KVM_XEN
6017 case KVM_XEN_HVM_CONFIG
: {
6018 struct kvm_xen_hvm_config xhc
;
6020 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
6022 r
= kvm_xen_hvm_config(kvm
, &xhc
);
6025 case KVM_XEN_HVM_GET_ATTR
: {
6026 struct kvm_xen_hvm_attr xha
;
6029 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6031 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
6032 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
6036 case KVM_XEN_HVM_SET_ATTR
: {
6037 struct kvm_xen_hvm_attr xha
;
6040 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6042 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
6046 case KVM_SET_CLOCK
: {
6047 struct kvm_arch
*ka
= &kvm
->arch
;
6048 struct kvm_clock_data user_ns
;
6052 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
6061 * TODO: userspace has to take care of races with VCPU_RUN, so
6062 * kvm_gen_update_masterclock() can be cut down to locked
6063 * pvclock_update_vm_gtod_copy().
6065 kvm_gen_update_masterclock(kvm
);
6068 * This pairs with kvm_guest_time_update(): when masterclock is
6069 * in use, we use master_kernel_ns + kvmclock_offset to set
6070 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6071 * is slightly ahead) here we risk going negative on unsigned
6072 * 'system_time' when 'user_ns.clock' is very small.
6074 raw_spin_lock_irq(&ka
->pvclock_gtod_sync_lock
);
6075 if (kvm
->arch
.use_master_clock
)
6076 now_ns
= ka
->master_kernel_ns
;
6078 now_ns
= get_kvmclock_base_ns();
6079 ka
->kvmclock_offset
= user_ns
.clock
- now_ns
;
6080 raw_spin_unlock_irq(&ka
->pvclock_gtod_sync_lock
);
6082 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
6085 case KVM_GET_CLOCK
: {
6086 struct kvm_clock_data user_ns
;
6089 now_ns
= get_kvmclock_ns(kvm
);
6090 user_ns
.clock
= now_ns
;
6091 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
6092 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
6095 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
6100 case KVM_MEMORY_ENCRYPT_OP
: {
6102 if (kvm_x86_ops
.mem_enc_op
)
6103 r
= static_call(kvm_x86_mem_enc_op
)(kvm
, argp
);
6106 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
6107 struct kvm_enc_region region
;
6110 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6114 if (kvm_x86_ops
.mem_enc_reg_region
)
6115 r
= static_call(kvm_x86_mem_enc_reg_region
)(kvm
, ®ion
);
6118 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
6119 struct kvm_enc_region region
;
6122 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6126 if (kvm_x86_ops
.mem_enc_unreg_region
)
6127 r
= static_call(kvm_x86_mem_enc_unreg_region
)(kvm
, ®ion
);
6130 case KVM_HYPERV_EVENTFD
: {
6131 struct kvm_hyperv_eventfd hvevfd
;
6134 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
6136 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
6139 case KVM_SET_PMU_EVENT_FILTER
:
6140 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
6142 case KVM_X86_SET_MSR_FILTER
:
6143 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
6152 static void kvm_init_msr_list(void)
6154 struct x86_pmu_capability x86_pmu
;
6158 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
6159 "Please update the fixed PMCs in msrs_to_saved_all[]");
6161 perf_get_x86_pmu_capability(&x86_pmu
);
6163 num_msrs_to_save
= 0;
6164 num_emulated_msrs
= 0;
6165 num_msr_based_features
= 0;
6167 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
6168 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
6172 * Even MSRs that are valid in the host may not be exposed
6173 * to the guests in some cases.
6175 switch (msrs_to_save_all
[i
]) {
6176 case MSR_IA32_BNDCFGS
:
6177 if (!kvm_mpx_supported())
6181 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
6182 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
6185 case MSR_IA32_UMWAIT_CONTROL
:
6186 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
6189 case MSR_IA32_RTIT_CTL
:
6190 case MSR_IA32_RTIT_STATUS
:
6191 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
6194 case MSR_IA32_RTIT_CR3_MATCH
:
6195 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6196 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
6199 case MSR_IA32_RTIT_OUTPUT_BASE
:
6200 case MSR_IA32_RTIT_OUTPUT_MASK
:
6201 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6202 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
6203 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
6206 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
6207 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6208 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
6209 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
6212 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
6213 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
6214 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6217 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
6218 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
6219 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6226 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
6229 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
6230 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
6233 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
6236 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
6237 struct kvm_msr_entry msr
;
6239 msr
.index
= msr_based_features_all
[i
];
6240 if (kvm_get_msr_feature(&msr
))
6243 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
6247 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
6255 if (!(lapic_in_kernel(vcpu
) &&
6256 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
6257 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6268 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
6275 if (!(lapic_in_kernel(vcpu
) &&
6276 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
6278 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6280 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
6290 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
6291 struct kvm_segment
*var
, int seg
)
6293 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
6296 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
6297 struct kvm_segment
*var
, int seg
)
6299 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
6302 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
6303 struct x86_exception
*exception
)
6307 BUG_ON(!mmu_is_nested(vcpu
));
6309 /* NPT walks are always user-walks */
6310 access
|= PFERR_USER_MASK
;
6311 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
6316 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
6317 struct x86_exception
*exception
)
6319 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6320 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6322 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
6324 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
6325 struct x86_exception
*exception
)
6327 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6328 access
|= PFERR_FETCH_MASK
;
6329 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6332 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
6333 struct x86_exception
*exception
)
6335 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6336 access
|= PFERR_WRITE_MASK
;
6337 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6339 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
6341 /* uses this to access any guest's mapped memory without checking CPL */
6342 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
6343 struct x86_exception
*exception
)
6345 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
6348 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6349 struct kvm_vcpu
*vcpu
, u32 access
,
6350 struct x86_exception
*exception
)
6353 int r
= X86EMUL_CONTINUE
;
6356 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
6358 unsigned offset
= addr
& (PAGE_SIZE
-1);
6359 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6362 if (gpa
== UNMAPPED_GVA
)
6363 return X86EMUL_PROPAGATE_FAULT
;
6364 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
6367 r
= X86EMUL_IO_NEEDED
;
6379 /* used for instruction fetching */
6380 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
6381 gva_t addr
, void *val
, unsigned int bytes
,
6382 struct x86_exception
*exception
)
6384 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6385 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6389 /* Inline kvm_read_guest_virt_helper for speed. */
6390 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
6392 if (unlikely(gpa
== UNMAPPED_GVA
))
6393 return X86EMUL_PROPAGATE_FAULT
;
6395 offset
= addr
& (PAGE_SIZE
-1);
6396 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
6397 bytes
= (unsigned)PAGE_SIZE
- offset
;
6398 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
6400 if (unlikely(ret
< 0))
6401 return X86EMUL_IO_NEEDED
;
6403 return X86EMUL_CONTINUE
;
6406 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
6407 gva_t addr
, void *val
, unsigned int bytes
,
6408 struct x86_exception
*exception
)
6410 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6413 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6414 * is returned, but our callers are not ready for that and they blindly
6415 * call kvm_inject_page_fault. Ensure that they at least do not leak
6416 * uninitialized kernel stack memory into cr2 and error code.
6418 memset(exception
, 0, sizeof(*exception
));
6419 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
6422 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
6424 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
6425 gva_t addr
, void *val
, unsigned int bytes
,
6426 struct x86_exception
*exception
, bool system
)
6428 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6431 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6432 access
|= PFERR_USER_MASK
;
6434 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6437 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6438 unsigned long addr
, void *val
, unsigned int bytes
)
6440 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6441 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6443 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6446 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6447 struct kvm_vcpu
*vcpu
, u32 access
,
6448 struct x86_exception
*exception
)
6451 int r
= X86EMUL_CONTINUE
;
6454 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
6457 unsigned offset
= addr
& (PAGE_SIZE
-1);
6458 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6461 if (gpa
== UNMAPPED_GVA
)
6462 return X86EMUL_PROPAGATE_FAULT
;
6463 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6465 r
= X86EMUL_IO_NEEDED
;
6477 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6478 unsigned int bytes
, struct x86_exception
*exception
,
6481 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6482 u32 access
= PFERR_WRITE_MASK
;
6484 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6485 access
|= PFERR_USER_MASK
;
6487 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6491 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
6492 unsigned int bytes
, struct x86_exception
*exception
)
6494 /* kvm_write_guest_virt_system can pull in tons of pages. */
6495 vcpu
->arch
.l1tf_flush_l1d
= true;
6497 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6498 PFERR_WRITE_MASK
, exception
);
6500 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
6502 int handle_ud(struct kvm_vcpu
*vcpu
)
6504 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
6505 int emul_type
= EMULTYPE_TRAP_UD
;
6506 char sig
[5]; /* ud2; .ascii "kvm" */
6507 struct x86_exception e
;
6509 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, NULL
, 0)))
6512 if (force_emulation_prefix
&&
6513 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
6514 sig
, sizeof(sig
), &e
) == 0 &&
6515 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
6516 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
6517 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
6520 return kvm_emulate_instruction(vcpu
, emul_type
);
6522 EXPORT_SYMBOL_GPL(handle_ud
);
6524 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6525 gpa_t gpa
, bool write
)
6527 /* For APIC access vmexit */
6528 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6531 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
6532 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
6539 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6540 gpa_t
*gpa
, struct x86_exception
*exception
,
6543 u32 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
6544 | (write
? PFERR_WRITE_MASK
: 0);
6547 * currently PKRU is only applied to ept enabled guest so
6548 * there is no pkey in EPT page table for L1 guest or EPT
6549 * shadow page table for L2 guest.
6551 if (vcpu_match_mmio_gva(vcpu
, gva
) && (!is_paging(vcpu
) ||
6552 !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
6553 vcpu
->arch
.mmio_access
, 0, access
))) {
6554 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
6555 (gva
& (PAGE_SIZE
- 1));
6556 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
6560 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6562 if (*gpa
== UNMAPPED_GVA
)
6565 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
6568 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6569 const void *val
, int bytes
)
6573 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
6576 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
6580 struct read_write_emulator_ops
{
6581 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
6583 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6584 void *val
, int bytes
);
6585 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6586 int bytes
, void *val
);
6587 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6588 void *val
, int bytes
);
6592 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
6594 if (vcpu
->mmio_read_completed
) {
6595 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
6596 vcpu
->mmio_fragments
[0].gpa
, val
);
6597 vcpu
->mmio_read_completed
= 0;
6604 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6605 void *val
, int bytes
)
6607 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
6610 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6611 void *val
, int bytes
)
6613 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
6616 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
6618 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
6619 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
6622 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6623 void *val
, int bytes
)
6625 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
6626 return X86EMUL_IO_NEEDED
;
6629 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6630 void *val
, int bytes
)
6632 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
6634 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6635 return X86EMUL_CONTINUE
;
6638 static const struct read_write_emulator_ops read_emultor
= {
6639 .read_write_prepare
= read_prepare
,
6640 .read_write_emulate
= read_emulate
,
6641 .read_write_mmio
= vcpu_mmio_read
,
6642 .read_write_exit_mmio
= read_exit_mmio
,
6645 static const struct read_write_emulator_ops write_emultor
= {
6646 .read_write_emulate
= write_emulate
,
6647 .read_write_mmio
= write_mmio
,
6648 .read_write_exit_mmio
= write_exit_mmio
,
6652 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
6654 struct x86_exception
*exception
,
6655 struct kvm_vcpu
*vcpu
,
6656 const struct read_write_emulator_ops
*ops
)
6660 bool write
= ops
->write
;
6661 struct kvm_mmio_fragment
*frag
;
6662 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6665 * If the exit was due to a NPF we may already have a GPA.
6666 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6667 * Note, this cannot be used on string operations since string
6668 * operation using rep will only have the initial GPA from the NPF
6671 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
6672 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
6673 gpa
= ctxt
->gpa_val
;
6674 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
6676 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
6678 return X86EMUL_PROPAGATE_FAULT
;
6681 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
6682 return X86EMUL_CONTINUE
;
6685 * Is this MMIO handled locally?
6687 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
6688 if (handled
== bytes
)
6689 return X86EMUL_CONTINUE
;
6695 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
6696 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
6700 return X86EMUL_CONTINUE
;
6703 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
6705 void *val
, unsigned int bytes
,
6706 struct x86_exception
*exception
,
6707 const struct read_write_emulator_ops
*ops
)
6709 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6713 if (ops
->read_write_prepare
&&
6714 ops
->read_write_prepare(vcpu
, val
, bytes
))
6715 return X86EMUL_CONTINUE
;
6717 vcpu
->mmio_nr_fragments
= 0;
6719 /* Crossing a page boundary? */
6720 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
6723 now
= -addr
& ~PAGE_MASK
;
6724 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
6727 if (rc
!= X86EMUL_CONTINUE
)
6730 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
6736 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
6738 if (rc
!= X86EMUL_CONTINUE
)
6741 if (!vcpu
->mmio_nr_fragments
)
6744 gpa
= vcpu
->mmio_fragments
[0].gpa
;
6746 vcpu
->mmio_needed
= 1;
6747 vcpu
->mmio_cur_fragment
= 0;
6749 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
6750 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
6751 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
6752 vcpu
->run
->mmio
.phys_addr
= gpa
;
6754 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
6757 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
6761 struct x86_exception
*exception
)
6763 return emulator_read_write(ctxt
, addr
, val
, bytes
,
6764 exception
, &read_emultor
);
6767 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
6771 struct x86_exception
*exception
)
6773 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
6774 exception
, &write_emultor
);
6777 #define CMPXCHG_TYPE(t, ptr, old, new) \
6778 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6780 #ifdef CONFIG_X86_64
6781 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6783 # define CMPXCHG64(ptr, old, new) \
6784 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6787 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
6792 struct x86_exception
*exception
)
6794 struct kvm_host_map map
;
6795 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6801 /* guests cmpxchg8b have to be emulated atomically */
6802 if (bytes
> 8 || (bytes
& (bytes
- 1)))
6805 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
6807 if (gpa
== UNMAPPED_GVA
||
6808 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6812 * Emulate the atomic as a straight write to avoid #AC if SLD is
6813 * enabled in the host and the access splits a cache line.
6815 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
6816 page_line_mask
= ~(cache_line_size() - 1);
6818 page_line_mask
= PAGE_MASK
;
6820 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
6823 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
6826 kaddr
= map
.hva
+ offset_in_page(gpa
);
6830 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
6833 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
6836 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
6839 exchanged
= CMPXCHG64(kaddr
, old
, new);
6845 kvm_vcpu_unmap(vcpu
, &map
, true);
6848 return X86EMUL_CMPXCHG_FAILED
;
6850 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
6852 return X86EMUL_CONTINUE
;
6855 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
6857 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
6860 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
6864 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
6865 if (vcpu
->arch
.pio
.in
)
6866 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
6867 vcpu
->arch
.pio
.size
, pd
);
6869 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
6870 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
6874 pd
+= vcpu
->arch
.pio
.size
;
6879 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
6880 unsigned short port
,
6881 unsigned int count
, bool in
)
6883 vcpu
->arch
.pio
.port
= port
;
6884 vcpu
->arch
.pio
.in
= in
;
6885 vcpu
->arch
.pio
.count
= count
;
6886 vcpu
->arch
.pio
.size
= size
;
6888 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
))
6891 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
6892 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
6893 vcpu
->run
->io
.size
= size
;
6894 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
6895 vcpu
->run
->io
.count
= count
;
6896 vcpu
->run
->io
.port
= port
;
6901 static int __emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6902 unsigned short port
, unsigned int count
)
6904 WARN_ON(vcpu
->arch
.pio
.count
);
6905 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
6906 return emulator_pio_in_out(vcpu
, size
, port
, count
, true);
6909 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
6911 int size
= vcpu
->arch
.pio
.size
;
6912 unsigned count
= vcpu
->arch
.pio
.count
;
6913 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
6914 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
6915 vcpu
->arch
.pio
.count
= 0;
6918 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6919 unsigned short port
, void *val
, unsigned int count
)
6921 if (vcpu
->arch
.pio
.count
) {
6923 * Complete a previous iteration that required userspace I/O.
6924 * Note, @count isn't guaranteed to match pio.count as userspace
6925 * can modify ECX before rerunning the vCPU. Ignore any such
6926 * shenanigans as KVM doesn't support modifying the rep count,
6927 * and the emulator ensures @count doesn't overflow the buffer.
6930 int r
= __emulator_pio_in(vcpu
, size
, port
, count
);
6934 /* Results already available, fall through. */
6937 complete_emulator_pio_in(vcpu
, val
);
6941 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
6942 int size
, unsigned short port
, void *val
,
6945 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6949 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
6950 unsigned short port
, const void *val
,
6955 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
6956 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
6957 ret
= emulator_pio_in_out(vcpu
, size
, port
, count
, false);
6959 vcpu
->arch
.pio
.count
= 0;
6964 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
6965 int size
, unsigned short port
,
6966 const void *val
, unsigned int count
)
6968 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6971 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
6973 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
6976 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
6978 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
6981 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
6983 if (!need_emulate_wbinvd(vcpu
))
6984 return X86EMUL_CONTINUE
;
6986 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
6987 int cpu
= get_cpu();
6989 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
6990 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
6991 wbinvd_ipi
, NULL
, 1);
6993 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
6996 return X86EMUL_CONTINUE
;
6999 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
7001 kvm_emulate_wbinvd_noskip(vcpu
);
7002 return kvm_skip_emulated_instruction(vcpu
);
7004 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
7008 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
7010 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
7013 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7014 unsigned long *dest
)
7016 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
7019 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7020 unsigned long value
)
7023 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
7026 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
7028 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
7031 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
7033 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7034 unsigned long value
;
7038 value
= kvm_read_cr0(vcpu
);
7041 value
= vcpu
->arch
.cr2
;
7044 value
= kvm_read_cr3(vcpu
);
7047 value
= kvm_read_cr4(vcpu
);
7050 value
= kvm_get_cr8(vcpu
);
7053 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7060 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
7062 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7067 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
7070 vcpu
->arch
.cr2
= val
;
7073 res
= kvm_set_cr3(vcpu
, val
);
7076 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
7079 res
= kvm_set_cr8(vcpu
, val
);
7082 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7089 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
7091 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
7094 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7096 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
7099 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7101 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
7104 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7106 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
7109 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7111 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
7114 static unsigned long emulator_get_cached_segment_base(
7115 struct x86_emulate_ctxt
*ctxt
, int seg
)
7117 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
7120 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
7121 struct desc_struct
*desc
, u32
*base3
,
7124 struct kvm_segment var
;
7126 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
7127 *selector
= var
.selector
;
7130 memset(desc
, 0, sizeof(*desc
));
7138 set_desc_limit(desc
, var
.limit
);
7139 set_desc_base(desc
, (unsigned long)var
.base
);
7140 #ifdef CONFIG_X86_64
7142 *base3
= var
.base
>> 32;
7144 desc
->type
= var
.type
;
7146 desc
->dpl
= var
.dpl
;
7147 desc
->p
= var
.present
;
7148 desc
->avl
= var
.avl
;
7156 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
7157 struct desc_struct
*desc
, u32 base3
,
7160 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7161 struct kvm_segment var
;
7163 var
.selector
= selector
;
7164 var
.base
= get_desc_base(desc
);
7165 #ifdef CONFIG_X86_64
7166 var
.base
|= ((u64
)base3
) << 32;
7168 var
.limit
= get_desc_limit(desc
);
7170 var
.limit
= (var
.limit
<< 12) | 0xfff;
7171 var
.type
= desc
->type
;
7172 var
.dpl
= desc
->dpl
;
7177 var
.avl
= desc
->avl
;
7178 var
.present
= desc
->p
;
7179 var
.unusable
= !var
.present
;
7182 kvm_set_segment(vcpu
, &var
, seg
);
7186 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
7187 u32 msr_index
, u64
*pdata
)
7189 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7192 r
= kvm_get_msr(vcpu
, msr_index
, pdata
);
7194 if (r
&& kvm_get_msr_user_space(vcpu
, msr_index
, r
)) {
7195 /* Bounce to user space */
7196 return X86EMUL_IO_NEEDED
;
7202 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
7203 u32 msr_index
, u64 data
)
7205 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7208 r
= kvm_set_msr(vcpu
, msr_index
, data
);
7210 if (r
&& kvm_set_msr_user_space(vcpu
, msr_index
, data
, r
)) {
7211 /* Bounce to user space */
7212 return X86EMUL_IO_NEEDED
;
7218 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
7220 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7222 return vcpu
->arch
.smbase
;
7225 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
7227 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7229 vcpu
->arch
.smbase
= smbase
;
7232 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
7235 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
7238 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
7239 u32 pmc
, u64
*pdata
)
7241 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
7244 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
7246 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
7249 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
7250 struct x86_instruction_info
*info
,
7251 enum x86_intercept_stage stage
)
7253 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
7257 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
7258 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
7261 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
7264 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
7266 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
7269 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
7271 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
7274 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
7276 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
7279 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt
*ctxt
)
7281 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_RDPID
);
7284 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
7286 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
7289 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
7291 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
7294 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
7296 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
7299 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
7301 return emul_to_vcpu(ctxt
)->arch
.hflags
;
7304 static void emulator_exiting_smm(struct x86_emulate_ctxt
*ctxt
)
7306 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7308 kvm_smm_changed(vcpu
, false);
7311 static int emulator_leave_smm(struct x86_emulate_ctxt
*ctxt
,
7312 const char *smstate
)
7314 return static_call(kvm_x86_leave_smm
)(emul_to_vcpu(ctxt
), smstate
);
7317 static void emulator_triple_fault(struct x86_emulate_ctxt
*ctxt
)
7319 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, emul_to_vcpu(ctxt
));
7322 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
7324 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
7327 static const struct x86_emulate_ops emulate_ops
= {
7328 .read_gpr
= emulator_read_gpr
,
7329 .write_gpr
= emulator_write_gpr
,
7330 .read_std
= emulator_read_std
,
7331 .write_std
= emulator_write_std
,
7332 .read_phys
= kvm_read_guest_phys_system
,
7333 .fetch
= kvm_fetch_guest_virt
,
7334 .read_emulated
= emulator_read_emulated
,
7335 .write_emulated
= emulator_write_emulated
,
7336 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
7337 .invlpg
= emulator_invlpg
,
7338 .pio_in_emulated
= emulator_pio_in_emulated
,
7339 .pio_out_emulated
= emulator_pio_out_emulated
,
7340 .get_segment
= emulator_get_segment
,
7341 .set_segment
= emulator_set_segment
,
7342 .get_cached_segment_base
= emulator_get_cached_segment_base
,
7343 .get_gdt
= emulator_get_gdt
,
7344 .get_idt
= emulator_get_idt
,
7345 .set_gdt
= emulator_set_gdt
,
7346 .set_idt
= emulator_set_idt
,
7347 .get_cr
= emulator_get_cr
,
7348 .set_cr
= emulator_set_cr
,
7349 .cpl
= emulator_get_cpl
,
7350 .get_dr
= emulator_get_dr
,
7351 .set_dr
= emulator_set_dr
,
7352 .get_smbase
= emulator_get_smbase
,
7353 .set_smbase
= emulator_set_smbase
,
7354 .set_msr
= emulator_set_msr
,
7355 .get_msr
= emulator_get_msr
,
7356 .check_pmc
= emulator_check_pmc
,
7357 .read_pmc
= emulator_read_pmc
,
7358 .halt
= emulator_halt
,
7359 .wbinvd
= emulator_wbinvd
,
7360 .fix_hypercall
= emulator_fix_hypercall
,
7361 .intercept
= emulator_intercept
,
7362 .get_cpuid
= emulator_get_cpuid
,
7363 .guest_has_long_mode
= emulator_guest_has_long_mode
,
7364 .guest_has_movbe
= emulator_guest_has_movbe
,
7365 .guest_has_fxsr
= emulator_guest_has_fxsr
,
7366 .guest_has_rdpid
= emulator_guest_has_rdpid
,
7367 .set_nmi_mask
= emulator_set_nmi_mask
,
7368 .get_hflags
= emulator_get_hflags
,
7369 .exiting_smm
= emulator_exiting_smm
,
7370 .leave_smm
= emulator_leave_smm
,
7371 .triple_fault
= emulator_triple_fault
,
7372 .set_xcr
= emulator_set_xcr
,
7375 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
7377 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
7379 * an sti; sti; sequence only disable interrupts for the first
7380 * instruction. So, if the last instruction, be it emulated or
7381 * not, left the system with the INT_STI flag enabled, it
7382 * means that the last instruction is an sti. We should not
7383 * leave the flag on in this case. The same goes for mov ss
7385 if (int_shadow
& mask
)
7387 if (unlikely(int_shadow
|| mask
)) {
7388 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
7390 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7394 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
7396 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7397 if (ctxt
->exception
.vector
== PF_VECTOR
)
7398 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
7400 if (ctxt
->exception
.error_code_valid
)
7401 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
7402 ctxt
->exception
.error_code
);
7404 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
7408 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7410 struct x86_emulate_ctxt
*ctxt
;
7412 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
7414 pr_err("kvm: failed to allocate vcpu's emulator\n");
7419 ctxt
->ops
= &emulate_ops
;
7420 vcpu
->arch
.emulate_ctxt
= ctxt
;
7425 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7427 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7430 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
7432 ctxt
->gpa_available
= false;
7433 ctxt
->eflags
= kvm_get_rflags(vcpu
);
7434 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
7436 ctxt
->eip
= kvm_rip_read(vcpu
);
7437 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
7438 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
7439 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
7440 cs_db
? X86EMUL_MODE_PROT32
:
7441 X86EMUL_MODE_PROT16
;
7442 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
7443 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
7444 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
7446 ctxt
->interruptibility
= 0;
7447 ctxt
->have_exception
= false;
7448 ctxt
->exception
.vector
= -1;
7449 ctxt
->perm_ok
= false;
7451 init_decode_cache(ctxt
);
7452 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7455 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
7457 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7460 init_emulate_ctxt(vcpu
);
7464 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
7465 ret
= emulate_int_real(ctxt
, irq
);
7467 if (ret
!= X86EMUL_CONTINUE
) {
7468 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
7470 ctxt
->eip
= ctxt
->_eip
;
7471 kvm_rip_write(vcpu
, ctxt
->eip
);
7472 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7475 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
7477 static void prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
)
7479 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7480 u32 insn_size
= ctxt
->fetch
.end
- ctxt
->fetch
.data
;
7481 struct kvm_run
*run
= vcpu
->run
;
7483 run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7484 run
->emulation_failure
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7485 run
->emulation_failure
.ndata
= 0;
7486 run
->emulation_failure
.flags
= 0;
7489 run
->emulation_failure
.ndata
= 3;
7490 run
->emulation_failure
.flags
|=
7491 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES
;
7492 run
->emulation_failure
.insn_size
= insn_size
;
7493 memset(run
->emulation_failure
.insn_bytes
, 0x90,
7494 sizeof(run
->emulation_failure
.insn_bytes
));
7495 memcpy(run
->emulation_failure
.insn_bytes
,
7496 ctxt
->fetch
.data
, insn_size
);
7500 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
7502 struct kvm
*kvm
= vcpu
->kvm
;
7504 ++vcpu
->stat
.insn_emulation_fail
;
7505 trace_kvm_emulate_insn_failed(vcpu
);
7507 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
7508 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7512 if (kvm
->arch
.exit_on_emulation_error
||
7513 (emulation_type
& EMULTYPE_SKIP
)) {
7514 prepare_emulation_failure_exit(vcpu
);
7518 kvm_queue_exception(vcpu
, UD_VECTOR
);
7520 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
7521 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7522 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7523 vcpu
->run
->internal
.ndata
= 0;
7530 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7531 bool write_fault_to_shadow_pgtable
,
7534 gpa_t gpa
= cr2_or_gpa
;
7537 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7540 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7541 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7544 if (!vcpu
->arch
.mmu
->direct_map
) {
7546 * Write permission should be allowed since only
7547 * write access need to be emulated.
7549 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7552 * If the mapping is invalid in guest, let cpu retry
7553 * it to generate fault.
7555 if (gpa
== UNMAPPED_GVA
)
7560 * Do not retry the unhandleable instruction if it faults on the
7561 * readonly host memory, otherwise it will goto a infinite loop:
7562 * retry instruction -> write #PF -> emulation fail -> retry
7563 * instruction -> ...
7565 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
7568 * If the instruction failed on the error pfn, it can not be fixed,
7569 * report the error to userspace.
7571 if (is_error_noslot_pfn(pfn
))
7574 kvm_release_pfn_clean(pfn
);
7576 /* The instructions are well-emulated on direct mmu. */
7577 if (vcpu
->arch
.mmu
->direct_map
) {
7578 unsigned int indirect_shadow_pages
;
7580 write_lock(&vcpu
->kvm
->mmu_lock
);
7581 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
7582 write_unlock(&vcpu
->kvm
->mmu_lock
);
7584 if (indirect_shadow_pages
)
7585 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7591 * if emulation was due to access to shadowed page table
7592 * and it failed try to unshadow page and re-enter the
7593 * guest to let CPU execute the instruction.
7595 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7598 * If the access faults on its page table, it can not
7599 * be fixed by unprotecting shadow page and it should
7600 * be reported to userspace.
7602 return !write_fault_to_shadow_pgtable
;
7605 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
7606 gpa_t cr2_or_gpa
, int emulation_type
)
7608 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7609 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
7611 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
7612 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
7615 * If the emulation is caused by #PF and it is non-page_table
7616 * writing instruction, it means the VM-EXIT is caused by shadow
7617 * page protected, we can zap the shadow page and retry this
7618 * instruction directly.
7620 * Note: if the guest uses a non-page-table modifying instruction
7621 * on the PDE that points to the instruction, then we will unmap
7622 * the instruction and go to an infinite loop. So, we cache the
7623 * last retried eip and the last fault address, if we meet the eip
7624 * and the address again, we can break out of the potential infinite
7627 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
7629 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7632 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7633 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7636 if (x86_page_table_writing_insn(ctxt
))
7639 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
7642 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
7643 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
7645 if (!vcpu
->arch
.mmu
->direct_map
)
7646 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7648 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7653 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
7654 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
7656 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
)
7658 trace_kvm_smm_transition(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, entering_smm
);
7661 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
7663 vcpu
->arch
.hflags
&= ~(HF_SMM_MASK
| HF_SMM_INSIDE_NMI_MASK
);
7665 /* Process a latched INIT or SMI, if any. */
7666 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7669 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7670 * on SMM exit we still need to reload them from
7673 vcpu
->arch
.pdptrs_from_userspace
= false;
7676 kvm_mmu_reset_context(vcpu
);
7679 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
7688 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
7689 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
7694 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
7696 struct kvm_run
*kvm_run
= vcpu
->run
;
7698 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
7699 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
7700 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
7701 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7702 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7705 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
7709 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
7711 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7714 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
7719 * rflags is the old, "raw" value of the flags. The new value has
7720 * not been saved yet.
7722 * This is correct even for TF set by the guest, because "the
7723 * processor will not generate this exception after the instruction
7724 * that sets the TF flag".
7726 if (unlikely(rflags
& X86_EFLAGS_TF
))
7727 r
= kvm_vcpu_do_singlestep(vcpu
);
7730 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
7732 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
7734 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
7735 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
7736 struct kvm_run
*kvm_run
= vcpu
->run
;
7737 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7738 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7739 vcpu
->arch
.guest_debug_dr7
,
7743 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
7744 kvm_run
->debug
.arch
.pc
= eip
;
7745 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7746 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7752 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
7753 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
7754 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7755 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7760 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
7769 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
7771 switch (ctxt
->opcode_len
) {
7778 case 0xe6: /* OUT */
7782 case 0x6c: /* INS */
7784 case 0x6e: /* OUTS */
7791 case 0x33: /* RDPMC */
7801 * Decode to be emulated instruction. Return EMULATION_OK if success.
7803 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
7804 void *insn
, int insn_len
)
7806 int r
= EMULATION_OK
;
7807 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7809 init_emulate_ctxt(vcpu
);
7812 * We will reenter on the same instruction since we do not set
7813 * complete_userspace_io. This does not handle watchpoints yet,
7814 * those would be handled in the emulate_ops.
7816 if (!(emulation_type
& EMULTYPE_SKIP
) &&
7817 kvm_vcpu_check_breakpoint(vcpu
, &r
))
7820 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
7822 trace_kvm_emulate_insn_start(vcpu
);
7823 ++vcpu
->stat
.insn_emulation
;
7827 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
7829 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7830 int emulation_type
, void *insn
, int insn_len
)
7833 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7834 bool writeback
= true;
7835 bool write_fault_to_spt
;
7837 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, insn
, insn_len
)))
7840 vcpu
->arch
.l1tf_flush_l1d
= true;
7843 * Clear write_fault_to_shadow_pgtable here to ensure it is
7846 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
7847 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
7849 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
7850 kvm_clear_exception_queue(vcpu
);
7852 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
7854 if (r
!= EMULATION_OK
) {
7855 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
7856 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
7857 kvm_queue_exception(vcpu
, UD_VECTOR
);
7860 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
7864 if (ctxt
->have_exception
) {
7866 * #UD should result in just EMULATION_FAILED, and trap-like
7867 * exception should not be encountered during decode.
7869 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
7870 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
7871 inject_emulated_exception(vcpu
);
7874 return handle_emulation_failure(vcpu
, emulation_type
);
7878 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
7879 !is_vmware_backdoor_opcode(ctxt
)) {
7880 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7885 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7886 * for kvm_skip_emulated_instruction(). The caller is responsible for
7887 * updating interruptibility state and injecting single-step #DBs.
7889 if (emulation_type
& EMULTYPE_SKIP
) {
7890 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
7891 ctxt
->eip
= (u32
)ctxt
->_eip
;
7893 ctxt
->eip
= ctxt
->_eip
;
7895 kvm_rip_write(vcpu
, ctxt
->eip
);
7896 if (ctxt
->eflags
& X86_EFLAGS_RF
)
7897 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
7901 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
7904 /* this is needed for vmware backdoor interface to work since it
7905 changes registers values during IO operation */
7906 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
7907 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7908 emulator_invalidate_register_cache(ctxt
);
7912 if (emulation_type
& EMULTYPE_PF
) {
7913 /* Save the faulting GPA (cr2) in the address field */
7914 ctxt
->exception
.address
= cr2_or_gpa
;
7916 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7917 if (vcpu
->arch
.mmu
->direct_map
) {
7918 ctxt
->gpa_available
= true;
7919 ctxt
->gpa_val
= cr2_or_gpa
;
7922 /* Sanitize the address out of an abundance of paranoia. */
7923 ctxt
->exception
.address
= 0;
7926 r
= x86_emulate_insn(ctxt
);
7928 if (r
== EMULATION_INTERCEPTED
)
7931 if (r
== EMULATION_FAILED
) {
7932 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
7936 return handle_emulation_failure(vcpu
, emulation_type
);
7939 if (ctxt
->have_exception
) {
7941 if (inject_emulated_exception(vcpu
))
7943 } else if (vcpu
->arch
.pio
.count
) {
7944 if (!vcpu
->arch
.pio
.in
) {
7945 /* FIXME: return into emulator if single-stepping. */
7946 vcpu
->arch
.pio
.count
= 0;
7949 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
7952 } else if (vcpu
->mmio_needed
) {
7953 ++vcpu
->stat
.mmio_exits
;
7955 if (!vcpu
->mmio_is_write
)
7958 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7959 } else if (vcpu
->arch
.complete_userspace_io
) {
7962 } else if (r
== EMULATION_RESTART
)
7968 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7969 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
7970 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7971 if (!ctxt
->have_exception
||
7972 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
7973 kvm_rip_write(vcpu
, ctxt
->eip
);
7974 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
7975 r
= kvm_vcpu_do_singlestep(vcpu
);
7976 if (kvm_x86_ops
.update_emulated_instruction
)
7977 static_call(kvm_x86_update_emulated_instruction
)(vcpu
);
7978 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
7982 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7983 * do nothing, and it will be requested again as soon as
7984 * the shadow expires. But we still need to check here,
7985 * because POPF has no interrupt shadow.
7987 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
7988 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7990 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
7995 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
7997 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
7999 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
8001 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
8002 void *insn
, int insn_len
)
8004 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
8006 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
8008 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
8010 vcpu
->arch
.pio
.count
= 0;
8014 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
8016 vcpu
->arch
.pio
.count
= 0;
8018 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
8021 return kvm_skip_emulated_instruction(vcpu
);
8024 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
8025 unsigned short port
)
8027 unsigned long val
= kvm_rax_read(vcpu
);
8028 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
8034 * Workaround userspace that relies on old KVM behavior of %rip being
8035 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8038 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
8039 vcpu
->arch
.complete_userspace_io
=
8040 complete_fast_pio_out_port_0x7e
;
8041 kvm_skip_emulated_instruction(vcpu
);
8043 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8044 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
8049 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
8053 /* We should only ever be called with arch.pio.count equal to 1 */
8054 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
8056 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
8057 vcpu
->arch
.pio
.count
= 0;
8061 /* For size less than 4 we merge, else we zero extend */
8062 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
8065 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8066 * the copy and tracing
8068 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
8069 kvm_rax_write(vcpu
, val
);
8071 return kvm_skip_emulated_instruction(vcpu
);
8074 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
8075 unsigned short port
)
8080 /* For size less than 4 we merge, else we zero extend */
8081 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
8083 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
8085 kvm_rax_write(vcpu
, val
);
8089 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8090 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
8095 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
8100 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
8102 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
8103 return ret
&& kvm_skip_emulated_instruction(vcpu
);
8105 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
8107 static int kvmclock_cpu_down_prep(unsigned int cpu
)
8109 __this_cpu_write(cpu_tsc_khz
, 0);
8113 static void tsc_khz_changed(void *data
)
8115 struct cpufreq_freqs
*freq
= data
;
8116 unsigned long khz
= 0;
8120 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8121 khz
= cpufreq_quick_get(raw_smp_processor_id());
8124 __this_cpu_write(cpu_tsc_khz
, khz
);
8127 #ifdef CONFIG_X86_64
8128 static void kvm_hyperv_tsc_notifier(void)
8131 struct kvm_vcpu
*vcpu
;
8133 unsigned long flags
;
8135 mutex_lock(&kvm_lock
);
8136 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8137 kvm_make_mclock_inprogress_request(kvm
);
8139 hyperv_stop_tsc_emulation();
8141 /* TSC frequency always matches when on Hyper-V */
8142 for_each_present_cpu(cpu
)
8143 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
8144 kvm_max_guest_tsc_khz
= tsc_khz
;
8146 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8147 struct kvm_arch
*ka
= &kvm
->arch
;
8149 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
8150 pvclock_update_vm_gtod_copy(kvm
);
8151 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
8153 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8154 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8156 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8157 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
8159 mutex_unlock(&kvm_lock
);
8163 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
8166 struct kvm_vcpu
*vcpu
;
8167 int i
, send_ipi
= 0;
8170 * We allow guests to temporarily run on slowing clocks,
8171 * provided we notify them after, or to run on accelerating
8172 * clocks, provided we notify them before. Thus time never
8175 * However, we have a problem. We can't atomically update
8176 * the frequency of a given CPU from this function; it is
8177 * merely a notifier, which can be called from any CPU.
8178 * Changing the TSC frequency at arbitrary points in time
8179 * requires a recomputation of local variables related to
8180 * the TSC for each VCPU. We must flag these local variables
8181 * to be updated and be sure the update takes place with the
8182 * new frequency before any guests proceed.
8184 * Unfortunately, the combination of hotplug CPU and frequency
8185 * change creates an intractable locking scenario; the order
8186 * of when these callouts happen is undefined with respect to
8187 * CPU hotplug, and they can race with each other. As such,
8188 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8189 * undefined; you can actually have a CPU frequency change take
8190 * place in between the computation of X and the setting of the
8191 * variable. To protect against this problem, all updates of
8192 * the per_cpu tsc_khz variable are done in an interrupt
8193 * protected IPI, and all callers wishing to update the value
8194 * must wait for a synchronous IPI to complete (which is trivial
8195 * if the caller is on the CPU already). This establishes the
8196 * necessary total order on variable updates.
8198 * Note that because a guest time update may take place
8199 * anytime after the setting of the VCPU's request bit, the
8200 * correct TSC value must be set before the request. However,
8201 * to ensure the update actually makes it to any guest which
8202 * starts running in hardware virtualization between the set
8203 * and the acquisition of the spinlock, we must also ping the
8204 * CPU after setting the request bit.
8208 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8210 mutex_lock(&kvm_lock
);
8211 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8212 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8213 if (vcpu
->cpu
!= cpu
)
8215 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8216 if (vcpu
->cpu
!= raw_smp_processor_id())
8220 mutex_unlock(&kvm_lock
);
8222 if (freq
->old
< freq
->new && send_ipi
) {
8224 * We upscale the frequency. Must make the guest
8225 * doesn't see old kvmclock values while running with
8226 * the new frequency, otherwise we risk the guest sees
8227 * time go backwards.
8229 * In case we update the frequency for another cpu
8230 * (which might be in guest context) send an interrupt
8231 * to kick the cpu out of guest context. Next time
8232 * guest context is entered kvmclock will be updated,
8233 * so the guest will not see stale values.
8235 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8239 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
8242 struct cpufreq_freqs
*freq
= data
;
8245 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
8247 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
8250 for_each_cpu(cpu
, freq
->policy
->cpus
)
8251 __kvmclock_cpufreq_notifier(freq
, cpu
);
8256 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
8257 .notifier_call
= kvmclock_cpufreq_notifier
8260 static int kvmclock_cpu_online(unsigned int cpu
)
8262 tsc_khz_changed(NULL
);
8266 static void kvm_timer_init(void)
8268 max_tsc_khz
= tsc_khz
;
8270 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
8271 #ifdef CONFIG_CPU_FREQ
8272 struct cpufreq_policy
*policy
;
8276 policy
= cpufreq_cpu_get(cpu
);
8278 if (policy
->cpuinfo
.max_freq
)
8279 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
8280 cpufreq_cpu_put(policy
);
8284 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
8285 CPUFREQ_TRANSITION_NOTIFIER
);
8288 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
8289 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
8292 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
8293 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
8295 int kvm_is_in_guest(void)
8297 return __this_cpu_read(current_vcpu
) != NULL
;
8300 static int kvm_is_user_mode(void)
8304 if (__this_cpu_read(current_vcpu
))
8305 user_mode
= static_call(kvm_x86_get_cpl
)(__this_cpu_read(current_vcpu
));
8307 return user_mode
!= 0;
8310 static unsigned long kvm_get_guest_ip(void)
8312 unsigned long ip
= 0;
8314 if (__this_cpu_read(current_vcpu
))
8315 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
8320 static void kvm_handle_intel_pt_intr(void)
8322 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
8324 kvm_make_request(KVM_REQ_PMI
, vcpu
);
8325 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
8326 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
8329 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
8330 .is_in_guest
= kvm_is_in_guest
,
8331 .is_user_mode
= kvm_is_user_mode
,
8332 .get_guest_ip
= kvm_get_guest_ip
,
8333 .handle_intel_pt_intr
= NULL
,
8336 #ifdef CONFIG_X86_64
8337 static void pvclock_gtod_update_fn(struct work_struct
*work
)
8341 struct kvm_vcpu
*vcpu
;
8344 mutex_lock(&kvm_lock
);
8345 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8346 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8347 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8348 atomic_set(&kvm_guest_has_master_clock
, 0);
8349 mutex_unlock(&kvm_lock
);
8352 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
8355 * Indirection to move queue_work() out of the tk_core.seq write held
8356 * region to prevent possible deadlocks against time accessors which
8357 * are invoked with work related locks held.
8359 static void pvclock_irq_work_fn(struct irq_work
*w
)
8361 queue_work(system_long_wq
, &pvclock_gtod_work
);
8364 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
8367 * Notification about pvclock gtod data update.
8369 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
8372 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
8373 struct timekeeper
*tk
= priv
;
8375 update_pvclock_gtod(tk
);
8378 * Disable master clock if host does not trust, or does not use,
8379 * TSC based clocksource. Delegate queue_work() to irq_work as
8380 * this is invoked with tk_core.seq write held.
8382 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
8383 atomic_read(&kvm_guest_has_master_clock
) != 0)
8384 irq_work_queue(&pvclock_irq_work
);
8388 static struct notifier_block pvclock_gtod_notifier
= {
8389 .notifier_call
= pvclock_gtod_notify
,
8393 int kvm_arch_init(void *opaque
)
8395 struct kvm_x86_init_ops
*ops
= opaque
;
8398 if (kvm_x86_ops
.hardware_enable
) {
8399 printk(KERN_ERR
"kvm: already loaded the other module\n");
8404 if (!ops
->cpu_has_kvm_support()) {
8405 pr_err_ratelimited("kvm: no hardware support\n");
8409 if (ops
->disabled_by_bios()) {
8410 pr_warn_ratelimited("kvm: disabled by bios\n");
8416 * KVM explicitly assumes that the guest has an FPU and
8417 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8418 * vCPU's FPU state as a fxregs_state struct.
8420 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
8421 printk(KERN_ERR
"kvm: inadequate fpu\n");
8428 x86_emulator_cache
= kvm_alloc_emulator_cache();
8429 if (!x86_emulator_cache
) {
8430 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8434 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
8435 if (!user_return_msrs
) {
8436 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
8437 goto out_free_x86_emulator_cache
;
8439 kvm_nr_uret_msrs
= 0;
8441 r
= kvm_mmu_module_init();
8443 goto out_free_percpu
;
8447 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
8448 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
8449 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
8452 if (pi_inject_timer
== -1)
8453 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
8454 #ifdef CONFIG_X86_64
8455 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
8457 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8458 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
8464 free_percpu(user_return_msrs
);
8465 out_free_x86_emulator_cache
:
8466 kmem_cache_destroy(x86_emulator_cache
);
8471 void kvm_arch_exit(void)
8473 #ifdef CONFIG_X86_64
8474 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8475 clear_hv_tscchange_cb();
8479 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8480 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
8481 CPUFREQ_TRANSITION_NOTIFIER
);
8482 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
8483 #ifdef CONFIG_X86_64
8484 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
8485 irq_work_sync(&pvclock_irq_work
);
8486 cancel_work_sync(&pvclock_gtod_work
);
8488 kvm_x86_ops
.hardware_enable
= NULL
;
8489 kvm_mmu_module_exit();
8490 free_percpu(user_return_msrs
);
8491 kmem_cache_destroy(x86_emulator_cache
);
8492 #ifdef CONFIG_KVM_XEN
8493 static_key_deferred_flush(&kvm_xen_enabled
);
8494 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
8498 static int __kvm_vcpu_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
8500 ++vcpu
->stat
.halt_exits
;
8501 if (lapic_in_kernel(vcpu
)) {
8502 vcpu
->arch
.mp_state
= state
;
8505 vcpu
->run
->exit_reason
= reason
;
8510 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
8512 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
8514 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
8516 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
8518 int ret
= kvm_skip_emulated_instruction(vcpu
);
8520 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8521 * KVM_EXIT_DEBUG here.
8523 return kvm_vcpu_halt(vcpu
) && ret
;
8525 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
8527 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
8529 int ret
= kvm_skip_emulated_instruction(vcpu
);
8531 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
, KVM_EXIT_AP_RESET_HOLD
) && ret
;
8533 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
8535 #ifdef CONFIG_X86_64
8536 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
8537 unsigned long clock_type
)
8539 struct kvm_clock_pairing clock_pairing
;
8540 struct timespec64 ts
;
8544 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
8545 return -KVM_EOPNOTSUPP
;
8548 * When tsc is in permanent catchup mode guests won't be able to use
8549 * pvclock_read_retry loop to get consistent view of pvclock
8551 if (vcpu
->arch
.tsc_always_catchup
)
8552 return -KVM_EOPNOTSUPP
;
8554 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
8555 return -KVM_EOPNOTSUPP
;
8557 clock_pairing
.sec
= ts
.tv_sec
;
8558 clock_pairing
.nsec
= ts
.tv_nsec
;
8559 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
8560 clock_pairing
.flags
= 0;
8561 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
8564 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
8565 sizeof(struct kvm_clock_pairing
)))
8573 * kvm_pv_kick_cpu_op: Kick a vcpu.
8575 * @apicid - apicid of vcpu to be kicked.
8577 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
8579 struct kvm_lapic_irq lapic_irq
;
8581 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
8582 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
8583 lapic_irq
.level
= 0;
8584 lapic_irq
.dest_id
= apicid
;
8585 lapic_irq
.msi_redir_hint
= false;
8587 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
8588 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
8591 bool kvm_apicv_activated(struct kvm
*kvm
)
8593 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
8595 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
8597 static void kvm_apicv_init(struct kvm
*kvm
)
8599 mutex_init(&kvm
->arch
.apicv_update_lock
);
8602 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
8603 &kvm
->arch
.apicv_inhibit_reasons
);
8605 set_bit(APICV_INHIBIT_REASON_DISABLE
,
8606 &kvm
->arch
.apicv_inhibit_reasons
);
8609 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
8611 struct kvm_vcpu
*target
= NULL
;
8612 struct kvm_apic_map
*map
;
8614 vcpu
->stat
.directed_yield_attempted
++;
8616 if (single_task_running())
8620 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
8622 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
8623 target
= map
->phys_map
[dest_id
]->vcpu
;
8627 if (!target
|| !READ_ONCE(target
->ready
))
8630 /* Ignore requests to yield to self */
8634 if (kvm_vcpu_yield_to(target
) <= 0)
8637 vcpu
->stat
.directed_yield_successful
++;
8643 static int complete_hypercall_exit(struct kvm_vcpu
*vcpu
)
8645 u64 ret
= vcpu
->run
->hypercall
.ret
;
8647 if (!is_64_bit_mode(vcpu
))
8649 kvm_rax_write(vcpu
, ret
);
8650 ++vcpu
->stat
.hypercalls
;
8651 return kvm_skip_emulated_instruction(vcpu
);
8654 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
8656 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
8659 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
8660 return kvm_xen_hypercall(vcpu
);
8662 if (kvm_hv_hypercall_enabled(vcpu
))
8663 return kvm_hv_hypercall(vcpu
);
8665 nr
= kvm_rax_read(vcpu
);
8666 a0
= kvm_rbx_read(vcpu
);
8667 a1
= kvm_rcx_read(vcpu
);
8668 a2
= kvm_rdx_read(vcpu
);
8669 a3
= kvm_rsi_read(vcpu
);
8671 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
8673 op_64_bit
= is_64_bit_hypercall(vcpu
);
8682 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
8690 case KVM_HC_VAPIC_POLL_IRQ
:
8693 case KVM_HC_KICK_CPU
:
8694 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
8697 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
8698 kvm_sched_yield(vcpu
, a1
);
8701 #ifdef CONFIG_X86_64
8702 case KVM_HC_CLOCK_PAIRING
:
8703 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
8706 case KVM_HC_SEND_IPI
:
8707 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
8710 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
8712 case KVM_HC_SCHED_YIELD
:
8713 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
8716 kvm_sched_yield(vcpu
, a0
);
8719 case KVM_HC_MAP_GPA_RANGE
: {
8720 u64 gpa
= a0
, npages
= a1
, attrs
= a2
;
8723 if (!(vcpu
->kvm
->arch
.hypercall_exit_enabled
& (1 << KVM_HC_MAP_GPA_RANGE
)))
8726 if (!PAGE_ALIGNED(gpa
) || !npages
||
8727 gpa_to_gfn(gpa
) + npages
<= gpa_to_gfn(gpa
)) {
8732 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERCALL
;
8733 vcpu
->run
->hypercall
.nr
= KVM_HC_MAP_GPA_RANGE
;
8734 vcpu
->run
->hypercall
.args
[0] = gpa
;
8735 vcpu
->run
->hypercall
.args
[1] = npages
;
8736 vcpu
->run
->hypercall
.args
[2] = attrs
;
8737 vcpu
->run
->hypercall
.longmode
= op_64_bit
;
8738 vcpu
->arch
.complete_userspace_io
= complete_hypercall_exit
;
8748 kvm_rax_write(vcpu
, ret
);
8750 ++vcpu
->stat
.hypercalls
;
8751 return kvm_skip_emulated_instruction(vcpu
);
8753 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
8755 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
8757 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8758 char instruction
[3];
8759 unsigned long rip
= kvm_rip_read(vcpu
);
8761 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
8763 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
8767 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
8769 return vcpu
->run
->request_interrupt_window
&&
8770 likely(!pic_in_kernel(vcpu
->kvm
));
8773 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
8775 struct kvm_run
*kvm_run
= vcpu
->run
;
8777 kvm_run
->if_flag
= static_call(kvm_x86_get_if_flag
)(vcpu
);
8778 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
8779 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
8782 * The call to kvm_ready_for_interrupt_injection() may end up in
8783 * kvm_xen_has_interrupt() which may require the srcu lock to be
8784 * held, to protect against changes in the vcpu_info address.
8786 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8787 kvm_run
->ready_for_interrupt_injection
=
8788 pic_in_kernel(vcpu
->kvm
) ||
8789 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
8790 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8793 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
8796 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
8800 if (!kvm_x86_ops
.update_cr8_intercept
)
8803 if (!lapic_in_kernel(vcpu
))
8806 if (vcpu
->arch
.apicv_active
)
8809 if (!vcpu
->arch
.apic
->vapic_addr
)
8810 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
8817 tpr
= kvm_lapic_get_cr8(vcpu
);
8819 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
8823 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
8825 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8826 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
8830 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
8833 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
8835 if (vcpu
->arch
.exception
.error_code
&& !is_protmode(vcpu
))
8836 vcpu
->arch
.exception
.error_code
= false;
8837 static_call(kvm_x86_queue_exception
)(vcpu
);
8840 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
8843 bool can_inject
= true;
8845 /* try to reinject previous events if any */
8847 if (vcpu
->arch
.exception
.injected
) {
8848 kvm_inject_exception(vcpu
);
8852 * Do not inject an NMI or interrupt if there is a pending
8853 * exception. Exceptions and interrupts are recognized at
8854 * instruction boundaries, i.e. the start of an instruction.
8855 * Trap-like exceptions, e.g. #DB, have higher priority than
8856 * NMIs and interrupts, i.e. traps are recognized before an
8857 * NMI/interrupt that's pending on the same instruction.
8858 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8859 * priority, but are only generated (pended) during instruction
8860 * execution, i.e. a pending fault-like exception means the
8861 * fault occurred on the *previous* instruction and must be
8862 * serviced prior to recognizing any new events in order to
8863 * fully complete the previous instruction.
8865 else if (!vcpu
->arch
.exception
.pending
) {
8866 if (vcpu
->arch
.nmi_injected
) {
8867 static_call(kvm_x86_set_nmi
)(vcpu
);
8869 } else if (vcpu
->arch
.interrupt
.injected
) {
8870 static_call(kvm_x86_set_irq
)(vcpu
);
8875 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
8876 vcpu
->arch
.exception
.pending
);
8879 * Call check_nested_events() even if we reinjected a previous event
8880 * in order for caller to determine if it should require immediate-exit
8881 * from L2 to L1 due to pending L1 events which require exit
8884 if (is_guest_mode(vcpu
)) {
8885 r
= kvm_check_nested_events(vcpu
);
8890 /* try to inject new event if pending */
8891 if (vcpu
->arch
.exception
.pending
) {
8892 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
8893 vcpu
->arch
.exception
.has_error_code
,
8894 vcpu
->arch
.exception
.error_code
);
8896 vcpu
->arch
.exception
.pending
= false;
8897 vcpu
->arch
.exception
.injected
= true;
8899 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
8900 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
8903 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
8904 kvm_deliver_exception_payload(vcpu
);
8905 if (vcpu
->arch
.dr7
& DR7_GD
) {
8906 vcpu
->arch
.dr7
&= ~DR7_GD
;
8907 kvm_update_dr7(vcpu
);
8911 kvm_inject_exception(vcpu
);
8915 /* Don't inject interrupts if the user asked to avoid doing so */
8916 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
)
8920 * Finally, inject interrupt events. If an event cannot be injected
8921 * due to architectural conditions (e.g. IF=0) a window-open exit
8922 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
8923 * and can architecturally be injected, but we cannot do it right now:
8924 * an interrupt could have arrived just now and we have to inject it
8925 * as a vmexit, or there could already an event in the queue, which is
8926 * indicated by can_inject. In that case we request an immediate exit
8927 * in order to make progress and get back here for another iteration.
8928 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8930 if (vcpu
->arch
.smi_pending
) {
8931 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
8935 vcpu
->arch
.smi_pending
= false;
8936 ++vcpu
->arch
.smi_count
;
8940 static_call(kvm_x86_enable_smi_window
)(vcpu
);
8943 if (vcpu
->arch
.nmi_pending
) {
8944 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
8948 --vcpu
->arch
.nmi_pending
;
8949 vcpu
->arch
.nmi_injected
= true;
8950 static_call(kvm_x86_set_nmi
)(vcpu
);
8952 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
8954 if (vcpu
->arch
.nmi_pending
)
8955 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
8958 if (kvm_cpu_has_injectable_intr(vcpu
)) {
8959 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
8963 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
8964 static_call(kvm_x86_set_irq
)(vcpu
);
8965 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
8967 if (kvm_cpu_has_injectable_intr(vcpu
))
8968 static_call(kvm_x86_enable_irq_window
)(vcpu
);
8971 if (is_guest_mode(vcpu
) &&
8972 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
8973 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
8974 *req_immediate_exit
= true;
8976 WARN_ON(vcpu
->arch
.exception
.pending
);
8981 *req_immediate_exit
= true;
8987 static void process_nmi(struct kvm_vcpu
*vcpu
)
8992 * x86 is limited to one NMI running, and one NMI pending after it.
8993 * If an NMI is already in progress, limit further NMIs to just one.
8994 * Otherwise, allow two (and we'll inject the first one immediately).
8996 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
8999 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
9000 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
9001 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9004 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
9007 flags
|= seg
->g
<< 23;
9008 flags
|= seg
->db
<< 22;
9009 flags
|= seg
->l
<< 21;
9010 flags
|= seg
->avl
<< 20;
9011 flags
|= seg
->present
<< 15;
9012 flags
|= seg
->dpl
<< 13;
9013 flags
|= seg
->s
<< 12;
9014 flags
|= seg
->type
<< 8;
9018 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9020 struct kvm_segment seg
;
9023 kvm_get_segment(vcpu
, &seg
, n
);
9024 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
9027 offset
= 0x7f84 + n
* 12;
9029 offset
= 0x7f2c + (n
- 3) * 12;
9031 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
9032 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9033 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
9036 #ifdef CONFIG_X86_64
9037 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9039 struct kvm_segment seg
;
9043 kvm_get_segment(vcpu
, &seg
, n
);
9044 offset
= 0x7e00 + n
* 16;
9046 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
9047 put_smstate(u16
, buf
, offset
, seg
.selector
);
9048 put_smstate(u16
, buf
, offset
+ 2, flags
);
9049 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9050 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
9054 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
9057 struct kvm_segment seg
;
9061 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
9062 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
9063 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
9064 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
9066 for (i
= 0; i
< 8; i
++)
9067 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read_raw(vcpu
, i
));
9069 kvm_get_dr(vcpu
, 6, &val
);
9070 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
9071 kvm_get_dr(vcpu
, 7, &val
);
9072 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
9074 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9075 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
9076 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
9077 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
9078 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
9080 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9081 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
9082 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
9083 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
9084 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
9086 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9087 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
9088 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
9090 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9091 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
9092 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
9094 for (i
= 0; i
< 6; i
++)
9095 enter_smm_save_seg_32(vcpu
, buf
, i
);
9097 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
9100 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
9101 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
9104 #ifdef CONFIG_X86_64
9105 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
9108 struct kvm_segment seg
;
9112 for (i
= 0; i
< 16; i
++)
9113 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read_raw(vcpu
, i
));
9115 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
9116 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
9118 kvm_get_dr(vcpu
, 6, &val
);
9119 put_smstate(u64
, buf
, 0x7f68, val
);
9120 kvm_get_dr(vcpu
, 7, &val
);
9121 put_smstate(u64
, buf
, 0x7f60, val
);
9123 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
9124 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
9125 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
9127 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
9130 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
9132 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
9134 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9135 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
9136 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
9137 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
9138 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
9140 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9141 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
9142 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
9144 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9145 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
9146 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
9147 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
9148 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
9150 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9151 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
9152 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
9154 for (i
= 0; i
< 6; i
++)
9155 enter_smm_save_seg_64(vcpu
, buf
, i
);
9159 static void enter_smm(struct kvm_vcpu
*vcpu
)
9161 struct kvm_segment cs
, ds
;
9166 memset(buf
, 0, 512);
9167 #ifdef CONFIG_X86_64
9168 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9169 enter_smm_save_state_64(vcpu
, buf
);
9172 enter_smm_save_state_32(vcpu
, buf
);
9175 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9176 * state (e.g. leave guest mode) after we've saved the state into the
9177 * SMM state-save area.
9179 static_call(kvm_x86_enter_smm
)(vcpu
, buf
);
9181 kvm_smm_changed(vcpu
, true);
9182 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
9184 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
))
9185 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
9187 static_call(kvm_x86_set_nmi_mask
)(vcpu
, true);
9189 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
9190 kvm_rip_write(vcpu
, 0x8000);
9192 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
9193 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
9194 vcpu
->arch
.cr0
= cr0
;
9196 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
9198 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9199 dt
.address
= dt
.size
= 0;
9200 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
9202 kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
9204 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
9205 cs
.base
= vcpu
->arch
.smbase
;
9210 cs
.limit
= ds
.limit
= 0xffffffff;
9211 cs
.type
= ds
.type
= 0x3;
9212 cs
.dpl
= ds
.dpl
= 0;
9217 cs
.avl
= ds
.avl
= 0;
9218 cs
.present
= ds
.present
= 1;
9219 cs
.unusable
= ds
.unusable
= 0;
9220 cs
.padding
= ds
.padding
= 0;
9222 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9223 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
9224 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
9225 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
9226 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
9227 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
9229 #ifdef CONFIG_X86_64
9230 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9231 static_call(kvm_x86_set_efer
)(vcpu
, 0);
9234 kvm_update_cpuid_runtime(vcpu
);
9235 kvm_mmu_reset_context(vcpu
);
9238 static void process_smi(struct kvm_vcpu
*vcpu
)
9240 vcpu
->arch
.smi_pending
= true;
9241 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9244 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
9245 unsigned long *vcpu_bitmap
)
9249 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
9251 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
9252 NULL
, vcpu_bitmap
, cpus
);
9254 free_cpumask_var(cpus
);
9257 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
9259 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
9262 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
9266 if (!lapic_in_kernel(vcpu
))
9269 mutex_lock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9271 activate
= kvm_apicv_activated(vcpu
->kvm
);
9272 if (vcpu
->arch
.apicv_active
== activate
)
9275 vcpu
->arch
.apicv_active
= activate
;
9276 kvm_apic_update_apicv(vcpu
);
9277 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
9280 * When APICv gets disabled, we may still have injected interrupts
9281 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9282 * still active when the interrupt got accepted. Make sure
9283 * inject_pending_event() is called to check for that.
9285 if (!vcpu
->arch
.apicv_active
)
9286 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9289 mutex_unlock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9291 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
9293 void __kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9295 unsigned long old
, new;
9297 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
9298 !static_call(kvm_x86_check_apicv_inhibit_reasons
)(bit
))
9301 old
= new = kvm
->arch
.apicv_inhibit_reasons
;
9304 __clear_bit(bit
, &new);
9306 __set_bit(bit
, &new);
9308 if (!!old
!= !!new) {
9309 trace_kvm_apicv_update_request(activate
, bit
);
9310 kvm_make_all_cpus_request(kvm
, KVM_REQ_APICV_UPDATE
);
9311 kvm
->arch
.apicv_inhibit_reasons
= new;
9313 unsigned long gfn
= gpa_to_gfn(APIC_DEFAULT_PHYS_BASE
);
9314 kvm_zap_gfn_range(kvm
, gfn
, gfn
+1);
9317 kvm
->arch
.apicv_inhibit_reasons
= new;
9319 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update
);
9321 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9323 mutex_lock(&kvm
->arch
.apicv_update_lock
);
9324 __kvm_request_apicv_update(kvm
, activate
, bit
);
9325 mutex_unlock(&kvm
->arch
.apicv_update_lock
);
9327 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
9329 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
9331 if (!kvm_apic_present(vcpu
))
9334 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
9336 if (irqchip_split(vcpu
->kvm
))
9337 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9339 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9340 if (ioapic_in_kernel(vcpu
->kvm
))
9341 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9344 if (is_guest_mode(vcpu
))
9345 vcpu
->arch
.load_eoi_exitmap_pending
= true;
9347 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
9350 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
9352 u64 eoi_exit_bitmap
[4];
9354 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
9357 if (to_hv_vcpu(vcpu
)) {
9358 bitmap_or((ulong
*)eoi_exit_bitmap
,
9359 vcpu
->arch
.ioapic_handled_vectors
,
9360 to_hv_synic(vcpu
)->vec_bitmap
, 256);
9361 static_call(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
9365 static_call(kvm_x86_load_eoi_exitmap
)(
9366 vcpu
, (u64
*)vcpu
->arch
.ioapic_handled_vectors
);
9369 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
9370 unsigned long start
, unsigned long end
)
9372 unsigned long apic_address
;
9375 * The physical address of apic access page is stored in the VMCS.
9376 * Update it when it becomes invalid.
9378 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
9379 if (start
<= apic_address
&& apic_address
< end
)
9380 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
9383 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
9385 if (!lapic_in_kernel(vcpu
))
9388 if (!kvm_x86_ops
.set_apic_access_page_addr
)
9391 static_call(kvm_x86_set_apic_access_page_addr
)(vcpu
);
9394 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
9396 smp_send_reschedule(vcpu
->cpu
);
9398 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
9401 * Returns 1 to let vcpu_run() continue the guest execution loop without
9402 * exiting to the userspace. Otherwise, the value will be returned to the
9405 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
9409 dm_request_for_irq_injection(vcpu
) &&
9410 kvm_cpu_accept_dm_intr(vcpu
);
9411 fastpath_t exit_fastpath
;
9413 bool req_immediate_exit
= false;
9415 /* Forbid vmenter if vcpu dirty ring is soft-full */
9416 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
9417 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
9418 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
9419 trace_kvm_dirty_ring_exit(vcpu
);
9424 if (kvm_request_pending(vcpu
)) {
9425 if (kvm_check_request(KVM_REQ_VM_BUGGED
, vcpu
)) {
9429 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
9430 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
9435 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
9436 kvm_mmu_unload(vcpu
);
9437 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
9438 __kvm_migrate_timers(vcpu
);
9439 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
9440 kvm_gen_update_masterclock(vcpu
->kvm
);
9441 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
9442 kvm_gen_kvmclock_update(vcpu
);
9443 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
9444 r
= kvm_guest_time_update(vcpu
);
9448 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
9449 kvm_mmu_sync_roots(vcpu
);
9450 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
9451 kvm_mmu_load_pgd(vcpu
);
9452 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
9453 kvm_vcpu_flush_tlb_all(vcpu
);
9455 /* Flushing all ASIDs flushes the current ASID... */
9456 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
9458 kvm_service_local_tlb_flush_requests(vcpu
);
9460 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
9461 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
9465 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
9466 if (is_guest_mode(vcpu
)) {
9467 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
9469 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
9470 vcpu
->mmio_needed
= 0;
9475 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
9476 /* Page is swapped out. Do synthetic halt */
9477 vcpu
->arch
.apf
.halted
= true;
9481 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
9482 record_steal_time(vcpu
);
9483 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
9485 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
9487 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
9488 kvm_pmu_handle_event(vcpu
);
9489 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
9490 kvm_pmu_deliver_pmi(vcpu
);
9491 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
9492 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
9493 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
9494 vcpu
->arch
.ioapic_handled_vectors
)) {
9495 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
9496 vcpu
->run
->eoi
.vector
=
9497 vcpu
->arch
.pending_ioapic_eoi
;
9502 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
9503 vcpu_scan_ioapic(vcpu
);
9504 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
9505 vcpu_load_eoi_exitmap(vcpu
);
9506 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
9507 kvm_vcpu_reload_apic_access_page(vcpu
);
9508 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
9509 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9510 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
9514 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
9515 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9516 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
9520 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
9521 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
9523 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
9524 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
9530 * KVM_REQ_HV_STIMER has to be processed after
9531 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9532 * depend on the guest clock being up-to-date
9534 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
9535 kvm_hv_process_stimers(vcpu
);
9536 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
9537 kvm_vcpu_update_apicv(vcpu
);
9538 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
9539 kvm_check_async_pf_completion(vcpu
);
9540 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
9541 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
9543 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
9544 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
9547 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
9548 kvm_xen_has_interrupt(vcpu
)) {
9549 ++vcpu
->stat
.req_event
;
9550 r
= kvm_apic_accept_events(vcpu
);
9555 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
9560 r
= inject_pending_event(vcpu
, &req_immediate_exit
);
9566 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9568 if (kvm_lapic_enabled(vcpu
)) {
9569 update_cr8_intercept(vcpu
);
9570 kvm_lapic_sync_to_vapic(vcpu
);
9574 r
= kvm_mmu_reload(vcpu
);
9576 goto cancel_injection
;
9581 static_call(kvm_x86_prepare_guest_switch
)(vcpu
);
9584 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9585 * IPI are then delayed after guest entry, which ensures that they
9586 * result in virtual interrupt delivery.
9588 local_irq_disable();
9589 vcpu
->mode
= IN_GUEST_MODE
;
9591 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9594 * 1) We should set ->mode before checking ->requests. Please see
9595 * the comment in kvm_vcpu_exiting_guest_mode().
9597 * 2) For APICv, we should set ->mode before checking PID.ON. This
9598 * pairs with the memory barrier implicit in pi_test_and_set_on
9599 * (see vmx_deliver_posted_interrupt).
9601 * 3) This also orders the write to mode from any reads to the page
9602 * tables done while the VCPU is running. Please see the comment
9603 * in kvm_flush_remote_tlbs.
9605 smp_mb__after_srcu_read_unlock();
9608 * This handles the case where a posted interrupt was
9609 * notified with kvm_vcpu_kick. Assigned devices can
9610 * use the POSTED_INTR_VECTOR even if APICv is disabled,
9611 * so do it even if APICv is disabled on this vCPU.
9613 if (kvm_lapic_enabled(vcpu
))
9614 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9616 if (kvm_vcpu_exit_request(vcpu
)) {
9617 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9621 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9623 goto cancel_injection
;
9626 if (req_immediate_exit
) {
9627 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9628 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
9631 fpregs_assert_state_consistent();
9632 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9633 switch_fpu_return();
9635 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
9637 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
9638 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
9639 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
9640 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
9641 } else if (unlikely(hw_breakpoint_active())) {
9646 exit_fastpath
= static_call(kvm_x86_run
)(vcpu
);
9647 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
9650 if (kvm_lapic_enabled(vcpu
))
9651 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9653 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
9654 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
9660 * Do this here before restoring debug registers on the host. And
9661 * since we do this before handling the vmexit, a DR access vmexit
9662 * can (a) read the correct value of the debug registers, (b) set
9663 * KVM_DEBUGREG_WONT_EXIT again.
9665 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
9666 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
9667 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
9668 kvm_update_dr0123(vcpu
);
9669 kvm_update_dr7(vcpu
);
9673 * If the guest has used debug registers, at least dr7
9674 * will be disabled while returning to the host.
9675 * If we don't have active breakpoints in the host, we don't
9676 * care about the messed up debug address registers. But if
9677 * we have some of them active, restore the old state.
9679 if (hw_breakpoint_active())
9680 hw_breakpoint_restore();
9682 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
9683 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
9685 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9688 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
9691 * Consume any pending interrupts, including the possible source of
9692 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9693 * An instruction is required after local_irq_enable() to fully unblock
9694 * interrupts on processors that implement an interrupt shadow, the
9695 * stat.exits increment will do nicely.
9697 kvm_before_interrupt(vcpu
);
9700 local_irq_disable();
9701 kvm_after_interrupt(vcpu
);
9704 * Wait until after servicing IRQs to account guest time so that any
9705 * ticks that occurred while running the guest are properly accounted
9706 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9707 * of accounting via context tracking, but the loss of accuracy is
9708 * acceptable for all known use cases.
9710 vtime_account_guest_exit();
9712 if (lapic_in_kernel(vcpu
)) {
9713 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
9714 if (delta
!= S64_MIN
) {
9715 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
9716 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
9723 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9726 * Profile KVM exit RIPs:
9728 if (unlikely(prof_on
== KVM_PROFILING
)) {
9729 unsigned long rip
= kvm_rip_read(vcpu
);
9730 profile_hit(KVM_PROFILING
, (void *)rip
);
9733 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
9734 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9736 if (vcpu
->arch
.apic_attention
)
9737 kvm_lapic_sync_from_vapic(vcpu
);
9739 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
9743 if (req_immediate_exit
)
9744 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9745 static_call(kvm_x86_cancel_injection
)(vcpu
);
9746 if (unlikely(vcpu
->arch
.apic_attention
))
9747 kvm_lapic_sync_from_vapic(vcpu
);
9752 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
9754 if (!kvm_arch_vcpu_runnable(vcpu
) &&
9755 (!kvm_x86_ops
.pre_block
|| static_call(kvm_x86_pre_block
)(vcpu
) == 0)) {
9756 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9757 kvm_vcpu_block(vcpu
);
9758 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9760 if (kvm_x86_ops
.post_block
)
9761 static_call(kvm_x86_post_block
)(vcpu
);
9763 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
9767 if (kvm_apic_accept_events(vcpu
) < 0)
9769 switch(vcpu
->arch
.mp_state
) {
9770 case KVM_MP_STATE_HALTED
:
9771 case KVM_MP_STATE_AP_RESET_HOLD
:
9772 vcpu
->arch
.pv
.pv_unhalted
= false;
9773 vcpu
->arch
.mp_state
=
9774 KVM_MP_STATE_RUNNABLE
;
9776 case KVM_MP_STATE_RUNNABLE
:
9777 vcpu
->arch
.apf
.halted
= false;
9779 case KVM_MP_STATE_INIT_RECEIVED
:
9787 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
9789 if (is_guest_mode(vcpu
))
9790 kvm_check_nested_events(vcpu
);
9792 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
9793 !vcpu
->arch
.apf
.halted
);
9796 static int vcpu_run(struct kvm_vcpu
*vcpu
)
9799 struct kvm
*kvm
= vcpu
->kvm
;
9801 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9802 vcpu
->arch
.l1tf_flush_l1d
= true;
9805 if (kvm_vcpu_running(vcpu
)) {
9806 r
= vcpu_enter_guest(vcpu
);
9808 r
= vcpu_block(kvm
, vcpu
);
9814 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
9815 if (kvm_cpu_has_pending_timer(vcpu
))
9816 kvm_inject_pending_timer_irqs(vcpu
);
9818 if (dm_request_for_irq_injection(vcpu
) &&
9819 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
9821 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
9822 ++vcpu
->stat
.request_irq_exits
;
9826 if (__xfer_to_guest_mode_work_pending()) {
9827 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9828 r
= xfer_to_guest_mode_handle_work(vcpu
);
9831 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9835 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9840 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
9844 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9845 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
9846 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9850 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
9852 BUG_ON(!vcpu
->arch
.pio
.count
);
9854 return complete_emulated_io(vcpu
);
9858 * Implements the following, as a state machine:
9862 * for each mmio piece in the fragment
9870 * for each mmio piece in the fragment
9875 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
9877 struct kvm_run
*run
= vcpu
->run
;
9878 struct kvm_mmio_fragment
*frag
;
9881 BUG_ON(!vcpu
->mmio_needed
);
9883 /* Complete previous fragment */
9884 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
9885 len
= min(8u, frag
->len
);
9886 if (!vcpu
->mmio_is_write
)
9887 memcpy(frag
->data
, run
->mmio
.data
, len
);
9889 if (frag
->len
<= 8) {
9890 /* Switch to the next fragment. */
9892 vcpu
->mmio_cur_fragment
++;
9894 /* Go forward to the next mmio piece. */
9900 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
9901 vcpu
->mmio_needed
= 0;
9903 /* FIXME: return into emulator if single-stepping. */
9904 if (vcpu
->mmio_is_write
)
9906 vcpu
->mmio_read_completed
= 1;
9907 return complete_emulated_io(vcpu
);
9910 run
->exit_reason
= KVM_EXIT_MMIO
;
9911 run
->mmio
.phys_addr
= frag
->gpa
;
9912 if (vcpu
->mmio_is_write
)
9913 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
9914 run
->mmio
.len
= min(8u, frag
->len
);
9915 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
9916 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
9920 /* Swap (qemu) user FPU context for the guest FPU context. */
9921 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
9924 * Exclude PKRU from restore as restored separately in
9925 * kvm_x86_ops.run().
9927 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, true);
9931 /* When vcpu_run ends, restore user space FPU context. */
9932 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
9934 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, false);
9935 ++vcpu
->stat
.fpu_reload
;
9939 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
9941 struct kvm_run
*kvm_run
= vcpu
->run
;
9945 kvm_sigset_activate(vcpu
);
9947 kvm_load_guest_fpu(vcpu
);
9949 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
9950 if (kvm_run
->immediate_exit
) {
9954 kvm_vcpu_block(vcpu
);
9955 if (kvm_apic_accept_events(vcpu
) < 0) {
9959 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
9961 if (signal_pending(current
)) {
9963 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
9964 ++vcpu
->stat
.signal_exits
;
9969 if ((kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) ||
9970 (kvm_run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)) {
9975 if (kvm_run
->kvm_dirty_regs
) {
9976 r
= sync_regs(vcpu
);
9981 /* re-sync apic's tpr */
9982 if (!lapic_in_kernel(vcpu
)) {
9983 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
9989 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
9990 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
9991 vcpu
->arch
.complete_userspace_io
= NULL
;
9996 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
9998 if (kvm_run
->immediate_exit
)
10001 r
= vcpu_run(vcpu
);
10004 kvm_put_guest_fpu(vcpu
);
10005 if (kvm_run
->kvm_valid_regs
)
10007 post_kvm_run_save(vcpu
);
10008 kvm_sigset_deactivate(vcpu
);
10014 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10016 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
10018 * We are here if userspace calls get_regs() in the middle of
10019 * instruction emulation. Registers state needs to be copied
10020 * back from emulation context to vcpu. Userspace shouldn't do
10021 * that usually, but some bad designed PV devices (vmware
10022 * backdoor interface) need this to work
10024 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
10025 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10027 regs
->rax
= kvm_rax_read(vcpu
);
10028 regs
->rbx
= kvm_rbx_read(vcpu
);
10029 regs
->rcx
= kvm_rcx_read(vcpu
);
10030 regs
->rdx
= kvm_rdx_read(vcpu
);
10031 regs
->rsi
= kvm_rsi_read(vcpu
);
10032 regs
->rdi
= kvm_rdi_read(vcpu
);
10033 regs
->rsp
= kvm_rsp_read(vcpu
);
10034 regs
->rbp
= kvm_rbp_read(vcpu
);
10035 #ifdef CONFIG_X86_64
10036 regs
->r8
= kvm_r8_read(vcpu
);
10037 regs
->r9
= kvm_r9_read(vcpu
);
10038 regs
->r10
= kvm_r10_read(vcpu
);
10039 regs
->r11
= kvm_r11_read(vcpu
);
10040 regs
->r12
= kvm_r12_read(vcpu
);
10041 regs
->r13
= kvm_r13_read(vcpu
);
10042 regs
->r14
= kvm_r14_read(vcpu
);
10043 regs
->r15
= kvm_r15_read(vcpu
);
10046 regs
->rip
= kvm_rip_read(vcpu
);
10047 regs
->rflags
= kvm_get_rflags(vcpu
);
10050 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10053 __get_regs(vcpu
, regs
);
10058 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10060 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
10061 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10063 kvm_rax_write(vcpu
, regs
->rax
);
10064 kvm_rbx_write(vcpu
, regs
->rbx
);
10065 kvm_rcx_write(vcpu
, regs
->rcx
);
10066 kvm_rdx_write(vcpu
, regs
->rdx
);
10067 kvm_rsi_write(vcpu
, regs
->rsi
);
10068 kvm_rdi_write(vcpu
, regs
->rdi
);
10069 kvm_rsp_write(vcpu
, regs
->rsp
);
10070 kvm_rbp_write(vcpu
, regs
->rbp
);
10071 #ifdef CONFIG_X86_64
10072 kvm_r8_write(vcpu
, regs
->r8
);
10073 kvm_r9_write(vcpu
, regs
->r9
);
10074 kvm_r10_write(vcpu
, regs
->r10
);
10075 kvm_r11_write(vcpu
, regs
->r11
);
10076 kvm_r12_write(vcpu
, regs
->r12
);
10077 kvm_r13_write(vcpu
, regs
->r13
);
10078 kvm_r14_write(vcpu
, regs
->r14
);
10079 kvm_r15_write(vcpu
, regs
->r15
);
10082 kvm_rip_write(vcpu
, regs
->rip
);
10083 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
10085 vcpu
->arch
.exception
.pending
= false;
10087 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10090 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10093 __set_regs(vcpu
, regs
);
10098 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
10100 struct kvm_segment cs
;
10102 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10106 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
10108 static void __get_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10110 struct desc_ptr dt
;
10112 if (vcpu
->arch
.guest_state_protected
)
10113 goto skip_protected_regs
;
10115 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10116 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10117 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10118 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10119 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10120 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10122 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10123 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10125 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
10126 sregs
->idt
.limit
= dt
.size
;
10127 sregs
->idt
.base
= dt
.address
;
10128 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
10129 sregs
->gdt
.limit
= dt
.size
;
10130 sregs
->gdt
.base
= dt
.address
;
10132 sregs
->cr2
= vcpu
->arch
.cr2
;
10133 sregs
->cr3
= kvm_read_cr3(vcpu
);
10135 skip_protected_regs
:
10136 sregs
->cr0
= kvm_read_cr0(vcpu
);
10137 sregs
->cr4
= kvm_read_cr4(vcpu
);
10138 sregs
->cr8
= kvm_get_cr8(vcpu
);
10139 sregs
->efer
= vcpu
->arch
.efer
;
10140 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
10143 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10145 __get_sregs_common(vcpu
, sregs
);
10147 if (vcpu
->arch
.guest_state_protected
)
10150 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
10151 set_bit(vcpu
->arch
.interrupt
.nr
,
10152 (unsigned long *)sregs
->interrupt_bitmap
);
10155 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10159 __get_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
);
10161 if (vcpu
->arch
.guest_state_protected
)
10164 if (is_pae_paging(vcpu
)) {
10165 for (i
= 0 ; i
< 4 ; i
++)
10166 sregs2
->pdptrs
[i
] = kvm_pdptr_read(vcpu
, i
);
10167 sregs2
->flags
|= KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10171 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
10172 struct kvm_sregs
*sregs
)
10175 __get_sregs(vcpu
, sregs
);
10180 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
10181 struct kvm_mp_state
*mp_state
)
10186 if (kvm_mpx_supported())
10187 kvm_load_guest_fpu(vcpu
);
10189 r
= kvm_apic_accept_events(vcpu
);
10194 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
10195 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
10196 vcpu
->arch
.pv
.pv_unhalted
)
10197 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
10199 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
10202 if (kvm_mpx_supported())
10203 kvm_put_guest_fpu(vcpu
);
10208 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
10209 struct kvm_mp_state
*mp_state
)
10215 if (!lapic_in_kernel(vcpu
) &&
10216 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
10220 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10221 * INIT state; latched init should be reported using
10222 * KVM_SET_VCPU_EVENTS, so reject it here.
10224 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
10225 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
10226 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
10229 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
10230 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
10231 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
10233 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
10234 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10242 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
10243 int reason
, bool has_error_code
, u32 error_code
)
10245 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
10248 init_emulate_ctxt(vcpu
);
10250 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
10251 has_error_code
, error_code
);
10253 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
10254 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
10255 vcpu
->run
->internal
.ndata
= 0;
10259 kvm_rip_write(vcpu
, ctxt
->eip
);
10260 kvm_set_rflags(vcpu
, ctxt
->eflags
);
10263 EXPORT_SYMBOL_GPL(kvm_task_switch
);
10265 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10267 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
10269 * When EFER.LME and CR0.PG are set, the processor is in
10270 * 64-bit mode (though maybe in a 32-bit code segment).
10271 * CR4.PAE and EFER.LMA must be set.
10273 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
10275 if (kvm_vcpu_is_illegal_gpa(vcpu
, sregs
->cr3
))
10279 * Not in 64-bit mode: EFER.LMA is clear and the code
10280 * segment cannot be 64-bit.
10282 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
10286 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
10289 static int __set_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
,
10290 int *mmu_reset_needed
, bool update_pdptrs
)
10292 struct msr_data apic_base_msr
;
10294 struct desc_ptr dt
;
10296 if (!kvm_is_valid_sregs(vcpu
, sregs
))
10299 apic_base_msr
.data
= sregs
->apic_base
;
10300 apic_base_msr
.host_initiated
= true;
10301 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
10304 if (vcpu
->arch
.guest_state_protected
)
10307 dt
.size
= sregs
->idt
.limit
;
10308 dt
.address
= sregs
->idt
.base
;
10309 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
10310 dt
.size
= sregs
->gdt
.limit
;
10311 dt
.address
= sregs
->gdt
.base
;
10312 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
10314 vcpu
->arch
.cr2
= sregs
->cr2
;
10315 *mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
10316 vcpu
->arch
.cr3
= sregs
->cr3
;
10317 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
10319 kvm_set_cr8(vcpu
, sregs
->cr8
);
10321 *mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
10322 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
10324 *mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
10325 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
10326 vcpu
->arch
.cr0
= sregs
->cr0
;
10328 *mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
10329 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
10331 if (update_pdptrs
) {
10332 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10333 if (is_pae_paging(vcpu
)) {
10334 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
10335 *mmu_reset_needed
= 1;
10337 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10340 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10341 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10342 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10343 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10344 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10345 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10347 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10348 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10350 update_cr8_intercept(vcpu
);
10352 /* Older userspace won't unhalt the vcpu on reset. */
10353 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
10354 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
10355 !is_protmode(vcpu
))
10356 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10361 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10363 int pending_vec
, max_bits
;
10364 int mmu_reset_needed
= 0;
10365 int ret
= __set_sregs_common(vcpu
, sregs
, &mmu_reset_needed
, true);
10370 if (mmu_reset_needed
)
10371 kvm_mmu_reset_context(vcpu
);
10373 max_bits
= KVM_NR_INTERRUPTS
;
10374 pending_vec
= find_first_bit(
10375 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
10377 if (pending_vec
< max_bits
) {
10378 kvm_queue_interrupt(vcpu
, pending_vec
, false);
10379 pr_debug("Set back pending irq %d\n", pending_vec
);
10380 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10385 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10387 int mmu_reset_needed
= 0;
10388 bool valid_pdptrs
= sregs2
->flags
& KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10389 bool pae
= (sregs2
->cr0
& X86_CR0_PG
) && (sregs2
->cr4
& X86_CR4_PAE
) &&
10390 !(sregs2
->efer
& EFER_LMA
);
10393 if (sregs2
->flags
& ~KVM_SREGS2_FLAGS_PDPTRS_VALID
)
10396 if (valid_pdptrs
&& (!pae
|| vcpu
->arch
.guest_state_protected
))
10399 ret
= __set_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
,
10400 &mmu_reset_needed
, !valid_pdptrs
);
10404 if (valid_pdptrs
) {
10405 for (i
= 0; i
< 4 ; i
++)
10406 kvm_pdptr_write(vcpu
, i
, sregs2
->pdptrs
[i
]);
10408 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
10409 mmu_reset_needed
= 1;
10410 vcpu
->arch
.pdptrs_from_userspace
= true;
10412 if (mmu_reset_needed
)
10413 kvm_mmu_reset_context(vcpu
);
10417 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
10418 struct kvm_sregs
*sregs
)
10423 ret
= __set_sregs(vcpu
, sregs
);
10428 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
10429 struct kvm_guest_debug
*dbg
)
10431 unsigned long rflags
;
10434 if (vcpu
->arch
.guest_state_protected
)
10439 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
10441 if (vcpu
->arch
.exception
.pending
)
10443 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
10444 kvm_queue_exception(vcpu
, DB_VECTOR
);
10446 kvm_queue_exception(vcpu
, BP_VECTOR
);
10450 * Read rflags as long as potentially injected trace flags are still
10453 rflags
= kvm_get_rflags(vcpu
);
10455 vcpu
->guest_debug
= dbg
->control
;
10456 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
10457 vcpu
->guest_debug
= 0;
10459 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
10460 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
10461 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
10462 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
10464 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
10465 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
10467 kvm_update_dr7(vcpu
);
10469 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10470 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
10473 * Trigger an rflags update that will inject or remove the trace
10476 kvm_set_rflags(vcpu
, rflags
);
10478 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
10488 * Translate a guest virtual address to a guest physical address.
10490 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
10491 struct kvm_translation
*tr
)
10493 unsigned long vaddr
= tr
->linear_address
;
10499 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10500 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
10501 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10502 tr
->physical_address
= gpa
;
10503 tr
->valid
= gpa
!= UNMAPPED_GVA
;
10511 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10513 struct fxregs_state
*fxsave
;
10515 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
10520 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
10521 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
10522 fpu
->fcw
= fxsave
->cwd
;
10523 fpu
->fsw
= fxsave
->swd
;
10524 fpu
->ftwx
= fxsave
->twd
;
10525 fpu
->last_opcode
= fxsave
->fop
;
10526 fpu
->last_ip
= fxsave
->rip
;
10527 fpu
->last_dp
= fxsave
->rdp
;
10528 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
10534 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10536 struct fxregs_state
*fxsave
;
10538 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
10543 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
10545 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
10546 fxsave
->cwd
= fpu
->fcw
;
10547 fxsave
->swd
= fpu
->fsw
;
10548 fxsave
->twd
= fpu
->ftwx
;
10549 fxsave
->fop
= fpu
->last_opcode
;
10550 fxsave
->rip
= fpu
->last_ip
;
10551 fxsave
->rdp
= fpu
->last_dp
;
10552 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
10558 static void store_regs(struct kvm_vcpu
*vcpu
)
10560 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
10562 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
10563 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10565 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
10566 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
10568 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
10569 kvm_vcpu_ioctl_x86_get_vcpu_events(
10570 vcpu
, &vcpu
->run
->s
.regs
.events
);
10573 static int sync_regs(struct kvm_vcpu
*vcpu
)
10575 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
10576 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10577 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
10579 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
10580 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
10582 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
10584 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
10585 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10586 vcpu
, &vcpu
->run
->s
.regs
.events
))
10588 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
10594 static void fx_init(struct kvm_vcpu
*vcpu
)
10597 * Ensure guest xcr0 is valid for loading
10599 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10601 vcpu
->arch
.cr0
|= X86_CR0_ET
;
10604 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
10606 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
10607 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10608 "guest TSC will not be reliable\n");
10613 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
10618 vcpu
->arch
.last_vmentry_cpu
= -1;
10619 vcpu
->arch
.regs_avail
= ~0;
10620 vcpu
->arch
.regs_dirty
= ~0;
10622 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
10623 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10625 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
10627 r
= kvm_mmu_create(vcpu
);
10631 if (irqchip_in_kernel(vcpu
->kvm
)) {
10632 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
10634 goto fail_mmu_destroy
;
10635 if (kvm_apicv_activated(vcpu
->kvm
))
10636 vcpu
->arch
.apicv_active
= true;
10638 static_branch_inc(&kvm_has_noapic_vcpu
);
10642 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
10644 goto fail_free_lapic
;
10645 vcpu
->arch
.pio_data
= page_address(page
);
10647 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
10648 GFP_KERNEL_ACCOUNT
);
10649 if (!vcpu
->arch
.mce_banks
)
10650 goto fail_free_pio_data
;
10651 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
10653 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
10654 GFP_KERNEL_ACCOUNT
))
10655 goto fail_free_mce_banks
;
10657 if (!alloc_emulate_ctxt(vcpu
))
10658 goto free_wbinvd_dirty_mask
;
10660 if (!fpu_alloc_guest_fpstate(&vcpu
->arch
.guest_fpu
)) {
10661 pr_err("kvm: failed to allocate vcpu's fpu\n");
10662 goto free_emulate_ctxt
;
10667 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
10668 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
10670 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
10672 kvm_async_pf_hash_reset(vcpu
);
10673 kvm_pmu_init(vcpu
);
10675 vcpu
->arch
.pending_external_vector
= -1;
10676 vcpu
->arch
.preempted_in_kernel
= false;
10678 #if IS_ENABLED(CONFIG_HYPERV)
10679 vcpu
->arch
.hv_root_tdp
= INVALID_PAGE
;
10682 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
10684 goto free_guest_fpu
;
10686 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
10687 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
10688 kvm_vcpu_mtrr_init(vcpu
);
10690 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
10691 kvm_vcpu_reset(vcpu
, false);
10692 kvm_init_mmu(vcpu
);
10697 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
10699 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10700 free_wbinvd_dirty_mask
:
10701 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10702 fail_free_mce_banks
:
10703 kfree(vcpu
->arch
.mce_banks
);
10704 fail_free_pio_data
:
10705 free_page((unsigned long)vcpu
->arch
.pio_data
);
10707 kvm_free_lapic(vcpu
);
10709 kvm_mmu_destroy(vcpu
);
10713 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
10715 struct kvm
*kvm
= vcpu
->kvm
;
10717 if (mutex_lock_killable(&vcpu
->mutex
))
10720 kvm_synchronize_tsc(vcpu
, 0);
10723 /* poll control enabled by default */
10724 vcpu
->arch
.msr_kvm_poll_control
= 1;
10726 mutex_unlock(&vcpu
->mutex
);
10728 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
10729 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
10730 KVMCLOCK_SYNC_PERIOD
);
10733 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
10737 kvmclock_reset(vcpu
);
10739 static_call(kvm_x86_vcpu_free
)(vcpu
);
10741 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10742 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10743 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
10745 kvm_hv_vcpu_uninit(vcpu
);
10746 kvm_pmu_destroy(vcpu
);
10747 kfree(vcpu
->arch
.mce_banks
);
10748 kvm_free_lapic(vcpu
);
10749 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10750 kvm_mmu_destroy(vcpu
);
10751 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10752 free_page((unsigned long)vcpu
->arch
.pio_data
);
10753 kvfree(vcpu
->arch
.cpuid_entries
);
10754 if (!lapic_in_kernel(vcpu
))
10755 static_branch_dec(&kvm_has_noapic_vcpu
);
10758 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
10760 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
10761 unsigned long new_cr0
;
10764 kvm_lapic_reset(vcpu
, init_event
);
10766 vcpu
->arch
.hflags
= 0;
10768 vcpu
->arch
.smi_pending
= 0;
10769 vcpu
->arch
.smi_count
= 0;
10770 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
10771 vcpu
->arch
.nmi_pending
= 0;
10772 vcpu
->arch
.nmi_injected
= false;
10773 kvm_clear_interrupt_queue(vcpu
);
10774 kvm_clear_exception_queue(vcpu
);
10776 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
10777 kvm_update_dr0123(vcpu
);
10778 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
10779 vcpu
->arch
.dr7
= DR7_FIXED_1
;
10780 kvm_update_dr7(vcpu
);
10782 vcpu
->arch
.cr2
= 0;
10784 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10785 vcpu
->arch
.apf
.msr_en_val
= 0;
10786 vcpu
->arch
.apf
.msr_int_val
= 0;
10787 vcpu
->arch
.st
.msr_val
= 0;
10789 kvmclock_reset(vcpu
);
10791 kvm_clear_async_pf_completion_queue(vcpu
);
10792 kvm_async_pf_hash_reset(vcpu
);
10793 vcpu
->arch
.apf
.halted
= false;
10795 if (vcpu
->arch
.guest_fpu
.fpstate
&& kvm_mpx_supported()) {
10796 struct fpstate
*fpstate
= vcpu
->arch
.guest_fpu
.fpstate
;
10799 * To avoid have the INIT path from kvm_apic_has_events() that be
10800 * called with loaded FPU and does not let userspace fix the state.
10803 kvm_put_guest_fpu(vcpu
);
10805 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDREGS
);
10806 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDCSR
);
10809 kvm_load_guest_fpu(vcpu
);
10813 kvm_pmu_reset(vcpu
);
10814 vcpu
->arch
.smbase
= 0x30000;
10816 vcpu
->arch
.msr_misc_features_enables
= 0;
10818 __kvm_set_xcr(vcpu
, 0, XFEATURE_MASK_FP
);
10819 __kvm_set_msr(vcpu
, MSR_IA32_XSS
, 0, true);
10822 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
10823 vcpu
->arch
.regs_avail
= ~0;
10824 vcpu
->arch
.regs_dirty
= ~0;
10827 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
10828 * if no CPUID match is found. Note, it's impossible to get a match at
10829 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
10830 * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
10831 * But, go through the motions in case that's ever remedied.
10834 if (!kvm_cpuid(vcpu
, &eax
, &dummy
, &dummy
, &dummy
, true))
10836 kvm_rdx_write(vcpu
, eax
);
10838 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
10840 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
10841 kvm_rip_write(vcpu
, 0xfff0);
10843 vcpu
->arch
.cr3
= 0;
10844 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
10847 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
10848 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
10849 * (or qualify) that with a footnote stating that CD/NW are preserved.
10851 new_cr0
= X86_CR0_ET
;
10853 new_cr0
|= (old_cr0
& (X86_CR0_NW
| X86_CR0_CD
));
10855 new_cr0
|= X86_CR0_NW
| X86_CR0_CD
;
10857 static_call(kvm_x86_set_cr0
)(vcpu
, new_cr0
);
10858 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
10859 static_call(kvm_x86_set_efer
)(vcpu
, 0);
10860 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
10863 * Reset the MMU context if paging was enabled prior to INIT (which is
10864 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
10865 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
10866 * checked because it is unconditionally cleared on INIT and all other
10867 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
10868 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
10870 if (old_cr0
& X86_CR0_PG
)
10871 kvm_mmu_reset_context(vcpu
);
10874 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
10875 * APM states the TLBs are untouched by INIT, but it also states that
10876 * the TLBs are flushed on "External initialization of the processor."
10877 * Flush the guest TLB regardless of vendor, there is no meaningful
10878 * benefit in relying on the guest to flush the TLB immediately after
10879 * INIT. A spurious TLB flush is benign and likely negligible from a
10880 * performance perspective.
10883 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
10885 EXPORT_SYMBOL_GPL(kvm_vcpu_reset
);
10887 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
10889 struct kvm_segment cs
;
10891 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10892 cs
.selector
= vector
<< 8;
10893 cs
.base
= vector
<< 12;
10894 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10895 kvm_rip_write(vcpu
, 0);
10897 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
10899 int kvm_arch_hardware_enable(void)
10902 struct kvm_vcpu
*vcpu
;
10907 bool stable
, backwards_tsc
= false;
10909 kvm_user_return_msr_cpu_online();
10910 ret
= static_call(kvm_x86_hardware_enable
)();
10914 local_tsc
= rdtsc();
10915 stable
= !kvm_check_tsc_unstable();
10916 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10917 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10918 if (!stable
&& vcpu
->cpu
== smp_processor_id())
10919 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
10920 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
10921 backwards_tsc
= true;
10922 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
10923 max_tsc
= vcpu
->arch
.last_host_tsc
;
10929 * Sometimes, even reliable TSCs go backwards. This happens on
10930 * platforms that reset TSC during suspend or hibernate actions, but
10931 * maintain synchronization. We must compensate. Fortunately, we can
10932 * detect that condition here, which happens early in CPU bringup,
10933 * before any KVM threads can be running. Unfortunately, we can't
10934 * bring the TSCs fully up to date with real time, as we aren't yet far
10935 * enough into CPU bringup that we know how much real time has actually
10936 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10937 * variables that haven't been updated yet.
10939 * So we simply find the maximum observed TSC above, then record the
10940 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
10941 * the adjustment will be applied. Note that we accumulate
10942 * adjustments, in case multiple suspend cycles happen before some VCPU
10943 * gets a chance to run again. In the event that no KVM threads get a
10944 * chance to run, we will miss the entire elapsed period, as we'll have
10945 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10946 * loose cycle time. This isn't too big a deal, since the loss will be
10947 * uniform across all VCPUs (not to mention the scenario is extremely
10948 * unlikely). It is possible that a second hibernate recovery happens
10949 * much faster than a first, causing the observed TSC here to be
10950 * smaller; this would require additional padding adjustment, which is
10951 * why we set last_host_tsc to the local tsc observed here.
10953 * N.B. - this code below runs only on platforms with reliable TSC,
10954 * as that is the only way backwards_tsc is set above. Also note
10955 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10956 * have the same delta_cyc adjustment applied if backwards_tsc
10957 * is detected. Note further, this adjustment is only done once,
10958 * as we reset last_host_tsc on all VCPUs to stop this from being
10959 * called multiple times (one for each physical CPU bringup).
10961 * Platforms with unreliable TSCs don't have to deal with this, they
10962 * will be compensated by the logic in vcpu_load, which sets the TSC to
10963 * catchup mode. This will catchup all VCPUs to real time, but cannot
10964 * guarantee that they stay in perfect synchronization.
10966 if (backwards_tsc
) {
10967 u64 delta_cyc
= max_tsc
- local_tsc
;
10968 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10969 kvm
->arch
.backwards_tsc_observed
= true;
10970 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10971 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
10972 vcpu
->arch
.last_host_tsc
= local_tsc
;
10973 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
10977 * We have to disable TSC offset matching.. if you were
10978 * booting a VM while issuing an S4 host suspend....
10979 * you may have some problem. Solving this issue is
10980 * left as an exercise to the reader.
10982 kvm
->arch
.last_tsc_nsec
= 0;
10983 kvm
->arch
.last_tsc_write
= 0;
10990 void kvm_arch_hardware_disable(void)
10992 static_call(kvm_x86_hardware_disable
)();
10993 drop_user_return_notifiers();
10996 int kvm_arch_hardware_setup(void *opaque
)
10998 struct kvm_x86_init_ops
*ops
= opaque
;
11001 rdmsrl_safe(MSR_EFER
, &host_efer
);
11003 if (boot_cpu_has(X86_FEATURE_XSAVES
))
11004 rdmsrl(MSR_IA32_XSS
, host_xss
);
11006 r
= ops
->hardware_setup();
11010 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
11011 kvm_ops_static_call_update();
11013 if (ops
->intel_pt_intr_in_guest
&& ops
->intel_pt_intr_in_guest())
11014 kvm_guest_cbs
.handle_intel_pt_intr
= kvm_handle_intel_pt_intr
;
11015 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
11017 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
11020 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11021 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
11022 #undef __kvm_cpu_cap_has
11024 if (kvm_has_tsc_control
) {
11026 * Make sure the user can only configure tsc_khz values that
11027 * fit into a signed integer.
11028 * A min value is not calculated because it will always
11029 * be 1 on all machines.
11031 u64 max
= min(0x7fffffffULL
,
11032 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
11033 kvm_max_guest_tsc_khz
= max
;
11035 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
11038 kvm_init_msr_list();
11042 void kvm_arch_hardware_unsetup(void)
11044 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
11045 kvm_guest_cbs
.handle_intel_pt_intr
= NULL
;
11047 static_call(kvm_x86_hardware_unsetup
)();
11050 int kvm_arch_check_processor_compat(void *opaque
)
11052 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
11053 struct kvm_x86_init_ops
*ops
= opaque
;
11055 WARN_ON(!irqs_disabled());
11057 if (__cr4_reserved_bits(cpu_has
, c
) !=
11058 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
11061 return ops
->check_processor_compatibility();
11064 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
11066 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
11068 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
11070 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
11072 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
11075 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
11076 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
11078 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
11080 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
11082 vcpu
->arch
.l1tf_flush_l1d
= true;
11083 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
11084 pmu
->need_cleanup
= true;
11085 kvm_make_request(KVM_REQ_PMU
, vcpu
);
11087 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
11090 void kvm_arch_free_vm(struct kvm
*kvm
)
11092 kfree(to_kvm_hv(kvm
)->hv_pa_pg
);
11097 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
11104 ret
= kvm_page_track_init(kvm
);
11108 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
11109 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
11110 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
11111 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
11112 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
11113 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
11115 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11116 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
11117 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11118 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
11119 &kvm
->arch
.irq_sources_bitmap
);
11121 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
11122 mutex_init(&kvm
->arch
.apic_map_lock
);
11123 raw_spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
11125 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
11126 pvclock_update_vm_gtod_copy(kvm
);
11128 kvm
->arch
.guest_can_read_msr_platform_info
= true;
11130 #if IS_ENABLED(CONFIG_HYPERV)
11131 spin_lock_init(&kvm
->arch
.hv_root_tdp_lock
);
11132 kvm
->arch
.hv_root_tdp
= INVALID_PAGE
;
11135 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
11136 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
11138 kvm_apicv_init(kvm
);
11139 kvm_hv_init_vm(kvm
);
11140 kvm_mmu_init_vm(kvm
);
11141 kvm_xen_init_vm(kvm
);
11143 return static_call(kvm_x86_vm_init
)(kvm
);
11146 int kvm_arch_post_init_vm(struct kvm
*kvm
)
11148 return kvm_mmu_post_init_vm(kvm
);
11151 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
11154 kvm_mmu_unload(vcpu
);
11158 static void kvm_free_vcpus(struct kvm
*kvm
)
11161 struct kvm_vcpu
*vcpu
;
11164 * Unpin any mmu pages first.
11166 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11167 kvm_clear_async_pf_completion_queue(vcpu
);
11168 kvm_unload_vcpu_mmu(vcpu
);
11170 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11171 kvm_vcpu_destroy(vcpu
);
11173 mutex_lock(&kvm
->lock
);
11174 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
11175 kvm
->vcpus
[i
] = NULL
;
11177 atomic_set(&kvm
->online_vcpus
, 0);
11178 mutex_unlock(&kvm
->lock
);
11181 void kvm_arch_sync_events(struct kvm
*kvm
)
11183 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
11184 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
11188 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
11191 * __x86_set_memory_region: Setup KVM internal memory slot
11193 * @kvm: the kvm pointer to the VM.
11194 * @id: the slot ID to setup.
11195 * @gpa: the GPA to install the slot (unused when @size == 0).
11196 * @size: the size of the slot. Set to zero to uninstall a slot.
11198 * This function helps to setup a KVM internal memory slot. Specify
11199 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11200 * slot. The return code can be one of the following:
11202 * HVA: on success (uninstall will return a bogus HVA)
11205 * The caller should always use IS_ERR() to check the return value
11206 * before use. Note, the KVM internal memory slots are guaranteed to
11207 * remain valid and unchanged until the VM is destroyed, i.e., the
11208 * GPA->HVA translation will not change. However, the HVA is a user
11209 * address, i.e. its accessibility is not guaranteed, and must be
11210 * accessed via __copy_{to,from}_user().
11212 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
11216 unsigned long hva
, old_npages
;
11217 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
11218 struct kvm_memory_slot
*slot
;
11220 /* Called with kvm->slots_lock held. */
11221 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
11222 return ERR_PTR_USR(-EINVAL
);
11224 slot
= id_to_memslot(slots
, id
);
11226 if (slot
&& slot
->npages
)
11227 return ERR_PTR_USR(-EEXIST
);
11230 * MAP_SHARED to prevent internal slot pages from being moved
11233 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
11234 MAP_SHARED
| MAP_ANONYMOUS
, 0);
11235 if (IS_ERR((void *)hva
))
11236 return (void __user
*)hva
;
11238 if (!slot
|| !slot
->npages
)
11241 old_npages
= slot
->npages
;
11242 hva
= slot
->userspace_addr
;
11245 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11246 struct kvm_userspace_memory_region m
;
11248 m
.slot
= id
| (i
<< 16);
11250 m
.guest_phys_addr
= gpa
;
11251 m
.userspace_addr
= hva
;
11252 m
.memory_size
= size
;
11253 r
= __kvm_set_memory_region(kvm
, &m
);
11255 return ERR_PTR_USR(r
);
11259 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
11261 return (void __user
*)hva
;
11263 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
11265 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
11267 kvm_mmu_pre_destroy_vm(kvm
);
11270 void kvm_arch_destroy_vm(struct kvm
*kvm
)
11272 if (current
->mm
== kvm
->mm
) {
11274 * Free memory regions allocated on behalf of userspace,
11275 * unless the the memory map has changed due to process exit
11278 mutex_lock(&kvm
->slots_lock
);
11279 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
11281 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
11283 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
11284 mutex_unlock(&kvm
->slots_lock
);
11286 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
11287 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
11288 kvm_pic_destroy(kvm
);
11289 kvm_ioapic_destroy(kvm
);
11290 kvm_free_vcpus(kvm
);
11291 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
11292 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
11293 kvm_mmu_uninit_vm(kvm
);
11294 kvm_page_track_cleanup(kvm
);
11295 kvm_xen_destroy_vm(kvm
);
11296 kvm_hv_destroy_vm(kvm
);
11299 static void memslot_rmap_free(struct kvm_memory_slot
*slot
)
11303 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11304 kvfree(slot
->arch
.rmap
[i
]);
11305 slot
->arch
.rmap
[i
] = NULL
;
11309 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
11313 memslot_rmap_free(slot
);
11315 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11316 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11317 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11320 kvm_page_track_free_memslot(slot
);
11323 static int memslot_rmap_alloc(struct kvm_memory_slot
*slot
,
11324 unsigned long npages
)
11326 const int sz
= sizeof(*slot
->arch
.rmap
[0]);
11329 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11331 int lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11333 if (slot
->arch
.rmap
[i
])
11336 slot
->arch
.rmap
[i
] = kvcalloc(lpages
, sz
, GFP_KERNEL_ACCOUNT
);
11337 if (!slot
->arch
.rmap
[i
]) {
11338 memslot_rmap_free(slot
);
11346 int alloc_all_memslots_rmaps(struct kvm
*kvm
)
11348 struct kvm_memslots
*slots
;
11349 struct kvm_memory_slot
*slot
;
11353 * Check if memslots alreday have rmaps early before acquiring
11354 * the slots_arch_lock below.
11356 if (kvm_memslots_have_rmaps(kvm
))
11359 mutex_lock(&kvm
->slots_arch_lock
);
11362 * Read memslots_have_rmaps again, under the slots arch lock,
11363 * before allocating the rmaps
11365 if (kvm_memslots_have_rmaps(kvm
)) {
11366 mutex_unlock(&kvm
->slots_arch_lock
);
11370 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11371 slots
= __kvm_memslots(kvm
, i
);
11372 kvm_for_each_memslot(slot
, slots
) {
11373 r
= memslot_rmap_alloc(slot
, slot
->npages
);
11375 mutex_unlock(&kvm
->slots_arch_lock
);
11382 * Ensure that memslots_have_rmaps becomes true strictly after
11383 * all the rmap pointers are set.
11385 smp_store_release(&kvm
->arch
.memslots_have_rmaps
, true);
11386 mutex_unlock(&kvm
->slots_arch_lock
);
11390 static int kvm_alloc_memslot_metadata(struct kvm
*kvm
,
11391 struct kvm_memory_slot
*slot
,
11392 unsigned long npages
)
11397 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11398 * old arrays will be freed by __kvm_set_memory_region() if installing
11399 * the new memslot is successful.
11401 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
11403 if (kvm_memslots_have_rmaps(kvm
)) {
11404 r
= memslot_rmap_alloc(slot
, npages
);
11409 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11410 struct kvm_lpage_info
*linfo
;
11411 unsigned long ugfn
;
11415 lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11417 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
11421 slot
->arch
.lpage_info
[i
- 1] = linfo
;
11423 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
11424 linfo
[0].disallow_lpage
= 1;
11425 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
11426 linfo
[lpages
- 1].disallow_lpage
= 1;
11427 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
11429 * If the gfn and userspace address are not aligned wrt each
11430 * other, disable large page support for this slot.
11432 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
11435 for (j
= 0; j
< lpages
; ++j
)
11436 linfo
[j
].disallow_lpage
= 1;
11440 if (kvm_page_track_create_memslot(slot
, npages
))
11446 memslot_rmap_free(slot
);
11448 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11449 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11450 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11455 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
11457 struct kvm_vcpu
*vcpu
;
11461 * memslots->generation has been incremented.
11462 * mmio generation may have reached its maximum value.
11464 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
11466 /* Force re-initialization of steal_time cache */
11467 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11468 kvm_vcpu_kick(vcpu
);
11471 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
11472 struct kvm_memory_slot
*memslot
,
11473 const struct kvm_userspace_memory_region
*mem
,
11474 enum kvm_mr_change change
)
11476 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
11477 return kvm_alloc_memslot_metadata(kvm
, memslot
,
11478 mem
->memory_size
>> PAGE_SHIFT
);
11483 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
11485 struct kvm_arch
*ka
= &kvm
->arch
;
11487 if (!kvm_x86_ops
.cpu_dirty_log_size
)
11490 if ((enable
&& ++ka
->cpu_dirty_logging_count
== 1) ||
11491 (!enable
&& --ka
->cpu_dirty_logging_count
== 0))
11492 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
11494 WARN_ON_ONCE(ka
->cpu_dirty_logging_count
< 0);
11497 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
11498 struct kvm_memory_slot
*old
,
11499 const struct kvm_memory_slot
*new,
11500 enum kvm_mr_change change
)
11502 bool log_dirty_pages
= new->flags
& KVM_MEM_LOG_DIRTY_PAGES
;
11505 * Update CPU dirty logging if dirty logging is being toggled. This
11506 * applies to all operations.
11508 if ((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
11509 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
11512 * Nothing more to do for RO slots (which can't be dirtied and can't be
11513 * made writable) or CREATE/MOVE/DELETE of a slot.
11515 * For a memslot with dirty logging disabled:
11516 * CREATE: No dirty mappings will already exist.
11517 * MOVE/DELETE: The old mappings will already have been cleaned up by
11518 * kvm_arch_flush_shadow_memslot()
11520 * For a memslot with dirty logging enabled:
11521 * CREATE: No shadow pages exist, thus nothing to write-protect
11522 * and no dirty bits to clear.
11523 * MOVE/DELETE: The old mappings will already have been cleaned up by
11524 * kvm_arch_flush_shadow_memslot().
11526 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new->flags
& KVM_MEM_READONLY
))
11530 * READONLY and non-flags changes were filtered out above, and the only
11531 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11532 * logging isn't being toggled on or off.
11534 if (WARN_ON_ONCE(!((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
11537 if (!log_dirty_pages
) {
11539 * Dirty logging tracks sptes in 4k granularity, meaning that
11540 * large sptes have to be split. If live migration succeeds,
11541 * the guest in the source machine will be destroyed and large
11542 * sptes will be created in the destination. However, if the
11543 * guest continues to run in the source machine (for example if
11544 * live migration fails), small sptes will remain around and
11545 * cause bad performance.
11547 * Scan sptes if dirty logging has been stopped, dropping those
11548 * which can be collapsed into a single large-page spte. Later
11549 * page faults will create the large-page sptes.
11551 kvm_mmu_zap_collapsible_sptes(kvm
, new);
11554 * Initially-all-set does not require write protecting any page,
11555 * because they're all assumed to be dirty.
11557 if (kvm_dirty_log_manual_protect_and_init_set(kvm
))
11560 if (kvm_x86_ops
.cpu_dirty_log_size
) {
11561 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
11562 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_2M
);
11564 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_4K
);
11569 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
11570 const struct kvm_userspace_memory_region
*mem
,
11571 struct kvm_memory_slot
*old
,
11572 const struct kvm_memory_slot
*new,
11573 enum kvm_mr_change change
)
11575 if (!kvm
->arch
.n_requested_mmu_pages
)
11576 kvm_mmu_change_mmu_pages(kvm
,
11577 kvm_mmu_calculate_default_mmu_pages(kvm
));
11579 kvm_mmu_slot_apply_flags(kvm
, old
, new, change
);
11581 /* Free the arrays associated with the old memslot. */
11582 if (change
== KVM_MR_MOVE
)
11583 kvm_arch_free_memslot(kvm
, old
);
11586 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
11588 kvm_mmu_zap_all(kvm
);
11591 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
11592 struct kvm_memory_slot
*slot
)
11594 kvm_page_track_flush_slot(kvm
, slot
);
11597 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
11599 return (is_guest_mode(vcpu
) &&
11600 kvm_x86_ops
.guest_apic_has_interrupt
&&
11601 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
11604 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
11606 if (!list_empty_careful(&vcpu
->async_pf
.done
))
11609 if (kvm_apic_has_events(vcpu
))
11612 if (vcpu
->arch
.pv
.pv_unhalted
)
11615 if (vcpu
->arch
.exception
.pending
)
11618 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11619 (vcpu
->arch
.nmi_pending
&&
11620 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
11623 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11624 (vcpu
->arch
.smi_pending
&&
11625 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
11628 if (kvm_arch_interrupt_allowed(vcpu
) &&
11629 (kvm_cpu_has_interrupt(vcpu
) ||
11630 kvm_guest_apic_has_interrupt(vcpu
)))
11633 if (kvm_hv_has_stimer_pending(vcpu
))
11636 if (is_guest_mode(vcpu
) &&
11637 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
11638 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
11644 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
11646 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
11649 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
11651 if (vcpu
->arch
.apicv_active
&& static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
11657 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
11659 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
11662 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11663 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11664 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
11667 return kvm_arch_dy_has_pending_interrupt(vcpu
);
11670 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
11672 if (vcpu
->arch
.guest_state_protected
)
11675 return vcpu
->arch
.preempted_in_kernel
;
11678 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
11680 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
11683 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
11685 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
11688 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
11690 /* Can't read the RIP when guest state is protected, just return 0 */
11691 if (vcpu
->arch
.guest_state_protected
)
11694 if (is_64_bit_mode(vcpu
))
11695 return kvm_rip_read(vcpu
);
11696 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
11697 kvm_rip_read(vcpu
));
11699 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
11701 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
11703 return kvm_get_linear_rip(vcpu
) == linear_rip
;
11705 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
11707 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
11709 unsigned long rflags
;
11711 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
11712 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11713 rflags
&= ~X86_EFLAGS_TF
;
11716 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
11718 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11720 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
11721 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
11722 rflags
|= X86_EFLAGS_TF
;
11723 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
11726 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11728 __kvm_set_rflags(vcpu
, rflags
);
11729 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11731 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
11733 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
11737 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
11741 r
= kvm_mmu_reload(vcpu
);
11745 if (!vcpu
->arch
.mmu
->direct_map
&&
11746 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
11749 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
11752 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
11754 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
11756 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
11759 static inline u32
kvm_async_pf_next_probe(u32 key
)
11761 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
11764 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11766 u32 key
= kvm_async_pf_hash_fn(gfn
);
11768 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
11769 key
= kvm_async_pf_next_probe(key
);
11771 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
11774 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11777 u32 key
= kvm_async_pf_hash_fn(gfn
);
11779 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
11780 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
11781 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
11782 key
= kvm_async_pf_next_probe(key
);
11787 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11789 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
11792 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11796 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
11798 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
11802 vcpu
->arch
.apf
.gfns
[i
] = ~0;
11804 j
= kvm_async_pf_next_probe(j
);
11805 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
11807 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
11809 * k lies cyclically in ]i,j]
11811 * |....j i.k.| or |.k..j i...|
11813 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
11814 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
11819 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
11821 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
11823 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
11827 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
11829 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11831 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11832 &token
, offset
, sizeof(token
));
11835 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
11837 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11840 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11841 &val
, offset
, sizeof(val
)))
11847 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
11849 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
11852 if (!kvm_pv_async_pf_enabled(vcpu
) ||
11853 (vcpu
->arch
.apf
.send_user_only
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 0))
11859 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
11861 if (unlikely(!lapic_in_kernel(vcpu
) ||
11862 kvm_event_needs_reinjection(vcpu
) ||
11863 vcpu
->arch
.exception
.pending
))
11866 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
11870 * If interrupts are off we cannot even use an artificial
11873 return kvm_arch_interrupt_allowed(vcpu
);
11876 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
11877 struct kvm_async_pf
*work
)
11879 struct x86_exception fault
;
11881 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
11882 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11884 if (kvm_can_deliver_async_pf(vcpu
) &&
11885 !apf_put_user_notpresent(vcpu
)) {
11886 fault
.vector
= PF_VECTOR
;
11887 fault
.error_code_valid
= true;
11888 fault
.error_code
= 0;
11889 fault
.nested_page_fault
= false;
11890 fault
.address
= work
->arch
.token
;
11891 fault
.async_page_fault
= true;
11892 kvm_inject_page_fault(vcpu
, &fault
);
11896 * It is not possible to deliver a paravirtualized asynchronous
11897 * page fault, but putting the guest in an artificial halt state
11898 * can be beneficial nevertheless: if an interrupt arrives, we
11899 * can deliver it timely and perhaps the guest will schedule
11900 * another process. When the instruction that triggered a page
11901 * fault is retried, hopefully the page will be ready in the host.
11903 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
11908 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
11909 struct kvm_async_pf
*work
)
11911 struct kvm_lapic_irq irq
= {
11912 .delivery_mode
= APIC_DM_FIXED
,
11913 .vector
= vcpu
->arch
.apf
.vec
11916 if (work
->wakeup_all
)
11917 work
->arch
.token
= ~0; /* broadcast wakeup */
11919 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11920 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
11922 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
11923 kvm_pv_async_pf_enabled(vcpu
) &&
11924 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
11925 vcpu
->arch
.apf
.pageready_pending
= true;
11926 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
11929 vcpu
->arch
.apf
.halted
= false;
11930 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11933 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
11935 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
11936 if (!vcpu
->arch
.apf
.pageready_pending
)
11937 kvm_vcpu_kick(vcpu
);
11940 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
11942 if (!kvm_pv_async_pf_enabled(vcpu
))
11945 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
11948 void kvm_arch_start_assignment(struct kvm
*kvm
)
11950 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
11951 static_call_cond(kvm_x86_start_assignment
)(kvm
);
11953 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
11955 void kvm_arch_end_assignment(struct kvm
*kvm
)
11957 atomic_dec(&kvm
->arch
.assigned_device_count
);
11959 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
11961 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
11963 return atomic_read(&kvm
->arch
.assigned_device_count
);
11965 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
11967 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
11969 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
11971 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
11973 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
11975 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
11977 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
11979 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
11981 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
11983 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
11985 bool kvm_arch_has_irq_bypass(void)
11990 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
11991 struct irq_bypass_producer
*prod
)
11993 struct kvm_kernel_irqfd
*irqfd
=
11994 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
11997 irqfd
->producer
= prod
;
11998 kvm_arch_start_assignment(irqfd
->kvm
);
11999 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
,
12000 prod
->irq
, irqfd
->gsi
, 1);
12003 kvm_arch_end_assignment(irqfd
->kvm
);
12008 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
12009 struct irq_bypass_producer
*prod
)
12012 struct kvm_kernel_irqfd
*irqfd
=
12013 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12015 WARN_ON(irqfd
->producer
!= prod
);
12016 irqfd
->producer
= NULL
;
12019 * When producer of consumer is unregistered, we change back to
12020 * remapped mode, so we can re-use the current implementation
12021 * when the irq is masked/disabled or the consumer side (KVM
12022 * int this case doesn't want to receive the interrupts.
12024 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
12026 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
12027 " fails: %d\n", irqfd
->consumer
.token
, ret
);
12029 kvm_arch_end_assignment(irqfd
->kvm
);
12032 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
12033 uint32_t guest_irq
, bool set
)
12035 return static_call(kvm_x86_update_pi_irte
)(kvm
, host_irq
, guest_irq
, set
);
12038 bool kvm_vector_hashing_enabled(void)
12040 return vector_hashing
;
12043 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
12045 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
12047 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
12050 int kvm_spec_ctrl_test_value(u64 value
)
12053 * test that setting IA32_SPEC_CTRL to given value
12054 * is allowed by the host processor
12058 unsigned long flags
;
12061 local_irq_save(flags
);
12063 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
12065 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
12068 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
12070 local_irq_restore(flags
);
12074 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
12076 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
12078 struct x86_exception fault
;
12079 u32 access
= error_code
&
12080 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
12082 if (!(error_code
& PFERR_PRESENT_MASK
) ||
12083 vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
12085 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12086 * tables probably do not match the TLB. Just proceed
12087 * with the error code that the processor gave.
12089 fault
.vector
= PF_VECTOR
;
12090 fault
.error_code_valid
= true;
12091 fault
.error_code
= error_code
;
12092 fault
.nested_page_fault
= false;
12093 fault
.address
= gva
;
12095 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
12097 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
12100 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12101 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12102 * indicates whether exit to userspace is needed.
12104 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
12105 struct x86_exception
*e
)
12107 if (r
== X86EMUL_PROPAGATE_FAULT
) {
12108 kvm_inject_emulated_page_fault(vcpu
, e
);
12113 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12114 * while handling a VMX instruction KVM could've handled the request
12115 * correctly by exiting to userspace and performing I/O but there
12116 * doesn't seem to be a real use-case behind such requests, just return
12117 * KVM_EXIT_INTERNAL_ERROR for now.
12119 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
12120 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
12121 vcpu
->run
->internal
.ndata
= 0;
12125 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
12127 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
12130 struct x86_exception e
;
12137 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
12138 if (r
!= X86EMUL_CONTINUE
)
12139 return kvm_handle_memory_failure(vcpu
, r
, &e
);
12141 if (operand
.pcid
>> 12 != 0) {
12142 kvm_inject_gp(vcpu
, 0);
12146 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
12149 case INVPCID_TYPE_INDIV_ADDR
:
12150 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
12151 is_noncanonical_address(operand
.gla
, vcpu
)) {
12152 kvm_inject_gp(vcpu
, 0);
12155 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
12156 return kvm_skip_emulated_instruction(vcpu
);
12158 case INVPCID_TYPE_SINGLE_CTXT
:
12159 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
12160 kvm_inject_gp(vcpu
, 0);
12164 kvm_invalidate_pcid(vcpu
, operand
.pcid
);
12165 return kvm_skip_emulated_instruction(vcpu
);
12167 case INVPCID_TYPE_ALL_NON_GLOBAL
:
12169 * Currently, KVM doesn't mark global entries in the shadow
12170 * page tables, so a non-global flush just degenerates to a
12171 * global flush. If needed, we could optimize this later by
12172 * keeping track of global entries in shadow page tables.
12176 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
12177 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12178 return kvm_skip_emulated_instruction(vcpu
);
12181 BUG(); /* We have already checked above that type <= 3 */
12184 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
12186 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
12188 struct kvm_run
*run
= vcpu
->run
;
12189 struct kvm_mmio_fragment
*frag
;
12192 BUG_ON(!vcpu
->mmio_needed
);
12194 /* Complete previous fragment */
12195 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
12196 len
= min(8u, frag
->len
);
12197 if (!vcpu
->mmio_is_write
)
12198 memcpy(frag
->data
, run
->mmio
.data
, len
);
12200 if (frag
->len
<= 8) {
12201 /* Switch to the next fragment. */
12203 vcpu
->mmio_cur_fragment
++;
12205 /* Go forward to the next mmio piece. */
12211 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
12212 vcpu
->mmio_needed
= 0;
12214 // VMG change, at this point, we're always done
12215 // RIP has already been advanced
12219 // More MMIO is needed
12220 run
->mmio
.phys_addr
= frag
->gpa
;
12221 run
->mmio
.len
= min(8u, frag
->len
);
12222 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
12223 if (run
->mmio
.is_write
)
12224 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12225 run
->exit_reason
= KVM_EXIT_MMIO
;
12227 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12232 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12236 struct kvm_mmio_fragment
*frag
;
12241 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12242 if (handled
== bytes
)
12249 /*TODO: Check if need to increment number of frags */
12250 frag
= vcpu
->mmio_fragments
;
12251 vcpu
->mmio_nr_fragments
= 1;
12256 vcpu
->mmio_needed
= 1;
12257 vcpu
->mmio_cur_fragment
= 0;
12259 vcpu
->run
->mmio
.phys_addr
= gpa
;
12260 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12261 vcpu
->run
->mmio
.is_write
= 1;
12262 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12263 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12265 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12269 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
12271 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12275 struct kvm_mmio_fragment
*frag
;
12280 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12281 if (handled
== bytes
)
12288 /*TODO: Check if need to increment number of frags */
12289 frag
= vcpu
->mmio_fragments
;
12290 vcpu
->mmio_nr_fragments
= 1;
12295 vcpu
->mmio_needed
= 1;
12296 vcpu
->mmio_cur_fragment
= 0;
12298 vcpu
->run
->mmio
.phys_addr
= gpa
;
12299 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12300 vcpu
->run
->mmio
.is_write
= 0;
12301 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12303 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12307 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
12309 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12310 unsigned int port
);
12312 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
12314 int size
= vcpu
->arch
.pio
.size
;
12315 int port
= vcpu
->arch
.pio
.port
;
12317 vcpu
->arch
.pio
.count
= 0;
12318 if (vcpu
->arch
.sev_pio_count
)
12319 return kvm_sev_es_outs(vcpu
, size
, port
);
12323 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12327 unsigned int count
=
12328 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12329 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
12331 /* memcpy done already by emulator_pio_out. */
12332 vcpu
->arch
.sev_pio_count
-= count
;
12333 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12337 /* Emulation done by the kernel. */
12338 if (!vcpu
->arch
.sev_pio_count
)
12342 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
12346 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12347 unsigned int port
);
12349 static void advance_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12351 unsigned count
= vcpu
->arch
.pio
.count
;
12352 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
12353 vcpu
->arch
.sev_pio_count
-= count
;
12354 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12357 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12359 int size
= vcpu
->arch
.pio
.size
;
12360 int port
= vcpu
->arch
.pio
.port
;
12362 advance_sev_es_emulated_ins(vcpu
);
12363 if (vcpu
->arch
.sev_pio_count
)
12364 return kvm_sev_es_ins(vcpu
, size
, port
);
12368 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12372 unsigned int count
=
12373 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12374 if (!__emulator_pio_in(vcpu
, size
, port
, count
))
12377 /* Emulation done by the kernel. */
12378 advance_sev_es_emulated_ins(vcpu
);
12379 if (!vcpu
->arch
.sev_pio_count
)
12383 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
12387 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
12388 unsigned int port
, void *data
, unsigned int count
,
12391 vcpu
->arch
.sev_pio_data
= data
;
12392 vcpu
->arch
.sev_pio_count
= count
;
12393 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
12394 : kvm_sev_es_outs(vcpu
, size
, port
);
12396 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
12398 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
12399 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
12400 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
12401 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
12402 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
12403 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
12404 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
12405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
12406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
12407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
12408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
12409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
12410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
12411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
12412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
12413 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
12414 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
12415 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
12416 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
12417 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
12418 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
12419 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
12420 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);
12421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
12422 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
12423 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
12424 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);