1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/internal.h> /* Ugh! */
72 #include <asm/pvclock.h>
73 #include <asm/div64.h>
74 #include <asm/irq_remapping.h>
75 #include <asm/mshyperv.h>
76 #include <asm/hypervisor.h>
77 #include <asm/tlbflush.h>
78 #include <asm/intel_pt.h>
79 #include <asm/emulate_prefix.h>
81 #include <clocksource/hyperv_timer.h>
83 #define CREATE_TRACE_POINTS
86 #define MAX_IO_MSRS 256
87 #define KVM_MAX_MCE_BANKS 32
88 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
91 #define emul_to_vcpu(ctxt) \
92 ((struct kvm_vcpu *)(ctxt)->vcpu)
95 * - enable syscall per default because its emulated by KVM
96 * - enable LME and LMA per default on 64 bit KVM
100 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
102 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
105 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
110 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
112 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
113 static void process_nmi(struct kvm_vcpu
*vcpu
);
114 static void process_smi(struct kvm_vcpu
*vcpu
);
115 static void enter_smm(struct kvm_vcpu
*vcpu
);
116 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
117 static void store_regs(struct kvm_vcpu
*vcpu
);
118 static int sync_regs(struct kvm_vcpu
*vcpu
);
120 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
121 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
123 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
124 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
126 #define KVM_X86_OP(func) \
127 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
128 *(((struct kvm_x86_ops *)0)->func));
129 #define KVM_X86_OP_NULL KVM_X86_OP
130 #include <asm/kvm-x86-ops.h>
131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current
);
135 static bool __read_mostly ignore_msrs
= 0;
136 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
138 bool __read_mostly report_ignored_msrs
= true;
139 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
140 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
142 unsigned int min_timer_period_us
= 200;
143 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
145 static bool __read_mostly kvmclock_periodic_sync
= true;
146 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
148 bool __read_mostly kvm_has_tsc_control
;
149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
150 u32 __read_mostly kvm_max_guest_tsc_khz
;
151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
152 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
154 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
156 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
158 bool __read_mostly kvm_has_bus_lock_exit
;
159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit
);
161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
162 static u32 __read_mostly tsc_tolerance_ppm
= 250;
163 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
166 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
167 * adaptive tuning starting from default advancement of 1000ns. '0' disables
168 * advancement entirely. Any other value is used as-is and disables adaptive
169 * tuning, i.e. allows privileged userspace to set an exact advancement time.
171 static int __read_mostly lapic_timer_advance_ns
= -1;
172 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
174 static bool __read_mostly vector_hashing
= true;
175 module_param(vector_hashing
, bool, S_IRUGO
);
177 bool __read_mostly enable_vmware_backdoor
= false;
178 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
181 static bool __read_mostly force_emulation_prefix
= false;
182 module_param(force_emulation_prefix
, bool, S_IRUGO
);
184 int __read_mostly pi_inject_timer
= -1;
185 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
188 * Restoring the host value for MSRs that are only consumed when running in
189 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
190 * returns to userspace, i.e. the kernel can run with the guest's value.
192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
194 struct kvm_user_return_msrs
{
195 struct user_return_notifier urn
;
197 struct kvm_user_return_msr_values
{
200 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
203 u32 __read_mostly kvm_nr_uret_msrs
;
204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
205 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
206 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
208 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
209 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
210 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
211 | XFEATURE_MASK_PKRU)
213 u64 __read_mostly host_efer
;
214 EXPORT_SYMBOL_GPL(host_efer
);
216 bool __read_mostly allow_smaller_maxphyaddr
= 0;
217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
219 bool __read_mostly enable_apicv
= true;
220 EXPORT_SYMBOL_GPL(enable_apicv
);
222 u64 __read_mostly host_xss
;
223 EXPORT_SYMBOL_GPL(host_xss
);
224 u64 __read_mostly supported_xss
;
225 EXPORT_SYMBOL_GPL(supported_xss
);
227 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
228 KVM_GENERIC_VM_STATS(),
229 STATS_DESC_COUNTER(VM
, mmu_shadow_zapped
),
230 STATS_DESC_COUNTER(VM
, mmu_pte_write
),
231 STATS_DESC_COUNTER(VM
, mmu_pde_zapped
),
232 STATS_DESC_COUNTER(VM
, mmu_flooded
),
233 STATS_DESC_COUNTER(VM
, mmu_recycled
),
234 STATS_DESC_COUNTER(VM
, mmu_cache_miss
),
235 STATS_DESC_ICOUNTER(VM
, mmu_unsync
),
236 STATS_DESC_ICOUNTER(VM
, pages_4k
),
237 STATS_DESC_ICOUNTER(VM
, pages_2m
),
238 STATS_DESC_ICOUNTER(VM
, pages_1g
),
239 STATS_DESC_ICOUNTER(VM
, nx_lpage_splits
),
240 STATS_DESC_PCOUNTER(VM
, max_mmu_rmap_size
),
241 STATS_DESC_PCOUNTER(VM
, max_mmu_page_hash_collisions
)
244 const struct kvm_stats_header kvm_vm_stats_header
= {
245 .name_size
= KVM_STATS_NAME_SIZE
,
246 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
247 .id_offset
= sizeof(struct kvm_stats_header
),
248 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
249 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
250 sizeof(kvm_vm_stats_desc
),
253 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
254 KVM_GENERIC_VCPU_STATS(),
255 STATS_DESC_COUNTER(VCPU
, pf_fixed
),
256 STATS_DESC_COUNTER(VCPU
, pf_guest
),
257 STATS_DESC_COUNTER(VCPU
, tlb_flush
),
258 STATS_DESC_COUNTER(VCPU
, invlpg
),
259 STATS_DESC_COUNTER(VCPU
, exits
),
260 STATS_DESC_COUNTER(VCPU
, io_exits
),
261 STATS_DESC_COUNTER(VCPU
, mmio_exits
),
262 STATS_DESC_COUNTER(VCPU
, signal_exits
),
263 STATS_DESC_COUNTER(VCPU
, irq_window_exits
),
264 STATS_DESC_COUNTER(VCPU
, nmi_window_exits
),
265 STATS_DESC_COUNTER(VCPU
, l1d_flush
),
266 STATS_DESC_COUNTER(VCPU
, halt_exits
),
267 STATS_DESC_COUNTER(VCPU
, request_irq_exits
),
268 STATS_DESC_COUNTER(VCPU
, irq_exits
),
269 STATS_DESC_COUNTER(VCPU
, host_state_reload
),
270 STATS_DESC_COUNTER(VCPU
, fpu_reload
),
271 STATS_DESC_COUNTER(VCPU
, insn_emulation
),
272 STATS_DESC_COUNTER(VCPU
, insn_emulation_fail
),
273 STATS_DESC_COUNTER(VCPU
, hypercalls
),
274 STATS_DESC_COUNTER(VCPU
, irq_injections
),
275 STATS_DESC_COUNTER(VCPU
, nmi_injections
),
276 STATS_DESC_COUNTER(VCPU
, req_event
),
277 STATS_DESC_COUNTER(VCPU
, nested_run
),
278 STATS_DESC_COUNTER(VCPU
, directed_yield_attempted
),
279 STATS_DESC_COUNTER(VCPU
, directed_yield_successful
),
280 STATS_DESC_ICOUNTER(VCPU
, guest_mode
)
283 const struct kvm_stats_header kvm_vcpu_stats_header
= {
284 .name_size
= KVM_STATS_NAME_SIZE
,
285 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
286 .id_offset
= sizeof(struct kvm_stats_header
),
287 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
288 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
289 sizeof(kvm_vcpu_stats_desc
),
292 u64 __read_mostly host_xcr0
;
293 u64 __read_mostly supported_xcr0
;
294 EXPORT_SYMBOL_GPL(supported_xcr0
);
296 static struct kmem_cache
*x86_fpu_cache
;
298 static struct kmem_cache
*x86_emulator_cache
;
301 * When called, it means the previous get/set msr reached an invalid msr.
302 * Return true if we want to ignore/silent this failed msr access.
304 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
306 const char *op
= write
? "wrmsr" : "rdmsr";
309 if (report_ignored_msrs
)
310 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
315 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
321 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
323 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
324 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
326 return kmem_cache_create_usercopy("x86_emulator", size
,
327 __alignof__(struct x86_emulate_ctxt
),
328 SLAB_ACCOUNT
, useroffset
,
329 size
- useroffset
, NULL
);
332 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
337 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
338 vcpu
->arch
.apf
.gfns
[i
] = ~0;
341 static void kvm_on_user_return(struct user_return_notifier
*urn
)
344 struct kvm_user_return_msrs
*msrs
345 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
346 struct kvm_user_return_msr_values
*values
;
350 * Disabling irqs at this point since the following code could be
351 * interrupted and executed through kvm_arch_hardware_disable()
353 local_irq_save(flags
);
354 if (msrs
->registered
) {
355 msrs
->registered
= false;
356 user_return_notifier_unregister(urn
);
358 local_irq_restore(flags
);
359 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
360 values
= &msrs
->values
[slot
];
361 if (values
->host
!= values
->curr
) {
362 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
363 values
->curr
= values
->host
;
368 static int kvm_probe_user_return_msr(u32 msr
)
374 ret
= rdmsrl_safe(msr
, &val
);
377 ret
= wrmsrl_safe(msr
, val
);
383 int kvm_add_user_return_msr(u32 msr
)
385 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
387 if (kvm_probe_user_return_msr(msr
))
390 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
391 return kvm_nr_uret_msrs
++;
393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
395 int kvm_find_user_return_msr(u32 msr
)
399 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
400 if (kvm_uret_msrs_list
[i
] == msr
)
405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
407 static void kvm_user_return_msr_cpu_online(void)
409 unsigned int cpu
= smp_processor_id();
410 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
414 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
415 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
416 msrs
->values
[i
].host
= value
;
417 msrs
->values
[i
].curr
= value
;
421 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
423 unsigned int cpu
= smp_processor_id();
424 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
427 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
428 if (value
== msrs
->values
[slot
].curr
)
430 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
434 msrs
->values
[slot
].curr
= value
;
435 if (!msrs
->registered
) {
436 msrs
->urn
.on_user_return
= kvm_on_user_return
;
437 user_return_notifier_register(&msrs
->urn
);
438 msrs
->registered
= true;
442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
444 static void drop_user_return_notifiers(void)
446 unsigned int cpu
= smp_processor_id();
447 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
449 if (msrs
->registered
)
450 kvm_on_user_return(&msrs
->urn
);
453 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
455 return vcpu
->arch
.apic_base
;
457 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
459 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
461 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
465 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
467 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
468 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
469 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
470 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
472 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
474 if (!msr_info
->host_initiated
) {
475 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
477 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
481 kvm_lapic_set_base(vcpu
, msr_info
->data
);
482 kvm_recalculate_apic_map(vcpu
->kvm
);
485 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
488 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
490 * Hardware virtualization extension instructions may fault if a reboot turns
491 * off virtualization while processes are running. Usually after catching the
492 * fault we just panic; during reboot instead the instruction is ignored.
494 noinstr
void kvm_spurious_fault(void)
496 /* Fault while not rebooting. We want the trace. */
497 BUG_ON(!kvm_rebooting
);
499 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
501 #define EXCPT_BENIGN 0
502 #define EXCPT_CONTRIBUTORY 1
505 static int exception_class(int vector
)
515 return EXCPT_CONTRIBUTORY
;
522 #define EXCPT_FAULT 0
524 #define EXCPT_ABORT 2
525 #define EXCPT_INTERRUPT 3
527 static int exception_type(int vector
)
531 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
532 return EXCPT_INTERRUPT
;
536 /* #DB is trap, as instruction watchpoints are handled elsewhere */
537 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
540 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
543 /* Reserved exceptions will result in fault */
547 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
549 unsigned nr
= vcpu
->arch
.exception
.nr
;
550 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
551 unsigned long payload
= vcpu
->arch
.exception
.payload
;
559 * "Certain debug exceptions may clear bit 0-3. The
560 * remaining contents of the DR6 register are never
561 * cleared by the processor".
563 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
565 * In order to reflect the #DB exception payload in guest
566 * dr6, three components need to be considered: active low
567 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
569 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
570 * In the target guest dr6:
571 * FIXED_1 bits should always be set.
572 * Active low bits should be cleared if 1-setting in payload.
573 * Active high bits should be set if 1-setting in payload.
575 * Note, the payload is compatible with the pending debug
576 * exceptions/exit qualification under VMX, that active_low bits
577 * are active high in payload.
578 * So they need to be flipped for DR6.
580 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
581 vcpu
->arch
.dr6
|= payload
;
582 vcpu
->arch
.dr6
^= payload
& DR6_ACTIVE_LOW
;
585 * The #DB payload is defined as compatible with the 'pending
586 * debug exceptions' field under VMX, not DR6. While bit 12 is
587 * defined in the 'pending debug exceptions' field (enabled
588 * breakpoint), it is reserved and must be zero in DR6.
590 vcpu
->arch
.dr6
&= ~BIT(12);
593 vcpu
->arch
.cr2
= payload
;
597 vcpu
->arch
.exception
.has_payload
= false;
598 vcpu
->arch
.exception
.payload
= 0;
600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
602 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
603 unsigned nr
, bool has_error
, u32 error_code
,
604 bool has_payload
, unsigned long payload
, bool reinject
)
609 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
611 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
615 * On vmentry, vcpu->arch.exception.pending is only
616 * true if an event injection was blocked by
617 * nested_run_pending. In that case, however,
618 * vcpu_enter_guest requests an immediate exit,
619 * and the guest shouldn't proceed far enough to
622 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
623 vcpu
->arch
.exception
.injected
= true;
624 if (WARN_ON_ONCE(has_payload
)) {
626 * A reinjected event has already
627 * delivered its payload.
633 vcpu
->arch
.exception
.pending
= true;
634 vcpu
->arch
.exception
.injected
= false;
636 vcpu
->arch
.exception
.has_error_code
= has_error
;
637 vcpu
->arch
.exception
.nr
= nr
;
638 vcpu
->arch
.exception
.error_code
= error_code
;
639 vcpu
->arch
.exception
.has_payload
= has_payload
;
640 vcpu
->arch
.exception
.payload
= payload
;
641 if (!is_guest_mode(vcpu
))
642 kvm_deliver_exception_payload(vcpu
);
646 /* to check exception */
647 prev_nr
= vcpu
->arch
.exception
.nr
;
648 if (prev_nr
== DF_VECTOR
) {
649 /* triple fault -> shutdown */
650 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
653 class1
= exception_class(prev_nr
);
654 class2
= exception_class(nr
);
655 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
656 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
658 * Generate double fault per SDM Table 5-5. Set
659 * exception.pending = true so that the double fault
660 * can trigger a nested vmexit.
662 vcpu
->arch
.exception
.pending
= true;
663 vcpu
->arch
.exception
.injected
= false;
664 vcpu
->arch
.exception
.has_error_code
= true;
665 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
666 vcpu
->arch
.exception
.error_code
= 0;
667 vcpu
->arch
.exception
.has_payload
= false;
668 vcpu
->arch
.exception
.payload
= 0;
670 /* replace previous exception with a new one in a hope
671 that instruction re-execution will regenerate lost
676 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
678 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
680 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
682 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
684 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
686 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
688 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
689 unsigned long payload
)
691 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
695 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
696 u32 error_code
, unsigned long payload
)
698 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
699 true, payload
, false);
702 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
705 kvm_inject_gp(vcpu
, 0);
707 return kvm_skip_emulated_instruction(vcpu
);
711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
713 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
715 ++vcpu
->stat
.pf_guest
;
716 vcpu
->arch
.exception
.nested_apf
=
717 is_guest_mode(vcpu
) && fault
->async_page_fault
;
718 if (vcpu
->arch
.exception
.nested_apf
) {
719 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
720 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
722 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
729 struct x86_exception
*fault
)
731 struct kvm_mmu
*fault_mmu
;
732 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
734 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
738 * Invalidate the TLB entry for the faulting address, if it exists,
739 * else the access will fault indefinitely (and to emulate hardware).
741 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
742 !(fault
->error_code
& PFERR_RSVD_MASK
))
743 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
744 fault_mmu
->root_hpa
);
746 fault_mmu
->inject_page_fault(vcpu
, fault
);
747 return fault
->nested_page_fault
;
749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
751 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
753 atomic_inc(&vcpu
->arch
.nmi_queued
);
754 kvm_make_request(KVM_REQ_NMI
, vcpu
);
756 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
758 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
760 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
764 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
766 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
771 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
772 * a #GP and return false.
774 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
776 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
778 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
781 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
783 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
785 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
788 kvm_queue_exception(vcpu
, UD_VECTOR
);
791 EXPORT_SYMBOL_GPL(kvm_require_dr
);
794 * This function will be used to read from the physical memory of the currently
795 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
796 * can read from guest physical or from the guest's guest physical memory.
798 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
799 gfn_t ngfn
, void *data
, int offset
, int len
,
802 struct x86_exception exception
;
806 ngpa
= gfn_to_gpa(ngfn
);
807 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
808 if (real_gfn
== UNMAPPED_GVA
)
811 real_gfn
= gpa_to_gfn(real_gfn
);
813 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
815 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
817 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
819 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
823 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
825 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
827 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
828 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
831 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
833 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
834 offset
* sizeof(u64
), sizeof(pdpte
),
835 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
840 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
841 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
842 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
849 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
850 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
851 vcpu
->arch
.pdptrs_from_userspace
= false;
857 EXPORT_SYMBOL_GPL(load_pdptrs
);
859 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
861 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
862 kvm_clear_async_pf_completion_queue(vcpu
);
863 kvm_async_pf_hash_reset(vcpu
);
866 if ((cr0
^ old_cr0
) & KVM_MMU_CR0_ROLE_BITS
)
867 kvm_mmu_reset_context(vcpu
);
869 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
870 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
871 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
872 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
874 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
876 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
878 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
879 unsigned long pdptr_bits
= X86_CR0_CD
| X86_CR0_NW
| X86_CR0_PG
;
884 if (cr0
& 0xffffffff00000000UL
)
888 cr0
&= ~CR0_RESERVED_BITS
;
890 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
893 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
897 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
898 (cr0
& X86_CR0_PG
)) {
903 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
908 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
909 is_pae(vcpu
) && ((cr0
^ old_cr0
) & pdptr_bits
) &&
910 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
)))
913 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
916 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
918 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
922 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
924 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
926 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
928 EXPORT_SYMBOL_GPL(kvm_lmsw
);
930 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
932 if (vcpu
->arch
.guest_state_protected
)
935 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
937 if (vcpu
->arch
.xcr0
!= host_xcr0
)
938 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
940 if (vcpu
->arch
.xsaves_enabled
&&
941 vcpu
->arch
.ia32_xss
!= host_xss
)
942 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
945 if (static_cpu_has(X86_FEATURE_PKU
) &&
946 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
947 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
948 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
949 write_pkru(vcpu
->arch
.pkru
);
951 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
953 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
955 if (vcpu
->arch
.guest_state_protected
)
958 if (static_cpu_has(X86_FEATURE_PKU
) &&
959 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
960 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
961 vcpu
->arch
.pkru
= rdpkru();
962 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
963 write_pkru(vcpu
->arch
.host_pkru
);
966 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
968 if (vcpu
->arch
.xcr0
!= host_xcr0
)
969 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
971 if (vcpu
->arch
.xsaves_enabled
&&
972 vcpu
->arch
.ia32_xss
!= host_xss
)
973 wrmsrl(MSR_IA32_XSS
, host_xss
);
977 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
979 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
982 u64 old_xcr0
= vcpu
->arch
.xcr0
;
985 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
986 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
988 if (!(xcr0
& XFEATURE_MASK_FP
))
990 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
994 * Do not allow the guest to set bits that we do not support
995 * saving. However, xcr0 bit 0 is always set, even if the
996 * emulated CPU does not support XSAVE (see fx_init).
998 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
999 if (xcr0
& ~valid_bits
)
1002 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
1003 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1006 if (xcr0
& XFEATURE_MASK_AVX512
) {
1007 if (!(xcr0
& XFEATURE_MASK_YMM
))
1009 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1012 vcpu
->arch
.xcr0
= xcr0
;
1014 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1015 kvm_update_cpuid_runtime(vcpu
);
1019 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1021 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1022 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1023 kvm_inject_gp(vcpu
, 0);
1027 return kvm_skip_emulated_instruction(vcpu
);
1029 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1031 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1033 if (cr4
& cr4_reserved_bits
)
1036 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1039 return static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1041 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
1043 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1045 if (((cr4
^ old_cr4
) & KVM_MMU_CR4_ROLE_BITS
) ||
1046 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1047 kvm_mmu_reset_context(vcpu
);
1049 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1051 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1053 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1054 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1057 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1060 if (is_long_mode(vcpu
)) {
1061 if (!(cr4
& X86_CR4_PAE
))
1063 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1065 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1066 && ((cr4
^ old_cr4
) & pdptr_bits
)
1067 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
1068 kvm_read_cr3(vcpu
)))
1071 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1072 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1075 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1076 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1080 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1082 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1086 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1088 static void kvm_invalidate_pcid(struct kvm_vcpu
*vcpu
, unsigned long pcid
)
1090 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
1091 unsigned long roots_to_free
= 0;
1095 * If neither the current CR3 nor any of the prev_roots use the given
1096 * PCID, then nothing needs to be done here because a resync will
1097 * happen anyway before switching to any other CR3.
1099 if (kvm_get_active_pcid(vcpu
) == pcid
) {
1100 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1101 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1104 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
1105 if (kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
) == pcid
)
1106 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
1108 kvm_mmu_free_roots(vcpu
, mmu
, roots_to_free
);
1111 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1113 bool skip_tlb_flush
= false;
1114 unsigned long pcid
= 0;
1115 #ifdef CONFIG_X86_64
1116 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1119 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1120 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1121 pcid
= cr3
& X86_CR3_PCID_MASK
;
1125 /* PDPTRs are always reloaded for PAE paging. */
1126 if (cr3
== kvm_read_cr3(vcpu
) && !is_pae_paging(vcpu
))
1127 goto handle_tlb_flush
;
1130 * Do not condition the GPA check on long mode, this helper is used to
1131 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1132 * the current vCPU mode is accurate.
1134 if (kvm_vcpu_is_illegal_gpa(vcpu
, cr3
))
1137 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1140 if (cr3
!= kvm_read_cr3(vcpu
))
1141 kvm_mmu_new_pgd(vcpu
, cr3
);
1143 vcpu
->arch
.cr3
= cr3
;
1144 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1148 * A load of CR3 that flushes the TLB flushes only the current PCID,
1149 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1150 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1151 * and it's impossible to use a non-zero PCID when PCID is disabled,
1152 * i.e. only PCID=0 can be relevant.
1154 if (!skip_tlb_flush
)
1155 kvm_invalidate_pcid(vcpu
, pcid
);
1159 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1161 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1163 if (cr8
& CR8_RESERVED_BITS
)
1165 if (lapic_in_kernel(vcpu
))
1166 kvm_lapic_set_tpr(vcpu
, cr8
);
1168 vcpu
->arch
.cr8
= cr8
;
1171 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1173 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1175 if (lapic_in_kernel(vcpu
))
1176 return kvm_lapic_get_cr8(vcpu
);
1178 return vcpu
->arch
.cr8
;
1180 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1182 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1186 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1187 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1188 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1192 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1196 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1197 dr7
= vcpu
->arch
.guest_debug_dr7
;
1199 dr7
= vcpu
->arch
.dr7
;
1200 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1201 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1202 if (dr7
& DR7_BP_EN_MASK
)
1203 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1205 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1207 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1209 u64 fixed
= DR6_FIXED_1
;
1211 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1214 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1215 fixed
|= DR6_BUS_LOCK
;
1219 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1221 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1225 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1226 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1227 vcpu
->arch
.eff_db
[dr
] = val
;
1231 if (!kvm_dr6_valid(val
))
1233 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1237 if (!kvm_dr7_valid(val
))
1239 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1240 kvm_update_dr7(vcpu
);
1246 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1248 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1250 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1254 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1258 *val
= vcpu
->arch
.dr6
;
1262 *val
= vcpu
->arch
.dr7
;
1266 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1268 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1270 u32 ecx
= kvm_rcx_read(vcpu
);
1273 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1274 kvm_inject_gp(vcpu
, 0);
1278 kvm_rax_write(vcpu
, (u32
)data
);
1279 kvm_rdx_write(vcpu
, data
>> 32);
1280 return kvm_skip_emulated_instruction(vcpu
);
1282 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1285 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1286 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1288 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1289 * extract the supported MSRs from the related const lists.
1290 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1291 * capabilities of the host cpu. This capabilities test skips MSRs that are
1292 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1293 * may depend on host virtualization features rather than host cpu features.
1296 static const u32 msrs_to_save_all
[] = {
1297 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1299 #ifdef CONFIG_X86_64
1300 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1302 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1303 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1305 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1306 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1307 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1308 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1309 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1310 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1311 MSR_IA32_UMWAIT_CONTROL
,
1313 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1314 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2, MSR_ARCH_PERFMON_FIXED_CTR0
+ 3,
1315 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1316 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1317 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1318 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1319 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1320 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1321 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1322 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1323 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1324 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1325 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1326 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1327 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1328 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1329 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1330 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1331 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1332 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1333 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1334 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1336 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1337 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1338 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1339 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1340 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1341 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1344 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1345 static unsigned num_msrs_to_save
;
1347 static const u32 emulated_msrs_all
[] = {
1348 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1349 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1350 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1351 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1352 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1353 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1354 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1356 HV_X64_MSR_VP_INDEX
,
1357 HV_X64_MSR_VP_RUNTIME
,
1358 HV_X64_MSR_SCONTROL
,
1359 HV_X64_MSR_STIMER0_CONFIG
,
1360 HV_X64_MSR_VP_ASSIST_PAGE
,
1361 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1362 HV_X64_MSR_TSC_EMULATION_STATUS
,
1363 HV_X64_MSR_SYNDBG_OPTIONS
,
1364 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1365 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1366 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1368 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1369 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1371 MSR_IA32_TSC_ADJUST
,
1372 MSR_IA32_TSC_DEADLINE
,
1373 MSR_IA32_ARCH_CAPABILITIES
,
1374 MSR_IA32_PERF_CAPABILITIES
,
1375 MSR_IA32_MISC_ENABLE
,
1376 MSR_IA32_MCG_STATUS
,
1378 MSR_IA32_MCG_EXT_CTL
,
1382 MSR_MISC_FEATURES_ENABLES
,
1383 MSR_AMD64_VIRT_SPEC_CTRL
,
1388 * The following list leaves out MSRs whose values are determined
1389 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1390 * We always support the "true" VMX control MSRs, even if the host
1391 * processor does not, so I am putting these registers here rather
1392 * than in msrs_to_save_all.
1395 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1396 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1397 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1398 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1400 MSR_IA32_VMX_CR0_FIXED0
,
1401 MSR_IA32_VMX_CR4_FIXED0
,
1402 MSR_IA32_VMX_VMCS_ENUM
,
1403 MSR_IA32_VMX_PROCBASED_CTLS2
,
1404 MSR_IA32_VMX_EPT_VPID_CAP
,
1405 MSR_IA32_VMX_VMFUNC
,
1408 MSR_KVM_POLL_CONTROL
,
1411 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1412 static unsigned num_emulated_msrs
;
1415 * List of msr numbers which are used to expose MSR-based features that
1416 * can be used by a hypervisor to validate requested CPU features.
1418 static const u32 msr_based_features_all
[] = {
1420 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1421 MSR_IA32_VMX_PINBASED_CTLS
,
1422 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1423 MSR_IA32_VMX_PROCBASED_CTLS
,
1424 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1425 MSR_IA32_VMX_EXIT_CTLS
,
1426 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1427 MSR_IA32_VMX_ENTRY_CTLS
,
1429 MSR_IA32_VMX_CR0_FIXED0
,
1430 MSR_IA32_VMX_CR0_FIXED1
,
1431 MSR_IA32_VMX_CR4_FIXED0
,
1432 MSR_IA32_VMX_CR4_FIXED1
,
1433 MSR_IA32_VMX_VMCS_ENUM
,
1434 MSR_IA32_VMX_PROCBASED_CTLS2
,
1435 MSR_IA32_VMX_EPT_VPID_CAP
,
1436 MSR_IA32_VMX_VMFUNC
,
1440 MSR_IA32_ARCH_CAPABILITIES
,
1441 MSR_IA32_PERF_CAPABILITIES
,
1444 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1445 static unsigned int num_msr_based_features
;
1447 static u64
kvm_get_arch_capabilities(void)
1451 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1452 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1455 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1456 * the nested hypervisor runs with NX huge pages. If it is not,
1457 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1458 * L1 guests, so it need not worry about its own (L2) guests.
1460 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1463 * If we're doing cache flushes (either "always" or "cond")
1464 * we will do one whenever the guest does a vmlaunch/vmresume.
1465 * If an outer hypervisor is doing the cache flush for us
1466 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1467 * capability to the guest too, and if EPT is disabled we're not
1468 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1469 * require a nested hypervisor to do a flush of its own.
1471 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1472 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1474 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1475 data
|= ARCH_CAP_RDCL_NO
;
1476 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1477 data
|= ARCH_CAP_SSB_NO
;
1478 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1479 data
|= ARCH_CAP_MDS_NO
;
1481 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1483 * If RTM=0 because the kernel has disabled TSX, the host might
1484 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1485 * and therefore knows that there cannot be TAA) but keep
1486 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1487 * and we want to allow migrating those guests to tsx=off hosts.
1489 data
&= ~ARCH_CAP_TAA_NO
;
1490 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1491 data
|= ARCH_CAP_TAA_NO
;
1494 * Nothing to do here; we emulate TSX_CTRL if present on the
1495 * host so the guest can choose between disabling TSX or
1496 * using VERW to clear CPU buffers.
1503 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1505 switch (msr
->index
) {
1506 case MSR_IA32_ARCH_CAPABILITIES
:
1507 msr
->data
= kvm_get_arch_capabilities();
1509 case MSR_IA32_UCODE_REV
:
1510 rdmsrl_safe(msr
->index
, &msr
->data
);
1513 return static_call(kvm_x86_get_msr_feature
)(msr
);
1518 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1520 struct kvm_msr_entry msr
;
1524 r
= kvm_get_msr_feature(&msr
);
1526 if (r
== KVM_MSR_RET_INVALID
) {
1527 /* Unconditionally clear the output for simplicity */
1529 if (kvm_msr_ignored_check(index
, 0, false))
1541 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1543 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1546 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1549 if (efer
& (EFER_LME
| EFER_LMA
) &&
1550 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1553 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1559 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1561 if (efer
& efer_reserved_bits
)
1564 return __kvm_valid_efer(vcpu
, efer
);
1566 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1568 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1570 u64 old_efer
= vcpu
->arch
.efer
;
1571 u64 efer
= msr_info
->data
;
1574 if (efer
& efer_reserved_bits
)
1577 if (!msr_info
->host_initiated
) {
1578 if (!__kvm_valid_efer(vcpu
, efer
))
1581 if (is_paging(vcpu
) &&
1582 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1587 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1589 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1595 /* Update reserved bits */
1596 if ((efer
^ old_efer
) & EFER_NX
)
1597 kvm_mmu_reset_context(vcpu
);
1602 void kvm_enable_efer_bits(u64 mask
)
1604 efer_reserved_bits
&= ~mask
;
1606 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1608 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1610 struct kvm_x86_msr_filter
*msr_filter
;
1611 struct msr_bitmap_range
*ranges
;
1612 struct kvm
*kvm
= vcpu
->kvm
;
1617 /* x2APIC MSRs do not support filtering. */
1618 if (index
>= 0x800 && index
<= 0x8ff)
1621 idx
= srcu_read_lock(&kvm
->srcu
);
1623 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1629 allowed
= msr_filter
->default_allow
;
1630 ranges
= msr_filter
->ranges
;
1632 for (i
= 0; i
< msr_filter
->count
; i
++) {
1633 u32 start
= ranges
[i
].base
;
1634 u32 end
= start
+ ranges
[i
].nmsrs
;
1635 u32 flags
= ranges
[i
].flags
;
1636 unsigned long *bitmap
= ranges
[i
].bitmap
;
1638 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1639 allowed
= !!test_bit(index
- start
, bitmap
);
1645 srcu_read_unlock(&kvm
->srcu
, idx
);
1649 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1652 * Write @data into the MSR specified by @index. Select MSR specific fault
1653 * checks are bypassed if @host_initiated is %true.
1654 * Returns 0 on success, non-0 otherwise.
1655 * Assumes vcpu_load() was already called.
1657 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1658 bool host_initiated
)
1660 struct msr_data msr
;
1662 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1663 return KVM_MSR_RET_FILTERED
;
1668 case MSR_KERNEL_GS_BASE
:
1671 if (is_noncanonical_address(data
, vcpu
))
1674 case MSR_IA32_SYSENTER_EIP
:
1675 case MSR_IA32_SYSENTER_ESP
:
1677 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1678 * non-canonical address is written on Intel but not on
1679 * AMD (which ignores the top 32-bits, because it does
1680 * not implement 64-bit SYSENTER).
1682 * 64-bit code should hence be able to write a non-canonical
1683 * value on AMD. Making the address canonical ensures that
1684 * vmentry does not fail on Intel after writing a non-canonical
1685 * value, and that something deterministic happens if the guest
1686 * invokes 64-bit SYSENTER.
1688 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1691 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1694 if (!host_initiated
&&
1695 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1696 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1700 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1701 * incomplete and conflicting architectural behavior. Current
1702 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1703 * reserved and always read as zeros. Enforce Intel's reserved
1704 * bits check if and only if the guest CPU is Intel, and clear
1705 * the bits in all other cases. This ensures cross-vendor
1706 * migration will provide consistent behavior for the guest.
1708 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1717 msr
.host_initiated
= host_initiated
;
1719 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1722 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1723 u32 index
, u64 data
, bool host_initiated
)
1725 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1727 if (ret
== KVM_MSR_RET_INVALID
)
1728 if (kvm_msr_ignored_check(index
, data
, true))
1735 * Read the MSR specified by @index into @data. Select MSR specific fault
1736 * checks are bypassed if @host_initiated is %true.
1737 * Returns 0 on success, non-0 otherwise.
1738 * Assumes vcpu_load() was already called.
1740 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1741 bool host_initiated
)
1743 struct msr_data msr
;
1746 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1747 return KVM_MSR_RET_FILTERED
;
1751 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1754 if (!host_initiated
&&
1755 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1756 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1762 msr
.host_initiated
= host_initiated
;
1764 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1770 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1771 u32 index
, u64
*data
, bool host_initiated
)
1773 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1775 if (ret
== KVM_MSR_RET_INVALID
) {
1776 /* Unconditionally clear *data for simplicity */
1778 if (kvm_msr_ignored_check(index
, 0, false))
1785 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1787 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1789 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1791 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1793 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1795 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1797 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1799 int err
= vcpu
->run
->msr
.error
;
1801 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1802 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1805 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, err
);
1808 static int complete_emulated_wrmsr(struct kvm_vcpu
*vcpu
)
1810 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
1813 static u64
kvm_msr_reason(int r
)
1816 case KVM_MSR_RET_INVALID
:
1817 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1818 case KVM_MSR_RET_FILTERED
:
1819 return KVM_MSR_EXIT_REASON_FILTER
;
1821 return KVM_MSR_EXIT_REASON_INVAL
;
1825 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1826 u32 exit_reason
, u64 data
,
1827 int (*completion
)(struct kvm_vcpu
*vcpu
),
1830 u64 msr_reason
= kvm_msr_reason(r
);
1832 /* Check if the user wanted to know about this MSR fault */
1833 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1836 vcpu
->run
->exit_reason
= exit_reason
;
1837 vcpu
->run
->msr
.error
= 0;
1838 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1839 vcpu
->run
->msr
.reason
= msr_reason
;
1840 vcpu
->run
->msr
.index
= index
;
1841 vcpu
->run
->msr
.data
= data
;
1842 vcpu
->arch
.complete_userspace_io
= completion
;
1847 static int kvm_get_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, int r
)
1849 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_RDMSR
, 0,
1850 complete_emulated_rdmsr
, r
);
1853 static int kvm_set_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
, int r
)
1855 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_WRMSR
, data
,
1856 complete_emulated_wrmsr
, r
);
1859 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1861 u32 ecx
= kvm_rcx_read(vcpu
);
1865 r
= kvm_get_msr(vcpu
, ecx
, &data
);
1867 /* MSR read failed? See if we should ask user space */
1868 if (r
&& kvm_get_msr_user_space(vcpu
, ecx
, r
)) {
1869 /* Bounce to user space */
1874 trace_kvm_msr_read(ecx
, data
);
1876 kvm_rax_write(vcpu
, data
& -1u);
1877 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1879 trace_kvm_msr_read_ex(ecx
);
1882 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1884 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1886 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1888 u32 ecx
= kvm_rcx_read(vcpu
);
1889 u64 data
= kvm_read_edx_eax(vcpu
);
1892 r
= kvm_set_msr(vcpu
, ecx
, data
);
1894 /* MSR write failed? See if we should ask user space */
1895 if (r
&& kvm_set_msr_user_space(vcpu
, ecx
, data
, r
))
1896 /* Bounce to user space */
1899 /* Signal all other negative errors to userspace */
1904 trace_kvm_msr_write(ecx
, data
);
1906 trace_kvm_msr_write_ex(ecx
, data
);
1908 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1910 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1912 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
1914 return kvm_skip_emulated_instruction(vcpu
);
1916 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop
);
1918 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
1920 /* Treat an INVD instruction as a NOP and just skip it. */
1921 return kvm_emulate_as_nop(vcpu
);
1923 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
1925 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
1927 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1928 return kvm_emulate_as_nop(vcpu
);
1930 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
1932 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
1934 kvm_queue_exception(vcpu
, UD_VECTOR
);
1937 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
1939 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
1941 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1942 return kvm_emulate_as_nop(vcpu
);
1944 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
1946 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
1948 xfer_to_guest_mode_prepare();
1949 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
1950 xfer_to_guest_mode_work_pending();
1954 * The fast path for frequent and performance sensitive wrmsr emulation,
1955 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1956 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1957 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1958 * other cases which must be called after interrupts are enabled on the host.
1960 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1962 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1965 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1966 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1967 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1968 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1971 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1972 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1973 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1974 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1981 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
1983 if (!kvm_can_use_hv_timer(vcpu
))
1986 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1990 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
1992 u32 msr
= kvm_rcx_read(vcpu
);
1994 fastpath_t ret
= EXIT_FASTPATH_NONE
;
1997 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
1998 data
= kvm_read_edx_eax(vcpu
);
1999 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
2000 kvm_skip_emulated_instruction(vcpu
);
2001 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
2004 case MSR_IA32_TSC_DEADLINE
:
2005 data
= kvm_read_edx_eax(vcpu
);
2006 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
2007 kvm_skip_emulated_instruction(vcpu
);
2008 ret
= EXIT_FASTPATH_REENTER_GUEST
;
2015 if (ret
!= EXIT_FASTPATH_NONE
)
2016 trace_kvm_msr_write(msr
, data
);
2020 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
2023 * Adapt set_msr() to msr_io()'s calling convention
2025 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2027 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
2030 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2032 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2035 #ifdef CONFIG_X86_64
2036 struct pvclock_clock
{
2046 struct pvclock_gtod_data
{
2049 struct pvclock_clock clock
; /* extract of a clocksource struct */
2050 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2056 static struct pvclock_gtod_data pvclock_gtod_data
;
2058 static void update_pvclock_gtod(struct timekeeper
*tk
)
2060 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2062 write_seqcount_begin(&vdata
->seq
);
2064 /* copy pvclock gtod data */
2065 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2066 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2067 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2068 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2069 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2070 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2071 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2073 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2074 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2075 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2076 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2077 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2078 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2079 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2081 vdata
->wall_time_sec
= tk
->xtime_sec
;
2083 vdata
->offs_boot
= tk
->offs_boot
;
2085 write_seqcount_end(&vdata
->seq
);
2088 static s64
get_kvmclock_base_ns(void)
2090 /* Count up from boot time, but with the frequency of the raw clock. */
2091 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2094 static s64
get_kvmclock_base_ns(void)
2096 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2097 return ktime_get_boottime_ns();
2101 void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2105 struct pvclock_wall_clock wc
;
2112 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2117 ++version
; /* first time write, random junk */
2121 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2125 * The guest calculates current wall clock time by adding
2126 * system time (updated by kvm_guest_time_update below) to the
2127 * wall clock specified here. We do the reverse here.
2129 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
2131 wc
.nsec
= do_div(wall_nsec
, 1000000000);
2132 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2133 wc
.version
= version
;
2135 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2138 wc_sec_hi
= wall_nsec
>> 32;
2139 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2140 &wc_sec_hi
, sizeof(wc_sec_hi
));
2144 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2147 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2148 bool old_msr
, bool host_initiated
)
2150 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2152 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2153 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2154 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2156 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2159 vcpu
->arch
.time
= system_time
;
2160 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2162 /* we verify if the enable bit is set... */
2163 vcpu
->arch
.pv_time_enabled
= false;
2164 if (!(system_time
& 1))
2167 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2168 &vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2169 sizeof(struct pvclock_vcpu_time_info
)))
2170 vcpu
->arch
.pv_time_enabled
= true;
2175 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2177 do_shl32_div32(dividend
, divisor
);
2181 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2182 s8
*pshift
, u32
*pmultiplier
)
2190 scaled64
= scaled_hz
;
2191 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2196 tps32
= (uint32_t)tps64
;
2197 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2198 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2206 *pmultiplier
= div_frac(scaled64
, tps32
);
2209 #ifdef CONFIG_X86_64
2210 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2213 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2214 static unsigned long max_tsc_khz
;
2216 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2218 u64 v
= (u64
)khz
* (1000000 + ppm
);
2223 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
);
2225 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2229 /* Guest TSC same frequency as host TSC? */
2231 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2235 /* TSC scaling supported? */
2236 if (!kvm_has_tsc_control
) {
2237 if (user_tsc_khz
> tsc_khz
) {
2238 vcpu
->arch
.tsc_catchup
= 1;
2239 vcpu
->arch
.tsc_always_catchup
= 1;
2242 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2247 /* TSC scaling required - calculate ratio */
2248 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2249 user_tsc_khz
, tsc_khz
);
2251 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2252 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2257 kvm_vcpu_write_tsc_multiplier(vcpu
, ratio
);
2261 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2263 u32 thresh_lo
, thresh_hi
;
2264 int use_scaling
= 0;
2266 /* tsc_khz can be zero if TSC calibration fails */
2267 if (user_tsc_khz
== 0) {
2268 /* set tsc_scaling_ratio to a safe value */
2269 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2273 /* Compute a scale to convert nanoseconds in TSC cycles */
2274 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2275 &vcpu
->arch
.virtual_tsc_shift
,
2276 &vcpu
->arch
.virtual_tsc_mult
);
2277 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2280 * Compute the variation in TSC rate which is acceptable
2281 * within the range of tolerance and decide if the
2282 * rate being applied is within that bounds of the hardware
2283 * rate. If so, no scaling or compensation need be done.
2285 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2286 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2287 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2288 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2291 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2294 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2296 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2297 vcpu
->arch
.virtual_tsc_mult
,
2298 vcpu
->arch
.virtual_tsc_shift
);
2299 tsc
+= vcpu
->arch
.this_tsc_write
;
2303 static inline int gtod_is_based_on_tsc(int mode
)
2305 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2308 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2310 #ifdef CONFIG_X86_64
2312 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2313 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2315 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2316 atomic_read(&vcpu
->kvm
->online_vcpus
));
2319 * Once the masterclock is enabled, always perform request in
2320 * order to update it.
2322 * In order to enable masterclock, the host clocksource must be TSC
2323 * and the vcpus need to have matched TSCs. When that happens,
2324 * perform request to enable masterclock.
2326 if (ka
->use_master_clock
||
2327 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2328 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2330 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2331 atomic_read(&vcpu
->kvm
->online_vcpus
),
2332 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2337 * Multiply tsc by a fixed point number represented by ratio.
2339 * The most significant 64-N bits (mult) of ratio represent the
2340 * integral part of the fixed point number; the remaining N bits
2341 * (frac) represent the fractional part, ie. ratio represents a fixed
2342 * point number (mult + frac * 2^(-N)).
2344 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2346 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2348 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2351 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
, u64 ratio
)
2355 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2356 _tsc
= __scale_tsc(ratio
, tsc
);
2360 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2362 static u64
kvm_compute_l1_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2366 tsc
= kvm_scale_tsc(vcpu
, rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
);
2368 return target_tsc
- tsc
;
2371 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2373 return vcpu
->arch
.l1_tsc_offset
+
2374 kvm_scale_tsc(vcpu
, host_tsc
, vcpu
->arch
.l1_tsc_scaling_ratio
);
2376 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2378 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
)
2382 if (l2_multiplier
== kvm_default_tsc_scaling_ratio
)
2383 nested_offset
= l1_offset
;
2385 nested_offset
= mul_s64_u64_shr((s64
) l1_offset
, l2_multiplier
,
2386 kvm_tsc_scaling_ratio_frac_bits
);
2388 nested_offset
+= l2_offset
;
2389 return nested_offset
;
2391 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset
);
2393 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
)
2395 if (l2_multiplier
!= kvm_default_tsc_scaling_ratio
)
2396 return mul_u64_u64_shr(l1_multiplier
, l2_multiplier
,
2397 kvm_tsc_scaling_ratio_frac_bits
);
2399 return l1_multiplier
;
2401 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier
);
2403 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 l1_offset
)
2405 trace_kvm_write_tsc_offset(vcpu
->vcpu_id
,
2406 vcpu
->arch
.l1_tsc_offset
,
2409 vcpu
->arch
.l1_tsc_offset
= l1_offset
;
2412 * If we are here because L1 chose not to trap WRMSR to TSC then
2413 * according to the spec this should set L1's TSC (as opposed to
2414 * setting L1's offset for L2).
2416 if (is_guest_mode(vcpu
))
2417 vcpu
->arch
.tsc_offset
= kvm_calc_nested_tsc_offset(
2419 static_call(kvm_x86_get_l2_tsc_offset
)(vcpu
),
2420 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2422 vcpu
->arch
.tsc_offset
= l1_offset
;
2424 static_call(kvm_x86_write_tsc_offset
)(vcpu
, vcpu
->arch
.tsc_offset
);
2427 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
)
2429 vcpu
->arch
.l1_tsc_scaling_ratio
= l1_multiplier
;
2431 /* Userspace is changing the multiplier while L2 is active */
2432 if (is_guest_mode(vcpu
))
2433 vcpu
->arch
.tsc_scaling_ratio
= kvm_calc_nested_tsc_multiplier(
2435 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2437 vcpu
->arch
.tsc_scaling_ratio
= l1_multiplier
;
2439 if (kvm_has_tsc_control
)
2440 static_call(kvm_x86_write_tsc_multiplier
)(
2441 vcpu
, vcpu
->arch
.tsc_scaling_ratio
);
2444 static inline bool kvm_check_tsc_unstable(void)
2446 #ifdef CONFIG_X86_64
2448 * TSC is marked unstable when we're running on Hyper-V,
2449 * 'TSC page' clocksource is good.
2451 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2454 return check_tsc_unstable();
2457 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2459 struct kvm
*kvm
= vcpu
->kvm
;
2460 u64 offset
, ns
, elapsed
;
2461 unsigned long flags
;
2463 bool already_matched
;
2464 bool synchronizing
= false;
2466 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2467 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2468 ns
= get_kvmclock_base_ns();
2469 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2471 if (vcpu
->arch
.virtual_tsc_khz
) {
2474 * detection of vcpu initialization -- need to sync
2475 * with other vCPUs. This particularly helps to keep
2476 * kvm_clock stable after CPU hotplug
2478 synchronizing
= true;
2480 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2481 nsec_to_cycles(vcpu
, elapsed
);
2482 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2484 * Special case: TSC write with a small delta (1 second)
2485 * of virtual cycle time against real time is
2486 * interpreted as an attempt to synchronize the CPU.
2488 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2489 data
+ tsc_hz
> tsc_exp
;
2494 * For a reliable TSC, we can match TSC offsets, and for an unstable
2495 * TSC, we add elapsed time in this computation. We could let the
2496 * compensation code attempt to catch up if we fall behind, but
2497 * it's better to try to match offsets from the beginning.
2499 if (synchronizing
&&
2500 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2501 if (!kvm_check_tsc_unstable()) {
2502 offset
= kvm
->arch
.cur_tsc_offset
;
2504 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2506 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2509 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2512 * We split periods of matched TSC writes into generations.
2513 * For each generation, we track the original measured
2514 * nanosecond time, offset, and write, so if TSCs are in
2515 * sync, we can match exact offset, and if not, we can match
2516 * exact software computation in compute_guest_tsc()
2518 * These values are tracked in kvm->arch.cur_xxx variables.
2520 kvm
->arch
.cur_tsc_generation
++;
2521 kvm
->arch
.cur_tsc_nsec
= ns
;
2522 kvm
->arch
.cur_tsc_write
= data
;
2523 kvm
->arch
.cur_tsc_offset
= offset
;
2528 * We also track th most recent recorded KHZ, write and time to
2529 * allow the matching interval to be extended at each write.
2531 kvm
->arch
.last_tsc_nsec
= ns
;
2532 kvm
->arch
.last_tsc_write
= data
;
2533 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2535 vcpu
->arch
.last_guest_tsc
= data
;
2537 /* Keep track of which generation this VCPU has synchronized to */
2538 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2539 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2540 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2542 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2543 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2545 raw_spin_lock_irqsave(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2547 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2548 } else if (!already_matched
) {
2549 kvm
->arch
.nr_vcpus_matched_tsc
++;
2552 kvm_track_tsc_matching(vcpu
);
2553 raw_spin_unlock_irqrestore(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2556 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2559 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2560 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2563 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2565 if (vcpu
->arch
.l1_tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2566 WARN_ON(adjustment
< 0);
2567 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
,
2568 vcpu
->arch
.l1_tsc_scaling_ratio
);
2569 adjust_tsc_offset_guest(vcpu
, adjustment
);
2572 #ifdef CONFIG_X86_64
2574 static u64
read_tsc(void)
2576 u64 ret
= (u64
)rdtsc_ordered();
2577 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2579 if (likely(ret
>= last
))
2583 * GCC likes to generate cmov here, but this branch is extremely
2584 * predictable (it's just a function of time and the likely is
2585 * very likely) and there's a data dependence, so force GCC
2586 * to generate a branch instead. I don't barrier() because
2587 * we don't actually need a barrier, and if this function
2588 * ever gets inlined it will generate worse code.
2594 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2600 switch (clock
->vclock_mode
) {
2601 case VDSO_CLOCKMODE_HVCLOCK
:
2602 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2604 if (tsc_pg_val
!= U64_MAX
) {
2605 /* TSC page valid */
2606 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2607 v
= (tsc_pg_val
- clock
->cycle_last
) &
2610 /* TSC page invalid */
2611 *mode
= VDSO_CLOCKMODE_NONE
;
2614 case VDSO_CLOCKMODE_TSC
:
2615 *mode
= VDSO_CLOCKMODE_TSC
;
2616 *tsc_timestamp
= read_tsc();
2617 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2621 *mode
= VDSO_CLOCKMODE_NONE
;
2624 if (*mode
== VDSO_CLOCKMODE_NONE
)
2625 *tsc_timestamp
= v
= 0;
2627 return v
* clock
->mult
;
2630 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2632 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2638 seq
= read_seqcount_begin(>od
->seq
);
2639 ns
= gtod
->raw_clock
.base_cycles
;
2640 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2641 ns
>>= gtod
->raw_clock
.shift
;
2642 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2643 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2649 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2651 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2657 seq
= read_seqcount_begin(>od
->seq
);
2658 ts
->tv_sec
= gtod
->wall_time_sec
;
2659 ns
= gtod
->clock
.base_cycles
;
2660 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2661 ns
>>= gtod
->clock
.shift
;
2662 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2664 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2670 /* returns true if host is using TSC based clocksource */
2671 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2673 /* checked again under seqlock below */
2674 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2677 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2681 /* returns true if host is using TSC based clocksource */
2682 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2685 /* checked again under seqlock below */
2686 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2689 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2695 * Assuming a stable TSC across physical CPUS, and a stable TSC
2696 * across virtual CPUs, the following condition is possible.
2697 * Each numbered line represents an event visible to both
2698 * CPUs at the next numbered event.
2700 * "timespecX" represents host monotonic time. "tscX" represents
2703 * VCPU0 on CPU0 | VCPU1 on CPU1
2705 * 1. read timespec0,tsc0
2706 * 2. | timespec1 = timespec0 + N
2708 * 3. transition to guest | transition to guest
2709 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2710 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2711 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2713 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2716 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2718 * - 0 < N - M => M < N
2720 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2721 * always the case (the difference between two distinct xtime instances
2722 * might be smaller then the difference between corresponding TSC reads,
2723 * when updating guest vcpus pvclock areas).
2725 * To avoid that problem, do not allow visibility of distinct
2726 * system_timestamp/tsc_timestamp values simultaneously: use a master
2727 * copy of host monotonic time values. Update that master copy
2730 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2734 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2736 #ifdef CONFIG_X86_64
2737 struct kvm_arch
*ka
= &kvm
->arch
;
2739 bool host_tsc_clocksource
, vcpus_matched
;
2741 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2742 atomic_read(&kvm
->online_vcpus
));
2745 * If the host uses TSC clock, then passthrough TSC as stable
2748 host_tsc_clocksource
= kvm_get_time_and_clockread(
2749 &ka
->master_kernel_ns
,
2750 &ka
->master_cycle_now
);
2752 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2753 && !ka
->backwards_tsc_observed
2754 && !ka
->boot_vcpu_runs_old_kvmclock
;
2756 if (ka
->use_master_clock
)
2757 atomic_set(&kvm_guest_has_master_clock
, 1);
2759 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2760 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2765 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2767 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2770 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2772 #ifdef CONFIG_X86_64
2774 struct kvm_vcpu
*vcpu
;
2775 struct kvm_arch
*ka
= &kvm
->arch
;
2776 unsigned long flags
;
2778 kvm_hv_invalidate_tsc_page(kvm
);
2780 kvm_make_mclock_inprogress_request(kvm
);
2782 /* no guest entries from this point */
2783 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2784 pvclock_update_vm_gtod_copy(kvm
);
2785 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2787 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2788 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2790 /* guest entries allowed */
2791 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2792 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2796 u64
get_kvmclock_ns(struct kvm
*kvm
)
2798 struct kvm_arch
*ka
= &kvm
->arch
;
2799 struct pvclock_vcpu_time_info hv_clock
;
2800 unsigned long flags
;
2803 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2804 if (!ka
->use_master_clock
) {
2805 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2806 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2809 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2810 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2811 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2813 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2816 if (__this_cpu_read(cpu_tsc_khz
)) {
2817 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2818 &hv_clock
.tsc_shift
,
2819 &hv_clock
.tsc_to_system_mul
);
2820 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2822 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2829 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
,
2830 struct gfn_to_hva_cache
*cache
,
2831 unsigned int offset
)
2833 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2834 struct pvclock_vcpu_time_info guest_hv_clock
;
2836 if (unlikely(kvm_read_guest_offset_cached(v
->kvm
, cache
,
2837 &guest_hv_clock
, offset
, sizeof(guest_hv_clock
))))
2840 /* This VCPU is paused, but it's legal for a guest to read another
2841 * VCPU's kvmclock, so we really have to follow the specification where
2842 * it says that version is odd if data is being modified, and even after
2845 * Version field updates must be kept separate. This is because
2846 * kvm_write_guest_cached might use a "rep movs" instruction, and
2847 * writes within a string instruction are weakly ordered. So there
2848 * are three writes overall.
2850 * As a small optimization, only write the version field in the first
2851 * and third write. The vcpu->pv_time cache is still valid, because the
2852 * version field is the first in the struct.
2854 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2856 if (guest_hv_clock
.version
& 1)
2857 ++guest_hv_clock
.version
; /* first time write, random junk */
2859 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2860 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2861 &vcpu
->hv_clock
, offset
,
2862 sizeof(vcpu
->hv_clock
.version
));
2866 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2867 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2869 if (vcpu
->pvclock_set_guest_stopped_request
) {
2870 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2871 vcpu
->pvclock_set_guest_stopped_request
= false;
2874 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2876 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2877 &vcpu
->hv_clock
, offset
,
2878 sizeof(vcpu
->hv_clock
));
2882 vcpu
->hv_clock
.version
++;
2883 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2884 &vcpu
->hv_clock
, offset
,
2885 sizeof(vcpu
->hv_clock
.version
));
2888 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2890 unsigned long flags
, tgt_tsc_khz
;
2891 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2892 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2894 u64 tsc_timestamp
, host_tsc
;
2896 bool use_master_clock
;
2902 * If the host uses TSC clock, then passthrough TSC as stable
2905 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2906 use_master_clock
= ka
->use_master_clock
;
2907 if (use_master_clock
) {
2908 host_tsc
= ka
->master_cycle_now
;
2909 kernel_ns
= ka
->master_kernel_ns
;
2911 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2913 /* Keep irq disabled to prevent changes to the clock */
2914 local_irq_save(flags
);
2915 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2916 if (unlikely(tgt_tsc_khz
== 0)) {
2917 local_irq_restore(flags
);
2918 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2921 if (!use_master_clock
) {
2923 kernel_ns
= get_kvmclock_base_ns();
2926 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2929 * We may have to catch up the TSC to match elapsed wall clock
2930 * time for two reasons, even if kvmclock is used.
2931 * 1) CPU could have been running below the maximum TSC rate
2932 * 2) Broken TSC compensation resets the base at each VCPU
2933 * entry to avoid unknown leaps of TSC even when running
2934 * again on the same CPU. This may cause apparent elapsed
2935 * time to disappear, and the guest to stand still or run
2938 if (vcpu
->tsc_catchup
) {
2939 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2940 if (tsc
> tsc_timestamp
) {
2941 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2942 tsc_timestamp
= tsc
;
2946 local_irq_restore(flags
);
2948 /* With all the info we got, fill in the values */
2950 if (kvm_has_tsc_control
)
2951 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
,
2952 v
->arch
.l1_tsc_scaling_ratio
);
2954 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2955 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2956 &vcpu
->hv_clock
.tsc_shift
,
2957 &vcpu
->hv_clock
.tsc_to_system_mul
);
2958 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2961 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2962 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2963 vcpu
->last_guest_tsc
= tsc_timestamp
;
2965 /* If the host uses TSC clocksource, then it is stable */
2967 if (use_master_clock
)
2968 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2970 vcpu
->hv_clock
.flags
= pvclock_flags
;
2972 if (vcpu
->pv_time_enabled
)
2973 kvm_setup_pvclock_page(v
, &vcpu
->pv_time
, 0);
2974 if (vcpu
->xen
.vcpu_info_set
)
2975 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_info_cache
,
2976 offsetof(struct compat_vcpu_info
, time
));
2977 if (vcpu
->xen
.vcpu_time_info_set
)
2978 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0);
2980 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2985 * kvmclock updates which are isolated to a given vcpu, such as
2986 * vcpu->cpu migration, should not allow system_timestamp from
2987 * the rest of the vcpus to remain static. Otherwise ntp frequency
2988 * correction applies to one vcpu's system_timestamp but not
2991 * So in those cases, request a kvmclock update for all vcpus.
2992 * We need to rate-limit these requests though, as they can
2993 * considerably slow guests that have a large number of vcpus.
2994 * The time for a remote vcpu to update its kvmclock is bound
2995 * by the delay we use to rate-limit the updates.
2998 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3000 static void kvmclock_update_fn(struct work_struct
*work
)
3003 struct delayed_work
*dwork
= to_delayed_work(work
);
3004 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3005 kvmclock_update_work
);
3006 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3007 struct kvm_vcpu
*vcpu
;
3009 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3010 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3011 kvm_vcpu_kick(vcpu
);
3015 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
3017 struct kvm
*kvm
= v
->kvm
;
3019 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3020 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
3021 KVMCLOCK_UPDATE_DELAY
);
3024 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3026 static void kvmclock_sync_fn(struct work_struct
*work
)
3028 struct delayed_work
*dwork
= to_delayed_work(work
);
3029 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3030 kvmclock_sync_work
);
3031 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3033 if (!kvmclock_periodic_sync
)
3036 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
3037 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
3038 KVMCLOCK_SYNC_PERIOD
);
3042 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3044 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
3046 /* McStatusWrEn enabled? */
3047 if (guest_cpuid_is_amd_or_hygon(vcpu
))
3048 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
3053 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3055 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3056 unsigned bank_num
= mcg_cap
& 0xff;
3057 u32 msr
= msr_info
->index
;
3058 u64 data
= msr_info
->data
;
3061 case MSR_IA32_MCG_STATUS
:
3062 vcpu
->arch
.mcg_status
= data
;
3064 case MSR_IA32_MCG_CTL
:
3065 if (!(mcg_cap
& MCG_CTL_P
) &&
3066 (data
|| !msr_info
->host_initiated
))
3068 if (data
!= 0 && data
!= ~(u64
)0)
3070 vcpu
->arch
.mcg_ctl
= data
;
3073 if (msr
>= MSR_IA32_MC0_CTL
&&
3074 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3075 u32 offset
= array_index_nospec(
3076 msr
- MSR_IA32_MC0_CTL
,
3077 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3079 /* only 0 or all 1s can be written to IA32_MCi_CTL
3080 * some Linux kernels though clear bit 10 in bank 4 to
3081 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3082 * this to avoid an uncatched #GP in the guest
3084 if ((offset
& 0x3) == 0 &&
3085 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
3089 if (!msr_info
->host_initiated
&&
3090 (offset
& 0x3) == 1 && data
!= 0) {
3091 if (!can_set_mci_status(vcpu
))
3095 vcpu
->arch
.mce_banks
[offset
] = data
;
3103 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3105 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3107 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3110 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3112 gpa_t gpa
= data
& ~0x3f;
3114 /* Bits 4:5 are reserved, Should be zero */
3118 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3119 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3122 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3123 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3126 if (!lapic_in_kernel(vcpu
))
3127 return data
? 1 : 0;
3129 vcpu
->arch
.apf
.msr_en_val
= data
;
3131 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3132 kvm_clear_async_pf_completion_queue(vcpu
);
3133 kvm_async_pf_hash_reset(vcpu
);
3137 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3141 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3142 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3144 kvm_async_pf_wakeup_all(vcpu
);
3149 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3151 /* Bits 8-63 are reserved */
3155 if (!lapic_in_kernel(vcpu
))
3158 vcpu
->arch
.apf
.msr_int_val
= data
;
3160 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3165 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3167 vcpu
->arch
.pv_time_enabled
= false;
3168 vcpu
->arch
.time
= 0;
3171 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3173 ++vcpu
->stat
.tlb_flush
;
3174 static_call(kvm_x86_tlb_flush_all
)(vcpu
);
3177 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3179 ++vcpu
->stat
.tlb_flush
;
3183 * A TLB flush on behalf of the guest is equivalent to
3184 * INVPCID(all), toggling CR4.PGE, etc., which requires
3185 * a forced sync of the shadow page tables. Unload the
3186 * entire MMU here and the subsequent load will sync the
3187 * shadow page tables, and also flush the TLB.
3189 kvm_mmu_unload(vcpu
);
3193 static_call(kvm_x86_tlb_flush_guest
)(vcpu
);
3196 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3198 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3199 struct kvm_steal_time __user
*st
;
3200 struct kvm_memslots
*slots
;
3204 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3205 kvm_xen_runstate_set_running(vcpu
);
3209 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3212 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3215 slots
= kvm_memslots(vcpu
->kvm
);
3217 if (unlikely(slots
->generation
!= ghc
->generation
||
3218 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3219 gfn_t gfn
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3221 /* We rely on the fact that it fits in a single page. */
3222 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3224 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gfn
, sizeof(*st
)) ||
3225 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3229 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3230 if (!user_access_begin(st
, sizeof(*st
)))
3234 * Doing a TLB flush here, on the guest's behalf, can avoid
3237 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3238 u8 st_preempted
= 0;
3241 asm volatile("1: xchgb %0, %2\n"
3244 _ASM_EXTABLE_UA(1b
, 2b
)
3245 : "+r" (st_preempted
),
3247 : "m" (st
->preempted
));
3253 vcpu
->arch
.st
.preempted
= 0;
3255 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3256 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3257 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3258 kvm_vcpu_flush_tlb_guest(vcpu
);
3260 if (!user_access_begin(st
, sizeof(*st
)))
3263 unsafe_put_user(0, &st
->preempted
, out
);
3264 vcpu
->arch
.st
.preempted
= 0;
3267 unsafe_get_user(version
, &st
->version
, out
);
3269 version
+= 1; /* first time write, random junk */
3272 unsafe_put_user(version
, &st
->version
, out
);
3276 unsafe_get_user(steal
, &st
->steal
, out
);
3277 steal
+= current
->sched_info
.run_delay
-
3278 vcpu
->arch
.st
.last_steal
;
3279 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3280 unsafe_put_user(steal
, &st
->steal
, out
);
3283 unsafe_put_user(version
, &st
->version
, out
);
3288 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3291 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3294 u32 msr
= msr_info
->index
;
3295 u64 data
= msr_info
->data
;
3297 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3298 return kvm_xen_write_hypercall_page(vcpu
, data
);
3301 case MSR_AMD64_NB_CFG
:
3302 case MSR_IA32_UCODE_WRITE
:
3303 case MSR_VM_HSAVE_PA
:
3304 case MSR_AMD64_PATCH_LOADER
:
3305 case MSR_AMD64_BU_CFG2
:
3306 case MSR_AMD64_DC_CFG
:
3307 case MSR_F15H_EX_CFG
:
3310 case MSR_IA32_UCODE_REV
:
3311 if (msr_info
->host_initiated
)
3312 vcpu
->arch
.microcode_version
= data
;
3314 case MSR_IA32_ARCH_CAPABILITIES
:
3315 if (!msr_info
->host_initiated
)
3317 vcpu
->arch
.arch_capabilities
= data
;
3319 case MSR_IA32_PERF_CAPABILITIES
: {
3320 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3322 if (!msr_info
->host_initiated
)
3324 if (guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
) && kvm_get_msr_feature(&msr_ent
))
3326 if (data
& ~msr_ent
.data
)
3329 vcpu
->arch
.perf_capabilities
= data
;
3334 return set_efer(vcpu
, msr_info
);
3336 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3337 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3338 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3340 /* Handle McStatusWrEn */
3341 if (data
== BIT_ULL(18)) {
3342 vcpu
->arch
.msr_hwcr
= data
;
3343 } else if (data
!= 0) {
3344 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3349 case MSR_FAM10H_MMIO_CONF_BASE
:
3351 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3356 case 0x200 ... 0x2ff:
3357 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3358 case MSR_IA32_APICBASE
:
3359 return kvm_set_apic_base(vcpu
, msr_info
);
3360 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3361 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3362 case MSR_IA32_TSC_DEADLINE
:
3363 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3365 case MSR_IA32_TSC_ADJUST
:
3366 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3367 if (!msr_info
->host_initiated
) {
3368 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3369 adjust_tsc_offset_guest(vcpu
, adj
);
3370 /* Before back to guest, tsc_timestamp must be adjusted
3371 * as well, otherwise guest's percpu pvclock time could jump.
3373 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3375 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3378 case MSR_IA32_MISC_ENABLE
:
3379 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3380 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3381 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3383 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3384 kvm_update_cpuid_runtime(vcpu
);
3386 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3389 case MSR_IA32_SMBASE
:
3390 if (!msr_info
->host_initiated
)
3392 vcpu
->arch
.smbase
= data
;
3394 case MSR_IA32_POWER_CTL
:
3395 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3398 if (msr_info
->host_initiated
) {
3399 kvm_synchronize_tsc(vcpu
, data
);
3401 u64 adj
= kvm_compute_l1_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3402 adjust_tsc_offset_guest(vcpu
, adj
);
3403 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3407 if (!msr_info
->host_initiated
&&
3408 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3411 * KVM supports exposing PT to the guest, but does not support
3412 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3413 * XSAVES/XRSTORS to save/restore PT MSRs.
3415 if (data
& ~supported_xss
)
3417 vcpu
->arch
.ia32_xss
= data
;
3420 if (!msr_info
->host_initiated
)
3422 vcpu
->arch
.smi_count
= data
;
3424 case MSR_KVM_WALL_CLOCK_NEW
:
3425 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3428 vcpu
->kvm
->arch
.wall_clock
= data
;
3429 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3431 case MSR_KVM_WALL_CLOCK
:
3432 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3435 vcpu
->kvm
->arch
.wall_clock
= data
;
3436 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3438 case MSR_KVM_SYSTEM_TIME_NEW
:
3439 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3442 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3444 case MSR_KVM_SYSTEM_TIME
:
3445 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3448 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3450 case MSR_KVM_ASYNC_PF_EN
:
3451 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3454 if (kvm_pv_enable_async_pf(vcpu
, data
))
3457 case MSR_KVM_ASYNC_PF_INT
:
3458 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3461 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3464 case MSR_KVM_ASYNC_PF_ACK
:
3465 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3468 vcpu
->arch
.apf
.pageready_pending
= false;
3469 kvm_check_async_pf_completion(vcpu
);
3472 case MSR_KVM_STEAL_TIME
:
3473 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3476 if (unlikely(!sched_info_on()))
3479 if (data
& KVM_STEAL_RESERVED_MASK
)
3482 vcpu
->arch
.st
.msr_val
= data
;
3484 if (!(data
& KVM_MSR_ENABLED
))
3487 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3490 case MSR_KVM_PV_EOI_EN
:
3491 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3494 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
3498 case MSR_KVM_POLL_CONTROL
:
3499 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3502 /* only enable bit supported */
3503 if (data
& (-1ULL << 1))
3506 vcpu
->arch
.msr_kvm_poll_control
= data
;
3509 case MSR_IA32_MCG_CTL
:
3510 case MSR_IA32_MCG_STATUS
:
3511 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3512 return set_msr_mce(vcpu
, msr_info
);
3514 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3515 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3518 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3519 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3520 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3521 return kvm_pmu_set_msr(vcpu
, msr_info
);
3523 if (pr
|| data
!= 0)
3524 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3525 "0x%x data 0x%llx\n", msr
, data
);
3527 case MSR_K7_CLK_CTL
:
3529 * Ignore all writes to this no longer documented MSR.
3530 * Writes are only relevant for old K7 processors,
3531 * all pre-dating SVM, but a recommended workaround from
3532 * AMD for these chips. It is possible to specify the
3533 * affected processor models on the command line, hence
3534 * the need to ignore the workaround.
3537 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3538 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3539 case HV_X64_MSR_SYNDBG_OPTIONS
:
3540 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3541 case HV_X64_MSR_CRASH_CTL
:
3542 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3543 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3544 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3545 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3546 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3547 msr_info
->host_initiated
);
3548 case MSR_IA32_BBL_CR_CTL3
:
3549 /* Drop writes to this legacy MSR -- see rdmsr
3550 * counterpart for further detail.
3552 if (report_ignored_msrs
)
3553 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3556 case MSR_AMD64_OSVW_ID_LENGTH
:
3557 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3559 vcpu
->arch
.osvw
.length
= data
;
3561 case MSR_AMD64_OSVW_STATUS
:
3562 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3564 vcpu
->arch
.osvw
.status
= data
;
3566 case MSR_PLATFORM_INFO
:
3567 if (!msr_info
->host_initiated
||
3568 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3569 cpuid_fault_enabled(vcpu
)))
3571 vcpu
->arch
.msr_platform_info
= data
;
3573 case MSR_MISC_FEATURES_ENABLES
:
3574 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3575 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3576 !supports_cpuid_fault(vcpu
)))
3578 vcpu
->arch
.msr_misc_features_enables
= data
;
3581 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3582 return kvm_pmu_set_msr(vcpu
, msr_info
);
3583 return KVM_MSR_RET_INVALID
;
3587 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3589 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3592 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3593 unsigned bank_num
= mcg_cap
& 0xff;
3596 case MSR_IA32_P5_MC_ADDR
:
3597 case MSR_IA32_P5_MC_TYPE
:
3600 case MSR_IA32_MCG_CAP
:
3601 data
= vcpu
->arch
.mcg_cap
;
3603 case MSR_IA32_MCG_CTL
:
3604 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3606 data
= vcpu
->arch
.mcg_ctl
;
3608 case MSR_IA32_MCG_STATUS
:
3609 data
= vcpu
->arch
.mcg_status
;
3612 if (msr
>= MSR_IA32_MC0_CTL
&&
3613 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3614 u32 offset
= array_index_nospec(
3615 msr
- MSR_IA32_MC0_CTL
,
3616 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3618 data
= vcpu
->arch
.mce_banks
[offset
];
3627 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3629 switch (msr_info
->index
) {
3630 case MSR_IA32_PLATFORM_ID
:
3631 case MSR_IA32_EBL_CR_POWERON
:
3632 case MSR_IA32_LASTBRANCHFROMIP
:
3633 case MSR_IA32_LASTBRANCHTOIP
:
3634 case MSR_IA32_LASTINTFROMIP
:
3635 case MSR_IA32_LASTINTTOIP
:
3636 case MSR_AMD64_SYSCFG
:
3637 case MSR_K8_TSEG_ADDR
:
3638 case MSR_K8_TSEG_MASK
:
3639 case MSR_VM_HSAVE_PA
:
3640 case MSR_K8_INT_PENDING_MSG
:
3641 case MSR_AMD64_NB_CFG
:
3642 case MSR_FAM10H_MMIO_CONF_BASE
:
3643 case MSR_AMD64_BU_CFG2
:
3644 case MSR_IA32_PERF_CTL
:
3645 case MSR_AMD64_DC_CFG
:
3646 case MSR_F15H_EX_CFG
:
3648 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3649 * limit) MSRs. Just return 0, as we do not want to expose the host
3650 * data here. Do not conditionalize this on CPUID, as KVM does not do
3651 * so for existing CPU-specific MSRs.
3653 case MSR_RAPL_POWER_UNIT
:
3654 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3655 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3656 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3657 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3660 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3661 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3662 return kvm_pmu_get_msr(vcpu
, msr_info
);
3663 if (!msr_info
->host_initiated
)
3667 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3668 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3669 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3670 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3671 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3672 return kvm_pmu_get_msr(vcpu
, msr_info
);
3675 case MSR_IA32_UCODE_REV
:
3676 msr_info
->data
= vcpu
->arch
.microcode_version
;
3678 case MSR_IA32_ARCH_CAPABILITIES
:
3679 if (!msr_info
->host_initiated
&&
3680 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3682 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3684 case MSR_IA32_PERF_CAPABILITIES
:
3685 if (!msr_info
->host_initiated
&&
3686 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3688 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3690 case MSR_IA32_POWER_CTL
:
3691 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3693 case MSR_IA32_TSC
: {
3695 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3696 * even when not intercepted. AMD manual doesn't explicitly
3697 * state this but appears to behave the same.
3699 * On userspace reads and writes, however, we unconditionally
3700 * return L1's TSC value to ensure backwards-compatible
3701 * behavior for migration.
3705 if (msr_info
->host_initiated
) {
3706 offset
= vcpu
->arch
.l1_tsc_offset
;
3707 ratio
= vcpu
->arch
.l1_tsc_scaling_ratio
;
3709 offset
= vcpu
->arch
.tsc_offset
;
3710 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
3713 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc(), ratio
) + offset
;
3717 case 0x200 ... 0x2ff:
3718 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3719 case 0xcd: /* fsb frequency */
3723 * MSR_EBC_FREQUENCY_ID
3724 * Conservative value valid for even the basic CPU models.
3725 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3726 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3727 * and 266MHz for model 3, or 4. Set Core Clock
3728 * Frequency to System Bus Frequency Ratio to 1 (bits
3729 * 31:24) even though these are only valid for CPU
3730 * models > 2, however guests may end up dividing or
3731 * multiplying by zero otherwise.
3733 case MSR_EBC_FREQUENCY_ID
:
3734 msr_info
->data
= 1 << 24;
3736 case MSR_IA32_APICBASE
:
3737 msr_info
->data
= kvm_get_apic_base(vcpu
);
3739 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3740 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3741 case MSR_IA32_TSC_DEADLINE
:
3742 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3744 case MSR_IA32_TSC_ADJUST
:
3745 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3747 case MSR_IA32_MISC_ENABLE
:
3748 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3750 case MSR_IA32_SMBASE
:
3751 if (!msr_info
->host_initiated
)
3753 msr_info
->data
= vcpu
->arch
.smbase
;
3756 msr_info
->data
= vcpu
->arch
.smi_count
;
3758 case MSR_IA32_PERF_STATUS
:
3759 /* TSC increment by tick */
3760 msr_info
->data
= 1000ULL;
3761 /* CPU multiplier */
3762 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3765 msr_info
->data
= vcpu
->arch
.efer
;
3767 case MSR_KVM_WALL_CLOCK
:
3768 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3771 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3773 case MSR_KVM_WALL_CLOCK_NEW
:
3774 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3777 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3779 case MSR_KVM_SYSTEM_TIME
:
3780 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3783 msr_info
->data
= vcpu
->arch
.time
;
3785 case MSR_KVM_SYSTEM_TIME_NEW
:
3786 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3789 msr_info
->data
= vcpu
->arch
.time
;
3791 case MSR_KVM_ASYNC_PF_EN
:
3792 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3795 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
3797 case MSR_KVM_ASYNC_PF_INT
:
3798 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3801 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
3803 case MSR_KVM_ASYNC_PF_ACK
:
3804 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3809 case MSR_KVM_STEAL_TIME
:
3810 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3813 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3815 case MSR_KVM_PV_EOI_EN
:
3816 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3819 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3821 case MSR_KVM_POLL_CONTROL
:
3822 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3825 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3827 case MSR_IA32_P5_MC_ADDR
:
3828 case MSR_IA32_P5_MC_TYPE
:
3829 case MSR_IA32_MCG_CAP
:
3830 case MSR_IA32_MCG_CTL
:
3831 case MSR_IA32_MCG_STATUS
:
3832 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3833 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3834 msr_info
->host_initiated
);
3836 if (!msr_info
->host_initiated
&&
3837 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3839 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3841 case MSR_K7_CLK_CTL
:
3843 * Provide expected ramp-up count for K7. All other
3844 * are set to zero, indicating minimum divisors for
3847 * This prevents guest kernels on AMD host with CPU
3848 * type 6, model 8 and higher from exploding due to
3849 * the rdmsr failing.
3851 msr_info
->data
= 0x20000000;
3853 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3854 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3855 case HV_X64_MSR_SYNDBG_OPTIONS
:
3856 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3857 case HV_X64_MSR_CRASH_CTL
:
3858 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3859 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3860 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3861 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3862 return kvm_hv_get_msr_common(vcpu
,
3863 msr_info
->index
, &msr_info
->data
,
3864 msr_info
->host_initiated
);
3865 case MSR_IA32_BBL_CR_CTL3
:
3866 /* This legacy MSR exists but isn't fully documented in current
3867 * silicon. It is however accessed by winxp in very narrow
3868 * scenarios where it sets bit #19, itself documented as
3869 * a "reserved" bit. Best effort attempt to source coherent
3870 * read data here should the balance of the register be
3871 * interpreted by the guest:
3873 * L2 cache control register 3: 64GB range, 256KB size,
3874 * enabled, latency 0x1, configured
3876 msr_info
->data
= 0xbe702111;
3878 case MSR_AMD64_OSVW_ID_LENGTH
:
3879 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3881 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3883 case MSR_AMD64_OSVW_STATUS
:
3884 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3886 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3888 case MSR_PLATFORM_INFO
:
3889 if (!msr_info
->host_initiated
&&
3890 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3892 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3894 case MSR_MISC_FEATURES_ENABLES
:
3895 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3898 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3901 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3902 return kvm_pmu_get_msr(vcpu
, msr_info
);
3903 return KVM_MSR_RET_INVALID
;
3907 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3910 * Read or write a bunch of msrs. All parameters are kernel addresses.
3912 * @return number of msrs set successfully.
3914 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3915 struct kvm_msr_entry
*entries
,
3916 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3917 unsigned index
, u64
*data
))
3921 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3922 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3929 * Read or write a bunch of msrs. Parameters are user addresses.
3931 * @return number of msrs set successfully.
3933 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3934 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3935 unsigned index
, u64
*data
),
3938 struct kvm_msrs msrs
;
3939 struct kvm_msr_entry
*entries
;
3944 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3948 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3951 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3952 entries
= memdup_user(user_msrs
->entries
, size
);
3953 if (IS_ERR(entries
)) {
3954 r
= PTR_ERR(entries
);
3958 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
3963 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
3974 static inline bool kvm_can_mwait_in_guest(void)
3976 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
3977 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
3978 boot_cpu_has(X86_FEATURE_ARAT
);
3981 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
3982 struct kvm_cpuid2 __user
*cpuid_arg
)
3984 struct kvm_cpuid2 cpuid
;
3988 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3991 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3996 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4002 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
4007 case KVM_CAP_IRQCHIP
:
4009 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
4010 case KVM_CAP_SET_TSS_ADDR
:
4011 case KVM_CAP_EXT_CPUID
:
4012 case KVM_CAP_EXT_EMUL_CPUID
:
4013 case KVM_CAP_CLOCKSOURCE
:
4015 case KVM_CAP_NOP_IO_DELAY
:
4016 case KVM_CAP_MP_STATE
:
4017 case KVM_CAP_SYNC_MMU
:
4018 case KVM_CAP_USER_NMI
:
4019 case KVM_CAP_REINJECT_CONTROL
:
4020 case KVM_CAP_IRQ_INJECT_STATUS
:
4021 case KVM_CAP_IOEVENTFD
:
4022 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
4024 case KVM_CAP_PIT_STATE2
:
4025 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
4026 case KVM_CAP_VCPU_EVENTS
:
4027 case KVM_CAP_HYPERV
:
4028 case KVM_CAP_HYPERV_VAPIC
:
4029 case KVM_CAP_HYPERV_SPIN
:
4030 case KVM_CAP_HYPERV_SYNIC
:
4031 case KVM_CAP_HYPERV_SYNIC2
:
4032 case KVM_CAP_HYPERV_VP_INDEX
:
4033 case KVM_CAP_HYPERV_EVENTFD
:
4034 case KVM_CAP_HYPERV_TLBFLUSH
:
4035 case KVM_CAP_HYPERV_SEND_IPI
:
4036 case KVM_CAP_HYPERV_CPUID
:
4037 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4038 case KVM_CAP_SYS_HYPERV_CPUID
:
4039 case KVM_CAP_PCI_SEGMENT
:
4040 case KVM_CAP_DEBUGREGS
:
4041 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
4043 case KVM_CAP_ASYNC_PF
:
4044 case KVM_CAP_ASYNC_PF_INT
:
4045 case KVM_CAP_GET_TSC_KHZ
:
4046 case KVM_CAP_KVMCLOCK_CTRL
:
4047 case KVM_CAP_READONLY_MEM
:
4048 case KVM_CAP_HYPERV_TIME
:
4049 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
4050 case KVM_CAP_TSC_DEADLINE_TIMER
:
4051 case KVM_CAP_DISABLE_QUIRKS
:
4052 case KVM_CAP_SET_BOOT_CPU_ID
:
4053 case KVM_CAP_SPLIT_IRQCHIP
:
4054 case KVM_CAP_IMMEDIATE_EXIT
:
4055 case KVM_CAP_PMU_EVENT_FILTER
:
4056 case KVM_CAP_GET_MSR_FEATURES
:
4057 case KVM_CAP_MSR_PLATFORM_INFO
:
4058 case KVM_CAP_EXCEPTION_PAYLOAD
:
4059 case KVM_CAP_SET_GUEST_DEBUG
:
4060 case KVM_CAP_LAST_CPU
:
4061 case KVM_CAP_X86_USER_SPACE_MSR
:
4062 case KVM_CAP_X86_MSR_FILTER
:
4063 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4064 #ifdef CONFIG_X86_SGX_KVM
4065 case KVM_CAP_SGX_ATTRIBUTE
:
4067 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
4068 case KVM_CAP_SREGS2
:
4069 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
4072 case KVM_CAP_EXIT_HYPERCALL
:
4073 r
= KVM_EXIT_HYPERCALL_VALID_MASK
;
4075 case KVM_CAP_SET_GUEST_DEBUG2
:
4076 return KVM_GUESTDBG_VALID_MASK
;
4077 #ifdef CONFIG_KVM_XEN
4078 case KVM_CAP_XEN_HVM
:
4079 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
4080 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
4081 KVM_XEN_HVM_CONFIG_SHARED_INFO
;
4082 if (sched_info_on())
4083 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
;
4086 case KVM_CAP_SYNC_REGS
:
4087 r
= KVM_SYNC_X86_VALID_FIELDS
;
4089 case KVM_CAP_ADJUST_CLOCK
:
4090 r
= KVM_CLOCK_TSC_STABLE
;
4092 case KVM_CAP_X86_DISABLE_EXITS
:
4093 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
4094 KVM_X86_DISABLE_EXITS_CSTATE
;
4095 if(kvm_can_mwait_in_guest())
4096 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4098 case KVM_CAP_X86_SMM
:
4099 /* SMBASE is usually relocated above 1M on modern chipsets,
4100 * and SMM handlers might indeed rely on 4G segment limits,
4101 * so do not report SMM to be available if real mode is
4102 * emulated via vm86 mode. Still, do not go to great lengths
4103 * to avoid userspace's usage of the feature, because it is a
4104 * fringe case that is not enabled except via specific settings
4105 * of the module parameters.
4107 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4110 r
= !static_call(kvm_x86_cpu_has_accelerated_tpr
)();
4112 case KVM_CAP_NR_VCPUS
:
4113 r
= KVM_SOFT_MAX_VCPUS
;
4115 case KVM_CAP_MAX_VCPUS
:
4118 case KVM_CAP_MAX_VCPU_ID
:
4119 r
= KVM_MAX_VCPU_ID
;
4121 case KVM_CAP_PV_MMU
: /* obsolete */
4125 r
= KVM_MAX_MCE_BANKS
;
4128 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4130 case KVM_CAP_TSC_CONTROL
:
4131 r
= kvm_has_tsc_control
;
4133 case KVM_CAP_X2APIC_API
:
4134 r
= KVM_X2APIC_API_VALID_FLAGS
;
4136 case KVM_CAP_NESTED_STATE
:
4137 r
= kvm_x86_ops
.nested_ops
->get_state
?
4138 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4140 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4141 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
4143 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4144 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4146 case KVM_CAP_SMALLER_MAXPHYADDR
:
4147 r
= (int) allow_smaller_maxphyaddr
;
4149 case KVM_CAP_STEAL_TIME
:
4150 r
= sched_info_on();
4152 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4153 if (kvm_has_bus_lock_exit
)
4154 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4155 KVM_BUS_LOCK_DETECTION_EXIT
;
4166 long kvm_arch_dev_ioctl(struct file
*filp
,
4167 unsigned int ioctl
, unsigned long arg
)
4169 void __user
*argp
= (void __user
*)arg
;
4173 case KVM_GET_MSR_INDEX_LIST
: {
4174 struct kvm_msr_list __user
*user_msr_list
= argp
;
4175 struct kvm_msr_list msr_list
;
4179 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4182 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4183 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4186 if (n
< msr_list
.nmsrs
)
4189 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4190 num_msrs_to_save
* sizeof(u32
)))
4192 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4194 num_emulated_msrs
* sizeof(u32
)))
4199 case KVM_GET_SUPPORTED_CPUID
:
4200 case KVM_GET_EMULATED_CPUID
: {
4201 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4202 struct kvm_cpuid2 cpuid
;
4205 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4208 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4214 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4219 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4221 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
4222 sizeof(kvm_mce_cap_supported
)))
4226 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4227 struct kvm_msr_list __user
*user_msr_list
= argp
;
4228 struct kvm_msr_list msr_list
;
4232 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4235 msr_list
.nmsrs
= num_msr_based_features
;
4236 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4239 if (n
< msr_list
.nmsrs
)
4242 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4243 num_msr_based_features
* sizeof(u32
)))
4249 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4251 case KVM_GET_SUPPORTED_HV_CPUID
:
4252 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4262 static void wbinvd_ipi(void *garbage
)
4267 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4269 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4272 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4274 /* Address WBINVD may be executed by guest */
4275 if (need_emulate_wbinvd(vcpu
)) {
4276 if (static_call(kvm_x86_has_wbinvd_exit
)())
4277 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4278 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4279 smp_call_function_single(vcpu
->cpu
,
4280 wbinvd_ipi
, NULL
, 1);
4283 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4285 /* Save host pkru register if supported */
4286 vcpu
->arch
.host_pkru
= read_pkru();
4288 /* Apply any externally detected TSC adjustments (due to suspend) */
4289 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4290 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4291 vcpu
->arch
.tsc_offset_adjustment
= 0;
4292 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4295 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4296 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4297 rdtsc() - vcpu
->arch
.last_host_tsc
;
4299 mark_tsc_unstable("KVM discovered backwards TSC");
4301 if (kvm_check_tsc_unstable()) {
4302 u64 offset
= kvm_compute_l1_tsc_offset(vcpu
,
4303 vcpu
->arch
.last_guest_tsc
);
4304 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4305 vcpu
->arch
.tsc_catchup
= 1;
4308 if (kvm_lapic_hv_timer_in_use(vcpu
))
4309 kvm_lapic_restart_hv_timer(vcpu
);
4312 * On a host with synchronized TSC, there is no need to update
4313 * kvmclock on vcpu->cpu migration
4315 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4316 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4317 if (vcpu
->cpu
!= cpu
)
4318 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4322 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4325 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4327 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
4328 struct kvm_steal_time __user
*st
;
4329 struct kvm_memslots
*slots
;
4330 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
4332 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4335 if (vcpu
->arch
.st
.preempted
)
4338 /* This happens on process exit */
4339 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
4342 slots
= kvm_memslots(vcpu
->kvm
);
4344 if (unlikely(slots
->generation
!= ghc
->generation
||
4345 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
4348 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
4349 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
4351 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
4352 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4354 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
4357 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4361 if (vcpu
->preempted
&& !vcpu
->arch
.guest_state_protected
)
4362 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
4365 * Take the srcu lock as memslots will be accessed to check the gfn
4366 * cache generation against the memslots generation.
4368 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4369 if (kvm_xen_msr_enabled(vcpu
->kvm
))
4370 kvm_xen_runstate_set_preempted(vcpu
);
4372 kvm_steal_time_set_preempted(vcpu
);
4373 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4375 static_call(kvm_x86_vcpu_put
)(vcpu
);
4376 vcpu
->arch
.last_host_tsc
= rdtsc();
4379 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4380 struct kvm_lapic_state
*s
)
4382 if (vcpu
->arch
.apicv_active
)
4383 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
4385 return kvm_apic_get_state(vcpu
, s
);
4388 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4389 struct kvm_lapic_state
*s
)
4393 r
= kvm_apic_set_state(vcpu
, s
);
4396 update_cr8_intercept(vcpu
);
4401 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4404 * We can accept userspace's request for interrupt injection
4405 * as long as we have a place to store the interrupt number.
4406 * The actual injection will happen when the CPU is able to
4407 * deliver the interrupt.
4409 if (kvm_cpu_has_extint(vcpu
))
4412 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4413 return (!lapic_in_kernel(vcpu
) ||
4414 kvm_apic_accept_pic_intr(vcpu
));
4417 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4420 * Do not cause an interrupt window exit if an exception
4421 * is pending or an event needs reinjection; userspace
4422 * might want to inject the interrupt manually using KVM_SET_REGS
4423 * or KVM_SET_SREGS. For that to work, we must be at an
4424 * instruction boundary and with no events half-injected.
4426 return (kvm_arch_interrupt_allowed(vcpu
) &&
4427 kvm_cpu_accept_dm_intr(vcpu
) &&
4428 !kvm_event_needs_reinjection(vcpu
) &&
4429 !vcpu
->arch
.exception
.pending
);
4432 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4433 struct kvm_interrupt
*irq
)
4435 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4438 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4439 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4440 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4445 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4446 * fail for in-kernel 8259.
4448 if (pic_in_kernel(vcpu
->kvm
))
4451 if (vcpu
->arch
.pending_external_vector
!= -1)
4454 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4455 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4459 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4461 kvm_inject_nmi(vcpu
);
4466 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4468 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4473 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4474 struct kvm_tpr_access_ctl
*tac
)
4478 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4482 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4486 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4489 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4491 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4494 vcpu
->arch
.mcg_cap
= mcg_cap
;
4495 /* Init IA32_MCG_CTL to all 1s */
4496 if (mcg_cap
& MCG_CTL_P
)
4497 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4498 /* Init IA32_MCi_CTL to all 1s */
4499 for (bank
= 0; bank
< bank_num
; bank
++)
4500 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4502 static_call(kvm_x86_setup_mce
)(vcpu
);
4507 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4508 struct kvm_x86_mce
*mce
)
4510 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4511 unsigned bank_num
= mcg_cap
& 0xff;
4512 u64
*banks
= vcpu
->arch
.mce_banks
;
4514 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4517 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4518 * reporting is disabled
4520 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4521 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4523 banks
+= 4 * mce
->bank
;
4525 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4526 * reporting is disabled for the bank
4528 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4530 if (mce
->status
& MCI_STATUS_UC
) {
4531 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4532 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4533 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4536 if (banks
[1] & MCI_STATUS_VAL
)
4537 mce
->status
|= MCI_STATUS_OVER
;
4538 banks
[2] = mce
->addr
;
4539 banks
[3] = mce
->misc
;
4540 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4541 banks
[1] = mce
->status
;
4542 kvm_queue_exception(vcpu
, MC_VECTOR
);
4543 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4544 || !(banks
[1] & MCI_STATUS_UC
)) {
4545 if (banks
[1] & MCI_STATUS_VAL
)
4546 mce
->status
|= MCI_STATUS_OVER
;
4547 banks
[2] = mce
->addr
;
4548 banks
[3] = mce
->misc
;
4549 banks
[1] = mce
->status
;
4551 banks
[1] |= MCI_STATUS_OVER
;
4555 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4556 struct kvm_vcpu_events
*events
)
4560 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
4564 * In guest mode, payload delivery should be deferred,
4565 * so that the L1 hypervisor can intercept #PF before
4566 * CR2 is modified (or intercept #DB before DR6 is
4567 * modified under nVMX). Unless the per-VM capability,
4568 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4569 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4570 * opportunistically defer the exception payload, deliver it if the
4571 * capability hasn't been requested before processing a
4572 * KVM_GET_VCPU_EVENTS.
4574 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4575 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4576 kvm_deliver_exception_payload(vcpu
);
4579 * The API doesn't provide the instruction length for software
4580 * exceptions, so don't report them. As long as the guest RIP
4581 * isn't advanced, we should expect to encounter the exception
4584 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4585 events
->exception
.injected
= 0;
4586 events
->exception
.pending
= 0;
4588 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4589 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4591 * For ABI compatibility, deliberately conflate
4592 * pending and injected exceptions when
4593 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4595 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4596 events
->exception
.injected
|=
4597 vcpu
->arch
.exception
.pending
;
4599 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4600 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4601 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4602 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4603 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4605 events
->interrupt
.injected
=
4606 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4607 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4608 events
->interrupt
.soft
= 0;
4609 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
4611 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4612 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4613 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
4614 events
->nmi
.pad
= 0;
4616 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4618 events
->smi
.smm
= is_smm(vcpu
);
4619 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4620 events
->smi
.smm_inside_nmi
=
4621 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4622 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4624 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4625 | KVM_VCPUEVENT_VALID_SHADOW
4626 | KVM_VCPUEVENT_VALID_SMM
);
4627 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4628 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4630 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4633 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
);
4635 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4636 struct kvm_vcpu_events
*events
)
4638 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4639 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4640 | KVM_VCPUEVENT_VALID_SHADOW
4641 | KVM_VCPUEVENT_VALID_SMM
4642 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4645 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4646 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4648 if (events
->exception
.pending
)
4649 events
->exception
.injected
= 0;
4651 events
->exception_has_payload
= 0;
4653 events
->exception
.pending
= 0;
4654 events
->exception_has_payload
= 0;
4657 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4658 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4661 /* INITs are latched while in SMM */
4662 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4663 (events
->smi
.smm
|| events
->smi
.pending
) &&
4664 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4668 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4669 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4670 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4671 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4672 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4673 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4674 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4676 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4677 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4678 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4679 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4680 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
4681 events
->interrupt
.shadow
);
4683 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4684 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
4685 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
4686 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
4688 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
4689 lapic_in_kernel(vcpu
))
4690 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
4692 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
4693 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
)
4694 kvm_smm_changed(vcpu
, events
->smi
.smm
);
4696 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
4698 if (events
->smi
.smm
) {
4699 if (events
->smi
.smm_inside_nmi
)
4700 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
4702 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
4705 if (lapic_in_kernel(vcpu
)) {
4706 if (events
->smi
.latched_init
)
4707 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4709 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4713 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4718 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
4719 struct kvm_debugregs
*dbgregs
)
4723 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
4724 kvm_get_dr(vcpu
, 6, &val
);
4726 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4728 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4731 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4732 struct kvm_debugregs
*dbgregs
)
4737 if (!kvm_dr6_valid(dbgregs
->dr6
))
4739 if (!kvm_dr7_valid(dbgregs
->dr7
))
4742 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4743 kvm_update_dr0123(vcpu
);
4744 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4745 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4746 kvm_update_dr7(vcpu
);
4751 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4753 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
4755 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4756 u64 xstate_bv
= xsave
->header
.xfeatures
;
4760 * Copy legacy XSAVE area, to avoid complications with CPUID
4761 * leaves 0 and 1 in the loop below.
4763 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
4766 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
4767 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
4770 * Copy each region from the possibly compacted offset to the
4771 * non-compacted offset.
4773 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4775 u32 size
, offset
, ecx
, edx
;
4776 u64 xfeature_mask
= valid
& -valid
;
4777 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4780 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4781 &size
, &offset
, &ecx
, &edx
);
4783 if (xfeature_nr
== XFEATURE_PKRU
) {
4784 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
4785 sizeof(vcpu
->arch
.pkru
));
4787 src
= get_xsave_addr(xsave
, xfeature_nr
);
4789 memcpy(dest
+ offset
, src
, size
);
4792 valid
-= xfeature_mask
;
4796 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
4798 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4799 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
4803 * Copy legacy XSAVE area, to avoid complications with CPUID
4804 * leaves 0 and 1 in the loop below.
4806 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
4808 /* Set XSTATE_BV and possibly XCOMP_BV. */
4809 xsave
->header
.xfeatures
= xstate_bv
;
4810 if (boot_cpu_has(X86_FEATURE_XSAVES
))
4811 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
4814 * Copy each region from the non-compacted offset to the
4815 * possibly compacted offset.
4817 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4819 u32 size
, offset
, ecx
, edx
;
4820 u64 xfeature_mask
= valid
& -valid
;
4821 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4823 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4824 &size
, &offset
, &ecx
, &edx
);
4826 if (xfeature_nr
== XFEATURE_PKRU
) {
4827 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
4828 sizeof(vcpu
->arch
.pkru
));
4830 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
4833 memcpy(dest
, src
+ offset
, size
);
4836 valid
-= xfeature_mask
;
4840 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4841 struct kvm_xsave
*guest_xsave
)
4843 if (!vcpu
->arch
.guest_fpu
)
4846 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4847 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
4848 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
4850 memcpy(guest_xsave
->region
,
4851 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
4852 sizeof(struct fxregs_state
));
4853 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
4854 XFEATURE_MASK_FPSSE
;
4858 #define XSAVE_MXCSR_OFFSET 24
4860 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4861 struct kvm_xsave
*guest_xsave
)
4866 if (!vcpu
->arch
.guest_fpu
)
4869 xstate_bv
= *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
4870 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
4872 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4874 * Here we allow setting states that are not present in
4875 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4876 * with old userspace.
4878 if (xstate_bv
& ~supported_xcr0
|| mxcsr
& ~mxcsr_feature_mask
)
4880 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
4882 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
4883 mxcsr
& ~mxcsr_feature_mask
)
4885 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
4886 guest_xsave
->region
, sizeof(struct fxregs_state
));
4891 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4892 struct kvm_xcrs
*guest_xcrs
)
4894 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4895 guest_xcrs
->nr_xcrs
= 0;
4899 guest_xcrs
->nr_xcrs
= 1;
4900 guest_xcrs
->flags
= 0;
4901 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4902 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4905 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4906 struct kvm_xcrs
*guest_xcrs
)
4910 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4913 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4916 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4917 /* Only support XCR0 currently */
4918 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4919 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4920 guest_xcrs
->xcrs
[i
].value
);
4929 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4930 * stopped by the hypervisor. This function will be called from the host only.
4931 * EINVAL is returned when the host attempts to set the flag for a guest that
4932 * does not support pv clocks.
4934 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4936 if (!vcpu
->arch
.pv_time_enabled
)
4938 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4939 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4943 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4944 struct kvm_enable_cap
*cap
)
4947 uint16_t vmcs_version
;
4948 void __user
*user_ptr
;
4954 case KVM_CAP_HYPERV_SYNIC2
:
4959 case KVM_CAP_HYPERV_SYNIC
:
4960 if (!irqchip_in_kernel(vcpu
->kvm
))
4962 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
4963 KVM_CAP_HYPERV_SYNIC2
);
4964 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4965 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
4967 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
4969 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
4970 if (copy_to_user(user_ptr
, &vmcs_version
,
4971 sizeof(vmcs_version
)))
4975 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4976 if (!kvm_x86_ops
.enable_direct_tlbflush
)
4979 return static_call(kvm_x86_enable_direct_tlbflush
)(vcpu
);
4981 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4982 return kvm_hv_set_enforce_cpuid(vcpu
, cap
->args
[0]);
4984 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4985 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
4986 if (vcpu
->arch
.pv_cpuid
.enforce
)
4987 kvm_update_pv_runtime(vcpu
);
4995 long kvm_arch_vcpu_ioctl(struct file
*filp
,
4996 unsigned int ioctl
, unsigned long arg
)
4998 struct kvm_vcpu
*vcpu
= filp
->private_data
;
4999 void __user
*argp
= (void __user
*)arg
;
5002 struct kvm_sregs2
*sregs2
;
5003 struct kvm_lapic_state
*lapic
;
5004 struct kvm_xsave
*xsave
;
5005 struct kvm_xcrs
*xcrs
;
5013 case KVM_GET_LAPIC
: {
5015 if (!lapic_in_kernel(vcpu
))
5017 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
5018 GFP_KERNEL_ACCOUNT
);
5023 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
5027 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
5032 case KVM_SET_LAPIC
: {
5034 if (!lapic_in_kernel(vcpu
))
5036 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
5037 if (IS_ERR(u
.lapic
)) {
5038 r
= PTR_ERR(u
.lapic
);
5042 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
5045 case KVM_INTERRUPT
: {
5046 struct kvm_interrupt irq
;
5049 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
5051 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
5055 r
= kvm_vcpu_ioctl_nmi(vcpu
);
5059 r
= kvm_vcpu_ioctl_smi(vcpu
);
5062 case KVM_SET_CPUID
: {
5063 struct kvm_cpuid __user
*cpuid_arg
= argp
;
5064 struct kvm_cpuid cpuid
;
5067 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5069 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
5072 case KVM_SET_CPUID2
: {
5073 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5074 struct kvm_cpuid2 cpuid
;
5077 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5079 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
5080 cpuid_arg
->entries
);
5083 case KVM_GET_CPUID2
: {
5084 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5085 struct kvm_cpuid2 cpuid
;
5088 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5090 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5091 cpuid_arg
->entries
);
5095 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5100 case KVM_GET_MSRS
: {
5101 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5102 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5103 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5106 case KVM_SET_MSRS
: {
5107 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5108 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5109 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5112 case KVM_TPR_ACCESS_REPORTING
: {
5113 struct kvm_tpr_access_ctl tac
;
5116 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5118 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5122 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5127 case KVM_SET_VAPIC_ADDR
: {
5128 struct kvm_vapic_addr va
;
5132 if (!lapic_in_kernel(vcpu
))
5135 if (copy_from_user(&va
, argp
, sizeof(va
)))
5137 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5138 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5139 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5142 case KVM_X86_SETUP_MCE
: {
5146 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5148 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5151 case KVM_X86_SET_MCE
: {
5152 struct kvm_x86_mce mce
;
5155 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5157 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5160 case KVM_GET_VCPU_EVENTS
: {
5161 struct kvm_vcpu_events events
;
5163 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5166 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5171 case KVM_SET_VCPU_EVENTS
: {
5172 struct kvm_vcpu_events events
;
5175 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5178 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5181 case KVM_GET_DEBUGREGS
: {
5182 struct kvm_debugregs dbgregs
;
5184 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5187 if (copy_to_user(argp
, &dbgregs
,
5188 sizeof(struct kvm_debugregs
)))
5193 case KVM_SET_DEBUGREGS
: {
5194 struct kvm_debugregs dbgregs
;
5197 if (copy_from_user(&dbgregs
, argp
,
5198 sizeof(struct kvm_debugregs
)))
5201 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
5204 case KVM_GET_XSAVE
: {
5205 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
5210 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
5213 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
5218 case KVM_SET_XSAVE
: {
5219 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
5220 if (IS_ERR(u
.xsave
)) {
5221 r
= PTR_ERR(u
.xsave
);
5225 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
5228 case KVM_GET_XCRS
: {
5229 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
5234 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
5237 if (copy_to_user(argp
, u
.xcrs
,
5238 sizeof(struct kvm_xcrs
)))
5243 case KVM_SET_XCRS
: {
5244 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
5245 if (IS_ERR(u
.xcrs
)) {
5246 r
= PTR_ERR(u
.xcrs
);
5250 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
5253 case KVM_SET_TSC_KHZ
: {
5257 user_tsc_khz
= (u32
)arg
;
5259 if (kvm_has_tsc_control
&&
5260 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
5263 if (user_tsc_khz
== 0)
5264 user_tsc_khz
= tsc_khz
;
5266 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
5271 case KVM_GET_TSC_KHZ
: {
5272 r
= vcpu
->arch
.virtual_tsc_khz
;
5275 case KVM_KVMCLOCK_CTRL
: {
5276 r
= kvm_set_guest_paused(vcpu
);
5279 case KVM_ENABLE_CAP
: {
5280 struct kvm_enable_cap cap
;
5283 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
5285 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
5288 case KVM_GET_NESTED_STATE
: {
5289 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5293 if (!kvm_x86_ops
.nested_ops
->get_state
)
5296 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
5298 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
5301 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
5306 if (r
> user_data_size
) {
5307 if (put_user(r
, &user_kvm_nested_state
->size
))
5317 case KVM_SET_NESTED_STATE
: {
5318 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5319 struct kvm_nested_state kvm_state
;
5323 if (!kvm_x86_ops
.nested_ops
->set_state
)
5327 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5331 if (kvm_state
.size
< sizeof(kvm_state
))
5334 if (kvm_state
.flags
&
5335 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5336 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5337 | KVM_STATE_NESTED_GIF_SET
))
5340 /* nested_run_pending implies guest_mode. */
5341 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5342 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5345 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5346 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5347 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5350 case KVM_GET_SUPPORTED_HV_CPUID
:
5351 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5353 #ifdef CONFIG_KVM_XEN
5354 case KVM_XEN_VCPU_GET_ATTR
: {
5355 struct kvm_xen_vcpu_attr xva
;
5358 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5360 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
5361 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
5365 case KVM_XEN_VCPU_SET_ATTR
: {
5366 struct kvm_xen_vcpu_attr xva
;
5369 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5371 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
5375 case KVM_GET_SREGS2
: {
5376 u
.sregs2
= kzalloc(sizeof(struct kvm_sregs2
), GFP_KERNEL
);
5380 __get_sregs2(vcpu
, u
.sregs2
);
5382 if (copy_to_user(argp
, u
.sregs2
, sizeof(struct kvm_sregs2
)))
5387 case KVM_SET_SREGS2
: {
5388 u
.sregs2
= memdup_user(argp
, sizeof(struct kvm_sregs2
));
5389 if (IS_ERR(u
.sregs2
)) {
5390 r
= PTR_ERR(u
.sregs2
);
5394 r
= __set_sregs2(vcpu
, u
.sregs2
);
5407 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5409 return VM_FAULT_SIGBUS
;
5412 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5416 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5418 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
5422 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5425 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
5428 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5429 unsigned long kvm_nr_mmu_pages
)
5431 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5434 mutex_lock(&kvm
->slots_lock
);
5436 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5437 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5439 mutex_unlock(&kvm
->slots_lock
);
5443 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5445 return kvm
->arch
.n_max_mmu_pages
;
5448 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5450 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5454 switch (chip
->chip_id
) {
5455 case KVM_IRQCHIP_PIC_MASTER
:
5456 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5457 sizeof(struct kvm_pic_state
));
5459 case KVM_IRQCHIP_PIC_SLAVE
:
5460 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5461 sizeof(struct kvm_pic_state
));
5463 case KVM_IRQCHIP_IOAPIC
:
5464 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5473 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5475 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5479 switch (chip
->chip_id
) {
5480 case KVM_IRQCHIP_PIC_MASTER
:
5481 spin_lock(&pic
->lock
);
5482 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5483 sizeof(struct kvm_pic_state
));
5484 spin_unlock(&pic
->lock
);
5486 case KVM_IRQCHIP_PIC_SLAVE
:
5487 spin_lock(&pic
->lock
);
5488 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5489 sizeof(struct kvm_pic_state
));
5490 spin_unlock(&pic
->lock
);
5492 case KVM_IRQCHIP_IOAPIC
:
5493 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5499 kvm_pic_update_irq(pic
);
5503 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5505 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5507 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5509 mutex_lock(&kps
->lock
);
5510 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5511 mutex_unlock(&kps
->lock
);
5515 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5518 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5520 mutex_lock(&pit
->pit_state
.lock
);
5521 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5522 for (i
= 0; i
< 3; i
++)
5523 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5524 mutex_unlock(&pit
->pit_state
.lock
);
5528 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5530 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5531 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5532 sizeof(ps
->channels
));
5533 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5534 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5535 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5539 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5543 u32 prev_legacy
, cur_legacy
;
5544 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5546 mutex_lock(&pit
->pit_state
.lock
);
5547 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5548 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5549 if (!prev_legacy
&& cur_legacy
)
5551 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5552 sizeof(pit
->pit_state
.channels
));
5553 pit
->pit_state
.flags
= ps
->flags
;
5554 for (i
= 0; i
< 3; i
++)
5555 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5557 mutex_unlock(&pit
->pit_state
.lock
);
5561 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5562 struct kvm_reinject_control
*control
)
5564 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5566 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5567 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5568 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5570 mutex_lock(&pit
->pit_state
.lock
);
5571 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5572 mutex_unlock(&pit
->pit_state
.lock
);
5577 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5581 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5582 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5583 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5586 struct kvm_vcpu
*vcpu
;
5589 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5590 kvm_vcpu_kick(vcpu
);
5593 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5596 if (!irqchip_in_kernel(kvm
))
5599 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5600 irq_event
->irq
, irq_event
->level
,
5605 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5606 struct kvm_enable_cap
*cap
)
5614 case KVM_CAP_DISABLE_QUIRKS
:
5615 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5618 case KVM_CAP_SPLIT_IRQCHIP
: {
5619 mutex_lock(&kvm
->lock
);
5621 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5622 goto split_irqchip_unlock
;
5624 if (irqchip_in_kernel(kvm
))
5625 goto split_irqchip_unlock
;
5626 if (kvm
->created_vcpus
)
5627 goto split_irqchip_unlock
;
5628 r
= kvm_setup_empty_irq_routing(kvm
);
5630 goto split_irqchip_unlock
;
5631 /* Pairs with irqchip_in_kernel. */
5633 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5634 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5636 split_irqchip_unlock
:
5637 mutex_unlock(&kvm
->lock
);
5640 case KVM_CAP_X2APIC_API
:
5642 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
5645 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
5646 kvm
->arch
.x2apic_format
= true;
5647 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
5648 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
5652 case KVM_CAP_X86_DISABLE_EXITS
:
5654 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
5657 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
5658 kvm_can_mwait_in_guest())
5659 kvm
->arch
.mwait_in_guest
= true;
5660 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
5661 kvm
->arch
.hlt_in_guest
= true;
5662 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
5663 kvm
->arch
.pause_in_guest
= true;
5664 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
5665 kvm
->arch
.cstate_in_guest
= true;
5668 case KVM_CAP_MSR_PLATFORM_INFO
:
5669 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
5672 case KVM_CAP_EXCEPTION_PAYLOAD
:
5673 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
5676 case KVM_CAP_X86_USER_SPACE_MSR
:
5677 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
5680 case KVM_CAP_X86_BUS_LOCK_EXIT
:
5682 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
5685 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
5686 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
5689 if (kvm_has_bus_lock_exit
&&
5690 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
5691 kvm
->arch
.bus_lock_detection_enabled
= true;
5694 #ifdef CONFIG_X86_SGX_KVM
5695 case KVM_CAP_SGX_ATTRIBUTE
: {
5696 unsigned long allowed_attributes
= 0;
5698 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
5702 /* KVM only supports the PROVISIONKEY privileged attribute. */
5703 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
5704 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
5705 kvm
->arch
.sgx_provisioning_allowed
= true;
5711 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
5713 if (kvm_x86_ops
.vm_copy_enc_context_from
)
5714 r
= kvm_x86_ops
.vm_copy_enc_context_from(kvm
, cap
->args
[0]);
5716 case KVM_CAP_EXIT_HYPERCALL
:
5717 if (cap
->args
[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK
) {
5721 kvm
->arch
.hypercall_exit_enabled
= cap
->args
[0];
5724 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
5726 if (cap
->args
[0] & ~1)
5728 kvm
->arch
.exit_on_emulation_error
= cap
->args
[0];
5738 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
5740 struct kvm_x86_msr_filter
*msr_filter
;
5742 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
5746 msr_filter
->default_allow
= default_allow
;
5750 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
5757 for (i
= 0; i
< msr_filter
->count
; i
++)
5758 kfree(msr_filter
->ranges
[i
].bitmap
);
5763 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
5764 struct kvm_msr_filter_range
*user_range
)
5766 unsigned long *bitmap
= NULL
;
5769 if (!user_range
->nmsrs
)
5772 if (user_range
->flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
))
5775 if (!user_range
->flags
)
5778 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
5779 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
5782 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
5784 return PTR_ERR(bitmap
);
5786 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
5787 .flags
= user_range
->flags
,
5788 .base
= user_range
->base
,
5789 .nmsrs
= user_range
->nmsrs
,
5793 msr_filter
->count
++;
5797 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
5799 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
5800 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
5801 struct kvm_msr_filter filter
;
5807 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
5810 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
5811 empty
&= !filter
.ranges
[i
].nmsrs
;
5813 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
5814 if (empty
&& !default_allow
)
5817 new_filter
= kvm_alloc_msr_filter(default_allow
);
5821 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
5822 r
= kvm_add_msr_filter(new_filter
, &filter
.ranges
[i
]);
5824 kvm_free_msr_filter(new_filter
);
5829 mutex_lock(&kvm
->lock
);
5831 /* The per-VM filter is protected by kvm->lock... */
5832 old_filter
= srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1);
5834 rcu_assign_pointer(kvm
->arch
.msr_filter
, new_filter
);
5835 synchronize_srcu(&kvm
->srcu
);
5837 kvm_free_msr_filter(old_filter
);
5839 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
5840 mutex_unlock(&kvm
->lock
);
5845 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5846 static int kvm_arch_suspend_notifier(struct kvm
*kvm
)
5848 struct kvm_vcpu
*vcpu
;
5851 mutex_lock(&kvm
->lock
);
5852 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5853 if (!vcpu
->arch
.pv_time_enabled
)
5856 ret
= kvm_set_guest_paused(vcpu
);
5858 kvm_err("Failed to pause guest VCPU%d: %d\n",
5859 vcpu
->vcpu_id
, ret
);
5863 mutex_unlock(&kvm
->lock
);
5865 return ret
? NOTIFY_BAD
: NOTIFY_DONE
;
5868 int kvm_arch_pm_notifier(struct kvm
*kvm
, unsigned long state
)
5871 case PM_HIBERNATION_PREPARE
:
5872 case PM_SUSPEND_PREPARE
:
5873 return kvm_arch_suspend_notifier(kvm
);
5878 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5880 long kvm_arch_vm_ioctl(struct file
*filp
,
5881 unsigned int ioctl
, unsigned long arg
)
5883 struct kvm
*kvm
= filp
->private_data
;
5884 void __user
*argp
= (void __user
*)arg
;
5887 * This union makes it completely explicit to gcc-3.x
5888 * that these two variables' stack usage should be
5889 * combined, not added together.
5892 struct kvm_pit_state ps
;
5893 struct kvm_pit_state2 ps2
;
5894 struct kvm_pit_config pit_config
;
5898 case KVM_SET_TSS_ADDR
:
5899 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
5901 case KVM_SET_IDENTITY_MAP_ADDR
: {
5904 mutex_lock(&kvm
->lock
);
5906 if (kvm
->created_vcpus
)
5907 goto set_identity_unlock
;
5909 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
5910 goto set_identity_unlock
;
5911 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
5912 set_identity_unlock
:
5913 mutex_unlock(&kvm
->lock
);
5916 case KVM_SET_NR_MMU_PAGES
:
5917 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
5919 case KVM_GET_NR_MMU_PAGES
:
5920 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
5922 case KVM_CREATE_IRQCHIP
: {
5923 mutex_lock(&kvm
->lock
);
5926 if (irqchip_in_kernel(kvm
))
5927 goto create_irqchip_unlock
;
5930 if (kvm
->created_vcpus
)
5931 goto create_irqchip_unlock
;
5933 r
= kvm_pic_init(kvm
);
5935 goto create_irqchip_unlock
;
5937 r
= kvm_ioapic_init(kvm
);
5939 kvm_pic_destroy(kvm
);
5940 goto create_irqchip_unlock
;
5943 r
= kvm_setup_default_irq_routing(kvm
);
5945 kvm_ioapic_destroy(kvm
);
5946 kvm_pic_destroy(kvm
);
5947 goto create_irqchip_unlock
;
5949 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5951 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
5952 create_irqchip_unlock
:
5953 mutex_unlock(&kvm
->lock
);
5956 case KVM_CREATE_PIT
:
5957 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
5959 case KVM_CREATE_PIT2
:
5961 if (copy_from_user(&u
.pit_config
, argp
,
5962 sizeof(struct kvm_pit_config
)))
5965 mutex_lock(&kvm
->lock
);
5968 goto create_pit_unlock
;
5970 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
5974 mutex_unlock(&kvm
->lock
);
5976 case KVM_GET_IRQCHIP
: {
5977 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5978 struct kvm_irqchip
*chip
;
5980 chip
= memdup_user(argp
, sizeof(*chip
));
5987 if (!irqchip_kernel(kvm
))
5988 goto get_irqchip_out
;
5989 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
5991 goto get_irqchip_out
;
5993 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
5994 goto get_irqchip_out
;
6000 case KVM_SET_IRQCHIP
: {
6001 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6002 struct kvm_irqchip
*chip
;
6004 chip
= memdup_user(argp
, sizeof(*chip
));
6011 if (!irqchip_kernel(kvm
))
6012 goto set_irqchip_out
;
6013 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
6020 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
6023 if (!kvm
->arch
.vpit
)
6025 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
6029 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
6036 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
6038 mutex_lock(&kvm
->lock
);
6040 if (!kvm
->arch
.vpit
)
6042 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
6044 mutex_unlock(&kvm
->lock
);
6047 case KVM_GET_PIT2
: {
6049 if (!kvm
->arch
.vpit
)
6051 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
6055 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
6060 case KVM_SET_PIT2
: {
6062 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
6064 mutex_lock(&kvm
->lock
);
6066 if (!kvm
->arch
.vpit
)
6068 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
6070 mutex_unlock(&kvm
->lock
);
6073 case KVM_REINJECT_CONTROL
: {
6074 struct kvm_reinject_control control
;
6076 if (copy_from_user(&control
, argp
, sizeof(control
)))
6079 if (!kvm
->arch
.vpit
)
6081 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
6084 case KVM_SET_BOOT_CPU_ID
:
6086 mutex_lock(&kvm
->lock
);
6087 if (kvm
->created_vcpus
)
6090 kvm
->arch
.bsp_vcpu_id
= arg
;
6091 mutex_unlock(&kvm
->lock
);
6093 #ifdef CONFIG_KVM_XEN
6094 case KVM_XEN_HVM_CONFIG
: {
6095 struct kvm_xen_hvm_config xhc
;
6097 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
6099 r
= kvm_xen_hvm_config(kvm
, &xhc
);
6102 case KVM_XEN_HVM_GET_ATTR
: {
6103 struct kvm_xen_hvm_attr xha
;
6106 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6108 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
6109 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
6113 case KVM_XEN_HVM_SET_ATTR
: {
6114 struct kvm_xen_hvm_attr xha
;
6117 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6119 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
6123 case KVM_SET_CLOCK
: {
6124 struct kvm_arch
*ka
= &kvm
->arch
;
6125 struct kvm_clock_data user_ns
;
6129 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
6138 * TODO: userspace has to take care of races with VCPU_RUN, so
6139 * kvm_gen_update_masterclock() can be cut down to locked
6140 * pvclock_update_vm_gtod_copy().
6142 kvm_gen_update_masterclock(kvm
);
6145 * This pairs with kvm_guest_time_update(): when masterclock is
6146 * in use, we use master_kernel_ns + kvmclock_offset to set
6147 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6148 * is slightly ahead) here we risk going negative on unsigned
6149 * 'system_time' when 'user_ns.clock' is very small.
6151 raw_spin_lock_irq(&ka
->pvclock_gtod_sync_lock
);
6152 if (kvm
->arch
.use_master_clock
)
6153 now_ns
= ka
->master_kernel_ns
;
6155 now_ns
= get_kvmclock_base_ns();
6156 ka
->kvmclock_offset
= user_ns
.clock
- now_ns
;
6157 raw_spin_unlock_irq(&ka
->pvclock_gtod_sync_lock
);
6159 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
6162 case KVM_GET_CLOCK
: {
6163 struct kvm_clock_data user_ns
;
6166 now_ns
= get_kvmclock_ns(kvm
);
6167 user_ns
.clock
= now_ns
;
6168 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
6169 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
6172 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
6177 case KVM_MEMORY_ENCRYPT_OP
: {
6179 if (kvm_x86_ops
.mem_enc_op
)
6180 r
= static_call(kvm_x86_mem_enc_op
)(kvm
, argp
);
6183 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
6184 struct kvm_enc_region region
;
6187 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6191 if (kvm_x86_ops
.mem_enc_reg_region
)
6192 r
= static_call(kvm_x86_mem_enc_reg_region
)(kvm
, ®ion
);
6195 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
6196 struct kvm_enc_region region
;
6199 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6203 if (kvm_x86_ops
.mem_enc_unreg_region
)
6204 r
= static_call(kvm_x86_mem_enc_unreg_region
)(kvm
, ®ion
);
6207 case KVM_HYPERV_EVENTFD
: {
6208 struct kvm_hyperv_eventfd hvevfd
;
6211 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
6213 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
6216 case KVM_SET_PMU_EVENT_FILTER
:
6217 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
6219 case KVM_X86_SET_MSR_FILTER
:
6220 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
6229 static void kvm_init_msr_list(void)
6231 struct x86_pmu_capability x86_pmu
;
6235 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
6236 "Please update the fixed PMCs in msrs_to_saved_all[]");
6238 perf_get_x86_pmu_capability(&x86_pmu
);
6240 num_msrs_to_save
= 0;
6241 num_emulated_msrs
= 0;
6242 num_msr_based_features
= 0;
6244 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
6245 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
6249 * Even MSRs that are valid in the host may not be exposed
6250 * to the guests in some cases.
6252 switch (msrs_to_save_all
[i
]) {
6253 case MSR_IA32_BNDCFGS
:
6254 if (!kvm_mpx_supported())
6258 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
6259 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
6262 case MSR_IA32_UMWAIT_CONTROL
:
6263 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
6266 case MSR_IA32_RTIT_CTL
:
6267 case MSR_IA32_RTIT_STATUS
:
6268 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
6271 case MSR_IA32_RTIT_CR3_MATCH
:
6272 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6273 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
6276 case MSR_IA32_RTIT_OUTPUT_BASE
:
6277 case MSR_IA32_RTIT_OUTPUT_MASK
:
6278 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6279 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
6280 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
6283 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
6284 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6285 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
6286 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
6289 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
6290 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
6291 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6294 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
6295 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
6296 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6303 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
6306 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
6307 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
6310 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
6313 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
6314 struct kvm_msr_entry msr
;
6316 msr
.index
= msr_based_features_all
[i
];
6317 if (kvm_get_msr_feature(&msr
))
6320 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
6324 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
6332 if (!(lapic_in_kernel(vcpu
) &&
6333 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
6334 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6345 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
6352 if (!(lapic_in_kernel(vcpu
) &&
6353 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
6355 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6357 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
6367 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
6368 struct kvm_segment
*var
, int seg
)
6370 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
6373 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
6374 struct kvm_segment
*var
, int seg
)
6376 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
6379 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
6380 struct x86_exception
*exception
)
6384 BUG_ON(!mmu_is_nested(vcpu
));
6386 /* NPT walks are always user-walks */
6387 access
|= PFERR_USER_MASK
;
6388 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
6393 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
6394 struct x86_exception
*exception
)
6396 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6397 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6399 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
6401 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
6402 struct x86_exception
*exception
)
6404 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6405 access
|= PFERR_FETCH_MASK
;
6406 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6409 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
6410 struct x86_exception
*exception
)
6412 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6413 access
|= PFERR_WRITE_MASK
;
6414 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6416 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
6418 /* uses this to access any guest's mapped memory without checking CPL */
6419 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
6420 struct x86_exception
*exception
)
6422 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
6425 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6426 struct kvm_vcpu
*vcpu
, u32 access
,
6427 struct x86_exception
*exception
)
6430 int r
= X86EMUL_CONTINUE
;
6433 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
6435 unsigned offset
= addr
& (PAGE_SIZE
-1);
6436 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6439 if (gpa
== UNMAPPED_GVA
)
6440 return X86EMUL_PROPAGATE_FAULT
;
6441 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
6444 r
= X86EMUL_IO_NEEDED
;
6456 /* used for instruction fetching */
6457 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
6458 gva_t addr
, void *val
, unsigned int bytes
,
6459 struct x86_exception
*exception
)
6461 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6462 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6466 /* Inline kvm_read_guest_virt_helper for speed. */
6467 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
6469 if (unlikely(gpa
== UNMAPPED_GVA
))
6470 return X86EMUL_PROPAGATE_FAULT
;
6472 offset
= addr
& (PAGE_SIZE
-1);
6473 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
6474 bytes
= (unsigned)PAGE_SIZE
- offset
;
6475 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
6477 if (unlikely(ret
< 0))
6478 return X86EMUL_IO_NEEDED
;
6480 return X86EMUL_CONTINUE
;
6483 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
6484 gva_t addr
, void *val
, unsigned int bytes
,
6485 struct x86_exception
*exception
)
6487 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6490 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6491 * is returned, but our callers are not ready for that and they blindly
6492 * call kvm_inject_page_fault. Ensure that they at least do not leak
6493 * uninitialized kernel stack memory into cr2 and error code.
6495 memset(exception
, 0, sizeof(*exception
));
6496 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
6499 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
6501 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
6502 gva_t addr
, void *val
, unsigned int bytes
,
6503 struct x86_exception
*exception
, bool system
)
6505 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6508 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6509 access
|= PFERR_USER_MASK
;
6511 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6514 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6515 unsigned long addr
, void *val
, unsigned int bytes
)
6517 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6518 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6520 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6523 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6524 struct kvm_vcpu
*vcpu
, u32 access
,
6525 struct x86_exception
*exception
)
6528 int r
= X86EMUL_CONTINUE
;
6531 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
6534 unsigned offset
= addr
& (PAGE_SIZE
-1);
6535 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6538 if (gpa
== UNMAPPED_GVA
)
6539 return X86EMUL_PROPAGATE_FAULT
;
6540 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6542 r
= X86EMUL_IO_NEEDED
;
6554 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6555 unsigned int bytes
, struct x86_exception
*exception
,
6558 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6559 u32 access
= PFERR_WRITE_MASK
;
6561 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6562 access
|= PFERR_USER_MASK
;
6564 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6568 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
6569 unsigned int bytes
, struct x86_exception
*exception
)
6571 /* kvm_write_guest_virt_system can pull in tons of pages. */
6572 vcpu
->arch
.l1tf_flush_l1d
= true;
6574 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6575 PFERR_WRITE_MASK
, exception
);
6577 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
6579 int handle_ud(struct kvm_vcpu
*vcpu
)
6581 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
6582 int emul_type
= EMULTYPE_TRAP_UD
;
6583 char sig
[5]; /* ud2; .ascii "kvm" */
6584 struct x86_exception e
;
6586 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, NULL
, 0)))
6589 if (force_emulation_prefix
&&
6590 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
6591 sig
, sizeof(sig
), &e
) == 0 &&
6592 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
6593 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
6594 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
6597 return kvm_emulate_instruction(vcpu
, emul_type
);
6599 EXPORT_SYMBOL_GPL(handle_ud
);
6601 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6602 gpa_t gpa
, bool write
)
6604 /* For APIC access vmexit */
6605 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6608 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
6609 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
6616 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6617 gpa_t
*gpa
, struct x86_exception
*exception
,
6620 u32 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
6621 | (write
? PFERR_WRITE_MASK
: 0);
6624 * currently PKRU is only applied to ept enabled guest so
6625 * there is no pkey in EPT page table for L1 guest or EPT
6626 * shadow page table for L2 guest.
6628 if (vcpu_match_mmio_gva(vcpu
, gva
) && (!is_paging(vcpu
) ||
6629 !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
6630 vcpu
->arch
.mmio_access
, 0, access
))) {
6631 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
6632 (gva
& (PAGE_SIZE
- 1));
6633 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
6637 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6639 if (*gpa
== UNMAPPED_GVA
)
6642 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
6645 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6646 const void *val
, int bytes
)
6650 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
6653 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
6657 struct read_write_emulator_ops
{
6658 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
6660 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6661 void *val
, int bytes
);
6662 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6663 int bytes
, void *val
);
6664 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6665 void *val
, int bytes
);
6669 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
6671 if (vcpu
->mmio_read_completed
) {
6672 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
6673 vcpu
->mmio_fragments
[0].gpa
, val
);
6674 vcpu
->mmio_read_completed
= 0;
6681 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6682 void *val
, int bytes
)
6684 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
6687 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6688 void *val
, int bytes
)
6690 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
6693 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
6695 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
6696 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
6699 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6700 void *val
, int bytes
)
6702 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
6703 return X86EMUL_IO_NEEDED
;
6706 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6707 void *val
, int bytes
)
6709 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
6711 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6712 return X86EMUL_CONTINUE
;
6715 static const struct read_write_emulator_ops read_emultor
= {
6716 .read_write_prepare
= read_prepare
,
6717 .read_write_emulate
= read_emulate
,
6718 .read_write_mmio
= vcpu_mmio_read
,
6719 .read_write_exit_mmio
= read_exit_mmio
,
6722 static const struct read_write_emulator_ops write_emultor
= {
6723 .read_write_emulate
= write_emulate
,
6724 .read_write_mmio
= write_mmio
,
6725 .read_write_exit_mmio
= write_exit_mmio
,
6729 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
6731 struct x86_exception
*exception
,
6732 struct kvm_vcpu
*vcpu
,
6733 const struct read_write_emulator_ops
*ops
)
6737 bool write
= ops
->write
;
6738 struct kvm_mmio_fragment
*frag
;
6739 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6742 * If the exit was due to a NPF we may already have a GPA.
6743 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6744 * Note, this cannot be used on string operations since string
6745 * operation using rep will only have the initial GPA from the NPF
6748 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
6749 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
6750 gpa
= ctxt
->gpa_val
;
6751 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
6753 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
6755 return X86EMUL_PROPAGATE_FAULT
;
6758 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
6759 return X86EMUL_CONTINUE
;
6762 * Is this MMIO handled locally?
6764 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
6765 if (handled
== bytes
)
6766 return X86EMUL_CONTINUE
;
6772 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
6773 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
6777 return X86EMUL_CONTINUE
;
6780 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
6782 void *val
, unsigned int bytes
,
6783 struct x86_exception
*exception
,
6784 const struct read_write_emulator_ops
*ops
)
6786 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6790 if (ops
->read_write_prepare
&&
6791 ops
->read_write_prepare(vcpu
, val
, bytes
))
6792 return X86EMUL_CONTINUE
;
6794 vcpu
->mmio_nr_fragments
= 0;
6796 /* Crossing a page boundary? */
6797 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
6800 now
= -addr
& ~PAGE_MASK
;
6801 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
6804 if (rc
!= X86EMUL_CONTINUE
)
6807 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
6813 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
6815 if (rc
!= X86EMUL_CONTINUE
)
6818 if (!vcpu
->mmio_nr_fragments
)
6821 gpa
= vcpu
->mmio_fragments
[0].gpa
;
6823 vcpu
->mmio_needed
= 1;
6824 vcpu
->mmio_cur_fragment
= 0;
6826 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
6827 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
6828 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
6829 vcpu
->run
->mmio
.phys_addr
= gpa
;
6831 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
6834 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
6838 struct x86_exception
*exception
)
6840 return emulator_read_write(ctxt
, addr
, val
, bytes
,
6841 exception
, &read_emultor
);
6844 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
6848 struct x86_exception
*exception
)
6850 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
6851 exception
, &write_emultor
);
6854 #define CMPXCHG_TYPE(t, ptr, old, new) \
6855 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6857 #ifdef CONFIG_X86_64
6858 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6860 # define CMPXCHG64(ptr, old, new) \
6861 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6864 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
6869 struct x86_exception
*exception
)
6871 struct kvm_host_map map
;
6872 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6878 /* guests cmpxchg8b have to be emulated atomically */
6879 if (bytes
> 8 || (bytes
& (bytes
- 1)))
6882 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
6884 if (gpa
== UNMAPPED_GVA
||
6885 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6889 * Emulate the atomic as a straight write to avoid #AC if SLD is
6890 * enabled in the host and the access splits a cache line.
6892 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
6893 page_line_mask
= ~(cache_line_size() - 1);
6895 page_line_mask
= PAGE_MASK
;
6897 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
6900 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
6903 kaddr
= map
.hva
+ offset_in_page(gpa
);
6907 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
6910 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
6913 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
6916 exchanged
= CMPXCHG64(kaddr
, old
, new);
6922 kvm_vcpu_unmap(vcpu
, &map
, true);
6925 return X86EMUL_CMPXCHG_FAILED
;
6927 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
6929 return X86EMUL_CONTINUE
;
6932 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
6934 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
6937 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
6941 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
6942 if (vcpu
->arch
.pio
.in
)
6943 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
6944 vcpu
->arch
.pio
.size
, pd
);
6946 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
6947 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
6951 pd
+= vcpu
->arch
.pio
.size
;
6956 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
6957 unsigned short port
,
6958 unsigned int count
, bool in
)
6960 vcpu
->arch
.pio
.port
= port
;
6961 vcpu
->arch
.pio
.in
= in
;
6962 vcpu
->arch
.pio
.count
= count
;
6963 vcpu
->arch
.pio
.size
= size
;
6965 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
))
6968 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
6969 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
6970 vcpu
->run
->io
.size
= size
;
6971 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
6972 vcpu
->run
->io
.count
= count
;
6973 vcpu
->run
->io
.port
= port
;
6978 static int __emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6979 unsigned short port
, unsigned int count
)
6981 WARN_ON(vcpu
->arch
.pio
.count
);
6982 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
6983 return emulator_pio_in_out(vcpu
, size
, port
, count
, true);
6986 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
6988 int size
= vcpu
->arch
.pio
.size
;
6989 unsigned count
= vcpu
->arch
.pio
.count
;
6990 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
6991 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
6992 vcpu
->arch
.pio
.count
= 0;
6995 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6996 unsigned short port
, void *val
, unsigned int count
)
6998 if (vcpu
->arch
.pio
.count
) {
6999 /* Complete previous iteration. */
7001 int r
= __emulator_pio_in(vcpu
, size
, port
, count
);
7005 /* Results already available, fall through. */
7008 WARN_ON(count
!= vcpu
->arch
.pio
.count
);
7009 complete_emulator_pio_in(vcpu
, val
);
7013 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
7014 int size
, unsigned short port
, void *val
,
7017 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7021 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7022 unsigned short port
, const void *val
,
7027 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
7028 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
7029 ret
= emulator_pio_in_out(vcpu
, size
, port
, count
, false);
7031 vcpu
->arch
.pio
.count
= 0;
7036 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
7037 int size
, unsigned short port
,
7038 const void *val
, unsigned int count
)
7040 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7043 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
7045 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
7048 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
7050 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
7053 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
7055 if (!need_emulate_wbinvd(vcpu
))
7056 return X86EMUL_CONTINUE
;
7058 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
7059 int cpu
= get_cpu();
7061 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
7062 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
7063 wbinvd_ipi
, NULL
, 1);
7065 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
7068 return X86EMUL_CONTINUE
;
7071 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
7073 kvm_emulate_wbinvd_noskip(vcpu
);
7074 return kvm_skip_emulated_instruction(vcpu
);
7076 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
7080 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
7082 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
7085 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7086 unsigned long *dest
)
7088 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
7091 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7092 unsigned long value
)
7095 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
7098 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
7100 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
7103 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
7105 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7106 unsigned long value
;
7110 value
= kvm_read_cr0(vcpu
);
7113 value
= vcpu
->arch
.cr2
;
7116 value
= kvm_read_cr3(vcpu
);
7119 value
= kvm_read_cr4(vcpu
);
7122 value
= kvm_get_cr8(vcpu
);
7125 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7132 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
7134 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7139 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
7142 vcpu
->arch
.cr2
= val
;
7145 res
= kvm_set_cr3(vcpu
, val
);
7148 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
7151 res
= kvm_set_cr8(vcpu
, val
);
7154 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7161 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
7163 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
7166 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7168 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
7171 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7173 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
7176 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7178 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
7181 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7183 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
7186 static unsigned long emulator_get_cached_segment_base(
7187 struct x86_emulate_ctxt
*ctxt
, int seg
)
7189 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
7192 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
7193 struct desc_struct
*desc
, u32
*base3
,
7196 struct kvm_segment var
;
7198 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
7199 *selector
= var
.selector
;
7202 memset(desc
, 0, sizeof(*desc
));
7210 set_desc_limit(desc
, var
.limit
);
7211 set_desc_base(desc
, (unsigned long)var
.base
);
7212 #ifdef CONFIG_X86_64
7214 *base3
= var
.base
>> 32;
7216 desc
->type
= var
.type
;
7218 desc
->dpl
= var
.dpl
;
7219 desc
->p
= var
.present
;
7220 desc
->avl
= var
.avl
;
7228 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
7229 struct desc_struct
*desc
, u32 base3
,
7232 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7233 struct kvm_segment var
;
7235 var
.selector
= selector
;
7236 var
.base
= get_desc_base(desc
);
7237 #ifdef CONFIG_X86_64
7238 var
.base
|= ((u64
)base3
) << 32;
7240 var
.limit
= get_desc_limit(desc
);
7242 var
.limit
= (var
.limit
<< 12) | 0xfff;
7243 var
.type
= desc
->type
;
7244 var
.dpl
= desc
->dpl
;
7249 var
.avl
= desc
->avl
;
7250 var
.present
= desc
->p
;
7251 var
.unusable
= !var
.present
;
7254 kvm_set_segment(vcpu
, &var
, seg
);
7258 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
7259 u32 msr_index
, u64
*pdata
)
7261 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7264 r
= kvm_get_msr(vcpu
, msr_index
, pdata
);
7266 if (r
&& kvm_get_msr_user_space(vcpu
, msr_index
, r
)) {
7267 /* Bounce to user space */
7268 return X86EMUL_IO_NEEDED
;
7274 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
7275 u32 msr_index
, u64 data
)
7277 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7280 r
= kvm_set_msr(vcpu
, msr_index
, data
);
7282 if (r
&& kvm_set_msr_user_space(vcpu
, msr_index
, data
, r
)) {
7283 /* Bounce to user space */
7284 return X86EMUL_IO_NEEDED
;
7290 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
7292 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7294 return vcpu
->arch
.smbase
;
7297 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
7299 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7301 vcpu
->arch
.smbase
= smbase
;
7304 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
7307 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
7310 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
7311 u32 pmc
, u64
*pdata
)
7313 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
7316 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
7318 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
7321 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
7322 struct x86_instruction_info
*info
,
7323 enum x86_intercept_stage stage
)
7325 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
7329 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
7330 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
7333 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
7336 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
7338 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
7341 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
7343 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
7346 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
7348 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
7351 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
7353 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
7356 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
7358 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
7361 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
7363 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
7366 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
7368 return emul_to_vcpu(ctxt
)->arch
.hflags
;
7371 static void emulator_exiting_smm(struct x86_emulate_ctxt
*ctxt
)
7373 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7375 kvm_smm_changed(vcpu
, false);
7378 static int emulator_leave_smm(struct x86_emulate_ctxt
*ctxt
,
7379 const char *smstate
)
7381 return static_call(kvm_x86_leave_smm
)(emul_to_vcpu(ctxt
), smstate
);
7384 static void emulator_triple_fault(struct x86_emulate_ctxt
*ctxt
)
7386 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, emul_to_vcpu(ctxt
));
7389 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
7391 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
7394 static const struct x86_emulate_ops emulate_ops
= {
7395 .read_gpr
= emulator_read_gpr
,
7396 .write_gpr
= emulator_write_gpr
,
7397 .read_std
= emulator_read_std
,
7398 .write_std
= emulator_write_std
,
7399 .read_phys
= kvm_read_guest_phys_system
,
7400 .fetch
= kvm_fetch_guest_virt
,
7401 .read_emulated
= emulator_read_emulated
,
7402 .write_emulated
= emulator_write_emulated
,
7403 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
7404 .invlpg
= emulator_invlpg
,
7405 .pio_in_emulated
= emulator_pio_in_emulated
,
7406 .pio_out_emulated
= emulator_pio_out_emulated
,
7407 .get_segment
= emulator_get_segment
,
7408 .set_segment
= emulator_set_segment
,
7409 .get_cached_segment_base
= emulator_get_cached_segment_base
,
7410 .get_gdt
= emulator_get_gdt
,
7411 .get_idt
= emulator_get_idt
,
7412 .set_gdt
= emulator_set_gdt
,
7413 .set_idt
= emulator_set_idt
,
7414 .get_cr
= emulator_get_cr
,
7415 .set_cr
= emulator_set_cr
,
7416 .cpl
= emulator_get_cpl
,
7417 .get_dr
= emulator_get_dr
,
7418 .set_dr
= emulator_set_dr
,
7419 .get_smbase
= emulator_get_smbase
,
7420 .set_smbase
= emulator_set_smbase
,
7421 .set_msr
= emulator_set_msr
,
7422 .get_msr
= emulator_get_msr
,
7423 .check_pmc
= emulator_check_pmc
,
7424 .read_pmc
= emulator_read_pmc
,
7425 .halt
= emulator_halt
,
7426 .wbinvd
= emulator_wbinvd
,
7427 .fix_hypercall
= emulator_fix_hypercall
,
7428 .intercept
= emulator_intercept
,
7429 .get_cpuid
= emulator_get_cpuid
,
7430 .guest_has_long_mode
= emulator_guest_has_long_mode
,
7431 .guest_has_movbe
= emulator_guest_has_movbe
,
7432 .guest_has_fxsr
= emulator_guest_has_fxsr
,
7433 .set_nmi_mask
= emulator_set_nmi_mask
,
7434 .get_hflags
= emulator_get_hflags
,
7435 .exiting_smm
= emulator_exiting_smm
,
7436 .leave_smm
= emulator_leave_smm
,
7437 .triple_fault
= emulator_triple_fault
,
7438 .set_xcr
= emulator_set_xcr
,
7441 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
7443 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
7445 * an sti; sti; sequence only disable interrupts for the first
7446 * instruction. So, if the last instruction, be it emulated or
7447 * not, left the system with the INT_STI flag enabled, it
7448 * means that the last instruction is an sti. We should not
7449 * leave the flag on in this case. The same goes for mov ss
7451 if (int_shadow
& mask
)
7453 if (unlikely(int_shadow
|| mask
)) {
7454 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
7456 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7460 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
7462 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7463 if (ctxt
->exception
.vector
== PF_VECTOR
)
7464 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
7466 if (ctxt
->exception
.error_code_valid
)
7467 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
7468 ctxt
->exception
.error_code
);
7470 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
7474 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7476 struct x86_emulate_ctxt
*ctxt
;
7478 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
7480 pr_err("kvm: failed to allocate vcpu's emulator\n");
7485 ctxt
->ops
= &emulate_ops
;
7486 vcpu
->arch
.emulate_ctxt
= ctxt
;
7491 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7493 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7496 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
7498 ctxt
->gpa_available
= false;
7499 ctxt
->eflags
= kvm_get_rflags(vcpu
);
7500 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
7502 ctxt
->eip
= kvm_rip_read(vcpu
);
7503 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
7504 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
7505 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
7506 cs_db
? X86EMUL_MODE_PROT32
:
7507 X86EMUL_MODE_PROT16
;
7508 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
7509 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
7510 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
7512 ctxt
->interruptibility
= 0;
7513 ctxt
->have_exception
= false;
7514 ctxt
->exception
.vector
= -1;
7515 ctxt
->perm_ok
= false;
7517 init_decode_cache(ctxt
);
7518 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7521 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
7523 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7526 init_emulate_ctxt(vcpu
);
7530 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
7531 ret
= emulate_int_real(ctxt
, irq
);
7533 if (ret
!= X86EMUL_CONTINUE
) {
7534 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
7536 ctxt
->eip
= ctxt
->_eip
;
7537 kvm_rip_write(vcpu
, ctxt
->eip
);
7538 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7541 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
7543 static void prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
)
7545 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7546 u32 insn_size
= ctxt
->fetch
.end
- ctxt
->fetch
.data
;
7547 struct kvm_run
*run
= vcpu
->run
;
7549 run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7550 run
->emulation_failure
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7551 run
->emulation_failure
.ndata
= 0;
7552 run
->emulation_failure
.flags
= 0;
7555 run
->emulation_failure
.ndata
= 3;
7556 run
->emulation_failure
.flags
|=
7557 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES
;
7558 run
->emulation_failure
.insn_size
= insn_size
;
7559 memset(run
->emulation_failure
.insn_bytes
, 0x90,
7560 sizeof(run
->emulation_failure
.insn_bytes
));
7561 memcpy(run
->emulation_failure
.insn_bytes
,
7562 ctxt
->fetch
.data
, insn_size
);
7566 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
7568 struct kvm
*kvm
= vcpu
->kvm
;
7570 ++vcpu
->stat
.insn_emulation_fail
;
7571 trace_kvm_emulate_insn_failed(vcpu
);
7573 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
7574 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7578 if (kvm
->arch
.exit_on_emulation_error
||
7579 (emulation_type
& EMULTYPE_SKIP
)) {
7580 prepare_emulation_failure_exit(vcpu
);
7584 kvm_queue_exception(vcpu
, UD_VECTOR
);
7586 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
7587 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7588 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7589 vcpu
->run
->internal
.ndata
= 0;
7596 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7597 bool write_fault_to_shadow_pgtable
,
7600 gpa_t gpa
= cr2_or_gpa
;
7603 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7606 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7607 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7610 if (!vcpu
->arch
.mmu
->direct_map
) {
7612 * Write permission should be allowed since only
7613 * write access need to be emulated.
7615 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7618 * If the mapping is invalid in guest, let cpu retry
7619 * it to generate fault.
7621 if (gpa
== UNMAPPED_GVA
)
7626 * Do not retry the unhandleable instruction if it faults on the
7627 * readonly host memory, otherwise it will goto a infinite loop:
7628 * retry instruction -> write #PF -> emulation fail -> retry
7629 * instruction -> ...
7631 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
7634 * If the instruction failed on the error pfn, it can not be fixed,
7635 * report the error to userspace.
7637 if (is_error_noslot_pfn(pfn
))
7640 kvm_release_pfn_clean(pfn
);
7642 /* The instructions are well-emulated on direct mmu. */
7643 if (vcpu
->arch
.mmu
->direct_map
) {
7644 unsigned int indirect_shadow_pages
;
7646 write_lock(&vcpu
->kvm
->mmu_lock
);
7647 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
7648 write_unlock(&vcpu
->kvm
->mmu_lock
);
7650 if (indirect_shadow_pages
)
7651 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7657 * if emulation was due to access to shadowed page table
7658 * and it failed try to unshadow page and re-enter the
7659 * guest to let CPU execute the instruction.
7661 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7664 * If the access faults on its page table, it can not
7665 * be fixed by unprotecting shadow page and it should
7666 * be reported to userspace.
7668 return !write_fault_to_shadow_pgtable
;
7671 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
7672 gpa_t cr2_or_gpa
, int emulation_type
)
7674 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7675 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
7677 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
7678 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
7681 * If the emulation is caused by #PF and it is non-page_table
7682 * writing instruction, it means the VM-EXIT is caused by shadow
7683 * page protected, we can zap the shadow page and retry this
7684 * instruction directly.
7686 * Note: if the guest uses a non-page-table modifying instruction
7687 * on the PDE that points to the instruction, then we will unmap
7688 * the instruction and go to an infinite loop. So, we cache the
7689 * last retried eip and the last fault address, if we meet the eip
7690 * and the address again, we can break out of the potential infinite
7693 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
7695 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7698 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7699 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7702 if (x86_page_table_writing_insn(ctxt
))
7705 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
7708 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
7709 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
7711 if (!vcpu
->arch
.mmu
->direct_map
)
7712 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7714 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7719 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
7720 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
7722 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
)
7724 trace_kvm_smm_transition(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, entering_smm
);
7727 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
7729 vcpu
->arch
.hflags
&= ~(HF_SMM_MASK
| HF_SMM_INSIDE_NMI_MASK
);
7731 /* Process a latched INIT or SMI, if any. */
7732 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7735 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7736 * on SMM exit we still need to reload them from
7739 vcpu
->arch
.pdptrs_from_userspace
= false;
7742 kvm_mmu_reset_context(vcpu
);
7745 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
7754 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
7755 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
7760 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
7762 struct kvm_run
*kvm_run
= vcpu
->run
;
7764 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
7765 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
7766 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
7767 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7768 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7771 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
7775 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
7777 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7780 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
7785 * rflags is the old, "raw" value of the flags. The new value has
7786 * not been saved yet.
7788 * This is correct even for TF set by the guest, because "the
7789 * processor will not generate this exception after the instruction
7790 * that sets the TF flag".
7792 if (unlikely(rflags
& X86_EFLAGS_TF
))
7793 r
= kvm_vcpu_do_singlestep(vcpu
);
7796 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
7798 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
7800 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
7801 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
7802 struct kvm_run
*kvm_run
= vcpu
->run
;
7803 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7804 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7805 vcpu
->arch
.guest_debug_dr7
,
7809 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
7810 kvm_run
->debug
.arch
.pc
= eip
;
7811 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7812 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7818 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
7819 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
7820 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7821 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7826 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
7835 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
7837 switch (ctxt
->opcode_len
) {
7844 case 0xe6: /* OUT */
7848 case 0x6c: /* INS */
7850 case 0x6e: /* OUTS */
7857 case 0x33: /* RDPMC */
7867 * Decode to be emulated instruction. Return EMULATION_OK if success.
7869 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
7870 void *insn
, int insn_len
)
7872 int r
= EMULATION_OK
;
7873 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7875 init_emulate_ctxt(vcpu
);
7878 * We will reenter on the same instruction since we do not set
7879 * complete_userspace_io. This does not handle watchpoints yet,
7880 * those would be handled in the emulate_ops.
7882 if (!(emulation_type
& EMULTYPE_SKIP
) &&
7883 kvm_vcpu_check_breakpoint(vcpu
, &r
))
7886 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
7888 trace_kvm_emulate_insn_start(vcpu
);
7889 ++vcpu
->stat
.insn_emulation
;
7893 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
7895 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7896 int emulation_type
, void *insn
, int insn_len
)
7899 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7900 bool writeback
= true;
7901 bool write_fault_to_spt
;
7903 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, insn
, insn_len
)))
7906 vcpu
->arch
.l1tf_flush_l1d
= true;
7909 * Clear write_fault_to_shadow_pgtable here to ensure it is
7912 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
7913 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
7915 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
7916 kvm_clear_exception_queue(vcpu
);
7918 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
7920 if (r
!= EMULATION_OK
) {
7921 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
7922 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
7923 kvm_queue_exception(vcpu
, UD_VECTOR
);
7926 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
7930 if (ctxt
->have_exception
) {
7932 * #UD should result in just EMULATION_FAILED, and trap-like
7933 * exception should not be encountered during decode.
7935 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
7936 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
7937 inject_emulated_exception(vcpu
);
7940 return handle_emulation_failure(vcpu
, emulation_type
);
7944 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
7945 !is_vmware_backdoor_opcode(ctxt
)) {
7946 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7951 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7952 * for kvm_skip_emulated_instruction(). The caller is responsible for
7953 * updating interruptibility state and injecting single-step #DBs.
7955 if (emulation_type
& EMULTYPE_SKIP
) {
7956 kvm_rip_write(vcpu
, ctxt
->_eip
);
7957 if (ctxt
->eflags
& X86_EFLAGS_RF
)
7958 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
7962 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
7965 /* this is needed for vmware backdoor interface to work since it
7966 changes registers values during IO operation */
7967 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
7968 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7969 emulator_invalidate_register_cache(ctxt
);
7973 if (emulation_type
& EMULTYPE_PF
) {
7974 /* Save the faulting GPA (cr2) in the address field */
7975 ctxt
->exception
.address
= cr2_or_gpa
;
7977 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7978 if (vcpu
->arch
.mmu
->direct_map
) {
7979 ctxt
->gpa_available
= true;
7980 ctxt
->gpa_val
= cr2_or_gpa
;
7983 /* Sanitize the address out of an abundance of paranoia. */
7984 ctxt
->exception
.address
= 0;
7987 r
= x86_emulate_insn(ctxt
);
7989 if (r
== EMULATION_INTERCEPTED
)
7992 if (r
== EMULATION_FAILED
) {
7993 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
7997 return handle_emulation_failure(vcpu
, emulation_type
);
8000 if (ctxt
->have_exception
) {
8002 if (inject_emulated_exception(vcpu
))
8004 } else if (vcpu
->arch
.pio
.count
) {
8005 if (!vcpu
->arch
.pio
.in
) {
8006 /* FIXME: return into emulator if single-stepping. */
8007 vcpu
->arch
.pio
.count
= 0;
8010 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
8013 } else if (vcpu
->mmio_needed
) {
8014 ++vcpu
->stat
.mmio_exits
;
8016 if (!vcpu
->mmio_is_write
)
8019 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
8020 } else if (r
== EMULATION_RESTART
)
8026 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8027 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
8028 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
8029 if (!ctxt
->have_exception
||
8030 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
8031 kvm_rip_write(vcpu
, ctxt
->eip
);
8032 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
8033 r
= kvm_vcpu_do_singlestep(vcpu
);
8034 if (kvm_x86_ops
.update_emulated_instruction
)
8035 static_call(kvm_x86_update_emulated_instruction
)(vcpu
);
8036 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
8040 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8041 * do nothing, and it will be requested again as soon as
8042 * the shadow expires. But we still need to check here,
8043 * because POPF has no interrupt shadow.
8045 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
8046 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8048 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
8053 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
8055 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
8057 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
8059 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
8060 void *insn
, int insn_len
)
8062 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
8064 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
8066 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
8068 vcpu
->arch
.pio
.count
= 0;
8072 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
8074 vcpu
->arch
.pio
.count
= 0;
8076 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
8079 return kvm_skip_emulated_instruction(vcpu
);
8082 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
8083 unsigned short port
)
8085 unsigned long val
= kvm_rax_read(vcpu
);
8086 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
8092 * Workaround userspace that relies on old KVM behavior of %rip being
8093 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8096 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
8097 vcpu
->arch
.complete_userspace_io
=
8098 complete_fast_pio_out_port_0x7e
;
8099 kvm_skip_emulated_instruction(vcpu
);
8101 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8102 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
8107 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
8111 /* We should only ever be called with arch.pio.count equal to 1 */
8112 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
8114 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
8115 vcpu
->arch
.pio
.count
= 0;
8119 /* For size less than 4 we merge, else we zero extend */
8120 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
8123 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8124 * the copy and tracing
8126 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
8127 kvm_rax_write(vcpu
, val
);
8129 return kvm_skip_emulated_instruction(vcpu
);
8132 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
8133 unsigned short port
)
8138 /* For size less than 4 we merge, else we zero extend */
8139 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
8141 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
8143 kvm_rax_write(vcpu
, val
);
8147 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8148 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
8153 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
8158 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
8160 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
8161 return ret
&& kvm_skip_emulated_instruction(vcpu
);
8163 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
8165 static int kvmclock_cpu_down_prep(unsigned int cpu
)
8167 __this_cpu_write(cpu_tsc_khz
, 0);
8171 static void tsc_khz_changed(void *data
)
8173 struct cpufreq_freqs
*freq
= data
;
8174 unsigned long khz
= 0;
8178 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8179 khz
= cpufreq_quick_get(raw_smp_processor_id());
8182 __this_cpu_write(cpu_tsc_khz
, khz
);
8185 #ifdef CONFIG_X86_64
8186 static void kvm_hyperv_tsc_notifier(void)
8189 struct kvm_vcpu
*vcpu
;
8191 unsigned long flags
;
8193 mutex_lock(&kvm_lock
);
8194 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8195 kvm_make_mclock_inprogress_request(kvm
);
8197 hyperv_stop_tsc_emulation();
8199 /* TSC frequency always matches when on Hyper-V */
8200 for_each_present_cpu(cpu
)
8201 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
8202 kvm_max_guest_tsc_khz
= tsc_khz
;
8204 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8205 struct kvm_arch
*ka
= &kvm
->arch
;
8207 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
8208 pvclock_update_vm_gtod_copy(kvm
);
8209 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
8211 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8212 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8214 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8215 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
8217 mutex_unlock(&kvm_lock
);
8221 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
8224 struct kvm_vcpu
*vcpu
;
8225 int i
, send_ipi
= 0;
8228 * We allow guests to temporarily run on slowing clocks,
8229 * provided we notify them after, or to run on accelerating
8230 * clocks, provided we notify them before. Thus time never
8233 * However, we have a problem. We can't atomically update
8234 * the frequency of a given CPU from this function; it is
8235 * merely a notifier, which can be called from any CPU.
8236 * Changing the TSC frequency at arbitrary points in time
8237 * requires a recomputation of local variables related to
8238 * the TSC for each VCPU. We must flag these local variables
8239 * to be updated and be sure the update takes place with the
8240 * new frequency before any guests proceed.
8242 * Unfortunately, the combination of hotplug CPU and frequency
8243 * change creates an intractable locking scenario; the order
8244 * of when these callouts happen is undefined with respect to
8245 * CPU hotplug, and they can race with each other. As such,
8246 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8247 * undefined; you can actually have a CPU frequency change take
8248 * place in between the computation of X and the setting of the
8249 * variable. To protect against this problem, all updates of
8250 * the per_cpu tsc_khz variable are done in an interrupt
8251 * protected IPI, and all callers wishing to update the value
8252 * must wait for a synchronous IPI to complete (which is trivial
8253 * if the caller is on the CPU already). This establishes the
8254 * necessary total order on variable updates.
8256 * Note that because a guest time update may take place
8257 * anytime after the setting of the VCPU's request bit, the
8258 * correct TSC value must be set before the request. However,
8259 * to ensure the update actually makes it to any guest which
8260 * starts running in hardware virtualization between the set
8261 * and the acquisition of the spinlock, we must also ping the
8262 * CPU after setting the request bit.
8266 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8268 mutex_lock(&kvm_lock
);
8269 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8270 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8271 if (vcpu
->cpu
!= cpu
)
8273 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8274 if (vcpu
->cpu
!= raw_smp_processor_id())
8278 mutex_unlock(&kvm_lock
);
8280 if (freq
->old
< freq
->new && send_ipi
) {
8282 * We upscale the frequency. Must make the guest
8283 * doesn't see old kvmclock values while running with
8284 * the new frequency, otherwise we risk the guest sees
8285 * time go backwards.
8287 * In case we update the frequency for another cpu
8288 * (which might be in guest context) send an interrupt
8289 * to kick the cpu out of guest context. Next time
8290 * guest context is entered kvmclock will be updated,
8291 * so the guest will not see stale values.
8293 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8297 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
8300 struct cpufreq_freqs
*freq
= data
;
8303 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
8305 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
8308 for_each_cpu(cpu
, freq
->policy
->cpus
)
8309 __kvmclock_cpufreq_notifier(freq
, cpu
);
8314 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
8315 .notifier_call
= kvmclock_cpufreq_notifier
8318 static int kvmclock_cpu_online(unsigned int cpu
)
8320 tsc_khz_changed(NULL
);
8324 static void kvm_timer_init(void)
8326 max_tsc_khz
= tsc_khz
;
8328 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
8329 #ifdef CONFIG_CPU_FREQ
8330 struct cpufreq_policy
*policy
;
8334 policy
= cpufreq_cpu_get(cpu
);
8336 if (policy
->cpuinfo
.max_freq
)
8337 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
8338 cpufreq_cpu_put(policy
);
8342 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
8343 CPUFREQ_TRANSITION_NOTIFIER
);
8346 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
8347 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
8350 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
8351 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
8353 int kvm_is_in_guest(void)
8355 return __this_cpu_read(current_vcpu
) != NULL
;
8358 static int kvm_is_user_mode(void)
8362 if (__this_cpu_read(current_vcpu
))
8363 user_mode
= static_call(kvm_x86_get_cpl
)(__this_cpu_read(current_vcpu
));
8365 return user_mode
!= 0;
8368 static unsigned long kvm_get_guest_ip(void)
8370 unsigned long ip
= 0;
8372 if (__this_cpu_read(current_vcpu
))
8373 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
8378 static void kvm_handle_intel_pt_intr(void)
8380 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
8382 kvm_make_request(KVM_REQ_PMI
, vcpu
);
8383 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
8384 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
8387 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
8388 .is_in_guest
= kvm_is_in_guest
,
8389 .is_user_mode
= kvm_is_user_mode
,
8390 .get_guest_ip
= kvm_get_guest_ip
,
8391 .handle_intel_pt_intr
= kvm_handle_intel_pt_intr
,
8394 #ifdef CONFIG_X86_64
8395 static void pvclock_gtod_update_fn(struct work_struct
*work
)
8399 struct kvm_vcpu
*vcpu
;
8402 mutex_lock(&kvm_lock
);
8403 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8404 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8405 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8406 atomic_set(&kvm_guest_has_master_clock
, 0);
8407 mutex_unlock(&kvm_lock
);
8410 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
8413 * Indirection to move queue_work() out of the tk_core.seq write held
8414 * region to prevent possible deadlocks against time accessors which
8415 * are invoked with work related locks held.
8417 static void pvclock_irq_work_fn(struct irq_work
*w
)
8419 queue_work(system_long_wq
, &pvclock_gtod_work
);
8422 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
8425 * Notification about pvclock gtod data update.
8427 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
8430 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
8431 struct timekeeper
*tk
= priv
;
8433 update_pvclock_gtod(tk
);
8436 * Disable master clock if host does not trust, or does not use,
8437 * TSC based clocksource. Delegate queue_work() to irq_work as
8438 * this is invoked with tk_core.seq write held.
8440 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
8441 atomic_read(&kvm_guest_has_master_clock
) != 0)
8442 irq_work_queue(&pvclock_irq_work
);
8446 static struct notifier_block pvclock_gtod_notifier
= {
8447 .notifier_call
= pvclock_gtod_notify
,
8451 int kvm_arch_init(void *opaque
)
8453 struct kvm_x86_init_ops
*ops
= opaque
;
8456 if (kvm_x86_ops
.hardware_enable
) {
8457 printk(KERN_ERR
"kvm: already loaded the other module\n");
8462 if (!ops
->cpu_has_kvm_support()) {
8463 pr_err_ratelimited("kvm: no hardware support\n");
8467 if (ops
->disabled_by_bios()) {
8468 pr_warn_ratelimited("kvm: disabled by bios\n");
8474 * KVM explicitly assumes that the guest has an FPU and
8475 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8476 * vCPU's FPU state as a fxregs_state struct.
8478 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
8479 printk(KERN_ERR
"kvm: inadequate fpu\n");
8485 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
8486 __alignof__(struct fpu
), SLAB_ACCOUNT
,
8488 if (!x86_fpu_cache
) {
8489 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
8493 x86_emulator_cache
= kvm_alloc_emulator_cache();
8494 if (!x86_emulator_cache
) {
8495 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8496 goto out_free_x86_fpu_cache
;
8499 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
8500 if (!user_return_msrs
) {
8501 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
8502 goto out_free_x86_emulator_cache
;
8504 kvm_nr_uret_msrs
= 0;
8506 r
= kvm_mmu_module_init();
8508 goto out_free_percpu
;
8512 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
8514 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
8515 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
8516 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
8519 if (pi_inject_timer
== -1)
8520 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
8521 #ifdef CONFIG_X86_64
8522 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
8524 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8525 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
8531 free_percpu(user_return_msrs
);
8532 out_free_x86_emulator_cache
:
8533 kmem_cache_destroy(x86_emulator_cache
);
8534 out_free_x86_fpu_cache
:
8535 kmem_cache_destroy(x86_fpu_cache
);
8540 void kvm_arch_exit(void)
8542 #ifdef CONFIG_X86_64
8543 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8544 clear_hv_tscchange_cb();
8547 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
8549 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8550 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
8551 CPUFREQ_TRANSITION_NOTIFIER
);
8552 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
8553 #ifdef CONFIG_X86_64
8554 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
8555 irq_work_sync(&pvclock_irq_work
);
8556 cancel_work_sync(&pvclock_gtod_work
);
8558 kvm_x86_ops
.hardware_enable
= NULL
;
8559 kvm_mmu_module_exit();
8560 free_percpu(user_return_msrs
);
8561 kmem_cache_destroy(x86_emulator_cache
);
8562 kmem_cache_destroy(x86_fpu_cache
);
8563 #ifdef CONFIG_KVM_XEN
8564 static_key_deferred_flush(&kvm_xen_enabled
);
8565 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
8569 static int __kvm_vcpu_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
8571 ++vcpu
->stat
.halt_exits
;
8572 if (lapic_in_kernel(vcpu
)) {
8573 vcpu
->arch
.mp_state
= state
;
8576 vcpu
->run
->exit_reason
= reason
;
8581 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
8583 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
8585 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
8587 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
8589 int ret
= kvm_skip_emulated_instruction(vcpu
);
8591 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8592 * KVM_EXIT_DEBUG here.
8594 return kvm_vcpu_halt(vcpu
) && ret
;
8596 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
8598 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
8600 int ret
= kvm_skip_emulated_instruction(vcpu
);
8602 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
, KVM_EXIT_AP_RESET_HOLD
) && ret
;
8604 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
8606 #ifdef CONFIG_X86_64
8607 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
8608 unsigned long clock_type
)
8610 struct kvm_clock_pairing clock_pairing
;
8611 struct timespec64 ts
;
8615 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
8616 return -KVM_EOPNOTSUPP
;
8618 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
8619 return -KVM_EOPNOTSUPP
;
8621 clock_pairing
.sec
= ts
.tv_sec
;
8622 clock_pairing
.nsec
= ts
.tv_nsec
;
8623 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
8624 clock_pairing
.flags
= 0;
8625 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
8628 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
8629 sizeof(struct kvm_clock_pairing
)))
8637 * kvm_pv_kick_cpu_op: Kick a vcpu.
8639 * @apicid - apicid of vcpu to be kicked.
8641 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
8643 struct kvm_lapic_irq lapic_irq
;
8645 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
8646 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
8647 lapic_irq
.level
= 0;
8648 lapic_irq
.dest_id
= apicid
;
8649 lapic_irq
.msi_redir_hint
= false;
8651 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
8652 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
8655 bool kvm_apicv_activated(struct kvm
*kvm
)
8657 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
8659 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
8661 static void kvm_apicv_init(struct kvm
*kvm
)
8663 mutex_init(&kvm
->arch
.apicv_update_lock
);
8666 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
8667 &kvm
->arch
.apicv_inhibit_reasons
);
8669 set_bit(APICV_INHIBIT_REASON_DISABLE
,
8670 &kvm
->arch
.apicv_inhibit_reasons
);
8673 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
8675 struct kvm_vcpu
*target
= NULL
;
8676 struct kvm_apic_map
*map
;
8678 vcpu
->stat
.directed_yield_attempted
++;
8680 if (single_task_running())
8684 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
8686 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
8687 target
= map
->phys_map
[dest_id
]->vcpu
;
8691 if (!target
|| !READ_ONCE(target
->ready
))
8694 /* Ignore requests to yield to self */
8698 if (kvm_vcpu_yield_to(target
) <= 0)
8701 vcpu
->stat
.directed_yield_successful
++;
8707 static int complete_hypercall_exit(struct kvm_vcpu
*vcpu
)
8709 u64 ret
= vcpu
->run
->hypercall
.ret
;
8711 if (!is_64_bit_mode(vcpu
))
8713 kvm_rax_write(vcpu
, ret
);
8714 ++vcpu
->stat
.hypercalls
;
8715 return kvm_skip_emulated_instruction(vcpu
);
8718 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
8720 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
8723 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
8724 return kvm_xen_hypercall(vcpu
);
8726 if (kvm_hv_hypercall_enabled(vcpu
))
8727 return kvm_hv_hypercall(vcpu
);
8729 nr
= kvm_rax_read(vcpu
);
8730 a0
= kvm_rbx_read(vcpu
);
8731 a1
= kvm_rcx_read(vcpu
);
8732 a2
= kvm_rdx_read(vcpu
);
8733 a3
= kvm_rsi_read(vcpu
);
8735 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
8737 op_64_bit
= is_64_bit_mode(vcpu
);
8746 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
8754 case KVM_HC_VAPIC_POLL_IRQ
:
8757 case KVM_HC_KICK_CPU
:
8758 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
8761 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
8762 kvm_sched_yield(vcpu
, a1
);
8765 #ifdef CONFIG_X86_64
8766 case KVM_HC_CLOCK_PAIRING
:
8767 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
8770 case KVM_HC_SEND_IPI
:
8771 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
8774 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
8776 case KVM_HC_SCHED_YIELD
:
8777 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
8780 kvm_sched_yield(vcpu
, a0
);
8783 case KVM_HC_MAP_GPA_RANGE
: {
8784 u64 gpa
= a0
, npages
= a1
, attrs
= a2
;
8787 if (!(vcpu
->kvm
->arch
.hypercall_exit_enabled
& (1 << KVM_HC_MAP_GPA_RANGE
)))
8790 if (!PAGE_ALIGNED(gpa
) || !npages
||
8791 gpa_to_gfn(gpa
) + npages
<= gpa_to_gfn(gpa
)) {
8796 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERCALL
;
8797 vcpu
->run
->hypercall
.nr
= KVM_HC_MAP_GPA_RANGE
;
8798 vcpu
->run
->hypercall
.args
[0] = gpa
;
8799 vcpu
->run
->hypercall
.args
[1] = npages
;
8800 vcpu
->run
->hypercall
.args
[2] = attrs
;
8801 vcpu
->run
->hypercall
.longmode
= op_64_bit
;
8802 vcpu
->arch
.complete_userspace_io
= complete_hypercall_exit
;
8812 kvm_rax_write(vcpu
, ret
);
8814 ++vcpu
->stat
.hypercalls
;
8815 return kvm_skip_emulated_instruction(vcpu
);
8817 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
8819 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
8821 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8822 char instruction
[3];
8823 unsigned long rip
= kvm_rip_read(vcpu
);
8825 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
8827 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
8831 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
8833 return vcpu
->run
->request_interrupt_window
&&
8834 likely(!pic_in_kernel(vcpu
->kvm
));
8837 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
8839 struct kvm_run
*kvm_run
= vcpu
->run
;
8842 * if_flag is obsolete and useless, so do not bother
8843 * setting it for SEV-ES guests. Userspace can just
8844 * use kvm_run->ready_for_interrupt_injection.
8846 kvm_run
->if_flag
= !vcpu
->arch
.guest_state_protected
8847 && (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
8849 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
8850 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
8853 * The call to kvm_ready_for_interrupt_injection() may end up in
8854 * kvm_xen_has_interrupt() which may require the srcu lock to be
8855 * held, to protect against changes in the vcpu_info address.
8857 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8858 kvm_run
->ready_for_interrupt_injection
=
8859 pic_in_kernel(vcpu
->kvm
) ||
8860 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
8861 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8864 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
8867 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
8871 if (!kvm_x86_ops
.update_cr8_intercept
)
8874 if (!lapic_in_kernel(vcpu
))
8877 if (vcpu
->arch
.apicv_active
)
8880 if (!vcpu
->arch
.apic
->vapic_addr
)
8881 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
8888 tpr
= kvm_lapic_get_cr8(vcpu
);
8890 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
8894 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
8896 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8897 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
8901 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
8904 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
8906 if (vcpu
->arch
.exception
.error_code
&& !is_protmode(vcpu
))
8907 vcpu
->arch
.exception
.error_code
= false;
8908 static_call(kvm_x86_queue_exception
)(vcpu
);
8911 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
8914 bool can_inject
= true;
8916 /* try to reinject previous events if any */
8918 if (vcpu
->arch
.exception
.injected
) {
8919 kvm_inject_exception(vcpu
);
8923 * Do not inject an NMI or interrupt if there is a pending
8924 * exception. Exceptions and interrupts are recognized at
8925 * instruction boundaries, i.e. the start of an instruction.
8926 * Trap-like exceptions, e.g. #DB, have higher priority than
8927 * NMIs and interrupts, i.e. traps are recognized before an
8928 * NMI/interrupt that's pending on the same instruction.
8929 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8930 * priority, but are only generated (pended) during instruction
8931 * execution, i.e. a pending fault-like exception means the
8932 * fault occurred on the *previous* instruction and must be
8933 * serviced prior to recognizing any new events in order to
8934 * fully complete the previous instruction.
8936 else if (!vcpu
->arch
.exception
.pending
) {
8937 if (vcpu
->arch
.nmi_injected
) {
8938 static_call(kvm_x86_set_nmi
)(vcpu
);
8940 } else if (vcpu
->arch
.interrupt
.injected
) {
8941 static_call(kvm_x86_set_irq
)(vcpu
);
8946 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
8947 vcpu
->arch
.exception
.pending
);
8950 * Call check_nested_events() even if we reinjected a previous event
8951 * in order for caller to determine if it should require immediate-exit
8952 * from L2 to L1 due to pending L1 events which require exit
8955 if (is_guest_mode(vcpu
)) {
8956 r
= kvm_check_nested_events(vcpu
);
8961 /* try to inject new event if pending */
8962 if (vcpu
->arch
.exception
.pending
) {
8963 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
8964 vcpu
->arch
.exception
.has_error_code
,
8965 vcpu
->arch
.exception
.error_code
);
8967 vcpu
->arch
.exception
.pending
= false;
8968 vcpu
->arch
.exception
.injected
= true;
8970 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
8971 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
8974 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
8975 kvm_deliver_exception_payload(vcpu
);
8976 if (vcpu
->arch
.dr7
& DR7_GD
) {
8977 vcpu
->arch
.dr7
&= ~DR7_GD
;
8978 kvm_update_dr7(vcpu
);
8982 kvm_inject_exception(vcpu
);
8986 /* Don't inject interrupts if the user asked to avoid doing so */
8987 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
)
8991 * Finally, inject interrupt events. If an event cannot be injected
8992 * due to architectural conditions (e.g. IF=0) a window-open exit
8993 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
8994 * and can architecturally be injected, but we cannot do it right now:
8995 * an interrupt could have arrived just now and we have to inject it
8996 * as a vmexit, or there could already an event in the queue, which is
8997 * indicated by can_inject. In that case we request an immediate exit
8998 * in order to make progress and get back here for another iteration.
8999 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9001 if (vcpu
->arch
.smi_pending
) {
9002 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
9006 vcpu
->arch
.smi_pending
= false;
9007 ++vcpu
->arch
.smi_count
;
9011 static_call(kvm_x86_enable_smi_window
)(vcpu
);
9014 if (vcpu
->arch
.nmi_pending
) {
9015 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
9019 --vcpu
->arch
.nmi_pending
;
9020 vcpu
->arch
.nmi_injected
= true;
9021 static_call(kvm_x86_set_nmi
)(vcpu
);
9023 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
9025 if (vcpu
->arch
.nmi_pending
)
9026 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
9029 if (kvm_cpu_has_injectable_intr(vcpu
)) {
9030 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
9034 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
9035 static_call(kvm_x86_set_irq
)(vcpu
);
9036 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
9038 if (kvm_cpu_has_injectable_intr(vcpu
))
9039 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9042 if (is_guest_mode(vcpu
) &&
9043 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
9044 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
9045 *req_immediate_exit
= true;
9047 WARN_ON(vcpu
->arch
.exception
.pending
);
9052 *req_immediate_exit
= true;
9058 static void process_nmi(struct kvm_vcpu
*vcpu
)
9063 * x86 is limited to one NMI running, and one NMI pending after it.
9064 * If an NMI is already in progress, limit further NMIs to just one.
9065 * Otherwise, allow two (and we'll inject the first one immediately).
9067 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
9070 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
9071 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
9072 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9075 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
9078 flags
|= seg
->g
<< 23;
9079 flags
|= seg
->db
<< 22;
9080 flags
|= seg
->l
<< 21;
9081 flags
|= seg
->avl
<< 20;
9082 flags
|= seg
->present
<< 15;
9083 flags
|= seg
->dpl
<< 13;
9084 flags
|= seg
->s
<< 12;
9085 flags
|= seg
->type
<< 8;
9089 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9091 struct kvm_segment seg
;
9094 kvm_get_segment(vcpu
, &seg
, n
);
9095 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
9098 offset
= 0x7f84 + n
* 12;
9100 offset
= 0x7f2c + (n
- 3) * 12;
9102 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
9103 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9104 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
9107 #ifdef CONFIG_X86_64
9108 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9110 struct kvm_segment seg
;
9114 kvm_get_segment(vcpu
, &seg
, n
);
9115 offset
= 0x7e00 + n
* 16;
9117 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
9118 put_smstate(u16
, buf
, offset
, seg
.selector
);
9119 put_smstate(u16
, buf
, offset
+ 2, flags
);
9120 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9121 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
9125 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
9128 struct kvm_segment seg
;
9132 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
9133 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
9134 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
9135 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
9137 for (i
= 0; i
< 8; i
++)
9138 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read_raw(vcpu
, i
));
9140 kvm_get_dr(vcpu
, 6, &val
);
9141 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
9142 kvm_get_dr(vcpu
, 7, &val
);
9143 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
9145 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9146 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
9147 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
9148 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
9149 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
9151 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9152 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
9153 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
9154 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
9155 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
9157 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9158 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
9159 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
9161 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9162 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
9163 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
9165 for (i
= 0; i
< 6; i
++)
9166 enter_smm_save_seg_32(vcpu
, buf
, i
);
9168 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
9171 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
9172 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
9175 #ifdef CONFIG_X86_64
9176 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
9179 struct kvm_segment seg
;
9183 for (i
= 0; i
< 16; i
++)
9184 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read_raw(vcpu
, i
));
9186 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
9187 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
9189 kvm_get_dr(vcpu
, 6, &val
);
9190 put_smstate(u64
, buf
, 0x7f68, val
);
9191 kvm_get_dr(vcpu
, 7, &val
);
9192 put_smstate(u64
, buf
, 0x7f60, val
);
9194 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
9195 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
9196 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
9198 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
9201 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
9203 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
9205 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9206 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
9207 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
9208 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
9209 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
9211 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9212 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
9213 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
9215 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9216 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
9217 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
9218 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
9219 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
9221 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9222 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
9223 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
9225 for (i
= 0; i
< 6; i
++)
9226 enter_smm_save_seg_64(vcpu
, buf
, i
);
9230 static void enter_smm(struct kvm_vcpu
*vcpu
)
9232 struct kvm_segment cs
, ds
;
9237 memset(buf
, 0, 512);
9238 #ifdef CONFIG_X86_64
9239 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9240 enter_smm_save_state_64(vcpu
, buf
);
9243 enter_smm_save_state_32(vcpu
, buf
);
9246 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9247 * state (e.g. leave guest mode) after we've saved the state into the
9248 * SMM state-save area.
9250 static_call(kvm_x86_enter_smm
)(vcpu
, buf
);
9252 kvm_smm_changed(vcpu
, true);
9253 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
9255 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
))
9256 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
9258 static_call(kvm_x86_set_nmi_mask
)(vcpu
, true);
9260 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
9261 kvm_rip_write(vcpu
, 0x8000);
9263 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
9264 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
9265 vcpu
->arch
.cr0
= cr0
;
9267 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
9269 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9270 dt
.address
= dt
.size
= 0;
9271 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
9273 kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
9275 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
9276 cs
.base
= vcpu
->arch
.smbase
;
9281 cs
.limit
= ds
.limit
= 0xffffffff;
9282 cs
.type
= ds
.type
= 0x3;
9283 cs
.dpl
= ds
.dpl
= 0;
9288 cs
.avl
= ds
.avl
= 0;
9289 cs
.present
= ds
.present
= 1;
9290 cs
.unusable
= ds
.unusable
= 0;
9291 cs
.padding
= ds
.padding
= 0;
9293 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9294 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
9295 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
9296 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
9297 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
9298 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
9300 #ifdef CONFIG_X86_64
9301 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9302 static_call(kvm_x86_set_efer
)(vcpu
, 0);
9305 kvm_update_cpuid_runtime(vcpu
);
9306 kvm_mmu_reset_context(vcpu
);
9309 static void process_smi(struct kvm_vcpu
*vcpu
)
9311 vcpu
->arch
.smi_pending
= true;
9312 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9315 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
9316 unsigned long *vcpu_bitmap
)
9320 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
9322 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
9323 NULL
, vcpu_bitmap
, cpus
);
9325 free_cpumask_var(cpus
);
9328 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
9330 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
9333 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
9337 if (!lapic_in_kernel(vcpu
))
9340 mutex_lock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9342 activate
= kvm_apicv_activated(vcpu
->kvm
);
9343 if (vcpu
->arch
.apicv_active
== activate
)
9346 vcpu
->arch
.apicv_active
= activate
;
9347 kvm_apic_update_apicv(vcpu
);
9348 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
9351 * When APICv gets disabled, we may still have injected interrupts
9352 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9353 * still active when the interrupt got accepted. Make sure
9354 * inject_pending_event() is called to check for that.
9356 if (!vcpu
->arch
.apicv_active
)
9357 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9360 mutex_unlock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9362 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
9364 void __kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9366 unsigned long old
, new;
9368 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
9369 !static_call(kvm_x86_check_apicv_inhibit_reasons
)(bit
))
9372 old
= new = kvm
->arch
.apicv_inhibit_reasons
;
9375 __clear_bit(bit
, &new);
9377 __set_bit(bit
, &new);
9379 if (!!old
!= !!new) {
9380 trace_kvm_apicv_update_request(activate
, bit
);
9381 kvm_make_all_cpus_request(kvm
, KVM_REQ_APICV_UPDATE
);
9382 kvm
->arch
.apicv_inhibit_reasons
= new;
9384 unsigned long gfn
= gpa_to_gfn(APIC_DEFAULT_PHYS_BASE
);
9385 kvm_zap_gfn_range(kvm
, gfn
, gfn
+1);
9388 kvm
->arch
.apicv_inhibit_reasons
= new;
9390 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update
);
9392 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9394 mutex_lock(&kvm
->arch
.apicv_update_lock
);
9395 __kvm_request_apicv_update(kvm
, activate
, bit
);
9396 mutex_unlock(&kvm
->arch
.apicv_update_lock
);
9398 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
9400 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
9402 if (!kvm_apic_present(vcpu
))
9405 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
9407 if (irqchip_split(vcpu
->kvm
))
9408 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9410 if (vcpu
->arch
.apicv_active
)
9411 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
9412 if (ioapic_in_kernel(vcpu
->kvm
))
9413 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9416 if (is_guest_mode(vcpu
))
9417 vcpu
->arch
.load_eoi_exitmap_pending
= true;
9419 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
9422 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
9424 u64 eoi_exit_bitmap
[4];
9426 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
9429 if (to_hv_vcpu(vcpu
))
9430 bitmap_or((ulong
*)eoi_exit_bitmap
,
9431 vcpu
->arch
.ioapic_handled_vectors
,
9432 to_hv_synic(vcpu
)->vec_bitmap
, 256);
9434 static_call(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
9437 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
9438 unsigned long start
, unsigned long end
)
9440 unsigned long apic_address
;
9443 * The physical address of apic access page is stored in the VMCS.
9444 * Update it when it becomes invalid.
9446 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
9447 if (start
<= apic_address
&& apic_address
< end
)
9448 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
9451 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
9453 if (!lapic_in_kernel(vcpu
))
9456 if (!kvm_x86_ops
.set_apic_access_page_addr
)
9459 static_call(kvm_x86_set_apic_access_page_addr
)(vcpu
);
9462 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
9464 smp_send_reschedule(vcpu
->cpu
);
9466 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
9469 * Returns 1 to let vcpu_run() continue the guest execution loop without
9470 * exiting to the userspace. Otherwise, the value will be returned to the
9473 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
9477 dm_request_for_irq_injection(vcpu
) &&
9478 kvm_cpu_accept_dm_intr(vcpu
);
9479 fastpath_t exit_fastpath
;
9481 bool req_immediate_exit
= false;
9483 /* Forbid vmenter if vcpu dirty ring is soft-full */
9484 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
9485 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
9486 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
9487 trace_kvm_dirty_ring_exit(vcpu
);
9492 if (kvm_request_pending(vcpu
)) {
9493 if (kvm_check_request(KVM_REQ_VM_BUGGED
, vcpu
)) {
9497 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
9498 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
9503 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
9504 kvm_mmu_unload(vcpu
);
9505 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
9506 __kvm_migrate_timers(vcpu
);
9507 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
9508 kvm_gen_update_masterclock(vcpu
->kvm
);
9509 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
9510 kvm_gen_kvmclock_update(vcpu
);
9511 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
9512 r
= kvm_guest_time_update(vcpu
);
9516 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
9517 kvm_mmu_sync_roots(vcpu
);
9518 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
9519 kvm_mmu_load_pgd(vcpu
);
9520 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
9521 kvm_vcpu_flush_tlb_all(vcpu
);
9523 /* Flushing all ASIDs flushes the current ASID... */
9524 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
9526 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
9527 kvm_vcpu_flush_tlb_current(vcpu
);
9528 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
9529 kvm_vcpu_flush_tlb_guest(vcpu
);
9531 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
9532 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
9536 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
9537 if (is_guest_mode(vcpu
)) {
9538 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
9540 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
9541 vcpu
->mmio_needed
= 0;
9546 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
9547 /* Page is swapped out. Do synthetic halt */
9548 vcpu
->arch
.apf
.halted
= true;
9552 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
9553 record_steal_time(vcpu
);
9554 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
9556 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
9558 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
9559 kvm_pmu_handle_event(vcpu
);
9560 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
9561 kvm_pmu_deliver_pmi(vcpu
);
9562 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
9563 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
9564 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
9565 vcpu
->arch
.ioapic_handled_vectors
)) {
9566 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
9567 vcpu
->run
->eoi
.vector
=
9568 vcpu
->arch
.pending_ioapic_eoi
;
9573 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
9574 vcpu_scan_ioapic(vcpu
);
9575 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
9576 vcpu_load_eoi_exitmap(vcpu
);
9577 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
9578 kvm_vcpu_reload_apic_access_page(vcpu
);
9579 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
9580 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9581 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
9585 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
9586 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9587 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
9591 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
9592 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
9594 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
9595 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
9601 * KVM_REQ_HV_STIMER has to be processed after
9602 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9603 * depend on the guest clock being up-to-date
9605 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
9606 kvm_hv_process_stimers(vcpu
);
9607 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
9608 kvm_vcpu_update_apicv(vcpu
);
9609 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
9610 kvm_check_async_pf_completion(vcpu
);
9611 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
9612 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
9614 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
9615 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
9618 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
9619 kvm_xen_has_interrupt(vcpu
)) {
9620 ++vcpu
->stat
.req_event
;
9621 r
= kvm_apic_accept_events(vcpu
);
9626 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
9631 r
= inject_pending_event(vcpu
, &req_immediate_exit
);
9637 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9639 if (kvm_lapic_enabled(vcpu
)) {
9640 update_cr8_intercept(vcpu
);
9641 kvm_lapic_sync_to_vapic(vcpu
);
9645 r
= kvm_mmu_reload(vcpu
);
9647 goto cancel_injection
;
9652 static_call(kvm_x86_prepare_guest_switch
)(vcpu
);
9655 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9656 * IPI are then delayed after guest entry, which ensures that they
9657 * result in virtual interrupt delivery.
9659 local_irq_disable();
9660 vcpu
->mode
= IN_GUEST_MODE
;
9662 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9665 * 1) We should set ->mode before checking ->requests. Please see
9666 * the comment in kvm_vcpu_exiting_guest_mode().
9668 * 2) For APICv, we should set ->mode before checking PID.ON. This
9669 * pairs with the memory barrier implicit in pi_test_and_set_on
9670 * (see vmx_deliver_posted_interrupt).
9672 * 3) This also orders the write to mode from any reads to the page
9673 * tables done while the VCPU is running. Please see the comment
9674 * in kvm_flush_remote_tlbs.
9676 smp_mb__after_srcu_read_unlock();
9679 * This handles the case where a posted interrupt was
9680 * notified with kvm_vcpu_kick.
9682 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
9683 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
9685 if (kvm_vcpu_exit_request(vcpu
)) {
9686 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9690 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9692 goto cancel_injection
;
9695 if (req_immediate_exit
) {
9696 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9697 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
9700 fpregs_assert_state_consistent();
9701 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9702 switch_fpu_return();
9704 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
9706 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
9707 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
9708 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
9709 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
9710 } else if (unlikely(hw_breakpoint_active())) {
9715 exit_fastpath
= static_call(kvm_x86_run
)(vcpu
);
9716 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
9719 if (vcpu
->arch
.apicv_active
)
9720 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
9722 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
9723 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
9729 * Do this here before restoring debug registers on the host. And
9730 * since we do this before handling the vmexit, a DR access vmexit
9731 * can (a) read the correct value of the debug registers, (b) set
9732 * KVM_DEBUGREG_WONT_EXIT again.
9734 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
9735 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
9736 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
9737 kvm_update_dr0123(vcpu
);
9738 kvm_update_dr7(vcpu
);
9742 * If the guest has used debug registers, at least dr7
9743 * will be disabled while returning to the host.
9744 * If we don't have active breakpoints in the host, we don't
9745 * care about the messed up debug address registers. But if
9746 * we have some of them active, restore the old state.
9748 if (hw_breakpoint_active())
9749 hw_breakpoint_restore();
9751 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
9752 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
9754 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9757 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
9760 * Consume any pending interrupts, including the possible source of
9761 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9762 * An instruction is required after local_irq_enable() to fully unblock
9763 * interrupts on processors that implement an interrupt shadow, the
9764 * stat.exits increment will do nicely.
9766 kvm_before_interrupt(vcpu
);
9769 local_irq_disable();
9770 kvm_after_interrupt(vcpu
);
9773 * Wait until after servicing IRQs to account guest time so that any
9774 * ticks that occurred while running the guest are properly accounted
9775 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9776 * of accounting via context tracking, but the loss of accuracy is
9777 * acceptable for all known use cases.
9779 vtime_account_guest_exit();
9781 if (lapic_in_kernel(vcpu
)) {
9782 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
9783 if (delta
!= S64_MIN
) {
9784 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
9785 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
9792 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9795 * Profile KVM exit RIPs:
9797 if (unlikely(prof_on
== KVM_PROFILING
)) {
9798 unsigned long rip
= kvm_rip_read(vcpu
);
9799 profile_hit(KVM_PROFILING
, (void *)rip
);
9802 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
9803 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9805 if (vcpu
->arch
.apic_attention
)
9806 kvm_lapic_sync_from_vapic(vcpu
);
9808 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
9812 if (req_immediate_exit
)
9813 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9814 static_call(kvm_x86_cancel_injection
)(vcpu
);
9815 if (unlikely(vcpu
->arch
.apic_attention
))
9816 kvm_lapic_sync_from_vapic(vcpu
);
9821 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
9823 if (!kvm_arch_vcpu_runnable(vcpu
) &&
9824 (!kvm_x86_ops
.pre_block
|| static_call(kvm_x86_pre_block
)(vcpu
) == 0)) {
9825 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9826 kvm_vcpu_block(vcpu
);
9827 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9829 if (kvm_x86_ops
.post_block
)
9830 static_call(kvm_x86_post_block
)(vcpu
);
9832 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
9836 if (kvm_apic_accept_events(vcpu
) < 0)
9838 switch(vcpu
->arch
.mp_state
) {
9839 case KVM_MP_STATE_HALTED
:
9840 case KVM_MP_STATE_AP_RESET_HOLD
:
9841 vcpu
->arch
.pv
.pv_unhalted
= false;
9842 vcpu
->arch
.mp_state
=
9843 KVM_MP_STATE_RUNNABLE
;
9845 case KVM_MP_STATE_RUNNABLE
:
9846 vcpu
->arch
.apf
.halted
= false;
9848 case KVM_MP_STATE_INIT_RECEIVED
:
9856 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
9858 if (is_guest_mode(vcpu
))
9859 kvm_check_nested_events(vcpu
);
9861 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
9862 !vcpu
->arch
.apf
.halted
);
9865 static int vcpu_run(struct kvm_vcpu
*vcpu
)
9868 struct kvm
*kvm
= vcpu
->kvm
;
9870 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9871 vcpu
->arch
.l1tf_flush_l1d
= true;
9874 if (kvm_vcpu_running(vcpu
)) {
9875 r
= vcpu_enter_guest(vcpu
);
9877 r
= vcpu_block(kvm
, vcpu
);
9883 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
9884 if (kvm_cpu_has_pending_timer(vcpu
))
9885 kvm_inject_pending_timer_irqs(vcpu
);
9887 if (dm_request_for_irq_injection(vcpu
) &&
9888 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
9890 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
9891 ++vcpu
->stat
.request_irq_exits
;
9895 if (__xfer_to_guest_mode_work_pending()) {
9896 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9897 r
= xfer_to_guest_mode_handle_work(vcpu
);
9900 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9904 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9909 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
9913 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9914 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
9915 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9919 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
9921 BUG_ON(!vcpu
->arch
.pio
.count
);
9923 return complete_emulated_io(vcpu
);
9927 * Implements the following, as a state machine:
9931 * for each mmio piece in the fragment
9939 * for each mmio piece in the fragment
9944 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
9946 struct kvm_run
*run
= vcpu
->run
;
9947 struct kvm_mmio_fragment
*frag
;
9950 BUG_ON(!vcpu
->mmio_needed
);
9952 /* Complete previous fragment */
9953 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
9954 len
= min(8u, frag
->len
);
9955 if (!vcpu
->mmio_is_write
)
9956 memcpy(frag
->data
, run
->mmio
.data
, len
);
9958 if (frag
->len
<= 8) {
9959 /* Switch to the next fragment. */
9961 vcpu
->mmio_cur_fragment
++;
9963 /* Go forward to the next mmio piece. */
9969 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
9970 vcpu
->mmio_needed
= 0;
9972 /* FIXME: return into emulator if single-stepping. */
9973 if (vcpu
->mmio_is_write
)
9975 vcpu
->mmio_read_completed
= 1;
9976 return complete_emulated_io(vcpu
);
9979 run
->exit_reason
= KVM_EXIT_MMIO
;
9980 run
->mmio
.phys_addr
= frag
->gpa
;
9981 if (vcpu
->mmio_is_write
)
9982 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
9983 run
->mmio
.len
= min(8u, frag
->len
);
9984 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
9985 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
9989 static void kvm_save_current_fpu(struct fpu
*fpu
)
9992 * If the target FPU state is not resident in the CPU registers, just
9993 * memcpy() from current, else save CPU state directly to the target.
9995 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9996 memcpy(&fpu
->state
, ¤t
->thread
.fpu
.state
,
9997 fpu_kernel_xstate_size
);
9999 save_fpregs_to_fpstate(fpu
);
10002 /* Swap (qemu) user FPU context for the guest FPU context. */
10003 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
10007 kvm_save_current_fpu(vcpu
->arch
.user_fpu
);
10010 * Guests with protected state can't have it set by the hypervisor,
10011 * so skip trying to set it.
10013 if (vcpu
->arch
.guest_fpu
)
10014 /* PKRU is separately restored in kvm_x86_ops.run. */
10015 __restore_fpregs_from_fpstate(&vcpu
->arch
.guest_fpu
->state
,
10016 ~XFEATURE_MASK_PKRU
);
10018 fpregs_mark_activate();
10024 /* When vcpu_run ends, restore user space FPU context. */
10025 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
10030 * Guests with protected state can't have it read by the hypervisor,
10031 * so skip trying to save it.
10033 if (vcpu
->arch
.guest_fpu
)
10034 kvm_save_current_fpu(vcpu
->arch
.guest_fpu
);
10036 restore_fpregs_from_fpstate(&vcpu
->arch
.user_fpu
->state
);
10038 fpregs_mark_activate();
10041 ++vcpu
->stat
.fpu_reload
;
10045 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
10047 struct kvm_run
*kvm_run
= vcpu
->run
;
10051 kvm_sigset_activate(vcpu
);
10052 kvm_run
->flags
= 0;
10053 kvm_load_guest_fpu(vcpu
);
10055 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
10056 if (kvm_run
->immediate_exit
) {
10060 kvm_vcpu_block(vcpu
);
10061 if (kvm_apic_accept_events(vcpu
) < 0) {
10065 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
10067 if (signal_pending(current
)) {
10069 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
10070 ++vcpu
->stat
.signal_exits
;
10075 if ((kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) ||
10076 (kvm_run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)) {
10081 if (kvm_run
->kvm_dirty_regs
) {
10082 r
= sync_regs(vcpu
);
10087 /* re-sync apic's tpr */
10088 if (!lapic_in_kernel(vcpu
)) {
10089 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
10095 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
10096 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
10097 vcpu
->arch
.complete_userspace_io
= NULL
;
10102 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
10104 if (kvm_run
->immediate_exit
)
10107 r
= vcpu_run(vcpu
);
10110 kvm_put_guest_fpu(vcpu
);
10111 if (kvm_run
->kvm_valid_regs
)
10113 post_kvm_run_save(vcpu
);
10114 kvm_sigset_deactivate(vcpu
);
10120 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10122 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
10124 * We are here if userspace calls get_regs() in the middle of
10125 * instruction emulation. Registers state needs to be copied
10126 * back from emulation context to vcpu. Userspace shouldn't do
10127 * that usually, but some bad designed PV devices (vmware
10128 * backdoor interface) need this to work
10130 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
10131 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10133 regs
->rax
= kvm_rax_read(vcpu
);
10134 regs
->rbx
= kvm_rbx_read(vcpu
);
10135 regs
->rcx
= kvm_rcx_read(vcpu
);
10136 regs
->rdx
= kvm_rdx_read(vcpu
);
10137 regs
->rsi
= kvm_rsi_read(vcpu
);
10138 regs
->rdi
= kvm_rdi_read(vcpu
);
10139 regs
->rsp
= kvm_rsp_read(vcpu
);
10140 regs
->rbp
= kvm_rbp_read(vcpu
);
10141 #ifdef CONFIG_X86_64
10142 regs
->r8
= kvm_r8_read(vcpu
);
10143 regs
->r9
= kvm_r9_read(vcpu
);
10144 regs
->r10
= kvm_r10_read(vcpu
);
10145 regs
->r11
= kvm_r11_read(vcpu
);
10146 regs
->r12
= kvm_r12_read(vcpu
);
10147 regs
->r13
= kvm_r13_read(vcpu
);
10148 regs
->r14
= kvm_r14_read(vcpu
);
10149 regs
->r15
= kvm_r15_read(vcpu
);
10152 regs
->rip
= kvm_rip_read(vcpu
);
10153 regs
->rflags
= kvm_get_rflags(vcpu
);
10156 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10159 __get_regs(vcpu
, regs
);
10164 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10166 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
10167 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10169 kvm_rax_write(vcpu
, regs
->rax
);
10170 kvm_rbx_write(vcpu
, regs
->rbx
);
10171 kvm_rcx_write(vcpu
, regs
->rcx
);
10172 kvm_rdx_write(vcpu
, regs
->rdx
);
10173 kvm_rsi_write(vcpu
, regs
->rsi
);
10174 kvm_rdi_write(vcpu
, regs
->rdi
);
10175 kvm_rsp_write(vcpu
, regs
->rsp
);
10176 kvm_rbp_write(vcpu
, regs
->rbp
);
10177 #ifdef CONFIG_X86_64
10178 kvm_r8_write(vcpu
, regs
->r8
);
10179 kvm_r9_write(vcpu
, regs
->r9
);
10180 kvm_r10_write(vcpu
, regs
->r10
);
10181 kvm_r11_write(vcpu
, regs
->r11
);
10182 kvm_r12_write(vcpu
, regs
->r12
);
10183 kvm_r13_write(vcpu
, regs
->r13
);
10184 kvm_r14_write(vcpu
, regs
->r14
);
10185 kvm_r15_write(vcpu
, regs
->r15
);
10188 kvm_rip_write(vcpu
, regs
->rip
);
10189 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
10191 vcpu
->arch
.exception
.pending
= false;
10193 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10196 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10199 __set_regs(vcpu
, regs
);
10204 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
10206 struct kvm_segment cs
;
10208 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10212 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
10214 static void __get_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10216 struct desc_ptr dt
;
10218 if (vcpu
->arch
.guest_state_protected
)
10219 goto skip_protected_regs
;
10221 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10222 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10223 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10224 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10225 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10226 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10228 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10229 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10231 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
10232 sregs
->idt
.limit
= dt
.size
;
10233 sregs
->idt
.base
= dt
.address
;
10234 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
10235 sregs
->gdt
.limit
= dt
.size
;
10236 sregs
->gdt
.base
= dt
.address
;
10238 sregs
->cr2
= vcpu
->arch
.cr2
;
10239 sregs
->cr3
= kvm_read_cr3(vcpu
);
10241 skip_protected_regs
:
10242 sregs
->cr0
= kvm_read_cr0(vcpu
);
10243 sregs
->cr4
= kvm_read_cr4(vcpu
);
10244 sregs
->cr8
= kvm_get_cr8(vcpu
);
10245 sregs
->efer
= vcpu
->arch
.efer
;
10246 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
10249 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10251 __get_sregs_common(vcpu
, sregs
);
10253 if (vcpu
->arch
.guest_state_protected
)
10256 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
10257 set_bit(vcpu
->arch
.interrupt
.nr
,
10258 (unsigned long *)sregs
->interrupt_bitmap
);
10261 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10265 __get_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
);
10267 if (vcpu
->arch
.guest_state_protected
)
10270 if (is_pae_paging(vcpu
)) {
10271 for (i
= 0 ; i
< 4 ; i
++)
10272 sregs2
->pdptrs
[i
] = kvm_pdptr_read(vcpu
, i
);
10273 sregs2
->flags
|= KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10277 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
10278 struct kvm_sregs
*sregs
)
10281 __get_sregs(vcpu
, sregs
);
10286 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
10287 struct kvm_mp_state
*mp_state
)
10292 if (kvm_mpx_supported())
10293 kvm_load_guest_fpu(vcpu
);
10295 r
= kvm_apic_accept_events(vcpu
);
10300 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
10301 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
10302 vcpu
->arch
.pv
.pv_unhalted
)
10303 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
10305 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
10308 if (kvm_mpx_supported())
10309 kvm_put_guest_fpu(vcpu
);
10314 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
10315 struct kvm_mp_state
*mp_state
)
10321 if (!lapic_in_kernel(vcpu
) &&
10322 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
10326 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10327 * INIT state; latched init should be reported using
10328 * KVM_SET_VCPU_EVENTS, so reject it here.
10330 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
10331 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
10332 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
10335 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
10336 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
10337 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
10339 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
10340 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10348 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
10349 int reason
, bool has_error_code
, u32 error_code
)
10351 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
10354 init_emulate_ctxt(vcpu
);
10356 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
10357 has_error_code
, error_code
);
10359 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
10360 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
10361 vcpu
->run
->internal
.ndata
= 0;
10365 kvm_rip_write(vcpu
, ctxt
->eip
);
10366 kvm_set_rflags(vcpu
, ctxt
->eflags
);
10369 EXPORT_SYMBOL_GPL(kvm_task_switch
);
10371 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10373 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
10375 * When EFER.LME and CR0.PG are set, the processor is in
10376 * 64-bit mode (though maybe in a 32-bit code segment).
10377 * CR4.PAE and EFER.LMA must be set.
10379 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
10381 if (kvm_vcpu_is_illegal_gpa(vcpu
, sregs
->cr3
))
10385 * Not in 64-bit mode: EFER.LMA is clear and the code
10386 * segment cannot be 64-bit.
10388 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
10392 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
10395 static int __set_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
,
10396 int *mmu_reset_needed
, bool update_pdptrs
)
10398 struct msr_data apic_base_msr
;
10400 struct desc_ptr dt
;
10402 if (!kvm_is_valid_sregs(vcpu
, sregs
))
10405 apic_base_msr
.data
= sregs
->apic_base
;
10406 apic_base_msr
.host_initiated
= true;
10407 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
10410 if (vcpu
->arch
.guest_state_protected
)
10413 dt
.size
= sregs
->idt
.limit
;
10414 dt
.address
= sregs
->idt
.base
;
10415 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
10416 dt
.size
= sregs
->gdt
.limit
;
10417 dt
.address
= sregs
->gdt
.base
;
10418 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
10420 vcpu
->arch
.cr2
= sregs
->cr2
;
10421 *mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
10422 vcpu
->arch
.cr3
= sregs
->cr3
;
10423 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
10425 kvm_set_cr8(vcpu
, sregs
->cr8
);
10427 *mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
10428 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
10430 *mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
10431 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
10432 vcpu
->arch
.cr0
= sregs
->cr0
;
10434 *mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
10435 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
10437 if (update_pdptrs
) {
10438 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10439 if (is_pae_paging(vcpu
)) {
10440 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
10441 *mmu_reset_needed
= 1;
10443 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10446 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10447 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10448 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10449 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10450 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10451 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10453 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10454 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10456 update_cr8_intercept(vcpu
);
10458 /* Older userspace won't unhalt the vcpu on reset. */
10459 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
10460 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
10461 !is_protmode(vcpu
))
10462 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10467 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10469 int pending_vec
, max_bits
;
10470 int mmu_reset_needed
= 0;
10471 int ret
= __set_sregs_common(vcpu
, sregs
, &mmu_reset_needed
, true);
10476 if (mmu_reset_needed
)
10477 kvm_mmu_reset_context(vcpu
);
10479 max_bits
= KVM_NR_INTERRUPTS
;
10480 pending_vec
= find_first_bit(
10481 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
10483 if (pending_vec
< max_bits
) {
10484 kvm_queue_interrupt(vcpu
, pending_vec
, false);
10485 pr_debug("Set back pending irq %d\n", pending_vec
);
10486 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10491 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10493 int mmu_reset_needed
= 0;
10494 bool valid_pdptrs
= sregs2
->flags
& KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10495 bool pae
= (sregs2
->cr0
& X86_CR0_PG
) && (sregs2
->cr4
& X86_CR4_PAE
) &&
10496 !(sregs2
->efer
& EFER_LMA
);
10499 if (sregs2
->flags
& ~KVM_SREGS2_FLAGS_PDPTRS_VALID
)
10502 if (valid_pdptrs
&& (!pae
|| vcpu
->arch
.guest_state_protected
))
10505 ret
= __set_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
,
10506 &mmu_reset_needed
, !valid_pdptrs
);
10510 if (valid_pdptrs
) {
10511 for (i
= 0; i
< 4 ; i
++)
10512 kvm_pdptr_write(vcpu
, i
, sregs2
->pdptrs
[i
]);
10514 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
10515 mmu_reset_needed
= 1;
10516 vcpu
->arch
.pdptrs_from_userspace
= true;
10518 if (mmu_reset_needed
)
10519 kvm_mmu_reset_context(vcpu
);
10523 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
10524 struct kvm_sregs
*sregs
)
10529 ret
= __set_sregs(vcpu
, sregs
);
10534 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
10535 struct kvm_guest_debug
*dbg
)
10537 unsigned long rflags
;
10540 if (vcpu
->arch
.guest_state_protected
)
10545 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
10547 if (vcpu
->arch
.exception
.pending
)
10549 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
10550 kvm_queue_exception(vcpu
, DB_VECTOR
);
10552 kvm_queue_exception(vcpu
, BP_VECTOR
);
10556 * Read rflags as long as potentially injected trace flags are still
10559 rflags
= kvm_get_rflags(vcpu
);
10561 vcpu
->guest_debug
= dbg
->control
;
10562 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
10563 vcpu
->guest_debug
= 0;
10565 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
10566 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
10567 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
10568 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
10570 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
10571 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
10573 kvm_update_dr7(vcpu
);
10575 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10576 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
10579 * Trigger an rflags update that will inject or remove the trace
10582 kvm_set_rflags(vcpu
, rflags
);
10584 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
10594 * Translate a guest virtual address to a guest physical address.
10596 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
10597 struct kvm_translation
*tr
)
10599 unsigned long vaddr
= tr
->linear_address
;
10605 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10606 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
10607 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10608 tr
->physical_address
= gpa
;
10609 tr
->valid
= gpa
!= UNMAPPED_GVA
;
10617 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10619 struct fxregs_state
*fxsave
;
10621 if (!vcpu
->arch
.guest_fpu
)
10626 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10627 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
10628 fpu
->fcw
= fxsave
->cwd
;
10629 fpu
->fsw
= fxsave
->swd
;
10630 fpu
->ftwx
= fxsave
->twd
;
10631 fpu
->last_opcode
= fxsave
->fop
;
10632 fpu
->last_ip
= fxsave
->rip
;
10633 fpu
->last_dp
= fxsave
->rdp
;
10634 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
10640 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10642 struct fxregs_state
*fxsave
;
10644 if (!vcpu
->arch
.guest_fpu
)
10649 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10651 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
10652 fxsave
->cwd
= fpu
->fcw
;
10653 fxsave
->swd
= fpu
->fsw
;
10654 fxsave
->twd
= fpu
->ftwx
;
10655 fxsave
->fop
= fpu
->last_opcode
;
10656 fxsave
->rip
= fpu
->last_ip
;
10657 fxsave
->rdp
= fpu
->last_dp
;
10658 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
10664 static void store_regs(struct kvm_vcpu
*vcpu
)
10666 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
10668 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
10669 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10671 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
10672 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
10674 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
10675 kvm_vcpu_ioctl_x86_get_vcpu_events(
10676 vcpu
, &vcpu
->run
->s
.regs
.events
);
10679 static int sync_regs(struct kvm_vcpu
*vcpu
)
10681 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
10682 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10683 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
10685 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
10686 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
10688 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
10690 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
10691 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10692 vcpu
, &vcpu
->run
->s
.regs
.events
))
10694 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
10700 static void fx_init(struct kvm_vcpu
*vcpu
)
10702 if (!vcpu
->arch
.guest_fpu
)
10705 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
10706 if (boot_cpu_has(X86_FEATURE_XSAVES
))
10707 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
10708 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
10711 * Ensure guest xcr0 is valid for loading
10713 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10715 vcpu
->arch
.cr0
|= X86_CR0_ET
;
10718 void kvm_free_guest_fpu(struct kvm_vcpu
*vcpu
)
10720 if (vcpu
->arch
.guest_fpu
) {
10721 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
10722 vcpu
->arch
.guest_fpu
= NULL
;
10725 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu
);
10727 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
10729 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
10730 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10731 "guest TSC will not be reliable\n");
10736 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
10741 vcpu
->arch
.last_vmentry_cpu
= -1;
10742 vcpu
->arch
.regs_avail
= ~0;
10743 vcpu
->arch
.regs_dirty
= ~0;
10745 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
10746 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10748 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
10750 r
= kvm_mmu_create(vcpu
);
10754 if (irqchip_in_kernel(vcpu
->kvm
)) {
10755 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
10757 goto fail_mmu_destroy
;
10758 if (kvm_apicv_activated(vcpu
->kvm
))
10759 vcpu
->arch
.apicv_active
= true;
10761 static_branch_inc(&kvm_has_noapic_vcpu
);
10765 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
10767 goto fail_free_lapic
;
10768 vcpu
->arch
.pio_data
= page_address(page
);
10770 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
10771 GFP_KERNEL_ACCOUNT
);
10772 if (!vcpu
->arch
.mce_banks
)
10773 goto fail_free_pio_data
;
10774 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
10776 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
10777 GFP_KERNEL_ACCOUNT
))
10778 goto fail_free_mce_banks
;
10780 if (!alloc_emulate_ctxt(vcpu
))
10781 goto free_wbinvd_dirty_mask
;
10783 vcpu
->arch
.user_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10784 GFP_KERNEL_ACCOUNT
);
10785 if (!vcpu
->arch
.user_fpu
) {
10786 pr_err("kvm: failed to allocate userspace's fpu\n");
10787 goto free_emulate_ctxt
;
10790 vcpu
->arch
.guest_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10791 GFP_KERNEL_ACCOUNT
);
10792 if (!vcpu
->arch
.guest_fpu
) {
10793 pr_err("kvm: failed to allocate vcpu's fpu\n");
10794 goto free_user_fpu
;
10798 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
10799 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
10801 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
10803 kvm_async_pf_hash_reset(vcpu
);
10804 kvm_pmu_init(vcpu
);
10806 vcpu
->arch
.pending_external_vector
= -1;
10807 vcpu
->arch
.preempted_in_kernel
= false;
10809 #if IS_ENABLED(CONFIG_HYPERV)
10810 vcpu
->arch
.hv_root_tdp
= INVALID_PAGE
;
10813 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
10815 goto free_guest_fpu
;
10817 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
10818 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
10819 kvm_vcpu_mtrr_init(vcpu
);
10821 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
10822 kvm_vcpu_reset(vcpu
, false);
10823 kvm_init_mmu(vcpu
);
10828 kvm_free_guest_fpu(vcpu
);
10830 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10832 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10833 free_wbinvd_dirty_mask
:
10834 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10835 fail_free_mce_banks
:
10836 kfree(vcpu
->arch
.mce_banks
);
10837 fail_free_pio_data
:
10838 free_page((unsigned long)vcpu
->arch
.pio_data
);
10840 kvm_free_lapic(vcpu
);
10842 kvm_mmu_destroy(vcpu
);
10846 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
10848 struct kvm
*kvm
= vcpu
->kvm
;
10850 if (mutex_lock_killable(&vcpu
->mutex
))
10853 kvm_synchronize_tsc(vcpu
, 0);
10856 /* poll control enabled by default */
10857 vcpu
->arch
.msr_kvm_poll_control
= 1;
10859 mutex_unlock(&vcpu
->mutex
);
10861 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
10862 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
10863 KVMCLOCK_SYNC_PERIOD
);
10866 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
10870 kvmclock_reset(vcpu
);
10872 static_call(kvm_x86_vcpu_free
)(vcpu
);
10874 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10875 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10876 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10877 kvm_free_guest_fpu(vcpu
);
10879 kvm_hv_vcpu_uninit(vcpu
);
10880 kvm_pmu_destroy(vcpu
);
10881 kfree(vcpu
->arch
.mce_banks
);
10882 kvm_free_lapic(vcpu
);
10883 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10884 kvm_mmu_destroy(vcpu
);
10885 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10886 free_page((unsigned long)vcpu
->arch
.pio_data
);
10887 kvfree(vcpu
->arch
.cpuid_entries
);
10888 if (!lapic_in_kernel(vcpu
))
10889 static_branch_dec(&kvm_has_noapic_vcpu
);
10892 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
10894 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
10895 unsigned long new_cr0
;
10898 kvm_lapic_reset(vcpu
, init_event
);
10900 vcpu
->arch
.hflags
= 0;
10902 vcpu
->arch
.smi_pending
= 0;
10903 vcpu
->arch
.smi_count
= 0;
10904 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
10905 vcpu
->arch
.nmi_pending
= 0;
10906 vcpu
->arch
.nmi_injected
= false;
10907 kvm_clear_interrupt_queue(vcpu
);
10908 kvm_clear_exception_queue(vcpu
);
10910 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
10911 kvm_update_dr0123(vcpu
);
10912 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
10913 vcpu
->arch
.dr7
= DR7_FIXED_1
;
10914 kvm_update_dr7(vcpu
);
10916 vcpu
->arch
.cr2
= 0;
10918 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10919 vcpu
->arch
.apf
.msr_en_val
= 0;
10920 vcpu
->arch
.apf
.msr_int_val
= 0;
10921 vcpu
->arch
.st
.msr_val
= 0;
10923 kvmclock_reset(vcpu
);
10925 kvm_clear_async_pf_completion_queue(vcpu
);
10926 kvm_async_pf_hash_reset(vcpu
);
10927 vcpu
->arch
.apf
.halted
= false;
10929 if (vcpu
->arch
.guest_fpu
&& kvm_mpx_supported()) {
10930 void *mpx_state_buffer
;
10933 * To avoid have the INIT path from kvm_apic_has_events() that be
10934 * called with loaded FPU and does not let userspace fix the state.
10937 kvm_put_guest_fpu(vcpu
);
10938 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10940 if (mpx_state_buffer
)
10941 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
10942 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10944 if (mpx_state_buffer
)
10945 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
10947 kvm_load_guest_fpu(vcpu
);
10951 kvm_pmu_reset(vcpu
);
10952 vcpu
->arch
.smbase
= 0x30000;
10954 vcpu
->arch
.msr_misc_features_enables
= 0;
10956 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10959 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
10960 vcpu
->arch
.regs_avail
= ~0;
10961 vcpu
->arch
.regs_dirty
= ~0;
10964 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
10965 * if no CPUID match is found. Note, it's impossible to get a match at
10966 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
10967 * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
10968 * But, go through the motions in case that's ever remedied.
10971 if (!kvm_cpuid(vcpu
, &eax
, &dummy
, &dummy
, &dummy
, true))
10973 kvm_rdx_write(vcpu
, eax
);
10975 vcpu
->arch
.ia32_xss
= 0;
10977 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
10979 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
10980 kvm_rip_write(vcpu
, 0xfff0);
10982 vcpu
->arch
.cr3
= 0;
10983 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
10986 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
10987 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
10988 * (or qualify) that with a footnote stating that CD/NW are preserved.
10990 new_cr0
= X86_CR0_ET
;
10992 new_cr0
|= (old_cr0
& (X86_CR0_NW
| X86_CR0_CD
));
10994 new_cr0
|= X86_CR0_NW
| X86_CR0_CD
;
10996 static_call(kvm_x86_set_cr0
)(vcpu
, new_cr0
);
10997 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
10998 static_call(kvm_x86_set_efer
)(vcpu
, 0);
10999 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
11002 * Reset the MMU context if paging was enabled prior to INIT (which is
11003 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
11004 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11005 * checked because it is unconditionally cleared on INIT and all other
11006 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11007 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11009 if (old_cr0
& X86_CR0_PG
)
11010 kvm_mmu_reset_context(vcpu
);
11013 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11014 * APM states the TLBs are untouched by INIT, but it also states that
11015 * the TLBs are flushed on "External initialization of the processor."
11016 * Flush the guest TLB regardless of vendor, there is no meaningful
11017 * benefit in relying on the guest to flush the TLB immediately after
11018 * INIT. A spurious TLB flush is benign and likely negligible from a
11019 * performance perspective.
11022 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11024 EXPORT_SYMBOL_GPL(kvm_vcpu_reset
);
11026 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
11028 struct kvm_segment cs
;
11030 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11031 cs
.selector
= vector
<< 8;
11032 cs
.base
= vector
<< 12;
11033 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11034 kvm_rip_write(vcpu
, 0);
11036 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
11038 int kvm_arch_hardware_enable(void)
11041 struct kvm_vcpu
*vcpu
;
11046 bool stable
, backwards_tsc
= false;
11048 kvm_user_return_msr_cpu_online();
11049 ret
= static_call(kvm_x86_hardware_enable
)();
11053 local_tsc
= rdtsc();
11054 stable
= !kvm_check_tsc_unstable();
11055 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11056 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11057 if (!stable
&& vcpu
->cpu
== smp_processor_id())
11058 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
11059 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
11060 backwards_tsc
= true;
11061 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
11062 max_tsc
= vcpu
->arch
.last_host_tsc
;
11068 * Sometimes, even reliable TSCs go backwards. This happens on
11069 * platforms that reset TSC during suspend or hibernate actions, but
11070 * maintain synchronization. We must compensate. Fortunately, we can
11071 * detect that condition here, which happens early in CPU bringup,
11072 * before any KVM threads can be running. Unfortunately, we can't
11073 * bring the TSCs fully up to date with real time, as we aren't yet far
11074 * enough into CPU bringup that we know how much real time has actually
11075 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11076 * variables that haven't been updated yet.
11078 * So we simply find the maximum observed TSC above, then record the
11079 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11080 * the adjustment will be applied. Note that we accumulate
11081 * adjustments, in case multiple suspend cycles happen before some VCPU
11082 * gets a chance to run again. In the event that no KVM threads get a
11083 * chance to run, we will miss the entire elapsed period, as we'll have
11084 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11085 * loose cycle time. This isn't too big a deal, since the loss will be
11086 * uniform across all VCPUs (not to mention the scenario is extremely
11087 * unlikely). It is possible that a second hibernate recovery happens
11088 * much faster than a first, causing the observed TSC here to be
11089 * smaller; this would require additional padding adjustment, which is
11090 * why we set last_host_tsc to the local tsc observed here.
11092 * N.B. - this code below runs only on platforms with reliable TSC,
11093 * as that is the only way backwards_tsc is set above. Also note
11094 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11095 * have the same delta_cyc adjustment applied if backwards_tsc
11096 * is detected. Note further, this adjustment is only done once,
11097 * as we reset last_host_tsc on all VCPUs to stop this from being
11098 * called multiple times (one for each physical CPU bringup).
11100 * Platforms with unreliable TSCs don't have to deal with this, they
11101 * will be compensated by the logic in vcpu_load, which sets the TSC to
11102 * catchup mode. This will catchup all VCPUs to real time, but cannot
11103 * guarantee that they stay in perfect synchronization.
11105 if (backwards_tsc
) {
11106 u64 delta_cyc
= max_tsc
- local_tsc
;
11107 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11108 kvm
->arch
.backwards_tsc_observed
= true;
11109 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11110 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
11111 vcpu
->arch
.last_host_tsc
= local_tsc
;
11112 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
11116 * We have to disable TSC offset matching.. if you were
11117 * booting a VM while issuing an S4 host suspend....
11118 * you may have some problem. Solving this issue is
11119 * left as an exercise to the reader.
11121 kvm
->arch
.last_tsc_nsec
= 0;
11122 kvm
->arch
.last_tsc_write
= 0;
11129 void kvm_arch_hardware_disable(void)
11131 static_call(kvm_x86_hardware_disable
)();
11132 drop_user_return_notifiers();
11135 int kvm_arch_hardware_setup(void *opaque
)
11137 struct kvm_x86_init_ops
*ops
= opaque
;
11140 rdmsrl_safe(MSR_EFER
, &host_efer
);
11142 if (boot_cpu_has(X86_FEATURE_XSAVES
))
11143 rdmsrl(MSR_IA32_XSS
, host_xss
);
11145 r
= ops
->hardware_setup();
11149 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
11150 kvm_ops_static_call_update();
11152 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
11155 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11156 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
11157 #undef __kvm_cpu_cap_has
11159 if (kvm_has_tsc_control
) {
11161 * Make sure the user can only configure tsc_khz values that
11162 * fit into a signed integer.
11163 * A min value is not calculated because it will always
11164 * be 1 on all machines.
11166 u64 max
= min(0x7fffffffULL
,
11167 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
11168 kvm_max_guest_tsc_khz
= max
;
11170 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
11173 kvm_init_msr_list();
11177 void kvm_arch_hardware_unsetup(void)
11179 static_call(kvm_x86_hardware_unsetup
)();
11182 int kvm_arch_check_processor_compat(void *opaque
)
11184 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
11185 struct kvm_x86_init_ops
*ops
= opaque
;
11187 WARN_ON(!irqs_disabled());
11189 if (__cr4_reserved_bits(cpu_has
, c
) !=
11190 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
11193 return ops
->check_processor_compatibility();
11196 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
11198 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
11200 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
11202 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
11204 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
11207 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
11208 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
11210 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
11212 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
11214 vcpu
->arch
.l1tf_flush_l1d
= true;
11215 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
11216 pmu
->need_cleanup
= true;
11217 kvm_make_request(KVM_REQ_PMU
, vcpu
);
11219 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
11222 void kvm_arch_free_vm(struct kvm
*kvm
)
11224 kfree(to_kvm_hv(kvm
)->hv_pa_pg
);
11229 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
11236 ret
= kvm_page_track_init(kvm
);
11240 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
11241 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
11242 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
11243 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
11244 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
11245 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
11247 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11248 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
11249 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11250 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
11251 &kvm
->arch
.irq_sources_bitmap
);
11253 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
11254 mutex_init(&kvm
->arch
.apic_map_lock
);
11255 raw_spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
11257 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
11258 pvclock_update_vm_gtod_copy(kvm
);
11260 kvm
->arch
.guest_can_read_msr_platform_info
= true;
11262 #if IS_ENABLED(CONFIG_HYPERV)
11263 spin_lock_init(&kvm
->arch
.hv_root_tdp_lock
);
11264 kvm
->arch
.hv_root_tdp
= INVALID_PAGE
;
11267 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
11268 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
11270 kvm_apicv_init(kvm
);
11271 kvm_hv_init_vm(kvm
);
11272 kvm_mmu_init_vm(kvm
);
11273 kvm_xen_init_vm(kvm
);
11275 return static_call(kvm_x86_vm_init
)(kvm
);
11278 int kvm_arch_post_init_vm(struct kvm
*kvm
)
11280 return kvm_mmu_post_init_vm(kvm
);
11283 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
11286 kvm_mmu_unload(vcpu
);
11290 static void kvm_free_vcpus(struct kvm
*kvm
)
11293 struct kvm_vcpu
*vcpu
;
11296 * Unpin any mmu pages first.
11298 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11299 kvm_clear_async_pf_completion_queue(vcpu
);
11300 kvm_unload_vcpu_mmu(vcpu
);
11302 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11303 kvm_vcpu_destroy(vcpu
);
11305 mutex_lock(&kvm
->lock
);
11306 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
11307 kvm
->vcpus
[i
] = NULL
;
11309 atomic_set(&kvm
->online_vcpus
, 0);
11310 mutex_unlock(&kvm
->lock
);
11313 void kvm_arch_sync_events(struct kvm
*kvm
)
11315 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
11316 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
11320 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
11323 * __x86_set_memory_region: Setup KVM internal memory slot
11325 * @kvm: the kvm pointer to the VM.
11326 * @id: the slot ID to setup.
11327 * @gpa: the GPA to install the slot (unused when @size == 0).
11328 * @size: the size of the slot. Set to zero to uninstall a slot.
11330 * This function helps to setup a KVM internal memory slot. Specify
11331 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11332 * slot. The return code can be one of the following:
11334 * HVA: on success (uninstall will return a bogus HVA)
11337 * The caller should always use IS_ERR() to check the return value
11338 * before use. Note, the KVM internal memory slots are guaranteed to
11339 * remain valid and unchanged until the VM is destroyed, i.e., the
11340 * GPA->HVA translation will not change. However, the HVA is a user
11341 * address, i.e. its accessibility is not guaranteed, and must be
11342 * accessed via __copy_{to,from}_user().
11344 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
11348 unsigned long hva
, old_npages
;
11349 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
11350 struct kvm_memory_slot
*slot
;
11352 /* Called with kvm->slots_lock held. */
11353 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
11354 return ERR_PTR_USR(-EINVAL
);
11356 slot
= id_to_memslot(slots
, id
);
11358 if (slot
&& slot
->npages
)
11359 return ERR_PTR_USR(-EEXIST
);
11362 * MAP_SHARED to prevent internal slot pages from being moved
11365 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
11366 MAP_SHARED
| MAP_ANONYMOUS
, 0);
11367 if (IS_ERR((void *)hva
))
11368 return (void __user
*)hva
;
11370 if (!slot
|| !slot
->npages
)
11373 old_npages
= slot
->npages
;
11374 hva
= slot
->userspace_addr
;
11377 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11378 struct kvm_userspace_memory_region m
;
11380 m
.slot
= id
| (i
<< 16);
11382 m
.guest_phys_addr
= gpa
;
11383 m
.userspace_addr
= hva
;
11384 m
.memory_size
= size
;
11385 r
= __kvm_set_memory_region(kvm
, &m
);
11387 return ERR_PTR_USR(r
);
11391 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
11393 return (void __user
*)hva
;
11395 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
11397 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
11399 kvm_mmu_pre_destroy_vm(kvm
);
11402 void kvm_arch_destroy_vm(struct kvm
*kvm
)
11404 if (current
->mm
== kvm
->mm
) {
11406 * Free memory regions allocated on behalf of userspace,
11407 * unless the the memory map has changed due to process exit
11410 mutex_lock(&kvm
->slots_lock
);
11411 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
11413 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
11415 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
11416 mutex_unlock(&kvm
->slots_lock
);
11418 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
11419 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
11420 kvm_pic_destroy(kvm
);
11421 kvm_ioapic_destroy(kvm
);
11422 kvm_free_vcpus(kvm
);
11423 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
11424 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
11425 kvm_mmu_uninit_vm(kvm
);
11426 kvm_page_track_cleanup(kvm
);
11427 kvm_xen_destroy_vm(kvm
);
11428 kvm_hv_destroy_vm(kvm
);
11431 static void memslot_rmap_free(struct kvm_memory_slot
*slot
)
11435 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11436 kvfree(slot
->arch
.rmap
[i
]);
11437 slot
->arch
.rmap
[i
] = NULL
;
11441 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
11445 memslot_rmap_free(slot
);
11447 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11448 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11449 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11452 kvm_page_track_free_memslot(slot
);
11455 static int memslot_rmap_alloc(struct kvm_memory_slot
*slot
,
11456 unsigned long npages
)
11458 const int sz
= sizeof(*slot
->arch
.rmap
[0]);
11461 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11463 int lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11465 if (slot
->arch
.rmap
[i
])
11468 slot
->arch
.rmap
[i
] = kvcalloc(lpages
, sz
, GFP_KERNEL_ACCOUNT
);
11469 if (!slot
->arch
.rmap
[i
]) {
11470 memslot_rmap_free(slot
);
11478 int alloc_all_memslots_rmaps(struct kvm
*kvm
)
11480 struct kvm_memslots
*slots
;
11481 struct kvm_memory_slot
*slot
;
11485 * Check if memslots alreday have rmaps early before acquiring
11486 * the slots_arch_lock below.
11488 if (kvm_memslots_have_rmaps(kvm
))
11491 mutex_lock(&kvm
->slots_arch_lock
);
11494 * Read memslots_have_rmaps again, under the slots arch lock,
11495 * before allocating the rmaps
11497 if (kvm_memslots_have_rmaps(kvm
)) {
11498 mutex_unlock(&kvm
->slots_arch_lock
);
11502 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11503 slots
= __kvm_memslots(kvm
, i
);
11504 kvm_for_each_memslot(slot
, slots
) {
11505 r
= memslot_rmap_alloc(slot
, slot
->npages
);
11507 mutex_unlock(&kvm
->slots_arch_lock
);
11514 * Ensure that memslots_have_rmaps becomes true strictly after
11515 * all the rmap pointers are set.
11517 smp_store_release(&kvm
->arch
.memslots_have_rmaps
, true);
11518 mutex_unlock(&kvm
->slots_arch_lock
);
11522 static int kvm_alloc_memslot_metadata(struct kvm
*kvm
,
11523 struct kvm_memory_slot
*slot
,
11524 unsigned long npages
)
11529 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11530 * old arrays will be freed by __kvm_set_memory_region() if installing
11531 * the new memslot is successful.
11533 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
11535 if (kvm_memslots_have_rmaps(kvm
)) {
11536 r
= memslot_rmap_alloc(slot
, npages
);
11541 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11542 struct kvm_lpage_info
*linfo
;
11543 unsigned long ugfn
;
11547 lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11549 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
11553 slot
->arch
.lpage_info
[i
- 1] = linfo
;
11555 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
11556 linfo
[0].disallow_lpage
= 1;
11557 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
11558 linfo
[lpages
- 1].disallow_lpage
= 1;
11559 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
11561 * If the gfn and userspace address are not aligned wrt each
11562 * other, disable large page support for this slot.
11564 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
11567 for (j
= 0; j
< lpages
; ++j
)
11568 linfo
[j
].disallow_lpage
= 1;
11572 if (kvm_page_track_create_memslot(slot
, npages
))
11578 memslot_rmap_free(slot
);
11580 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11581 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11582 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11587 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
11589 struct kvm_vcpu
*vcpu
;
11593 * memslots->generation has been incremented.
11594 * mmio generation may have reached its maximum value.
11596 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
11598 /* Force re-initialization of steal_time cache */
11599 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11600 kvm_vcpu_kick(vcpu
);
11603 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
11604 struct kvm_memory_slot
*memslot
,
11605 const struct kvm_userspace_memory_region
*mem
,
11606 enum kvm_mr_change change
)
11608 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
11609 return kvm_alloc_memslot_metadata(kvm
, memslot
,
11610 mem
->memory_size
>> PAGE_SHIFT
);
11615 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
11617 struct kvm_arch
*ka
= &kvm
->arch
;
11619 if (!kvm_x86_ops
.cpu_dirty_log_size
)
11622 if ((enable
&& ++ka
->cpu_dirty_logging_count
== 1) ||
11623 (!enable
&& --ka
->cpu_dirty_logging_count
== 0))
11624 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
11626 WARN_ON_ONCE(ka
->cpu_dirty_logging_count
< 0);
11629 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
11630 struct kvm_memory_slot
*old
,
11631 const struct kvm_memory_slot
*new,
11632 enum kvm_mr_change change
)
11634 bool log_dirty_pages
= new->flags
& KVM_MEM_LOG_DIRTY_PAGES
;
11637 * Update CPU dirty logging if dirty logging is being toggled. This
11638 * applies to all operations.
11640 if ((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
11641 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
11644 * Nothing more to do for RO slots (which can't be dirtied and can't be
11645 * made writable) or CREATE/MOVE/DELETE of a slot.
11647 * For a memslot with dirty logging disabled:
11648 * CREATE: No dirty mappings will already exist.
11649 * MOVE/DELETE: The old mappings will already have been cleaned up by
11650 * kvm_arch_flush_shadow_memslot()
11652 * For a memslot with dirty logging enabled:
11653 * CREATE: No shadow pages exist, thus nothing to write-protect
11654 * and no dirty bits to clear.
11655 * MOVE/DELETE: The old mappings will already have been cleaned up by
11656 * kvm_arch_flush_shadow_memslot().
11658 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new->flags
& KVM_MEM_READONLY
))
11662 * READONLY and non-flags changes were filtered out above, and the only
11663 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11664 * logging isn't being toggled on or off.
11666 if (WARN_ON_ONCE(!((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
11669 if (!log_dirty_pages
) {
11671 * Dirty logging tracks sptes in 4k granularity, meaning that
11672 * large sptes have to be split. If live migration succeeds,
11673 * the guest in the source machine will be destroyed and large
11674 * sptes will be created in the destination. However, if the
11675 * guest continues to run in the source machine (for example if
11676 * live migration fails), small sptes will remain around and
11677 * cause bad performance.
11679 * Scan sptes if dirty logging has been stopped, dropping those
11680 * which can be collapsed into a single large-page spte. Later
11681 * page faults will create the large-page sptes.
11683 kvm_mmu_zap_collapsible_sptes(kvm
, new);
11686 * Initially-all-set does not require write protecting any page,
11687 * because they're all assumed to be dirty.
11689 if (kvm_dirty_log_manual_protect_and_init_set(kvm
))
11692 if (kvm_x86_ops
.cpu_dirty_log_size
) {
11693 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
11694 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_2M
);
11696 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_4K
);
11701 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
11702 const struct kvm_userspace_memory_region
*mem
,
11703 struct kvm_memory_slot
*old
,
11704 const struct kvm_memory_slot
*new,
11705 enum kvm_mr_change change
)
11707 if (!kvm
->arch
.n_requested_mmu_pages
)
11708 kvm_mmu_change_mmu_pages(kvm
,
11709 kvm_mmu_calculate_default_mmu_pages(kvm
));
11711 kvm_mmu_slot_apply_flags(kvm
, old
, new, change
);
11713 /* Free the arrays associated with the old memslot. */
11714 if (change
== KVM_MR_MOVE
)
11715 kvm_arch_free_memslot(kvm
, old
);
11718 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
11720 kvm_mmu_zap_all(kvm
);
11723 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
11724 struct kvm_memory_slot
*slot
)
11726 kvm_page_track_flush_slot(kvm
, slot
);
11729 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
11731 return (is_guest_mode(vcpu
) &&
11732 kvm_x86_ops
.guest_apic_has_interrupt
&&
11733 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
11736 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
11738 if (!list_empty_careful(&vcpu
->async_pf
.done
))
11741 if (kvm_apic_has_events(vcpu
))
11744 if (vcpu
->arch
.pv
.pv_unhalted
)
11747 if (vcpu
->arch
.exception
.pending
)
11750 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11751 (vcpu
->arch
.nmi_pending
&&
11752 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
11755 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11756 (vcpu
->arch
.smi_pending
&&
11757 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
11760 if (kvm_arch_interrupt_allowed(vcpu
) &&
11761 (kvm_cpu_has_interrupt(vcpu
) ||
11762 kvm_guest_apic_has_interrupt(vcpu
)))
11765 if (kvm_hv_has_stimer_pending(vcpu
))
11768 if (is_guest_mode(vcpu
) &&
11769 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
11770 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
11776 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
11778 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
11781 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
11783 if (vcpu
->arch
.apicv_active
&& static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
11789 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
11791 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
11794 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11795 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11796 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
11799 return kvm_arch_dy_has_pending_interrupt(vcpu
);
11802 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
11804 if (vcpu
->arch
.guest_state_protected
)
11807 return vcpu
->arch
.preempted_in_kernel
;
11810 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
11812 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
11815 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
11817 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
11820 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
11822 /* Can't read the RIP when guest state is protected, just return 0 */
11823 if (vcpu
->arch
.guest_state_protected
)
11826 if (is_64_bit_mode(vcpu
))
11827 return kvm_rip_read(vcpu
);
11828 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
11829 kvm_rip_read(vcpu
));
11831 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
11833 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
11835 return kvm_get_linear_rip(vcpu
) == linear_rip
;
11837 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
11839 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
11841 unsigned long rflags
;
11843 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
11844 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11845 rflags
&= ~X86_EFLAGS_TF
;
11848 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
11850 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11852 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
11853 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
11854 rflags
|= X86_EFLAGS_TF
;
11855 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
11858 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11860 __kvm_set_rflags(vcpu
, rflags
);
11861 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11863 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
11865 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
11869 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
11873 r
= kvm_mmu_reload(vcpu
);
11877 if (!vcpu
->arch
.mmu
->direct_map
&&
11878 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
11881 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
11884 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
11886 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
11888 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
11891 static inline u32
kvm_async_pf_next_probe(u32 key
)
11893 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
11896 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11898 u32 key
= kvm_async_pf_hash_fn(gfn
);
11900 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
11901 key
= kvm_async_pf_next_probe(key
);
11903 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
11906 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11909 u32 key
= kvm_async_pf_hash_fn(gfn
);
11911 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
11912 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
11913 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
11914 key
= kvm_async_pf_next_probe(key
);
11919 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11921 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
11924 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11928 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
11930 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
11934 vcpu
->arch
.apf
.gfns
[i
] = ~0;
11936 j
= kvm_async_pf_next_probe(j
);
11937 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
11939 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
11941 * k lies cyclically in ]i,j]
11943 * |....j i.k.| or |.k..j i...|
11945 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
11946 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
11951 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
11953 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
11955 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
11959 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
11961 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11963 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11964 &token
, offset
, sizeof(token
));
11967 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
11969 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11972 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11973 &val
, offset
, sizeof(val
)))
11979 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
11981 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
11984 if (!kvm_pv_async_pf_enabled(vcpu
) ||
11985 (vcpu
->arch
.apf
.send_user_only
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 0))
11991 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
11993 if (unlikely(!lapic_in_kernel(vcpu
) ||
11994 kvm_event_needs_reinjection(vcpu
) ||
11995 vcpu
->arch
.exception
.pending
))
11998 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
12002 * If interrupts are off we cannot even use an artificial
12005 return kvm_arch_interrupt_allowed(vcpu
);
12008 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
12009 struct kvm_async_pf
*work
)
12011 struct x86_exception fault
;
12013 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
12014 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12016 if (kvm_can_deliver_async_pf(vcpu
) &&
12017 !apf_put_user_notpresent(vcpu
)) {
12018 fault
.vector
= PF_VECTOR
;
12019 fault
.error_code_valid
= true;
12020 fault
.error_code
= 0;
12021 fault
.nested_page_fault
= false;
12022 fault
.address
= work
->arch
.token
;
12023 fault
.async_page_fault
= true;
12024 kvm_inject_page_fault(vcpu
, &fault
);
12028 * It is not possible to deliver a paravirtualized asynchronous
12029 * page fault, but putting the guest in an artificial halt state
12030 * can be beneficial nevertheless: if an interrupt arrives, we
12031 * can deliver it timely and perhaps the guest will schedule
12032 * another process. When the instruction that triggered a page
12033 * fault is retried, hopefully the page will be ready in the host.
12035 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
12040 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
12041 struct kvm_async_pf
*work
)
12043 struct kvm_lapic_irq irq
= {
12044 .delivery_mode
= APIC_DM_FIXED
,
12045 .vector
= vcpu
->arch
.apf
.vec
12048 if (work
->wakeup_all
)
12049 work
->arch
.token
= ~0; /* broadcast wakeup */
12051 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12052 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
12054 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
12055 kvm_pv_async_pf_enabled(vcpu
) &&
12056 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
12057 vcpu
->arch
.apf
.pageready_pending
= true;
12058 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
12061 vcpu
->arch
.apf
.halted
= false;
12062 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
12065 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
12067 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
12068 if (!vcpu
->arch
.apf
.pageready_pending
)
12069 kvm_vcpu_kick(vcpu
);
12072 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
12074 if (!kvm_pv_async_pf_enabled(vcpu
))
12077 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
12080 void kvm_arch_start_assignment(struct kvm
*kvm
)
12082 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
12083 static_call_cond(kvm_x86_start_assignment
)(kvm
);
12085 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
12087 void kvm_arch_end_assignment(struct kvm
*kvm
)
12089 atomic_dec(&kvm
->arch
.assigned_device_count
);
12091 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
12093 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
12095 return atomic_read(&kvm
->arch
.assigned_device_count
);
12097 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
12099 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
12101 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
12103 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
12105 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
12107 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
12109 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
12111 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
12113 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
12115 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
12117 bool kvm_arch_has_irq_bypass(void)
12122 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
12123 struct irq_bypass_producer
*prod
)
12125 struct kvm_kernel_irqfd
*irqfd
=
12126 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12129 irqfd
->producer
= prod
;
12130 kvm_arch_start_assignment(irqfd
->kvm
);
12131 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
,
12132 prod
->irq
, irqfd
->gsi
, 1);
12135 kvm_arch_end_assignment(irqfd
->kvm
);
12140 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
12141 struct irq_bypass_producer
*prod
)
12144 struct kvm_kernel_irqfd
*irqfd
=
12145 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12147 WARN_ON(irqfd
->producer
!= prod
);
12148 irqfd
->producer
= NULL
;
12151 * When producer of consumer is unregistered, we change back to
12152 * remapped mode, so we can re-use the current implementation
12153 * when the irq is masked/disabled or the consumer side (KVM
12154 * int this case doesn't want to receive the interrupts.
12156 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
12158 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
12159 " fails: %d\n", irqfd
->consumer
.token
, ret
);
12161 kvm_arch_end_assignment(irqfd
->kvm
);
12164 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
12165 uint32_t guest_irq
, bool set
)
12167 return static_call(kvm_x86_update_pi_irte
)(kvm
, host_irq
, guest_irq
, set
);
12170 bool kvm_vector_hashing_enabled(void)
12172 return vector_hashing
;
12175 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
12177 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
12179 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
12182 int kvm_spec_ctrl_test_value(u64 value
)
12185 * test that setting IA32_SPEC_CTRL to given value
12186 * is allowed by the host processor
12190 unsigned long flags
;
12193 local_irq_save(flags
);
12195 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
12197 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
12200 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
12202 local_irq_restore(flags
);
12206 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
12208 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
12210 struct x86_exception fault
;
12211 u32 access
= error_code
&
12212 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
12214 if (!(error_code
& PFERR_PRESENT_MASK
) ||
12215 vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
12217 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12218 * tables probably do not match the TLB. Just proceed
12219 * with the error code that the processor gave.
12221 fault
.vector
= PF_VECTOR
;
12222 fault
.error_code_valid
= true;
12223 fault
.error_code
= error_code
;
12224 fault
.nested_page_fault
= false;
12225 fault
.address
= gva
;
12227 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
12229 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
12232 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12233 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12234 * indicates whether exit to userspace is needed.
12236 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
12237 struct x86_exception
*e
)
12239 if (r
== X86EMUL_PROPAGATE_FAULT
) {
12240 kvm_inject_emulated_page_fault(vcpu
, e
);
12245 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12246 * while handling a VMX instruction KVM could've handled the request
12247 * correctly by exiting to userspace and performing I/O but there
12248 * doesn't seem to be a real use-case behind such requests, just return
12249 * KVM_EXIT_INTERNAL_ERROR for now.
12251 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
12252 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
12253 vcpu
->run
->internal
.ndata
= 0;
12257 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
12259 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
12262 struct x86_exception e
;
12269 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
12270 if (r
!= X86EMUL_CONTINUE
)
12271 return kvm_handle_memory_failure(vcpu
, r
, &e
);
12273 if (operand
.pcid
>> 12 != 0) {
12274 kvm_inject_gp(vcpu
, 0);
12278 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
12281 case INVPCID_TYPE_INDIV_ADDR
:
12282 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
12283 is_noncanonical_address(operand
.gla
, vcpu
)) {
12284 kvm_inject_gp(vcpu
, 0);
12287 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
12288 return kvm_skip_emulated_instruction(vcpu
);
12290 case INVPCID_TYPE_SINGLE_CTXT
:
12291 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
12292 kvm_inject_gp(vcpu
, 0);
12296 kvm_invalidate_pcid(vcpu
, operand
.pcid
);
12297 return kvm_skip_emulated_instruction(vcpu
);
12299 case INVPCID_TYPE_ALL_NON_GLOBAL
:
12301 * Currently, KVM doesn't mark global entries in the shadow
12302 * page tables, so a non-global flush just degenerates to a
12303 * global flush. If needed, we could optimize this later by
12304 * keeping track of global entries in shadow page tables.
12308 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
12309 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12310 return kvm_skip_emulated_instruction(vcpu
);
12313 BUG(); /* We have already checked above that type <= 3 */
12316 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
12318 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
12320 struct kvm_run
*run
= vcpu
->run
;
12321 struct kvm_mmio_fragment
*frag
;
12324 BUG_ON(!vcpu
->mmio_needed
);
12326 /* Complete previous fragment */
12327 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
12328 len
= min(8u, frag
->len
);
12329 if (!vcpu
->mmio_is_write
)
12330 memcpy(frag
->data
, run
->mmio
.data
, len
);
12332 if (frag
->len
<= 8) {
12333 /* Switch to the next fragment. */
12335 vcpu
->mmio_cur_fragment
++;
12337 /* Go forward to the next mmio piece. */
12343 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
12344 vcpu
->mmio_needed
= 0;
12346 // VMG change, at this point, we're always done
12347 // RIP has already been advanced
12351 // More MMIO is needed
12352 run
->mmio
.phys_addr
= frag
->gpa
;
12353 run
->mmio
.len
= min(8u, frag
->len
);
12354 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
12355 if (run
->mmio
.is_write
)
12356 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12357 run
->exit_reason
= KVM_EXIT_MMIO
;
12359 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12364 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12368 struct kvm_mmio_fragment
*frag
;
12373 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12374 if (handled
== bytes
)
12381 /*TODO: Check if need to increment number of frags */
12382 frag
= vcpu
->mmio_fragments
;
12383 vcpu
->mmio_nr_fragments
= 1;
12388 vcpu
->mmio_needed
= 1;
12389 vcpu
->mmio_cur_fragment
= 0;
12391 vcpu
->run
->mmio
.phys_addr
= gpa
;
12392 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12393 vcpu
->run
->mmio
.is_write
= 1;
12394 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12395 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12397 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12401 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
12403 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12407 struct kvm_mmio_fragment
*frag
;
12412 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12413 if (handled
== bytes
)
12420 /*TODO: Check if need to increment number of frags */
12421 frag
= vcpu
->mmio_fragments
;
12422 vcpu
->mmio_nr_fragments
= 1;
12427 vcpu
->mmio_needed
= 1;
12428 vcpu
->mmio_cur_fragment
= 0;
12430 vcpu
->run
->mmio
.phys_addr
= gpa
;
12431 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12432 vcpu
->run
->mmio
.is_write
= 0;
12433 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12435 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12439 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
12441 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12442 unsigned int port
);
12444 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
12446 int size
= vcpu
->arch
.pio
.size
;
12447 int port
= vcpu
->arch
.pio
.port
;
12449 vcpu
->arch
.pio
.count
= 0;
12450 if (vcpu
->arch
.sev_pio_count
)
12451 return kvm_sev_es_outs(vcpu
, size
, port
);
12455 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12459 unsigned int count
=
12460 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12461 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
12463 /* memcpy done already by emulator_pio_out. */
12464 vcpu
->arch
.sev_pio_count
-= count
;
12465 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12469 /* Emulation done by the kernel. */
12470 if (!vcpu
->arch
.sev_pio_count
)
12474 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
12478 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12479 unsigned int port
);
12481 static void advance_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12483 unsigned count
= vcpu
->arch
.pio
.count
;
12484 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
12485 vcpu
->arch
.sev_pio_count
-= count
;
12486 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12489 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12491 int size
= vcpu
->arch
.pio
.size
;
12492 int port
= vcpu
->arch
.pio
.port
;
12494 advance_sev_es_emulated_ins(vcpu
);
12495 if (vcpu
->arch
.sev_pio_count
)
12496 return kvm_sev_es_ins(vcpu
, size
, port
);
12500 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12504 unsigned int count
=
12505 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12506 if (!__emulator_pio_in(vcpu
, size
, port
, count
))
12509 /* Emulation done by the kernel. */
12510 advance_sev_es_emulated_ins(vcpu
);
12511 if (!vcpu
->arch
.sev_pio_count
)
12515 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
12519 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
12520 unsigned int port
, void *data
, unsigned int count
,
12523 vcpu
->arch
.sev_pio_data
= data
;
12524 vcpu
->arch
.sev_pio_count
= count
;
12525 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
12526 : kvm_sev_es_outs(vcpu
, size
, port
);
12528 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
12530 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
12531 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
12532 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
12533 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
12534 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
12535 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
12536 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
12537 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
12538 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
12539 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
12540 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
12541 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
12542 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
12543 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
12544 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
12545 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
12546 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
12547 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
12548 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
12549 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
12550 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
12551 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
12552 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);
12553 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
12554 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
12555 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
12556 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);