2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 static bool __read_mostly report_ignored_msrs
= true;
111 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
113 unsigned int min_timer_period_us
= 200;
114 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
116 static bool __read_mostly kvmclock_periodic_sync
= true;
117 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
119 bool __read_mostly kvm_has_tsc_control
;
120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
121 u32 __read_mostly kvm_max_guest_tsc_khz
;
122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
123 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
125 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
127 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
131 static u32 __read_mostly tsc_tolerance_ppm
= 250;
132 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
135 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
136 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
138 static bool __read_mostly vector_hashing
= true;
139 module_param(vector_hashing
, bool, S_IRUGO
);
141 #define KVM_NR_SHARED_MSRS 16
143 struct kvm_shared_msrs_global
{
145 u32 msrs
[KVM_NR_SHARED_MSRS
];
148 struct kvm_shared_msrs
{
149 struct user_return_notifier urn
;
151 struct kvm_shared_msr_values
{
154 } values
[KVM_NR_SHARED_MSRS
];
157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
158 static struct kvm_shared_msrs __percpu
*shared_msrs
;
160 struct kvm_stats_debugfs_item debugfs_entries
[] = {
161 { "pf_fixed", VCPU_STAT(pf_fixed
) },
162 { "pf_guest", VCPU_STAT(pf_guest
) },
163 { "tlb_flush", VCPU_STAT(tlb_flush
) },
164 { "invlpg", VCPU_STAT(invlpg
) },
165 { "exits", VCPU_STAT(exits
) },
166 { "io_exits", VCPU_STAT(io_exits
) },
167 { "mmio_exits", VCPU_STAT(mmio_exits
) },
168 { "signal_exits", VCPU_STAT(signal_exits
) },
169 { "irq_window", VCPU_STAT(irq_window_exits
) },
170 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
171 { "halt_exits", VCPU_STAT(halt_exits
) },
172 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
173 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
174 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
175 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
176 { "hypercalls", VCPU_STAT(hypercalls
) },
177 { "request_irq", VCPU_STAT(request_irq_exits
) },
178 { "irq_exits", VCPU_STAT(irq_exits
) },
179 { "host_state_reload", VCPU_STAT(host_state_reload
) },
180 { "efer_reload", VCPU_STAT(efer_reload
) },
181 { "fpu_reload", VCPU_STAT(fpu_reload
) },
182 { "insn_emulation", VCPU_STAT(insn_emulation
) },
183 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
184 { "irq_injections", VCPU_STAT(irq_injections
) },
185 { "nmi_injections", VCPU_STAT(nmi_injections
) },
186 { "req_event", VCPU_STAT(req_event
) },
187 { "l1d_flush", VCPU_STAT(l1d_flush
) },
188 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
189 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
190 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
191 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
192 { "mmu_flooded", VM_STAT(mmu_flooded
) },
193 { "mmu_recycled", VM_STAT(mmu_recycled
) },
194 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
195 { "mmu_unsync", VM_STAT(mmu_unsync
) },
196 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
197 { "largepages", VM_STAT(lpages
) },
198 { "max_mmu_page_hash_collisions",
199 VM_STAT(max_mmu_page_hash_collisions
) },
203 u64 __read_mostly host_xcr0
;
205 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
207 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
210 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
211 vcpu
->arch
.apf
.gfns
[i
] = ~0;
214 static void kvm_on_user_return(struct user_return_notifier
*urn
)
217 struct kvm_shared_msrs
*locals
218 = container_of(urn
, struct kvm_shared_msrs
, urn
);
219 struct kvm_shared_msr_values
*values
;
223 * Disabling irqs at this point since the following code could be
224 * interrupted and executed through kvm_arch_hardware_disable()
226 local_irq_save(flags
);
227 if (locals
->registered
) {
228 locals
->registered
= false;
229 user_return_notifier_unregister(urn
);
231 local_irq_restore(flags
);
232 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
233 values
= &locals
->values
[slot
];
234 if (values
->host
!= values
->curr
) {
235 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
236 values
->curr
= values
->host
;
241 static void shared_msr_update(unsigned slot
, u32 msr
)
244 unsigned int cpu
= smp_processor_id();
245 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
247 /* only read, and nobody should modify it at this time,
248 * so don't need lock */
249 if (slot
>= shared_msrs_global
.nr
) {
250 printk(KERN_ERR
"kvm: invalid MSR slot!");
253 rdmsrl_safe(msr
, &value
);
254 smsr
->values
[slot
].host
= value
;
255 smsr
->values
[slot
].curr
= value
;
258 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
260 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
261 shared_msrs_global
.msrs
[slot
] = msr
;
262 if (slot
>= shared_msrs_global
.nr
)
263 shared_msrs_global
.nr
= slot
+ 1;
265 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
267 static void kvm_shared_msr_cpu_online(void)
271 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
272 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
275 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
277 unsigned int cpu
= smp_processor_id();
278 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
281 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
283 smsr
->values
[slot
].curr
= value
;
284 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
288 if (!smsr
->registered
) {
289 smsr
->urn
.on_user_return
= kvm_on_user_return
;
290 user_return_notifier_register(&smsr
->urn
);
291 smsr
->registered
= true;
295 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
297 static void drop_user_return_notifiers(void)
299 unsigned int cpu
= smp_processor_id();
300 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
302 if (smsr
->registered
)
303 kvm_on_user_return(&smsr
->urn
);
306 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
308 return vcpu
->arch
.apic_base
;
310 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
312 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
314 u64 old_state
= vcpu
->arch
.apic_base
&
315 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
316 u64 new_state
= msr_info
->data
&
317 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
318 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
319 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
321 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
323 if (!msr_info
->host_initiated
&&
324 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
325 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
326 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
330 kvm_lapic_set_base(vcpu
, msr_info
->data
);
333 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
335 asmlinkage __visible
void kvm_spurious_fault(void)
337 /* Fault while not rebooting. We want the trace. */
340 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
342 #define EXCPT_BENIGN 0
343 #define EXCPT_CONTRIBUTORY 1
346 static int exception_class(int vector
)
356 return EXCPT_CONTRIBUTORY
;
363 #define EXCPT_FAULT 0
365 #define EXCPT_ABORT 2
366 #define EXCPT_INTERRUPT 3
368 static int exception_type(int vector
)
372 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
373 return EXCPT_INTERRUPT
;
377 /* #DB is trap, as instruction watchpoints are handled elsewhere */
378 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
381 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
384 /* Reserved exceptions will result in fault */
388 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
389 unsigned nr
, bool has_error
, u32 error_code
,
395 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
397 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
399 if (has_error
&& !is_protmode(vcpu
))
403 * On vmentry, vcpu->arch.exception.pending is only
404 * true if an event injection was blocked by
405 * nested_run_pending. In that case, however,
406 * vcpu_enter_guest requests an immediate exit,
407 * and the guest shouldn't proceed far enough to
410 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
411 vcpu
->arch
.exception
.injected
= true;
413 vcpu
->arch
.exception
.pending
= true;
414 vcpu
->arch
.exception
.injected
= false;
416 vcpu
->arch
.exception
.has_error_code
= has_error
;
417 vcpu
->arch
.exception
.nr
= nr
;
418 vcpu
->arch
.exception
.error_code
= error_code
;
422 /* to check exception */
423 prev_nr
= vcpu
->arch
.exception
.nr
;
424 if (prev_nr
== DF_VECTOR
) {
425 /* triple fault -> shutdown */
426 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
429 class1
= exception_class(prev_nr
);
430 class2
= exception_class(nr
);
431 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
432 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
434 * Generate double fault per SDM Table 5-5. Set
435 * exception.pending = true so that the double fault
436 * can trigger a nested vmexit.
438 vcpu
->arch
.exception
.pending
= true;
439 vcpu
->arch
.exception
.injected
= false;
440 vcpu
->arch
.exception
.has_error_code
= true;
441 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
442 vcpu
->arch
.exception
.error_code
= 0;
444 /* replace previous exception with a new one in a hope
445 that instruction re-execution will regenerate lost
450 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
452 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
454 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
456 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
458 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
460 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
462 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
465 kvm_inject_gp(vcpu
, 0);
467 return kvm_skip_emulated_instruction(vcpu
);
471 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
473 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
475 ++vcpu
->stat
.pf_guest
;
476 vcpu
->arch
.exception
.nested_apf
=
477 is_guest_mode(vcpu
) && fault
->async_page_fault
;
478 if (vcpu
->arch
.exception
.nested_apf
)
479 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
481 vcpu
->arch
.cr2
= fault
->address
;
482 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
484 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
486 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
488 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
489 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
491 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
493 return fault
->nested_page_fault
;
496 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
498 atomic_inc(&vcpu
->arch
.nmi_queued
);
499 kvm_make_request(KVM_REQ_NMI
, vcpu
);
501 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
503 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
505 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
507 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
509 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
511 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
513 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
516 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
517 * a #GP and return false.
519 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
521 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
523 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
526 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
528 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
530 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
533 kvm_queue_exception(vcpu
, UD_VECTOR
);
536 EXPORT_SYMBOL_GPL(kvm_require_dr
);
539 * This function will be used to read from the physical memory of the currently
540 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
541 * can read from guest physical or from the guest's guest physical memory.
543 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
544 gfn_t ngfn
, void *data
, int offset
, int len
,
547 struct x86_exception exception
;
551 ngpa
= gfn_to_gpa(ngfn
);
552 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
553 if (real_gfn
== UNMAPPED_GVA
)
556 real_gfn
= gpa_to_gfn(real_gfn
);
558 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
560 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
562 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
563 void *data
, int offset
, int len
, u32 access
)
565 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
566 data
, offset
, len
, access
);
569 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
571 return rsvd_bits(cpuid_maxphyaddr(vcpu
), 63) | rsvd_bits(5, 8) |
576 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
578 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
580 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
581 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
584 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
586 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
587 offset
* sizeof(u64
), sizeof(pdpte
),
588 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
593 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
594 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
595 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
602 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
603 __set_bit(VCPU_EXREG_PDPTR
,
604 (unsigned long *)&vcpu
->arch
.regs_avail
);
605 __set_bit(VCPU_EXREG_PDPTR
,
606 (unsigned long *)&vcpu
->arch
.regs_dirty
);
611 EXPORT_SYMBOL_GPL(load_pdptrs
);
613 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
615 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
621 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
624 if (!test_bit(VCPU_EXREG_PDPTR
,
625 (unsigned long *)&vcpu
->arch
.regs_avail
))
628 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
629 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
630 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
631 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
634 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
639 EXPORT_SYMBOL_GPL(pdptrs_changed
);
641 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
643 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
644 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
649 if (cr0
& 0xffffffff00000000UL
)
653 cr0
&= ~CR0_RESERVED_BITS
;
655 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
658 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
661 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
663 if ((vcpu
->arch
.efer
& EFER_LME
)) {
668 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
673 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
678 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
681 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
683 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
684 kvm_clear_async_pf_completion_queue(vcpu
);
685 kvm_async_pf_hash_reset(vcpu
);
688 if ((cr0
^ old_cr0
) & update_bits
)
689 kvm_mmu_reset_context(vcpu
);
691 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
692 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
693 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
694 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
698 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
700 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
702 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
704 EXPORT_SYMBOL_GPL(kvm_lmsw
);
706 void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
708 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
709 !vcpu
->guest_xcr0_loaded
) {
710 /* kvm_set_xcr() also depends on this */
711 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
712 vcpu
->guest_xcr0_loaded
= 1;
715 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0
);
717 void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
719 if (vcpu
->guest_xcr0_loaded
) {
720 if (vcpu
->arch
.xcr0
!= host_xcr0
)
721 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
722 vcpu
->guest_xcr0_loaded
= 0;
725 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0
);
727 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
730 u64 old_xcr0
= vcpu
->arch
.xcr0
;
733 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
734 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
736 if (!(xcr0
& XFEATURE_MASK_FP
))
738 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
742 * Do not allow the guest to set bits that we do not support
743 * saving. However, xcr0 bit 0 is always set, even if the
744 * emulated CPU does not support XSAVE (see fx_init).
746 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
747 if (xcr0
& ~valid_bits
)
750 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
751 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
754 if (xcr0
& XFEATURE_MASK_AVX512
) {
755 if (!(xcr0
& XFEATURE_MASK_YMM
))
757 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
760 vcpu
->arch
.xcr0
= xcr0
;
762 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
763 kvm_update_cpuid(vcpu
);
767 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
769 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
770 __kvm_set_xcr(vcpu
, index
, xcr
)) {
771 kvm_inject_gp(vcpu
, 0);
776 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
778 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
780 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
781 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
782 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
784 if (cr4
& CR4_RESERVED_BITS
)
787 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
790 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
793 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
796 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
799 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
802 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
805 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
808 if (is_long_mode(vcpu
)) {
809 if (!(cr4
& X86_CR4_PAE
))
811 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
812 && ((cr4
^ old_cr4
) & pdptr_bits
)
813 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
817 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
818 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
821 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
822 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
826 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
829 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
830 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
831 kvm_mmu_reset_context(vcpu
);
833 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
834 kvm_update_cpuid(vcpu
);
838 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
840 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
843 cr3
&= ~CR3_PCID_INVD
;
846 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
847 kvm_mmu_sync_roots(vcpu
);
848 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
852 if (is_long_mode(vcpu
) &&
853 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 63)))
855 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
856 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
859 vcpu
->arch
.cr3
= cr3
;
860 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
861 kvm_mmu_new_cr3(vcpu
);
864 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
866 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
868 if (cr8
& CR8_RESERVED_BITS
)
870 if (lapic_in_kernel(vcpu
))
871 kvm_lapic_set_tpr(vcpu
, cr8
);
873 vcpu
->arch
.cr8
= cr8
;
876 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
878 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
880 if (lapic_in_kernel(vcpu
))
881 return kvm_lapic_get_cr8(vcpu
);
883 return vcpu
->arch
.cr8
;
885 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
887 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
891 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
892 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
893 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
894 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
898 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
900 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
901 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
904 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
908 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
909 dr7
= vcpu
->arch
.guest_debug_dr7
;
911 dr7
= vcpu
->arch
.dr7
;
912 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
913 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
914 if (dr7
& DR7_BP_EN_MASK
)
915 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
918 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
920 u64 fixed
= DR6_FIXED_1
;
922 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
927 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
931 vcpu
->arch
.db
[dr
] = val
;
932 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
933 vcpu
->arch
.eff_db
[dr
] = val
;
938 if (val
& 0xffffffff00000000ULL
)
940 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
941 kvm_update_dr6(vcpu
);
946 if (val
& 0xffffffff00000000ULL
)
948 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
949 kvm_update_dr7(vcpu
);
956 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
958 if (__kvm_set_dr(vcpu
, dr
, val
)) {
959 kvm_inject_gp(vcpu
, 0);
964 EXPORT_SYMBOL_GPL(kvm_set_dr
);
966 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
970 *val
= vcpu
->arch
.db
[dr
];
975 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
976 *val
= vcpu
->arch
.dr6
;
978 *val
= kvm_x86_ops
->get_dr6(vcpu
);
983 *val
= vcpu
->arch
.dr7
;
988 EXPORT_SYMBOL_GPL(kvm_get_dr
);
990 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
992 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
996 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
999 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
1000 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
1003 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
1006 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1007 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1009 * This list is modified at module load time to reflect the
1010 * capabilities of the host cpu. This capabilities test skips MSRs that are
1011 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1012 * may depend on host virtualization features rather than host cpu features.
1015 static u32 msrs_to_save
[] = {
1016 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1018 #ifdef CONFIG_X86_64
1019 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1021 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1022 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1023 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1026 static unsigned num_msrs_to_save
;
1028 static u32 emulated_msrs
[] = {
1029 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1030 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1031 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1032 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1033 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1034 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1035 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1037 HV_X64_MSR_VP_INDEX
,
1038 HV_X64_MSR_VP_RUNTIME
,
1039 HV_X64_MSR_SCONTROL
,
1040 HV_X64_MSR_STIMER0_CONFIG
,
1041 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1044 MSR_IA32_TSC_ADJUST
,
1045 MSR_IA32_TSCDEADLINE
,
1046 MSR_IA32_MISC_ENABLE
,
1047 MSR_IA32_MCG_STATUS
,
1049 MSR_IA32_MCG_EXT_CTL
,
1052 MSR_MISC_FEATURES_ENABLES
,
1053 MSR_AMD64_VIRT_SPEC_CTRL
,
1056 static unsigned num_emulated_msrs
;
1059 * List of msr numbers which are used to expose MSR-based features that
1060 * can be used by a hypervisor to validate requested CPU features.
1062 static u32 msr_based_features
[] = {
1065 MSR_IA32_ARCH_CAPABILITIES
,
1068 static unsigned int num_msr_based_features
;
1070 u64
kvm_get_arch_capabilities(void)
1074 rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES
, &data
);
1077 * If we're doing cache flushes (either "always" or "cond")
1078 * we will do one whenever the guest does a vmlaunch/vmresume.
1079 * If an outer hypervisor is doing the cache flush for us
1080 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1081 * capability to the guest too, and if EPT is disabled we're not
1082 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1083 * require a nested hypervisor to do a flush of its own.
1085 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1086 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1088 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1089 data
|= ARCH_CAP_RDCL_NO
;
1090 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1091 data
|= ARCH_CAP_SSB_NO
;
1092 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1093 data
|= ARCH_CAP_MDS_NO
;
1096 * On TAA affected systems, export MDS_NO=0 when:
1097 * - TSX is enabled on the host, i.e. X86_FEATURE_RTM=1.
1098 * - Updated microcode is present. This is detected by
1099 * the presence of ARCH_CAP_TSX_CTRL_MSR and ensures
1100 * that VERW clears CPU buffers.
1102 * When MDS_NO=0 is exported, guests deploy clear CPU buffer
1103 * mitigation and don't complain:
1105 * "Vulnerable: Clear CPU buffers attempted, no microcode"
1107 * If TSX is disabled on the system, guests are also mitigated against
1108 * TAA and clear CPU buffer mitigation is not required for guests.
1110 if (boot_cpu_has_bug(X86_BUG_TAA
) && boot_cpu_has(X86_FEATURE_RTM
) &&
1111 (data
& ARCH_CAP_TSX_CTRL_MSR
))
1112 data
&= ~ARCH_CAP_MDS_NO
;
1117 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities
);
1119 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1121 switch (msr
->index
) {
1122 case MSR_IA32_ARCH_CAPABILITIES
:
1123 msr
->data
= kvm_get_arch_capabilities();
1125 case MSR_IA32_UCODE_REV
:
1126 rdmsrl_safe(msr
->index
, &msr
->data
);
1129 if (kvm_x86_ops
->get_msr_feature(msr
))
1135 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1137 struct kvm_msr_entry msr
;
1141 r
= kvm_get_msr_feature(&msr
);
1150 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1152 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1155 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1161 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1163 if (efer
& efer_reserved_bits
)
1166 return __kvm_valid_efer(vcpu
, efer
);
1168 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1170 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1172 u64 old_efer
= vcpu
->arch
.efer
;
1173 u64 efer
= msr_info
->data
;
1175 if (efer
& efer_reserved_bits
)
1178 if (!msr_info
->host_initiated
) {
1179 if (!__kvm_valid_efer(vcpu
, efer
))
1182 if (is_paging(vcpu
) &&
1183 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1188 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1190 kvm_x86_ops
->set_efer(vcpu
, efer
);
1192 /* Update reserved bits */
1193 if ((efer
^ old_efer
) & EFER_NX
)
1194 kvm_mmu_reset_context(vcpu
);
1199 void kvm_enable_efer_bits(u64 mask
)
1201 efer_reserved_bits
&= ~mask
;
1203 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1206 * Writes msr value into into the appropriate "register".
1207 * Returns 0 on success, non-0 otherwise.
1208 * Assumes vcpu_load() was already called.
1210 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1212 switch (msr
->index
) {
1215 case MSR_KERNEL_GS_BASE
:
1218 if (is_noncanonical_address(msr
->data
, vcpu
))
1221 case MSR_IA32_SYSENTER_EIP
:
1222 case MSR_IA32_SYSENTER_ESP
:
1224 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1225 * non-canonical address is written on Intel but not on
1226 * AMD (which ignores the top 32-bits, because it does
1227 * not implement 64-bit SYSENTER).
1229 * 64-bit code should hence be able to write a non-canonical
1230 * value on AMD. Making the address canonical ensures that
1231 * vmentry does not fail on Intel after writing a non-canonical
1232 * value, and that something deterministic happens if the guest
1233 * invokes 64-bit SYSENTER.
1235 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1237 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1239 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1242 * Adapt set_msr() to msr_io()'s calling convention
1244 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1246 struct msr_data msr
;
1250 msr
.host_initiated
= true;
1251 r
= kvm_get_msr(vcpu
, &msr
);
1259 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1261 struct msr_data msr
;
1265 msr
.host_initiated
= true;
1266 return kvm_set_msr(vcpu
, &msr
);
1269 #ifdef CONFIG_X86_64
1270 struct pvclock_gtod_data
{
1273 struct { /* extract of a clocksource struct */
1286 static struct pvclock_gtod_data pvclock_gtod_data
;
1288 static void update_pvclock_gtod(struct timekeeper
*tk
)
1290 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1293 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1295 write_seqcount_begin(&vdata
->seq
);
1297 /* copy pvclock gtod data */
1298 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1299 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1300 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1301 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1302 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1304 vdata
->boot_ns
= boot_ns
;
1305 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1307 vdata
->wall_time_sec
= tk
->xtime_sec
;
1309 write_seqcount_end(&vdata
->seq
);
1313 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1316 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1317 * vcpu_enter_guest. This function is only called from
1318 * the physical CPU that is running vcpu.
1320 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1323 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1327 struct pvclock_wall_clock wc
;
1328 struct timespec64 boot
;
1333 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1338 ++version
; /* first time write, random junk */
1342 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1346 * The guest calculates current wall clock time by adding
1347 * system time (updated by kvm_guest_time_update below) to the
1348 * wall clock specified here. guest system time equals host
1349 * system time for us, thus we must fill in host boot time here.
1351 getboottime64(&boot
);
1353 if (kvm
->arch
.kvmclock_offset
) {
1354 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1355 boot
= timespec64_sub(boot
, ts
);
1357 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1358 wc
.nsec
= boot
.tv_nsec
;
1359 wc
.version
= version
;
1361 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1364 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1367 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1369 do_shl32_div32(dividend
, divisor
);
1373 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1374 s8
*pshift
, u32
*pmultiplier
)
1382 scaled64
= scaled_hz
;
1383 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1388 tps32
= (uint32_t)tps64
;
1389 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1390 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1398 *pmultiplier
= div_frac(scaled64
, tps32
);
1400 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1401 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1404 #ifdef CONFIG_X86_64
1405 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1408 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1409 static unsigned long max_tsc_khz
;
1411 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1413 u64 v
= (u64
)khz
* (1000000 + ppm
);
1418 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1422 /* Guest TSC same frequency as host TSC? */
1424 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1428 /* TSC scaling supported? */
1429 if (!kvm_has_tsc_control
) {
1430 if (user_tsc_khz
> tsc_khz
) {
1431 vcpu
->arch
.tsc_catchup
= 1;
1432 vcpu
->arch
.tsc_always_catchup
= 1;
1435 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1440 /* TSC scaling required - calculate ratio */
1441 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1442 user_tsc_khz
, tsc_khz
);
1444 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1445 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1450 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1454 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1456 u32 thresh_lo
, thresh_hi
;
1457 int use_scaling
= 0;
1459 /* tsc_khz can be zero if TSC calibration fails */
1460 if (user_tsc_khz
== 0) {
1461 /* set tsc_scaling_ratio to a safe value */
1462 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1466 /* Compute a scale to convert nanoseconds in TSC cycles */
1467 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1468 &vcpu
->arch
.virtual_tsc_shift
,
1469 &vcpu
->arch
.virtual_tsc_mult
);
1470 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1473 * Compute the variation in TSC rate which is acceptable
1474 * within the range of tolerance and decide if the
1475 * rate being applied is within that bounds of the hardware
1476 * rate. If so, no scaling or compensation need be done.
1478 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1479 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1480 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1481 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1484 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1487 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1489 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1490 vcpu
->arch
.virtual_tsc_mult
,
1491 vcpu
->arch
.virtual_tsc_shift
);
1492 tsc
+= vcpu
->arch
.this_tsc_write
;
1496 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1498 #ifdef CONFIG_X86_64
1500 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1501 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1503 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1504 atomic_read(&vcpu
->kvm
->online_vcpus
));
1507 * Once the masterclock is enabled, always perform request in
1508 * order to update it.
1510 * In order to enable masterclock, the host clocksource must be TSC
1511 * and the vcpus need to have matched TSCs. When that happens,
1512 * perform request to enable masterclock.
1514 if (ka
->use_master_clock
||
1515 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1516 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1518 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1519 atomic_read(&vcpu
->kvm
->online_vcpus
),
1520 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1524 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1526 u64 curr_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1527 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1531 * Multiply tsc by a fixed point number represented by ratio.
1533 * The most significant 64-N bits (mult) of ratio represent the
1534 * integral part of the fixed point number; the remaining N bits
1535 * (frac) represent the fractional part, ie. ratio represents a fixed
1536 * point number (mult + frac * 2^(-N)).
1538 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1540 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1542 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1545 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1548 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1550 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1551 _tsc
= __scale_tsc(ratio
, tsc
);
1555 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1557 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1561 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1563 return target_tsc
- tsc
;
1566 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1568 u64 tsc_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1570 return tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1572 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1574 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1576 vcpu
->arch
.tsc_offset
= kvm_x86_ops
->write_l1_tsc_offset(vcpu
, offset
);
1579 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1581 struct kvm
*kvm
= vcpu
->kvm
;
1582 u64 offset
, ns
, elapsed
;
1583 unsigned long flags
;
1585 bool already_matched
;
1586 u64 data
= msr
->data
;
1587 bool synchronizing
= false;
1589 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1590 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1591 ns
= ktime_get_boot_ns();
1592 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1594 if (vcpu
->arch
.virtual_tsc_khz
) {
1595 if (data
== 0 && msr
->host_initiated
) {
1597 * detection of vcpu initialization -- need to sync
1598 * with other vCPUs. This particularly helps to keep
1599 * kvm_clock stable after CPU hotplug
1601 synchronizing
= true;
1603 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1604 nsec_to_cycles(vcpu
, elapsed
);
1605 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1607 * Special case: TSC write with a small delta (1 second)
1608 * of virtual cycle time against real time is
1609 * interpreted as an attempt to synchronize the CPU.
1611 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1612 data
+ tsc_hz
> tsc_exp
;
1617 * For a reliable TSC, we can match TSC offsets, and for an unstable
1618 * TSC, we add elapsed time in this computation. We could let the
1619 * compensation code attempt to catch up if we fall behind, but
1620 * it's better to try to match offsets from the beginning.
1622 if (synchronizing
&&
1623 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1624 if (!check_tsc_unstable()) {
1625 offset
= kvm
->arch
.cur_tsc_offset
;
1626 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1628 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1630 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1631 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1634 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1637 * We split periods of matched TSC writes into generations.
1638 * For each generation, we track the original measured
1639 * nanosecond time, offset, and write, so if TSCs are in
1640 * sync, we can match exact offset, and if not, we can match
1641 * exact software computation in compute_guest_tsc()
1643 * These values are tracked in kvm->arch.cur_xxx variables.
1645 kvm
->arch
.cur_tsc_generation
++;
1646 kvm
->arch
.cur_tsc_nsec
= ns
;
1647 kvm
->arch
.cur_tsc_write
= data
;
1648 kvm
->arch
.cur_tsc_offset
= offset
;
1650 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1651 kvm
->arch
.cur_tsc_generation
, data
);
1655 * We also track th most recent recorded KHZ, write and time to
1656 * allow the matching interval to be extended at each write.
1658 kvm
->arch
.last_tsc_nsec
= ns
;
1659 kvm
->arch
.last_tsc_write
= data
;
1660 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1662 vcpu
->arch
.last_guest_tsc
= data
;
1664 /* Keep track of which generation this VCPU has synchronized to */
1665 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1666 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1667 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1669 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1670 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1672 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1673 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1675 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1677 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1678 } else if (!already_matched
) {
1679 kvm
->arch
.nr_vcpus_matched_tsc
++;
1682 kvm_track_tsc_matching(vcpu
);
1683 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1686 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1688 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1691 u64 tsc_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1692 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
1695 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1697 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1698 WARN_ON(adjustment
< 0);
1699 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1700 adjust_tsc_offset_guest(vcpu
, adjustment
);
1703 #ifdef CONFIG_X86_64
1705 static u64
read_tsc(void)
1707 u64 ret
= (u64
)rdtsc_ordered();
1708 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1710 if (likely(ret
>= last
))
1714 * GCC likes to generate cmov here, but this branch is extremely
1715 * predictable (it's just a function of time and the likely is
1716 * very likely) and there's a data dependence, so force GCC
1717 * to generate a branch instead. I don't barrier() because
1718 * we don't actually need a barrier, and if this function
1719 * ever gets inlined it will generate worse code.
1725 static inline u64
vgettsc(u64
*cycle_now
)
1728 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1730 *cycle_now
= read_tsc();
1732 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1733 return v
* gtod
->clock
.mult
;
1736 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1738 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1744 seq
= read_seqcount_begin(>od
->seq
);
1745 mode
= gtod
->clock
.vclock_mode
;
1746 ns
= gtod
->nsec_base
;
1747 ns
+= vgettsc(cycle_now
);
1748 ns
>>= gtod
->clock
.shift
;
1749 ns
+= gtod
->boot_ns
;
1750 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1756 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1758 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1764 seq
= read_seqcount_begin(>od
->seq
);
1765 mode
= gtod
->clock
.vclock_mode
;
1766 ts
->tv_sec
= gtod
->wall_time_sec
;
1767 ns
= gtod
->nsec_base
;
1768 ns
+= vgettsc(cycle_now
);
1769 ns
>>= gtod
->clock
.shift
;
1770 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1772 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1778 /* returns true if host is using tsc clocksource */
1779 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1781 /* checked again under seqlock below */
1782 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1785 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1788 /* returns true if host is using tsc clocksource */
1789 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1792 /* checked again under seqlock below */
1793 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1796 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1802 * Assuming a stable TSC across physical CPUS, and a stable TSC
1803 * across virtual CPUs, the following condition is possible.
1804 * Each numbered line represents an event visible to both
1805 * CPUs at the next numbered event.
1807 * "timespecX" represents host monotonic time. "tscX" represents
1810 * VCPU0 on CPU0 | VCPU1 on CPU1
1812 * 1. read timespec0,tsc0
1813 * 2. | timespec1 = timespec0 + N
1815 * 3. transition to guest | transition to guest
1816 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1817 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1818 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1820 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1823 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1825 * - 0 < N - M => M < N
1827 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1828 * always the case (the difference between two distinct xtime instances
1829 * might be smaller then the difference between corresponding TSC reads,
1830 * when updating guest vcpus pvclock areas).
1832 * To avoid that problem, do not allow visibility of distinct
1833 * system_timestamp/tsc_timestamp values simultaneously: use a master
1834 * copy of host monotonic time values. Update that master copy
1837 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1841 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1843 #ifdef CONFIG_X86_64
1844 struct kvm_arch
*ka
= &kvm
->arch
;
1846 bool host_tsc_clocksource
, vcpus_matched
;
1848 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1849 atomic_read(&kvm
->online_vcpus
));
1852 * If the host uses TSC clock, then passthrough TSC as stable
1855 host_tsc_clocksource
= kvm_get_time_and_clockread(
1856 &ka
->master_kernel_ns
,
1857 &ka
->master_cycle_now
);
1859 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1860 && !ka
->backwards_tsc_observed
1861 && !ka
->boot_vcpu_runs_old_kvmclock
;
1863 if (ka
->use_master_clock
)
1864 atomic_set(&kvm_guest_has_master_clock
, 1);
1866 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1867 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1872 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1874 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1877 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1879 #ifdef CONFIG_X86_64
1881 struct kvm_vcpu
*vcpu
;
1882 struct kvm_arch
*ka
= &kvm
->arch
;
1884 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1885 kvm_make_mclock_inprogress_request(kvm
);
1886 /* no guest entries from this point */
1887 pvclock_update_vm_gtod_copy(kvm
);
1889 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1890 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1892 /* guest entries allowed */
1893 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1894 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1896 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1900 u64
get_kvmclock_ns(struct kvm
*kvm
)
1902 struct kvm_arch
*ka
= &kvm
->arch
;
1903 struct pvclock_vcpu_time_info hv_clock
;
1906 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1907 if (!ka
->use_master_clock
) {
1908 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1909 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1912 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1913 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1914 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1916 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1919 if (__this_cpu_read(cpu_tsc_khz
)) {
1920 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1921 &hv_clock
.tsc_shift
,
1922 &hv_clock
.tsc_to_system_mul
);
1923 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1925 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1932 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1934 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1935 struct pvclock_vcpu_time_info guest_hv_clock
;
1937 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1938 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1941 /* This VCPU is paused, but it's legal for a guest to read another
1942 * VCPU's kvmclock, so we really have to follow the specification where
1943 * it says that version is odd if data is being modified, and even after
1946 * Version field updates must be kept separate. This is because
1947 * kvm_write_guest_cached might use a "rep movs" instruction, and
1948 * writes within a string instruction are weakly ordered. So there
1949 * are three writes overall.
1951 * As a small optimization, only write the version field in the first
1952 * and third write. The vcpu->pv_time cache is still valid, because the
1953 * version field is the first in the struct.
1955 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1957 if (guest_hv_clock
.version
& 1)
1958 ++guest_hv_clock
.version
; /* first time write, random junk */
1960 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1961 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1963 sizeof(vcpu
->hv_clock
.version
));
1967 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1968 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1970 if (vcpu
->pvclock_set_guest_stopped_request
) {
1971 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1972 vcpu
->pvclock_set_guest_stopped_request
= false;
1975 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1977 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1979 sizeof(vcpu
->hv_clock
));
1983 vcpu
->hv_clock
.version
++;
1984 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1986 sizeof(vcpu
->hv_clock
.version
));
1989 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1991 unsigned long flags
, tgt_tsc_khz
;
1992 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1993 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1995 u64 tsc_timestamp
, host_tsc
;
1997 bool use_master_clock
;
2003 * If the host uses TSC clock, then passthrough TSC as stable
2006 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2007 use_master_clock
= ka
->use_master_clock
;
2008 if (use_master_clock
) {
2009 host_tsc
= ka
->master_cycle_now
;
2010 kernel_ns
= ka
->master_kernel_ns
;
2012 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2014 /* Keep irq disabled to prevent changes to the clock */
2015 local_irq_save(flags
);
2016 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2017 if (unlikely(tgt_tsc_khz
== 0)) {
2018 local_irq_restore(flags
);
2019 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2022 if (!use_master_clock
) {
2024 kernel_ns
= ktime_get_boot_ns();
2027 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2030 * We may have to catch up the TSC to match elapsed wall clock
2031 * time for two reasons, even if kvmclock is used.
2032 * 1) CPU could have been running below the maximum TSC rate
2033 * 2) Broken TSC compensation resets the base at each VCPU
2034 * entry to avoid unknown leaps of TSC even when running
2035 * again on the same CPU. This may cause apparent elapsed
2036 * time to disappear, and the guest to stand still or run
2039 if (vcpu
->tsc_catchup
) {
2040 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2041 if (tsc
> tsc_timestamp
) {
2042 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2043 tsc_timestamp
= tsc
;
2047 local_irq_restore(flags
);
2049 /* With all the info we got, fill in the values */
2051 if (kvm_has_tsc_control
)
2052 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2054 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2055 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2056 &vcpu
->hv_clock
.tsc_shift
,
2057 &vcpu
->hv_clock
.tsc_to_system_mul
);
2058 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2061 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2062 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2063 vcpu
->last_guest_tsc
= tsc_timestamp
;
2065 /* If the host uses TSC clocksource, then it is stable */
2067 if (use_master_clock
)
2068 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2070 vcpu
->hv_clock
.flags
= pvclock_flags
;
2072 if (vcpu
->pv_time_enabled
)
2073 kvm_setup_pvclock_page(v
);
2074 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2075 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2080 * kvmclock updates which are isolated to a given vcpu, such as
2081 * vcpu->cpu migration, should not allow system_timestamp from
2082 * the rest of the vcpus to remain static. Otherwise ntp frequency
2083 * correction applies to one vcpu's system_timestamp but not
2086 * So in those cases, request a kvmclock update for all vcpus.
2087 * We need to rate-limit these requests though, as they can
2088 * considerably slow guests that have a large number of vcpus.
2089 * The time for a remote vcpu to update its kvmclock is bound
2090 * by the delay we use to rate-limit the updates.
2093 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2095 static void kvmclock_update_fn(struct work_struct
*work
)
2098 struct delayed_work
*dwork
= to_delayed_work(work
);
2099 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2100 kvmclock_update_work
);
2101 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2102 struct kvm_vcpu
*vcpu
;
2104 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2105 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2106 kvm_vcpu_kick(vcpu
);
2110 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2112 struct kvm
*kvm
= v
->kvm
;
2114 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2115 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2116 KVMCLOCK_UPDATE_DELAY
);
2119 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2121 static void kvmclock_sync_fn(struct work_struct
*work
)
2123 struct delayed_work
*dwork
= to_delayed_work(work
);
2124 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2125 kvmclock_sync_work
);
2126 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2128 if (!kvmclock_periodic_sync
)
2131 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2132 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2133 KVMCLOCK_SYNC_PERIOD
);
2136 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2138 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2139 unsigned bank_num
= mcg_cap
& 0xff;
2140 u32 msr
= msr_info
->index
;
2141 u64 data
= msr_info
->data
;
2144 case MSR_IA32_MCG_STATUS
:
2145 vcpu
->arch
.mcg_status
= data
;
2147 case MSR_IA32_MCG_CTL
:
2148 if (!(mcg_cap
& MCG_CTL_P
) &&
2149 (data
|| !msr_info
->host_initiated
))
2151 if (data
!= 0 && data
!= ~(u64
)0)
2153 vcpu
->arch
.mcg_ctl
= data
;
2156 if (msr
>= MSR_IA32_MC0_CTL
&&
2157 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2158 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2159 /* only 0 or all 1s can be written to IA32_MCi_CTL
2160 * some Linux kernels though clear bit 10 in bank 4 to
2161 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2162 * this to avoid an uncatched #GP in the guest
2164 if ((offset
& 0x3) == 0 &&
2165 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2167 if (!msr_info
->host_initiated
&&
2168 (offset
& 0x3) == 1 && data
!= 0)
2170 vcpu
->arch
.mce_banks
[offset
] = data
;
2178 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2180 struct kvm
*kvm
= vcpu
->kvm
;
2181 int lm
= is_long_mode(vcpu
);
2182 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2183 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2184 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2185 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2186 u32 page_num
= data
& ~PAGE_MASK
;
2187 u64 page_addr
= data
& PAGE_MASK
;
2192 if (page_num
>= blob_size
)
2195 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2200 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2209 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2211 gpa_t gpa
= data
& ~0x3f;
2213 /* Bits 3:5 are reserved, Should be zero */
2217 vcpu
->arch
.apf
.msr_val
= data
;
2219 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2220 kvm_clear_async_pf_completion_queue(vcpu
);
2221 kvm_async_pf_hash_reset(vcpu
);
2225 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2229 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2230 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2231 kvm_async_pf_wakeup_all(vcpu
);
2235 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2237 vcpu
->arch
.pv_time_enabled
= false;
2240 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2242 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2245 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2246 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2249 vcpu
->arch
.st
.steal
.preempted
= 0;
2251 if (vcpu
->arch
.st
.steal
.version
& 1)
2252 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2254 vcpu
->arch
.st
.steal
.version
+= 1;
2256 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2257 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2261 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2262 vcpu
->arch
.st
.last_steal
;
2263 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2265 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2266 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2270 vcpu
->arch
.st
.steal
.version
+= 1;
2272 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2273 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2276 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2279 u32 msr
= msr_info
->index
;
2280 u64 data
= msr_info
->data
;
2283 case MSR_AMD64_NB_CFG
:
2284 case MSR_IA32_UCODE_WRITE
:
2285 case MSR_VM_HSAVE_PA
:
2286 case MSR_AMD64_PATCH_LOADER
:
2287 case MSR_AMD64_BU_CFG2
:
2288 case MSR_AMD64_DC_CFG
:
2289 case MSR_F15H_EX_CFG
:
2292 case MSR_IA32_UCODE_REV
:
2293 if (msr_info
->host_initiated
)
2294 vcpu
->arch
.microcode_version
= data
;
2296 case MSR_IA32_ARCH_CAPABILITIES
:
2297 if (!msr_info
->host_initiated
)
2299 vcpu
->arch
.arch_capabilities
= data
;
2302 return set_efer(vcpu
, msr_info
);
2304 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2305 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2306 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2307 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2309 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2314 case MSR_FAM10H_MMIO_CONF_BASE
:
2316 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2321 case MSR_IA32_DEBUGCTLMSR
:
2323 /* We support the non-activated case already */
2325 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2326 /* Values other than LBR and BTF are vendor-specific,
2327 thus reserved and should throw a #GP */
2330 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2333 case 0x200 ... 0x2ff:
2334 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2335 case MSR_IA32_APICBASE
:
2336 return kvm_set_apic_base(vcpu
, msr_info
);
2337 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2338 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2339 case MSR_IA32_TSCDEADLINE
:
2340 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2342 case MSR_IA32_TSC_ADJUST
:
2343 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2344 if (!msr_info
->host_initiated
) {
2345 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2346 adjust_tsc_offset_guest(vcpu
, adj
);
2348 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2351 case MSR_IA32_MISC_ENABLE
:
2352 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2354 case MSR_IA32_SMBASE
:
2355 if (!msr_info
->host_initiated
)
2357 vcpu
->arch
.smbase
= data
;
2360 kvm_write_tsc(vcpu
, msr_info
);
2362 case MSR_KVM_WALL_CLOCK_NEW
:
2363 case MSR_KVM_WALL_CLOCK
:
2364 vcpu
->kvm
->arch
.wall_clock
= data
;
2365 kvm_write_wall_clock(vcpu
->kvm
, data
);
2367 case MSR_KVM_SYSTEM_TIME_NEW
:
2368 case MSR_KVM_SYSTEM_TIME
: {
2369 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2371 kvmclock_reset(vcpu
);
2373 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2374 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2376 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2377 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2379 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2382 vcpu
->arch
.time
= data
;
2383 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2385 /* we verify if the enable bit is set... */
2389 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2390 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2391 sizeof(struct pvclock_vcpu_time_info
)))
2392 vcpu
->arch
.pv_time_enabled
= false;
2394 vcpu
->arch
.pv_time_enabled
= true;
2398 case MSR_KVM_ASYNC_PF_EN
:
2399 if (kvm_pv_enable_async_pf(vcpu
, data
))
2402 case MSR_KVM_STEAL_TIME
:
2404 if (unlikely(!sched_info_on()))
2407 if (data
& KVM_STEAL_RESERVED_MASK
)
2410 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2411 data
& KVM_STEAL_VALID_BITS
,
2412 sizeof(struct kvm_steal_time
)))
2415 vcpu
->arch
.st
.msr_val
= data
;
2417 if (!(data
& KVM_MSR_ENABLED
))
2420 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2423 case MSR_KVM_PV_EOI_EN
:
2424 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2428 case MSR_IA32_MCG_CTL
:
2429 case MSR_IA32_MCG_STATUS
:
2430 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2431 return set_msr_mce(vcpu
, msr_info
);
2433 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2434 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2435 pr
= true; /* fall through */
2436 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2437 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2438 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2439 return kvm_pmu_set_msr(vcpu
, msr_info
);
2441 if (pr
|| data
!= 0)
2442 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2443 "0x%x data 0x%llx\n", msr
, data
);
2445 case MSR_K7_CLK_CTL
:
2447 * Ignore all writes to this no longer documented MSR.
2448 * Writes are only relevant for old K7 processors,
2449 * all pre-dating SVM, but a recommended workaround from
2450 * AMD for these chips. It is possible to specify the
2451 * affected processor models on the command line, hence
2452 * the need to ignore the workaround.
2455 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2456 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2457 case HV_X64_MSR_CRASH_CTL
:
2458 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2459 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2460 msr_info
->host_initiated
);
2461 case MSR_IA32_BBL_CR_CTL3
:
2462 /* Drop writes to this legacy MSR -- see rdmsr
2463 * counterpart for further detail.
2465 if (report_ignored_msrs
)
2466 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2469 case MSR_AMD64_OSVW_ID_LENGTH
:
2470 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2472 vcpu
->arch
.osvw
.length
= data
;
2474 case MSR_AMD64_OSVW_STATUS
:
2475 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2477 vcpu
->arch
.osvw
.status
= data
;
2479 case MSR_PLATFORM_INFO
:
2480 if (!msr_info
->host_initiated
||
2481 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2482 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2483 cpuid_fault_enabled(vcpu
)))
2485 vcpu
->arch
.msr_platform_info
= data
;
2487 case MSR_MISC_FEATURES_ENABLES
:
2488 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2489 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2490 !supports_cpuid_fault(vcpu
)))
2492 vcpu
->arch
.msr_misc_features_enables
= data
;
2495 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2496 return xen_hvm_config(vcpu
, data
);
2497 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2498 return kvm_pmu_set_msr(vcpu
, msr_info
);
2500 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2504 if (report_ignored_msrs
)
2506 "ignored wrmsr: 0x%x data 0x%llx\n",
2513 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2517 * Reads an msr value (of 'msr_index') into 'pdata'.
2518 * Returns 0 on success, non-0 otherwise.
2519 * Assumes vcpu_load() was already called.
2521 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2523 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2525 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2527 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
2530 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2531 unsigned bank_num
= mcg_cap
& 0xff;
2534 case MSR_IA32_P5_MC_ADDR
:
2535 case MSR_IA32_P5_MC_TYPE
:
2538 case MSR_IA32_MCG_CAP
:
2539 data
= vcpu
->arch
.mcg_cap
;
2541 case MSR_IA32_MCG_CTL
:
2542 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
2544 data
= vcpu
->arch
.mcg_ctl
;
2546 case MSR_IA32_MCG_STATUS
:
2547 data
= vcpu
->arch
.mcg_status
;
2550 if (msr
>= MSR_IA32_MC0_CTL
&&
2551 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2552 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2553 data
= vcpu
->arch
.mce_banks
[offset
];
2562 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2564 switch (msr_info
->index
) {
2565 case MSR_IA32_PLATFORM_ID
:
2566 case MSR_IA32_EBL_CR_POWERON
:
2567 case MSR_IA32_DEBUGCTLMSR
:
2568 case MSR_IA32_LASTBRANCHFROMIP
:
2569 case MSR_IA32_LASTBRANCHTOIP
:
2570 case MSR_IA32_LASTINTFROMIP
:
2571 case MSR_IA32_LASTINTTOIP
:
2573 case MSR_K8_TSEG_ADDR
:
2574 case MSR_K8_TSEG_MASK
:
2576 case MSR_VM_HSAVE_PA
:
2577 case MSR_K8_INT_PENDING_MSG
:
2578 case MSR_AMD64_NB_CFG
:
2579 case MSR_FAM10H_MMIO_CONF_BASE
:
2580 case MSR_AMD64_BU_CFG2
:
2581 case MSR_IA32_PERF_CTL
:
2582 case MSR_AMD64_DC_CFG
:
2583 case MSR_F15H_EX_CFG
:
2586 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2587 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2588 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2589 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2590 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2591 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2594 case MSR_IA32_UCODE_REV
:
2595 msr_info
->data
= vcpu
->arch
.microcode_version
;
2598 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + vcpu
->arch
.tsc_offset
;
2600 case MSR_IA32_ARCH_CAPABILITIES
:
2601 if (!msr_info
->host_initiated
&&
2602 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
2604 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
2607 case 0x200 ... 0x2ff:
2608 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2609 case 0xcd: /* fsb frequency */
2613 * MSR_EBC_FREQUENCY_ID
2614 * Conservative value valid for even the basic CPU models.
2615 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2616 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2617 * and 266MHz for model 3, or 4. Set Core Clock
2618 * Frequency to System Bus Frequency Ratio to 1 (bits
2619 * 31:24) even though these are only valid for CPU
2620 * models > 2, however guests may end up dividing or
2621 * multiplying by zero otherwise.
2623 case MSR_EBC_FREQUENCY_ID
:
2624 msr_info
->data
= 1 << 24;
2626 case MSR_IA32_APICBASE
:
2627 msr_info
->data
= kvm_get_apic_base(vcpu
);
2629 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2630 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2632 case MSR_IA32_TSCDEADLINE
:
2633 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2635 case MSR_IA32_TSC_ADJUST
:
2636 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2638 case MSR_IA32_MISC_ENABLE
:
2639 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2641 case MSR_IA32_SMBASE
:
2642 if (!msr_info
->host_initiated
)
2644 msr_info
->data
= vcpu
->arch
.smbase
;
2646 case MSR_IA32_PERF_STATUS
:
2647 /* TSC increment by tick */
2648 msr_info
->data
= 1000ULL;
2649 /* CPU multiplier */
2650 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2653 msr_info
->data
= vcpu
->arch
.efer
;
2655 case MSR_KVM_WALL_CLOCK
:
2656 case MSR_KVM_WALL_CLOCK_NEW
:
2657 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2659 case MSR_KVM_SYSTEM_TIME
:
2660 case MSR_KVM_SYSTEM_TIME_NEW
:
2661 msr_info
->data
= vcpu
->arch
.time
;
2663 case MSR_KVM_ASYNC_PF_EN
:
2664 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2666 case MSR_KVM_STEAL_TIME
:
2667 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2669 case MSR_KVM_PV_EOI_EN
:
2670 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2672 case MSR_IA32_P5_MC_ADDR
:
2673 case MSR_IA32_P5_MC_TYPE
:
2674 case MSR_IA32_MCG_CAP
:
2675 case MSR_IA32_MCG_CTL
:
2676 case MSR_IA32_MCG_STATUS
:
2677 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2678 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
2679 msr_info
->host_initiated
);
2680 case MSR_K7_CLK_CTL
:
2682 * Provide expected ramp-up count for K7. All other
2683 * are set to zero, indicating minimum divisors for
2686 * This prevents guest kernels on AMD host with CPU
2687 * type 6, model 8 and higher from exploding due to
2688 * the rdmsr failing.
2690 msr_info
->data
= 0x20000000;
2692 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2693 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2694 case HV_X64_MSR_CRASH_CTL
:
2695 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2696 return kvm_hv_get_msr_common(vcpu
,
2697 msr_info
->index
, &msr_info
->data
,
2698 msr_info
->host_initiated
);
2700 case MSR_IA32_BBL_CR_CTL3
:
2701 /* This legacy MSR exists but isn't fully documented in current
2702 * silicon. It is however accessed by winxp in very narrow
2703 * scenarios where it sets bit #19, itself documented as
2704 * a "reserved" bit. Best effort attempt to source coherent
2705 * read data here should the balance of the register be
2706 * interpreted by the guest:
2708 * L2 cache control register 3: 64GB range, 256KB size,
2709 * enabled, latency 0x1, configured
2711 msr_info
->data
= 0xbe702111;
2713 case MSR_AMD64_OSVW_ID_LENGTH
:
2714 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2716 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2718 case MSR_AMD64_OSVW_STATUS
:
2719 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2721 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2723 case MSR_PLATFORM_INFO
:
2724 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2726 case MSR_MISC_FEATURES_ENABLES
:
2727 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2730 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2731 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2733 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2737 if (report_ignored_msrs
)
2738 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2746 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2749 * Read or write a bunch of msrs. All parameters are kernel addresses.
2751 * @return number of msrs set successfully.
2753 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2754 struct kvm_msr_entry
*entries
,
2755 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2756 unsigned index
, u64
*data
))
2760 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2761 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2768 * Read or write a bunch of msrs. Parameters are user addresses.
2770 * @return number of msrs set successfully.
2772 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2773 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2774 unsigned index
, u64
*data
),
2777 struct kvm_msrs msrs
;
2778 struct kvm_msr_entry
*entries
;
2783 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2787 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2790 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2791 entries
= memdup_user(user_msrs
->entries
, size
);
2792 if (IS_ERR(entries
)) {
2793 r
= PTR_ERR(entries
);
2797 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2802 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2813 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2818 case KVM_CAP_IRQCHIP
:
2820 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2821 case KVM_CAP_SET_TSS_ADDR
:
2822 case KVM_CAP_EXT_CPUID
:
2823 case KVM_CAP_EXT_EMUL_CPUID
:
2824 case KVM_CAP_CLOCKSOURCE
:
2826 case KVM_CAP_NOP_IO_DELAY
:
2827 case KVM_CAP_MP_STATE
:
2828 case KVM_CAP_SYNC_MMU
:
2829 case KVM_CAP_USER_NMI
:
2830 case KVM_CAP_REINJECT_CONTROL
:
2831 case KVM_CAP_IRQ_INJECT_STATUS
:
2832 case KVM_CAP_IOEVENTFD
:
2833 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2835 case KVM_CAP_PIT_STATE2
:
2836 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2837 case KVM_CAP_XEN_HVM
:
2838 case KVM_CAP_VCPU_EVENTS
:
2839 case KVM_CAP_HYPERV
:
2840 case KVM_CAP_HYPERV_VAPIC
:
2841 case KVM_CAP_HYPERV_SPIN
:
2842 case KVM_CAP_HYPERV_SYNIC
:
2843 case KVM_CAP_HYPERV_SYNIC2
:
2844 case KVM_CAP_HYPERV_VP_INDEX
:
2845 case KVM_CAP_PCI_SEGMENT
:
2846 case KVM_CAP_DEBUGREGS
:
2847 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2849 case KVM_CAP_ASYNC_PF
:
2850 case KVM_CAP_GET_TSC_KHZ
:
2851 case KVM_CAP_KVMCLOCK_CTRL
:
2852 case KVM_CAP_READONLY_MEM
:
2853 case KVM_CAP_HYPERV_TIME
:
2854 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2855 case KVM_CAP_TSC_DEADLINE_TIMER
:
2856 case KVM_CAP_ENABLE_CAP_VM
:
2857 case KVM_CAP_DISABLE_QUIRKS
:
2858 case KVM_CAP_SET_BOOT_CPU_ID
:
2859 case KVM_CAP_SPLIT_IRQCHIP
:
2860 case KVM_CAP_IMMEDIATE_EXIT
:
2861 case KVM_CAP_GET_MSR_FEATURES
:
2864 case KVM_CAP_ADJUST_CLOCK
:
2865 r
= KVM_CLOCK_TSC_STABLE
;
2867 case KVM_CAP_X86_GUEST_MWAIT
:
2868 r
= kvm_mwait_in_guest();
2870 case KVM_CAP_X86_SMM
:
2871 /* SMBASE is usually relocated above 1M on modern chipsets,
2872 * and SMM handlers might indeed rely on 4G segment limits,
2873 * so do not report SMM to be available if real mode is
2874 * emulated via vm86 mode. Still, do not go to great lengths
2875 * to avoid userspace's usage of the feature, because it is a
2876 * fringe case that is not enabled except via specific settings
2877 * of the module parameters.
2879 r
= kvm_x86_ops
->has_emulated_msr(MSR_IA32_SMBASE
);
2882 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2884 case KVM_CAP_NR_VCPUS
:
2885 r
= KVM_SOFT_MAX_VCPUS
;
2887 case KVM_CAP_MAX_VCPUS
:
2890 case KVM_CAP_MAX_VCPU_ID
:
2891 r
= KVM_MAX_VCPU_ID
;
2893 case KVM_CAP_NR_MEMSLOTS
:
2894 r
= KVM_USER_MEM_SLOTS
;
2896 case KVM_CAP_PV_MMU
: /* obsolete */
2900 r
= KVM_MAX_MCE_BANKS
;
2903 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2905 case KVM_CAP_TSC_CONTROL
:
2906 r
= kvm_has_tsc_control
;
2908 case KVM_CAP_X2APIC_API
:
2909 r
= KVM_X2APIC_API_VALID_FLAGS
;
2919 long kvm_arch_dev_ioctl(struct file
*filp
,
2920 unsigned int ioctl
, unsigned long arg
)
2922 void __user
*argp
= (void __user
*)arg
;
2926 case KVM_GET_MSR_INDEX_LIST
: {
2927 struct kvm_msr_list __user
*user_msr_list
= argp
;
2928 struct kvm_msr_list msr_list
;
2932 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2935 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2936 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2939 if (n
< msr_list
.nmsrs
)
2942 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2943 num_msrs_to_save
* sizeof(u32
)))
2945 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2947 num_emulated_msrs
* sizeof(u32
)))
2952 case KVM_GET_SUPPORTED_CPUID
:
2953 case KVM_GET_EMULATED_CPUID
: {
2954 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2955 struct kvm_cpuid2 cpuid
;
2958 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2961 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2967 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2972 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2974 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2975 sizeof(kvm_mce_cap_supported
)))
2979 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
2980 struct kvm_msr_list __user
*user_msr_list
= argp
;
2981 struct kvm_msr_list msr_list
;
2985 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
2988 msr_list
.nmsrs
= num_msr_based_features
;
2989 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
2992 if (n
< msr_list
.nmsrs
)
2995 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
2996 num_msr_based_features
* sizeof(u32
)))
3002 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
3012 static void wbinvd_ipi(void *garbage
)
3017 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3019 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
3022 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
3024 /* Address WBINVD may be executed by guest */
3025 if (need_emulate_wbinvd(vcpu
)) {
3026 if (kvm_x86_ops
->has_wbinvd_exit())
3027 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
3028 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
3029 smp_call_function_single(vcpu
->cpu
,
3030 wbinvd_ipi
, NULL
, 1);
3033 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
3035 /* Apply any externally detected TSC adjustments (due to suspend) */
3036 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
3037 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
3038 vcpu
->arch
.tsc_offset_adjustment
= 0;
3039 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3042 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
3043 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3044 rdtsc() - vcpu
->arch
.last_host_tsc
;
3046 mark_tsc_unstable("KVM discovered backwards TSC");
3048 if (check_tsc_unstable()) {
3049 u64 offset
= kvm_compute_tsc_offset(vcpu
,
3050 vcpu
->arch
.last_guest_tsc
);
3051 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
3052 vcpu
->arch
.tsc_catchup
= 1;
3055 if (kvm_lapic_hv_timer_in_use(vcpu
))
3056 kvm_lapic_restart_hv_timer(vcpu
);
3059 * On a host with synchronized TSC, there is no need to update
3060 * kvmclock on vcpu->cpu migration
3062 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
3063 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
3064 if (vcpu
->cpu
!= cpu
)
3065 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
3069 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3072 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
3074 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3077 vcpu
->arch
.st
.steal
.preempted
= 1;
3079 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
3080 &vcpu
->arch
.st
.steal
.preempted
,
3081 offsetof(struct kvm_steal_time
, preempted
),
3082 sizeof(vcpu
->arch
.st
.steal
.preempted
));
3085 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3089 if (vcpu
->preempted
)
3090 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
3093 * Disable page faults because we're in atomic context here.
3094 * kvm_write_guest_offset_cached() would call might_fault()
3095 * that relies on pagefault_disable() to tell if there's a
3096 * bug. NOTE: the write to guest memory may not go through if
3097 * during postcopy live migration or if there's heavy guest
3100 pagefault_disable();
3102 * kvm_memslots() will be called by
3103 * kvm_write_guest_offset_cached() so take the srcu lock.
3105 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3106 kvm_steal_time_set_preempted(vcpu
);
3107 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3109 kvm_x86_ops
->vcpu_put(vcpu
);
3110 vcpu
->arch
.last_host_tsc
= rdtsc();
3112 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3113 * on every vmexit, but if not, we might have a stale dr6 from the
3114 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3119 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3120 struct kvm_lapic_state
*s
)
3122 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
3123 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3125 return kvm_apic_get_state(vcpu
, s
);
3128 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3129 struct kvm_lapic_state
*s
)
3133 r
= kvm_apic_set_state(vcpu
, s
);
3136 update_cr8_intercept(vcpu
);
3141 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3143 return (!lapic_in_kernel(vcpu
) ||
3144 kvm_apic_accept_pic_intr(vcpu
));
3148 * if userspace requested an interrupt window, check that the
3149 * interrupt window is open.
3151 * No need to exit to userspace if we already have an interrupt queued.
3153 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3155 return kvm_arch_interrupt_allowed(vcpu
) &&
3156 !kvm_cpu_has_interrupt(vcpu
) &&
3157 !kvm_event_needs_reinjection(vcpu
) &&
3158 kvm_cpu_accept_dm_intr(vcpu
);
3161 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3162 struct kvm_interrupt
*irq
)
3164 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3167 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3168 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3169 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3174 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3175 * fail for in-kernel 8259.
3177 if (pic_in_kernel(vcpu
->kvm
))
3180 if (vcpu
->arch
.pending_external_vector
!= -1)
3183 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3184 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3188 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3190 kvm_inject_nmi(vcpu
);
3195 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3197 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3202 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3203 struct kvm_tpr_access_ctl
*tac
)
3207 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3211 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3215 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3218 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3220 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3223 vcpu
->arch
.mcg_cap
= mcg_cap
;
3224 /* Init IA32_MCG_CTL to all 1s */
3225 if (mcg_cap
& MCG_CTL_P
)
3226 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3227 /* Init IA32_MCi_CTL to all 1s */
3228 for (bank
= 0; bank
< bank_num
; bank
++)
3229 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3231 if (kvm_x86_ops
->setup_mce
)
3232 kvm_x86_ops
->setup_mce(vcpu
);
3237 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3238 struct kvm_x86_mce
*mce
)
3240 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3241 unsigned bank_num
= mcg_cap
& 0xff;
3242 u64
*banks
= vcpu
->arch
.mce_banks
;
3244 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3247 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3248 * reporting is disabled
3250 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3251 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3253 banks
+= 4 * mce
->bank
;
3255 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3256 * reporting is disabled for the bank
3258 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3260 if (mce
->status
& MCI_STATUS_UC
) {
3261 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3262 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3263 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3266 if (banks
[1] & MCI_STATUS_VAL
)
3267 mce
->status
|= MCI_STATUS_OVER
;
3268 banks
[2] = mce
->addr
;
3269 banks
[3] = mce
->misc
;
3270 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3271 banks
[1] = mce
->status
;
3272 kvm_queue_exception(vcpu
, MC_VECTOR
);
3273 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3274 || !(banks
[1] & MCI_STATUS_UC
)) {
3275 if (banks
[1] & MCI_STATUS_VAL
)
3276 mce
->status
|= MCI_STATUS_OVER
;
3277 banks
[2] = mce
->addr
;
3278 banks
[3] = mce
->misc
;
3279 banks
[1] = mce
->status
;
3281 banks
[1] |= MCI_STATUS_OVER
;
3285 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3286 struct kvm_vcpu_events
*events
)
3290 * FIXME: pass injected and pending separately. This is only
3291 * needed for nested virtualization, whose state cannot be
3292 * migrated yet. For now we can combine them.
3294 events
->exception
.injected
=
3295 (vcpu
->arch
.exception
.pending
||
3296 vcpu
->arch
.exception
.injected
) &&
3297 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3298 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3299 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3300 events
->exception
.pad
= 0;
3301 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3303 events
->interrupt
.injected
=
3304 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3305 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3306 events
->interrupt
.soft
= 0;
3307 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3309 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3310 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3311 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3312 events
->nmi
.pad
= 0;
3314 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3316 events
->smi
.smm
= is_smm(vcpu
);
3317 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3318 events
->smi
.smm_inside_nmi
=
3319 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3320 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3322 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3323 | KVM_VCPUEVENT_VALID_SHADOW
3324 | KVM_VCPUEVENT_VALID_SMM
);
3325 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3328 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3330 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3331 struct kvm_vcpu_events
*events
)
3333 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3334 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3335 | KVM_VCPUEVENT_VALID_SHADOW
3336 | KVM_VCPUEVENT_VALID_SMM
))
3339 if (events
->exception
.injected
&&
3340 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3341 is_guest_mode(vcpu
)))
3344 /* INITs are latched while in SMM */
3345 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3346 (events
->smi
.smm
|| events
->smi
.pending
) &&
3347 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3351 vcpu
->arch
.exception
.injected
= false;
3352 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3353 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3354 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3355 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3357 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3358 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3359 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3360 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3361 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3362 events
->interrupt
.shadow
);
3364 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3365 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3366 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3367 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3369 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3370 lapic_in_kernel(vcpu
))
3371 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3373 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3374 u32 hflags
= vcpu
->arch
.hflags
;
3375 if (events
->smi
.smm
)
3376 hflags
|= HF_SMM_MASK
;
3378 hflags
&= ~HF_SMM_MASK
;
3379 kvm_set_hflags(vcpu
, hflags
);
3381 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3383 if (events
->smi
.smm
) {
3384 if (events
->smi
.smm_inside_nmi
)
3385 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3387 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3388 if (lapic_in_kernel(vcpu
)) {
3389 if (events
->smi
.latched_init
)
3390 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3392 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3397 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3402 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3403 struct kvm_debugregs
*dbgregs
)
3407 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3408 kvm_get_dr(vcpu
, 6, &val
);
3410 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3412 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3415 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3416 struct kvm_debugregs
*dbgregs
)
3421 if (dbgregs
->dr6
& ~0xffffffffull
)
3423 if (dbgregs
->dr7
& ~0xffffffffull
)
3426 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3427 kvm_update_dr0123(vcpu
);
3428 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3429 kvm_update_dr6(vcpu
);
3430 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3431 kvm_update_dr7(vcpu
);
3436 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3438 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3440 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3441 u64 xstate_bv
= xsave
->header
.xfeatures
;
3445 * Copy legacy XSAVE area, to avoid complications with CPUID
3446 * leaves 0 and 1 in the loop below.
3448 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3451 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3452 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3455 * Copy each region from the possibly compacted offset to the
3456 * non-compacted offset.
3458 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3460 u64 feature
= valid
& -valid
;
3461 int index
= fls64(feature
) - 1;
3462 void *src
= get_xsave_addr(xsave
, feature
);
3465 u32 size
, offset
, ecx
, edx
;
3466 cpuid_count(XSTATE_CPUID
, index
,
3467 &size
, &offset
, &ecx
, &edx
);
3468 if (feature
== XFEATURE_MASK_PKRU
)
3469 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3470 sizeof(vcpu
->arch
.pkru
));
3472 memcpy(dest
+ offset
, src
, size
);
3480 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3482 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3483 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3487 * Copy legacy XSAVE area, to avoid complications with CPUID
3488 * leaves 0 and 1 in the loop below.
3490 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3492 /* Set XSTATE_BV and possibly XCOMP_BV. */
3493 xsave
->header
.xfeatures
= xstate_bv
;
3494 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3495 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3498 * Copy each region from the non-compacted offset to the
3499 * possibly compacted offset.
3501 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3503 u64 feature
= valid
& -valid
;
3504 int index
= fls64(feature
) - 1;
3505 void *dest
= get_xsave_addr(xsave
, feature
);
3508 u32 size
, offset
, ecx
, edx
;
3509 cpuid_count(XSTATE_CPUID
, index
,
3510 &size
, &offset
, &ecx
, &edx
);
3511 if (feature
== XFEATURE_MASK_PKRU
)
3512 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3513 sizeof(vcpu
->arch
.pkru
));
3515 memcpy(dest
, src
+ offset
, size
);
3522 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3523 struct kvm_xsave
*guest_xsave
)
3525 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3526 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3527 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3529 memcpy(guest_xsave
->region
,
3530 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3531 sizeof(struct fxregs_state
));
3532 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3533 XFEATURE_MASK_FPSSE
;
3537 #define XSAVE_MXCSR_OFFSET 24
3539 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3540 struct kvm_xsave
*guest_xsave
)
3543 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3544 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3546 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3548 * Here we allow setting states that are not present in
3549 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3550 * with old userspace.
3552 if (xstate_bv
& ~kvm_supported_xcr0() ||
3553 mxcsr
& ~mxcsr_feature_mask
)
3555 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3557 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3558 mxcsr
& ~mxcsr_feature_mask
)
3560 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3561 guest_xsave
->region
, sizeof(struct fxregs_state
));
3566 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3567 struct kvm_xcrs
*guest_xcrs
)
3569 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3570 guest_xcrs
->nr_xcrs
= 0;
3574 guest_xcrs
->nr_xcrs
= 1;
3575 guest_xcrs
->flags
= 0;
3576 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3577 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3580 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3581 struct kvm_xcrs
*guest_xcrs
)
3585 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3588 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3591 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3592 /* Only support XCR0 currently */
3593 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3594 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3595 guest_xcrs
->xcrs
[i
].value
);
3604 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3605 * stopped by the hypervisor. This function will be called from the host only.
3606 * EINVAL is returned when the host attempts to set the flag for a guest that
3607 * does not support pv clocks.
3609 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3611 if (!vcpu
->arch
.pv_time_enabled
)
3613 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3614 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3618 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3619 struct kvm_enable_cap
*cap
)
3625 case KVM_CAP_HYPERV_SYNIC2
:
3628 case KVM_CAP_HYPERV_SYNIC
:
3629 if (!irqchip_in_kernel(vcpu
->kvm
))
3631 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3632 KVM_CAP_HYPERV_SYNIC2
);
3638 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3639 unsigned int ioctl
, unsigned long arg
)
3641 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3642 void __user
*argp
= (void __user
*)arg
;
3645 struct kvm_lapic_state
*lapic
;
3646 struct kvm_xsave
*xsave
;
3647 struct kvm_xcrs
*xcrs
;
3653 case KVM_GET_LAPIC
: {
3655 if (!lapic_in_kernel(vcpu
))
3657 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3662 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3666 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3671 case KVM_SET_LAPIC
: {
3673 if (!lapic_in_kernel(vcpu
))
3675 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3676 if (IS_ERR(u
.lapic
))
3677 return PTR_ERR(u
.lapic
);
3679 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3682 case KVM_INTERRUPT
: {
3683 struct kvm_interrupt irq
;
3686 if (copy_from_user(&irq
, argp
, sizeof irq
))
3688 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3692 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3696 r
= kvm_vcpu_ioctl_smi(vcpu
);
3699 case KVM_SET_CPUID
: {
3700 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3701 struct kvm_cpuid cpuid
;
3704 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3706 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3709 case KVM_SET_CPUID2
: {
3710 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3711 struct kvm_cpuid2 cpuid
;
3714 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3716 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3717 cpuid_arg
->entries
);
3720 case KVM_GET_CPUID2
: {
3721 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3722 struct kvm_cpuid2 cpuid
;
3725 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3727 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3728 cpuid_arg
->entries
);
3732 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3737 case KVM_GET_MSRS
: {
3738 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3739 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3740 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3743 case KVM_SET_MSRS
: {
3744 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3745 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3746 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3749 case KVM_TPR_ACCESS_REPORTING
: {
3750 struct kvm_tpr_access_ctl tac
;
3753 if (copy_from_user(&tac
, argp
, sizeof tac
))
3755 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3759 if (copy_to_user(argp
, &tac
, sizeof tac
))
3764 case KVM_SET_VAPIC_ADDR
: {
3765 struct kvm_vapic_addr va
;
3769 if (!lapic_in_kernel(vcpu
))
3772 if (copy_from_user(&va
, argp
, sizeof va
))
3774 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3775 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3776 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3779 case KVM_X86_SETUP_MCE
: {
3783 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3785 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3788 case KVM_X86_SET_MCE
: {
3789 struct kvm_x86_mce mce
;
3792 if (copy_from_user(&mce
, argp
, sizeof mce
))
3794 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3797 case KVM_GET_VCPU_EVENTS
: {
3798 struct kvm_vcpu_events events
;
3800 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3803 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3808 case KVM_SET_VCPU_EVENTS
: {
3809 struct kvm_vcpu_events events
;
3812 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3815 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3818 case KVM_GET_DEBUGREGS
: {
3819 struct kvm_debugregs dbgregs
;
3821 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3824 if (copy_to_user(argp
, &dbgregs
,
3825 sizeof(struct kvm_debugregs
)))
3830 case KVM_SET_DEBUGREGS
: {
3831 struct kvm_debugregs dbgregs
;
3834 if (copy_from_user(&dbgregs
, argp
,
3835 sizeof(struct kvm_debugregs
)))
3838 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3841 case KVM_GET_XSAVE
: {
3842 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3847 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3850 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3855 case KVM_SET_XSAVE
: {
3856 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3857 if (IS_ERR(u
.xsave
))
3858 return PTR_ERR(u
.xsave
);
3860 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3863 case KVM_GET_XCRS
: {
3864 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3869 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3872 if (copy_to_user(argp
, u
.xcrs
,
3873 sizeof(struct kvm_xcrs
)))
3878 case KVM_SET_XCRS
: {
3879 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3881 return PTR_ERR(u
.xcrs
);
3883 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3886 case KVM_SET_TSC_KHZ
: {
3890 user_tsc_khz
= (u32
)arg
;
3892 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3895 if (user_tsc_khz
== 0)
3896 user_tsc_khz
= tsc_khz
;
3898 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3903 case KVM_GET_TSC_KHZ
: {
3904 r
= vcpu
->arch
.virtual_tsc_khz
;
3907 case KVM_KVMCLOCK_CTRL
: {
3908 r
= kvm_set_guest_paused(vcpu
);
3911 case KVM_ENABLE_CAP
: {
3912 struct kvm_enable_cap cap
;
3915 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3917 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3928 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3930 return VM_FAULT_SIGBUS
;
3933 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3937 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3939 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3943 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3946 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3950 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3951 unsigned long kvm_nr_mmu_pages
)
3953 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3956 mutex_lock(&kvm
->slots_lock
);
3958 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3959 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3961 mutex_unlock(&kvm
->slots_lock
);
3965 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3967 return kvm
->arch
.n_max_mmu_pages
;
3970 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3972 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3976 switch (chip
->chip_id
) {
3977 case KVM_IRQCHIP_PIC_MASTER
:
3978 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3979 sizeof(struct kvm_pic_state
));
3981 case KVM_IRQCHIP_PIC_SLAVE
:
3982 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3983 sizeof(struct kvm_pic_state
));
3985 case KVM_IRQCHIP_IOAPIC
:
3986 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3995 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3997 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
4001 switch (chip
->chip_id
) {
4002 case KVM_IRQCHIP_PIC_MASTER
:
4003 spin_lock(&pic
->lock
);
4004 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
4005 sizeof(struct kvm_pic_state
));
4006 spin_unlock(&pic
->lock
);
4008 case KVM_IRQCHIP_PIC_SLAVE
:
4009 spin_lock(&pic
->lock
);
4010 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
4011 sizeof(struct kvm_pic_state
));
4012 spin_unlock(&pic
->lock
);
4014 case KVM_IRQCHIP_IOAPIC
:
4015 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
4021 kvm_pic_update_irq(pic
);
4025 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4027 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
4029 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
4031 mutex_lock(&kps
->lock
);
4032 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
4033 mutex_unlock(&kps
->lock
);
4037 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4040 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4042 mutex_lock(&pit
->pit_state
.lock
);
4043 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
4044 for (i
= 0; i
< 3; i
++)
4045 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
4046 mutex_unlock(&pit
->pit_state
.lock
);
4050 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4052 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
4053 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
4054 sizeof(ps
->channels
));
4055 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
4056 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
4057 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
4061 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4065 u32 prev_legacy
, cur_legacy
;
4066 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4068 mutex_lock(&pit
->pit_state
.lock
);
4069 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4070 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4071 if (!prev_legacy
&& cur_legacy
)
4073 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
4074 sizeof(pit
->pit_state
.channels
));
4075 pit
->pit_state
.flags
= ps
->flags
;
4076 for (i
= 0; i
< 3; i
++)
4077 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
4079 mutex_unlock(&pit
->pit_state
.lock
);
4083 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
4084 struct kvm_reinject_control
*control
)
4086 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4091 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4092 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4093 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4095 mutex_lock(&pit
->pit_state
.lock
);
4096 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
4097 mutex_unlock(&pit
->pit_state
.lock
);
4103 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4104 * @kvm: kvm instance
4105 * @log: slot id and address to which we copy the log
4107 * Steps 1-4 below provide general overview of dirty page logging. See
4108 * kvm_get_dirty_log_protect() function description for additional details.
4110 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4111 * always flush the TLB (step 4) even if previous step failed and the dirty
4112 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4113 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4114 * writes will be marked dirty for next log read.
4116 * 1. Take a snapshot of the bit and clear it if needed.
4117 * 2. Write protect the corresponding page.
4118 * 3. Copy the snapshot to the userspace.
4119 * 4. Flush TLB's if needed.
4121 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
4123 bool is_dirty
= false;
4126 mutex_lock(&kvm
->slots_lock
);
4129 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4131 if (kvm_x86_ops
->flush_log_dirty
)
4132 kvm_x86_ops
->flush_log_dirty(kvm
);
4134 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
4137 * All the TLBs can be flushed out of mmu lock, see the comments in
4138 * kvm_mmu_slot_remove_write_access().
4140 lockdep_assert_held(&kvm
->slots_lock
);
4142 kvm_flush_remote_tlbs(kvm
);
4144 mutex_unlock(&kvm
->slots_lock
);
4148 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4151 if (!irqchip_in_kernel(kvm
))
4154 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4155 irq_event
->irq
, irq_event
->level
,
4160 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4161 struct kvm_enable_cap
*cap
)
4169 case KVM_CAP_DISABLE_QUIRKS
:
4170 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4173 case KVM_CAP_SPLIT_IRQCHIP
: {
4174 mutex_lock(&kvm
->lock
);
4176 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4177 goto split_irqchip_unlock
;
4179 if (irqchip_in_kernel(kvm
))
4180 goto split_irqchip_unlock
;
4181 if (kvm
->created_vcpus
)
4182 goto split_irqchip_unlock
;
4183 r
= kvm_setup_empty_irq_routing(kvm
);
4185 goto split_irqchip_unlock
;
4186 /* Pairs with irqchip_in_kernel. */
4188 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4189 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4191 split_irqchip_unlock
:
4192 mutex_unlock(&kvm
->lock
);
4195 case KVM_CAP_X2APIC_API
:
4197 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4200 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4201 kvm
->arch
.x2apic_format
= true;
4202 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4203 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4214 long kvm_arch_vm_ioctl(struct file
*filp
,
4215 unsigned int ioctl
, unsigned long arg
)
4217 struct kvm
*kvm
= filp
->private_data
;
4218 void __user
*argp
= (void __user
*)arg
;
4221 * This union makes it completely explicit to gcc-3.x
4222 * that these two variables' stack usage should be
4223 * combined, not added together.
4226 struct kvm_pit_state ps
;
4227 struct kvm_pit_state2 ps2
;
4228 struct kvm_pit_config pit_config
;
4232 case KVM_SET_TSS_ADDR
:
4233 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4235 case KVM_SET_IDENTITY_MAP_ADDR
: {
4238 mutex_lock(&kvm
->lock
);
4240 if (kvm
->created_vcpus
)
4241 goto set_identity_unlock
;
4243 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4244 goto set_identity_unlock
;
4245 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4246 set_identity_unlock
:
4247 mutex_unlock(&kvm
->lock
);
4250 case KVM_SET_NR_MMU_PAGES
:
4251 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4253 case KVM_GET_NR_MMU_PAGES
:
4254 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4256 case KVM_CREATE_IRQCHIP
: {
4257 mutex_lock(&kvm
->lock
);
4260 if (irqchip_in_kernel(kvm
))
4261 goto create_irqchip_unlock
;
4264 if (kvm
->created_vcpus
)
4265 goto create_irqchip_unlock
;
4267 r
= kvm_pic_init(kvm
);
4269 goto create_irqchip_unlock
;
4271 r
= kvm_ioapic_init(kvm
);
4273 kvm_pic_destroy(kvm
);
4274 goto create_irqchip_unlock
;
4277 r
= kvm_setup_default_irq_routing(kvm
);
4279 kvm_ioapic_destroy(kvm
);
4280 kvm_pic_destroy(kvm
);
4281 goto create_irqchip_unlock
;
4283 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4285 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4286 create_irqchip_unlock
:
4287 mutex_unlock(&kvm
->lock
);
4290 case KVM_CREATE_PIT
:
4291 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4293 case KVM_CREATE_PIT2
:
4295 if (copy_from_user(&u
.pit_config
, argp
,
4296 sizeof(struct kvm_pit_config
)))
4299 mutex_lock(&kvm
->lock
);
4302 goto create_pit_unlock
;
4304 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4308 mutex_unlock(&kvm
->lock
);
4310 case KVM_GET_IRQCHIP
: {
4311 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4312 struct kvm_irqchip
*chip
;
4314 chip
= memdup_user(argp
, sizeof(*chip
));
4321 if (!irqchip_kernel(kvm
))
4322 goto get_irqchip_out
;
4323 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4325 goto get_irqchip_out
;
4327 if (copy_to_user(argp
, chip
, sizeof *chip
))
4328 goto get_irqchip_out
;
4334 case KVM_SET_IRQCHIP
: {
4335 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4336 struct kvm_irqchip
*chip
;
4338 chip
= memdup_user(argp
, sizeof(*chip
));
4345 if (!irqchip_kernel(kvm
))
4346 goto set_irqchip_out
;
4347 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4349 goto set_irqchip_out
;
4357 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4360 if (!kvm
->arch
.vpit
)
4362 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4366 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4373 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4376 if (!kvm
->arch
.vpit
)
4378 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4381 case KVM_GET_PIT2
: {
4383 if (!kvm
->arch
.vpit
)
4385 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4389 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4394 case KVM_SET_PIT2
: {
4396 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4399 if (!kvm
->arch
.vpit
)
4401 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4404 case KVM_REINJECT_CONTROL
: {
4405 struct kvm_reinject_control control
;
4407 if (copy_from_user(&control
, argp
, sizeof(control
)))
4409 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4412 case KVM_SET_BOOT_CPU_ID
:
4414 mutex_lock(&kvm
->lock
);
4415 if (kvm
->created_vcpus
)
4418 kvm
->arch
.bsp_vcpu_id
= arg
;
4419 mutex_unlock(&kvm
->lock
);
4421 case KVM_XEN_HVM_CONFIG
: {
4422 struct kvm_xen_hvm_config xhc
;
4424 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4429 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4433 case KVM_SET_CLOCK
: {
4434 struct kvm_clock_data user_ns
;
4438 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4447 * TODO: userspace has to take care of races with VCPU_RUN, so
4448 * kvm_gen_update_masterclock() can be cut down to locked
4449 * pvclock_update_vm_gtod_copy().
4451 kvm_gen_update_masterclock(kvm
);
4452 now_ns
= get_kvmclock_ns(kvm
);
4453 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4454 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4457 case KVM_GET_CLOCK
: {
4458 struct kvm_clock_data user_ns
;
4461 now_ns
= get_kvmclock_ns(kvm
);
4462 user_ns
.clock
= now_ns
;
4463 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4464 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4467 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4472 case KVM_ENABLE_CAP
: {
4473 struct kvm_enable_cap cap
;
4476 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4478 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4488 static void kvm_init_msr_list(void)
4493 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4494 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4498 * Even MSRs that are valid in the host may not be exposed
4499 * to the guests in some cases.
4501 switch (msrs_to_save
[i
]) {
4502 case MSR_IA32_BNDCFGS
:
4503 if (!kvm_x86_ops
->mpx_supported())
4507 if (!kvm_x86_ops
->rdtscp_supported())
4515 msrs_to_save
[j
] = msrs_to_save
[i
];
4518 num_msrs_to_save
= j
;
4520 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4521 if (!kvm_x86_ops
->has_emulated_msr(emulated_msrs
[i
]))
4525 emulated_msrs
[j
] = emulated_msrs
[i
];
4528 num_emulated_msrs
= j
;
4530 for (i
= j
= 0; i
< ARRAY_SIZE(msr_based_features
); i
++) {
4531 struct kvm_msr_entry msr
;
4533 msr
.index
= msr_based_features
[i
];
4534 if (kvm_get_msr_feature(&msr
))
4538 msr_based_features
[j
] = msr_based_features
[i
];
4541 num_msr_based_features
= j
;
4544 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4552 if (!(lapic_in_kernel(vcpu
) &&
4553 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4554 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4565 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4572 if (!(lapic_in_kernel(vcpu
) &&
4573 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4575 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4577 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4587 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4588 struct kvm_segment
*var
, int seg
)
4590 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4593 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4594 struct kvm_segment
*var
, int seg
)
4596 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4599 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4600 struct x86_exception
*exception
)
4604 BUG_ON(!mmu_is_nested(vcpu
));
4606 /* NPT walks are always user-walks */
4607 access
|= PFERR_USER_MASK
;
4608 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4613 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4614 struct x86_exception
*exception
)
4616 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4617 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4620 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4621 struct x86_exception
*exception
)
4623 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4624 access
|= PFERR_FETCH_MASK
;
4625 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4628 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4629 struct x86_exception
*exception
)
4631 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4632 access
|= PFERR_WRITE_MASK
;
4633 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4636 /* uses this to access any guest's mapped memory without checking CPL */
4637 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4638 struct x86_exception
*exception
)
4640 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4643 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4644 struct kvm_vcpu
*vcpu
, u32 access
,
4645 struct x86_exception
*exception
)
4648 int r
= X86EMUL_CONTINUE
;
4651 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4653 unsigned offset
= addr
& (PAGE_SIZE
-1);
4654 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4657 if (gpa
== UNMAPPED_GVA
)
4658 return X86EMUL_PROPAGATE_FAULT
;
4659 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4662 r
= X86EMUL_IO_NEEDED
;
4674 /* used for instruction fetching */
4675 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4676 gva_t addr
, void *val
, unsigned int bytes
,
4677 struct x86_exception
*exception
)
4679 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4680 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4684 /* Inline kvm_read_guest_virt_helper for speed. */
4685 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4687 if (unlikely(gpa
== UNMAPPED_GVA
))
4688 return X86EMUL_PROPAGATE_FAULT
;
4690 offset
= addr
& (PAGE_SIZE
-1);
4691 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4692 bytes
= (unsigned)PAGE_SIZE
- offset
;
4693 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4695 if (unlikely(ret
< 0))
4696 return X86EMUL_IO_NEEDED
;
4698 return X86EMUL_CONTINUE
;
4701 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
4702 gva_t addr
, void *val
, unsigned int bytes
,
4703 struct x86_exception
*exception
)
4705 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4708 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
4709 * is returned, but our callers are not ready for that and they blindly
4710 * call kvm_inject_page_fault. Ensure that they at least do not leak
4711 * uninitialized kernel stack memory into cr2 and error code.
4713 memset(exception
, 0, sizeof(*exception
));
4714 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4717 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4719 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
4720 gva_t addr
, void *val
, unsigned int bytes
,
4721 struct x86_exception
*exception
, bool system
)
4723 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4726 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
4727 access
|= PFERR_USER_MASK
;
4729 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
4732 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4733 unsigned long addr
, void *val
, unsigned int bytes
)
4735 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4736 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4738 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4741 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4742 struct kvm_vcpu
*vcpu
, u32 access
,
4743 struct x86_exception
*exception
)
4746 int r
= X86EMUL_CONTINUE
;
4749 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4752 unsigned offset
= addr
& (PAGE_SIZE
-1);
4753 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4756 if (gpa
== UNMAPPED_GVA
)
4757 return X86EMUL_PROPAGATE_FAULT
;
4758 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4760 r
= X86EMUL_IO_NEEDED
;
4772 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
4773 unsigned int bytes
, struct x86_exception
*exception
,
4776 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4777 u32 access
= PFERR_WRITE_MASK
;
4779 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
4780 access
|= PFERR_USER_MASK
;
4782 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4786 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
4787 unsigned int bytes
, struct x86_exception
*exception
)
4789 /* kvm_write_guest_virt_system can pull in tons of pages. */
4790 vcpu
->arch
.l1tf_flush_l1d
= true;
4793 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
4794 * is returned, but our callers are not ready for that and they blindly
4795 * call kvm_inject_page_fault. Ensure that they at least do not leak
4796 * uninitialized kernel stack memory into cr2 and error code.
4798 memset(exception
, 0, sizeof(*exception
));
4799 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4800 PFERR_WRITE_MASK
, exception
);
4802 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4804 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4805 gpa_t gpa
, bool write
)
4807 /* For APIC access vmexit */
4808 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4811 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4812 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4819 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4820 gpa_t
*gpa
, struct x86_exception
*exception
,
4823 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4824 | (write
? PFERR_WRITE_MASK
: 0);
4827 * currently PKRU is only applied to ept enabled guest so
4828 * there is no pkey in EPT page table for L1 guest or EPT
4829 * shadow page table for L2 guest.
4831 if (vcpu_match_mmio_gva(vcpu
, gva
)
4832 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4833 vcpu
->arch
.access
, 0, access
)) {
4834 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4835 (gva
& (PAGE_SIZE
- 1));
4836 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4840 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4842 if (*gpa
== UNMAPPED_GVA
)
4845 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4848 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4849 const void *val
, int bytes
)
4853 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4856 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4860 struct read_write_emulator_ops
{
4861 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4863 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4864 void *val
, int bytes
);
4865 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4866 int bytes
, void *val
);
4867 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4868 void *val
, int bytes
);
4872 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4874 if (vcpu
->mmio_read_completed
) {
4875 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4876 vcpu
->mmio_fragments
[0].gpa
, val
);
4877 vcpu
->mmio_read_completed
= 0;
4884 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4885 void *val
, int bytes
)
4887 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4890 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4891 void *val
, int bytes
)
4893 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4896 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4898 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4899 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4902 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4903 void *val
, int bytes
)
4905 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4906 return X86EMUL_IO_NEEDED
;
4909 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4910 void *val
, int bytes
)
4912 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4914 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4915 return X86EMUL_CONTINUE
;
4918 static const struct read_write_emulator_ops read_emultor
= {
4919 .read_write_prepare
= read_prepare
,
4920 .read_write_emulate
= read_emulate
,
4921 .read_write_mmio
= vcpu_mmio_read
,
4922 .read_write_exit_mmio
= read_exit_mmio
,
4925 static const struct read_write_emulator_ops write_emultor
= {
4926 .read_write_emulate
= write_emulate
,
4927 .read_write_mmio
= write_mmio
,
4928 .read_write_exit_mmio
= write_exit_mmio
,
4932 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4934 struct x86_exception
*exception
,
4935 struct kvm_vcpu
*vcpu
,
4936 const struct read_write_emulator_ops
*ops
)
4940 bool write
= ops
->write
;
4941 struct kvm_mmio_fragment
*frag
;
4942 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4945 * If the exit was due to a NPF we may already have a GPA.
4946 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4947 * Note, this cannot be used on string operations since string
4948 * operation using rep will only have the initial GPA from the NPF
4951 if (vcpu
->arch
.gpa_available
&&
4952 emulator_can_use_gpa(ctxt
) &&
4953 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4954 gpa
= vcpu
->arch
.gpa_val
;
4955 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4957 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4959 return X86EMUL_PROPAGATE_FAULT
;
4962 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4963 return X86EMUL_CONTINUE
;
4966 * Is this MMIO handled locally?
4968 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4969 if (handled
== bytes
)
4970 return X86EMUL_CONTINUE
;
4976 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4977 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4981 return X86EMUL_CONTINUE
;
4984 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4986 void *val
, unsigned int bytes
,
4987 struct x86_exception
*exception
,
4988 const struct read_write_emulator_ops
*ops
)
4990 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4994 if (ops
->read_write_prepare
&&
4995 ops
->read_write_prepare(vcpu
, val
, bytes
))
4996 return X86EMUL_CONTINUE
;
4998 vcpu
->mmio_nr_fragments
= 0;
5000 /* Crossing a page boundary? */
5001 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
5004 now
= -addr
& ~PAGE_MASK
;
5005 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
5008 if (rc
!= X86EMUL_CONTINUE
)
5011 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
5017 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
5019 if (rc
!= X86EMUL_CONTINUE
)
5022 if (!vcpu
->mmio_nr_fragments
)
5025 gpa
= vcpu
->mmio_fragments
[0].gpa
;
5027 vcpu
->mmio_needed
= 1;
5028 vcpu
->mmio_cur_fragment
= 0;
5030 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
5031 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
5032 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
5033 vcpu
->run
->mmio
.phys_addr
= gpa
;
5035 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
5038 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
5042 struct x86_exception
*exception
)
5044 return emulator_read_write(ctxt
, addr
, val
, bytes
,
5045 exception
, &read_emultor
);
5048 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
5052 struct x86_exception
*exception
)
5054 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
5055 exception
, &write_emultor
);
5058 #define CMPXCHG_TYPE(t, ptr, old, new) \
5059 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5061 #ifdef CONFIG_X86_64
5062 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5064 # define CMPXCHG64(ptr, old, new) \
5065 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5068 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
5073 struct x86_exception
*exception
)
5075 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5081 /* guests cmpxchg8b have to be emulated atomically */
5082 if (bytes
> 8 || (bytes
& (bytes
- 1)))
5085 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
5087 if (gpa
== UNMAPPED_GVA
||
5088 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5091 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
5094 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
5095 if (is_error_page(page
))
5098 kaddr
= kmap_atomic(page
);
5099 kaddr
+= offset_in_page(gpa
);
5102 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
5105 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
5108 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
5111 exchanged
= CMPXCHG64(kaddr
, old
, new);
5116 kunmap_atomic(kaddr
);
5117 kvm_release_page_dirty(page
);
5120 return X86EMUL_CMPXCHG_FAILED
;
5122 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
5123 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
5125 return X86EMUL_CONTINUE
;
5128 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
5130 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
5133 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
5137 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
5138 if (vcpu
->arch
.pio
.in
)
5139 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5140 vcpu
->arch
.pio
.size
, pd
);
5142 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5143 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5147 pd
+= vcpu
->arch
.pio
.size
;
5152 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5153 unsigned short port
, void *val
,
5154 unsigned int count
, bool in
)
5156 vcpu
->arch
.pio
.port
= port
;
5157 vcpu
->arch
.pio
.in
= in
;
5158 vcpu
->arch
.pio
.count
= count
;
5159 vcpu
->arch
.pio
.size
= size
;
5161 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5162 vcpu
->arch
.pio
.count
= 0;
5166 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5167 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5168 vcpu
->run
->io
.size
= size
;
5169 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5170 vcpu
->run
->io
.count
= count
;
5171 vcpu
->run
->io
.port
= port
;
5176 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5177 int size
, unsigned short port
, void *val
,
5180 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5183 if (vcpu
->arch
.pio
.count
)
5186 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5188 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5191 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5192 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5193 vcpu
->arch
.pio
.count
= 0;
5200 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
5201 int size
, unsigned short port
,
5202 const void *val
, unsigned int count
)
5204 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5206 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5207 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5208 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
5211 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
5213 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
5216 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
5218 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5221 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5223 if (!need_emulate_wbinvd(vcpu
))
5224 return X86EMUL_CONTINUE
;
5226 if (kvm_x86_ops
->has_wbinvd_exit()) {
5227 int cpu
= get_cpu();
5229 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5230 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5231 wbinvd_ipi
, NULL
, 1);
5233 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5236 return X86EMUL_CONTINUE
;
5239 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5241 kvm_emulate_wbinvd_noskip(vcpu
);
5242 return kvm_skip_emulated_instruction(vcpu
);
5244 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5248 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5250 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5253 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5254 unsigned long *dest
)
5256 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5259 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5260 unsigned long value
)
5263 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5266 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5268 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5271 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5273 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5274 unsigned long value
;
5278 value
= kvm_read_cr0(vcpu
);
5281 value
= vcpu
->arch
.cr2
;
5284 value
= kvm_read_cr3(vcpu
);
5287 value
= kvm_read_cr4(vcpu
);
5290 value
= kvm_get_cr8(vcpu
);
5293 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5300 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5302 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5307 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5310 vcpu
->arch
.cr2
= val
;
5313 res
= kvm_set_cr3(vcpu
, val
);
5316 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5319 res
= kvm_set_cr8(vcpu
, val
);
5322 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5329 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5331 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5334 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5336 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5339 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5341 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5344 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5346 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5349 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5351 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5354 static unsigned long emulator_get_cached_segment_base(
5355 struct x86_emulate_ctxt
*ctxt
, int seg
)
5357 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5360 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5361 struct desc_struct
*desc
, u32
*base3
,
5364 struct kvm_segment var
;
5366 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5367 *selector
= var
.selector
;
5370 memset(desc
, 0, sizeof(*desc
));
5378 set_desc_limit(desc
, var
.limit
);
5379 set_desc_base(desc
, (unsigned long)var
.base
);
5380 #ifdef CONFIG_X86_64
5382 *base3
= var
.base
>> 32;
5384 desc
->type
= var
.type
;
5386 desc
->dpl
= var
.dpl
;
5387 desc
->p
= var
.present
;
5388 desc
->avl
= var
.avl
;
5396 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5397 struct desc_struct
*desc
, u32 base3
,
5400 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5401 struct kvm_segment var
;
5403 var
.selector
= selector
;
5404 var
.base
= get_desc_base(desc
);
5405 #ifdef CONFIG_X86_64
5406 var
.base
|= ((u64
)base3
) << 32;
5408 var
.limit
= get_desc_limit(desc
);
5410 var
.limit
= (var
.limit
<< 12) | 0xfff;
5411 var
.type
= desc
->type
;
5412 var
.dpl
= desc
->dpl
;
5417 var
.avl
= desc
->avl
;
5418 var
.present
= desc
->p
;
5419 var
.unusable
= !var
.present
;
5422 kvm_set_segment(vcpu
, &var
, seg
);
5426 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5427 u32 msr_index
, u64
*pdata
)
5429 struct msr_data msr
;
5432 msr
.index
= msr_index
;
5433 msr
.host_initiated
= false;
5434 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5442 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5443 u32 msr_index
, u64 data
)
5445 struct msr_data msr
;
5448 msr
.index
= msr_index
;
5449 msr
.host_initiated
= false;
5450 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5453 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5455 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5457 return vcpu
->arch
.smbase
;
5460 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5462 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5464 vcpu
->arch
.smbase
= smbase
;
5467 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5470 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5473 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5474 u32 pmc
, u64
*pdata
)
5476 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5479 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5481 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5484 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5485 struct x86_instruction_info
*info
,
5486 enum x86_intercept_stage stage
)
5488 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5491 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5492 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5494 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5497 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5499 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5502 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5504 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5507 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5509 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5512 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5514 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5517 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5519 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5522 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5524 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5527 static const struct x86_emulate_ops emulate_ops
= {
5528 .read_gpr
= emulator_read_gpr
,
5529 .write_gpr
= emulator_write_gpr
,
5530 .read_std
= emulator_read_std
,
5531 .write_std
= emulator_write_std
,
5532 .read_phys
= kvm_read_guest_phys_system
,
5533 .fetch
= kvm_fetch_guest_virt
,
5534 .read_emulated
= emulator_read_emulated
,
5535 .write_emulated
= emulator_write_emulated
,
5536 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5537 .invlpg
= emulator_invlpg
,
5538 .pio_in_emulated
= emulator_pio_in_emulated
,
5539 .pio_out_emulated
= emulator_pio_out_emulated
,
5540 .get_segment
= emulator_get_segment
,
5541 .set_segment
= emulator_set_segment
,
5542 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5543 .get_gdt
= emulator_get_gdt
,
5544 .get_idt
= emulator_get_idt
,
5545 .set_gdt
= emulator_set_gdt
,
5546 .set_idt
= emulator_set_idt
,
5547 .get_cr
= emulator_get_cr
,
5548 .set_cr
= emulator_set_cr
,
5549 .cpl
= emulator_get_cpl
,
5550 .get_dr
= emulator_get_dr
,
5551 .set_dr
= emulator_set_dr
,
5552 .get_smbase
= emulator_get_smbase
,
5553 .set_smbase
= emulator_set_smbase
,
5554 .set_msr
= emulator_set_msr
,
5555 .get_msr
= emulator_get_msr
,
5556 .check_pmc
= emulator_check_pmc
,
5557 .read_pmc
= emulator_read_pmc
,
5558 .halt
= emulator_halt
,
5559 .wbinvd
= emulator_wbinvd
,
5560 .fix_hypercall
= emulator_fix_hypercall
,
5561 .intercept
= emulator_intercept
,
5562 .get_cpuid
= emulator_get_cpuid
,
5563 .set_nmi_mask
= emulator_set_nmi_mask
,
5564 .get_hflags
= emulator_get_hflags
,
5565 .set_hflags
= emulator_set_hflags
,
5566 .pre_leave_smm
= emulator_pre_leave_smm
,
5569 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5571 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5573 * an sti; sti; sequence only disable interrupts for the first
5574 * instruction. So, if the last instruction, be it emulated or
5575 * not, left the system with the INT_STI flag enabled, it
5576 * means that the last instruction is an sti. We should not
5577 * leave the flag on in this case. The same goes for mov ss
5579 if (int_shadow
& mask
)
5581 if (unlikely(int_shadow
|| mask
)) {
5582 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5584 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5588 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5590 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5591 if (ctxt
->exception
.vector
== PF_VECTOR
)
5592 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5594 if (ctxt
->exception
.error_code_valid
)
5595 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5596 ctxt
->exception
.error_code
);
5598 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5602 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5604 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5607 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5609 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5610 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5612 ctxt
->eip
= kvm_rip_read(vcpu
);
5613 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5614 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5615 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5616 cs_db
? X86EMUL_MODE_PROT32
:
5617 X86EMUL_MODE_PROT16
;
5618 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5619 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5620 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5622 init_decode_cache(ctxt
);
5623 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5626 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5628 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5631 init_emulate_ctxt(vcpu
);
5635 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5636 ret
= emulate_int_real(ctxt
, irq
);
5638 if (ret
!= X86EMUL_CONTINUE
)
5639 return EMULATE_FAIL
;
5641 ctxt
->eip
= ctxt
->_eip
;
5642 kvm_rip_write(vcpu
, ctxt
->eip
);
5643 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5645 if (irq
== NMI_VECTOR
)
5646 vcpu
->arch
.nmi_pending
= 0;
5648 vcpu
->arch
.interrupt
.pending
= false;
5650 return EMULATE_DONE
;
5652 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5654 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5656 int r
= EMULATE_DONE
;
5658 ++vcpu
->stat
.insn_emulation_fail
;
5659 trace_kvm_emulate_insn_failed(vcpu
);
5660 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5661 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5662 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5663 vcpu
->run
->internal
.ndata
= 0;
5664 r
= EMULATE_USER_EXIT
;
5666 kvm_queue_exception(vcpu
, UD_VECTOR
);
5671 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5672 bool write_fault_to_shadow_pgtable
,
5678 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5681 if (!vcpu
->arch
.mmu
.direct_map
) {
5683 * Write permission should be allowed since only
5684 * write access need to be emulated.
5686 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5689 * If the mapping is invalid in guest, let cpu retry
5690 * it to generate fault.
5692 if (gpa
== UNMAPPED_GVA
)
5697 * Do not retry the unhandleable instruction if it faults on the
5698 * readonly host memory, otherwise it will goto a infinite loop:
5699 * retry instruction -> write #PF -> emulation fail -> retry
5700 * instruction -> ...
5702 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5705 * If the instruction failed on the error pfn, it can not be fixed,
5706 * report the error to userspace.
5708 if (is_error_noslot_pfn(pfn
))
5711 kvm_release_pfn_clean(pfn
);
5713 /* The instructions are well-emulated on direct mmu. */
5714 if (vcpu
->arch
.mmu
.direct_map
) {
5715 unsigned int indirect_shadow_pages
;
5717 spin_lock(&vcpu
->kvm
->mmu_lock
);
5718 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5719 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5721 if (indirect_shadow_pages
)
5722 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5728 * if emulation was due to access to shadowed page table
5729 * and it failed try to unshadow page and re-enter the
5730 * guest to let CPU execute the instruction.
5732 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5735 * If the access faults on its page table, it can not
5736 * be fixed by unprotecting shadow page and it should
5737 * be reported to userspace.
5739 return !write_fault_to_shadow_pgtable
;
5742 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5743 unsigned long cr2
, int emulation_type
)
5745 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5746 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5748 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5749 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5752 * If the emulation is caused by #PF and it is non-page_table
5753 * writing instruction, it means the VM-EXIT is caused by shadow
5754 * page protected, we can zap the shadow page and retry this
5755 * instruction directly.
5757 * Note: if the guest uses a non-page-table modifying instruction
5758 * on the PDE that points to the instruction, then we will unmap
5759 * the instruction and go to an infinite loop. So, we cache the
5760 * last retried eip and the last fault address, if we meet the eip
5761 * and the address again, we can break out of the potential infinite
5764 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5766 if (!(emulation_type
& EMULTYPE_RETRY
))
5769 if (x86_page_table_writing_insn(ctxt
))
5772 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5775 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5776 vcpu
->arch
.last_retry_addr
= cr2
;
5778 if (!vcpu
->arch
.mmu
.direct_map
)
5779 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5781 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5786 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5787 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5789 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5791 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5792 /* This is a good place to trace that we are exiting SMM. */
5793 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5795 /* Process a latched INIT or SMI, if any. */
5796 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5799 kvm_mmu_reset_context(vcpu
);
5802 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5804 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5806 vcpu
->arch
.hflags
= emul_flags
;
5808 if (changed
& HF_SMM_MASK
)
5809 kvm_smm_changed(vcpu
);
5812 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5821 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5822 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5827 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5829 struct kvm_run
*kvm_run
= vcpu
->run
;
5831 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5832 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5833 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5834 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5835 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5836 *r
= EMULATE_USER_EXIT
;
5839 * "Certain debug exceptions may clear bit 0-3. The
5840 * remaining contents of the DR6 register are never
5841 * cleared by the processor".
5843 vcpu
->arch
.dr6
&= ~15;
5844 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5845 kvm_queue_exception(vcpu
, DB_VECTOR
);
5849 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5851 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5852 int r
= EMULATE_DONE
;
5854 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5857 * rflags is the old, "raw" value of the flags. The new value has
5858 * not been saved yet.
5860 * This is correct even for TF set by the guest, because "the
5861 * processor will not generate this exception after the instruction
5862 * that sets the TF flag".
5864 if (unlikely(rflags
& X86_EFLAGS_TF
))
5865 kvm_vcpu_do_singlestep(vcpu
, &r
);
5866 return r
== EMULATE_DONE
;
5868 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5870 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5872 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5873 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5874 struct kvm_run
*kvm_run
= vcpu
->run
;
5875 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5876 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5877 vcpu
->arch
.guest_debug_dr7
,
5881 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5882 kvm_run
->debug
.arch
.pc
= eip
;
5883 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5884 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5885 *r
= EMULATE_USER_EXIT
;
5890 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5891 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5892 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5893 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5898 vcpu
->arch
.dr6
&= ~15;
5899 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5900 kvm_queue_exception(vcpu
, DB_VECTOR
);
5909 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5916 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5917 bool writeback
= true;
5918 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5920 vcpu
->arch
.l1tf_flush_l1d
= true;
5923 * Clear write_fault_to_shadow_pgtable here to ensure it is
5926 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5927 kvm_clear_exception_queue(vcpu
);
5929 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5930 init_emulate_ctxt(vcpu
);
5933 * We will reenter on the same instruction since
5934 * we do not set complete_userspace_io. This does not
5935 * handle watchpoints yet, those would be handled in
5938 if (!(emulation_type
& EMULTYPE_SKIP
) &&
5939 kvm_vcpu_check_breakpoint(vcpu
, &r
))
5942 ctxt
->interruptibility
= 0;
5943 ctxt
->have_exception
= false;
5944 ctxt
->exception
.vector
= -1;
5945 ctxt
->perm_ok
= false;
5947 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5949 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5951 trace_kvm_emulate_insn_start(vcpu
);
5952 ++vcpu
->stat
.insn_emulation
;
5953 if (r
!= EMULATION_OK
) {
5954 if (emulation_type
& EMULTYPE_TRAP_UD
)
5955 return EMULATE_FAIL
;
5956 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5958 return EMULATE_DONE
;
5959 if (ctxt
->have_exception
) {
5961 * #UD should result in just EMULATION_FAILED, and trap-like
5962 * exception should not be encountered during decode.
5964 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
5965 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
5966 inject_emulated_exception(vcpu
);
5967 return EMULATE_DONE
;
5969 if (emulation_type
& EMULTYPE_SKIP
)
5970 return EMULATE_FAIL
;
5971 return handle_emulation_failure(vcpu
);
5975 if (emulation_type
& EMULTYPE_SKIP
) {
5976 kvm_rip_write(vcpu
, ctxt
->_eip
);
5977 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5978 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5979 return EMULATE_DONE
;
5982 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5983 return EMULATE_DONE
;
5985 /* this is needed for vmware backdoor interface to work since it
5986 changes registers values during IO operation */
5987 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5988 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5989 emulator_invalidate_register_cache(ctxt
);
5993 /* Save the faulting GPA (cr2) in the address field */
5994 ctxt
->exception
.address
= cr2
;
5996 r
= x86_emulate_insn(ctxt
);
5998 if (r
== EMULATION_INTERCEPTED
)
5999 return EMULATE_DONE
;
6001 if (r
== EMULATION_FAILED
) {
6002 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
6004 return EMULATE_DONE
;
6006 return handle_emulation_failure(vcpu
);
6009 if (ctxt
->have_exception
) {
6011 if (inject_emulated_exception(vcpu
))
6013 } else if (vcpu
->arch
.pio
.count
) {
6014 if (!vcpu
->arch
.pio
.in
) {
6015 /* FIXME: return into emulator if single-stepping. */
6016 vcpu
->arch
.pio
.count
= 0;
6019 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
6021 r
= EMULATE_USER_EXIT
;
6022 } else if (vcpu
->mmio_needed
) {
6023 if (!vcpu
->mmio_is_write
)
6025 r
= EMULATE_USER_EXIT
;
6026 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6027 } else if (r
== EMULATION_RESTART
)
6033 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6034 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
6035 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6036 if (!ctxt
->have_exception
||
6037 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
6038 kvm_rip_write(vcpu
, ctxt
->eip
);
6039 if (r
== EMULATE_DONE
&& ctxt
->tf
)
6040 kvm_vcpu_do_singlestep(vcpu
, &r
);
6041 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
6045 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6046 * do nothing, and it will be requested again as soon as
6047 * the shadow expires. But we still need to check here,
6048 * because POPF has no interrupt shadow.
6050 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
6051 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6053 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
6057 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
6059 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
6061 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6062 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
6063 size
, port
, &val
, 1);
6064 /* do not return to emulator after return from userspace */
6065 vcpu
->arch
.pio
.count
= 0;
6068 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
6070 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
6074 /* We should only ever be called with arch.pio.count equal to 1 */
6075 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
6077 /* For size less than 4 we merge, else we zero extend */
6078 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
6082 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6083 * the copy and tracing
6085 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
6086 vcpu
->arch
.pio
.port
, &val
, 1);
6087 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6092 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
6097 /* For size less than 4 we merge, else we zero extend */
6098 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
6100 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
6103 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6107 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
6111 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
6113 static int kvmclock_cpu_down_prep(unsigned int cpu
)
6115 __this_cpu_write(cpu_tsc_khz
, 0);
6119 static void tsc_khz_changed(void *data
)
6121 struct cpufreq_freqs
*freq
= data
;
6122 unsigned long khz
= 0;
6126 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6127 khz
= cpufreq_quick_get(raw_smp_processor_id());
6130 __this_cpu_write(cpu_tsc_khz
, khz
);
6133 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
6136 struct cpufreq_freqs
*freq
= data
;
6138 struct kvm_vcpu
*vcpu
;
6139 int i
, send_ipi
= 0;
6142 * We allow guests to temporarily run on slowing clocks,
6143 * provided we notify them after, or to run on accelerating
6144 * clocks, provided we notify them before. Thus time never
6147 * However, we have a problem. We can't atomically update
6148 * the frequency of a given CPU from this function; it is
6149 * merely a notifier, which can be called from any CPU.
6150 * Changing the TSC frequency at arbitrary points in time
6151 * requires a recomputation of local variables related to
6152 * the TSC for each VCPU. We must flag these local variables
6153 * to be updated and be sure the update takes place with the
6154 * new frequency before any guests proceed.
6156 * Unfortunately, the combination of hotplug CPU and frequency
6157 * change creates an intractable locking scenario; the order
6158 * of when these callouts happen is undefined with respect to
6159 * CPU hotplug, and they can race with each other. As such,
6160 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6161 * undefined; you can actually have a CPU frequency change take
6162 * place in between the computation of X and the setting of the
6163 * variable. To protect against this problem, all updates of
6164 * the per_cpu tsc_khz variable are done in an interrupt
6165 * protected IPI, and all callers wishing to update the value
6166 * must wait for a synchronous IPI to complete (which is trivial
6167 * if the caller is on the CPU already). This establishes the
6168 * necessary total order on variable updates.
6170 * Note that because a guest time update may take place
6171 * anytime after the setting of the VCPU's request bit, the
6172 * correct TSC value must be set before the request. However,
6173 * to ensure the update actually makes it to any guest which
6174 * starts running in hardware virtualization between the set
6175 * and the acquisition of the spinlock, we must also ping the
6176 * CPU after setting the request bit.
6180 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
6182 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
6185 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6187 spin_lock(&kvm_lock
);
6188 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6189 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6190 if (vcpu
->cpu
!= freq
->cpu
)
6192 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6193 if (vcpu
->cpu
!= smp_processor_id())
6197 spin_unlock(&kvm_lock
);
6199 if (freq
->old
< freq
->new && send_ipi
) {
6201 * We upscale the frequency. Must make the guest
6202 * doesn't see old kvmclock values while running with
6203 * the new frequency, otherwise we risk the guest sees
6204 * time go backwards.
6206 * In case we update the frequency for another cpu
6207 * (which might be in guest context) send an interrupt
6208 * to kick the cpu out of guest context. Next time
6209 * guest context is entered kvmclock will be updated,
6210 * so the guest will not see stale values.
6212 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6217 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
6218 .notifier_call
= kvmclock_cpufreq_notifier
6221 static int kvmclock_cpu_online(unsigned int cpu
)
6223 tsc_khz_changed(NULL
);
6227 static void kvm_timer_init(void)
6229 max_tsc_khz
= tsc_khz
;
6231 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6232 #ifdef CONFIG_CPU_FREQ
6233 struct cpufreq_policy policy
;
6236 memset(&policy
, 0, sizeof(policy
));
6238 cpufreq_get_policy(&policy
, cpu
);
6239 if (policy
.cpuinfo
.max_freq
)
6240 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6243 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6244 CPUFREQ_TRANSITION_NOTIFIER
);
6246 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6248 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6249 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6252 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6254 int kvm_is_in_guest(void)
6256 return __this_cpu_read(current_vcpu
) != NULL
;
6259 static int kvm_is_user_mode(void)
6263 if (__this_cpu_read(current_vcpu
))
6264 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6266 return user_mode
!= 0;
6269 static unsigned long kvm_get_guest_ip(void)
6271 unsigned long ip
= 0;
6273 if (__this_cpu_read(current_vcpu
))
6274 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6279 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6280 .is_in_guest
= kvm_is_in_guest
,
6281 .is_user_mode
= kvm_is_user_mode
,
6282 .get_guest_ip
= kvm_get_guest_ip
,
6285 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6287 __this_cpu_write(current_vcpu
, vcpu
);
6289 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6291 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6293 __this_cpu_write(current_vcpu
, NULL
);
6295 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6297 static void kvm_set_mmio_spte_mask(void)
6300 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6303 * Set the reserved bits and the present bit of an paging-structure
6304 * entry to generate page fault with PFER.RSV = 1.
6308 * Mask the uppermost physical address bit, which would be reserved as
6309 * long as the supported physical address width is less than 52.
6313 /* Set the present bit. */
6317 * If reserved bit is not supported, clear the present bit to disable
6320 if (IS_ENABLED(CONFIG_X86_64
) && maxphyaddr
== 52)
6323 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6326 #ifdef CONFIG_X86_64
6327 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6331 struct kvm_vcpu
*vcpu
;
6334 spin_lock(&kvm_lock
);
6335 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6336 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6337 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6338 atomic_set(&kvm_guest_has_master_clock
, 0);
6339 spin_unlock(&kvm_lock
);
6342 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6345 * Notification about pvclock gtod data update.
6347 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6350 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6351 struct timekeeper
*tk
= priv
;
6353 update_pvclock_gtod(tk
);
6355 /* disable master clock if host does not trust, or does not
6356 * use, TSC clocksource
6358 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6359 atomic_read(&kvm_guest_has_master_clock
) != 0)
6360 queue_work(system_long_wq
, &pvclock_gtod_work
);
6365 static struct notifier_block pvclock_gtod_notifier
= {
6366 .notifier_call
= pvclock_gtod_notify
,
6370 int kvm_arch_init(void *opaque
)
6373 struct kvm_x86_ops
*ops
= opaque
;
6376 printk(KERN_ERR
"kvm: already loaded the other module\n");
6381 if (!ops
->cpu_has_kvm_support()) {
6382 printk(KERN_ERR
"kvm: no hardware support\n");
6386 if (ops
->disabled_by_bios()) {
6387 printk(KERN_WARNING
"kvm: disabled by bios\n");
6393 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6395 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6399 r
= kvm_mmu_module_init();
6401 goto out_free_percpu
;
6403 kvm_set_mmio_spte_mask();
6407 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6408 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6409 PT_PRESENT_MASK
, 0, sme_me_mask
);
6412 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6414 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6415 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6418 #ifdef CONFIG_X86_64
6419 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6425 free_percpu(shared_msrs
);
6430 void kvm_arch_exit(void)
6433 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6435 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6436 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6437 CPUFREQ_TRANSITION_NOTIFIER
);
6438 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6439 #ifdef CONFIG_X86_64
6440 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6443 kvm_mmu_module_exit();
6444 free_percpu(shared_msrs
);
6447 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6449 ++vcpu
->stat
.halt_exits
;
6450 if (lapic_in_kernel(vcpu
)) {
6451 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6454 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6458 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6460 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6462 int ret
= kvm_skip_emulated_instruction(vcpu
);
6464 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6465 * KVM_EXIT_DEBUG here.
6467 return kvm_vcpu_halt(vcpu
) && ret
;
6469 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6471 #ifdef CONFIG_X86_64
6472 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6473 unsigned long clock_type
)
6475 struct kvm_clock_pairing clock_pairing
;
6480 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6481 return -KVM_EOPNOTSUPP
;
6483 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6484 return -KVM_EOPNOTSUPP
;
6486 clock_pairing
.sec
= ts
.tv_sec
;
6487 clock_pairing
.nsec
= ts
.tv_nsec
;
6488 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6489 clock_pairing
.flags
= 0;
6490 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
6493 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6494 sizeof(struct kvm_clock_pairing
)))
6502 * kvm_pv_kick_cpu_op: Kick a vcpu.
6504 * @apicid - apicid of vcpu to be kicked.
6506 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6508 struct kvm_lapic_irq lapic_irq
;
6510 lapic_irq
.shorthand
= 0;
6511 lapic_irq
.dest_mode
= 0;
6512 lapic_irq
.level
= 0;
6513 lapic_irq
.dest_id
= apicid
;
6514 lapic_irq
.msi_redir_hint
= false;
6516 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6517 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6520 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6522 vcpu
->arch
.apicv_active
= false;
6523 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6526 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6528 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6531 if (kvm_hv_hypercall_enabled(vcpu
->kvm
)) {
6532 if (!kvm_hv_hypercall(vcpu
))
6537 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6538 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6539 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6540 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6541 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6543 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6545 op_64_bit
= is_64_bit_mode(vcpu
);
6554 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6560 case KVM_HC_VAPIC_POLL_IRQ
:
6563 case KVM_HC_KICK_CPU
:
6564 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6567 #ifdef CONFIG_X86_64
6568 case KVM_HC_CLOCK_PAIRING
:
6569 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6579 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6582 ++vcpu
->stat
.hypercalls
;
6583 return kvm_skip_emulated_instruction(vcpu
);
6585 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6587 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6589 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6590 char instruction
[3];
6591 unsigned long rip
= kvm_rip_read(vcpu
);
6593 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6595 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6599 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6601 return vcpu
->run
->request_interrupt_window
&&
6602 likely(!pic_in_kernel(vcpu
->kvm
));
6605 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6607 struct kvm_run
*kvm_run
= vcpu
->run
;
6609 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6610 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6611 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6612 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6613 kvm_run
->ready_for_interrupt_injection
=
6614 pic_in_kernel(vcpu
->kvm
) ||
6615 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6618 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6622 if (!kvm_x86_ops
->update_cr8_intercept
)
6625 if (!lapic_in_kernel(vcpu
))
6628 if (vcpu
->arch
.apicv_active
)
6631 if (!vcpu
->arch
.apic
->vapic_addr
)
6632 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6639 tpr
= kvm_lapic_get_cr8(vcpu
);
6641 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6644 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6648 /* try to reinject previous events if any */
6649 if (vcpu
->arch
.exception
.injected
) {
6650 kvm_x86_ops
->queue_exception(vcpu
);
6655 * Exceptions must be injected immediately, or the exception
6656 * frame will have the address of the NMI or interrupt handler.
6658 if (!vcpu
->arch
.exception
.pending
) {
6659 if (vcpu
->arch
.nmi_injected
) {
6660 kvm_x86_ops
->set_nmi(vcpu
);
6664 if (vcpu
->arch
.interrupt
.pending
) {
6665 kvm_x86_ops
->set_irq(vcpu
);
6670 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6671 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6676 /* try to inject new event if pending */
6677 if (vcpu
->arch
.exception
.pending
) {
6678 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6679 vcpu
->arch
.exception
.has_error_code
,
6680 vcpu
->arch
.exception
.error_code
);
6682 vcpu
->arch
.exception
.pending
= false;
6683 vcpu
->arch
.exception
.injected
= true;
6685 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6686 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6689 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6690 (vcpu
->arch
.dr7
& DR7_GD
)) {
6691 vcpu
->arch
.dr7
&= ~DR7_GD
;
6692 kvm_update_dr7(vcpu
);
6695 kvm_x86_ops
->queue_exception(vcpu
);
6696 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) && kvm_x86_ops
->smi_allowed(vcpu
)) {
6697 vcpu
->arch
.smi_pending
= false;
6699 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6700 --vcpu
->arch
.nmi_pending
;
6701 vcpu
->arch
.nmi_injected
= true;
6702 kvm_x86_ops
->set_nmi(vcpu
);
6703 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6705 * Because interrupts can be injected asynchronously, we are
6706 * calling check_nested_events again here to avoid a race condition.
6707 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6708 * proposal and current concerns. Perhaps we should be setting
6709 * KVM_REQ_EVENT only on certain events and not unconditionally?
6711 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6712 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6716 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6717 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6719 kvm_x86_ops
->set_irq(vcpu
);
6726 static void process_nmi(struct kvm_vcpu
*vcpu
)
6731 * x86 is limited to one NMI running, and one NMI pending after it.
6732 * If an NMI is already in progress, limit further NMIs to just one.
6733 * Otherwise, allow two (and we'll inject the first one immediately).
6735 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6738 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6739 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6740 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6743 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6746 flags
|= seg
->g
<< 23;
6747 flags
|= seg
->db
<< 22;
6748 flags
|= seg
->l
<< 21;
6749 flags
|= seg
->avl
<< 20;
6750 flags
|= seg
->present
<< 15;
6751 flags
|= seg
->dpl
<< 13;
6752 flags
|= seg
->s
<< 12;
6753 flags
|= seg
->type
<< 8;
6757 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6759 struct kvm_segment seg
;
6762 kvm_get_segment(vcpu
, &seg
, n
);
6763 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6766 offset
= 0x7f84 + n
* 12;
6768 offset
= 0x7f2c + (n
- 3) * 12;
6770 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6771 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6772 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6775 #ifdef CONFIG_X86_64
6776 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6778 struct kvm_segment seg
;
6782 kvm_get_segment(vcpu
, &seg
, n
);
6783 offset
= 0x7e00 + n
* 16;
6785 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6786 put_smstate(u16
, buf
, offset
, seg
.selector
);
6787 put_smstate(u16
, buf
, offset
+ 2, flags
);
6788 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6789 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6793 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6796 struct kvm_segment seg
;
6800 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6801 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6802 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6803 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6805 for (i
= 0; i
< 8; i
++)
6806 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6808 kvm_get_dr(vcpu
, 6, &val
);
6809 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6810 kvm_get_dr(vcpu
, 7, &val
);
6811 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6813 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6814 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6815 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6816 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6817 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6819 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6820 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6821 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6822 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6823 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6825 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6826 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6827 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6829 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6830 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6831 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6833 for (i
= 0; i
< 6; i
++)
6834 enter_smm_save_seg_32(vcpu
, buf
, i
);
6836 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6839 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6840 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6843 #ifdef CONFIG_X86_64
6844 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6847 struct kvm_segment seg
;
6851 for (i
= 0; i
< 16; i
++)
6852 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6854 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6855 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6857 kvm_get_dr(vcpu
, 6, &val
);
6858 put_smstate(u64
, buf
, 0x7f68, val
);
6859 kvm_get_dr(vcpu
, 7, &val
);
6860 put_smstate(u64
, buf
, 0x7f60, val
);
6862 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6863 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6864 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6866 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6869 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6871 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6873 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6874 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6875 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6876 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6877 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6879 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6880 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6881 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6883 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6884 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6885 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6886 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6887 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6889 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6890 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6891 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6893 for (i
= 0; i
< 6; i
++)
6894 enter_smm_save_seg_64(vcpu
, buf
, i
);
6898 static void enter_smm(struct kvm_vcpu
*vcpu
)
6900 struct kvm_segment cs
, ds
;
6905 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6906 memset(buf
, 0, 512);
6907 #ifdef CONFIG_X86_64
6908 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6909 enter_smm_save_state_64(vcpu
, buf
);
6912 enter_smm_save_state_32(vcpu
, buf
);
6915 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6916 * vCPU state (e.g. leave guest mode) after we've saved the state into
6917 * the SMM state-save area.
6919 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
6921 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6922 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6924 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6925 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6927 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6929 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6930 kvm_rip_write(vcpu
, 0x8000);
6932 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6933 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6934 vcpu
->arch
.cr0
= cr0
;
6936 kvm_x86_ops
->set_cr4(vcpu
, 0);
6938 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6939 dt
.address
= dt
.size
= 0;
6940 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6942 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6944 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6945 cs
.base
= vcpu
->arch
.smbase
;
6950 cs
.limit
= ds
.limit
= 0xffffffff;
6951 cs
.type
= ds
.type
= 0x3;
6952 cs
.dpl
= ds
.dpl
= 0;
6957 cs
.avl
= ds
.avl
= 0;
6958 cs
.present
= ds
.present
= 1;
6959 cs
.unusable
= ds
.unusable
= 0;
6960 cs
.padding
= ds
.padding
= 0;
6962 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6963 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6964 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6965 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6966 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6967 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6969 #ifdef CONFIG_X86_64
6970 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6971 kvm_x86_ops
->set_efer(vcpu
, 0);
6974 kvm_update_cpuid(vcpu
);
6975 kvm_mmu_reset_context(vcpu
);
6978 static void process_smi(struct kvm_vcpu
*vcpu
)
6980 vcpu
->arch
.smi_pending
= true;
6981 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6984 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6986 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6989 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6991 u64 eoi_exit_bitmap
[4];
6993 if (!kvm_apic_present(vcpu
))
6996 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6998 if (irqchip_split(vcpu
->kvm
))
6999 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
7001 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
7002 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7003 if (ioapic_in_kernel(vcpu
->kvm
))
7004 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
7006 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
7007 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
7008 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
7011 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
7013 ++vcpu
->stat
.tlb_flush
;
7014 kvm_x86_ops
->tlb_flush(vcpu
);
7017 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
7018 unsigned long start
, unsigned long end
)
7020 unsigned long apic_address
;
7023 * The physical address of apic access page is stored in the VMCS.
7024 * Update it when it becomes invalid.
7026 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
7027 if (start
<= apic_address
&& apic_address
< end
)
7028 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
7031 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
7033 struct page
*page
= NULL
;
7035 if (!lapic_in_kernel(vcpu
))
7038 if (!kvm_x86_ops
->set_apic_access_page_addr
)
7041 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
7042 if (is_error_page(page
))
7044 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
7047 * Do not pin apic access page in memory, the MMU notifier
7048 * will call us again if it is migrated or swapped out.
7052 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
7055 * Returns 1 to let vcpu_run() continue the guest execution loop without
7056 * exiting to the userspace. Otherwise, the value will be returned to the
7059 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
7063 dm_request_for_irq_injection(vcpu
) &&
7064 kvm_cpu_accept_dm_intr(vcpu
);
7066 bool req_immediate_exit
= false;
7068 if (kvm_request_pending(vcpu
)) {
7069 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
7070 kvm_mmu_unload(vcpu
);
7071 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
7072 __kvm_migrate_timers(vcpu
);
7073 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
7074 kvm_gen_update_masterclock(vcpu
->kvm
);
7075 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
7076 kvm_gen_kvmclock_update(vcpu
);
7077 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
7078 r
= kvm_guest_time_update(vcpu
);
7082 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
7083 kvm_mmu_sync_roots(vcpu
);
7084 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
7085 kvm_vcpu_flush_tlb(vcpu
);
7086 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
7087 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
7091 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
7092 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
7093 vcpu
->mmio_needed
= 0;
7097 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
7098 /* Page is swapped out. Do synthetic halt */
7099 vcpu
->arch
.apf
.halted
= true;
7103 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
7104 record_steal_time(vcpu
);
7105 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
7107 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
7109 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
7110 kvm_pmu_handle_event(vcpu
);
7111 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
7112 kvm_pmu_deliver_pmi(vcpu
);
7113 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
7114 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
7115 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
7116 vcpu
->arch
.ioapic_handled_vectors
)) {
7117 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
7118 vcpu
->run
->eoi
.vector
=
7119 vcpu
->arch
.pending_ioapic_eoi
;
7124 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
7125 vcpu_scan_ioapic(vcpu
);
7126 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
7127 kvm_vcpu_reload_apic_access_page(vcpu
);
7128 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
7129 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7130 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
7134 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
7135 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7136 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
7140 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
7141 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
7142 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
7148 * KVM_REQ_HV_STIMER has to be processed after
7149 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7150 * depend on the guest clock being up-to-date
7152 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
7153 kvm_hv_process_stimers(vcpu
);
7156 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
7157 ++vcpu
->stat
.req_event
;
7158 kvm_apic_accept_events(vcpu
);
7159 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
7164 if (inject_pending_event(vcpu
, req_int_win
) != 0)
7165 req_immediate_exit
= true;
7167 /* Enable SMI/NMI/IRQ window open exits if needed.
7169 * SMIs have three cases:
7170 * 1) They can be nested, and then there is nothing to
7171 * do here because RSM will cause a vmexit anyway.
7172 * 2) There is an ISA-specific reason why SMI cannot be
7173 * injected, and the moment when this changes can be
7175 * 3) Or the SMI can be pending because
7176 * inject_pending_event has completed the injection
7177 * of an IRQ or NMI from the previous vmexit, and
7178 * then we request an immediate exit to inject the
7181 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
7182 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
7183 req_immediate_exit
= true;
7184 if (vcpu
->arch
.nmi_pending
)
7185 kvm_x86_ops
->enable_nmi_window(vcpu
);
7186 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
7187 kvm_x86_ops
->enable_irq_window(vcpu
);
7188 WARN_ON(vcpu
->arch
.exception
.pending
);
7191 if (kvm_lapic_enabled(vcpu
)) {
7192 update_cr8_intercept(vcpu
);
7193 kvm_lapic_sync_to_vapic(vcpu
);
7197 r
= kvm_mmu_reload(vcpu
);
7199 goto cancel_injection
;
7204 kvm_x86_ops
->prepare_guest_switch(vcpu
);
7207 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7208 * IPI are then delayed after guest entry, which ensures that they
7209 * result in virtual interrupt delivery.
7211 local_irq_disable();
7212 vcpu
->mode
= IN_GUEST_MODE
;
7214 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7217 * 1) We should set ->mode before checking ->requests. Please see
7218 * the comment in kvm_vcpu_exiting_guest_mode().
7220 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7221 * pairs with the memory barrier implicit in pi_test_and_set_on
7222 * (see vmx_deliver_posted_interrupt).
7224 * 3) This also orders the write to mode from any reads to the page
7225 * tables done while the VCPU is running. Please see the comment
7226 * in kvm_flush_remote_tlbs.
7228 smp_mb__after_srcu_read_unlock();
7231 * This handles the case where a posted interrupt was
7232 * notified with kvm_vcpu_kick.
7234 if (kvm_lapic_enabled(vcpu
)) {
7235 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
7236 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7239 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7240 || need_resched() || signal_pending(current
)) {
7241 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7245 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7247 goto cancel_injection
;
7250 if (req_immediate_exit
) {
7251 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7252 smp_send_reschedule(vcpu
->cpu
);
7255 trace_kvm_entry(vcpu
->vcpu_id
);
7256 wait_lapic_expire(vcpu
);
7257 guest_enter_irqoff();
7259 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7261 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7262 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7263 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7264 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7265 set_debugreg(vcpu
->arch
.dr6
, 6);
7266 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7269 kvm_x86_ops
->run(vcpu
);
7272 * Do this here before restoring debug registers on the host. And
7273 * since we do this before handling the vmexit, a DR access vmexit
7274 * can (a) read the correct value of the debug registers, (b) set
7275 * KVM_DEBUGREG_WONT_EXIT again.
7277 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7278 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7279 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7280 kvm_update_dr0123(vcpu
);
7281 kvm_update_dr6(vcpu
);
7282 kvm_update_dr7(vcpu
);
7283 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7287 * If the guest has used debug registers, at least dr7
7288 * will be disabled while returning to the host.
7289 * If we don't have active breakpoints in the host, we don't
7290 * care about the messed up debug address registers. But if
7291 * we have some of them active, restore the old state.
7293 if (hw_breakpoint_active())
7294 hw_breakpoint_restore();
7296 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7298 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7301 kvm_x86_ops
->handle_external_intr(vcpu
);
7305 guest_exit_irqoff();
7310 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7313 * Profile KVM exit RIPs:
7315 if (unlikely(prof_on
== KVM_PROFILING
)) {
7316 unsigned long rip
= kvm_rip_read(vcpu
);
7317 profile_hit(KVM_PROFILING
, (void *)rip
);
7320 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7321 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7323 if (vcpu
->arch
.apic_attention
)
7324 kvm_lapic_sync_from_vapic(vcpu
);
7326 vcpu
->arch
.gpa_available
= false;
7327 r
= kvm_x86_ops
->handle_exit(vcpu
);
7331 kvm_x86_ops
->cancel_injection(vcpu
);
7332 if (unlikely(vcpu
->arch
.apic_attention
))
7333 kvm_lapic_sync_from_vapic(vcpu
);
7338 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7340 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7341 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7342 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7343 kvm_vcpu_block(vcpu
);
7344 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7346 if (kvm_x86_ops
->post_block
)
7347 kvm_x86_ops
->post_block(vcpu
);
7349 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7353 kvm_apic_accept_events(vcpu
);
7354 switch(vcpu
->arch
.mp_state
) {
7355 case KVM_MP_STATE_HALTED
:
7356 vcpu
->arch
.pv
.pv_unhalted
= false;
7357 vcpu
->arch
.mp_state
=
7358 KVM_MP_STATE_RUNNABLE
;
7359 case KVM_MP_STATE_RUNNABLE
:
7360 vcpu
->arch
.apf
.halted
= false;
7362 case KVM_MP_STATE_INIT_RECEIVED
:
7371 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7373 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7374 kvm_x86_ops
->check_nested_events(vcpu
, false);
7376 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7377 !vcpu
->arch
.apf
.halted
);
7380 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7383 struct kvm
*kvm
= vcpu
->kvm
;
7385 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7386 vcpu
->arch
.l1tf_flush_l1d
= true;
7389 if (kvm_vcpu_running(vcpu
)) {
7390 r
= vcpu_enter_guest(vcpu
);
7392 r
= vcpu_block(kvm
, vcpu
);
7398 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7399 if (kvm_cpu_has_pending_timer(vcpu
))
7400 kvm_inject_pending_timer_irqs(vcpu
);
7402 if (dm_request_for_irq_injection(vcpu
) &&
7403 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7405 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7406 ++vcpu
->stat
.request_irq_exits
;
7410 kvm_check_async_pf_completion(vcpu
);
7412 if (signal_pending(current
)) {
7414 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7415 ++vcpu
->stat
.signal_exits
;
7418 if (need_resched()) {
7419 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7421 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7425 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7430 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7433 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7434 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7435 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7436 if (r
!= EMULATE_DONE
)
7441 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7443 BUG_ON(!vcpu
->arch
.pio
.count
);
7445 return complete_emulated_io(vcpu
);
7449 * Implements the following, as a state machine:
7453 * for each mmio piece in the fragment
7461 * for each mmio piece in the fragment
7466 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7468 struct kvm_run
*run
= vcpu
->run
;
7469 struct kvm_mmio_fragment
*frag
;
7472 BUG_ON(!vcpu
->mmio_needed
);
7474 /* Complete previous fragment */
7475 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7476 len
= min(8u, frag
->len
);
7477 if (!vcpu
->mmio_is_write
)
7478 memcpy(frag
->data
, run
->mmio
.data
, len
);
7480 if (frag
->len
<= 8) {
7481 /* Switch to the next fragment. */
7483 vcpu
->mmio_cur_fragment
++;
7485 /* Go forward to the next mmio piece. */
7491 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7492 vcpu
->mmio_needed
= 0;
7494 /* FIXME: return into emulator if single-stepping. */
7495 if (vcpu
->mmio_is_write
)
7497 vcpu
->mmio_read_completed
= 1;
7498 return complete_emulated_io(vcpu
);
7501 run
->exit_reason
= KVM_EXIT_MMIO
;
7502 run
->mmio
.phys_addr
= frag
->gpa
;
7503 if (vcpu
->mmio_is_write
)
7504 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7505 run
->mmio
.len
= min(8u, frag
->len
);
7506 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7507 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7512 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7516 kvm_sigset_activate(vcpu
);
7518 kvm_load_guest_fpu(vcpu
);
7520 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7521 if (kvm_run
->immediate_exit
) {
7525 kvm_vcpu_block(vcpu
);
7526 kvm_apic_accept_events(vcpu
);
7527 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7529 if (signal_pending(current
)) {
7531 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7532 ++vcpu
->stat
.signal_exits
;
7537 /* re-sync apic's tpr */
7538 if (!lapic_in_kernel(vcpu
)) {
7539 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7545 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7546 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7547 vcpu
->arch
.complete_userspace_io
= NULL
;
7552 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7554 if (kvm_run
->immediate_exit
)
7560 kvm_put_guest_fpu(vcpu
);
7561 post_kvm_run_save(vcpu
);
7562 kvm_sigset_deactivate(vcpu
);
7567 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7569 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7571 * We are here if userspace calls get_regs() in the middle of
7572 * instruction emulation. Registers state needs to be copied
7573 * back from emulation context to vcpu. Userspace shouldn't do
7574 * that usually, but some bad designed PV devices (vmware
7575 * backdoor interface) need this to work
7577 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7578 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7580 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7581 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7582 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7583 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7584 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7585 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7586 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7587 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7588 #ifdef CONFIG_X86_64
7589 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7590 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7591 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7592 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7593 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7594 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7595 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7596 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7599 regs
->rip
= kvm_rip_read(vcpu
);
7600 regs
->rflags
= kvm_get_rflags(vcpu
);
7605 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7607 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7608 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7610 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7611 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7612 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7613 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7614 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7615 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7616 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7617 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7618 #ifdef CONFIG_X86_64
7619 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7620 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7621 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7622 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7623 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7624 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7625 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7626 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7629 kvm_rip_write(vcpu
, regs
->rip
);
7630 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7632 vcpu
->arch
.exception
.pending
= false;
7634 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7639 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7641 struct kvm_segment cs
;
7643 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7647 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7649 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7650 struct kvm_sregs
*sregs
)
7654 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7655 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7656 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7657 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7658 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7659 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7661 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7662 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7664 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7665 sregs
->idt
.limit
= dt
.size
;
7666 sregs
->idt
.base
= dt
.address
;
7667 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7668 sregs
->gdt
.limit
= dt
.size
;
7669 sregs
->gdt
.base
= dt
.address
;
7671 sregs
->cr0
= kvm_read_cr0(vcpu
);
7672 sregs
->cr2
= vcpu
->arch
.cr2
;
7673 sregs
->cr3
= kvm_read_cr3(vcpu
);
7674 sregs
->cr4
= kvm_read_cr4(vcpu
);
7675 sregs
->cr8
= kvm_get_cr8(vcpu
);
7676 sregs
->efer
= vcpu
->arch
.efer
;
7677 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7679 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7681 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7682 set_bit(vcpu
->arch
.interrupt
.nr
,
7683 (unsigned long *)sregs
->interrupt_bitmap
);
7688 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7689 struct kvm_mp_state
*mp_state
)
7691 kvm_apic_accept_events(vcpu
);
7692 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7693 vcpu
->arch
.pv
.pv_unhalted
)
7694 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7696 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7701 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7702 struct kvm_mp_state
*mp_state
)
7704 if (!lapic_in_kernel(vcpu
) &&
7705 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7708 /* INITs are latched while in SMM */
7709 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7710 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7711 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7714 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7715 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7716 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7718 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7719 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7723 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7724 int reason
, bool has_error_code
, u32 error_code
)
7726 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7729 init_emulate_ctxt(vcpu
);
7731 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7732 has_error_code
, error_code
);
7735 return EMULATE_FAIL
;
7737 kvm_rip_write(vcpu
, ctxt
->eip
);
7738 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7739 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7740 return EMULATE_DONE
;
7742 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7744 int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7746 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7748 * When EFER.LME and CR0.PG are set, the processor is in
7749 * 64-bit mode (though maybe in a 32-bit code segment).
7750 * CR4.PAE and EFER.LMA must be set.
7752 if (!(sregs
->cr4
& X86_CR4_PAE
)
7753 || !(sregs
->efer
& EFER_LMA
))
7757 * Not in 64-bit mode: EFER.LMA is clear and the code
7758 * segment cannot be 64-bit.
7760 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7767 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7768 struct kvm_sregs
*sregs
)
7770 struct msr_data apic_base_msr
;
7771 int mmu_reset_needed
= 0;
7772 int cpuid_update_needed
= 0;
7773 int pending_vec
, max_bits
, idx
;
7776 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7777 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7780 if (kvm_valid_sregs(vcpu
, sregs
))
7783 apic_base_msr
.data
= sregs
->apic_base
;
7784 apic_base_msr
.host_initiated
= true;
7785 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7788 dt
.size
= sregs
->idt
.limit
;
7789 dt
.address
= sregs
->idt
.base
;
7790 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7791 dt
.size
= sregs
->gdt
.limit
;
7792 dt
.address
= sregs
->gdt
.base
;
7793 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7795 vcpu
->arch
.cr2
= sregs
->cr2
;
7796 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7797 vcpu
->arch
.cr3
= sregs
->cr3
;
7798 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7800 kvm_set_cr8(vcpu
, sregs
->cr8
);
7802 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7803 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7805 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7806 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7807 vcpu
->arch
.cr0
= sregs
->cr0
;
7809 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7810 cpuid_update_needed
|= ((kvm_read_cr4(vcpu
) ^ sregs
->cr4
) &
7811 (X86_CR4_OSXSAVE
| X86_CR4_PKE
));
7812 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7813 if (cpuid_update_needed
)
7814 kvm_update_cpuid(vcpu
);
7816 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7817 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7818 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7819 mmu_reset_needed
= 1;
7821 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7823 if (mmu_reset_needed
)
7824 kvm_mmu_reset_context(vcpu
);
7826 max_bits
= KVM_NR_INTERRUPTS
;
7827 pending_vec
= find_first_bit(
7828 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7829 if (pending_vec
< max_bits
) {
7830 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7831 pr_debug("Set back pending irq %d\n", pending_vec
);
7834 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7835 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7836 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7837 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7838 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7839 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7841 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7842 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7844 update_cr8_intercept(vcpu
);
7846 /* Older userspace won't unhalt the vcpu on reset. */
7847 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7848 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7850 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7852 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7857 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7858 struct kvm_guest_debug
*dbg
)
7860 unsigned long rflags
;
7863 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7865 if (vcpu
->arch
.exception
.pending
)
7867 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7868 kvm_queue_exception(vcpu
, DB_VECTOR
);
7870 kvm_queue_exception(vcpu
, BP_VECTOR
);
7874 * Read rflags as long as potentially injected trace flags are still
7877 rflags
= kvm_get_rflags(vcpu
);
7879 vcpu
->guest_debug
= dbg
->control
;
7880 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7881 vcpu
->guest_debug
= 0;
7883 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7884 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7885 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7886 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7888 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7889 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7891 kvm_update_dr7(vcpu
);
7893 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7894 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7895 get_segment_base(vcpu
, VCPU_SREG_CS
);
7898 * Trigger an rflags update that will inject or remove the trace
7901 kvm_set_rflags(vcpu
, rflags
);
7903 kvm_x86_ops
->update_bp_intercept(vcpu
);
7913 * Translate a guest virtual address to a guest physical address.
7915 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7916 struct kvm_translation
*tr
)
7918 unsigned long vaddr
= tr
->linear_address
;
7922 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7923 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7924 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7925 tr
->physical_address
= gpa
;
7926 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7933 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7935 struct fxregs_state
*fxsave
=
7936 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7938 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7939 fpu
->fcw
= fxsave
->cwd
;
7940 fpu
->fsw
= fxsave
->swd
;
7941 fpu
->ftwx
= fxsave
->twd
;
7942 fpu
->last_opcode
= fxsave
->fop
;
7943 fpu
->last_ip
= fxsave
->rip
;
7944 fpu
->last_dp
= fxsave
->rdp
;
7945 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7950 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7952 struct fxregs_state
*fxsave
=
7953 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7955 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7956 fxsave
->cwd
= fpu
->fcw
;
7957 fxsave
->swd
= fpu
->fsw
;
7958 fxsave
->twd
= fpu
->ftwx
;
7959 fxsave
->fop
= fpu
->last_opcode
;
7960 fxsave
->rip
= fpu
->last_ip
;
7961 fxsave
->rdp
= fpu
->last_dp
;
7962 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7967 static void fx_init(struct kvm_vcpu
*vcpu
)
7969 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7970 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7971 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7972 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7975 * Ensure guest xcr0 is valid for loading
7977 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7979 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7982 /* Swap (qemu) user FPU context for the guest FPU context. */
7983 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7986 copy_fpregs_to_fpstate(&vcpu
->arch
.user_fpu
);
7987 /* PKRU is separately restored in kvm_x86_ops->run. */
7988 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7989 ~XFEATURE_MASK_PKRU
);
7994 /* When vcpu_run ends, restore user space FPU context. */
7995 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7998 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7999 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
.state
);
8001 ++vcpu
->stat
.fpu_reload
;
8005 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
8007 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
8009 kvmclock_reset(vcpu
);
8011 kvm_x86_ops
->vcpu_free(vcpu
);
8012 free_cpumask_var(wbinvd_dirty_mask
);
8015 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
8018 struct kvm_vcpu
*vcpu
;
8020 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
8021 printk_once(KERN_WARNING
8022 "kvm: SMP vm created on host with unstable TSC; "
8023 "guest TSC will not be reliable\n");
8025 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
8030 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
8034 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
8035 kvm_vcpu_mtrr_init(vcpu
);
8036 r
= vcpu_load(vcpu
);
8039 kvm_vcpu_reset(vcpu
, false);
8040 kvm_mmu_setup(vcpu
);
8045 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
8047 struct msr_data msr
;
8048 struct kvm
*kvm
= vcpu
->kvm
;
8050 kvm_hv_vcpu_postcreate(vcpu
);
8052 if (vcpu_load(vcpu
))
8055 msr
.index
= MSR_IA32_TSC
;
8056 msr
.host_initiated
= true;
8057 kvm_write_tsc(vcpu
, &msr
);
8060 if (!kvmclock_periodic_sync
)
8063 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
8064 KVMCLOCK_SYNC_PERIOD
);
8067 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
8070 vcpu
->arch
.apf
.msr_val
= 0;
8072 r
= vcpu_load(vcpu
);
8074 kvm_mmu_unload(vcpu
);
8077 kvm_x86_ops
->vcpu_free(vcpu
);
8080 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
8082 kvm_lapic_reset(vcpu
, init_event
);
8084 vcpu
->arch
.hflags
= 0;
8086 vcpu
->arch
.smi_pending
= 0;
8087 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
8088 vcpu
->arch
.nmi_pending
= 0;
8089 vcpu
->arch
.nmi_injected
= false;
8090 kvm_clear_interrupt_queue(vcpu
);
8091 kvm_clear_exception_queue(vcpu
);
8092 vcpu
->arch
.exception
.pending
= false;
8094 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
8095 kvm_update_dr0123(vcpu
);
8096 vcpu
->arch
.dr6
= DR6_INIT
;
8097 kvm_update_dr6(vcpu
);
8098 vcpu
->arch
.dr7
= DR7_FIXED_1
;
8099 kvm_update_dr7(vcpu
);
8103 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8104 vcpu
->arch
.apf
.msr_val
= 0;
8105 vcpu
->arch
.st
.msr_val
= 0;
8107 kvmclock_reset(vcpu
);
8109 kvm_clear_async_pf_completion_queue(vcpu
);
8110 kvm_async_pf_hash_reset(vcpu
);
8111 vcpu
->arch
.apf
.halted
= false;
8113 if (kvm_mpx_supported()) {
8114 void *mpx_state_buffer
;
8117 * To avoid have the INIT path from kvm_apic_has_events() that be
8118 * called with loaded FPU and does not let userspace fix the state.
8121 kvm_put_guest_fpu(vcpu
);
8122 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8123 XFEATURE_MASK_BNDREGS
);
8124 if (mpx_state_buffer
)
8125 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
8126 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8127 XFEATURE_MASK_BNDCSR
);
8128 if (mpx_state_buffer
)
8129 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
8131 kvm_load_guest_fpu(vcpu
);
8135 kvm_pmu_reset(vcpu
);
8136 vcpu
->arch
.smbase
= 0x30000;
8138 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
8139 vcpu
->arch
.msr_misc_features_enables
= 0;
8141 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8144 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
8145 vcpu
->arch
.regs_avail
= ~0;
8146 vcpu
->arch
.regs_dirty
= ~0;
8148 vcpu
->arch
.ia32_xss
= 0;
8150 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
8153 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
8155 struct kvm_segment cs
;
8157 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8158 cs
.selector
= vector
<< 8;
8159 cs
.base
= vector
<< 12;
8160 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8161 kvm_rip_write(vcpu
, 0);
8164 int kvm_arch_hardware_enable(void)
8167 struct kvm_vcpu
*vcpu
;
8172 bool stable
, backwards_tsc
= false;
8174 kvm_shared_msr_cpu_online();
8175 ret
= kvm_x86_ops
->hardware_enable();
8179 local_tsc
= rdtsc();
8180 stable
= !check_tsc_unstable();
8181 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8182 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8183 if (!stable
&& vcpu
->cpu
== smp_processor_id())
8184 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8185 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
8186 backwards_tsc
= true;
8187 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
8188 max_tsc
= vcpu
->arch
.last_host_tsc
;
8194 * Sometimes, even reliable TSCs go backwards. This happens on
8195 * platforms that reset TSC during suspend or hibernate actions, but
8196 * maintain synchronization. We must compensate. Fortunately, we can
8197 * detect that condition here, which happens early in CPU bringup,
8198 * before any KVM threads can be running. Unfortunately, we can't
8199 * bring the TSCs fully up to date with real time, as we aren't yet far
8200 * enough into CPU bringup that we know how much real time has actually
8201 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8202 * variables that haven't been updated yet.
8204 * So we simply find the maximum observed TSC above, then record the
8205 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8206 * the adjustment will be applied. Note that we accumulate
8207 * adjustments, in case multiple suspend cycles happen before some VCPU
8208 * gets a chance to run again. In the event that no KVM threads get a
8209 * chance to run, we will miss the entire elapsed period, as we'll have
8210 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8211 * loose cycle time. This isn't too big a deal, since the loss will be
8212 * uniform across all VCPUs (not to mention the scenario is extremely
8213 * unlikely). It is possible that a second hibernate recovery happens
8214 * much faster than a first, causing the observed TSC here to be
8215 * smaller; this would require additional padding adjustment, which is
8216 * why we set last_host_tsc to the local tsc observed here.
8218 * N.B. - this code below runs only on platforms with reliable TSC,
8219 * as that is the only way backwards_tsc is set above. Also note
8220 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8221 * have the same delta_cyc adjustment applied if backwards_tsc
8222 * is detected. Note further, this adjustment is only done once,
8223 * as we reset last_host_tsc on all VCPUs to stop this from being
8224 * called multiple times (one for each physical CPU bringup).
8226 * Platforms with unreliable TSCs don't have to deal with this, they
8227 * will be compensated by the logic in vcpu_load, which sets the TSC to
8228 * catchup mode. This will catchup all VCPUs to real time, but cannot
8229 * guarantee that they stay in perfect synchronization.
8231 if (backwards_tsc
) {
8232 u64 delta_cyc
= max_tsc
- local_tsc
;
8233 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8234 kvm
->arch
.backwards_tsc_observed
= true;
8235 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8236 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
8237 vcpu
->arch
.last_host_tsc
= local_tsc
;
8238 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8242 * We have to disable TSC offset matching.. if you were
8243 * booting a VM while issuing an S4 host suspend....
8244 * you may have some problem. Solving this issue is
8245 * left as an exercise to the reader.
8247 kvm
->arch
.last_tsc_nsec
= 0;
8248 kvm
->arch
.last_tsc_write
= 0;
8255 void kvm_arch_hardware_disable(void)
8257 kvm_x86_ops
->hardware_disable();
8258 drop_user_return_notifiers();
8261 int kvm_arch_hardware_setup(void)
8265 r
= kvm_x86_ops
->hardware_setup();
8269 if (kvm_has_tsc_control
) {
8271 * Make sure the user can only configure tsc_khz values that
8272 * fit into a signed integer.
8273 * A min value is not calculated needed because it will always
8274 * be 1 on all machines.
8276 u64 max
= min(0x7fffffffULL
,
8277 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8278 kvm_max_guest_tsc_khz
= max
;
8280 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8283 kvm_init_msr_list();
8287 void kvm_arch_hardware_unsetup(void)
8289 kvm_x86_ops
->hardware_unsetup();
8292 void kvm_arch_check_processor_compat(void *rtn
)
8294 kvm_x86_ops
->check_processor_compatibility(rtn
);
8297 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8299 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8301 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8303 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8305 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8308 struct static_key kvm_no_apic_vcpu __read_mostly
;
8309 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8311 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8316 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8317 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8318 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8319 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8321 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8323 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8328 vcpu
->arch
.pio_data
= page_address(page
);
8330 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8332 r
= kvm_mmu_create(vcpu
);
8334 goto fail_free_pio_data
;
8336 if (irqchip_in_kernel(vcpu
->kvm
)) {
8337 r
= kvm_create_lapic(vcpu
);
8339 goto fail_mmu_destroy
;
8341 static_key_slow_inc(&kvm_no_apic_vcpu
);
8343 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8345 if (!vcpu
->arch
.mce_banks
) {
8347 goto fail_free_lapic
;
8349 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8351 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8353 goto fail_free_mce_banks
;
8358 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8360 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8362 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8364 kvm_async_pf_hash_reset(vcpu
);
8367 vcpu
->arch
.pending_external_vector
= -1;
8368 vcpu
->arch
.preempted_in_kernel
= false;
8370 kvm_hv_vcpu_init(vcpu
);
8374 fail_free_mce_banks
:
8375 kfree(vcpu
->arch
.mce_banks
);
8377 kvm_free_lapic(vcpu
);
8379 kvm_mmu_destroy(vcpu
);
8381 free_page((unsigned long)vcpu
->arch
.pio_data
);
8386 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8390 kvm_hv_vcpu_uninit(vcpu
);
8391 kvm_pmu_destroy(vcpu
);
8392 kfree(vcpu
->arch
.mce_banks
);
8393 kvm_free_lapic(vcpu
);
8394 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8395 kvm_mmu_destroy(vcpu
);
8396 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8397 free_page((unsigned long)vcpu
->arch
.pio_data
);
8398 if (!lapic_in_kernel(vcpu
))
8399 static_key_slow_dec(&kvm_no_apic_vcpu
);
8402 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8404 vcpu
->arch
.l1tf_flush_l1d
= true;
8405 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8408 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8413 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8414 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8415 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8416 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8417 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8419 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8420 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8421 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8422 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8423 &kvm
->arch
.irq_sources_bitmap
);
8425 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8426 mutex_init(&kvm
->arch
.apic_map_lock
);
8427 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8428 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8430 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8431 pvclock_update_vm_gtod_copy(kvm
);
8433 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8434 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8436 kvm_page_track_init(kvm
);
8437 kvm_mmu_init_vm(kvm
);
8439 if (kvm_x86_ops
->vm_init
)
8440 return kvm_x86_ops
->vm_init(kvm
);
8445 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8448 r
= vcpu_load(vcpu
);
8450 kvm_mmu_unload(vcpu
);
8454 static void kvm_free_vcpus(struct kvm
*kvm
)
8457 struct kvm_vcpu
*vcpu
;
8460 * Unpin any mmu pages first.
8462 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8463 kvm_clear_async_pf_completion_queue(vcpu
);
8464 kvm_unload_vcpu_mmu(vcpu
);
8466 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8467 kvm_arch_vcpu_free(vcpu
);
8469 mutex_lock(&kvm
->lock
);
8470 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8471 kvm
->vcpus
[i
] = NULL
;
8473 atomic_set(&kvm
->online_vcpus
, 0);
8474 mutex_unlock(&kvm
->lock
);
8477 void kvm_arch_sync_events(struct kvm
*kvm
)
8479 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8480 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8484 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8488 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8489 struct kvm_memory_slot
*slot
, old
;
8491 /* Called with kvm->slots_lock held. */
8492 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8495 slot
= id_to_memslot(slots
, id
);
8501 * MAP_SHARED to prevent internal slot pages from being moved
8504 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8505 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8506 if (IS_ERR((void *)hva
))
8507 return PTR_ERR((void *)hva
);
8516 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8517 struct kvm_userspace_memory_region m
;
8519 m
.slot
= id
| (i
<< 16);
8521 m
.guest_phys_addr
= gpa
;
8522 m
.userspace_addr
= hva
;
8523 m
.memory_size
= size
;
8524 r
= __kvm_set_memory_region(kvm
, &m
);
8530 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8534 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8536 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8540 mutex_lock(&kvm
->slots_lock
);
8541 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8542 mutex_unlock(&kvm
->slots_lock
);
8546 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8548 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8550 if (current
->mm
== kvm
->mm
) {
8552 * Free memory regions allocated on behalf of userspace,
8553 * unless the the memory map has changed due to process exit
8556 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8557 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8558 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8560 if (kvm_x86_ops
->vm_destroy
)
8561 kvm_x86_ops
->vm_destroy(kvm
);
8562 kvm_pic_destroy(kvm
);
8563 kvm_ioapic_destroy(kvm
);
8564 kvm_free_vcpus(kvm
);
8565 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8566 kvm_mmu_uninit_vm(kvm
);
8567 kvm_page_track_cleanup(kvm
);
8570 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8571 struct kvm_memory_slot
*dont
)
8575 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8576 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8577 kvfree(free
->arch
.rmap
[i
]);
8578 free
->arch
.rmap
[i
] = NULL
;
8583 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8584 dont
->arch
.lpage_info
[i
- 1]) {
8585 kvfree(free
->arch
.lpage_info
[i
- 1]);
8586 free
->arch
.lpage_info
[i
- 1] = NULL
;
8590 kvm_page_track_free_memslot(free
, dont
);
8593 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8594 unsigned long npages
)
8598 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8599 struct kvm_lpage_info
*linfo
;
8604 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8605 slot
->base_gfn
, level
) + 1;
8607 slot
->arch
.rmap
[i
] =
8608 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8609 if (!slot
->arch
.rmap
[i
])
8614 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8618 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8620 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8621 linfo
[0].disallow_lpage
= 1;
8622 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8623 linfo
[lpages
- 1].disallow_lpage
= 1;
8624 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8626 * If the gfn and userspace address are not aligned wrt each
8627 * other, or if explicitly asked to, disable large page
8628 * support for this slot
8630 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8631 !kvm_largepages_enabled()) {
8634 for (j
= 0; j
< lpages
; ++j
)
8635 linfo
[j
].disallow_lpage
= 1;
8639 if (kvm_page_track_create_memslot(slot
, npages
))
8645 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8646 kvfree(slot
->arch
.rmap
[i
]);
8647 slot
->arch
.rmap
[i
] = NULL
;
8651 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8652 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8657 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
8660 * memslots->generation has been incremented.
8661 * mmio generation may have reached its maximum value.
8663 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
8666 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8667 struct kvm_memory_slot
*memslot
,
8668 const struct kvm_userspace_memory_region
*mem
,
8669 enum kvm_mr_change change
)
8674 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8675 struct kvm_memory_slot
*new)
8677 /* Still write protect RO slot */
8678 if (new->flags
& KVM_MEM_READONLY
) {
8679 kvm_mmu_slot_remove_write_access(kvm
, new);
8684 * Call kvm_x86_ops dirty logging hooks when they are valid.
8686 * kvm_x86_ops->slot_disable_log_dirty is called when:
8688 * - KVM_MR_CREATE with dirty logging is disabled
8689 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8691 * The reason is, in case of PML, we need to set D-bit for any slots
8692 * with dirty logging disabled in order to eliminate unnecessary GPA
8693 * logging in PML buffer (and potential PML buffer full VMEXT). This
8694 * guarantees leaving PML enabled during guest's lifetime won't have
8695 * any additonal overhead from PML when guest is running with dirty
8696 * logging disabled for memory slots.
8698 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8699 * to dirty logging mode.
8701 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8703 * In case of write protect:
8705 * Write protect all pages for dirty logging.
8707 * All the sptes including the large sptes which point to this
8708 * slot are set to readonly. We can not create any new large
8709 * spte on this slot until the end of the logging.
8711 * See the comments in fast_page_fault().
8713 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8714 if (kvm_x86_ops
->slot_enable_log_dirty
)
8715 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8717 kvm_mmu_slot_remove_write_access(kvm
, new);
8719 if (kvm_x86_ops
->slot_disable_log_dirty
)
8720 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8724 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8725 const struct kvm_userspace_memory_region
*mem
,
8726 const struct kvm_memory_slot
*old
,
8727 const struct kvm_memory_slot
*new,
8728 enum kvm_mr_change change
)
8730 int nr_mmu_pages
= 0;
8732 if (!kvm
->arch
.n_requested_mmu_pages
)
8733 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8736 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8739 * Dirty logging tracks sptes in 4k granularity, meaning that large
8740 * sptes have to be split. If live migration is successful, the guest
8741 * in the source machine will be destroyed and large sptes will be
8742 * created in the destination. However, if the guest continues to run
8743 * in the source machine (for example if live migration fails), small
8744 * sptes will remain around and cause bad performance.
8746 * Scan sptes if dirty logging has been stopped, dropping those
8747 * which can be collapsed into a single large-page spte. Later
8748 * page faults will create the large-page sptes.
8750 if ((change
!= KVM_MR_DELETE
) &&
8751 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8752 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8753 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8756 * Set up write protection and/or dirty logging for the new slot.
8758 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8759 * been zapped so no dirty logging staff is needed for old slot. For
8760 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8761 * new and it's also covered when dealing with the new slot.
8763 * FIXME: const-ify all uses of struct kvm_memory_slot.
8765 if (change
!= KVM_MR_DELETE
)
8766 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8769 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8771 kvm_mmu_invalidate_zap_all_pages(kvm
);
8774 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8775 struct kvm_memory_slot
*slot
)
8777 kvm_page_track_flush_slot(kvm
, slot
);
8780 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8782 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8785 if (kvm_apic_has_events(vcpu
))
8788 if (vcpu
->arch
.pv
.pv_unhalted
)
8791 if (vcpu
->arch
.exception
.pending
)
8794 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8795 (vcpu
->arch
.nmi_pending
&&
8796 kvm_x86_ops
->nmi_allowed(vcpu
)))
8799 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8800 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8803 if (kvm_arch_interrupt_allowed(vcpu
) &&
8804 kvm_cpu_has_interrupt(vcpu
))
8807 if (kvm_hv_has_stimer_pending(vcpu
))
8813 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8815 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8818 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
8820 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
8823 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8824 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8825 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
8828 if (vcpu
->arch
.apicv_active
&& kvm_x86_ops
->dy_apicv_has_pending_interrupt(vcpu
))
8834 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8836 return vcpu
->arch
.preempted_in_kernel
;
8839 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8841 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8844 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8846 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8849 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8851 if (is_64_bit_mode(vcpu
))
8852 return kvm_rip_read(vcpu
);
8853 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8854 kvm_rip_read(vcpu
));
8856 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8858 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8860 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8862 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8864 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8866 unsigned long rflags
;
8868 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8869 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8870 rflags
&= ~X86_EFLAGS_TF
;
8873 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8875 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8877 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8878 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8879 rflags
|= X86_EFLAGS_TF
;
8880 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8883 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8885 __kvm_set_rflags(vcpu
, rflags
);
8886 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8888 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8890 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8894 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8898 r
= kvm_mmu_reload(vcpu
);
8902 if (!vcpu
->arch
.mmu
.direct_map
&&
8903 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8906 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8909 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8911 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8914 static inline u32
kvm_async_pf_next_probe(u32 key
)
8916 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8919 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8921 u32 key
= kvm_async_pf_hash_fn(gfn
);
8923 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8924 key
= kvm_async_pf_next_probe(key
);
8926 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8929 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8932 u32 key
= kvm_async_pf_hash_fn(gfn
);
8934 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8935 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8936 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8937 key
= kvm_async_pf_next_probe(key
);
8942 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8944 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8947 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8951 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8953 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8955 j
= kvm_async_pf_next_probe(j
);
8956 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8958 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8960 * k lies cyclically in ]i,j]
8962 * |....j i.k.| or |.k..j i...|
8964 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8965 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8970 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8973 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8977 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8980 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8984 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8985 struct kvm_async_pf
*work
)
8987 struct x86_exception fault
;
8989 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8990 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8992 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8993 (vcpu
->arch
.apf
.send_user_only
&&
8994 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8995 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8996 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8997 fault
.vector
= PF_VECTOR
;
8998 fault
.error_code_valid
= true;
8999 fault
.error_code
= 0;
9000 fault
.nested_page_fault
= false;
9001 fault
.address
= work
->arch
.token
;
9002 fault
.async_page_fault
= true;
9003 kvm_inject_page_fault(vcpu
, &fault
);
9007 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
9008 struct kvm_async_pf
*work
)
9010 struct x86_exception fault
;
9013 if (work
->wakeup_all
)
9014 work
->arch
.token
= ~0; /* broadcast wakeup */
9016 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
9017 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
9019 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
9020 !apf_get_user(vcpu
, &val
)) {
9021 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
9022 vcpu
->arch
.exception
.pending
&&
9023 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
9024 !apf_put_user(vcpu
, 0)) {
9025 vcpu
->arch
.exception
.injected
= false;
9026 vcpu
->arch
.exception
.pending
= false;
9027 vcpu
->arch
.exception
.nr
= 0;
9028 vcpu
->arch
.exception
.has_error_code
= false;
9029 vcpu
->arch
.exception
.error_code
= 0;
9030 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
9031 fault
.vector
= PF_VECTOR
;
9032 fault
.error_code_valid
= true;
9033 fault
.error_code
= 0;
9034 fault
.nested_page_fault
= false;
9035 fault
.address
= work
->arch
.token
;
9036 fault
.async_page_fault
= true;
9037 kvm_inject_page_fault(vcpu
, &fault
);
9040 vcpu
->arch
.apf
.halted
= false;
9041 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9044 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
9046 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
9049 return kvm_can_do_async_pf(vcpu
);
9052 void kvm_arch_start_assignment(struct kvm
*kvm
)
9054 atomic_inc(&kvm
->arch
.assigned_device_count
);
9056 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
9058 void kvm_arch_end_assignment(struct kvm
*kvm
)
9060 atomic_dec(&kvm
->arch
.assigned_device_count
);
9062 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
9064 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
9066 return atomic_read(&kvm
->arch
.assigned_device_count
);
9068 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
9070 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
9072 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
9074 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
9076 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
9078 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
9080 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
9082 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
9084 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
9086 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
9088 bool kvm_arch_has_irq_bypass(void)
9090 return kvm_x86_ops
->update_pi_irte
!= NULL
;
9093 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
9094 struct irq_bypass_producer
*prod
)
9096 struct kvm_kernel_irqfd
*irqfd
=
9097 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9099 irqfd
->producer
= prod
;
9101 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
9102 prod
->irq
, irqfd
->gsi
, 1);
9105 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
9106 struct irq_bypass_producer
*prod
)
9109 struct kvm_kernel_irqfd
*irqfd
=
9110 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9112 WARN_ON(irqfd
->producer
!= prod
);
9113 irqfd
->producer
= NULL
;
9116 * When producer of consumer is unregistered, we change back to
9117 * remapped mode, so we can re-use the current implementation
9118 * when the irq is masked/disabled or the consumer side (KVM
9119 * int this case doesn't want to receive the interrupts.
9121 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
9123 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
9124 " fails: %d\n", irqfd
->consumer
.token
, ret
);
9127 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
9128 uint32_t guest_irq
, bool set
)
9130 if (!kvm_x86_ops
->update_pi_irte
)
9133 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
9136 bool kvm_vector_hashing_enabled(void)
9138 return vector_hashing
;
9140 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
9142 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
9143 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
9144 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
9145 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
9146 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
9147 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
9148 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
9149 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
9150 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
9151 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
9152 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
9153 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
9154 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
9155 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
9156 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
9157 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
9158 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
9159 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
9160 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);