2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 static bool __read_mostly report_ignored_msrs
= true;
111 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
113 unsigned int min_timer_period_us
= 500;
114 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
116 static bool __read_mostly kvmclock_periodic_sync
= true;
117 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
119 bool __read_mostly kvm_has_tsc_control
;
120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
121 u32 __read_mostly kvm_max_guest_tsc_khz
;
122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
123 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
125 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
127 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
131 static u32 __read_mostly tsc_tolerance_ppm
= 250;
132 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
135 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
136 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
138 static bool __read_mostly vector_hashing
= true;
139 module_param(vector_hashing
, bool, S_IRUGO
);
141 #define KVM_NR_SHARED_MSRS 16
143 struct kvm_shared_msrs_global
{
145 u32 msrs
[KVM_NR_SHARED_MSRS
];
148 struct kvm_shared_msrs
{
149 struct user_return_notifier urn
;
151 struct kvm_shared_msr_values
{
154 } values
[KVM_NR_SHARED_MSRS
];
157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
158 static struct kvm_shared_msrs __percpu
*shared_msrs
;
160 struct kvm_stats_debugfs_item debugfs_entries
[] = {
161 { "pf_fixed", VCPU_STAT(pf_fixed
) },
162 { "pf_guest", VCPU_STAT(pf_guest
) },
163 { "tlb_flush", VCPU_STAT(tlb_flush
) },
164 { "invlpg", VCPU_STAT(invlpg
) },
165 { "exits", VCPU_STAT(exits
) },
166 { "io_exits", VCPU_STAT(io_exits
) },
167 { "mmio_exits", VCPU_STAT(mmio_exits
) },
168 { "signal_exits", VCPU_STAT(signal_exits
) },
169 { "irq_window", VCPU_STAT(irq_window_exits
) },
170 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
171 { "halt_exits", VCPU_STAT(halt_exits
) },
172 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
173 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
174 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
175 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
176 { "hypercalls", VCPU_STAT(hypercalls
) },
177 { "request_irq", VCPU_STAT(request_irq_exits
) },
178 { "irq_exits", VCPU_STAT(irq_exits
) },
179 { "host_state_reload", VCPU_STAT(host_state_reload
) },
180 { "efer_reload", VCPU_STAT(efer_reload
) },
181 { "fpu_reload", VCPU_STAT(fpu_reload
) },
182 { "insn_emulation", VCPU_STAT(insn_emulation
) },
183 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
184 { "irq_injections", VCPU_STAT(irq_injections
) },
185 { "nmi_injections", VCPU_STAT(nmi_injections
) },
186 { "req_event", VCPU_STAT(req_event
) },
187 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
188 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
189 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
190 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
191 { "mmu_flooded", VM_STAT(mmu_flooded
) },
192 { "mmu_recycled", VM_STAT(mmu_recycled
) },
193 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
194 { "mmu_unsync", VM_STAT(mmu_unsync
) },
195 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
196 { "largepages", VM_STAT(lpages
) },
197 { "max_mmu_page_hash_collisions",
198 VM_STAT(max_mmu_page_hash_collisions
) },
202 u64 __read_mostly host_xcr0
;
204 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
206 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
209 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
210 vcpu
->arch
.apf
.gfns
[i
] = ~0;
213 static void kvm_on_user_return(struct user_return_notifier
*urn
)
216 struct kvm_shared_msrs
*locals
217 = container_of(urn
, struct kvm_shared_msrs
, urn
);
218 struct kvm_shared_msr_values
*values
;
222 * Disabling irqs at this point since the following code could be
223 * interrupted and executed through kvm_arch_hardware_disable()
225 local_irq_save(flags
);
226 if (locals
->registered
) {
227 locals
->registered
= false;
228 user_return_notifier_unregister(urn
);
230 local_irq_restore(flags
);
231 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
232 values
= &locals
->values
[slot
];
233 if (values
->host
!= values
->curr
) {
234 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
235 values
->curr
= values
->host
;
240 static void shared_msr_update(unsigned slot
, u32 msr
)
243 unsigned int cpu
= smp_processor_id();
244 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
246 /* only read, and nobody should modify it at this time,
247 * so don't need lock */
248 if (slot
>= shared_msrs_global
.nr
) {
249 printk(KERN_ERR
"kvm: invalid MSR slot!");
252 rdmsrl_safe(msr
, &value
);
253 smsr
->values
[slot
].host
= value
;
254 smsr
->values
[slot
].curr
= value
;
257 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
259 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
260 shared_msrs_global
.msrs
[slot
] = msr
;
261 if (slot
>= shared_msrs_global
.nr
)
262 shared_msrs_global
.nr
= slot
+ 1;
264 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
266 static void kvm_shared_msr_cpu_online(void)
270 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
271 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
274 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
276 unsigned int cpu
= smp_processor_id();
277 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
280 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
282 smsr
->values
[slot
].curr
= value
;
283 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
287 if (!smsr
->registered
) {
288 smsr
->urn
.on_user_return
= kvm_on_user_return
;
289 user_return_notifier_register(&smsr
->urn
);
290 smsr
->registered
= true;
294 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
296 static void drop_user_return_notifiers(void)
298 unsigned int cpu
= smp_processor_id();
299 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
301 if (smsr
->registered
)
302 kvm_on_user_return(&smsr
->urn
);
305 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
307 return vcpu
->arch
.apic_base
;
309 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
311 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
313 u64 old_state
= vcpu
->arch
.apic_base
&
314 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
315 u64 new_state
= msr_info
->data
&
316 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
317 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
318 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
320 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
322 if (!msr_info
->host_initiated
&&
323 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
324 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
325 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
329 kvm_lapic_set_base(vcpu
, msr_info
->data
);
332 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
334 asmlinkage __visible
void kvm_spurious_fault(void)
336 /* Fault while not rebooting. We want the trace. */
339 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
341 #define EXCPT_BENIGN 0
342 #define EXCPT_CONTRIBUTORY 1
345 static int exception_class(int vector
)
355 return EXCPT_CONTRIBUTORY
;
362 #define EXCPT_FAULT 0
364 #define EXCPT_ABORT 2
365 #define EXCPT_INTERRUPT 3
367 static int exception_type(int vector
)
371 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
372 return EXCPT_INTERRUPT
;
376 /* #DB is trap, as instruction watchpoints are handled elsewhere */
377 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
380 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
383 /* Reserved exceptions will result in fault */
387 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
388 unsigned nr
, bool has_error
, u32 error_code
,
394 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
396 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
398 if (has_error
&& !is_protmode(vcpu
))
402 * On vmentry, vcpu->arch.exception.pending is only
403 * true if an event injection was blocked by
404 * nested_run_pending. In that case, however,
405 * vcpu_enter_guest requests an immediate exit,
406 * and the guest shouldn't proceed far enough to
409 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
410 vcpu
->arch
.exception
.injected
= true;
412 vcpu
->arch
.exception
.pending
= true;
413 vcpu
->arch
.exception
.injected
= false;
415 vcpu
->arch
.exception
.has_error_code
= has_error
;
416 vcpu
->arch
.exception
.nr
= nr
;
417 vcpu
->arch
.exception
.error_code
= error_code
;
421 /* to check exception */
422 prev_nr
= vcpu
->arch
.exception
.nr
;
423 if (prev_nr
== DF_VECTOR
) {
424 /* triple fault -> shutdown */
425 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
428 class1
= exception_class(prev_nr
);
429 class2
= exception_class(nr
);
430 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
431 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
433 * Generate double fault per SDM Table 5-5. Set
434 * exception.pending = true so that the double fault
435 * can trigger a nested vmexit.
437 vcpu
->arch
.exception
.pending
= true;
438 vcpu
->arch
.exception
.injected
= false;
439 vcpu
->arch
.exception
.has_error_code
= true;
440 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
441 vcpu
->arch
.exception
.error_code
= 0;
443 /* replace previous exception with a new one in a hope
444 that instruction re-execution will regenerate lost
449 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
451 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
453 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
455 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
457 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
459 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
461 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
464 kvm_inject_gp(vcpu
, 0);
466 return kvm_skip_emulated_instruction(vcpu
);
470 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
472 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
474 ++vcpu
->stat
.pf_guest
;
475 vcpu
->arch
.exception
.nested_apf
=
476 is_guest_mode(vcpu
) && fault
->async_page_fault
;
477 if (vcpu
->arch
.exception
.nested_apf
)
478 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
480 vcpu
->arch
.cr2
= fault
->address
;
481 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
483 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
485 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
487 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
488 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
490 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
492 return fault
->nested_page_fault
;
495 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
497 atomic_inc(&vcpu
->arch
.nmi_queued
);
498 kvm_make_request(KVM_REQ_NMI
, vcpu
);
500 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
502 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
504 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
506 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
508 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
510 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
512 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
515 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
516 * a #GP and return false.
518 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
520 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
522 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
525 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
527 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
529 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
532 kvm_queue_exception(vcpu
, UD_VECTOR
);
535 EXPORT_SYMBOL_GPL(kvm_require_dr
);
538 * This function will be used to read from the physical memory of the currently
539 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
540 * can read from guest physical or from the guest's guest physical memory.
542 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
543 gfn_t ngfn
, void *data
, int offset
, int len
,
546 struct x86_exception exception
;
550 ngpa
= gfn_to_gpa(ngfn
);
551 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
552 if (real_gfn
== UNMAPPED_GVA
)
555 real_gfn
= gpa_to_gfn(real_gfn
);
557 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
559 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
561 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
562 void *data
, int offset
, int len
, u32 access
)
564 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
565 data
, offset
, len
, access
);
569 * Load the pae pdptrs. Return true is they are all valid.
571 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
573 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
574 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
577 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
579 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
580 offset
* sizeof(u64
), sizeof(pdpte
),
581 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
586 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
587 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
589 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
596 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
597 __set_bit(VCPU_EXREG_PDPTR
,
598 (unsigned long *)&vcpu
->arch
.regs_avail
);
599 __set_bit(VCPU_EXREG_PDPTR
,
600 (unsigned long *)&vcpu
->arch
.regs_dirty
);
605 EXPORT_SYMBOL_GPL(load_pdptrs
);
607 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
609 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
615 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
618 if (!test_bit(VCPU_EXREG_PDPTR
,
619 (unsigned long *)&vcpu
->arch
.regs_avail
))
622 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
623 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
624 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
625 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
628 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
633 EXPORT_SYMBOL_GPL(pdptrs_changed
);
635 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
637 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
638 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
643 if (cr0
& 0xffffffff00000000UL
)
647 cr0
&= ~CR0_RESERVED_BITS
;
649 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
652 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
655 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
657 if ((vcpu
->arch
.efer
& EFER_LME
)) {
662 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
667 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
672 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
675 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
677 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
678 kvm_clear_async_pf_completion_queue(vcpu
);
679 kvm_async_pf_hash_reset(vcpu
);
682 if ((cr0
^ old_cr0
) & update_bits
)
683 kvm_mmu_reset_context(vcpu
);
685 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
686 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
687 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
688 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
692 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
694 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
696 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
698 EXPORT_SYMBOL_GPL(kvm_lmsw
);
700 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
702 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
703 !vcpu
->guest_xcr0_loaded
) {
704 /* kvm_set_xcr() also depends on this */
705 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
706 vcpu
->guest_xcr0_loaded
= 1;
710 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
712 if (vcpu
->guest_xcr0_loaded
) {
713 if (vcpu
->arch
.xcr0
!= host_xcr0
)
714 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
715 vcpu
->guest_xcr0_loaded
= 0;
719 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
722 u64 old_xcr0
= vcpu
->arch
.xcr0
;
725 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
726 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
728 if (!(xcr0
& XFEATURE_MASK_FP
))
730 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
734 * Do not allow the guest to set bits that we do not support
735 * saving. However, xcr0 bit 0 is always set, even if the
736 * emulated CPU does not support XSAVE (see fx_init).
738 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
739 if (xcr0
& ~valid_bits
)
742 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
743 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
746 if (xcr0
& XFEATURE_MASK_AVX512
) {
747 if (!(xcr0
& XFEATURE_MASK_YMM
))
749 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
752 vcpu
->arch
.xcr0
= xcr0
;
754 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
755 kvm_update_cpuid(vcpu
);
759 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
761 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
762 __kvm_set_xcr(vcpu
, index
, xcr
)) {
763 kvm_inject_gp(vcpu
, 0);
768 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
770 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
772 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
773 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
774 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
776 if (cr4
& CR4_RESERVED_BITS
)
779 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
782 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
785 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
788 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
791 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
794 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
797 if (is_long_mode(vcpu
)) {
798 if (!(cr4
& X86_CR4_PAE
))
800 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
801 && ((cr4
^ old_cr4
) & pdptr_bits
)
802 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
806 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
807 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
810 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
811 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
815 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
818 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
819 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
820 kvm_mmu_reset_context(vcpu
);
822 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
823 kvm_update_cpuid(vcpu
);
827 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
829 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
832 cr3
&= ~CR3_PCID_INVD
;
835 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
836 kvm_mmu_sync_roots(vcpu
);
837 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
841 if (is_long_mode(vcpu
) &&
842 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 62)))
844 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
845 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
848 vcpu
->arch
.cr3
= cr3
;
849 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
850 kvm_mmu_new_cr3(vcpu
);
853 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
855 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
857 if (cr8
& CR8_RESERVED_BITS
)
859 if (lapic_in_kernel(vcpu
))
860 kvm_lapic_set_tpr(vcpu
, cr8
);
862 vcpu
->arch
.cr8
= cr8
;
865 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
867 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
869 if (lapic_in_kernel(vcpu
))
870 return kvm_lapic_get_cr8(vcpu
);
872 return vcpu
->arch
.cr8
;
874 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
876 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
880 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
881 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
882 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
883 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
887 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
889 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
890 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
893 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
897 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
898 dr7
= vcpu
->arch
.guest_debug_dr7
;
900 dr7
= vcpu
->arch
.dr7
;
901 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
902 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
903 if (dr7
& DR7_BP_EN_MASK
)
904 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
907 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
909 u64 fixed
= DR6_FIXED_1
;
911 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
916 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
920 vcpu
->arch
.db
[dr
] = val
;
921 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
922 vcpu
->arch
.eff_db
[dr
] = val
;
927 if (val
& 0xffffffff00000000ULL
)
929 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
930 kvm_update_dr6(vcpu
);
935 if (val
& 0xffffffff00000000ULL
)
937 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
938 kvm_update_dr7(vcpu
);
945 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
947 if (__kvm_set_dr(vcpu
, dr
, val
)) {
948 kvm_inject_gp(vcpu
, 0);
953 EXPORT_SYMBOL_GPL(kvm_set_dr
);
955 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
959 *val
= vcpu
->arch
.db
[dr
];
964 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
965 *val
= vcpu
->arch
.dr6
;
967 *val
= kvm_x86_ops
->get_dr6(vcpu
);
972 *val
= vcpu
->arch
.dr7
;
977 EXPORT_SYMBOL_GPL(kvm_get_dr
);
979 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
981 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
985 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
988 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
989 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
992 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
995 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
996 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
998 * This list is modified at module load time to reflect the
999 * capabilities of the host cpu. This capabilities test skips MSRs that are
1000 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1001 * may depend on host virtualization features rather than host cpu features.
1004 static u32 msrs_to_save
[] = {
1005 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1007 #ifdef CONFIG_X86_64
1008 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1010 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1011 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1014 static unsigned num_msrs_to_save
;
1016 static u32 emulated_msrs
[] = {
1017 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1018 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1019 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1020 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1021 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1022 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1023 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1025 HV_X64_MSR_VP_INDEX
,
1026 HV_X64_MSR_VP_RUNTIME
,
1027 HV_X64_MSR_SCONTROL
,
1028 HV_X64_MSR_STIMER0_CONFIG
,
1029 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1032 MSR_IA32_TSC_ADJUST
,
1033 MSR_IA32_TSCDEADLINE
,
1034 MSR_IA32_MISC_ENABLE
,
1035 MSR_IA32_MCG_STATUS
,
1037 MSR_IA32_MCG_EXT_CTL
,
1040 MSR_MISC_FEATURES_ENABLES
,
1043 static unsigned num_emulated_msrs
;
1045 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1047 if (efer
& efer_reserved_bits
)
1050 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1053 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1058 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1060 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1062 u64 old_efer
= vcpu
->arch
.efer
;
1064 if (!kvm_valid_efer(vcpu
, efer
))
1068 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1072 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1074 kvm_x86_ops
->set_efer(vcpu
, efer
);
1076 /* Update reserved bits */
1077 if ((efer
^ old_efer
) & EFER_NX
)
1078 kvm_mmu_reset_context(vcpu
);
1083 void kvm_enable_efer_bits(u64 mask
)
1085 efer_reserved_bits
&= ~mask
;
1087 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1090 * Writes msr value into into the appropriate "register".
1091 * Returns 0 on success, non-0 otherwise.
1092 * Assumes vcpu_load() was already called.
1094 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1096 switch (msr
->index
) {
1099 case MSR_KERNEL_GS_BASE
:
1102 if (is_noncanonical_address(msr
->data
, vcpu
))
1105 case MSR_IA32_SYSENTER_EIP
:
1106 case MSR_IA32_SYSENTER_ESP
:
1108 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1109 * non-canonical address is written on Intel but not on
1110 * AMD (which ignores the top 32-bits, because it does
1111 * not implement 64-bit SYSENTER).
1113 * 64-bit code should hence be able to write a non-canonical
1114 * value on AMD. Making the address canonical ensures that
1115 * vmentry does not fail on Intel after writing a non-canonical
1116 * value, and that something deterministic happens if the guest
1117 * invokes 64-bit SYSENTER.
1119 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1121 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1123 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1126 * Adapt set_msr() to msr_io()'s calling convention
1128 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1130 struct msr_data msr
;
1134 msr
.host_initiated
= true;
1135 r
= kvm_get_msr(vcpu
, &msr
);
1143 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1145 struct msr_data msr
;
1149 msr
.host_initiated
= true;
1150 return kvm_set_msr(vcpu
, &msr
);
1153 #ifdef CONFIG_X86_64
1154 struct pvclock_gtod_data
{
1157 struct { /* extract of a clocksource struct */
1170 static struct pvclock_gtod_data pvclock_gtod_data
;
1172 static void update_pvclock_gtod(struct timekeeper
*tk
)
1174 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1177 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1179 write_seqcount_begin(&vdata
->seq
);
1181 /* copy pvclock gtod data */
1182 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1183 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1184 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1185 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1186 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1188 vdata
->boot_ns
= boot_ns
;
1189 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1191 vdata
->wall_time_sec
= tk
->xtime_sec
;
1193 write_seqcount_end(&vdata
->seq
);
1197 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1200 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1201 * vcpu_enter_guest. This function is only called from
1202 * the physical CPU that is running vcpu.
1204 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1207 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1211 struct pvclock_wall_clock wc
;
1212 struct timespec64 boot
;
1217 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1222 ++version
; /* first time write, random junk */
1226 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1230 * The guest calculates current wall clock time by adding
1231 * system time (updated by kvm_guest_time_update below) to the
1232 * wall clock specified here. guest system time equals host
1233 * system time for us, thus we must fill in host boot time here.
1235 getboottime64(&boot
);
1237 if (kvm
->arch
.kvmclock_offset
) {
1238 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1239 boot
= timespec64_sub(boot
, ts
);
1241 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1242 wc
.nsec
= boot
.tv_nsec
;
1243 wc
.version
= version
;
1245 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1248 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1251 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1253 do_shl32_div32(dividend
, divisor
);
1257 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1258 s8
*pshift
, u32
*pmultiplier
)
1266 scaled64
= scaled_hz
;
1267 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1272 tps32
= (uint32_t)tps64
;
1273 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1274 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1282 *pmultiplier
= div_frac(scaled64
, tps32
);
1284 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1285 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1288 #ifdef CONFIG_X86_64
1289 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1292 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1293 static unsigned long max_tsc_khz
;
1295 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1297 u64 v
= (u64
)khz
* (1000000 + ppm
);
1302 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1306 /* Guest TSC same frequency as host TSC? */
1308 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1312 /* TSC scaling supported? */
1313 if (!kvm_has_tsc_control
) {
1314 if (user_tsc_khz
> tsc_khz
) {
1315 vcpu
->arch
.tsc_catchup
= 1;
1316 vcpu
->arch
.tsc_always_catchup
= 1;
1319 WARN(1, "user requested TSC rate below hardware speed\n");
1324 /* TSC scaling required - calculate ratio */
1325 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1326 user_tsc_khz
, tsc_khz
);
1328 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1329 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1334 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1338 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1340 u32 thresh_lo
, thresh_hi
;
1341 int use_scaling
= 0;
1343 /* tsc_khz can be zero if TSC calibration fails */
1344 if (user_tsc_khz
== 0) {
1345 /* set tsc_scaling_ratio to a safe value */
1346 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1350 /* Compute a scale to convert nanoseconds in TSC cycles */
1351 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1352 &vcpu
->arch
.virtual_tsc_shift
,
1353 &vcpu
->arch
.virtual_tsc_mult
);
1354 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1357 * Compute the variation in TSC rate which is acceptable
1358 * within the range of tolerance and decide if the
1359 * rate being applied is within that bounds of the hardware
1360 * rate. If so, no scaling or compensation need be done.
1362 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1363 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1364 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1365 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1368 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1371 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1373 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1374 vcpu
->arch
.virtual_tsc_mult
,
1375 vcpu
->arch
.virtual_tsc_shift
);
1376 tsc
+= vcpu
->arch
.this_tsc_write
;
1380 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1382 #ifdef CONFIG_X86_64
1384 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1385 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1387 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1388 atomic_read(&vcpu
->kvm
->online_vcpus
));
1391 * Once the masterclock is enabled, always perform request in
1392 * order to update it.
1394 * In order to enable masterclock, the host clocksource must be TSC
1395 * and the vcpus need to have matched TSCs. When that happens,
1396 * perform request to enable masterclock.
1398 if (ka
->use_master_clock
||
1399 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1400 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1402 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1403 atomic_read(&vcpu
->kvm
->online_vcpus
),
1404 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1408 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1410 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1411 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1415 * Multiply tsc by a fixed point number represented by ratio.
1417 * The most significant 64-N bits (mult) of ratio represent the
1418 * integral part of the fixed point number; the remaining N bits
1419 * (frac) represent the fractional part, ie. ratio represents a fixed
1420 * point number (mult + frac * 2^(-N)).
1422 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1424 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1426 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1429 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1432 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1434 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1435 _tsc
= __scale_tsc(ratio
, tsc
);
1439 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1441 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1445 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1447 return target_tsc
- tsc
;
1450 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1452 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1454 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1456 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1458 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1459 vcpu
->arch
.tsc_offset
= offset
;
1462 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1464 struct kvm
*kvm
= vcpu
->kvm
;
1465 u64 offset
, ns
, elapsed
;
1466 unsigned long flags
;
1468 bool already_matched
;
1469 u64 data
= msr
->data
;
1470 bool synchronizing
= false;
1472 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1473 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1474 ns
= ktime_get_boot_ns();
1475 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1477 if (vcpu
->arch
.virtual_tsc_khz
) {
1478 if (data
== 0 && msr
->host_initiated
) {
1480 * detection of vcpu initialization -- need to sync
1481 * with other vCPUs. This particularly helps to keep
1482 * kvm_clock stable after CPU hotplug
1484 synchronizing
= true;
1486 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1487 nsec_to_cycles(vcpu
, elapsed
);
1488 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1490 * Special case: TSC write with a small delta (1 second)
1491 * of virtual cycle time against real time is
1492 * interpreted as an attempt to synchronize the CPU.
1494 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1495 data
+ tsc_hz
> tsc_exp
;
1500 * For a reliable TSC, we can match TSC offsets, and for an unstable
1501 * TSC, we add elapsed time in this computation. We could let the
1502 * compensation code attempt to catch up if we fall behind, but
1503 * it's better to try to match offsets from the beginning.
1505 if (synchronizing
&&
1506 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1507 if (!check_tsc_unstable()) {
1508 offset
= kvm
->arch
.cur_tsc_offset
;
1509 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1511 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1513 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1514 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1517 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1520 * We split periods of matched TSC writes into generations.
1521 * For each generation, we track the original measured
1522 * nanosecond time, offset, and write, so if TSCs are in
1523 * sync, we can match exact offset, and if not, we can match
1524 * exact software computation in compute_guest_tsc()
1526 * These values are tracked in kvm->arch.cur_xxx variables.
1528 kvm
->arch
.cur_tsc_generation
++;
1529 kvm
->arch
.cur_tsc_nsec
= ns
;
1530 kvm
->arch
.cur_tsc_write
= data
;
1531 kvm
->arch
.cur_tsc_offset
= offset
;
1533 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1534 kvm
->arch
.cur_tsc_generation
, data
);
1538 * We also track th most recent recorded KHZ, write and time to
1539 * allow the matching interval to be extended at each write.
1541 kvm
->arch
.last_tsc_nsec
= ns
;
1542 kvm
->arch
.last_tsc_write
= data
;
1543 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1545 vcpu
->arch
.last_guest_tsc
= data
;
1547 /* Keep track of which generation this VCPU has synchronized to */
1548 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1549 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1550 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1552 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1553 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1555 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1556 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1558 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1560 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1561 } else if (!already_matched
) {
1562 kvm
->arch
.nr_vcpus_matched_tsc
++;
1565 kvm_track_tsc_matching(vcpu
);
1566 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1569 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1571 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1574 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1577 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1579 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1580 WARN_ON(adjustment
< 0);
1581 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1582 adjust_tsc_offset_guest(vcpu
, adjustment
);
1585 #ifdef CONFIG_X86_64
1587 static u64
read_tsc(void)
1589 u64 ret
= (u64
)rdtsc_ordered();
1590 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1592 if (likely(ret
>= last
))
1596 * GCC likes to generate cmov here, but this branch is extremely
1597 * predictable (it's just a function of time and the likely is
1598 * very likely) and there's a data dependence, so force GCC
1599 * to generate a branch instead. I don't barrier() because
1600 * we don't actually need a barrier, and if this function
1601 * ever gets inlined it will generate worse code.
1607 static inline u64
vgettsc(u64
*cycle_now
)
1610 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1612 *cycle_now
= read_tsc();
1614 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1615 return v
* gtod
->clock
.mult
;
1618 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1620 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1626 seq
= read_seqcount_begin(>od
->seq
);
1627 mode
= gtod
->clock
.vclock_mode
;
1628 ns
= gtod
->nsec_base
;
1629 ns
+= vgettsc(cycle_now
);
1630 ns
>>= gtod
->clock
.shift
;
1631 ns
+= gtod
->boot_ns
;
1632 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1638 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1640 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1646 seq
= read_seqcount_begin(>od
->seq
);
1647 mode
= gtod
->clock
.vclock_mode
;
1648 ts
->tv_sec
= gtod
->wall_time_sec
;
1649 ns
= gtod
->nsec_base
;
1650 ns
+= vgettsc(cycle_now
);
1651 ns
>>= gtod
->clock
.shift
;
1652 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1654 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1660 /* returns true if host is using tsc clocksource */
1661 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1663 /* checked again under seqlock below */
1664 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1667 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1670 /* returns true if host is using tsc clocksource */
1671 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1674 /* checked again under seqlock below */
1675 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1678 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1684 * Assuming a stable TSC across physical CPUS, and a stable TSC
1685 * across virtual CPUs, the following condition is possible.
1686 * Each numbered line represents an event visible to both
1687 * CPUs at the next numbered event.
1689 * "timespecX" represents host monotonic time. "tscX" represents
1692 * VCPU0 on CPU0 | VCPU1 on CPU1
1694 * 1. read timespec0,tsc0
1695 * 2. | timespec1 = timespec0 + N
1697 * 3. transition to guest | transition to guest
1698 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1699 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1700 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1702 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1705 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1707 * - 0 < N - M => M < N
1709 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1710 * always the case (the difference between two distinct xtime instances
1711 * might be smaller then the difference between corresponding TSC reads,
1712 * when updating guest vcpus pvclock areas).
1714 * To avoid that problem, do not allow visibility of distinct
1715 * system_timestamp/tsc_timestamp values simultaneously: use a master
1716 * copy of host monotonic time values. Update that master copy
1719 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1723 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1725 #ifdef CONFIG_X86_64
1726 struct kvm_arch
*ka
= &kvm
->arch
;
1728 bool host_tsc_clocksource
, vcpus_matched
;
1730 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1731 atomic_read(&kvm
->online_vcpus
));
1734 * If the host uses TSC clock, then passthrough TSC as stable
1737 host_tsc_clocksource
= kvm_get_time_and_clockread(
1738 &ka
->master_kernel_ns
,
1739 &ka
->master_cycle_now
);
1741 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1742 && !ka
->backwards_tsc_observed
1743 && !ka
->boot_vcpu_runs_old_kvmclock
;
1745 if (ka
->use_master_clock
)
1746 atomic_set(&kvm_guest_has_master_clock
, 1);
1748 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1749 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1754 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1756 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1759 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1761 #ifdef CONFIG_X86_64
1763 struct kvm_vcpu
*vcpu
;
1764 struct kvm_arch
*ka
= &kvm
->arch
;
1766 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1767 kvm_make_mclock_inprogress_request(kvm
);
1768 /* no guest entries from this point */
1769 pvclock_update_vm_gtod_copy(kvm
);
1771 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1772 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1774 /* guest entries allowed */
1775 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1776 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1778 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1782 u64
get_kvmclock_ns(struct kvm
*kvm
)
1784 struct kvm_arch
*ka
= &kvm
->arch
;
1785 struct pvclock_vcpu_time_info hv_clock
;
1788 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1789 if (!ka
->use_master_clock
) {
1790 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1791 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1794 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1795 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1796 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1798 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1801 if (__this_cpu_read(cpu_tsc_khz
)) {
1802 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1803 &hv_clock
.tsc_shift
,
1804 &hv_clock
.tsc_to_system_mul
);
1805 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1807 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1814 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1816 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1817 struct pvclock_vcpu_time_info guest_hv_clock
;
1819 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1820 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1823 /* This VCPU is paused, but it's legal for a guest to read another
1824 * VCPU's kvmclock, so we really have to follow the specification where
1825 * it says that version is odd if data is being modified, and even after
1828 * Version field updates must be kept separate. This is because
1829 * kvm_write_guest_cached might use a "rep movs" instruction, and
1830 * writes within a string instruction are weakly ordered. So there
1831 * are three writes overall.
1833 * As a small optimization, only write the version field in the first
1834 * and third write. The vcpu->pv_time cache is still valid, because the
1835 * version field is the first in the struct.
1837 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1839 if (guest_hv_clock
.version
& 1)
1840 ++guest_hv_clock
.version
; /* first time write, random junk */
1842 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1843 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1845 sizeof(vcpu
->hv_clock
.version
));
1849 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1850 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1852 if (vcpu
->pvclock_set_guest_stopped_request
) {
1853 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1854 vcpu
->pvclock_set_guest_stopped_request
= false;
1857 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1859 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1861 sizeof(vcpu
->hv_clock
));
1865 vcpu
->hv_clock
.version
++;
1866 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1868 sizeof(vcpu
->hv_clock
.version
));
1871 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1873 unsigned long flags
, tgt_tsc_khz
;
1874 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1875 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1877 u64 tsc_timestamp
, host_tsc
;
1879 bool use_master_clock
;
1885 * If the host uses TSC clock, then passthrough TSC as stable
1888 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1889 use_master_clock
= ka
->use_master_clock
;
1890 if (use_master_clock
) {
1891 host_tsc
= ka
->master_cycle_now
;
1892 kernel_ns
= ka
->master_kernel_ns
;
1894 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1896 /* Keep irq disabled to prevent changes to the clock */
1897 local_irq_save(flags
);
1898 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1899 if (unlikely(tgt_tsc_khz
== 0)) {
1900 local_irq_restore(flags
);
1901 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1904 if (!use_master_clock
) {
1906 kernel_ns
= ktime_get_boot_ns();
1909 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1912 * We may have to catch up the TSC to match elapsed wall clock
1913 * time for two reasons, even if kvmclock is used.
1914 * 1) CPU could have been running below the maximum TSC rate
1915 * 2) Broken TSC compensation resets the base at each VCPU
1916 * entry to avoid unknown leaps of TSC even when running
1917 * again on the same CPU. This may cause apparent elapsed
1918 * time to disappear, and the guest to stand still or run
1921 if (vcpu
->tsc_catchup
) {
1922 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1923 if (tsc
> tsc_timestamp
) {
1924 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1925 tsc_timestamp
= tsc
;
1929 local_irq_restore(flags
);
1931 /* With all the info we got, fill in the values */
1933 if (kvm_has_tsc_control
)
1934 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1936 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1937 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1938 &vcpu
->hv_clock
.tsc_shift
,
1939 &vcpu
->hv_clock
.tsc_to_system_mul
);
1940 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1943 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1944 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1945 vcpu
->last_guest_tsc
= tsc_timestamp
;
1947 /* If the host uses TSC clocksource, then it is stable */
1949 if (use_master_clock
)
1950 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1952 vcpu
->hv_clock
.flags
= pvclock_flags
;
1954 if (vcpu
->pv_time_enabled
)
1955 kvm_setup_pvclock_page(v
);
1956 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1957 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1962 * kvmclock updates which are isolated to a given vcpu, such as
1963 * vcpu->cpu migration, should not allow system_timestamp from
1964 * the rest of the vcpus to remain static. Otherwise ntp frequency
1965 * correction applies to one vcpu's system_timestamp but not
1968 * So in those cases, request a kvmclock update for all vcpus.
1969 * We need to rate-limit these requests though, as they can
1970 * considerably slow guests that have a large number of vcpus.
1971 * The time for a remote vcpu to update its kvmclock is bound
1972 * by the delay we use to rate-limit the updates.
1975 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1977 static void kvmclock_update_fn(struct work_struct
*work
)
1980 struct delayed_work
*dwork
= to_delayed_work(work
);
1981 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1982 kvmclock_update_work
);
1983 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1984 struct kvm_vcpu
*vcpu
;
1986 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1987 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1988 kvm_vcpu_kick(vcpu
);
1992 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1994 struct kvm
*kvm
= v
->kvm
;
1996 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1997 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1998 KVMCLOCK_UPDATE_DELAY
);
2001 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2003 static void kvmclock_sync_fn(struct work_struct
*work
)
2005 struct delayed_work
*dwork
= to_delayed_work(work
);
2006 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2007 kvmclock_sync_work
);
2008 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2010 if (!kvmclock_periodic_sync
)
2013 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2014 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2015 KVMCLOCK_SYNC_PERIOD
);
2018 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2020 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2021 unsigned bank_num
= mcg_cap
& 0xff;
2022 u32 msr
= msr_info
->index
;
2023 u64 data
= msr_info
->data
;
2026 case MSR_IA32_MCG_STATUS
:
2027 vcpu
->arch
.mcg_status
= data
;
2029 case MSR_IA32_MCG_CTL
:
2030 if (!(mcg_cap
& MCG_CTL_P
))
2032 if (data
!= 0 && data
!= ~(u64
)0)
2034 vcpu
->arch
.mcg_ctl
= data
;
2037 if (msr
>= MSR_IA32_MC0_CTL
&&
2038 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2039 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2040 /* only 0 or all 1s can be written to IA32_MCi_CTL
2041 * some Linux kernels though clear bit 10 in bank 4 to
2042 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2043 * this to avoid an uncatched #GP in the guest
2045 if ((offset
& 0x3) == 0 &&
2046 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2048 if (!msr_info
->host_initiated
&&
2049 (offset
& 0x3) == 1 && data
!= 0)
2051 vcpu
->arch
.mce_banks
[offset
] = data
;
2059 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2061 struct kvm
*kvm
= vcpu
->kvm
;
2062 int lm
= is_long_mode(vcpu
);
2063 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2064 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2065 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2066 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2067 u32 page_num
= data
& ~PAGE_MASK
;
2068 u64 page_addr
= data
& PAGE_MASK
;
2073 if (page_num
>= blob_size
)
2076 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2081 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2090 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2092 gpa_t gpa
= data
& ~0x3f;
2094 /* Bits 3:5 are reserved, Should be zero */
2098 vcpu
->arch
.apf
.msr_val
= data
;
2100 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2101 kvm_clear_async_pf_completion_queue(vcpu
);
2102 kvm_async_pf_hash_reset(vcpu
);
2106 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2110 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2111 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2112 kvm_async_pf_wakeup_all(vcpu
);
2116 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2118 vcpu
->arch
.pv_time_enabled
= false;
2121 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2123 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2126 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2127 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2130 vcpu
->arch
.st
.steal
.preempted
= 0;
2132 if (vcpu
->arch
.st
.steal
.version
& 1)
2133 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2135 vcpu
->arch
.st
.steal
.version
+= 1;
2137 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2138 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2142 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2143 vcpu
->arch
.st
.last_steal
;
2144 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2146 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2147 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2151 vcpu
->arch
.st
.steal
.version
+= 1;
2153 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2154 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2157 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2160 u32 msr
= msr_info
->index
;
2161 u64 data
= msr_info
->data
;
2164 case MSR_AMD64_NB_CFG
:
2165 case MSR_IA32_UCODE_REV
:
2166 case MSR_IA32_UCODE_WRITE
:
2167 case MSR_VM_HSAVE_PA
:
2168 case MSR_AMD64_PATCH_LOADER
:
2169 case MSR_AMD64_BU_CFG2
:
2170 case MSR_AMD64_DC_CFG
:
2174 return set_efer(vcpu
, data
);
2176 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2177 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2178 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2179 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2181 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2186 case MSR_FAM10H_MMIO_CONF_BASE
:
2188 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2193 case MSR_IA32_DEBUGCTLMSR
:
2195 /* We support the non-activated case already */
2197 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2198 /* Values other than LBR and BTF are vendor-specific,
2199 thus reserved and should throw a #GP */
2202 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2205 case 0x200 ... 0x2ff:
2206 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2207 case MSR_IA32_APICBASE
:
2208 return kvm_set_apic_base(vcpu
, msr_info
);
2209 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2210 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2211 case MSR_IA32_TSCDEADLINE
:
2212 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2214 case MSR_IA32_TSC_ADJUST
:
2215 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2216 if (!msr_info
->host_initiated
) {
2217 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2218 adjust_tsc_offset_guest(vcpu
, adj
);
2220 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2223 case MSR_IA32_MISC_ENABLE
:
2224 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2226 case MSR_IA32_SMBASE
:
2227 if (!msr_info
->host_initiated
)
2229 vcpu
->arch
.smbase
= data
;
2231 case MSR_KVM_WALL_CLOCK_NEW
:
2232 case MSR_KVM_WALL_CLOCK
:
2233 vcpu
->kvm
->arch
.wall_clock
= data
;
2234 kvm_write_wall_clock(vcpu
->kvm
, data
);
2236 case MSR_KVM_SYSTEM_TIME_NEW
:
2237 case MSR_KVM_SYSTEM_TIME
: {
2238 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2240 kvmclock_reset(vcpu
);
2242 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2243 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2245 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2246 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2248 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2251 vcpu
->arch
.time
= data
;
2252 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2254 /* we verify if the enable bit is set... */
2258 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2259 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2260 sizeof(struct pvclock_vcpu_time_info
)))
2261 vcpu
->arch
.pv_time_enabled
= false;
2263 vcpu
->arch
.pv_time_enabled
= true;
2267 case MSR_KVM_ASYNC_PF_EN
:
2268 if (kvm_pv_enable_async_pf(vcpu
, data
))
2271 case MSR_KVM_STEAL_TIME
:
2273 if (unlikely(!sched_info_on()))
2276 if (data
& KVM_STEAL_RESERVED_MASK
)
2279 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2280 data
& KVM_STEAL_VALID_BITS
,
2281 sizeof(struct kvm_steal_time
)))
2284 vcpu
->arch
.st
.msr_val
= data
;
2286 if (!(data
& KVM_MSR_ENABLED
))
2289 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2292 case MSR_KVM_PV_EOI_EN
:
2293 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2297 case MSR_IA32_MCG_CTL
:
2298 case MSR_IA32_MCG_STATUS
:
2299 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2300 return set_msr_mce(vcpu
, msr_info
);
2302 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2303 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2304 pr
= true; /* fall through */
2305 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2306 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2307 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2308 return kvm_pmu_set_msr(vcpu
, msr_info
);
2310 if (pr
|| data
!= 0)
2311 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2312 "0x%x data 0x%llx\n", msr
, data
);
2314 case MSR_K7_CLK_CTL
:
2316 * Ignore all writes to this no longer documented MSR.
2317 * Writes are only relevant for old K7 processors,
2318 * all pre-dating SVM, but a recommended workaround from
2319 * AMD for these chips. It is possible to specify the
2320 * affected processor models on the command line, hence
2321 * the need to ignore the workaround.
2324 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2325 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2326 case HV_X64_MSR_CRASH_CTL
:
2327 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2328 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2329 msr_info
->host_initiated
);
2330 case MSR_IA32_BBL_CR_CTL3
:
2331 /* Drop writes to this legacy MSR -- see rdmsr
2332 * counterpart for further detail.
2334 if (report_ignored_msrs
)
2335 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2338 case MSR_AMD64_OSVW_ID_LENGTH
:
2339 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2341 vcpu
->arch
.osvw
.length
= data
;
2343 case MSR_AMD64_OSVW_STATUS
:
2344 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2346 vcpu
->arch
.osvw
.status
= data
;
2348 case MSR_PLATFORM_INFO
:
2349 if (!msr_info
->host_initiated
||
2350 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2351 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2352 cpuid_fault_enabled(vcpu
)))
2354 vcpu
->arch
.msr_platform_info
= data
;
2356 case MSR_MISC_FEATURES_ENABLES
:
2357 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2358 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2359 !supports_cpuid_fault(vcpu
)))
2361 vcpu
->arch
.msr_misc_features_enables
= data
;
2364 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2365 return xen_hvm_config(vcpu
, data
);
2366 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2367 return kvm_pmu_set_msr(vcpu
, msr_info
);
2369 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2373 if (report_ignored_msrs
)
2375 "ignored wrmsr: 0x%x data 0x%llx\n",
2382 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2386 * Reads an msr value (of 'msr_index') into 'pdata'.
2387 * Returns 0 on success, non-0 otherwise.
2388 * Assumes vcpu_load() was already called.
2390 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2392 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2394 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2396 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2399 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2400 unsigned bank_num
= mcg_cap
& 0xff;
2403 case MSR_IA32_P5_MC_ADDR
:
2404 case MSR_IA32_P5_MC_TYPE
:
2407 case MSR_IA32_MCG_CAP
:
2408 data
= vcpu
->arch
.mcg_cap
;
2410 case MSR_IA32_MCG_CTL
:
2411 if (!(mcg_cap
& MCG_CTL_P
))
2413 data
= vcpu
->arch
.mcg_ctl
;
2415 case MSR_IA32_MCG_STATUS
:
2416 data
= vcpu
->arch
.mcg_status
;
2419 if (msr
>= MSR_IA32_MC0_CTL
&&
2420 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2421 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2422 data
= vcpu
->arch
.mce_banks
[offset
];
2431 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2433 switch (msr_info
->index
) {
2434 case MSR_IA32_PLATFORM_ID
:
2435 case MSR_IA32_EBL_CR_POWERON
:
2436 case MSR_IA32_DEBUGCTLMSR
:
2437 case MSR_IA32_LASTBRANCHFROMIP
:
2438 case MSR_IA32_LASTBRANCHTOIP
:
2439 case MSR_IA32_LASTINTFROMIP
:
2440 case MSR_IA32_LASTINTTOIP
:
2442 case MSR_K8_TSEG_ADDR
:
2443 case MSR_K8_TSEG_MASK
:
2445 case MSR_VM_HSAVE_PA
:
2446 case MSR_K8_INT_PENDING_MSG
:
2447 case MSR_AMD64_NB_CFG
:
2448 case MSR_FAM10H_MMIO_CONF_BASE
:
2449 case MSR_AMD64_BU_CFG2
:
2450 case MSR_IA32_PERF_CTL
:
2451 case MSR_AMD64_DC_CFG
:
2454 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2455 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2456 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2457 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2458 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2459 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2462 case MSR_IA32_UCODE_REV
:
2463 msr_info
->data
= 0x100000000ULL
;
2466 case 0x200 ... 0x2ff:
2467 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2468 case 0xcd: /* fsb frequency */
2472 * MSR_EBC_FREQUENCY_ID
2473 * Conservative value valid for even the basic CPU models.
2474 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2475 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2476 * and 266MHz for model 3, or 4. Set Core Clock
2477 * Frequency to System Bus Frequency Ratio to 1 (bits
2478 * 31:24) even though these are only valid for CPU
2479 * models > 2, however guests may end up dividing or
2480 * multiplying by zero otherwise.
2482 case MSR_EBC_FREQUENCY_ID
:
2483 msr_info
->data
= 1 << 24;
2485 case MSR_IA32_APICBASE
:
2486 msr_info
->data
= kvm_get_apic_base(vcpu
);
2488 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2489 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2491 case MSR_IA32_TSCDEADLINE
:
2492 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2494 case MSR_IA32_TSC_ADJUST
:
2495 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2497 case MSR_IA32_MISC_ENABLE
:
2498 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2500 case MSR_IA32_SMBASE
:
2501 if (!msr_info
->host_initiated
)
2503 msr_info
->data
= vcpu
->arch
.smbase
;
2505 case MSR_IA32_PERF_STATUS
:
2506 /* TSC increment by tick */
2507 msr_info
->data
= 1000ULL;
2508 /* CPU multiplier */
2509 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2512 msr_info
->data
= vcpu
->arch
.efer
;
2514 case MSR_KVM_WALL_CLOCK
:
2515 case MSR_KVM_WALL_CLOCK_NEW
:
2516 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2518 case MSR_KVM_SYSTEM_TIME
:
2519 case MSR_KVM_SYSTEM_TIME_NEW
:
2520 msr_info
->data
= vcpu
->arch
.time
;
2522 case MSR_KVM_ASYNC_PF_EN
:
2523 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2525 case MSR_KVM_STEAL_TIME
:
2526 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2528 case MSR_KVM_PV_EOI_EN
:
2529 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2531 case MSR_IA32_P5_MC_ADDR
:
2532 case MSR_IA32_P5_MC_TYPE
:
2533 case MSR_IA32_MCG_CAP
:
2534 case MSR_IA32_MCG_CTL
:
2535 case MSR_IA32_MCG_STATUS
:
2536 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2537 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2538 case MSR_K7_CLK_CTL
:
2540 * Provide expected ramp-up count for K7. All other
2541 * are set to zero, indicating minimum divisors for
2544 * This prevents guest kernels on AMD host with CPU
2545 * type 6, model 8 and higher from exploding due to
2546 * the rdmsr failing.
2548 msr_info
->data
= 0x20000000;
2550 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2551 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2552 case HV_X64_MSR_CRASH_CTL
:
2553 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2554 return kvm_hv_get_msr_common(vcpu
,
2555 msr_info
->index
, &msr_info
->data
);
2557 case MSR_IA32_BBL_CR_CTL3
:
2558 /* This legacy MSR exists but isn't fully documented in current
2559 * silicon. It is however accessed by winxp in very narrow
2560 * scenarios where it sets bit #19, itself documented as
2561 * a "reserved" bit. Best effort attempt to source coherent
2562 * read data here should the balance of the register be
2563 * interpreted by the guest:
2565 * L2 cache control register 3: 64GB range, 256KB size,
2566 * enabled, latency 0x1, configured
2568 msr_info
->data
= 0xbe702111;
2570 case MSR_AMD64_OSVW_ID_LENGTH
:
2571 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2573 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2575 case MSR_AMD64_OSVW_STATUS
:
2576 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2578 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2580 case MSR_PLATFORM_INFO
:
2581 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2583 case MSR_MISC_FEATURES_ENABLES
:
2584 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2587 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2588 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2590 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2594 if (report_ignored_msrs
)
2595 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2603 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2606 * Read or write a bunch of msrs. All parameters are kernel addresses.
2608 * @return number of msrs set successfully.
2610 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2611 struct kvm_msr_entry
*entries
,
2612 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2613 unsigned index
, u64
*data
))
2617 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2618 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2619 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2621 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2627 * Read or write a bunch of msrs. Parameters are user addresses.
2629 * @return number of msrs set successfully.
2631 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2632 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2633 unsigned index
, u64
*data
),
2636 struct kvm_msrs msrs
;
2637 struct kvm_msr_entry
*entries
;
2642 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2646 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2649 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2650 entries
= memdup_user(user_msrs
->entries
, size
);
2651 if (IS_ERR(entries
)) {
2652 r
= PTR_ERR(entries
);
2656 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2661 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2672 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2677 case KVM_CAP_IRQCHIP
:
2679 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2680 case KVM_CAP_SET_TSS_ADDR
:
2681 case KVM_CAP_EXT_CPUID
:
2682 case KVM_CAP_EXT_EMUL_CPUID
:
2683 case KVM_CAP_CLOCKSOURCE
:
2685 case KVM_CAP_NOP_IO_DELAY
:
2686 case KVM_CAP_MP_STATE
:
2687 case KVM_CAP_SYNC_MMU
:
2688 case KVM_CAP_USER_NMI
:
2689 case KVM_CAP_REINJECT_CONTROL
:
2690 case KVM_CAP_IRQ_INJECT_STATUS
:
2691 case KVM_CAP_IOEVENTFD
:
2692 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2694 case KVM_CAP_PIT_STATE2
:
2695 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2696 case KVM_CAP_XEN_HVM
:
2697 case KVM_CAP_VCPU_EVENTS
:
2698 case KVM_CAP_HYPERV
:
2699 case KVM_CAP_HYPERV_VAPIC
:
2700 case KVM_CAP_HYPERV_SPIN
:
2701 case KVM_CAP_HYPERV_SYNIC
:
2702 case KVM_CAP_HYPERV_SYNIC2
:
2703 case KVM_CAP_HYPERV_VP_INDEX
:
2704 case KVM_CAP_PCI_SEGMENT
:
2705 case KVM_CAP_DEBUGREGS
:
2706 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2708 case KVM_CAP_ASYNC_PF
:
2709 case KVM_CAP_GET_TSC_KHZ
:
2710 case KVM_CAP_KVMCLOCK_CTRL
:
2711 case KVM_CAP_READONLY_MEM
:
2712 case KVM_CAP_HYPERV_TIME
:
2713 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2714 case KVM_CAP_TSC_DEADLINE_TIMER
:
2715 case KVM_CAP_ENABLE_CAP_VM
:
2716 case KVM_CAP_DISABLE_QUIRKS
:
2717 case KVM_CAP_SET_BOOT_CPU_ID
:
2718 case KVM_CAP_SPLIT_IRQCHIP
:
2719 case KVM_CAP_IMMEDIATE_EXIT
:
2722 case KVM_CAP_ADJUST_CLOCK
:
2723 r
= KVM_CLOCK_TSC_STABLE
;
2725 case KVM_CAP_X86_GUEST_MWAIT
:
2726 r
= kvm_mwait_in_guest();
2728 case KVM_CAP_X86_SMM
:
2729 /* SMBASE is usually relocated above 1M on modern chipsets,
2730 * and SMM handlers might indeed rely on 4G segment limits,
2731 * so do not report SMM to be available if real mode is
2732 * emulated via vm86 mode. Still, do not go to great lengths
2733 * to avoid userspace's usage of the feature, because it is a
2734 * fringe case that is not enabled except via specific settings
2735 * of the module parameters.
2737 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2740 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2742 case KVM_CAP_NR_VCPUS
:
2743 r
= KVM_SOFT_MAX_VCPUS
;
2745 case KVM_CAP_MAX_VCPUS
:
2748 case KVM_CAP_NR_MEMSLOTS
:
2749 r
= KVM_USER_MEM_SLOTS
;
2751 case KVM_CAP_PV_MMU
: /* obsolete */
2755 r
= KVM_MAX_MCE_BANKS
;
2758 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2760 case KVM_CAP_TSC_CONTROL
:
2761 r
= kvm_has_tsc_control
;
2763 case KVM_CAP_X2APIC_API
:
2764 r
= KVM_X2APIC_API_VALID_FLAGS
;
2774 long kvm_arch_dev_ioctl(struct file
*filp
,
2775 unsigned int ioctl
, unsigned long arg
)
2777 void __user
*argp
= (void __user
*)arg
;
2781 case KVM_GET_MSR_INDEX_LIST
: {
2782 struct kvm_msr_list __user
*user_msr_list
= argp
;
2783 struct kvm_msr_list msr_list
;
2787 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2790 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2791 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2794 if (n
< msr_list
.nmsrs
)
2797 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2798 num_msrs_to_save
* sizeof(u32
)))
2800 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2802 num_emulated_msrs
* sizeof(u32
)))
2807 case KVM_GET_SUPPORTED_CPUID
:
2808 case KVM_GET_EMULATED_CPUID
: {
2809 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2810 struct kvm_cpuid2 cpuid
;
2813 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2816 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2822 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2827 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2829 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2830 sizeof(kvm_mce_cap_supported
)))
2842 static void wbinvd_ipi(void *garbage
)
2847 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2849 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2852 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2854 /* Address WBINVD may be executed by guest */
2855 if (need_emulate_wbinvd(vcpu
)) {
2856 if (kvm_x86_ops
->has_wbinvd_exit())
2857 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2858 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2859 smp_call_function_single(vcpu
->cpu
,
2860 wbinvd_ipi
, NULL
, 1);
2863 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2865 /* Apply any externally detected TSC adjustments (due to suspend) */
2866 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2867 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2868 vcpu
->arch
.tsc_offset_adjustment
= 0;
2869 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2872 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2873 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2874 rdtsc() - vcpu
->arch
.last_host_tsc
;
2876 mark_tsc_unstable("KVM discovered backwards TSC");
2878 if (check_tsc_unstable()) {
2879 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2880 vcpu
->arch
.last_guest_tsc
);
2881 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2882 vcpu
->arch
.tsc_catchup
= 1;
2885 if (kvm_lapic_hv_timer_in_use(vcpu
))
2886 kvm_lapic_restart_hv_timer(vcpu
);
2889 * On a host with synchronized TSC, there is no need to update
2890 * kvmclock on vcpu->cpu migration
2892 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2893 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2894 if (vcpu
->cpu
!= cpu
)
2895 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2899 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2902 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2904 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2907 vcpu
->arch
.st
.steal
.preempted
= 1;
2909 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2910 &vcpu
->arch
.st
.steal
.preempted
,
2911 offsetof(struct kvm_steal_time
, preempted
),
2912 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2915 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2919 if (vcpu
->preempted
)
2920 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
2923 * Disable page faults because we're in atomic context here.
2924 * kvm_write_guest_offset_cached() would call might_fault()
2925 * that relies on pagefault_disable() to tell if there's a
2926 * bug. NOTE: the write to guest memory may not go through if
2927 * during postcopy live migration or if there's heavy guest
2930 pagefault_disable();
2932 * kvm_memslots() will be called by
2933 * kvm_write_guest_offset_cached() so take the srcu lock.
2935 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2936 kvm_steal_time_set_preempted(vcpu
);
2937 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2939 kvm_x86_ops
->vcpu_put(vcpu
);
2940 kvm_put_guest_fpu(vcpu
);
2941 vcpu
->arch
.last_host_tsc
= rdtsc();
2944 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2945 struct kvm_lapic_state
*s
)
2947 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2948 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2950 return kvm_apic_get_state(vcpu
, s
);
2953 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2954 struct kvm_lapic_state
*s
)
2958 r
= kvm_apic_set_state(vcpu
, s
);
2961 update_cr8_intercept(vcpu
);
2966 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2968 return (!lapic_in_kernel(vcpu
) ||
2969 kvm_apic_accept_pic_intr(vcpu
));
2973 * if userspace requested an interrupt window, check that the
2974 * interrupt window is open.
2976 * No need to exit to userspace if we already have an interrupt queued.
2978 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2980 return kvm_arch_interrupt_allowed(vcpu
) &&
2981 !kvm_cpu_has_interrupt(vcpu
) &&
2982 !kvm_event_needs_reinjection(vcpu
) &&
2983 kvm_cpu_accept_dm_intr(vcpu
);
2986 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2987 struct kvm_interrupt
*irq
)
2989 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2992 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2993 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2994 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2999 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3000 * fail for in-kernel 8259.
3002 if (pic_in_kernel(vcpu
->kvm
))
3005 if (vcpu
->arch
.pending_external_vector
!= -1)
3008 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3009 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3013 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3015 kvm_inject_nmi(vcpu
);
3020 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3022 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3027 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3028 struct kvm_tpr_access_ctl
*tac
)
3032 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3036 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3040 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3043 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3045 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3048 vcpu
->arch
.mcg_cap
= mcg_cap
;
3049 /* Init IA32_MCG_CTL to all 1s */
3050 if (mcg_cap
& MCG_CTL_P
)
3051 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3052 /* Init IA32_MCi_CTL to all 1s */
3053 for (bank
= 0; bank
< bank_num
; bank
++)
3054 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3056 if (kvm_x86_ops
->setup_mce
)
3057 kvm_x86_ops
->setup_mce(vcpu
);
3062 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3063 struct kvm_x86_mce
*mce
)
3065 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3066 unsigned bank_num
= mcg_cap
& 0xff;
3067 u64
*banks
= vcpu
->arch
.mce_banks
;
3069 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3072 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3073 * reporting is disabled
3075 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3076 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3078 banks
+= 4 * mce
->bank
;
3080 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3081 * reporting is disabled for the bank
3083 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3085 if (mce
->status
& MCI_STATUS_UC
) {
3086 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3087 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3088 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3091 if (banks
[1] & MCI_STATUS_VAL
)
3092 mce
->status
|= MCI_STATUS_OVER
;
3093 banks
[2] = mce
->addr
;
3094 banks
[3] = mce
->misc
;
3095 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3096 banks
[1] = mce
->status
;
3097 kvm_queue_exception(vcpu
, MC_VECTOR
);
3098 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3099 || !(banks
[1] & MCI_STATUS_UC
)) {
3100 if (banks
[1] & MCI_STATUS_VAL
)
3101 mce
->status
|= MCI_STATUS_OVER
;
3102 banks
[2] = mce
->addr
;
3103 banks
[3] = mce
->misc
;
3104 banks
[1] = mce
->status
;
3106 banks
[1] |= MCI_STATUS_OVER
;
3110 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3111 struct kvm_vcpu_events
*events
)
3115 * FIXME: pass injected and pending separately. This is only
3116 * needed for nested virtualization, whose state cannot be
3117 * migrated yet. For now we can combine them.
3119 events
->exception
.injected
=
3120 (vcpu
->arch
.exception
.pending
||
3121 vcpu
->arch
.exception
.injected
) &&
3122 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3123 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3124 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3125 events
->exception
.pad
= 0;
3126 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3128 events
->interrupt
.injected
=
3129 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3130 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3131 events
->interrupt
.soft
= 0;
3132 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3134 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3135 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3136 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3137 events
->nmi
.pad
= 0;
3139 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3141 events
->smi
.smm
= is_smm(vcpu
);
3142 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3143 events
->smi
.smm_inside_nmi
=
3144 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3145 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3147 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3148 | KVM_VCPUEVENT_VALID_SHADOW
3149 | KVM_VCPUEVENT_VALID_SMM
);
3150 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3153 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3155 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3156 struct kvm_vcpu_events
*events
)
3158 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3159 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3160 | KVM_VCPUEVENT_VALID_SHADOW
3161 | KVM_VCPUEVENT_VALID_SMM
))
3164 if (events
->exception
.injected
&&
3165 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3166 is_guest_mode(vcpu
)))
3169 /* INITs are latched while in SMM */
3170 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3171 (events
->smi
.smm
|| events
->smi
.pending
) &&
3172 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3176 vcpu
->arch
.exception
.injected
= false;
3177 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3178 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3179 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3180 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3182 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3183 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3184 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3185 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3186 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3187 events
->interrupt
.shadow
);
3189 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3190 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3191 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3192 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3194 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3195 lapic_in_kernel(vcpu
))
3196 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3198 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3199 u32 hflags
= vcpu
->arch
.hflags
;
3200 if (events
->smi
.smm
)
3201 hflags
|= HF_SMM_MASK
;
3203 hflags
&= ~HF_SMM_MASK
;
3204 kvm_set_hflags(vcpu
, hflags
);
3206 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3208 if (events
->smi
.smm
) {
3209 if (events
->smi
.smm_inside_nmi
)
3210 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3212 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3213 if (lapic_in_kernel(vcpu
)) {
3214 if (events
->smi
.latched_init
)
3215 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3217 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3222 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3227 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3228 struct kvm_debugregs
*dbgregs
)
3232 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3233 kvm_get_dr(vcpu
, 6, &val
);
3235 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3237 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3240 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3241 struct kvm_debugregs
*dbgregs
)
3246 if (dbgregs
->dr6
& ~0xffffffffull
)
3248 if (dbgregs
->dr7
& ~0xffffffffull
)
3251 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3252 kvm_update_dr0123(vcpu
);
3253 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3254 kvm_update_dr6(vcpu
);
3255 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3256 kvm_update_dr7(vcpu
);
3261 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3263 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3265 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3266 u64 xstate_bv
= xsave
->header
.xfeatures
;
3270 * Copy legacy XSAVE area, to avoid complications with CPUID
3271 * leaves 0 and 1 in the loop below.
3273 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3276 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3277 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3280 * Copy each region from the possibly compacted offset to the
3281 * non-compacted offset.
3283 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3285 u64 feature
= valid
& -valid
;
3286 int index
= fls64(feature
) - 1;
3287 void *src
= get_xsave_addr(xsave
, feature
);
3290 u32 size
, offset
, ecx
, edx
;
3291 cpuid_count(XSTATE_CPUID
, index
,
3292 &size
, &offset
, &ecx
, &edx
);
3293 if (feature
== XFEATURE_MASK_PKRU
)
3294 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3295 sizeof(vcpu
->arch
.pkru
));
3297 memcpy(dest
+ offset
, src
, size
);
3305 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3307 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3308 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3312 * Copy legacy XSAVE area, to avoid complications with CPUID
3313 * leaves 0 and 1 in the loop below.
3315 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3317 /* Set XSTATE_BV and possibly XCOMP_BV. */
3318 xsave
->header
.xfeatures
= xstate_bv
;
3319 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3320 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3323 * Copy each region from the non-compacted offset to the
3324 * possibly compacted offset.
3326 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3328 u64 feature
= valid
& -valid
;
3329 int index
= fls64(feature
) - 1;
3330 void *dest
= get_xsave_addr(xsave
, feature
);
3333 u32 size
, offset
, ecx
, edx
;
3334 cpuid_count(XSTATE_CPUID
, index
,
3335 &size
, &offset
, &ecx
, &edx
);
3336 if (feature
== XFEATURE_MASK_PKRU
)
3337 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3338 sizeof(vcpu
->arch
.pkru
));
3340 memcpy(dest
, src
+ offset
, size
);
3347 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3348 struct kvm_xsave
*guest_xsave
)
3350 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3351 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3352 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3354 memcpy(guest_xsave
->region
,
3355 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3356 sizeof(struct fxregs_state
));
3357 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3358 XFEATURE_MASK_FPSSE
;
3362 #define XSAVE_MXCSR_OFFSET 24
3364 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3365 struct kvm_xsave
*guest_xsave
)
3368 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3369 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3371 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3373 * Here we allow setting states that are not present in
3374 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3375 * with old userspace.
3377 if (xstate_bv
& ~kvm_supported_xcr0() ||
3378 mxcsr
& ~mxcsr_feature_mask
)
3380 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3382 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3383 mxcsr
& ~mxcsr_feature_mask
)
3385 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3386 guest_xsave
->region
, sizeof(struct fxregs_state
));
3391 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3392 struct kvm_xcrs
*guest_xcrs
)
3394 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3395 guest_xcrs
->nr_xcrs
= 0;
3399 guest_xcrs
->nr_xcrs
= 1;
3400 guest_xcrs
->flags
= 0;
3401 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3402 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3405 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3406 struct kvm_xcrs
*guest_xcrs
)
3410 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3413 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3416 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3417 /* Only support XCR0 currently */
3418 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3419 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3420 guest_xcrs
->xcrs
[i
].value
);
3429 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3430 * stopped by the hypervisor. This function will be called from the host only.
3431 * EINVAL is returned when the host attempts to set the flag for a guest that
3432 * does not support pv clocks.
3434 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3436 if (!vcpu
->arch
.pv_time_enabled
)
3438 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3439 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3443 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3444 struct kvm_enable_cap
*cap
)
3450 case KVM_CAP_HYPERV_SYNIC2
:
3453 case KVM_CAP_HYPERV_SYNIC
:
3454 if (!irqchip_in_kernel(vcpu
->kvm
))
3456 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3457 KVM_CAP_HYPERV_SYNIC2
);
3463 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3464 unsigned int ioctl
, unsigned long arg
)
3466 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3467 void __user
*argp
= (void __user
*)arg
;
3470 struct kvm_lapic_state
*lapic
;
3471 struct kvm_xsave
*xsave
;
3472 struct kvm_xcrs
*xcrs
;
3478 case KVM_GET_LAPIC
: {
3480 if (!lapic_in_kernel(vcpu
))
3482 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3487 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3491 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3496 case KVM_SET_LAPIC
: {
3498 if (!lapic_in_kernel(vcpu
))
3500 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3501 if (IS_ERR(u
.lapic
))
3502 return PTR_ERR(u
.lapic
);
3504 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3507 case KVM_INTERRUPT
: {
3508 struct kvm_interrupt irq
;
3511 if (copy_from_user(&irq
, argp
, sizeof irq
))
3513 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3517 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3521 r
= kvm_vcpu_ioctl_smi(vcpu
);
3524 case KVM_SET_CPUID
: {
3525 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3526 struct kvm_cpuid cpuid
;
3529 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3531 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3534 case KVM_SET_CPUID2
: {
3535 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3536 struct kvm_cpuid2 cpuid
;
3539 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3541 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3542 cpuid_arg
->entries
);
3545 case KVM_GET_CPUID2
: {
3546 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3547 struct kvm_cpuid2 cpuid
;
3550 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3552 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3553 cpuid_arg
->entries
);
3557 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3563 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3566 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3568 case KVM_TPR_ACCESS_REPORTING
: {
3569 struct kvm_tpr_access_ctl tac
;
3572 if (copy_from_user(&tac
, argp
, sizeof tac
))
3574 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3578 if (copy_to_user(argp
, &tac
, sizeof tac
))
3583 case KVM_SET_VAPIC_ADDR
: {
3584 struct kvm_vapic_addr va
;
3588 if (!lapic_in_kernel(vcpu
))
3591 if (copy_from_user(&va
, argp
, sizeof va
))
3593 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3594 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3595 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3598 case KVM_X86_SETUP_MCE
: {
3602 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3604 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3607 case KVM_X86_SET_MCE
: {
3608 struct kvm_x86_mce mce
;
3611 if (copy_from_user(&mce
, argp
, sizeof mce
))
3613 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3616 case KVM_GET_VCPU_EVENTS
: {
3617 struct kvm_vcpu_events events
;
3619 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3622 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3627 case KVM_SET_VCPU_EVENTS
: {
3628 struct kvm_vcpu_events events
;
3631 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3634 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3637 case KVM_GET_DEBUGREGS
: {
3638 struct kvm_debugregs dbgregs
;
3640 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3643 if (copy_to_user(argp
, &dbgregs
,
3644 sizeof(struct kvm_debugregs
)))
3649 case KVM_SET_DEBUGREGS
: {
3650 struct kvm_debugregs dbgregs
;
3653 if (copy_from_user(&dbgregs
, argp
,
3654 sizeof(struct kvm_debugregs
)))
3657 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3660 case KVM_GET_XSAVE
: {
3661 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3666 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3669 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3674 case KVM_SET_XSAVE
: {
3675 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3676 if (IS_ERR(u
.xsave
))
3677 return PTR_ERR(u
.xsave
);
3679 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3682 case KVM_GET_XCRS
: {
3683 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3688 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3691 if (copy_to_user(argp
, u
.xcrs
,
3692 sizeof(struct kvm_xcrs
)))
3697 case KVM_SET_XCRS
: {
3698 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3700 return PTR_ERR(u
.xcrs
);
3702 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3705 case KVM_SET_TSC_KHZ
: {
3709 user_tsc_khz
= (u32
)arg
;
3711 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3714 if (user_tsc_khz
== 0)
3715 user_tsc_khz
= tsc_khz
;
3717 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3722 case KVM_GET_TSC_KHZ
: {
3723 r
= vcpu
->arch
.virtual_tsc_khz
;
3726 case KVM_KVMCLOCK_CTRL
: {
3727 r
= kvm_set_guest_paused(vcpu
);
3730 case KVM_ENABLE_CAP
: {
3731 struct kvm_enable_cap cap
;
3734 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3736 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3747 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3749 return VM_FAULT_SIGBUS
;
3752 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3756 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3758 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3762 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3765 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3769 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3770 u32 kvm_nr_mmu_pages
)
3772 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3775 mutex_lock(&kvm
->slots_lock
);
3777 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3778 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3780 mutex_unlock(&kvm
->slots_lock
);
3784 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3786 return kvm
->arch
.n_max_mmu_pages
;
3789 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3791 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3795 switch (chip
->chip_id
) {
3796 case KVM_IRQCHIP_PIC_MASTER
:
3797 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3798 sizeof(struct kvm_pic_state
));
3800 case KVM_IRQCHIP_PIC_SLAVE
:
3801 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3802 sizeof(struct kvm_pic_state
));
3804 case KVM_IRQCHIP_IOAPIC
:
3805 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3814 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3816 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3820 switch (chip
->chip_id
) {
3821 case KVM_IRQCHIP_PIC_MASTER
:
3822 spin_lock(&pic
->lock
);
3823 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3824 sizeof(struct kvm_pic_state
));
3825 spin_unlock(&pic
->lock
);
3827 case KVM_IRQCHIP_PIC_SLAVE
:
3828 spin_lock(&pic
->lock
);
3829 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3830 sizeof(struct kvm_pic_state
));
3831 spin_unlock(&pic
->lock
);
3833 case KVM_IRQCHIP_IOAPIC
:
3834 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3840 kvm_pic_update_irq(pic
);
3844 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3846 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3848 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3850 mutex_lock(&kps
->lock
);
3851 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3852 mutex_unlock(&kps
->lock
);
3856 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3859 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3861 mutex_lock(&pit
->pit_state
.lock
);
3862 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3863 for (i
= 0; i
< 3; i
++)
3864 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3865 mutex_unlock(&pit
->pit_state
.lock
);
3869 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3871 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3872 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3873 sizeof(ps
->channels
));
3874 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3875 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3876 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3880 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3884 u32 prev_legacy
, cur_legacy
;
3885 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3887 mutex_lock(&pit
->pit_state
.lock
);
3888 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3889 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3890 if (!prev_legacy
&& cur_legacy
)
3892 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3893 sizeof(pit
->pit_state
.channels
));
3894 pit
->pit_state
.flags
= ps
->flags
;
3895 for (i
= 0; i
< 3; i
++)
3896 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3898 mutex_unlock(&pit
->pit_state
.lock
);
3902 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3903 struct kvm_reinject_control
*control
)
3905 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3910 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3911 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3912 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3914 mutex_lock(&pit
->pit_state
.lock
);
3915 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3916 mutex_unlock(&pit
->pit_state
.lock
);
3922 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3923 * @kvm: kvm instance
3924 * @log: slot id and address to which we copy the log
3926 * Steps 1-4 below provide general overview of dirty page logging. See
3927 * kvm_get_dirty_log_protect() function description for additional details.
3929 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3930 * always flush the TLB (step 4) even if previous step failed and the dirty
3931 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3932 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3933 * writes will be marked dirty for next log read.
3935 * 1. Take a snapshot of the bit and clear it if needed.
3936 * 2. Write protect the corresponding page.
3937 * 3. Copy the snapshot to the userspace.
3938 * 4. Flush TLB's if needed.
3940 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3942 bool is_dirty
= false;
3945 mutex_lock(&kvm
->slots_lock
);
3948 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3950 if (kvm_x86_ops
->flush_log_dirty
)
3951 kvm_x86_ops
->flush_log_dirty(kvm
);
3953 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3956 * All the TLBs can be flushed out of mmu lock, see the comments in
3957 * kvm_mmu_slot_remove_write_access().
3959 lockdep_assert_held(&kvm
->slots_lock
);
3961 kvm_flush_remote_tlbs(kvm
);
3963 mutex_unlock(&kvm
->slots_lock
);
3967 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3970 if (!irqchip_in_kernel(kvm
))
3973 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3974 irq_event
->irq
, irq_event
->level
,
3979 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3980 struct kvm_enable_cap
*cap
)
3988 case KVM_CAP_DISABLE_QUIRKS
:
3989 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3992 case KVM_CAP_SPLIT_IRQCHIP
: {
3993 mutex_lock(&kvm
->lock
);
3995 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3996 goto split_irqchip_unlock
;
3998 if (irqchip_in_kernel(kvm
))
3999 goto split_irqchip_unlock
;
4000 if (kvm
->created_vcpus
)
4001 goto split_irqchip_unlock
;
4002 r
= kvm_setup_empty_irq_routing(kvm
);
4004 goto split_irqchip_unlock
;
4005 /* Pairs with irqchip_in_kernel. */
4007 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4008 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4010 split_irqchip_unlock
:
4011 mutex_unlock(&kvm
->lock
);
4014 case KVM_CAP_X2APIC_API
:
4016 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4019 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4020 kvm
->arch
.x2apic_format
= true;
4021 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4022 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4033 long kvm_arch_vm_ioctl(struct file
*filp
,
4034 unsigned int ioctl
, unsigned long arg
)
4036 struct kvm
*kvm
= filp
->private_data
;
4037 void __user
*argp
= (void __user
*)arg
;
4040 * This union makes it completely explicit to gcc-3.x
4041 * that these two variables' stack usage should be
4042 * combined, not added together.
4045 struct kvm_pit_state ps
;
4046 struct kvm_pit_state2 ps2
;
4047 struct kvm_pit_config pit_config
;
4051 case KVM_SET_TSS_ADDR
:
4052 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4054 case KVM_SET_IDENTITY_MAP_ADDR
: {
4057 mutex_lock(&kvm
->lock
);
4059 if (kvm
->created_vcpus
)
4060 goto set_identity_unlock
;
4062 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4063 goto set_identity_unlock
;
4064 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4065 set_identity_unlock
:
4066 mutex_unlock(&kvm
->lock
);
4069 case KVM_SET_NR_MMU_PAGES
:
4070 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4072 case KVM_GET_NR_MMU_PAGES
:
4073 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4075 case KVM_CREATE_IRQCHIP
: {
4076 mutex_lock(&kvm
->lock
);
4079 if (irqchip_in_kernel(kvm
))
4080 goto create_irqchip_unlock
;
4083 if (kvm
->created_vcpus
)
4084 goto create_irqchip_unlock
;
4086 r
= kvm_pic_init(kvm
);
4088 goto create_irqchip_unlock
;
4090 r
= kvm_ioapic_init(kvm
);
4092 kvm_pic_destroy(kvm
);
4093 goto create_irqchip_unlock
;
4096 r
= kvm_setup_default_irq_routing(kvm
);
4098 kvm_ioapic_destroy(kvm
);
4099 kvm_pic_destroy(kvm
);
4100 goto create_irqchip_unlock
;
4102 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4104 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4105 create_irqchip_unlock
:
4106 mutex_unlock(&kvm
->lock
);
4109 case KVM_CREATE_PIT
:
4110 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4112 case KVM_CREATE_PIT2
:
4114 if (copy_from_user(&u
.pit_config
, argp
,
4115 sizeof(struct kvm_pit_config
)))
4118 mutex_lock(&kvm
->lock
);
4121 goto create_pit_unlock
;
4123 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4127 mutex_unlock(&kvm
->lock
);
4129 case KVM_GET_IRQCHIP
: {
4130 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4131 struct kvm_irqchip
*chip
;
4133 chip
= memdup_user(argp
, sizeof(*chip
));
4140 if (!irqchip_kernel(kvm
))
4141 goto get_irqchip_out
;
4142 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4144 goto get_irqchip_out
;
4146 if (copy_to_user(argp
, chip
, sizeof *chip
))
4147 goto get_irqchip_out
;
4153 case KVM_SET_IRQCHIP
: {
4154 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4155 struct kvm_irqchip
*chip
;
4157 chip
= memdup_user(argp
, sizeof(*chip
));
4164 if (!irqchip_kernel(kvm
))
4165 goto set_irqchip_out
;
4166 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4168 goto set_irqchip_out
;
4176 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4179 if (!kvm
->arch
.vpit
)
4181 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4185 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4192 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4195 if (!kvm
->arch
.vpit
)
4197 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4200 case KVM_GET_PIT2
: {
4202 if (!kvm
->arch
.vpit
)
4204 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4208 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4213 case KVM_SET_PIT2
: {
4215 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4218 if (!kvm
->arch
.vpit
)
4220 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4223 case KVM_REINJECT_CONTROL
: {
4224 struct kvm_reinject_control control
;
4226 if (copy_from_user(&control
, argp
, sizeof(control
)))
4228 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4231 case KVM_SET_BOOT_CPU_ID
:
4233 mutex_lock(&kvm
->lock
);
4234 if (kvm
->created_vcpus
)
4237 kvm
->arch
.bsp_vcpu_id
= arg
;
4238 mutex_unlock(&kvm
->lock
);
4240 case KVM_XEN_HVM_CONFIG
: {
4242 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4243 sizeof(struct kvm_xen_hvm_config
)))
4246 if (kvm
->arch
.xen_hvm_config
.flags
)
4251 case KVM_SET_CLOCK
: {
4252 struct kvm_clock_data user_ns
;
4256 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4265 * TODO: userspace has to take care of races with VCPU_RUN, so
4266 * kvm_gen_update_masterclock() can be cut down to locked
4267 * pvclock_update_vm_gtod_copy().
4269 kvm_gen_update_masterclock(kvm
);
4270 now_ns
= get_kvmclock_ns(kvm
);
4271 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4272 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4275 case KVM_GET_CLOCK
: {
4276 struct kvm_clock_data user_ns
;
4279 now_ns
= get_kvmclock_ns(kvm
);
4280 user_ns
.clock
= now_ns
;
4281 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4282 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4285 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4290 case KVM_ENABLE_CAP
: {
4291 struct kvm_enable_cap cap
;
4294 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4296 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4306 static void kvm_init_msr_list(void)
4311 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4312 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4316 * Even MSRs that are valid in the host may not be exposed
4317 * to the guests in some cases.
4319 switch (msrs_to_save
[i
]) {
4320 case MSR_IA32_BNDCFGS
:
4321 if (!kvm_x86_ops
->mpx_supported())
4325 if (!kvm_x86_ops
->rdtscp_supported())
4333 msrs_to_save
[j
] = msrs_to_save
[i
];
4336 num_msrs_to_save
= j
;
4338 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4339 switch (emulated_msrs
[i
]) {
4340 case MSR_IA32_SMBASE
:
4341 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4349 emulated_msrs
[j
] = emulated_msrs
[i
];
4352 num_emulated_msrs
= j
;
4355 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4363 if (!(lapic_in_kernel(vcpu
) &&
4364 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4365 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4376 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4383 if (!(lapic_in_kernel(vcpu
) &&
4384 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4386 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4388 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4398 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4399 struct kvm_segment
*var
, int seg
)
4401 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4404 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4405 struct kvm_segment
*var
, int seg
)
4407 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4410 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4411 struct x86_exception
*exception
)
4415 BUG_ON(!mmu_is_nested(vcpu
));
4417 /* NPT walks are always user-walks */
4418 access
|= PFERR_USER_MASK
;
4419 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4424 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4425 struct x86_exception
*exception
)
4427 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4428 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4431 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4432 struct x86_exception
*exception
)
4434 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4435 access
|= PFERR_FETCH_MASK
;
4436 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4439 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4440 struct x86_exception
*exception
)
4442 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4443 access
|= PFERR_WRITE_MASK
;
4444 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4447 /* uses this to access any guest's mapped memory without checking CPL */
4448 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4449 struct x86_exception
*exception
)
4451 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4454 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4455 struct kvm_vcpu
*vcpu
, u32 access
,
4456 struct x86_exception
*exception
)
4459 int r
= X86EMUL_CONTINUE
;
4462 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4464 unsigned offset
= addr
& (PAGE_SIZE
-1);
4465 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4468 if (gpa
== UNMAPPED_GVA
)
4469 return X86EMUL_PROPAGATE_FAULT
;
4470 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4473 r
= X86EMUL_IO_NEEDED
;
4485 /* used for instruction fetching */
4486 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4487 gva_t addr
, void *val
, unsigned int bytes
,
4488 struct x86_exception
*exception
)
4490 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4491 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4495 /* Inline kvm_read_guest_virt_helper for speed. */
4496 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4498 if (unlikely(gpa
== UNMAPPED_GVA
))
4499 return X86EMUL_PROPAGATE_FAULT
;
4501 offset
= addr
& (PAGE_SIZE
-1);
4502 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4503 bytes
= (unsigned)PAGE_SIZE
- offset
;
4504 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4506 if (unlikely(ret
< 0))
4507 return X86EMUL_IO_NEEDED
;
4509 return X86EMUL_CONTINUE
;
4512 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4513 gva_t addr
, void *val
, unsigned int bytes
,
4514 struct x86_exception
*exception
)
4516 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4517 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4519 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4522 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4524 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4525 gva_t addr
, void *val
, unsigned int bytes
,
4526 struct x86_exception
*exception
)
4528 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4529 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4532 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4533 unsigned long addr
, void *val
, unsigned int bytes
)
4535 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4536 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4538 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4541 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4542 gva_t addr
, void *val
,
4544 struct x86_exception
*exception
)
4546 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4548 int r
= X86EMUL_CONTINUE
;
4551 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4554 unsigned offset
= addr
& (PAGE_SIZE
-1);
4555 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4558 if (gpa
== UNMAPPED_GVA
)
4559 return X86EMUL_PROPAGATE_FAULT
;
4560 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4562 r
= X86EMUL_IO_NEEDED
;
4573 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4575 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4576 gpa_t gpa
, bool write
)
4578 /* For APIC access vmexit */
4579 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4582 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4583 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4590 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4591 gpa_t
*gpa
, struct x86_exception
*exception
,
4594 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4595 | (write
? PFERR_WRITE_MASK
: 0);
4598 * currently PKRU is only applied to ept enabled guest so
4599 * there is no pkey in EPT page table for L1 guest or EPT
4600 * shadow page table for L2 guest.
4602 if (vcpu_match_mmio_gva(vcpu
, gva
)
4603 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4604 vcpu
->arch
.access
, 0, access
)) {
4605 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4606 (gva
& (PAGE_SIZE
- 1));
4607 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4611 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4613 if (*gpa
== UNMAPPED_GVA
)
4616 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4619 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4620 const void *val
, int bytes
)
4624 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4627 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4631 struct read_write_emulator_ops
{
4632 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4634 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4635 void *val
, int bytes
);
4636 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4637 int bytes
, void *val
);
4638 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4639 void *val
, int bytes
);
4643 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4645 if (vcpu
->mmio_read_completed
) {
4646 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4647 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4648 vcpu
->mmio_read_completed
= 0;
4655 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4656 void *val
, int bytes
)
4658 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4661 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4662 void *val
, int bytes
)
4664 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4667 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4669 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4670 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4673 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4674 void *val
, int bytes
)
4676 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4677 return X86EMUL_IO_NEEDED
;
4680 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4681 void *val
, int bytes
)
4683 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4685 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4686 return X86EMUL_CONTINUE
;
4689 static const struct read_write_emulator_ops read_emultor
= {
4690 .read_write_prepare
= read_prepare
,
4691 .read_write_emulate
= read_emulate
,
4692 .read_write_mmio
= vcpu_mmio_read
,
4693 .read_write_exit_mmio
= read_exit_mmio
,
4696 static const struct read_write_emulator_ops write_emultor
= {
4697 .read_write_emulate
= write_emulate
,
4698 .read_write_mmio
= write_mmio
,
4699 .read_write_exit_mmio
= write_exit_mmio
,
4703 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4705 struct x86_exception
*exception
,
4706 struct kvm_vcpu
*vcpu
,
4707 const struct read_write_emulator_ops
*ops
)
4711 bool write
= ops
->write
;
4712 struct kvm_mmio_fragment
*frag
;
4713 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4716 * If the exit was due to a NPF we may already have a GPA.
4717 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4718 * Note, this cannot be used on string operations since string
4719 * operation using rep will only have the initial GPA from the NPF
4722 if (vcpu
->arch
.gpa_available
&&
4723 emulator_can_use_gpa(ctxt
) &&
4724 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4725 gpa
= vcpu
->arch
.gpa_val
;
4726 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4728 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4730 return X86EMUL_PROPAGATE_FAULT
;
4733 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4734 return X86EMUL_CONTINUE
;
4737 * Is this MMIO handled locally?
4739 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4740 if (handled
== bytes
)
4741 return X86EMUL_CONTINUE
;
4747 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4748 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4752 return X86EMUL_CONTINUE
;
4755 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4757 void *val
, unsigned int bytes
,
4758 struct x86_exception
*exception
,
4759 const struct read_write_emulator_ops
*ops
)
4761 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4765 if (ops
->read_write_prepare
&&
4766 ops
->read_write_prepare(vcpu
, val
, bytes
))
4767 return X86EMUL_CONTINUE
;
4769 vcpu
->mmio_nr_fragments
= 0;
4771 /* Crossing a page boundary? */
4772 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4775 now
= -addr
& ~PAGE_MASK
;
4776 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4779 if (rc
!= X86EMUL_CONTINUE
)
4782 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4788 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4790 if (rc
!= X86EMUL_CONTINUE
)
4793 if (!vcpu
->mmio_nr_fragments
)
4796 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4798 vcpu
->mmio_needed
= 1;
4799 vcpu
->mmio_cur_fragment
= 0;
4801 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4802 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4803 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4804 vcpu
->run
->mmio
.phys_addr
= gpa
;
4806 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4809 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4813 struct x86_exception
*exception
)
4815 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4816 exception
, &read_emultor
);
4819 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4823 struct x86_exception
*exception
)
4825 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4826 exception
, &write_emultor
);
4829 #define CMPXCHG_TYPE(t, ptr, old, new) \
4830 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4832 #ifdef CONFIG_X86_64
4833 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4835 # define CMPXCHG64(ptr, old, new) \
4836 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4839 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4844 struct x86_exception
*exception
)
4846 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4852 /* guests cmpxchg8b have to be emulated atomically */
4853 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4856 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4858 if (gpa
== UNMAPPED_GVA
||
4859 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4862 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4865 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4866 if (is_error_page(page
))
4869 kaddr
= kmap_atomic(page
);
4870 kaddr
+= offset_in_page(gpa
);
4873 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4876 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4879 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4882 exchanged
= CMPXCHG64(kaddr
, old
, new);
4887 kunmap_atomic(kaddr
);
4888 kvm_release_page_dirty(page
);
4891 return X86EMUL_CMPXCHG_FAILED
;
4893 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4894 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4896 return X86EMUL_CONTINUE
;
4899 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4901 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4904 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4908 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
4909 if (vcpu
->arch
.pio
.in
)
4910 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4911 vcpu
->arch
.pio
.size
, pd
);
4913 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4914 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4918 pd
+= vcpu
->arch
.pio
.size
;
4923 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4924 unsigned short port
, void *val
,
4925 unsigned int count
, bool in
)
4927 vcpu
->arch
.pio
.port
= port
;
4928 vcpu
->arch
.pio
.in
= in
;
4929 vcpu
->arch
.pio
.count
= count
;
4930 vcpu
->arch
.pio
.size
= size
;
4932 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4933 vcpu
->arch
.pio
.count
= 0;
4937 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4938 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4939 vcpu
->run
->io
.size
= size
;
4940 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4941 vcpu
->run
->io
.count
= count
;
4942 vcpu
->run
->io
.port
= port
;
4947 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4948 int size
, unsigned short port
, void *val
,
4951 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4954 if (vcpu
->arch
.pio
.count
)
4957 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
4959 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4962 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4963 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4964 vcpu
->arch
.pio
.count
= 0;
4971 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4972 int size
, unsigned short port
,
4973 const void *val
, unsigned int count
)
4975 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4977 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4978 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4979 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4982 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4984 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4987 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4989 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4992 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4994 if (!need_emulate_wbinvd(vcpu
))
4995 return X86EMUL_CONTINUE
;
4997 if (kvm_x86_ops
->has_wbinvd_exit()) {
4998 int cpu
= get_cpu();
5000 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5001 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5002 wbinvd_ipi
, NULL
, 1);
5004 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5007 return X86EMUL_CONTINUE
;
5010 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5012 kvm_emulate_wbinvd_noskip(vcpu
);
5013 return kvm_skip_emulated_instruction(vcpu
);
5015 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5019 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5021 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5024 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5025 unsigned long *dest
)
5027 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5030 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5031 unsigned long value
)
5034 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5037 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5039 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5042 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5044 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5045 unsigned long value
;
5049 value
= kvm_read_cr0(vcpu
);
5052 value
= vcpu
->arch
.cr2
;
5055 value
= kvm_read_cr3(vcpu
);
5058 value
= kvm_read_cr4(vcpu
);
5061 value
= kvm_get_cr8(vcpu
);
5064 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5071 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5073 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5078 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5081 vcpu
->arch
.cr2
= val
;
5084 res
= kvm_set_cr3(vcpu
, val
);
5087 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5090 res
= kvm_set_cr8(vcpu
, val
);
5093 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5100 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5102 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5105 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5107 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5110 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5112 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5115 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5117 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5120 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5122 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5125 static unsigned long emulator_get_cached_segment_base(
5126 struct x86_emulate_ctxt
*ctxt
, int seg
)
5128 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5131 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5132 struct desc_struct
*desc
, u32
*base3
,
5135 struct kvm_segment var
;
5137 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5138 *selector
= var
.selector
;
5141 memset(desc
, 0, sizeof(*desc
));
5149 set_desc_limit(desc
, var
.limit
);
5150 set_desc_base(desc
, (unsigned long)var
.base
);
5151 #ifdef CONFIG_X86_64
5153 *base3
= var
.base
>> 32;
5155 desc
->type
= var
.type
;
5157 desc
->dpl
= var
.dpl
;
5158 desc
->p
= var
.present
;
5159 desc
->avl
= var
.avl
;
5167 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5168 struct desc_struct
*desc
, u32 base3
,
5171 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5172 struct kvm_segment var
;
5174 var
.selector
= selector
;
5175 var
.base
= get_desc_base(desc
);
5176 #ifdef CONFIG_X86_64
5177 var
.base
|= ((u64
)base3
) << 32;
5179 var
.limit
= get_desc_limit(desc
);
5181 var
.limit
= (var
.limit
<< 12) | 0xfff;
5182 var
.type
= desc
->type
;
5183 var
.dpl
= desc
->dpl
;
5188 var
.avl
= desc
->avl
;
5189 var
.present
= desc
->p
;
5190 var
.unusable
= !var
.present
;
5193 kvm_set_segment(vcpu
, &var
, seg
);
5197 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5198 u32 msr_index
, u64
*pdata
)
5200 struct msr_data msr
;
5203 msr
.index
= msr_index
;
5204 msr
.host_initiated
= false;
5205 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5213 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5214 u32 msr_index
, u64 data
)
5216 struct msr_data msr
;
5219 msr
.index
= msr_index
;
5220 msr
.host_initiated
= false;
5221 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5224 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5226 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5228 return vcpu
->arch
.smbase
;
5231 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5233 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5235 vcpu
->arch
.smbase
= smbase
;
5238 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5241 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5244 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5245 u32 pmc
, u64
*pdata
)
5247 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5250 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5252 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5255 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5258 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5261 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5266 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5267 struct x86_instruction_info
*info
,
5268 enum x86_intercept_stage stage
)
5270 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5273 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5274 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5276 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5279 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5281 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5284 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5286 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5289 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5291 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5294 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5296 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5299 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5301 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5304 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5306 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5309 static const struct x86_emulate_ops emulate_ops
= {
5310 .read_gpr
= emulator_read_gpr
,
5311 .write_gpr
= emulator_write_gpr
,
5312 .read_std
= kvm_read_guest_virt_system
,
5313 .write_std
= kvm_write_guest_virt_system
,
5314 .read_phys
= kvm_read_guest_phys_system
,
5315 .fetch
= kvm_fetch_guest_virt
,
5316 .read_emulated
= emulator_read_emulated
,
5317 .write_emulated
= emulator_write_emulated
,
5318 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5319 .invlpg
= emulator_invlpg
,
5320 .pio_in_emulated
= emulator_pio_in_emulated
,
5321 .pio_out_emulated
= emulator_pio_out_emulated
,
5322 .get_segment
= emulator_get_segment
,
5323 .set_segment
= emulator_set_segment
,
5324 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5325 .get_gdt
= emulator_get_gdt
,
5326 .get_idt
= emulator_get_idt
,
5327 .set_gdt
= emulator_set_gdt
,
5328 .set_idt
= emulator_set_idt
,
5329 .get_cr
= emulator_get_cr
,
5330 .set_cr
= emulator_set_cr
,
5331 .cpl
= emulator_get_cpl
,
5332 .get_dr
= emulator_get_dr
,
5333 .set_dr
= emulator_set_dr
,
5334 .get_smbase
= emulator_get_smbase
,
5335 .set_smbase
= emulator_set_smbase
,
5336 .set_msr
= emulator_set_msr
,
5337 .get_msr
= emulator_get_msr
,
5338 .check_pmc
= emulator_check_pmc
,
5339 .read_pmc
= emulator_read_pmc
,
5340 .halt
= emulator_halt
,
5341 .wbinvd
= emulator_wbinvd
,
5342 .fix_hypercall
= emulator_fix_hypercall
,
5343 .get_fpu
= emulator_get_fpu
,
5344 .put_fpu
= emulator_put_fpu
,
5345 .intercept
= emulator_intercept
,
5346 .get_cpuid
= emulator_get_cpuid
,
5347 .set_nmi_mask
= emulator_set_nmi_mask
,
5348 .get_hflags
= emulator_get_hflags
,
5349 .set_hflags
= emulator_set_hflags
,
5350 .pre_leave_smm
= emulator_pre_leave_smm
,
5353 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5355 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5357 * an sti; sti; sequence only disable interrupts for the first
5358 * instruction. So, if the last instruction, be it emulated or
5359 * not, left the system with the INT_STI flag enabled, it
5360 * means that the last instruction is an sti. We should not
5361 * leave the flag on in this case. The same goes for mov ss
5363 if (int_shadow
& mask
)
5365 if (unlikely(int_shadow
|| mask
)) {
5366 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5368 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5372 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5374 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5375 if (ctxt
->exception
.vector
== PF_VECTOR
)
5376 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5378 if (ctxt
->exception
.error_code_valid
)
5379 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5380 ctxt
->exception
.error_code
);
5382 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5386 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5388 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5391 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5393 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5394 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5396 ctxt
->eip
= kvm_rip_read(vcpu
);
5397 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5398 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5399 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5400 cs_db
? X86EMUL_MODE_PROT32
:
5401 X86EMUL_MODE_PROT16
;
5402 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5403 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5404 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5406 init_decode_cache(ctxt
);
5407 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5410 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5412 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5415 init_emulate_ctxt(vcpu
);
5419 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5420 ret
= emulate_int_real(ctxt
, irq
);
5422 if (ret
!= X86EMUL_CONTINUE
)
5423 return EMULATE_FAIL
;
5425 ctxt
->eip
= ctxt
->_eip
;
5426 kvm_rip_write(vcpu
, ctxt
->eip
);
5427 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5429 if (irq
== NMI_VECTOR
)
5430 vcpu
->arch
.nmi_pending
= 0;
5432 vcpu
->arch
.interrupt
.pending
= false;
5434 return EMULATE_DONE
;
5436 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5438 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5440 int r
= EMULATE_DONE
;
5442 ++vcpu
->stat
.insn_emulation_fail
;
5443 trace_kvm_emulate_insn_failed(vcpu
);
5444 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5445 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5446 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5447 vcpu
->run
->internal
.ndata
= 0;
5448 r
= EMULATE_USER_EXIT
;
5450 kvm_queue_exception(vcpu
, UD_VECTOR
);
5455 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5456 bool write_fault_to_shadow_pgtable
,
5462 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5465 if (!vcpu
->arch
.mmu
.direct_map
) {
5467 * Write permission should be allowed since only
5468 * write access need to be emulated.
5470 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5473 * If the mapping is invalid in guest, let cpu retry
5474 * it to generate fault.
5476 if (gpa
== UNMAPPED_GVA
)
5481 * Do not retry the unhandleable instruction if it faults on the
5482 * readonly host memory, otherwise it will goto a infinite loop:
5483 * retry instruction -> write #PF -> emulation fail -> retry
5484 * instruction -> ...
5486 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5489 * If the instruction failed on the error pfn, it can not be fixed,
5490 * report the error to userspace.
5492 if (is_error_noslot_pfn(pfn
))
5495 kvm_release_pfn_clean(pfn
);
5497 /* The instructions are well-emulated on direct mmu. */
5498 if (vcpu
->arch
.mmu
.direct_map
) {
5499 unsigned int indirect_shadow_pages
;
5501 spin_lock(&vcpu
->kvm
->mmu_lock
);
5502 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5503 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5505 if (indirect_shadow_pages
)
5506 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5512 * if emulation was due to access to shadowed page table
5513 * and it failed try to unshadow page and re-enter the
5514 * guest to let CPU execute the instruction.
5516 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5519 * If the access faults on its page table, it can not
5520 * be fixed by unprotecting shadow page and it should
5521 * be reported to userspace.
5523 return !write_fault_to_shadow_pgtable
;
5526 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5527 unsigned long cr2
, int emulation_type
)
5529 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5530 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5532 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5533 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5536 * If the emulation is caused by #PF and it is non-page_table
5537 * writing instruction, it means the VM-EXIT is caused by shadow
5538 * page protected, we can zap the shadow page and retry this
5539 * instruction directly.
5541 * Note: if the guest uses a non-page-table modifying instruction
5542 * on the PDE that points to the instruction, then we will unmap
5543 * the instruction and go to an infinite loop. So, we cache the
5544 * last retried eip and the last fault address, if we meet the eip
5545 * and the address again, we can break out of the potential infinite
5548 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5550 if (!(emulation_type
& EMULTYPE_RETRY
))
5553 if (x86_page_table_writing_insn(ctxt
))
5556 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5559 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5560 vcpu
->arch
.last_retry_addr
= cr2
;
5562 if (!vcpu
->arch
.mmu
.direct_map
)
5563 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5565 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5570 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5571 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5573 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5575 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5576 /* This is a good place to trace that we are exiting SMM. */
5577 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5579 /* Process a latched INIT or SMI, if any. */
5580 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5583 kvm_mmu_reset_context(vcpu
);
5586 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5588 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5590 vcpu
->arch
.hflags
= emul_flags
;
5592 if (changed
& HF_SMM_MASK
)
5593 kvm_smm_changed(vcpu
);
5596 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5605 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5606 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5611 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5613 struct kvm_run
*kvm_run
= vcpu
->run
;
5615 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5616 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5617 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5618 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5619 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5620 *r
= EMULATE_USER_EXIT
;
5623 * "Certain debug exceptions may clear bit 0-3. The
5624 * remaining contents of the DR6 register are never
5625 * cleared by the processor".
5627 vcpu
->arch
.dr6
&= ~15;
5628 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5629 kvm_queue_exception(vcpu
, DB_VECTOR
);
5633 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5635 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5636 int r
= EMULATE_DONE
;
5638 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5641 * rflags is the old, "raw" value of the flags. The new value has
5642 * not been saved yet.
5644 * This is correct even for TF set by the guest, because "the
5645 * processor will not generate this exception after the instruction
5646 * that sets the TF flag".
5648 if (unlikely(rflags
& X86_EFLAGS_TF
))
5649 kvm_vcpu_do_singlestep(vcpu
, &r
);
5650 return r
== EMULATE_DONE
;
5652 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5654 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5656 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5657 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5658 struct kvm_run
*kvm_run
= vcpu
->run
;
5659 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5660 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5661 vcpu
->arch
.guest_debug_dr7
,
5665 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5666 kvm_run
->debug
.arch
.pc
= eip
;
5667 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5668 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5669 *r
= EMULATE_USER_EXIT
;
5674 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5675 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5676 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5677 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5682 vcpu
->arch
.dr6
&= ~15;
5683 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5684 kvm_queue_exception(vcpu
, DB_VECTOR
);
5693 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5700 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5701 bool writeback
= true;
5702 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5705 * Clear write_fault_to_shadow_pgtable here to ensure it is
5708 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5709 kvm_clear_exception_queue(vcpu
);
5711 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5712 init_emulate_ctxt(vcpu
);
5715 * We will reenter on the same instruction since
5716 * we do not set complete_userspace_io. This does not
5717 * handle watchpoints yet, those would be handled in
5720 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5723 ctxt
->interruptibility
= 0;
5724 ctxt
->have_exception
= false;
5725 ctxt
->exception
.vector
= -1;
5726 ctxt
->perm_ok
= false;
5728 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5730 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5732 trace_kvm_emulate_insn_start(vcpu
);
5733 ++vcpu
->stat
.insn_emulation
;
5734 if (r
!= EMULATION_OK
) {
5735 if (emulation_type
& EMULTYPE_TRAP_UD
)
5736 return EMULATE_FAIL
;
5737 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5739 return EMULATE_DONE
;
5740 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
5741 return EMULATE_DONE
;
5742 if (emulation_type
& EMULTYPE_SKIP
)
5743 return EMULATE_FAIL
;
5744 return handle_emulation_failure(vcpu
);
5748 if (emulation_type
& EMULTYPE_SKIP
) {
5749 kvm_rip_write(vcpu
, ctxt
->_eip
);
5750 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5751 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5752 return EMULATE_DONE
;
5755 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5756 return EMULATE_DONE
;
5758 /* this is needed for vmware backdoor interface to work since it
5759 changes registers values during IO operation */
5760 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5761 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5762 emulator_invalidate_register_cache(ctxt
);
5766 /* Save the faulting GPA (cr2) in the address field */
5767 ctxt
->exception
.address
= cr2
;
5769 r
= x86_emulate_insn(ctxt
);
5771 if (r
== EMULATION_INTERCEPTED
)
5772 return EMULATE_DONE
;
5774 if (r
== EMULATION_FAILED
) {
5775 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5777 return EMULATE_DONE
;
5779 return handle_emulation_failure(vcpu
);
5782 if (ctxt
->have_exception
) {
5784 if (inject_emulated_exception(vcpu
))
5786 } else if (vcpu
->arch
.pio
.count
) {
5787 if (!vcpu
->arch
.pio
.in
) {
5788 /* FIXME: return into emulator if single-stepping. */
5789 vcpu
->arch
.pio
.count
= 0;
5792 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5794 r
= EMULATE_USER_EXIT
;
5795 } else if (vcpu
->mmio_needed
) {
5796 if (!vcpu
->mmio_is_write
)
5798 r
= EMULATE_USER_EXIT
;
5799 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5800 } else if (r
== EMULATION_RESTART
)
5806 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5807 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5808 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5809 kvm_rip_write(vcpu
, ctxt
->eip
);
5810 if (r
== EMULATE_DONE
&&
5811 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5812 kvm_vcpu_do_singlestep(vcpu
, &r
);
5813 if (!ctxt
->have_exception
||
5814 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5815 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5818 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5819 * do nothing, and it will be requested again as soon as
5820 * the shadow expires. But we still need to check here,
5821 * because POPF has no interrupt shadow.
5823 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5824 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5826 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5830 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5832 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5834 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5835 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5836 size
, port
, &val
, 1);
5837 /* do not return to emulator after return from userspace */
5838 vcpu
->arch
.pio
.count
= 0;
5841 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5843 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5847 /* We should only ever be called with arch.pio.count equal to 1 */
5848 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5850 /* For size less than 4 we merge, else we zero extend */
5851 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5855 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5856 * the copy and tracing
5858 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5859 vcpu
->arch
.pio
.port
, &val
, 1);
5860 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5865 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5870 /* For size less than 4 we merge, else we zero extend */
5871 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5873 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5876 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5880 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5884 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5886 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5888 __this_cpu_write(cpu_tsc_khz
, 0);
5892 static void tsc_khz_changed(void *data
)
5894 struct cpufreq_freqs
*freq
= data
;
5895 unsigned long khz
= 0;
5899 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5900 khz
= cpufreq_quick_get(raw_smp_processor_id());
5903 __this_cpu_write(cpu_tsc_khz
, khz
);
5906 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5909 struct cpufreq_freqs
*freq
= data
;
5911 struct kvm_vcpu
*vcpu
;
5912 int i
, send_ipi
= 0;
5915 * We allow guests to temporarily run on slowing clocks,
5916 * provided we notify them after, or to run on accelerating
5917 * clocks, provided we notify them before. Thus time never
5920 * However, we have a problem. We can't atomically update
5921 * the frequency of a given CPU from this function; it is
5922 * merely a notifier, which can be called from any CPU.
5923 * Changing the TSC frequency at arbitrary points in time
5924 * requires a recomputation of local variables related to
5925 * the TSC for each VCPU. We must flag these local variables
5926 * to be updated and be sure the update takes place with the
5927 * new frequency before any guests proceed.
5929 * Unfortunately, the combination of hotplug CPU and frequency
5930 * change creates an intractable locking scenario; the order
5931 * of when these callouts happen is undefined with respect to
5932 * CPU hotplug, and they can race with each other. As such,
5933 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5934 * undefined; you can actually have a CPU frequency change take
5935 * place in between the computation of X and the setting of the
5936 * variable. To protect against this problem, all updates of
5937 * the per_cpu tsc_khz variable are done in an interrupt
5938 * protected IPI, and all callers wishing to update the value
5939 * must wait for a synchronous IPI to complete (which is trivial
5940 * if the caller is on the CPU already). This establishes the
5941 * necessary total order on variable updates.
5943 * Note that because a guest time update may take place
5944 * anytime after the setting of the VCPU's request bit, the
5945 * correct TSC value must be set before the request. However,
5946 * to ensure the update actually makes it to any guest which
5947 * starts running in hardware virtualization between the set
5948 * and the acquisition of the spinlock, we must also ping the
5949 * CPU after setting the request bit.
5953 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5955 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5958 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5960 spin_lock(&kvm_lock
);
5961 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5962 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5963 if (vcpu
->cpu
!= freq
->cpu
)
5965 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5966 if (vcpu
->cpu
!= smp_processor_id())
5970 spin_unlock(&kvm_lock
);
5972 if (freq
->old
< freq
->new && send_ipi
) {
5974 * We upscale the frequency. Must make the guest
5975 * doesn't see old kvmclock values while running with
5976 * the new frequency, otherwise we risk the guest sees
5977 * time go backwards.
5979 * In case we update the frequency for another cpu
5980 * (which might be in guest context) send an interrupt
5981 * to kick the cpu out of guest context. Next time
5982 * guest context is entered kvmclock will be updated,
5983 * so the guest will not see stale values.
5985 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5990 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5991 .notifier_call
= kvmclock_cpufreq_notifier
5994 static int kvmclock_cpu_online(unsigned int cpu
)
5996 tsc_khz_changed(NULL
);
6000 static void kvm_timer_init(void)
6002 max_tsc_khz
= tsc_khz
;
6004 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6005 #ifdef CONFIG_CPU_FREQ
6006 struct cpufreq_policy policy
;
6009 memset(&policy
, 0, sizeof(policy
));
6011 cpufreq_get_policy(&policy
, cpu
);
6012 if (policy
.cpuinfo
.max_freq
)
6013 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6016 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6017 CPUFREQ_TRANSITION_NOTIFIER
);
6019 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6021 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6022 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6025 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6027 int kvm_is_in_guest(void)
6029 return __this_cpu_read(current_vcpu
) != NULL
;
6032 static int kvm_is_user_mode(void)
6036 if (__this_cpu_read(current_vcpu
))
6037 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6039 return user_mode
!= 0;
6042 static unsigned long kvm_get_guest_ip(void)
6044 unsigned long ip
= 0;
6046 if (__this_cpu_read(current_vcpu
))
6047 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6052 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6053 .is_in_guest
= kvm_is_in_guest
,
6054 .is_user_mode
= kvm_is_user_mode
,
6055 .get_guest_ip
= kvm_get_guest_ip
,
6058 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6060 __this_cpu_write(current_vcpu
, vcpu
);
6062 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6064 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6066 __this_cpu_write(current_vcpu
, NULL
);
6068 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6070 static void kvm_set_mmio_spte_mask(void)
6073 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6076 * Set the reserved bits and the present bit of an paging-structure
6077 * entry to generate page fault with PFER.RSV = 1.
6079 /* Mask the reserved physical address bits. */
6080 mask
= rsvd_bits(maxphyaddr
, 51);
6082 /* Set the present bit. */
6085 #ifdef CONFIG_X86_64
6087 * If reserved bit is not supported, clear the present bit to disable
6090 if (maxphyaddr
== 52)
6094 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6097 #ifdef CONFIG_X86_64
6098 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6102 struct kvm_vcpu
*vcpu
;
6105 spin_lock(&kvm_lock
);
6106 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6107 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6108 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6109 atomic_set(&kvm_guest_has_master_clock
, 0);
6110 spin_unlock(&kvm_lock
);
6113 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6116 * Notification about pvclock gtod data update.
6118 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6121 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6122 struct timekeeper
*tk
= priv
;
6124 update_pvclock_gtod(tk
);
6126 /* disable master clock if host does not trust, or does not
6127 * use, TSC clocksource
6129 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6130 atomic_read(&kvm_guest_has_master_clock
) != 0)
6131 queue_work(system_long_wq
, &pvclock_gtod_work
);
6136 static struct notifier_block pvclock_gtod_notifier
= {
6137 .notifier_call
= pvclock_gtod_notify
,
6141 int kvm_arch_init(void *opaque
)
6144 struct kvm_x86_ops
*ops
= opaque
;
6147 printk(KERN_ERR
"kvm: already loaded the other module\n");
6152 if (!ops
->cpu_has_kvm_support()) {
6153 printk(KERN_ERR
"kvm: no hardware support\n");
6157 if (ops
->disabled_by_bios()) {
6158 printk(KERN_ERR
"kvm: disabled by bios\n");
6164 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6166 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6170 r
= kvm_mmu_module_init();
6172 goto out_free_percpu
;
6174 kvm_set_mmio_spte_mask();
6178 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6179 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6180 PT_PRESENT_MASK
, 0, sme_me_mask
);
6183 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6185 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6186 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6189 #ifdef CONFIG_X86_64
6190 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6196 free_percpu(shared_msrs
);
6201 void kvm_arch_exit(void)
6204 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6206 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6207 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6208 CPUFREQ_TRANSITION_NOTIFIER
);
6209 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6210 #ifdef CONFIG_X86_64
6211 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6214 kvm_mmu_module_exit();
6215 free_percpu(shared_msrs
);
6218 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6220 ++vcpu
->stat
.halt_exits
;
6221 if (lapic_in_kernel(vcpu
)) {
6222 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6225 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6229 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6231 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6233 int ret
= kvm_skip_emulated_instruction(vcpu
);
6235 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6236 * KVM_EXIT_DEBUG here.
6238 return kvm_vcpu_halt(vcpu
) && ret
;
6240 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6242 #ifdef CONFIG_X86_64
6243 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6244 unsigned long clock_type
)
6246 struct kvm_clock_pairing clock_pairing
;
6251 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6252 return -KVM_EOPNOTSUPP
;
6254 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6255 return -KVM_EOPNOTSUPP
;
6257 clock_pairing
.sec
= ts
.tv_sec
;
6258 clock_pairing
.nsec
= ts
.tv_nsec
;
6259 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6260 clock_pairing
.flags
= 0;
6263 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6264 sizeof(struct kvm_clock_pairing
)))
6272 * kvm_pv_kick_cpu_op: Kick a vcpu.
6274 * @apicid - apicid of vcpu to be kicked.
6276 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6278 struct kvm_lapic_irq lapic_irq
;
6280 lapic_irq
.shorthand
= 0;
6281 lapic_irq
.dest_mode
= 0;
6282 lapic_irq
.level
= 0;
6283 lapic_irq
.dest_id
= apicid
;
6284 lapic_irq
.msi_redir_hint
= false;
6286 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6287 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6290 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6292 vcpu
->arch
.apicv_active
= false;
6293 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6296 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6298 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6301 r
= kvm_skip_emulated_instruction(vcpu
);
6303 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6304 return kvm_hv_hypercall(vcpu
);
6306 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6307 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6308 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6309 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6310 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6312 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6314 op_64_bit
= is_64_bit_mode(vcpu
);
6323 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6329 case KVM_HC_VAPIC_POLL_IRQ
:
6332 case KVM_HC_KICK_CPU
:
6333 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6336 #ifdef CONFIG_X86_64
6337 case KVM_HC_CLOCK_PAIRING
:
6338 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6348 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6349 ++vcpu
->stat
.hypercalls
;
6352 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6354 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6356 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6357 char instruction
[3];
6358 unsigned long rip
= kvm_rip_read(vcpu
);
6360 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6362 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6366 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6368 return vcpu
->run
->request_interrupt_window
&&
6369 likely(!pic_in_kernel(vcpu
->kvm
));
6372 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6374 struct kvm_run
*kvm_run
= vcpu
->run
;
6376 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6377 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6378 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6379 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6380 kvm_run
->ready_for_interrupt_injection
=
6381 pic_in_kernel(vcpu
->kvm
) ||
6382 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6385 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6389 if (!kvm_x86_ops
->update_cr8_intercept
)
6392 if (!lapic_in_kernel(vcpu
))
6395 if (vcpu
->arch
.apicv_active
)
6398 if (!vcpu
->arch
.apic
->vapic_addr
)
6399 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6406 tpr
= kvm_lapic_get_cr8(vcpu
);
6408 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6411 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6415 /* try to reinject previous events if any */
6416 if (vcpu
->arch
.exception
.injected
) {
6417 kvm_x86_ops
->queue_exception(vcpu
);
6422 * Exceptions must be injected immediately, or the exception
6423 * frame will have the address of the NMI or interrupt handler.
6425 if (!vcpu
->arch
.exception
.pending
) {
6426 if (vcpu
->arch
.nmi_injected
) {
6427 kvm_x86_ops
->set_nmi(vcpu
);
6431 if (vcpu
->arch
.interrupt
.pending
) {
6432 kvm_x86_ops
->set_irq(vcpu
);
6437 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6438 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6443 /* try to inject new event if pending */
6444 if (vcpu
->arch
.exception
.pending
) {
6445 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6446 vcpu
->arch
.exception
.has_error_code
,
6447 vcpu
->arch
.exception
.error_code
);
6449 vcpu
->arch
.exception
.pending
= false;
6450 vcpu
->arch
.exception
.injected
= true;
6452 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6453 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6456 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6457 (vcpu
->arch
.dr7
& DR7_GD
)) {
6458 vcpu
->arch
.dr7
&= ~DR7_GD
;
6459 kvm_update_dr7(vcpu
);
6462 kvm_x86_ops
->queue_exception(vcpu
);
6463 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) && kvm_x86_ops
->smi_allowed(vcpu
)) {
6464 vcpu
->arch
.smi_pending
= false;
6466 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6467 --vcpu
->arch
.nmi_pending
;
6468 vcpu
->arch
.nmi_injected
= true;
6469 kvm_x86_ops
->set_nmi(vcpu
);
6470 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6472 * Because interrupts can be injected asynchronously, we are
6473 * calling check_nested_events again here to avoid a race condition.
6474 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6475 * proposal and current concerns. Perhaps we should be setting
6476 * KVM_REQ_EVENT only on certain events and not unconditionally?
6478 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6479 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6483 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6484 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6486 kvm_x86_ops
->set_irq(vcpu
);
6493 static void process_nmi(struct kvm_vcpu
*vcpu
)
6498 * x86 is limited to one NMI running, and one NMI pending after it.
6499 * If an NMI is already in progress, limit further NMIs to just one.
6500 * Otherwise, allow two (and we'll inject the first one immediately).
6502 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6505 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6506 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6507 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6510 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6513 flags
|= seg
->g
<< 23;
6514 flags
|= seg
->db
<< 22;
6515 flags
|= seg
->l
<< 21;
6516 flags
|= seg
->avl
<< 20;
6517 flags
|= seg
->present
<< 15;
6518 flags
|= seg
->dpl
<< 13;
6519 flags
|= seg
->s
<< 12;
6520 flags
|= seg
->type
<< 8;
6524 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6526 struct kvm_segment seg
;
6529 kvm_get_segment(vcpu
, &seg
, n
);
6530 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6533 offset
= 0x7f84 + n
* 12;
6535 offset
= 0x7f2c + (n
- 3) * 12;
6537 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6538 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6539 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6542 #ifdef CONFIG_X86_64
6543 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6545 struct kvm_segment seg
;
6549 kvm_get_segment(vcpu
, &seg
, n
);
6550 offset
= 0x7e00 + n
* 16;
6552 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6553 put_smstate(u16
, buf
, offset
, seg
.selector
);
6554 put_smstate(u16
, buf
, offset
+ 2, flags
);
6555 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6556 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6560 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6563 struct kvm_segment seg
;
6567 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6568 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6569 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6570 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6572 for (i
= 0; i
< 8; i
++)
6573 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6575 kvm_get_dr(vcpu
, 6, &val
);
6576 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6577 kvm_get_dr(vcpu
, 7, &val
);
6578 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6580 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6581 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6582 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6583 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6584 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6586 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6587 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6588 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6589 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6590 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6592 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6593 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6594 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6596 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6597 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6598 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6600 for (i
= 0; i
< 6; i
++)
6601 enter_smm_save_seg_32(vcpu
, buf
, i
);
6603 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6606 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6607 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6610 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6612 #ifdef CONFIG_X86_64
6614 struct kvm_segment seg
;
6618 for (i
= 0; i
< 16; i
++)
6619 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6621 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6622 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6624 kvm_get_dr(vcpu
, 6, &val
);
6625 put_smstate(u64
, buf
, 0x7f68, val
);
6626 kvm_get_dr(vcpu
, 7, &val
);
6627 put_smstate(u64
, buf
, 0x7f60, val
);
6629 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6630 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6631 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6633 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6636 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6638 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6640 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6641 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6642 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6643 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6644 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6646 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6647 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6648 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6650 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6651 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6652 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6653 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6654 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6656 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6657 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6658 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6660 for (i
= 0; i
< 6; i
++)
6661 enter_smm_save_seg_64(vcpu
, buf
, i
);
6667 static void enter_smm(struct kvm_vcpu
*vcpu
)
6669 struct kvm_segment cs
, ds
;
6674 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6675 memset(buf
, 0, 512);
6676 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6677 enter_smm_save_state_64(vcpu
, buf
);
6679 enter_smm_save_state_32(vcpu
, buf
);
6682 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6683 * vCPU state (e.g. leave guest mode) after we've saved the state into
6684 * the SMM state-save area.
6686 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
6688 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6689 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6691 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6692 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6694 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6696 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6697 kvm_rip_write(vcpu
, 0x8000);
6699 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6700 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6701 vcpu
->arch
.cr0
= cr0
;
6703 kvm_x86_ops
->set_cr4(vcpu
, 0);
6705 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6706 dt
.address
= dt
.size
= 0;
6707 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6709 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6711 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6712 cs
.base
= vcpu
->arch
.smbase
;
6717 cs
.limit
= ds
.limit
= 0xffffffff;
6718 cs
.type
= ds
.type
= 0x3;
6719 cs
.dpl
= ds
.dpl
= 0;
6724 cs
.avl
= ds
.avl
= 0;
6725 cs
.present
= ds
.present
= 1;
6726 cs
.unusable
= ds
.unusable
= 0;
6727 cs
.padding
= ds
.padding
= 0;
6729 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6730 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6731 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6732 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6733 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6734 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6736 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6737 kvm_x86_ops
->set_efer(vcpu
, 0);
6739 kvm_update_cpuid(vcpu
);
6740 kvm_mmu_reset_context(vcpu
);
6743 static void process_smi(struct kvm_vcpu
*vcpu
)
6745 vcpu
->arch
.smi_pending
= true;
6746 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6749 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6751 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6754 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6756 u64 eoi_exit_bitmap
[4];
6758 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6761 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6763 if (irqchip_split(vcpu
->kvm
))
6764 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6766 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6767 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6768 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6770 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6771 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6772 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6775 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6777 ++vcpu
->stat
.tlb_flush
;
6778 kvm_x86_ops
->tlb_flush(vcpu
);
6781 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6783 struct page
*page
= NULL
;
6785 if (!lapic_in_kernel(vcpu
))
6788 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6791 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6792 if (is_error_page(page
))
6794 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6797 * Do not pin apic access page in memory, the MMU notifier
6798 * will call us again if it is migrated or swapped out.
6802 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6805 * Returns 1 to let vcpu_run() continue the guest execution loop without
6806 * exiting to the userspace. Otherwise, the value will be returned to the
6809 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6813 dm_request_for_irq_injection(vcpu
) &&
6814 kvm_cpu_accept_dm_intr(vcpu
);
6816 bool req_immediate_exit
= false;
6818 if (kvm_request_pending(vcpu
)) {
6819 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6820 kvm_mmu_unload(vcpu
);
6821 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6822 __kvm_migrate_timers(vcpu
);
6823 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6824 kvm_gen_update_masterclock(vcpu
->kvm
);
6825 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6826 kvm_gen_kvmclock_update(vcpu
);
6827 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6828 r
= kvm_guest_time_update(vcpu
);
6832 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6833 kvm_mmu_sync_roots(vcpu
);
6834 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6835 kvm_vcpu_flush_tlb(vcpu
);
6836 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6837 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6841 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6842 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6843 vcpu
->mmio_needed
= 0;
6847 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6848 /* Page is swapped out. Do synthetic halt */
6849 vcpu
->arch
.apf
.halted
= true;
6853 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6854 record_steal_time(vcpu
);
6855 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6857 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6859 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6860 kvm_pmu_handle_event(vcpu
);
6861 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6862 kvm_pmu_deliver_pmi(vcpu
);
6863 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6864 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6865 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6866 vcpu
->arch
.ioapic_handled_vectors
)) {
6867 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6868 vcpu
->run
->eoi
.vector
=
6869 vcpu
->arch
.pending_ioapic_eoi
;
6874 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6875 vcpu_scan_ioapic(vcpu
);
6876 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6877 kvm_vcpu_reload_apic_access_page(vcpu
);
6878 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6879 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6880 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6884 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6885 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6886 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6890 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6891 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6892 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6898 * KVM_REQ_HV_STIMER has to be processed after
6899 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6900 * depend on the guest clock being up-to-date
6902 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6903 kvm_hv_process_stimers(vcpu
);
6906 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6907 ++vcpu
->stat
.req_event
;
6908 kvm_apic_accept_events(vcpu
);
6909 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6914 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6915 req_immediate_exit
= true;
6917 /* Enable SMI/NMI/IRQ window open exits if needed.
6919 * SMIs have three cases:
6920 * 1) They can be nested, and then there is nothing to
6921 * do here because RSM will cause a vmexit anyway.
6922 * 2) There is an ISA-specific reason why SMI cannot be
6923 * injected, and the moment when this changes can be
6925 * 3) Or the SMI can be pending because
6926 * inject_pending_event has completed the injection
6927 * of an IRQ or NMI from the previous vmexit, and
6928 * then we request an immediate exit to inject the
6931 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6932 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
6933 req_immediate_exit
= true;
6934 if (vcpu
->arch
.nmi_pending
)
6935 kvm_x86_ops
->enable_nmi_window(vcpu
);
6936 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6937 kvm_x86_ops
->enable_irq_window(vcpu
);
6938 WARN_ON(vcpu
->arch
.exception
.pending
);
6941 if (kvm_lapic_enabled(vcpu
)) {
6942 update_cr8_intercept(vcpu
);
6943 kvm_lapic_sync_to_vapic(vcpu
);
6947 r
= kvm_mmu_reload(vcpu
);
6949 goto cancel_injection
;
6954 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6955 kvm_load_guest_fpu(vcpu
);
6958 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6959 * IPI are then delayed after guest entry, which ensures that they
6960 * result in virtual interrupt delivery.
6962 local_irq_disable();
6963 vcpu
->mode
= IN_GUEST_MODE
;
6965 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6968 * 1) We should set ->mode before checking ->requests. Please see
6969 * the comment in kvm_vcpu_exiting_guest_mode().
6971 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6972 * pairs with the memory barrier implicit in pi_test_and_set_on
6973 * (see vmx_deliver_posted_interrupt).
6975 * 3) This also orders the write to mode from any reads to the page
6976 * tables done while the VCPU is running. Please see the comment
6977 * in kvm_flush_remote_tlbs.
6979 smp_mb__after_srcu_read_unlock();
6982 * This handles the case where a posted interrupt was
6983 * notified with kvm_vcpu_kick.
6985 if (kvm_lapic_enabled(vcpu
)) {
6986 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6987 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6990 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
6991 || need_resched() || signal_pending(current
)) {
6992 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6996 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6998 goto cancel_injection
;
7001 kvm_load_guest_xcr0(vcpu
);
7003 if (req_immediate_exit
) {
7004 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7005 smp_send_reschedule(vcpu
->cpu
);
7008 trace_kvm_entry(vcpu
->vcpu_id
);
7009 wait_lapic_expire(vcpu
);
7010 guest_enter_irqoff();
7012 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7014 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7015 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7016 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7017 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7018 set_debugreg(vcpu
->arch
.dr6
, 6);
7019 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7022 kvm_x86_ops
->run(vcpu
);
7025 * Do this here before restoring debug registers on the host. And
7026 * since we do this before handling the vmexit, a DR access vmexit
7027 * can (a) read the correct value of the debug registers, (b) set
7028 * KVM_DEBUGREG_WONT_EXIT again.
7030 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7031 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7032 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7033 kvm_update_dr0123(vcpu
);
7034 kvm_update_dr6(vcpu
);
7035 kvm_update_dr7(vcpu
);
7036 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7040 * If the guest has used debug registers, at least dr7
7041 * will be disabled while returning to the host.
7042 * If we don't have active breakpoints in the host, we don't
7043 * care about the messed up debug address registers. But if
7044 * we have some of them active, restore the old state.
7046 if (hw_breakpoint_active())
7047 hw_breakpoint_restore();
7049 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7051 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7054 kvm_put_guest_xcr0(vcpu
);
7056 kvm_x86_ops
->handle_external_intr(vcpu
);
7060 guest_exit_irqoff();
7065 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7068 * Profile KVM exit RIPs:
7070 if (unlikely(prof_on
== KVM_PROFILING
)) {
7071 unsigned long rip
= kvm_rip_read(vcpu
);
7072 profile_hit(KVM_PROFILING
, (void *)rip
);
7075 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7076 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7078 if (vcpu
->arch
.apic_attention
)
7079 kvm_lapic_sync_from_vapic(vcpu
);
7081 vcpu
->arch
.gpa_available
= false;
7082 r
= kvm_x86_ops
->handle_exit(vcpu
);
7086 kvm_x86_ops
->cancel_injection(vcpu
);
7087 if (unlikely(vcpu
->arch
.apic_attention
))
7088 kvm_lapic_sync_from_vapic(vcpu
);
7093 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7095 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7096 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7097 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7098 kvm_vcpu_block(vcpu
);
7099 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7101 if (kvm_x86_ops
->post_block
)
7102 kvm_x86_ops
->post_block(vcpu
);
7104 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7108 kvm_apic_accept_events(vcpu
);
7109 switch(vcpu
->arch
.mp_state
) {
7110 case KVM_MP_STATE_HALTED
:
7111 vcpu
->arch
.pv
.pv_unhalted
= false;
7112 vcpu
->arch
.mp_state
=
7113 KVM_MP_STATE_RUNNABLE
;
7114 case KVM_MP_STATE_RUNNABLE
:
7115 vcpu
->arch
.apf
.halted
= false;
7117 case KVM_MP_STATE_INIT_RECEIVED
:
7126 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7128 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7129 kvm_x86_ops
->check_nested_events(vcpu
, false);
7131 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7132 !vcpu
->arch
.apf
.halted
);
7135 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7138 struct kvm
*kvm
= vcpu
->kvm
;
7140 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7143 if (kvm_vcpu_running(vcpu
)) {
7144 r
= vcpu_enter_guest(vcpu
);
7146 r
= vcpu_block(kvm
, vcpu
);
7152 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7153 if (kvm_cpu_has_pending_timer(vcpu
))
7154 kvm_inject_pending_timer_irqs(vcpu
);
7156 if (dm_request_for_irq_injection(vcpu
) &&
7157 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7159 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7160 ++vcpu
->stat
.request_irq_exits
;
7164 kvm_check_async_pf_completion(vcpu
);
7166 if (signal_pending(current
)) {
7168 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7169 ++vcpu
->stat
.signal_exits
;
7172 if (need_resched()) {
7173 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7175 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7179 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7184 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7187 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7188 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7189 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7190 if (r
!= EMULATE_DONE
)
7195 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7197 BUG_ON(!vcpu
->arch
.pio
.count
);
7199 return complete_emulated_io(vcpu
);
7203 * Implements the following, as a state machine:
7207 * for each mmio piece in the fragment
7215 * for each mmio piece in the fragment
7220 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7222 struct kvm_run
*run
= vcpu
->run
;
7223 struct kvm_mmio_fragment
*frag
;
7226 BUG_ON(!vcpu
->mmio_needed
);
7228 /* Complete previous fragment */
7229 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7230 len
= min(8u, frag
->len
);
7231 if (!vcpu
->mmio_is_write
)
7232 memcpy(frag
->data
, run
->mmio
.data
, len
);
7234 if (frag
->len
<= 8) {
7235 /* Switch to the next fragment. */
7237 vcpu
->mmio_cur_fragment
++;
7239 /* Go forward to the next mmio piece. */
7245 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7246 vcpu
->mmio_needed
= 0;
7248 /* FIXME: return into emulator if single-stepping. */
7249 if (vcpu
->mmio_is_write
)
7251 vcpu
->mmio_read_completed
= 1;
7252 return complete_emulated_io(vcpu
);
7255 run
->exit_reason
= KVM_EXIT_MMIO
;
7256 run
->mmio
.phys_addr
= frag
->gpa
;
7257 if (vcpu
->mmio_is_write
)
7258 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7259 run
->mmio
.len
= min(8u, frag
->len
);
7260 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7261 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7266 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7268 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7271 fpu__initialize(fpu
);
7273 kvm_sigset_activate(vcpu
);
7275 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7276 if (kvm_run
->immediate_exit
) {
7280 kvm_vcpu_block(vcpu
);
7281 kvm_apic_accept_events(vcpu
);
7282 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7284 if (signal_pending(current
)) {
7286 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7287 ++vcpu
->stat
.signal_exits
;
7292 /* re-sync apic's tpr */
7293 if (!lapic_in_kernel(vcpu
)) {
7294 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7300 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7301 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7302 vcpu
->arch
.complete_userspace_io
= NULL
;
7307 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7309 if (kvm_run
->immediate_exit
)
7315 post_kvm_run_save(vcpu
);
7316 kvm_sigset_deactivate(vcpu
);
7321 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7323 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7325 * We are here if userspace calls get_regs() in the middle of
7326 * instruction emulation. Registers state needs to be copied
7327 * back from emulation context to vcpu. Userspace shouldn't do
7328 * that usually, but some bad designed PV devices (vmware
7329 * backdoor interface) need this to work
7331 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7332 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7334 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7335 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7336 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7337 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7338 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7339 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7340 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7341 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7342 #ifdef CONFIG_X86_64
7343 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7344 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7345 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7346 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7347 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7348 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7349 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7350 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7353 regs
->rip
= kvm_rip_read(vcpu
);
7354 regs
->rflags
= kvm_get_rflags(vcpu
);
7359 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7361 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7362 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7364 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7365 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7366 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7367 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7368 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7369 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7370 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7371 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7372 #ifdef CONFIG_X86_64
7373 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7374 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7375 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7376 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7377 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7378 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7379 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7380 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7383 kvm_rip_write(vcpu
, regs
->rip
);
7384 kvm_set_rflags(vcpu
, regs
->rflags
);
7386 vcpu
->arch
.exception
.pending
= false;
7388 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7393 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7395 struct kvm_segment cs
;
7397 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7401 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7403 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7404 struct kvm_sregs
*sregs
)
7408 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7409 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7410 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7411 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7412 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7413 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7415 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7416 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7418 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7419 sregs
->idt
.limit
= dt
.size
;
7420 sregs
->idt
.base
= dt
.address
;
7421 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7422 sregs
->gdt
.limit
= dt
.size
;
7423 sregs
->gdt
.base
= dt
.address
;
7425 sregs
->cr0
= kvm_read_cr0(vcpu
);
7426 sregs
->cr2
= vcpu
->arch
.cr2
;
7427 sregs
->cr3
= kvm_read_cr3(vcpu
);
7428 sregs
->cr4
= kvm_read_cr4(vcpu
);
7429 sregs
->cr8
= kvm_get_cr8(vcpu
);
7430 sregs
->efer
= vcpu
->arch
.efer
;
7431 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7433 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7435 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7436 set_bit(vcpu
->arch
.interrupt
.nr
,
7437 (unsigned long *)sregs
->interrupt_bitmap
);
7442 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7443 struct kvm_mp_state
*mp_state
)
7445 kvm_apic_accept_events(vcpu
);
7446 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7447 vcpu
->arch
.pv
.pv_unhalted
)
7448 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7450 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7455 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7456 struct kvm_mp_state
*mp_state
)
7458 if (!lapic_in_kernel(vcpu
) &&
7459 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7462 /* INITs are latched while in SMM */
7463 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7464 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7465 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7468 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7469 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7470 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7472 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7473 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7477 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7478 int reason
, bool has_error_code
, u32 error_code
)
7480 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7483 init_emulate_ctxt(vcpu
);
7485 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7486 has_error_code
, error_code
);
7489 return EMULATE_FAIL
;
7491 kvm_rip_write(vcpu
, ctxt
->eip
);
7492 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7493 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7494 return EMULATE_DONE
;
7496 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7498 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7499 struct kvm_sregs
*sregs
)
7501 struct msr_data apic_base_msr
;
7502 int mmu_reset_needed
= 0;
7503 int pending_vec
, max_bits
, idx
;
7506 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7507 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7510 apic_base_msr
.data
= sregs
->apic_base
;
7511 apic_base_msr
.host_initiated
= true;
7512 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7515 dt
.size
= sregs
->idt
.limit
;
7516 dt
.address
= sregs
->idt
.base
;
7517 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7518 dt
.size
= sregs
->gdt
.limit
;
7519 dt
.address
= sregs
->gdt
.base
;
7520 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7522 vcpu
->arch
.cr2
= sregs
->cr2
;
7523 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7524 vcpu
->arch
.cr3
= sregs
->cr3
;
7525 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7527 kvm_set_cr8(vcpu
, sregs
->cr8
);
7529 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7530 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7532 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7533 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7534 vcpu
->arch
.cr0
= sregs
->cr0
;
7536 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7537 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7538 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7539 kvm_update_cpuid(vcpu
);
7541 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7542 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7543 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7544 mmu_reset_needed
= 1;
7546 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7548 if (mmu_reset_needed
)
7549 kvm_mmu_reset_context(vcpu
);
7551 max_bits
= KVM_NR_INTERRUPTS
;
7552 pending_vec
= find_first_bit(
7553 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7554 if (pending_vec
< max_bits
) {
7555 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7556 pr_debug("Set back pending irq %d\n", pending_vec
);
7559 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7560 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7561 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7562 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7563 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7564 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7566 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7567 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7569 update_cr8_intercept(vcpu
);
7571 /* Older userspace won't unhalt the vcpu on reset. */
7572 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7573 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7575 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7577 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7582 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7583 struct kvm_guest_debug
*dbg
)
7585 unsigned long rflags
;
7588 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7590 if (vcpu
->arch
.exception
.pending
)
7592 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7593 kvm_queue_exception(vcpu
, DB_VECTOR
);
7595 kvm_queue_exception(vcpu
, BP_VECTOR
);
7599 * Read rflags as long as potentially injected trace flags are still
7602 rflags
= kvm_get_rflags(vcpu
);
7604 vcpu
->guest_debug
= dbg
->control
;
7605 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7606 vcpu
->guest_debug
= 0;
7608 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7609 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7610 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7611 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7613 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7614 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7616 kvm_update_dr7(vcpu
);
7618 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7619 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7620 get_segment_base(vcpu
, VCPU_SREG_CS
);
7623 * Trigger an rflags update that will inject or remove the trace
7626 kvm_set_rflags(vcpu
, rflags
);
7628 kvm_x86_ops
->update_bp_intercept(vcpu
);
7638 * Translate a guest virtual address to a guest physical address.
7640 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7641 struct kvm_translation
*tr
)
7643 unsigned long vaddr
= tr
->linear_address
;
7647 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7648 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7649 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7650 tr
->physical_address
= gpa
;
7651 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7658 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7660 struct fxregs_state
*fxsave
=
7661 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7663 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7664 fpu
->fcw
= fxsave
->cwd
;
7665 fpu
->fsw
= fxsave
->swd
;
7666 fpu
->ftwx
= fxsave
->twd
;
7667 fpu
->last_opcode
= fxsave
->fop
;
7668 fpu
->last_ip
= fxsave
->rip
;
7669 fpu
->last_dp
= fxsave
->rdp
;
7670 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7675 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7677 struct fxregs_state
*fxsave
=
7678 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7680 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7681 fxsave
->cwd
= fpu
->fcw
;
7682 fxsave
->swd
= fpu
->fsw
;
7683 fxsave
->twd
= fpu
->ftwx
;
7684 fxsave
->fop
= fpu
->last_opcode
;
7685 fxsave
->rip
= fpu
->last_ip
;
7686 fxsave
->rdp
= fpu
->last_dp
;
7687 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7692 static void fx_init(struct kvm_vcpu
*vcpu
)
7694 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7695 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7696 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7697 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7700 * Ensure guest xcr0 is valid for loading
7702 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7704 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7707 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7709 if (vcpu
->guest_fpu_loaded
)
7713 * Restore all possible states in the guest,
7714 * and assume host would use all available bits.
7715 * Guest xcr0 would be loaded later.
7717 vcpu
->guest_fpu_loaded
= 1;
7718 __kernel_fpu_begin();
7719 /* PKRU is separately restored in kvm_x86_ops->run. */
7720 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7721 ~XFEATURE_MASK_PKRU
);
7725 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7727 if (!vcpu
->guest_fpu_loaded
)
7730 vcpu
->guest_fpu_loaded
= 0;
7731 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7733 ++vcpu
->stat
.fpu_reload
;
7737 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7739 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7741 kvmclock_reset(vcpu
);
7743 kvm_x86_ops
->vcpu_free(vcpu
);
7744 free_cpumask_var(wbinvd_dirty_mask
);
7747 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7750 struct kvm_vcpu
*vcpu
;
7752 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7753 printk_once(KERN_WARNING
7754 "kvm: SMP vm created on host with unstable TSC; "
7755 "guest TSC will not be reliable\n");
7757 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7762 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7766 kvm_vcpu_mtrr_init(vcpu
);
7767 r
= vcpu_load(vcpu
);
7770 kvm_vcpu_reset(vcpu
, false);
7771 kvm_mmu_setup(vcpu
);
7776 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7778 struct msr_data msr
;
7779 struct kvm
*kvm
= vcpu
->kvm
;
7781 kvm_hv_vcpu_postcreate(vcpu
);
7783 if (vcpu_load(vcpu
))
7786 msr
.index
= MSR_IA32_TSC
;
7787 msr
.host_initiated
= true;
7788 kvm_write_tsc(vcpu
, &msr
);
7791 if (!kvmclock_periodic_sync
)
7794 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7795 KVMCLOCK_SYNC_PERIOD
);
7798 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7801 vcpu
->arch
.apf
.msr_val
= 0;
7803 r
= vcpu_load(vcpu
);
7805 kvm_mmu_unload(vcpu
);
7808 kvm_x86_ops
->vcpu_free(vcpu
);
7811 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7813 vcpu
->arch
.hflags
= 0;
7815 vcpu
->arch
.smi_pending
= 0;
7816 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7817 vcpu
->arch
.nmi_pending
= 0;
7818 vcpu
->arch
.nmi_injected
= false;
7819 kvm_clear_interrupt_queue(vcpu
);
7820 kvm_clear_exception_queue(vcpu
);
7821 vcpu
->arch
.exception
.pending
= false;
7823 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7824 kvm_update_dr0123(vcpu
);
7825 vcpu
->arch
.dr6
= DR6_INIT
;
7826 kvm_update_dr6(vcpu
);
7827 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7828 kvm_update_dr7(vcpu
);
7832 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7833 vcpu
->arch
.apf
.msr_val
= 0;
7834 vcpu
->arch
.st
.msr_val
= 0;
7836 kvmclock_reset(vcpu
);
7838 kvm_clear_async_pf_completion_queue(vcpu
);
7839 kvm_async_pf_hash_reset(vcpu
);
7840 vcpu
->arch
.apf
.halted
= false;
7842 if (kvm_mpx_supported()) {
7843 void *mpx_state_buffer
;
7846 * To avoid have the INIT path from kvm_apic_has_events() that be
7847 * called with loaded FPU and does not let userspace fix the state.
7849 kvm_put_guest_fpu(vcpu
);
7850 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
7851 XFEATURE_MASK_BNDREGS
);
7852 if (mpx_state_buffer
)
7853 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
7854 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
7855 XFEATURE_MASK_BNDCSR
);
7856 if (mpx_state_buffer
)
7857 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
7861 kvm_pmu_reset(vcpu
);
7862 vcpu
->arch
.smbase
= 0x30000;
7864 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7865 vcpu
->arch
.msr_misc_features_enables
= 0;
7867 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7870 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7871 vcpu
->arch
.regs_avail
= ~0;
7872 vcpu
->arch
.regs_dirty
= ~0;
7874 vcpu
->arch
.ia32_xss
= 0;
7876 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7879 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7881 struct kvm_segment cs
;
7883 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7884 cs
.selector
= vector
<< 8;
7885 cs
.base
= vector
<< 12;
7886 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7887 kvm_rip_write(vcpu
, 0);
7890 int kvm_arch_hardware_enable(void)
7893 struct kvm_vcpu
*vcpu
;
7898 bool stable
, backwards_tsc
= false;
7900 kvm_shared_msr_cpu_online();
7901 ret
= kvm_x86_ops
->hardware_enable();
7905 local_tsc
= rdtsc();
7906 stable
= !check_tsc_unstable();
7907 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7908 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7909 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7910 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7911 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7912 backwards_tsc
= true;
7913 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7914 max_tsc
= vcpu
->arch
.last_host_tsc
;
7920 * Sometimes, even reliable TSCs go backwards. This happens on
7921 * platforms that reset TSC during suspend or hibernate actions, but
7922 * maintain synchronization. We must compensate. Fortunately, we can
7923 * detect that condition here, which happens early in CPU bringup,
7924 * before any KVM threads can be running. Unfortunately, we can't
7925 * bring the TSCs fully up to date with real time, as we aren't yet far
7926 * enough into CPU bringup that we know how much real time has actually
7927 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7928 * variables that haven't been updated yet.
7930 * So we simply find the maximum observed TSC above, then record the
7931 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7932 * the adjustment will be applied. Note that we accumulate
7933 * adjustments, in case multiple suspend cycles happen before some VCPU
7934 * gets a chance to run again. In the event that no KVM threads get a
7935 * chance to run, we will miss the entire elapsed period, as we'll have
7936 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7937 * loose cycle time. This isn't too big a deal, since the loss will be
7938 * uniform across all VCPUs (not to mention the scenario is extremely
7939 * unlikely). It is possible that a second hibernate recovery happens
7940 * much faster than a first, causing the observed TSC here to be
7941 * smaller; this would require additional padding adjustment, which is
7942 * why we set last_host_tsc to the local tsc observed here.
7944 * N.B. - this code below runs only on platforms with reliable TSC,
7945 * as that is the only way backwards_tsc is set above. Also note
7946 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7947 * have the same delta_cyc adjustment applied if backwards_tsc
7948 * is detected. Note further, this adjustment is only done once,
7949 * as we reset last_host_tsc on all VCPUs to stop this from being
7950 * called multiple times (one for each physical CPU bringup).
7952 * Platforms with unreliable TSCs don't have to deal with this, they
7953 * will be compensated by the logic in vcpu_load, which sets the TSC to
7954 * catchup mode. This will catchup all VCPUs to real time, but cannot
7955 * guarantee that they stay in perfect synchronization.
7957 if (backwards_tsc
) {
7958 u64 delta_cyc
= max_tsc
- local_tsc
;
7959 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7960 kvm
->arch
.backwards_tsc_observed
= true;
7961 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7962 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7963 vcpu
->arch
.last_host_tsc
= local_tsc
;
7964 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7968 * We have to disable TSC offset matching.. if you were
7969 * booting a VM while issuing an S4 host suspend....
7970 * you may have some problem. Solving this issue is
7971 * left as an exercise to the reader.
7973 kvm
->arch
.last_tsc_nsec
= 0;
7974 kvm
->arch
.last_tsc_write
= 0;
7981 void kvm_arch_hardware_disable(void)
7983 kvm_x86_ops
->hardware_disable();
7984 drop_user_return_notifiers();
7987 int kvm_arch_hardware_setup(void)
7991 r
= kvm_x86_ops
->hardware_setup();
7995 if (kvm_has_tsc_control
) {
7997 * Make sure the user can only configure tsc_khz values that
7998 * fit into a signed integer.
7999 * A min value is not calculated needed because it will always
8000 * be 1 on all machines.
8002 u64 max
= min(0x7fffffffULL
,
8003 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8004 kvm_max_guest_tsc_khz
= max
;
8006 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8009 kvm_init_msr_list();
8013 void kvm_arch_hardware_unsetup(void)
8015 kvm_x86_ops
->hardware_unsetup();
8018 void kvm_arch_check_processor_compat(void *rtn
)
8020 kvm_x86_ops
->check_processor_compatibility(rtn
);
8023 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8025 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8027 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8029 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8031 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8034 struct static_key kvm_no_apic_vcpu __read_mostly
;
8035 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8037 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8042 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8043 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8044 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8045 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8047 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8049 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8054 vcpu
->arch
.pio_data
= page_address(page
);
8056 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8058 r
= kvm_mmu_create(vcpu
);
8060 goto fail_free_pio_data
;
8062 if (irqchip_in_kernel(vcpu
->kvm
)) {
8063 r
= kvm_create_lapic(vcpu
);
8065 goto fail_mmu_destroy
;
8067 static_key_slow_inc(&kvm_no_apic_vcpu
);
8069 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8071 if (!vcpu
->arch
.mce_banks
) {
8073 goto fail_free_lapic
;
8075 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8077 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8079 goto fail_free_mce_banks
;
8084 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8086 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8088 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8090 kvm_async_pf_hash_reset(vcpu
);
8093 vcpu
->arch
.pending_external_vector
= -1;
8094 vcpu
->arch
.preempted_in_kernel
= false;
8096 kvm_hv_vcpu_init(vcpu
);
8100 fail_free_mce_banks
:
8101 kfree(vcpu
->arch
.mce_banks
);
8103 kvm_free_lapic(vcpu
);
8105 kvm_mmu_destroy(vcpu
);
8107 free_page((unsigned long)vcpu
->arch
.pio_data
);
8112 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8116 kvm_hv_vcpu_uninit(vcpu
);
8117 kvm_pmu_destroy(vcpu
);
8118 kfree(vcpu
->arch
.mce_banks
);
8119 kvm_free_lapic(vcpu
);
8120 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8121 kvm_mmu_destroy(vcpu
);
8122 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8123 free_page((unsigned long)vcpu
->arch
.pio_data
);
8124 if (!lapic_in_kernel(vcpu
))
8125 static_key_slow_dec(&kvm_no_apic_vcpu
);
8128 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8130 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8133 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8138 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8139 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8140 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8141 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8142 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8144 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8145 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8146 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8147 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8148 &kvm
->arch
.irq_sources_bitmap
);
8150 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8151 mutex_init(&kvm
->arch
.apic_map_lock
);
8152 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8153 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8155 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8156 pvclock_update_vm_gtod_copy(kvm
);
8158 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8159 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8161 kvm_page_track_init(kvm
);
8162 kvm_mmu_init_vm(kvm
);
8164 if (kvm_x86_ops
->vm_init
)
8165 return kvm_x86_ops
->vm_init(kvm
);
8170 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8173 r
= vcpu_load(vcpu
);
8175 kvm_mmu_unload(vcpu
);
8179 static void kvm_free_vcpus(struct kvm
*kvm
)
8182 struct kvm_vcpu
*vcpu
;
8185 * Unpin any mmu pages first.
8187 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8188 kvm_clear_async_pf_completion_queue(vcpu
);
8189 kvm_unload_vcpu_mmu(vcpu
);
8191 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8192 kvm_arch_vcpu_free(vcpu
);
8194 mutex_lock(&kvm
->lock
);
8195 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8196 kvm
->vcpus
[i
] = NULL
;
8198 atomic_set(&kvm
->online_vcpus
, 0);
8199 mutex_unlock(&kvm
->lock
);
8202 void kvm_arch_sync_events(struct kvm
*kvm
)
8204 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8205 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8209 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8213 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8214 struct kvm_memory_slot
*slot
, old
;
8216 /* Called with kvm->slots_lock held. */
8217 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8220 slot
= id_to_memslot(slots
, id
);
8226 * MAP_SHARED to prevent internal slot pages from being moved
8229 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8230 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8231 if (IS_ERR((void *)hva
))
8232 return PTR_ERR((void *)hva
);
8241 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8242 struct kvm_userspace_memory_region m
;
8244 m
.slot
= id
| (i
<< 16);
8246 m
.guest_phys_addr
= gpa
;
8247 m
.userspace_addr
= hva
;
8248 m
.memory_size
= size
;
8249 r
= __kvm_set_memory_region(kvm
, &m
);
8255 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8261 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8263 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8267 mutex_lock(&kvm
->slots_lock
);
8268 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8269 mutex_unlock(&kvm
->slots_lock
);
8273 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8275 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8277 if (current
->mm
== kvm
->mm
) {
8279 * Free memory regions allocated on behalf of userspace,
8280 * unless the the memory map has changed due to process exit
8283 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8284 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8285 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8287 if (kvm_x86_ops
->vm_destroy
)
8288 kvm_x86_ops
->vm_destroy(kvm
);
8289 kvm_pic_destroy(kvm
);
8290 kvm_ioapic_destroy(kvm
);
8291 kvm_free_vcpus(kvm
);
8292 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8293 kvm_mmu_uninit_vm(kvm
);
8294 kvm_page_track_cleanup(kvm
);
8297 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8298 struct kvm_memory_slot
*dont
)
8302 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8303 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8304 kvfree(free
->arch
.rmap
[i
]);
8305 free
->arch
.rmap
[i
] = NULL
;
8310 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8311 dont
->arch
.lpage_info
[i
- 1]) {
8312 kvfree(free
->arch
.lpage_info
[i
- 1]);
8313 free
->arch
.lpage_info
[i
- 1] = NULL
;
8317 kvm_page_track_free_memslot(free
, dont
);
8320 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8321 unsigned long npages
)
8325 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8326 struct kvm_lpage_info
*linfo
;
8331 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8332 slot
->base_gfn
, level
) + 1;
8334 slot
->arch
.rmap
[i
] =
8335 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8336 if (!slot
->arch
.rmap
[i
])
8341 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8345 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8347 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8348 linfo
[0].disallow_lpage
= 1;
8349 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8350 linfo
[lpages
- 1].disallow_lpage
= 1;
8351 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8353 * If the gfn and userspace address are not aligned wrt each
8354 * other, or if explicitly asked to, disable large page
8355 * support for this slot
8357 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8358 !kvm_largepages_enabled()) {
8361 for (j
= 0; j
< lpages
; ++j
)
8362 linfo
[j
].disallow_lpage
= 1;
8366 if (kvm_page_track_create_memslot(slot
, npages
))
8372 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8373 kvfree(slot
->arch
.rmap
[i
]);
8374 slot
->arch
.rmap
[i
] = NULL
;
8378 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8379 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8384 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8387 * memslots->generation has been incremented.
8388 * mmio generation may have reached its maximum value.
8390 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8393 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8394 struct kvm_memory_slot
*memslot
,
8395 const struct kvm_userspace_memory_region
*mem
,
8396 enum kvm_mr_change change
)
8401 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8402 struct kvm_memory_slot
*new)
8404 /* Still write protect RO slot */
8405 if (new->flags
& KVM_MEM_READONLY
) {
8406 kvm_mmu_slot_remove_write_access(kvm
, new);
8411 * Call kvm_x86_ops dirty logging hooks when they are valid.
8413 * kvm_x86_ops->slot_disable_log_dirty is called when:
8415 * - KVM_MR_CREATE with dirty logging is disabled
8416 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8418 * The reason is, in case of PML, we need to set D-bit for any slots
8419 * with dirty logging disabled in order to eliminate unnecessary GPA
8420 * logging in PML buffer (and potential PML buffer full VMEXT). This
8421 * guarantees leaving PML enabled during guest's lifetime won't have
8422 * any additonal overhead from PML when guest is running with dirty
8423 * logging disabled for memory slots.
8425 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8426 * to dirty logging mode.
8428 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8430 * In case of write protect:
8432 * Write protect all pages for dirty logging.
8434 * All the sptes including the large sptes which point to this
8435 * slot are set to readonly. We can not create any new large
8436 * spte on this slot until the end of the logging.
8438 * See the comments in fast_page_fault().
8440 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8441 if (kvm_x86_ops
->slot_enable_log_dirty
)
8442 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8444 kvm_mmu_slot_remove_write_access(kvm
, new);
8446 if (kvm_x86_ops
->slot_disable_log_dirty
)
8447 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8451 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8452 const struct kvm_userspace_memory_region
*mem
,
8453 const struct kvm_memory_slot
*old
,
8454 const struct kvm_memory_slot
*new,
8455 enum kvm_mr_change change
)
8457 int nr_mmu_pages
= 0;
8459 if (!kvm
->arch
.n_requested_mmu_pages
)
8460 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8463 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8466 * Dirty logging tracks sptes in 4k granularity, meaning that large
8467 * sptes have to be split. If live migration is successful, the guest
8468 * in the source machine will be destroyed and large sptes will be
8469 * created in the destination. However, if the guest continues to run
8470 * in the source machine (for example if live migration fails), small
8471 * sptes will remain around and cause bad performance.
8473 * Scan sptes if dirty logging has been stopped, dropping those
8474 * which can be collapsed into a single large-page spte. Later
8475 * page faults will create the large-page sptes.
8477 if ((change
!= KVM_MR_DELETE
) &&
8478 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8479 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8480 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8483 * Set up write protection and/or dirty logging for the new slot.
8485 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8486 * been zapped so no dirty logging staff is needed for old slot. For
8487 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8488 * new and it's also covered when dealing with the new slot.
8490 * FIXME: const-ify all uses of struct kvm_memory_slot.
8492 if (change
!= KVM_MR_DELETE
)
8493 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8496 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8498 kvm_mmu_invalidate_zap_all_pages(kvm
);
8501 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8502 struct kvm_memory_slot
*slot
)
8504 kvm_page_track_flush_slot(kvm
, slot
);
8507 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8509 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8512 if (kvm_apic_has_events(vcpu
))
8515 if (vcpu
->arch
.pv
.pv_unhalted
)
8518 if (vcpu
->arch
.exception
.pending
)
8521 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8522 (vcpu
->arch
.nmi_pending
&&
8523 kvm_x86_ops
->nmi_allowed(vcpu
)))
8526 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8527 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8530 if (kvm_arch_interrupt_allowed(vcpu
) &&
8531 kvm_cpu_has_interrupt(vcpu
))
8534 if (kvm_hv_has_stimer_pending(vcpu
))
8540 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8542 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8545 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8547 return vcpu
->arch
.preempted_in_kernel
;
8550 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8552 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8555 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8557 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8560 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8562 if (is_64_bit_mode(vcpu
))
8563 return kvm_rip_read(vcpu
);
8564 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8565 kvm_rip_read(vcpu
));
8567 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8569 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8571 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8573 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8575 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8577 unsigned long rflags
;
8579 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8580 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8581 rflags
&= ~X86_EFLAGS_TF
;
8584 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8586 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8588 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8589 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8590 rflags
|= X86_EFLAGS_TF
;
8591 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8594 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8596 __kvm_set_rflags(vcpu
, rflags
);
8597 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8599 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8601 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8605 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8609 r
= kvm_mmu_reload(vcpu
);
8613 if (!vcpu
->arch
.mmu
.direct_map
&&
8614 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8617 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8620 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8622 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8625 static inline u32
kvm_async_pf_next_probe(u32 key
)
8627 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8630 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8632 u32 key
= kvm_async_pf_hash_fn(gfn
);
8634 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8635 key
= kvm_async_pf_next_probe(key
);
8637 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8640 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8643 u32 key
= kvm_async_pf_hash_fn(gfn
);
8645 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8646 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8647 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8648 key
= kvm_async_pf_next_probe(key
);
8653 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8655 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8658 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8662 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8664 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8666 j
= kvm_async_pf_next_probe(j
);
8667 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8669 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8671 * k lies cyclically in ]i,j]
8673 * |....j i.k.| or |.k..j i...|
8675 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8676 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8681 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8684 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8688 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8691 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8695 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8696 struct kvm_async_pf
*work
)
8698 struct x86_exception fault
;
8700 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8701 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8703 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8704 (vcpu
->arch
.apf
.send_user_only
&&
8705 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8706 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8707 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8708 fault
.vector
= PF_VECTOR
;
8709 fault
.error_code_valid
= true;
8710 fault
.error_code
= 0;
8711 fault
.nested_page_fault
= false;
8712 fault
.address
= work
->arch
.token
;
8713 fault
.async_page_fault
= true;
8714 kvm_inject_page_fault(vcpu
, &fault
);
8718 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8719 struct kvm_async_pf
*work
)
8721 struct x86_exception fault
;
8724 if (work
->wakeup_all
)
8725 work
->arch
.token
= ~0; /* broadcast wakeup */
8727 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8728 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8730 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
8731 !apf_get_user(vcpu
, &val
)) {
8732 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
8733 vcpu
->arch
.exception
.pending
&&
8734 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
8735 !apf_put_user(vcpu
, 0)) {
8736 vcpu
->arch
.exception
.injected
= false;
8737 vcpu
->arch
.exception
.pending
= false;
8738 vcpu
->arch
.exception
.nr
= 0;
8739 vcpu
->arch
.exception
.has_error_code
= false;
8740 vcpu
->arch
.exception
.error_code
= 0;
8741 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8742 fault
.vector
= PF_VECTOR
;
8743 fault
.error_code_valid
= true;
8744 fault
.error_code
= 0;
8745 fault
.nested_page_fault
= false;
8746 fault
.address
= work
->arch
.token
;
8747 fault
.async_page_fault
= true;
8748 kvm_inject_page_fault(vcpu
, &fault
);
8751 vcpu
->arch
.apf
.halted
= false;
8752 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8755 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8757 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8760 return kvm_can_do_async_pf(vcpu
);
8763 void kvm_arch_start_assignment(struct kvm
*kvm
)
8765 atomic_inc(&kvm
->arch
.assigned_device_count
);
8767 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8769 void kvm_arch_end_assignment(struct kvm
*kvm
)
8771 atomic_dec(&kvm
->arch
.assigned_device_count
);
8773 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8775 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8777 return atomic_read(&kvm
->arch
.assigned_device_count
);
8779 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8781 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8783 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8785 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8787 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8789 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8791 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8793 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8795 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8797 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8799 bool kvm_arch_has_irq_bypass(void)
8801 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8804 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8805 struct irq_bypass_producer
*prod
)
8807 struct kvm_kernel_irqfd
*irqfd
=
8808 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8810 irqfd
->producer
= prod
;
8812 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8813 prod
->irq
, irqfd
->gsi
, 1);
8816 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8817 struct irq_bypass_producer
*prod
)
8820 struct kvm_kernel_irqfd
*irqfd
=
8821 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8823 WARN_ON(irqfd
->producer
!= prod
);
8824 irqfd
->producer
= NULL
;
8827 * When producer of consumer is unregistered, we change back to
8828 * remapped mode, so we can re-use the current implementation
8829 * when the irq is masked/disabled or the consumer side (KVM
8830 * int this case doesn't want to receive the interrupts.
8832 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8834 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8835 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8838 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8839 uint32_t guest_irq
, bool set
)
8841 if (!kvm_x86_ops
->update_pi_irte
)
8844 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8847 bool kvm_vector_hashing_enabled(void)
8849 return vector_hashing
;
8851 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8853 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8854 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8855 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8856 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8857 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8858 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8859 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8860 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8861 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8862 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8863 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8864 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8868 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8869 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8870 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8871 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);