1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/internal.h> /* Ugh! */
72 #include <asm/pvclock.h>
73 #include <asm/div64.h>
74 #include <asm/irq_remapping.h>
75 #include <asm/mshyperv.h>
76 #include <asm/hypervisor.h>
77 #include <asm/tlbflush.h>
78 #include <asm/intel_pt.h>
79 #include <asm/emulate_prefix.h>
81 #include <clocksource/hyperv_timer.h>
83 #define CREATE_TRACE_POINTS
86 #define MAX_IO_MSRS 256
87 #define KVM_MAX_MCE_BANKS 32
88 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
91 #define emul_to_vcpu(ctxt) \
92 ((struct kvm_vcpu *)(ctxt)->vcpu)
95 * - enable syscall per default because its emulated by KVM
96 * - enable LME and LMA per default on 64 bit KVM
100 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
102 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
105 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
110 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
112 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
113 static void process_nmi(struct kvm_vcpu
*vcpu
);
114 static void process_smi(struct kvm_vcpu
*vcpu
);
115 static void enter_smm(struct kvm_vcpu
*vcpu
);
116 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
117 static void store_regs(struct kvm_vcpu
*vcpu
);
118 static int sync_regs(struct kvm_vcpu
*vcpu
);
120 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
121 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
123 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
124 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
126 #define KVM_X86_OP(func) \
127 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
128 *(((struct kvm_x86_ops *)0)->func));
129 #define KVM_X86_OP_NULL KVM_X86_OP
130 #include <asm/kvm-x86-ops.h>
131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current
);
135 static bool __read_mostly ignore_msrs
= 0;
136 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
138 bool __read_mostly report_ignored_msrs
= true;
139 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
140 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
142 unsigned int min_timer_period_us
= 200;
143 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
145 static bool __read_mostly kvmclock_periodic_sync
= true;
146 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
148 bool __read_mostly kvm_has_tsc_control
;
149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
150 u32 __read_mostly kvm_max_guest_tsc_khz
;
151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
152 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
154 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
156 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
158 bool __read_mostly kvm_has_bus_lock_exit
;
159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit
);
161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
162 static u32 __read_mostly tsc_tolerance_ppm
= 250;
163 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
166 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
167 * adaptive tuning starting from default advancement of 1000ns. '0' disables
168 * advancement entirely. Any other value is used as-is and disables adaptive
169 * tuning, i.e. allows privileged userspace to set an exact advancement time.
171 static int __read_mostly lapic_timer_advance_ns
= -1;
172 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
174 static bool __read_mostly vector_hashing
= true;
175 module_param(vector_hashing
, bool, S_IRUGO
);
177 bool __read_mostly enable_vmware_backdoor
= false;
178 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
181 static bool __read_mostly force_emulation_prefix
= false;
182 module_param(force_emulation_prefix
, bool, S_IRUGO
);
184 int __read_mostly pi_inject_timer
= -1;
185 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
188 * Restoring the host value for MSRs that are only consumed when running in
189 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
190 * returns to userspace, i.e. the kernel can run with the guest's value.
192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
194 struct kvm_user_return_msrs
{
195 struct user_return_notifier urn
;
197 struct kvm_user_return_msr_values
{
200 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
203 u32 __read_mostly kvm_nr_uret_msrs
;
204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
205 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
206 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
208 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
209 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
210 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
211 | XFEATURE_MASK_PKRU)
213 u64 __read_mostly host_efer
;
214 EXPORT_SYMBOL_GPL(host_efer
);
216 bool __read_mostly allow_smaller_maxphyaddr
= 0;
217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
219 bool __read_mostly enable_apicv
= true;
220 EXPORT_SYMBOL_GPL(enable_apicv
);
222 u64 __read_mostly host_xss
;
223 EXPORT_SYMBOL_GPL(host_xss
);
224 u64 __read_mostly supported_xss
;
225 EXPORT_SYMBOL_GPL(supported_xss
);
227 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
228 KVM_GENERIC_VM_STATS(),
229 STATS_DESC_COUNTER(VM
, mmu_shadow_zapped
),
230 STATS_DESC_COUNTER(VM
, mmu_pte_write
),
231 STATS_DESC_COUNTER(VM
, mmu_pde_zapped
),
232 STATS_DESC_COUNTER(VM
, mmu_flooded
),
233 STATS_DESC_COUNTER(VM
, mmu_recycled
),
234 STATS_DESC_COUNTER(VM
, mmu_cache_miss
),
235 STATS_DESC_ICOUNTER(VM
, mmu_unsync
),
236 STATS_DESC_ICOUNTER(VM
, pages_4k
),
237 STATS_DESC_ICOUNTER(VM
, pages_2m
),
238 STATS_DESC_ICOUNTER(VM
, pages_1g
),
239 STATS_DESC_ICOUNTER(VM
, nx_lpage_splits
),
240 STATS_DESC_PCOUNTER(VM
, max_mmu_rmap_size
),
241 STATS_DESC_PCOUNTER(VM
, max_mmu_page_hash_collisions
)
244 const struct kvm_stats_header kvm_vm_stats_header
= {
245 .name_size
= KVM_STATS_NAME_SIZE
,
246 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
247 .id_offset
= sizeof(struct kvm_stats_header
),
248 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
249 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
250 sizeof(kvm_vm_stats_desc
),
253 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
254 KVM_GENERIC_VCPU_STATS(),
255 STATS_DESC_COUNTER(VCPU
, pf_fixed
),
256 STATS_DESC_COUNTER(VCPU
, pf_guest
),
257 STATS_DESC_COUNTER(VCPU
, tlb_flush
),
258 STATS_DESC_COUNTER(VCPU
, invlpg
),
259 STATS_DESC_COUNTER(VCPU
, exits
),
260 STATS_DESC_COUNTER(VCPU
, io_exits
),
261 STATS_DESC_COUNTER(VCPU
, mmio_exits
),
262 STATS_DESC_COUNTER(VCPU
, signal_exits
),
263 STATS_DESC_COUNTER(VCPU
, irq_window_exits
),
264 STATS_DESC_COUNTER(VCPU
, nmi_window_exits
),
265 STATS_DESC_COUNTER(VCPU
, l1d_flush
),
266 STATS_DESC_COUNTER(VCPU
, halt_exits
),
267 STATS_DESC_COUNTER(VCPU
, request_irq_exits
),
268 STATS_DESC_COUNTER(VCPU
, irq_exits
),
269 STATS_DESC_COUNTER(VCPU
, host_state_reload
),
270 STATS_DESC_COUNTER(VCPU
, fpu_reload
),
271 STATS_DESC_COUNTER(VCPU
, insn_emulation
),
272 STATS_DESC_COUNTER(VCPU
, insn_emulation_fail
),
273 STATS_DESC_COUNTER(VCPU
, hypercalls
),
274 STATS_DESC_COUNTER(VCPU
, irq_injections
),
275 STATS_DESC_COUNTER(VCPU
, nmi_injections
),
276 STATS_DESC_COUNTER(VCPU
, req_event
),
277 STATS_DESC_COUNTER(VCPU
, nested_run
),
278 STATS_DESC_COUNTER(VCPU
, directed_yield_attempted
),
279 STATS_DESC_COUNTER(VCPU
, directed_yield_successful
),
280 STATS_DESC_ICOUNTER(VCPU
, guest_mode
)
283 const struct kvm_stats_header kvm_vcpu_stats_header
= {
284 .name_size
= KVM_STATS_NAME_SIZE
,
285 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
286 .id_offset
= sizeof(struct kvm_stats_header
),
287 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
288 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
289 sizeof(kvm_vcpu_stats_desc
),
292 u64 __read_mostly host_xcr0
;
293 u64 __read_mostly supported_xcr0
;
294 EXPORT_SYMBOL_GPL(supported_xcr0
);
296 static struct kmem_cache
*x86_fpu_cache
;
298 static struct kmem_cache
*x86_emulator_cache
;
301 * When called, it means the previous get/set msr reached an invalid msr.
302 * Return true if we want to ignore/silent this failed msr access.
304 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
306 const char *op
= write
? "wrmsr" : "rdmsr";
309 if (report_ignored_msrs
)
310 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
315 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
321 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
323 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
324 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
326 return kmem_cache_create_usercopy("x86_emulator", size
,
327 __alignof__(struct x86_emulate_ctxt
),
328 SLAB_ACCOUNT
, useroffset
,
329 size
- useroffset
, NULL
);
332 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
337 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
338 vcpu
->arch
.apf
.gfns
[i
] = ~0;
341 static void kvm_on_user_return(struct user_return_notifier
*urn
)
344 struct kvm_user_return_msrs
*msrs
345 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
346 struct kvm_user_return_msr_values
*values
;
350 * Disabling irqs at this point since the following code could be
351 * interrupted and executed through kvm_arch_hardware_disable()
353 local_irq_save(flags
);
354 if (msrs
->registered
) {
355 msrs
->registered
= false;
356 user_return_notifier_unregister(urn
);
358 local_irq_restore(flags
);
359 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
360 values
= &msrs
->values
[slot
];
361 if (values
->host
!= values
->curr
) {
362 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
363 values
->curr
= values
->host
;
368 static int kvm_probe_user_return_msr(u32 msr
)
374 ret
= rdmsrl_safe(msr
, &val
);
377 ret
= wrmsrl_safe(msr
, val
);
383 int kvm_add_user_return_msr(u32 msr
)
385 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
387 if (kvm_probe_user_return_msr(msr
))
390 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
391 return kvm_nr_uret_msrs
++;
393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
395 int kvm_find_user_return_msr(u32 msr
)
399 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
400 if (kvm_uret_msrs_list
[i
] == msr
)
405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
407 static void kvm_user_return_msr_cpu_online(void)
409 unsigned int cpu
= smp_processor_id();
410 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
414 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
415 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
416 msrs
->values
[i
].host
= value
;
417 msrs
->values
[i
].curr
= value
;
421 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
423 unsigned int cpu
= smp_processor_id();
424 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
427 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
428 if (value
== msrs
->values
[slot
].curr
)
430 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
434 msrs
->values
[slot
].curr
= value
;
435 if (!msrs
->registered
) {
436 msrs
->urn
.on_user_return
= kvm_on_user_return
;
437 user_return_notifier_register(&msrs
->urn
);
438 msrs
->registered
= true;
442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
444 static void drop_user_return_notifiers(void)
446 unsigned int cpu
= smp_processor_id();
447 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
449 if (msrs
->registered
)
450 kvm_on_user_return(&msrs
->urn
);
453 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
455 return vcpu
->arch
.apic_base
;
457 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
459 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
461 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
465 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
467 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
468 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
469 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
470 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
472 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
474 if (!msr_info
->host_initiated
) {
475 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
477 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
481 kvm_lapic_set_base(vcpu
, msr_info
->data
);
482 kvm_recalculate_apic_map(vcpu
->kvm
);
485 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
488 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
490 * Hardware virtualization extension instructions may fault if a reboot turns
491 * off virtualization while processes are running. Usually after catching the
492 * fault we just panic; during reboot instead the instruction is ignored.
494 noinstr
void kvm_spurious_fault(void)
496 /* Fault while not rebooting. We want the trace. */
497 BUG_ON(!kvm_rebooting
);
499 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
501 #define EXCPT_BENIGN 0
502 #define EXCPT_CONTRIBUTORY 1
505 static int exception_class(int vector
)
515 return EXCPT_CONTRIBUTORY
;
522 #define EXCPT_FAULT 0
524 #define EXCPT_ABORT 2
525 #define EXCPT_INTERRUPT 3
527 static int exception_type(int vector
)
531 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
532 return EXCPT_INTERRUPT
;
536 /* #DB is trap, as instruction watchpoints are handled elsewhere */
537 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
540 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
543 /* Reserved exceptions will result in fault */
547 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
549 unsigned nr
= vcpu
->arch
.exception
.nr
;
550 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
551 unsigned long payload
= vcpu
->arch
.exception
.payload
;
559 * "Certain debug exceptions may clear bit 0-3. The
560 * remaining contents of the DR6 register are never
561 * cleared by the processor".
563 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
565 * In order to reflect the #DB exception payload in guest
566 * dr6, three components need to be considered: active low
567 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
569 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
570 * In the target guest dr6:
571 * FIXED_1 bits should always be set.
572 * Active low bits should be cleared if 1-setting in payload.
573 * Active high bits should be set if 1-setting in payload.
575 * Note, the payload is compatible with the pending debug
576 * exceptions/exit qualification under VMX, that active_low bits
577 * are active high in payload.
578 * So they need to be flipped for DR6.
580 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
581 vcpu
->arch
.dr6
|= payload
;
582 vcpu
->arch
.dr6
^= payload
& DR6_ACTIVE_LOW
;
585 * The #DB payload is defined as compatible with the 'pending
586 * debug exceptions' field under VMX, not DR6. While bit 12 is
587 * defined in the 'pending debug exceptions' field (enabled
588 * breakpoint), it is reserved and must be zero in DR6.
590 vcpu
->arch
.dr6
&= ~BIT(12);
593 vcpu
->arch
.cr2
= payload
;
597 vcpu
->arch
.exception
.has_payload
= false;
598 vcpu
->arch
.exception
.payload
= 0;
600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
602 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
603 unsigned nr
, bool has_error
, u32 error_code
,
604 bool has_payload
, unsigned long payload
, bool reinject
)
609 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
611 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
615 * On vmentry, vcpu->arch.exception.pending is only
616 * true if an event injection was blocked by
617 * nested_run_pending. In that case, however,
618 * vcpu_enter_guest requests an immediate exit,
619 * and the guest shouldn't proceed far enough to
622 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
623 vcpu
->arch
.exception
.injected
= true;
624 if (WARN_ON_ONCE(has_payload
)) {
626 * A reinjected event has already
627 * delivered its payload.
633 vcpu
->arch
.exception
.pending
= true;
634 vcpu
->arch
.exception
.injected
= false;
636 vcpu
->arch
.exception
.has_error_code
= has_error
;
637 vcpu
->arch
.exception
.nr
= nr
;
638 vcpu
->arch
.exception
.error_code
= error_code
;
639 vcpu
->arch
.exception
.has_payload
= has_payload
;
640 vcpu
->arch
.exception
.payload
= payload
;
641 if (!is_guest_mode(vcpu
))
642 kvm_deliver_exception_payload(vcpu
);
646 /* to check exception */
647 prev_nr
= vcpu
->arch
.exception
.nr
;
648 if (prev_nr
== DF_VECTOR
) {
649 /* triple fault -> shutdown */
650 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
653 class1
= exception_class(prev_nr
);
654 class2
= exception_class(nr
);
655 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
656 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
658 * Generate double fault per SDM Table 5-5. Set
659 * exception.pending = true so that the double fault
660 * can trigger a nested vmexit.
662 vcpu
->arch
.exception
.pending
= true;
663 vcpu
->arch
.exception
.injected
= false;
664 vcpu
->arch
.exception
.has_error_code
= true;
665 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
666 vcpu
->arch
.exception
.error_code
= 0;
667 vcpu
->arch
.exception
.has_payload
= false;
668 vcpu
->arch
.exception
.payload
= 0;
670 /* replace previous exception with a new one in a hope
671 that instruction re-execution will regenerate lost
676 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
678 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
680 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
682 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
684 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
686 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
688 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
689 unsigned long payload
)
691 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
695 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
696 u32 error_code
, unsigned long payload
)
698 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
699 true, payload
, false);
702 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
705 kvm_inject_gp(vcpu
, 0);
707 return kvm_skip_emulated_instruction(vcpu
);
711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
713 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
715 ++vcpu
->stat
.pf_guest
;
716 vcpu
->arch
.exception
.nested_apf
=
717 is_guest_mode(vcpu
) && fault
->async_page_fault
;
718 if (vcpu
->arch
.exception
.nested_apf
) {
719 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
720 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
722 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
729 struct x86_exception
*fault
)
731 struct kvm_mmu
*fault_mmu
;
732 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
734 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
738 * Invalidate the TLB entry for the faulting address, if it exists,
739 * else the access will fault indefinitely (and to emulate hardware).
741 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
742 !(fault
->error_code
& PFERR_RSVD_MASK
))
743 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
744 fault_mmu
->root_hpa
);
746 fault_mmu
->inject_page_fault(vcpu
, fault
);
747 return fault
->nested_page_fault
;
749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
751 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
753 atomic_inc(&vcpu
->arch
.nmi_queued
);
754 kvm_make_request(KVM_REQ_NMI
, vcpu
);
756 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
758 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
760 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
764 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
766 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
771 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
772 * a #GP and return false.
774 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
776 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
778 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
781 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
783 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
785 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
788 kvm_queue_exception(vcpu
, UD_VECTOR
);
791 EXPORT_SYMBOL_GPL(kvm_require_dr
);
794 * This function will be used to read from the physical memory of the currently
795 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
796 * can read from guest physical or from the guest's guest physical memory.
798 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
799 gfn_t ngfn
, void *data
, int offset
, int len
,
802 struct x86_exception exception
;
806 ngpa
= gfn_to_gpa(ngfn
);
807 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
808 if (real_gfn
== UNMAPPED_GVA
)
811 real_gfn
= gpa_to_gfn(real_gfn
);
813 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
815 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
817 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
819 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
823 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
825 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
827 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
828 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
831 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
833 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
834 offset
* sizeof(u64
), sizeof(pdpte
),
835 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
840 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
841 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
842 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
849 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
850 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
851 vcpu
->arch
.pdptrs_from_userspace
= false;
857 EXPORT_SYMBOL_GPL(load_pdptrs
);
859 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
861 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
862 kvm_clear_async_pf_completion_queue(vcpu
);
863 kvm_async_pf_hash_reset(vcpu
);
866 if ((cr0
^ old_cr0
) & KVM_MMU_CR0_ROLE_BITS
)
867 kvm_mmu_reset_context(vcpu
);
869 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
870 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
871 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
872 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
874 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
876 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
878 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
879 unsigned long pdptr_bits
= X86_CR0_CD
| X86_CR0_NW
| X86_CR0_PG
;
884 if (cr0
& 0xffffffff00000000UL
)
888 cr0
&= ~CR0_RESERVED_BITS
;
890 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
893 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
897 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
898 (cr0
& X86_CR0_PG
)) {
903 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
908 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
909 is_pae(vcpu
) && ((cr0
^ old_cr0
) & pdptr_bits
) &&
910 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
)))
913 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
916 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
918 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
922 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
924 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
926 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
928 EXPORT_SYMBOL_GPL(kvm_lmsw
);
930 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
932 if (vcpu
->arch
.guest_state_protected
)
935 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
937 if (vcpu
->arch
.xcr0
!= host_xcr0
)
938 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
940 if (vcpu
->arch
.xsaves_enabled
&&
941 vcpu
->arch
.ia32_xss
!= host_xss
)
942 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
945 if (static_cpu_has(X86_FEATURE_PKU
) &&
946 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
947 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
948 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
949 write_pkru(vcpu
->arch
.pkru
);
951 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
953 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
955 if (vcpu
->arch
.guest_state_protected
)
958 if (static_cpu_has(X86_FEATURE_PKU
) &&
959 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
960 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
961 vcpu
->arch
.pkru
= rdpkru();
962 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
963 write_pkru(vcpu
->arch
.host_pkru
);
966 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
968 if (vcpu
->arch
.xcr0
!= host_xcr0
)
969 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
971 if (vcpu
->arch
.xsaves_enabled
&&
972 vcpu
->arch
.ia32_xss
!= host_xss
)
973 wrmsrl(MSR_IA32_XSS
, host_xss
);
977 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
979 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
982 u64 old_xcr0
= vcpu
->arch
.xcr0
;
985 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
986 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
988 if (!(xcr0
& XFEATURE_MASK_FP
))
990 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
994 * Do not allow the guest to set bits that we do not support
995 * saving. However, xcr0 bit 0 is always set, even if the
996 * emulated CPU does not support XSAVE (see fx_init).
998 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
999 if (xcr0
& ~valid_bits
)
1002 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
1003 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1006 if (xcr0
& XFEATURE_MASK_AVX512
) {
1007 if (!(xcr0
& XFEATURE_MASK_YMM
))
1009 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1012 vcpu
->arch
.xcr0
= xcr0
;
1014 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1015 kvm_update_cpuid_runtime(vcpu
);
1019 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1021 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1022 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1023 kvm_inject_gp(vcpu
, 0);
1027 return kvm_skip_emulated_instruction(vcpu
);
1029 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1031 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1033 if (cr4
& cr4_reserved_bits
)
1036 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1039 return static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1041 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
1043 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1045 if (((cr4
^ old_cr4
) & KVM_MMU_CR4_ROLE_BITS
) ||
1046 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1047 kvm_mmu_reset_context(vcpu
);
1049 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1051 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1053 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1054 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1057 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1060 if (is_long_mode(vcpu
)) {
1061 if (!(cr4
& X86_CR4_PAE
))
1063 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1065 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1066 && ((cr4
^ old_cr4
) & pdptr_bits
)
1067 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
1068 kvm_read_cr3(vcpu
)))
1071 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1072 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1075 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1076 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1080 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1082 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1086 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1088 static void kvm_invalidate_pcid(struct kvm_vcpu
*vcpu
, unsigned long pcid
)
1090 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
1091 unsigned long roots_to_free
= 0;
1095 * If neither the current CR3 nor any of the prev_roots use the given
1096 * PCID, then nothing needs to be done here because a resync will
1097 * happen anyway before switching to any other CR3.
1099 if (kvm_get_active_pcid(vcpu
) == pcid
) {
1100 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1101 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1104 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
1105 if (kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
) == pcid
)
1106 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
1108 kvm_mmu_free_roots(vcpu
, mmu
, roots_to_free
);
1111 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1113 bool skip_tlb_flush
= false;
1114 unsigned long pcid
= 0;
1115 #ifdef CONFIG_X86_64
1116 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1119 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1120 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1121 pcid
= cr3
& X86_CR3_PCID_MASK
;
1125 /* PDPTRs are always reloaded for PAE paging. */
1126 if (cr3
== kvm_read_cr3(vcpu
) && !is_pae_paging(vcpu
))
1127 goto handle_tlb_flush
;
1130 * Do not condition the GPA check on long mode, this helper is used to
1131 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1132 * the current vCPU mode is accurate.
1134 if (kvm_vcpu_is_illegal_gpa(vcpu
, cr3
))
1137 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1140 if (cr3
!= kvm_read_cr3(vcpu
))
1141 kvm_mmu_new_pgd(vcpu
, cr3
);
1143 vcpu
->arch
.cr3
= cr3
;
1144 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1148 * A load of CR3 that flushes the TLB flushes only the current PCID,
1149 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1150 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1151 * and it's impossible to use a non-zero PCID when PCID is disabled,
1152 * i.e. only PCID=0 can be relevant.
1154 if (!skip_tlb_flush
)
1155 kvm_invalidate_pcid(vcpu
, pcid
);
1159 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1161 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1163 if (cr8
& CR8_RESERVED_BITS
)
1165 if (lapic_in_kernel(vcpu
))
1166 kvm_lapic_set_tpr(vcpu
, cr8
);
1168 vcpu
->arch
.cr8
= cr8
;
1171 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1173 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1175 if (lapic_in_kernel(vcpu
))
1176 return kvm_lapic_get_cr8(vcpu
);
1178 return vcpu
->arch
.cr8
;
1180 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1182 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1186 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1187 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1188 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1192 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1196 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1197 dr7
= vcpu
->arch
.guest_debug_dr7
;
1199 dr7
= vcpu
->arch
.dr7
;
1200 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1201 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1202 if (dr7
& DR7_BP_EN_MASK
)
1203 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1205 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1207 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1209 u64 fixed
= DR6_FIXED_1
;
1211 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1214 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1215 fixed
|= DR6_BUS_LOCK
;
1219 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1221 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1225 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1226 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1227 vcpu
->arch
.eff_db
[dr
] = val
;
1231 if (!kvm_dr6_valid(val
))
1233 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1237 if (!kvm_dr7_valid(val
))
1239 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1240 kvm_update_dr7(vcpu
);
1246 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1248 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1250 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1254 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1258 *val
= vcpu
->arch
.dr6
;
1262 *val
= vcpu
->arch
.dr7
;
1266 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1268 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1270 u32 ecx
= kvm_rcx_read(vcpu
);
1273 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1274 kvm_inject_gp(vcpu
, 0);
1278 kvm_rax_write(vcpu
, (u32
)data
);
1279 kvm_rdx_write(vcpu
, data
>> 32);
1280 return kvm_skip_emulated_instruction(vcpu
);
1282 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1285 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1286 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1288 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1289 * extract the supported MSRs from the related const lists.
1290 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1291 * capabilities of the host cpu. This capabilities test skips MSRs that are
1292 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1293 * may depend on host virtualization features rather than host cpu features.
1296 static const u32 msrs_to_save_all
[] = {
1297 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1299 #ifdef CONFIG_X86_64
1300 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1302 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1303 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1305 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1306 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1307 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1308 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1309 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1310 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1311 MSR_IA32_UMWAIT_CONTROL
,
1313 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1314 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2, MSR_ARCH_PERFMON_FIXED_CTR0
+ 3,
1315 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1316 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1317 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1318 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1319 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1320 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1321 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1322 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1323 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1324 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1325 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1326 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1327 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1328 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1329 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1330 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1331 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1332 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1333 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1334 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1336 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1337 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1338 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1339 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1340 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1341 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1344 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1345 static unsigned num_msrs_to_save
;
1347 static const u32 emulated_msrs_all
[] = {
1348 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1349 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1350 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1351 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1352 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1353 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1354 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1356 HV_X64_MSR_VP_INDEX
,
1357 HV_X64_MSR_VP_RUNTIME
,
1358 HV_X64_MSR_SCONTROL
,
1359 HV_X64_MSR_STIMER0_CONFIG
,
1360 HV_X64_MSR_VP_ASSIST_PAGE
,
1361 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1362 HV_X64_MSR_TSC_EMULATION_STATUS
,
1363 HV_X64_MSR_SYNDBG_OPTIONS
,
1364 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1365 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1366 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1368 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1369 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1371 MSR_IA32_TSC_ADJUST
,
1372 MSR_IA32_TSC_DEADLINE
,
1373 MSR_IA32_ARCH_CAPABILITIES
,
1374 MSR_IA32_PERF_CAPABILITIES
,
1375 MSR_IA32_MISC_ENABLE
,
1376 MSR_IA32_MCG_STATUS
,
1378 MSR_IA32_MCG_EXT_CTL
,
1382 MSR_MISC_FEATURES_ENABLES
,
1383 MSR_AMD64_VIRT_SPEC_CTRL
,
1388 * The following list leaves out MSRs whose values are determined
1389 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1390 * We always support the "true" VMX control MSRs, even if the host
1391 * processor does not, so I am putting these registers here rather
1392 * than in msrs_to_save_all.
1395 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1396 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1397 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1398 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1400 MSR_IA32_VMX_CR0_FIXED0
,
1401 MSR_IA32_VMX_CR4_FIXED0
,
1402 MSR_IA32_VMX_VMCS_ENUM
,
1403 MSR_IA32_VMX_PROCBASED_CTLS2
,
1404 MSR_IA32_VMX_EPT_VPID_CAP
,
1405 MSR_IA32_VMX_VMFUNC
,
1408 MSR_KVM_POLL_CONTROL
,
1411 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1412 static unsigned num_emulated_msrs
;
1415 * List of msr numbers which are used to expose MSR-based features that
1416 * can be used by a hypervisor to validate requested CPU features.
1418 static const u32 msr_based_features_all
[] = {
1420 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1421 MSR_IA32_VMX_PINBASED_CTLS
,
1422 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1423 MSR_IA32_VMX_PROCBASED_CTLS
,
1424 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1425 MSR_IA32_VMX_EXIT_CTLS
,
1426 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1427 MSR_IA32_VMX_ENTRY_CTLS
,
1429 MSR_IA32_VMX_CR0_FIXED0
,
1430 MSR_IA32_VMX_CR0_FIXED1
,
1431 MSR_IA32_VMX_CR4_FIXED0
,
1432 MSR_IA32_VMX_CR4_FIXED1
,
1433 MSR_IA32_VMX_VMCS_ENUM
,
1434 MSR_IA32_VMX_PROCBASED_CTLS2
,
1435 MSR_IA32_VMX_EPT_VPID_CAP
,
1436 MSR_IA32_VMX_VMFUNC
,
1440 MSR_IA32_ARCH_CAPABILITIES
,
1441 MSR_IA32_PERF_CAPABILITIES
,
1444 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1445 static unsigned int num_msr_based_features
;
1447 static u64
kvm_get_arch_capabilities(void)
1451 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1452 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1455 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1456 * the nested hypervisor runs with NX huge pages. If it is not,
1457 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1458 * L1 guests, so it need not worry about its own (L2) guests.
1460 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1463 * If we're doing cache flushes (either "always" or "cond")
1464 * we will do one whenever the guest does a vmlaunch/vmresume.
1465 * If an outer hypervisor is doing the cache flush for us
1466 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1467 * capability to the guest too, and if EPT is disabled we're not
1468 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1469 * require a nested hypervisor to do a flush of its own.
1471 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1472 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1474 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1475 data
|= ARCH_CAP_RDCL_NO
;
1476 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1477 data
|= ARCH_CAP_SSB_NO
;
1478 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1479 data
|= ARCH_CAP_MDS_NO
;
1481 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1483 * If RTM=0 because the kernel has disabled TSX, the host might
1484 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1485 * and therefore knows that there cannot be TAA) but keep
1486 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1487 * and we want to allow migrating those guests to tsx=off hosts.
1489 data
&= ~ARCH_CAP_TAA_NO
;
1490 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1491 data
|= ARCH_CAP_TAA_NO
;
1494 * Nothing to do here; we emulate TSX_CTRL if present on the
1495 * host so the guest can choose between disabling TSX or
1496 * using VERW to clear CPU buffers.
1503 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1505 switch (msr
->index
) {
1506 case MSR_IA32_ARCH_CAPABILITIES
:
1507 msr
->data
= kvm_get_arch_capabilities();
1509 case MSR_IA32_UCODE_REV
:
1510 rdmsrl_safe(msr
->index
, &msr
->data
);
1513 return static_call(kvm_x86_get_msr_feature
)(msr
);
1518 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1520 struct kvm_msr_entry msr
;
1524 r
= kvm_get_msr_feature(&msr
);
1526 if (r
== KVM_MSR_RET_INVALID
) {
1527 /* Unconditionally clear the output for simplicity */
1529 if (kvm_msr_ignored_check(index
, 0, false))
1541 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1543 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1546 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1549 if (efer
& (EFER_LME
| EFER_LMA
) &&
1550 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1553 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1559 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1561 if (efer
& efer_reserved_bits
)
1564 return __kvm_valid_efer(vcpu
, efer
);
1566 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1568 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1570 u64 old_efer
= vcpu
->arch
.efer
;
1571 u64 efer
= msr_info
->data
;
1574 if (efer
& efer_reserved_bits
)
1577 if (!msr_info
->host_initiated
) {
1578 if (!__kvm_valid_efer(vcpu
, efer
))
1581 if (is_paging(vcpu
) &&
1582 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1587 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1589 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1595 /* Update reserved bits */
1596 if ((efer
^ old_efer
) & EFER_NX
)
1597 kvm_mmu_reset_context(vcpu
);
1602 void kvm_enable_efer_bits(u64 mask
)
1604 efer_reserved_bits
&= ~mask
;
1606 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1608 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1610 struct kvm_x86_msr_filter
*msr_filter
;
1611 struct msr_bitmap_range
*ranges
;
1612 struct kvm
*kvm
= vcpu
->kvm
;
1617 /* x2APIC MSRs do not support filtering. */
1618 if (index
>= 0x800 && index
<= 0x8ff)
1621 idx
= srcu_read_lock(&kvm
->srcu
);
1623 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1629 allowed
= msr_filter
->default_allow
;
1630 ranges
= msr_filter
->ranges
;
1632 for (i
= 0; i
< msr_filter
->count
; i
++) {
1633 u32 start
= ranges
[i
].base
;
1634 u32 end
= start
+ ranges
[i
].nmsrs
;
1635 u32 flags
= ranges
[i
].flags
;
1636 unsigned long *bitmap
= ranges
[i
].bitmap
;
1638 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1639 allowed
= !!test_bit(index
- start
, bitmap
);
1645 srcu_read_unlock(&kvm
->srcu
, idx
);
1649 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1652 * Write @data into the MSR specified by @index. Select MSR specific fault
1653 * checks are bypassed if @host_initiated is %true.
1654 * Returns 0 on success, non-0 otherwise.
1655 * Assumes vcpu_load() was already called.
1657 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1658 bool host_initiated
)
1660 struct msr_data msr
;
1662 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1663 return KVM_MSR_RET_FILTERED
;
1668 case MSR_KERNEL_GS_BASE
:
1671 if (is_noncanonical_address(data
, vcpu
))
1674 case MSR_IA32_SYSENTER_EIP
:
1675 case MSR_IA32_SYSENTER_ESP
:
1677 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1678 * non-canonical address is written on Intel but not on
1679 * AMD (which ignores the top 32-bits, because it does
1680 * not implement 64-bit SYSENTER).
1682 * 64-bit code should hence be able to write a non-canonical
1683 * value on AMD. Making the address canonical ensures that
1684 * vmentry does not fail on Intel after writing a non-canonical
1685 * value, and that something deterministic happens if the guest
1686 * invokes 64-bit SYSENTER.
1688 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1691 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1694 if (!host_initiated
&&
1695 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1696 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1700 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1701 * incomplete and conflicting architectural behavior. Current
1702 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1703 * reserved and always read as zeros. Enforce Intel's reserved
1704 * bits check if and only if the guest CPU is Intel, and clear
1705 * the bits in all other cases. This ensures cross-vendor
1706 * migration will provide consistent behavior for the guest.
1708 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1717 msr
.host_initiated
= host_initiated
;
1719 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1722 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1723 u32 index
, u64 data
, bool host_initiated
)
1725 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1727 if (ret
== KVM_MSR_RET_INVALID
)
1728 if (kvm_msr_ignored_check(index
, data
, true))
1735 * Read the MSR specified by @index into @data. Select MSR specific fault
1736 * checks are bypassed if @host_initiated is %true.
1737 * Returns 0 on success, non-0 otherwise.
1738 * Assumes vcpu_load() was already called.
1740 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1741 bool host_initiated
)
1743 struct msr_data msr
;
1746 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1747 return KVM_MSR_RET_FILTERED
;
1751 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1754 if (!host_initiated
&&
1755 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1756 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1762 msr
.host_initiated
= host_initiated
;
1764 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1770 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1771 u32 index
, u64
*data
, bool host_initiated
)
1773 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1775 if (ret
== KVM_MSR_RET_INVALID
) {
1776 /* Unconditionally clear *data for simplicity */
1778 if (kvm_msr_ignored_check(index
, 0, false))
1785 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1787 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1789 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1791 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1793 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1795 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1797 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1799 int err
= vcpu
->run
->msr
.error
;
1801 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1802 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1805 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, err
);
1808 static int complete_emulated_wrmsr(struct kvm_vcpu
*vcpu
)
1810 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
1813 static u64
kvm_msr_reason(int r
)
1816 case KVM_MSR_RET_INVALID
:
1817 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1818 case KVM_MSR_RET_FILTERED
:
1819 return KVM_MSR_EXIT_REASON_FILTER
;
1821 return KVM_MSR_EXIT_REASON_INVAL
;
1825 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1826 u32 exit_reason
, u64 data
,
1827 int (*completion
)(struct kvm_vcpu
*vcpu
),
1830 u64 msr_reason
= kvm_msr_reason(r
);
1832 /* Check if the user wanted to know about this MSR fault */
1833 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1836 vcpu
->run
->exit_reason
= exit_reason
;
1837 vcpu
->run
->msr
.error
= 0;
1838 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1839 vcpu
->run
->msr
.reason
= msr_reason
;
1840 vcpu
->run
->msr
.index
= index
;
1841 vcpu
->run
->msr
.data
= data
;
1842 vcpu
->arch
.complete_userspace_io
= completion
;
1847 static int kvm_get_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, int r
)
1849 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_RDMSR
, 0,
1850 complete_emulated_rdmsr
, r
);
1853 static int kvm_set_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
, int r
)
1855 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_WRMSR
, data
,
1856 complete_emulated_wrmsr
, r
);
1859 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1861 u32 ecx
= kvm_rcx_read(vcpu
);
1865 r
= kvm_get_msr(vcpu
, ecx
, &data
);
1867 /* MSR read failed? See if we should ask user space */
1868 if (r
&& kvm_get_msr_user_space(vcpu
, ecx
, r
)) {
1869 /* Bounce to user space */
1874 trace_kvm_msr_read(ecx
, data
);
1876 kvm_rax_write(vcpu
, data
& -1u);
1877 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1879 trace_kvm_msr_read_ex(ecx
);
1882 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1884 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1886 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1888 u32 ecx
= kvm_rcx_read(vcpu
);
1889 u64 data
= kvm_read_edx_eax(vcpu
);
1892 r
= kvm_set_msr(vcpu
, ecx
, data
);
1894 /* MSR write failed? See if we should ask user space */
1895 if (r
&& kvm_set_msr_user_space(vcpu
, ecx
, data
, r
))
1896 /* Bounce to user space */
1899 /* Signal all other negative errors to userspace */
1904 trace_kvm_msr_write(ecx
, data
);
1906 trace_kvm_msr_write_ex(ecx
, data
);
1908 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1910 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1912 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
1914 return kvm_skip_emulated_instruction(vcpu
);
1916 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop
);
1918 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
1920 /* Treat an INVD instruction as a NOP and just skip it. */
1921 return kvm_emulate_as_nop(vcpu
);
1923 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
1925 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
1927 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1928 return kvm_emulate_as_nop(vcpu
);
1930 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
1932 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
1934 kvm_queue_exception(vcpu
, UD_VECTOR
);
1937 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
1939 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
1941 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1942 return kvm_emulate_as_nop(vcpu
);
1944 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
1946 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
1948 xfer_to_guest_mode_prepare();
1949 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
1950 xfer_to_guest_mode_work_pending();
1954 * The fast path for frequent and performance sensitive wrmsr emulation,
1955 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1956 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1957 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1958 * other cases which must be called after interrupts are enabled on the host.
1960 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1962 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1965 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1966 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1967 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1968 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1971 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1972 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1973 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1974 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1981 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
1983 if (!kvm_can_use_hv_timer(vcpu
))
1986 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1990 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
1992 u32 msr
= kvm_rcx_read(vcpu
);
1994 fastpath_t ret
= EXIT_FASTPATH_NONE
;
1997 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
1998 data
= kvm_read_edx_eax(vcpu
);
1999 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
2000 kvm_skip_emulated_instruction(vcpu
);
2001 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
2004 case MSR_IA32_TSC_DEADLINE
:
2005 data
= kvm_read_edx_eax(vcpu
);
2006 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
2007 kvm_skip_emulated_instruction(vcpu
);
2008 ret
= EXIT_FASTPATH_REENTER_GUEST
;
2015 if (ret
!= EXIT_FASTPATH_NONE
)
2016 trace_kvm_msr_write(msr
, data
);
2020 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
2023 * Adapt set_msr() to msr_io()'s calling convention
2025 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2027 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
2030 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2032 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2035 #ifdef CONFIG_X86_64
2036 struct pvclock_clock
{
2046 struct pvclock_gtod_data
{
2049 struct pvclock_clock clock
; /* extract of a clocksource struct */
2050 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2056 static struct pvclock_gtod_data pvclock_gtod_data
;
2058 static void update_pvclock_gtod(struct timekeeper
*tk
)
2060 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2062 write_seqcount_begin(&vdata
->seq
);
2064 /* copy pvclock gtod data */
2065 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2066 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2067 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2068 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2069 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2070 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2071 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2073 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2074 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2075 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2076 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2077 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2078 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2079 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2081 vdata
->wall_time_sec
= tk
->xtime_sec
;
2083 vdata
->offs_boot
= tk
->offs_boot
;
2085 write_seqcount_end(&vdata
->seq
);
2088 static s64
get_kvmclock_base_ns(void)
2090 /* Count up from boot time, but with the frequency of the raw clock. */
2091 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2094 static s64
get_kvmclock_base_ns(void)
2096 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2097 return ktime_get_boottime_ns();
2101 void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2105 struct pvclock_wall_clock wc
;
2112 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2117 ++version
; /* first time write, random junk */
2121 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2125 * The guest calculates current wall clock time by adding
2126 * system time (updated by kvm_guest_time_update below) to the
2127 * wall clock specified here. We do the reverse here.
2129 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
2131 wc
.nsec
= do_div(wall_nsec
, 1000000000);
2132 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2133 wc
.version
= version
;
2135 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2138 wc_sec_hi
= wall_nsec
>> 32;
2139 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2140 &wc_sec_hi
, sizeof(wc_sec_hi
));
2144 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2147 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2148 bool old_msr
, bool host_initiated
)
2150 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2152 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2153 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2154 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2156 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2159 vcpu
->arch
.time
= system_time
;
2160 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2162 /* we verify if the enable bit is set... */
2163 vcpu
->arch
.pv_time_enabled
= false;
2164 if (!(system_time
& 1))
2167 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2168 &vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2169 sizeof(struct pvclock_vcpu_time_info
)))
2170 vcpu
->arch
.pv_time_enabled
= true;
2175 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2177 do_shl32_div32(dividend
, divisor
);
2181 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2182 s8
*pshift
, u32
*pmultiplier
)
2190 scaled64
= scaled_hz
;
2191 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2196 tps32
= (uint32_t)tps64
;
2197 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2198 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2206 *pmultiplier
= div_frac(scaled64
, tps32
);
2209 #ifdef CONFIG_X86_64
2210 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2213 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2214 static unsigned long max_tsc_khz
;
2216 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2218 u64 v
= (u64
)khz
* (1000000 + ppm
);
2223 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
);
2225 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2229 /* Guest TSC same frequency as host TSC? */
2231 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2235 /* TSC scaling supported? */
2236 if (!kvm_has_tsc_control
) {
2237 if (user_tsc_khz
> tsc_khz
) {
2238 vcpu
->arch
.tsc_catchup
= 1;
2239 vcpu
->arch
.tsc_always_catchup
= 1;
2242 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2247 /* TSC scaling required - calculate ratio */
2248 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2249 user_tsc_khz
, tsc_khz
);
2251 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2252 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2257 kvm_vcpu_write_tsc_multiplier(vcpu
, ratio
);
2261 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2263 u32 thresh_lo
, thresh_hi
;
2264 int use_scaling
= 0;
2266 /* tsc_khz can be zero if TSC calibration fails */
2267 if (user_tsc_khz
== 0) {
2268 /* set tsc_scaling_ratio to a safe value */
2269 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2273 /* Compute a scale to convert nanoseconds in TSC cycles */
2274 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2275 &vcpu
->arch
.virtual_tsc_shift
,
2276 &vcpu
->arch
.virtual_tsc_mult
);
2277 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2280 * Compute the variation in TSC rate which is acceptable
2281 * within the range of tolerance and decide if the
2282 * rate being applied is within that bounds of the hardware
2283 * rate. If so, no scaling or compensation need be done.
2285 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2286 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2287 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2288 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2291 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2294 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2296 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2297 vcpu
->arch
.virtual_tsc_mult
,
2298 vcpu
->arch
.virtual_tsc_shift
);
2299 tsc
+= vcpu
->arch
.this_tsc_write
;
2303 static inline int gtod_is_based_on_tsc(int mode
)
2305 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2308 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2310 #ifdef CONFIG_X86_64
2312 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2313 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2315 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2316 atomic_read(&vcpu
->kvm
->online_vcpus
));
2319 * Once the masterclock is enabled, always perform request in
2320 * order to update it.
2322 * In order to enable masterclock, the host clocksource must be TSC
2323 * and the vcpus need to have matched TSCs. When that happens,
2324 * perform request to enable masterclock.
2326 if (ka
->use_master_clock
||
2327 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2328 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2330 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2331 atomic_read(&vcpu
->kvm
->online_vcpus
),
2332 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2337 * Multiply tsc by a fixed point number represented by ratio.
2339 * The most significant 64-N bits (mult) of ratio represent the
2340 * integral part of the fixed point number; the remaining N bits
2341 * (frac) represent the fractional part, ie. ratio represents a fixed
2342 * point number (mult + frac * 2^(-N)).
2344 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2346 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2348 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2351 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
, u64 ratio
)
2355 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2356 _tsc
= __scale_tsc(ratio
, tsc
);
2360 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2362 static u64
kvm_compute_l1_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2366 tsc
= kvm_scale_tsc(vcpu
, rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
);
2368 return target_tsc
- tsc
;
2371 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2373 return vcpu
->arch
.l1_tsc_offset
+
2374 kvm_scale_tsc(vcpu
, host_tsc
, vcpu
->arch
.l1_tsc_scaling_ratio
);
2376 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2378 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
)
2382 if (l2_multiplier
== kvm_default_tsc_scaling_ratio
)
2383 nested_offset
= l1_offset
;
2385 nested_offset
= mul_s64_u64_shr((s64
) l1_offset
, l2_multiplier
,
2386 kvm_tsc_scaling_ratio_frac_bits
);
2388 nested_offset
+= l2_offset
;
2389 return nested_offset
;
2391 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset
);
2393 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
)
2395 if (l2_multiplier
!= kvm_default_tsc_scaling_ratio
)
2396 return mul_u64_u64_shr(l1_multiplier
, l2_multiplier
,
2397 kvm_tsc_scaling_ratio_frac_bits
);
2399 return l1_multiplier
;
2401 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier
);
2403 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 l1_offset
)
2405 trace_kvm_write_tsc_offset(vcpu
->vcpu_id
,
2406 vcpu
->arch
.l1_tsc_offset
,
2409 vcpu
->arch
.l1_tsc_offset
= l1_offset
;
2412 * If we are here because L1 chose not to trap WRMSR to TSC then
2413 * according to the spec this should set L1's TSC (as opposed to
2414 * setting L1's offset for L2).
2416 if (is_guest_mode(vcpu
))
2417 vcpu
->arch
.tsc_offset
= kvm_calc_nested_tsc_offset(
2419 static_call(kvm_x86_get_l2_tsc_offset
)(vcpu
),
2420 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2422 vcpu
->arch
.tsc_offset
= l1_offset
;
2424 static_call(kvm_x86_write_tsc_offset
)(vcpu
, vcpu
->arch
.tsc_offset
);
2427 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
)
2429 vcpu
->arch
.l1_tsc_scaling_ratio
= l1_multiplier
;
2431 /* Userspace is changing the multiplier while L2 is active */
2432 if (is_guest_mode(vcpu
))
2433 vcpu
->arch
.tsc_scaling_ratio
= kvm_calc_nested_tsc_multiplier(
2435 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2437 vcpu
->arch
.tsc_scaling_ratio
= l1_multiplier
;
2439 if (kvm_has_tsc_control
)
2440 static_call(kvm_x86_write_tsc_multiplier
)(
2441 vcpu
, vcpu
->arch
.tsc_scaling_ratio
);
2444 static inline bool kvm_check_tsc_unstable(void)
2446 #ifdef CONFIG_X86_64
2448 * TSC is marked unstable when we're running on Hyper-V,
2449 * 'TSC page' clocksource is good.
2451 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2454 return check_tsc_unstable();
2457 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2459 struct kvm
*kvm
= vcpu
->kvm
;
2460 u64 offset
, ns
, elapsed
;
2461 unsigned long flags
;
2463 bool already_matched
;
2464 bool synchronizing
= false;
2466 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2467 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2468 ns
= get_kvmclock_base_ns();
2469 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2471 if (vcpu
->arch
.virtual_tsc_khz
) {
2474 * detection of vcpu initialization -- need to sync
2475 * with other vCPUs. This particularly helps to keep
2476 * kvm_clock stable after CPU hotplug
2478 synchronizing
= true;
2480 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2481 nsec_to_cycles(vcpu
, elapsed
);
2482 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2484 * Special case: TSC write with a small delta (1 second)
2485 * of virtual cycle time against real time is
2486 * interpreted as an attempt to synchronize the CPU.
2488 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2489 data
+ tsc_hz
> tsc_exp
;
2494 * For a reliable TSC, we can match TSC offsets, and for an unstable
2495 * TSC, we add elapsed time in this computation. We could let the
2496 * compensation code attempt to catch up if we fall behind, but
2497 * it's better to try to match offsets from the beginning.
2499 if (synchronizing
&&
2500 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2501 if (!kvm_check_tsc_unstable()) {
2502 offset
= kvm
->arch
.cur_tsc_offset
;
2504 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2506 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2509 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2512 * We split periods of matched TSC writes into generations.
2513 * For each generation, we track the original measured
2514 * nanosecond time, offset, and write, so if TSCs are in
2515 * sync, we can match exact offset, and if not, we can match
2516 * exact software computation in compute_guest_tsc()
2518 * These values are tracked in kvm->arch.cur_xxx variables.
2520 kvm
->arch
.cur_tsc_generation
++;
2521 kvm
->arch
.cur_tsc_nsec
= ns
;
2522 kvm
->arch
.cur_tsc_write
= data
;
2523 kvm
->arch
.cur_tsc_offset
= offset
;
2528 * We also track th most recent recorded KHZ, write and time to
2529 * allow the matching interval to be extended at each write.
2531 kvm
->arch
.last_tsc_nsec
= ns
;
2532 kvm
->arch
.last_tsc_write
= data
;
2533 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2535 vcpu
->arch
.last_guest_tsc
= data
;
2537 /* Keep track of which generation this VCPU has synchronized to */
2538 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2539 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2540 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2542 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2543 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2545 raw_spin_lock_irqsave(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2547 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2548 } else if (!already_matched
) {
2549 kvm
->arch
.nr_vcpus_matched_tsc
++;
2552 kvm_track_tsc_matching(vcpu
);
2553 raw_spin_unlock_irqrestore(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2556 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2559 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2560 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2563 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2565 if (vcpu
->arch
.l1_tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2566 WARN_ON(adjustment
< 0);
2567 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
,
2568 vcpu
->arch
.l1_tsc_scaling_ratio
);
2569 adjust_tsc_offset_guest(vcpu
, adjustment
);
2572 #ifdef CONFIG_X86_64
2574 static u64
read_tsc(void)
2576 u64 ret
= (u64
)rdtsc_ordered();
2577 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2579 if (likely(ret
>= last
))
2583 * GCC likes to generate cmov here, but this branch is extremely
2584 * predictable (it's just a function of time and the likely is
2585 * very likely) and there's a data dependence, so force GCC
2586 * to generate a branch instead. I don't barrier() because
2587 * we don't actually need a barrier, and if this function
2588 * ever gets inlined it will generate worse code.
2594 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2600 switch (clock
->vclock_mode
) {
2601 case VDSO_CLOCKMODE_HVCLOCK
:
2602 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2604 if (tsc_pg_val
!= U64_MAX
) {
2605 /* TSC page valid */
2606 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2607 v
= (tsc_pg_val
- clock
->cycle_last
) &
2610 /* TSC page invalid */
2611 *mode
= VDSO_CLOCKMODE_NONE
;
2614 case VDSO_CLOCKMODE_TSC
:
2615 *mode
= VDSO_CLOCKMODE_TSC
;
2616 *tsc_timestamp
= read_tsc();
2617 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2621 *mode
= VDSO_CLOCKMODE_NONE
;
2624 if (*mode
== VDSO_CLOCKMODE_NONE
)
2625 *tsc_timestamp
= v
= 0;
2627 return v
* clock
->mult
;
2630 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2632 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2638 seq
= read_seqcount_begin(>od
->seq
);
2639 ns
= gtod
->raw_clock
.base_cycles
;
2640 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2641 ns
>>= gtod
->raw_clock
.shift
;
2642 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2643 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2649 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2651 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2657 seq
= read_seqcount_begin(>od
->seq
);
2658 ts
->tv_sec
= gtod
->wall_time_sec
;
2659 ns
= gtod
->clock
.base_cycles
;
2660 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2661 ns
>>= gtod
->clock
.shift
;
2662 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2664 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2670 /* returns true if host is using TSC based clocksource */
2671 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2673 /* checked again under seqlock below */
2674 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2677 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2681 /* returns true if host is using TSC based clocksource */
2682 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2685 /* checked again under seqlock below */
2686 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2689 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2695 * Assuming a stable TSC across physical CPUS, and a stable TSC
2696 * across virtual CPUs, the following condition is possible.
2697 * Each numbered line represents an event visible to both
2698 * CPUs at the next numbered event.
2700 * "timespecX" represents host monotonic time. "tscX" represents
2703 * VCPU0 on CPU0 | VCPU1 on CPU1
2705 * 1. read timespec0,tsc0
2706 * 2. | timespec1 = timespec0 + N
2708 * 3. transition to guest | transition to guest
2709 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2710 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2711 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2713 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2716 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2718 * - 0 < N - M => M < N
2720 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2721 * always the case (the difference between two distinct xtime instances
2722 * might be smaller then the difference between corresponding TSC reads,
2723 * when updating guest vcpus pvclock areas).
2725 * To avoid that problem, do not allow visibility of distinct
2726 * system_timestamp/tsc_timestamp values simultaneously: use a master
2727 * copy of host monotonic time values. Update that master copy
2730 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2734 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2736 #ifdef CONFIG_X86_64
2737 struct kvm_arch
*ka
= &kvm
->arch
;
2739 bool host_tsc_clocksource
, vcpus_matched
;
2741 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2742 atomic_read(&kvm
->online_vcpus
));
2745 * If the host uses TSC clock, then passthrough TSC as stable
2748 host_tsc_clocksource
= kvm_get_time_and_clockread(
2749 &ka
->master_kernel_ns
,
2750 &ka
->master_cycle_now
);
2752 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2753 && !ka
->backwards_tsc_observed
2754 && !ka
->boot_vcpu_runs_old_kvmclock
;
2756 if (ka
->use_master_clock
)
2757 atomic_set(&kvm_guest_has_master_clock
, 1);
2759 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2760 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2765 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2767 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2770 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2772 #ifdef CONFIG_X86_64
2774 struct kvm_vcpu
*vcpu
;
2775 struct kvm_arch
*ka
= &kvm
->arch
;
2776 unsigned long flags
;
2778 kvm_hv_invalidate_tsc_page(kvm
);
2780 kvm_make_mclock_inprogress_request(kvm
);
2782 /* no guest entries from this point */
2783 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2784 pvclock_update_vm_gtod_copy(kvm
);
2785 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2787 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2788 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2790 /* guest entries allowed */
2791 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2792 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2796 u64
get_kvmclock_ns(struct kvm
*kvm
)
2798 struct kvm_arch
*ka
= &kvm
->arch
;
2799 struct pvclock_vcpu_time_info hv_clock
;
2800 unsigned long flags
;
2803 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2804 if (!ka
->use_master_clock
) {
2805 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2806 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2809 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2810 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2811 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2813 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2816 if (__this_cpu_read(cpu_tsc_khz
)) {
2817 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2818 &hv_clock
.tsc_shift
,
2819 &hv_clock
.tsc_to_system_mul
);
2820 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2822 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2829 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
,
2830 struct gfn_to_hva_cache
*cache
,
2831 unsigned int offset
)
2833 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2834 struct pvclock_vcpu_time_info guest_hv_clock
;
2836 if (unlikely(kvm_read_guest_offset_cached(v
->kvm
, cache
,
2837 &guest_hv_clock
, offset
, sizeof(guest_hv_clock
))))
2840 /* This VCPU is paused, but it's legal for a guest to read another
2841 * VCPU's kvmclock, so we really have to follow the specification where
2842 * it says that version is odd if data is being modified, and even after
2845 * Version field updates must be kept separate. This is because
2846 * kvm_write_guest_cached might use a "rep movs" instruction, and
2847 * writes within a string instruction are weakly ordered. So there
2848 * are three writes overall.
2850 * As a small optimization, only write the version field in the first
2851 * and third write. The vcpu->pv_time cache is still valid, because the
2852 * version field is the first in the struct.
2854 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2856 if (guest_hv_clock
.version
& 1)
2857 ++guest_hv_clock
.version
; /* first time write, random junk */
2859 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2860 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2861 &vcpu
->hv_clock
, offset
,
2862 sizeof(vcpu
->hv_clock
.version
));
2866 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2867 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2869 if (vcpu
->pvclock_set_guest_stopped_request
) {
2870 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2871 vcpu
->pvclock_set_guest_stopped_request
= false;
2874 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2876 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2877 &vcpu
->hv_clock
, offset
,
2878 sizeof(vcpu
->hv_clock
));
2882 vcpu
->hv_clock
.version
++;
2883 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2884 &vcpu
->hv_clock
, offset
,
2885 sizeof(vcpu
->hv_clock
.version
));
2888 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2890 unsigned long flags
, tgt_tsc_khz
;
2891 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2892 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2894 u64 tsc_timestamp
, host_tsc
;
2896 bool use_master_clock
;
2902 * If the host uses TSC clock, then passthrough TSC as stable
2905 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2906 use_master_clock
= ka
->use_master_clock
;
2907 if (use_master_clock
) {
2908 host_tsc
= ka
->master_cycle_now
;
2909 kernel_ns
= ka
->master_kernel_ns
;
2911 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2913 /* Keep irq disabled to prevent changes to the clock */
2914 local_irq_save(flags
);
2915 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2916 if (unlikely(tgt_tsc_khz
== 0)) {
2917 local_irq_restore(flags
);
2918 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2921 if (!use_master_clock
) {
2923 kernel_ns
= get_kvmclock_base_ns();
2926 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2929 * We may have to catch up the TSC to match elapsed wall clock
2930 * time for two reasons, even if kvmclock is used.
2931 * 1) CPU could have been running below the maximum TSC rate
2932 * 2) Broken TSC compensation resets the base at each VCPU
2933 * entry to avoid unknown leaps of TSC even when running
2934 * again on the same CPU. This may cause apparent elapsed
2935 * time to disappear, and the guest to stand still or run
2938 if (vcpu
->tsc_catchup
) {
2939 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2940 if (tsc
> tsc_timestamp
) {
2941 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2942 tsc_timestamp
= tsc
;
2946 local_irq_restore(flags
);
2948 /* With all the info we got, fill in the values */
2950 if (kvm_has_tsc_control
)
2951 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
,
2952 v
->arch
.l1_tsc_scaling_ratio
);
2954 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2955 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2956 &vcpu
->hv_clock
.tsc_shift
,
2957 &vcpu
->hv_clock
.tsc_to_system_mul
);
2958 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2961 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2962 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2963 vcpu
->last_guest_tsc
= tsc_timestamp
;
2965 /* If the host uses TSC clocksource, then it is stable */
2967 if (use_master_clock
)
2968 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2970 vcpu
->hv_clock
.flags
= pvclock_flags
;
2972 if (vcpu
->pv_time_enabled
)
2973 kvm_setup_pvclock_page(v
, &vcpu
->pv_time
, 0);
2974 if (vcpu
->xen
.vcpu_info_set
)
2975 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_info_cache
,
2976 offsetof(struct compat_vcpu_info
, time
));
2977 if (vcpu
->xen
.vcpu_time_info_set
)
2978 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0);
2980 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2985 * kvmclock updates which are isolated to a given vcpu, such as
2986 * vcpu->cpu migration, should not allow system_timestamp from
2987 * the rest of the vcpus to remain static. Otherwise ntp frequency
2988 * correction applies to one vcpu's system_timestamp but not
2991 * So in those cases, request a kvmclock update for all vcpus.
2992 * We need to rate-limit these requests though, as they can
2993 * considerably slow guests that have a large number of vcpus.
2994 * The time for a remote vcpu to update its kvmclock is bound
2995 * by the delay we use to rate-limit the updates.
2998 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3000 static void kvmclock_update_fn(struct work_struct
*work
)
3003 struct delayed_work
*dwork
= to_delayed_work(work
);
3004 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3005 kvmclock_update_work
);
3006 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3007 struct kvm_vcpu
*vcpu
;
3009 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3010 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3011 kvm_vcpu_kick(vcpu
);
3015 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
3017 struct kvm
*kvm
= v
->kvm
;
3019 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3020 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
3021 KVMCLOCK_UPDATE_DELAY
);
3024 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3026 static void kvmclock_sync_fn(struct work_struct
*work
)
3028 struct delayed_work
*dwork
= to_delayed_work(work
);
3029 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3030 kvmclock_sync_work
);
3031 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3033 if (!kvmclock_periodic_sync
)
3036 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
3037 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
3038 KVMCLOCK_SYNC_PERIOD
);
3042 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3044 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
3046 /* McStatusWrEn enabled? */
3047 if (guest_cpuid_is_amd_or_hygon(vcpu
))
3048 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
3053 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3055 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3056 unsigned bank_num
= mcg_cap
& 0xff;
3057 u32 msr
= msr_info
->index
;
3058 u64 data
= msr_info
->data
;
3061 case MSR_IA32_MCG_STATUS
:
3062 vcpu
->arch
.mcg_status
= data
;
3064 case MSR_IA32_MCG_CTL
:
3065 if (!(mcg_cap
& MCG_CTL_P
) &&
3066 (data
|| !msr_info
->host_initiated
))
3068 if (data
!= 0 && data
!= ~(u64
)0)
3070 vcpu
->arch
.mcg_ctl
= data
;
3073 if (msr
>= MSR_IA32_MC0_CTL
&&
3074 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3075 u32 offset
= array_index_nospec(
3076 msr
- MSR_IA32_MC0_CTL
,
3077 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3079 /* only 0 or all 1s can be written to IA32_MCi_CTL
3080 * some Linux kernels though clear bit 10 in bank 4 to
3081 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3082 * this to avoid an uncatched #GP in the guest
3084 if ((offset
& 0x3) == 0 &&
3085 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
3089 if (!msr_info
->host_initiated
&&
3090 (offset
& 0x3) == 1 && data
!= 0) {
3091 if (!can_set_mci_status(vcpu
))
3095 vcpu
->arch
.mce_banks
[offset
] = data
;
3103 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3105 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3107 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3110 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3112 gpa_t gpa
= data
& ~0x3f;
3114 /* Bits 4:5 are reserved, Should be zero */
3118 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3119 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3122 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3123 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3126 if (!lapic_in_kernel(vcpu
))
3127 return data
? 1 : 0;
3129 vcpu
->arch
.apf
.msr_en_val
= data
;
3131 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3132 kvm_clear_async_pf_completion_queue(vcpu
);
3133 kvm_async_pf_hash_reset(vcpu
);
3137 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3141 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3142 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3144 kvm_async_pf_wakeup_all(vcpu
);
3149 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3151 /* Bits 8-63 are reserved */
3155 if (!lapic_in_kernel(vcpu
))
3158 vcpu
->arch
.apf
.msr_int_val
= data
;
3160 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3165 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3167 vcpu
->arch
.pv_time_enabled
= false;
3168 vcpu
->arch
.time
= 0;
3171 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3173 ++vcpu
->stat
.tlb_flush
;
3174 static_call(kvm_x86_tlb_flush_all
)(vcpu
);
3177 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3179 ++vcpu
->stat
.tlb_flush
;
3183 * A TLB flush on behalf of the guest is equivalent to
3184 * INVPCID(all), toggling CR4.PGE, etc., which requires
3185 * a forced sync of the shadow page tables. Unload the
3186 * entire MMU here and the subsequent load will sync the
3187 * shadow page tables, and also flush the TLB.
3189 kvm_mmu_unload(vcpu
);
3193 static_call(kvm_x86_tlb_flush_guest
)(vcpu
);
3197 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu
*vcpu
)
3199 ++vcpu
->stat
.tlb_flush
;
3200 static_call(kvm_x86_tlb_flush_current
)(vcpu
);
3204 * Service "local" TLB flush requests, which are specific to the current MMU
3205 * context. In addition to the generic event handling in vcpu_enter_guest(),
3206 * TLB flushes that are targeted at an MMU context also need to be serviced
3207 * prior before nested VM-Enter/VM-Exit.
3209 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu
*vcpu
)
3211 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
3212 kvm_vcpu_flush_tlb_current(vcpu
);
3214 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
3215 kvm_vcpu_flush_tlb_guest(vcpu
);
3217 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests
);
3219 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3221 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3222 struct kvm_steal_time __user
*st
;
3223 struct kvm_memslots
*slots
;
3227 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3228 kvm_xen_runstate_set_running(vcpu
);
3232 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3235 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3238 slots
= kvm_memslots(vcpu
->kvm
);
3240 if (unlikely(slots
->generation
!= ghc
->generation
||
3241 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3242 gfn_t gfn
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3244 /* We rely on the fact that it fits in a single page. */
3245 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3247 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gfn
, sizeof(*st
)) ||
3248 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3252 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3254 * Doing a TLB flush here, on the guest's behalf, can avoid
3257 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3258 u8 st_preempted
= 0;
3261 if (!user_access_begin(st
, sizeof(*st
)))
3264 asm volatile("1: xchgb %0, %2\n"
3267 _ASM_EXTABLE_UA(1b
, 2b
)
3268 : "+q" (st_preempted
),
3270 "+m" (st
->preempted
));
3276 vcpu
->arch
.st
.preempted
= 0;
3278 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3279 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3280 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3281 kvm_vcpu_flush_tlb_guest(vcpu
);
3283 if (!user_access_begin(st
, sizeof(*st
)))
3286 if (!user_access_begin(st
, sizeof(*st
)))
3289 unsafe_put_user(0, &st
->preempted
, out
);
3290 vcpu
->arch
.st
.preempted
= 0;
3293 unsafe_get_user(version
, &st
->version
, out
);
3295 version
+= 1; /* first time write, random junk */
3298 unsafe_put_user(version
, &st
->version
, out
);
3302 unsafe_get_user(steal
, &st
->steal
, out
);
3303 steal
+= current
->sched_info
.run_delay
-
3304 vcpu
->arch
.st
.last_steal
;
3305 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3306 unsafe_put_user(steal
, &st
->steal
, out
);
3309 unsafe_put_user(version
, &st
->version
, out
);
3314 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3317 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3320 u32 msr
= msr_info
->index
;
3321 u64 data
= msr_info
->data
;
3323 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3324 return kvm_xen_write_hypercall_page(vcpu
, data
);
3327 case MSR_AMD64_NB_CFG
:
3328 case MSR_IA32_UCODE_WRITE
:
3329 case MSR_VM_HSAVE_PA
:
3330 case MSR_AMD64_PATCH_LOADER
:
3331 case MSR_AMD64_BU_CFG2
:
3332 case MSR_AMD64_DC_CFG
:
3333 case MSR_F15H_EX_CFG
:
3336 case MSR_IA32_UCODE_REV
:
3337 if (msr_info
->host_initiated
)
3338 vcpu
->arch
.microcode_version
= data
;
3340 case MSR_IA32_ARCH_CAPABILITIES
:
3341 if (!msr_info
->host_initiated
)
3343 vcpu
->arch
.arch_capabilities
= data
;
3345 case MSR_IA32_PERF_CAPABILITIES
: {
3346 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3348 if (!msr_info
->host_initiated
)
3350 if (guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
) && kvm_get_msr_feature(&msr_ent
))
3352 if (data
& ~msr_ent
.data
)
3355 vcpu
->arch
.perf_capabilities
= data
;
3360 return set_efer(vcpu
, msr_info
);
3362 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3363 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3364 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3366 /* Handle McStatusWrEn */
3367 if (data
== BIT_ULL(18)) {
3368 vcpu
->arch
.msr_hwcr
= data
;
3369 } else if (data
!= 0) {
3370 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3375 case MSR_FAM10H_MMIO_CONF_BASE
:
3377 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3382 case 0x200 ... 0x2ff:
3383 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3384 case MSR_IA32_APICBASE
:
3385 return kvm_set_apic_base(vcpu
, msr_info
);
3386 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3387 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3388 case MSR_IA32_TSC_DEADLINE
:
3389 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3391 case MSR_IA32_TSC_ADJUST
:
3392 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3393 if (!msr_info
->host_initiated
) {
3394 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3395 adjust_tsc_offset_guest(vcpu
, adj
);
3396 /* Before back to guest, tsc_timestamp must be adjusted
3397 * as well, otherwise guest's percpu pvclock time could jump.
3399 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3401 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3404 case MSR_IA32_MISC_ENABLE
:
3405 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3406 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3407 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3409 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3410 kvm_update_cpuid_runtime(vcpu
);
3412 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3415 case MSR_IA32_SMBASE
:
3416 if (!msr_info
->host_initiated
)
3418 vcpu
->arch
.smbase
= data
;
3420 case MSR_IA32_POWER_CTL
:
3421 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3424 if (msr_info
->host_initiated
) {
3425 kvm_synchronize_tsc(vcpu
, data
);
3427 u64 adj
= kvm_compute_l1_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3428 adjust_tsc_offset_guest(vcpu
, adj
);
3429 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3433 if (!msr_info
->host_initiated
&&
3434 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3437 * KVM supports exposing PT to the guest, but does not support
3438 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3439 * XSAVES/XRSTORS to save/restore PT MSRs.
3441 if (data
& ~supported_xss
)
3443 vcpu
->arch
.ia32_xss
= data
;
3446 if (!msr_info
->host_initiated
)
3448 vcpu
->arch
.smi_count
= data
;
3450 case MSR_KVM_WALL_CLOCK_NEW
:
3451 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3454 vcpu
->kvm
->arch
.wall_clock
= data
;
3455 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3457 case MSR_KVM_WALL_CLOCK
:
3458 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3461 vcpu
->kvm
->arch
.wall_clock
= data
;
3462 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3464 case MSR_KVM_SYSTEM_TIME_NEW
:
3465 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3468 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3470 case MSR_KVM_SYSTEM_TIME
:
3471 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3474 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3476 case MSR_KVM_ASYNC_PF_EN
:
3477 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3480 if (kvm_pv_enable_async_pf(vcpu
, data
))
3483 case MSR_KVM_ASYNC_PF_INT
:
3484 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3487 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3490 case MSR_KVM_ASYNC_PF_ACK
:
3491 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3494 vcpu
->arch
.apf
.pageready_pending
= false;
3495 kvm_check_async_pf_completion(vcpu
);
3498 case MSR_KVM_STEAL_TIME
:
3499 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3502 if (unlikely(!sched_info_on()))
3505 if (data
& KVM_STEAL_RESERVED_MASK
)
3508 vcpu
->arch
.st
.msr_val
= data
;
3510 if (!(data
& KVM_MSR_ENABLED
))
3513 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3516 case MSR_KVM_PV_EOI_EN
:
3517 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3520 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
3524 case MSR_KVM_POLL_CONTROL
:
3525 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3528 /* only enable bit supported */
3529 if (data
& (-1ULL << 1))
3532 vcpu
->arch
.msr_kvm_poll_control
= data
;
3535 case MSR_IA32_MCG_CTL
:
3536 case MSR_IA32_MCG_STATUS
:
3537 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3538 return set_msr_mce(vcpu
, msr_info
);
3540 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3541 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3544 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3545 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3546 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3547 return kvm_pmu_set_msr(vcpu
, msr_info
);
3549 if (pr
|| data
!= 0)
3550 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3551 "0x%x data 0x%llx\n", msr
, data
);
3553 case MSR_K7_CLK_CTL
:
3555 * Ignore all writes to this no longer documented MSR.
3556 * Writes are only relevant for old K7 processors,
3557 * all pre-dating SVM, but a recommended workaround from
3558 * AMD for these chips. It is possible to specify the
3559 * affected processor models on the command line, hence
3560 * the need to ignore the workaround.
3563 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3564 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3565 case HV_X64_MSR_SYNDBG_OPTIONS
:
3566 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3567 case HV_X64_MSR_CRASH_CTL
:
3568 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3569 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3570 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3571 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3572 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3573 msr_info
->host_initiated
);
3574 case MSR_IA32_BBL_CR_CTL3
:
3575 /* Drop writes to this legacy MSR -- see rdmsr
3576 * counterpart for further detail.
3578 if (report_ignored_msrs
)
3579 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3582 case MSR_AMD64_OSVW_ID_LENGTH
:
3583 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3585 vcpu
->arch
.osvw
.length
= data
;
3587 case MSR_AMD64_OSVW_STATUS
:
3588 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3590 vcpu
->arch
.osvw
.status
= data
;
3592 case MSR_PLATFORM_INFO
:
3593 if (!msr_info
->host_initiated
||
3594 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3595 cpuid_fault_enabled(vcpu
)))
3597 vcpu
->arch
.msr_platform_info
= data
;
3599 case MSR_MISC_FEATURES_ENABLES
:
3600 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3601 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3602 !supports_cpuid_fault(vcpu
)))
3604 vcpu
->arch
.msr_misc_features_enables
= data
;
3607 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3608 return kvm_pmu_set_msr(vcpu
, msr_info
);
3609 return KVM_MSR_RET_INVALID
;
3613 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3615 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3618 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3619 unsigned bank_num
= mcg_cap
& 0xff;
3622 case MSR_IA32_P5_MC_ADDR
:
3623 case MSR_IA32_P5_MC_TYPE
:
3626 case MSR_IA32_MCG_CAP
:
3627 data
= vcpu
->arch
.mcg_cap
;
3629 case MSR_IA32_MCG_CTL
:
3630 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3632 data
= vcpu
->arch
.mcg_ctl
;
3634 case MSR_IA32_MCG_STATUS
:
3635 data
= vcpu
->arch
.mcg_status
;
3638 if (msr
>= MSR_IA32_MC0_CTL
&&
3639 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3640 u32 offset
= array_index_nospec(
3641 msr
- MSR_IA32_MC0_CTL
,
3642 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3644 data
= vcpu
->arch
.mce_banks
[offset
];
3653 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3655 switch (msr_info
->index
) {
3656 case MSR_IA32_PLATFORM_ID
:
3657 case MSR_IA32_EBL_CR_POWERON
:
3658 case MSR_IA32_LASTBRANCHFROMIP
:
3659 case MSR_IA32_LASTBRANCHTOIP
:
3660 case MSR_IA32_LASTINTFROMIP
:
3661 case MSR_IA32_LASTINTTOIP
:
3662 case MSR_AMD64_SYSCFG
:
3663 case MSR_K8_TSEG_ADDR
:
3664 case MSR_K8_TSEG_MASK
:
3665 case MSR_VM_HSAVE_PA
:
3666 case MSR_K8_INT_PENDING_MSG
:
3667 case MSR_AMD64_NB_CFG
:
3668 case MSR_FAM10H_MMIO_CONF_BASE
:
3669 case MSR_AMD64_BU_CFG2
:
3670 case MSR_IA32_PERF_CTL
:
3671 case MSR_AMD64_DC_CFG
:
3672 case MSR_F15H_EX_CFG
:
3674 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3675 * limit) MSRs. Just return 0, as we do not want to expose the host
3676 * data here. Do not conditionalize this on CPUID, as KVM does not do
3677 * so for existing CPU-specific MSRs.
3679 case MSR_RAPL_POWER_UNIT
:
3680 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3681 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3682 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3683 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3686 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3687 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3688 return kvm_pmu_get_msr(vcpu
, msr_info
);
3689 if (!msr_info
->host_initiated
)
3693 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3694 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3695 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3696 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3697 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3698 return kvm_pmu_get_msr(vcpu
, msr_info
);
3701 case MSR_IA32_UCODE_REV
:
3702 msr_info
->data
= vcpu
->arch
.microcode_version
;
3704 case MSR_IA32_ARCH_CAPABILITIES
:
3705 if (!msr_info
->host_initiated
&&
3706 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3708 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3710 case MSR_IA32_PERF_CAPABILITIES
:
3711 if (!msr_info
->host_initiated
&&
3712 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3714 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3716 case MSR_IA32_POWER_CTL
:
3717 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3719 case MSR_IA32_TSC
: {
3721 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3722 * even when not intercepted. AMD manual doesn't explicitly
3723 * state this but appears to behave the same.
3725 * On userspace reads and writes, however, we unconditionally
3726 * return L1's TSC value to ensure backwards-compatible
3727 * behavior for migration.
3731 if (msr_info
->host_initiated
) {
3732 offset
= vcpu
->arch
.l1_tsc_offset
;
3733 ratio
= vcpu
->arch
.l1_tsc_scaling_ratio
;
3735 offset
= vcpu
->arch
.tsc_offset
;
3736 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
3739 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc(), ratio
) + offset
;
3743 case 0x200 ... 0x2ff:
3744 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3745 case 0xcd: /* fsb frequency */
3749 * MSR_EBC_FREQUENCY_ID
3750 * Conservative value valid for even the basic CPU models.
3751 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3752 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3753 * and 266MHz for model 3, or 4. Set Core Clock
3754 * Frequency to System Bus Frequency Ratio to 1 (bits
3755 * 31:24) even though these are only valid for CPU
3756 * models > 2, however guests may end up dividing or
3757 * multiplying by zero otherwise.
3759 case MSR_EBC_FREQUENCY_ID
:
3760 msr_info
->data
= 1 << 24;
3762 case MSR_IA32_APICBASE
:
3763 msr_info
->data
= kvm_get_apic_base(vcpu
);
3765 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3766 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3767 case MSR_IA32_TSC_DEADLINE
:
3768 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3770 case MSR_IA32_TSC_ADJUST
:
3771 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3773 case MSR_IA32_MISC_ENABLE
:
3774 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3776 case MSR_IA32_SMBASE
:
3777 if (!msr_info
->host_initiated
)
3779 msr_info
->data
= vcpu
->arch
.smbase
;
3782 msr_info
->data
= vcpu
->arch
.smi_count
;
3784 case MSR_IA32_PERF_STATUS
:
3785 /* TSC increment by tick */
3786 msr_info
->data
= 1000ULL;
3787 /* CPU multiplier */
3788 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3791 msr_info
->data
= vcpu
->arch
.efer
;
3793 case MSR_KVM_WALL_CLOCK
:
3794 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3797 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3799 case MSR_KVM_WALL_CLOCK_NEW
:
3800 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3803 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3805 case MSR_KVM_SYSTEM_TIME
:
3806 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3809 msr_info
->data
= vcpu
->arch
.time
;
3811 case MSR_KVM_SYSTEM_TIME_NEW
:
3812 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3815 msr_info
->data
= vcpu
->arch
.time
;
3817 case MSR_KVM_ASYNC_PF_EN
:
3818 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3821 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
3823 case MSR_KVM_ASYNC_PF_INT
:
3824 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3827 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
3829 case MSR_KVM_ASYNC_PF_ACK
:
3830 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3835 case MSR_KVM_STEAL_TIME
:
3836 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3839 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3841 case MSR_KVM_PV_EOI_EN
:
3842 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3845 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3847 case MSR_KVM_POLL_CONTROL
:
3848 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3851 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3853 case MSR_IA32_P5_MC_ADDR
:
3854 case MSR_IA32_P5_MC_TYPE
:
3855 case MSR_IA32_MCG_CAP
:
3856 case MSR_IA32_MCG_CTL
:
3857 case MSR_IA32_MCG_STATUS
:
3858 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3859 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3860 msr_info
->host_initiated
);
3862 if (!msr_info
->host_initiated
&&
3863 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3865 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3867 case MSR_K7_CLK_CTL
:
3869 * Provide expected ramp-up count for K7. All other
3870 * are set to zero, indicating minimum divisors for
3873 * This prevents guest kernels on AMD host with CPU
3874 * type 6, model 8 and higher from exploding due to
3875 * the rdmsr failing.
3877 msr_info
->data
= 0x20000000;
3879 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3880 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3881 case HV_X64_MSR_SYNDBG_OPTIONS
:
3882 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3883 case HV_X64_MSR_CRASH_CTL
:
3884 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3885 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3886 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3887 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3888 return kvm_hv_get_msr_common(vcpu
,
3889 msr_info
->index
, &msr_info
->data
,
3890 msr_info
->host_initiated
);
3891 case MSR_IA32_BBL_CR_CTL3
:
3892 /* This legacy MSR exists but isn't fully documented in current
3893 * silicon. It is however accessed by winxp in very narrow
3894 * scenarios where it sets bit #19, itself documented as
3895 * a "reserved" bit. Best effort attempt to source coherent
3896 * read data here should the balance of the register be
3897 * interpreted by the guest:
3899 * L2 cache control register 3: 64GB range, 256KB size,
3900 * enabled, latency 0x1, configured
3902 msr_info
->data
= 0xbe702111;
3904 case MSR_AMD64_OSVW_ID_LENGTH
:
3905 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3907 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3909 case MSR_AMD64_OSVW_STATUS
:
3910 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3912 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3914 case MSR_PLATFORM_INFO
:
3915 if (!msr_info
->host_initiated
&&
3916 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3918 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3920 case MSR_MISC_FEATURES_ENABLES
:
3921 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3924 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3927 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3928 return kvm_pmu_get_msr(vcpu
, msr_info
);
3929 return KVM_MSR_RET_INVALID
;
3933 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3936 * Read or write a bunch of msrs. All parameters are kernel addresses.
3938 * @return number of msrs set successfully.
3940 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3941 struct kvm_msr_entry
*entries
,
3942 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3943 unsigned index
, u64
*data
))
3947 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3948 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3955 * Read or write a bunch of msrs. Parameters are user addresses.
3957 * @return number of msrs set successfully.
3959 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3960 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3961 unsigned index
, u64
*data
),
3964 struct kvm_msrs msrs
;
3965 struct kvm_msr_entry
*entries
;
3970 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3974 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3977 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3978 entries
= memdup_user(user_msrs
->entries
, size
);
3979 if (IS_ERR(entries
)) {
3980 r
= PTR_ERR(entries
);
3984 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
3989 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
4000 static inline bool kvm_can_mwait_in_guest(void)
4002 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
4003 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
4004 boot_cpu_has(X86_FEATURE_ARAT
);
4007 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
4008 struct kvm_cpuid2 __user
*cpuid_arg
)
4010 struct kvm_cpuid2 cpuid
;
4014 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4017 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4022 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4028 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
4033 case KVM_CAP_IRQCHIP
:
4035 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
4036 case KVM_CAP_SET_TSS_ADDR
:
4037 case KVM_CAP_EXT_CPUID
:
4038 case KVM_CAP_EXT_EMUL_CPUID
:
4039 case KVM_CAP_CLOCKSOURCE
:
4041 case KVM_CAP_NOP_IO_DELAY
:
4042 case KVM_CAP_MP_STATE
:
4043 case KVM_CAP_SYNC_MMU
:
4044 case KVM_CAP_USER_NMI
:
4045 case KVM_CAP_REINJECT_CONTROL
:
4046 case KVM_CAP_IRQ_INJECT_STATUS
:
4047 case KVM_CAP_IOEVENTFD
:
4048 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
4050 case KVM_CAP_PIT_STATE2
:
4051 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
4052 case KVM_CAP_VCPU_EVENTS
:
4053 case KVM_CAP_HYPERV
:
4054 case KVM_CAP_HYPERV_VAPIC
:
4055 case KVM_CAP_HYPERV_SPIN
:
4056 case KVM_CAP_HYPERV_SYNIC
:
4057 case KVM_CAP_HYPERV_SYNIC2
:
4058 case KVM_CAP_HYPERV_VP_INDEX
:
4059 case KVM_CAP_HYPERV_EVENTFD
:
4060 case KVM_CAP_HYPERV_TLBFLUSH
:
4061 case KVM_CAP_HYPERV_SEND_IPI
:
4062 case KVM_CAP_HYPERV_CPUID
:
4063 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4064 case KVM_CAP_SYS_HYPERV_CPUID
:
4065 case KVM_CAP_PCI_SEGMENT
:
4066 case KVM_CAP_DEBUGREGS
:
4067 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
4069 case KVM_CAP_ASYNC_PF
:
4070 case KVM_CAP_ASYNC_PF_INT
:
4071 case KVM_CAP_GET_TSC_KHZ
:
4072 case KVM_CAP_KVMCLOCK_CTRL
:
4073 case KVM_CAP_READONLY_MEM
:
4074 case KVM_CAP_HYPERV_TIME
:
4075 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
4076 case KVM_CAP_TSC_DEADLINE_TIMER
:
4077 case KVM_CAP_DISABLE_QUIRKS
:
4078 case KVM_CAP_SET_BOOT_CPU_ID
:
4079 case KVM_CAP_SPLIT_IRQCHIP
:
4080 case KVM_CAP_IMMEDIATE_EXIT
:
4081 case KVM_CAP_PMU_EVENT_FILTER
:
4082 case KVM_CAP_GET_MSR_FEATURES
:
4083 case KVM_CAP_MSR_PLATFORM_INFO
:
4084 case KVM_CAP_EXCEPTION_PAYLOAD
:
4085 case KVM_CAP_SET_GUEST_DEBUG
:
4086 case KVM_CAP_LAST_CPU
:
4087 case KVM_CAP_X86_USER_SPACE_MSR
:
4088 case KVM_CAP_X86_MSR_FILTER
:
4089 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4090 #ifdef CONFIG_X86_SGX_KVM
4091 case KVM_CAP_SGX_ATTRIBUTE
:
4093 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
4094 case KVM_CAP_SREGS2
:
4095 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
4098 case KVM_CAP_EXIT_HYPERCALL
:
4099 r
= KVM_EXIT_HYPERCALL_VALID_MASK
;
4101 case KVM_CAP_SET_GUEST_DEBUG2
:
4102 return KVM_GUESTDBG_VALID_MASK
;
4103 #ifdef CONFIG_KVM_XEN
4104 case KVM_CAP_XEN_HVM
:
4105 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
4106 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
4107 KVM_XEN_HVM_CONFIG_SHARED_INFO
;
4108 if (sched_info_on())
4109 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
;
4112 case KVM_CAP_SYNC_REGS
:
4113 r
= KVM_SYNC_X86_VALID_FIELDS
;
4115 case KVM_CAP_ADJUST_CLOCK
:
4116 r
= KVM_CLOCK_TSC_STABLE
;
4118 case KVM_CAP_X86_DISABLE_EXITS
:
4119 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
4120 KVM_X86_DISABLE_EXITS_CSTATE
;
4121 if(kvm_can_mwait_in_guest())
4122 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4124 case KVM_CAP_X86_SMM
:
4125 /* SMBASE is usually relocated above 1M on modern chipsets,
4126 * and SMM handlers might indeed rely on 4G segment limits,
4127 * so do not report SMM to be available if real mode is
4128 * emulated via vm86 mode. Still, do not go to great lengths
4129 * to avoid userspace's usage of the feature, because it is a
4130 * fringe case that is not enabled except via specific settings
4131 * of the module parameters.
4133 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4136 r
= !static_call(kvm_x86_cpu_has_accelerated_tpr
)();
4138 case KVM_CAP_NR_VCPUS
:
4139 r
= KVM_SOFT_MAX_VCPUS
;
4141 case KVM_CAP_MAX_VCPUS
:
4144 case KVM_CAP_MAX_VCPU_ID
:
4145 r
= KVM_MAX_VCPU_ID
;
4147 case KVM_CAP_PV_MMU
: /* obsolete */
4151 r
= KVM_MAX_MCE_BANKS
;
4154 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4156 case KVM_CAP_TSC_CONTROL
:
4157 r
= kvm_has_tsc_control
;
4159 case KVM_CAP_X2APIC_API
:
4160 r
= KVM_X2APIC_API_VALID_FLAGS
;
4162 case KVM_CAP_NESTED_STATE
:
4163 r
= kvm_x86_ops
.nested_ops
->get_state
?
4164 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4166 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4167 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
4169 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4170 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4172 case KVM_CAP_SMALLER_MAXPHYADDR
:
4173 r
= (int) allow_smaller_maxphyaddr
;
4175 case KVM_CAP_STEAL_TIME
:
4176 r
= sched_info_on();
4178 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4179 if (kvm_has_bus_lock_exit
)
4180 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4181 KVM_BUS_LOCK_DETECTION_EXIT
;
4192 long kvm_arch_dev_ioctl(struct file
*filp
,
4193 unsigned int ioctl
, unsigned long arg
)
4195 void __user
*argp
= (void __user
*)arg
;
4199 case KVM_GET_MSR_INDEX_LIST
: {
4200 struct kvm_msr_list __user
*user_msr_list
= argp
;
4201 struct kvm_msr_list msr_list
;
4205 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4208 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4209 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4212 if (n
< msr_list
.nmsrs
)
4215 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4216 num_msrs_to_save
* sizeof(u32
)))
4218 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4220 num_emulated_msrs
* sizeof(u32
)))
4225 case KVM_GET_SUPPORTED_CPUID
:
4226 case KVM_GET_EMULATED_CPUID
: {
4227 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4228 struct kvm_cpuid2 cpuid
;
4231 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4234 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4240 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4245 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4247 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
4248 sizeof(kvm_mce_cap_supported
)))
4252 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4253 struct kvm_msr_list __user
*user_msr_list
= argp
;
4254 struct kvm_msr_list msr_list
;
4258 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4261 msr_list
.nmsrs
= num_msr_based_features
;
4262 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4265 if (n
< msr_list
.nmsrs
)
4268 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4269 num_msr_based_features
* sizeof(u32
)))
4275 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4277 case KVM_GET_SUPPORTED_HV_CPUID
:
4278 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4288 static void wbinvd_ipi(void *garbage
)
4293 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4295 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4298 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4300 /* Address WBINVD may be executed by guest */
4301 if (need_emulate_wbinvd(vcpu
)) {
4302 if (static_call(kvm_x86_has_wbinvd_exit
)())
4303 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4304 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4305 smp_call_function_single(vcpu
->cpu
,
4306 wbinvd_ipi
, NULL
, 1);
4309 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4311 /* Save host pkru register if supported */
4312 vcpu
->arch
.host_pkru
= read_pkru();
4314 /* Apply any externally detected TSC adjustments (due to suspend) */
4315 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4316 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4317 vcpu
->arch
.tsc_offset_adjustment
= 0;
4318 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4321 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4322 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4323 rdtsc() - vcpu
->arch
.last_host_tsc
;
4325 mark_tsc_unstable("KVM discovered backwards TSC");
4327 if (kvm_check_tsc_unstable()) {
4328 u64 offset
= kvm_compute_l1_tsc_offset(vcpu
,
4329 vcpu
->arch
.last_guest_tsc
);
4330 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4331 vcpu
->arch
.tsc_catchup
= 1;
4334 if (kvm_lapic_hv_timer_in_use(vcpu
))
4335 kvm_lapic_restart_hv_timer(vcpu
);
4338 * On a host with synchronized TSC, there is no need to update
4339 * kvmclock on vcpu->cpu migration
4341 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4342 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4343 if (vcpu
->cpu
!= cpu
)
4344 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4348 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4351 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4353 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
4354 struct kvm_steal_time __user
*st
;
4355 struct kvm_memslots
*slots
;
4356 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
4358 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4361 if (vcpu
->arch
.st
.preempted
)
4364 /* This happens on process exit */
4365 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
4368 slots
= kvm_memslots(vcpu
->kvm
);
4370 if (unlikely(slots
->generation
!= ghc
->generation
||
4371 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
4374 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
4375 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
4377 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
4378 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4380 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
4383 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4387 if (vcpu
->preempted
&& !vcpu
->arch
.guest_state_protected
)
4388 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
4391 * Take the srcu lock as memslots will be accessed to check the gfn
4392 * cache generation against the memslots generation.
4394 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4395 if (kvm_xen_msr_enabled(vcpu
->kvm
))
4396 kvm_xen_runstate_set_preempted(vcpu
);
4398 kvm_steal_time_set_preempted(vcpu
);
4399 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4401 static_call(kvm_x86_vcpu_put
)(vcpu
);
4402 vcpu
->arch
.last_host_tsc
= rdtsc();
4405 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4406 struct kvm_lapic_state
*s
)
4408 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
4410 return kvm_apic_get_state(vcpu
, s
);
4413 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4414 struct kvm_lapic_state
*s
)
4418 r
= kvm_apic_set_state(vcpu
, s
);
4421 update_cr8_intercept(vcpu
);
4426 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4429 * We can accept userspace's request for interrupt injection
4430 * as long as we have a place to store the interrupt number.
4431 * The actual injection will happen when the CPU is able to
4432 * deliver the interrupt.
4434 if (kvm_cpu_has_extint(vcpu
))
4437 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4438 return (!lapic_in_kernel(vcpu
) ||
4439 kvm_apic_accept_pic_intr(vcpu
));
4442 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4445 * Do not cause an interrupt window exit if an exception
4446 * is pending or an event needs reinjection; userspace
4447 * might want to inject the interrupt manually using KVM_SET_REGS
4448 * or KVM_SET_SREGS. For that to work, we must be at an
4449 * instruction boundary and with no events half-injected.
4451 return (kvm_arch_interrupt_allowed(vcpu
) &&
4452 kvm_cpu_accept_dm_intr(vcpu
) &&
4453 !kvm_event_needs_reinjection(vcpu
) &&
4454 !vcpu
->arch
.exception
.pending
);
4457 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4458 struct kvm_interrupt
*irq
)
4460 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4463 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4464 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4465 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4470 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4471 * fail for in-kernel 8259.
4473 if (pic_in_kernel(vcpu
->kvm
))
4476 if (vcpu
->arch
.pending_external_vector
!= -1)
4479 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4480 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4484 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4486 kvm_inject_nmi(vcpu
);
4491 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4493 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4498 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4499 struct kvm_tpr_access_ctl
*tac
)
4503 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4507 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4511 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4514 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4516 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4519 vcpu
->arch
.mcg_cap
= mcg_cap
;
4520 /* Init IA32_MCG_CTL to all 1s */
4521 if (mcg_cap
& MCG_CTL_P
)
4522 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4523 /* Init IA32_MCi_CTL to all 1s */
4524 for (bank
= 0; bank
< bank_num
; bank
++)
4525 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4527 static_call(kvm_x86_setup_mce
)(vcpu
);
4532 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4533 struct kvm_x86_mce
*mce
)
4535 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4536 unsigned bank_num
= mcg_cap
& 0xff;
4537 u64
*banks
= vcpu
->arch
.mce_banks
;
4539 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4542 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4543 * reporting is disabled
4545 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4546 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4548 banks
+= 4 * mce
->bank
;
4550 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4551 * reporting is disabled for the bank
4553 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4555 if (mce
->status
& MCI_STATUS_UC
) {
4556 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4557 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4558 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4561 if (banks
[1] & MCI_STATUS_VAL
)
4562 mce
->status
|= MCI_STATUS_OVER
;
4563 banks
[2] = mce
->addr
;
4564 banks
[3] = mce
->misc
;
4565 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4566 banks
[1] = mce
->status
;
4567 kvm_queue_exception(vcpu
, MC_VECTOR
);
4568 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4569 || !(banks
[1] & MCI_STATUS_UC
)) {
4570 if (banks
[1] & MCI_STATUS_VAL
)
4571 mce
->status
|= MCI_STATUS_OVER
;
4572 banks
[2] = mce
->addr
;
4573 banks
[3] = mce
->misc
;
4574 banks
[1] = mce
->status
;
4576 banks
[1] |= MCI_STATUS_OVER
;
4580 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4581 struct kvm_vcpu_events
*events
)
4585 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
4589 * In guest mode, payload delivery should be deferred,
4590 * so that the L1 hypervisor can intercept #PF before
4591 * CR2 is modified (or intercept #DB before DR6 is
4592 * modified under nVMX). Unless the per-VM capability,
4593 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4594 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4595 * opportunistically defer the exception payload, deliver it if the
4596 * capability hasn't been requested before processing a
4597 * KVM_GET_VCPU_EVENTS.
4599 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4600 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4601 kvm_deliver_exception_payload(vcpu
);
4604 * The API doesn't provide the instruction length for software
4605 * exceptions, so don't report them. As long as the guest RIP
4606 * isn't advanced, we should expect to encounter the exception
4609 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4610 events
->exception
.injected
= 0;
4611 events
->exception
.pending
= 0;
4613 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4614 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4616 * For ABI compatibility, deliberately conflate
4617 * pending and injected exceptions when
4618 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4620 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4621 events
->exception
.injected
|=
4622 vcpu
->arch
.exception
.pending
;
4624 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4625 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4626 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4627 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4628 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4630 events
->interrupt
.injected
=
4631 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4632 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4633 events
->interrupt
.soft
= 0;
4634 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
4636 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4637 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4638 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
4639 events
->nmi
.pad
= 0;
4641 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4643 events
->smi
.smm
= is_smm(vcpu
);
4644 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4645 events
->smi
.smm_inside_nmi
=
4646 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4647 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4649 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4650 | KVM_VCPUEVENT_VALID_SHADOW
4651 | KVM_VCPUEVENT_VALID_SMM
);
4652 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4653 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4655 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4658 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
);
4660 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4661 struct kvm_vcpu_events
*events
)
4663 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4664 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4665 | KVM_VCPUEVENT_VALID_SHADOW
4666 | KVM_VCPUEVENT_VALID_SMM
4667 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4670 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4671 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4673 if (events
->exception
.pending
)
4674 events
->exception
.injected
= 0;
4676 events
->exception_has_payload
= 0;
4678 events
->exception
.pending
= 0;
4679 events
->exception_has_payload
= 0;
4682 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4683 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4686 /* INITs are latched while in SMM */
4687 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4688 (events
->smi
.smm
|| events
->smi
.pending
) &&
4689 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4693 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4694 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4695 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4696 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4697 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4698 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4699 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4701 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4702 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4703 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4704 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4705 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
4706 events
->interrupt
.shadow
);
4708 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4709 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
4710 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
4711 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
4713 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
4714 lapic_in_kernel(vcpu
))
4715 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
4717 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
4718 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
)
4719 kvm_smm_changed(vcpu
, events
->smi
.smm
);
4721 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
4723 if (events
->smi
.smm
) {
4724 if (events
->smi
.smm_inside_nmi
)
4725 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
4727 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
4730 if (lapic_in_kernel(vcpu
)) {
4731 if (events
->smi
.latched_init
)
4732 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4734 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4738 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4743 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
4744 struct kvm_debugregs
*dbgregs
)
4748 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
4749 kvm_get_dr(vcpu
, 6, &val
);
4751 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4753 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4756 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4757 struct kvm_debugregs
*dbgregs
)
4762 if (!kvm_dr6_valid(dbgregs
->dr6
))
4764 if (!kvm_dr7_valid(dbgregs
->dr7
))
4767 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4768 kvm_update_dr0123(vcpu
);
4769 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4770 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4771 kvm_update_dr7(vcpu
);
4776 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4778 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
4780 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4781 u64 xstate_bv
= xsave
->header
.xfeatures
;
4785 * Copy legacy XSAVE area, to avoid complications with CPUID
4786 * leaves 0 and 1 in the loop below.
4788 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
4791 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
4792 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
4795 * Copy each region from the possibly compacted offset to the
4796 * non-compacted offset.
4798 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4800 u32 size
, offset
, ecx
, edx
;
4801 u64 xfeature_mask
= valid
& -valid
;
4802 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4805 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4806 &size
, &offset
, &ecx
, &edx
);
4808 if (xfeature_nr
== XFEATURE_PKRU
) {
4809 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
4810 sizeof(vcpu
->arch
.pkru
));
4812 src
= get_xsave_addr(xsave
, xfeature_nr
);
4814 memcpy(dest
+ offset
, src
, size
);
4817 valid
-= xfeature_mask
;
4821 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
4823 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4824 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
4828 * Copy legacy XSAVE area, to avoid complications with CPUID
4829 * leaves 0 and 1 in the loop below.
4831 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
4833 /* Set XSTATE_BV and possibly XCOMP_BV. */
4834 xsave
->header
.xfeatures
= xstate_bv
;
4835 if (boot_cpu_has(X86_FEATURE_XSAVES
))
4836 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
4839 * Copy each region from the non-compacted offset to the
4840 * possibly compacted offset.
4842 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4844 u32 size
, offset
, ecx
, edx
;
4845 u64 xfeature_mask
= valid
& -valid
;
4846 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4848 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4849 &size
, &offset
, &ecx
, &edx
);
4851 if (xfeature_nr
== XFEATURE_PKRU
) {
4852 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
4853 sizeof(vcpu
->arch
.pkru
));
4855 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
4858 memcpy(dest
, src
+ offset
, size
);
4861 valid
-= xfeature_mask
;
4865 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4866 struct kvm_xsave
*guest_xsave
)
4868 if (!vcpu
->arch
.guest_fpu
)
4871 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4872 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
4873 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
4875 memcpy(guest_xsave
->region
,
4876 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
4877 sizeof(struct fxregs_state
));
4878 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
4879 XFEATURE_MASK_FPSSE
;
4883 #define XSAVE_MXCSR_OFFSET 24
4885 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4886 struct kvm_xsave
*guest_xsave
)
4891 if (!vcpu
->arch
.guest_fpu
)
4894 xstate_bv
= *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
4895 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
4897 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4899 * Here we allow setting states that are not present in
4900 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4901 * with old userspace.
4903 if (xstate_bv
& ~supported_xcr0
|| mxcsr
& ~mxcsr_feature_mask
)
4905 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
4907 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
4908 mxcsr
& ~mxcsr_feature_mask
)
4910 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
4911 guest_xsave
->region
, sizeof(struct fxregs_state
));
4916 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4917 struct kvm_xcrs
*guest_xcrs
)
4919 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4920 guest_xcrs
->nr_xcrs
= 0;
4924 guest_xcrs
->nr_xcrs
= 1;
4925 guest_xcrs
->flags
= 0;
4926 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4927 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4930 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4931 struct kvm_xcrs
*guest_xcrs
)
4935 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4938 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4941 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4942 /* Only support XCR0 currently */
4943 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4944 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4945 guest_xcrs
->xcrs
[i
].value
);
4954 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4955 * stopped by the hypervisor. This function will be called from the host only.
4956 * EINVAL is returned when the host attempts to set the flag for a guest that
4957 * does not support pv clocks.
4959 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4961 if (!vcpu
->arch
.pv_time_enabled
)
4963 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4964 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4968 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4969 struct kvm_enable_cap
*cap
)
4972 uint16_t vmcs_version
;
4973 void __user
*user_ptr
;
4979 case KVM_CAP_HYPERV_SYNIC2
:
4984 case KVM_CAP_HYPERV_SYNIC
:
4985 if (!irqchip_in_kernel(vcpu
->kvm
))
4987 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
4988 KVM_CAP_HYPERV_SYNIC2
);
4989 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4990 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
4992 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
4994 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
4995 if (copy_to_user(user_ptr
, &vmcs_version
,
4996 sizeof(vmcs_version
)))
5000 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
5001 if (!kvm_x86_ops
.enable_direct_tlbflush
)
5004 return static_call(kvm_x86_enable_direct_tlbflush
)(vcpu
);
5006 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
5007 return kvm_hv_set_enforce_cpuid(vcpu
, cap
->args
[0]);
5009 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
5010 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
5011 if (vcpu
->arch
.pv_cpuid
.enforce
)
5012 kvm_update_pv_runtime(vcpu
);
5020 long kvm_arch_vcpu_ioctl(struct file
*filp
,
5021 unsigned int ioctl
, unsigned long arg
)
5023 struct kvm_vcpu
*vcpu
= filp
->private_data
;
5024 void __user
*argp
= (void __user
*)arg
;
5027 struct kvm_sregs2
*sregs2
;
5028 struct kvm_lapic_state
*lapic
;
5029 struct kvm_xsave
*xsave
;
5030 struct kvm_xcrs
*xcrs
;
5038 case KVM_GET_LAPIC
: {
5040 if (!lapic_in_kernel(vcpu
))
5042 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
5043 GFP_KERNEL_ACCOUNT
);
5048 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
5052 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
5057 case KVM_SET_LAPIC
: {
5059 if (!lapic_in_kernel(vcpu
))
5061 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
5062 if (IS_ERR(u
.lapic
)) {
5063 r
= PTR_ERR(u
.lapic
);
5067 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
5070 case KVM_INTERRUPT
: {
5071 struct kvm_interrupt irq
;
5074 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
5076 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
5080 r
= kvm_vcpu_ioctl_nmi(vcpu
);
5084 r
= kvm_vcpu_ioctl_smi(vcpu
);
5087 case KVM_SET_CPUID
: {
5088 struct kvm_cpuid __user
*cpuid_arg
= argp
;
5089 struct kvm_cpuid cpuid
;
5092 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5094 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
5097 case KVM_SET_CPUID2
: {
5098 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5099 struct kvm_cpuid2 cpuid
;
5102 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5104 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
5105 cpuid_arg
->entries
);
5108 case KVM_GET_CPUID2
: {
5109 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5110 struct kvm_cpuid2 cpuid
;
5113 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5115 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5116 cpuid_arg
->entries
);
5120 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5125 case KVM_GET_MSRS
: {
5126 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5127 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5128 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5131 case KVM_SET_MSRS
: {
5132 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5133 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5134 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5137 case KVM_TPR_ACCESS_REPORTING
: {
5138 struct kvm_tpr_access_ctl tac
;
5141 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5143 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5147 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5152 case KVM_SET_VAPIC_ADDR
: {
5153 struct kvm_vapic_addr va
;
5157 if (!lapic_in_kernel(vcpu
))
5160 if (copy_from_user(&va
, argp
, sizeof(va
)))
5162 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5163 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5164 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5167 case KVM_X86_SETUP_MCE
: {
5171 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5173 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5176 case KVM_X86_SET_MCE
: {
5177 struct kvm_x86_mce mce
;
5180 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5182 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5185 case KVM_GET_VCPU_EVENTS
: {
5186 struct kvm_vcpu_events events
;
5188 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5191 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5196 case KVM_SET_VCPU_EVENTS
: {
5197 struct kvm_vcpu_events events
;
5200 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5203 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5206 case KVM_GET_DEBUGREGS
: {
5207 struct kvm_debugregs dbgregs
;
5209 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5212 if (copy_to_user(argp
, &dbgregs
,
5213 sizeof(struct kvm_debugregs
)))
5218 case KVM_SET_DEBUGREGS
: {
5219 struct kvm_debugregs dbgregs
;
5222 if (copy_from_user(&dbgregs
, argp
,
5223 sizeof(struct kvm_debugregs
)))
5226 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
5229 case KVM_GET_XSAVE
: {
5230 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
5235 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
5238 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
5243 case KVM_SET_XSAVE
: {
5244 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
5245 if (IS_ERR(u
.xsave
)) {
5246 r
= PTR_ERR(u
.xsave
);
5250 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
5253 case KVM_GET_XCRS
: {
5254 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
5259 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
5262 if (copy_to_user(argp
, u
.xcrs
,
5263 sizeof(struct kvm_xcrs
)))
5268 case KVM_SET_XCRS
: {
5269 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
5270 if (IS_ERR(u
.xcrs
)) {
5271 r
= PTR_ERR(u
.xcrs
);
5275 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
5278 case KVM_SET_TSC_KHZ
: {
5282 user_tsc_khz
= (u32
)arg
;
5284 if (kvm_has_tsc_control
&&
5285 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
5288 if (user_tsc_khz
== 0)
5289 user_tsc_khz
= tsc_khz
;
5291 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
5296 case KVM_GET_TSC_KHZ
: {
5297 r
= vcpu
->arch
.virtual_tsc_khz
;
5300 case KVM_KVMCLOCK_CTRL
: {
5301 r
= kvm_set_guest_paused(vcpu
);
5304 case KVM_ENABLE_CAP
: {
5305 struct kvm_enable_cap cap
;
5308 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
5310 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
5313 case KVM_GET_NESTED_STATE
: {
5314 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5318 if (!kvm_x86_ops
.nested_ops
->get_state
)
5321 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
5323 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
5326 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
5331 if (r
> user_data_size
) {
5332 if (put_user(r
, &user_kvm_nested_state
->size
))
5342 case KVM_SET_NESTED_STATE
: {
5343 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5344 struct kvm_nested_state kvm_state
;
5348 if (!kvm_x86_ops
.nested_ops
->set_state
)
5352 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5356 if (kvm_state
.size
< sizeof(kvm_state
))
5359 if (kvm_state
.flags
&
5360 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5361 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5362 | KVM_STATE_NESTED_GIF_SET
))
5365 /* nested_run_pending implies guest_mode. */
5366 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5367 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5370 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5371 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5372 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5375 case KVM_GET_SUPPORTED_HV_CPUID
:
5376 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5378 #ifdef CONFIG_KVM_XEN
5379 case KVM_XEN_VCPU_GET_ATTR
: {
5380 struct kvm_xen_vcpu_attr xva
;
5383 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5385 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
5386 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
5390 case KVM_XEN_VCPU_SET_ATTR
: {
5391 struct kvm_xen_vcpu_attr xva
;
5394 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5396 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
5400 case KVM_GET_SREGS2
: {
5401 u
.sregs2
= kzalloc(sizeof(struct kvm_sregs2
), GFP_KERNEL
);
5405 __get_sregs2(vcpu
, u
.sregs2
);
5407 if (copy_to_user(argp
, u
.sregs2
, sizeof(struct kvm_sregs2
)))
5412 case KVM_SET_SREGS2
: {
5413 u
.sregs2
= memdup_user(argp
, sizeof(struct kvm_sregs2
));
5414 if (IS_ERR(u
.sregs2
)) {
5415 r
= PTR_ERR(u
.sregs2
);
5419 r
= __set_sregs2(vcpu
, u
.sregs2
);
5432 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5434 return VM_FAULT_SIGBUS
;
5437 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5441 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5443 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
5447 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5450 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
5453 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5454 unsigned long kvm_nr_mmu_pages
)
5456 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5459 mutex_lock(&kvm
->slots_lock
);
5461 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5462 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5464 mutex_unlock(&kvm
->slots_lock
);
5468 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5470 return kvm
->arch
.n_max_mmu_pages
;
5473 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5475 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5479 switch (chip
->chip_id
) {
5480 case KVM_IRQCHIP_PIC_MASTER
:
5481 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5482 sizeof(struct kvm_pic_state
));
5484 case KVM_IRQCHIP_PIC_SLAVE
:
5485 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5486 sizeof(struct kvm_pic_state
));
5488 case KVM_IRQCHIP_IOAPIC
:
5489 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5498 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5500 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5504 switch (chip
->chip_id
) {
5505 case KVM_IRQCHIP_PIC_MASTER
:
5506 spin_lock(&pic
->lock
);
5507 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5508 sizeof(struct kvm_pic_state
));
5509 spin_unlock(&pic
->lock
);
5511 case KVM_IRQCHIP_PIC_SLAVE
:
5512 spin_lock(&pic
->lock
);
5513 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5514 sizeof(struct kvm_pic_state
));
5515 spin_unlock(&pic
->lock
);
5517 case KVM_IRQCHIP_IOAPIC
:
5518 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5524 kvm_pic_update_irq(pic
);
5528 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5530 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5532 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5534 mutex_lock(&kps
->lock
);
5535 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5536 mutex_unlock(&kps
->lock
);
5540 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5543 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5545 mutex_lock(&pit
->pit_state
.lock
);
5546 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5547 for (i
= 0; i
< 3; i
++)
5548 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5549 mutex_unlock(&pit
->pit_state
.lock
);
5553 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5555 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5556 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5557 sizeof(ps
->channels
));
5558 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5559 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5560 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5564 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5568 u32 prev_legacy
, cur_legacy
;
5569 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5571 mutex_lock(&pit
->pit_state
.lock
);
5572 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5573 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5574 if (!prev_legacy
&& cur_legacy
)
5576 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5577 sizeof(pit
->pit_state
.channels
));
5578 pit
->pit_state
.flags
= ps
->flags
;
5579 for (i
= 0; i
< 3; i
++)
5580 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5582 mutex_unlock(&pit
->pit_state
.lock
);
5586 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5587 struct kvm_reinject_control
*control
)
5589 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5591 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5592 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5593 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5595 mutex_lock(&pit
->pit_state
.lock
);
5596 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5597 mutex_unlock(&pit
->pit_state
.lock
);
5602 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5606 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5607 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5608 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5611 struct kvm_vcpu
*vcpu
;
5614 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5615 kvm_vcpu_kick(vcpu
);
5618 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5621 if (!irqchip_in_kernel(kvm
))
5624 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5625 irq_event
->irq
, irq_event
->level
,
5630 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5631 struct kvm_enable_cap
*cap
)
5639 case KVM_CAP_DISABLE_QUIRKS
:
5640 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5643 case KVM_CAP_SPLIT_IRQCHIP
: {
5644 mutex_lock(&kvm
->lock
);
5646 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5647 goto split_irqchip_unlock
;
5649 if (irqchip_in_kernel(kvm
))
5650 goto split_irqchip_unlock
;
5651 if (kvm
->created_vcpus
)
5652 goto split_irqchip_unlock
;
5653 r
= kvm_setup_empty_irq_routing(kvm
);
5655 goto split_irqchip_unlock
;
5656 /* Pairs with irqchip_in_kernel. */
5658 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5659 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5661 split_irqchip_unlock
:
5662 mutex_unlock(&kvm
->lock
);
5665 case KVM_CAP_X2APIC_API
:
5667 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
5670 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
5671 kvm
->arch
.x2apic_format
= true;
5672 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
5673 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
5677 case KVM_CAP_X86_DISABLE_EXITS
:
5679 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
5682 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
5683 kvm_can_mwait_in_guest())
5684 kvm
->arch
.mwait_in_guest
= true;
5685 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
5686 kvm
->arch
.hlt_in_guest
= true;
5687 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
5688 kvm
->arch
.pause_in_guest
= true;
5689 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
5690 kvm
->arch
.cstate_in_guest
= true;
5693 case KVM_CAP_MSR_PLATFORM_INFO
:
5694 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
5697 case KVM_CAP_EXCEPTION_PAYLOAD
:
5698 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
5701 case KVM_CAP_X86_USER_SPACE_MSR
:
5702 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
5705 case KVM_CAP_X86_BUS_LOCK_EXIT
:
5707 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
5710 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
5711 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
5714 if (kvm_has_bus_lock_exit
&&
5715 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
5716 kvm
->arch
.bus_lock_detection_enabled
= true;
5719 #ifdef CONFIG_X86_SGX_KVM
5720 case KVM_CAP_SGX_ATTRIBUTE
: {
5721 unsigned long allowed_attributes
= 0;
5723 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
5727 /* KVM only supports the PROVISIONKEY privileged attribute. */
5728 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
5729 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
5730 kvm
->arch
.sgx_provisioning_allowed
= true;
5736 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
5738 if (kvm_x86_ops
.vm_copy_enc_context_from
)
5739 r
= kvm_x86_ops
.vm_copy_enc_context_from(kvm
, cap
->args
[0]);
5741 case KVM_CAP_EXIT_HYPERCALL
:
5742 if (cap
->args
[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK
) {
5746 kvm
->arch
.hypercall_exit_enabled
= cap
->args
[0];
5749 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
5751 if (cap
->args
[0] & ~1)
5753 kvm
->arch
.exit_on_emulation_error
= cap
->args
[0];
5763 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
5765 struct kvm_x86_msr_filter
*msr_filter
;
5767 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
5771 msr_filter
->default_allow
= default_allow
;
5775 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
5782 for (i
= 0; i
< msr_filter
->count
; i
++)
5783 kfree(msr_filter
->ranges
[i
].bitmap
);
5788 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
5789 struct kvm_msr_filter_range
*user_range
)
5791 unsigned long *bitmap
= NULL
;
5794 if (!user_range
->nmsrs
)
5797 if (user_range
->flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
))
5800 if (!user_range
->flags
)
5803 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
5804 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
5807 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
5809 return PTR_ERR(bitmap
);
5811 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
5812 .flags
= user_range
->flags
,
5813 .base
= user_range
->base
,
5814 .nmsrs
= user_range
->nmsrs
,
5818 msr_filter
->count
++;
5822 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
5824 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
5825 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
5826 struct kvm_msr_filter filter
;
5832 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
5835 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
5836 empty
&= !filter
.ranges
[i
].nmsrs
;
5838 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
5839 if (empty
&& !default_allow
)
5842 new_filter
= kvm_alloc_msr_filter(default_allow
);
5846 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
5847 r
= kvm_add_msr_filter(new_filter
, &filter
.ranges
[i
]);
5849 kvm_free_msr_filter(new_filter
);
5854 mutex_lock(&kvm
->lock
);
5856 /* The per-VM filter is protected by kvm->lock... */
5857 old_filter
= srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1);
5859 rcu_assign_pointer(kvm
->arch
.msr_filter
, new_filter
);
5860 synchronize_srcu(&kvm
->srcu
);
5862 kvm_free_msr_filter(old_filter
);
5864 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
5865 mutex_unlock(&kvm
->lock
);
5870 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5871 static int kvm_arch_suspend_notifier(struct kvm
*kvm
)
5873 struct kvm_vcpu
*vcpu
;
5876 mutex_lock(&kvm
->lock
);
5877 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5878 if (!vcpu
->arch
.pv_time_enabled
)
5881 ret
= kvm_set_guest_paused(vcpu
);
5883 kvm_err("Failed to pause guest VCPU%d: %d\n",
5884 vcpu
->vcpu_id
, ret
);
5888 mutex_unlock(&kvm
->lock
);
5890 return ret
? NOTIFY_BAD
: NOTIFY_DONE
;
5893 int kvm_arch_pm_notifier(struct kvm
*kvm
, unsigned long state
)
5896 case PM_HIBERNATION_PREPARE
:
5897 case PM_SUSPEND_PREPARE
:
5898 return kvm_arch_suspend_notifier(kvm
);
5903 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5905 long kvm_arch_vm_ioctl(struct file
*filp
,
5906 unsigned int ioctl
, unsigned long arg
)
5908 struct kvm
*kvm
= filp
->private_data
;
5909 void __user
*argp
= (void __user
*)arg
;
5912 * This union makes it completely explicit to gcc-3.x
5913 * that these two variables' stack usage should be
5914 * combined, not added together.
5917 struct kvm_pit_state ps
;
5918 struct kvm_pit_state2 ps2
;
5919 struct kvm_pit_config pit_config
;
5923 case KVM_SET_TSS_ADDR
:
5924 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
5926 case KVM_SET_IDENTITY_MAP_ADDR
: {
5929 mutex_lock(&kvm
->lock
);
5931 if (kvm
->created_vcpus
)
5932 goto set_identity_unlock
;
5934 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
5935 goto set_identity_unlock
;
5936 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
5937 set_identity_unlock
:
5938 mutex_unlock(&kvm
->lock
);
5941 case KVM_SET_NR_MMU_PAGES
:
5942 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
5944 case KVM_GET_NR_MMU_PAGES
:
5945 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
5947 case KVM_CREATE_IRQCHIP
: {
5948 mutex_lock(&kvm
->lock
);
5951 if (irqchip_in_kernel(kvm
))
5952 goto create_irqchip_unlock
;
5955 if (kvm
->created_vcpus
)
5956 goto create_irqchip_unlock
;
5958 r
= kvm_pic_init(kvm
);
5960 goto create_irqchip_unlock
;
5962 r
= kvm_ioapic_init(kvm
);
5964 kvm_pic_destroy(kvm
);
5965 goto create_irqchip_unlock
;
5968 r
= kvm_setup_default_irq_routing(kvm
);
5970 kvm_ioapic_destroy(kvm
);
5971 kvm_pic_destroy(kvm
);
5972 goto create_irqchip_unlock
;
5974 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5976 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
5977 create_irqchip_unlock
:
5978 mutex_unlock(&kvm
->lock
);
5981 case KVM_CREATE_PIT
:
5982 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
5984 case KVM_CREATE_PIT2
:
5986 if (copy_from_user(&u
.pit_config
, argp
,
5987 sizeof(struct kvm_pit_config
)))
5990 mutex_lock(&kvm
->lock
);
5993 goto create_pit_unlock
;
5995 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
5999 mutex_unlock(&kvm
->lock
);
6001 case KVM_GET_IRQCHIP
: {
6002 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6003 struct kvm_irqchip
*chip
;
6005 chip
= memdup_user(argp
, sizeof(*chip
));
6012 if (!irqchip_kernel(kvm
))
6013 goto get_irqchip_out
;
6014 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
6016 goto get_irqchip_out
;
6018 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
6019 goto get_irqchip_out
;
6025 case KVM_SET_IRQCHIP
: {
6026 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6027 struct kvm_irqchip
*chip
;
6029 chip
= memdup_user(argp
, sizeof(*chip
));
6036 if (!irqchip_kernel(kvm
))
6037 goto set_irqchip_out
;
6038 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
6045 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
6048 if (!kvm
->arch
.vpit
)
6050 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
6054 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
6061 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
6063 mutex_lock(&kvm
->lock
);
6065 if (!kvm
->arch
.vpit
)
6067 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
6069 mutex_unlock(&kvm
->lock
);
6072 case KVM_GET_PIT2
: {
6074 if (!kvm
->arch
.vpit
)
6076 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
6080 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
6085 case KVM_SET_PIT2
: {
6087 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
6089 mutex_lock(&kvm
->lock
);
6091 if (!kvm
->arch
.vpit
)
6093 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
6095 mutex_unlock(&kvm
->lock
);
6098 case KVM_REINJECT_CONTROL
: {
6099 struct kvm_reinject_control control
;
6101 if (copy_from_user(&control
, argp
, sizeof(control
)))
6104 if (!kvm
->arch
.vpit
)
6106 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
6109 case KVM_SET_BOOT_CPU_ID
:
6111 mutex_lock(&kvm
->lock
);
6112 if (kvm
->created_vcpus
)
6115 kvm
->arch
.bsp_vcpu_id
= arg
;
6116 mutex_unlock(&kvm
->lock
);
6118 #ifdef CONFIG_KVM_XEN
6119 case KVM_XEN_HVM_CONFIG
: {
6120 struct kvm_xen_hvm_config xhc
;
6122 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
6124 r
= kvm_xen_hvm_config(kvm
, &xhc
);
6127 case KVM_XEN_HVM_GET_ATTR
: {
6128 struct kvm_xen_hvm_attr xha
;
6131 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6133 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
6134 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
6138 case KVM_XEN_HVM_SET_ATTR
: {
6139 struct kvm_xen_hvm_attr xha
;
6142 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6144 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
6148 case KVM_SET_CLOCK
: {
6149 struct kvm_arch
*ka
= &kvm
->arch
;
6150 struct kvm_clock_data user_ns
;
6154 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
6163 * TODO: userspace has to take care of races with VCPU_RUN, so
6164 * kvm_gen_update_masterclock() can be cut down to locked
6165 * pvclock_update_vm_gtod_copy().
6167 kvm_gen_update_masterclock(kvm
);
6170 * This pairs with kvm_guest_time_update(): when masterclock is
6171 * in use, we use master_kernel_ns + kvmclock_offset to set
6172 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6173 * is slightly ahead) here we risk going negative on unsigned
6174 * 'system_time' when 'user_ns.clock' is very small.
6176 raw_spin_lock_irq(&ka
->pvclock_gtod_sync_lock
);
6177 if (kvm
->arch
.use_master_clock
)
6178 now_ns
= ka
->master_kernel_ns
;
6180 now_ns
= get_kvmclock_base_ns();
6181 ka
->kvmclock_offset
= user_ns
.clock
- now_ns
;
6182 raw_spin_unlock_irq(&ka
->pvclock_gtod_sync_lock
);
6184 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
6187 case KVM_GET_CLOCK
: {
6188 struct kvm_clock_data user_ns
;
6191 now_ns
= get_kvmclock_ns(kvm
);
6192 user_ns
.clock
= now_ns
;
6193 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
6194 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
6197 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
6202 case KVM_MEMORY_ENCRYPT_OP
: {
6204 if (kvm_x86_ops
.mem_enc_op
)
6205 r
= static_call(kvm_x86_mem_enc_op
)(kvm
, argp
);
6208 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
6209 struct kvm_enc_region region
;
6212 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6216 if (kvm_x86_ops
.mem_enc_reg_region
)
6217 r
= static_call(kvm_x86_mem_enc_reg_region
)(kvm
, ®ion
);
6220 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
6221 struct kvm_enc_region region
;
6224 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6228 if (kvm_x86_ops
.mem_enc_unreg_region
)
6229 r
= static_call(kvm_x86_mem_enc_unreg_region
)(kvm
, ®ion
);
6232 case KVM_HYPERV_EVENTFD
: {
6233 struct kvm_hyperv_eventfd hvevfd
;
6236 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
6238 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
6241 case KVM_SET_PMU_EVENT_FILTER
:
6242 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
6244 case KVM_X86_SET_MSR_FILTER
:
6245 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
6254 static void kvm_init_msr_list(void)
6256 struct x86_pmu_capability x86_pmu
;
6260 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
6261 "Please update the fixed PMCs in msrs_to_saved_all[]");
6263 perf_get_x86_pmu_capability(&x86_pmu
);
6265 num_msrs_to_save
= 0;
6266 num_emulated_msrs
= 0;
6267 num_msr_based_features
= 0;
6269 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
6270 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
6274 * Even MSRs that are valid in the host may not be exposed
6275 * to the guests in some cases.
6277 switch (msrs_to_save_all
[i
]) {
6278 case MSR_IA32_BNDCFGS
:
6279 if (!kvm_mpx_supported())
6283 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
6284 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
6287 case MSR_IA32_UMWAIT_CONTROL
:
6288 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
6291 case MSR_IA32_RTIT_CTL
:
6292 case MSR_IA32_RTIT_STATUS
:
6293 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
6296 case MSR_IA32_RTIT_CR3_MATCH
:
6297 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6298 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
6301 case MSR_IA32_RTIT_OUTPUT_BASE
:
6302 case MSR_IA32_RTIT_OUTPUT_MASK
:
6303 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6304 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
6305 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
6308 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
6309 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6310 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
6311 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
6314 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
6315 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
6316 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6319 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
6320 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
6321 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6328 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
6331 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
6332 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
6335 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
6338 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
6339 struct kvm_msr_entry msr
;
6341 msr
.index
= msr_based_features_all
[i
];
6342 if (kvm_get_msr_feature(&msr
))
6345 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
6349 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
6357 if (!(lapic_in_kernel(vcpu
) &&
6358 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
6359 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6370 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
6377 if (!(lapic_in_kernel(vcpu
) &&
6378 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
6380 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6382 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
6392 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
6393 struct kvm_segment
*var
, int seg
)
6395 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
6398 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
6399 struct kvm_segment
*var
, int seg
)
6401 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
6404 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
6405 struct x86_exception
*exception
)
6409 BUG_ON(!mmu_is_nested(vcpu
));
6411 /* NPT walks are always user-walks */
6412 access
|= PFERR_USER_MASK
;
6413 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
6418 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
6419 struct x86_exception
*exception
)
6421 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6422 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6424 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
6426 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
6427 struct x86_exception
*exception
)
6429 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6430 access
|= PFERR_FETCH_MASK
;
6431 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6434 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
6435 struct x86_exception
*exception
)
6437 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6438 access
|= PFERR_WRITE_MASK
;
6439 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6441 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
6443 /* uses this to access any guest's mapped memory without checking CPL */
6444 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
6445 struct x86_exception
*exception
)
6447 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
6450 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6451 struct kvm_vcpu
*vcpu
, u32 access
,
6452 struct x86_exception
*exception
)
6455 int r
= X86EMUL_CONTINUE
;
6458 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
6460 unsigned offset
= addr
& (PAGE_SIZE
-1);
6461 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6464 if (gpa
== UNMAPPED_GVA
)
6465 return X86EMUL_PROPAGATE_FAULT
;
6466 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
6469 r
= X86EMUL_IO_NEEDED
;
6481 /* used for instruction fetching */
6482 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
6483 gva_t addr
, void *val
, unsigned int bytes
,
6484 struct x86_exception
*exception
)
6486 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6487 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6491 /* Inline kvm_read_guest_virt_helper for speed. */
6492 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
6494 if (unlikely(gpa
== UNMAPPED_GVA
))
6495 return X86EMUL_PROPAGATE_FAULT
;
6497 offset
= addr
& (PAGE_SIZE
-1);
6498 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
6499 bytes
= (unsigned)PAGE_SIZE
- offset
;
6500 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
6502 if (unlikely(ret
< 0))
6503 return X86EMUL_IO_NEEDED
;
6505 return X86EMUL_CONTINUE
;
6508 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
6509 gva_t addr
, void *val
, unsigned int bytes
,
6510 struct x86_exception
*exception
)
6512 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6515 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6516 * is returned, but our callers are not ready for that and they blindly
6517 * call kvm_inject_page_fault. Ensure that they at least do not leak
6518 * uninitialized kernel stack memory into cr2 and error code.
6520 memset(exception
, 0, sizeof(*exception
));
6521 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
6524 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
6526 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
6527 gva_t addr
, void *val
, unsigned int bytes
,
6528 struct x86_exception
*exception
, bool system
)
6530 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6533 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6534 access
|= PFERR_USER_MASK
;
6536 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6539 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6540 unsigned long addr
, void *val
, unsigned int bytes
)
6542 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6543 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6545 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6548 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6549 struct kvm_vcpu
*vcpu
, u32 access
,
6550 struct x86_exception
*exception
)
6553 int r
= X86EMUL_CONTINUE
;
6556 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
6559 unsigned offset
= addr
& (PAGE_SIZE
-1);
6560 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6563 if (gpa
== UNMAPPED_GVA
)
6564 return X86EMUL_PROPAGATE_FAULT
;
6565 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6567 r
= X86EMUL_IO_NEEDED
;
6579 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6580 unsigned int bytes
, struct x86_exception
*exception
,
6583 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6584 u32 access
= PFERR_WRITE_MASK
;
6586 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6587 access
|= PFERR_USER_MASK
;
6589 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6593 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
6594 unsigned int bytes
, struct x86_exception
*exception
)
6596 /* kvm_write_guest_virt_system can pull in tons of pages. */
6597 vcpu
->arch
.l1tf_flush_l1d
= true;
6599 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6600 PFERR_WRITE_MASK
, exception
);
6602 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
6604 int handle_ud(struct kvm_vcpu
*vcpu
)
6606 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
6607 int emul_type
= EMULTYPE_TRAP_UD
;
6608 char sig
[5]; /* ud2; .ascii "kvm" */
6609 struct x86_exception e
;
6611 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, NULL
, 0)))
6614 if (force_emulation_prefix
&&
6615 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
6616 sig
, sizeof(sig
), &e
) == 0 &&
6617 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
6618 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
6619 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
6622 return kvm_emulate_instruction(vcpu
, emul_type
);
6624 EXPORT_SYMBOL_GPL(handle_ud
);
6626 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6627 gpa_t gpa
, bool write
)
6629 /* For APIC access vmexit */
6630 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6633 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
6634 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
6641 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6642 gpa_t
*gpa
, struct x86_exception
*exception
,
6645 u32 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
6646 | (write
? PFERR_WRITE_MASK
: 0);
6649 * currently PKRU is only applied to ept enabled guest so
6650 * there is no pkey in EPT page table for L1 guest or EPT
6651 * shadow page table for L2 guest.
6653 if (vcpu_match_mmio_gva(vcpu
, gva
) && (!is_paging(vcpu
) ||
6654 !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
6655 vcpu
->arch
.mmio_access
, 0, access
))) {
6656 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
6657 (gva
& (PAGE_SIZE
- 1));
6658 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
6662 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6664 if (*gpa
== UNMAPPED_GVA
)
6667 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
6670 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6671 const void *val
, int bytes
)
6675 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
6678 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
6682 struct read_write_emulator_ops
{
6683 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
6685 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6686 void *val
, int bytes
);
6687 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6688 int bytes
, void *val
);
6689 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6690 void *val
, int bytes
);
6694 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
6696 if (vcpu
->mmio_read_completed
) {
6697 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
6698 vcpu
->mmio_fragments
[0].gpa
, val
);
6699 vcpu
->mmio_read_completed
= 0;
6706 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6707 void *val
, int bytes
)
6709 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
6712 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6713 void *val
, int bytes
)
6715 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
6718 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
6720 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
6721 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
6724 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6725 void *val
, int bytes
)
6727 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
6728 return X86EMUL_IO_NEEDED
;
6731 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6732 void *val
, int bytes
)
6734 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
6736 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6737 return X86EMUL_CONTINUE
;
6740 static const struct read_write_emulator_ops read_emultor
= {
6741 .read_write_prepare
= read_prepare
,
6742 .read_write_emulate
= read_emulate
,
6743 .read_write_mmio
= vcpu_mmio_read
,
6744 .read_write_exit_mmio
= read_exit_mmio
,
6747 static const struct read_write_emulator_ops write_emultor
= {
6748 .read_write_emulate
= write_emulate
,
6749 .read_write_mmio
= write_mmio
,
6750 .read_write_exit_mmio
= write_exit_mmio
,
6754 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
6756 struct x86_exception
*exception
,
6757 struct kvm_vcpu
*vcpu
,
6758 const struct read_write_emulator_ops
*ops
)
6762 bool write
= ops
->write
;
6763 struct kvm_mmio_fragment
*frag
;
6764 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6767 * If the exit was due to a NPF we may already have a GPA.
6768 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6769 * Note, this cannot be used on string operations since string
6770 * operation using rep will only have the initial GPA from the NPF
6773 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
6774 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
6775 gpa
= ctxt
->gpa_val
;
6776 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
6778 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
6780 return X86EMUL_PROPAGATE_FAULT
;
6783 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
6784 return X86EMUL_CONTINUE
;
6787 * Is this MMIO handled locally?
6789 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
6790 if (handled
== bytes
)
6791 return X86EMUL_CONTINUE
;
6797 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
6798 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
6802 return X86EMUL_CONTINUE
;
6805 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
6807 void *val
, unsigned int bytes
,
6808 struct x86_exception
*exception
,
6809 const struct read_write_emulator_ops
*ops
)
6811 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6815 if (ops
->read_write_prepare
&&
6816 ops
->read_write_prepare(vcpu
, val
, bytes
))
6817 return X86EMUL_CONTINUE
;
6819 vcpu
->mmio_nr_fragments
= 0;
6821 /* Crossing a page boundary? */
6822 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
6825 now
= -addr
& ~PAGE_MASK
;
6826 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
6829 if (rc
!= X86EMUL_CONTINUE
)
6832 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
6838 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
6840 if (rc
!= X86EMUL_CONTINUE
)
6843 if (!vcpu
->mmio_nr_fragments
)
6846 gpa
= vcpu
->mmio_fragments
[0].gpa
;
6848 vcpu
->mmio_needed
= 1;
6849 vcpu
->mmio_cur_fragment
= 0;
6851 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
6852 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
6853 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
6854 vcpu
->run
->mmio
.phys_addr
= gpa
;
6856 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
6859 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
6863 struct x86_exception
*exception
)
6865 return emulator_read_write(ctxt
, addr
, val
, bytes
,
6866 exception
, &read_emultor
);
6869 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
6873 struct x86_exception
*exception
)
6875 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
6876 exception
, &write_emultor
);
6879 #define CMPXCHG_TYPE(t, ptr, old, new) \
6880 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6882 #ifdef CONFIG_X86_64
6883 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6885 # define CMPXCHG64(ptr, old, new) \
6886 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6889 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
6894 struct x86_exception
*exception
)
6896 struct kvm_host_map map
;
6897 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6903 /* guests cmpxchg8b have to be emulated atomically */
6904 if (bytes
> 8 || (bytes
& (bytes
- 1)))
6907 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
6909 if (gpa
== UNMAPPED_GVA
||
6910 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6914 * Emulate the atomic as a straight write to avoid #AC if SLD is
6915 * enabled in the host and the access splits a cache line.
6917 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
6918 page_line_mask
= ~(cache_line_size() - 1);
6920 page_line_mask
= PAGE_MASK
;
6922 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
6925 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
6928 kaddr
= map
.hva
+ offset_in_page(gpa
);
6932 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
6935 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
6938 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
6941 exchanged
= CMPXCHG64(kaddr
, old
, new);
6947 kvm_vcpu_unmap(vcpu
, &map
, true);
6950 return X86EMUL_CMPXCHG_FAILED
;
6952 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
6954 return X86EMUL_CONTINUE
;
6957 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
6959 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
6962 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
6966 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
6967 if (vcpu
->arch
.pio
.in
)
6968 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
6969 vcpu
->arch
.pio
.size
, pd
);
6971 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
6972 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
6976 pd
+= vcpu
->arch
.pio
.size
;
6981 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
6982 unsigned short port
,
6983 unsigned int count
, bool in
)
6985 vcpu
->arch
.pio
.port
= port
;
6986 vcpu
->arch
.pio
.in
= in
;
6987 vcpu
->arch
.pio
.count
= count
;
6988 vcpu
->arch
.pio
.size
= size
;
6990 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
))
6993 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
6994 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
6995 vcpu
->run
->io
.size
= size
;
6996 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
6997 vcpu
->run
->io
.count
= count
;
6998 vcpu
->run
->io
.port
= port
;
7003 static int __emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7004 unsigned short port
, unsigned int count
)
7006 WARN_ON(vcpu
->arch
.pio
.count
);
7007 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
7008 return emulator_pio_in_out(vcpu
, size
, port
, count
, true);
7011 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
7013 int size
= vcpu
->arch
.pio
.size
;
7014 unsigned count
= vcpu
->arch
.pio
.count
;
7015 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
7016 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
7017 vcpu
->arch
.pio
.count
= 0;
7020 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7021 unsigned short port
, void *val
, unsigned int count
)
7023 if (vcpu
->arch
.pio
.count
) {
7024 /* Complete previous iteration. */
7026 int r
= __emulator_pio_in(vcpu
, size
, port
, count
);
7030 /* Results already available, fall through. */
7033 WARN_ON(count
!= vcpu
->arch
.pio
.count
);
7034 complete_emulator_pio_in(vcpu
, val
);
7038 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
7039 int size
, unsigned short port
, void *val
,
7042 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7046 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7047 unsigned short port
, const void *val
,
7052 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
7053 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
7054 ret
= emulator_pio_in_out(vcpu
, size
, port
, count
, false);
7056 vcpu
->arch
.pio
.count
= 0;
7061 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
7062 int size
, unsigned short port
,
7063 const void *val
, unsigned int count
)
7065 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7068 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
7070 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
7073 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
7075 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
7078 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
7080 if (!need_emulate_wbinvd(vcpu
))
7081 return X86EMUL_CONTINUE
;
7083 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
7084 int cpu
= get_cpu();
7086 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
7087 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
7088 wbinvd_ipi
, NULL
, 1);
7090 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
7093 return X86EMUL_CONTINUE
;
7096 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
7098 kvm_emulate_wbinvd_noskip(vcpu
);
7099 return kvm_skip_emulated_instruction(vcpu
);
7101 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
7105 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
7107 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
7110 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7111 unsigned long *dest
)
7113 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
7116 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7117 unsigned long value
)
7120 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
7123 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
7125 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
7128 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
7130 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7131 unsigned long value
;
7135 value
= kvm_read_cr0(vcpu
);
7138 value
= vcpu
->arch
.cr2
;
7141 value
= kvm_read_cr3(vcpu
);
7144 value
= kvm_read_cr4(vcpu
);
7147 value
= kvm_get_cr8(vcpu
);
7150 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7157 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
7159 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7164 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
7167 vcpu
->arch
.cr2
= val
;
7170 res
= kvm_set_cr3(vcpu
, val
);
7173 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
7176 res
= kvm_set_cr8(vcpu
, val
);
7179 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7186 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
7188 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
7191 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7193 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
7196 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7198 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
7201 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7203 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
7206 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7208 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
7211 static unsigned long emulator_get_cached_segment_base(
7212 struct x86_emulate_ctxt
*ctxt
, int seg
)
7214 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
7217 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
7218 struct desc_struct
*desc
, u32
*base3
,
7221 struct kvm_segment var
;
7223 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
7224 *selector
= var
.selector
;
7227 memset(desc
, 0, sizeof(*desc
));
7235 set_desc_limit(desc
, var
.limit
);
7236 set_desc_base(desc
, (unsigned long)var
.base
);
7237 #ifdef CONFIG_X86_64
7239 *base3
= var
.base
>> 32;
7241 desc
->type
= var
.type
;
7243 desc
->dpl
= var
.dpl
;
7244 desc
->p
= var
.present
;
7245 desc
->avl
= var
.avl
;
7253 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
7254 struct desc_struct
*desc
, u32 base3
,
7257 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7258 struct kvm_segment var
;
7260 var
.selector
= selector
;
7261 var
.base
= get_desc_base(desc
);
7262 #ifdef CONFIG_X86_64
7263 var
.base
|= ((u64
)base3
) << 32;
7265 var
.limit
= get_desc_limit(desc
);
7267 var
.limit
= (var
.limit
<< 12) | 0xfff;
7268 var
.type
= desc
->type
;
7269 var
.dpl
= desc
->dpl
;
7274 var
.avl
= desc
->avl
;
7275 var
.present
= desc
->p
;
7276 var
.unusable
= !var
.present
;
7279 kvm_set_segment(vcpu
, &var
, seg
);
7283 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
7284 u32 msr_index
, u64
*pdata
)
7286 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7289 r
= kvm_get_msr(vcpu
, msr_index
, pdata
);
7291 if (r
&& kvm_get_msr_user_space(vcpu
, msr_index
, r
)) {
7292 /* Bounce to user space */
7293 return X86EMUL_IO_NEEDED
;
7299 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
7300 u32 msr_index
, u64 data
)
7302 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7305 r
= kvm_set_msr(vcpu
, msr_index
, data
);
7307 if (r
&& kvm_set_msr_user_space(vcpu
, msr_index
, data
, r
)) {
7308 /* Bounce to user space */
7309 return X86EMUL_IO_NEEDED
;
7315 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
7317 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7319 return vcpu
->arch
.smbase
;
7322 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
7324 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7326 vcpu
->arch
.smbase
= smbase
;
7329 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
7332 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
7335 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
7336 u32 pmc
, u64
*pdata
)
7338 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
7341 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
7343 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
7346 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
7347 struct x86_instruction_info
*info
,
7348 enum x86_intercept_stage stage
)
7350 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
7354 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
7355 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
7358 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
7361 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
7363 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
7366 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
7368 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
7371 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
7373 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
7376 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
7378 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
7381 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
7383 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
7386 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
7388 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
7391 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
7393 return emul_to_vcpu(ctxt
)->arch
.hflags
;
7396 static void emulator_exiting_smm(struct x86_emulate_ctxt
*ctxt
)
7398 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7400 kvm_smm_changed(vcpu
, false);
7403 static int emulator_leave_smm(struct x86_emulate_ctxt
*ctxt
,
7404 const char *smstate
)
7406 return static_call(kvm_x86_leave_smm
)(emul_to_vcpu(ctxt
), smstate
);
7409 static void emulator_triple_fault(struct x86_emulate_ctxt
*ctxt
)
7411 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, emul_to_vcpu(ctxt
));
7414 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
7416 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
7419 static const struct x86_emulate_ops emulate_ops
= {
7420 .read_gpr
= emulator_read_gpr
,
7421 .write_gpr
= emulator_write_gpr
,
7422 .read_std
= emulator_read_std
,
7423 .write_std
= emulator_write_std
,
7424 .read_phys
= kvm_read_guest_phys_system
,
7425 .fetch
= kvm_fetch_guest_virt
,
7426 .read_emulated
= emulator_read_emulated
,
7427 .write_emulated
= emulator_write_emulated
,
7428 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
7429 .invlpg
= emulator_invlpg
,
7430 .pio_in_emulated
= emulator_pio_in_emulated
,
7431 .pio_out_emulated
= emulator_pio_out_emulated
,
7432 .get_segment
= emulator_get_segment
,
7433 .set_segment
= emulator_set_segment
,
7434 .get_cached_segment_base
= emulator_get_cached_segment_base
,
7435 .get_gdt
= emulator_get_gdt
,
7436 .get_idt
= emulator_get_idt
,
7437 .set_gdt
= emulator_set_gdt
,
7438 .set_idt
= emulator_set_idt
,
7439 .get_cr
= emulator_get_cr
,
7440 .set_cr
= emulator_set_cr
,
7441 .cpl
= emulator_get_cpl
,
7442 .get_dr
= emulator_get_dr
,
7443 .set_dr
= emulator_set_dr
,
7444 .get_smbase
= emulator_get_smbase
,
7445 .set_smbase
= emulator_set_smbase
,
7446 .set_msr
= emulator_set_msr
,
7447 .get_msr
= emulator_get_msr
,
7448 .check_pmc
= emulator_check_pmc
,
7449 .read_pmc
= emulator_read_pmc
,
7450 .halt
= emulator_halt
,
7451 .wbinvd
= emulator_wbinvd
,
7452 .fix_hypercall
= emulator_fix_hypercall
,
7453 .intercept
= emulator_intercept
,
7454 .get_cpuid
= emulator_get_cpuid
,
7455 .guest_has_long_mode
= emulator_guest_has_long_mode
,
7456 .guest_has_movbe
= emulator_guest_has_movbe
,
7457 .guest_has_fxsr
= emulator_guest_has_fxsr
,
7458 .set_nmi_mask
= emulator_set_nmi_mask
,
7459 .get_hflags
= emulator_get_hflags
,
7460 .exiting_smm
= emulator_exiting_smm
,
7461 .leave_smm
= emulator_leave_smm
,
7462 .triple_fault
= emulator_triple_fault
,
7463 .set_xcr
= emulator_set_xcr
,
7466 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
7468 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
7470 * an sti; sti; sequence only disable interrupts for the first
7471 * instruction. So, if the last instruction, be it emulated or
7472 * not, left the system with the INT_STI flag enabled, it
7473 * means that the last instruction is an sti. We should not
7474 * leave the flag on in this case. The same goes for mov ss
7476 if (int_shadow
& mask
)
7478 if (unlikely(int_shadow
|| mask
)) {
7479 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
7481 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7485 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
7487 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7488 if (ctxt
->exception
.vector
== PF_VECTOR
)
7489 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
7491 if (ctxt
->exception
.error_code_valid
)
7492 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
7493 ctxt
->exception
.error_code
);
7495 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
7499 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7501 struct x86_emulate_ctxt
*ctxt
;
7503 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
7505 pr_err("kvm: failed to allocate vcpu's emulator\n");
7510 ctxt
->ops
= &emulate_ops
;
7511 vcpu
->arch
.emulate_ctxt
= ctxt
;
7516 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7518 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7521 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
7523 ctxt
->gpa_available
= false;
7524 ctxt
->eflags
= kvm_get_rflags(vcpu
);
7525 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
7527 ctxt
->eip
= kvm_rip_read(vcpu
);
7528 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
7529 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
7530 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
7531 cs_db
? X86EMUL_MODE_PROT32
:
7532 X86EMUL_MODE_PROT16
;
7533 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
7534 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
7535 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
7537 ctxt
->interruptibility
= 0;
7538 ctxt
->have_exception
= false;
7539 ctxt
->exception
.vector
= -1;
7540 ctxt
->perm_ok
= false;
7542 init_decode_cache(ctxt
);
7543 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7546 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
7548 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7551 init_emulate_ctxt(vcpu
);
7555 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
7556 ret
= emulate_int_real(ctxt
, irq
);
7558 if (ret
!= X86EMUL_CONTINUE
) {
7559 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
7561 ctxt
->eip
= ctxt
->_eip
;
7562 kvm_rip_write(vcpu
, ctxt
->eip
);
7563 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7566 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
7568 static void prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
)
7570 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7571 u32 insn_size
= ctxt
->fetch
.end
- ctxt
->fetch
.data
;
7572 struct kvm_run
*run
= vcpu
->run
;
7574 run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7575 run
->emulation_failure
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7576 run
->emulation_failure
.ndata
= 0;
7577 run
->emulation_failure
.flags
= 0;
7580 run
->emulation_failure
.ndata
= 3;
7581 run
->emulation_failure
.flags
|=
7582 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES
;
7583 run
->emulation_failure
.insn_size
= insn_size
;
7584 memset(run
->emulation_failure
.insn_bytes
, 0x90,
7585 sizeof(run
->emulation_failure
.insn_bytes
));
7586 memcpy(run
->emulation_failure
.insn_bytes
,
7587 ctxt
->fetch
.data
, insn_size
);
7591 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
7593 struct kvm
*kvm
= vcpu
->kvm
;
7595 ++vcpu
->stat
.insn_emulation_fail
;
7596 trace_kvm_emulate_insn_failed(vcpu
);
7598 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
7599 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7603 if (kvm
->arch
.exit_on_emulation_error
||
7604 (emulation_type
& EMULTYPE_SKIP
)) {
7605 prepare_emulation_failure_exit(vcpu
);
7609 kvm_queue_exception(vcpu
, UD_VECTOR
);
7611 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
7612 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7613 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7614 vcpu
->run
->internal
.ndata
= 0;
7621 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7622 bool write_fault_to_shadow_pgtable
,
7625 gpa_t gpa
= cr2_or_gpa
;
7628 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7631 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7632 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7635 if (!vcpu
->arch
.mmu
->direct_map
) {
7637 * Write permission should be allowed since only
7638 * write access need to be emulated.
7640 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7643 * If the mapping is invalid in guest, let cpu retry
7644 * it to generate fault.
7646 if (gpa
== UNMAPPED_GVA
)
7651 * Do not retry the unhandleable instruction if it faults on the
7652 * readonly host memory, otherwise it will goto a infinite loop:
7653 * retry instruction -> write #PF -> emulation fail -> retry
7654 * instruction -> ...
7656 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
7659 * If the instruction failed on the error pfn, it can not be fixed,
7660 * report the error to userspace.
7662 if (is_error_noslot_pfn(pfn
))
7665 kvm_release_pfn_clean(pfn
);
7667 /* The instructions are well-emulated on direct mmu. */
7668 if (vcpu
->arch
.mmu
->direct_map
) {
7669 unsigned int indirect_shadow_pages
;
7671 write_lock(&vcpu
->kvm
->mmu_lock
);
7672 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
7673 write_unlock(&vcpu
->kvm
->mmu_lock
);
7675 if (indirect_shadow_pages
)
7676 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7682 * if emulation was due to access to shadowed page table
7683 * and it failed try to unshadow page and re-enter the
7684 * guest to let CPU execute the instruction.
7686 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7689 * If the access faults on its page table, it can not
7690 * be fixed by unprotecting shadow page and it should
7691 * be reported to userspace.
7693 return !write_fault_to_shadow_pgtable
;
7696 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
7697 gpa_t cr2_or_gpa
, int emulation_type
)
7699 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7700 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
7702 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
7703 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
7706 * If the emulation is caused by #PF and it is non-page_table
7707 * writing instruction, it means the VM-EXIT is caused by shadow
7708 * page protected, we can zap the shadow page and retry this
7709 * instruction directly.
7711 * Note: if the guest uses a non-page-table modifying instruction
7712 * on the PDE that points to the instruction, then we will unmap
7713 * the instruction and go to an infinite loop. So, we cache the
7714 * last retried eip and the last fault address, if we meet the eip
7715 * and the address again, we can break out of the potential infinite
7718 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
7720 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7723 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7724 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7727 if (x86_page_table_writing_insn(ctxt
))
7730 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
7733 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
7734 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
7736 if (!vcpu
->arch
.mmu
->direct_map
)
7737 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7739 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7744 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
7745 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
7747 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
)
7749 trace_kvm_smm_transition(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, entering_smm
);
7752 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
7754 vcpu
->arch
.hflags
&= ~(HF_SMM_MASK
| HF_SMM_INSIDE_NMI_MASK
);
7756 /* Process a latched INIT or SMI, if any. */
7757 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7760 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7761 * on SMM exit we still need to reload them from
7764 vcpu
->arch
.pdptrs_from_userspace
= false;
7767 kvm_mmu_reset_context(vcpu
);
7770 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
7779 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
7780 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
7785 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
7787 struct kvm_run
*kvm_run
= vcpu
->run
;
7789 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
7790 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
7791 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
7792 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7793 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7796 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
7800 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
7802 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7805 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
7810 * rflags is the old, "raw" value of the flags. The new value has
7811 * not been saved yet.
7813 * This is correct even for TF set by the guest, because "the
7814 * processor will not generate this exception after the instruction
7815 * that sets the TF flag".
7817 if (unlikely(rflags
& X86_EFLAGS_TF
))
7818 r
= kvm_vcpu_do_singlestep(vcpu
);
7821 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
7823 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
7825 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
7826 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
7827 struct kvm_run
*kvm_run
= vcpu
->run
;
7828 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7829 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7830 vcpu
->arch
.guest_debug_dr7
,
7834 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
7835 kvm_run
->debug
.arch
.pc
= eip
;
7836 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7837 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7843 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
7844 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
7845 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7846 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7851 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
7860 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
7862 switch (ctxt
->opcode_len
) {
7869 case 0xe6: /* OUT */
7873 case 0x6c: /* INS */
7875 case 0x6e: /* OUTS */
7882 case 0x33: /* RDPMC */
7892 * Decode to be emulated instruction. Return EMULATION_OK if success.
7894 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
7895 void *insn
, int insn_len
)
7897 int r
= EMULATION_OK
;
7898 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7900 init_emulate_ctxt(vcpu
);
7903 * We will reenter on the same instruction since we do not set
7904 * complete_userspace_io. This does not handle watchpoints yet,
7905 * those would be handled in the emulate_ops.
7907 if (!(emulation_type
& EMULTYPE_SKIP
) &&
7908 kvm_vcpu_check_breakpoint(vcpu
, &r
))
7911 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
7913 trace_kvm_emulate_insn_start(vcpu
);
7914 ++vcpu
->stat
.insn_emulation
;
7918 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
7920 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7921 int emulation_type
, void *insn
, int insn_len
)
7924 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7925 bool writeback
= true;
7926 bool write_fault_to_spt
;
7928 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, insn
, insn_len
)))
7931 vcpu
->arch
.l1tf_flush_l1d
= true;
7934 * Clear write_fault_to_shadow_pgtable here to ensure it is
7937 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
7938 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
7940 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
7941 kvm_clear_exception_queue(vcpu
);
7943 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
7945 if (r
!= EMULATION_OK
) {
7946 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
7947 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
7948 kvm_queue_exception(vcpu
, UD_VECTOR
);
7951 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
7955 if (ctxt
->have_exception
) {
7957 * #UD should result in just EMULATION_FAILED, and trap-like
7958 * exception should not be encountered during decode.
7960 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
7961 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
7962 inject_emulated_exception(vcpu
);
7965 return handle_emulation_failure(vcpu
, emulation_type
);
7969 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
7970 !is_vmware_backdoor_opcode(ctxt
)) {
7971 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7976 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7977 * for kvm_skip_emulated_instruction(). The caller is responsible for
7978 * updating interruptibility state and injecting single-step #DBs.
7980 if (emulation_type
& EMULTYPE_SKIP
) {
7981 kvm_rip_write(vcpu
, ctxt
->_eip
);
7982 if (ctxt
->eflags
& X86_EFLAGS_RF
)
7983 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
7987 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
7990 /* this is needed for vmware backdoor interface to work since it
7991 changes registers values during IO operation */
7992 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
7993 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7994 emulator_invalidate_register_cache(ctxt
);
7998 if (emulation_type
& EMULTYPE_PF
) {
7999 /* Save the faulting GPA (cr2) in the address field */
8000 ctxt
->exception
.address
= cr2_or_gpa
;
8002 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8003 if (vcpu
->arch
.mmu
->direct_map
) {
8004 ctxt
->gpa_available
= true;
8005 ctxt
->gpa_val
= cr2_or_gpa
;
8008 /* Sanitize the address out of an abundance of paranoia. */
8009 ctxt
->exception
.address
= 0;
8012 r
= x86_emulate_insn(ctxt
);
8014 if (r
== EMULATION_INTERCEPTED
)
8017 if (r
== EMULATION_FAILED
) {
8018 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
8022 return handle_emulation_failure(vcpu
, emulation_type
);
8025 if (ctxt
->have_exception
) {
8027 if (inject_emulated_exception(vcpu
))
8029 } else if (vcpu
->arch
.pio
.count
) {
8030 if (!vcpu
->arch
.pio
.in
) {
8031 /* FIXME: return into emulator if single-stepping. */
8032 vcpu
->arch
.pio
.count
= 0;
8035 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
8038 } else if (vcpu
->mmio_needed
) {
8039 ++vcpu
->stat
.mmio_exits
;
8041 if (!vcpu
->mmio_is_write
)
8044 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
8045 } else if (r
== EMULATION_RESTART
)
8051 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8052 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
8053 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
8054 if (!ctxt
->have_exception
||
8055 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
8056 kvm_rip_write(vcpu
, ctxt
->eip
);
8057 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
8058 r
= kvm_vcpu_do_singlestep(vcpu
);
8059 if (kvm_x86_ops
.update_emulated_instruction
)
8060 static_call(kvm_x86_update_emulated_instruction
)(vcpu
);
8061 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
8065 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8066 * do nothing, and it will be requested again as soon as
8067 * the shadow expires. But we still need to check here,
8068 * because POPF has no interrupt shadow.
8070 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
8071 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8073 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
8078 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
8080 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
8082 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
8084 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
8085 void *insn
, int insn_len
)
8087 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
8089 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
8091 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
8093 vcpu
->arch
.pio
.count
= 0;
8097 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
8099 vcpu
->arch
.pio
.count
= 0;
8101 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
8104 return kvm_skip_emulated_instruction(vcpu
);
8107 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
8108 unsigned short port
)
8110 unsigned long val
= kvm_rax_read(vcpu
);
8111 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
8117 * Workaround userspace that relies on old KVM behavior of %rip being
8118 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8121 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
8122 vcpu
->arch
.complete_userspace_io
=
8123 complete_fast_pio_out_port_0x7e
;
8124 kvm_skip_emulated_instruction(vcpu
);
8126 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8127 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
8132 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
8136 /* We should only ever be called with arch.pio.count equal to 1 */
8137 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
8139 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
8140 vcpu
->arch
.pio
.count
= 0;
8144 /* For size less than 4 we merge, else we zero extend */
8145 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
8148 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8149 * the copy and tracing
8151 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
8152 kvm_rax_write(vcpu
, val
);
8154 return kvm_skip_emulated_instruction(vcpu
);
8157 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
8158 unsigned short port
)
8163 /* For size less than 4 we merge, else we zero extend */
8164 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
8166 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
8168 kvm_rax_write(vcpu
, val
);
8172 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8173 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
8178 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
8183 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
8185 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
8186 return ret
&& kvm_skip_emulated_instruction(vcpu
);
8188 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
8190 static int kvmclock_cpu_down_prep(unsigned int cpu
)
8192 __this_cpu_write(cpu_tsc_khz
, 0);
8196 static void tsc_khz_changed(void *data
)
8198 struct cpufreq_freqs
*freq
= data
;
8199 unsigned long khz
= 0;
8203 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8204 khz
= cpufreq_quick_get(raw_smp_processor_id());
8207 __this_cpu_write(cpu_tsc_khz
, khz
);
8210 #ifdef CONFIG_X86_64
8211 static void kvm_hyperv_tsc_notifier(void)
8214 struct kvm_vcpu
*vcpu
;
8216 unsigned long flags
;
8218 mutex_lock(&kvm_lock
);
8219 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8220 kvm_make_mclock_inprogress_request(kvm
);
8222 hyperv_stop_tsc_emulation();
8224 /* TSC frequency always matches when on Hyper-V */
8225 for_each_present_cpu(cpu
)
8226 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
8227 kvm_max_guest_tsc_khz
= tsc_khz
;
8229 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8230 struct kvm_arch
*ka
= &kvm
->arch
;
8232 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
8233 pvclock_update_vm_gtod_copy(kvm
);
8234 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
8236 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8237 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8239 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8240 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
8242 mutex_unlock(&kvm_lock
);
8246 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
8249 struct kvm_vcpu
*vcpu
;
8250 int i
, send_ipi
= 0;
8253 * We allow guests to temporarily run on slowing clocks,
8254 * provided we notify them after, or to run on accelerating
8255 * clocks, provided we notify them before. Thus time never
8258 * However, we have a problem. We can't atomically update
8259 * the frequency of a given CPU from this function; it is
8260 * merely a notifier, which can be called from any CPU.
8261 * Changing the TSC frequency at arbitrary points in time
8262 * requires a recomputation of local variables related to
8263 * the TSC for each VCPU. We must flag these local variables
8264 * to be updated and be sure the update takes place with the
8265 * new frequency before any guests proceed.
8267 * Unfortunately, the combination of hotplug CPU and frequency
8268 * change creates an intractable locking scenario; the order
8269 * of when these callouts happen is undefined with respect to
8270 * CPU hotplug, and they can race with each other. As such,
8271 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8272 * undefined; you can actually have a CPU frequency change take
8273 * place in between the computation of X and the setting of the
8274 * variable. To protect against this problem, all updates of
8275 * the per_cpu tsc_khz variable are done in an interrupt
8276 * protected IPI, and all callers wishing to update the value
8277 * must wait for a synchronous IPI to complete (which is trivial
8278 * if the caller is on the CPU already). This establishes the
8279 * necessary total order on variable updates.
8281 * Note that because a guest time update may take place
8282 * anytime after the setting of the VCPU's request bit, the
8283 * correct TSC value must be set before the request. However,
8284 * to ensure the update actually makes it to any guest which
8285 * starts running in hardware virtualization between the set
8286 * and the acquisition of the spinlock, we must also ping the
8287 * CPU after setting the request bit.
8291 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8293 mutex_lock(&kvm_lock
);
8294 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8295 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8296 if (vcpu
->cpu
!= cpu
)
8298 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8299 if (vcpu
->cpu
!= raw_smp_processor_id())
8303 mutex_unlock(&kvm_lock
);
8305 if (freq
->old
< freq
->new && send_ipi
) {
8307 * We upscale the frequency. Must make the guest
8308 * doesn't see old kvmclock values while running with
8309 * the new frequency, otherwise we risk the guest sees
8310 * time go backwards.
8312 * In case we update the frequency for another cpu
8313 * (which might be in guest context) send an interrupt
8314 * to kick the cpu out of guest context. Next time
8315 * guest context is entered kvmclock will be updated,
8316 * so the guest will not see stale values.
8318 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8322 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
8325 struct cpufreq_freqs
*freq
= data
;
8328 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
8330 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
8333 for_each_cpu(cpu
, freq
->policy
->cpus
)
8334 __kvmclock_cpufreq_notifier(freq
, cpu
);
8339 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
8340 .notifier_call
= kvmclock_cpufreq_notifier
8343 static int kvmclock_cpu_online(unsigned int cpu
)
8345 tsc_khz_changed(NULL
);
8349 static void kvm_timer_init(void)
8351 max_tsc_khz
= tsc_khz
;
8353 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
8354 #ifdef CONFIG_CPU_FREQ
8355 struct cpufreq_policy
*policy
;
8359 policy
= cpufreq_cpu_get(cpu
);
8361 if (policy
->cpuinfo
.max_freq
)
8362 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
8363 cpufreq_cpu_put(policy
);
8367 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
8368 CPUFREQ_TRANSITION_NOTIFIER
);
8371 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
8372 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
8375 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
8376 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
8378 int kvm_is_in_guest(void)
8380 return __this_cpu_read(current_vcpu
) != NULL
;
8383 static int kvm_is_user_mode(void)
8387 if (__this_cpu_read(current_vcpu
))
8388 user_mode
= static_call(kvm_x86_get_cpl
)(__this_cpu_read(current_vcpu
));
8390 return user_mode
!= 0;
8393 static unsigned long kvm_get_guest_ip(void)
8395 unsigned long ip
= 0;
8397 if (__this_cpu_read(current_vcpu
))
8398 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
8403 static void kvm_handle_intel_pt_intr(void)
8405 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
8407 kvm_make_request(KVM_REQ_PMI
, vcpu
);
8408 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
8409 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
8412 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
8413 .is_in_guest
= kvm_is_in_guest
,
8414 .is_user_mode
= kvm_is_user_mode
,
8415 .get_guest_ip
= kvm_get_guest_ip
,
8416 .handle_intel_pt_intr
= kvm_handle_intel_pt_intr
,
8419 #ifdef CONFIG_X86_64
8420 static void pvclock_gtod_update_fn(struct work_struct
*work
)
8424 struct kvm_vcpu
*vcpu
;
8427 mutex_lock(&kvm_lock
);
8428 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8429 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8430 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8431 atomic_set(&kvm_guest_has_master_clock
, 0);
8432 mutex_unlock(&kvm_lock
);
8435 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
8438 * Indirection to move queue_work() out of the tk_core.seq write held
8439 * region to prevent possible deadlocks against time accessors which
8440 * are invoked with work related locks held.
8442 static void pvclock_irq_work_fn(struct irq_work
*w
)
8444 queue_work(system_long_wq
, &pvclock_gtod_work
);
8447 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
8450 * Notification about pvclock gtod data update.
8452 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
8455 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
8456 struct timekeeper
*tk
= priv
;
8458 update_pvclock_gtod(tk
);
8461 * Disable master clock if host does not trust, or does not use,
8462 * TSC based clocksource. Delegate queue_work() to irq_work as
8463 * this is invoked with tk_core.seq write held.
8465 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
8466 atomic_read(&kvm_guest_has_master_clock
) != 0)
8467 irq_work_queue(&pvclock_irq_work
);
8471 static struct notifier_block pvclock_gtod_notifier
= {
8472 .notifier_call
= pvclock_gtod_notify
,
8476 int kvm_arch_init(void *opaque
)
8478 struct kvm_x86_init_ops
*ops
= opaque
;
8481 if (kvm_x86_ops
.hardware_enable
) {
8482 printk(KERN_ERR
"kvm: already loaded the other module\n");
8487 if (!ops
->cpu_has_kvm_support()) {
8488 pr_err_ratelimited("kvm: no hardware support\n");
8492 if (ops
->disabled_by_bios()) {
8493 pr_warn_ratelimited("kvm: disabled by bios\n");
8499 * KVM explicitly assumes that the guest has an FPU and
8500 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8501 * vCPU's FPU state as a fxregs_state struct.
8503 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
8504 printk(KERN_ERR
"kvm: inadequate fpu\n");
8510 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
8511 __alignof__(struct fpu
), SLAB_ACCOUNT
,
8513 if (!x86_fpu_cache
) {
8514 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
8518 x86_emulator_cache
= kvm_alloc_emulator_cache();
8519 if (!x86_emulator_cache
) {
8520 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8521 goto out_free_x86_fpu_cache
;
8524 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
8525 if (!user_return_msrs
) {
8526 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
8527 goto out_free_x86_emulator_cache
;
8529 kvm_nr_uret_msrs
= 0;
8531 r
= kvm_mmu_module_init();
8533 goto out_free_percpu
;
8537 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
8539 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
8540 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
8541 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
8544 if (pi_inject_timer
== -1)
8545 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
8546 #ifdef CONFIG_X86_64
8547 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
8549 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8550 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
8556 free_percpu(user_return_msrs
);
8557 out_free_x86_emulator_cache
:
8558 kmem_cache_destroy(x86_emulator_cache
);
8559 out_free_x86_fpu_cache
:
8560 kmem_cache_destroy(x86_fpu_cache
);
8565 void kvm_arch_exit(void)
8567 #ifdef CONFIG_X86_64
8568 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8569 clear_hv_tscchange_cb();
8572 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
8574 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8575 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
8576 CPUFREQ_TRANSITION_NOTIFIER
);
8577 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
8578 #ifdef CONFIG_X86_64
8579 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
8580 irq_work_sync(&pvclock_irq_work
);
8581 cancel_work_sync(&pvclock_gtod_work
);
8583 kvm_x86_ops
.hardware_enable
= NULL
;
8584 kvm_mmu_module_exit();
8585 free_percpu(user_return_msrs
);
8586 kmem_cache_destroy(x86_emulator_cache
);
8587 kmem_cache_destroy(x86_fpu_cache
);
8588 #ifdef CONFIG_KVM_XEN
8589 static_key_deferred_flush(&kvm_xen_enabled
);
8590 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
8594 static int __kvm_vcpu_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
8596 ++vcpu
->stat
.halt_exits
;
8597 if (lapic_in_kernel(vcpu
)) {
8598 vcpu
->arch
.mp_state
= state
;
8601 vcpu
->run
->exit_reason
= reason
;
8606 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
8608 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
8610 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
8612 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
8614 int ret
= kvm_skip_emulated_instruction(vcpu
);
8616 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8617 * KVM_EXIT_DEBUG here.
8619 return kvm_vcpu_halt(vcpu
) && ret
;
8621 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
8623 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
8625 int ret
= kvm_skip_emulated_instruction(vcpu
);
8627 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
, KVM_EXIT_AP_RESET_HOLD
) && ret
;
8629 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
8631 #ifdef CONFIG_X86_64
8632 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
8633 unsigned long clock_type
)
8635 struct kvm_clock_pairing clock_pairing
;
8636 struct timespec64 ts
;
8640 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
8641 return -KVM_EOPNOTSUPP
;
8643 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
8644 return -KVM_EOPNOTSUPP
;
8646 clock_pairing
.sec
= ts
.tv_sec
;
8647 clock_pairing
.nsec
= ts
.tv_nsec
;
8648 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
8649 clock_pairing
.flags
= 0;
8650 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
8653 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
8654 sizeof(struct kvm_clock_pairing
)))
8662 * kvm_pv_kick_cpu_op: Kick a vcpu.
8664 * @apicid - apicid of vcpu to be kicked.
8666 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
8668 struct kvm_lapic_irq lapic_irq
;
8670 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
8671 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
8672 lapic_irq
.level
= 0;
8673 lapic_irq
.dest_id
= apicid
;
8674 lapic_irq
.msi_redir_hint
= false;
8676 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
8677 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
8680 bool kvm_apicv_activated(struct kvm
*kvm
)
8682 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
8684 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
8686 static void kvm_apicv_init(struct kvm
*kvm
)
8688 mutex_init(&kvm
->arch
.apicv_update_lock
);
8691 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
8692 &kvm
->arch
.apicv_inhibit_reasons
);
8694 set_bit(APICV_INHIBIT_REASON_DISABLE
,
8695 &kvm
->arch
.apicv_inhibit_reasons
);
8698 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
8700 struct kvm_vcpu
*target
= NULL
;
8701 struct kvm_apic_map
*map
;
8703 vcpu
->stat
.directed_yield_attempted
++;
8705 if (single_task_running())
8709 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
8711 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
8712 target
= map
->phys_map
[dest_id
]->vcpu
;
8716 if (!target
|| !READ_ONCE(target
->ready
))
8719 /* Ignore requests to yield to self */
8723 if (kvm_vcpu_yield_to(target
) <= 0)
8726 vcpu
->stat
.directed_yield_successful
++;
8732 static int complete_hypercall_exit(struct kvm_vcpu
*vcpu
)
8734 u64 ret
= vcpu
->run
->hypercall
.ret
;
8736 if (!is_64_bit_mode(vcpu
))
8738 kvm_rax_write(vcpu
, ret
);
8739 ++vcpu
->stat
.hypercalls
;
8740 return kvm_skip_emulated_instruction(vcpu
);
8743 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
8745 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
8748 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
8749 return kvm_xen_hypercall(vcpu
);
8751 if (kvm_hv_hypercall_enabled(vcpu
))
8752 return kvm_hv_hypercall(vcpu
);
8754 nr
= kvm_rax_read(vcpu
);
8755 a0
= kvm_rbx_read(vcpu
);
8756 a1
= kvm_rcx_read(vcpu
);
8757 a2
= kvm_rdx_read(vcpu
);
8758 a3
= kvm_rsi_read(vcpu
);
8760 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
8762 op_64_bit
= is_64_bit_hypercall(vcpu
);
8771 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
8779 case KVM_HC_VAPIC_POLL_IRQ
:
8782 case KVM_HC_KICK_CPU
:
8783 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
8786 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
8787 kvm_sched_yield(vcpu
, a1
);
8790 #ifdef CONFIG_X86_64
8791 case KVM_HC_CLOCK_PAIRING
:
8792 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
8795 case KVM_HC_SEND_IPI
:
8796 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
8799 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
8801 case KVM_HC_SCHED_YIELD
:
8802 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
8805 kvm_sched_yield(vcpu
, a0
);
8808 case KVM_HC_MAP_GPA_RANGE
: {
8809 u64 gpa
= a0
, npages
= a1
, attrs
= a2
;
8812 if (!(vcpu
->kvm
->arch
.hypercall_exit_enabled
& (1 << KVM_HC_MAP_GPA_RANGE
)))
8815 if (!PAGE_ALIGNED(gpa
) || !npages
||
8816 gpa_to_gfn(gpa
) + npages
<= gpa_to_gfn(gpa
)) {
8821 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERCALL
;
8822 vcpu
->run
->hypercall
.nr
= KVM_HC_MAP_GPA_RANGE
;
8823 vcpu
->run
->hypercall
.args
[0] = gpa
;
8824 vcpu
->run
->hypercall
.args
[1] = npages
;
8825 vcpu
->run
->hypercall
.args
[2] = attrs
;
8826 vcpu
->run
->hypercall
.longmode
= op_64_bit
;
8827 vcpu
->arch
.complete_userspace_io
= complete_hypercall_exit
;
8837 kvm_rax_write(vcpu
, ret
);
8839 ++vcpu
->stat
.hypercalls
;
8840 return kvm_skip_emulated_instruction(vcpu
);
8842 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
8844 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
8846 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8847 char instruction
[3];
8848 unsigned long rip
= kvm_rip_read(vcpu
);
8850 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
8852 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
8856 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
8858 return vcpu
->run
->request_interrupt_window
&&
8859 likely(!pic_in_kernel(vcpu
->kvm
));
8862 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
8864 struct kvm_run
*kvm_run
= vcpu
->run
;
8867 * if_flag is obsolete and useless, so do not bother
8868 * setting it for SEV-ES guests. Userspace can just
8869 * use kvm_run->ready_for_interrupt_injection.
8871 kvm_run
->if_flag
= !vcpu
->arch
.guest_state_protected
8872 && (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
8874 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
8875 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
8878 * The call to kvm_ready_for_interrupt_injection() may end up in
8879 * kvm_xen_has_interrupt() which may require the srcu lock to be
8880 * held, to protect against changes in the vcpu_info address.
8882 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8883 kvm_run
->ready_for_interrupt_injection
=
8884 pic_in_kernel(vcpu
->kvm
) ||
8885 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
8886 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8889 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
8892 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
8896 if (!kvm_x86_ops
.update_cr8_intercept
)
8899 if (!lapic_in_kernel(vcpu
))
8902 if (vcpu
->arch
.apicv_active
)
8905 if (!vcpu
->arch
.apic
->vapic_addr
)
8906 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
8913 tpr
= kvm_lapic_get_cr8(vcpu
);
8915 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
8919 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
8921 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8922 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
8926 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
8929 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
8931 if (vcpu
->arch
.exception
.error_code
&& !is_protmode(vcpu
))
8932 vcpu
->arch
.exception
.error_code
= false;
8933 static_call(kvm_x86_queue_exception
)(vcpu
);
8936 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
8939 bool can_inject
= true;
8941 /* try to reinject previous events if any */
8943 if (vcpu
->arch
.exception
.injected
) {
8944 kvm_inject_exception(vcpu
);
8948 * Do not inject an NMI or interrupt if there is a pending
8949 * exception. Exceptions and interrupts are recognized at
8950 * instruction boundaries, i.e. the start of an instruction.
8951 * Trap-like exceptions, e.g. #DB, have higher priority than
8952 * NMIs and interrupts, i.e. traps are recognized before an
8953 * NMI/interrupt that's pending on the same instruction.
8954 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8955 * priority, but are only generated (pended) during instruction
8956 * execution, i.e. a pending fault-like exception means the
8957 * fault occurred on the *previous* instruction and must be
8958 * serviced prior to recognizing any new events in order to
8959 * fully complete the previous instruction.
8961 else if (!vcpu
->arch
.exception
.pending
) {
8962 if (vcpu
->arch
.nmi_injected
) {
8963 static_call(kvm_x86_set_nmi
)(vcpu
);
8965 } else if (vcpu
->arch
.interrupt
.injected
) {
8966 static_call(kvm_x86_set_irq
)(vcpu
);
8971 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
8972 vcpu
->arch
.exception
.pending
);
8975 * Call check_nested_events() even if we reinjected a previous event
8976 * in order for caller to determine if it should require immediate-exit
8977 * from L2 to L1 due to pending L1 events which require exit
8980 if (is_guest_mode(vcpu
)) {
8981 r
= kvm_check_nested_events(vcpu
);
8986 /* try to inject new event if pending */
8987 if (vcpu
->arch
.exception
.pending
) {
8988 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
8989 vcpu
->arch
.exception
.has_error_code
,
8990 vcpu
->arch
.exception
.error_code
);
8992 vcpu
->arch
.exception
.pending
= false;
8993 vcpu
->arch
.exception
.injected
= true;
8995 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
8996 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
8999 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
9000 kvm_deliver_exception_payload(vcpu
);
9001 if (vcpu
->arch
.dr7
& DR7_GD
) {
9002 vcpu
->arch
.dr7
&= ~DR7_GD
;
9003 kvm_update_dr7(vcpu
);
9007 kvm_inject_exception(vcpu
);
9011 /* Don't inject interrupts if the user asked to avoid doing so */
9012 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
)
9016 * Finally, inject interrupt events. If an event cannot be injected
9017 * due to architectural conditions (e.g. IF=0) a window-open exit
9018 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
9019 * and can architecturally be injected, but we cannot do it right now:
9020 * an interrupt could have arrived just now and we have to inject it
9021 * as a vmexit, or there could already an event in the queue, which is
9022 * indicated by can_inject. In that case we request an immediate exit
9023 * in order to make progress and get back here for another iteration.
9024 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9026 if (vcpu
->arch
.smi_pending
) {
9027 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
9031 vcpu
->arch
.smi_pending
= false;
9032 ++vcpu
->arch
.smi_count
;
9036 static_call(kvm_x86_enable_smi_window
)(vcpu
);
9039 if (vcpu
->arch
.nmi_pending
) {
9040 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
9044 --vcpu
->arch
.nmi_pending
;
9045 vcpu
->arch
.nmi_injected
= true;
9046 static_call(kvm_x86_set_nmi
)(vcpu
);
9048 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
9050 if (vcpu
->arch
.nmi_pending
)
9051 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
9054 if (kvm_cpu_has_injectable_intr(vcpu
)) {
9055 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
9059 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
9060 static_call(kvm_x86_set_irq
)(vcpu
);
9061 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
9063 if (kvm_cpu_has_injectable_intr(vcpu
))
9064 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9067 if (is_guest_mode(vcpu
) &&
9068 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
9069 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
9070 *req_immediate_exit
= true;
9072 WARN_ON(vcpu
->arch
.exception
.pending
);
9077 *req_immediate_exit
= true;
9083 static void process_nmi(struct kvm_vcpu
*vcpu
)
9088 * x86 is limited to one NMI running, and one NMI pending after it.
9089 * If an NMI is already in progress, limit further NMIs to just one.
9090 * Otherwise, allow two (and we'll inject the first one immediately).
9092 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
9095 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
9096 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
9097 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9100 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
9103 flags
|= seg
->g
<< 23;
9104 flags
|= seg
->db
<< 22;
9105 flags
|= seg
->l
<< 21;
9106 flags
|= seg
->avl
<< 20;
9107 flags
|= seg
->present
<< 15;
9108 flags
|= seg
->dpl
<< 13;
9109 flags
|= seg
->s
<< 12;
9110 flags
|= seg
->type
<< 8;
9114 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9116 struct kvm_segment seg
;
9119 kvm_get_segment(vcpu
, &seg
, n
);
9120 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
9123 offset
= 0x7f84 + n
* 12;
9125 offset
= 0x7f2c + (n
- 3) * 12;
9127 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
9128 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9129 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
9132 #ifdef CONFIG_X86_64
9133 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9135 struct kvm_segment seg
;
9139 kvm_get_segment(vcpu
, &seg
, n
);
9140 offset
= 0x7e00 + n
* 16;
9142 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
9143 put_smstate(u16
, buf
, offset
, seg
.selector
);
9144 put_smstate(u16
, buf
, offset
+ 2, flags
);
9145 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9146 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
9150 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
9153 struct kvm_segment seg
;
9157 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
9158 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
9159 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
9160 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
9162 for (i
= 0; i
< 8; i
++)
9163 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read_raw(vcpu
, i
));
9165 kvm_get_dr(vcpu
, 6, &val
);
9166 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
9167 kvm_get_dr(vcpu
, 7, &val
);
9168 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
9170 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9171 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
9172 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
9173 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
9174 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
9176 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9177 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
9178 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
9179 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
9180 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
9182 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9183 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
9184 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
9186 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9187 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
9188 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
9190 for (i
= 0; i
< 6; i
++)
9191 enter_smm_save_seg_32(vcpu
, buf
, i
);
9193 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
9196 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
9197 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
9200 #ifdef CONFIG_X86_64
9201 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
9204 struct kvm_segment seg
;
9208 for (i
= 0; i
< 16; i
++)
9209 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read_raw(vcpu
, i
));
9211 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
9212 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
9214 kvm_get_dr(vcpu
, 6, &val
);
9215 put_smstate(u64
, buf
, 0x7f68, val
);
9216 kvm_get_dr(vcpu
, 7, &val
);
9217 put_smstate(u64
, buf
, 0x7f60, val
);
9219 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
9220 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
9221 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
9223 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
9226 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
9228 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
9230 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9231 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
9232 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
9233 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
9234 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
9236 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9237 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
9238 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
9240 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9241 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
9242 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
9243 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
9244 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
9246 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9247 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
9248 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
9250 for (i
= 0; i
< 6; i
++)
9251 enter_smm_save_seg_64(vcpu
, buf
, i
);
9255 static void enter_smm(struct kvm_vcpu
*vcpu
)
9257 struct kvm_segment cs
, ds
;
9262 memset(buf
, 0, 512);
9263 #ifdef CONFIG_X86_64
9264 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9265 enter_smm_save_state_64(vcpu
, buf
);
9268 enter_smm_save_state_32(vcpu
, buf
);
9271 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9272 * state (e.g. leave guest mode) after we've saved the state into the
9273 * SMM state-save area.
9275 static_call(kvm_x86_enter_smm
)(vcpu
, buf
);
9277 kvm_smm_changed(vcpu
, true);
9278 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
9280 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
))
9281 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
9283 static_call(kvm_x86_set_nmi_mask
)(vcpu
, true);
9285 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
9286 kvm_rip_write(vcpu
, 0x8000);
9288 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
9289 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
9290 vcpu
->arch
.cr0
= cr0
;
9292 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
9294 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9295 dt
.address
= dt
.size
= 0;
9296 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
9298 kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
9300 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
9301 cs
.base
= vcpu
->arch
.smbase
;
9306 cs
.limit
= ds
.limit
= 0xffffffff;
9307 cs
.type
= ds
.type
= 0x3;
9308 cs
.dpl
= ds
.dpl
= 0;
9313 cs
.avl
= ds
.avl
= 0;
9314 cs
.present
= ds
.present
= 1;
9315 cs
.unusable
= ds
.unusable
= 0;
9316 cs
.padding
= ds
.padding
= 0;
9318 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9319 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
9320 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
9321 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
9322 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
9323 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
9325 #ifdef CONFIG_X86_64
9326 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9327 static_call(kvm_x86_set_efer
)(vcpu
, 0);
9330 kvm_update_cpuid_runtime(vcpu
);
9331 kvm_mmu_reset_context(vcpu
);
9334 static void process_smi(struct kvm_vcpu
*vcpu
)
9336 vcpu
->arch
.smi_pending
= true;
9337 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9340 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
9341 unsigned long *vcpu_bitmap
)
9345 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
9347 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
9348 NULL
, vcpu_bitmap
, cpus
);
9350 free_cpumask_var(cpus
);
9353 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
9355 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
9358 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
9362 if (!lapic_in_kernel(vcpu
))
9365 mutex_lock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9367 activate
= kvm_apicv_activated(vcpu
->kvm
);
9368 if (vcpu
->arch
.apicv_active
== activate
)
9371 vcpu
->arch
.apicv_active
= activate
;
9372 kvm_apic_update_apicv(vcpu
);
9373 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
9376 * When APICv gets disabled, we may still have injected interrupts
9377 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9378 * still active when the interrupt got accepted. Make sure
9379 * inject_pending_event() is called to check for that.
9381 if (!vcpu
->arch
.apicv_active
)
9382 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9385 mutex_unlock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9387 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
9389 void __kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9391 unsigned long old
, new;
9393 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
9394 !static_call(kvm_x86_check_apicv_inhibit_reasons
)(bit
))
9397 old
= new = kvm
->arch
.apicv_inhibit_reasons
;
9400 __clear_bit(bit
, &new);
9402 __set_bit(bit
, &new);
9404 if (!!old
!= !!new) {
9405 trace_kvm_apicv_update_request(activate
, bit
);
9406 kvm_make_all_cpus_request(kvm
, KVM_REQ_APICV_UPDATE
);
9407 kvm
->arch
.apicv_inhibit_reasons
= new;
9409 unsigned long gfn
= gpa_to_gfn(APIC_DEFAULT_PHYS_BASE
);
9410 kvm_zap_gfn_range(kvm
, gfn
, gfn
+1);
9413 kvm
->arch
.apicv_inhibit_reasons
= new;
9415 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update
);
9417 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9419 mutex_lock(&kvm
->arch
.apicv_update_lock
);
9420 __kvm_request_apicv_update(kvm
, activate
, bit
);
9421 mutex_unlock(&kvm
->arch
.apicv_update_lock
);
9423 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
9425 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
9427 if (!kvm_apic_present(vcpu
))
9430 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
9432 if (irqchip_split(vcpu
->kvm
))
9433 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9435 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9436 if (ioapic_in_kernel(vcpu
->kvm
))
9437 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9440 if (is_guest_mode(vcpu
))
9441 vcpu
->arch
.load_eoi_exitmap_pending
= true;
9443 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
9446 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
9448 u64 eoi_exit_bitmap
[4];
9450 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
9453 if (to_hv_vcpu(vcpu
)) {
9454 bitmap_or((ulong
*)eoi_exit_bitmap
,
9455 vcpu
->arch
.ioapic_handled_vectors
,
9456 to_hv_synic(vcpu
)->vec_bitmap
, 256);
9457 static_call(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
9461 static_call(kvm_x86_load_eoi_exitmap
)(
9462 vcpu
, (u64
*)vcpu
->arch
.ioapic_handled_vectors
);
9465 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
9466 unsigned long start
, unsigned long end
)
9468 unsigned long apic_address
;
9471 * The physical address of apic access page is stored in the VMCS.
9472 * Update it when it becomes invalid.
9474 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
9475 if (start
<= apic_address
&& apic_address
< end
)
9476 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
9479 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
9481 if (!lapic_in_kernel(vcpu
))
9484 if (!kvm_x86_ops
.set_apic_access_page_addr
)
9487 static_call(kvm_x86_set_apic_access_page_addr
)(vcpu
);
9490 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
9492 smp_send_reschedule(vcpu
->cpu
);
9494 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
9497 * Returns 1 to let vcpu_run() continue the guest execution loop without
9498 * exiting to the userspace. Otherwise, the value will be returned to the
9501 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
9505 dm_request_for_irq_injection(vcpu
) &&
9506 kvm_cpu_accept_dm_intr(vcpu
);
9507 fastpath_t exit_fastpath
;
9509 bool req_immediate_exit
= false;
9511 /* Forbid vmenter if vcpu dirty ring is soft-full */
9512 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
9513 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
9514 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
9515 trace_kvm_dirty_ring_exit(vcpu
);
9520 if (kvm_request_pending(vcpu
)) {
9521 if (kvm_check_request(KVM_REQ_VM_BUGGED
, vcpu
)) {
9525 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
9526 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
9531 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
9532 kvm_mmu_unload(vcpu
);
9533 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
9534 __kvm_migrate_timers(vcpu
);
9535 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
9536 kvm_gen_update_masterclock(vcpu
->kvm
);
9537 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
9538 kvm_gen_kvmclock_update(vcpu
);
9539 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
9540 r
= kvm_guest_time_update(vcpu
);
9544 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
9545 kvm_mmu_sync_roots(vcpu
);
9546 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
9547 kvm_mmu_load_pgd(vcpu
);
9548 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
9549 kvm_vcpu_flush_tlb_all(vcpu
);
9551 /* Flushing all ASIDs flushes the current ASID... */
9552 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
9554 kvm_service_local_tlb_flush_requests(vcpu
);
9556 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
9557 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
9561 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
9562 if (is_guest_mode(vcpu
)) {
9563 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
9565 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
9566 vcpu
->mmio_needed
= 0;
9571 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
9572 /* Page is swapped out. Do synthetic halt */
9573 vcpu
->arch
.apf
.halted
= true;
9577 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
9578 record_steal_time(vcpu
);
9579 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
9581 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
9583 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
9584 kvm_pmu_handle_event(vcpu
);
9585 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
9586 kvm_pmu_deliver_pmi(vcpu
);
9587 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
9588 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
9589 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
9590 vcpu
->arch
.ioapic_handled_vectors
)) {
9591 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
9592 vcpu
->run
->eoi
.vector
=
9593 vcpu
->arch
.pending_ioapic_eoi
;
9598 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
9599 vcpu_scan_ioapic(vcpu
);
9600 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
9601 vcpu_load_eoi_exitmap(vcpu
);
9602 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
9603 kvm_vcpu_reload_apic_access_page(vcpu
);
9604 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
9605 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9606 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
9610 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
9611 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9612 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
9616 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
9617 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
9619 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
9620 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
9626 * KVM_REQ_HV_STIMER has to be processed after
9627 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9628 * depend on the guest clock being up-to-date
9630 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
9631 kvm_hv_process_stimers(vcpu
);
9632 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
9633 kvm_vcpu_update_apicv(vcpu
);
9634 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
9635 kvm_check_async_pf_completion(vcpu
);
9636 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
9637 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
9639 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
9640 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
9643 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
9644 kvm_xen_has_interrupt(vcpu
)) {
9645 ++vcpu
->stat
.req_event
;
9646 r
= kvm_apic_accept_events(vcpu
);
9651 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
9656 r
= inject_pending_event(vcpu
, &req_immediate_exit
);
9662 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9664 if (kvm_lapic_enabled(vcpu
)) {
9665 update_cr8_intercept(vcpu
);
9666 kvm_lapic_sync_to_vapic(vcpu
);
9670 r
= kvm_mmu_reload(vcpu
);
9672 goto cancel_injection
;
9677 static_call(kvm_x86_prepare_guest_switch
)(vcpu
);
9680 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9681 * IPI are then delayed after guest entry, which ensures that they
9682 * result in virtual interrupt delivery.
9684 local_irq_disable();
9685 vcpu
->mode
= IN_GUEST_MODE
;
9687 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9690 * 1) We should set ->mode before checking ->requests. Please see
9691 * the comment in kvm_vcpu_exiting_guest_mode().
9693 * 2) For APICv, we should set ->mode before checking PID.ON. This
9694 * pairs with the memory barrier implicit in pi_test_and_set_on
9695 * (see vmx_deliver_posted_interrupt).
9697 * 3) This also orders the write to mode from any reads to the page
9698 * tables done while the VCPU is running. Please see the comment
9699 * in kvm_flush_remote_tlbs.
9701 smp_mb__after_srcu_read_unlock();
9704 * This handles the case where a posted interrupt was
9705 * notified with kvm_vcpu_kick. Assigned devices can
9706 * use the POSTED_INTR_VECTOR even if APICv is disabled,
9707 * so do it even if APICv is disabled on this vCPU.
9709 if (kvm_lapic_enabled(vcpu
))
9710 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9712 if (kvm_vcpu_exit_request(vcpu
)) {
9713 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9717 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9719 goto cancel_injection
;
9722 if (req_immediate_exit
) {
9723 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9724 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
9727 fpregs_assert_state_consistent();
9728 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9729 switch_fpu_return();
9731 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
9733 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
9734 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
9735 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
9736 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
9737 } else if (unlikely(hw_breakpoint_active())) {
9742 exit_fastpath
= static_call(kvm_x86_run
)(vcpu
);
9743 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
9746 if (kvm_lapic_enabled(vcpu
))
9747 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9749 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
9750 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
9756 * Do this here before restoring debug registers on the host. And
9757 * since we do this before handling the vmexit, a DR access vmexit
9758 * can (a) read the correct value of the debug registers, (b) set
9759 * KVM_DEBUGREG_WONT_EXIT again.
9761 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
9762 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
9763 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
9764 kvm_update_dr0123(vcpu
);
9765 kvm_update_dr7(vcpu
);
9769 * If the guest has used debug registers, at least dr7
9770 * will be disabled while returning to the host.
9771 * If we don't have active breakpoints in the host, we don't
9772 * care about the messed up debug address registers. But if
9773 * we have some of them active, restore the old state.
9775 if (hw_breakpoint_active())
9776 hw_breakpoint_restore();
9778 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
9779 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
9781 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9784 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
9787 * Consume any pending interrupts, including the possible source of
9788 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9789 * An instruction is required after local_irq_enable() to fully unblock
9790 * interrupts on processors that implement an interrupt shadow, the
9791 * stat.exits increment will do nicely.
9793 kvm_before_interrupt(vcpu
);
9796 local_irq_disable();
9797 kvm_after_interrupt(vcpu
);
9800 * Wait until after servicing IRQs to account guest time so that any
9801 * ticks that occurred while running the guest are properly accounted
9802 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9803 * of accounting via context tracking, but the loss of accuracy is
9804 * acceptable for all known use cases.
9806 vtime_account_guest_exit();
9808 if (lapic_in_kernel(vcpu
)) {
9809 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
9810 if (delta
!= S64_MIN
) {
9811 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
9812 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
9819 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9822 * Profile KVM exit RIPs:
9824 if (unlikely(prof_on
== KVM_PROFILING
)) {
9825 unsigned long rip
= kvm_rip_read(vcpu
);
9826 profile_hit(KVM_PROFILING
, (void *)rip
);
9829 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
9830 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9832 if (vcpu
->arch
.apic_attention
)
9833 kvm_lapic_sync_from_vapic(vcpu
);
9835 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
9839 if (req_immediate_exit
)
9840 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9841 static_call(kvm_x86_cancel_injection
)(vcpu
);
9842 if (unlikely(vcpu
->arch
.apic_attention
))
9843 kvm_lapic_sync_from_vapic(vcpu
);
9848 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
9850 if (!kvm_arch_vcpu_runnable(vcpu
) &&
9851 (!kvm_x86_ops
.pre_block
|| static_call(kvm_x86_pre_block
)(vcpu
) == 0)) {
9852 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9853 kvm_vcpu_block(vcpu
);
9854 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9856 if (kvm_x86_ops
.post_block
)
9857 static_call(kvm_x86_post_block
)(vcpu
);
9859 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
9863 if (kvm_apic_accept_events(vcpu
) < 0)
9865 switch(vcpu
->arch
.mp_state
) {
9866 case KVM_MP_STATE_HALTED
:
9867 case KVM_MP_STATE_AP_RESET_HOLD
:
9868 vcpu
->arch
.pv
.pv_unhalted
= false;
9869 vcpu
->arch
.mp_state
=
9870 KVM_MP_STATE_RUNNABLE
;
9872 case KVM_MP_STATE_RUNNABLE
:
9873 vcpu
->arch
.apf
.halted
= false;
9875 case KVM_MP_STATE_INIT_RECEIVED
:
9883 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
9885 if (is_guest_mode(vcpu
))
9886 kvm_check_nested_events(vcpu
);
9888 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
9889 !vcpu
->arch
.apf
.halted
);
9892 static int vcpu_run(struct kvm_vcpu
*vcpu
)
9895 struct kvm
*kvm
= vcpu
->kvm
;
9897 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9898 vcpu
->arch
.l1tf_flush_l1d
= true;
9901 if (kvm_vcpu_running(vcpu
)) {
9902 r
= vcpu_enter_guest(vcpu
);
9904 r
= vcpu_block(kvm
, vcpu
);
9910 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
9911 if (kvm_cpu_has_pending_timer(vcpu
))
9912 kvm_inject_pending_timer_irqs(vcpu
);
9914 if (dm_request_for_irq_injection(vcpu
) &&
9915 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
9917 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
9918 ++vcpu
->stat
.request_irq_exits
;
9922 if (__xfer_to_guest_mode_work_pending()) {
9923 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9924 r
= xfer_to_guest_mode_handle_work(vcpu
);
9927 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9931 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9936 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
9940 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9941 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
9942 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9946 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
9948 BUG_ON(!vcpu
->arch
.pio
.count
);
9950 return complete_emulated_io(vcpu
);
9954 * Implements the following, as a state machine:
9958 * for each mmio piece in the fragment
9966 * for each mmio piece in the fragment
9971 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
9973 struct kvm_run
*run
= vcpu
->run
;
9974 struct kvm_mmio_fragment
*frag
;
9977 BUG_ON(!vcpu
->mmio_needed
);
9979 /* Complete previous fragment */
9980 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
9981 len
= min(8u, frag
->len
);
9982 if (!vcpu
->mmio_is_write
)
9983 memcpy(frag
->data
, run
->mmio
.data
, len
);
9985 if (frag
->len
<= 8) {
9986 /* Switch to the next fragment. */
9988 vcpu
->mmio_cur_fragment
++;
9990 /* Go forward to the next mmio piece. */
9996 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
9997 vcpu
->mmio_needed
= 0;
9999 /* FIXME: return into emulator if single-stepping. */
10000 if (vcpu
->mmio_is_write
)
10002 vcpu
->mmio_read_completed
= 1;
10003 return complete_emulated_io(vcpu
);
10006 run
->exit_reason
= KVM_EXIT_MMIO
;
10007 run
->mmio
.phys_addr
= frag
->gpa
;
10008 if (vcpu
->mmio_is_write
)
10009 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
10010 run
->mmio
.len
= min(8u, frag
->len
);
10011 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
10012 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
10016 static void kvm_save_current_fpu(struct fpu
*fpu
)
10019 * If the target FPU state is not resident in the CPU registers, just
10020 * memcpy() from current, else save CPU state directly to the target.
10022 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
10023 memcpy(&fpu
->state
, ¤t
->thread
.fpu
.state
,
10024 fpu_kernel_xstate_size
);
10026 save_fpregs_to_fpstate(fpu
);
10029 /* Swap (qemu) user FPU context for the guest FPU context. */
10030 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
10034 kvm_save_current_fpu(vcpu
->arch
.user_fpu
);
10037 * Guests with protected state can't have it set by the hypervisor,
10038 * so skip trying to set it.
10040 if (vcpu
->arch
.guest_fpu
)
10041 /* PKRU is separately restored in kvm_x86_ops.run. */
10042 __restore_fpregs_from_fpstate(&vcpu
->arch
.guest_fpu
->state
,
10043 ~XFEATURE_MASK_PKRU
);
10045 fpregs_mark_activate();
10051 /* When vcpu_run ends, restore user space FPU context. */
10052 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
10057 * Guests with protected state can't have it read by the hypervisor,
10058 * so skip trying to save it.
10060 if (vcpu
->arch
.guest_fpu
)
10061 kvm_save_current_fpu(vcpu
->arch
.guest_fpu
);
10063 restore_fpregs_from_fpstate(&vcpu
->arch
.user_fpu
->state
);
10065 fpregs_mark_activate();
10068 ++vcpu
->stat
.fpu_reload
;
10072 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
10074 struct kvm_run
*kvm_run
= vcpu
->run
;
10078 kvm_sigset_activate(vcpu
);
10079 kvm_run
->flags
= 0;
10080 kvm_load_guest_fpu(vcpu
);
10082 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
10083 if (kvm_run
->immediate_exit
) {
10087 kvm_vcpu_block(vcpu
);
10088 if (kvm_apic_accept_events(vcpu
) < 0) {
10092 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
10094 if (signal_pending(current
)) {
10096 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
10097 ++vcpu
->stat
.signal_exits
;
10102 if ((kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) ||
10103 (kvm_run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)) {
10108 if (kvm_run
->kvm_dirty_regs
) {
10109 r
= sync_regs(vcpu
);
10114 /* re-sync apic's tpr */
10115 if (!lapic_in_kernel(vcpu
)) {
10116 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
10122 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
10123 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
10124 vcpu
->arch
.complete_userspace_io
= NULL
;
10129 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
10131 if (kvm_run
->immediate_exit
)
10134 r
= vcpu_run(vcpu
);
10137 kvm_put_guest_fpu(vcpu
);
10138 if (kvm_run
->kvm_valid_regs
)
10140 post_kvm_run_save(vcpu
);
10141 kvm_sigset_deactivate(vcpu
);
10147 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10149 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
10151 * We are here if userspace calls get_regs() in the middle of
10152 * instruction emulation. Registers state needs to be copied
10153 * back from emulation context to vcpu. Userspace shouldn't do
10154 * that usually, but some bad designed PV devices (vmware
10155 * backdoor interface) need this to work
10157 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
10158 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10160 regs
->rax
= kvm_rax_read(vcpu
);
10161 regs
->rbx
= kvm_rbx_read(vcpu
);
10162 regs
->rcx
= kvm_rcx_read(vcpu
);
10163 regs
->rdx
= kvm_rdx_read(vcpu
);
10164 regs
->rsi
= kvm_rsi_read(vcpu
);
10165 regs
->rdi
= kvm_rdi_read(vcpu
);
10166 regs
->rsp
= kvm_rsp_read(vcpu
);
10167 regs
->rbp
= kvm_rbp_read(vcpu
);
10168 #ifdef CONFIG_X86_64
10169 regs
->r8
= kvm_r8_read(vcpu
);
10170 regs
->r9
= kvm_r9_read(vcpu
);
10171 regs
->r10
= kvm_r10_read(vcpu
);
10172 regs
->r11
= kvm_r11_read(vcpu
);
10173 regs
->r12
= kvm_r12_read(vcpu
);
10174 regs
->r13
= kvm_r13_read(vcpu
);
10175 regs
->r14
= kvm_r14_read(vcpu
);
10176 regs
->r15
= kvm_r15_read(vcpu
);
10179 regs
->rip
= kvm_rip_read(vcpu
);
10180 regs
->rflags
= kvm_get_rflags(vcpu
);
10183 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10186 __get_regs(vcpu
, regs
);
10191 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10193 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
10194 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10196 kvm_rax_write(vcpu
, regs
->rax
);
10197 kvm_rbx_write(vcpu
, regs
->rbx
);
10198 kvm_rcx_write(vcpu
, regs
->rcx
);
10199 kvm_rdx_write(vcpu
, regs
->rdx
);
10200 kvm_rsi_write(vcpu
, regs
->rsi
);
10201 kvm_rdi_write(vcpu
, regs
->rdi
);
10202 kvm_rsp_write(vcpu
, regs
->rsp
);
10203 kvm_rbp_write(vcpu
, regs
->rbp
);
10204 #ifdef CONFIG_X86_64
10205 kvm_r8_write(vcpu
, regs
->r8
);
10206 kvm_r9_write(vcpu
, regs
->r9
);
10207 kvm_r10_write(vcpu
, regs
->r10
);
10208 kvm_r11_write(vcpu
, regs
->r11
);
10209 kvm_r12_write(vcpu
, regs
->r12
);
10210 kvm_r13_write(vcpu
, regs
->r13
);
10211 kvm_r14_write(vcpu
, regs
->r14
);
10212 kvm_r15_write(vcpu
, regs
->r15
);
10215 kvm_rip_write(vcpu
, regs
->rip
);
10216 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
10218 vcpu
->arch
.exception
.pending
= false;
10220 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10223 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10226 __set_regs(vcpu
, regs
);
10231 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
10233 struct kvm_segment cs
;
10235 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10239 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
10241 static void __get_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10243 struct desc_ptr dt
;
10245 if (vcpu
->arch
.guest_state_protected
)
10246 goto skip_protected_regs
;
10248 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10249 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10250 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10251 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10252 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10253 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10255 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10256 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10258 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
10259 sregs
->idt
.limit
= dt
.size
;
10260 sregs
->idt
.base
= dt
.address
;
10261 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
10262 sregs
->gdt
.limit
= dt
.size
;
10263 sregs
->gdt
.base
= dt
.address
;
10265 sregs
->cr2
= vcpu
->arch
.cr2
;
10266 sregs
->cr3
= kvm_read_cr3(vcpu
);
10268 skip_protected_regs
:
10269 sregs
->cr0
= kvm_read_cr0(vcpu
);
10270 sregs
->cr4
= kvm_read_cr4(vcpu
);
10271 sregs
->cr8
= kvm_get_cr8(vcpu
);
10272 sregs
->efer
= vcpu
->arch
.efer
;
10273 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
10276 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10278 __get_sregs_common(vcpu
, sregs
);
10280 if (vcpu
->arch
.guest_state_protected
)
10283 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
10284 set_bit(vcpu
->arch
.interrupt
.nr
,
10285 (unsigned long *)sregs
->interrupt_bitmap
);
10288 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10292 __get_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
);
10294 if (vcpu
->arch
.guest_state_protected
)
10297 if (is_pae_paging(vcpu
)) {
10298 for (i
= 0 ; i
< 4 ; i
++)
10299 sregs2
->pdptrs
[i
] = kvm_pdptr_read(vcpu
, i
);
10300 sregs2
->flags
|= KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10304 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
10305 struct kvm_sregs
*sregs
)
10308 __get_sregs(vcpu
, sregs
);
10313 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
10314 struct kvm_mp_state
*mp_state
)
10319 if (kvm_mpx_supported())
10320 kvm_load_guest_fpu(vcpu
);
10322 r
= kvm_apic_accept_events(vcpu
);
10327 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
10328 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
10329 vcpu
->arch
.pv
.pv_unhalted
)
10330 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
10332 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
10335 if (kvm_mpx_supported())
10336 kvm_put_guest_fpu(vcpu
);
10341 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
10342 struct kvm_mp_state
*mp_state
)
10348 if (!lapic_in_kernel(vcpu
) &&
10349 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
10353 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10354 * INIT state; latched init should be reported using
10355 * KVM_SET_VCPU_EVENTS, so reject it here.
10357 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
10358 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
10359 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
10362 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
10363 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
10364 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
10366 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
10367 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10375 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
10376 int reason
, bool has_error_code
, u32 error_code
)
10378 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
10381 init_emulate_ctxt(vcpu
);
10383 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
10384 has_error_code
, error_code
);
10386 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
10387 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
10388 vcpu
->run
->internal
.ndata
= 0;
10392 kvm_rip_write(vcpu
, ctxt
->eip
);
10393 kvm_set_rflags(vcpu
, ctxt
->eflags
);
10396 EXPORT_SYMBOL_GPL(kvm_task_switch
);
10398 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10400 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
10402 * When EFER.LME and CR0.PG are set, the processor is in
10403 * 64-bit mode (though maybe in a 32-bit code segment).
10404 * CR4.PAE and EFER.LMA must be set.
10406 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
10408 if (kvm_vcpu_is_illegal_gpa(vcpu
, sregs
->cr3
))
10412 * Not in 64-bit mode: EFER.LMA is clear and the code
10413 * segment cannot be 64-bit.
10415 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
10419 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
10422 static int __set_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
,
10423 int *mmu_reset_needed
, bool update_pdptrs
)
10425 struct msr_data apic_base_msr
;
10427 struct desc_ptr dt
;
10429 if (!kvm_is_valid_sregs(vcpu
, sregs
))
10432 apic_base_msr
.data
= sregs
->apic_base
;
10433 apic_base_msr
.host_initiated
= true;
10434 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
10437 if (vcpu
->arch
.guest_state_protected
)
10440 dt
.size
= sregs
->idt
.limit
;
10441 dt
.address
= sregs
->idt
.base
;
10442 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
10443 dt
.size
= sregs
->gdt
.limit
;
10444 dt
.address
= sregs
->gdt
.base
;
10445 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
10447 vcpu
->arch
.cr2
= sregs
->cr2
;
10448 *mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
10449 vcpu
->arch
.cr3
= sregs
->cr3
;
10450 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
10452 kvm_set_cr8(vcpu
, sregs
->cr8
);
10454 *mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
10455 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
10457 *mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
10458 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
10459 vcpu
->arch
.cr0
= sregs
->cr0
;
10461 *mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
10462 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
10464 if (update_pdptrs
) {
10465 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10466 if (is_pae_paging(vcpu
)) {
10467 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
10468 *mmu_reset_needed
= 1;
10470 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10473 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10474 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10475 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10476 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10477 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10478 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10480 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10481 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10483 update_cr8_intercept(vcpu
);
10485 /* Older userspace won't unhalt the vcpu on reset. */
10486 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
10487 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
10488 !is_protmode(vcpu
))
10489 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10494 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10496 int pending_vec
, max_bits
;
10497 int mmu_reset_needed
= 0;
10498 int ret
= __set_sregs_common(vcpu
, sregs
, &mmu_reset_needed
, true);
10503 if (mmu_reset_needed
)
10504 kvm_mmu_reset_context(vcpu
);
10506 max_bits
= KVM_NR_INTERRUPTS
;
10507 pending_vec
= find_first_bit(
10508 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
10510 if (pending_vec
< max_bits
) {
10511 kvm_queue_interrupt(vcpu
, pending_vec
, false);
10512 pr_debug("Set back pending irq %d\n", pending_vec
);
10513 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10518 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10520 int mmu_reset_needed
= 0;
10521 bool valid_pdptrs
= sregs2
->flags
& KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10522 bool pae
= (sregs2
->cr0
& X86_CR0_PG
) && (sregs2
->cr4
& X86_CR4_PAE
) &&
10523 !(sregs2
->efer
& EFER_LMA
);
10526 if (sregs2
->flags
& ~KVM_SREGS2_FLAGS_PDPTRS_VALID
)
10529 if (valid_pdptrs
&& (!pae
|| vcpu
->arch
.guest_state_protected
))
10532 ret
= __set_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
,
10533 &mmu_reset_needed
, !valid_pdptrs
);
10537 if (valid_pdptrs
) {
10538 for (i
= 0; i
< 4 ; i
++)
10539 kvm_pdptr_write(vcpu
, i
, sregs2
->pdptrs
[i
]);
10541 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
10542 mmu_reset_needed
= 1;
10543 vcpu
->arch
.pdptrs_from_userspace
= true;
10545 if (mmu_reset_needed
)
10546 kvm_mmu_reset_context(vcpu
);
10550 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
10551 struct kvm_sregs
*sregs
)
10556 ret
= __set_sregs(vcpu
, sregs
);
10561 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
10562 struct kvm_guest_debug
*dbg
)
10564 unsigned long rflags
;
10567 if (vcpu
->arch
.guest_state_protected
)
10572 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
10574 if (vcpu
->arch
.exception
.pending
)
10576 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
10577 kvm_queue_exception(vcpu
, DB_VECTOR
);
10579 kvm_queue_exception(vcpu
, BP_VECTOR
);
10583 * Read rflags as long as potentially injected trace flags are still
10586 rflags
= kvm_get_rflags(vcpu
);
10588 vcpu
->guest_debug
= dbg
->control
;
10589 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
10590 vcpu
->guest_debug
= 0;
10592 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
10593 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
10594 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
10595 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
10597 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
10598 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
10600 kvm_update_dr7(vcpu
);
10602 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10603 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
10606 * Trigger an rflags update that will inject or remove the trace
10609 kvm_set_rflags(vcpu
, rflags
);
10611 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
10621 * Translate a guest virtual address to a guest physical address.
10623 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
10624 struct kvm_translation
*tr
)
10626 unsigned long vaddr
= tr
->linear_address
;
10632 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10633 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
10634 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10635 tr
->physical_address
= gpa
;
10636 tr
->valid
= gpa
!= UNMAPPED_GVA
;
10644 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10646 struct fxregs_state
*fxsave
;
10648 if (!vcpu
->arch
.guest_fpu
)
10653 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10654 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
10655 fpu
->fcw
= fxsave
->cwd
;
10656 fpu
->fsw
= fxsave
->swd
;
10657 fpu
->ftwx
= fxsave
->twd
;
10658 fpu
->last_opcode
= fxsave
->fop
;
10659 fpu
->last_ip
= fxsave
->rip
;
10660 fpu
->last_dp
= fxsave
->rdp
;
10661 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
10667 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10669 struct fxregs_state
*fxsave
;
10671 if (!vcpu
->arch
.guest_fpu
)
10676 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10678 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
10679 fxsave
->cwd
= fpu
->fcw
;
10680 fxsave
->swd
= fpu
->fsw
;
10681 fxsave
->twd
= fpu
->ftwx
;
10682 fxsave
->fop
= fpu
->last_opcode
;
10683 fxsave
->rip
= fpu
->last_ip
;
10684 fxsave
->rdp
= fpu
->last_dp
;
10685 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
10691 static void store_regs(struct kvm_vcpu
*vcpu
)
10693 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
10695 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
10696 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10698 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
10699 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
10701 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
10702 kvm_vcpu_ioctl_x86_get_vcpu_events(
10703 vcpu
, &vcpu
->run
->s
.regs
.events
);
10706 static int sync_regs(struct kvm_vcpu
*vcpu
)
10708 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
10709 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10710 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
10712 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
10713 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
10715 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
10717 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
10718 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10719 vcpu
, &vcpu
->run
->s
.regs
.events
))
10721 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
10727 static void fx_init(struct kvm_vcpu
*vcpu
)
10729 if (!vcpu
->arch
.guest_fpu
)
10732 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
10733 if (boot_cpu_has(X86_FEATURE_XSAVES
))
10734 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
10735 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
10738 * Ensure guest xcr0 is valid for loading
10740 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10742 vcpu
->arch
.cr0
|= X86_CR0_ET
;
10745 void kvm_free_guest_fpu(struct kvm_vcpu
*vcpu
)
10747 if (vcpu
->arch
.guest_fpu
) {
10748 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
10749 vcpu
->arch
.guest_fpu
= NULL
;
10752 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu
);
10754 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
10756 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
10757 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10758 "guest TSC will not be reliable\n");
10763 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
10768 vcpu
->arch
.last_vmentry_cpu
= -1;
10769 vcpu
->arch
.regs_avail
= ~0;
10770 vcpu
->arch
.regs_dirty
= ~0;
10772 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
10773 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10775 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
10777 r
= kvm_mmu_create(vcpu
);
10781 if (irqchip_in_kernel(vcpu
->kvm
)) {
10782 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
10784 goto fail_mmu_destroy
;
10785 if (kvm_apicv_activated(vcpu
->kvm
))
10786 vcpu
->arch
.apicv_active
= true;
10788 static_branch_inc(&kvm_has_noapic_vcpu
);
10792 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
10794 goto fail_free_lapic
;
10795 vcpu
->arch
.pio_data
= page_address(page
);
10797 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
10798 GFP_KERNEL_ACCOUNT
);
10799 if (!vcpu
->arch
.mce_banks
)
10800 goto fail_free_pio_data
;
10801 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
10803 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
10804 GFP_KERNEL_ACCOUNT
))
10805 goto fail_free_mce_banks
;
10807 if (!alloc_emulate_ctxt(vcpu
))
10808 goto free_wbinvd_dirty_mask
;
10810 vcpu
->arch
.user_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10811 GFP_KERNEL_ACCOUNT
);
10812 if (!vcpu
->arch
.user_fpu
) {
10813 pr_err("kvm: failed to allocate userspace's fpu\n");
10814 goto free_emulate_ctxt
;
10817 vcpu
->arch
.guest_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10818 GFP_KERNEL_ACCOUNT
);
10819 if (!vcpu
->arch
.guest_fpu
) {
10820 pr_err("kvm: failed to allocate vcpu's fpu\n");
10821 goto free_user_fpu
;
10825 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
10826 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
10828 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
10830 kvm_async_pf_hash_reset(vcpu
);
10831 kvm_pmu_init(vcpu
);
10833 vcpu
->arch
.pending_external_vector
= -1;
10834 vcpu
->arch
.preempted_in_kernel
= false;
10836 #if IS_ENABLED(CONFIG_HYPERV)
10837 vcpu
->arch
.hv_root_tdp
= INVALID_PAGE
;
10840 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
10842 goto free_guest_fpu
;
10844 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
10845 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
10846 kvm_vcpu_mtrr_init(vcpu
);
10848 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
10849 kvm_vcpu_reset(vcpu
, false);
10850 kvm_init_mmu(vcpu
);
10855 kvm_free_guest_fpu(vcpu
);
10857 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10859 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10860 free_wbinvd_dirty_mask
:
10861 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10862 fail_free_mce_banks
:
10863 kfree(vcpu
->arch
.mce_banks
);
10864 fail_free_pio_data
:
10865 free_page((unsigned long)vcpu
->arch
.pio_data
);
10867 kvm_free_lapic(vcpu
);
10869 kvm_mmu_destroy(vcpu
);
10873 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
10875 struct kvm
*kvm
= vcpu
->kvm
;
10877 if (mutex_lock_killable(&vcpu
->mutex
))
10880 kvm_synchronize_tsc(vcpu
, 0);
10883 /* poll control enabled by default */
10884 vcpu
->arch
.msr_kvm_poll_control
= 1;
10886 mutex_unlock(&vcpu
->mutex
);
10888 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
10889 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
10890 KVMCLOCK_SYNC_PERIOD
);
10893 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
10897 kvmclock_reset(vcpu
);
10899 static_call(kvm_x86_vcpu_free
)(vcpu
);
10901 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10902 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10903 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10904 kvm_free_guest_fpu(vcpu
);
10906 kvm_hv_vcpu_uninit(vcpu
);
10907 kvm_pmu_destroy(vcpu
);
10908 kfree(vcpu
->arch
.mce_banks
);
10909 kvm_free_lapic(vcpu
);
10910 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10911 kvm_mmu_destroy(vcpu
);
10912 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10913 free_page((unsigned long)vcpu
->arch
.pio_data
);
10914 kvfree(vcpu
->arch
.cpuid_entries
);
10915 if (!lapic_in_kernel(vcpu
))
10916 static_branch_dec(&kvm_has_noapic_vcpu
);
10919 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
10921 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
10922 unsigned long new_cr0
;
10925 kvm_lapic_reset(vcpu
, init_event
);
10927 vcpu
->arch
.hflags
= 0;
10929 vcpu
->arch
.smi_pending
= 0;
10930 vcpu
->arch
.smi_count
= 0;
10931 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
10932 vcpu
->arch
.nmi_pending
= 0;
10933 vcpu
->arch
.nmi_injected
= false;
10934 kvm_clear_interrupt_queue(vcpu
);
10935 kvm_clear_exception_queue(vcpu
);
10937 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
10938 kvm_update_dr0123(vcpu
);
10939 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
10940 vcpu
->arch
.dr7
= DR7_FIXED_1
;
10941 kvm_update_dr7(vcpu
);
10943 vcpu
->arch
.cr2
= 0;
10945 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10946 vcpu
->arch
.apf
.msr_en_val
= 0;
10947 vcpu
->arch
.apf
.msr_int_val
= 0;
10948 vcpu
->arch
.st
.msr_val
= 0;
10950 kvmclock_reset(vcpu
);
10952 kvm_clear_async_pf_completion_queue(vcpu
);
10953 kvm_async_pf_hash_reset(vcpu
);
10954 vcpu
->arch
.apf
.halted
= false;
10956 if (vcpu
->arch
.guest_fpu
&& kvm_mpx_supported()) {
10957 void *mpx_state_buffer
;
10960 * To avoid have the INIT path from kvm_apic_has_events() that be
10961 * called with loaded FPU and does not let userspace fix the state.
10964 kvm_put_guest_fpu(vcpu
);
10965 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10967 if (mpx_state_buffer
)
10968 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
10969 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10971 if (mpx_state_buffer
)
10972 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
10974 kvm_load_guest_fpu(vcpu
);
10978 kvm_pmu_reset(vcpu
);
10979 vcpu
->arch
.smbase
= 0x30000;
10981 vcpu
->arch
.msr_misc_features_enables
= 0;
10983 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10986 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
10987 vcpu
->arch
.regs_avail
= ~0;
10988 vcpu
->arch
.regs_dirty
= ~0;
10991 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
10992 * if no CPUID match is found. Note, it's impossible to get a match at
10993 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
10994 * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
10995 * But, go through the motions in case that's ever remedied.
10998 if (!kvm_cpuid(vcpu
, &eax
, &dummy
, &dummy
, &dummy
, true))
11000 kvm_rdx_write(vcpu
, eax
);
11002 vcpu
->arch
.ia32_xss
= 0;
11004 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
11006 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
11007 kvm_rip_write(vcpu
, 0xfff0);
11009 vcpu
->arch
.cr3
= 0;
11010 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
11013 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11014 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11015 * (or qualify) that with a footnote stating that CD/NW are preserved.
11017 new_cr0
= X86_CR0_ET
;
11019 new_cr0
|= (old_cr0
& (X86_CR0_NW
| X86_CR0_CD
));
11021 new_cr0
|= X86_CR0_NW
| X86_CR0_CD
;
11023 static_call(kvm_x86_set_cr0
)(vcpu
, new_cr0
);
11024 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
11025 static_call(kvm_x86_set_efer
)(vcpu
, 0);
11026 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
11029 * Reset the MMU context if paging was enabled prior to INIT (which is
11030 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
11031 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11032 * checked because it is unconditionally cleared on INIT and all other
11033 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11034 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11036 if (old_cr0
& X86_CR0_PG
)
11037 kvm_mmu_reset_context(vcpu
);
11040 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11041 * APM states the TLBs are untouched by INIT, but it also states that
11042 * the TLBs are flushed on "External initialization of the processor."
11043 * Flush the guest TLB regardless of vendor, there is no meaningful
11044 * benefit in relying on the guest to flush the TLB immediately after
11045 * INIT. A spurious TLB flush is benign and likely negligible from a
11046 * performance perspective.
11049 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11051 EXPORT_SYMBOL_GPL(kvm_vcpu_reset
);
11053 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
11055 struct kvm_segment cs
;
11057 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11058 cs
.selector
= vector
<< 8;
11059 cs
.base
= vector
<< 12;
11060 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11061 kvm_rip_write(vcpu
, 0);
11063 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
11065 int kvm_arch_hardware_enable(void)
11068 struct kvm_vcpu
*vcpu
;
11073 bool stable
, backwards_tsc
= false;
11075 kvm_user_return_msr_cpu_online();
11076 ret
= static_call(kvm_x86_hardware_enable
)();
11080 local_tsc
= rdtsc();
11081 stable
= !kvm_check_tsc_unstable();
11082 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11083 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11084 if (!stable
&& vcpu
->cpu
== smp_processor_id())
11085 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
11086 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
11087 backwards_tsc
= true;
11088 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
11089 max_tsc
= vcpu
->arch
.last_host_tsc
;
11095 * Sometimes, even reliable TSCs go backwards. This happens on
11096 * platforms that reset TSC during suspend or hibernate actions, but
11097 * maintain synchronization. We must compensate. Fortunately, we can
11098 * detect that condition here, which happens early in CPU bringup,
11099 * before any KVM threads can be running. Unfortunately, we can't
11100 * bring the TSCs fully up to date with real time, as we aren't yet far
11101 * enough into CPU bringup that we know how much real time has actually
11102 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11103 * variables that haven't been updated yet.
11105 * So we simply find the maximum observed TSC above, then record the
11106 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11107 * the adjustment will be applied. Note that we accumulate
11108 * adjustments, in case multiple suspend cycles happen before some VCPU
11109 * gets a chance to run again. In the event that no KVM threads get a
11110 * chance to run, we will miss the entire elapsed period, as we'll have
11111 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11112 * loose cycle time. This isn't too big a deal, since the loss will be
11113 * uniform across all VCPUs (not to mention the scenario is extremely
11114 * unlikely). It is possible that a second hibernate recovery happens
11115 * much faster than a first, causing the observed TSC here to be
11116 * smaller; this would require additional padding adjustment, which is
11117 * why we set last_host_tsc to the local tsc observed here.
11119 * N.B. - this code below runs only on platforms with reliable TSC,
11120 * as that is the only way backwards_tsc is set above. Also note
11121 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11122 * have the same delta_cyc adjustment applied if backwards_tsc
11123 * is detected. Note further, this adjustment is only done once,
11124 * as we reset last_host_tsc on all VCPUs to stop this from being
11125 * called multiple times (one for each physical CPU bringup).
11127 * Platforms with unreliable TSCs don't have to deal with this, they
11128 * will be compensated by the logic in vcpu_load, which sets the TSC to
11129 * catchup mode. This will catchup all VCPUs to real time, but cannot
11130 * guarantee that they stay in perfect synchronization.
11132 if (backwards_tsc
) {
11133 u64 delta_cyc
= max_tsc
- local_tsc
;
11134 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11135 kvm
->arch
.backwards_tsc_observed
= true;
11136 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11137 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
11138 vcpu
->arch
.last_host_tsc
= local_tsc
;
11139 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
11143 * We have to disable TSC offset matching.. if you were
11144 * booting a VM while issuing an S4 host suspend....
11145 * you may have some problem. Solving this issue is
11146 * left as an exercise to the reader.
11148 kvm
->arch
.last_tsc_nsec
= 0;
11149 kvm
->arch
.last_tsc_write
= 0;
11156 void kvm_arch_hardware_disable(void)
11158 static_call(kvm_x86_hardware_disable
)();
11159 drop_user_return_notifiers();
11162 int kvm_arch_hardware_setup(void *opaque
)
11164 struct kvm_x86_init_ops
*ops
= opaque
;
11167 rdmsrl_safe(MSR_EFER
, &host_efer
);
11169 if (boot_cpu_has(X86_FEATURE_XSAVES
))
11170 rdmsrl(MSR_IA32_XSS
, host_xss
);
11172 r
= ops
->hardware_setup();
11176 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
11177 kvm_ops_static_call_update();
11179 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
11182 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11183 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
11184 #undef __kvm_cpu_cap_has
11186 if (kvm_has_tsc_control
) {
11188 * Make sure the user can only configure tsc_khz values that
11189 * fit into a signed integer.
11190 * A min value is not calculated because it will always
11191 * be 1 on all machines.
11193 u64 max
= min(0x7fffffffULL
,
11194 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
11195 kvm_max_guest_tsc_khz
= max
;
11197 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
11200 kvm_init_msr_list();
11204 void kvm_arch_hardware_unsetup(void)
11206 static_call(kvm_x86_hardware_unsetup
)();
11209 int kvm_arch_check_processor_compat(void *opaque
)
11211 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
11212 struct kvm_x86_init_ops
*ops
= opaque
;
11214 WARN_ON(!irqs_disabled());
11216 if (__cr4_reserved_bits(cpu_has
, c
) !=
11217 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
11220 return ops
->check_processor_compatibility();
11223 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
11225 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
11227 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
11229 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
11231 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
11234 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
11235 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
11237 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
11239 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
11241 vcpu
->arch
.l1tf_flush_l1d
= true;
11242 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
11243 pmu
->need_cleanup
= true;
11244 kvm_make_request(KVM_REQ_PMU
, vcpu
);
11246 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
11249 void kvm_arch_free_vm(struct kvm
*kvm
)
11251 kfree(to_kvm_hv(kvm
)->hv_pa_pg
);
11256 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
11263 ret
= kvm_page_track_init(kvm
);
11267 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
11268 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
11269 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
11270 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
11271 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
11272 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
11274 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11275 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
11276 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11277 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
11278 &kvm
->arch
.irq_sources_bitmap
);
11280 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
11281 mutex_init(&kvm
->arch
.apic_map_lock
);
11282 raw_spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
11284 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
11285 pvclock_update_vm_gtod_copy(kvm
);
11287 kvm
->arch
.guest_can_read_msr_platform_info
= true;
11289 #if IS_ENABLED(CONFIG_HYPERV)
11290 spin_lock_init(&kvm
->arch
.hv_root_tdp_lock
);
11291 kvm
->arch
.hv_root_tdp
= INVALID_PAGE
;
11294 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
11295 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
11297 kvm_apicv_init(kvm
);
11298 kvm_hv_init_vm(kvm
);
11299 kvm_mmu_init_vm(kvm
);
11300 kvm_xen_init_vm(kvm
);
11302 return static_call(kvm_x86_vm_init
)(kvm
);
11305 int kvm_arch_post_init_vm(struct kvm
*kvm
)
11307 return kvm_mmu_post_init_vm(kvm
);
11310 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
11313 kvm_mmu_unload(vcpu
);
11317 static void kvm_free_vcpus(struct kvm
*kvm
)
11320 struct kvm_vcpu
*vcpu
;
11323 * Unpin any mmu pages first.
11325 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11326 kvm_clear_async_pf_completion_queue(vcpu
);
11327 kvm_unload_vcpu_mmu(vcpu
);
11329 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11330 kvm_vcpu_destroy(vcpu
);
11332 mutex_lock(&kvm
->lock
);
11333 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
11334 kvm
->vcpus
[i
] = NULL
;
11336 atomic_set(&kvm
->online_vcpus
, 0);
11337 mutex_unlock(&kvm
->lock
);
11340 void kvm_arch_sync_events(struct kvm
*kvm
)
11342 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
11343 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
11347 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
11350 * __x86_set_memory_region: Setup KVM internal memory slot
11352 * @kvm: the kvm pointer to the VM.
11353 * @id: the slot ID to setup.
11354 * @gpa: the GPA to install the slot (unused when @size == 0).
11355 * @size: the size of the slot. Set to zero to uninstall a slot.
11357 * This function helps to setup a KVM internal memory slot. Specify
11358 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11359 * slot. The return code can be one of the following:
11361 * HVA: on success (uninstall will return a bogus HVA)
11364 * The caller should always use IS_ERR() to check the return value
11365 * before use. Note, the KVM internal memory slots are guaranteed to
11366 * remain valid and unchanged until the VM is destroyed, i.e., the
11367 * GPA->HVA translation will not change. However, the HVA is a user
11368 * address, i.e. its accessibility is not guaranteed, and must be
11369 * accessed via __copy_{to,from}_user().
11371 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
11375 unsigned long hva
, old_npages
;
11376 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
11377 struct kvm_memory_slot
*slot
;
11379 /* Called with kvm->slots_lock held. */
11380 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
11381 return ERR_PTR_USR(-EINVAL
);
11383 slot
= id_to_memslot(slots
, id
);
11385 if (slot
&& slot
->npages
)
11386 return ERR_PTR_USR(-EEXIST
);
11389 * MAP_SHARED to prevent internal slot pages from being moved
11392 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
11393 MAP_SHARED
| MAP_ANONYMOUS
, 0);
11394 if (IS_ERR((void *)hva
))
11395 return (void __user
*)hva
;
11397 if (!slot
|| !slot
->npages
)
11400 old_npages
= slot
->npages
;
11401 hva
= slot
->userspace_addr
;
11404 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11405 struct kvm_userspace_memory_region m
;
11407 m
.slot
= id
| (i
<< 16);
11409 m
.guest_phys_addr
= gpa
;
11410 m
.userspace_addr
= hva
;
11411 m
.memory_size
= size
;
11412 r
= __kvm_set_memory_region(kvm
, &m
);
11414 return ERR_PTR_USR(r
);
11418 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
11420 return (void __user
*)hva
;
11422 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
11424 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
11426 kvm_mmu_pre_destroy_vm(kvm
);
11429 void kvm_arch_destroy_vm(struct kvm
*kvm
)
11431 if (current
->mm
== kvm
->mm
) {
11433 * Free memory regions allocated on behalf of userspace,
11434 * unless the the memory map has changed due to process exit
11437 mutex_lock(&kvm
->slots_lock
);
11438 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
11440 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
11442 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
11443 mutex_unlock(&kvm
->slots_lock
);
11445 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
11446 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
11447 kvm_pic_destroy(kvm
);
11448 kvm_ioapic_destroy(kvm
);
11449 kvm_free_vcpus(kvm
);
11450 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
11451 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
11452 kvm_mmu_uninit_vm(kvm
);
11453 kvm_page_track_cleanup(kvm
);
11454 kvm_xen_destroy_vm(kvm
);
11455 kvm_hv_destroy_vm(kvm
);
11458 static void memslot_rmap_free(struct kvm_memory_slot
*slot
)
11462 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11463 kvfree(slot
->arch
.rmap
[i
]);
11464 slot
->arch
.rmap
[i
] = NULL
;
11468 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
11472 memslot_rmap_free(slot
);
11474 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11475 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11476 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11479 kvm_page_track_free_memslot(slot
);
11482 static int memslot_rmap_alloc(struct kvm_memory_slot
*slot
,
11483 unsigned long npages
)
11485 const int sz
= sizeof(*slot
->arch
.rmap
[0]);
11488 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11490 int lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11492 if (slot
->arch
.rmap
[i
])
11495 slot
->arch
.rmap
[i
] = kvcalloc(lpages
, sz
, GFP_KERNEL_ACCOUNT
);
11496 if (!slot
->arch
.rmap
[i
]) {
11497 memslot_rmap_free(slot
);
11505 int alloc_all_memslots_rmaps(struct kvm
*kvm
)
11507 struct kvm_memslots
*slots
;
11508 struct kvm_memory_slot
*slot
;
11512 * Check if memslots alreday have rmaps early before acquiring
11513 * the slots_arch_lock below.
11515 if (kvm_memslots_have_rmaps(kvm
))
11518 mutex_lock(&kvm
->slots_arch_lock
);
11521 * Read memslots_have_rmaps again, under the slots arch lock,
11522 * before allocating the rmaps
11524 if (kvm_memslots_have_rmaps(kvm
)) {
11525 mutex_unlock(&kvm
->slots_arch_lock
);
11529 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11530 slots
= __kvm_memslots(kvm
, i
);
11531 kvm_for_each_memslot(slot
, slots
) {
11532 r
= memslot_rmap_alloc(slot
, slot
->npages
);
11534 mutex_unlock(&kvm
->slots_arch_lock
);
11541 * Ensure that memslots_have_rmaps becomes true strictly after
11542 * all the rmap pointers are set.
11544 smp_store_release(&kvm
->arch
.memslots_have_rmaps
, true);
11545 mutex_unlock(&kvm
->slots_arch_lock
);
11549 static int kvm_alloc_memslot_metadata(struct kvm
*kvm
,
11550 struct kvm_memory_slot
*slot
,
11551 unsigned long npages
)
11556 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11557 * old arrays will be freed by __kvm_set_memory_region() if installing
11558 * the new memslot is successful.
11560 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
11562 if (kvm_memslots_have_rmaps(kvm
)) {
11563 r
= memslot_rmap_alloc(slot
, npages
);
11568 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11569 struct kvm_lpage_info
*linfo
;
11570 unsigned long ugfn
;
11574 lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11576 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
11580 slot
->arch
.lpage_info
[i
- 1] = linfo
;
11582 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
11583 linfo
[0].disallow_lpage
= 1;
11584 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
11585 linfo
[lpages
- 1].disallow_lpage
= 1;
11586 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
11588 * If the gfn and userspace address are not aligned wrt each
11589 * other, disable large page support for this slot.
11591 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
11594 for (j
= 0; j
< lpages
; ++j
)
11595 linfo
[j
].disallow_lpage
= 1;
11599 if (kvm_page_track_create_memslot(slot
, npages
))
11605 memslot_rmap_free(slot
);
11607 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11608 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11609 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11614 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
11616 struct kvm_vcpu
*vcpu
;
11620 * memslots->generation has been incremented.
11621 * mmio generation may have reached its maximum value.
11623 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
11625 /* Force re-initialization of steal_time cache */
11626 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11627 kvm_vcpu_kick(vcpu
);
11630 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
11631 struct kvm_memory_slot
*memslot
,
11632 const struct kvm_userspace_memory_region
*mem
,
11633 enum kvm_mr_change change
)
11635 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
11636 return kvm_alloc_memslot_metadata(kvm
, memslot
,
11637 mem
->memory_size
>> PAGE_SHIFT
);
11642 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
11644 struct kvm_arch
*ka
= &kvm
->arch
;
11646 if (!kvm_x86_ops
.cpu_dirty_log_size
)
11649 if ((enable
&& ++ka
->cpu_dirty_logging_count
== 1) ||
11650 (!enable
&& --ka
->cpu_dirty_logging_count
== 0))
11651 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
11653 WARN_ON_ONCE(ka
->cpu_dirty_logging_count
< 0);
11656 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
11657 struct kvm_memory_slot
*old
,
11658 const struct kvm_memory_slot
*new,
11659 enum kvm_mr_change change
)
11661 bool log_dirty_pages
= new->flags
& KVM_MEM_LOG_DIRTY_PAGES
;
11664 * Update CPU dirty logging if dirty logging is being toggled. This
11665 * applies to all operations.
11667 if ((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
11668 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
11671 * Nothing more to do for RO slots (which can't be dirtied and can't be
11672 * made writable) or CREATE/MOVE/DELETE of a slot.
11674 * For a memslot with dirty logging disabled:
11675 * CREATE: No dirty mappings will already exist.
11676 * MOVE/DELETE: The old mappings will already have been cleaned up by
11677 * kvm_arch_flush_shadow_memslot()
11679 * For a memslot with dirty logging enabled:
11680 * CREATE: No shadow pages exist, thus nothing to write-protect
11681 * and no dirty bits to clear.
11682 * MOVE/DELETE: The old mappings will already have been cleaned up by
11683 * kvm_arch_flush_shadow_memslot().
11685 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new->flags
& KVM_MEM_READONLY
))
11689 * READONLY and non-flags changes were filtered out above, and the only
11690 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11691 * logging isn't being toggled on or off.
11693 if (WARN_ON_ONCE(!((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
11696 if (!log_dirty_pages
) {
11698 * Dirty logging tracks sptes in 4k granularity, meaning that
11699 * large sptes have to be split. If live migration succeeds,
11700 * the guest in the source machine will be destroyed and large
11701 * sptes will be created in the destination. However, if the
11702 * guest continues to run in the source machine (for example if
11703 * live migration fails), small sptes will remain around and
11704 * cause bad performance.
11706 * Scan sptes if dirty logging has been stopped, dropping those
11707 * which can be collapsed into a single large-page spte. Later
11708 * page faults will create the large-page sptes.
11710 kvm_mmu_zap_collapsible_sptes(kvm
, new);
11713 * Initially-all-set does not require write protecting any page,
11714 * because they're all assumed to be dirty.
11716 if (kvm_dirty_log_manual_protect_and_init_set(kvm
))
11719 if (kvm_x86_ops
.cpu_dirty_log_size
) {
11720 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
11721 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_2M
);
11723 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_4K
);
11728 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
11729 const struct kvm_userspace_memory_region
*mem
,
11730 struct kvm_memory_slot
*old
,
11731 const struct kvm_memory_slot
*new,
11732 enum kvm_mr_change change
)
11734 if (!kvm
->arch
.n_requested_mmu_pages
)
11735 kvm_mmu_change_mmu_pages(kvm
,
11736 kvm_mmu_calculate_default_mmu_pages(kvm
));
11738 kvm_mmu_slot_apply_flags(kvm
, old
, new, change
);
11740 /* Free the arrays associated with the old memslot. */
11741 if (change
== KVM_MR_MOVE
)
11742 kvm_arch_free_memslot(kvm
, old
);
11745 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
11747 kvm_mmu_zap_all(kvm
);
11750 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
11751 struct kvm_memory_slot
*slot
)
11753 kvm_page_track_flush_slot(kvm
, slot
);
11756 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
11758 return (is_guest_mode(vcpu
) &&
11759 kvm_x86_ops
.guest_apic_has_interrupt
&&
11760 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
11763 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
11765 if (!list_empty_careful(&vcpu
->async_pf
.done
))
11768 if (kvm_apic_has_events(vcpu
))
11771 if (vcpu
->arch
.pv
.pv_unhalted
)
11774 if (vcpu
->arch
.exception
.pending
)
11777 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11778 (vcpu
->arch
.nmi_pending
&&
11779 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
11782 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11783 (vcpu
->arch
.smi_pending
&&
11784 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
11787 if (kvm_arch_interrupt_allowed(vcpu
) &&
11788 (kvm_cpu_has_interrupt(vcpu
) ||
11789 kvm_guest_apic_has_interrupt(vcpu
)))
11792 if (kvm_hv_has_stimer_pending(vcpu
))
11795 if (is_guest_mode(vcpu
) &&
11796 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
11797 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
11803 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
11805 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
11808 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
11810 if (vcpu
->arch
.apicv_active
&& static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
11816 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
11818 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
11821 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11822 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11823 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
11826 return kvm_arch_dy_has_pending_interrupt(vcpu
);
11829 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
11831 if (vcpu
->arch
.guest_state_protected
)
11834 return vcpu
->arch
.preempted_in_kernel
;
11837 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
11839 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
11842 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
11844 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
11847 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
11849 /* Can't read the RIP when guest state is protected, just return 0 */
11850 if (vcpu
->arch
.guest_state_protected
)
11853 if (is_64_bit_mode(vcpu
))
11854 return kvm_rip_read(vcpu
);
11855 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
11856 kvm_rip_read(vcpu
));
11858 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
11860 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
11862 return kvm_get_linear_rip(vcpu
) == linear_rip
;
11864 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
11866 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
11868 unsigned long rflags
;
11870 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
11871 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11872 rflags
&= ~X86_EFLAGS_TF
;
11875 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
11877 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11879 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
11880 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
11881 rflags
|= X86_EFLAGS_TF
;
11882 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
11885 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11887 __kvm_set_rflags(vcpu
, rflags
);
11888 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11890 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
11892 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
11896 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
11900 r
= kvm_mmu_reload(vcpu
);
11904 if (!vcpu
->arch
.mmu
->direct_map
&&
11905 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
11908 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
11911 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
11913 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
11915 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
11918 static inline u32
kvm_async_pf_next_probe(u32 key
)
11920 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
11923 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11925 u32 key
= kvm_async_pf_hash_fn(gfn
);
11927 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
11928 key
= kvm_async_pf_next_probe(key
);
11930 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
11933 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11936 u32 key
= kvm_async_pf_hash_fn(gfn
);
11938 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
11939 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
11940 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
11941 key
= kvm_async_pf_next_probe(key
);
11946 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11948 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
11951 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11955 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
11957 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
11961 vcpu
->arch
.apf
.gfns
[i
] = ~0;
11963 j
= kvm_async_pf_next_probe(j
);
11964 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
11966 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
11968 * k lies cyclically in ]i,j]
11970 * |....j i.k.| or |.k..j i...|
11972 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
11973 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
11978 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
11980 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
11982 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
11986 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
11988 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11990 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11991 &token
, offset
, sizeof(token
));
11994 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
11996 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11999 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
12000 &val
, offset
, sizeof(val
)))
12006 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
12008 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
12011 if (!kvm_pv_async_pf_enabled(vcpu
) ||
12012 (vcpu
->arch
.apf
.send_user_only
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 0))
12018 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
12020 if (unlikely(!lapic_in_kernel(vcpu
) ||
12021 kvm_event_needs_reinjection(vcpu
) ||
12022 vcpu
->arch
.exception
.pending
))
12025 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
12029 * If interrupts are off we cannot even use an artificial
12032 return kvm_arch_interrupt_allowed(vcpu
);
12035 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
12036 struct kvm_async_pf
*work
)
12038 struct x86_exception fault
;
12040 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
12041 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12043 if (kvm_can_deliver_async_pf(vcpu
) &&
12044 !apf_put_user_notpresent(vcpu
)) {
12045 fault
.vector
= PF_VECTOR
;
12046 fault
.error_code_valid
= true;
12047 fault
.error_code
= 0;
12048 fault
.nested_page_fault
= false;
12049 fault
.address
= work
->arch
.token
;
12050 fault
.async_page_fault
= true;
12051 kvm_inject_page_fault(vcpu
, &fault
);
12055 * It is not possible to deliver a paravirtualized asynchronous
12056 * page fault, but putting the guest in an artificial halt state
12057 * can be beneficial nevertheless: if an interrupt arrives, we
12058 * can deliver it timely and perhaps the guest will schedule
12059 * another process. When the instruction that triggered a page
12060 * fault is retried, hopefully the page will be ready in the host.
12062 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
12067 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
12068 struct kvm_async_pf
*work
)
12070 struct kvm_lapic_irq irq
= {
12071 .delivery_mode
= APIC_DM_FIXED
,
12072 .vector
= vcpu
->arch
.apf
.vec
12075 if (work
->wakeup_all
)
12076 work
->arch
.token
= ~0; /* broadcast wakeup */
12078 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12079 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
12081 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
12082 kvm_pv_async_pf_enabled(vcpu
) &&
12083 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
12084 vcpu
->arch
.apf
.pageready_pending
= true;
12085 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
12088 vcpu
->arch
.apf
.halted
= false;
12089 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
12092 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
12094 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
12095 if (!vcpu
->arch
.apf
.pageready_pending
)
12096 kvm_vcpu_kick(vcpu
);
12099 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
12101 if (!kvm_pv_async_pf_enabled(vcpu
))
12104 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
12107 void kvm_arch_start_assignment(struct kvm
*kvm
)
12109 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
12110 static_call_cond(kvm_x86_start_assignment
)(kvm
);
12112 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
12114 void kvm_arch_end_assignment(struct kvm
*kvm
)
12116 atomic_dec(&kvm
->arch
.assigned_device_count
);
12118 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
12120 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
12122 return atomic_read(&kvm
->arch
.assigned_device_count
);
12124 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
12126 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
12128 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
12130 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
12132 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
12134 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
12136 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
12138 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
12140 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
12142 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
12144 bool kvm_arch_has_irq_bypass(void)
12149 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
12150 struct irq_bypass_producer
*prod
)
12152 struct kvm_kernel_irqfd
*irqfd
=
12153 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12156 irqfd
->producer
= prod
;
12157 kvm_arch_start_assignment(irqfd
->kvm
);
12158 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
,
12159 prod
->irq
, irqfd
->gsi
, 1);
12162 kvm_arch_end_assignment(irqfd
->kvm
);
12167 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
12168 struct irq_bypass_producer
*prod
)
12171 struct kvm_kernel_irqfd
*irqfd
=
12172 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12174 WARN_ON(irqfd
->producer
!= prod
);
12175 irqfd
->producer
= NULL
;
12178 * When producer of consumer is unregistered, we change back to
12179 * remapped mode, so we can re-use the current implementation
12180 * when the irq is masked/disabled or the consumer side (KVM
12181 * int this case doesn't want to receive the interrupts.
12183 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
12185 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
12186 " fails: %d\n", irqfd
->consumer
.token
, ret
);
12188 kvm_arch_end_assignment(irqfd
->kvm
);
12191 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
12192 uint32_t guest_irq
, bool set
)
12194 return static_call(kvm_x86_update_pi_irte
)(kvm
, host_irq
, guest_irq
, set
);
12197 bool kvm_vector_hashing_enabled(void)
12199 return vector_hashing
;
12202 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
12204 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
12206 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
12209 int kvm_spec_ctrl_test_value(u64 value
)
12212 * test that setting IA32_SPEC_CTRL to given value
12213 * is allowed by the host processor
12217 unsigned long flags
;
12220 local_irq_save(flags
);
12222 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
12224 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
12227 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
12229 local_irq_restore(flags
);
12233 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
12235 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
12237 struct x86_exception fault
;
12238 u32 access
= error_code
&
12239 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
12241 if (!(error_code
& PFERR_PRESENT_MASK
) ||
12242 vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
12244 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12245 * tables probably do not match the TLB. Just proceed
12246 * with the error code that the processor gave.
12248 fault
.vector
= PF_VECTOR
;
12249 fault
.error_code_valid
= true;
12250 fault
.error_code
= error_code
;
12251 fault
.nested_page_fault
= false;
12252 fault
.address
= gva
;
12254 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
12256 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
12259 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12260 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12261 * indicates whether exit to userspace is needed.
12263 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
12264 struct x86_exception
*e
)
12266 if (r
== X86EMUL_PROPAGATE_FAULT
) {
12267 kvm_inject_emulated_page_fault(vcpu
, e
);
12272 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12273 * while handling a VMX instruction KVM could've handled the request
12274 * correctly by exiting to userspace and performing I/O but there
12275 * doesn't seem to be a real use-case behind such requests, just return
12276 * KVM_EXIT_INTERNAL_ERROR for now.
12278 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
12279 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
12280 vcpu
->run
->internal
.ndata
= 0;
12284 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
12286 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
12289 struct x86_exception e
;
12296 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
12297 if (r
!= X86EMUL_CONTINUE
)
12298 return kvm_handle_memory_failure(vcpu
, r
, &e
);
12300 if (operand
.pcid
>> 12 != 0) {
12301 kvm_inject_gp(vcpu
, 0);
12305 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
12308 case INVPCID_TYPE_INDIV_ADDR
:
12309 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
12310 is_noncanonical_address(operand
.gla
, vcpu
)) {
12311 kvm_inject_gp(vcpu
, 0);
12314 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
12315 return kvm_skip_emulated_instruction(vcpu
);
12317 case INVPCID_TYPE_SINGLE_CTXT
:
12318 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
12319 kvm_inject_gp(vcpu
, 0);
12323 kvm_invalidate_pcid(vcpu
, operand
.pcid
);
12324 return kvm_skip_emulated_instruction(vcpu
);
12326 case INVPCID_TYPE_ALL_NON_GLOBAL
:
12328 * Currently, KVM doesn't mark global entries in the shadow
12329 * page tables, so a non-global flush just degenerates to a
12330 * global flush. If needed, we could optimize this later by
12331 * keeping track of global entries in shadow page tables.
12335 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
12336 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12337 return kvm_skip_emulated_instruction(vcpu
);
12340 BUG(); /* We have already checked above that type <= 3 */
12343 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
12345 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
12347 struct kvm_run
*run
= vcpu
->run
;
12348 struct kvm_mmio_fragment
*frag
;
12351 BUG_ON(!vcpu
->mmio_needed
);
12353 /* Complete previous fragment */
12354 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
12355 len
= min(8u, frag
->len
);
12356 if (!vcpu
->mmio_is_write
)
12357 memcpy(frag
->data
, run
->mmio
.data
, len
);
12359 if (frag
->len
<= 8) {
12360 /* Switch to the next fragment. */
12362 vcpu
->mmio_cur_fragment
++;
12364 /* Go forward to the next mmio piece. */
12370 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
12371 vcpu
->mmio_needed
= 0;
12373 // VMG change, at this point, we're always done
12374 // RIP has already been advanced
12378 // More MMIO is needed
12379 run
->mmio
.phys_addr
= frag
->gpa
;
12380 run
->mmio
.len
= min(8u, frag
->len
);
12381 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
12382 if (run
->mmio
.is_write
)
12383 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12384 run
->exit_reason
= KVM_EXIT_MMIO
;
12386 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12391 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12395 struct kvm_mmio_fragment
*frag
;
12400 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12401 if (handled
== bytes
)
12408 /*TODO: Check if need to increment number of frags */
12409 frag
= vcpu
->mmio_fragments
;
12410 vcpu
->mmio_nr_fragments
= 1;
12415 vcpu
->mmio_needed
= 1;
12416 vcpu
->mmio_cur_fragment
= 0;
12418 vcpu
->run
->mmio
.phys_addr
= gpa
;
12419 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12420 vcpu
->run
->mmio
.is_write
= 1;
12421 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12422 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12424 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12428 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
12430 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12434 struct kvm_mmio_fragment
*frag
;
12439 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12440 if (handled
== bytes
)
12447 /*TODO: Check if need to increment number of frags */
12448 frag
= vcpu
->mmio_fragments
;
12449 vcpu
->mmio_nr_fragments
= 1;
12454 vcpu
->mmio_needed
= 1;
12455 vcpu
->mmio_cur_fragment
= 0;
12457 vcpu
->run
->mmio
.phys_addr
= gpa
;
12458 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12459 vcpu
->run
->mmio
.is_write
= 0;
12460 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12462 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12466 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
12468 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12469 unsigned int port
);
12471 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
12473 int size
= vcpu
->arch
.pio
.size
;
12474 int port
= vcpu
->arch
.pio
.port
;
12476 vcpu
->arch
.pio
.count
= 0;
12477 if (vcpu
->arch
.sev_pio_count
)
12478 return kvm_sev_es_outs(vcpu
, size
, port
);
12482 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12486 unsigned int count
=
12487 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12488 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
12490 /* memcpy done already by emulator_pio_out. */
12491 vcpu
->arch
.sev_pio_count
-= count
;
12492 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12496 /* Emulation done by the kernel. */
12497 if (!vcpu
->arch
.sev_pio_count
)
12501 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
12505 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12506 unsigned int port
);
12508 static void advance_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12510 unsigned count
= vcpu
->arch
.pio
.count
;
12511 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
12512 vcpu
->arch
.sev_pio_count
-= count
;
12513 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12516 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12518 int size
= vcpu
->arch
.pio
.size
;
12519 int port
= vcpu
->arch
.pio
.port
;
12521 advance_sev_es_emulated_ins(vcpu
);
12522 if (vcpu
->arch
.sev_pio_count
)
12523 return kvm_sev_es_ins(vcpu
, size
, port
);
12527 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12531 unsigned int count
=
12532 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12533 if (!__emulator_pio_in(vcpu
, size
, port
, count
))
12536 /* Emulation done by the kernel. */
12537 advance_sev_es_emulated_ins(vcpu
);
12538 if (!vcpu
->arch
.sev_pio_count
)
12542 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
12546 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
12547 unsigned int port
, void *data
, unsigned int count
,
12550 vcpu
->arch
.sev_pio_data
= data
;
12551 vcpu
->arch
.sev_pio_count
= count
;
12552 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
12553 : kvm_sev_es_outs(vcpu
, size
, port
);
12555 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
12557 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
12558 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
12559 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
12560 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
12561 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
12562 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
12563 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
12564 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
12565 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
12566 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
12567 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
12568 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
12569 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
12570 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
12571 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
12572 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
12573 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
12574 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
12575 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
12576 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
12577 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
12578 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
12579 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);
12580 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
12581 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
12582 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
12583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);