1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/internal.h> /* Ugh! */
72 #include <asm/pvclock.h>
73 #include <asm/div64.h>
74 #include <asm/irq_remapping.h>
75 #include <asm/mshyperv.h>
76 #include <asm/hypervisor.h>
77 #include <asm/tlbflush.h>
78 #include <asm/intel_pt.h>
79 #include <asm/emulate_prefix.h>
81 #include <clocksource/hyperv_timer.h>
83 #define CREATE_TRACE_POINTS
86 #define MAX_IO_MSRS 256
87 #define KVM_MAX_MCE_BANKS 32
88 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
91 #define emul_to_vcpu(ctxt) \
92 ((struct kvm_vcpu *)(ctxt)->vcpu)
95 * - enable syscall per default because its emulated by KVM
96 * - enable LME and LMA per default on 64 bit KVM
100 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
102 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
105 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
110 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
112 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
113 static void process_nmi(struct kvm_vcpu
*vcpu
);
114 static void process_smi(struct kvm_vcpu
*vcpu
);
115 static void enter_smm(struct kvm_vcpu
*vcpu
);
116 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
117 static void store_regs(struct kvm_vcpu
*vcpu
);
118 static int sync_regs(struct kvm_vcpu
*vcpu
);
120 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
121 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
123 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
124 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
126 #define KVM_X86_OP(func) \
127 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
128 *(((struct kvm_x86_ops *)0)->func));
129 #define KVM_X86_OP_NULL KVM_X86_OP
130 #include <asm/kvm-x86-ops.h>
131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current
);
135 static bool __read_mostly ignore_msrs
= 0;
136 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
138 bool __read_mostly report_ignored_msrs
= true;
139 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
140 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
142 unsigned int min_timer_period_us
= 200;
143 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
145 static bool __read_mostly kvmclock_periodic_sync
= true;
146 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
148 bool __read_mostly kvm_has_tsc_control
;
149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
150 u32 __read_mostly kvm_max_guest_tsc_khz
;
151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
152 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
154 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
156 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
158 bool __read_mostly kvm_has_bus_lock_exit
;
159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit
);
161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
162 static u32 __read_mostly tsc_tolerance_ppm
= 250;
163 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
166 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
167 * adaptive tuning starting from default advancement of 1000ns. '0' disables
168 * advancement entirely. Any other value is used as-is and disables adaptive
169 * tuning, i.e. allows privileged userspace to set an exact advancement time.
171 static int __read_mostly lapic_timer_advance_ns
= -1;
172 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
174 static bool __read_mostly vector_hashing
= true;
175 module_param(vector_hashing
, bool, S_IRUGO
);
177 bool __read_mostly enable_vmware_backdoor
= false;
178 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
181 static bool __read_mostly force_emulation_prefix
= false;
182 module_param(force_emulation_prefix
, bool, S_IRUGO
);
184 int __read_mostly pi_inject_timer
= -1;
185 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
188 * Restoring the host value for MSRs that are only consumed when running in
189 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
190 * returns to userspace, i.e. the kernel can run with the guest's value.
192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
194 struct kvm_user_return_msrs
{
195 struct user_return_notifier urn
;
197 struct kvm_user_return_msr_values
{
200 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
203 u32 __read_mostly kvm_nr_uret_msrs
;
204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
205 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
206 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
208 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
209 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
210 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
211 | XFEATURE_MASK_PKRU)
213 u64 __read_mostly host_efer
;
214 EXPORT_SYMBOL_GPL(host_efer
);
216 bool __read_mostly allow_smaller_maxphyaddr
= 0;
217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
219 bool __read_mostly enable_apicv
= true;
220 EXPORT_SYMBOL_GPL(enable_apicv
);
222 u64 __read_mostly host_xss
;
223 EXPORT_SYMBOL_GPL(host_xss
);
224 u64 __read_mostly supported_xss
;
225 EXPORT_SYMBOL_GPL(supported_xss
);
227 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
228 KVM_GENERIC_VM_STATS(),
229 STATS_DESC_COUNTER(VM
, mmu_shadow_zapped
),
230 STATS_DESC_COUNTER(VM
, mmu_pte_write
),
231 STATS_DESC_COUNTER(VM
, mmu_pde_zapped
),
232 STATS_DESC_COUNTER(VM
, mmu_flooded
),
233 STATS_DESC_COUNTER(VM
, mmu_recycled
),
234 STATS_DESC_COUNTER(VM
, mmu_cache_miss
),
235 STATS_DESC_ICOUNTER(VM
, mmu_unsync
),
236 STATS_DESC_ICOUNTER(VM
, pages_4k
),
237 STATS_DESC_ICOUNTER(VM
, pages_2m
),
238 STATS_DESC_ICOUNTER(VM
, pages_1g
),
239 STATS_DESC_ICOUNTER(VM
, nx_lpage_splits
),
240 STATS_DESC_PCOUNTER(VM
, max_mmu_rmap_size
),
241 STATS_DESC_PCOUNTER(VM
, max_mmu_page_hash_collisions
)
244 const struct kvm_stats_header kvm_vm_stats_header
= {
245 .name_size
= KVM_STATS_NAME_SIZE
,
246 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
247 .id_offset
= sizeof(struct kvm_stats_header
),
248 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
249 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
250 sizeof(kvm_vm_stats_desc
),
253 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
254 KVM_GENERIC_VCPU_STATS(),
255 STATS_DESC_COUNTER(VCPU
, pf_fixed
),
256 STATS_DESC_COUNTER(VCPU
, pf_guest
),
257 STATS_DESC_COUNTER(VCPU
, tlb_flush
),
258 STATS_DESC_COUNTER(VCPU
, invlpg
),
259 STATS_DESC_COUNTER(VCPU
, exits
),
260 STATS_DESC_COUNTER(VCPU
, io_exits
),
261 STATS_DESC_COUNTER(VCPU
, mmio_exits
),
262 STATS_DESC_COUNTER(VCPU
, signal_exits
),
263 STATS_DESC_COUNTER(VCPU
, irq_window_exits
),
264 STATS_DESC_COUNTER(VCPU
, nmi_window_exits
),
265 STATS_DESC_COUNTER(VCPU
, l1d_flush
),
266 STATS_DESC_COUNTER(VCPU
, halt_exits
),
267 STATS_DESC_COUNTER(VCPU
, request_irq_exits
),
268 STATS_DESC_COUNTER(VCPU
, irq_exits
),
269 STATS_DESC_COUNTER(VCPU
, host_state_reload
),
270 STATS_DESC_COUNTER(VCPU
, fpu_reload
),
271 STATS_DESC_COUNTER(VCPU
, insn_emulation
),
272 STATS_DESC_COUNTER(VCPU
, insn_emulation_fail
),
273 STATS_DESC_COUNTER(VCPU
, hypercalls
),
274 STATS_DESC_COUNTER(VCPU
, irq_injections
),
275 STATS_DESC_COUNTER(VCPU
, nmi_injections
),
276 STATS_DESC_COUNTER(VCPU
, req_event
),
277 STATS_DESC_COUNTER(VCPU
, nested_run
),
278 STATS_DESC_COUNTER(VCPU
, directed_yield_attempted
),
279 STATS_DESC_COUNTER(VCPU
, directed_yield_successful
),
280 STATS_DESC_ICOUNTER(VCPU
, guest_mode
)
283 const struct kvm_stats_header kvm_vcpu_stats_header
= {
284 .name_size
= KVM_STATS_NAME_SIZE
,
285 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
286 .id_offset
= sizeof(struct kvm_stats_header
),
287 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
288 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
289 sizeof(kvm_vcpu_stats_desc
),
292 u64 __read_mostly host_xcr0
;
293 u64 __read_mostly supported_xcr0
;
294 EXPORT_SYMBOL_GPL(supported_xcr0
);
296 static struct kmem_cache
*x86_fpu_cache
;
298 static struct kmem_cache
*x86_emulator_cache
;
301 * When called, it means the previous get/set msr reached an invalid msr.
302 * Return true if we want to ignore/silent this failed msr access.
304 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
306 const char *op
= write
? "wrmsr" : "rdmsr";
309 if (report_ignored_msrs
)
310 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
315 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
321 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
323 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
324 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
326 return kmem_cache_create_usercopy("x86_emulator", size
,
327 __alignof__(struct x86_emulate_ctxt
),
328 SLAB_ACCOUNT
, useroffset
,
329 size
- useroffset
, NULL
);
332 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
337 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
338 vcpu
->arch
.apf
.gfns
[i
] = ~0;
341 static void kvm_on_user_return(struct user_return_notifier
*urn
)
344 struct kvm_user_return_msrs
*msrs
345 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
346 struct kvm_user_return_msr_values
*values
;
350 * Disabling irqs at this point since the following code could be
351 * interrupted and executed through kvm_arch_hardware_disable()
353 local_irq_save(flags
);
354 if (msrs
->registered
) {
355 msrs
->registered
= false;
356 user_return_notifier_unregister(urn
);
358 local_irq_restore(flags
);
359 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
360 values
= &msrs
->values
[slot
];
361 if (values
->host
!= values
->curr
) {
362 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
363 values
->curr
= values
->host
;
368 static int kvm_probe_user_return_msr(u32 msr
)
374 ret
= rdmsrl_safe(msr
, &val
);
377 ret
= wrmsrl_safe(msr
, val
);
383 int kvm_add_user_return_msr(u32 msr
)
385 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
387 if (kvm_probe_user_return_msr(msr
))
390 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
391 return kvm_nr_uret_msrs
++;
393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
395 int kvm_find_user_return_msr(u32 msr
)
399 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
400 if (kvm_uret_msrs_list
[i
] == msr
)
405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
407 static void kvm_user_return_msr_cpu_online(void)
409 unsigned int cpu
= smp_processor_id();
410 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
414 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
415 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
416 msrs
->values
[i
].host
= value
;
417 msrs
->values
[i
].curr
= value
;
421 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
423 unsigned int cpu
= smp_processor_id();
424 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
427 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
428 if (value
== msrs
->values
[slot
].curr
)
430 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
434 msrs
->values
[slot
].curr
= value
;
435 if (!msrs
->registered
) {
436 msrs
->urn
.on_user_return
= kvm_on_user_return
;
437 user_return_notifier_register(&msrs
->urn
);
438 msrs
->registered
= true;
442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
444 static void drop_user_return_notifiers(void)
446 unsigned int cpu
= smp_processor_id();
447 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
449 if (msrs
->registered
)
450 kvm_on_user_return(&msrs
->urn
);
453 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
455 return vcpu
->arch
.apic_base
;
457 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
459 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
461 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
465 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
467 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
468 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
469 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
470 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
472 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
474 if (!msr_info
->host_initiated
) {
475 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
477 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
481 kvm_lapic_set_base(vcpu
, msr_info
->data
);
482 kvm_recalculate_apic_map(vcpu
->kvm
);
485 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
488 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
490 * Hardware virtualization extension instructions may fault if a reboot turns
491 * off virtualization while processes are running. Usually after catching the
492 * fault we just panic; during reboot instead the instruction is ignored.
494 noinstr
void kvm_spurious_fault(void)
496 /* Fault while not rebooting. We want the trace. */
497 BUG_ON(!kvm_rebooting
);
499 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
501 #define EXCPT_BENIGN 0
502 #define EXCPT_CONTRIBUTORY 1
505 static int exception_class(int vector
)
515 return EXCPT_CONTRIBUTORY
;
522 #define EXCPT_FAULT 0
524 #define EXCPT_ABORT 2
525 #define EXCPT_INTERRUPT 3
527 static int exception_type(int vector
)
531 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
532 return EXCPT_INTERRUPT
;
536 /* #DB is trap, as instruction watchpoints are handled elsewhere */
537 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
540 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
543 /* Reserved exceptions will result in fault */
547 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
549 unsigned nr
= vcpu
->arch
.exception
.nr
;
550 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
551 unsigned long payload
= vcpu
->arch
.exception
.payload
;
559 * "Certain debug exceptions may clear bit 0-3. The
560 * remaining contents of the DR6 register are never
561 * cleared by the processor".
563 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
565 * In order to reflect the #DB exception payload in guest
566 * dr6, three components need to be considered: active low
567 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
569 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
570 * In the target guest dr6:
571 * FIXED_1 bits should always be set.
572 * Active low bits should be cleared if 1-setting in payload.
573 * Active high bits should be set if 1-setting in payload.
575 * Note, the payload is compatible with the pending debug
576 * exceptions/exit qualification under VMX, that active_low bits
577 * are active high in payload.
578 * So they need to be flipped for DR6.
580 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
581 vcpu
->arch
.dr6
|= payload
;
582 vcpu
->arch
.dr6
^= payload
& DR6_ACTIVE_LOW
;
585 * The #DB payload is defined as compatible with the 'pending
586 * debug exceptions' field under VMX, not DR6. While bit 12 is
587 * defined in the 'pending debug exceptions' field (enabled
588 * breakpoint), it is reserved and must be zero in DR6.
590 vcpu
->arch
.dr6
&= ~BIT(12);
593 vcpu
->arch
.cr2
= payload
;
597 vcpu
->arch
.exception
.has_payload
= false;
598 vcpu
->arch
.exception
.payload
= 0;
600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
602 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
603 unsigned nr
, bool has_error
, u32 error_code
,
604 bool has_payload
, unsigned long payload
, bool reinject
)
609 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
611 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
615 * On vmentry, vcpu->arch.exception.pending is only
616 * true if an event injection was blocked by
617 * nested_run_pending. In that case, however,
618 * vcpu_enter_guest requests an immediate exit,
619 * and the guest shouldn't proceed far enough to
622 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
623 vcpu
->arch
.exception
.injected
= true;
624 if (WARN_ON_ONCE(has_payload
)) {
626 * A reinjected event has already
627 * delivered its payload.
633 vcpu
->arch
.exception
.pending
= true;
634 vcpu
->arch
.exception
.injected
= false;
636 vcpu
->arch
.exception
.has_error_code
= has_error
;
637 vcpu
->arch
.exception
.nr
= nr
;
638 vcpu
->arch
.exception
.error_code
= error_code
;
639 vcpu
->arch
.exception
.has_payload
= has_payload
;
640 vcpu
->arch
.exception
.payload
= payload
;
641 if (!is_guest_mode(vcpu
))
642 kvm_deliver_exception_payload(vcpu
);
646 /* to check exception */
647 prev_nr
= vcpu
->arch
.exception
.nr
;
648 if (prev_nr
== DF_VECTOR
) {
649 /* triple fault -> shutdown */
650 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
653 class1
= exception_class(prev_nr
);
654 class2
= exception_class(nr
);
655 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
656 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
658 * Generate double fault per SDM Table 5-5. Set
659 * exception.pending = true so that the double fault
660 * can trigger a nested vmexit.
662 vcpu
->arch
.exception
.pending
= true;
663 vcpu
->arch
.exception
.injected
= false;
664 vcpu
->arch
.exception
.has_error_code
= true;
665 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
666 vcpu
->arch
.exception
.error_code
= 0;
667 vcpu
->arch
.exception
.has_payload
= false;
668 vcpu
->arch
.exception
.payload
= 0;
670 /* replace previous exception with a new one in a hope
671 that instruction re-execution will regenerate lost
676 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
678 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
680 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
682 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
684 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
686 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
688 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
689 unsigned long payload
)
691 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
695 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
696 u32 error_code
, unsigned long payload
)
698 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
699 true, payload
, false);
702 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
705 kvm_inject_gp(vcpu
, 0);
707 return kvm_skip_emulated_instruction(vcpu
);
711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
713 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
715 ++vcpu
->stat
.pf_guest
;
716 vcpu
->arch
.exception
.nested_apf
=
717 is_guest_mode(vcpu
) && fault
->async_page_fault
;
718 if (vcpu
->arch
.exception
.nested_apf
) {
719 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
720 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
722 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
729 struct x86_exception
*fault
)
731 struct kvm_mmu
*fault_mmu
;
732 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
734 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
738 * Invalidate the TLB entry for the faulting address, if it exists,
739 * else the access will fault indefinitely (and to emulate hardware).
741 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
742 !(fault
->error_code
& PFERR_RSVD_MASK
))
743 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
744 fault_mmu
->root_hpa
);
746 fault_mmu
->inject_page_fault(vcpu
, fault
);
747 return fault
->nested_page_fault
;
749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
751 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
753 atomic_inc(&vcpu
->arch
.nmi_queued
);
754 kvm_make_request(KVM_REQ_NMI
, vcpu
);
756 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
758 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
760 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
764 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
766 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
771 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
772 * a #GP and return false.
774 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
776 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
778 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
781 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
783 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
785 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
788 kvm_queue_exception(vcpu
, UD_VECTOR
);
791 EXPORT_SYMBOL_GPL(kvm_require_dr
);
794 * This function will be used to read from the physical memory of the currently
795 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
796 * can read from guest physical or from the guest's guest physical memory.
798 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
799 gfn_t ngfn
, void *data
, int offset
, int len
,
802 struct x86_exception exception
;
806 ngpa
= gfn_to_gpa(ngfn
);
807 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
808 if (real_gfn
== UNMAPPED_GVA
)
811 real_gfn
= gpa_to_gfn(real_gfn
);
813 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
815 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
817 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
819 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
823 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
825 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
827 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
828 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
831 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
833 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
834 offset
* sizeof(u64
), sizeof(pdpte
),
835 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
840 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
841 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
842 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
849 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
850 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
851 kvm_make_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
);
852 vcpu
->arch
.pdptrs_from_userspace
= false;
858 EXPORT_SYMBOL_GPL(load_pdptrs
);
860 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
862 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
863 kvm_clear_async_pf_completion_queue(vcpu
);
864 kvm_async_pf_hash_reset(vcpu
);
867 if ((cr0
^ old_cr0
) & KVM_MMU_CR0_ROLE_BITS
)
868 kvm_mmu_reset_context(vcpu
);
870 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
871 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
872 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
873 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
875 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
877 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
879 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
880 unsigned long pdptr_bits
= X86_CR0_CD
| X86_CR0_NW
| X86_CR0_PG
;
885 if (cr0
& 0xffffffff00000000UL
)
889 cr0
&= ~CR0_RESERVED_BITS
;
891 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
894 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
898 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
899 (cr0
& X86_CR0_PG
)) {
904 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
909 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
910 is_pae(vcpu
) && ((cr0
^ old_cr0
) & pdptr_bits
) &&
911 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
)))
914 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
917 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
919 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
923 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
925 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
927 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
929 EXPORT_SYMBOL_GPL(kvm_lmsw
);
931 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
933 if (vcpu
->arch
.guest_state_protected
)
936 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
938 if (vcpu
->arch
.xcr0
!= host_xcr0
)
939 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
941 if (vcpu
->arch
.xsaves_enabled
&&
942 vcpu
->arch
.ia32_xss
!= host_xss
)
943 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
946 if (static_cpu_has(X86_FEATURE_PKU
) &&
947 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
948 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
949 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
950 write_pkru(vcpu
->arch
.pkru
);
952 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
954 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
956 if (vcpu
->arch
.guest_state_protected
)
959 if (static_cpu_has(X86_FEATURE_PKU
) &&
960 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
961 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
962 vcpu
->arch
.pkru
= rdpkru();
963 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
964 write_pkru(vcpu
->arch
.host_pkru
);
967 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
969 if (vcpu
->arch
.xcr0
!= host_xcr0
)
970 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
972 if (vcpu
->arch
.xsaves_enabled
&&
973 vcpu
->arch
.ia32_xss
!= host_xss
)
974 wrmsrl(MSR_IA32_XSS
, host_xss
);
978 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
980 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
983 u64 old_xcr0
= vcpu
->arch
.xcr0
;
986 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
987 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
989 if (!(xcr0
& XFEATURE_MASK_FP
))
991 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
995 * Do not allow the guest to set bits that we do not support
996 * saving. However, xcr0 bit 0 is always set, even if the
997 * emulated CPU does not support XSAVE (see fx_init).
999 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
1000 if (xcr0
& ~valid_bits
)
1003 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
1004 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1007 if (xcr0
& XFEATURE_MASK_AVX512
) {
1008 if (!(xcr0
& XFEATURE_MASK_YMM
))
1010 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1013 vcpu
->arch
.xcr0
= xcr0
;
1015 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1016 kvm_update_cpuid_runtime(vcpu
);
1020 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1022 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1023 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1024 kvm_inject_gp(vcpu
, 0);
1028 return kvm_skip_emulated_instruction(vcpu
);
1030 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1032 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1034 if (cr4
& cr4_reserved_bits
)
1037 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1040 return static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1042 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
1044 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1046 if (((cr4
^ old_cr4
) & KVM_MMU_CR4_ROLE_BITS
) ||
1047 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1048 kvm_mmu_reset_context(vcpu
);
1050 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1052 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1054 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1055 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1058 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1061 if (is_long_mode(vcpu
)) {
1062 if (!(cr4
& X86_CR4_PAE
))
1064 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1066 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1067 && ((cr4
^ old_cr4
) & pdptr_bits
)
1068 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
1069 kvm_read_cr3(vcpu
)))
1072 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1073 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1076 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1077 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1081 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1083 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1087 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1089 static void kvm_invalidate_pcid(struct kvm_vcpu
*vcpu
, unsigned long pcid
)
1091 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
1092 unsigned long roots_to_free
= 0;
1096 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1097 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1098 * also via the emulator. KVM's TDP page tables are not in the scope of
1099 * the invalidation, but the guest's TLB entries need to be flushed as
1100 * the CPU may have cached entries in its TLB for the target PCID.
1102 if (unlikely(tdp_enabled
)) {
1103 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1108 * If neither the current CR3 nor any of the prev_roots use the given
1109 * PCID, then nothing needs to be done here because a resync will
1110 * happen anyway before switching to any other CR3.
1112 if (kvm_get_active_pcid(vcpu
) == pcid
) {
1113 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1114 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1117 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
1118 if (kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
) == pcid
)
1119 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
1121 kvm_mmu_free_roots(vcpu
, mmu
, roots_to_free
);
1124 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1126 bool skip_tlb_flush
= false;
1127 unsigned long pcid
= 0;
1128 #ifdef CONFIG_X86_64
1129 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1132 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1133 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1134 pcid
= cr3
& X86_CR3_PCID_MASK
;
1138 /* PDPTRs are always reloaded for PAE paging. */
1139 if (cr3
== kvm_read_cr3(vcpu
) && !is_pae_paging(vcpu
))
1140 goto handle_tlb_flush
;
1143 * Do not condition the GPA check on long mode, this helper is used to
1144 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1145 * the current vCPU mode is accurate.
1147 if (kvm_vcpu_is_illegal_gpa(vcpu
, cr3
))
1150 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1153 if (cr3
!= kvm_read_cr3(vcpu
))
1154 kvm_mmu_new_pgd(vcpu
, cr3
);
1156 vcpu
->arch
.cr3
= cr3
;
1157 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1161 * A load of CR3 that flushes the TLB flushes only the current PCID,
1162 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1163 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1164 * and it's impossible to use a non-zero PCID when PCID is disabled,
1165 * i.e. only PCID=0 can be relevant.
1167 if (!skip_tlb_flush
)
1168 kvm_invalidate_pcid(vcpu
, pcid
);
1172 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1174 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1176 if (cr8
& CR8_RESERVED_BITS
)
1178 if (lapic_in_kernel(vcpu
))
1179 kvm_lapic_set_tpr(vcpu
, cr8
);
1181 vcpu
->arch
.cr8
= cr8
;
1184 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1186 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1188 if (lapic_in_kernel(vcpu
))
1189 return kvm_lapic_get_cr8(vcpu
);
1191 return vcpu
->arch
.cr8
;
1193 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1195 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1199 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1200 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1201 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1205 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1209 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1210 dr7
= vcpu
->arch
.guest_debug_dr7
;
1212 dr7
= vcpu
->arch
.dr7
;
1213 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1214 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1215 if (dr7
& DR7_BP_EN_MASK
)
1216 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1218 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1220 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1222 u64 fixed
= DR6_FIXED_1
;
1224 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1227 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1228 fixed
|= DR6_BUS_LOCK
;
1232 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1234 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1238 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1239 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1240 vcpu
->arch
.eff_db
[dr
] = val
;
1244 if (!kvm_dr6_valid(val
))
1246 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1250 if (!kvm_dr7_valid(val
))
1252 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1253 kvm_update_dr7(vcpu
);
1259 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1261 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1263 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1267 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1271 *val
= vcpu
->arch
.dr6
;
1275 *val
= vcpu
->arch
.dr7
;
1279 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1281 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1283 u32 ecx
= kvm_rcx_read(vcpu
);
1286 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1287 kvm_inject_gp(vcpu
, 0);
1291 kvm_rax_write(vcpu
, (u32
)data
);
1292 kvm_rdx_write(vcpu
, data
>> 32);
1293 return kvm_skip_emulated_instruction(vcpu
);
1295 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1298 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1299 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1301 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1302 * extract the supported MSRs from the related const lists.
1303 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1304 * capabilities of the host cpu. This capabilities test skips MSRs that are
1305 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1306 * may depend on host virtualization features rather than host cpu features.
1309 static const u32 msrs_to_save_all
[] = {
1310 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1312 #ifdef CONFIG_X86_64
1313 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1315 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1316 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1318 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1319 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1320 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1321 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1322 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1323 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1324 MSR_IA32_UMWAIT_CONTROL
,
1326 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1327 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2,
1328 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1329 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1330 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1331 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1332 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1333 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1334 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1335 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1336 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1337 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1338 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1339 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1340 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1341 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1342 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1343 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1344 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1345 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1346 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1347 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1349 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1350 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1351 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1352 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1353 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1354 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1357 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1358 static unsigned num_msrs_to_save
;
1360 static const u32 emulated_msrs_all
[] = {
1361 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1362 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1363 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1364 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1365 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1366 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1367 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1369 HV_X64_MSR_VP_INDEX
,
1370 HV_X64_MSR_VP_RUNTIME
,
1371 HV_X64_MSR_SCONTROL
,
1372 HV_X64_MSR_STIMER0_CONFIG
,
1373 HV_X64_MSR_VP_ASSIST_PAGE
,
1374 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1375 HV_X64_MSR_TSC_EMULATION_STATUS
,
1376 HV_X64_MSR_SYNDBG_OPTIONS
,
1377 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1378 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1379 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1381 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1382 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1384 MSR_IA32_TSC_ADJUST
,
1385 MSR_IA32_TSC_DEADLINE
,
1386 MSR_IA32_ARCH_CAPABILITIES
,
1387 MSR_IA32_PERF_CAPABILITIES
,
1388 MSR_IA32_MISC_ENABLE
,
1389 MSR_IA32_MCG_STATUS
,
1391 MSR_IA32_MCG_EXT_CTL
,
1395 MSR_MISC_FEATURES_ENABLES
,
1396 MSR_AMD64_VIRT_SPEC_CTRL
,
1401 * The following list leaves out MSRs whose values are determined
1402 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1403 * We always support the "true" VMX control MSRs, even if the host
1404 * processor does not, so I am putting these registers here rather
1405 * than in msrs_to_save_all.
1408 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1409 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1410 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1411 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1413 MSR_IA32_VMX_CR0_FIXED0
,
1414 MSR_IA32_VMX_CR4_FIXED0
,
1415 MSR_IA32_VMX_VMCS_ENUM
,
1416 MSR_IA32_VMX_PROCBASED_CTLS2
,
1417 MSR_IA32_VMX_EPT_VPID_CAP
,
1418 MSR_IA32_VMX_VMFUNC
,
1421 MSR_KVM_POLL_CONTROL
,
1424 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1425 static unsigned num_emulated_msrs
;
1428 * List of msr numbers which are used to expose MSR-based features that
1429 * can be used by a hypervisor to validate requested CPU features.
1431 static const u32 msr_based_features_all
[] = {
1433 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1434 MSR_IA32_VMX_PINBASED_CTLS
,
1435 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1436 MSR_IA32_VMX_PROCBASED_CTLS
,
1437 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1438 MSR_IA32_VMX_EXIT_CTLS
,
1439 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1440 MSR_IA32_VMX_ENTRY_CTLS
,
1442 MSR_IA32_VMX_CR0_FIXED0
,
1443 MSR_IA32_VMX_CR0_FIXED1
,
1444 MSR_IA32_VMX_CR4_FIXED0
,
1445 MSR_IA32_VMX_CR4_FIXED1
,
1446 MSR_IA32_VMX_VMCS_ENUM
,
1447 MSR_IA32_VMX_PROCBASED_CTLS2
,
1448 MSR_IA32_VMX_EPT_VPID_CAP
,
1449 MSR_IA32_VMX_VMFUNC
,
1453 MSR_IA32_ARCH_CAPABILITIES
,
1454 MSR_IA32_PERF_CAPABILITIES
,
1457 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1458 static unsigned int num_msr_based_features
;
1460 static u64
kvm_get_arch_capabilities(void)
1464 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1465 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1468 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1469 * the nested hypervisor runs with NX huge pages. If it is not,
1470 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1471 * L1 guests, so it need not worry about its own (L2) guests.
1473 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1476 * If we're doing cache flushes (either "always" or "cond")
1477 * we will do one whenever the guest does a vmlaunch/vmresume.
1478 * If an outer hypervisor is doing the cache flush for us
1479 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1480 * capability to the guest too, and if EPT is disabled we're not
1481 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1482 * require a nested hypervisor to do a flush of its own.
1484 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1485 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1487 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1488 data
|= ARCH_CAP_RDCL_NO
;
1489 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1490 data
|= ARCH_CAP_SSB_NO
;
1491 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1492 data
|= ARCH_CAP_MDS_NO
;
1494 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1496 * If RTM=0 because the kernel has disabled TSX, the host might
1497 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1498 * and therefore knows that there cannot be TAA) but keep
1499 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1500 * and we want to allow migrating those guests to tsx=off hosts.
1502 data
&= ~ARCH_CAP_TAA_NO
;
1503 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1504 data
|= ARCH_CAP_TAA_NO
;
1507 * Nothing to do here; we emulate TSX_CTRL if present on the
1508 * host so the guest can choose between disabling TSX or
1509 * using VERW to clear CPU buffers.
1516 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1518 switch (msr
->index
) {
1519 case MSR_IA32_ARCH_CAPABILITIES
:
1520 msr
->data
= kvm_get_arch_capabilities();
1522 case MSR_IA32_UCODE_REV
:
1523 rdmsrl_safe(msr
->index
, &msr
->data
);
1526 return static_call(kvm_x86_get_msr_feature
)(msr
);
1531 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1533 struct kvm_msr_entry msr
;
1537 r
= kvm_get_msr_feature(&msr
);
1539 if (r
== KVM_MSR_RET_INVALID
) {
1540 /* Unconditionally clear the output for simplicity */
1542 if (kvm_msr_ignored_check(index
, 0, false))
1554 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1556 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1559 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1562 if (efer
& (EFER_LME
| EFER_LMA
) &&
1563 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1566 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1572 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1574 if (efer
& efer_reserved_bits
)
1577 return __kvm_valid_efer(vcpu
, efer
);
1579 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1581 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1583 u64 old_efer
= vcpu
->arch
.efer
;
1584 u64 efer
= msr_info
->data
;
1587 if (efer
& efer_reserved_bits
)
1590 if (!msr_info
->host_initiated
) {
1591 if (!__kvm_valid_efer(vcpu
, efer
))
1594 if (is_paging(vcpu
) &&
1595 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1600 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1602 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1608 /* Update reserved bits */
1609 if ((efer
^ old_efer
) & EFER_NX
)
1610 kvm_mmu_reset_context(vcpu
);
1615 void kvm_enable_efer_bits(u64 mask
)
1617 efer_reserved_bits
&= ~mask
;
1619 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1621 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1623 struct kvm_x86_msr_filter
*msr_filter
;
1624 struct msr_bitmap_range
*ranges
;
1625 struct kvm
*kvm
= vcpu
->kvm
;
1630 /* x2APIC MSRs do not support filtering. */
1631 if (index
>= 0x800 && index
<= 0x8ff)
1634 idx
= srcu_read_lock(&kvm
->srcu
);
1636 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1642 allowed
= msr_filter
->default_allow
;
1643 ranges
= msr_filter
->ranges
;
1645 for (i
= 0; i
< msr_filter
->count
; i
++) {
1646 u32 start
= ranges
[i
].base
;
1647 u32 end
= start
+ ranges
[i
].nmsrs
;
1648 u32 flags
= ranges
[i
].flags
;
1649 unsigned long *bitmap
= ranges
[i
].bitmap
;
1651 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1652 allowed
= !!test_bit(index
- start
, bitmap
);
1658 srcu_read_unlock(&kvm
->srcu
, idx
);
1662 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1665 * Write @data into the MSR specified by @index. Select MSR specific fault
1666 * checks are bypassed if @host_initiated is %true.
1667 * Returns 0 on success, non-0 otherwise.
1668 * Assumes vcpu_load() was already called.
1670 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1671 bool host_initiated
)
1673 struct msr_data msr
;
1675 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1676 return KVM_MSR_RET_FILTERED
;
1681 case MSR_KERNEL_GS_BASE
:
1684 if (is_noncanonical_address(data
, vcpu
))
1687 case MSR_IA32_SYSENTER_EIP
:
1688 case MSR_IA32_SYSENTER_ESP
:
1690 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1691 * non-canonical address is written on Intel but not on
1692 * AMD (which ignores the top 32-bits, because it does
1693 * not implement 64-bit SYSENTER).
1695 * 64-bit code should hence be able to write a non-canonical
1696 * value on AMD. Making the address canonical ensures that
1697 * vmentry does not fail on Intel after writing a non-canonical
1698 * value, and that something deterministic happens if the guest
1699 * invokes 64-bit SYSENTER.
1701 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1704 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1707 if (!host_initiated
&&
1708 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1709 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1713 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1714 * incomplete and conflicting architectural behavior. Current
1715 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1716 * reserved and always read as zeros. Enforce Intel's reserved
1717 * bits check if and only if the guest CPU is Intel, and clear
1718 * the bits in all other cases. This ensures cross-vendor
1719 * migration will provide consistent behavior for the guest.
1721 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1730 msr
.host_initiated
= host_initiated
;
1732 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1735 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1736 u32 index
, u64 data
, bool host_initiated
)
1738 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1740 if (ret
== KVM_MSR_RET_INVALID
)
1741 if (kvm_msr_ignored_check(index
, data
, true))
1748 * Read the MSR specified by @index into @data. Select MSR specific fault
1749 * checks are bypassed if @host_initiated is %true.
1750 * Returns 0 on success, non-0 otherwise.
1751 * Assumes vcpu_load() was already called.
1753 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1754 bool host_initiated
)
1756 struct msr_data msr
;
1759 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1760 return KVM_MSR_RET_FILTERED
;
1764 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1767 if (!host_initiated
&&
1768 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1769 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1775 msr
.host_initiated
= host_initiated
;
1777 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1783 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1784 u32 index
, u64
*data
, bool host_initiated
)
1786 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1788 if (ret
== KVM_MSR_RET_INVALID
) {
1789 /* Unconditionally clear *data for simplicity */
1791 if (kvm_msr_ignored_check(index
, 0, false))
1798 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1800 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1802 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1804 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1806 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1808 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1810 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1812 int err
= vcpu
->run
->msr
.error
;
1814 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1815 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1818 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, err
);
1821 static int complete_emulated_wrmsr(struct kvm_vcpu
*vcpu
)
1823 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
1826 static u64
kvm_msr_reason(int r
)
1829 case KVM_MSR_RET_INVALID
:
1830 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1831 case KVM_MSR_RET_FILTERED
:
1832 return KVM_MSR_EXIT_REASON_FILTER
;
1834 return KVM_MSR_EXIT_REASON_INVAL
;
1838 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1839 u32 exit_reason
, u64 data
,
1840 int (*completion
)(struct kvm_vcpu
*vcpu
),
1843 u64 msr_reason
= kvm_msr_reason(r
);
1845 /* Check if the user wanted to know about this MSR fault */
1846 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1849 vcpu
->run
->exit_reason
= exit_reason
;
1850 vcpu
->run
->msr
.error
= 0;
1851 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1852 vcpu
->run
->msr
.reason
= msr_reason
;
1853 vcpu
->run
->msr
.index
= index
;
1854 vcpu
->run
->msr
.data
= data
;
1855 vcpu
->arch
.complete_userspace_io
= completion
;
1860 static int kvm_get_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, int r
)
1862 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_RDMSR
, 0,
1863 complete_emulated_rdmsr
, r
);
1866 static int kvm_set_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
, int r
)
1868 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_WRMSR
, data
,
1869 complete_emulated_wrmsr
, r
);
1872 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1874 u32 ecx
= kvm_rcx_read(vcpu
);
1878 r
= kvm_get_msr(vcpu
, ecx
, &data
);
1880 /* MSR read failed? See if we should ask user space */
1881 if (r
&& kvm_get_msr_user_space(vcpu
, ecx
, r
)) {
1882 /* Bounce to user space */
1887 trace_kvm_msr_read(ecx
, data
);
1889 kvm_rax_write(vcpu
, data
& -1u);
1890 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1892 trace_kvm_msr_read_ex(ecx
);
1895 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1897 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1899 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1901 u32 ecx
= kvm_rcx_read(vcpu
);
1902 u64 data
= kvm_read_edx_eax(vcpu
);
1905 r
= kvm_set_msr(vcpu
, ecx
, data
);
1907 /* MSR write failed? See if we should ask user space */
1908 if (r
&& kvm_set_msr_user_space(vcpu
, ecx
, data
, r
))
1909 /* Bounce to user space */
1912 /* Signal all other negative errors to userspace */
1917 trace_kvm_msr_write(ecx
, data
);
1919 trace_kvm_msr_write_ex(ecx
, data
);
1921 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1923 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1925 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
1927 return kvm_skip_emulated_instruction(vcpu
);
1929 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop
);
1931 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
1933 /* Treat an INVD instruction as a NOP and just skip it. */
1934 return kvm_emulate_as_nop(vcpu
);
1936 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
1938 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
1940 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1941 return kvm_emulate_as_nop(vcpu
);
1943 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
1945 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
1947 kvm_queue_exception(vcpu
, UD_VECTOR
);
1950 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
1952 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
1954 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1955 return kvm_emulate_as_nop(vcpu
);
1957 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
1959 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
1961 xfer_to_guest_mode_prepare();
1962 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
1963 xfer_to_guest_mode_work_pending();
1967 * The fast path for frequent and performance sensitive wrmsr emulation,
1968 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1969 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1970 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1971 * other cases which must be called after interrupts are enabled on the host.
1973 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1975 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1978 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1979 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1980 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1981 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1984 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1985 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1986 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1987 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1994 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
1996 if (!kvm_can_use_hv_timer(vcpu
))
1999 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2003 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
2005 u32 msr
= kvm_rcx_read(vcpu
);
2007 fastpath_t ret
= EXIT_FASTPATH_NONE
;
2010 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
2011 data
= kvm_read_edx_eax(vcpu
);
2012 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
2013 kvm_skip_emulated_instruction(vcpu
);
2014 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
2017 case MSR_IA32_TSC_DEADLINE
:
2018 data
= kvm_read_edx_eax(vcpu
);
2019 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
2020 kvm_skip_emulated_instruction(vcpu
);
2021 ret
= EXIT_FASTPATH_REENTER_GUEST
;
2028 if (ret
!= EXIT_FASTPATH_NONE
)
2029 trace_kvm_msr_write(msr
, data
);
2033 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
2036 * Adapt set_msr() to msr_io()'s calling convention
2038 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2040 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
2043 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2045 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2048 #ifdef CONFIG_X86_64
2049 struct pvclock_clock
{
2059 struct pvclock_gtod_data
{
2062 struct pvclock_clock clock
; /* extract of a clocksource struct */
2063 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2069 static struct pvclock_gtod_data pvclock_gtod_data
;
2071 static void update_pvclock_gtod(struct timekeeper
*tk
)
2073 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2075 write_seqcount_begin(&vdata
->seq
);
2077 /* copy pvclock gtod data */
2078 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2079 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2080 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2081 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2082 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2083 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2084 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2086 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2087 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2088 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2089 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2090 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2091 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2092 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2094 vdata
->wall_time_sec
= tk
->xtime_sec
;
2096 vdata
->offs_boot
= tk
->offs_boot
;
2098 write_seqcount_end(&vdata
->seq
);
2101 static s64
get_kvmclock_base_ns(void)
2103 /* Count up from boot time, but with the frequency of the raw clock. */
2104 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2107 static s64
get_kvmclock_base_ns(void)
2109 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2110 return ktime_get_boottime_ns();
2114 void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2118 struct pvclock_wall_clock wc
;
2125 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2130 ++version
; /* first time write, random junk */
2134 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2138 * The guest calculates current wall clock time by adding
2139 * system time (updated by kvm_guest_time_update below) to the
2140 * wall clock specified here. We do the reverse here.
2142 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
2144 wc
.nsec
= do_div(wall_nsec
, 1000000000);
2145 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2146 wc
.version
= version
;
2148 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2151 wc_sec_hi
= wall_nsec
>> 32;
2152 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2153 &wc_sec_hi
, sizeof(wc_sec_hi
));
2157 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2160 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2161 bool old_msr
, bool host_initiated
)
2163 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2165 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2166 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2167 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2169 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2172 vcpu
->arch
.time
= system_time
;
2173 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2175 /* we verify if the enable bit is set... */
2176 vcpu
->arch
.pv_time_enabled
= false;
2177 if (!(system_time
& 1))
2180 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2181 &vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2182 sizeof(struct pvclock_vcpu_time_info
)))
2183 vcpu
->arch
.pv_time_enabled
= true;
2188 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2190 do_shl32_div32(dividend
, divisor
);
2194 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2195 s8
*pshift
, u32
*pmultiplier
)
2203 scaled64
= scaled_hz
;
2204 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2209 tps32
= (uint32_t)tps64
;
2210 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2211 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2219 *pmultiplier
= div_frac(scaled64
, tps32
);
2222 #ifdef CONFIG_X86_64
2223 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2226 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2227 static unsigned long max_tsc_khz
;
2229 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2231 u64 v
= (u64
)khz
* (1000000 + ppm
);
2236 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
);
2238 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2242 /* Guest TSC same frequency as host TSC? */
2244 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2248 /* TSC scaling supported? */
2249 if (!kvm_has_tsc_control
) {
2250 if (user_tsc_khz
> tsc_khz
) {
2251 vcpu
->arch
.tsc_catchup
= 1;
2252 vcpu
->arch
.tsc_always_catchup
= 1;
2255 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2260 /* TSC scaling required - calculate ratio */
2261 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2262 user_tsc_khz
, tsc_khz
);
2264 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2265 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2270 kvm_vcpu_write_tsc_multiplier(vcpu
, ratio
);
2274 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2276 u32 thresh_lo
, thresh_hi
;
2277 int use_scaling
= 0;
2279 /* tsc_khz can be zero if TSC calibration fails */
2280 if (user_tsc_khz
== 0) {
2281 /* set tsc_scaling_ratio to a safe value */
2282 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2286 /* Compute a scale to convert nanoseconds in TSC cycles */
2287 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2288 &vcpu
->arch
.virtual_tsc_shift
,
2289 &vcpu
->arch
.virtual_tsc_mult
);
2290 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2293 * Compute the variation in TSC rate which is acceptable
2294 * within the range of tolerance and decide if the
2295 * rate being applied is within that bounds of the hardware
2296 * rate. If so, no scaling or compensation need be done.
2298 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2299 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2300 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2301 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2304 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2307 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2309 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2310 vcpu
->arch
.virtual_tsc_mult
,
2311 vcpu
->arch
.virtual_tsc_shift
);
2312 tsc
+= vcpu
->arch
.this_tsc_write
;
2316 static inline int gtod_is_based_on_tsc(int mode
)
2318 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2321 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2323 #ifdef CONFIG_X86_64
2325 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2326 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2328 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2329 atomic_read(&vcpu
->kvm
->online_vcpus
));
2332 * Once the masterclock is enabled, always perform request in
2333 * order to update it.
2335 * In order to enable masterclock, the host clocksource must be TSC
2336 * and the vcpus need to have matched TSCs. When that happens,
2337 * perform request to enable masterclock.
2339 if (ka
->use_master_clock
||
2340 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2341 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2343 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2344 atomic_read(&vcpu
->kvm
->online_vcpus
),
2345 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2350 * Multiply tsc by a fixed point number represented by ratio.
2352 * The most significant 64-N bits (mult) of ratio represent the
2353 * integral part of the fixed point number; the remaining N bits
2354 * (frac) represent the fractional part, ie. ratio represents a fixed
2355 * point number (mult + frac * 2^(-N)).
2357 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2359 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2361 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2364 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
, u64 ratio
)
2368 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2369 _tsc
= __scale_tsc(ratio
, tsc
);
2373 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2375 static u64
kvm_compute_l1_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2379 tsc
= kvm_scale_tsc(vcpu
, rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
);
2381 return target_tsc
- tsc
;
2384 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2386 return vcpu
->arch
.l1_tsc_offset
+
2387 kvm_scale_tsc(vcpu
, host_tsc
, vcpu
->arch
.l1_tsc_scaling_ratio
);
2389 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2391 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
)
2395 if (l2_multiplier
== kvm_default_tsc_scaling_ratio
)
2396 nested_offset
= l1_offset
;
2398 nested_offset
= mul_s64_u64_shr((s64
) l1_offset
, l2_multiplier
,
2399 kvm_tsc_scaling_ratio_frac_bits
);
2401 nested_offset
+= l2_offset
;
2402 return nested_offset
;
2404 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset
);
2406 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
)
2408 if (l2_multiplier
!= kvm_default_tsc_scaling_ratio
)
2409 return mul_u64_u64_shr(l1_multiplier
, l2_multiplier
,
2410 kvm_tsc_scaling_ratio_frac_bits
);
2412 return l1_multiplier
;
2414 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier
);
2416 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 l1_offset
)
2418 trace_kvm_write_tsc_offset(vcpu
->vcpu_id
,
2419 vcpu
->arch
.l1_tsc_offset
,
2422 vcpu
->arch
.l1_tsc_offset
= l1_offset
;
2425 * If we are here because L1 chose not to trap WRMSR to TSC then
2426 * according to the spec this should set L1's TSC (as opposed to
2427 * setting L1's offset for L2).
2429 if (is_guest_mode(vcpu
))
2430 vcpu
->arch
.tsc_offset
= kvm_calc_nested_tsc_offset(
2432 static_call(kvm_x86_get_l2_tsc_offset
)(vcpu
),
2433 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2435 vcpu
->arch
.tsc_offset
= l1_offset
;
2437 static_call(kvm_x86_write_tsc_offset
)(vcpu
, vcpu
->arch
.tsc_offset
);
2440 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
)
2442 vcpu
->arch
.l1_tsc_scaling_ratio
= l1_multiplier
;
2444 /* Userspace is changing the multiplier while L2 is active */
2445 if (is_guest_mode(vcpu
))
2446 vcpu
->arch
.tsc_scaling_ratio
= kvm_calc_nested_tsc_multiplier(
2448 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2450 vcpu
->arch
.tsc_scaling_ratio
= l1_multiplier
;
2452 if (kvm_has_tsc_control
)
2453 static_call(kvm_x86_write_tsc_multiplier
)(
2454 vcpu
, vcpu
->arch
.tsc_scaling_ratio
);
2457 static inline bool kvm_check_tsc_unstable(void)
2459 #ifdef CONFIG_X86_64
2461 * TSC is marked unstable when we're running on Hyper-V,
2462 * 'TSC page' clocksource is good.
2464 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2467 return check_tsc_unstable();
2470 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2472 struct kvm
*kvm
= vcpu
->kvm
;
2473 u64 offset
, ns
, elapsed
;
2474 unsigned long flags
;
2476 bool already_matched
;
2477 bool synchronizing
= false;
2479 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2480 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2481 ns
= get_kvmclock_base_ns();
2482 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2484 if (vcpu
->arch
.virtual_tsc_khz
) {
2487 * detection of vcpu initialization -- need to sync
2488 * with other vCPUs. This particularly helps to keep
2489 * kvm_clock stable after CPU hotplug
2491 synchronizing
= true;
2493 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2494 nsec_to_cycles(vcpu
, elapsed
);
2495 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2497 * Special case: TSC write with a small delta (1 second)
2498 * of virtual cycle time against real time is
2499 * interpreted as an attempt to synchronize the CPU.
2501 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2502 data
+ tsc_hz
> tsc_exp
;
2507 * For a reliable TSC, we can match TSC offsets, and for an unstable
2508 * TSC, we add elapsed time in this computation. We could let the
2509 * compensation code attempt to catch up if we fall behind, but
2510 * it's better to try to match offsets from the beginning.
2512 if (synchronizing
&&
2513 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2514 if (!kvm_check_tsc_unstable()) {
2515 offset
= kvm
->arch
.cur_tsc_offset
;
2517 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2519 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2522 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2525 * We split periods of matched TSC writes into generations.
2526 * For each generation, we track the original measured
2527 * nanosecond time, offset, and write, so if TSCs are in
2528 * sync, we can match exact offset, and if not, we can match
2529 * exact software computation in compute_guest_tsc()
2531 * These values are tracked in kvm->arch.cur_xxx variables.
2533 kvm
->arch
.cur_tsc_generation
++;
2534 kvm
->arch
.cur_tsc_nsec
= ns
;
2535 kvm
->arch
.cur_tsc_write
= data
;
2536 kvm
->arch
.cur_tsc_offset
= offset
;
2541 * We also track th most recent recorded KHZ, write and time to
2542 * allow the matching interval to be extended at each write.
2544 kvm
->arch
.last_tsc_nsec
= ns
;
2545 kvm
->arch
.last_tsc_write
= data
;
2546 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2548 vcpu
->arch
.last_guest_tsc
= data
;
2550 /* Keep track of which generation this VCPU has synchronized to */
2551 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2552 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2553 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2555 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2556 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2558 raw_spin_lock_irqsave(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2560 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2561 } else if (!already_matched
) {
2562 kvm
->arch
.nr_vcpus_matched_tsc
++;
2565 kvm_track_tsc_matching(vcpu
);
2566 raw_spin_unlock_irqrestore(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2569 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2572 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2573 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2576 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2578 if (vcpu
->arch
.l1_tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2579 WARN_ON(adjustment
< 0);
2580 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
,
2581 vcpu
->arch
.l1_tsc_scaling_ratio
);
2582 adjust_tsc_offset_guest(vcpu
, adjustment
);
2585 #ifdef CONFIG_X86_64
2587 static u64
read_tsc(void)
2589 u64 ret
= (u64
)rdtsc_ordered();
2590 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2592 if (likely(ret
>= last
))
2596 * GCC likes to generate cmov here, but this branch is extremely
2597 * predictable (it's just a function of time and the likely is
2598 * very likely) and there's a data dependence, so force GCC
2599 * to generate a branch instead. I don't barrier() because
2600 * we don't actually need a barrier, and if this function
2601 * ever gets inlined it will generate worse code.
2607 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2613 switch (clock
->vclock_mode
) {
2614 case VDSO_CLOCKMODE_HVCLOCK
:
2615 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2617 if (tsc_pg_val
!= U64_MAX
) {
2618 /* TSC page valid */
2619 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2620 v
= (tsc_pg_val
- clock
->cycle_last
) &
2623 /* TSC page invalid */
2624 *mode
= VDSO_CLOCKMODE_NONE
;
2627 case VDSO_CLOCKMODE_TSC
:
2628 *mode
= VDSO_CLOCKMODE_TSC
;
2629 *tsc_timestamp
= read_tsc();
2630 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2634 *mode
= VDSO_CLOCKMODE_NONE
;
2637 if (*mode
== VDSO_CLOCKMODE_NONE
)
2638 *tsc_timestamp
= v
= 0;
2640 return v
* clock
->mult
;
2643 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2645 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2651 seq
= read_seqcount_begin(>od
->seq
);
2652 ns
= gtod
->raw_clock
.base_cycles
;
2653 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2654 ns
>>= gtod
->raw_clock
.shift
;
2655 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2656 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2662 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2664 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2670 seq
= read_seqcount_begin(>od
->seq
);
2671 ts
->tv_sec
= gtod
->wall_time_sec
;
2672 ns
= gtod
->clock
.base_cycles
;
2673 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2674 ns
>>= gtod
->clock
.shift
;
2675 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2677 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2683 /* returns true if host is using TSC based clocksource */
2684 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2686 /* checked again under seqlock below */
2687 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2690 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2694 /* returns true if host is using TSC based clocksource */
2695 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2698 /* checked again under seqlock below */
2699 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2702 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2708 * Assuming a stable TSC across physical CPUS, and a stable TSC
2709 * across virtual CPUs, the following condition is possible.
2710 * Each numbered line represents an event visible to both
2711 * CPUs at the next numbered event.
2713 * "timespecX" represents host monotonic time. "tscX" represents
2716 * VCPU0 on CPU0 | VCPU1 on CPU1
2718 * 1. read timespec0,tsc0
2719 * 2. | timespec1 = timespec0 + N
2721 * 3. transition to guest | transition to guest
2722 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2723 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2724 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2726 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2729 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2731 * - 0 < N - M => M < N
2733 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2734 * always the case (the difference between two distinct xtime instances
2735 * might be smaller then the difference between corresponding TSC reads,
2736 * when updating guest vcpus pvclock areas).
2738 * To avoid that problem, do not allow visibility of distinct
2739 * system_timestamp/tsc_timestamp values simultaneously: use a master
2740 * copy of host monotonic time values. Update that master copy
2743 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2747 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2749 #ifdef CONFIG_X86_64
2750 struct kvm_arch
*ka
= &kvm
->arch
;
2752 bool host_tsc_clocksource
, vcpus_matched
;
2754 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2755 atomic_read(&kvm
->online_vcpus
));
2758 * If the host uses TSC clock, then passthrough TSC as stable
2761 host_tsc_clocksource
= kvm_get_time_and_clockread(
2762 &ka
->master_kernel_ns
,
2763 &ka
->master_cycle_now
);
2765 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2766 && !ka
->backwards_tsc_observed
2767 && !ka
->boot_vcpu_runs_old_kvmclock
;
2769 if (ka
->use_master_clock
)
2770 atomic_set(&kvm_guest_has_master_clock
, 1);
2772 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2773 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2778 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2780 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2783 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2785 #ifdef CONFIG_X86_64
2787 struct kvm_vcpu
*vcpu
;
2788 struct kvm_arch
*ka
= &kvm
->arch
;
2789 unsigned long flags
;
2791 kvm_hv_invalidate_tsc_page(kvm
);
2793 kvm_make_mclock_inprogress_request(kvm
);
2795 /* no guest entries from this point */
2796 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2797 pvclock_update_vm_gtod_copy(kvm
);
2798 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2800 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2801 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2803 /* guest entries allowed */
2804 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2805 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2809 u64
get_kvmclock_ns(struct kvm
*kvm
)
2811 struct kvm_arch
*ka
= &kvm
->arch
;
2812 struct pvclock_vcpu_time_info hv_clock
;
2813 unsigned long flags
;
2816 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2817 if (!ka
->use_master_clock
) {
2818 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2819 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2822 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2823 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2824 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2826 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2829 if (__this_cpu_read(cpu_tsc_khz
)) {
2830 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2831 &hv_clock
.tsc_shift
,
2832 &hv_clock
.tsc_to_system_mul
);
2833 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2835 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2842 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
,
2843 struct gfn_to_hva_cache
*cache
,
2844 unsigned int offset
)
2846 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2847 struct pvclock_vcpu_time_info guest_hv_clock
;
2849 if (unlikely(kvm_read_guest_offset_cached(v
->kvm
, cache
,
2850 &guest_hv_clock
, offset
, sizeof(guest_hv_clock
))))
2853 /* This VCPU is paused, but it's legal for a guest to read another
2854 * VCPU's kvmclock, so we really have to follow the specification where
2855 * it says that version is odd if data is being modified, and even after
2858 * Version field updates must be kept separate. This is because
2859 * kvm_write_guest_cached might use a "rep movs" instruction, and
2860 * writes within a string instruction are weakly ordered. So there
2861 * are three writes overall.
2863 * As a small optimization, only write the version field in the first
2864 * and third write. The vcpu->pv_time cache is still valid, because the
2865 * version field is the first in the struct.
2867 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2869 if (guest_hv_clock
.version
& 1)
2870 ++guest_hv_clock
.version
; /* first time write, random junk */
2872 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2873 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2874 &vcpu
->hv_clock
, offset
,
2875 sizeof(vcpu
->hv_clock
.version
));
2879 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2880 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2882 if (vcpu
->pvclock_set_guest_stopped_request
) {
2883 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2884 vcpu
->pvclock_set_guest_stopped_request
= false;
2887 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2889 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2890 &vcpu
->hv_clock
, offset
,
2891 sizeof(vcpu
->hv_clock
));
2895 vcpu
->hv_clock
.version
++;
2896 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2897 &vcpu
->hv_clock
, offset
,
2898 sizeof(vcpu
->hv_clock
.version
));
2901 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2903 unsigned long flags
, tgt_tsc_khz
;
2904 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2905 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2907 u64 tsc_timestamp
, host_tsc
;
2909 bool use_master_clock
;
2915 * If the host uses TSC clock, then passthrough TSC as stable
2918 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2919 use_master_clock
= ka
->use_master_clock
;
2920 if (use_master_clock
) {
2921 host_tsc
= ka
->master_cycle_now
;
2922 kernel_ns
= ka
->master_kernel_ns
;
2924 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2926 /* Keep irq disabled to prevent changes to the clock */
2927 local_irq_save(flags
);
2928 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2929 if (unlikely(tgt_tsc_khz
== 0)) {
2930 local_irq_restore(flags
);
2931 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2934 if (!use_master_clock
) {
2936 kernel_ns
= get_kvmclock_base_ns();
2939 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2942 * We may have to catch up the TSC to match elapsed wall clock
2943 * time for two reasons, even if kvmclock is used.
2944 * 1) CPU could have been running below the maximum TSC rate
2945 * 2) Broken TSC compensation resets the base at each VCPU
2946 * entry to avoid unknown leaps of TSC even when running
2947 * again on the same CPU. This may cause apparent elapsed
2948 * time to disappear, and the guest to stand still or run
2951 if (vcpu
->tsc_catchup
) {
2952 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2953 if (tsc
> tsc_timestamp
) {
2954 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2955 tsc_timestamp
= tsc
;
2959 local_irq_restore(flags
);
2961 /* With all the info we got, fill in the values */
2963 if (kvm_has_tsc_control
)
2964 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
,
2965 v
->arch
.l1_tsc_scaling_ratio
);
2967 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2968 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2969 &vcpu
->hv_clock
.tsc_shift
,
2970 &vcpu
->hv_clock
.tsc_to_system_mul
);
2971 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2974 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2975 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2976 vcpu
->last_guest_tsc
= tsc_timestamp
;
2978 /* If the host uses TSC clocksource, then it is stable */
2980 if (use_master_clock
)
2981 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2983 vcpu
->hv_clock
.flags
= pvclock_flags
;
2985 if (vcpu
->pv_time_enabled
)
2986 kvm_setup_pvclock_page(v
, &vcpu
->pv_time
, 0);
2987 if (vcpu
->xen
.vcpu_info_set
)
2988 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_info_cache
,
2989 offsetof(struct compat_vcpu_info
, time
));
2990 if (vcpu
->xen
.vcpu_time_info_set
)
2991 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0);
2993 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2998 * kvmclock updates which are isolated to a given vcpu, such as
2999 * vcpu->cpu migration, should not allow system_timestamp from
3000 * the rest of the vcpus to remain static. Otherwise ntp frequency
3001 * correction applies to one vcpu's system_timestamp but not
3004 * So in those cases, request a kvmclock update for all vcpus.
3005 * We need to rate-limit these requests though, as they can
3006 * considerably slow guests that have a large number of vcpus.
3007 * The time for a remote vcpu to update its kvmclock is bound
3008 * by the delay we use to rate-limit the updates.
3011 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3013 static void kvmclock_update_fn(struct work_struct
*work
)
3016 struct delayed_work
*dwork
= to_delayed_work(work
);
3017 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3018 kvmclock_update_work
);
3019 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3020 struct kvm_vcpu
*vcpu
;
3022 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3023 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3024 kvm_vcpu_kick(vcpu
);
3028 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
3030 struct kvm
*kvm
= v
->kvm
;
3032 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3033 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
3034 KVMCLOCK_UPDATE_DELAY
);
3037 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3039 static void kvmclock_sync_fn(struct work_struct
*work
)
3041 struct delayed_work
*dwork
= to_delayed_work(work
);
3042 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3043 kvmclock_sync_work
);
3044 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3046 if (!kvmclock_periodic_sync
)
3049 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
3050 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
3051 KVMCLOCK_SYNC_PERIOD
);
3055 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3057 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
3059 /* McStatusWrEn enabled? */
3060 if (guest_cpuid_is_amd_or_hygon(vcpu
))
3061 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
3066 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3068 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3069 unsigned bank_num
= mcg_cap
& 0xff;
3070 u32 msr
= msr_info
->index
;
3071 u64 data
= msr_info
->data
;
3074 case MSR_IA32_MCG_STATUS
:
3075 vcpu
->arch
.mcg_status
= data
;
3077 case MSR_IA32_MCG_CTL
:
3078 if (!(mcg_cap
& MCG_CTL_P
) &&
3079 (data
|| !msr_info
->host_initiated
))
3081 if (data
!= 0 && data
!= ~(u64
)0)
3083 vcpu
->arch
.mcg_ctl
= data
;
3086 if (msr
>= MSR_IA32_MC0_CTL
&&
3087 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3088 u32 offset
= array_index_nospec(
3089 msr
- MSR_IA32_MC0_CTL
,
3090 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3092 /* only 0 or all 1s can be written to IA32_MCi_CTL
3093 * some Linux kernels though clear bit 10 in bank 4 to
3094 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3095 * this to avoid an uncatched #GP in the guest
3097 if ((offset
& 0x3) == 0 &&
3098 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
3102 if (!msr_info
->host_initiated
&&
3103 (offset
& 0x3) == 1 && data
!= 0) {
3104 if (!can_set_mci_status(vcpu
))
3108 vcpu
->arch
.mce_banks
[offset
] = data
;
3116 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3118 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3120 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3123 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3125 gpa_t gpa
= data
& ~0x3f;
3127 /* Bits 4:5 are reserved, Should be zero */
3131 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3132 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3135 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3136 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3139 if (!lapic_in_kernel(vcpu
))
3140 return data
? 1 : 0;
3142 vcpu
->arch
.apf
.msr_en_val
= data
;
3144 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3145 kvm_clear_async_pf_completion_queue(vcpu
);
3146 kvm_async_pf_hash_reset(vcpu
);
3150 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3154 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3155 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3157 kvm_async_pf_wakeup_all(vcpu
);
3162 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3164 /* Bits 8-63 are reserved */
3168 if (!lapic_in_kernel(vcpu
))
3171 vcpu
->arch
.apf
.msr_int_val
= data
;
3173 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3178 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3180 vcpu
->arch
.pv_time_enabled
= false;
3181 vcpu
->arch
.time
= 0;
3184 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3186 ++vcpu
->stat
.tlb_flush
;
3187 static_call(kvm_x86_tlb_flush_all
)(vcpu
);
3190 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3192 ++vcpu
->stat
.tlb_flush
;
3196 * A TLB flush on behalf of the guest is equivalent to
3197 * INVPCID(all), toggling CR4.PGE, etc., which requires
3198 * a forced sync of the shadow page tables. Unload the
3199 * entire MMU here and the subsequent load will sync the
3200 * shadow page tables, and also flush the TLB.
3202 kvm_mmu_unload(vcpu
);
3206 static_call(kvm_x86_tlb_flush_guest
)(vcpu
);
3210 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu
*vcpu
)
3212 ++vcpu
->stat
.tlb_flush
;
3213 static_call(kvm_x86_tlb_flush_current
)(vcpu
);
3217 * Service "local" TLB flush requests, which are specific to the current MMU
3218 * context. In addition to the generic event handling in vcpu_enter_guest(),
3219 * TLB flushes that are targeted at an MMU context also need to be serviced
3220 * prior before nested VM-Enter/VM-Exit.
3222 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu
*vcpu
)
3224 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
3225 kvm_vcpu_flush_tlb_current(vcpu
);
3227 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
3228 kvm_vcpu_flush_tlb_guest(vcpu
);
3230 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests
);
3232 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3234 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3235 struct kvm_steal_time __user
*st
;
3236 struct kvm_memslots
*slots
;
3240 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3241 kvm_xen_runstate_set_running(vcpu
);
3245 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3248 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3251 slots
= kvm_memslots(vcpu
->kvm
);
3253 if (unlikely(slots
->generation
!= ghc
->generation
||
3254 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3255 gfn_t gfn
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3257 /* We rely on the fact that it fits in a single page. */
3258 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3260 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gfn
, sizeof(*st
)) ||
3261 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3265 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3267 * Doing a TLB flush here, on the guest's behalf, can avoid
3270 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3271 u8 st_preempted
= 0;
3274 if (!user_access_begin(st
, sizeof(*st
)))
3277 asm volatile("1: xchgb %0, %2\n"
3280 _ASM_EXTABLE_UA(1b
, 2b
)
3281 : "+q" (st_preempted
),
3283 "+m" (st
->preempted
));
3289 vcpu
->arch
.st
.preempted
= 0;
3291 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3292 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3293 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3294 kvm_vcpu_flush_tlb_guest(vcpu
);
3296 if (!user_access_begin(st
, sizeof(*st
)))
3299 if (!user_access_begin(st
, sizeof(*st
)))
3302 unsafe_put_user(0, &st
->preempted
, out
);
3303 vcpu
->arch
.st
.preempted
= 0;
3306 unsafe_get_user(version
, &st
->version
, out
);
3308 version
+= 1; /* first time write, random junk */
3311 unsafe_put_user(version
, &st
->version
, out
);
3315 unsafe_get_user(steal
, &st
->steal
, out
);
3316 steal
+= current
->sched_info
.run_delay
-
3317 vcpu
->arch
.st
.last_steal
;
3318 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3319 unsafe_put_user(steal
, &st
->steal
, out
);
3322 unsafe_put_user(version
, &st
->version
, out
);
3327 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3330 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3333 u32 msr
= msr_info
->index
;
3334 u64 data
= msr_info
->data
;
3336 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3337 return kvm_xen_write_hypercall_page(vcpu
, data
);
3340 case MSR_AMD64_NB_CFG
:
3341 case MSR_IA32_UCODE_WRITE
:
3342 case MSR_VM_HSAVE_PA
:
3343 case MSR_AMD64_PATCH_LOADER
:
3344 case MSR_AMD64_BU_CFG2
:
3345 case MSR_AMD64_DC_CFG
:
3346 case MSR_F15H_EX_CFG
:
3349 case MSR_IA32_UCODE_REV
:
3350 if (msr_info
->host_initiated
)
3351 vcpu
->arch
.microcode_version
= data
;
3353 case MSR_IA32_ARCH_CAPABILITIES
:
3354 if (!msr_info
->host_initiated
)
3356 vcpu
->arch
.arch_capabilities
= data
;
3358 case MSR_IA32_PERF_CAPABILITIES
: {
3359 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3361 if (!msr_info
->host_initiated
)
3363 if (kvm_get_msr_feature(&msr_ent
))
3365 if (data
& ~msr_ent
.data
)
3368 vcpu
->arch
.perf_capabilities
= data
;
3373 return set_efer(vcpu
, msr_info
);
3375 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3376 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3377 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3379 /* Handle McStatusWrEn */
3380 if (data
== BIT_ULL(18)) {
3381 vcpu
->arch
.msr_hwcr
= data
;
3382 } else if (data
!= 0) {
3383 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3388 case MSR_FAM10H_MMIO_CONF_BASE
:
3390 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3395 case 0x200 ... 0x2ff:
3396 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3397 case MSR_IA32_APICBASE
:
3398 return kvm_set_apic_base(vcpu
, msr_info
);
3399 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3400 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3401 case MSR_IA32_TSC_DEADLINE
:
3402 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3404 case MSR_IA32_TSC_ADJUST
:
3405 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3406 if (!msr_info
->host_initiated
) {
3407 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3408 adjust_tsc_offset_guest(vcpu
, adj
);
3409 /* Before back to guest, tsc_timestamp must be adjusted
3410 * as well, otherwise guest's percpu pvclock time could jump.
3412 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3414 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3417 case MSR_IA32_MISC_ENABLE
:
3418 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3419 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3420 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3422 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3423 kvm_update_cpuid_runtime(vcpu
);
3425 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3428 case MSR_IA32_SMBASE
:
3429 if (!msr_info
->host_initiated
)
3431 vcpu
->arch
.smbase
= data
;
3433 case MSR_IA32_POWER_CTL
:
3434 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3437 if (msr_info
->host_initiated
) {
3438 kvm_synchronize_tsc(vcpu
, data
);
3440 u64 adj
= kvm_compute_l1_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3441 adjust_tsc_offset_guest(vcpu
, adj
);
3442 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3446 if (!msr_info
->host_initiated
&&
3447 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3450 * KVM supports exposing PT to the guest, but does not support
3451 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3452 * XSAVES/XRSTORS to save/restore PT MSRs.
3454 if (data
& ~supported_xss
)
3456 vcpu
->arch
.ia32_xss
= data
;
3457 kvm_update_cpuid_runtime(vcpu
);
3460 if (!msr_info
->host_initiated
)
3462 vcpu
->arch
.smi_count
= data
;
3464 case MSR_KVM_WALL_CLOCK_NEW
:
3465 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3468 vcpu
->kvm
->arch
.wall_clock
= data
;
3469 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3471 case MSR_KVM_WALL_CLOCK
:
3472 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3475 vcpu
->kvm
->arch
.wall_clock
= data
;
3476 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3478 case MSR_KVM_SYSTEM_TIME_NEW
:
3479 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3482 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3484 case MSR_KVM_SYSTEM_TIME
:
3485 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3488 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3490 case MSR_KVM_ASYNC_PF_EN
:
3491 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3494 if (kvm_pv_enable_async_pf(vcpu
, data
))
3497 case MSR_KVM_ASYNC_PF_INT
:
3498 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3501 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3504 case MSR_KVM_ASYNC_PF_ACK
:
3505 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3508 vcpu
->arch
.apf
.pageready_pending
= false;
3509 kvm_check_async_pf_completion(vcpu
);
3512 case MSR_KVM_STEAL_TIME
:
3513 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3516 if (unlikely(!sched_info_on()))
3519 if (data
& KVM_STEAL_RESERVED_MASK
)
3522 vcpu
->arch
.st
.msr_val
= data
;
3524 if (!(data
& KVM_MSR_ENABLED
))
3527 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3530 case MSR_KVM_PV_EOI_EN
:
3531 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3534 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
3538 case MSR_KVM_POLL_CONTROL
:
3539 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3542 /* only enable bit supported */
3543 if (data
& (-1ULL << 1))
3546 vcpu
->arch
.msr_kvm_poll_control
= data
;
3549 case MSR_IA32_MCG_CTL
:
3550 case MSR_IA32_MCG_STATUS
:
3551 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3552 return set_msr_mce(vcpu
, msr_info
);
3554 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3555 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3558 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3559 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3560 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3561 return kvm_pmu_set_msr(vcpu
, msr_info
);
3563 if (pr
|| data
!= 0)
3564 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3565 "0x%x data 0x%llx\n", msr
, data
);
3567 case MSR_K7_CLK_CTL
:
3569 * Ignore all writes to this no longer documented MSR.
3570 * Writes are only relevant for old K7 processors,
3571 * all pre-dating SVM, but a recommended workaround from
3572 * AMD for these chips. It is possible to specify the
3573 * affected processor models on the command line, hence
3574 * the need to ignore the workaround.
3577 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3578 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3579 case HV_X64_MSR_SYNDBG_OPTIONS
:
3580 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3581 case HV_X64_MSR_CRASH_CTL
:
3582 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3583 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3584 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3585 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3586 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3587 msr_info
->host_initiated
);
3588 case MSR_IA32_BBL_CR_CTL3
:
3589 /* Drop writes to this legacy MSR -- see rdmsr
3590 * counterpart for further detail.
3592 if (report_ignored_msrs
)
3593 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3596 case MSR_AMD64_OSVW_ID_LENGTH
:
3597 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3599 vcpu
->arch
.osvw
.length
= data
;
3601 case MSR_AMD64_OSVW_STATUS
:
3602 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3604 vcpu
->arch
.osvw
.status
= data
;
3606 case MSR_PLATFORM_INFO
:
3607 if (!msr_info
->host_initiated
||
3608 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3609 cpuid_fault_enabled(vcpu
)))
3611 vcpu
->arch
.msr_platform_info
= data
;
3613 case MSR_MISC_FEATURES_ENABLES
:
3614 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3615 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3616 !supports_cpuid_fault(vcpu
)))
3618 vcpu
->arch
.msr_misc_features_enables
= data
;
3621 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3622 return kvm_pmu_set_msr(vcpu
, msr_info
);
3623 return KVM_MSR_RET_INVALID
;
3627 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3629 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3632 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3633 unsigned bank_num
= mcg_cap
& 0xff;
3636 case MSR_IA32_P5_MC_ADDR
:
3637 case MSR_IA32_P5_MC_TYPE
:
3640 case MSR_IA32_MCG_CAP
:
3641 data
= vcpu
->arch
.mcg_cap
;
3643 case MSR_IA32_MCG_CTL
:
3644 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3646 data
= vcpu
->arch
.mcg_ctl
;
3648 case MSR_IA32_MCG_STATUS
:
3649 data
= vcpu
->arch
.mcg_status
;
3652 if (msr
>= MSR_IA32_MC0_CTL
&&
3653 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3654 u32 offset
= array_index_nospec(
3655 msr
- MSR_IA32_MC0_CTL
,
3656 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3658 data
= vcpu
->arch
.mce_banks
[offset
];
3667 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3669 switch (msr_info
->index
) {
3670 case MSR_IA32_PLATFORM_ID
:
3671 case MSR_IA32_EBL_CR_POWERON
:
3672 case MSR_IA32_LASTBRANCHFROMIP
:
3673 case MSR_IA32_LASTBRANCHTOIP
:
3674 case MSR_IA32_LASTINTFROMIP
:
3675 case MSR_IA32_LASTINTTOIP
:
3676 case MSR_AMD64_SYSCFG
:
3677 case MSR_K8_TSEG_ADDR
:
3678 case MSR_K8_TSEG_MASK
:
3679 case MSR_VM_HSAVE_PA
:
3680 case MSR_K8_INT_PENDING_MSG
:
3681 case MSR_AMD64_NB_CFG
:
3682 case MSR_FAM10H_MMIO_CONF_BASE
:
3683 case MSR_AMD64_BU_CFG2
:
3684 case MSR_IA32_PERF_CTL
:
3685 case MSR_AMD64_DC_CFG
:
3686 case MSR_F15H_EX_CFG
:
3688 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3689 * limit) MSRs. Just return 0, as we do not want to expose the host
3690 * data here. Do not conditionalize this on CPUID, as KVM does not do
3691 * so for existing CPU-specific MSRs.
3693 case MSR_RAPL_POWER_UNIT
:
3694 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3695 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3696 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3697 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3700 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3701 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3702 return kvm_pmu_get_msr(vcpu
, msr_info
);
3703 if (!msr_info
->host_initiated
)
3707 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3708 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3709 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3710 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3711 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3712 return kvm_pmu_get_msr(vcpu
, msr_info
);
3715 case MSR_IA32_UCODE_REV
:
3716 msr_info
->data
= vcpu
->arch
.microcode_version
;
3718 case MSR_IA32_ARCH_CAPABILITIES
:
3719 if (!msr_info
->host_initiated
&&
3720 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3722 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3724 case MSR_IA32_PERF_CAPABILITIES
:
3725 if (!msr_info
->host_initiated
&&
3726 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3728 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3730 case MSR_IA32_POWER_CTL
:
3731 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3733 case MSR_IA32_TSC
: {
3735 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3736 * even when not intercepted. AMD manual doesn't explicitly
3737 * state this but appears to behave the same.
3739 * On userspace reads and writes, however, we unconditionally
3740 * return L1's TSC value to ensure backwards-compatible
3741 * behavior for migration.
3745 if (msr_info
->host_initiated
) {
3746 offset
= vcpu
->arch
.l1_tsc_offset
;
3747 ratio
= vcpu
->arch
.l1_tsc_scaling_ratio
;
3749 offset
= vcpu
->arch
.tsc_offset
;
3750 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
3753 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc(), ratio
) + offset
;
3757 case 0x200 ... 0x2ff:
3758 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3759 case 0xcd: /* fsb frequency */
3763 * MSR_EBC_FREQUENCY_ID
3764 * Conservative value valid for even the basic CPU models.
3765 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3766 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3767 * and 266MHz for model 3, or 4. Set Core Clock
3768 * Frequency to System Bus Frequency Ratio to 1 (bits
3769 * 31:24) even though these are only valid for CPU
3770 * models > 2, however guests may end up dividing or
3771 * multiplying by zero otherwise.
3773 case MSR_EBC_FREQUENCY_ID
:
3774 msr_info
->data
= 1 << 24;
3776 case MSR_IA32_APICBASE
:
3777 msr_info
->data
= kvm_get_apic_base(vcpu
);
3779 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3780 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3781 case MSR_IA32_TSC_DEADLINE
:
3782 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3784 case MSR_IA32_TSC_ADJUST
:
3785 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3787 case MSR_IA32_MISC_ENABLE
:
3788 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3790 case MSR_IA32_SMBASE
:
3791 if (!msr_info
->host_initiated
)
3793 msr_info
->data
= vcpu
->arch
.smbase
;
3796 msr_info
->data
= vcpu
->arch
.smi_count
;
3798 case MSR_IA32_PERF_STATUS
:
3799 /* TSC increment by tick */
3800 msr_info
->data
= 1000ULL;
3801 /* CPU multiplier */
3802 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3805 msr_info
->data
= vcpu
->arch
.efer
;
3807 case MSR_KVM_WALL_CLOCK
:
3808 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3811 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3813 case MSR_KVM_WALL_CLOCK_NEW
:
3814 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3817 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3819 case MSR_KVM_SYSTEM_TIME
:
3820 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3823 msr_info
->data
= vcpu
->arch
.time
;
3825 case MSR_KVM_SYSTEM_TIME_NEW
:
3826 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3829 msr_info
->data
= vcpu
->arch
.time
;
3831 case MSR_KVM_ASYNC_PF_EN
:
3832 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3835 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
3837 case MSR_KVM_ASYNC_PF_INT
:
3838 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3841 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
3843 case MSR_KVM_ASYNC_PF_ACK
:
3844 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3849 case MSR_KVM_STEAL_TIME
:
3850 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3853 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3855 case MSR_KVM_PV_EOI_EN
:
3856 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3859 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3861 case MSR_KVM_POLL_CONTROL
:
3862 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3865 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3867 case MSR_IA32_P5_MC_ADDR
:
3868 case MSR_IA32_P5_MC_TYPE
:
3869 case MSR_IA32_MCG_CAP
:
3870 case MSR_IA32_MCG_CTL
:
3871 case MSR_IA32_MCG_STATUS
:
3872 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3873 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3874 msr_info
->host_initiated
);
3876 if (!msr_info
->host_initiated
&&
3877 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3879 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3881 case MSR_K7_CLK_CTL
:
3883 * Provide expected ramp-up count for K7. All other
3884 * are set to zero, indicating minimum divisors for
3887 * This prevents guest kernels on AMD host with CPU
3888 * type 6, model 8 and higher from exploding due to
3889 * the rdmsr failing.
3891 msr_info
->data
= 0x20000000;
3893 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3894 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3895 case HV_X64_MSR_SYNDBG_OPTIONS
:
3896 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3897 case HV_X64_MSR_CRASH_CTL
:
3898 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3899 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3900 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3901 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3902 return kvm_hv_get_msr_common(vcpu
,
3903 msr_info
->index
, &msr_info
->data
,
3904 msr_info
->host_initiated
);
3905 case MSR_IA32_BBL_CR_CTL3
:
3906 /* This legacy MSR exists but isn't fully documented in current
3907 * silicon. It is however accessed by winxp in very narrow
3908 * scenarios where it sets bit #19, itself documented as
3909 * a "reserved" bit. Best effort attempt to source coherent
3910 * read data here should the balance of the register be
3911 * interpreted by the guest:
3913 * L2 cache control register 3: 64GB range, 256KB size,
3914 * enabled, latency 0x1, configured
3916 msr_info
->data
= 0xbe702111;
3918 case MSR_AMD64_OSVW_ID_LENGTH
:
3919 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3921 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3923 case MSR_AMD64_OSVW_STATUS
:
3924 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3926 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3928 case MSR_PLATFORM_INFO
:
3929 if (!msr_info
->host_initiated
&&
3930 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3932 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3934 case MSR_MISC_FEATURES_ENABLES
:
3935 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3938 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3941 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3942 return kvm_pmu_get_msr(vcpu
, msr_info
);
3943 return KVM_MSR_RET_INVALID
;
3947 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3950 * Read or write a bunch of msrs. All parameters are kernel addresses.
3952 * @return number of msrs set successfully.
3954 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3955 struct kvm_msr_entry
*entries
,
3956 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3957 unsigned index
, u64
*data
))
3961 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3962 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3969 * Read or write a bunch of msrs. Parameters are user addresses.
3971 * @return number of msrs set successfully.
3973 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3974 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3975 unsigned index
, u64
*data
),
3978 struct kvm_msrs msrs
;
3979 struct kvm_msr_entry
*entries
;
3984 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3988 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3991 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3992 entries
= memdup_user(user_msrs
->entries
, size
);
3993 if (IS_ERR(entries
)) {
3994 r
= PTR_ERR(entries
);
3998 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
4003 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
4014 static inline bool kvm_can_mwait_in_guest(void)
4016 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
4017 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
4018 boot_cpu_has(X86_FEATURE_ARAT
);
4021 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
4022 struct kvm_cpuid2 __user
*cpuid_arg
)
4024 struct kvm_cpuid2 cpuid
;
4028 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4031 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4036 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4042 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
4047 case KVM_CAP_IRQCHIP
:
4049 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
4050 case KVM_CAP_SET_TSS_ADDR
:
4051 case KVM_CAP_EXT_CPUID
:
4052 case KVM_CAP_EXT_EMUL_CPUID
:
4053 case KVM_CAP_CLOCKSOURCE
:
4055 case KVM_CAP_NOP_IO_DELAY
:
4056 case KVM_CAP_MP_STATE
:
4057 case KVM_CAP_SYNC_MMU
:
4058 case KVM_CAP_USER_NMI
:
4059 case KVM_CAP_REINJECT_CONTROL
:
4060 case KVM_CAP_IRQ_INJECT_STATUS
:
4061 case KVM_CAP_IOEVENTFD
:
4062 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
4064 case KVM_CAP_PIT_STATE2
:
4065 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
4066 case KVM_CAP_VCPU_EVENTS
:
4067 case KVM_CAP_HYPERV
:
4068 case KVM_CAP_HYPERV_VAPIC
:
4069 case KVM_CAP_HYPERV_SPIN
:
4070 case KVM_CAP_HYPERV_SYNIC
:
4071 case KVM_CAP_HYPERV_SYNIC2
:
4072 case KVM_CAP_HYPERV_VP_INDEX
:
4073 case KVM_CAP_HYPERV_EVENTFD
:
4074 case KVM_CAP_HYPERV_TLBFLUSH
:
4075 case KVM_CAP_HYPERV_SEND_IPI
:
4076 case KVM_CAP_HYPERV_CPUID
:
4077 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4078 case KVM_CAP_SYS_HYPERV_CPUID
:
4079 case KVM_CAP_PCI_SEGMENT
:
4080 case KVM_CAP_DEBUGREGS
:
4081 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
4083 case KVM_CAP_ASYNC_PF
:
4084 case KVM_CAP_ASYNC_PF_INT
:
4085 case KVM_CAP_GET_TSC_KHZ
:
4086 case KVM_CAP_KVMCLOCK_CTRL
:
4087 case KVM_CAP_READONLY_MEM
:
4088 case KVM_CAP_HYPERV_TIME
:
4089 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
4090 case KVM_CAP_TSC_DEADLINE_TIMER
:
4091 case KVM_CAP_DISABLE_QUIRKS
:
4092 case KVM_CAP_SET_BOOT_CPU_ID
:
4093 case KVM_CAP_SPLIT_IRQCHIP
:
4094 case KVM_CAP_IMMEDIATE_EXIT
:
4095 case KVM_CAP_PMU_EVENT_FILTER
:
4096 case KVM_CAP_GET_MSR_FEATURES
:
4097 case KVM_CAP_MSR_PLATFORM_INFO
:
4098 case KVM_CAP_EXCEPTION_PAYLOAD
:
4099 case KVM_CAP_SET_GUEST_DEBUG
:
4100 case KVM_CAP_LAST_CPU
:
4101 case KVM_CAP_X86_USER_SPACE_MSR
:
4102 case KVM_CAP_X86_MSR_FILTER
:
4103 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4104 #ifdef CONFIG_X86_SGX_KVM
4105 case KVM_CAP_SGX_ATTRIBUTE
:
4107 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
4108 case KVM_CAP_SREGS2
:
4109 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
4112 case KVM_CAP_EXIT_HYPERCALL
:
4113 r
= KVM_EXIT_HYPERCALL_VALID_MASK
;
4115 case KVM_CAP_SET_GUEST_DEBUG2
:
4116 return KVM_GUESTDBG_VALID_MASK
;
4117 #ifdef CONFIG_KVM_XEN
4118 case KVM_CAP_XEN_HVM
:
4119 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
4120 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
4121 KVM_XEN_HVM_CONFIG_SHARED_INFO
;
4122 if (sched_info_on())
4123 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
;
4126 case KVM_CAP_SYNC_REGS
:
4127 r
= KVM_SYNC_X86_VALID_FIELDS
;
4129 case KVM_CAP_ADJUST_CLOCK
:
4130 r
= KVM_CLOCK_TSC_STABLE
;
4132 case KVM_CAP_X86_DISABLE_EXITS
:
4133 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
4134 KVM_X86_DISABLE_EXITS_CSTATE
;
4135 if(kvm_can_mwait_in_guest())
4136 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4138 case KVM_CAP_X86_SMM
:
4139 /* SMBASE is usually relocated above 1M on modern chipsets,
4140 * and SMM handlers might indeed rely on 4G segment limits,
4141 * so do not report SMM to be available if real mode is
4142 * emulated via vm86 mode. Still, do not go to great lengths
4143 * to avoid userspace's usage of the feature, because it is a
4144 * fringe case that is not enabled except via specific settings
4145 * of the module parameters.
4147 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4150 r
= !static_call(kvm_x86_cpu_has_accelerated_tpr
)();
4152 case KVM_CAP_NR_VCPUS
:
4153 r
= KVM_SOFT_MAX_VCPUS
;
4155 case KVM_CAP_MAX_VCPUS
:
4158 case KVM_CAP_MAX_VCPU_ID
:
4159 r
= KVM_MAX_VCPU_ID
;
4161 case KVM_CAP_PV_MMU
: /* obsolete */
4165 r
= KVM_MAX_MCE_BANKS
;
4168 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4170 case KVM_CAP_TSC_CONTROL
:
4171 r
= kvm_has_tsc_control
;
4173 case KVM_CAP_X2APIC_API
:
4174 r
= KVM_X2APIC_API_VALID_FLAGS
;
4176 case KVM_CAP_NESTED_STATE
:
4177 r
= kvm_x86_ops
.nested_ops
->get_state
?
4178 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4180 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4181 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
4183 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4184 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4186 case KVM_CAP_SMALLER_MAXPHYADDR
:
4187 r
= (int) allow_smaller_maxphyaddr
;
4189 case KVM_CAP_STEAL_TIME
:
4190 r
= sched_info_on();
4192 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4193 if (kvm_has_bus_lock_exit
)
4194 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4195 KVM_BUS_LOCK_DETECTION_EXIT
;
4206 long kvm_arch_dev_ioctl(struct file
*filp
,
4207 unsigned int ioctl
, unsigned long arg
)
4209 void __user
*argp
= (void __user
*)arg
;
4213 case KVM_GET_MSR_INDEX_LIST
: {
4214 struct kvm_msr_list __user
*user_msr_list
= argp
;
4215 struct kvm_msr_list msr_list
;
4219 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4222 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4223 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4226 if (n
< msr_list
.nmsrs
)
4229 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4230 num_msrs_to_save
* sizeof(u32
)))
4232 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4234 num_emulated_msrs
* sizeof(u32
)))
4239 case KVM_GET_SUPPORTED_CPUID
:
4240 case KVM_GET_EMULATED_CPUID
: {
4241 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4242 struct kvm_cpuid2 cpuid
;
4245 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4248 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4254 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4259 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4261 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
4262 sizeof(kvm_mce_cap_supported
)))
4266 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4267 struct kvm_msr_list __user
*user_msr_list
= argp
;
4268 struct kvm_msr_list msr_list
;
4272 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4275 msr_list
.nmsrs
= num_msr_based_features
;
4276 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4279 if (n
< msr_list
.nmsrs
)
4282 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4283 num_msr_based_features
* sizeof(u32
)))
4289 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4291 case KVM_GET_SUPPORTED_HV_CPUID
:
4292 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4302 static void wbinvd_ipi(void *garbage
)
4307 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4309 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4312 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4314 /* Address WBINVD may be executed by guest */
4315 if (need_emulate_wbinvd(vcpu
)) {
4316 if (static_call(kvm_x86_has_wbinvd_exit
)())
4317 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4318 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4319 smp_call_function_single(vcpu
->cpu
,
4320 wbinvd_ipi
, NULL
, 1);
4323 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4325 /* Save host pkru register if supported */
4326 vcpu
->arch
.host_pkru
= read_pkru();
4328 /* Apply any externally detected TSC adjustments (due to suspend) */
4329 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4330 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4331 vcpu
->arch
.tsc_offset_adjustment
= 0;
4332 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4335 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4336 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4337 rdtsc() - vcpu
->arch
.last_host_tsc
;
4339 mark_tsc_unstable("KVM discovered backwards TSC");
4341 if (kvm_check_tsc_unstable()) {
4342 u64 offset
= kvm_compute_l1_tsc_offset(vcpu
,
4343 vcpu
->arch
.last_guest_tsc
);
4344 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4345 vcpu
->arch
.tsc_catchup
= 1;
4348 if (kvm_lapic_hv_timer_in_use(vcpu
))
4349 kvm_lapic_restart_hv_timer(vcpu
);
4352 * On a host with synchronized TSC, there is no need to update
4353 * kvmclock on vcpu->cpu migration
4355 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4356 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4357 if (vcpu
->cpu
!= cpu
)
4358 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4362 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4365 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4367 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
4368 struct kvm_steal_time __user
*st
;
4369 struct kvm_memslots
*slots
;
4370 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
4372 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4375 if (vcpu
->arch
.st
.preempted
)
4378 /* This happens on process exit */
4379 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
4382 slots
= kvm_memslots(vcpu
->kvm
);
4384 if (unlikely(slots
->generation
!= ghc
->generation
||
4385 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
4388 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
4389 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
4391 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
4392 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4394 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
4397 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4401 if (vcpu
->preempted
&& !vcpu
->arch
.guest_state_protected
)
4402 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
4405 * Take the srcu lock as memslots will be accessed to check the gfn
4406 * cache generation against the memslots generation.
4408 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4409 if (kvm_xen_msr_enabled(vcpu
->kvm
))
4410 kvm_xen_runstate_set_preempted(vcpu
);
4412 kvm_steal_time_set_preempted(vcpu
);
4413 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4415 static_call(kvm_x86_vcpu_put
)(vcpu
);
4416 vcpu
->arch
.last_host_tsc
= rdtsc();
4419 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4420 struct kvm_lapic_state
*s
)
4422 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
4424 return kvm_apic_get_state(vcpu
, s
);
4427 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4428 struct kvm_lapic_state
*s
)
4432 r
= kvm_apic_set_state(vcpu
, s
);
4435 update_cr8_intercept(vcpu
);
4440 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4443 * We can accept userspace's request for interrupt injection
4444 * as long as we have a place to store the interrupt number.
4445 * The actual injection will happen when the CPU is able to
4446 * deliver the interrupt.
4448 if (kvm_cpu_has_extint(vcpu
))
4451 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4452 return (!lapic_in_kernel(vcpu
) ||
4453 kvm_apic_accept_pic_intr(vcpu
));
4456 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4459 * Do not cause an interrupt window exit if an exception
4460 * is pending or an event needs reinjection; userspace
4461 * might want to inject the interrupt manually using KVM_SET_REGS
4462 * or KVM_SET_SREGS. For that to work, we must be at an
4463 * instruction boundary and with no events half-injected.
4465 return (kvm_arch_interrupt_allowed(vcpu
) &&
4466 kvm_cpu_accept_dm_intr(vcpu
) &&
4467 !kvm_event_needs_reinjection(vcpu
) &&
4468 !vcpu
->arch
.exception
.pending
);
4471 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4472 struct kvm_interrupt
*irq
)
4474 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4477 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4478 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4479 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4484 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4485 * fail for in-kernel 8259.
4487 if (pic_in_kernel(vcpu
->kvm
))
4490 if (vcpu
->arch
.pending_external_vector
!= -1)
4493 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4494 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4498 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4500 kvm_inject_nmi(vcpu
);
4505 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4507 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4512 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4513 struct kvm_tpr_access_ctl
*tac
)
4517 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4521 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4525 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4528 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4530 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4533 vcpu
->arch
.mcg_cap
= mcg_cap
;
4534 /* Init IA32_MCG_CTL to all 1s */
4535 if (mcg_cap
& MCG_CTL_P
)
4536 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4537 /* Init IA32_MCi_CTL to all 1s */
4538 for (bank
= 0; bank
< bank_num
; bank
++)
4539 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4541 static_call(kvm_x86_setup_mce
)(vcpu
);
4546 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4547 struct kvm_x86_mce
*mce
)
4549 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4550 unsigned bank_num
= mcg_cap
& 0xff;
4551 u64
*banks
= vcpu
->arch
.mce_banks
;
4553 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4556 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4557 * reporting is disabled
4559 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4560 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4562 banks
+= 4 * mce
->bank
;
4564 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4565 * reporting is disabled for the bank
4567 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4569 if (mce
->status
& MCI_STATUS_UC
) {
4570 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4571 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4572 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4575 if (banks
[1] & MCI_STATUS_VAL
)
4576 mce
->status
|= MCI_STATUS_OVER
;
4577 banks
[2] = mce
->addr
;
4578 banks
[3] = mce
->misc
;
4579 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4580 banks
[1] = mce
->status
;
4581 kvm_queue_exception(vcpu
, MC_VECTOR
);
4582 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4583 || !(banks
[1] & MCI_STATUS_UC
)) {
4584 if (banks
[1] & MCI_STATUS_VAL
)
4585 mce
->status
|= MCI_STATUS_OVER
;
4586 banks
[2] = mce
->addr
;
4587 banks
[3] = mce
->misc
;
4588 banks
[1] = mce
->status
;
4590 banks
[1] |= MCI_STATUS_OVER
;
4594 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4595 struct kvm_vcpu_events
*events
)
4599 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
4603 * In guest mode, payload delivery should be deferred,
4604 * so that the L1 hypervisor can intercept #PF before
4605 * CR2 is modified (or intercept #DB before DR6 is
4606 * modified under nVMX). Unless the per-VM capability,
4607 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4608 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4609 * opportunistically defer the exception payload, deliver it if the
4610 * capability hasn't been requested before processing a
4611 * KVM_GET_VCPU_EVENTS.
4613 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4614 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4615 kvm_deliver_exception_payload(vcpu
);
4618 * The API doesn't provide the instruction length for software
4619 * exceptions, so don't report them. As long as the guest RIP
4620 * isn't advanced, we should expect to encounter the exception
4623 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4624 events
->exception
.injected
= 0;
4625 events
->exception
.pending
= 0;
4627 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4628 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4630 * For ABI compatibility, deliberately conflate
4631 * pending and injected exceptions when
4632 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4634 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4635 events
->exception
.injected
|=
4636 vcpu
->arch
.exception
.pending
;
4638 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4639 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4640 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4641 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4642 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4644 events
->interrupt
.injected
=
4645 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4646 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4647 events
->interrupt
.soft
= 0;
4648 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
4650 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4651 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4652 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
4653 events
->nmi
.pad
= 0;
4655 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4657 events
->smi
.smm
= is_smm(vcpu
);
4658 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4659 events
->smi
.smm_inside_nmi
=
4660 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4661 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4663 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4664 | KVM_VCPUEVENT_VALID_SHADOW
4665 | KVM_VCPUEVENT_VALID_SMM
);
4666 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4667 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4669 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4672 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
);
4674 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4675 struct kvm_vcpu_events
*events
)
4677 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4678 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4679 | KVM_VCPUEVENT_VALID_SHADOW
4680 | KVM_VCPUEVENT_VALID_SMM
4681 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4684 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4685 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4687 if (events
->exception
.pending
)
4688 events
->exception
.injected
= 0;
4690 events
->exception_has_payload
= 0;
4692 events
->exception
.pending
= 0;
4693 events
->exception_has_payload
= 0;
4696 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4697 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4700 /* INITs are latched while in SMM */
4701 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4702 (events
->smi
.smm
|| events
->smi
.pending
) &&
4703 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4707 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4708 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4709 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4710 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4711 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4712 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4713 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4715 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4716 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4717 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4718 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4719 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
4720 events
->interrupt
.shadow
);
4722 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4723 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
4724 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
4725 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
4727 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
4728 lapic_in_kernel(vcpu
))
4729 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
4731 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
4732 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
4733 kvm_x86_ops
.nested_ops
->leave_nested(vcpu
);
4734 kvm_smm_changed(vcpu
, events
->smi
.smm
);
4737 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
4739 if (events
->smi
.smm
) {
4740 if (events
->smi
.smm_inside_nmi
)
4741 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
4743 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
4746 if (lapic_in_kernel(vcpu
)) {
4747 if (events
->smi
.latched_init
)
4748 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4750 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4754 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4759 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
4760 struct kvm_debugregs
*dbgregs
)
4764 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
4765 kvm_get_dr(vcpu
, 6, &val
);
4767 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4769 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4772 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4773 struct kvm_debugregs
*dbgregs
)
4778 if (!kvm_dr6_valid(dbgregs
->dr6
))
4780 if (!kvm_dr7_valid(dbgregs
->dr7
))
4783 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4784 kvm_update_dr0123(vcpu
);
4785 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4786 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4787 kvm_update_dr7(vcpu
);
4792 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4794 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
4796 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4797 u64 xstate_bv
= xsave
->header
.xfeatures
;
4801 * Copy legacy XSAVE area, to avoid complications with CPUID
4802 * leaves 0 and 1 in the loop below.
4804 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
4807 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
4808 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
4811 * Copy each region from the possibly compacted offset to the
4812 * non-compacted offset.
4814 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4816 u32 size
, offset
, ecx
, edx
;
4817 u64 xfeature_mask
= valid
& -valid
;
4818 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4821 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4822 &size
, &offset
, &ecx
, &edx
);
4824 if (xfeature_nr
== XFEATURE_PKRU
) {
4825 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
4826 sizeof(vcpu
->arch
.pkru
));
4828 src
= get_xsave_addr(xsave
, xfeature_nr
);
4830 memcpy(dest
+ offset
, src
, size
);
4833 valid
-= xfeature_mask
;
4837 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
4839 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4840 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
4844 * Copy legacy XSAVE area, to avoid complications with CPUID
4845 * leaves 0 and 1 in the loop below.
4847 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
4849 /* Set XSTATE_BV and possibly XCOMP_BV. */
4850 xsave
->header
.xfeatures
= xstate_bv
;
4851 if (boot_cpu_has(X86_FEATURE_XSAVES
))
4852 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
4855 * Copy each region from the non-compacted offset to the
4856 * possibly compacted offset.
4858 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4860 u32 size
, offset
, ecx
, edx
;
4861 u64 xfeature_mask
= valid
& -valid
;
4862 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4864 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4865 &size
, &offset
, &ecx
, &edx
);
4867 if (xfeature_nr
== XFEATURE_PKRU
) {
4868 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
4869 sizeof(vcpu
->arch
.pkru
));
4871 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
4874 memcpy(dest
, src
+ offset
, size
);
4877 valid
-= xfeature_mask
;
4881 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4882 struct kvm_xsave
*guest_xsave
)
4884 if (!vcpu
->arch
.guest_fpu
)
4887 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4888 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
4889 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
4891 memcpy(guest_xsave
->region
,
4892 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
4893 sizeof(struct fxregs_state
));
4894 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
4895 XFEATURE_MASK_FPSSE
;
4899 #define XSAVE_MXCSR_OFFSET 24
4901 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4902 struct kvm_xsave
*guest_xsave
)
4907 if (!vcpu
->arch
.guest_fpu
)
4910 xstate_bv
= *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
4911 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
4913 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4915 * Here we allow setting states that are not present in
4916 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4917 * with old userspace.
4919 if (xstate_bv
& ~supported_xcr0
|| mxcsr
& ~mxcsr_feature_mask
)
4921 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
4923 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
4924 mxcsr
& ~mxcsr_feature_mask
)
4926 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
4927 guest_xsave
->region
, sizeof(struct fxregs_state
));
4932 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4933 struct kvm_xcrs
*guest_xcrs
)
4935 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4936 guest_xcrs
->nr_xcrs
= 0;
4940 guest_xcrs
->nr_xcrs
= 1;
4941 guest_xcrs
->flags
= 0;
4942 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4943 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4946 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4947 struct kvm_xcrs
*guest_xcrs
)
4951 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4954 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4957 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4958 /* Only support XCR0 currently */
4959 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4960 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4961 guest_xcrs
->xcrs
[i
].value
);
4970 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4971 * stopped by the hypervisor. This function will be called from the host only.
4972 * EINVAL is returned when the host attempts to set the flag for a guest that
4973 * does not support pv clocks.
4975 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4977 if (!vcpu
->arch
.pv_time_enabled
)
4979 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4980 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4984 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4985 struct kvm_enable_cap
*cap
)
4988 uint16_t vmcs_version
;
4989 void __user
*user_ptr
;
4995 case KVM_CAP_HYPERV_SYNIC2
:
5000 case KVM_CAP_HYPERV_SYNIC
:
5001 if (!irqchip_in_kernel(vcpu
->kvm
))
5003 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
5004 KVM_CAP_HYPERV_SYNIC2
);
5005 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
5006 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
5008 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
5010 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
5011 if (copy_to_user(user_ptr
, &vmcs_version
,
5012 sizeof(vmcs_version
)))
5016 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
5017 if (!kvm_x86_ops
.enable_direct_tlbflush
)
5020 return static_call(kvm_x86_enable_direct_tlbflush
)(vcpu
);
5022 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
5023 return kvm_hv_set_enforce_cpuid(vcpu
, cap
->args
[0]);
5025 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
5026 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
5027 if (vcpu
->arch
.pv_cpuid
.enforce
)
5028 kvm_update_pv_runtime(vcpu
);
5036 long kvm_arch_vcpu_ioctl(struct file
*filp
,
5037 unsigned int ioctl
, unsigned long arg
)
5039 struct kvm_vcpu
*vcpu
= filp
->private_data
;
5040 void __user
*argp
= (void __user
*)arg
;
5043 struct kvm_sregs2
*sregs2
;
5044 struct kvm_lapic_state
*lapic
;
5045 struct kvm_xsave
*xsave
;
5046 struct kvm_xcrs
*xcrs
;
5054 case KVM_GET_LAPIC
: {
5056 if (!lapic_in_kernel(vcpu
))
5058 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
5059 GFP_KERNEL_ACCOUNT
);
5064 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
5068 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
5073 case KVM_SET_LAPIC
: {
5075 if (!lapic_in_kernel(vcpu
))
5077 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
5078 if (IS_ERR(u
.lapic
)) {
5079 r
= PTR_ERR(u
.lapic
);
5083 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
5086 case KVM_INTERRUPT
: {
5087 struct kvm_interrupt irq
;
5090 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
5092 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
5096 r
= kvm_vcpu_ioctl_nmi(vcpu
);
5100 r
= kvm_vcpu_ioctl_smi(vcpu
);
5103 case KVM_SET_CPUID
: {
5104 struct kvm_cpuid __user
*cpuid_arg
= argp
;
5105 struct kvm_cpuid cpuid
;
5108 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5110 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
5113 case KVM_SET_CPUID2
: {
5114 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5115 struct kvm_cpuid2 cpuid
;
5118 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5120 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
5121 cpuid_arg
->entries
);
5124 case KVM_GET_CPUID2
: {
5125 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5126 struct kvm_cpuid2 cpuid
;
5129 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5131 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5132 cpuid_arg
->entries
);
5136 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5141 case KVM_GET_MSRS
: {
5142 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5143 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5144 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5147 case KVM_SET_MSRS
: {
5148 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5149 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5150 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5153 case KVM_TPR_ACCESS_REPORTING
: {
5154 struct kvm_tpr_access_ctl tac
;
5157 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5159 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5163 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5168 case KVM_SET_VAPIC_ADDR
: {
5169 struct kvm_vapic_addr va
;
5173 if (!lapic_in_kernel(vcpu
))
5176 if (copy_from_user(&va
, argp
, sizeof(va
)))
5178 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5179 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5180 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5183 case KVM_X86_SETUP_MCE
: {
5187 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5189 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5192 case KVM_X86_SET_MCE
: {
5193 struct kvm_x86_mce mce
;
5196 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5198 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5201 case KVM_GET_VCPU_EVENTS
: {
5202 struct kvm_vcpu_events events
;
5204 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5207 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5212 case KVM_SET_VCPU_EVENTS
: {
5213 struct kvm_vcpu_events events
;
5216 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5219 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5222 case KVM_GET_DEBUGREGS
: {
5223 struct kvm_debugregs dbgregs
;
5225 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5228 if (copy_to_user(argp
, &dbgregs
,
5229 sizeof(struct kvm_debugregs
)))
5234 case KVM_SET_DEBUGREGS
: {
5235 struct kvm_debugregs dbgregs
;
5238 if (copy_from_user(&dbgregs
, argp
,
5239 sizeof(struct kvm_debugregs
)))
5242 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
5245 case KVM_GET_XSAVE
: {
5246 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
5251 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
5254 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
5259 case KVM_SET_XSAVE
: {
5260 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
5261 if (IS_ERR(u
.xsave
)) {
5262 r
= PTR_ERR(u
.xsave
);
5266 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
5269 case KVM_GET_XCRS
: {
5270 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
5275 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
5278 if (copy_to_user(argp
, u
.xcrs
,
5279 sizeof(struct kvm_xcrs
)))
5284 case KVM_SET_XCRS
: {
5285 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
5286 if (IS_ERR(u
.xcrs
)) {
5287 r
= PTR_ERR(u
.xcrs
);
5291 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
5294 case KVM_SET_TSC_KHZ
: {
5298 user_tsc_khz
= (u32
)arg
;
5300 if (kvm_has_tsc_control
&&
5301 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
5304 if (user_tsc_khz
== 0)
5305 user_tsc_khz
= tsc_khz
;
5307 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
5312 case KVM_GET_TSC_KHZ
: {
5313 r
= vcpu
->arch
.virtual_tsc_khz
;
5316 case KVM_KVMCLOCK_CTRL
: {
5317 r
= kvm_set_guest_paused(vcpu
);
5320 case KVM_ENABLE_CAP
: {
5321 struct kvm_enable_cap cap
;
5324 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
5326 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
5329 case KVM_GET_NESTED_STATE
: {
5330 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5334 if (!kvm_x86_ops
.nested_ops
->get_state
)
5337 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
5339 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
5342 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
5347 if (r
> user_data_size
) {
5348 if (put_user(r
, &user_kvm_nested_state
->size
))
5358 case KVM_SET_NESTED_STATE
: {
5359 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5360 struct kvm_nested_state kvm_state
;
5364 if (!kvm_x86_ops
.nested_ops
->set_state
)
5368 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5372 if (kvm_state
.size
< sizeof(kvm_state
))
5375 if (kvm_state
.flags
&
5376 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5377 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5378 | KVM_STATE_NESTED_GIF_SET
))
5381 /* nested_run_pending implies guest_mode. */
5382 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5383 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5386 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5387 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5388 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5391 case KVM_GET_SUPPORTED_HV_CPUID
:
5392 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5394 #ifdef CONFIG_KVM_XEN
5395 case KVM_XEN_VCPU_GET_ATTR
: {
5396 struct kvm_xen_vcpu_attr xva
;
5399 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5401 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
5402 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
5406 case KVM_XEN_VCPU_SET_ATTR
: {
5407 struct kvm_xen_vcpu_attr xva
;
5410 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5412 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
5416 case KVM_GET_SREGS2
: {
5417 u
.sregs2
= kzalloc(sizeof(struct kvm_sregs2
), GFP_KERNEL
);
5421 __get_sregs2(vcpu
, u
.sregs2
);
5423 if (copy_to_user(argp
, u
.sregs2
, sizeof(struct kvm_sregs2
)))
5428 case KVM_SET_SREGS2
: {
5429 u
.sregs2
= memdup_user(argp
, sizeof(struct kvm_sregs2
));
5430 if (IS_ERR(u
.sregs2
)) {
5431 r
= PTR_ERR(u
.sregs2
);
5435 r
= __set_sregs2(vcpu
, u
.sregs2
);
5448 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5450 return VM_FAULT_SIGBUS
;
5453 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5457 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5459 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
5463 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5466 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
5469 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5470 unsigned long kvm_nr_mmu_pages
)
5472 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5475 mutex_lock(&kvm
->slots_lock
);
5477 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5478 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5480 mutex_unlock(&kvm
->slots_lock
);
5484 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5486 return kvm
->arch
.n_max_mmu_pages
;
5489 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5491 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5495 switch (chip
->chip_id
) {
5496 case KVM_IRQCHIP_PIC_MASTER
:
5497 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5498 sizeof(struct kvm_pic_state
));
5500 case KVM_IRQCHIP_PIC_SLAVE
:
5501 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5502 sizeof(struct kvm_pic_state
));
5504 case KVM_IRQCHIP_IOAPIC
:
5505 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5514 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5516 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5520 switch (chip
->chip_id
) {
5521 case KVM_IRQCHIP_PIC_MASTER
:
5522 spin_lock(&pic
->lock
);
5523 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5524 sizeof(struct kvm_pic_state
));
5525 spin_unlock(&pic
->lock
);
5527 case KVM_IRQCHIP_PIC_SLAVE
:
5528 spin_lock(&pic
->lock
);
5529 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5530 sizeof(struct kvm_pic_state
));
5531 spin_unlock(&pic
->lock
);
5533 case KVM_IRQCHIP_IOAPIC
:
5534 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5540 kvm_pic_update_irq(pic
);
5544 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5546 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5548 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5550 mutex_lock(&kps
->lock
);
5551 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5552 mutex_unlock(&kps
->lock
);
5556 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5559 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5561 mutex_lock(&pit
->pit_state
.lock
);
5562 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5563 for (i
= 0; i
< 3; i
++)
5564 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5565 mutex_unlock(&pit
->pit_state
.lock
);
5569 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5571 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5572 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5573 sizeof(ps
->channels
));
5574 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5575 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5576 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5580 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5584 u32 prev_legacy
, cur_legacy
;
5585 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5587 mutex_lock(&pit
->pit_state
.lock
);
5588 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5589 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5590 if (!prev_legacy
&& cur_legacy
)
5592 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5593 sizeof(pit
->pit_state
.channels
));
5594 pit
->pit_state
.flags
= ps
->flags
;
5595 for (i
= 0; i
< 3; i
++)
5596 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5598 mutex_unlock(&pit
->pit_state
.lock
);
5602 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5603 struct kvm_reinject_control
*control
)
5605 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5607 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5608 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5609 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5611 mutex_lock(&pit
->pit_state
.lock
);
5612 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5613 mutex_unlock(&pit
->pit_state
.lock
);
5618 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5622 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5623 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5624 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5627 struct kvm_vcpu
*vcpu
;
5630 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5631 kvm_vcpu_kick(vcpu
);
5634 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5637 if (!irqchip_in_kernel(kvm
))
5640 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5641 irq_event
->irq
, irq_event
->level
,
5646 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5647 struct kvm_enable_cap
*cap
)
5655 case KVM_CAP_DISABLE_QUIRKS
:
5656 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5659 case KVM_CAP_SPLIT_IRQCHIP
: {
5660 mutex_lock(&kvm
->lock
);
5662 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5663 goto split_irqchip_unlock
;
5665 if (irqchip_in_kernel(kvm
))
5666 goto split_irqchip_unlock
;
5667 if (kvm
->created_vcpus
)
5668 goto split_irqchip_unlock
;
5669 r
= kvm_setup_empty_irq_routing(kvm
);
5671 goto split_irqchip_unlock
;
5672 /* Pairs with irqchip_in_kernel. */
5674 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5675 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5677 split_irqchip_unlock
:
5678 mutex_unlock(&kvm
->lock
);
5681 case KVM_CAP_X2APIC_API
:
5683 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
5686 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
5687 kvm
->arch
.x2apic_format
= true;
5688 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
5689 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
5693 case KVM_CAP_X86_DISABLE_EXITS
:
5695 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
5698 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
5699 kvm_can_mwait_in_guest())
5700 kvm
->arch
.mwait_in_guest
= true;
5701 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
5702 kvm
->arch
.hlt_in_guest
= true;
5703 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
5704 kvm
->arch
.pause_in_guest
= true;
5705 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
5706 kvm
->arch
.cstate_in_guest
= true;
5709 case KVM_CAP_MSR_PLATFORM_INFO
:
5710 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
5713 case KVM_CAP_EXCEPTION_PAYLOAD
:
5714 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
5717 case KVM_CAP_X86_USER_SPACE_MSR
:
5718 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
5721 case KVM_CAP_X86_BUS_LOCK_EXIT
:
5723 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
5726 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
5727 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
5730 if (kvm_has_bus_lock_exit
&&
5731 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
5732 kvm
->arch
.bus_lock_detection_enabled
= true;
5735 #ifdef CONFIG_X86_SGX_KVM
5736 case KVM_CAP_SGX_ATTRIBUTE
: {
5737 unsigned long allowed_attributes
= 0;
5739 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
5743 /* KVM only supports the PROVISIONKEY privileged attribute. */
5744 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
5745 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
5746 kvm
->arch
.sgx_provisioning_allowed
= true;
5752 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
5754 if (kvm_x86_ops
.vm_copy_enc_context_from
)
5755 r
= kvm_x86_ops
.vm_copy_enc_context_from(kvm
, cap
->args
[0]);
5757 case KVM_CAP_EXIT_HYPERCALL
:
5758 if (cap
->args
[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK
) {
5762 kvm
->arch
.hypercall_exit_enabled
= cap
->args
[0];
5765 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
5767 if (cap
->args
[0] & ~1)
5769 kvm
->arch
.exit_on_emulation_error
= cap
->args
[0];
5779 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
5781 struct kvm_x86_msr_filter
*msr_filter
;
5783 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
5787 msr_filter
->default_allow
= default_allow
;
5791 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
5798 for (i
= 0; i
< msr_filter
->count
; i
++)
5799 kfree(msr_filter
->ranges
[i
].bitmap
);
5804 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
5805 struct kvm_msr_filter_range
*user_range
)
5807 unsigned long *bitmap
= NULL
;
5810 if (!user_range
->nmsrs
)
5813 if (user_range
->flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
))
5816 if (!user_range
->flags
)
5819 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
5820 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
5823 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
5825 return PTR_ERR(bitmap
);
5827 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
5828 .flags
= user_range
->flags
,
5829 .base
= user_range
->base
,
5830 .nmsrs
= user_range
->nmsrs
,
5834 msr_filter
->count
++;
5838 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
5840 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
5841 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
5842 struct kvm_msr_filter filter
;
5848 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
5851 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
5852 empty
&= !filter
.ranges
[i
].nmsrs
;
5854 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
5855 if (empty
&& !default_allow
)
5858 new_filter
= kvm_alloc_msr_filter(default_allow
);
5862 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
5863 r
= kvm_add_msr_filter(new_filter
, &filter
.ranges
[i
]);
5865 kvm_free_msr_filter(new_filter
);
5870 mutex_lock(&kvm
->lock
);
5872 /* The per-VM filter is protected by kvm->lock... */
5873 old_filter
= srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1);
5875 rcu_assign_pointer(kvm
->arch
.msr_filter
, new_filter
);
5876 synchronize_srcu(&kvm
->srcu
);
5878 kvm_free_msr_filter(old_filter
);
5880 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
5881 mutex_unlock(&kvm
->lock
);
5886 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5887 static int kvm_arch_suspend_notifier(struct kvm
*kvm
)
5889 struct kvm_vcpu
*vcpu
;
5892 mutex_lock(&kvm
->lock
);
5893 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5894 if (!vcpu
->arch
.pv_time_enabled
)
5897 ret
= kvm_set_guest_paused(vcpu
);
5899 kvm_err("Failed to pause guest VCPU%d: %d\n",
5900 vcpu
->vcpu_id
, ret
);
5904 mutex_unlock(&kvm
->lock
);
5906 return ret
? NOTIFY_BAD
: NOTIFY_DONE
;
5909 int kvm_arch_pm_notifier(struct kvm
*kvm
, unsigned long state
)
5912 case PM_HIBERNATION_PREPARE
:
5913 case PM_SUSPEND_PREPARE
:
5914 return kvm_arch_suspend_notifier(kvm
);
5919 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5921 long kvm_arch_vm_ioctl(struct file
*filp
,
5922 unsigned int ioctl
, unsigned long arg
)
5924 struct kvm
*kvm
= filp
->private_data
;
5925 void __user
*argp
= (void __user
*)arg
;
5928 * This union makes it completely explicit to gcc-3.x
5929 * that these two variables' stack usage should be
5930 * combined, not added together.
5933 struct kvm_pit_state ps
;
5934 struct kvm_pit_state2 ps2
;
5935 struct kvm_pit_config pit_config
;
5939 case KVM_SET_TSS_ADDR
:
5940 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
5942 case KVM_SET_IDENTITY_MAP_ADDR
: {
5945 mutex_lock(&kvm
->lock
);
5947 if (kvm
->created_vcpus
)
5948 goto set_identity_unlock
;
5950 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
5951 goto set_identity_unlock
;
5952 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
5953 set_identity_unlock
:
5954 mutex_unlock(&kvm
->lock
);
5957 case KVM_SET_NR_MMU_PAGES
:
5958 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
5960 case KVM_GET_NR_MMU_PAGES
:
5961 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
5963 case KVM_CREATE_IRQCHIP
: {
5964 mutex_lock(&kvm
->lock
);
5967 if (irqchip_in_kernel(kvm
))
5968 goto create_irqchip_unlock
;
5971 if (kvm
->created_vcpus
)
5972 goto create_irqchip_unlock
;
5974 r
= kvm_pic_init(kvm
);
5976 goto create_irqchip_unlock
;
5978 r
= kvm_ioapic_init(kvm
);
5980 kvm_pic_destroy(kvm
);
5981 goto create_irqchip_unlock
;
5984 r
= kvm_setup_default_irq_routing(kvm
);
5986 kvm_ioapic_destroy(kvm
);
5987 kvm_pic_destroy(kvm
);
5988 goto create_irqchip_unlock
;
5990 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5992 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
5993 create_irqchip_unlock
:
5994 mutex_unlock(&kvm
->lock
);
5997 case KVM_CREATE_PIT
:
5998 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
6000 case KVM_CREATE_PIT2
:
6002 if (copy_from_user(&u
.pit_config
, argp
,
6003 sizeof(struct kvm_pit_config
)))
6006 mutex_lock(&kvm
->lock
);
6009 goto create_pit_unlock
;
6011 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
6015 mutex_unlock(&kvm
->lock
);
6017 case KVM_GET_IRQCHIP
: {
6018 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6019 struct kvm_irqchip
*chip
;
6021 chip
= memdup_user(argp
, sizeof(*chip
));
6028 if (!irqchip_kernel(kvm
))
6029 goto get_irqchip_out
;
6030 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
6032 goto get_irqchip_out
;
6034 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
6035 goto get_irqchip_out
;
6041 case KVM_SET_IRQCHIP
: {
6042 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6043 struct kvm_irqchip
*chip
;
6045 chip
= memdup_user(argp
, sizeof(*chip
));
6052 if (!irqchip_kernel(kvm
))
6053 goto set_irqchip_out
;
6054 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
6061 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
6064 if (!kvm
->arch
.vpit
)
6066 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
6070 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
6077 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
6079 mutex_lock(&kvm
->lock
);
6081 if (!kvm
->arch
.vpit
)
6083 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
6085 mutex_unlock(&kvm
->lock
);
6088 case KVM_GET_PIT2
: {
6090 if (!kvm
->arch
.vpit
)
6092 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
6096 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
6101 case KVM_SET_PIT2
: {
6103 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
6105 mutex_lock(&kvm
->lock
);
6107 if (!kvm
->arch
.vpit
)
6109 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
6111 mutex_unlock(&kvm
->lock
);
6114 case KVM_REINJECT_CONTROL
: {
6115 struct kvm_reinject_control control
;
6117 if (copy_from_user(&control
, argp
, sizeof(control
)))
6120 if (!kvm
->arch
.vpit
)
6122 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
6125 case KVM_SET_BOOT_CPU_ID
:
6127 mutex_lock(&kvm
->lock
);
6128 if (kvm
->created_vcpus
)
6131 kvm
->arch
.bsp_vcpu_id
= arg
;
6132 mutex_unlock(&kvm
->lock
);
6134 #ifdef CONFIG_KVM_XEN
6135 case KVM_XEN_HVM_CONFIG
: {
6136 struct kvm_xen_hvm_config xhc
;
6138 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
6140 r
= kvm_xen_hvm_config(kvm
, &xhc
);
6143 case KVM_XEN_HVM_GET_ATTR
: {
6144 struct kvm_xen_hvm_attr xha
;
6147 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6149 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
6150 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
6154 case KVM_XEN_HVM_SET_ATTR
: {
6155 struct kvm_xen_hvm_attr xha
;
6158 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6160 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
6164 case KVM_SET_CLOCK
: {
6165 struct kvm_arch
*ka
= &kvm
->arch
;
6166 struct kvm_clock_data user_ns
;
6170 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
6179 * TODO: userspace has to take care of races with VCPU_RUN, so
6180 * kvm_gen_update_masterclock() can be cut down to locked
6181 * pvclock_update_vm_gtod_copy().
6183 kvm_gen_update_masterclock(kvm
);
6186 * This pairs with kvm_guest_time_update(): when masterclock is
6187 * in use, we use master_kernel_ns + kvmclock_offset to set
6188 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6189 * is slightly ahead) here we risk going negative on unsigned
6190 * 'system_time' when 'user_ns.clock' is very small.
6192 raw_spin_lock_irq(&ka
->pvclock_gtod_sync_lock
);
6193 if (kvm
->arch
.use_master_clock
)
6194 now_ns
= ka
->master_kernel_ns
;
6196 now_ns
= get_kvmclock_base_ns();
6197 ka
->kvmclock_offset
= user_ns
.clock
- now_ns
;
6198 raw_spin_unlock_irq(&ka
->pvclock_gtod_sync_lock
);
6200 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
6203 case KVM_GET_CLOCK
: {
6204 struct kvm_clock_data user_ns
;
6207 now_ns
= get_kvmclock_ns(kvm
);
6208 user_ns
.clock
= now_ns
;
6209 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
6210 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
6213 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
6218 case KVM_MEMORY_ENCRYPT_OP
: {
6220 if (kvm_x86_ops
.mem_enc_op
)
6221 r
= static_call(kvm_x86_mem_enc_op
)(kvm
, argp
);
6224 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
6225 struct kvm_enc_region region
;
6228 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6232 if (kvm_x86_ops
.mem_enc_reg_region
)
6233 r
= static_call(kvm_x86_mem_enc_reg_region
)(kvm
, ®ion
);
6236 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
6237 struct kvm_enc_region region
;
6240 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6244 if (kvm_x86_ops
.mem_enc_unreg_region
)
6245 r
= static_call(kvm_x86_mem_enc_unreg_region
)(kvm
, ®ion
);
6248 case KVM_HYPERV_EVENTFD
: {
6249 struct kvm_hyperv_eventfd hvevfd
;
6252 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
6254 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
6257 case KVM_SET_PMU_EVENT_FILTER
:
6258 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
6260 case KVM_X86_SET_MSR_FILTER
:
6261 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
6270 static void kvm_init_msr_list(void)
6272 struct x86_pmu_capability x86_pmu
;
6276 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
6277 "Please update the fixed PMCs in msrs_to_saved_all[]");
6279 perf_get_x86_pmu_capability(&x86_pmu
);
6281 num_msrs_to_save
= 0;
6282 num_emulated_msrs
= 0;
6283 num_msr_based_features
= 0;
6285 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
6286 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
6290 * Even MSRs that are valid in the host may not be exposed
6291 * to the guests in some cases.
6293 switch (msrs_to_save_all
[i
]) {
6294 case MSR_IA32_BNDCFGS
:
6295 if (!kvm_mpx_supported())
6299 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
6300 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
6303 case MSR_IA32_UMWAIT_CONTROL
:
6304 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
6307 case MSR_IA32_RTIT_CTL
:
6308 case MSR_IA32_RTIT_STATUS
:
6309 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
6312 case MSR_IA32_RTIT_CR3_MATCH
:
6313 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6314 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
6317 case MSR_IA32_RTIT_OUTPUT_BASE
:
6318 case MSR_IA32_RTIT_OUTPUT_MASK
:
6319 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6320 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
6321 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
6324 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
6325 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6326 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
6327 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
6330 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
6331 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
6332 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6335 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
6336 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
6337 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6344 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
6347 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
6348 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
6351 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
6354 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
6355 struct kvm_msr_entry msr
;
6357 msr
.index
= msr_based_features_all
[i
];
6358 if (kvm_get_msr_feature(&msr
))
6361 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
6365 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
6373 if (!(lapic_in_kernel(vcpu
) &&
6374 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
6375 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6386 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
6393 if (!(lapic_in_kernel(vcpu
) &&
6394 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
6396 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6398 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
6408 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
6409 struct kvm_segment
*var
, int seg
)
6411 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
6414 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
6415 struct kvm_segment
*var
, int seg
)
6417 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
6420 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
6421 struct x86_exception
*exception
)
6425 BUG_ON(!mmu_is_nested(vcpu
));
6427 /* NPT walks are always user-walks */
6428 access
|= PFERR_USER_MASK
;
6429 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
6434 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
6435 struct x86_exception
*exception
)
6437 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6438 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6440 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
6442 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
6443 struct x86_exception
*exception
)
6445 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6446 access
|= PFERR_FETCH_MASK
;
6447 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6450 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
6451 struct x86_exception
*exception
)
6453 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6454 access
|= PFERR_WRITE_MASK
;
6455 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6457 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
6459 /* uses this to access any guest's mapped memory without checking CPL */
6460 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
6461 struct x86_exception
*exception
)
6463 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
6466 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6467 struct kvm_vcpu
*vcpu
, u32 access
,
6468 struct x86_exception
*exception
)
6471 int r
= X86EMUL_CONTINUE
;
6474 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
6476 unsigned offset
= addr
& (PAGE_SIZE
-1);
6477 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6480 if (gpa
== UNMAPPED_GVA
)
6481 return X86EMUL_PROPAGATE_FAULT
;
6482 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
6485 r
= X86EMUL_IO_NEEDED
;
6497 /* used for instruction fetching */
6498 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
6499 gva_t addr
, void *val
, unsigned int bytes
,
6500 struct x86_exception
*exception
)
6502 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6503 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6507 /* Inline kvm_read_guest_virt_helper for speed. */
6508 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
6510 if (unlikely(gpa
== UNMAPPED_GVA
))
6511 return X86EMUL_PROPAGATE_FAULT
;
6513 offset
= addr
& (PAGE_SIZE
-1);
6514 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
6515 bytes
= (unsigned)PAGE_SIZE
- offset
;
6516 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
6518 if (unlikely(ret
< 0))
6519 return X86EMUL_IO_NEEDED
;
6521 return X86EMUL_CONTINUE
;
6524 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
6525 gva_t addr
, void *val
, unsigned int bytes
,
6526 struct x86_exception
*exception
)
6528 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6531 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6532 * is returned, but our callers are not ready for that and they blindly
6533 * call kvm_inject_page_fault. Ensure that they at least do not leak
6534 * uninitialized kernel stack memory into cr2 and error code.
6536 memset(exception
, 0, sizeof(*exception
));
6537 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
6540 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
6542 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
6543 gva_t addr
, void *val
, unsigned int bytes
,
6544 struct x86_exception
*exception
, bool system
)
6546 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6549 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6550 access
|= PFERR_USER_MASK
;
6552 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6555 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6556 unsigned long addr
, void *val
, unsigned int bytes
)
6558 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6559 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6561 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6564 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6565 struct kvm_vcpu
*vcpu
, u32 access
,
6566 struct x86_exception
*exception
)
6569 int r
= X86EMUL_CONTINUE
;
6572 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
6575 unsigned offset
= addr
& (PAGE_SIZE
-1);
6576 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6579 if (gpa
== UNMAPPED_GVA
)
6580 return X86EMUL_PROPAGATE_FAULT
;
6581 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6583 r
= X86EMUL_IO_NEEDED
;
6595 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6596 unsigned int bytes
, struct x86_exception
*exception
,
6599 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6600 u32 access
= PFERR_WRITE_MASK
;
6602 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6603 access
|= PFERR_USER_MASK
;
6605 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6609 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
6610 unsigned int bytes
, struct x86_exception
*exception
)
6612 /* kvm_write_guest_virt_system can pull in tons of pages. */
6613 vcpu
->arch
.l1tf_flush_l1d
= true;
6615 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6616 PFERR_WRITE_MASK
, exception
);
6618 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
6620 int handle_ud(struct kvm_vcpu
*vcpu
)
6622 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
6623 int emul_type
= EMULTYPE_TRAP_UD
;
6624 char sig
[5]; /* ud2; .ascii "kvm" */
6625 struct x86_exception e
;
6627 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, NULL
, 0)))
6630 if (force_emulation_prefix
&&
6631 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
6632 sig
, sizeof(sig
), &e
) == 0 &&
6633 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
6634 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
6635 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
6638 return kvm_emulate_instruction(vcpu
, emul_type
);
6640 EXPORT_SYMBOL_GPL(handle_ud
);
6642 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6643 gpa_t gpa
, bool write
)
6645 /* For APIC access vmexit */
6646 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6649 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
6650 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
6657 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6658 gpa_t
*gpa
, struct x86_exception
*exception
,
6661 u32 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
6662 | (write
? PFERR_WRITE_MASK
: 0);
6665 * currently PKRU is only applied to ept enabled guest so
6666 * there is no pkey in EPT page table for L1 guest or EPT
6667 * shadow page table for L2 guest.
6669 if (vcpu_match_mmio_gva(vcpu
, gva
) && (!is_paging(vcpu
) ||
6670 !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
6671 vcpu
->arch
.mmio_access
, 0, access
))) {
6672 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
6673 (gva
& (PAGE_SIZE
- 1));
6674 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
6678 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6680 if (*gpa
== UNMAPPED_GVA
)
6683 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
6686 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6687 const void *val
, int bytes
)
6691 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
6694 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
6698 struct read_write_emulator_ops
{
6699 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
6701 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6702 void *val
, int bytes
);
6703 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6704 int bytes
, void *val
);
6705 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6706 void *val
, int bytes
);
6710 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
6712 if (vcpu
->mmio_read_completed
) {
6713 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
6714 vcpu
->mmio_fragments
[0].gpa
, val
);
6715 vcpu
->mmio_read_completed
= 0;
6722 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6723 void *val
, int bytes
)
6725 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
6728 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6729 void *val
, int bytes
)
6731 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
6734 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
6736 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
6737 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
6740 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6741 void *val
, int bytes
)
6743 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
6744 return X86EMUL_IO_NEEDED
;
6747 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6748 void *val
, int bytes
)
6750 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
6752 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6753 return X86EMUL_CONTINUE
;
6756 static const struct read_write_emulator_ops read_emultor
= {
6757 .read_write_prepare
= read_prepare
,
6758 .read_write_emulate
= read_emulate
,
6759 .read_write_mmio
= vcpu_mmio_read
,
6760 .read_write_exit_mmio
= read_exit_mmio
,
6763 static const struct read_write_emulator_ops write_emultor
= {
6764 .read_write_emulate
= write_emulate
,
6765 .read_write_mmio
= write_mmio
,
6766 .read_write_exit_mmio
= write_exit_mmio
,
6770 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
6772 struct x86_exception
*exception
,
6773 struct kvm_vcpu
*vcpu
,
6774 const struct read_write_emulator_ops
*ops
)
6778 bool write
= ops
->write
;
6779 struct kvm_mmio_fragment
*frag
;
6780 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6783 * If the exit was due to a NPF we may already have a GPA.
6784 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6785 * Note, this cannot be used on string operations since string
6786 * operation using rep will only have the initial GPA from the NPF
6789 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
6790 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
6791 gpa
= ctxt
->gpa_val
;
6792 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
6794 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
6796 return X86EMUL_PROPAGATE_FAULT
;
6799 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
6800 return X86EMUL_CONTINUE
;
6803 * Is this MMIO handled locally?
6805 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
6806 if (handled
== bytes
)
6807 return X86EMUL_CONTINUE
;
6813 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
6814 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
6818 return X86EMUL_CONTINUE
;
6821 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
6823 void *val
, unsigned int bytes
,
6824 struct x86_exception
*exception
,
6825 const struct read_write_emulator_ops
*ops
)
6827 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6831 if (ops
->read_write_prepare
&&
6832 ops
->read_write_prepare(vcpu
, val
, bytes
))
6833 return X86EMUL_CONTINUE
;
6835 vcpu
->mmio_nr_fragments
= 0;
6837 /* Crossing a page boundary? */
6838 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
6841 now
= -addr
& ~PAGE_MASK
;
6842 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
6845 if (rc
!= X86EMUL_CONTINUE
)
6848 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
6854 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
6856 if (rc
!= X86EMUL_CONTINUE
)
6859 if (!vcpu
->mmio_nr_fragments
)
6862 gpa
= vcpu
->mmio_fragments
[0].gpa
;
6864 vcpu
->mmio_needed
= 1;
6865 vcpu
->mmio_cur_fragment
= 0;
6867 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
6868 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
6869 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
6870 vcpu
->run
->mmio
.phys_addr
= gpa
;
6872 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
6875 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
6879 struct x86_exception
*exception
)
6881 return emulator_read_write(ctxt
, addr
, val
, bytes
,
6882 exception
, &read_emultor
);
6885 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
6889 struct x86_exception
*exception
)
6891 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
6892 exception
, &write_emultor
);
6895 #define CMPXCHG_TYPE(t, ptr, old, new) \
6896 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6898 #ifdef CONFIG_X86_64
6899 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6901 # define CMPXCHG64(ptr, old, new) \
6902 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6905 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
6910 struct x86_exception
*exception
)
6912 struct kvm_host_map map
;
6913 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6919 /* guests cmpxchg8b have to be emulated atomically */
6920 if (bytes
> 8 || (bytes
& (bytes
- 1)))
6923 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
6925 if (gpa
== UNMAPPED_GVA
||
6926 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6930 * Emulate the atomic as a straight write to avoid #AC if SLD is
6931 * enabled in the host and the access splits a cache line.
6933 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
6934 page_line_mask
= ~(cache_line_size() - 1);
6936 page_line_mask
= PAGE_MASK
;
6938 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
6941 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
6944 kaddr
= map
.hva
+ offset_in_page(gpa
);
6948 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
6951 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
6954 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
6957 exchanged
= CMPXCHG64(kaddr
, old
, new);
6963 kvm_vcpu_unmap(vcpu
, &map
, true);
6966 return X86EMUL_CMPXCHG_FAILED
;
6968 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
6970 return X86EMUL_CONTINUE
;
6973 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
6975 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
6978 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
6982 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
6983 if (vcpu
->arch
.pio
.in
)
6984 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
6985 vcpu
->arch
.pio
.size
, pd
);
6987 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
6988 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
6992 pd
+= vcpu
->arch
.pio
.size
;
6997 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
6998 unsigned short port
,
6999 unsigned int count
, bool in
)
7001 vcpu
->arch
.pio
.port
= port
;
7002 vcpu
->arch
.pio
.in
= in
;
7003 vcpu
->arch
.pio
.count
= count
;
7004 vcpu
->arch
.pio
.size
= size
;
7006 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
))
7009 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
7010 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
7011 vcpu
->run
->io
.size
= size
;
7012 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
7013 vcpu
->run
->io
.count
= count
;
7014 vcpu
->run
->io
.port
= port
;
7019 static int __emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7020 unsigned short port
, unsigned int count
)
7022 WARN_ON(vcpu
->arch
.pio
.count
);
7023 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
7024 return emulator_pio_in_out(vcpu
, size
, port
, count
, true);
7027 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
7029 int size
= vcpu
->arch
.pio
.size
;
7030 unsigned count
= vcpu
->arch
.pio
.count
;
7031 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
7032 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
7033 vcpu
->arch
.pio
.count
= 0;
7036 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7037 unsigned short port
, void *val
, unsigned int count
)
7039 if (vcpu
->arch
.pio
.count
) {
7041 * Complete a previous iteration that required userspace I/O.
7042 * Note, @count isn't guaranteed to match pio.count as userspace
7043 * can modify ECX before rerunning the vCPU. Ignore any such
7044 * shenanigans as KVM doesn't support modifying the rep count,
7045 * and the emulator ensures @count doesn't overflow the buffer.
7048 int r
= __emulator_pio_in(vcpu
, size
, port
, count
);
7052 /* Results already available, fall through. */
7055 complete_emulator_pio_in(vcpu
, val
);
7059 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
7060 int size
, unsigned short port
, void *val
,
7063 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7067 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7068 unsigned short port
, const void *val
,
7073 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
7074 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
7075 ret
= emulator_pio_in_out(vcpu
, size
, port
, count
, false);
7077 vcpu
->arch
.pio
.count
= 0;
7082 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
7083 int size
, unsigned short port
,
7084 const void *val
, unsigned int count
)
7086 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7089 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
7091 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
7094 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
7096 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
7099 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
7101 if (!need_emulate_wbinvd(vcpu
))
7102 return X86EMUL_CONTINUE
;
7104 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
7105 int cpu
= get_cpu();
7107 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
7108 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
7109 wbinvd_ipi
, NULL
, 1);
7111 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
7114 return X86EMUL_CONTINUE
;
7117 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
7119 kvm_emulate_wbinvd_noskip(vcpu
);
7120 return kvm_skip_emulated_instruction(vcpu
);
7122 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
7126 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
7128 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
7131 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7132 unsigned long *dest
)
7134 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
7137 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7138 unsigned long value
)
7141 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
7144 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
7146 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
7149 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
7151 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7152 unsigned long value
;
7156 value
= kvm_read_cr0(vcpu
);
7159 value
= vcpu
->arch
.cr2
;
7162 value
= kvm_read_cr3(vcpu
);
7165 value
= kvm_read_cr4(vcpu
);
7168 value
= kvm_get_cr8(vcpu
);
7171 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7178 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
7180 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7185 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
7188 vcpu
->arch
.cr2
= val
;
7191 res
= kvm_set_cr3(vcpu
, val
);
7194 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
7197 res
= kvm_set_cr8(vcpu
, val
);
7200 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7207 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
7209 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
7212 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7214 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
7217 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7219 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
7222 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7224 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
7227 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7229 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
7232 static unsigned long emulator_get_cached_segment_base(
7233 struct x86_emulate_ctxt
*ctxt
, int seg
)
7235 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
7238 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
7239 struct desc_struct
*desc
, u32
*base3
,
7242 struct kvm_segment var
;
7244 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
7245 *selector
= var
.selector
;
7248 memset(desc
, 0, sizeof(*desc
));
7256 set_desc_limit(desc
, var
.limit
);
7257 set_desc_base(desc
, (unsigned long)var
.base
);
7258 #ifdef CONFIG_X86_64
7260 *base3
= var
.base
>> 32;
7262 desc
->type
= var
.type
;
7264 desc
->dpl
= var
.dpl
;
7265 desc
->p
= var
.present
;
7266 desc
->avl
= var
.avl
;
7274 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
7275 struct desc_struct
*desc
, u32 base3
,
7278 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7279 struct kvm_segment var
;
7281 var
.selector
= selector
;
7282 var
.base
= get_desc_base(desc
);
7283 #ifdef CONFIG_X86_64
7284 var
.base
|= ((u64
)base3
) << 32;
7286 var
.limit
= get_desc_limit(desc
);
7288 var
.limit
= (var
.limit
<< 12) | 0xfff;
7289 var
.type
= desc
->type
;
7290 var
.dpl
= desc
->dpl
;
7295 var
.avl
= desc
->avl
;
7296 var
.present
= desc
->p
;
7297 var
.unusable
= !var
.present
;
7300 kvm_set_segment(vcpu
, &var
, seg
);
7304 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
7305 u32 msr_index
, u64
*pdata
)
7307 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7310 r
= kvm_get_msr(vcpu
, msr_index
, pdata
);
7312 if (r
&& kvm_get_msr_user_space(vcpu
, msr_index
, r
)) {
7313 /* Bounce to user space */
7314 return X86EMUL_IO_NEEDED
;
7320 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
7321 u32 msr_index
, u64 data
)
7323 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7326 r
= kvm_set_msr(vcpu
, msr_index
, data
);
7328 if (r
&& kvm_set_msr_user_space(vcpu
, msr_index
, data
, r
)) {
7329 /* Bounce to user space */
7330 return X86EMUL_IO_NEEDED
;
7336 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
7338 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7340 return vcpu
->arch
.smbase
;
7343 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
7345 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7347 vcpu
->arch
.smbase
= smbase
;
7350 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
7353 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
7356 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
7357 u32 pmc
, u64
*pdata
)
7359 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
7362 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
7364 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
7367 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
7368 struct x86_instruction_info
*info
,
7369 enum x86_intercept_stage stage
)
7371 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
7375 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
7376 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
7379 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
7382 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
7384 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
7387 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
7389 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
7392 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
7394 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
7397 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
7399 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
7402 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
7404 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
7407 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
7409 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
7412 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
7414 return emul_to_vcpu(ctxt
)->arch
.hflags
;
7417 static void emulator_exiting_smm(struct x86_emulate_ctxt
*ctxt
)
7419 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7421 kvm_smm_changed(vcpu
, false);
7424 static int emulator_leave_smm(struct x86_emulate_ctxt
*ctxt
,
7425 const char *smstate
)
7427 return static_call(kvm_x86_leave_smm
)(emul_to_vcpu(ctxt
), smstate
);
7430 static void emulator_triple_fault(struct x86_emulate_ctxt
*ctxt
)
7432 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, emul_to_vcpu(ctxt
));
7435 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
7437 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
7440 static const struct x86_emulate_ops emulate_ops
= {
7441 .read_gpr
= emulator_read_gpr
,
7442 .write_gpr
= emulator_write_gpr
,
7443 .read_std
= emulator_read_std
,
7444 .write_std
= emulator_write_std
,
7445 .read_phys
= kvm_read_guest_phys_system
,
7446 .fetch
= kvm_fetch_guest_virt
,
7447 .read_emulated
= emulator_read_emulated
,
7448 .write_emulated
= emulator_write_emulated
,
7449 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
7450 .invlpg
= emulator_invlpg
,
7451 .pio_in_emulated
= emulator_pio_in_emulated
,
7452 .pio_out_emulated
= emulator_pio_out_emulated
,
7453 .get_segment
= emulator_get_segment
,
7454 .set_segment
= emulator_set_segment
,
7455 .get_cached_segment_base
= emulator_get_cached_segment_base
,
7456 .get_gdt
= emulator_get_gdt
,
7457 .get_idt
= emulator_get_idt
,
7458 .set_gdt
= emulator_set_gdt
,
7459 .set_idt
= emulator_set_idt
,
7460 .get_cr
= emulator_get_cr
,
7461 .set_cr
= emulator_set_cr
,
7462 .cpl
= emulator_get_cpl
,
7463 .get_dr
= emulator_get_dr
,
7464 .set_dr
= emulator_set_dr
,
7465 .get_smbase
= emulator_get_smbase
,
7466 .set_smbase
= emulator_set_smbase
,
7467 .set_msr
= emulator_set_msr
,
7468 .get_msr
= emulator_get_msr
,
7469 .check_pmc
= emulator_check_pmc
,
7470 .read_pmc
= emulator_read_pmc
,
7471 .halt
= emulator_halt
,
7472 .wbinvd
= emulator_wbinvd
,
7473 .fix_hypercall
= emulator_fix_hypercall
,
7474 .intercept
= emulator_intercept
,
7475 .get_cpuid
= emulator_get_cpuid
,
7476 .guest_has_long_mode
= emulator_guest_has_long_mode
,
7477 .guest_has_movbe
= emulator_guest_has_movbe
,
7478 .guest_has_fxsr
= emulator_guest_has_fxsr
,
7479 .set_nmi_mask
= emulator_set_nmi_mask
,
7480 .get_hflags
= emulator_get_hflags
,
7481 .exiting_smm
= emulator_exiting_smm
,
7482 .leave_smm
= emulator_leave_smm
,
7483 .triple_fault
= emulator_triple_fault
,
7484 .set_xcr
= emulator_set_xcr
,
7487 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
7489 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
7491 * an sti; sti; sequence only disable interrupts for the first
7492 * instruction. So, if the last instruction, be it emulated or
7493 * not, left the system with the INT_STI flag enabled, it
7494 * means that the last instruction is an sti. We should not
7495 * leave the flag on in this case. The same goes for mov ss
7497 if (int_shadow
& mask
)
7499 if (unlikely(int_shadow
|| mask
)) {
7500 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
7502 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7506 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
7508 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7509 if (ctxt
->exception
.vector
== PF_VECTOR
)
7510 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
7512 if (ctxt
->exception
.error_code_valid
)
7513 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
7514 ctxt
->exception
.error_code
);
7516 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
7520 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7522 struct x86_emulate_ctxt
*ctxt
;
7524 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
7526 pr_err("kvm: failed to allocate vcpu's emulator\n");
7531 ctxt
->ops
= &emulate_ops
;
7532 vcpu
->arch
.emulate_ctxt
= ctxt
;
7537 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7539 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7542 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
7544 ctxt
->gpa_available
= false;
7545 ctxt
->eflags
= kvm_get_rflags(vcpu
);
7546 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
7548 ctxt
->eip
= kvm_rip_read(vcpu
);
7549 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
7550 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
7551 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
7552 cs_db
? X86EMUL_MODE_PROT32
:
7553 X86EMUL_MODE_PROT16
;
7554 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
7555 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
7556 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
7558 ctxt
->interruptibility
= 0;
7559 ctxt
->have_exception
= false;
7560 ctxt
->exception
.vector
= -1;
7561 ctxt
->perm_ok
= false;
7563 init_decode_cache(ctxt
);
7564 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7567 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
7569 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7572 init_emulate_ctxt(vcpu
);
7576 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
7577 ret
= emulate_int_real(ctxt
, irq
);
7579 if (ret
!= X86EMUL_CONTINUE
) {
7580 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
7582 ctxt
->eip
= ctxt
->_eip
;
7583 kvm_rip_write(vcpu
, ctxt
->eip
);
7584 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7587 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
7589 static void prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
)
7591 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7592 u32 insn_size
= ctxt
->fetch
.end
- ctxt
->fetch
.data
;
7593 struct kvm_run
*run
= vcpu
->run
;
7595 run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7596 run
->emulation_failure
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7597 run
->emulation_failure
.ndata
= 0;
7598 run
->emulation_failure
.flags
= 0;
7601 run
->emulation_failure
.ndata
= 3;
7602 run
->emulation_failure
.flags
|=
7603 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES
;
7604 run
->emulation_failure
.insn_size
= insn_size
;
7605 memset(run
->emulation_failure
.insn_bytes
, 0x90,
7606 sizeof(run
->emulation_failure
.insn_bytes
));
7607 memcpy(run
->emulation_failure
.insn_bytes
,
7608 ctxt
->fetch
.data
, insn_size
);
7612 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
7614 struct kvm
*kvm
= vcpu
->kvm
;
7616 ++vcpu
->stat
.insn_emulation_fail
;
7617 trace_kvm_emulate_insn_failed(vcpu
);
7619 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
7620 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7624 if (kvm
->arch
.exit_on_emulation_error
||
7625 (emulation_type
& EMULTYPE_SKIP
)) {
7626 prepare_emulation_failure_exit(vcpu
);
7630 kvm_queue_exception(vcpu
, UD_VECTOR
);
7632 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
7633 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7634 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7635 vcpu
->run
->internal
.ndata
= 0;
7642 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7643 bool write_fault_to_shadow_pgtable
,
7646 gpa_t gpa
= cr2_or_gpa
;
7649 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7652 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7653 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7656 if (!vcpu
->arch
.mmu
->direct_map
) {
7658 * Write permission should be allowed since only
7659 * write access need to be emulated.
7661 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7664 * If the mapping is invalid in guest, let cpu retry
7665 * it to generate fault.
7667 if (gpa
== UNMAPPED_GVA
)
7672 * Do not retry the unhandleable instruction if it faults on the
7673 * readonly host memory, otherwise it will goto a infinite loop:
7674 * retry instruction -> write #PF -> emulation fail -> retry
7675 * instruction -> ...
7677 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
7680 * If the instruction failed on the error pfn, it can not be fixed,
7681 * report the error to userspace.
7683 if (is_error_noslot_pfn(pfn
))
7686 kvm_release_pfn_clean(pfn
);
7688 /* The instructions are well-emulated on direct mmu. */
7689 if (vcpu
->arch
.mmu
->direct_map
) {
7690 unsigned int indirect_shadow_pages
;
7692 write_lock(&vcpu
->kvm
->mmu_lock
);
7693 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
7694 write_unlock(&vcpu
->kvm
->mmu_lock
);
7696 if (indirect_shadow_pages
)
7697 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7703 * if emulation was due to access to shadowed page table
7704 * and it failed try to unshadow page and re-enter the
7705 * guest to let CPU execute the instruction.
7707 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7710 * If the access faults on its page table, it can not
7711 * be fixed by unprotecting shadow page and it should
7712 * be reported to userspace.
7714 return !write_fault_to_shadow_pgtable
;
7717 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
7718 gpa_t cr2_or_gpa
, int emulation_type
)
7720 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7721 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
7723 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
7724 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
7727 * If the emulation is caused by #PF and it is non-page_table
7728 * writing instruction, it means the VM-EXIT is caused by shadow
7729 * page protected, we can zap the shadow page and retry this
7730 * instruction directly.
7732 * Note: if the guest uses a non-page-table modifying instruction
7733 * on the PDE that points to the instruction, then we will unmap
7734 * the instruction and go to an infinite loop. So, we cache the
7735 * last retried eip and the last fault address, if we meet the eip
7736 * and the address again, we can break out of the potential infinite
7739 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
7741 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7744 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7745 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7748 if (x86_page_table_writing_insn(ctxt
))
7751 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
7754 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
7755 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
7757 if (!vcpu
->arch
.mmu
->direct_map
)
7758 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7760 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7765 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
7766 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
7768 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
)
7770 trace_kvm_smm_transition(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, entering_smm
);
7773 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
7775 vcpu
->arch
.hflags
&= ~(HF_SMM_MASK
| HF_SMM_INSIDE_NMI_MASK
);
7777 /* Process a latched INIT or SMI, if any. */
7778 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7781 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7782 * on SMM exit we still need to reload them from
7785 vcpu
->arch
.pdptrs_from_userspace
= false;
7788 kvm_mmu_reset_context(vcpu
);
7791 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
7800 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
7801 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
7806 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
7808 struct kvm_run
*kvm_run
= vcpu
->run
;
7810 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
7811 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
7812 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
7813 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7814 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7817 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
7821 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
7823 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7826 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
7831 * rflags is the old, "raw" value of the flags. The new value has
7832 * not been saved yet.
7834 * This is correct even for TF set by the guest, because "the
7835 * processor will not generate this exception after the instruction
7836 * that sets the TF flag".
7838 if (unlikely(rflags
& X86_EFLAGS_TF
))
7839 r
= kvm_vcpu_do_singlestep(vcpu
);
7842 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
7844 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
7846 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
7847 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
7848 struct kvm_run
*kvm_run
= vcpu
->run
;
7849 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7850 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7851 vcpu
->arch
.guest_debug_dr7
,
7855 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
7856 kvm_run
->debug
.arch
.pc
= eip
;
7857 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7858 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7864 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
7865 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
7866 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7867 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7872 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
7881 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
7883 switch (ctxt
->opcode_len
) {
7890 case 0xe6: /* OUT */
7894 case 0x6c: /* INS */
7896 case 0x6e: /* OUTS */
7903 case 0x33: /* RDPMC */
7913 * Decode to be emulated instruction. Return EMULATION_OK if success.
7915 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
7916 void *insn
, int insn_len
)
7918 int r
= EMULATION_OK
;
7919 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7921 init_emulate_ctxt(vcpu
);
7924 * We will reenter on the same instruction since we do not set
7925 * complete_userspace_io. This does not handle watchpoints yet,
7926 * those would be handled in the emulate_ops.
7928 if (!(emulation_type
& EMULTYPE_SKIP
) &&
7929 kvm_vcpu_check_breakpoint(vcpu
, &r
))
7932 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
7934 trace_kvm_emulate_insn_start(vcpu
);
7935 ++vcpu
->stat
.insn_emulation
;
7939 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
7941 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7942 int emulation_type
, void *insn
, int insn_len
)
7945 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7946 bool writeback
= true;
7947 bool write_fault_to_spt
;
7949 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, insn
, insn_len
)))
7952 vcpu
->arch
.l1tf_flush_l1d
= true;
7955 * Clear write_fault_to_shadow_pgtable here to ensure it is
7958 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
7959 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
7961 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
7962 kvm_clear_exception_queue(vcpu
);
7964 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
7966 if (r
!= EMULATION_OK
) {
7967 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
7968 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
7969 kvm_queue_exception(vcpu
, UD_VECTOR
);
7972 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
7976 if (ctxt
->have_exception
) {
7978 * #UD should result in just EMULATION_FAILED, and trap-like
7979 * exception should not be encountered during decode.
7981 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
7982 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
7983 inject_emulated_exception(vcpu
);
7986 return handle_emulation_failure(vcpu
, emulation_type
);
7990 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
7991 !is_vmware_backdoor_opcode(ctxt
)) {
7992 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7997 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7998 * for kvm_skip_emulated_instruction(). The caller is responsible for
7999 * updating interruptibility state and injecting single-step #DBs.
8001 if (emulation_type
& EMULTYPE_SKIP
) {
8002 kvm_rip_write(vcpu
, ctxt
->_eip
);
8003 if (ctxt
->eflags
& X86_EFLAGS_RF
)
8004 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
8008 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
8011 /* this is needed for vmware backdoor interface to work since it
8012 changes registers values during IO operation */
8013 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
8014 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
8015 emulator_invalidate_register_cache(ctxt
);
8019 if (emulation_type
& EMULTYPE_PF
) {
8020 /* Save the faulting GPA (cr2) in the address field */
8021 ctxt
->exception
.address
= cr2_or_gpa
;
8023 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8024 if (vcpu
->arch
.mmu
->direct_map
) {
8025 ctxt
->gpa_available
= true;
8026 ctxt
->gpa_val
= cr2_or_gpa
;
8029 /* Sanitize the address out of an abundance of paranoia. */
8030 ctxt
->exception
.address
= 0;
8033 r
= x86_emulate_insn(ctxt
);
8035 if (r
== EMULATION_INTERCEPTED
)
8038 if (r
== EMULATION_FAILED
) {
8039 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
8043 return handle_emulation_failure(vcpu
, emulation_type
);
8046 if (ctxt
->have_exception
) {
8048 if (inject_emulated_exception(vcpu
))
8050 } else if (vcpu
->arch
.pio
.count
) {
8051 if (!vcpu
->arch
.pio
.in
) {
8052 /* FIXME: return into emulator if single-stepping. */
8053 vcpu
->arch
.pio
.count
= 0;
8056 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
8059 } else if (vcpu
->mmio_needed
) {
8060 ++vcpu
->stat
.mmio_exits
;
8062 if (!vcpu
->mmio_is_write
)
8065 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
8066 } else if (r
== EMULATION_RESTART
)
8072 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8073 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
8074 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
8075 if (!ctxt
->have_exception
||
8076 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
8077 kvm_rip_write(vcpu
, ctxt
->eip
);
8078 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
8079 r
= kvm_vcpu_do_singlestep(vcpu
);
8080 if (kvm_x86_ops
.update_emulated_instruction
)
8081 static_call(kvm_x86_update_emulated_instruction
)(vcpu
);
8082 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
8086 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8087 * do nothing, and it will be requested again as soon as
8088 * the shadow expires. But we still need to check here,
8089 * because POPF has no interrupt shadow.
8091 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
8092 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8094 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
8099 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
8101 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
8103 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
8105 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
8106 void *insn
, int insn_len
)
8108 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
8110 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
8112 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
8114 vcpu
->arch
.pio
.count
= 0;
8118 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
8120 vcpu
->arch
.pio
.count
= 0;
8122 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
8125 return kvm_skip_emulated_instruction(vcpu
);
8128 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
8129 unsigned short port
)
8131 unsigned long val
= kvm_rax_read(vcpu
);
8132 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
8138 * Workaround userspace that relies on old KVM behavior of %rip being
8139 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8142 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
8143 vcpu
->arch
.complete_userspace_io
=
8144 complete_fast_pio_out_port_0x7e
;
8145 kvm_skip_emulated_instruction(vcpu
);
8147 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8148 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
8153 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
8157 /* We should only ever be called with arch.pio.count equal to 1 */
8158 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
8160 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
8161 vcpu
->arch
.pio
.count
= 0;
8165 /* For size less than 4 we merge, else we zero extend */
8166 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
8169 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8170 * the copy and tracing
8172 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
8173 kvm_rax_write(vcpu
, val
);
8175 return kvm_skip_emulated_instruction(vcpu
);
8178 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
8179 unsigned short port
)
8184 /* For size less than 4 we merge, else we zero extend */
8185 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
8187 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
8189 kvm_rax_write(vcpu
, val
);
8193 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8194 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
8199 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
8204 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
8206 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
8207 return ret
&& kvm_skip_emulated_instruction(vcpu
);
8209 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
8211 static int kvmclock_cpu_down_prep(unsigned int cpu
)
8213 __this_cpu_write(cpu_tsc_khz
, 0);
8217 static void tsc_khz_changed(void *data
)
8219 struct cpufreq_freqs
*freq
= data
;
8220 unsigned long khz
= 0;
8224 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8225 khz
= cpufreq_quick_get(raw_smp_processor_id());
8228 __this_cpu_write(cpu_tsc_khz
, khz
);
8231 #ifdef CONFIG_X86_64
8232 static void kvm_hyperv_tsc_notifier(void)
8235 struct kvm_vcpu
*vcpu
;
8237 unsigned long flags
;
8239 mutex_lock(&kvm_lock
);
8240 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8241 kvm_make_mclock_inprogress_request(kvm
);
8243 hyperv_stop_tsc_emulation();
8245 /* TSC frequency always matches when on Hyper-V */
8246 for_each_present_cpu(cpu
)
8247 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
8248 kvm_max_guest_tsc_khz
= tsc_khz
;
8250 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8251 struct kvm_arch
*ka
= &kvm
->arch
;
8253 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
8254 pvclock_update_vm_gtod_copy(kvm
);
8255 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
8257 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8258 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8260 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8261 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
8263 mutex_unlock(&kvm_lock
);
8267 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
8270 struct kvm_vcpu
*vcpu
;
8271 int i
, send_ipi
= 0;
8274 * We allow guests to temporarily run on slowing clocks,
8275 * provided we notify them after, or to run on accelerating
8276 * clocks, provided we notify them before. Thus time never
8279 * However, we have a problem. We can't atomically update
8280 * the frequency of a given CPU from this function; it is
8281 * merely a notifier, which can be called from any CPU.
8282 * Changing the TSC frequency at arbitrary points in time
8283 * requires a recomputation of local variables related to
8284 * the TSC for each VCPU. We must flag these local variables
8285 * to be updated and be sure the update takes place with the
8286 * new frequency before any guests proceed.
8288 * Unfortunately, the combination of hotplug CPU and frequency
8289 * change creates an intractable locking scenario; the order
8290 * of when these callouts happen is undefined with respect to
8291 * CPU hotplug, and they can race with each other. As such,
8292 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8293 * undefined; you can actually have a CPU frequency change take
8294 * place in between the computation of X and the setting of the
8295 * variable. To protect against this problem, all updates of
8296 * the per_cpu tsc_khz variable are done in an interrupt
8297 * protected IPI, and all callers wishing to update the value
8298 * must wait for a synchronous IPI to complete (which is trivial
8299 * if the caller is on the CPU already). This establishes the
8300 * necessary total order on variable updates.
8302 * Note that because a guest time update may take place
8303 * anytime after the setting of the VCPU's request bit, the
8304 * correct TSC value must be set before the request. However,
8305 * to ensure the update actually makes it to any guest which
8306 * starts running in hardware virtualization between the set
8307 * and the acquisition of the spinlock, we must also ping the
8308 * CPU after setting the request bit.
8312 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8314 mutex_lock(&kvm_lock
);
8315 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8316 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8317 if (vcpu
->cpu
!= cpu
)
8319 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8320 if (vcpu
->cpu
!= raw_smp_processor_id())
8324 mutex_unlock(&kvm_lock
);
8326 if (freq
->old
< freq
->new && send_ipi
) {
8328 * We upscale the frequency. Must make the guest
8329 * doesn't see old kvmclock values while running with
8330 * the new frequency, otherwise we risk the guest sees
8331 * time go backwards.
8333 * In case we update the frequency for another cpu
8334 * (which might be in guest context) send an interrupt
8335 * to kick the cpu out of guest context. Next time
8336 * guest context is entered kvmclock will be updated,
8337 * so the guest will not see stale values.
8339 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8343 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
8346 struct cpufreq_freqs
*freq
= data
;
8349 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
8351 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
8354 for_each_cpu(cpu
, freq
->policy
->cpus
)
8355 __kvmclock_cpufreq_notifier(freq
, cpu
);
8360 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
8361 .notifier_call
= kvmclock_cpufreq_notifier
8364 static int kvmclock_cpu_online(unsigned int cpu
)
8366 tsc_khz_changed(NULL
);
8370 static void kvm_timer_init(void)
8372 max_tsc_khz
= tsc_khz
;
8374 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
8375 #ifdef CONFIG_CPU_FREQ
8376 struct cpufreq_policy
*policy
;
8380 policy
= cpufreq_cpu_get(cpu
);
8382 if (policy
->cpuinfo
.max_freq
)
8383 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
8384 cpufreq_cpu_put(policy
);
8388 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
8389 CPUFREQ_TRANSITION_NOTIFIER
);
8392 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
8393 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
8396 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
8397 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
8399 int kvm_is_in_guest(void)
8401 return __this_cpu_read(current_vcpu
) != NULL
;
8404 static int kvm_is_user_mode(void)
8408 if (__this_cpu_read(current_vcpu
))
8409 user_mode
= static_call(kvm_x86_get_cpl
)(__this_cpu_read(current_vcpu
));
8411 return user_mode
!= 0;
8414 static unsigned long kvm_get_guest_ip(void)
8416 unsigned long ip
= 0;
8418 if (__this_cpu_read(current_vcpu
))
8419 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
8424 static void kvm_handle_intel_pt_intr(void)
8426 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
8428 kvm_make_request(KVM_REQ_PMI
, vcpu
);
8429 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
8430 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
8433 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
8434 .is_in_guest
= kvm_is_in_guest
,
8435 .is_user_mode
= kvm_is_user_mode
,
8436 .get_guest_ip
= kvm_get_guest_ip
,
8437 .handle_intel_pt_intr
= NULL
,
8440 #ifdef CONFIG_X86_64
8441 static void pvclock_gtod_update_fn(struct work_struct
*work
)
8445 struct kvm_vcpu
*vcpu
;
8448 mutex_lock(&kvm_lock
);
8449 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8450 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8451 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8452 atomic_set(&kvm_guest_has_master_clock
, 0);
8453 mutex_unlock(&kvm_lock
);
8456 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
8459 * Indirection to move queue_work() out of the tk_core.seq write held
8460 * region to prevent possible deadlocks against time accessors which
8461 * are invoked with work related locks held.
8463 static void pvclock_irq_work_fn(struct irq_work
*w
)
8465 queue_work(system_long_wq
, &pvclock_gtod_work
);
8468 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
8471 * Notification about pvclock gtod data update.
8473 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
8476 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
8477 struct timekeeper
*tk
= priv
;
8479 update_pvclock_gtod(tk
);
8482 * Disable master clock if host does not trust, or does not use,
8483 * TSC based clocksource. Delegate queue_work() to irq_work as
8484 * this is invoked with tk_core.seq write held.
8486 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
8487 atomic_read(&kvm_guest_has_master_clock
) != 0)
8488 irq_work_queue(&pvclock_irq_work
);
8492 static struct notifier_block pvclock_gtod_notifier
= {
8493 .notifier_call
= pvclock_gtod_notify
,
8497 int kvm_arch_init(void *opaque
)
8499 struct kvm_x86_init_ops
*ops
= opaque
;
8502 if (kvm_x86_ops
.hardware_enable
) {
8503 printk(KERN_ERR
"kvm: already loaded the other module\n");
8508 if (!ops
->cpu_has_kvm_support()) {
8509 pr_err_ratelimited("kvm: no hardware support\n");
8513 if (ops
->disabled_by_bios()) {
8514 pr_warn_ratelimited("kvm: disabled by bios\n");
8520 * KVM explicitly assumes that the guest has an FPU and
8521 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8522 * vCPU's FPU state as a fxregs_state struct.
8524 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
8525 printk(KERN_ERR
"kvm: inadequate fpu\n");
8531 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
8532 __alignof__(struct fpu
), SLAB_ACCOUNT
,
8534 if (!x86_fpu_cache
) {
8535 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
8539 x86_emulator_cache
= kvm_alloc_emulator_cache();
8540 if (!x86_emulator_cache
) {
8541 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8542 goto out_free_x86_fpu_cache
;
8545 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
8546 if (!user_return_msrs
) {
8547 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
8548 goto out_free_x86_emulator_cache
;
8550 kvm_nr_uret_msrs
= 0;
8552 r
= kvm_mmu_module_init();
8554 goto out_free_percpu
;
8558 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
8559 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
8560 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
8563 if (pi_inject_timer
== -1)
8564 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
8565 #ifdef CONFIG_X86_64
8566 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
8568 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8569 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
8575 free_percpu(user_return_msrs
);
8576 out_free_x86_emulator_cache
:
8577 kmem_cache_destroy(x86_emulator_cache
);
8578 out_free_x86_fpu_cache
:
8579 kmem_cache_destroy(x86_fpu_cache
);
8584 void kvm_arch_exit(void)
8586 #ifdef CONFIG_X86_64
8587 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8588 clear_hv_tscchange_cb();
8592 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8593 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
8594 CPUFREQ_TRANSITION_NOTIFIER
);
8595 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
8596 #ifdef CONFIG_X86_64
8597 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
8598 irq_work_sync(&pvclock_irq_work
);
8599 cancel_work_sync(&pvclock_gtod_work
);
8601 kvm_x86_ops
.hardware_enable
= NULL
;
8602 kvm_mmu_module_exit();
8603 free_percpu(user_return_msrs
);
8604 kmem_cache_destroy(x86_emulator_cache
);
8605 kmem_cache_destroy(x86_fpu_cache
);
8606 #ifdef CONFIG_KVM_XEN
8607 static_key_deferred_flush(&kvm_xen_enabled
);
8608 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
8612 static int __kvm_vcpu_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
8614 ++vcpu
->stat
.halt_exits
;
8615 if (lapic_in_kernel(vcpu
)) {
8616 vcpu
->arch
.mp_state
= state
;
8619 vcpu
->run
->exit_reason
= reason
;
8624 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
8626 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
8628 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
8630 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
8632 int ret
= kvm_skip_emulated_instruction(vcpu
);
8634 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8635 * KVM_EXIT_DEBUG here.
8637 return kvm_vcpu_halt(vcpu
) && ret
;
8639 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
8641 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
8643 int ret
= kvm_skip_emulated_instruction(vcpu
);
8645 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
, KVM_EXIT_AP_RESET_HOLD
) && ret
;
8647 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
8649 #ifdef CONFIG_X86_64
8650 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
8651 unsigned long clock_type
)
8653 struct kvm_clock_pairing clock_pairing
;
8654 struct timespec64 ts
;
8658 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
8659 return -KVM_EOPNOTSUPP
;
8661 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
8662 return -KVM_EOPNOTSUPP
;
8664 clock_pairing
.sec
= ts
.tv_sec
;
8665 clock_pairing
.nsec
= ts
.tv_nsec
;
8666 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
8667 clock_pairing
.flags
= 0;
8668 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
8671 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
8672 sizeof(struct kvm_clock_pairing
)))
8680 * kvm_pv_kick_cpu_op: Kick a vcpu.
8682 * @apicid - apicid of vcpu to be kicked.
8684 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
8686 struct kvm_lapic_irq lapic_irq
;
8688 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
8689 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
8690 lapic_irq
.level
= 0;
8691 lapic_irq
.dest_id
= apicid
;
8692 lapic_irq
.msi_redir_hint
= false;
8694 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
8695 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
8698 bool kvm_apicv_activated(struct kvm
*kvm
)
8700 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
8702 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
8704 static void kvm_apicv_init(struct kvm
*kvm
)
8706 mutex_init(&kvm
->arch
.apicv_update_lock
);
8709 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
8710 &kvm
->arch
.apicv_inhibit_reasons
);
8712 set_bit(APICV_INHIBIT_REASON_DISABLE
,
8713 &kvm
->arch
.apicv_inhibit_reasons
);
8716 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
8718 struct kvm_vcpu
*target
= NULL
;
8719 struct kvm_apic_map
*map
;
8721 vcpu
->stat
.directed_yield_attempted
++;
8723 if (single_task_running())
8727 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
8729 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
8730 target
= map
->phys_map
[dest_id
]->vcpu
;
8734 if (!target
|| !READ_ONCE(target
->ready
))
8737 /* Ignore requests to yield to self */
8741 if (kvm_vcpu_yield_to(target
) <= 0)
8744 vcpu
->stat
.directed_yield_successful
++;
8750 static int complete_hypercall_exit(struct kvm_vcpu
*vcpu
)
8752 u64 ret
= vcpu
->run
->hypercall
.ret
;
8754 if (!is_64_bit_mode(vcpu
))
8756 kvm_rax_write(vcpu
, ret
);
8757 ++vcpu
->stat
.hypercalls
;
8758 return kvm_skip_emulated_instruction(vcpu
);
8761 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
8763 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
8766 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
8767 return kvm_xen_hypercall(vcpu
);
8769 if (kvm_hv_hypercall_enabled(vcpu
))
8770 return kvm_hv_hypercall(vcpu
);
8772 nr
= kvm_rax_read(vcpu
);
8773 a0
= kvm_rbx_read(vcpu
);
8774 a1
= kvm_rcx_read(vcpu
);
8775 a2
= kvm_rdx_read(vcpu
);
8776 a3
= kvm_rsi_read(vcpu
);
8778 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
8780 op_64_bit
= is_64_bit_hypercall(vcpu
);
8789 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
8797 case KVM_HC_VAPIC_POLL_IRQ
:
8800 case KVM_HC_KICK_CPU
:
8801 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
8804 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
8805 kvm_sched_yield(vcpu
, a1
);
8808 #ifdef CONFIG_X86_64
8809 case KVM_HC_CLOCK_PAIRING
:
8810 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
8813 case KVM_HC_SEND_IPI
:
8814 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
8817 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
8819 case KVM_HC_SCHED_YIELD
:
8820 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
8823 kvm_sched_yield(vcpu
, a0
);
8826 case KVM_HC_MAP_GPA_RANGE
: {
8827 u64 gpa
= a0
, npages
= a1
, attrs
= a2
;
8830 if (!(vcpu
->kvm
->arch
.hypercall_exit_enabled
& (1 << KVM_HC_MAP_GPA_RANGE
)))
8833 if (!PAGE_ALIGNED(gpa
) || !npages
||
8834 gpa_to_gfn(gpa
) + npages
<= gpa_to_gfn(gpa
)) {
8839 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERCALL
;
8840 vcpu
->run
->hypercall
.nr
= KVM_HC_MAP_GPA_RANGE
;
8841 vcpu
->run
->hypercall
.args
[0] = gpa
;
8842 vcpu
->run
->hypercall
.args
[1] = npages
;
8843 vcpu
->run
->hypercall
.args
[2] = attrs
;
8844 vcpu
->run
->hypercall
.longmode
= op_64_bit
;
8845 vcpu
->arch
.complete_userspace_io
= complete_hypercall_exit
;
8855 kvm_rax_write(vcpu
, ret
);
8857 ++vcpu
->stat
.hypercalls
;
8858 return kvm_skip_emulated_instruction(vcpu
);
8860 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
8862 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
8864 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8865 char instruction
[3];
8866 unsigned long rip
= kvm_rip_read(vcpu
);
8868 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
8870 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
8874 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
8876 return vcpu
->run
->request_interrupt_window
&&
8877 likely(!pic_in_kernel(vcpu
->kvm
));
8880 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
8882 struct kvm_run
*kvm_run
= vcpu
->run
;
8884 kvm_run
->if_flag
= static_call(kvm_x86_get_if_flag
)(vcpu
);
8885 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
8886 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
8889 * The call to kvm_ready_for_interrupt_injection() may end up in
8890 * kvm_xen_has_interrupt() which may require the srcu lock to be
8891 * held, to protect against changes in the vcpu_info address.
8893 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8894 kvm_run
->ready_for_interrupt_injection
=
8895 pic_in_kernel(vcpu
->kvm
) ||
8896 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
8897 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8900 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
8903 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
8907 if (!kvm_x86_ops
.update_cr8_intercept
)
8910 if (!lapic_in_kernel(vcpu
))
8913 if (vcpu
->arch
.apicv_active
)
8916 if (!vcpu
->arch
.apic
->vapic_addr
)
8917 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
8924 tpr
= kvm_lapic_get_cr8(vcpu
);
8926 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
8930 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
8932 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8933 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
8937 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
8940 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
8942 if (vcpu
->arch
.exception
.error_code
&& !is_protmode(vcpu
))
8943 vcpu
->arch
.exception
.error_code
= false;
8944 static_call(kvm_x86_queue_exception
)(vcpu
);
8947 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
8950 bool can_inject
= true;
8952 /* try to reinject previous events if any */
8954 if (vcpu
->arch
.exception
.injected
) {
8955 kvm_inject_exception(vcpu
);
8959 * Do not inject an NMI or interrupt if there is a pending
8960 * exception. Exceptions and interrupts are recognized at
8961 * instruction boundaries, i.e. the start of an instruction.
8962 * Trap-like exceptions, e.g. #DB, have higher priority than
8963 * NMIs and interrupts, i.e. traps are recognized before an
8964 * NMI/interrupt that's pending on the same instruction.
8965 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8966 * priority, but are only generated (pended) during instruction
8967 * execution, i.e. a pending fault-like exception means the
8968 * fault occurred on the *previous* instruction and must be
8969 * serviced prior to recognizing any new events in order to
8970 * fully complete the previous instruction.
8972 else if (!vcpu
->arch
.exception
.pending
) {
8973 if (vcpu
->arch
.nmi_injected
) {
8974 static_call(kvm_x86_set_nmi
)(vcpu
);
8976 } else if (vcpu
->arch
.interrupt
.injected
) {
8977 static_call(kvm_x86_set_irq
)(vcpu
);
8982 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
8983 vcpu
->arch
.exception
.pending
);
8986 * Call check_nested_events() even if we reinjected a previous event
8987 * in order for caller to determine if it should require immediate-exit
8988 * from L2 to L1 due to pending L1 events which require exit
8991 if (is_guest_mode(vcpu
)) {
8992 r
= kvm_check_nested_events(vcpu
);
8997 /* try to inject new event if pending */
8998 if (vcpu
->arch
.exception
.pending
) {
8999 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
9000 vcpu
->arch
.exception
.has_error_code
,
9001 vcpu
->arch
.exception
.error_code
);
9003 vcpu
->arch
.exception
.pending
= false;
9004 vcpu
->arch
.exception
.injected
= true;
9006 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
9007 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
9010 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
9011 kvm_deliver_exception_payload(vcpu
);
9012 if (vcpu
->arch
.dr7
& DR7_GD
) {
9013 vcpu
->arch
.dr7
&= ~DR7_GD
;
9014 kvm_update_dr7(vcpu
);
9018 kvm_inject_exception(vcpu
);
9022 /* Don't inject interrupts if the user asked to avoid doing so */
9023 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
)
9027 * Finally, inject interrupt events. If an event cannot be injected
9028 * due to architectural conditions (e.g. IF=0) a window-open exit
9029 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
9030 * and can architecturally be injected, but we cannot do it right now:
9031 * an interrupt could have arrived just now and we have to inject it
9032 * as a vmexit, or there could already an event in the queue, which is
9033 * indicated by can_inject. In that case we request an immediate exit
9034 * in order to make progress and get back here for another iteration.
9035 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9037 if (vcpu
->arch
.smi_pending
) {
9038 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
9042 vcpu
->arch
.smi_pending
= false;
9043 ++vcpu
->arch
.smi_count
;
9047 static_call(kvm_x86_enable_smi_window
)(vcpu
);
9050 if (vcpu
->arch
.nmi_pending
) {
9051 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
9055 --vcpu
->arch
.nmi_pending
;
9056 vcpu
->arch
.nmi_injected
= true;
9057 static_call(kvm_x86_set_nmi
)(vcpu
);
9059 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
9061 if (vcpu
->arch
.nmi_pending
)
9062 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
9065 if (kvm_cpu_has_injectable_intr(vcpu
)) {
9066 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
9070 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
9071 static_call(kvm_x86_set_irq
)(vcpu
);
9072 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
9074 if (kvm_cpu_has_injectable_intr(vcpu
))
9075 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9078 if (is_guest_mode(vcpu
) &&
9079 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
9080 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
9081 *req_immediate_exit
= true;
9083 WARN_ON(vcpu
->arch
.exception
.pending
);
9088 *req_immediate_exit
= true;
9094 static void process_nmi(struct kvm_vcpu
*vcpu
)
9099 * x86 is limited to one NMI running, and one NMI pending after it.
9100 * If an NMI is already in progress, limit further NMIs to just one.
9101 * Otherwise, allow two (and we'll inject the first one immediately).
9103 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
9106 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
9107 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
9108 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9111 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
9114 flags
|= seg
->g
<< 23;
9115 flags
|= seg
->db
<< 22;
9116 flags
|= seg
->l
<< 21;
9117 flags
|= seg
->avl
<< 20;
9118 flags
|= seg
->present
<< 15;
9119 flags
|= seg
->dpl
<< 13;
9120 flags
|= seg
->s
<< 12;
9121 flags
|= seg
->type
<< 8;
9125 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9127 struct kvm_segment seg
;
9130 kvm_get_segment(vcpu
, &seg
, n
);
9131 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
9134 offset
= 0x7f84 + n
* 12;
9136 offset
= 0x7f2c + (n
- 3) * 12;
9138 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
9139 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9140 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
9143 #ifdef CONFIG_X86_64
9144 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9146 struct kvm_segment seg
;
9150 kvm_get_segment(vcpu
, &seg
, n
);
9151 offset
= 0x7e00 + n
* 16;
9153 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
9154 put_smstate(u16
, buf
, offset
, seg
.selector
);
9155 put_smstate(u16
, buf
, offset
+ 2, flags
);
9156 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9157 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
9161 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
9164 struct kvm_segment seg
;
9168 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
9169 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
9170 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
9171 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
9173 for (i
= 0; i
< 8; i
++)
9174 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read_raw(vcpu
, i
));
9176 kvm_get_dr(vcpu
, 6, &val
);
9177 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
9178 kvm_get_dr(vcpu
, 7, &val
);
9179 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
9181 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9182 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
9183 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
9184 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
9185 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
9187 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9188 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
9189 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
9190 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
9191 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
9193 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9194 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
9195 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
9197 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9198 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
9199 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
9201 for (i
= 0; i
< 6; i
++)
9202 enter_smm_save_seg_32(vcpu
, buf
, i
);
9204 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
9207 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
9208 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
9211 #ifdef CONFIG_X86_64
9212 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
9215 struct kvm_segment seg
;
9219 for (i
= 0; i
< 16; i
++)
9220 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read_raw(vcpu
, i
));
9222 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
9223 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
9225 kvm_get_dr(vcpu
, 6, &val
);
9226 put_smstate(u64
, buf
, 0x7f68, val
);
9227 kvm_get_dr(vcpu
, 7, &val
);
9228 put_smstate(u64
, buf
, 0x7f60, val
);
9230 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
9231 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
9232 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
9234 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
9237 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
9239 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
9241 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9242 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
9243 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
9244 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
9245 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
9247 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9248 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
9249 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
9251 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9252 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
9253 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
9254 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
9255 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
9257 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9258 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
9259 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
9261 for (i
= 0; i
< 6; i
++)
9262 enter_smm_save_seg_64(vcpu
, buf
, i
);
9266 static void enter_smm(struct kvm_vcpu
*vcpu
)
9268 struct kvm_segment cs
, ds
;
9273 memset(buf
, 0, 512);
9274 #ifdef CONFIG_X86_64
9275 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9276 enter_smm_save_state_64(vcpu
, buf
);
9279 enter_smm_save_state_32(vcpu
, buf
);
9282 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9283 * state (e.g. leave guest mode) after we've saved the state into the
9284 * SMM state-save area.
9286 static_call(kvm_x86_enter_smm
)(vcpu
, buf
);
9288 kvm_smm_changed(vcpu
, true);
9289 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
9291 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
))
9292 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
9294 static_call(kvm_x86_set_nmi_mask
)(vcpu
, true);
9296 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
9297 kvm_rip_write(vcpu
, 0x8000);
9299 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
9300 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
9301 vcpu
->arch
.cr0
= cr0
;
9303 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
9305 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9306 dt
.address
= dt
.size
= 0;
9307 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
9309 kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
9311 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
9312 cs
.base
= vcpu
->arch
.smbase
;
9317 cs
.limit
= ds
.limit
= 0xffffffff;
9318 cs
.type
= ds
.type
= 0x3;
9319 cs
.dpl
= ds
.dpl
= 0;
9324 cs
.avl
= ds
.avl
= 0;
9325 cs
.present
= ds
.present
= 1;
9326 cs
.unusable
= ds
.unusable
= 0;
9327 cs
.padding
= ds
.padding
= 0;
9329 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9330 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
9331 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
9332 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
9333 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
9334 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
9336 #ifdef CONFIG_X86_64
9337 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9338 static_call(kvm_x86_set_efer
)(vcpu
, 0);
9341 kvm_update_cpuid_runtime(vcpu
);
9342 kvm_mmu_reset_context(vcpu
);
9345 static void process_smi(struct kvm_vcpu
*vcpu
)
9347 vcpu
->arch
.smi_pending
= true;
9348 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9351 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
9352 unsigned long *vcpu_bitmap
)
9356 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
9358 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
9359 NULL
, vcpu_bitmap
, cpus
);
9361 free_cpumask_var(cpus
);
9364 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
9366 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
9369 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
9373 if (!lapic_in_kernel(vcpu
))
9376 mutex_lock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9378 activate
= kvm_apicv_activated(vcpu
->kvm
);
9379 if (vcpu
->arch
.apicv_active
== activate
)
9382 vcpu
->arch
.apicv_active
= activate
;
9383 kvm_apic_update_apicv(vcpu
);
9384 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
9387 * When APICv gets disabled, we may still have injected interrupts
9388 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9389 * still active when the interrupt got accepted. Make sure
9390 * inject_pending_event() is called to check for that.
9392 if (!vcpu
->arch
.apicv_active
)
9393 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9396 mutex_unlock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9398 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
9400 void __kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9402 unsigned long old
, new;
9404 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
9405 !static_call(kvm_x86_check_apicv_inhibit_reasons
)(bit
))
9408 old
= new = kvm
->arch
.apicv_inhibit_reasons
;
9411 __clear_bit(bit
, &new);
9413 __set_bit(bit
, &new);
9415 if (!!old
!= !!new) {
9416 trace_kvm_apicv_update_request(activate
, bit
);
9417 kvm_make_all_cpus_request(kvm
, KVM_REQ_APICV_UPDATE
);
9418 kvm
->arch
.apicv_inhibit_reasons
= new;
9420 unsigned long gfn
= gpa_to_gfn(APIC_DEFAULT_PHYS_BASE
);
9421 kvm_zap_gfn_range(kvm
, gfn
, gfn
+1);
9424 kvm
->arch
.apicv_inhibit_reasons
= new;
9426 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update
);
9428 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9430 mutex_lock(&kvm
->arch
.apicv_update_lock
);
9431 __kvm_request_apicv_update(kvm
, activate
, bit
);
9432 mutex_unlock(&kvm
->arch
.apicv_update_lock
);
9434 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
9436 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
9438 if (!kvm_apic_present(vcpu
))
9441 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
9443 if (irqchip_split(vcpu
->kvm
))
9444 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9446 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9447 if (ioapic_in_kernel(vcpu
->kvm
))
9448 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9451 if (is_guest_mode(vcpu
))
9452 vcpu
->arch
.load_eoi_exitmap_pending
= true;
9454 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
9457 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
9459 u64 eoi_exit_bitmap
[4];
9461 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
9464 if (to_hv_vcpu(vcpu
)) {
9465 bitmap_or((ulong
*)eoi_exit_bitmap
,
9466 vcpu
->arch
.ioapic_handled_vectors
,
9467 to_hv_synic(vcpu
)->vec_bitmap
, 256);
9468 static_call(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
9472 static_call(kvm_x86_load_eoi_exitmap
)(
9473 vcpu
, (u64
*)vcpu
->arch
.ioapic_handled_vectors
);
9476 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
9477 unsigned long start
, unsigned long end
)
9479 unsigned long apic_address
;
9482 * The physical address of apic access page is stored in the VMCS.
9483 * Update it when it becomes invalid.
9485 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
9486 if (start
<= apic_address
&& apic_address
< end
)
9487 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
9490 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
9492 if (!lapic_in_kernel(vcpu
))
9495 if (!kvm_x86_ops
.set_apic_access_page_addr
)
9498 static_call(kvm_x86_set_apic_access_page_addr
)(vcpu
);
9501 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
9503 smp_send_reschedule(vcpu
->cpu
);
9505 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
9508 * Returns 1 to let vcpu_run() continue the guest execution loop without
9509 * exiting to the userspace. Otherwise, the value will be returned to the
9512 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
9516 dm_request_for_irq_injection(vcpu
) &&
9517 kvm_cpu_accept_dm_intr(vcpu
);
9518 fastpath_t exit_fastpath
;
9520 bool req_immediate_exit
= false;
9522 /* Forbid vmenter if vcpu dirty ring is soft-full */
9523 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
9524 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
9525 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
9526 trace_kvm_dirty_ring_exit(vcpu
);
9531 if (kvm_request_pending(vcpu
)) {
9532 if (kvm_check_request(KVM_REQ_VM_BUGGED
, vcpu
)) {
9536 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
9537 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
9542 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
9543 kvm_mmu_unload(vcpu
);
9544 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
9545 __kvm_migrate_timers(vcpu
);
9546 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
9547 kvm_gen_update_masterclock(vcpu
->kvm
);
9548 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
9549 kvm_gen_kvmclock_update(vcpu
);
9550 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
9551 r
= kvm_guest_time_update(vcpu
);
9555 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
9556 kvm_mmu_sync_roots(vcpu
);
9557 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
9558 kvm_mmu_load_pgd(vcpu
);
9559 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
9560 kvm_vcpu_flush_tlb_all(vcpu
);
9562 /* Flushing all ASIDs flushes the current ASID... */
9563 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
9565 kvm_service_local_tlb_flush_requests(vcpu
);
9567 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
9568 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
9572 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
9573 if (is_guest_mode(vcpu
)) {
9574 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
9576 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
9577 vcpu
->mmio_needed
= 0;
9582 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
9583 /* Page is swapped out. Do synthetic halt */
9584 vcpu
->arch
.apf
.halted
= true;
9588 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
9589 record_steal_time(vcpu
);
9590 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
9592 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
9594 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
9595 kvm_pmu_handle_event(vcpu
);
9596 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
9597 kvm_pmu_deliver_pmi(vcpu
);
9598 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
9599 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
9600 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
9601 vcpu
->arch
.ioapic_handled_vectors
)) {
9602 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
9603 vcpu
->run
->eoi
.vector
=
9604 vcpu
->arch
.pending_ioapic_eoi
;
9609 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
9610 vcpu_scan_ioapic(vcpu
);
9611 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
9612 vcpu_load_eoi_exitmap(vcpu
);
9613 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
9614 kvm_vcpu_reload_apic_access_page(vcpu
);
9615 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
9616 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9617 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
9621 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
9622 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9623 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
9627 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
9628 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
9630 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
9631 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
9637 * KVM_REQ_HV_STIMER has to be processed after
9638 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9639 * depend on the guest clock being up-to-date
9641 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
9642 kvm_hv_process_stimers(vcpu
);
9643 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
9644 kvm_vcpu_update_apicv(vcpu
);
9645 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
9646 kvm_check_async_pf_completion(vcpu
);
9647 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
9648 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
9650 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
9651 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
9654 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
9655 kvm_xen_has_interrupt(vcpu
)) {
9656 ++vcpu
->stat
.req_event
;
9657 r
= kvm_apic_accept_events(vcpu
);
9662 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
9667 r
= inject_pending_event(vcpu
, &req_immediate_exit
);
9673 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9675 if (kvm_lapic_enabled(vcpu
)) {
9676 update_cr8_intercept(vcpu
);
9677 kvm_lapic_sync_to_vapic(vcpu
);
9681 r
= kvm_mmu_reload(vcpu
);
9683 goto cancel_injection
;
9688 static_call(kvm_x86_prepare_guest_switch
)(vcpu
);
9691 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9692 * IPI are then delayed after guest entry, which ensures that they
9693 * result in virtual interrupt delivery.
9695 local_irq_disable();
9696 vcpu
->mode
= IN_GUEST_MODE
;
9698 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9701 * 1) We should set ->mode before checking ->requests. Please see
9702 * the comment in kvm_vcpu_exiting_guest_mode().
9704 * 2) For APICv, we should set ->mode before checking PID.ON. This
9705 * pairs with the memory barrier implicit in pi_test_and_set_on
9706 * (see vmx_deliver_posted_interrupt).
9708 * 3) This also orders the write to mode from any reads to the page
9709 * tables done while the VCPU is running. Please see the comment
9710 * in kvm_flush_remote_tlbs.
9712 smp_mb__after_srcu_read_unlock();
9715 * This handles the case where a posted interrupt was
9716 * notified with kvm_vcpu_kick. Assigned devices can
9717 * use the POSTED_INTR_VECTOR even if APICv is disabled,
9718 * so do it even if APICv is disabled on this vCPU.
9720 if (kvm_lapic_enabled(vcpu
))
9721 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9723 if (kvm_vcpu_exit_request(vcpu
)) {
9724 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9728 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9730 goto cancel_injection
;
9733 if (req_immediate_exit
) {
9734 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9735 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
9738 fpregs_assert_state_consistent();
9739 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9740 switch_fpu_return();
9742 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
9744 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
9745 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
9746 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
9747 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
9748 } else if (unlikely(hw_breakpoint_active())) {
9753 exit_fastpath
= static_call(kvm_x86_run
)(vcpu
);
9754 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
9757 if (kvm_lapic_enabled(vcpu
))
9758 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9760 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
9761 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
9767 * Do this here before restoring debug registers on the host. And
9768 * since we do this before handling the vmexit, a DR access vmexit
9769 * can (a) read the correct value of the debug registers, (b) set
9770 * KVM_DEBUGREG_WONT_EXIT again.
9772 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
9773 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
9774 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
9775 kvm_update_dr0123(vcpu
);
9776 kvm_update_dr7(vcpu
);
9780 * If the guest has used debug registers, at least dr7
9781 * will be disabled while returning to the host.
9782 * If we don't have active breakpoints in the host, we don't
9783 * care about the messed up debug address registers. But if
9784 * we have some of them active, restore the old state.
9786 if (hw_breakpoint_active())
9787 hw_breakpoint_restore();
9789 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
9790 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
9792 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9795 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
9798 * Consume any pending interrupts, including the possible source of
9799 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9800 * An instruction is required after local_irq_enable() to fully unblock
9801 * interrupts on processors that implement an interrupt shadow, the
9802 * stat.exits increment will do nicely.
9804 kvm_before_interrupt(vcpu
);
9807 local_irq_disable();
9808 kvm_after_interrupt(vcpu
);
9811 * Wait until after servicing IRQs to account guest time so that any
9812 * ticks that occurred while running the guest are properly accounted
9813 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9814 * of accounting via context tracking, but the loss of accuracy is
9815 * acceptable for all known use cases.
9817 vtime_account_guest_exit();
9819 if (lapic_in_kernel(vcpu
)) {
9820 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
9821 if (delta
!= S64_MIN
) {
9822 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
9823 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
9830 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9833 * Profile KVM exit RIPs:
9835 if (unlikely(prof_on
== KVM_PROFILING
)) {
9836 unsigned long rip
= kvm_rip_read(vcpu
);
9837 profile_hit(KVM_PROFILING
, (void *)rip
);
9840 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
9841 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9843 if (vcpu
->arch
.apic_attention
)
9844 kvm_lapic_sync_from_vapic(vcpu
);
9846 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
9850 if (req_immediate_exit
)
9851 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9852 static_call(kvm_x86_cancel_injection
)(vcpu
);
9853 if (unlikely(vcpu
->arch
.apic_attention
))
9854 kvm_lapic_sync_from_vapic(vcpu
);
9859 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
9861 if (!kvm_arch_vcpu_runnable(vcpu
) &&
9862 (!kvm_x86_ops
.pre_block
|| static_call(kvm_x86_pre_block
)(vcpu
) == 0)) {
9863 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9864 kvm_vcpu_block(vcpu
);
9865 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9867 if (kvm_x86_ops
.post_block
)
9868 static_call(kvm_x86_post_block
)(vcpu
);
9870 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
9874 if (kvm_apic_accept_events(vcpu
) < 0)
9876 switch(vcpu
->arch
.mp_state
) {
9877 case KVM_MP_STATE_HALTED
:
9878 case KVM_MP_STATE_AP_RESET_HOLD
:
9879 vcpu
->arch
.pv
.pv_unhalted
= false;
9880 vcpu
->arch
.mp_state
=
9881 KVM_MP_STATE_RUNNABLE
;
9883 case KVM_MP_STATE_RUNNABLE
:
9884 vcpu
->arch
.apf
.halted
= false;
9886 case KVM_MP_STATE_INIT_RECEIVED
:
9894 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
9896 if (is_guest_mode(vcpu
))
9897 kvm_check_nested_events(vcpu
);
9899 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
9900 !vcpu
->arch
.apf
.halted
);
9903 static int vcpu_run(struct kvm_vcpu
*vcpu
)
9906 struct kvm
*kvm
= vcpu
->kvm
;
9908 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9909 vcpu
->arch
.l1tf_flush_l1d
= true;
9912 if (kvm_vcpu_running(vcpu
)) {
9913 r
= vcpu_enter_guest(vcpu
);
9915 r
= vcpu_block(kvm
, vcpu
);
9921 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
9922 if (kvm_cpu_has_pending_timer(vcpu
))
9923 kvm_inject_pending_timer_irqs(vcpu
);
9925 if (dm_request_for_irq_injection(vcpu
) &&
9926 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
9928 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
9929 ++vcpu
->stat
.request_irq_exits
;
9933 if (__xfer_to_guest_mode_work_pending()) {
9934 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9935 r
= xfer_to_guest_mode_handle_work(vcpu
);
9938 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9942 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9947 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
9951 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9952 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
9953 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9957 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
9959 BUG_ON(!vcpu
->arch
.pio
.count
);
9961 return complete_emulated_io(vcpu
);
9965 * Implements the following, as a state machine:
9969 * for each mmio piece in the fragment
9977 * for each mmio piece in the fragment
9982 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
9984 struct kvm_run
*run
= vcpu
->run
;
9985 struct kvm_mmio_fragment
*frag
;
9988 BUG_ON(!vcpu
->mmio_needed
);
9990 /* Complete previous fragment */
9991 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
9992 len
= min(8u, frag
->len
);
9993 if (!vcpu
->mmio_is_write
)
9994 memcpy(frag
->data
, run
->mmio
.data
, len
);
9996 if (frag
->len
<= 8) {
9997 /* Switch to the next fragment. */
9999 vcpu
->mmio_cur_fragment
++;
10001 /* Go forward to the next mmio piece. */
10007 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
10008 vcpu
->mmio_needed
= 0;
10010 /* FIXME: return into emulator if single-stepping. */
10011 if (vcpu
->mmio_is_write
)
10013 vcpu
->mmio_read_completed
= 1;
10014 return complete_emulated_io(vcpu
);
10017 run
->exit_reason
= KVM_EXIT_MMIO
;
10018 run
->mmio
.phys_addr
= frag
->gpa
;
10019 if (vcpu
->mmio_is_write
)
10020 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
10021 run
->mmio
.len
= min(8u, frag
->len
);
10022 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
10023 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
10027 static void kvm_save_current_fpu(struct fpu
*fpu
)
10030 * If the target FPU state is not resident in the CPU registers, just
10031 * memcpy() from current, else save CPU state directly to the target.
10033 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
10034 memcpy(&fpu
->state
, ¤t
->thread
.fpu
.state
,
10035 fpu_kernel_xstate_size
);
10037 save_fpregs_to_fpstate(fpu
);
10040 /* Swap (qemu) user FPU context for the guest FPU context. */
10041 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
10045 kvm_save_current_fpu(vcpu
->arch
.user_fpu
);
10048 * Guests with protected state can't have it set by the hypervisor,
10049 * so skip trying to set it.
10051 if (vcpu
->arch
.guest_fpu
)
10052 /* PKRU is separately restored in kvm_x86_ops.run. */
10053 __restore_fpregs_from_fpstate(&vcpu
->arch
.guest_fpu
->state
,
10054 ~XFEATURE_MASK_PKRU
);
10056 fpregs_mark_activate();
10062 /* When vcpu_run ends, restore user space FPU context. */
10063 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
10068 * Guests with protected state can't have it read by the hypervisor,
10069 * so skip trying to save it.
10071 if (vcpu
->arch
.guest_fpu
)
10072 kvm_save_current_fpu(vcpu
->arch
.guest_fpu
);
10074 restore_fpregs_from_fpstate(&vcpu
->arch
.user_fpu
->state
);
10076 fpregs_mark_activate();
10079 ++vcpu
->stat
.fpu_reload
;
10083 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
10085 struct kvm_run
*kvm_run
= vcpu
->run
;
10089 kvm_sigset_activate(vcpu
);
10090 kvm_run
->flags
= 0;
10091 kvm_load_guest_fpu(vcpu
);
10093 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
10094 if (kvm_run
->immediate_exit
) {
10098 kvm_vcpu_block(vcpu
);
10099 if (kvm_apic_accept_events(vcpu
) < 0) {
10103 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
10105 if (signal_pending(current
)) {
10107 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
10108 ++vcpu
->stat
.signal_exits
;
10113 if ((kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) ||
10114 (kvm_run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)) {
10119 if (kvm_run
->kvm_dirty_regs
) {
10120 r
= sync_regs(vcpu
);
10125 /* re-sync apic's tpr */
10126 if (!lapic_in_kernel(vcpu
)) {
10127 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
10133 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
10134 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
10135 vcpu
->arch
.complete_userspace_io
= NULL
;
10140 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
10142 if (kvm_run
->immediate_exit
)
10145 r
= vcpu_run(vcpu
);
10148 kvm_put_guest_fpu(vcpu
);
10149 if (kvm_run
->kvm_valid_regs
)
10151 post_kvm_run_save(vcpu
);
10152 kvm_sigset_deactivate(vcpu
);
10158 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10160 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
10162 * We are here if userspace calls get_regs() in the middle of
10163 * instruction emulation. Registers state needs to be copied
10164 * back from emulation context to vcpu. Userspace shouldn't do
10165 * that usually, but some bad designed PV devices (vmware
10166 * backdoor interface) need this to work
10168 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
10169 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10171 regs
->rax
= kvm_rax_read(vcpu
);
10172 regs
->rbx
= kvm_rbx_read(vcpu
);
10173 regs
->rcx
= kvm_rcx_read(vcpu
);
10174 regs
->rdx
= kvm_rdx_read(vcpu
);
10175 regs
->rsi
= kvm_rsi_read(vcpu
);
10176 regs
->rdi
= kvm_rdi_read(vcpu
);
10177 regs
->rsp
= kvm_rsp_read(vcpu
);
10178 regs
->rbp
= kvm_rbp_read(vcpu
);
10179 #ifdef CONFIG_X86_64
10180 regs
->r8
= kvm_r8_read(vcpu
);
10181 regs
->r9
= kvm_r9_read(vcpu
);
10182 regs
->r10
= kvm_r10_read(vcpu
);
10183 regs
->r11
= kvm_r11_read(vcpu
);
10184 regs
->r12
= kvm_r12_read(vcpu
);
10185 regs
->r13
= kvm_r13_read(vcpu
);
10186 regs
->r14
= kvm_r14_read(vcpu
);
10187 regs
->r15
= kvm_r15_read(vcpu
);
10190 regs
->rip
= kvm_rip_read(vcpu
);
10191 regs
->rflags
= kvm_get_rflags(vcpu
);
10194 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10197 __get_regs(vcpu
, regs
);
10202 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10204 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
10205 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10207 kvm_rax_write(vcpu
, regs
->rax
);
10208 kvm_rbx_write(vcpu
, regs
->rbx
);
10209 kvm_rcx_write(vcpu
, regs
->rcx
);
10210 kvm_rdx_write(vcpu
, regs
->rdx
);
10211 kvm_rsi_write(vcpu
, regs
->rsi
);
10212 kvm_rdi_write(vcpu
, regs
->rdi
);
10213 kvm_rsp_write(vcpu
, regs
->rsp
);
10214 kvm_rbp_write(vcpu
, regs
->rbp
);
10215 #ifdef CONFIG_X86_64
10216 kvm_r8_write(vcpu
, regs
->r8
);
10217 kvm_r9_write(vcpu
, regs
->r9
);
10218 kvm_r10_write(vcpu
, regs
->r10
);
10219 kvm_r11_write(vcpu
, regs
->r11
);
10220 kvm_r12_write(vcpu
, regs
->r12
);
10221 kvm_r13_write(vcpu
, regs
->r13
);
10222 kvm_r14_write(vcpu
, regs
->r14
);
10223 kvm_r15_write(vcpu
, regs
->r15
);
10226 kvm_rip_write(vcpu
, regs
->rip
);
10227 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
10229 vcpu
->arch
.exception
.pending
= false;
10231 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10234 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10237 __set_regs(vcpu
, regs
);
10242 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
10244 struct kvm_segment cs
;
10246 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10250 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
10252 static void __get_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10254 struct desc_ptr dt
;
10256 if (vcpu
->arch
.guest_state_protected
)
10257 goto skip_protected_regs
;
10259 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10260 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10261 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10262 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10263 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10264 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10266 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10267 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10269 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
10270 sregs
->idt
.limit
= dt
.size
;
10271 sregs
->idt
.base
= dt
.address
;
10272 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
10273 sregs
->gdt
.limit
= dt
.size
;
10274 sregs
->gdt
.base
= dt
.address
;
10276 sregs
->cr2
= vcpu
->arch
.cr2
;
10277 sregs
->cr3
= kvm_read_cr3(vcpu
);
10279 skip_protected_regs
:
10280 sregs
->cr0
= kvm_read_cr0(vcpu
);
10281 sregs
->cr4
= kvm_read_cr4(vcpu
);
10282 sregs
->cr8
= kvm_get_cr8(vcpu
);
10283 sregs
->efer
= vcpu
->arch
.efer
;
10284 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
10287 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10289 __get_sregs_common(vcpu
, sregs
);
10291 if (vcpu
->arch
.guest_state_protected
)
10294 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
10295 set_bit(vcpu
->arch
.interrupt
.nr
,
10296 (unsigned long *)sregs
->interrupt_bitmap
);
10299 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10303 __get_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
);
10305 if (vcpu
->arch
.guest_state_protected
)
10308 if (is_pae_paging(vcpu
)) {
10309 for (i
= 0 ; i
< 4 ; i
++)
10310 sregs2
->pdptrs
[i
] = kvm_pdptr_read(vcpu
, i
);
10311 sregs2
->flags
|= KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10315 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
10316 struct kvm_sregs
*sregs
)
10319 __get_sregs(vcpu
, sregs
);
10324 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
10325 struct kvm_mp_state
*mp_state
)
10330 if (kvm_mpx_supported())
10331 kvm_load_guest_fpu(vcpu
);
10333 r
= kvm_apic_accept_events(vcpu
);
10338 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
10339 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
10340 vcpu
->arch
.pv
.pv_unhalted
)
10341 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
10343 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
10346 if (kvm_mpx_supported())
10347 kvm_put_guest_fpu(vcpu
);
10352 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
10353 struct kvm_mp_state
*mp_state
)
10359 if (!lapic_in_kernel(vcpu
) &&
10360 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
10364 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10365 * INIT state; latched init should be reported using
10366 * KVM_SET_VCPU_EVENTS, so reject it here.
10368 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
10369 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
10370 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
10373 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
10374 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
10375 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
10377 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
10378 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10386 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
10387 int reason
, bool has_error_code
, u32 error_code
)
10389 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
10392 init_emulate_ctxt(vcpu
);
10394 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
10395 has_error_code
, error_code
);
10397 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
10398 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
10399 vcpu
->run
->internal
.ndata
= 0;
10403 kvm_rip_write(vcpu
, ctxt
->eip
);
10404 kvm_set_rflags(vcpu
, ctxt
->eflags
);
10407 EXPORT_SYMBOL_GPL(kvm_task_switch
);
10409 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10411 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
10413 * When EFER.LME and CR0.PG are set, the processor is in
10414 * 64-bit mode (though maybe in a 32-bit code segment).
10415 * CR4.PAE and EFER.LMA must be set.
10417 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
10419 if (kvm_vcpu_is_illegal_gpa(vcpu
, sregs
->cr3
))
10423 * Not in 64-bit mode: EFER.LMA is clear and the code
10424 * segment cannot be 64-bit.
10426 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
10430 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
10433 static int __set_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
,
10434 int *mmu_reset_needed
, bool update_pdptrs
)
10436 struct msr_data apic_base_msr
;
10438 struct desc_ptr dt
;
10440 if (!kvm_is_valid_sregs(vcpu
, sregs
))
10443 apic_base_msr
.data
= sregs
->apic_base
;
10444 apic_base_msr
.host_initiated
= true;
10445 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
10448 if (vcpu
->arch
.guest_state_protected
)
10451 dt
.size
= sregs
->idt
.limit
;
10452 dt
.address
= sregs
->idt
.base
;
10453 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
10454 dt
.size
= sregs
->gdt
.limit
;
10455 dt
.address
= sregs
->gdt
.base
;
10456 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
10458 vcpu
->arch
.cr2
= sregs
->cr2
;
10459 *mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
10460 vcpu
->arch
.cr3
= sregs
->cr3
;
10461 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
10463 kvm_set_cr8(vcpu
, sregs
->cr8
);
10465 *mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
10466 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
10468 *mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
10469 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
10470 vcpu
->arch
.cr0
= sregs
->cr0
;
10472 *mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
10473 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
10475 if (update_pdptrs
) {
10476 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10477 if (is_pae_paging(vcpu
)) {
10478 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
10479 *mmu_reset_needed
= 1;
10481 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10484 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10485 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10486 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10487 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10488 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10489 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10491 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10492 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10494 update_cr8_intercept(vcpu
);
10496 /* Older userspace won't unhalt the vcpu on reset. */
10497 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
10498 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
10499 !is_protmode(vcpu
))
10500 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10505 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10507 int pending_vec
, max_bits
;
10508 int mmu_reset_needed
= 0;
10509 int ret
= __set_sregs_common(vcpu
, sregs
, &mmu_reset_needed
, true);
10514 if (mmu_reset_needed
)
10515 kvm_mmu_reset_context(vcpu
);
10517 max_bits
= KVM_NR_INTERRUPTS
;
10518 pending_vec
= find_first_bit(
10519 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
10521 if (pending_vec
< max_bits
) {
10522 kvm_queue_interrupt(vcpu
, pending_vec
, false);
10523 pr_debug("Set back pending irq %d\n", pending_vec
);
10524 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10529 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10531 int mmu_reset_needed
= 0;
10532 bool valid_pdptrs
= sregs2
->flags
& KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10533 bool pae
= (sregs2
->cr0
& X86_CR0_PG
) && (sregs2
->cr4
& X86_CR4_PAE
) &&
10534 !(sregs2
->efer
& EFER_LMA
);
10537 if (sregs2
->flags
& ~KVM_SREGS2_FLAGS_PDPTRS_VALID
)
10540 if (valid_pdptrs
&& (!pae
|| vcpu
->arch
.guest_state_protected
))
10543 ret
= __set_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
,
10544 &mmu_reset_needed
, !valid_pdptrs
);
10548 if (valid_pdptrs
) {
10549 for (i
= 0; i
< 4 ; i
++)
10550 kvm_pdptr_write(vcpu
, i
, sregs2
->pdptrs
[i
]);
10552 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
10553 mmu_reset_needed
= 1;
10554 vcpu
->arch
.pdptrs_from_userspace
= true;
10556 if (mmu_reset_needed
)
10557 kvm_mmu_reset_context(vcpu
);
10561 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
10562 struct kvm_sregs
*sregs
)
10567 ret
= __set_sregs(vcpu
, sregs
);
10572 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
10573 struct kvm_guest_debug
*dbg
)
10575 unsigned long rflags
;
10578 if (vcpu
->arch
.guest_state_protected
)
10583 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
10585 if (vcpu
->arch
.exception
.pending
)
10587 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
10588 kvm_queue_exception(vcpu
, DB_VECTOR
);
10590 kvm_queue_exception(vcpu
, BP_VECTOR
);
10594 * Read rflags as long as potentially injected trace flags are still
10597 rflags
= kvm_get_rflags(vcpu
);
10599 vcpu
->guest_debug
= dbg
->control
;
10600 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
10601 vcpu
->guest_debug
= 0;
10603 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
10604 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
10605 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
10606 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
10608 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
10609 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
10611 kvm_update_dr7(vcpu
);
10613 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10614 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
10617 * Trigger an rflags update that will inject or remove the trace
10620 kvm_set_rflags(vcpu
, rflags
);
10622 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
10632 * Translate a guest virtual address to a guest physical address.
10634 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
10635 struct kvm_translation
*tr
)
10637 unsigned long vaddr
= tr
->linear_address
;
10643 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10644 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
10645 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10646 tr
->physical_address
= gpa
;
10647 tr
->valid
= gpa
!= UNMAPPED_GVA
;
10655 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10657 struct fxregs_state
*fxsave
;
10659 if (!vcpu
->arch
.guest_fpu
)
10664 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10665 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
10666 fpu
->fcw
= fxsave
->cwd
;
10667 fpu
->fsw
= fxsave
->swd
;
10668 fpu
->ftwx
= fxsave
->twd
;
10669 fpu
->last_opcode
= fxsave
->fop
;
10670 fpu
->last_ip
= fxsave
->rip
;
10671 fpu
->last_dp
= fxsave
->rdp
;
10672 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
10678 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10680 struct fxregs_state
*fxsave
;
10682 if (!vcpu
->arch
.guest_fpu
)
10687 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10689 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
10690 fxsave
->cwd
= fpu
->fcw
;
10691 fxsave
->swd
= fpu
->fsw
;
10692 fxsave
->twd
= fpu
->ftwx
;
10693 fxsave
->fop
= fpu
->last_opcode
;
10694 fxsave
->rip
= fpu
->last_ip
;
10695 fxsave
->rdp
= fpu
->last_dp
;
10696 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
10702 static void store_regs(struct kvm_vcpu
*vcpu
)
10704 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
10706 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
10707 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10709 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
10710 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
10712 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
10713 kvm_vcpu_ioctl_x86_get_vcpu_events(
10714 vcpu
, &vcpu
->run
->s
.regs
.events
);
10717 static int sync_regs(struct kvm_vcpu
*vcpu
)
10719 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
10720 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10721 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
10723 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
10724 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
10726 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
10728 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
10729 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10730 vcpu
, &vcpu
->run
->s
.regs
.events
))
10732 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
10738 static void fx_init(struct kvm_vcpu
*vcpu
)
10740 if (!vcpu
->arch
.guest_fpu
)
10743 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
10744 if (boot_cpu_has(X86_FEATURE_XSAVES
))
10745 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
10746 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
10749 * Ensure guest xcr0 is valid for loading
10751 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10753 vcpu
->arch
.cr0
|= X86_CR0_ET
;
10756 void kvm_free_guest_fpu(struct kvm_vcpu
*vcpu
)
10758 if (vcpu
->arch
.guest_fpu
) {
10759 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
10760 vcpu
->arch
.guest_fpu
= NULL
;
10763 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu
);
10765 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
10767 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
10768 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10769 "guest TSC will not be reliable\n");
10774 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
10779 vcpu
->arch
.last_vmentry_cpu
= -1;
10780 vcpu
->arch
.regs_avail
= ~0;
10781 vcpu
->arch
.regs_dirty
= ~0;
10783 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
10784 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10786 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
10788 r
= kvm_mmu_create(vcpu
);
10792 if (irqchip_in_kernel(vcpu
->kvm
)) {
10793 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
10795 goto fail_mmu_destroy
;
10796 if (kvm_apicv_activated(vcpu
->kvm
))
10797 vcpu
->arch
.apicv_active
= true;
10799 static_branch_inc(&kvm_has_noapic_vcpu
);
10803 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
10805 goto fail_free_lapic
;
10806 vcpu
->arch
.pio_data
= page_address(page
);
10808 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
10809 GFP_KERNEL_ACCOUNT
);
10810 if (!vcpu
->arch
.mce_banks
)
10811 goto fail_free_pio_data
;
10812 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
10814 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
10815 GFP_KERNEL_ACCOUNT
))
10816 goto fail_free_mce_banks
;
10818 if (!alloc_emulate_ctxt(vcpu
))
10819 goto free_wbinvd_dirty_mask
;
10821 vcpu
->arch
.user_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10822 GFP_KERNEL_ACCOUNT
);
10823 if (!vcpu
->arch
.user_fpu
) {
10824 pr_err("kvm: failed to allocate userspace's fpu\n");
10825 goto free_emulate_ctxt
;
10828 vcpu
->arch
.guest_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10829 GFP_KERNEL_ACCOUNT
);
10830 if (!vcpu
->arch
.guest_fpu
) {
10831 pr_err("kvm: failed to allocate vcpu's fpu\n");
10832 goto free_user_fpu
;
10836 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
10837 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
10839 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
10841 kvm_async_pf_hash_reset(vcpu
);
10842 kvm_pmu_init(vcpu
);
10844 vcpu
->arch
.pending_external_vector
= -1;
10845 vcpu
->arch
.preempted_in_kernel
= false;
10847 #if IS_ENABLED(CONFIG_HYPERV)
10848 vcpu
->arch
.hv_root_tdp
= INVALID_PAGE
;
10851 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
10853 goto free_guest_fpu
;
10855 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
10856 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
10857 kvm_vcpu_mtrr_init(vcpu
);
10859 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
10860 kvm_vcpu_reset(vcpu
, false);
10861 kvm_init_mmu(vcpu
);
10866 kvm_free_guest_fpu(vcpu
);
10868 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10870 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10871 free_wbinvd_dirty_mask
:
10872 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10873 fail_free_mce_banks
:
10874 kfree(vcpu
->arch
.mce_banks
);
10875 fail_free_pio_data
:
10876 free_page((unsigned long)vcpu
->arch
.pio_data
);
10878 kvm_free_lapic(vcpu
);
10880 kvm_mmu_destroy(vcpu
);
10884 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
10886 struct kvm
*kvm
= vcpu
->kvm
;
10888 if (mutex_lock_killable(&vcpu
->mutex
))
10891 kvm_synchronize_tsc(vcpu
, 0);
10894 /* poll control enabled by default */
10895 vcpu
->arch
.msr_kvm_poll_control
= 1;
10897 mutex_unlock(&vcpu
->mutex
);
10899 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
10900 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
10901 KVMCLOCK_SYNC_PERIOD
);
10904 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
10908 kvmclock_reset(vcpu
);
10910 static_call(kvm_x86_vcpu_free
)(vcpu
);
10912 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10913 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10914 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10915 kvm_free_guest_fpu(vcpu
);
10917 kvm_hv_vcpu_uninit(vcpu
);
10918 kvm_pmu_destroy(vcpu
);
10919 kfree(vcpu
->arch
.mce_banks
);
10920 kvm_free_lapic(vcpu
);
10921 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10922 kvm_mmu_destroy(vcpu
);
10923 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10924 free_page((unsigned long)vcpu
->arch
.pio_data
);
10925 kvfree(vcpu
->arch
.cpuid_entries
);
10926 if (!lapic_in_kernel(vcpu
))
10927 static_branch_dec(&kvm_has_noapic_vcpu
);
10930 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
10932 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
10933 unsigned long new_cr0
;
10936 kvm_lapic_reset(vcpu
, init_event
);
10938 vcpu
->arch
.hflags
= 0;
10940 vcpu
->arch
.smi_pending
= 0;
10941 vcpu
->arch
.smi_count
= 0;
10942 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
10943 vcpu
->arch
.nmi_pending
= 0;
10944 vcpu
->arch
.nmi_injected
= false;
10945 kvm_clear_interrupt_queue(vcpu
);
10946 kvm_clear_exception_queue(vcpu
);
10948 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
10949 kvm_update_dr0123(vcpu
);
10950 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
10951 vcpu
->arch
.dr7
= DR7_FIXED_1
;
10952 kvm_update_dr7(vcpu
);
10954 vcpu
->arch
.cr2
= 0;
10956 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10957 vcpu
->arch
.apf
.msr_en_val
= 0;
10958 vcpu
->arch
.apf
.msr_int_val
= 0;
10959 vcpu
->arch
.st
.msr_val
= 0;
10961 kvmclock_reset(vcpu
);
10963 kvm_clear_async_pf_completion_queue(vcpu
);
10964 kvm_async_pf_hash_reset(vcpu
);
10965 vcpu
->arch
.apf
.halted
= false;
10967 if (vcpu
->arch
.guest_fpu
&& kvm_mpx_supported()) {
10968 void *mpx_state_buffer
;
10971 * To avoid have the INIT path from kvm_apic_has_events() that be
10972 * called with loaded FPU and does not let userspace fix the state.
10975 kvm_put_guest_fpu(vcpu
);
10976 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10978 if (mpx_state_buffer
)
10979 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
10980 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10982 if (mpx_state_buffer
)
10983 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
10985 kvm_load_guest_fpu(vcpu
);
10989 kvm_pmu_reset(vcpu
);
10990 vcpu
->arch
.smbase
= 0x30000;
10992 vcpu
->arch
.msr_misc_features_enables
= 0;
10994 __kvm_set_xcr(vcpu
, 0, XFEATURE_MASK_FP
);
10995 __kvm_set_msr(vcpu
, MSR_IA32_XSS
, 0, true);
10998 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
10999 vcpu
->arch
.regs_avail
= ~0;
11000 vcpu
->arch
.regs_dirty
= ~0;
11003 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11004 * if no CPUID match is found. Note, it's impossible to get a match at
11005 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11006 * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
11007 * But, go through the motions in case that's ever remedied.
11010 if (!kvm_cpuid(vcpu
, &eax
, &dummy
, &dummy
, &dummy
, true))
11012 kvm_rdx_write(vcpu
, eax
);
11014 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
11016 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
11017 kvm_rip_write(vcpu
, 0xfff0);
11019 vcpu
->arch
.cr3
= 0;
11020 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
11023 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11024 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11025 * (or qualify) that with a footnote stating that CD/NW are preserved.
11027 new_cr0
= X86_CR0_ET
;
11029 new_cr0
|= (old_cr0
& (X86_CR0_NW
| X86_CR0_CD
));
11031 new_cr0
|= X86_CR0_NW
| X86_CR0_CD
;
11033 static_call(kvm_x86_set_cr0
)(vcpu
, new_cr0
);
11034 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
11035 static_call(kvm_x86_set_efer
)(vcpu
, 0);
11036 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
11039 * Reset the MMU context if paging was enabled prior to INIT (which is
11040 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
11041 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11042 * checked because it is unconditionally cleared on INIT and all other
11043 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11044 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11046 if (old_cr0
& X86_CR0_PG
)
11047 kvm_mmu_reset_context(vcpu
);
11050 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11051 * APM states the TLBs are untouched by INIT, but it also states that
11052 * the TLBs are flushed on "External initialization of the processor."
11053 * Flush the guest TLB regardless of vendor, there is no meaningful
11054 * benefit in relying on the guest to flush the TLB immediately after
11055 * INIT. A spurious TLB flush is benign and likely negligible from a
11056 * performance perspective.
11059 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11061 EXPORT_SYMBOL_GPL(kvm_vcpu_reset
);
11063 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
11065 struct kvm_segment cs
;
11067 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11068 cs
.selector
= vector
<< 8;
11069 cs
.base
= vector
<< 12;
11070 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11071 kvm_rip_write(vcpu
, 0);
11073 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
11075 int kvm_arch_hardware_enable(void)
11078 struct kvm_vcpu
*vcpu
;
11083 bool stable
, backwards_tsc
= false;
11085 kvm_user_return_msr_cpu_online();
11086 ret
= static_call(kvm_x86_hardware_enable
)();
11090 local_tsc
= rdtsc();
11091 stable
= !kvm_check_tsc_unstable();
11092 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11093 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11094 if (!stable
&& vcpu
->cpu
== smp_processor_id())
11095 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
11096 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
11097 backwards_tsc
= true;
11098 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
11099 max_tsc
= vcpu
->arch
.last_host_tsc
;
11105 * Sometimes, even reliable TSCs go backwards. This happens on
11106 * platforms that reset TSC during suspend or hibernate actions, but
11107 * maintain synchronization. We must compensate. Fortunately, we can
11108 * detect that condition here, which happens early in CPU bringup,
11109 * before any KVM threads can be running. Unfortunately, we can't
11110 * bring the TSCs fully up to date with real time, as we aren't yet far
11111 * enough into CPU bringup that we know how much real time has actually
11112 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11113 * variables that haven't been updated yet.
11115 * So we simply find the maximum observed TSC above, then record the
11116 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11117 * the adjustment will be applied. Note that we accumulate
11118 * adjustments, in case multiple suspend cycles happen before some VCPU
11119 * gets a chance to run again. In the event that no KVM threads get a
11120 * chance to run, we will miss the entire elapsed period, as we'll have
11121 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11122 * loose cycle time. This isn't too big a deal, since the loss will be
11123 * uniform across all VCPUs (not to mention the scenario is extremely
11124 * unlikely). It is possible that a second hibernate recovery happens
11125 * much faster than a first, causing the observed TSC here to be
11126 * smaller; this would require additional padding adjustment, which is
11127 * why we set last_host_tsc to the local tsc observed here.
11129 * N.B. - this code below runs only on platforms with reliable TSC,
11130 * as that is the only way backwards_tsc is set above. Also note
11131 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11132 * have the same delta_cyc adjustment applied if backwards_tsc
11133 * is detected. Note further, this adjustment is only done once,
11134 * as we reset last_host_tsc on all VCPUs to stop this from being
11135 * called multiple times (one for each physical CPU bringup).
11137 * Platforms with unreliable TSCs don't have to deal with this, they
11138 * will be compensated by the logic in vcpu_load, which sets the TSC to
11139 * catchup mode. This will catchup all VCPUs to real time, but cannot
11140 * guarantee that they stay in perfect synchronization.
11142 if (backwards_tsc
) {
11143 u64 delta_cyc
= max_tsc
- local_tsc
;
11144 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11145 kvm
->arch
.backwards_tsc_observed
= true;
11146 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11147 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
11148 vcpu
->arch
.last_host_tsc
= local_tsc
;
11149 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
11153 * We have to disable TSC offset matching.. if you were
11154 * booting a VM while issuing an S4 host suspend....
11155 * you may have some problem. Solving this issue is
11156 * left as an exercise to the reader.
11158 kvm
->arch
.last_tsc_nsec
= 0;
11159 kvm
->arch
.last_tsc_write
= 0;
11166 void kvm_arch_hardware_disable(void)
11168 static_call(kvm_x86_hardware_disable
)();
11169 drop_user_return_notifiers();
11172 int kvm_arch_hardware_setup(void *opaque
)
11174 struct kvm_x86_init_ops
*ops
= opaque
;
11177 rdmsrl_safe(MSR_EFER
, &host_efer
);
11179 if (boot_cpu_has(X86_FEATURE_XSAVES
))
11180 rdmsrl(MSR_IA32_XSS
, host_xss
);
11182 r
= ops
->hardware_setup();
11186 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
11187 kvm_ops_static_call_update();
11189 if (ops
->intel_pt_intr_in_guest
&& ops
->intel_pt_intr_in_guest())
11190 kvm_guest_cbs
.handle_intel_pt_intr
= kvm_handle_intel_pt_intr
;
11191 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
11193 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
11196 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11197 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
11198 #undef __kvm_cpu_cap_has
11200 if (kvm_has_tsc_control
) {
11202 * Make sure the user can only configure tsc_khz values that
11203 * fit into a signed integer.
11204 * A min value is not calculated because it will always
11205 * be 1 on all machines.
11207 u64 max
= min(0x7fffffffULL
,
11208 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
11209 kvm_max_guest_tsc_khz
= max
;
11211 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
11214 kvm_init_msr_list();
11218 void kvm_arch_hardware_unsetup(void)
11220 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
11221 kvm_guest_cbs
.handle_intel_pt_intr
= NULL
;
11223 static_call(kvm_x86_hardware_unsetup
)();
11226 int kvm_arch_check_processor_compat(void *opaque
)
11228 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
11229 struct kvm_x86_init_ops
*ops
= opaque
;
11231 WARN_ON(!irqs_disabled());
11233 if (__cr4_reserved_bits(cpu_has
, c
) !=
11234 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
11237 return ops
->check_processor_compatibility();
11240 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
11242 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
11244 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
11246 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
11248 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
11251 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
11252 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
11254 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
11256 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
11258 vcpu
->arch
.l1tf_flush_l1d
= true;
11259 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
11260 pmu
->need_cleanup
= true;
11261 kvm_make_request(KVM_REQ_PMU
, vcpu
);
11263 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
11266 void kvm_arch_free_vm(struct kvm
*kvm
)
11268 kfree(to_kvm_hv(kvm
)->hv_pa_pg
);
11273 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
11280 ret
= kvm_page_track_init(kvm
);
11284 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
11285 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
11286 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
11287 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
11288 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
11289 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
11291 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11292 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
11293 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11294 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
11295 &kvm
->arch
.irq_sources_bitmap
);
11297 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
11298 mutex_init(&kvm
->arch
.apic_map_lock
);
11299 raw_spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
11301 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
11302 pvclock_update_vm_gtod_copy(kvm
);
11304 kvm
->arch
.guest_can_read_msr_platform_info
= true;
11306 #if IS_ENABLED(CONFIG_HYPERV)
11307 spin_lock_init(&kvm
->arch
.hv_root_tdp_lock
);
11308 kvm
->arch
.hv_root_tdp
= INVALID_PAGE
;
11311 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
11312 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
11314 kvm_apicv_init(kvm
);
11315 kvm_hv_init_vm(kvm
);
11316 kvm_mmu_init_vm(kvm
);
11317 kvm_xen_init_vm(kvm
);
11319 return static_call(kvm_x86_vm_init
)(kvm
);
11322 int kvm_arch_post_init_vm(struct kvm
*kvm
)
11324 return kvm_mmu_post_init_vm(kvm
);
11327 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
11330 kvm_mmu_unload(vcpu
);
11334 static void kvm_free_vcpus(struct kvm
*kvm
)
11337 struct kvm_vcpu
*vcpu
;
11340 * Unpin any mmu pages first.
11342 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11343 kvm_clear_async_pf_completion_queue(vcpu
);
11344 kvm_unload_vcpu_mmu(vcpu
);
11346 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11347 kvm_vcpu_destroy(vcpu
);
11349 mutex_lock(&kvm
->lock
);
11350 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
11351 kvm
->vcpus
[i
] = NULL
;
11353 atomic_set(&kvm
->online_vcpus
, 0);
11354 mutex_unlock(&kvm
->lock
);
11357 void kvm_arch_sync_events(struct kvm
*kvm
)
11359 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
11360 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
11364 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
11367 * __x86_set_memory_region: Setup KVM internal memory slot
11369 * @kvm: the kvm pointer to the VM.
11370 * @id: the slot ID to setup.
11371 * @gpa: the GPA to install the slot (unused when @size == 0).
11372 * @size: the size of the slot. Set to zero to uninstall a slot.
11374 * This function helps to setup a KVM internal memory slot. Specify
11375 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11376 * slot. The return code can be one of the following:
11378 * HVA: on success (uninstall will return a bogus HVA)
11381 * The caller should always use IS_ERR() to check the return value
11382 * before use. Note, the KVM internal memory slots are guaranteed to
11383 * remain valid and unchanged until the VM is destroyed, i.e., the
11384 * GPA->HVA translation will not change. However, the HVA is a user
11385 * address, i.e. its accessibility is not guaranteed, and must be
11386 * accessed via __copy_{to,from}_user().
11388 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
11392 unsigned long hva
, old_npages
;
11393 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
11394 struct kvm_memory_slot
*slot
;
11396 /* Called with kvm->slots_lock held. */
11397 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
11398 return ERR_PTR_USR(-EINVAL
);
11400 slot
= id_to_memslot(slots
, id
);
11402 if (slot
&& slot
->npages
)
11403 return ERR_PTR_USR(-EEXIST
);
11406 * MAP_SHARED to prevent internal slot pages from being moved
11409 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
11410 MAP_SHARED
| MAP_ANONYMOUS
, 0);
11411 if (IS_ERR((void *)hva
))
11412 return (void __user
*)hva
;
11414 if (!slot
|| !slot
->npages
)
11417 old_npages
= slot
->npages
;
11418 hva
= slot
->userspace_addr
;
11421 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11422 struct kvm_userspace_memory_region m
;
11424 m
.slot
= id
| (i
<< 16);
11426 m
.guest_phys_addr
= gpa
;
11427 m
.userspace_addr
= hva
;
11428 m
.memory_size
= size
;
11429 r
= __kvm_set_memory_region(kvm
, &m
);
11431 return ERR_PTR_USR(r
);
11435 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
11437 return (void __user
*)hva
;
11439 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
11441 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
11443 kvm_mmu_pre_destroy_vm(kvm
);
11446 void kvm_arch_destroy_vm(struct kvm
*kvm
)
11448 if (current
->mm
== kvm
->mm
) {
11450 * Free memory regions allocated on behalf of userspace,
11451 * unless the the memory map has changed due to process exit
11454 mutex_lock(&kvm
->slots_lock
);
11455 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
11457 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
11459 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
11460 mutex_unlock(&kvm
->slots_lock
);
11462 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
11463 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
11464 kvm_pic_destroy(kvm
);
11465 kvm_ioapic_destroy(kvm
);
11466 kvm_free_vcpus(kvm
);
11467 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
11468 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
11469 kvm_mmu_uninit_vm(kvm
);
11470 kvm_page_track_cleanup(kvm
);
11471 kvm_xen_destroy_vm(kvm
);
11472 kvm_hv_destroy_vm(kvm
);
11475 static void memslot_rmap_free(struct kvm_memory_slot
*slot
)
11479 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11480 kvfree(slot
->arch
.rmap
[i
]);
11481 slot
->arch
.rmap
[i
] = NULL
;
11485 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
11489 memslot_rmap_free(slot
);
11491 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11492 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11493 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11496 kvm_page_track_free_memslot(slot
);
11499 static int memslot_rmap_alloc(struct kvm_memory_slot
*slot
,
11500 unsigned long npages
)
11502 const int sz
= sizeof(*slot
->arch
.rmap
[0]);
11505 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11507 int lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11509 if (slot
->arch
.rmap
[i
])
11512 slot
->arch
.rmap
[i
] = kvcalloc(lpages
, sz
, GFP_KERNEL_ACCOUNT
);
11513 if (!slot
->arch
.rmap
[i
]) {
11514 memslot_rmap_free(slot
);
11522 int alloc_all_memslots_rmaps(struct kvm
*kvm
)
11524 struct kvm_memslots
*slots
;
11525 struct kvm_memory_slot
*slot
;
11529 * Check if memslots alreday have rmaps early before acquiring
11530 * the slots_arch_lock below.
11532 if (kvm_memslots_have_rmaps(kvm
))
11535 mutex_lock(&kvm
->slots_arch_lock
);
11538 * Read memslots_have_rmaps again, under the slots arch lock,
11539 * before allocating the rmaps
11541 if (kvm_memslots_have_rmaps(kvm
)) {
11542 mutex_unlock(&kvm
->slots_arch_lock
);
11546 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11547 slots
= __kvm_memslots(kvm
, i
);
11548 kvm_for_each_memslot(slot
, slots
) {
11549 r
= memslot_rmap_alloc(slot
, slot
->npages
);
11551 mutex_unlock(&kvm
->slots_arch_lock
);
11558 * Ensure that memslots_have_rmaps becomes true strictly after
11559 * all the rmap pointers are set.
11561 smp_store_release(&kvm
->arch
.memslots_have_rmaps
, true);
11562 mutex_unlock(&kvm
->slots_arch_lock
);
11566 static int kvm_alloc_memslot_metadata(struct kvm
*kvm
,
11567 struct kvm_memory_slot
*slot
,
11568 unsigned long npages
)
11573 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11574 * old arrays will be freed by __kvm_set_memory_region() if installing
11575 * the new memslot is successful.
11577 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
11579 if (kvm_memslots_have_rmaps(kvm
)) {
11580 r
= memslot_rmap_alloc(slot
, npages
);
11585 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11586 struct kvm_lpage_info
*linfo
;
11587 unsigned long ugfn
;
11591 lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11593 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
11597 slot
->arch
.lpage_info
[i
- 1] = linfo
;
11599 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
11600 linfo
[0].disallow_lpage
= 1;
11601 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
11602 linfo
[lpages
- 1].disallow_lpage
= 1;
11603 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
11605 * If the gfn and userspace address are not aligned wrt each
11606 * other, disable large page support for this slot.
11608 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
11611 for (j
= 0; j
< lpages
; ++j
)
11612 linfo
[j
].disallow_lpage
= 1;
11616 if (kvm_page_track_create_memslot(slot
, npages
))
11622 memslot_rmap_free(slot
);
11624 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11625 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11626 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11631 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
11633 struct kvm_vcpu
*vcpu
;
11637 * memslots->generation has been incremented.
11638 * mmio generation may have reached its maximum value.
11640 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
11642 /* Force re-initialization of steal_time cache */
11643 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11644 kvm_vcpu_kick(vcpu
);
11647 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
11648 struct kvm_memory_slot
*memslot
,
11649 const struct kvm_userspace_memory_region
*mem
,
11650 enum kvm_mr_change change
)
11652 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
11653 return kvm_alloc_memslot_metadata(kvm
, memslot
,
11654 mem
->memory_size
>> PAGE_SHIFT
);
11659 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
11661 struct kvm_arch
*ka
= &kvm
->arch
;
11663 if (!kvm_x86_ops
.cpu_dirty_log_size
)
11666 if ((enable
&& ++ka
->cpu_dirty_logging_count
== 1) ||
11667 (!enable
&& --ka
->cpu_dirty_logging_count
== 0))
11668 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
11670 WARN_ON_ONCE(ka
->cpu_dirty_logging_count
< 0);
11673 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
11674 struct kvm_memory_slot
*old
,
11675 const struct kvm_memory_slot
*new,
11676 enum kvm_mr_change change
)
11678 bool log_dirty_pages
= new->flags
& KVM_MEM_LOG_DIRTY_PAGES
;
11681 * Update CPU dirty logging if dirty logging is being toggled. This
11682 * applies to all operations.
11684 if ((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
11685 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
11688 * Nothing more to do for RO slots (which can't be dirtied and can't be
11689 * made writable) or CREATE/MOVE/DELETE of a slot.
11691 * For a memslot with dirty logging disabled:
11692 * CREATE: No dirty mappings will already exist.
11693 * MOVE/DELETE: The old mappings will already have been cleaned up by
11694 * kvm_arch_flush_shadow_memslot()
11696 * For a memslot with dirty logging enabled:
11697 * CREATE: No shadow pages exist, thus nothing to write-protect
11698 * and no dirty bits to clear.
11699 * MOVE/DELETE: The old mappings will already have been cleaned up by
11700 * kvm_arch_flush_shadow_memslot().
11702 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new->flags
& KVM_MEM_READONLY
))
11706 * READONLY and non-flags changes were filtered out above, and the only
11707 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11708 * logging isn't being toggled on or off.
11710 if (WARN_ON_ONCE(!((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
11713 if (!log_dirty_pages
) {
11715 * Dirty logging tracks sptes in 4k granularity, meaning that
11716 * large sptes have to be split. If live migration succeeds,
11717 * the guest in the source machine will be destroyed and large
11718 * sptes will be created in the destination. However, if the
11719 * guest continues to run in the source machine (for example if
11720 * live migration fails), small sptes will remain around and
11721 * cause bad performance.
11723 * Scan sptes if dirty logging has been stopped, dropping those
11724 * which can be collapsed into a single large-page spte. Later
11725 * page faults will create the large-page sptes.
11727 kvm_mmu_zap_collapsible_sptes(kvm
, new);
11730 * Initially-all-set does not require write protecting any page,
11731 * because they're all assumed to be dirty.
11733 if (kvm_dirty_log_manual_protect_and_init_set(kvm
))
11736 if (kvm_x86_ops
.cpu_dirty_log_size
) {
11737 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
11738 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_2M
);
11740 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_4K
);
11745 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
11746 const struct kvm_userspace_memory_region
*mem
,
11747 struct kvm_memory_slot
*old
,
11748 const struct kvm_memory_slot
*new,
11749 enum kvm_mr_change change
)
11751 if (!kvm
->arch
.n_requested_mmu_pages
)
11752 kvm_mmu_change_mmu_pages(kvm
,
11753 kvm_mmu_calculate_default_mmu_pages(kvm
));
11755 kvm_mmu_slot_apply_flags(kvm
, old
, new, change
);
11757 /* Free the arrays associated with the old memslot. */
11758 if (change
== KVM_MR_MOVE
)
11759 kvm_arch_free_memslot(kvm
, old
);
11762 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
11764 kvm_mmu_zap_all(kvm
);
11767 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
11768 struct kvm_memory_slot
*slot
)
11770 kvm_page_track_flush_slot(kvm
, slot
);
11773 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
11775 return (is_guest_mode(vcpu
) &&
11776 kvm_x86_ops
.guest_apic_has_interrupt
&&
11777 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
11780 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
11782 if (!list_empty_careful(&vcpu
->async_pf
.done
))
11785 if (kvm_apic_has_events(vcpu
))
11788 if (vcpu
->arch
.pv
.pv_unhalted
)
11791 if (vcpu
->arch
.exception
.pending
)
11794 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11795 (vcpu
->arch
.nmi_pending
&&
11796 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
11799 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11800 (vcpu
->arch
.smi_pending
&&
11801 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
11804 if (kvm_arch_interrupt_allowed(vcpu
) &&
11805 (kvm_cpu_has_interrupt(vcpu
) ||
11806 kvm_guest_apic_has_interrupt(vcpu
)))
11809 if (kvm_hv_has_stimer_pending(vcpu
))
11812 if (is_guest_mode(vcpu
) &&
11813 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
11814 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
11820 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
11822 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
11825 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
11827 if (vcpu
->arch
.apicv_active
&& static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
11833 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
11835 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
11838 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11839 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11840 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
11843 return kvm_arch_dy_has_pending_interrupt(vcpu
);
11846 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
11848 if (vcpu
->arch
.guest_state_protected
)
11851 return vcpu
->arch
.preempted_in_kernel
;
11854 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
11856 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
11859 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
11861 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
11864 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
11866 /* Can't read the RIP when guest state is protected, just return 0 */
11867 if (vcpu
->arch
.guest_state_protected
)
11870 if (is_64_bit_mode(vcpu
))
11871 return kvm_rip_read(vcpu
);
11872 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
11873 kvm_rip_read(vcpu
));
11875 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
11877 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
11879 return kvm_get_linear_rip(vcpu
) == linear_rip
;
11881 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
11883 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
11885 unsigned long rflags
;
11887 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
11888 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11889 rflags
&= ~X86_EFLAGS_TF
;
11892 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
11894 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11896 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
11897 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
11898 rflags
|= X86_EFLAGS_TF
;
11899 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
11902 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11904 __kvm_set_rflags(vcpu
, rflags
);
11905 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11907 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
11909 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
11913 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
11917 r
= kvm_mmu_reload(vcpu
);
11921 if (!vcpu
->arch
.mmu
->direct_map
&&
11922 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
11925 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
11928 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
11930 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
11932 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
11935 static inline u32
kvm_async_pf_next_probe(u32 key
)
11937 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
11940 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11942 u32 key
= kvm_async_pf_hash_fn(gfn
);
11944 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
11945 key
= kvm_async_pf_next_probe(key
);
11947 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
11950 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11953 u32 key
= kvm_async_pf_hash_fn(gfn
);
11955 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
11956 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
11957 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
11958 key
= kvm_async_pf_next_probe(key
);
11963 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11965 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
11968 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11972 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
11974 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
11978 vcpu
->arch
.apf
.gfns
[i
] = ~0;
11980 j
= kvm_async_pf_next_probe(j
);
11981 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
11983 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
11985 * k lies cyclically in ]i,j]
11987 * |....j i.k.| or |.k..j i...|
11989 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
11990 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
11995 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
11997 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
11999 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
12003 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
12005 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
12007 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
12008 &token
, offset
, sizeof(token
));
12011 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
12013 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
12016 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
12017 &val
, offset
, sizeof(val
)))
12023 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
12025 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
12028 if (!kvm_pv_async_pf_enabled(vcpu
) ||
12029 (vcpu
->arch
.apf
.send_user_only
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 0))
12035 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
12037 if (unlikely(!lapic_in_kernel(vcpu
) ||
12038 kvm_event_needs_reinjection(vcpu
) ||
12039 vcpu
->arch
.exception
.pending
))
12042 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
12046 * If interrupts are off we cannot even use an artificial
12049 return kvm_arch_interrupt_allowed(vcpu
);
12052 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
12053 struct kvm_async_pf
*work
)
12055 struct x86_exception fault
;
12057 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
12058 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12060 if (kvm_can_deliver_async_pf(vcpu
) &&
12061 !apf_put_user_notpresent(vcpu
)) {
12062 fault
.vector
= PF_VECTOR
;
12063 fault
.error_code_valid
= true;
12064 fault
.error_code
= 0;
12065 fault
.nested_page_fault
= false;
12066 fault
.address
= work
->arch
.token
;
12067 fault
.async_page_fault
= true;
12068 kvm_inject_page_fault(vcpu
, &fault
);
12072 * It is not possible to deliver a paravirtualized asynchronous
12073 * page fault, but putting the guest in an artificial halt state
12074 * can be beneficial nevertheless: if an interrupt arrives, we
12075 * can deliver it timely and perhaps the guest will schedule
12076 * another process. When the instruction that triggered a page
12077 * fault is retried, hopefully the page will be ready in the host.
12079 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
12084 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
12085 struct kvm_async_pf
*work
)
12087 struct kvm_lapic_irq irq
= {
12088 .delivery_mode
= APIC_DM_FIXED
,
12089 .vector
= vcpu
->arch
.apf
.vec
12092 if (work
->wakeup_all
)
12093 work
->arch
.token
= ~0; /* broadcast wakeup */
12095 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12096 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
12098 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
12099 kvm_pv_async_pf_enabled(vcpu
) &&
12100 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
12101 vcpu
->arch
.apf
.pageready_pending
= true;
12102 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
12105 vcpu
->arch
.apf
.halted
= false;
12106 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
12109 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
12111 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
12112 if (!vcpu
->arch
.apf
.pageready_pending
)
12113 kvm_vcpu_kick(vcpu
);
12116 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
12118 if (!kvm_pv_async_pf_enabled(vcpu
))
12121 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
12124 void kvm_arch_start_assignment(struct kvm
*kvm
)
12126 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
12127 static_call_cond(kvm_x86_start_assignment
)(kvm
);
12129 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
12131 void kvm_arch_end_assignment(struct kvm
*kvm
)
12133 atomic_dec(&kvm
->arch
.assigned_device_count
);
12135 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
12137 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
12139 return atomic_read(&kvm
->arch
.assigned_device_count
);
12141 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
12143 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
12145 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
12147 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
12149 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
12151 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
12153 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
12155 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
12157 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
12159 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
12161 bool kvm_arch_has_irq_bypass(void)
12166 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
12167 struct irq_bypass_producer
*prod
)
12169 struct kvm_kernel_irqfd
*irqfd
=
12170 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12173 irqfd
->producer
= prod
;
12174 kvm_arch_start_assignment(irqfd
->kvm
);
12175 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
,
12176 prod
->irq
, irqfd
->gsi
, 1);
12179 kvm_arch_end_assignment(irqfd
->kvm
);
12184 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
12185 struct irq_bypass_producer
*prod
)
12188 struct kvm_kernel_irqfd
*irqfd
=
12189 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12191 WARN_ON(irqfd
->producer
!= prod
);
12192 irqfd
->producer
= NULL
;
12195 * When producer of consumer is unregistered, we change back to
12196 * remapped mode, so we can re-use the current implementation
12197 * when the irq is masked/disabled or the consumer side (KVM
12198 * int this case doesn't want to receive the interrupts.
12200 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
12202 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
12203 " fails: %d\n", irqfd
->consumer
.token
, ret
);
12205 kvm_arch_end_assignment(irqfd
->kvm
);
12208 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
12209 uint32_t guest_irq
, bool set
)
12211 return static_call(kvm_x86_update_pi_irte
)(kvm
, host_irq
, guest_irq
, set
);
12214 bool kvm_vector_hashing_enabled(void)
12216 return vector_hashing
;
12219 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
12221 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
12223 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
12226 int kvm_spec_ctrl_test_value(u64 value
)
12229 * test that setting IA32_SPEC_CTRL to given value
12230 * is allowed by the host processor
12234 unsigned long flags
;
12237 local_irq_save(flags
);
12239 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
12241 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
12244 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
12246 local_irq_restore(flags
);
12250 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
12252 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
12254 struct x86_exception fault
;
12255 u32 access
= error_code
&
12256 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
12258 if (!(error_code
& PFERR_PRESENT_MASK
) ||
12259 vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
12261 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12262 * tables probably do not match the TLB. Just proceed
12263 * with the error code that the processor gave.
12265 fault
.vector
= PF_VECTOR
;
12266 fault
.error_code_valid
= true;
12267 fault
.error_code
= error_code
;
12268 fault
.nested_page_fault
= false;
12269 fault
.address
= gva
;
12271 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
12273 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
12276 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12277 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12278 * indicates whether exit to userspace is needed.
12280 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
12281 struct x86_exception
*e
)
12283 if (r
== X86EMUL_PROPAGATE_FAULT
) {
12284 kvm_inject_emulated_page_fault(vcpu
, e
);
12289 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12290 * while handling a VMX instruction KVM could've handled the request
12291 * correctly by exiting to userspace and performing I/O but there
12292 * doesn't seem to be a real use-case behind such requests, just return
12293 * KVM_EXIT_INTERNAL_ERROR for now.
12295 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
12296 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
12297 vcpu
->run
->internal
.ndata
= 0;
12301 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
12303 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
12306 struct x86_exception e
;
12313 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
12314 if (r
!= X86EMUL_CONTINUE
)
12315 return kvm_handle_memory_failure(vcpu
, r
, &e
);
12317 if (operand
.pcid
>> 12 != 0) {
12318 kvm_inject_gp(vcpu
, 0);
12322 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
12325 case INVPCID_TYPE_INDIV_ADDR
:
12326 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
12327 is_noncanonical_address(operand
.gla
, vcpu
)) {
12328 kvm_inject_gp(vcpu
, 0);
12331 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
12332 return kvm_skip_emulated_instruction(vcpu
);
12334 case INVPCID_TYPE_SINGLE_CTXT
:
12335 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
12336 kvm_inject_gp(vcpu
, 0);
12340 kvm_invalidate_pcid(vcpu
, operand
.pcid
);
12341 return kvm_skip_emulated_instruction(vcpu
);
12343 case INVPCID_TYPE_ALL_NON_GLOBAL
:
12345 * Currently, KVM doesn't mark global entries in the shadow
12346 * page tables, so a non-global flush just degenerates to a
12347 * global flush. If needed, we could optimize this later by
12348 * keeping track of global entries in shadow page tables.
12352 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
12353 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12354 return kvm_skip_emulated_instruction(vcpu
);
12357 BUG(); /* We have already checked above that type <= 3 */
12360 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
12362 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
12364 struct kvm_run
*run
= vcpu
->run
;
12365 struct kvm_mmio_fragment
*frag
;
12368 BUG_ON(!vcpu
->mmio_needed
);
12370 /* Complete previous fragment */
12371 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
12372 len
= min(8u, frag
->len
);
12373 if (!vcpu
->mmio_is_write
)
12374 memcpy(frag
->data
, run
->mmio
.data
, len
);
12376 if (frag
->len
<= 8) {
12377 /* Switch to the next fragment. */
12379 vcpu
->mmio_cur_fragment
++;
12381 /* Go forward to the next mmio piece. */
12387 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
12388 vcpu
->mmio_needed
= 0;
12390 // VMG change, at this point, we're always done
12391 // RIP has already been advanced
12395 // More MMIO is needed
12396 run
->mmio
.phys_addr
= frag
->gpa
;
12397 run
->mmio
.len
= min(8u, frag
->len
);
12398 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
12399 if (run
->mmio
.is_write
)
12400 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12401 run
->exit_reason
= KVM_EXIT_MMIO
;
12403 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12408 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12412 struct kvm_mmio_fragment
*frag
;
12417 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12418 if (handled
== bytes
)
12425 /*TODO: Check if need to increment number of frags */
12426 frag
= vcpu
->mmio_fragments
;
12427 vcpu
->mmio_nr_fragments
= 1;
12432 vcpu
->mmio_needed
= 1;
12433 vcpu
->mmio_cur_fragment
= 0;
12435 vcpu
->run
->mmio
.phys_addr
= gpa
;
12436 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12437 vcpu
->run
->mmio
.is_write
= 1;
12438 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12439 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12441 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12445 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
12447 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12451 struct kvm_mmio_fragment
*frag
;
12456 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12457 if (handled
== bytes
)
12464 /*TODO: Check if need to increment number of frags */
12465 frag
= vcpu
->mmio_fragments
;
12466 vcpu
->mmio_nr_fragments
= 1;
12471 vcpu
->mmio_needed
= 1;
12472 vcpu
->mmio_cur_fragment
= 0;
12474 vcpu
->run
->mmio
.phys_addr
= gpa
;
12475 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12476 vcpu
->run
->mmio
.is_write
= 0;
12477 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12479 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12483 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
12485 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12486 unsigned int port
);
12488 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
12490 int size
= vcpu
->arch
.pio
.size
;
12491 int port
= vcpu
->arch
.pio
.port
;
12493 vcpu
->arch
.pio
.count
= 0;
12494 if (vcpu
->arch
.sev_pio_count
)
12495 return kvm_sev_es_outs(vcpu
, size
, port
);
12499 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12503 unsigned int count
=
12504 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12505 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
12507 /* memcpy done already by emulator_pio_out. */
12508 vcpu
->arch
.sev_pio_count
-= count
;
12509 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12513 /* Emulation done by the kernel. */
12514 if (!vcpu
->arch
.sev_pio_count
)
12518 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
12522 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12523 unsigned int port
);
12525 static void advance_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12527 unsigned count
= vcpu
->arch
.pio
.count
;
12528 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
12529 vcpu
->arch
.sev_pio_count
-= count
;
12530 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12533 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12535 int size
= vcpu
->arch
.pio
.size
;
12536 int port
= vcpu
->arch
.pio
.port
;
12538 advance_sev_es_emulated_ins(vcpu
);
12539 if (vcpu
->arch
.sev_pio_count
)
12540 return kvm_sev_es_ins(vcpu
, size
, port
);
12544 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12548 unsigned int count
=
12549 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12550 if (!__emulator_pio_in(vcpu
, size
, port
, count
))
12553 /* Emulation done by the kernel. */
12554 advance_sev_es_emulated_ins(vcpu
);
12555 if (!vcpu
->arch
.sev_pio_count
)
12559 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
12563 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
12564 unsigned int port
, void *data
, unsigned int count
,
12567 vcpu
->arch
.sev_pio_data
= data
;
12568 vcpu
->arch
.sev_pio_count
= count
;
12569 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
12570 : kvm_sev_es_outs(vcpu
, size
, port
);
12572 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
12574 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
12575 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
12576 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
12577 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
12578 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
12579 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
12580 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
12581 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
12582 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
12583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
12584 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
12585 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
12586 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
12587 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
12588 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
12589 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
12590 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
12591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
12592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
12593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
12594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
12595 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
12596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);
12597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
12598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
12599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
12600 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);