1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/internal.h> /* Ugh! */
72 #include <asm/pvclock.h>
73 #include <asm/div64.h>
74 #include <asm/irq_remapping.h>
75 #include <asm/mshyperv.h>
76 #include <asm/hypervisor.h>
77 #include <asm/tlbflush.h>
78 #include <asm/intel_pt.h>
79 #include <asm/emulate_prefix.h>
81 #include <clocksource/hyperv_timer.h>
83 #define CREATE_TRACE_POINTS
86 #define MAX_IO_MSRS 256
87 #define KVM_MAX_MCE_BANKS 32
88 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
91 #define emul_to_vcpu(ctxt) \
92 ((struct kvm_vcpu *)(ctxt)->vcpu)
95 * - enable syscall per default because its emulated by KVM
96 * - enable LME and LMA per default on 64 bit KVM
100 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
102 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
105 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
110 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
112 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
113 static void process_nmi(struct kvm_vcpu
*vcpu
);
114 static void process_smi(struct kvm_vcpu
*vcpu
);
115 static void enter_smm(struct kvm_vcpu
*vcpu
);
116 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
117 static void store_regs(struct kvm_vcpu
*vcpu
);
118 static int sync_regs(struct kvm_vcpu
*vcpu
);
120 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
121 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
123 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
124 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
126 #define KVM_X86_OP(func) \
127 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
128 *(((struct kvm_x86_ops *)0)->func));
129 #define KVM_X86_OP_NULL KVM_X86_OP
130 #include <asm/kvm-x86-ops.h>
131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current
);
135 static bool __read_mostly ignore_msrs
= 0;
136 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
138 bool __read_mostly report_ignored_msrs
= true;
139 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
140 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
142 unsigned int min_timer_period_us
= 200;
143 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
145 static bool __read_mostly kvmclock_periodic_sync
= true;
146 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
148 bool __read_mostly kvm_has_tsc_control
;
149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
150 u32 __read_mostly kvm_max_guest_tsc_khz
;
151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
152 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
154 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
156 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
158 bool __read_mostly kvm_has_bus_lock_exit
;
159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit
);
161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
162 static u32 __read_mostly tsc_tolerance_ppm
= 250;
163 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
166 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
167 * adaptive tuning starting from default advancement of 1000ns. '0' disables
168 * advancement entirely. Any other value is used as-is and disables adaptive
169 * tuning, i.e. allows privileged userspace to set an exact advancement time.
171 static int __read_mostly lapic_timer_advance_ns
= -1;
172 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
174 static bool __read_mostly vector_hashing
= true;
175 module_param(vector_hashing
, bool, S_IRUGO
);
177 bool __read_mostly enable_vmware_backdoor
= false;
178 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
181 static bool __read_mostly force_emulation_prefix
= false;
182 module_param(force_emulation_prefix
, bool, S_IRUGO
);
184 int __read_mostly pi_inject_timer
= -1;
185 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
188 * Restoring the host value for MSRs that are only consumed when running in
189 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
190 * returns to userspace, i.e. the kernel can run with the guest's value.
192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
194 struct kvm_user_return_msrs
{
195 struct user_return_notifier urn
;
197 struct kvm_user_return_msr_values
{
200 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
203 u32 __read_mostly kvm_nr_uret_msrs
;
204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
205 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
206 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
208 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
209 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
210 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
211 | XFEATURE_MASK_PKRU)
213 u64 __read_mostly host_efer
;
214 EXPORT_SYMBOL_GPL(host_efer
);
216 bool __read_mostly allow_smaller_maxphyaddr
= 0;
217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
219 bool __read_mostly enable_apicv
= true;
220 EXPORT_SYMBOL_GPL(enable_apicv
);
222 u64 __read_mostly host_xss
;
223 EXPORT_SYMBOL_GPL(host_xss
);
224 u64 __read_mostly supported_xss
;
225 EXPORT_SYMBOL_GPL(supported_xss
);
227 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
228 KVM_GENERIC_VM_STATS(),
229 STATS_DESC_COUNTER(VM
, mmu_shadow_zapped
),
230 STATS_DESC_COUNTER(VM
, mmu_pte_write
),
231 STATS_DESC_COUNTER(VM
, mmu_pde_zapped
),
232 STATS_DESC_COUNTER(VM
, mmu_flooded
),
233 STATS_DESC_COUNTER(VM
, mmu_recycled
),
234 STATS_DESC_COUNTER(VM
, mmu_cache_miss
),
235 STATS_DESC_ICOUNTER(VM
, mmu_unsync
),
236 STATS_DESC_ICOUNTER(VM
, pages_4k
),
237 STATS_DESC_ICOUNTER(VM
, pages_2m
),
238 STATS_DESC_ICOUNTER(VM
, pages_1g
),
239 STATS_DESC_ICOUNTER(VM
, nx_lpage_splits
),
240 STATS_DESC_PCOUNTER(VM
, max_mmu_rmap_size
),
241 STATS_DESC_PCOUNTER(VM
, max_mmu_page_hash_collisions
)
244 const struct kvm_stats_header kvm_vm_stats_header
= {
245 .name_size
= KVM_STATS_NAME_SIZE
,
246 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
247 .id_offset
= sizeof(struct kvm_stats_header
),
248 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
249 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
250 sizeof(kvm_vm_stats_desc
),
253 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
254 KVM_GENERIC_VCPU_STATS(),
255 STATS_DESC_COUNTER(VCPU
, pf_fixed
),
256 STATS_DESC_COUNTER(VCPU
, pf_guest
),
257 STATS_DESC_COUNTER(VCPU
, tlb_flush
),
258 STATS_DESC_COUNTER(VCPU
, invlpg
),
259 STATS_DESC_COUNTER(VCPU
, exits
),
260 STATS_DESC_COUNTER(VCPU
, io_exits
),
261 STATS_DESC_COUNTER(VCPU
, mmio_exits
),
262 STATS_DESC_COUNTER(VCPU
, signal_exits
),
263 STATS_DESC_COUNTER(VCPU
, irq_window_exits
),
264 STATS_DESC_COUNTER(VCPU
, nmi_window_exits
),
265 STATS_DESC_COUNTER(VCPU
, l1d_flush
),
266 STATS_DESC_COUNTER(VCPU
, halt_exits
),
267 STATS_DESC_COUNTER(VCPU
, request_irq_exits
),
268 STATS_DESC_COUNTER(VCPU
, irq_exits
),
269 STATS_DESC_COUNTER(VCPU
, host_state_reload
),
270 STATS_DESC_COUNTER(VCPU
, fpu_reload
),
271 STATS_DESC_COUNTER(VCPU
, insn_emulation
),
272 STATS_DESC_COUNTER(VCPU
, insn_emulation_fail
),
273 STATS_DESC_COUNTER(VCPU
, hypercalls
),
274 STATS_DESC_COUNTER(VCPU
, irq_injections
),
275 STATS_DESC_COUNTER(VCPU
, nmi_injections
),
276 STATS_DESC_COUNTER(VCPU
, req_event
),
277 STATS_DESC_COUNTER(VCPU
, nested_run
),
278 STATS_DESC_COUNTER(VCPU
, directed_yield_attempted
),
279 STATS_DESC_COUNTER(VCPU
, directed_yield_successful
),
280 STATS_DESC_ICOUNTER(VCPU
, guest_mode
)
283 const struct kvm_stats_header kvm_vcpu_stats_header
= {
284 .name_size
= KVM_STATS_NAME_SIZE
,
285 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
286 .id_offset
= sizeof(struct kvm_stats_header
),
287 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
288 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
289 sizeof(kvm_vcpu_stats_desc
),
292 u64 __read_mostly host_xcr0
;
293 u64 __read_mostly supported_xcr0
;
294 EXPORT_SYMBOL_GPL(supported_xcr0
);
296 static struct kmem_cache
*x86_fpu_cache
;
298 static struct kmem_cache
*x86_emulator_cache
;
301 * When called, it means the previous get/set msr reached an invalid msr.
302 * Return true if we want to ignore/silent this failed msr access.
304 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
306 const char *op
= write
? "wrmsr" : "rdmsr";
309 if (report_ignored_msrs
)
310 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
315 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
321 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
323 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
324 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
326 return kmem_cache_create_usercopy("x86_emulator", size
,
327 __alignof__(struct x86_emulate_ctxt
),
328 SLAB_ACCOUNT
, useroffset
,
329 size
- useroffset
, NULL
);
332 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
337 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
338 vcpu
->arch
.apf
.gfns
[i
] = ~0;
341 static void kvm_on_user_return(struct user_return_notifier
*urn
)
344 struct kvm_user_return_msrs
*msrs
345 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
346 struct kvm_user_return_msr_values
*values
;
350 * Disabling irqs at this point since the following code could be
351 * interrupted and executed through kvm_arch_hardware_disable()
353 local_irq_save(flags
);
354 if (msrs
->registered
) {
355 msrs
->registered
= false;
356 user_return_notifier_unregister(urn
);
358 local_irq_restore(flags
);
359 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
360 values
= &msrs
->values
[slot
];
361 if (values
->host
!= values
->curr
) {
362 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
363 values
->curr
= values
->host
;
368 static int kvm_probe_user_return_msr(u32 msr
)
374 ret
= rdmsrl_safe(msr
, &val
);
377 ret
= wrmsrl_safe(msr
, val
);
383 int kvm_add_user_return_msr(u32 msr
)
385 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
387 if (kvm_probe_user_return_msr(msr
))
390 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
391 return kvm_nr_uret_msrs
++;
393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
395 int kvm_find_user_return_msr(u32 msr
)
399 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
400 if (kvm_uret_msrs_list
[i
] == msr
)
405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
407 static void kvm_user_return_msr_cpu_online(void)
409 unsigned int cpu
= smp_processor_id();
410 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
414 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
415 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
416 msrs
->values
[i
].host
= value
;
417 msrs
->values
[i
].curr
= value
;
421 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
423 unsigned int cpu
= smp_processor_id();
424 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
427 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
428 if (value
== msrs
->values
[slot
].curr
)
430 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
434 msrs
->values
[slot
].curr
= value
;
435 if (!msrs
->registered
) {
436 msrs
->urn
.on_user_return
= kvm_on_user_return
;
437 user_return_notifier_register(&msrs
->urn
);
438 msrs
->registered
= true;
442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
444 static void drop_user_return_notifiers(void)
446 unsigned int cpu
= smp_processor_id();
447 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
449 if (msrs
->registered
)
450 kvm_on_user_return(&msrs
->urn
);
453 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
455 return vcpu
->arch
.apic_base
;
457 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
459 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
461 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
465 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
467 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
468 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
469 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
470 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
472 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
474 if (!msr_info
->host_initiated
) {
475 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
477 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
481 kvm_lapic_set_base(vcpu
, msr_info
->data
);
482 kvm_recalculate_apic_map(vcpu
->kvm
);
485 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
488 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
490 * Hardware virtualization extension instructions may fault if a reboot turns
491 * off virtualization while processes are running. Usually after catching the
492 * fault we just panic; during reboot instead the instruction is ignored.
494 noinstr
void kvm_spurious_fault(void)
496 /* Fault while not rebooting. We want the trace. */
497 BUG_ON(!kvm_rebooting
);
499 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
501 #define EXCPT_BENIGN 0
502 #define EXCPT_CONTRIBUTORY 1
505 static int exception_class(int vector
)
515 return EXCPT_CONTRIBUTORY
;
522 #define EXCPT_FAULT 0
524 #define EXCPT_ABORT 2
525 #define EXCPT_INTERRUPT 3
527 static int exception_type(int vector
)
531 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
532 return EXCPT_INTERRUPT
;
536 /* #DB is trap, as instruction watchpoints are handled elsewhere */
537 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
540 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
543 /* Reserved exceptions will result in fault */
547 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
549 unsigned nr
= vcpu
->arch
.exception
.nr
;
550 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
551 unsigned long payload
= vcpu
->arch
.exception
.payload
;
559 * "Certain debug exceptions may clear bit 0-3. The
560 * remaining contents of the DR6 register are never
561 * cleared by the processor".
563 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
565 * In order to reflect the #DB exception payload in guest
566 * dr6, three components need to be considered: active low
567 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
569 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
570 * In the target guest dr6:
571 * FIXED_1 bits should always be set.
572 * Active low bits should be cleared if 1-setting in payload.
573 * Active high bits should be set if 1-setting in payload.
575 * Note, the payload is compatible with the pending debug
576 * exceptions/exit qualification under VMX, that active_low bits
577 * are active high in payload.
578 * So they need to be flipped for DR6.
580 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
581 vcpu
->arch
.dr6
|= payload
;
582 vcpu
->arch
.dr6
^= payload
& DR6_ACTIVE_LOW
;
585 * The #DB payload is defined as compatible with the 'pending
586 * debug exceptions' field under VMX, not DR6. While bit 12 is
587 * defined in the 'pending debug exceptions' field (enabled
588 * breakpoint), it is reserved and must be zero in DR6.
590 vcpu
->arch
.dr6
&= ~BIT(12);
593 vcpu
->arch
.cr2
= payload
;
597 vcpu
->arch
.exception
.has_payload
= false;
598 vcpu
->arch
.exception
.payload
= 0;
600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
602 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
603 unsigned nr
, bool has_error
, u32 error_code
,
604 bool has_payload
, unsigned long payload
, bool reinject
)
609 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
611 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
615 * On vmentry, vcpu->arch.exception.pending is only
616 * true if an event injection was blocked by
617 * nested_run_pending. In that case, however,
618 * vcpu_enter_guest requests an immediate exit,
619 * and the guest shouldn't proceed far enough to
622 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
623 vcpu
->arch
.exception
.injected
= true;
624 if (WARN_ON_ONCE(has_payload
)) {
626 * A reinjected event has already
627 * delivered its payload.
633 vcpu
->arch
.exception
.pending
= true;
634 vcpu
->arch
.exception
.injected
= false;
636 vcpu
->arch
.exception
.has_error_code
= has_error
;
637 vcpu
->arch
.exception
.nr
= nr
;
638 vcpu
->arch
.exception
.error_code
= error_code
;
639 vcpu
->arch
.exception
.has_payload
= has_payload
;
640 vcpu
->arch
.exception
.payload
= payload
;
641 if (!is_guest_mode(vcpu
))
642 kvm_deliver_exception_payload(vcpu
);
646 /* to check exception */
647 prev_nr
= vcpu
->arch
.exception
.nr
;
648 if (prev_nr
== DF_VECTOR
) {
649 /* triple fault -> shutdown */
650 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
653 class1
= exception_class(prev_nr
);
654 class2
= exception_class(nr
);
655 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
656 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
658 * Generate double fault per SDM Table 5-5. Set
659 * exception.pending = true so that the double fault
660 * can trigger a nested vmexit.
662 vcpu
->arch
.exception
.pending
= true;
663 vcpu
->arch
.exception
.injected
= false;
664 vcpu
->arch
.exception
.has_error_code
= true;
665 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
666 vcpu
->arch
.exception
.error_code
= 0;
667 vcpu
->arch
.exception
.has_payload
= false;
668 vcpu
->arch
.exception
.payload
= 0;
670 /* replace previous exception with a new one in a hope
671 that instruction re-execution will regenerate lost
676 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
678 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
680 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
682 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
684 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
686 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
688 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
689 unsigned long payload
)
691 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
695 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
696 u32 error_code
, unsigned long payload
)
698 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
699 true, payload
, false);
702 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
705 kvm_inject_gp(vcpu
, 0);
707 return kvm_skip_emulated_instruction(vcpu
);
711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
713 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
715 ++vcpu
->stat
.pf_guest
;
716 vcpu
->arch
.exception
.nested_apf
=
717 is_guest_mode(vcpu
) && fault
->async_page_fault
;
718 if (vcpu
->arch
.exception
.nested_apf
) {
719 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
720 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
722 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
729 struct x86_exception
*fault
)
731 struct kvm_mmu
*fault_mmu
;
732 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
734 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
738 * Invalidate the TLB entry for the faulting address, if it exists,
739 * else the access will fault indefinitely (and to emulate hardware).
741 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
742 !(fault
->error_code
& PFERR_RSVD_MASK
))
743 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
744 fault_mmu
->root_hpa
);
746 fault_mmu
->inject_page_fault(vcpu
, fault
);
747 return fault
->nested_page_fault
;
749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
751 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
753 atomic_inc(&vcpu
->arch
.nmi_queued
);
754 kvm_make_request(KVM_REQ_NMI
, vcpu
);
756 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
758 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
760 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
764 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
766 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
771 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
772 * a #GP and return false.
774 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
776 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
778 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
781 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
783 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
785 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
788 kvm_queue_exception(vcpu
, UD_VECTOR
);
791 EXPORT_SYMBOL_GPL(kvm_require_dr
);
794 * This function will be used to read from the physical memory of the currently
795 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
796 * can read from guest physical or from the guest's guest physical memory.
798 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
799 gfn_t ngfn
, void *data
, int offset
, int len
,
802 struct x86_exception exception
;
806 ngpa
= gfn_to_gpa(ngfn
);
807 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
808 if (real_gfn
== UNMAPPED_GVA
)
811 real_gfn
= gpa_to_gfn(real_gfn
);
813 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
815 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
817 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
819 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
823 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
825 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
827 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
828 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
831 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
833 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
834 offset
* sizeof(u64
), sizeof(pdpte
),
835 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
840 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
841 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
842 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
849 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
850 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
851 vcpu
->arch
.pdptrs_from_userspace
= false;
857 EXPORT_SYMBOL_GPL(load_pdptrs
);
859 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
861 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
862 kvm_clear_async_pf_completion_queue(vcpu
);
863 kvm_async_pf_hash_reset(vcpu
);
866 if ((cr0
^ old_cr0
) & KVM_MMU_CR0_ROLE_BITS
)
867 kvm_mmu_reset_context(vcpu
);
869 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
870 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
871 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
872 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
874 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
876 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
878 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
879 unsigned long pdptr_bits
= X86_CR0_CD
| X86_CR0_NW
| X86_CR0_PG
;
884 if (cr0
& 0xffffffff00000000UL
)
888 cr0
&= ~CR0_RESERVED_BITS
;
890 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
893 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
897 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
898 (cr0
& X86_CR0_PG
)) {
903 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
908 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
909 is_pae(vcpu
) && ((cr0
^ old_cr0
) & pdptr_bits
) &&
910 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
)))
913 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
916 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
918 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
922 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
924 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
926 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
928 EXPORT_SYMBOL_GPL(kvm_lmsw
);
930 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
932 if (vcpu
->arch
.guest_state_protected
)
935 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
937 if (vcpu
->arch
.xcr0
!= host_xcr0
)
938 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
940 if (vcpu
->arch
.xsaves_enabled
&&
941 vcpu
->arch
.ia32_xss
!= host_xss
)
942 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
945 if (static_cpu_has(X86_FEATURE_PKU
) &&
946 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
947 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
948 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
949 write_pkru(vcpu
->arch
.pkru
);
951 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
953 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
955 if (vcpu
->arch
.guest_state_protected
)
958 if (static_cpu_has(X86_FEATURE_PKU
) &&
959 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
960 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
961 vcpu
->arch
.pkru
= rdpkru();
962 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
963 write_pkru(vcpu
->arch
.host_pkru
);
966 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
968 if (vcpu
->arch
.xcr0
!= host_xcr0
)
969 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
971 if (vcpu
->arch
.xsaves_enabled
&&
972 vcpu
->arch
.ia32_xss
!= host_xss
)
973 wrmsrl(MSR_IA32_XSS
, host_xss
);
977 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
979 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
982 u64 old_xcr0
= vcpu
->arch
.xcr0
;
985 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
986 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
988 if (!(xcr0
& XFEATURE_MASK_FP
))
990 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
994 * Do not allow the guest to set bits that we do not support
995 * saving. However, xcr0 bit 0 is always set, even if the
996 * emulated CPU does not support XSAVE (see fx_init).
998 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
999 if (xcr0
& ~valid_bits
)
1002 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
1003 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1006 if (xcr0
& XFEATURE_MASK_AVX512
) {
1007 if (!(xcr0
& XFEATURE_MASK_YMM
))
1009 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1012 vcpu
->arch
.xcr0
= xcr0
;
1014 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1015 kvm_update_cpuid_runtime(vcpu
);
1019 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1021 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1022 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1023 kvm_inject_gp(vcpu
, 0);
1027 return kvm_skip_emulated_instruction(vcpu
);
1029 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1031 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1033 if (cr4
& cr4_reserved_bits
)
1036 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1039 return static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1041 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
1043 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1045 if (((cr4
^ old_cr4
) & KVM_MMU_CR4_ROLE_BITS
) ||
1046 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1047 kvm_mmu_reset_context(vcpu
);
1049 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1051 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1053 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1054 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1057 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1060 if (is_long_mode(vcpu
)) {
1061 if (!(cr4
& X86_CR4_PAE
))
1063 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1065 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1066 && ((cr4
^ old_cr4
) & pdptr_bits
)
1067 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
1068 kvm_read_cr3(vcpu
)))
1071 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1072 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1075 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1076 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1080 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1082 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1086 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1088 static void kvm_invalidate_pcid(struct kvm_vcpu
*vcpu
, unsigned long pcid
)
1090 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
1091 unsigned long roots_to_free
= 0;
1095 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1096 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1097 * also via the emulator. KVM's TDP page tables are not in the scope of
1098 * the invalidation, but the guest's TLB entries need to be flushed as
1099 * the CPU may have cached entries in its TLB for the target PCID.
1101 if (unlikely(tdp_enabled
)) {
1102 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1107 * If neither the current CR3 nor any of the prev_roots use the given
1108 * PCID, then nothing needs to be done here because a resync will
1109 * happen anyway before switching to any other CR3.
1111 if (kvm_get_active_pcid(vcpu
) == pcid
) {
1112 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1113 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1116 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
1117 if (kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
) == pcid
)
1118 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
1120 kvm_mmu_free_roots(vcpu
, mmu
, roots_to_free
);
1123 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1125 bool skip_tlb_flush
= false;
1126 unsigned long pcid
= 0;
1127 #ifdef CONFIG_X86_64
1128 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1131 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1132 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1133 pcid
= cr3
& X86_CR3_PCID_MASK
;
1137 /* PDPTRs are always reloaded for PAE paging. */
1138 if (cr3
== kvm_read_cr3(vcpu
) && !is_pae_paging(vcpu
))
1139 goto handle_tlb_flush
;
1142 * Do not condition the GPA check on long mode, this helper is used to
1143 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1144 * the current vCPU mode is accurate.
1146 if (kvm_vcpu_is_illegal_gpa(vcpu
, cr3
))
1149 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1152 if (cr3
!= kvm_read_cr3(vcpu
))
1153 kvm_mmu_new_pgd(vcpu
, cr3
);
1155 vcpu
->arch
.cr3
= cr3
;
1156 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1160 * A load of CR3 that flushes the TLB flushes only the current PCID,
1161 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1162 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1163 * and it's impossible to use a non-zero PCID when PCID is disabled,
1164 * i.e. only PCID=0 can be relevant.
1166 if (!skip_tlb_flush
)
1167 kvm_invalidate_pcid(vcpu
, pcid
);
1171 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1173 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1175 if (cr8
& CR8_RESERVED_BITS
)
1177 if (lapic_in_kernel(vcpu
))
1178 kvm_lapic_set_tpr(vcpu
, cr8
);
1180 vcpu
->arch
.cr8
= cr8
;
1183 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1185 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1187 if (lapic_in_kernel(vcpu
))
1188 return kvm_lapic_get_cr8(vcpu
);
1190 return vcpu
->arch
.cr8
;
1192 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1194 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1198 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1199 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1200 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1204 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1208 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1209 dr7
= vcpu
->arch
.guest_debug_dr7
;
1211 dr7
= vcpu
->arch
.dr7
;
1212 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1213 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1214 if (dr7
& DR7_BP_EN_MASK
)
1215 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1217 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1219 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1221 u64 fixed
= DR6_FIXED_1
;
1223 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1226 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1227 fixed
|= DR6_BUS_LOCK
;
1231 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1233 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1237 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1238 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1239 vcpu
->arch
.eff_db
[dr
] = val
;
1243 if (!kvm_dr6_valid(val
))
1245 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1249 if (!kvm_dr7_valid(val
))
1251 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1252 kvm_update_dr7(vcpu
);
1258 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1260 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1262 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1266 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1270 *val
= vcpu
->arch
.dr6
;
1274 *val
= vcpu
->arch
.dr7
;
1278 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1280 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1282 u32 ecx
= kvm_rcx_read(vcpu
);
1285 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1286 kvm_inject_gp(vcpu
, 0);
1290 kvm_rax_write(vcpu
, (u32
)data
);
1291 kvm_rdx_write(vcpu
, data
>> 32);
1292 return kvm_skip_emulated_instruction(vcpu
);
1294 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1297 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1298 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1300 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1301 * extract the supported MSRs from the related const lists.
1302 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1303 * capabilities of the host cpu. This capabilities test skips MSRs that are
1304 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1305 * may depend on host virtualization features rather than host cpu features.
1308 static const u32 msrs_to_save_all
[] = {
1309 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1311 #ifdef CONFIG_X86_64
1312 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1314 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1315 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1317 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1318 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1319 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1320 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1321 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1322 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1323 MSR_IA32_UMWAIT_CONTROL
,
1325 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1326 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2,
1327 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1328 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1329 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1330 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1331 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1332 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1333 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1334 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1335 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1336 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1337 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1338 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1339 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1340 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1341 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1342 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1343 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1344 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1345 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1346 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1348 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1349 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1350 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1351 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1352 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1353 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1356 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1357 static unsigned num_msrs_to_save
;
1359 static const u32 emulated_msrs_all
[] = {
1360 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1361 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1362 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1363 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1364 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1365 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1366 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1368 HV_X64_MSR_VP_INDEX
,
1369 HV_X64_MSR_VP_RUNTIME
,
1370 HV_X64_MSR_SCONTROL
,
1371 HV_X64_MSR_STIMER0_CONFIG
,
1372 HV_X64_MSR_VP_ASSIST_PAGE
,
1373 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1374 HV_X64_MSR_TSC_EMULATION_STATUS
,
1375 HV_X64_MSR_SYNDBG_OPTIONS
,
1376 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1377 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1378 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1380 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1381 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1383 MSR_IA32_TSC_ADJUST
,
1384 MSR_IA32_TSC_DEADLINE
,
1385 MSR_IA32_ARCH_CAPABILITIES
,
1386 MSR_IA32_PERF_CAPABILITIES
,
1387 MSR_IA32_MISC_ENABLE
,
1388 MSR_IA32_MCG_STATUS
,
1390 MSR_IA32_MCG_EXT_CTL
,
1394 MSR_MISC_FEATURES_ENABLES
,
1395 MSR_AMD64_VIRT_SPEC_CTRL
,
1400 * The following list leaves out MSRs whose values are determined
1401 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1402 * We always support the "true" VMX control MSRs, even if the host
1403 * processor does not, so I am putting these registers here rather
1404 * than in msrs_to_save_all.
1407 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1408 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1409 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1410 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1412 MSR_IA32_VMX_CR0_FIXED0
,
1413 MSR_IA32_VMX_CR4_FIXED0
,
1414 MSR_IA32_VMX_VMCS_ENUM
,
1415 MSR_IA32_VMX_PROCBASED_CTLS2
,
1416 MSR_IA32_VMX_EPT_VPID_CAP
,
1417 MSR_IA32_VMX_VMFUNC
,
1420 MSR_KVM_POLL_CONTROL
,
1423 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1424 static unsigned num_emulated_msrs
;
1427 * List of msr numbers which are used to expose MSR-based features that
1428 * can be used by a hypervisor to validate requested CPU features.
1430 static const u32 msr_based_features_all
[] = {
1432 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1433 MSR_IA32_VMX_PINBASED_CTLS
,
1434 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1435 MSR_IA32_VMX_PROCBASED_CTLS
,
1436 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1437 MSR_IA32_VMX_EXIT_CTLS
,
1438 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1439 MSR_IA32_VMX_ENTRY_CTLS
,
1441 MSR_IA32_VMX_CR0_FIXED0
,
1442 MSR_IA32_VMX_CR0_FIXED1
,
1443 MSR_IA32_VMX_CR4_FIXED0
,
1444 MSR_IA32_VMX_CR4_FIXED1
,
1445 MSR_IA32_VMX_VMCS_ENUM
,
1446 MSR_IA32_VMX_PROCBASED_CTLS2
,
1447 MSR_IA32_VMX_EPT_VPID_CAP
,
1448 MSR_IA32_VMX_VMFUNC
,
1452 MSR_IA32_ARCH_CAPABILITIES
,
1453 MSR_IA32_PERF_CAPABILITIES
,
1456 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1457 static unsigned int num_msr_based_features
;
1459 static u64
kvm_get_arch_capabilities(void)
1463 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1464 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1467 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1468 * the nested hypervisor runs with NX huge pages. If it is not,
1469 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1470 * L1 guests, so it need not worry about its own (L2) guests.
1472 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1475 * If we're doing cache flushes (either "always" or "cond")
1476 * we will do one whenever the guest does a vmlaunch/vmresume.
1477 * If an outer hypervisor is doing the cache flush for us
1478 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1479 * capability to the guest too, and if EPT is disabled we're not
1480 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1481 * require a nested hypervisor to do a flush of its own.
1483 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1484 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1486 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1487 data
|= ARCH_CAP_RDCL_NO
;
1488 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1489 data
|= ARCH_CAP_SSB_NO
;
1490 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1491 data
|= ARCH_CAP_MDS_NO
;
1493 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1495 * If RTM=0 because the kernel has disabled TSX, the host might
1496 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1497 * and therefore knows that there cannot be TAA) but keep
1498 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1499 * and we want to allow migrating those guests to tsx=off hosts.
1501 data
&= ~ARCH_CAP_TAA_NO
;
1502 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1503 data
|= ARCH_CAP_TAA_NO
;
1506 * Nothing to do here; we emulate TSX_CTRL if present on the
1507 * host so the guest can choose between disabling TSX or
1508 * using VERW to clear CPU buffers.
1515 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1517 switch (msr
->index
) {
1518 case MSR_IA32_ARCH_CAPABILITIES
:
1519 msr
->data
= kvm_get_arch_capabilities();
1521 case MSR_IA32_UCODE_REV
:
1522 rdmsrl_safe(msr
->index
, &msr
->data
);
1525 return static_call(kvm_x86_get_msr_feature
)(msr
);
1530 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1532 struct kvm_msr_entry msr
;
1536 r
= kvm_get_msr_feature(&msr
);
1538 if (r
== KVM_MSR_RET_INVALID
) {
1539 /* Unconditionally clear the output for simplicity */
1541 if (kvm_msr_ignored_check(index
, 0, false))
1553 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1555 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1558 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1561 if (efer
& (EFER_LME
| EFER_LMA
) &&
1562 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1565 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1571 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1573 if (efer
& efer_reserved_bits
)
1576 return __kvm_valid_efer(vcpu
, efer
);
1578 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1580 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1582 u64 old_efer
= vcpu
->arch
.efer
;
1583 u64 efer
= msr_info
->data
;
1586 if (efer
& efer_reserved_bits
)
1589 if (!msr_info
->host_initiated
) {
1590 if (!__kvm_valid_efer(vcpu
, efer
))
1593 if (is_paging(vcpu
) &&
1594 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1599 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1601 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1607 /* Update reserved bits */
1608 if ((efer
^ old_efer
) & EFER_NX
)
1609 kvm_mmu_reset_context(vcpu
);
1614 void kvm_enable_efer_bits(u64 mask
)
1616 efer_reserved_bits
&= ~mask
;
1618 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1620 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1622 struct kvm_x86_msr_filter
*msr_filter
;
1623 struct msr_bitmap_range
*ranges
;
1624 struct kvm
*kvm
= vcpu
->kvm
;
1629 /* x2APIC MSRs do not support filtering. */
1630 if (index
>= 0x800 && index
<= 0x8ff)
1633 idx
= srcu_read_lock(&kvm
->srcu
);
1635 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1641 allowed
= msr_filter
->default_allow
;
1642 ranges
= msr_filter
->ranges
;
1644 for (i
= 0; i
< msr_filter
->count
; i
++) {
1645 u32 start
= ranges
[i
].base
;
1646 u32 end
= start
+ ranges
[i
].nmsrs
;
1647 u32 flags
= ranges
[i
].flags
;
1648 unsigned long *bitmap
= ranges
[i
].bitmap
;
1650 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1651 allowed
= !!test_bit(index
- start
, bitmap
);
1657 srcu_read_unlock(&kvm
->srcu
, idx
);
1661 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1664 * Write @data into the MSR specified by @index. Select MSR specific fault
1665 * checks are bypassed if @host_initiated is %true.
1666 * Returns 0 on success, non-0 otherwise.
1667 * Assumes vcpu_load() was already called.
1669 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1670 bool host_initiated
)
1672 struct msr_data msr
;
1674 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1675 return KVM_MSR_RET_FILTERED
;
1680 case MSR_KERNEL_GS_BASE
:
1683 if (is_noncanonical_address(data
, vcpu
))
1686 case MSR_IA32_SYSENTER_EIP
:
1687 case MSR_IA32_SYSENTER_ESP
:
1689 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1690 * non-canonical address is written on Intel but not on
1691 * AMD (which ignores the top 32-bits, because it does
1692 * not implement 64-bit SYSENTER).
1694 * 64-bit code should hence be able to write a non-canonical
1695 * value on AMD. Making the address canonical ensures that
1696 * vmentry does not fail on Intel after writing a non-canonical
1697 * value, and that something deterministic happens if the guest
1698 * invokes 64-bit SYSENTER.
1700 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1703 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1706 if (!host_initiated
&&
1707 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1708 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1712 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1713 * incomplete and conflicting architectural behavior. Current
1714 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1715 * reserved and always read as zeros. Enforce Intel's reserved
1716 * bits check if and only if the guest CPU is Intel, and clear
1717 * the bits in all other cases. This ensures cross-vendor
1718 * migration will provide consistent behavior for the guest.
1720 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1729 msr
.host_initiated
= host_initiated
;
1731 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1734 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1735 u32 index
, u64 data
, bool host_initiated
)
1737 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1739 if (ret
== KVM_MSR_RET_INVALID
)
1740 if (kvm_msr_ignored_check(index
, data
, true))
1747 * Read the MSR specified by @index into @data. Select MSR specific fault
1748 * checks are bypassed if @host_initiated is %true.
1749 * Returns 0 on success, non-0 otherwise.
1750 * Assumes vcpu_load() was already called.
1752 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1753 bool host_initiated
)
1755 struct msr_data msr
;
1758 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1759 return KVM_MSR_RET_FILTERED
;
1763 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1766 if (!host_initiated
&&
1767 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1768 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1774 msr
.host_initiated
= host_initiated
;
1776 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1782 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1783 u32 index
, u64
*data
, bool host_initiated
)
1785 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1787 if (ret
== KVM_MSR_RET_INVALID
) {
1788 /* Unconditionally clear *data for simplicity */
1790 if (kvm_msr_ignored_check(index
, 0, false))
1797 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1799 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1801 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1803 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1805 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1807 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1809 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1811 int err
= vcpu
->run
->msr
.error
;
1813 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1814 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1817 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, err
);
1820 static int complete_emulated_wrmsr(struct kvm_vcpu
*vcpu
)
1822 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
1825 static u64
kvm_msr_reason(int r
)
1828 case KVM_MSR_RET_INVALID
:
1829 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1830 case KVM_MSR_RET_FILTERED
:
1831 return KVM_MSR_EXIT_REASON_FILTER
;
1833 return KVM_MSR_EXIT_REASON_INVAL
;
1837 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1838 u32 exit_reason
, u64 data
,
1839 int (*completion
)(struct kvm_vcpu
*vcpu
),
1842 u64 msr_reason
= kvm_msr_reason(r
);
1844 /* Check if the user wanted to know about this MSR fault */
1845 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1848 vcpu
->run
->exit_reason
= exit_reason
;
1849 vcpu
->run
->msr
.error
= 0;
1850 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1851 vcpu
->run
->msr
.reason
= msr_reason
;
1852 vcpu
->run
->msr
.index
= index
;
1853 vcpu
->run
->msr
.data
= data
;
1854 vcpu
->arch
.complete_userspace_io
= completion
;
1859 static int kvm_get_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, int r
)
1861 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_RDMSR
, 0,
1862 complete_emulated_rdmsr
, r
);
1865 static int kvm_set_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
, int r
)
1867 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_WRMSR
, data
,
1868 complete_emulated_wrmsr
, r
);
1871 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1873 u32 ecx
= kvm_rcx_read(vcpu
);
1877 r
= kvm_get_msr(vcpu
, ecx
, &data
);
1879 /* MSR read failed? See if we should ask user space */
1880 if (r
&& kvm_get_msr_user_space(vcpu
, ecx
, r
)) {
1881 /* Bounce to user space */
1886 trace_kvm_msr_read(ecx
, data
);
1888 kvm_rax_write(vcpu
, data
& -1u);
1889 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1891 trace_kvm_msr_read_ex(ecx
);
1894 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1896 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1898 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1900 u32 ecx
= kvm_rcx_read(vcpu
);
1901 u64 data
= kvm_read_edx_eax(vcpu
);
1904 r
= kvm_set_msr(vcpu
, ecx
, data
);
1906 /* MSR write failed? See if we should ask user space */
1907 if (r
&& kvm_set_msr_user_space(vcpu
, ecx
, data
, r
))
1908 /* Bounce to user space */
1911 /* Signal all other negative errors to userspace */
1916 trace_kvm_msr_write(ecx
, data
);
1918 trace_kvm_msr_write_ex(ecx
, data
);
1920 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1922 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1924 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
1926 return kvm_skip_emulated_instruction(vcpu
);
1928 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop
);
1930 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
1932 /* Treat an INVD instruction as a NOP and just skip it. */
1933 return kvm_emulate_as_nop(vcpu
);
1935 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
1937 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
1939 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1940 return kvm_emulate_as_nop(vcpu
);
1942 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
1944 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
1946 kvm_queue_exception(vcpu
, UD_VECTOR
);
1949 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
1951 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
1953 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1954 return kvm_emulate_as_nop(vcpu
);
1956 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
1958 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
1960 xfer_to_guest_mode_prepare();
1961 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
1962 xfer_to_guest_mode_work_pending();
1966 * The fast path for frequent and performance sensitive wrmsr emulation,
1967 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1968 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1969 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1970 * other cases which must be called after interrupts are enabled on the host.
1972 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1974 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1977 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1978 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1979 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1980 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1983 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1984 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1985 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1986 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1993 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
1995 if (!kvm_can_use_hv_timer(vcpu
))
1998 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2002 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
2004 u32 msr
= kvm_rcx_read(vcpu
);
2006 fastpath_t ret
= EXIT_FASTPATH_NONE
;
2009 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
2010 data
= kvm_read_edx_eax(vcpu
);
2011 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
2012 kvm_skip_emulated_instruction(vcpu
);
2013 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
2016 case MSR_IA32_TSC_DEADLINE
:
2017 data
= kvm_read_edx_eax(vcpu
);
2018 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
2019 kvm_skip_emulated_instruction(vcpu
);
2020 ret
= EXIT_FASTPATH_REENTER_GUEST
;
2027 if (ret
!= EXIT_FASTPATH_NONE
)
2028 trace_kvm_msr_write(msr
, data
);
2032 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
2035 * Adapt set_msr() to msr_io()'s calling convention
2037 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2039 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
2042 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2044 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2047 #ifdef CONFIG_X86_64
2048 struct pvclock_clock
{
2058 struct pvclock_gtod_data
{
2061 struct pvclock_clock clock
; /* extract of a clocksource struct */
2062 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2068 static struct pvclock_gtod_data pvclock_gtod_data
;
2070 static void update_pvclock_gtod(struct timekeeper
*tk
)
2072 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2074 write_seqcount_begin(&vdata
->seq
);
2076 /* copy pvclock gtod data */
2077 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2078 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2079 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2080 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2081 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2082 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2083 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2085 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2086 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2087 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2088 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2089 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2090 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2091 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2093 vdata
->wall_time_sec
= tk
->xtime_sec
;
2095 vdata
->offs_boot
= tk
->offs_boot
;
2097 write_seqcount_end(&vdata
->seq
);
2100 static s64
get_kvmclock_base_ns(void)
2102 /* Count up from boot time, but with the frequency of the raw clock. */
2103 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2106 static s64
get_kvmclock_base_ns(void)
2108 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2109 return ktime_get_boottime_ns();
2113 void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2117 struct pvclock_wall_clock wc
;
2124 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2129 ++version
; /* first time write, random junk */
2133 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2137 * The guest calculates current wall clock time by adding
2138 * system time (updated by kvm_guest_time_update below) to the
2139 * wall clock specified here. We do the reverse here.
2141 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
2143 wc
.nsec
= do_div(wall_nsec
, 1000000000);
2144 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2145 wc
.version
= version
;
2147 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2150 wc_sec_hi
= wall_nsec
>> 32;
2151 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2152 &wc_sec_hi
, sizeof(wc_sec_hi
));
2156 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2159 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2160 bool old_msr
, bool host_initiated
)
2162 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2164 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2165 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2166 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2168 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2171 vcpu
->arch
.time
= system_time
;
2172 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2174 /* we verify if the enable bit is set... */
2175 vcpu
->arch
.pv_time_enabled
= false;
2176 if (!(system_time
& 1))
2179 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2180 &vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2181 sizeof(struct pvclock_vcpu_time_info
)))
2182 vcpu
->arch
.pv_time_enabled
= true;
2187 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2189 do_shl32_div32(dividend
, divisor
);
2193 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2194 s8
*pshift
, u32
*pmultiplier
)
2202 scaled64
= scaled_hz
;
2203 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2208 tps32
= (uint32_t)tps64
;
2209 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2210 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2218 *pmultiplier
= div_frac(scaled64
, tps32
);
2221 #ifdef CONFIG_X86_64
2222 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2225 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2226 static unsigned long max_tsc_khz
;
2228 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2230 u64 v
= (u64
)khz
* (1000000 + ppm
);
2235 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
);
2237 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2241 /* Guest TSC same frequency as host TSC? */
2243 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2247 /* TSC scaling supported? */
2248 if (!kvm_has_tsc_control
) {
2249 if (user_tsc_khz
> tsc_khz
) {
2250 vcpu
->arch
.tsc_catchup
= 1;
2251 vcpu
->arch
.tsc_always_catchup
= 1;
2254 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2259 /* TSC scaling required - calculate ratio */
2260 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2261 user_tsc_khz
, tsc_khz
);
2263 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2264 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2269 kvm_vcpu_write_tsc_multiplier(vcpu
, ratio
);
2273 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2275 u32 thresh_lo
, thresh_hi
;
2276 int use_scaling
= 0;
2278 /* tsc_khz can be zero if TSC calibration fails */
2279 if (user_tsc_khz
== 0) {
2280 /* set tsc_scaling_ratio to a safe value */
2281 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2285 /* Compute a scale to convert nanoseconds in TSC cycles */
2286 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2287 &vcpu
->arch
.virtual_tsc_shift
,
2288 &vcpu
->arch
.virtual_tsc_mult
);
2289 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2292 * Compute the variation in TSC rate which is acceptable
2293 * within the range of tolerance and decide if the
2294 * rate being applied is within that bounds of the hardware
2295 * rate. If so, no scaling or compensation need be done.
2297 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2298 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2299 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2300 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2303 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2306 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2308 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2309 vcpu
->arch
.virtual_tsc_mult
,
2310 vcpu
->arch
.virtual_tsc_shift
);
2311 tsc
+= vcpu
->arch
.this_tsc_write
;
2315 static inline int gtod_is_based_on_tsc(int mode
)
2317 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2320 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2322 #ifdef CONFIG_X86_64
2324 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2325 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2327 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2328 atomic_read(&vcpu
->kvm
->online_vcpus
));
2331 * Once the masterclock is enabled, always perform request in
2332 * order to update it.
2334 * In order to enable masterclock, the host clocksource must be TSC
2335 * and the vcpus need to have matched TSCs. When that happens,
2336 * perform request to enable masterclock.
2338 if (ka
->use_master_clock
||
2339 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2340 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2342 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2343 atomic_read(&vcpu
->kvm
->online_vcpus
),
2344 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2349 * Multiply tsc by a fixed point number represented by ratio.
2351 * The most significant 64-N bits (mult) of ratio represent the
2352 * integral part of the fixed point number; the remaining N bits
2353 * (frac) represent the fractional part, ie. ratio represents a fixed
2354 * point number (mult + frac * 2^(-N)).
2356 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2358 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2360 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2363 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
, u64 ratio
)
2367 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2368 _tsc
= __scale_tsc(ratio
, tsc
);
2372 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2374 static u64
kvm_compute_l1_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2378 tsc
= kvm_scale_tsc(vcpu
, rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
);
2380 return target_tsc
- tsc
;
2383 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2385 return vcpu
->arch
.l1_tsc_offset
+
2386 kvm_scale_tsc(vcpu
, host_tsc
, vcpu
->arch
.l1_tsc_scaling_ratio
);
2388 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2390 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
)
2394 if (l2_multiplier
== kvm_default_tsc_scaling_ratio
)
2395 nested_offset
= l1_offset
;
2397 nested_offset
= mul_s64_u64_shr((s64
) l1_offset
, l2_multiplier
,
2398 kvm_tsc_scaling_ratio_frac_bits
);
2400 nested_offset
+= l2_offset
;
2401 return nested_offset
;
2403 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset
);
2405 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
)
2407 if (l2_multiplier
!= kvm_default_tsc_scaling_ratio
)
2408 return mul_u64_u64_shr(l1_multiplier
, l2_multiplier
,
2409 kvm_tsc_scaling_ratio_frac_bits
);
2411 return l1_multiplier
;
2413 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier
);
2415 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 l1_offset
)
2417 trace_kvm_write_tsc_offset(vcpu
->vcpu_id
,
2418 vcpu
->arch
.l1_tsc_offset
,
2421 vcpu
->arch
.l1_tsc_offset
= l1_offset
;
2424 * If we are here because L1 chose not to trap WRMSR to TSC then
2425 * according to the spec this should set L1's TSC (as opposed to
2426 * setting L1's offset for L2).
2428 if (is_guest_mode(vcpu
))
2429 vcpu
->arch
.tsc_offset
= kvm_calc_nested_tsc_offset(
2431 static_call(kvm_x86_get_l2_tsc_offset
)(vcpu
),
2432 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2434 vcpu
->arch
.tsc_offset
= l1_offset
;
2436 static_call(kvm_x86_write_tsc_offset
)(vcpu
, vcpu
->arch
.tsc_offset
);
2439 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
)
2441 vcpu
->arch
.l1_tsc_scaling_ratio
= l1_multiplier
;
2443 /* Userspace is changing the multiplier while L2 is active */
2444 if (is_guest_mode(vcpu
))
2445 vcpu
->arch
.tsc_scaling_ratio
= kvm_calc_nested_tsc_multiplier(
2447 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2449 vcpu
->arch
.tsc_scaling_ratio
= l1_multiplier
;
2451 if (kvm_has_tsc_control
)
2452 static_call(kvm_x86_write_tsc_multiplier
)(
2453 vcpu
, vcpu
->arch
.tsc_scaling_ratio
);
2456 static inline bool kvm_check_tsc_unstable(void)
2458 #ifdef CONFIG_X86_64
2460 * TSC is marked unstable when we're running on Hyper-V,
2461 * 'TSC page' clocksource is good.
2463 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2466 return check_tsc_unstable();
2469 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2471 struct kvm
*kvm
= vcpu
->kvm
;
2472 u64 offset
, ns
, elapsed
;
2473 unsigned long flags
;
2475 bool already_matched
;
2476 bool synchronizing
= false;
2478 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2479 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2480 ns
= get_kvmclock_base_ns();
2481 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2483 if (vcpu
->arch
.virtual_tsc_khz
) {
2486 * detection of vcpu initialization -- need to sync
2487 * with other vCPUs. This particularly helps to keep
2488 * kvm_clock stable after CPU hotplug
2490 synchronizing
= true;
2492 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2493 nsec_to_cycles(vcpu
, elapsed
);
2494 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2496 * Special case: TSC write with a small delta (1 second)
2497 * of virtual cycle time against real time is
2498 * interpreted as an attempt to synchronize the CPU.
2500 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2501 data
+ tsc_hz
> tsc_exp
;
2506 * For a reliable TSC, we can match TSC offsets, and for an unstable
2507 * TSC, we add elapsed time in this computation. We could let the
2508 * compensation code attempt to catch up if we fall behind, but
2509 * it's better to try to match offsets from the beginning.
2511 if (synchronizing
&&
2512 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2513 if (!kvm_check_tsc_unstable()) {
2514 offset
= kvm
->arch
.cur_tsc_offset
;
2516 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2518 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2521 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2524 * We split periods of matched TSC writes into generations.
2525 * For each generation, we track the original measured
2526 * nanosecond time, offset, and write, so if TSCs are in
2527 * sync, we can match exact offset, and if not, we can match
2528 * exact software computation in compute_guest_tsc()
2530 * These values are tracked in kvm->arch.cur_xxx variables.
2532 kvm
->arch
.cur_tsc_generation
++;
2533 kvm
->arch
.cur_tsc_nsec
= ns
;
2534 kvm
->arch
.cur_tsc_write
= data
;
2535 kvm
->arch
.cur_tsc_offset
= offset
;
2540 * We also track th most recent recorded KHZ, write and time to
2541 * allow the matching interval to be extended at each write.
2543 kvm
->arch
.last_tsc_nsec
= ns
;
2544 kvm
->arch
.last_tsc_write
= data
;
2545 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2547 vcpu
->arch
.last_guest_tsc
= data
;
2549 /* Keep track of which generation this VCPU has synchronized to */
2550 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2551 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2552 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2554 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2555 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2557 raw_spin_lock_irqsave(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2559 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2560 } else if (!already_matched
) {
2561 kvm
->arch
.nr_vcpus_matched_tsc
++;
2564 kvm_track_tsc_matching(vcpu
);
2565 raw_spin_unlock_irqrestore(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2568 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2571 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2572 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2575 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2577 if (vcpu
->arch
.l1_tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2578 WARN_ON(adjustment
< 0);
2579 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
,
2580 vcpu
->arch
.l1_tsc_scaling_ratio
);
2581 adjust_tsc_offset_guest(vcpu
, adjustment
);
2584 #ifdef CONFIG_X86_64
2586 static u64
read_tsc(void)
2588 u64 ret
= (u64
)rdtsc_ordered();
2589 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2591 if (likely(ret
>= last
))
2595 * GCC likes to generate cmov here, but this branch is extremely
2596 * predictable (it's just a function of time and the likely is
2597 * very likely) and there's a data dependence, so force GCC
2598 * to generate a branch instead. I don't barrier() because
2599 * we don't actually need a barrier, and if this function
2600 * ever gets inlined it will generate worse code.
2606 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2612 switch (clock
->vclock_mode
) {
2613 case VDSO_CLOCKMODE_HVCLOCK
:
2614 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2616 if (tsc_pg_val
!= U64_MAX
) {
2617 /* TSC page valid */
2618 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2619 v
= (tsc_pg_val
- clock
->cycle_last
) &
2622 /* TSC page invalid */
2623 *mode
= VDSO_CLOCKMODE_NONE
;
2626 case VDSO_CLOCKMODE_TSC
:
2627 *mode
= VDSO_CLOCKMODE_TSC
;
2628 *tsc_timestamp
= read_tsc();
2629 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2633 *mode
= VDSO_CLOCKMODE_NONE
;
2636 if (*mode
== VDSO_CLOCKMODE_NONE
)
2637 *tsc_timestamp
= v
= 0;
2639 return v
* clock
->mult
;
2642 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2644 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2650 seq
= read_seqcount_begin(>od
->seq
);
2651 ns
= gtod
->raw_clock
.base_cycles
;
2652 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2653 ns
>>= gtod
->raw_clock
.shift
;
2654 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2655 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2661 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2663 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2669 seq
= read_seqcount_begin(>od
->seq
);
2670 ts
->tv_sec
= gtod
->wall_time_sec
;
2671 ns
= gtod
->clock
.base_cycles
;
2672 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2673 ns
>>= gtod
->clock
.shift
;
2674 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2676 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2682 /* returns true if host is using TSC based clocksource */
2683 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2685 /* checked again under seqlock below */
2686 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2689 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2693 /* returns true if host is using TSC based clocksource */
2694 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2697 /* checked again under seqlock below */
2698 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2701 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2707 * Assuming a stable TSC across physical CPUS, and a stable TSC
2708 * across virtual CPUs, the following condition is possible.
2709 * Each numbered line represents an event visible to both
2710 * CPUs at the next numbered event.
2712 * "timespecX" represents host monotonic time. "tscX" represents
2715 * VCPU0 on CPU0 | VCPU1 on CPU1
2717 * 1. read timespec0,tsc0
2718 * 2. | timespec1 = timespec0 + N
2720 * 3. transition to guest | transition to guest
2721 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2722 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2723 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2725 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2728 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2730 * - 0 < N - M => M < N
2732 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2733 * always the case (the difference between two distinct xtime instances
2734 * might be smaller then the difference between corresponding TSC reads,
2735 * when updating guest vcpus pvclock areas).
2737 * To avoid that problem, do not allow visibility of distinct
2738 * system_timestamp/tsc_timestamp values simultaneously: use a master
2739 * copy of host monotonic time values. Update that master copy
2742 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2746 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2748 #ifdef CONFIG_X86_64
2749 struct kvm_arch
*ka
= &kvm
->arch
;
2751 bool host_tsc_clocksource
, vcpus_matched
;
2753 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2754 atomic_read(&kvm
->online_vcpus
));
2757 * If the host uses TSC clock, then passthrough TSC as stable
2760 host_tsc_clocksource
= kvm_get_time_and_clockread(
2761 &ka
->master_kernel_ns
,
2762 &ka
->master_cycle_now
);
2764 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2765 && !ka
->backwards_tsc_observed
2766 && !ka
->boot_vcpu_runs_old_kvmclock
;
2768 if (ka
->use_master_clock
)
2769 atomic_set(&kvm_guest_has_master_clock
, 1);
2771 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2772 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2777 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2779 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2782 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2784 #ifdef CONFIG_X86_64
2786 struct kvm_vcpu
*vcpu
;
2787 struct kvm_arch
*ka
= &kvm
->arch
;
2788 unsigned long flags
;
2790 kvm_hv_invalidate_tsc_page(kvm
);
2792 kvm_make_mclock_inprogress_request(kvm
);
2794 /* no guest entries from this point */
2795 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2796 pvclock_update_vm_gtod_copy(kvm
);
2797 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2799 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2800 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2802 /* guest entries allowed */
2803 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2804 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2808 u64
get_kvmclock_ns(struct kvm
*kvm
)
2810 struct kvm_arch
*ka
= &kvm
->arch
;
2811 struct pvclock_vcpu_time_info hv_clock
;
2812 unsigned long flags
;
2815 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2816 if (!ka
->use_master_clock
) {
2817 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2818 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2821 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2822 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2823 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2825 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2828 if (__this_cpu_read(cpu_tsc_khz
)) {
2829 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2830 &hv_clock
.tsc_shift
,
2831 &hv_clock
.tsc_to_system_mul
);
2832 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2834 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2841 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
,
2842 struct gfn_to_hva_cache
*cache
,
2843 unsigned int offset
)
2845 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2846 struct pvclock_vcpu_time_info guest_hv_clock
;
2848 if (unlikely(kvm_read_guest_offset_cached(v
->kvm
, cache
,
2849 &guest_hv_clock
, offset
, sizeof(guest_hv_clock
))))
2852 /* This VCPU is paused, but it's legal for a guest to read another
2853 * VCPU's kvmclock, so we really have to follow the specification where
2854 * it says that version is odd if data is being modified, and even after
2857 * Version field updates must be kept separate. This is because
2858 * kvm_write_guest_cached might use a "rep movs" instruction, and
2859 * writes within a string instruction are weakly ordered. So there
2860 * are three writes overall.
2862 * As a small optimization, only write the version field in the first
2863 * and third write. The vcpu->pv_time cache is still valid, because the
2864 * version field is the first in the struct.
2866 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2868 if (guest_hv_clock
.version
& 1)
2869 ++guest_hv_clock
.version
; /* first time write, random junk */
2871 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2872 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2873 &vcpu
->hv_clock
, offset
,
2874 sizeof(vcpu
->hv_clock
.version
));
2878 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2879 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2881 if (vcpu
->pvclock_set_guest_stopped_request
) {
2882 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2883 vcpu
->pvclock_set_guest_stopped_request
= false;
2886 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2888 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2889 &vcpu
->hv_clock
, offset
,
2890 sizeof(vcpu
->hv_clock
));
2894 vcpu
->hv_clock
.version
++;
2895 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2896 &vcpu
->hv_clock
, offset
,
2897 sizeof(vcpu
->hv_clock
.version
));
2900 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2902 unsigned long flags
, tgt_tsc_khz
;
2903 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2904 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2906 u64 tsc_timestamp
, host_tsc
;
2908 bool use_master_clock
;
2914 * If the host uses TSC clock, then passthrough TSC as stable
2917 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2918 use_master_clock
= ka
->use_master_clock
;
2919 if (use_master_clock
) {
2920 host_tsc
= ka
->master_cycle_now
;
2921 kernel_ns
= ka
->master_kernel_ns
;
2923 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2925 /* Keep irq disabled to prevent changes to the clock */
2926 local_irq_save(flags
);
2927 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2928 if (unlikely(tgt_tsc_khz
== 0)) {
2929 local_irq_restore(flags
);
2930 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2933 if (!use_master_clock
) {
2935 kernel_ns
= get_kvmclock_base_ns();
2938 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2941 * We may have to catch up the TSC to match elapsed wall clock
2942 * time for two reasons, even if kvmclock is used.
2943 * 1) CPU could have been running below the maximum TSC rate
2944 * 2) Broken TSC compensation resets the base at each VCPU
2945 * entry to avoid unknown leaps of TSC even when running
2946 * again on the same CPU. This may cause apparent elapsed
2947 * time to disappear, and the guest to stand still or run
2950 if (vcpu
->tsc_catchup
) {
2951 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2952 if (tsc
> tsc_timestamp
) {
2953 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2954 tsc_timestamp
= tsc
;
2958 local_irq_restore(flags
);
2960 /* With all the info we got, fill in the values */
2962 if (kvm_has_tsc_control
)
2963 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
,
2964 v
->arch
.l1_tsc_scaling_ratio
);
2966 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2967 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2968 &vcpu
->hv_clock
.tsc_shift
,
2969 &vcpu
->hv_clock
.tsc_to_system_mul
);
2970 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2973 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2974 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2975 vcpu
->last_guest_tsc
= tsc_timestamp
;
2977 /* If the host uses TSC clocksource, then it is stable */
2979 if (use_master_clock
)
2980 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2982 vcpu
->hv_clock
.flags
= pvclock_flags
;
2984 if (vcpu
->pv_time_enabled
)
2985 kvm_setup_pvclock_page(v
, &vcpu
->pv_time
, 0);
2986 if (vcpu
->xen
.vcpu_info_set
)
2987 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_info_cache
,
2988 offsetof(struct compat_vcpu_info
, time
));
2989 if (vcpu
->xen
.vcpu_time_info_set
)
2990 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0);
2992 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2997 * kvmclock updates which are isolated to a given vcpu, such as
2998 * vcpu->cpu migration, should not allow system_timestamp from
2999 * the rest of the vcpus to remain static. Otherwise ntp frequency
3000 * correction applies to one vcpu's system_timestamp but not
3003 * So in those cases, request a kvmclock update for all vcpus.
3004 * We need to rate-limit these requests though, as they can
3005 * considerably slow guests that have a large number of vcpus.
3006 * The time for a remote vcpu to update its kvmclock is bound
3007 * by the delay we use to rate-limit the updates.
3010 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3012 static void kvmclock_update_fn(struct work_struct
*work
)
3015 struct delayed_work
*dwork
= to_delayed_work(work
);
3016 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3017 kvmclock_update_work
);
3018 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3019 struct kvm_vcpu
*vcpu
;
3021 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3022 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3023 kvm_vcpu_kick(vcpu
);
3027 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
3029 struct kvm
*kvm
= v
->kvm
;
3031 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3032 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
3033 KVMCLOCK_UPDATE_DELAY
);
3036 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3038 static void kvmclock_sync_fn(struct work_struct
*work
)
3040 struct delayed_work
*dwork
= to_delayed_work(work
);
3041 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3042 kvmclock_sync_work
);
3043 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3045 if (!kvmclock_periodic_sync
)
3048 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
3049 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
3050 KVMCLOCK_SYNC_PERIOD
);
3054 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3056 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
3058 /* McStatusWrEn enabled? */
3059 if (guest_cpuid_is_amd_or_hygon(vcpu
))
3060 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
3065 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3067 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3068 unsigned bank_num
= mcg_cap
& 0xff;
3069 u32 msr
= msr_info
->index
;
3070 u64 data
= msr_info
->data
;
3073 case MSR_IA32_MCG_STATUS
:
3074 vcpu
->arch
.mcg_status
= data
;
3076 case MSR_IA32_MCG_CTL
:
3077 if (!(mcg_cap
& MCG_CTL_P
) &&
3078 (data
|| !msr_info
->host_initiated
))
3080 if (data
!= 0 && data
!= ~(u64
)0)
3082 vcpu
->arch
.mcg_ctl
= data
;
3085 if (msr
>= MSR_IA32_MC0_CTL
&&
3086 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3087 u32 offset
= array_index_nospec(
3088 msr
- MSR_IA32_MC0_CTL
,
3089 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3091 /* only 0 or all 1s can be written to IA32_MCi_CTL
3092 * some Linux kernels though clear bit 10 in bank 4 to
3093 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3094 * this to avoid an uncatched #GP in the guest
3096 if ((offset
& 0x3) == 0 &&
3097 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
3101 if (!msr_info
->host_initiated
&&
3102 (offset
& 0x3) == 1 && data
!= 0) {
3103 if (!can_set_mci_status(vcpu
))
3107 vcpu
->arch
.mce_banks
[offset
] = data
;
3115 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3117 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3119 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3122 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3124 gpa_t gpa
= data
& ~0x3f;
3126 /* Bits 4:5 are reserved, Should be zero */
3130 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3131 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3134 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3135 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3138 if (!lapic_in_kernel(vcpu
))
3139 return data
? 1 : 0;
3141 vcpu
->arch
.apf
.msr_en_val
= data
;
3143 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3144 kvm_clear_async_pf_completion_queue(vcpu
);
3145 kvm_async_pf_hash_reset(vcpu
);
3149 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3153 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3154 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3156 kvm_async_pf_wakeup_all(vcpu
);
3161 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3163 /* Bits 8-63 are reserved */
3167 if (!lapic_in_kernel(vcpu
))
3170 vcpu
->arch
.apf
.msr_int_val
= data
;
3172 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3177 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3179 vcpu
->arch
.pv_time_enabled
= false;
3180 vcpu
->arch
.time
= 0;
3183 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3185 ++vcpu
->stat
.tlb_flush
;
3186 static_call(kvm_x86_tlb_flush_all
)(vcpu
);
3189 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3191 ++vcpu
->stat
.tlb_flush
;
3195 * A TLB flush on behalf of the guest is equivalent to
3196 * INVPCID(all), toggling CR4.PGE, etc., which requires
3197 * a forced sync of the shadow page tables. Unload the
3198 * entire MMU here and the subsequent load will sync the
3199 * shadow page tables, and also flush the TLB.
3201 kvm_mmu_unload(vcpu
);
3205 static_call(kvm_x86_tlb_flush_guest
)(vcpu
);
3209 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu
*vcpu
)
3211 ++vcpu
->stat
.tlb_flush
;
3212 static_call(kvm_x86_tlb_flush_current
)(vcpu
);
3216 * Service "local" TLB flush requests, which are specific to the current MMU
3217 * context. In addition to the generic event handling in vcpu_enter_guest(),
3218 * TLB flushes that are targeted at an MMU context also need to be serviced
3219 * prior before nested VM-Enter/VM-Exit.
3221 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu
*vcpu
)
3223 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
3224 kvm_vcpu_flush_tlb_current(vcpu
);
3226 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
3227 kvm_vcpu_flush_tlb_guest(vcpu
);
3229 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests
);
3231 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3233 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3234 struct kvm_steal_time __user
*st
;
3235 struct kvm_memslots
*slots
;
3239 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3240 kvm_xen_runstate_set_running(vcpu
);
3244 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3247 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3250 slots
= kvm_memslots(vcpu
->kvm
);
3252 if (unlikely(slots
->generation
!= ghc
->generation
||
3253 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3254 gfn_t gfn
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3256 /* We rely on the fact that it fits in a single page. */
3257 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3259 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gfn
, sizeof(*st
)) ||
3260 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3264 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3266 * Doing a TLB flush here, on the guest's behalf, can avoid
3269 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3270 u8 st_preempted
= 0;
3273 if (!user_access_begin(st
, sizeof(*st
)))
3276 asm volatile("1: xchgb %0, %2\n"
3279 _ASM_EXTABLE_UA(1b
, 2b
)
3280 : "+q" (st_preempted
),
3282 "+m" (st
->preempted
));
3288 vcpu
->arch
.st
.preempted
= 0;
3290 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3291 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3292 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3293 kvm_vcpu_flush_tlb_guest(vcpu
);
3295 if (!user_access_begin(st
, sizeof(*st
)))
3298 if (!user_access_begin(st
, sizeof(*st
)))
3301 unsafe_put_user(0, &st
->preempted
, out
);
3302 vcpu
->arch
.st
.preempted
= 0;
3305 unsafe_get_user(version
, &st
->version
, out
);
3307 version
+= 1; /* first time write, random junk */
3310 unsafe_put_user(version
, &st
->version
, out
);
3314 unsafe_get_user(steal
, &st
->steal
, out
);
3315 steal
+= current
->sched_info
.run_delay
-
3316 vcpu
->arch
.st
.last_steal
;
3317 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3318 unsafe_put_user(steal
, &st
->steal
, out
);
3321 unsafe_put_user(version
, &st
->version
, out
);
3326 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3329 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3332 u32 msr
= msr_info
->index
;
3333 u64 data
= msr_info
->data
;
3335 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3336 return kvm_xen_write_hypercall_page(vcpu
, data
);
3339 case MSR_AMD64_NB_CFG
:
3340 case MSR_IA32_UCODE_WRITE
:
3341 case MSR_VM_HSAVE_PA
:
3342 case MSR_AMD64_PATCH_LOADER
:
3343 case MSR_AMD64_BU_CFG2
:
3344 case MSR_AMD64_DC_CFG
:
3345 case MSR_F15H_EX_CFG
:
3348 case MSR_IA32_UCODE_REV
:
3349 if (msr_info
->host_initiated
)
3350 vcpu
->arch
.microcode_version
= data
;
3352 case MSR_IA32_ARCH_CAPABILITIES
:
3353 if (!msr_info
->host_initiated
)
3355 vcpu
->arch
.arch_capabilities
= data
;
3357 case MSR_IA32_PERF_CAPABILITIES
: {
3358 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3360 if (!msr_info
->host_initiated
)
3362 if (kvm_get_msr_feature(&msr_ent
))
3364 if (data
& ~msr_ent
.data
)
3367 vcpu
->arch
.perf_capabilities
= data
;
3372 return set_efer(vcpu
, msr_info
);
3374 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3375 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3376 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3378 /* Handle McStatusWrEn */
3379 if (data
== BIT_ULL(18)) {
3380 vcpu
->arch
.msr_hwcr
= data
;
3381 } else if (data
!= 0) {
3382 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3387 case MSR_FAM10H_MMIO_CONF_BASE
:
3389 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3394 case 0x200 ... 0x2ff:
3395 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3396 case MSR_IA32_APICBASE
:
3397 return kvm_set_apic_base(vcpu
, msr_info
);
3398 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3399 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3400 case MSR_IA32_TSC_DEADLINE
:
3401 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3403 case MSR_IA32_TSC_ADJUST
:
3404 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3405 if (!msr_info
->host_initiated
) {
3406 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3407 adjust_tsc_offset_guest(vcpu
, adj
);
3408 /* Before back to guest, tsc_timestamp must be adjusted
3409 * as well, otherwise guest's percpu pvclock time could jump.
3411 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3413 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3416 case MSR_IA32_MISC_ENABLE
:
3417 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3418 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3419 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3421 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3422 kvm_update_cpuid_runtime(vcpu
);
3424 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3427 case MSR_IA32_SMBASE
:
3428 if (!msr_info
->host_initiated
)
3430 vcpu
->arch
.smbase
= data
;
3432 case MSR_IA32_POWER_CTL
:
3433 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3436 if (msr_info
->host_initiated
) {
3437 kvm_synchronize_tsc(vcpu
, data
);
3439 u64 adj
= kvm_compute_l1_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3440 adjust_tsc_offset_guest(vcpu
, adj
);
3441 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3445 if (!msr_info
->host_initiated
&&
3446 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3449 * KVM supports exposing PT to the guest, but does not support
3450 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3451 * XSAVES/XRSTORS to save/restore PT MSRs.
3453 if (data
& ~supported_xss
)
3455 vcpu
->arch
.ia32_xss
= data
;
3456 kvm_update_cpuid_runtime(vcpu
);
3459 if (!msr_info
->host_initiated
)
3461 vcpu
->arch
.smi_count
= data
;
3463 case MSR_KVM_WALL_CLOCK_NEW
:
3464 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3467 vcpu
->kvm
->arch
.wall_clock
= data
;
3468 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3470 case MSR_KVM_WALL_CLOCK
:
3471 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3474 vcpu
->kvm
->arch
.wall_clock
= data
;
3475 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3477 case MSR_KVM_SYSTEM_TIME_NEW
:
3478 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3481 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3483 case MSR_KVM_SYSTEM_TIME
:
3484 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3487 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3489 case MSR_KVM_ASYNC_PF_EN
:
3490 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3493 if (kvm_pv_enable_async_pf(vcpu
, data
))
3496 case MSR_KVM_ASYNC_PF_INT
:
3497 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3500 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3503 case MSR_KVM_ASYNC_PF_ACK
:
3504 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3507 vcpu
->arch
.apf
.pageready_pending
= false;
3508 kvm_check_async_pf_completion(vcpu
);
3511 case MSR_KVM_STEAL_TIME
:
3512 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3515 if (unlikely(!sched_info_on()))
3518 if (data
& KVM_STEAL_RESERVED_MASK
)
3521 vcpu
->arch
.st
.msr_val
= data
;
3523 if (!(data
& KVM_MSR_ENABLED
))
3526 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3529 case MSR_KVM_PV_EOI_EN
:
3530 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3533 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
3537 case MSR_KVM_POLL_CONTROL
:
3538 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3541 /* only enable bit supported */
3542 if (data
& (-1ULL << 1))
3545 vcpu
->arch
.msr_kvm_poll_control
= data
;
3548 case MSR_IA32_MCG_CTL
:
3549 case MSR_IA32_MCG_STATUS
:
3550 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3551 return set_msr_mce(vcpu
, msr_info
);
3553 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3554 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3557 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3558 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3559 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3560 return kvm_pmu_set_msr(vcpu
, msr_info
);
3562 if (pr
|| data
!= 0)
3563 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3564 "0x%x data 0x%llx\n", msr
, data
);
3566 case MSR_K7_CLK_CTL
:
3568 * Ignore all writes to this no longer documented MSR.
3569 * Writes are only relevant for old K7 processors,
3570 * all pre-dating SVM, but a recommended workaround from
3571 * AMD for these chips. It is possible to specify the
3572 * affected processor models on the command line, hence
3573 * the need to ignore the workaround.
3576 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3577 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3578 case HV_X64_MSR_SYNDBG_OPTIONS
:
3579 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3580 case HV_X64_MSR_CRASH_CTL
:
3581 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3582 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3583 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3584 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3585 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3586 msr_info
->host_initiated
);
3587 case MSR_IA32_BBL_CR_CTL3
:
3588 /* Drop writes to this legacy MSR -- see rdmsr
3589 * counterpart for further detail.
3591 if (report_ignored_msrs
)
3592 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3595 case MSR_AMD64_OSVW_ID_LENGTH
:
3596 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3598 vcpu
->arch
.osvw
.length
= data
;
3600 case MSR_AMD64_OSVW_STATUS
:
3601 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3603 vcpu
->arch
.osvw
.status
= data
;
3605 case MSR_PLATFORM_INFO
:
3606 if (!msr_info
->host_initiated
||
3607 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3608 cpuid_fault_enabled(vcpu
)))
3610 vcpu
->arch
.msr_platform_info
= data
;
3612 case MSR_MISC_FEATURES_ENABLES
:
3613 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3614 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3615 !supports_cpuid_fault(vcpu
)))
3617 vcpu
->arch
.msr_misc_features_enables
= data
;
3620 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3621 return kvm_pmu_set_msr(vcpu
, msr_info
);
3622 return KVM_MSR_RET_INVALID
;
3626 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3628 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3631 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3632 unsigned bank_num
= mcg_cap
& 0xff;
3635 case MSR_IA32_P5_MC_ADDR
:
3636 case MSR_IA32_P5_MC_TYPE
:
3639 case MSR_IA32_MCG_CAP
:
3640 data
= vcpu
->arch
.mcg_cap
;
3642 case MSR_IA32_MCG_CTL
:
3643 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3645 data
= vcpu
->arch
.mcg_ctl
;
3647 case MSR_IA32_MCG_STATUS
:
3648 data
= vcpu
->arch
.mcg_status
;
3651 if (msr
>= MSR_IA32_MC0_CTL
&&
3652 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3653 u32 offset
= array_index_nospec(
3654 msr
- MSR_IA32_MC0_CTL
,
3655 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3657 data
= vcpu
->arch
.mce_banks
[offset
];
3666 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3668 switch (msr_info
->index
) {
3669 case MSR_IA32_PLATFORM_ID
:
3670 case MSR_IA32_EBL_CR_POWERON
:
3671 case MSR_IA32_LASTBRANCHFROMIP
:
3672 case MSR_IA32_LASTBRANCHTOIP
:
3673 case MSR_IA32_LASTINTFROMIP
:
3674 case MSR_IA32_LASTINTTOIP
:
3675 case MSR_AMD64_SYSCFG
:
3676 case MSR_K8_TSEG_ADDR
:
3677 case MSR_K8_TSEG_MASK
:
3678 case MSR_VM_HSAVE_PA
:
3679 case MSR_K8_INT_PENDING_MSG
:
3680 case MSR_AMD64_NB_CFG
:
3681 case MSR_FAM10H_MMIO_CONF_BASE
:
3682 case MSR_AMD64_BU_CFG2
:
3683 case MSR_IA32_PERF_CTL
:
3684 case MSR_AMD64_DC_CFG
:
3685 case MSR_F15H_EX_CFG
:
3687 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3688 * limit) MSRs. Just return 0, as we do not want to expose the host
3689 * data here. Do not conditionalize this on CPUID, as KVM does not do
3690 * so for existing CPU-specific MSRs.
3692 case MSR_RAPL_POWER_UNIT
:
3693 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3694 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3695 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3696 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3699 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3700 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3701 return kvm_pmu_get_msr(vcpu
, msr_info
);
3702 if (!msr_info
->host_initiated
)
3706 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3707 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3708 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3709 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3710 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3711 return kvm_pmu_get_msr(vcpu
, msr_info
);
3714 case MSR_IA32_UCODE_REV
:
3715 msr_info
->data
= vcpu
->arch
.microcode_version
;
3717 case MSR_IA32_ARCH_CAPABILITIES
:
3718 if (!msr_info
->host_initiated
&&
3719 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3721 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3723 case MSR_IA32_PERF_CAPABILITIES
:
3724 if (!msr_info
->host_initiated
&&
3725 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3727 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3729 case MSR_IA32_POWER_CTL
:
3730 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3732 case MSR_IA32_TSC
: {
3734 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3735 * even when not intercepted. AMD manual doesn't explicitly
3736 * state this but appears to behave the same.
3738 * On userspace reads and writes, however, we unconditionally
3739 * return L1's TSC value to ensure backwards-compatible
3740 * behavior for migration.
3744 if (msr_info
->host_initiated
) {
3745 offset
= vcpu
->arch
.l1_tsc_offset
;
3746 ratio
= vcpu
->arch
.l1_tsc_scaling_ratio
;
3748 offset
= vcpu
->arch
.tsc_offset
;
3749 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
3752 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc(), ratio
) + offset
;
3756 case 0x200 ... 0x2ff:
3757 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3758 case 0xcd: /* fsb frequency */
3762 * MSR_EBC_FREQUENCY_ID
3763 * Conservative value valid for even the basic CPU models.
3764 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3765 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3766 * and 266MHz for model 3, or 4. Set Core Clock
3767 * Frequency to System Bus Frequency Ratio to 1 (bits
3768 * 31:24) even though these are only valid for CPU
3769 * models > 2, however guests may end up dividing or
3770 * multiplying by zero otherwise.
3772 case MSR_EBC_FREQUENCY_ID
:
3773 msr_info
->data
= 1 << 24;
3775 case MSR_IA32_APICBASE
:
3776 msr_info
->data
= kvm_get_apic_base(vcpu
);
3778 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3779 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3780 case MSR_IA32_TSC_DEADLINE
:
3781 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3783 case MSR_IA32_TSC_ADJUST
:
3784 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3786 case MSR_IA32_MISC_ENABLE
:
3787 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3789 case MSR_IA32_SMBASE
:
3790 if (!msr_info
->host_initiated
)
3792 msr_info
->data
= vcpu
->arch
.smbase
;
3795 msr_info
->data
= vcpu
->arch
.smi_count
;
3797 case MSR_IA32_PERF_STATUS
:
3798 /* TSC increment by tick */
3799 msr_info
->data
= 1000ULL;
3800 /* CPU multiplier */
3801 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3804 msr_info
->data
= vcpu
->arch
.efer
;
3806 case MSR_KVM_WALL_CLOCK
:
3807 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3810 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3812 case MSR_KVM_WALL_CLOCK_NEW
:
3813 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3816 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3818 case MSR_KVM_SYSTEM_TIME
:
3819 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3822 msr_info
->data
= vcpu
->arch
.time
;
3824 case MSR_KVM_SYSTEM_TIME_NEW
:
3825 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3828 msr_info
->data
= vcpu
->arch
.time
;
3830 case MSR_KVM_ASYNC_PF_EN
:
3831 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3834 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
3836 case MSR_KVM_ASYNC_PF_INT
:
3837 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3840 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
3842 case MSR_KVM_ASYNC_PF_ACK
:
3843 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3848 case MSR_KVM_STEAL_TIME
:
3849 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3852 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3854 case MSR_KVM_PV_EOI_EN
:
3855 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3858 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3860 case MSR_KVM_POLL_CONTROL
:
3861 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3864 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3866 case MSR_IA32_P5_MC_ADDR
:
3867 case MSR_IA32_P5_MC_TYPE
:
3868 case MSR_IA32_MCG_CAP
:
3869 case MSR_IA32_MCG_CTL
:
3870 case MSR_IA32_MCG_STATUS
:
3871 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3872 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3873 msr_info
->host_initiated
);
3875 if (!msr_info
->host_initiated
&&
3876 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3878 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3880 case MSR_K7_CLK_CTL
:
3882 * Provide expected ramp-up count for K7. All other
3883 * are set to zero, indicating minimum divisors for
3886 * This prevents guest kernels on AMD host with CPU
3887 * type 6, model 8 and higher from exploding due to
3888 * the rdmsr failing.
3890 msr_info
->data
= 0x20000000;
3892 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3893 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3894 case HV_X64_MSR_SYNDBG_OPTIONS
:
3895 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3896 case HV_X64_MSR_CRASH_CTL
:
3897 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3898 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3899 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3900 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3901 return kvm_hv_get_msr_common(vcpu
,
3902 msr_info
->index
, &msr_info
->data
,
3903 msr_info
->host_initiated
);
3904 case MSR_IA32_BBL_CR_CTL3
:
3905 /* This legacy MSR exists but isn't fully documented in current
3906 * silicon. It is however accessed by winxp in very narrow
3907 * scenarios where it sets bit #19, itself documented as
3908 * a "reserved" bit. Best effort attempt to source coherent
3909 * read data here should the balance of the register be
3910 * interpreted by the guest:
3912 * L2 cache control register 3: 64GB range, 256KB size,
3913 * enabled, latency 0x1, configured
3915 msr_info
->data
= 0xbe702111;
3917 case MSR_AMD64_OSVW_ID_LENGTH
:
3918 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3920 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3922 case MSR_AMD64_OSVW_STATUS
:
3923 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3925 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3927 case MSR_PLATFORM_INFO
:
3928 if (!msr_info
->host_initiated
&&
3929 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3931 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3933 case MSR_MISC_FEATURES_ENABLES
:
3934 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3937 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3940 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3941 return kvm_pmu_get_msr(vcpu
, msr_info
);
3942 return KVM_MSR_RET_INVALID
;
3946 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3949 * Read or write a bunch of msrs. All parameters are kernel addresses.
3951 * @return number of msrs set successfully.
3953 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3954 struct kvm_msr_entry
*entries
,
3955 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3956 unsigned index
, u64
*data
))
3960 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3961 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3968 * Read or write a bunch of msrs. Parameters are user addresses.
3970 * @return number of msrs set successfully.
3972 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3973 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3974 unsigned index
, u64
*data
),
3977 struct kvm_msrs msrs
;
3978 struct kvm_msr_entry
*entries
;
3983 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3987 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3990 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3991 entries
= memdup_user(user_msrs
->entries
, size
);
3992 if (IS_ERR(entries
)) {
3993 r
= PTR_ERR(entries
);
3997 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
4002 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
4013 static inline bool kvm_can_mwait_in_guest(void)
4015 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
4016 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
4017 boot_cpu_has(X86_FEATURE_ARAT
);
4020 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
4021 struct kvm_cpuid2 __user
*cpuid_arg
)
4023 struct kvm_cpuid2 cpuid
;
4027 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4030 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4035 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4041 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
4046 case KVM_CAP_IRQCHIP
:
4048 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
4049 case KVM_CAP_SET_TSS_ADDR
:
4050 case KVM_CAP_EXT_CPUID
:
4051 case KVM_CAP_EXT_EMUL_CPUID
:
4052 case KVM_CAP_CLOCKSOURCE
:
4054 case KVM_CAP_NOP_IO_DELAY
:
4055 case KVM_CAP_MP_STATE
:
4056 case KVM_CAP_SYNC_MMU
:
4057 case KVM_CAP_USER_NMI
:
4058 case KVM_CAP_REINJECT_CONTROL
:
4059 case KVM_CAP_IRQ_INJECT_STATUS
:
4060 case KVM_CAP_IOEVENTFD
:
4061 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
4063 case KVM_CAP_PIT_STATE2
:
4064 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
4065 case KVM_CAP_VCPU_EVENTS
:
4066 case KVM_CAP_HYPERV
:
4067 case KVM_CAP_HYPERV_VAPIC
:
4068 case KVM_CAP_HYPERV_SPIN
:
4069 case KVM_CAP_HYPERV_SYNIC
:
4070 case KVM_CAP_HYPERV_SYNIC2
:
4071 case KVM_CAP_HYPERV_VP_INDEX
:
4072 case KVM_CAP_HYPERV_EVENTFD
:
4073 case KVM_CAP_HYPERV_TLBFLUSH
:
4074 case KVM_CAP_HYPERV_SEND_IPI
:
4075 case KVM_CAP_HYPERV_CPUID
:
4076 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4077 case KVM_CAP_SYS_HYPERV_CPUID
:
4078 case KVM_CAP_PCI_SEGMENT
:
4079 case KVM_CAP_DEBUGREGS
:
4080 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
4082 case KVM_CAP_ASYNC_PF
:
4083 case KVM_CAP_ASYNC_PF_INT
:
4084 case KVM_CAP_GET_TSC_KHZ
:
4085 case KVM_CAP_KVMCLOCK_CTRL
:
4086 case KVM_CAP_READONLY_MEM
:
4087 case KVM_CAP_HYPERV_TIME
:
4088 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
4089 case KVM_CAP_TSC_DEADLINE_TIMER
:
4090 case KVM_CAP_DISABLE_QUIRKS
:
4091 case KVM_CAP_SET_BOOT_CPU_ID
:
4092 case KVM_CAP_SPLIT_IRQCHIP
:
4093 case KVM_CAP_IMMEDIATE_EXIT
:
4094 case KVM_CAP_PMU_EVENT_FILTER
:
4095 case KVM_CAP_GET_MSR_FEATURES
:
4096 case KVM_CAP_MSR_PLATFORM_INFO
:
4097 case KVM_CAP_EXCEPTION_PAYLOAD
:
4098 case KVM_CAP_SET_GUEST_DEBUG
:
4099 case KVM_CAP_LAST_CPU
:
4100 case KVM_CAP_X86_USER_SPACE_MSR
:
4101 case KVM_CAP_X86_MSR_FILTER
:
4102 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4103 #ifdef CONFIG_X86_SGX_KVM
4104 case KVM_CAP_SGX_ATTRIBUTE
:
4106 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
4107 case KVM_CAP_SREGS2
:
4108 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
4111 case KVM_CAP_EXIT_HYPERCALL
:
4112 r
= KVM_EXIT_HYPERCALL_VALID_MASK
;
4114 case KVM_CAP_SET_GUEST_DEBUG2
:
4115 return KVM_GUESTDBG_VALID_MASK
;
4116 #ifdef CONFIG_KVM_XEN
4117 case KVM_CAP_XEN_HVM
:
4118 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
4119 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
4120 KVM_XEN_HVM_CONFIG_SHARED_INFO
;
4121 if (sched_info_on())
4122 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
;
4125 case KVM_CAP_SYNC_REGS
:
4126 r
= KVM_SYNC_X86_VALID_FIELDS
;
4128 case KVM_CAP_ADJUST_CLOCK
:
4129 r
= KVM_CLOCK_TSC_STABLE
;
4131 case KVM_CAP_X86_DISABLE_EXITS
:
4132 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
4133 KVM_X86_DISABLE_EXITS_CSTATE
;
4134 if(kvm_can_mwait_in_guest())
4135 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4137 case KVM_CAP_X86_SMM
:
4138 /* SMBASE is usually relocated above 1M on modern chipsets,
4139 * and SMM handlers might indeed rely on 4G segment limits,
4140 * so do not report SMM to be available if real mode is
4141 * emulated via vm86 mode. Still, do not go to great lengths
4142 * to avoid userspace's usage of the feature, because it is a
4143 * fringe case that is not enabled except via specific settings
4144 * of the module parameters.
4146 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4149 r
= !static_call(kvm_x86_cpu_has_accelerated_tpr
)();
4151 case KVM_CAP_NR_VCPUS
:
4152 r
= KVM_SOFT_MAX_VCPUS
;
4154 case KVM_CAP_MAX_VCPUS
:
4157 case KVM_CAP_MAX_VCPU_ID
:
4158 r
= KVM_MAX_VCPU_ID
;
4160 case KVM_CAP_PV_MMU
: /* obsolete */
4164 r
= KVM_MAX_MCE_BANKS
;
4167 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4169 case KVM_CAP_TSC_CONTROL
:
4170 r
= kvm_has_tsc_control
;
4172 case KVM_CAP_X2APIC_API
:
4173 r
= KVM_X2APIC_API_VALID_FLAGS
;
4175 case KVM_CAP_NESTED_STATE
:
4176 r
= kvm_x86_ops
.nested_ops
->get_state
?
4177 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4179 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4180 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
4182 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4183 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4185 case KVM_CAP_SMALLER_MAXPHYADDR
:
4186 r
= (int) allow_smaller_maxphyaddr
;
4188 case KVM_CAP_STEAL_TIME
:
4189 r
= sched_info_on();
4191 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4192 if (kvm_has_bus_lock_exit
)
4193 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4194 KVM_BUS_LOCK_DETECTION_EXIT
;
4205 long kvm_arch_dev_ioctl(struct file
*filp
,
4206 unsigned int ioctl
, unsigned long arg
)
4208 void __user
*argp
= (void __user
*)arg
;
4212 case KVM_GET_MSR_INDEX_LIST
: {
4213 struct kvm_msr_list __user
*user_msr_list
= argp
;
4214 struct kvm_msr_list msr_list
;
4218 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4221 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4222 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4225 if (n
< msr_list
.nmsrs
)
4228 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4229 num_msrs_to_save
* sizeof(u32
)))
4231 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4233 num_emulated_msrs
* sizeof(u32
)))
4238 case KVM_GET_SUPPORTED_CPUID
:
4239 case KVM_GET_EMULATED_CPUID
: {
4240 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4241 struct kvm_cpuid2 cpuid
;
4244 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4247 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4253 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4258 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4260 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
4261 sizeof(kvm_mce_cap_supported
)))
4265 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4266 struct kvm_msr_list __user
*user_msr_list
= argp
;
4267 struct kvm_msr_list msr_list
;
4271 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4274 msr_list
.nmsrs
= num_msr_based_features
;
4275 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4278 if (n
< msr_list
.nmsrs
)
4281 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4282 num_msr_based_features
* sizeof(u32
)))
4288 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4290 case KVM_GET_SUPPORTED_HV_CPUID
:
4291 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4301 static void wbinvd_ipi(void *garbage
)
4306 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4308 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4311 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4313 /* Address WBINVD may be executed by guest */
4314 if (need_emulate_wbinvd(vcpu
)) {
4315 if (static_call(kvm_x86_has_wbinvd_exit
)())
4316 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4317 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4318 smp_call_function_single(vcpu
->cpu
,
4319 wbinvd_ipi
, NULL
, 1);
4322 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4324 /* Save host pkru register if supported */
4325 vcpu
->arch
.host_pkru
= read_pkru();
4327 /* Apply any externally detected TSC adjustments (due to suspend) */
4328 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4329 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4330 vcpu
->arch
.tsc_offset_adjustment
= 0;
4331 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4334 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4335 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4336 rdtsc() - vcpu
->arch
.last_host_tsc
;
4338 mark_tsc_unstable("KVM discovered backwards TSC");
4340 if (kvm_check_tsc_unstable()) {
4341 u64 offset
= kvm_compute_l1_tsc_offset(vcpu
,
4342 vcpu
->arch
.last_guest_tsc
);
4343 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4344 vcpu
->arch
.tsc_catchup
= 1;
4347 if (kvm_lapic_hv_timer_in_use(vcpu
))
4348 kvm_lapic_restart_hv_timer(vcpu
);
4351 * On a host with synchronized TSC, there is no need to update
4352 * kvmclock on vcpu->cpu migration
4354 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4355 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4356 if (vcpu
->cpu
!= cpu
)
4357 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4361 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4364 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4366 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
4367 struct kvm_steal_time __user
*st
;
4368 struct kvm_memslots
*slots
;
4369 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
4371 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4374 if (vcpu
->arch
.st
.preempted
)
4377 /* This happens on process exit */
4378 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
4381 slots
= kvm_memslots(vcpu
->kvm
);
4383 if (unlikely(slots
->generation
!= ghc
->generation
||
4384 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
4387 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
4388 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
4390 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
4391 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4393 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
4396 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4400 if (vcpu
->preempted
&& !vcpu
->arch
.guest_state_protected
)
4401 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
4404 * Take the srcu lock as memslots will be accessed to check the gfn
4405 * cache generation against the memslots generation.
4407 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4408 if (kvm_xen_msr_enabled(vcpu
->kvm
))
4409 kvm_xen_runstate_set_preempted(vcpu
);
4411 kvm_steal_time_set_preempted(vcpu
);
4412 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4414 static_call(kvm_x86_vcpu_put
)(vcpu
);
4415 vcpu
->arch
.last_host_tsc
= rdtsc();
4418 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4419 struct kvm_lapic_state
*s
)
4421 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
4423 return kvm_apic_get_state(vcpu
, s
);
4426 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4427 struct kvm_lapic_state
*s
)
4431 r
= kvm_apic_set_state(vcpu
, s
);
4434 update_cr8_intercept(vcpu
);
4439 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4442 * We can accept userspace's request for interrupt injection
4443 * as long as we have a place to store the interrupt number.
4444 * The actual injection will happen when the CPU is able to
4445 * deliver the interrupt.
4447 if (kvm_cpu_has_extint(vcpu
))
4450 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4451 return (!lapic_in_kernel(vcpu
) ||
4452 kvm_apic_accept_pic_intr(vcpu
));
4455 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4458 * Do not cause an interrupt window exit if an exception
4459 * is pending or an event needs reinjection; userspace
4460 * might want to inject the interrupt manually using KVM_SET_REGS
4461 * or KVM_SET_SREGS. For that to work, we must be at an
4462 * instruction boundary and with no events half-injected.
4464 return (kvm_arch_interrupt_allowed(vcpu
) &&
4465 kvm_cpu_accept_dm_intr(vcpu
) &&
4466 !kvm_event_needs_reinjection(vcpu
) &&
4467 !vcpu
->arch
.exception
.pending
);
4470 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4471 struct kvm_interrupt
*irq
)
4473 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4476 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4477 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4478 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4483 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4484 * fail for in-kernel 8259.
4486 if (pic_in_kernel(vcpu
->kvm
))
4489 if (vcpu
->arch
.pending_external_vector
!= -1)
4492 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4493 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4497 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4499 kvm_inject_nmi(vcpu
);
4504 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4506 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4511 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4512 struct kvm_tpr_access_ctl
*tac
)
4516 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4520 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4524 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4527 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4529 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4532 vcpu
->arch
.mcg_cap
= mcg_cap
;
4533 /* Init IA32_MCG_CTL to all 1s */
4534 if (mcg_cap
& MCG_CTL_P
)
4535 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4536 /* Init IA32_MCi_CTL to all 1s */
4537 for (bank
= 0; bank
< bank_num
; bank
++)
4538 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4540 static_call(kvm_x86_setup_mce
)(vcpu
);
4545 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4546 struct kvm_x86_mce
*mce
)
4548 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4549 unsigned bank_num
= mcg_cap
& 0xff;
4550 u64
*banks
= vcpu
->arch
.mce_banks
;
4552 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4555 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4556 * reporting is disabled
4558 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4559 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4561 banks
+= 4 * mce
->bank
;
4563 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4564 * reporting is disabled for the bank
4566 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4568 if (mce
->status
& MCI_STATUS_UC
) {
4569 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4570 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4571 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4574 if (banks
[1] & MCI_STATUS_VAL
)
4575 mce
->status
|= MCI_STATUS_OVER
;
4576 banks
[2] = mce
->addr
;
4577 banks
[3] = mce
->misc
;
4578 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4579 banks
[1] = mce
->status
;
4580 kvm_queue_exception(vcpu
, MC_VECTOR
);
4581 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4582 || !(banks
[1] & MCI_STATUS_UC
)) {
4583 if (banks
[1] & MCI_STATUS_VAL
)
4584 mce
->status
|= MCI_STATUS_OVER
;
4585 banks
[2] = mce
->addr
;
4586 banks
[3] = mce
->misc
;
4587 banks
[1] = mce
->status
;
4589 banks
[1] |= MCI_STATUS_OVER
;
4593 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4594 struct kvm_vcpu_events
*events
)
4598 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
4602 * In guest mode, payload delivery should be deferred,
4603 * so that the L1 hypervisor can intercept #PF before
4604 * CR2 is modified (or intercept #DB before DR6 is
4605 * modified under nVMX). Unless the per-VM capability,
4606 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4607 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4608 * opportunistically defer the exception payload, deliver it if the
4609 * capability hasn't been requested before processing a
4610 * KVM_GET_VCPU_EVENTS.
4612 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4613 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4614 kvm_deliver_exception_payload(vcpu
);
4617 * The API doesn't provide the instruction length for software
4618 * exceptions, so don't report them. As long as the guest RIP
4619 * isn't advanced, we should expect to encounter the exception
4622 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4623 events
->exception
.injected
= 0;
4624 events
->exception
.pending
= 0;
4626 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4627 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4629 * For ABI compatibility, deliberately conflate
4630 * pending and injected exceptions when
4631 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4633 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4634 events
->exception
.injected
|=
4635 vcpu
->arch
.exception
.pending
;
4637 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4638 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4639 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4640 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4641 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4643 events
->interrupt
.injected
=
4644 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4645 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4646 events
->interrupt
.soft
= 0;
4647 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
4649 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4650 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4651 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
4652 events
->nmi
.pad
= 0;
4654 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4656 events
->smi
.smm
= is_smm(vcpu
);
4657 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4658 events
->smi
.smm_inside_nmi
=
4659 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4660 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4662 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4663 | KVM_VCPUEVENT_VALID_SHADOW
4664 | KVM_VCPUEVENT_VALID_SMM
);
4665 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4666 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4668 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4671 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
);
4673 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4674 struct kvm_vcpu_events
*events
)
4676 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4677 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4678 | KVM_VCPUEVENT_VALID_SHADOW
4679 | KVM_VCPUEVENT_VALID_SMM
4680 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4683 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4684 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4686 if (events
->exception
.pending
)
4687 events
->exception
.injected
= 0;
4689 events
->exception_has_payload
= 0;
4691 events
->exception
.pending
= 0;
4692 events
->exception_has_payload
= 0;
4695 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4696 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4699 /* INITs are latched while in SMM */
4700 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4701 (events
->smi
.smm
|| events
->smi
.pending
) &&
4702 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4706 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4707 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4708 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4709 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4710 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4711 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4712 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4714 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4715 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4716 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4717 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4718 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
4719 events
->interrupt
.shadow
);
4721 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4722 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
4723 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
4724 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
4726 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
4727 lapic_in_kernel(vcpu
))
4728 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
4730 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
4731 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
4732 kvm_x86_ops
.nested_ops
->leave_nested(vcpu
);
4733 kvm_smm_changed(vcpu
, events
->smi
.smm
);
4736 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
4738 if (events
->smi
.smm
) {
4739 if (events
->smi
.smm_inside_nmi
)
4740 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
4742 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
4745 if (lapic_in_kernel(vcpu
)) {
4746 if (events
->smi
.latched_init
)
4747 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4749 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4753 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4758 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
4759 struct kvm_debugregs
*dbgregs
)
4763 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
4764 kvm_get_dr(vcpu
, 6, &val
);
4766 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4768 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4771 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4772 struct kvm_debugregs
*dbgregs
)
4777 if (!kvm_dr6_valid(dbgregs
->dr6
))
4779 if (!kvm_dr7_valid(dbgregs
->dr7
))
4782 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4783 kvm_update_dr0123(vcpu
);
4784 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4785 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4786 kvm_update_dr7(vcpu
);
4791 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4793 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
4795 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4796 u64 xstate_bv
= xsave
->header
.xfeatures
;
4800 * Copy legacy XSAVE area, to avoid complications with CPUID
4801 * leaves 0 and 1 in the loop below.
4803 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
4806 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
4807 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
4810 * Copy each region from the possibly compacted offset to the
4811 * non-compacted offset.
4813 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4815 u32 size
, offset
, ecx
, edx
;
4816 u64 xfeature_mask
= valid
& -valid
;
4817 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4820 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4821 &size
, &offset
, &ecx
, &edx
);
4823 if (xfeature_nr
== XFEATURE_PKRU
) {
4824 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
4825 sizeof(vcpu
->arch
.pkru
));
4827 src
= get_xsave_addr(xsave
, xfeature_nr
);
4829 memcpy(dest
+ offset
, src
, size
);
4832 valid
-= xfeature_mask
;
4836 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
4838 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4839 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
4843 * Copy legacy XSAVE area, to avoid complications with CPUID
4844 * leaves 0 and 1 in the loop below.
4846 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
4848 /* Set XSTATE_BV and possibly XCOMP_BV. */
4849 xsave
->header
.xfeatures
= xstate_bv
;
4850 if (boot_cpu_has(X86_FEATURE_XSAVES
))
4851 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
4854 * Copy each region from the non-compacted offset to the
4855 * possibly compacted offset.
4857 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4859 u32 size
, offset
, ecx
, edx
;
4860 u64 xfeature_mask
= valid
& -valid
;
4861 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4863 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4864 &size
, &offset
, &ecx
, &edx
);
4866 if (xfeature_nr
== XFEATURE_PKRU
) {
4867 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
4868 sizeof(vcpu
->arch
.pkru
));
4870 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
4873 memcpy(dest
, src
+ offset
, size
);
4876 valid
-= xfeature_mask
;
4880 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4881 struct kvm_xsave
*guest_xsave
)
4883 if (!vcpu
->arch
.guest_fpu
)
4886 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4887 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
4888 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
4890 memcpy(guest_xsave
->region
,
4891 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
4892 sizeof(struct fxregs_state
));
4893 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
4894 XFEATURE_MASK_FPSSE
;
4898 #define XSAVE_MXCSR_OFFSET 24
4900 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4901 struct kvm_xsave
*guest_xsave
)
4906 if (!vcpu
->arch
.guest_fpu
)
4909 xstate_bv
= *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
4910 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
4912 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4914 * Here we allow setting states that are not present in
4915 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4916 * with old userspace.
4918 if (xstate_bv
& ~supported_xcr0
|| mxcsr
& ~mxcsr_feature_mask
)
4920 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
4922 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
4923 mxcsr
& ~mxcsr_feature_mask
)
4925 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
4926 guest_xsave
->region
, sizeof(struct fxregs_state
));
4931 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4932 struct kvm_xcrs
*guest_xcrs
)
4934 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4935 guest_xcrs
->nr_xcrs
= 0;
4939 guest_xcrs
->nr_xcrs
= 1;
4940 guest_xcrs
->flags
= 0;
4941 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4942 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4945 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4946 struct kvm_xcrs
*guest_xcrs
)
4950 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4953 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4956 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4957 /* Only support XCR0 currently */
4958 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4959 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4960 guest_xcrs
->xcrs
[i
].value
);
4969 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4970 * stopped by the hypervisor. This function will be called from the host only.
4971 * EINVAL is returned when the host attempts to set the flag for a guest that
4972 * does not support pv clocks.
4974 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4976 if (!vcpu
->arch
.pv_time_enabled
)
4978 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4979 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4983 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4984 struct kvm_enable_cap
*cap
)
4987 uint16_t vmcs_version
;
4988 void __user
*user_ptr
;
4994 case KVM_CAP_HYPERV_SYNIC2
:
4999 case KVM_CAP_HYPERV_SYNIC
:
5000 if (!irqchip_in_kernel(vcpu
->kvm
))
5002 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
5003 KVM_CAP_HYPERV_SYNIC2
);
5004 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
5005 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
5007 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
5009 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
5010 if (copy_to_user(user_ptr
, &vmcs_version
,
5011 sizeof(vmcs_version
)))
5015 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
5016 if (!kvm_x86_ops
.enable_direct_tlbflush
)
5019 return static_call(kvm_x86_enable_direct_tlbflush
)(vcpu
);
5021 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
5022 return kvm_hv_set_enforce_cpuid(vcpu
, cap
->args
[0]);
5024 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
5025 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
5026 if (vcpu
->arch
.pv_cpuid
.enforce
)
5027 kvm_update_pv_runtime(vcpu
);
5035 long kvm_arch_vcpu_ioctl(struct file
*filp
,
5036 unsigned int ioctl
, unsigned long arg
)
5038 struct kvm_vcpu
*vcpu
= filp
->private_data
;
5039 void __user
*argp
= (void __user
*)arg
;
5042 struct kvm_sregs2
*sregs2
;
5043 struct kvm_lapic_state
*lapic
;
5044 struct kvm_xsave
*xsave
;
5045 struct kvm_xcrs
*xcrs
;
5053 case KVM_GET_LAPIC
: {
5055 if (!lapic_in_kernel(vcpu
))
5057 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
5058 GFP_KERNEL_ACCOUNT
);
5063 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
5067 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
5072 case KVM_SET_LAPIC
: {
5074 if (!lapic_in_kernel(vcpu
))
5076 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
5077 if (IS_ERR(u
.lapic
)) {
5078 r
= PTR_ERR(u
.lapic
);
5082 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
5085 case KVM_INTERRUPT
: {
5086 struct kvm_interrupt irq
;
5089 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
5091 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
5095 r
= kvm_vcpu_ioctl_nmi(vcpu
);
5099 r
= kvm_vcpu_ioctl_smi(vcpu
);
5102 case KVM_SET_CPUID
: {
5103 struct kvm_cpuid __user
*cpuid_arg
= argp
;
5104 struct kvm_cpuid cpuid
;
5107 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5109 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
5112 case KVM_SET_CPUID2
: {
5113 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5114 struct kvm_cpuid2 cpuid
;
5117 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5119 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
5120 cpuid_arg
->entries
);
5123 case KVM_GET_CPUID2
: {
5124 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5125 struct kvm_cpuid2 cpuid
;
5128 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5130 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5131 cpuid_arg
->entries
);
5135 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5140 case KVM_GET_MSRS
: {
5141 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5142 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5143 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5146 case KVM_SET_MSRS
: {
5147 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5148 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5149 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5152 case KVM_TPR_ACCESS_REPORTING
: {
5153 struct kvm_tpr_access_ctl tac
;
5156 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5158 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5162 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5167 case KVM_SET_VAPIC_ADDR
: {
5168 struct kvm_vapic_addr va
;
5172 if (!lapic_in_kernel(vcpu
))
5175 if (copy_from_user(&va
, argp
, sizeof(va
)))
5177 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5178 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5179 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5182 case KVM_X86_SETUP_MCE
: {
5186 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5188 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5191 case KVM_X86_SET_MCE
: {
5192 struct kvm_x86_mce mce
;
5195 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5197 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5200 case KVM_GET_VCPU_EVENTS
: {
5201 struct kvm_vcpu_events events
;
5203 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5206 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5211 case KVM_SET_VCPU_EVENTS
: {
5212 struct kvm_vcpu_events events
;
5215 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5218 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5221 case KVM_GET_DEBUGREGS
: {
5222 struct kvm_debugregs dbgregs
;
5224 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5227 if (copy_to_user(argp
, &dbgregs
,
5228 sizeof(struct kvm_debugregs
)))
5233 case KVM_SET_DEBUGREGS
: {
5234 struct kvm_debugregs dbgregs
;
5237 if (copy_from_user(&dbgregs
, argp
,
5238 sizeof(struct kvm_debugregs
)))
5241 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
5244 case KVM_GET_XSAVE
: {
5245 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
5250 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
5253 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
5258 case KVM_SET_XSAVE
: {
5259 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
5260 if (IS_ERR(u
.xsave
)) {
5261 r
= PTR_ERR(u
.xsave
);
5265 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
5268 case KVM_GET_XCRS
: {
5269 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
5274 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
5277 if (copy_to_user(argp
, u
.xcrs
,
5278 sizeof(struct kvm_xcrs
)))
5283 case KVM_SET_XCRS
: {
5284 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
5285 if (IS_ERR(u
.xcrs
)) {
5286 r
= PTR_ERR(u
.xcrs
);
5290 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
5293 case KVM_SET_TSC_KHZ
: {
5297 user_tsc_khz
= (u32
)arg
;
5299 if (kvm_has_tsc_control
&&
5300 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
5303 if (user_tsc_khz
== 0)
5304 user_tsc_khz
= tsc_khz
;
5306 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
5311 case KVM_GET_TSC_KHZ
: {
5312 r
= vcpu
->arch
.virtual_tsc_khz
;
5315 case KVM_KVMCLOCK_CTRL
: {
5316 r
= kvm_set_guest_paused(vcpu
);
5319 case KVM_ENABLE_CAP
: {
5320 struct kvm_enable_cap cap
;
5323 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
5325 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
5328 case KVM_GET_NESTED_STATE
: {
5329 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5333 if (!kvm_x86_ops
.nested_ops
->get_state
)
5336 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
5338 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
5341 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
5346 if (r
> user_data_size
) {
5347 if (put_user(r
, &user_kvm_nested_state
->size
))
5357 case KVM_SET_NESTED_STATE
: {
5358 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5359 struct kvm_nested_state kvm_state
;
5363 if (!kvm_x86_ops
.nested_ops
->set_state
)
5367 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5371 if (kvm_state
.size
< sizeof(kvm_state
))
5374 if (kvm_state
.flags
&
5375 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5376 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5377 | KVM_STATE_NESTED_GIF_SET
))
5380 /* nested_run_pending implies guest_mode. */
5381 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5382 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5385 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5386 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5387 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5390 case KVM_GET_SUPPORTED_HV_CPUID
:
5391 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5393 #ifdef CONFIG_KVM_XEN
5394 case KVM_XEN_VCPU_GET_ATTR
: {
5395 struct kvm_xen_vcpu_attr xva
;
5398 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5400 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
5401 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
5405 case KVM_XEN_VCPU_SET_ATTR
: {
5406 struct kvm_xen_vcpu_attr xva
;
5409 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5411 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
5415 case KVM_GET_SREGS2
: {
5416 u
.sregs2
= kzalloc(sizeof(struct kvm_sregs2
), GFP_KERNEL
);
5420 __get_sregs2(vcpu
, u
.sregs2
);
5422 if (copy_to_user(argp
, u
.sregs2
, sizeof(struct kvm_sregs2
)))
5427 case KVM_SET_SREGS2
: {
5428 u
.sregs2
= memdup_user(argp
, sizeof(struct kvm_sregs2
));
5429 if (IS_ERR(u
.sregs2
)) {
5430 r
= PTR_ERR(u
.sregs2
);
5434 r
= __set_sregs2(vcpu
, u
.sregs2
);
5447 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5449 return VM_FAULT_SIGBUS
;
5452 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5456 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5458 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
5462 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5465 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
5468 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5469 unsigned long kvm_nr_mmu_pages
)
5471 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5474 mutex_lock(&kvm
->slots_lock
);
5476 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5477 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5479 mutex_unlock(&kvm
->slots_lock
);
5483 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5485 return kvm
->arch
.n_max_mmu_pages
;
5488 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5490 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5494 switch (chip
->chip_id
) {
5495 case KVM_IRQCHIP_PIC_MASTER
:
5496 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5497 sizeof(struct kvm_pic_state
));
5499 case KVM_IRQCHIP_PIC_SLAVE
:
5500 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5501 sizeof(struct kvm_pic_state
));
5503 case KVM_IRQCHIP_IOAPIC
:
5504 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5513 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5515 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5519 switch (chip
->chip_id
) {
5520 case KVM_IRQCHIP_PIC_MASTER
:
5521 spin_lock(&pic
->lock
);
5522 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5523 sizeof(struct kvm_pic_state
));
5524 spin_unlock(&pic
->lock
);
5526 case KVM_IRQCHIP_PIC_SLAVE
:
5527 spin_lock(&pic
->lock
);
5528 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5529 sizeof(struct kvm_pic_state
));
5530 spin_unlock(&pic
->lock
);
5532 case KVM_IRQCHIP_IOAPIC
:
5533 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5539 kvm_pic_update_irq(pic
);
5543 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5545 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5547 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5549 mutex_lock(&kps
->lock
);
5550 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5551 mutex_unlock(&kps
->lock
);
5555 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5558 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5560 mutex_lock(&pit
->pit_state
.lock
);
5561 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5562 for (i
= 0; i
< 3; i
++)
5563 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5564 mutex_unlock(&pit
->pit_state
.lock
);
5568 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5570 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5571 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5572 sizeof(ps
->channels
));
5573 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5574 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5575 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5579 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5583 u32 prev_legacy
, cur_legacy
;
5584 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5586 mutex_lock(&pit
->pit_state
.lock
);
5587 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5588 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5589 if (!prev_legacy
&& cur_legacy
)
5591 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5592 sizeof(pit
->pit_state
.channels
));
5593 pit
->pit_state
.flags
= ps
->flags
;
5594 for (i
= 0; i
< 3; i
++)
5595 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5597 mutex_unlock(&pit
->pit_state
.lock
);
5601 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5602 struct kvm_reinject_control
*control
)
5604 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5606 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5607 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5608 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5610 mutex_lock(&pit
->pit_state
.lock
);
5611 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5612 mutex_unlock(&pit
->pit_state
.lock
);
5617 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5621 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5622 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5623 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5626 struct kvm_vcpu
*vcpu
;
5629 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5630 kvm_vcpu_kick(vcpu
);
5633 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5636 if (!irqchip_in_kernel(kvm
))
5639 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5640 irq_event
->irq
, irq_event
->level
,
5645 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5646 struct kvm_enable_cap
*cap
)
5654 case KVM_CAP_DISABLE_QUIRKS
:
5655 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5658 case KVM_CAP_SPLIT_IRQCHIP
: {
5659 mutex_lock(&kvm
->lock
);
5661 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5662 goto split_irqchip_unlock
;
5664 if (irqchip_in_kernel(kvm
))
5665 goto split_irqchip_unlock
;
5666 if (kvm
->created_vcpus
)
5667 goto split_irqchip_unlock
;
5668 r
= kvm_setup_empty_irq_routing(kvm
);
5670 goto split_irqchip_unlock
;
5671 /* Pairs with irqchip_in_kernel. */
5673 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5674 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5676 split_irqchip_unlock
:
5677 mutex_unlock(&kvm
->lock
);
5680 case KVM_CAP_X2APIC_API
:
5682 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
5685 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
5686 kvm
->arch
.x2apic_format
= true;
5687 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
5688 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
5692 case KVM_CAP_X86_DISABLE_EXITS
:
5694 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
5697 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
5698 kvm_can_mwait_in_guest())
5699 kvm
->arch
.mwait_in_guest
= true;
5700 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
5701 kvm
->arch
.hlt_in_guest
= true;
5702 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
5703 kvm
->arch
.pause_in_guest
= true;
5704 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
5705 kvm
->arch
.cstate_in_guest
= true;
5708 case KVM_CAP_MSR_PLATFORM_INFO
:
5709 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
5712 case KVM_CAP_EXCEPTION_PAYLOAD
:
5713 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
5716 case KVM_CAP_X86_USER_SPACE_MSR
:
5717 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
5720 case KVM_CAP_X86_BUS_LOCK_EXIT
:
5722 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
5725 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
5726 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
5729 if (kvm_has_bus_lock_exit
&&
5730 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
5731 kvm
->arch
.bus_lock_detection_enabled
= true;
5734 #ifdef CONFIG_X86_SGX_KVM
5735 case KVM_CAP_SGX_ATTRIBUTE
: {
5736 unsigned long allowed_attributes
= 0;
5738 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
5742 /* KVM only supports the PROVISIONKEY privileged attribute. */
5743 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
5744 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
5745 kvm
->arch
.sgx_provisioning_allowed
= true;
5751 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
5753 if (kvm_x86_ops
.vm_copy_enc_context_from
)
5754 r
= kvm_x86_ops
.vm_copy_enc_context_from(kvm
, cap
->args
[0]);
5756 case KVM_CAP_EXIT_HYPERCALL
:
5757 if (cap
->args
[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK
) {
5761 kvm
->arch
.hypercall_exit_enabled
= cap
->args
[0];
5764 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
5766 if (cap
->args
[0] & ~1)
5768 kvm
->arch
.exit_on_emulation_error
= cap
->args
[0];
5778 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
5780 struct kvm_x86_msr_filter
*msr_filter
;
5782 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
5786 msr_filter
->default_allow
= default_allow
;
5790 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
5797 for (i
= 0; i
< msr_filter
->count
; i
++)
5798 kfree(msr_filter
->ranges
[i
].bitmap
);
5803 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
5804 struct kvm_msr_filter_range
*user_range
)
5806 unsigned long *bitmap
= NULL
;
5809 if (!user_range
->nmsrs
)
5812 if (user_range
->flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
))
5815 if (!user_range
->flags
)
5818 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
5819 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
5822 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
5824 return PTR_ERR(bitmap
);
5826 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
5827 .flags
= user_range
->flags
,
5828 .base
= user_range
->base
,
5829 .nmsrs
= user_range
->nmsrs
,
5833 msr_filter
->count
++;
5837 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
5839 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
5840 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
5841 struct kvm_msr_filter filter
;
5847 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
5850 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
5851 empty
&= !filter
.ranges
[i
].nmsrs
;
5853 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
5854 if (empty
&& !default_allow
)
5857 new_filter
= kvm_alloc_msr_filter(default_allow
);
5861 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
5862 r
= kvm_add_msr_filter(new_filter
, &filter
.ranges
[i
]);
5864 kvm_free_msr_filter(new_filter
);
5869 mutex_lock(&kvm
->lock
);
5871 /* The per-VM filter is protected by kvm->lock... */
5872 old_filter
= srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1);
5874 rcu_assign_pointer(kvm
->arch
.msr_filter
, new_filter
);
5875 synchronize_srcu(&kvm
->srcu
);
5877 kvm_free_msr_filter(old_filter
);
5879 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
5880 mutex_unlock(&kvm
->lock
);
5885 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5886 static int kvm_arch_suspend_notifier(struct kvm
*kvm
)
5888 struct kvm_vcpu
*vcpu
;
5891 mutex_lock(&kvm
->lock
);
5892 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5893 if (!vcpu
->arch
.pv_time_enabled
)
5896 ret
= kvm_set_guest_paused(vcpu
);
5898 kvm_err("Failed to pause guest VCPU%d: %d\n",
5899 vcpu
->vcpu_id
, ret
);
5903 mutex_unlock(&kvm
->lock
);
5905 return ret
? NOTIFY_BAD
: NOTIFY_DONE
;
5908 int kvm_arch_pm_notifier(struct kvm
*kvm
, unsigned long state
)
5911 case PM_HIBERNATION_PREPARE
:
5912 case PM_SUSPEND_PREPARE
:
5913 return kvm_arch_suspend_notifier(kvm
);
5918 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5920 long kvm_arch_vm_ioctl(struct file
*filp
,
5921 unsigned int ioctl
, unsigned long arg
)
5923 struct kvm
*kvm
= filp
->private_data
;
5924 void __user
*argp
= (void __user
*)arg
;
5927 * This union makes it completely explicit to gcc-3.x
5928 * that these two variables' stack usage should be
5929 * combined, not added together.
5932 struct kvm_pit_state ps
;
5933 struct kvm_pit_state2 ps2
;
5934 struct kvm_pit_config pit_config
;
5938 case KVM_SET_TSS_ADDR
:
5939 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
5941 case KVM_SET_IDENTITY_MAP_ADDR
: {
5944 mutex_lock(&kvm
->lock
);
5946 if (kvm
->created_vcpus
)
5947 goto set_identity_unlock
;
5949 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
5950 goto set_identity_unlock
;
5951 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
5952 set_identity_unlock
:
5953 mutex_unlock(&kvm
->lock
);
5956 case KVM_SET_NR_MMU_PAGES
:
5957 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
5959 case KVM_GET_NR_MMU_PAGES
:
5960 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
5962 case KVM_CREATE_IRQCHIP
: {
5963 mutex_lock(&kvm
->lock
);
5966 if (irqchip_in_kernel(kvm
))
5967 goto create_irqchip_unlock
;
5970 if (kvm
->created_vcpus
)
5971 goto create_irqchip_unlock
;
5973 r
= kvm_pic_init(kvm
);
5975 goto create_irqchip_unlock
;
5977 r
= kvm_ioapic_init(kvm
);
5979 kvm_pic_destroy(kvm
);
5980 goto create_irqchip_unlock
;
5983 r
= kvm_setup_default_irq_routing(kvm
);
5985 kvm_ioapic_destroy(kvm
);
5986 kvm_pic_destroy(kvm
);
5987 goto create_irqchip_unlock
;
5989 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5991 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
5992 create_irqchip_unlock
:
5993 mutex_unlock(&kvm
->lock
);
5996 case KVM_CREATE_PIT
:
5997 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
5999 case KVM_CREATE_PIT2
:
6001 if (copy_from_user(&u
.pit_config
, argp
,
6002 sizeof(struct kvm_pit_config
)))
6005 mutex_lock(&kvm
->lock
);
6008 goto create_pit_unlock
;
6010 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
6014 mutex_unlock(&kvm
->lock
);
6016 case KVM_GET_IRQCHIP
: {
6017 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6018 struct kvm_irqchip
*chip
;
6020 chip
= memdup_user(argp
, sizeof(*chip
));
6027 if (!irqchip_kernel(kvm
))
6028 goto get_irqchip_out
;
6029 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
6031 goto get_irqchip_out
;
6033 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
6034 goto get_irqchip_out
;
6040 case KVM_SET_IRQCHIP
: {
6041 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6042 struct kvm_irqchip
*chip
;
6044 chip
= memdup_user(argp
, sizeof(*chip
));
6051 if (!irqchip_kernel(kvm
))
6052 goto set_irqchip_out
;
6053 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
6060 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
6063 if (!kvm
->arch
.vpit
)
6065 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
6069 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
6076 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
6078 mutex_lock(&kvm
->lock
);
6080 if (!kvm
->arch
.vpit
)
6082 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
6084 mutex_unlock(&kvm
->lock
);
6087 case KVM_GET_PIT2
: {
6089 if (!kvm
->arch
.vpit
)
6091 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
6095 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
6100 case KVM_SET_PIT2
: {
6102 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
6104 mutex_lock(&kvm
->lock
);
6106 if (!kvm
->arch
.vpit
)
6108 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
6110 mutex_unlock(&kvm
->lock
);
6113 case KVM_REINJECT_CONTROL
: {
6114 struct kvm_reinject_control control
;
6116 if (copy_from_user(&control
, argp
, sizeof(control
)))
6119 if (!kvm
->arch
.vpit
)
6121 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
6124 case KVM_SET_BOOT_CPU_ID
:
6126 mutex_lock(&kvm
->lock
);
6127 if (kvm
->created_vcpus
)
6130 kvm
->arch
.bsp_vcpu_id
= arg
;
6131 mutex_unlock(&kvm
->lock
);
6133 #ifdef CONFIG_KVM_XEN
6134 case KVM_XEN_HVM_CONFIG
: {
6135 struct kvm_xen_hvm_config xhc
;
6137 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
6139 r
= kvm_xen_hvm_config(kvm
, &xhc
);
6142 case KVM_XEN_HVM_GET_ATTR
: {
6143 struct kvm_xen_hvm_attr xha
;
6146 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6148 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
6149 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
6153 case KVM_XEN_HVM_SET_ATTR
: {
6154 struct kvm_xen_hvm_attr xha
;
6157 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6159 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
6163 case KVM_SET_CLOCK
: {
6164 struct kvm_arch
*ka
= &kvm
->arch
;
6165 struct kvm_clock_data user_ns
;
6169 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
6178 * TODO: userspace has to take care of races with VCPU_RUN, so
6179 * kvm_gen_update_masterclock() can be cut down to locked
6180 * pvclock_update_vm_gtod_copy().
6182 kvm_gen_update_masterclock(kvm
);
6185 * This pairs with kvm_guest_time_update(): when masterclock is
6186 * in use, we use master_kernel_ns + kvmclock_offset to set
6187 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6188 * is slightly ahead) here we risk going negative on unsigned
6189 * 'system_time' when 'user_ns.clock' is very small.
6191 raw_spin_lock_irq(&ka
->pvclock_gtod_sync_lock
);
6192 if (kvm
->arch
.use_master_clock
)
6193 now_ns
= ka
->master_kernel_ns
;
6195 now_ns
= get_kvmclock_base_ns();
6196 ka
->kvmclock_offset
= user_ns
.clock
- now_ns
;
6197 raw_spin_unlock_irq(&ka
->pvclock_gtod_sync_lock
);
6199 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
6202 case KVM_GET_CLOCK
: {
6203 struct kvm_clock_data user_ns
;
6206 now_ns
= get_kvmclock_ns(kvm
);
6207 user_ns
.clock
= now_ns
;
6208 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
6209 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
6212 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
6217 case KVM_MEMORY_ENCRYPT_OP
: {
6219 if (kvm_x86_ops
.mem_enc_op
)
6220 r
= static_call(kvm_x86_mem_enc_op
)(kvm
, argp
);
6223 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
6224 struct kvm_enc_region region
;
6227 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6231 if (kvm_x86_ops
.mem_enc_reg_region
)
6232 r
= static_call(kvm_x86_mem_enc_reg_region
)(kvm
, ®ion
);
6235 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
6236 struct kvm_enc_region region
;
6239 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6243 if (kvm_x86_ops
.mem_enc_unreg_region
)
6244 r
= static_call(kvm_x86_mem_enc_unreg_region
)(kvm
, ®ion
);
6247 case KVM_HYPERV_EVENTFD
: {
6248 struct kvm_hyperv_eventfd hvevfd
;
6251 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
6253 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
6256 case KVM_SET_PMU_EVENT_FILTER
:
6257 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
6259 case KVM_X86_SET_MSR_FILTER
:
6260 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
6269 static void kvm_init_msr_list(void)
6271 struct x86_pmu_capability x86_pmu
;
6275 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
6276 "Please update the fixed PMCs in msrs_to_saved_all[]");
6278 perf_get_x86_pmu_capability(&x86_pmu
);
6280 num_msrs_to_save
= 0;
6281 num_emulated_msrs
= 0;
6282 num_msr_based_features
= 0;
6284 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
6285 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
6289 * Even MSRs that are valid in the host may not be exposed
6290 * to the guests in some cases.
6292 switch (msrs_to_save_all
[i
]) {
6293 case MSR_IA32_BNDCFGS
:
6294 if (!kvm_mpx_supported())
6298 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
6299 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
6302 case MSR_IA32_UMWAIT_CONTROL
:
6303 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
6306 case MSR_IA32_RTIT_CTL
:
6307 case MSR_IA32_RTIT_STATUS
:
6308 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
6311 case MSR_IA32_RTIT_CR3_MATCH
:
6312 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6313 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
6316 case MSR_IA32_RTIT_OUTPUT_BASE
:
6317 case MSR_IA32_RTIT_OUTPUT_MASK
:
6318 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6319 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
6320 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
6323 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
6324 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6325 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
6326 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
6329 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
6330 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
6331 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6334 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
6335 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
6336 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6343 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
6346 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
6347 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
6350 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
6353 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
6354 struct kvm_msr_entry msr
;
6356 msr
.index
= msr_based_features_all
[i
];
6357 if (kvm_get_msr_feature(&msr
))
6360 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
6364 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
6372 if (!(lapic_in_kernel(vcpu
) &&
6373 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
6374 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6385 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
6392 if (!(lapic_in_kernel(vcpu
) &&
6393 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
6395 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6397 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
6407 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
6408 struct kvm_segment
*var
, int seg
)
6410 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
6413 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
6414 struct kvm_segment
*var
, int seg
)
6416 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
6419 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
6420 struct x86_exception
*exception
)
6424 BUG_ON(!mmu_is_nested(vcpu
));
6426 /* NPT walks are always user-walks */
6427 access
|= PFERR_USER_MASK
;
6428 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
6433 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
6434 struct x86_exception
*exception
)
6436 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6437 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6439 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
6441 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
6442 struct x86_exception
*exception
)
6444 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6445 access
|= PFERR_FETCH_MASK
;
6446 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6449 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
6450 struct x86_exception
*exception
)
6452 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6453 access
|= PFERR_WRITE_MASK
;
6454 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6456 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
6458 /* uses this to access any guest's mapped memory without checking CPL */
6459 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
6460 struct x86_exception
*exception
)
6462 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
6465 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6466 struct kvm_vcpu
*vcpu
, u32 access
,
6467 struct x86_exception
*exception
)
6470 int r
= X86EMUL_CONTINUE
;
6473 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
6475 unsigned offset
= addr
& (PAGE_SIZE
-1);
6476 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6479 if (gpa
== UNMAPPED_GVA
)
6480 return X86EMUL_PROPAGATE_FAULT
;
6481 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
6484 r
= X86EMUL_IO_NEEDED
;
6496 /* used for instruction fetching */
6497 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
6498 gva_t addr
, void *val
, unsigned int bytes
,
6499 struct x86_exception
*exception
)
6501 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6502 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6506 /* Inline kvm_read_guest_virt_helper for speed. */
6507 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
6509 if (unlikely(gpa
== UNMAPPED_GVA
))
6510 return X86EMUL_PROPAGATE_FAULT
;
6512 offset
= addr
& (PAGE_SIZE
-1);
6513 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
6514 bytes
= (unsigned)PAGE_SIZE
- offset
;
6515 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
6517 if (unlikely(ret
< 0))
6518 return X86EMUL_IO_NEEDED
;
6520 return X86EMUL_CONTINUE
;
6523 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
6524 gva_t addr
, void *val
, unsigned int bytes
,
6525 struct x86_exception
*exception
)
6527 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6530 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6531 * is returned, but our callers are not ready for that and they blindly
6532 * call kvm_inject_page_fault. Ensure that they at least do not leak
6533 * uninitialized kernel stack memory into cr2 and error code.
6535 memset(exception
, 0, sizeof(*exception
));
6536 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
6539 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
6541 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
6542 gva_t addr
, void *val
, unsigned int bytes
,
6543 struct x86_exception
*exception
, bool system
)
6545 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6548 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6549 access
|= PFERR_USER_MASK
;
6551 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6554 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6555 unsigned long addr
, void *val
, unsigned int bytes
)
6557 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6558 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6560 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6563 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6564 struct kvm_vcpu
*vcpu
, u32 access
,
6565 struct x86_exception
*exception
)
6568 int r
= X86EMUL_CONTINUE
;
6571 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
6574 unsigned offset
= addr
& (PAGE_SIZE
-1);
6575 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6578 if (gpa
== UNMAPPED_GVA
)
6579 return X86EMUL_PROPAGATE_FAULT
;
6580 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6582 r
= X86EMUL_IO_NEEDED
;
6594 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6595 unsigned int bytes
, struct x86_exception
*exception
,
6598 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6599 u32 access
= PFERR_WRITE_MASK
;
6601 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6602 access
|= PFERR_USER_MASK
;
6604 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6608 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
6609 unsigned int bytes
, struct x86_exception
*exception
)
6611 /* kvm_write_guest_virt_system can pull in tons of pages. */
6612 vcpu
->arch
.l1tf_flush_l1d
= true;
6614 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6615 PFERR_WRITE_MASK
, exception
);
6617 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
6619 int handle_ud(struct kvm_vcpu
*vcpu
)
6621 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
6622 int emul_type
= EMULTYPE_TRAP_UD
;
6623 char sig
[5]; /* ud2; .ascii "kvm" */
6624 struct x86_exception e
;
6626 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, NULL
, 0)))
6629 if (force_emulation_prefix
&&
6630 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
6631 sig
, sizeof(sig
), &e
) == 0 &&
6632 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
6633 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
6634 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
6637 return kvm_emulate_instruction(vcpu
, emul_type
);
6639 EXPORT_SYMBOL_GPL(handle_ud
);
6641 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6642 gpa_t gpa
, bool write
)
6644 /* For APIC access vmexit */
6645 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6648 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
6649 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
6656 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6657 gpa_t
*gpa
, struct x86_exception
*exception
,
6660 u32 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
6661 | (write
? PFERR_WRITE_MASK
: 0);
6664 * currently PKRU is only applied to ept enabled guest so
6665 * there is no pkey in EPT page table for L1 guest or EPT
6666 * shadow page table for L2 guest.
6668 if (vcpu_match_mmio_gva(vcpu
, gva
) && (!is_paging(vcpu
) ||
6669 !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
6670 vcpu
->arch
.mmio_access
, 0, access
))) {
6671 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
6672 (gva
& (PAGE_SIZE
- 1));
6673 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
6677 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6679 if (*gpa
== UNMAPPED_GVA
)
6682 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
6685 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6686 const void *val
, int bytes
)
6690 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
6693 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
6697 struct read_write_emulator_ops
{
6698 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
6700 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6701 void *val
, int bytes
);
6702 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6703 int bytes
, void *val
);
6704 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6705 void *val
, int bytes
);
6709 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
6711 if (vcpu
->mmio_read_completed
) {
6712 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
6713 vcpu
->mmio_fragments
[0].gpa
, val
);
6714 vcpu
->mmio_read_completed
= 0;
6721 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6722 void *val
, int bytes
)
6724 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
6727 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6728 void *val
, int bytes
)
6730 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
6733 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
6735 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
6736 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
6739 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6740 void *val
, int bytes
)
6742 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
6743 return X86EMUL_IO_NEEDED
;
6746 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6747 void *val
, int bytes
)
6749 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
6751 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6752 return X86EMUL_CONTINUE
;
6755 static const struct read_write_emulator_ops read_emultor
= {
6756 .read_write_prepare
= read_prepare
,
6757 .read_write_emulate
= read_emulate
,
6758 .read_write_mmio
= vcpu_mmio_read
,
6759 .read_write_exit_mmio
= read_exit_mmio
,
6762 static const struct read_write_emulator_ops write_emultor
= {
6763 .read_write_emulate
= write_emulate
,
6764 .read_write_mmio
= write_mmio
,
6765 .read_write_exit_mmio
= write_exit_mmio
,
6769 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
6771 struct x86_exception
*exception
,
6772 struct kvm_vcpu
*vcpu
,
6773 const struct read_write_emulator_ops
*ops
)
6777 bool write
= ops
->write
;
6778 struct kvm_mmio_fragment
*frag
;
6779 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6782 * If the exit was due to a NPF we may already have a GPA.
6783 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6784 * Note, this cannot be used on string operations since string
6785 * operation using rep will only have the initial GPA from the NPF
6788 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
6789 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
6790 gpa
= ctxt
->gpa_val
;
6791 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
6793 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
6795 return X86EMUL_PROPAGATE_FAULT
;
6798 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
6799 return X86EMUL_CONTINUE
;
6802 * Is this MMIO handled locally?
6804 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
6805 if (handled
== bytes
)
6806 return X86EMUL_CONTINUE
;
6812 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
6813 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
6817 return X86EMUL_CONTINUE
;
6820 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
6822 void *val
, unsigned int bytes
,
6823 struct x86_exception
*exception
,
6824 const struct read_write_emulator_ops
*ops
)
6826 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6830 if (ops
->read_write_prepare
&&
6831 ops
->read_write_prepare(vcpu
, val
, bytes
))
6832 return X86EMUL_CONTINUE
;
6834 vcpu
->mmio_nr_fragments
= 0;
6836 /* Crossing a page boundary? */
6837 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
6840 now
= -addr
& ~PAGE_MASK
;
6841 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
6844 if (rc
!= X86EMUL_CONTINUE
)
6847 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
6853 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
6855 if (rc
!= X86EMUL_CONTINUE
)
6858 if (!vcpu
->mmio_nr_fragments
)
6861 gpa
= vcpu
->mmio_fragments
[0].gpa
;
6863 vcpu
->mmio_needed
= 1;
6864 vcpu
->mmio_cur_fragment
= 0;
6866 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
6867 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
6868 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
6869 vcpu
->run
->mmio
.phys_addr
= gpa
;
6871 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
6874 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
6878 struct x86_exception
*exception
)
6880 return emulator_read_write(ctxt
, addr
, val
, bytes
,
6881 exception
, &read_emultor
);
6884 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
6888 struct x86_exception
*exception
)
6890 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
6891 exception
, &write_emultor
);
6894 #define CMPXCHG_TYPE(t, ptr, old, new) \
6895 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6897 #ifdef CONFIG_X86_64
6898 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6900 # define CMPXCHG64(ptr, old, new) \
6901 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6904 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
6909 struct x86_exception
*exception
)
6911 struct kvm_host_map map
;
6912 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6918 /* guests cmpxchg8b have to be emulated atomically */
6919 if (bytes
> 8 || (bytes
& (bytes
- 1)))
6922 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
6924 if (gpa
== UNMAPPED_GVA
||
6925 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6929 * Emulate the atomic as a straight write to avoid #AC if SLD is
6930 * enabled in the host and the access splits a cache line.
6932 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
6933 page_line_mask
= ~(cache_line_size() - 1);
6935 page_line_mask
= PAGE_MASK
;
6937 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
6940 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
6943 kaddr
= map
.hva
+ offset_in_page(gpa
);
6947 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
6950 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
6953 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
6956 exchanged
= CMPXCHG64(kaddr
, old
, new);
6962 kvm_vcpu_unmap(vcpu
, &map
, true);
6965 return X86EMUL_CMPXCHG_FAILED
;
6967 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
6969 return X86EMUL_CONTINUE
;
6972 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
6974 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
6977 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
6981 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
6982 if (vcpu
->arch
.pio
.in
)
6983 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
6984 vcpu
->arch
.pio
.size
, pd
);
6986 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
6987 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
6991 pd
+= vcpu
->arch
.pio
.size
;
6996 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
6997 unsigned short port
,
6998 unsigned int count
, bool in
)
7000 vcpu
->arch
.pio
.port
= port
;
7001 vcpu
->arch
.pio
.in
= in
;
7002 vcpu
->arch
.pio
.count
= count
;
7003 vcpu
->arch
.pio
.size
= size
;
7005 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
))
7008 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
7009 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
7010 vcpu
->run
->io
.size
= size
;
7011 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
7012 vcpu
->run
->io
.count
= count
;
7013 vcpu
->run
->io
.port
= port
;
7018 static int __emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7019 unsigned short port
, unsigned int count
)
7021 WARN_ON(vcpu
->arch
.pio
.count
);
7022 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
7023 return emulator_pio_in_out(vcpu
, size
, port
, count
, true);
7026 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
7028 int size
= vcpu
->arch
.pio
.size
;
7029 unsigned count
= vcpu
->arch
.pio
.count
;
7030 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
7031 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
7032 vcpu
->arch
.pio
.count
= 0;
7035 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7036 unsigned short port
, void *val
, unsigned int count
)
7038 if (vcpu
->arch
.pio
.count
) {
7040 * Complete a previous iteration that required userspace I/O.
7041 * Note, @count isn't guaranteed to match pio.count as userspace
7042 * can modify ECX before rerunning the vCPU. Ignore any such
7043 * shenanigans as KVM doesn't support modifying the rep count,
7044 * and the emulator ensures @count doesn't overflow the buffer.
7047 int r
= __emulator_pio_in(vcpu
, size
, port
, count
);
7051 /* Results already available, fall through. */
7054 complete_emulator_pio_in(vcpu
, val
);
7058 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
7059 int size
, unsigned short port
, void *val
,
7062 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7066 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7067 unsigned short port
, const void *val
,
7072 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
7073 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
7074 ret
= emulator_pio_in_out(vcpu
, size
, port
, count
, false);
7076 vcpu
->arch
.pio
.count
= 0;
7081 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
7082 int size
, unsigned short port
,
7083 const void *val
, unsigned int count
)
7085 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7088 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
7090 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
7093 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
7095 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
7098 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
7100 if (!need_emulate_wbinvd(vcpu
))
7101 return X86EMUL_CONTINUE
;
7103 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
7104 int cpu
= get_cpu();
7106 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
7107 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
7108 wbinvd_ipi
, NULL
, 1);
7110 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
7113 return X86EMUL_CONTINUE
;
7116 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
7118 kvm_emulate_wbinvd_noskip(vcpu
);
7119 return kvm_skip_emulated_instruction(vcpu
);
7121 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
7125 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
7127 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
7130 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7131 unsigned long *dest
)
7133 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
7136 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7137 unsigned long value
)
7140 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
7143 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
7145 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
7148 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
7150 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7151 unsigned long value
;
7155 value
= kvm_read_cr0(vcpu
);
7158 value
= vcpu
->arch
.cr2
;
7161 value
= kvm_read_cr3(vcpu
);
7164 value
= kvm_read_cr4(vcpu
);
7167 value
= kvm_get_cr8(vcpu
);
7170 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7177 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
7179 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7184 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
7187 vcpu
->arch
.cr2
= val
;
7190 res
= kvm_set_cr3(vcpu
, val
);
7193 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
7196 res
= kvm_set_cr8(vcpu
, val
);
7199 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7206 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
7208 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
7211 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7213 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
7216 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7218 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
7221 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7223 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
7226 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7228 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
7231 static unsigned long emulator_get_cached_segment_base(
7232 struct x86_emulate_ctxt
*ctxt
, int seg
)
7234 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
7237 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
7238 struct desc_struct
*desc
, u32
*base3
,
7241 struct kvm_segment var
;
7243 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
7244 *selector
= var
.selector
;
7247 memset(desc
, 0, sizeof(*desc
));
7255 set_desc_limit(desc
, var
.limit
);
7256 set_desc_base(desc
, (unsigned long)var
.base
);
7257 #ifdef CONFIG_X86_64
7259 *base3
= var
.base
>> 32;
7261 desc
->type
= var
.type
;
7263 desc
->dpl
= var
.dpl
;
7264 desc
->p
= var
.present
;
7265 desc
->avl
= var
.avl
;
7273 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
7274 struct desc_struct
*desc
, u32 base3
,
7277 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7278 struct kvm_segment var
;
7280 var
.selector
= selector
;
7281 var
.base
= get_desc_base(desc
);
7282 #ifdef CONFIG_X86_64
7283 var
.base
|= ((u64
)base3
) << 32;
7285 var
.limit
= get_desc_limit(desc
);
7287 var
.limit
= (var
.limit
<< 12) | 0xfff;
7288 var
.type
= desc
->type
;
7289 var
.dpl
= desc
->dpl
;
7294 var
.avl
= desc
->avl
;
7295 var
.present
= desc
->p
;
7296 var
.unusable
= !var
.present
;
7299 kvm_set_segment(vcpu
, &var
, seg
);
7303 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
7304 u32 msr_index
, u64
*pdata
)
7306 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7309 r
= kvm_get_msr(vcpu
, msr_index
, pdata
);
7311 if (r
&& kvm_get_msr_user_space(vcpu
, msr_index
, r
)) {
7312 /* Bounce to user space */
7313 return X86EMUL_IO_NEEDED
;
7319 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
7320 u32 msr_index
, u64 data
)
7322 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7325 r
= kvm_set_msr(vcpu
, msr_index
, data
);
7327 if (r
&& kvm_set_msr_user_space(vcpu
, msr_index
, data
, r
)) {
7328 /* Bounce to user space */
7329 return X86EMUL_IO_NEEDED
;
7335 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
7337 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7339 return vcpu
->arch
.smbase
;
7342 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
7344 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7346 vcpu
->arch
.smbase
= smbase
;
7349 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
7352 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
7355 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
7356 u32 pmc
, u64
*pdata
)
7358 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
7361 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
7363 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
7366 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
7367 struct x86_instruction_info
*info
,
7368 enum x86_intercept_stage stage
)
7370 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
7374 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
7375 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
7378 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
7381 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
7383 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
7386 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
7388 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
7391 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
7393 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
7396 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
7398 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
7401 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
7403 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
7406 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
7408 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
7411 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
7413 return emul_to_vcpu(ctxt
)->arch
.hflags
;
7416 static void emulator_exiting_smm(struct x86_emulate_ctxt
*ctxt
)
7418 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7420 kvm_smm_changed(vcpu
, false);
7423 static int emulator_leave_smm(struct x86_emulate_ctxt
*ctxt
,
7424 const char *smstate
)
7426 return static_call(kvm_x86_leave_smm
)(emul_to_vcpu(ctxt
), smstate
);
7429 static void emulator_triple_fault(struct x86_emulate_ctxt
*ctxt
)
7431 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, emul_to_vcpu(ctxt
));
7434 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
7436 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
7439 static const struct x86_emulate_ops emulate_ops
= {
7440 .read_gpr
= emulator_read_gpr
,
7441 .write_gpr
= emulator_write_gpr
,
7442 .read_std
= emulator_read_std
,
7443 .write_std
= emulator_write_std
,
7444 .read_phys
= kvm_read_guest_phys_system
,
7445 .fetch
= kvm_fetch_guest_virt
,
7446 .read_emulated
= emulator_read_emulated
,
7447 .write_emulated
= emulator_write_emulated
,
7448 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
7449 .invlpg
= emulator_invlpg
,
7450 .pio_in_emulated
= emulator_pio_in_emulated
,
7451 .pio_out_emulated
= emulator_pio_out_emulated
,
7452 .get_segment
= emulator_get_segment
,
7453 .set_segment
= emulator_set_segment
,
7454 .get_cached_segment_base
= emulator_get_cached_segment_base
,
7455 .get_gdt
= emulator_get_gdt
,
7456 .get_idt
= emulator_get_idt
,
7457 .set_gdt
= emulator_set_gdt
,
7458 .set_idt
= emulator_set_idt
,
7459 .get_cr
= emulator_get_cr
,
7460 .set_cr
= emulator_set_cr
,
7461 .cpl
= emulator_get_cpl
,
7462 .get_dr
= emulator_get_dr
,
7463 .set_dr
= emulator_set_dr
,
7464 .get_smbase
= emulator_get_smbase
,
7465 .set_smbase
= emulator_set_smbase
,
7466 .set_msr
= emulator_set_msr
,
7467 .get_msr
= emulator_get_msr
,
7468 .check_pmc
= emulator_check_pmc
,
7469 .read_pmc
= emulator_read_pmc
,
7470 .halt
= emulator_halt
,
7471 .wbinvd
= emulator_wbinvd
,
7472 .fix_hypercall
= emulator_fix_hypercall
,
7473 .intercept
= emulator_intercept
,
7474 .get_cpuid
= emulator_get_cpuid
,
7475 .guest_has_long_mode
= emulator_guest_has_long_mode
,
7476 .guest_has_movbe
= emulator_guest_has_movbe
,
7477 .guest_has_fxsr
= emulator_guest_has_fxsr
,
7478 .set_nmi_mask
= emulator_set_nmi_mask
,
7479 .get_hflags
= emulator_get_hflags
,
7480 .exiting_smm
= emulator_exiting_smm
,
7481 .leave_smm
= emulator_leave_smm
,
7482 .triple_fault
= emulator_triple_fault
,
7483 .set_xcr
= emulator_set_xcr
,
7486 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
7488 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
7490 * an sti; sti; sequence only disable interrupts for the first
7491 * instruction. So, if the last instruction, be it emulated or
7492 * not, left the system with the INT_STI flag enabled, it
7493 * means that the last instruction is an sti. We should not
7494 * leave the flag on in this case. The same goes for mov ss
7496 if (int_shadow
& mask
)
7498 if (unlikely(int_shadow
|| mask
)) {
7499 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
7501 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7505 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
7507 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7508 if (ctxt
->exception
.vector
== PF_VECTOR
)
7509 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
7511 if (ctxt
->exception
.error_code_valid
)
7512 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
7513 ctxt
->exception
.error_code
);
7515 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
7519 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7521 struct x86_emulate_ctxt
*ctxt
;
7523 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
7525 pr_err("kvm: failed to allocate vcpu's emulator\n");
7530 ctxt
->ops
= &emulate_ops
;
7531 vcpu
->arch
.emulate_ctxt
= ctxt
;
7536 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7538 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7541 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
7543 ctxt
->gpa_available
= false;
7544 ctxt
->eflags
= kvm_get_rflags(vcpu
);
7545 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
7547 ctxt
->eip
= kvm_rip_read(vcpu
);
7548 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
7549 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
7550 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
7551 cs_db
? X86EMUL_MODE_PROT32
:
7552 X86EMUL_MODE_PROT16
;
7553 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
7554 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
7555 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
7557 ctxt
->interruptibility
= 0;
7558 ctxt
->have_exception
= false;
7559 ctxt
->exception
.vector
= -1;
7560 ctxt
->perm_ok
= false;
7562 init_decode_cache(ctxt
);
7563 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7566 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
7568 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7571 init_emulate_ctxt(vcpu
);
7575 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
7576 ret
= emulate_int_real(ctxt
, irq
);
7578 if (ret
!= X86EMUL_CONTINUE
) {
7579 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
7581 ctxt
->eip
= ctxt
->_eip
;
7582 kvm_rip_write(vcpu
, ctxt
->eip
);
7583 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7586 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
7588 static void prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
)
7590 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7591 u32 insn_size
= ctxt
->fetch
.end
- ctxt
->fetch
.data
;
7592 struct kvm_run
*run
= vcpu
->run
;
7594 run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7595 run
->emulation_failure
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7596 run
->emulation_failure
.ndata
= 0;
7597 run
->emulation_failure
.flags
= 0;
7600 run
->emulation_failure
.ndata
= 3;
7601 run
->emulation_failure
.flags
|=
7602 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES
;
7603 run
->emulation_failure
.insn_size
= insn_size
;
7604 memset(run
->emulation_failure
.insn_bytes
, 0x90,
7605 sizeof(run
->emulation_failure
.insn_bytes
));
7606 memcpy(run
->emulation_failure
.insn_bytes
,
7607 ctxt
->fetch
.data
, insn_size
);
7611 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
7613 struct kvm
*kvm
= vcpu
->kvm
;
7615 ++vcpu
->stat
.insn_emulation_fail
;
7616 trace_kvm_emulate_insn_failed(vcpu
);
7618 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
7619 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7623 if (kvm
->arch
.exit_on_emulation_error
||
7624 (emulation_type
& EMULTYPE_SKIP
)) {
7625 prepare_emulation_failure_exit(vcpu
);
7629 kvm_queue_exception(vcpu
, UD_VECTOR
);
7631 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
7632 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7633 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7634 vcpu
->run
->internal
.ndata
= 0;
7641 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7642 bool write_fault_to_shadow_pgtable
,
7645 gpa_t gpa
= cr2_or_gpa
;
7648 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7651 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7652 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7655 if (!vcpu
->arch
.mmu
->direct_map
) {
7657 * Write permission should be allowed since only
7658 * write access need to be emulated.
7660 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7663 * If the mapping is invalid in guest, let cpu retry
7664 * it to generate fault.
7666 if (gpa
== UNMAPPED_GVA
)
7671 * Do not retry the unhandleable instruction if it faults on the
7672 * readonly host memory, otherwise it will goto a infinite loop:
7673 * retry instruction -> write #PF -> emulation fail -> retry
7674 * instruction -> ...
7676 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
7679 * If the instruction failed on the error pfn, it can not be fixed,
7680 * report the error to userspace.
7682 if (is_error_noslot_pfn(pfn
))
7685 kvm_release_pfn_clean(pfn
);
7687 /* The instructions are well-emulated on direct mmu. */
7688 if (vcpu
->arch
.mmu
->direct_map
) {
7689 unsigned int indirect_shadow_pages
;
7691 write_lock(&vcpu
->kvm
->mmu_lock
);
7692 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
7693 write_unlock(&vcpu
->kvm
->mmu_lock
);
7695 if (indirect_shadow_pages
)
7696 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7702 * if emulation was due to access to shadowed page table
7703 * and it failed try to unshadow page and re-enter the
7704 * guest to let CPU execute the instruction.
7706 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7709 * If the access faults on its page table, it can not
7710 * be fixed by unprotecting shadow page and it should
7711 * be reported to userspace.
7713 return !write_fault_to_shadow_pgtable
;
7716 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
7717 gpa_t cr2_or_gpa
, int emulation_type
)
7719 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7720 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
7722 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
7723 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
7726 * If the emulation is caused by #PF and it is non-page_table
7727 * writing instruction, it means the VM-EXIT is caused by shadow
7728 * page protected, we can zap the shadow page and retry this
7729 * instruction directly.
7731 * Note: if the guest uses a non-page-table modifying instruction
7732 * on the PDE that points to the instruction, then we will unmap
7733 * the instruction and go to an infinite loop. So, we cache the
7734 * last retried eip and the last fault address, if we meet the eip
7735 * and the address again, we can break out of the potential infinite
7738 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
7740 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7743 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7744 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7747 if (x86_page_table_writing_insn(ctxt
))
7750 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
7753 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
7754 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
7756 if (!vcpu
->arch
.mmu
->direct_map
)
7757 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7759 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7764 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
7765 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
7767 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
)
7769 trace_kvm_smm_transition(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, entering_smm
);
7772 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
7774 vcpu
->arch
.hflags
&= ~(HF_SMM_MASK
| HF_SMM_INSIDE_NMI_MASK
);
7776 /* Process a latched INIT or SMI, if any. */
7777 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7780 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7781 * on SMM exit we still need to reload them from
7784 vcpu
->arch
.pdptrs_from_userspace
= false;
7787 kvm_mmu_reset_context(vcpu
);
7790 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
7799 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
7800 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
7805 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
7807 struct kvm_run
*kvm_run
= vcpu
->run
;
7809 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
7810 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
7811 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
7812 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7813 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7816 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
7820 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
7822 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7825 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
7830 * rflags is the old, "raw" value of the flags. The new value has
7831 * not been saved yet.
7833 * This is correct even for TF set by the guest, because "the
7834 * processor will not generate this exception after the instruction
7835 * that sets the TF flag".
7837 if (unlikely(rflags
& X86_EFLAGS_TF
))
7838 r
= kvm_vcpu_do_singlestep(vcpu
);
7841 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
7843 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
7845 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
7846 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
7847 struct kvm_run
*kvm_run
= vcpu
->run
;
7848 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7849 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7850 vcpu
->arch
.guest_debug_dr7
,
7854 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
7855 kvm_run
->debug
.arch
.pc
= eip
;
7856 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7857 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7863 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
7864 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
7865 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7866 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7871 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
7880 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
7882 switch (ctxt
->opcode_len
) {
7889 case 0xe6: /* OUT */
7893 case 0x6c: /* INS */
7895 case 0x6e: /* OUTS */
7902 case 0x33: /* RDPMC */
7912 * Decode to be emulated instruction. Return EMULATION_OK if success.
7914 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
7915 void *insn
, int insn_len
)
7917 int r
= EMULATION_OK
;
7918 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7920 init_emulate_ctxt(vcpu
);
7923 * We will reenter on the same instruction since we do not set
7924 * complete_userspace_io. This does not handle watchpoints yet,
7925 * those would be handled in the emulate_ops.
7927 if (!(emulation_type
& EMULTYPE_SKIP
) &&
7928 kvm_vcpu_check_breakpoint(vcpu
, &r
))
7931 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
7933 trace_kvm_emulate_insn_start(vcpu
);
7934 ++vcpu
->stat
.insn_emulation
;
7938 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
7940 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7941 int emulation_type
, void *insn
, int insn_len
)
7944 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7945 bool writeback
= true;
7946 bool write_fault_to_spt
;
7948 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, insn
, insn_len
)))
7951 vcpu
->arch
.l1tf_flush_l1d
= true;
7954 * Clear write_fault_to_shadow_pgtable here to ensure it is
7957 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
7958 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
7960 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
7961 kvm_clear_exception_queue(vcpu
);
7963 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
7965 if (r
!= EMULATION_OK
) {
7966 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
7967 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
7968 kvm_queue_exception(vcpu
, UD_VECTOR
);
7971 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
7975 if (ctxt
->have_exception
) {
7977 * #UD should result in just EMULATION_FAILED, and trap-like
7978 * exception should not be encountered during decode.
7980 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
7981 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
7982 inject_emulated_exception(vcpu
);
7985 return handle_emulation_failure(vcpu
, emulation_type
);
7989 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
7990 !is_vmware_backdoor_opcode(ctxt
)) {
7991 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7996 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7997 * for kvm_skip_emulated_instruction(). The caller is responsible for
7998 * updating interruptibility state and injecting single-step #DBs.
8000 if (emulation_type
& EMULTYPE_SKIP
) {
8001 kvm_rip_write(vcpu
, ctxt
->_eip
);
8002 if (ctxt
->eflags
& X86_EFLAGS_RF
)
8003 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
8007 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
8010 /* this is needed for vmware backdoor interface to work since it
8011 changes registers values during IO operation */
8012 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
8013 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
8014 emulator_invalidate_register_cache(ctxt
);
8018 if (emulation_type
& EMULTYPE_PF
) {
8019 /* Save the faulting GPA (cr2) in the address field */
8020 ctxt
->exception
.address
= cr2_or_gpa
;
8022 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8023 if (vcpu
->arch
.mmu
->direct_map
) {
8024 ctxt
->gpa_available
= true;
8025 ctxt
->gpa_val
= cr2_or_gpa
;
8028 /* Sanitize the address out of an abundance of paranoia. */
8029 ctxt
->exception
.address
= 0;
8032 r
= x86_emulate_insn(ctxt
);
8034 if (r
== EMULATION_INTERCEPTED
)
8037 if (r
== EMULATION_FAILED
) {
8038 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
8042 return handle_emulation_failure(vcpu
, emulation_type
);
8045 if (ctxt
->have_exception
) {
8047 if (inject_emulated_exception(vcpu
))
8049 } else if (vcpu
->arch
.pio
.count
) {
8050 if (!vcpu
->arch
.pio
.in
) {
8051 /* FIXME: return into emulator if single-stepping. */
8052 vcpu
->arch
.pio
.count
= 0;
8055 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
8058 } else if (vcpu
->mmio_needed
) {
8059 ++vcpu
->stat
.mmio_exits
;
8061 if (!vcpu
->mmio_is_write
)
8064 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
8065 } else if (r
== EMULATION_RESTART
)
8071 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8072 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
8073 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
8074 if (!ctxt
->have_exception
||
8075 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
8076 kvm_rip_write(vcpu
, ctxt
->eip
);
8077 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
8078 r
= kvm_vcpu_do_singlestep(vcpu
);
8079 if (kvm_x86_ops
.update_emulated_instruction
)
8080 static_call(kvm_x86_update_emulated_instruction
)(vcpu
);
8081 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
8085 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8086 * do nothing, and it will be requested again as soon as
8087 * the shadow expires. But we still need to check here,
8088 * because POPF has no interrupt shadow.
8090 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
8091 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8093 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
8098 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
8100 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
8102 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
8104 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
8105 void *insn
, int insn_len
)
8107 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
8109 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
8111 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
8113 vcpu
->arch
.pio
.count
= 0;
8117 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
8119 vcpu
->arch
.pio
.count
= 0;
8121 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
8124 return kvm_skip_emulated_instruction(vcpu
);
8127 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
8128 unsigned short port
)
8130 unsigned long val
= kvm_rax_read(vcpu
);
8131 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
8137 * Workaround userspace that relies on old KVM behavior of %rip being
8138 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8141 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
8142 vcpu
->arch
.complete_userspace_io
=
8143 complete_fast_pio_out_port_0x7e
;
8144 kvm_skip_emulated_instruction(vcpu
);
8146 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8147 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
8152 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
8156 /* We should only ever be called with arch.pio.count equal to 1 */
8157 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
8159 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
8160 vcpu
->arch
.pio
.count
= 0;
8164 /* For size less than 4 we merge, else we zero extend */
8165 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
8168 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8169 * the copy and tracing
8171 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
8172 kvm_rax_write(vcpu
, val
);
8174 return kvm_skip_emulated_instruction(vcpu
);
8177 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
8178 unsigned short port
)
8183 /* For size less than 4 we merge, else we zero extend */
8184 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
8186 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
8188 kvm_rax_write(vcpu
, val
);
8192 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8193 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
8198 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
8203 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
8205 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
8206 return ret
&& kvm_skip_emulated_instruction(vcpu
);
8208 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
8210 static int kvmclock_cpu_down_prep(unsigned int cpu
)
8212 __this_cpu_write(cpu_tsc_khz
, 0);
8216 static void tsc_khz_changed(void *data
)
8218 struct cpufreq_freqs
*freq
= data
;
8219 unsigned long khz
= 0;
8223 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8224 khz
= cpufreq_quick_get(raw_smp_processor_id());
8227 __this_cpu_write(cpu_tsc_khz
, khz
);
8230 #ifdef CONFIG_X86_64
8231 static void kvm_hyperv_tsc_notifier(void)
8234 struct kvm_vcpu
*vcpu
;
8236 unsigned long flags
;
8238 mutex_lock(&kvm_lock
);
8239 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8240 kvm_make_mclock_inprogress_request(kvm
);
8242 hyperv_stop_tsc_emulation();
8244 /* TSC frequency always matches when on Hyper-V */
8245 for_each_present_cpu(cpu
)
8246 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
8247 kvm_max_guest_tsc_khz
= tsc_khz
;
8249 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8250 struct kvm_arch
*ka
= &kvm
->arch
;
8252 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
8253 pvclock_update_vm_gtod_copy(kvm
);
8254 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
8256 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8257 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8259 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8260 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
8262 mutex_unlock(&kvm_lock
);
8266 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
8269 struct kvm_vcpu
*vcpu
;
8270 int i
, send_ipi
= 0;
8273 * We allow guests to temporarily run on slowing clocks,
8274 * provided we notify them after, or to run on accelerating
8275 * clocks, provided we notify them before. Thus time never
8278 * However, we have a problem. We can't atomically update
8279 * the frequency of a given CPU from this function; it is
8280 * merely a notifier, which can be called from any CPU.
8281 * Changing the TSC frequency at arbitrary points in time
8282 * requires a recomputation of local variables related to
8283 * the TSC for each VCPU. We must flag these local variables
8284 * to be updated and be sure the update takes place with the
8285 * new frequency before any guests proceed.
8287 * Unfortunately, the combination of hotplug CPU and frequency
8288 * change creates an intractable locking scenario; the order
8289 * of when these callouts happen is undefined with respect to
8290 * CPU hotplug, and they can race with each other. As such,
8291 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8292 * undefined; you can actually have a CPU frequency change take
8293 * place in between the computation of X and the setting of the
8294 * variable. To protect against this problem, all updates of
8295 * the per_cpu tsc_khz variable are done in an interrupt
8296 * protected IPI, and all callers wishing to update the value
8297 * must wait for a synchronous IPI to complete (which is trivial
8298 * if the caller is on the CPU already). This establishes the
8299 * necessary total order on variable updates.
8301 * Note that because a guest time update may take place
8302 * anytime after the setting of the VCPU's request bit, the
8303 * correct TSC value must be set before the request. However,
8304 * to ensure the update actually makes it to any guest which
8305 * starts running in hardware virtualization between the set
8306 * and the acquisition of the spinlock, we must also ping the
8307 * CPU after setting the request bit.
8311 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8313 mutex_lock(&kvm_lock
);
8314 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8315 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8316 if (vcpu
->cpu
!= cpu
)
8318 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8319 if (vcpu
->cpu
!= raw_smp_processor_id())
8323 mutex_unlock(&kvm_lock
);
8325 if (freq
->old
< freq
->new && send_ipi
) {
8327 * We upscale the frequency. Must make the guest
8328 * doesn't see old kvmclock values while running with
8329 * the new frequency, otherwise we risk the guest sees
8330 * time go backwards.
8332 * In case we update the frequency for another cpu
8333 * (which might be in guest context) send an interrupt
8334 * to kick the cpu out of guest context. Next time
8335 * guest context is entered kvmclock will be updated,
8336 * so the guest will not see stale values.
8338 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8342 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
8345 struct cpufreq_freqs
*freq
= data
;
8348 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
8350 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
8353 for_each_cpu(cpu
, freq
->policy
->cpus
)
8354 __kvmclock_cpufreq_notifier(freq
, cpu
);
8359 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
8360 .notifier_call
= kvmclock_cpufreq_notifier
8363 static int kvmclock_cpu_online(unsigned int cpu
)
8365 tsc_khz_changed(NULL
);
8369 static void kvm_timer_init(void)
8371 max_tsc_khz
= tsc_khz
;
8373 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
8374 #ifdef CONFIG_CPU_FREQ
8375 struct cpufreq_policy
*policy
;
8379 policy
= cpufreq_cpu_get(cpu
);
8381 if (policy
->cpuinfo
.max_freq
)
8382 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
8383 cpufreq_cpu_put(policy
);
8387 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
8388 CPUFREQ_TRANSITION_NOTIFIER
);
8391 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
8392 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
8395 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
8396 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
8398 int kvm_is_in_guest(void)
8400 return __this_cpu_read(current_vcpu
) != NULL
;
8403 static int kvm_is_user_mode(void)
8407 if (__this_cpu_read(current_vcpu
))
8408 user_mode
= static_call(kvm_x86_get_cpl
)(__this_cpu_read(current_vcpu
));
8410 return user_mode
!= 0;
8413 static unsigned long kvm_get_guest_ip(void)
8415 unsigned long ip
= 0;
8417 if (__this_cpu_read(current_vcpu
))
8418 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
8423 static void kvm_handle_intel_pt_intr(void)
8425 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
8427 kvm_make_request(KVM_REQ_PMI
, vcpu
);
8428 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
8429 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
8432 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
8433 .is_in_guest
= kvm_is_in_guest
,
8434 .is_user_mode
= kvm_is_user_mode
,
8435 .get_guest_ip
= kvm_get_guest_ip
,
8436 .handle_intel_pt_intr
= NULL
,
8439 #ifdef CONFIG_X86_64
8440 static void pvclock_gtod_update_fn(struct work_struct
*work
)
8444 struct kvm_vcpu
*vcpu
;
8447 mutex_lock(&kvm_lock
);
8448 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8449 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8450 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8451 atomic_set(&kvm_guest_has_master_clock
, 0);
8452 mutex_unlock(&kvm_lock
);
8455 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
8458 * Indirection to move queue_work() out of the tk_core.seq write held
8459 * region to prevent possible deadlocks against time accessors which
8460 * are invoked with work related locks held.
8462 static void pvclock_irq_work_fn(struct irq_work
*w
)
8464 queue_work(system_long_wq
, &pvclock_gtod_work
);
8467 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
8470 * Notification about pvclock gtod data update.
8472 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
8475 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
8476 struct timekeeper
*tk
= priv
;
8478 update_pvclock_gtod(tk
);
8481 * Disable master clock if host does not trust, or does not use,
8482 * TSC based clocksource. Delegate queue_work() to irq_work as
8483 * this is invoked with tk_core.seq write held.
8485 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
8486 atomic_read(&kvm_guest_has_master_clock
) != 0)
8487 irq_work_queue(&pvclock_irq_work
);
8491 static struct notifier_block pvclock_gtod_notifier
= {
8492 .notifier_call
= pvclock_gtod_notify
,
8496 int kvm_arch_init(void *opaque
)
8498 struct kvm_x86_init_ops
*ops
= opaque
;
8501 if (kvm_x86_ops
.hardware_enable
) {
8502 printk(KERN_ERR
"kvm: already loaded the other module\n");
8507 if (!ops
->cpu_has_kvm_support()) {
8508 pr_err_ratelimited("kvm: no hardware support\n");
8512 if (ops
->disabled_by_bios()) {
8513 pr_warn_ratelimited("kvm: disabled by bios\n");
8519 * KVM explicitly assumes that the guest has an FPU and
8520 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8521 * vCPU's FPU state as a fxregs_state struct.
8523 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
8524 printk(KERN_ERR
"kvm: inadequate fpu\n");
8530 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
8531 __alignof__(struct fpu
), SLAB_ACCOUNT
,
8533 if (!x86_fpu_cache
) {
8534 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
8538 x86_emulator_cache
= kvm_alloc_emulator_cache();
8539 if (!x86_emulator_cache
) {
8540 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8541 goto out_free_x86_fpu_cache
;
8544 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
8545 if (!user_return_msrs
) {
8546 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
8547 goto out_free_x86_emulator_cache
;
8549 kvm_nr_uret_msrs
= 0;
8551 r
= kvm_mmu_module_init();
8553 goto out_free_percpu
;
8557 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
8558 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
8559 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
8562 if (pi_inject_timer
== -1)
8563 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
8564 #ifdef CONFIG_X86_64
8565 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
8567 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8568 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
8574 free_percpu(user_return_msrs
);
8575 out_free_x86_emulator_cache
:
8576 kmem_cache_destroy(x86_emulator_cache
);
8577 out_free_x86_fpu_cache
:
8578 kmem_cache_destroy(x86_fpu_cache
);
8583 void kvm_arch_exit(void)
8585 #ifdef CONFIG_X86_64
8586 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8587 clear_hv_tscchange_cb();
8591 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8592 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
8593 CPUFREQ_TRANSITION_NOTIFIER
);
8594 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
8595 #ifdef CONFIG_X86_64
8596 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
8597 irq_work_sync(&pvclock_irq_work
);
8598 cancel_work_sync(&pvclock_gtod_work
);
8600 kvm_x86_ops
.hardware_enable
= NULL
;
8601 kvm_mmu_module_exit();
8602 free_percpu(user_return_msrs
);
8603 kmem_cache_destroy(x86_emulator_cache
);
8604 kmem_cache_destroy(x86_fpu_cache
);
8605 #ifdef CONFIG_KVM_XEN
8606 static_key_deferred_flush(&kvm_xen_enabled
);
8607 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
8611 static int __kvm_vcpu_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
8613 ++vcpu
->stat
.halt_exits
;
8614 if (lapic_in_kernel(vcpu
)) {
8615 vcpu
->arch
.mp_state
= state
;
8618 vcpu
->run
->exit_reason
= reason
;
8623 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
8625 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
8627 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
8629 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
8631 int ret
= kvm_skip_emulated_instruction(vcpu
);
8633 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8634 * KVM_EXIT_DEBUG here.
8636 return kvm_vcpu_halt(vcpu
) && ret
;
8638 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
8640 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
8642 int ret
= kvm_skip_emulated_instruction(vcpu
);
8644 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
, KVM_EXIT_AP_RESET_HOLD
) && ret
;
8646 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
8648 #ifdef CONFIG_X86_64
8649 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
8650 unsigned long clock_type
)
8652 struct kvm_clock_pairing clock_pairing
;
8653 struct timespec64 ts
;
8657 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
8658 return -KVM_EOPNOTSUPP
;
8660 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
8661 return -KVM_EOPNOTSUPP
;
8663 clock_pairing
.sec
= ts
.tv_sec
;
8664 clock_pairing
.nsec
= ts
.tv_nsec
;
8665 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
8666 clock_pairing
.flags
= 0;
8667 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
8670 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
8671 sizeof(struct kvm_clock_pairing
)))
8679 * kvm_pv_kick_cpu_op: Kick a vcpu.
8681 * @apicid - apicid of vcpu to be kicked.
8683 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
8685 struct kvm_lapic_irq lapic_irq
;
8687 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
8688 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
8689 lapic_irq
.level
= 0;
8690 lapic_irq
.dest_id
= apicid
;
8691 lapic_irq
.msi_redir_hint
= false;
8693 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
8694 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
8697 bool kvm_apicv_activated(struct kvm
*kvm
)
8699 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
8701 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
8703 static void kvm_apicv_init(struct kvm
*kvm
)
8705 mutex_init(&kvm
->arch
.apicv_update_lock
);
8708 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
8709 &kvm
->arch
.apicv_inhibit_reasons
);
8711 set_bit(APICV_INHIBIT_REASON_DISABLE
,
8712 &kvm
->arch
.apicv_inhibit_reasons
);
8715 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
8717 struct kvm_vcpu
*target
= NULL
;
8718 struct kvm_apic_map
*map
;
8720 vcpu
->stat
.directed_yield_attempted
++;
8722 if (single_task_running())
8726 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
8728 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
8729 target
= map
->phys_map
[dest_id
]->vcpu
;
8733 if (!target
|| !READ_ONCE(target
->ready
))
8736 /* Ignore requests to yield to self */
8740 if (kvm_vcpu_yield_to(target
) <= 0)
8743 vcpu
->stat
.directed_yield_successful
++;
8749 static int complete_hypercall_exit(struct kvm_vcpu
*vcpu
)
8751 u64 ret
= vcpu
->run
->hypercall
.ret
;
8753 if (!is_64_bit_mode(vcpu
))
8755 kvm_rax_write(vcpu
, ret
);
8756 ++vcpu
->stat
.hypercalls
;
8757 return kvm_skip_emulated_instruction(vcpu
);
8760 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
8762 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
8765 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
8766 return kvm_xen_hypercall(vcpu
);
8768 if (kvm_hv_hypercall_enabled(vcpu
))
8769 return kvm_hv_hypercall(vcpu
);
8771 nr
= kvm_rax_read(vcpu
);
8772 a0
= kvm_rbx_read(vcpu
);
8773 a1
= kvm_rcx_read(vcpu
);
8774 a2
= kvm_rdx_read(vcpu
);
8775 a3
= kvm_rsi_read(vcpu
);
8777 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
8779 op_64_bit
= is_64_bit_hypercall(vcpu
);
8788 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
8796 case KVM_HC_VAPIC_POLL_IRQ
:
8799 case KVM_HC_KICK_CPU
:
8800 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
8803 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
8804 kvm_sched_yield(vcpu
, a1
);
8807 #ifdef CONFIG_X86_64
8808 case KVM_HC_CLOCK_PAIRING
:
8809 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
8812 case KVM_HC_SEND_IPI
:
8813 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
8816 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
8818 case KVM_HC_SCHED_YIELD
:
8819 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
8822 kvm_sched_yield(vcpu
, a0
);
8825 case KVM_HC_MAP_GPA_RANGE
: {
8826 u64 gpa
= a0
, npages
= a1
, attrs
= a2
;
8829 if (!(vcpu
->kvm
->arch
.hypercall_exit_enabled
& (1 << KVM_HC_MAP_GPA_RANGE
)))
8832 if (!PAGE_ALIGNED(gpa
) || !npages
||
8833 gpa_to_gfn(gpa
) + npages
<= gpa_to_gfn(gpa
)) {
8838 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERCALL
;
8839 vcpu
->run
->hypercall
.nr
= KVM_HC_MAP_GPA_RANGE
;
8840 vcpu
->run
->hypercall
.args
[0] = gpa
;
8841 vcpu
->run
->hypercall
.args
[1] = npages
;
8842 vcpu
->run
->hypercall
.args
[2] = attrs
;
8843 vcpu
->run
->hypercall
.longmode
= op_64_bit
;
8844 vcpu
->arch
.complete_userspace_io
= complete_hypercall_exit
;
8854 kvm_rax_write(vcpu
, ret
);
8856 ++vcpu
->stat
.hypercalls
;
8857 return kvm_skip_emulated_instruction(vcpu
);
8859 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
8861 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
8863 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8864 char instruction
[3];
8865 unsigned long rip
= kvm_rip_read(vcpu
);
8867 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
8869 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
8873 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
8875 return vcpu
->run
->request_interrupt_window
&&
8876 likely(!pic_in_kernel(vcpu
->kvm
));
8879 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
8881 struct kvm_run
*kvm_run
= vcpu
->run
;
8883 kvm_run
->if_flag
= static_call(kvm_x86_get_if_flag
)(vcpu
);
8884 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
8885 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
8888 * The call to kvm_ready_for_interrupt_injection() may end up in
8889 * kvm_xen_has_interrupt() which may require the srcu lock to be
8890 * held, to protect against changes in the vcpu_info address.
8892 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8893 kvm_run
->ready_for_interrupt_injection
=
8894 pic_in_kernel(vcpu
->kvm
) ||
8895 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
8896 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8899 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
8902 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
8906 if (!kvm_x86_ops
.update_cr8_intercept
)
8909 if (!lapic_in_kernel(vcpu
))
8912 if (vcpu
->arch
.apicv_active
)
8915 if (!vcpu
->arch
.apic
->vapic_addr
)
8916 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
8923 tpr
= kvm_lapic_get_cr8(vcpu
);
8925 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
8929 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
8931 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8932 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
8936 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
8939 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
8941 if (vcpu
->arch
.exception
.error_code
&& !is_protmode(vcpu
))
8942 vcpu
->arch
.exception
.error_code
= false;
8943 static_call(kvm_x86_queue_exception
)(vcpu
);
8946 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
8949 bool can_inject
= true;
8951 /* try to reinject previous events if any */
8953 if (vcpu
->arch
.exception
.injected
) {
8954 kvm_inject_exception(vcpu
);
8958 * Do not inject an NMI or interrupt if there is a pending
8959 * exception. Exceptions and interrupts are recognized at
8960 * instruction boundaries, i.e. the start of an instruction.
8961 * Trap-like exceptions, e.g. #DB, have higher priority than
8962 * NMIs and interrupts, i.e. traps are recognized before an
8963 * NMI/interrupt that's pending on the same instruction.
8964 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8965 * priority, but are only generated (pended) during instruction
8966 * execution, i.e. a pending fault-like exception means the
8967 * fault occurred on the *previous* instruction and must be
8968 * serviced prior to recognizing any new events in order to
8969 * fully complete the previous instruction.
8971 else if (!vcpu
->arch
.exception
.pending
) {
8972 if (vcpu
->arch
.nmi_injected
) {
8973 static_call(kvm_x86_set_nmi
)(vcpu
);
8975 } else if (vcpu
->arch
.interrupt
.injected
) {
8976 static_call(kvm_x86_set_irq
)(vcpu
);
8981 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
8982 vcpu
->arch
.exception
.pending
);
8985 * Call check_nested_events() even if we reinjected a previous event
8986 * in order for caller to determine if it should require immediate-exit
8987 * from L2 to L1 due to pending L1 events which require exit
8990 if (is_guest_mode(vcpu
)) {
8991 r
= kvm_check_nested_events(vcpu
);
8996 /* try to inject new event if pending */
8997 if (vcpu
->arch
.exception
.pending
) {
8998 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
8999 vcpu
->arch
.exception
.has_error_code
,
9000 vcpu
->arch
.exception
.error_code
);
9002 vcpu
->arch
.exception
.pending
= false;
9003 vcpu
->arch
.exception
.injected
= true;
9005 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
9006 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
9009 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
9010 kvm_deliver_exception_payload(vcpu
);
9011 if (vcpu
->arch
.dr7
& DR7_GD
) {
9012 vcpu
->arch
.dr7
&= ~DR7_GD
;
9013 kvm_update_dr7(vcpu
);
9017 kvm_inject_exception(vcpu
);
9021 /* Don't inject interrupts if the user asked to avoid doing so */
9022 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
)
9026 * Finally, inject interrupt events. If an event cannot be injected
9027 * due to architectural conditions (e.g. IF=0) a window-open exit
9028 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
9029 * and can architecturally be injected, but we cannot do it right now:
9030 * an interrupt could have arrived just now and we have to inject it
9031 * as a vmexit, or there could already an event in the queue, which is
9032 * indicated by can_inject. In that case we request an immediate exit
9033 * in order to make progress and get back here for another iteration.
9034 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9036 if (vcpu
->arch
.smi_pending
) {
9037 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
9041 vcpu
->arch
.smi_pending
= false;
9042 ++vcpu
->arch
.smi_count
;
9046 static_call(kvm_x86_enable_smi_window
)(vcpu
);
9049 if (vcpu
->arch
.nmi_pending
) {
9050 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
9054 --vcpu
->arch
.nmi_pending
;
9055 vcpu
->arch
.nmi_injected
= true;
9056 static_call(kvm_x86_set_nmi
)(vcpu
);
9058 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
9060 if (vcpu
->arch
.nmi_pending
)
9061 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
9064 if (kvm_cpu_has_injectable_intr(vcpu
)) {
9065 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
9069 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
9070 static_call(kvm_x86_set_irq
)(vcpu
);
9071 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
9073 if (kvm_cpu_has_injectable_intr(vcpu
))
9074 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9077 if (is_guest_mode(vcpu
) &&
9078 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
9079 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
9080 *req_immediate_exit
= true;
9082 WARN_ON(vcpu
->arch
.exception
.pending
);
9087 *req_immediate_exit
= true;
9093 static void process_nmi(struct kvm_vcpu
*vcpu
)
9098 * x86 is limited to one NMI running, and one NMI pending after it.
9099 * If an NMI is already in progress, limit further NMIs to just one.
9100 * Otherwise, allow two (and we'll inject the first one immediately).
9102 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
9105 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
9106 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
9107 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9110 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
9113 flags
|= seg
->g
<< 23;
9114 flags
|= seg
->db
<< 22;
9115 flags
|= seg
->l
<< 21;
9116 flags
|= seg
->avl
<< 20;
9117 flags
|= seg
->present
<< 15;
9118 flags
|= seg
->dpl
<< 13;
9119 flags
|= seg
->s
<< 12;
9120 flags
|= seg
->type
<< 8;
9124 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9126 struct kvm_segment seg
;
9129 kvm_get_segment(vcpu
, &seg
, n
);
9130 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
9133 offset
= 0x7f84 + n
* 12;
9135 offset
= 0x7f2c + (n
- 3) * 12;
9137 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
9138 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9139 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
9142 #ifdef CONFIG_X86_64
9143 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9145 struct kvm_segment seg
;
9149 kvm_get_segment(vcpu
, &seg
, n
);
9150 offset
= 0x7e00 + n
* 16;
9152 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
9153 put_smstate(u16
, buf
, offset
, seg
.selector
);
9154 put_smstate(u16
, buf
, offset
+ 2, flags
);
9155 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9156 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
9160 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
9163 struct kvm_segment seg
;
9167 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
9168 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
9169 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
9170 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
9172 for (i
= 0; i
< 8; i
++)
9173 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read_raw(vcpu
, i
));
9175 kvm_get_dr(vcpu
, 6, &val
);
9176 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
9177 kvm_get_dr(vcpu
, 7, &val
);
9178 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
9180 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9181 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
9182 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
9183 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
9184 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
9186 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9187 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
9188 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
9189 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
9190 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
9192 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9193 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
9194 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
9196 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9197 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
9198 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
9200 for (i
= 0; i
< 6; i
++)
9201 enter_smm_save_seg_32(vcpu
, buf
, i
);
9203 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
9206 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
9207 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
9210 #ifdef CONFIG_X86_64
9211 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
9214 struct kvm_segment seg
;
9218 for (i
= 0; i
< 16; i
++)
9219 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read_raw(vcpu
, i
));
9221 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
9222 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
9224 kvm_get_dr(vcpu
, 6, &val
);
9225 put_smstate(u64
, buf
, 0x7f68, val
);
9226 kvm_get_dr(vcpu
, 7, &val
);
9227 put_smstate(u64
, buf
, 0x7f60, val
);
9229 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
9230 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
9231 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
9233 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
9236 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
9238 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
9240 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9241 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
9242 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
9243 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
9244 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
9246 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9247 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
9248 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
9250 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9251 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
9252 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
9253 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
9254 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
9256 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9257 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
9258 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
9260 for (i
= 0; i
< 6; i
++)
9261 enter_smm_save_seg_64(vcpu
, buf
, i
);
9265 static void enter_smm(struct kvm_vcpu
*vcpu
)
9267 struct kvm_segment cs
, ds
;
9272 memset(buf
, 0, 512);
9273 #ifdef CONFIG_X86_64
9274 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9275 enter_smm_save_state_64(vcpu
, buf
);
9278 enter_smm_save_state_32(vcpu
, buf
);
9281 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9282 * state (e.g. leave guest mode) after we've saved the state into the
9283 * SMM state-save area.
9285 static_call(kvm_x86_enter_smm
)(vcpu
, buf
);
9287 kvm_smm_changed(vcpu
, true);
9288 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
9290 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
))
9291 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
9293 static_call(kvm_x86_set_nmi_mask
)(vcpu
, true);
9295 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
9296 kvm_rip_write(vcpu
, 0x8000);
9298 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
9299 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
9300 vcpu
->arch
.cr0
= cr0
;
9302 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
9304 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9305 dt
.address
= dt
.size
= 0;
9306 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
9308 kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
9310 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
9311 cs
.base
= vcpu
->arch
.smbase
;
9316 cs
.limit
= ds
.limit
= 0xffffffff;
9317 cs
.type
= ds
.type
= 0x3;
9318 cs
.dpl
= ds
.dpl
= 0;
9323 cs
.avl
= ds
.avl
= 0;
9324 cs
.present
= ds
.present
= 1;
9325 cs
.unusable
= ds
.unusable
= 0;
9326 cs
.padding
= ds
.padding
= 0;
9328 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9329 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
9330 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
9331 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
9332 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
9333 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
9335 #ifdef CONFIG_X86_64
9336 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9337 static_call(kvm_x86_set_efer
)(vcpu
, 0);
9340 kvm_update_cpuid_runtime(vcpu
);
9341 kvm_mmu_reset_context(vcpu
);
9344 static void process_smi(struct kvm_vcpu
*vcpu
)
9346 vcpu
->arch
.smi_pending
= true;
9347 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9350 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
9351 unsigned long *vcpu_bitmap
)
9355 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
9357 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
9358 NULL
, vcpu_bitmap
, cpus
);
9360 free_cpumask_var(cpus
);
9363 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
9365 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
9368 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
9372 if (!lapic_in_kernel(vcpu
))
9375 mutex_lock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9377 activate
= kvm_apicv_activated(vcpu
->kvm
);
9378 if (vcpu
->arch
.apicv_active
== activate
)
9381 vcpu
->arch
.apicv_active
= activate
;
9382 kvm_apic_update_apicv(vcpu
);
9383 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
9386 * When APICv gets disabled, we may still have injected interrupts
9387 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9388 * still active when the interrupt got accepted. Make sure
9389 * inject_pending_event() is called to check for that.
9391 if (!vcpu
->arch
.apicv_active
)
9392 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9395 mutex_unlock(&vcpu
->kvm
->arch
.apicv_update_lock
);
9397 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
9399 void __kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9401 unsigned long old
, new;
9403 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
9404 !static_call(kvm_x86_check_apicv_inhibit_reasons
)(bit
))
9407 old
= new = kvm
->arch
.apicv_inhibit_reasons
;
9410 __clear_bit(bit
, &new);
9412 __set_bit(bit
, &new);
9414 if (!!old
!= !!new) {
9415 trace_kvm_apicv_update_request(activate
, bit
);
9416 kvm_make_all_cpus_request(kvm
, KVM_REQ_APICV_UPDATE
);
9417 kvm
->arch
.apicv_inhibit_reasons
= new;
9419 unsigned long gfn
= gpa_to_gfn(APIC_DEFAULT_PHYS_BASE
);
9420 kvm_zap_gfn_range(kvm
, gfn
, gfn
+1);
9423 kvm
->arch
.apicv_inhibit_reasons
= new;
9425 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update
);
9427 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9429 mutex_lock(&kvm
->arch
.apicv_update_lock
);
9430 __kvm_request_apicv_update(kvm
, activate
, bit
);
9431 mutex_unlock(&kvm
->arch
.apicv_update_lock
);
9433 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
9435 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
9437 if (!kvm_apic_present(vcpu
))
9440 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
9442 if (irqchip_split(vcpu
->kvm
))
9443 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9445 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9446 if (ioapic_in_kernel(vcpu
->kvm
))
9447 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9450 if (is_guest_mode(vcpu
))
9451 vcpu
->arch
.load_eoi_exitmap_pending
= true;
9453 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
9456 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
9458 u64 eoi_exit_bitmap
[4];
9460 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
9463 if (to_hv_vcpu(vcpu
)) {
9464 bitmap_or((ulong
*)eoi_exit_bitmap
,
9465 vcpu
->arch
.ioapic_handled_vectors
,
9466 to_hv_synic(vcpu
)->vec_bitmap
, 256);
9467 static_call(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
9471 static_call(kvm_x86_load_eoi_exitmap
)(
9472 vcpu
, (u64
*)vcpu
->arch
.ioapic_handled_vectors
);
9475 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
9476 unsigned long start
, unsigned long end
)
9478 unsigned long apic_address
;
9481 * The physical address of apic access page is stored in the VMCS.
9482 * Update it when it becomes invalid.
9484 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
9485 if (start
<= apic_address
&& apic_address
< end
)
9486 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
9489 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
9491 if (!lapic_in_kernel(vcpu
))
9494 if (!kvm_x86_ops
.set_apic_access_page_addr
)
9497 static_call(kvm_x86_set_apic_access_page_addr
)(vcpu
);
9500 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
9502 smp_send_reschedule(vcpu
->cpu
);
9504 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
9507 * Returns 1 to let vcpu_run() continue the guest execution loop without
9508 * exiting to the userspace. Otherwise, the value will be returned to the
9511 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
9515 dm_request_for_irq_injection(vcpu
) &&
9516 kvm_cpu_accept_dm_intr(vcpu
);
9517 fastpath_t exit_fastpath
;
9519 bool req_immediate_exit
= false;
9521 /* Forbid vmenter if vcpu dirty ring is soft-full */
9522 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
9523 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
9524 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
9525 trace_kvm_dirty_ring_exit(vcpu
);
9530 if (kvm_request_pending(vcpu
)) {
9531 if (kvm_check_request(KVM_REQ_VM_BUGGED
, vcpu
)) {
9535 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
9536 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
9541 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
9542 kvm_mmu_unload(vcpu
);
9543 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
9544 __kvm_migrate_timers(vcpu
);
9545 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
9546 kvm_gen_update_masterclock(vcpu
->kvm
);
9547 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
9548 kvm_gen_kvmclock_update(vcpu
);
9549 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
9550 r
= kvm_guest_time_update(vcpu
);
9554 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
9555 kvm_mmu_sync_roots(vcpu
);
9556 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
9557 kvm_mmu_load_pgd(vcpu
);
9558 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
9559 kvm_vcpu_flush_tlb_all(vcpu
);
9561 /* Flushing all ASIDs flushes the current ASID... */
9562 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
9564 kvm_service_local_tlb_flush_requests(vcpu
);
9566 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
9567 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
9571 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
9572 if (is_guest_mode(vcpu
)) {
9573 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
9575 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
9576 vcpu
->mmio_needed
= 0;
9581 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
9582 /* Page is swapped out. Do synthetic halt */
9583 vcpu
->arch
.apf
.halted
= true;
9587 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
9588 record_steal_time(vcpu
);
9589 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
9591 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
9593 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
9594 kvm_pmu_handle_event(vcpu
);
9595 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
9596 kvm_pmu_deliver_pmi(vcpu
);
9597 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
9598 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
9599 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
9600 vcpu
->arch
.ioapic_handled_vectors
)) {
9601 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
9602 vcpu
->run
->eoi
.vector
=
9603 vcpu
->arch
.pending_ioapic_eoi
;
9608 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
9609 vcpu_scan_ioapic(vcpu
);
9610 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
9611 vcpu_load_eoi_exitmap(vcpu
);
9612 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
9613 kvm_vcpu_reload_apic_access_page(vcpu
);
9614 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
9615 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9616 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
9620 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
9621 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9622 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
9626 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
9627 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
9629 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
9630 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
9636 * KVM_REQ_HV_STIMER has to be processed after
9637 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9638 * depend on the guest clock being up-to-date
9640 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
9641 kvm_hv_process_stimers(vcpu
);
9642 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
9643 kvm_vcpu_update_apicv(vcpu
);
9644 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
9645 kvm_check_async_pf_completion(vcpu
);
9646 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
9647 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
9649 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
9650 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
9653 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
9654 kvm_xen_has_interrupt(vcpu
)) {
9655 ++vcpu
->stat
.req_event
;
9656 r
= kvm_apic_accept_events(vcpu
);
9661 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
9666 r
= inject_pending_event(vcpu
, &req_immediate_exit
);
9672 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9674 if (kvm_lapic_enabled(vcpu
)) {
9675 update_cr8_intercept(vcpu
);
9676 kvm_lapic_sync_to_vapic(vcpu
);
9680 r
= kvm_mmu_reload(vcpu
);
9682 goto cancel_injection
;
9687 static_call(kvm_x86_prepare_guest_switch
)(vcpu
);
9690 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9691 * IPI are then delayed after guest entry, which ensures that they
9692 * result in virtual interrupt delivery.
9694 local_irq_disable();
9695 vcpu
->mode
= IN_GUEST_MODE
;
9697 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9700 * 1) We should set ->mode before checking ->requests. Please see
9701 * the comment in kvm_vcpu_exiting_guest_mode().
9703 * 2) For APICv, we should set ->mode before checking PID.ON. This
9704 * pairs with the memory barrier implicit in pi_test_and_set_on
9705 * (see vmx_deliver_posted_interrupt).
9707 * 3) This also orders the write to mode from any reads to the page
9708 * tables done while the VCPU is running. Please see the comment
9709 * in kvm_flush_remote_tlbs.
9711 smp_mb__after_srcu_read_unlock();
9714 * This handles the case where a posted interrupt was
9715 * notified with kvm_vcpu_kick. Assigned devices can
9716 * use the POSTED_INTR_VECTOR even if APICv is disabled,
9717 * so do it even if APICv is disabled on this vCPU.
9719 if (kvm_lapic_enabled(vcpu
))
9720 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9722 if (kvm_vcpu_exit_request(vcpu
)) {
9723 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9727 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9729 goto cancel_injection
;
9732 if (req_immediate_exit
) {
9733 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9734 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
9737 fpregs_assert_state_consistent();
9738 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9739 switch_fpu_return();
9741 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
9743 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
9744 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
9745 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
9746 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
9747 } else if (unlikely(hw_breakpoint_active())) {
9752 exit_fastpath
= static_call(kvm_x86_run
)(vcpu
);
9753 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
9756 if (kvm_lapic_enabled(vcpu
))
9757 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9759 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
9760 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
9766 * Do this here before restoring debug registers on the host. And
9767 * since we do this before handling the vmexit, a DR access vmexit
9768 * can (a) read the correct value of the debug registers, (b) set
9769 * KVM_DEBUGREG_WONT_EXIT again.
9771 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
9772 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
9773 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
9774 kvm_update_dr0123(vcpu
);
9775 kvm_update_dr7(vcpu
);
9779 * If the guest has used debug registers, at least dr7
9780 * will be disabled while returning to the host.
9781 * If we don't have active breakpoints in the host, we don't
9782 * care about the messed up debug address registers. But if
9783 * we have some of them active, restore the old state.
9785 if (hw_breakpoint_active())
9786 hw_breakpoint_restore();
9788 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
9789 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
9791 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9794 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
9797 * Consume any pending interrupts, including the possible source of
9798 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9799 * An instruction is required after local_irq_enable() to fully unblock
9800 * interrupts on processors that implement an interrupt shadow, the
9801 * stat.exits increment will do nicely.
9803 kvm_before_interrupt(vcpu
);
9806 local_irq_disable();
9807 kvm_after_interrupt(vcpu
);
9810 * Wait until after servicing IRQs to account guest time so that any
9811 * ticks that occurred while running the guest are properly accounted
9812 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9813 * of accounting via context tracking, but the loss of accuracy is
9814 * acceptable for all known use cases.
9816 vtime_account_guest_exit();
9818 if (lapic_in_kernel(vcpu
)) {
9819 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
9820 if (delta
!= S64_MIN
) {
9821 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
9822 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
9829 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9832 * Profile KVM exit RIPs:
9834 if (unlikely(prof_on
== KVM_PROFILING
)) {
9835 unsigned long rip
= kvm_rip_read(vcpu
);
9836 profile_hit(KVM_PROFILING
, (void *)rip
);
9839 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
9840 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9842 if (vcpu
->arch
.apic_attention
)
9843 kvm_lapic_sync_from_vapic(vcpu
);
9845 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
9849 if (req_immediate_exit
)
9850 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9851 static_call(kvm_x86_cancel_injection
)(vcpu
);
9852 if (unlikely(vcpu
->arch
.apic_attention
))
9853 kvm_lapic_sync_from_vapic(vcpu
);
9858 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
9860 if (!kvm_arch_vcpu_runnable(vcpu
) &&
9861 (!kvm_x86_ops
.pre_block
|| static_call(kvm_x86_pre_block
)(vcpu
) == 0)) {
9862 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9863 kvm_vcpu_block(vcpu
);
9864 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9866 if (kvm_x86_ops
.post_block
)
9867 static_call(kvm_x86_post_block
)(vcpu
);
9869 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
9873 if (kvm_apic_accept_events(vcpu
) < 0)
9875 switch(vcpu
->arch
.mp_state
) {
9876 case KVM_MP_STATE_HALTED
:
9877 case KVM_MP_STATE_AP_RESET_HOLD
:
9878 vcpu
->arch
.pv
.pv_unhalted
= false;
9879 vcpu
->arch
.mp_state
=
9880 KVM_MP_STATE_RUNNABLE
;
9882 case KVM_MP_STATE_RUNNABLE
:
9883 vcpu
->arch
.apf
.halted
= false;
9885 case KVM_MP_STATE_INIT_RECEIVED
:
9893 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
9895 if (is_guest_mode(vcpu
))
9896 kvm_check_nested_events(vcpu
);
9898 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
9899 !vcpu
->arch
.apf
.halted
);
9902 static int vcpu_run(struct kvm_vcpu
*vcpu
)
9905 struct kvm
*kvm
= vcpu
->kvm
;
9907 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9908 vcpu
->arch
.l1tf_flush_l1d
= true;
9911 if (kvm_vcpu_running(vcpu
)) {
9912 r
= vcpu_enter_guest(vcpu
);
9914 r
= vcpu_block(kvm
, vcpu
);
9920 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
9921 if (kvm_cpu_has_pending_timer(vcpu
))
9922 kvm_inject_pending_timer_irqs(vcpu
);
9924 if (dm_request_for_irq_injection(vcpu
) &&
9925 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
9927 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
9928 ++vcpu
->stat
.request_irq_exits
;
9932 if (__xfer_to_guest_mode_work_pending()) {
9933 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9934 r
= xfer_to_guest_mode_handle_work(vcpu
);
9937 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9941 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9946 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
9950 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9951 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
9952 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9956 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
9958 BUG_ON(!vcpu
->arch
.pio
.count
);
9960 return complete_emulated_io(vcpu
);
9964 * Implements the following, as a state machine:
9968 * for each mmio piece in the fragment
9976 * for each mmio piece in the fragment
9981 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
9983 struct kvm_run
*run
= vcpu
->run
;
9984 struct kvm_mmio_fragment
*frag
;
9987 BUG_ON(!vcpu
->mmio_needed
);
9989 /* Complete previous fragment */
9990 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
9991 len
= min(8u, frag
->len
);
9992 if (!vcpu
->mmio_is_write
)
9993 memcpy(frag
->data
, run
->mmio
.data
, len
);
9995 if (frag
->len
<= 8) {
9996 /* Switch to the next fragment. */
9998 vcpu
->mmio_cur_fragment
++;
10000 /* Go forward to the next mmio piece. */
10006 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
10007 vcpu
->mmio_needed
= 0;
10009 /* FIXME: return into emulator if single-stepping. */
10010 if (vcpu
->mmio_is_write
)
10012 vcpu
->mmio_read_completed
= 1;
10013 return complete_emulated_io(vcpu
);
10016 run
->exit_reason
= KVM_EXIT_MMIO
;
10017 run
->mmio
.phys_addr
= frag
->gpa
;
10018 if (vcpu
->mmio_is_write
)
10019 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
10020 run
->mmio
.len
= min(8u, frag
->len
);
10021 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
10022 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
10026 static void kvm_save_current_fpu(struct fpu
*fpu
)
10029 * If the target FPU state is not resident in the CPU registers, just
10030 * memcpy() from current, else save CPU state directly to the target.
10032 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
10033 memcpy(&fpu
->state
, ¤t
->thread
.fpu
.state
,
10034 fpu_kernel_xstate_size
);
10036 save_fpregs_to_fpstate(fpu
);
10039 /* Swap (qemu) user FPU context for the guest FPU context. */
10040 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
10044 kvm_save_current_fpu(vcpu
->arch
.user_fpu
);
10047 * Guests with protected state can't have it set by the hypervisor,
10048 * so skip trying to set it.
10050 if (vcpu
->arch
.guest_fpu
)
10051 /* PKRU is separately restored in kvm_x86_ops.run. */
10052 __restore_fpregs_from_fpstate(&vcpu
->arch
.guest_fpu
->state
,
10053 ~XFEATURE_MASK_PKRU
);
10055 fpregs_mark_activate();
10061 /* When vcpu_run ends, restore user space FPU context. */
10062 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
10067 * Guests with protected state can't have it read by the hypervisor,
10068 * so skip trying to save it.
10070 if (vcpu
->arch
.guest_fpu
)
10071 kvm_save_current_fpu(vcpu
->arch
.guest_fpu
);
10073 restore_fpregs_from_fpstate(&vcpu
->arch
.user_fpu
->state
);
10075 fpregs_mark_activate();
10078 ++vcpu
->stat
.fpu_reload
;
10082 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
10084 struct kvm_run
*kvm_run
= vcpu
->run
;
10088 kvm_sigset_activate(vcpu
);
10089 kvm_run
->flags
= 0;
10090 kvm_load_guest_fpu(vcpu
);
10092 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
10093 if (kvm_run
->immediate_exit
) {
10097 kvm_vcpu_block(vcpu
);
10098 if (kvm_apic_accept_events(vcpu
) < 0) {
10102 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
10104 if (signal_pending(current
)) {
10106 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
10107 ++vcpu
->stat
.signal_exits
;
10112 if ((kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) ||
10113 (kvm_run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)) {
10118 if (kvm_run
->kvm_dirty_regs
) {
10119 r
= sync_regs(vcpu
);
10124 /* re-sync apic's tpr */
10125 if (!lapic_in_kernel(vcpu
)) {
10126 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
10132 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
10133 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
10134 vcpu
->arch
.complete_userspace_io
= NULL
;
10139 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
10141 if (kvm_run
->immediate_exit
)
10144 r
= vcpu_run(vcpu
);
10147 kvm_put_guest_fpu(vcpu
);
10148 if (kvm_run
->kvm_valid_regs
)
10150 post_kvm_run_save(vcpu
);
10151 kvm_sigset_deactivate(vcpu
);
10157 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10159 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
10161 * We are here if userspace calls get_regs() in the middle of
10162 * instruction emulation. Registers state needs to be copied
10163 * back from emulation context to vcpu. Userspace shouldn't do
10164 * that usually, but some bad designed PV devices (vmware
10165 * backdoor interface) need this to work
10167 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
10168 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10170 regs
->rax
= kvm_rax_read(vcpu
);
10171 regs
->rbx
= kvm_rbx_read(vcpu
);
10172 regs
->rcx
= kvm_rcx_read(vcpu
);
10173 regs
->rdx
= kvm_rdx_read(vcpu
);
10174 regs
->rsi
= kvm_rsi_read(vcpu
);
10175 regs
->rdi
= kvm_rdi_read(vcpu
);
10176 regs
->rsp
= kvm_rsp_read(vcpu
);
10177 regs
->rbp
= kvm_rbp_read(vcpu
);
10178 #ifdef CONFIG_X86_64
10179 regs
->r8
= kvm_r8_read(vcpu
);
10180 regs
->r9
= kvm_r9_read(vcpu
);
10181 regs
->r10
= kvm_r10_read(vcpu
);
10182 regs
->r11
= kvm_r11_read(vcpu
);
10183 regs
->r12
= kvm_r12_read(vcpu
);
10184 regs
->r13
= kvm_r13_read(vcpu
);
10185 regs
->r14
= kvm_r14_read(vcpu
);
10186 regs
->r15
= kvm_r15_read(vcpu
);
10189 regs
->rip
= kvm_rip_read(vcpu
);
10190 regs
->rflags
= kvm_get_rflags(vcpu
);
10193 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10196 __get_regs(vcpu
, regs
);
10201 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10203 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
10204 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10206 kvm_rax_write(vcpu
, regs
->rax
);
10207 kvm_rbx_write(vcpu
, regs
->rbx
);
10208 kvm_rcx_write(vcpu
, regs
->rcx
);
10209 kvm_rdx_write(vcpu
, regs
->rdx
);
10210 kvm_rsi_write(vcpu
, regs
->rsi
);
10211 kvm_rdi_write(vcpu
, regs
->rdi
);
10212 kvm_rsp_write(vcpu
, regs
->rsp
);
10213 kvm_rbp_write(vcpu
, regs
->rbp
);
10214 #ifdef CONFIG_X86_64
10215 kvm_r8_write(vcpu
, regs
->r8
);
10216 kvm_r9_write(vcpu
, regs
->r9
);
10217 kvm_r10_write(vcpu
, regs
->r10
);
10218 kvm_r11_write(vcpu
, regs
->r11
);
10219 kvm_r12_write(vcpu
, regs
->r12
);
10220 kvm_r13_write(vcpu
, regs
->r13
);
10221 kvm_r14_write(vcpu
, regs
->r14
);
10222 kvm_r15_write(vcpu
, regs
->r15
);
10225 kvm_rip_write(vcpu
, regs
->rip
);
10226 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
10228 vcpu
->arch
.exception
.pending
= false;
10230 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10233 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10236 __set_regs(vcpu
, regs
);
10241 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
10243 struct kvm_segment cs
;
10245 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10249 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
10251 static void __get_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10253 struct desc_ptr dt
;
10255 if (vcpu
->arch
.guest_state_protected
)
10256 goto skip_protected_regs
;
10258 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10259 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10260 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10261 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10262 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10263 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10265 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10266 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10268 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
10269 sregs
->idt
.limit
= dt
.size
;
10270 sregs
->idt
.base
= dt
.address
;
10271 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
10272 sregs
->gdt
.limit
= dt
.size
;
10273 sregs
->gdt
.base
= dt
.address
;
10275 sregs
->cr2
= vcpu
->arch
.cr2
;
10276 sregs
->cr3
= kvm_read_cr3(vcpu
);
10278 skip_protected_regs
:
10279 sregs
->cr0
= kvm_read_cr0(vcpu
);
10280 sregs
->cr4
= kvm_read_cr4(vcpu
);
10281 sregs
->cr8
= kvm_get_cr8(vcpu
);
10282 sregs
->efer
= vcpu
->arch
.efer
;
10283 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
10286 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10288 __get_sregs_common(vcpu
, sregs
);
10290 if (vcpu
->arch
.guest_state_protected
)
10293 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
10294 set_bit(vcpu
->arch
.interrupt
.nr
,
10295 (unsigned long *)sregs
->interrupt_bitmap
);
10298 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10302 __get_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
);
10304 if (vcpu
->arch
.guest_state_protected
)
10307 if (is_pae_paging(vcpu
)) {
10308 for (i
= 0 ; i
< 4 ; i
++)
10309 sregs2
->pdptrs
[i
] = kvm_pdptr_read(vcpu
, i
);
10310 sregs2
->flags
|= KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10314 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
10315 struct kvm_sregs
*sregs
)
10318 __get_sregs(vcpu
, sregs
);
10323 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
10324 struct kvm_mp_state
*mp_state
)
10329 if (kvm_mpx_supported())
10330 kvm_load_guest_fpu(vcpu
);
10332 r
= kvm_apic_accept_events(vcpu
);
10337 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
10338 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
10339 vcpu
->arch
.pv
.pv_unhalted
)
10340 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
10342 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
10345 if (kvm_mpx_supported())
10346 kvm_put_guest_fpu(vcpu
);
10351 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
10352 struct kvm_mp_state
*mp_state
)
10358 if (!lapic_in_kernel(vcpu
) &&
10359 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
10363 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10364 * INIT state; latched init should be reported using
10365 * KVM_SET_VCPU_EVENTS, so reject it here.
10367 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
10368 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
10369 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
10372 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
10373 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
10374 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
10376 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
10377 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10385 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
10386 int reason
, bool has_error_code
, u32 error_code
)
10388 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
10391 init_emulate_ctxt(vcpu
);
10393 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
10394 has_error_code
, error_code
);
10396 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
10397 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
10398 vcpu
->run
->internal
.ndata
= 0;
10402 kvm_rip_write(vcpu
, ctxt
->eip
);
10403 kvm_set_rflags(vcpu
, ctxt
->eflags
);
10406 EXPORT_SYMBOL_GPL(kvm_task_switch
);
10408 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10410 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
10412 * When EFER.LME and CR0.PG are set, the processor is in
10413 * 64-bit mode (though maybe in a 32-bit code segment).
10414 * CR4.PAE and EFER.LMA must be set.
10416 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
10418 if (kvm_vcpu_is_illegal_gpa(vcpu
, sregs
->cr3
))
10422 * Not in 64-bit mode: EFER.LMA is clear and the code
10423 * segment cannot be 64-bit.
10425 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
10429 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
10432 static int __set_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
,
10433 int *mmu_reset_needed
, bool update_pdptrs
)
10435 struct msr_data apic_base_msr
;
10437 struct desc_ptr dt
;
10439 if (!kvm_is_valid_sregs(vcpu
, sregs
))
10442 apic_base_msr
.data
= sregs
->apic_base
;
10443 apic_base_msr
.host_initiated
= true;
10444 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
10447 if (vcpu
->arch
.guest_state_protected
)
10450 dt
.size
= sregs
->idt
.limit
;
10451 dt
.address
= sregs
->idt
.base
;
10452 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
10453 dt
.size
= sregs
->gdt
.limit
;
10454 dt
.address
= sregs
->gdt
.base
;
10455 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
10457 vcpu
->arch
.cr2
= sregs
->cr2
;
10458 *mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
10459 vcpu
->arch
.cr3
= sregs
->cr3
;
10460 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
10462 kvm_set_cr8(vcpu
, sregs
->cr8
);
10464 *mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
10465 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
10467 *mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
10468 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
10469 vcpu
->arch
.cr0
= sregs
->cr0
;
10471 *mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
10472 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
10474 if (update_pdptrs
) {
10475 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10476 if (is_pae_paging(vcpu
)) {
10477 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
10478 *mmu_reset_needed
= 1;
10480 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10483 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10484 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10485 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10486 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10487 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10488 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10490 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10491 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10493 update_cr8_intercept(vcpu
);
10495 /* Older userspace won't unhalt the vcpu on reset. */
10496 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
10497 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
10498 !is_protmode(vcpu
))
10499 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10504 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10506 int pending_vec
, max_bits
;
10507 int mmu_reset_needed
= 0;
10508 int ret
= __set_sregs_common(vcpu
, sregs
, &mmu_reset_needed
, true);
10513 if (mmu_reset_needed
)
10514 kvm_mmu_reset_context(vcpu
);
10516 max_bits
= KVM_NR_INTERRUPTS
;
10517 pending_vec
= find_first_bit(
10518 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
10520 if (pending_vec
< max_bits
) {
10521 kvm_queue_interrupt(vcpu
, pending_vec
, false);
10522 pr_debug("Set back pending irq %d\n", pending_vec
);
10523 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10528 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10530 int mmu_reset_needed
= 0;
10531 bool valid_pdptrs
= sregs2
->flags
& KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10532 bool pae
= (sregs2
->cr0
& X86_CR0_PG
) && (sregs2
->cr4
& X86_CR4_PAE
) &&
10533 !(sregs2
->efer
& EFER_LMA
);
10536 if (sregs2
->flags
& ~KVM_SREGS2_FLAGS_PDPTRS_VALID
)
10539 if (valid_pdptrs
&& (!pae
|| vcpu
->arch
.guest_state_protected
))
10542 ret
= __set_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
,
10543 &mmu_reset_needed
, !valid_pdptrs
);
10547 if (valid_pdptrs
) {
10548 for (i
= 0; i
< 4 ; i
++)
10549 kvm_pdptr_write(vcpu
, i
, sregs2
->pdptrs
[i
]);
10551 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
10552 mmu_reset_needed
= 1;
10553 vcpu
->arch
.pdptrs_from_userspace
= true;
10555 if (mmu_reset_needed
)
10556 kvm_mmu_reset_context(vcpu
);
10560 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
10561 struct kvm_sregs
*sregs
)
10566 ret
= __set_sregs(vcpu
, sregs
);
10571 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
10572 struct kvm_guest_debug
*dbg
)
10574 unsigned long rflags
;
10577 if (vcpu
->arch
.guest_state_protected
)
10582 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
10584 if (vcpu
->arch
.exception
.pending
)
10586 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
10587 kvm_queue_exception(vcpu
, DB_VECTOR
);
10589 kvm_queue_exception(vcpu
, BP_VECTOR
);
10593 * Read rflags as long as potentially injected trace flags are still
10596 rflags
= kvm_get_rflags(vcpu
);
10598 vcpu
->guest_debug
= dbg
->control
;
10599 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
10600 vcpu
->guest_debug
= 0;
10602 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
10603 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
10604 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
10605 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
10607 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
10608 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
10610 kvm_update_dr7(vcpu
);
10612 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10613 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
10616 * Trigger an rflags update that will inject or remove the trace
10619 kvm_set_rflags(vcpu
, rflags
);
10621 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
10631 * Translate a guest virtual address to a guest physical address.
10633 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
10634 struct kvm_translation
*tr
)
10636 unsigned long vaddr
= tr
->linear_address
;
10642 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10643 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
10644 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10645 tr
->physical_address
= gpa
;
10646 tr
->valid
= gpa
!= UNMAPPED_GVA
;
10654 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10656 struct fxregs_state
*fxsave
;
10658 if (!vcpu
->arch
.guest_fpu
)
10663 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10664 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
10665 fpu
->fcw
= fxsave
->cwd
;
10666 fpu
->fsw
= fxsave
->swd
;
10667 fpu
->ftwx
= fxsave
->twd
;
10668 fpu
->last_opcode
= fxsave
->fop
;
10669 fpu
->last_ip
= fxsave
->rip
;
10670 fpu
->last_dp
= fxsave
->rdp
;
10671 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
10677 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10679 struct fxregs_state
*fxsave
;
10681 if (!vcpu
->arch
.guest_fpu
)
10686 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10688 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
10689 fxsave
->cwd
= fpu
->fcw
;
10690 fxsave
->swd
= fpu
->fsw
;
10691 fxsave
->twd
= fpu
->ftwx
;
10692 fxsave
->fop
= fpu
->last_opcode
;
10693 fxsave
->rip
= fpu
->last_ip
;
10694 fxsave
->rdp
= fpu
->last_dp
;
10695 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
10701 static void store_regs(struct kvm_vcpu
*vcpu
)
10703 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
10705 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
10706 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10708 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
10709 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
10711 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
10712 kvm_vcpu_ioctl_x86_get_vcpu_events(
10713 vcpu
, &vcpu
->run
->s
.regs
.events
);
10716 static int sync_regs(struct kvm_vcpu
*vcpu
)
10718 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
10719 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10720 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
10722 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
10723 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
10725 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
10727 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
10728 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10729 vcpu
, &vcpu
->run
->s
.regs
.events
))
10731 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
10737 static void fx_init(struct kvm_vcpu
*vcpu
)
10739 if (!vcpu
->arch
.guest_fpu
)
10742 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
10743 if (boot_cpu_has(X86_FEATURE_XSAVES
))
10744 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
10745 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
10748 * Ensure guest xcr0 is valid for loading
10750 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10752 vcpu
->arch
.cr0
|= X86_CR0_ET
;
10755 void kvm_free_guest_fpu(struct kvm_vcpu
*vcpu
)
10757 if (vcpu
->arch
.guest_fpu
) {
10758 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
10759 vcpu
->arch
.guest_fpu
= NULL
;
10762 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu
);
10764 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
10766 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
10767 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10768 "guest TSC will not be reliable\n");
10773 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
10778 vcpu
->arch
.last_vmentry_cpu
= -1;
10779 vcpu
->arch
.regs_avail
= ~0;
10780 vcpu
->arch
.regs_dirty
= ~0;
10782 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
10783 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10785 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
10787 r
= kvm_mmu_create(vcpu
);
10791 if (irqchip_in_kernel(vcpu
->kvm
)) {
10792 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
10794 goto fail_mmu_destroy
;
10795 if (kvm_apicv_activated(vcpu
->kvm
))
10796 vcpu
->arch
.apicv_active
= true;
10798 static_branch_inc(&kvm_has_noapic_vcpu
);
10802 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
10804 goto fail_free_lapic
;
10805 vcpu
->arch
.pio_data
= page_address(page
);
10807 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
10808 GFP_KERNEL_ACCOUNT
);
10809 if (!vcpu
->arch
.mce_banks
)
10810 goto fail_free_pio_data
;
10811 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
10813 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
10814 GFP_KERNEL_ACCOUNT
))
10815 goto fail_free_mce_banks
;
10817 if (!alloc_emulate_ctxt(vcpu
))
10818 goto free_wbinvd_dirty_mask
;
10820 vcpu
->arch
.user_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10821 GFP_KERNEL_ACCOUNT
);
10822 if (!vcpu
->arch
.user_fpu
) {
10823 pr_err("kvm: failed to allocate userspace's fpu\n");
10824 goto free_emulate_ctxt
;
10827 vcpu
->arch
.guest_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10828 GFP_KERNEL_ACCOUNT
);
10829 if (!vcpu
->arch
.guest_fpu
) {
10830 pr_err("kvm: failed to allocate vcpu's fpu\n");
10831 goto free_user_fpu
;
10835 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
10836 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
10838 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
10840 kvm_async_pf_hash_reset(vcpu
);
10841 kvm_pmu_init(vcpu
);
10843 vcpu
->arch
.pending_external_vector
= -1;
10844 vcpu
->arch
.preempted_in_kernel
= false;
10846 #if IS_ENABLED(CONFIG_HYPERV)
10847 vcpu
->arch
.hv_root_tdp
= INVALID_PAGE
;
10850 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
10852 goto free_guest_fpu
;
10854 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
10855 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
10856 kvm_vcpu_mtrr_init(vcpu
);
10858 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
10859 kvm_vcpu_reset(vcpu
, false);
10860 kvm_init_mmu(vcpu
);
10865 kvm_free_guest_fpu(vcpu
);
10867 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10869 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10870 free_wbinvd_dirty_mask
:
10871 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10872 fail_free_mce_banks
:
10873 kfree(vcpu
->arch
.mce_banks
);
10874 fail_free_pio_data
:
10875 free_page((unsigned long)vcpu
->arch
.pio_data
);
10877 kvm_free_lapic(vcpu
);
10879 kvm_mmu_destroy(vcpu
);
10883 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
10885 struct kvm
*kvm
= vcpu
->kvm
;
10887 if (mutex_lock_killable(&vcpu
->mutex
))
10890 kvm_synchronize_tsc(vcpu
, 0);
10893 /* poll control enabled by default */
10894 vcpu
->arch
.msr_kvm_poll_control
= 1;
10896 mutex_unlock(&vcpu
->mutex
);
10898 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
10899 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
10900 KVMCLOCK_SYNC_PERIOD
);
10903 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
10907 kvmclock_reset(vcpu
);
10909 static_call(kvm_x86_vcpu_free
)(vcpu
);
10911 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10912 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10913 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10914 kvm_free_guest_fpu(vcpu
);
10916 kvm_hv_vcpu_uninit(vcpu
);
10917 kvm_pmu_destroy(vcpu
);
10918 kfree(vcpu
->arch
.mce_banks
);
10919 kvm_free_lapic(vcpu
);
10920 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10921 kvm_mmu_destroy(vcpu
);
10922 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10923 free_page((unsigned long)vcpu
->arch
.pio_data
);
10924 kvfree(vcpu
->arch
.cpuid_entries
);
10925 if (!lapic_in_kernel(vcpu
))
10926 static_branch_dec(&kvm_has_noapic_vcpu
);
10929 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
10931 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
10932 unsigned long new_cr0
;
10935 kvm_lapic_reset(vcpu
, init_event
);
10937 vcpu
->arch
.hflags
= 0;
10939 vcpu
->arch
.smi_pending
= 0;
10940 vcpu
->arch
.smi_count
= 0;
10941 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
10942 vcpu
->arch
.nmi_pending
= 0;
10943 vcpu
->arch
.nmi_injected
= false;
10944 kvm_clear_interrupt_queue(vcpu
);
10945 kvm_clear_exception_queue(vcpu
);
10947 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
10948 kvm_update_dr0123(vcpu
);
10949 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
10950 vcpu
->arch
.dr7
= DR7_FIXED_1
;
10951 kvm_update_dr7(vcpu
);
10953 vcpu
->arch
.cr2
= 0;
10955 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10956 vcpu
->arch
.apf
.msr_en_val
= 0;
10957 vcpu
->arch
.apf
.msr_int_val
= 0;
10958 vcpu
->arch
.st
.msr_val
= 0;
10960 kvmclock_reset(vcpu
);
10962 kvm_clear_async_pf_completion_queue(vcpu
);
10963 kvm_async_pf_hash_reset(vcpu
);
10964 vcpu
->arch
.apf
.halted
= false;
10966 if (vcpu
->arch
.guest_fpu
&& kvm_mpx_supported()) {
10967 void *mpx_state_buffer
;
10970 * To avoid have the INIT path from kvm_apic_has_events() that be
10971 * called with loaded FPU and does not let userspace fix the state.
10974 kvm_put_guest_fpu(vcpu
);
10975 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10977 if (mpx_state_buffer
)
10978 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
10979 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10981 if (mpx_state_buffer
)
10982 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
10984 kvm_load_guest_fpu(vcpu
);
10988 kvm_pmu_reset(vcpu
);
10989 vcpu
->arch
.smbase
= 0x30000;
10991 vcpu
->arch
.msr_misc_features_enables
= 0;
10993 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10994 vcpu
->arch
.ia32_xss
= 0;
10997 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
10998 vcpu
->arch
.regs_avail
= ~0;
10999 vcpu
->arch
.regs_dirty
= ~0;
11002 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11003 * if no CPUID match is found. Note, it's impossible to get a match at
11004 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11005 * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
11006 * But, go through the motions in case that's ever remedied.
11009 if (!kvm_cpuid(vcpu
, &eax
, &dummy
, &dummy
, &dummy
, true))
11011 kvm_rdx_write(vcpu
, eax
);
11013 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
11015 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
11016 kvm_rip_write(vcpu
, 0xfff0);
11018 vcpu
->arch
.cr3
= 0;
11019 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
11022 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11023 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11024 * (or qualify) that with a footnote stating that CD/NW are preserved.
11026 new_cr0
= X86_CR0_ET
;
11028 new_cr0
|= (old_cr0
& (X86_CR0_NW
| X86_CR0_CD
));
11030 new_cr0
|= X86_CR0_NW
| X86_CR0_CD
;
11032 static_call(kvm_x86_set_cr0
)(vcpu
, new_cr0
);
11033 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
11034 static_call(kvm_x86_set_efer
)(vcpu
, 0);
11035 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
11038 * Reset the MMU context if paging was enabled prior to INIT (which is
11039 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
11040 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11041 * checked because it is unconditionally cleared on INIT and all other
11042 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11043 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11045 if (old_cr0
& X86_CR0_PG
)
11046 kvm_mmu_reset_context(vcpu
);
11049 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11050 * APM states the TLBs are untouched by INIT, but it also states that
11051 * the TLBs are flushed on "External initialization of the processor."
11052 * Flush the guest TLB regardless of vendor, there is no meaningful
11053 * benefit in relying on the guest to flush the TLB immediately after
11054 * INIT. A spurious TLB flush is benign and likely negligible from a
11055 * performance perspective.
11058 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11060 EXPORT_SYMBOL_GPL(kvm_vcpu_reset
);
11062 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
11064 struct kvm_segment cs
;
11066 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11067 cs
.selector
= vector
<< 8;
11068 cs
.base
= vector
<< 12;
11069 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11070 kvm_rip_write(vcpu
, 0);
11072 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
11074 int kvm_arch_hardware_enable(void)
11077 struct kvm_vcpu
*vcpu
;
11082 bool stable
, backwards_tsc
= false;
11084 kvm_user_return_msr_cpu_online();
11085 ret
= static_call(kvm_x86_hardware_enable
)();
11089 local_tsc
= rdtsc();
11090 stable
= !kvm_check_tsc_unstable();
11091 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11092 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11093 if (!stable
&& vcpu
->cpu
== smp_processor_id())
11094 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
11095 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
11096 backwards_tsc
= true;
11097 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
11098 max_tsc
= vcpu
->arch
.last_host_tsc
;
11104 * Sometimes, even reliable TSCs go backwards. This happens on
11105 * platforms that reset TSC during suspend or hibernate actions, but
11106 * maintain synchronization. We must compensate. Fortunately, we can
11107 * detect that condition here, which happens early in CPU bringup,
11108 * before any KVM threads can be running. Unfortunately, we can't
11109 * bring the TSCs fully up to date with real time, as we aren't yet far
11110 * enough into CPU bringup that we know how much real time has actually
11111 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11112 * variables that haven't been updated yet.
11114 * So we simply find the maximum observed TSC above, then record the
11115 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11116 * the adjustment will be applied. Note that we accumulate
11117 * adjustments, in case multiple suspend cycles happen before some VCPU
11118 * gets a chance to run again. In the event that no KVM threads get a
11119 * chance to run, we will miss the entire elapsed period, as we'll have
11120 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11121 * loose cycle time. This isn't too big a deal, since the loss will be
11122 * uniform across all VCPUs (not to mention the scenario is extremely
11123 * unlikely). It is possible that a second hibernate recovery happens
11124 * much faster than a first, causing the observed TSC here to be
11125 * smaller; this would require additional padding adjustment, which is
11126 * why we set last_host_tsc to the local tsc observed here.
11128 * N.B. - this code below runs only on platforms with reliable TSC,
11129 * as that is the only way backwards_tsc is set above. Also note
11130 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11131 * have the same delta_cyc adjustment applied if backwards_tsc
11132 * is detected. Note further, this adjustment is only done once,
11133 * as we reset last_host_tsc on all VCPUs to stop this from being
11134 * called multiple times (one for each physical CPU bringup).
11136 * Platforms with unreliable TSCs don't have to deal with this, they
11137 * will be compensated by the logic in vcpu_load, which sets the TSC to
11138 * catchup mode. This will catchup all VCPUs to real time, but cannot
11139 * guarantee that they stay in perfect synchronization.
11141 if (backwards_tsc
) {
11142 u64 delta_cyc
= max_tsc
- local_tsc
;
11143 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11144 kvm
->arch
.backwards_tsc_observed
= true;
11145 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11146 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
11147 vcpu
->arch
.last_host_tsc
= local_tsc
;
11148 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
11152 * We have to disable TSC offset matching.. if you were
11153 * booting a VM while issuing an S4 host suspend....
11154 * you may have some problem. Solving this issue is
11155 * left as an exercise to the reader.
11157 kvm
->arch
.last_tsc_nsec
= 0;
11158 kvm
->arch
.last_tsc_write
= 0;
11165 void kvm_arch_hardware_disable(void)
11167 static_call(kvm_x86_hardware_disable
)();
11168 drop_user_return_notifiers();
11171 int kvm_arch_hardware_setup(void *opaque
)
11173 struct kvm_x86_init_ops
*ops
= opaque
;
11176 rdmsrl_safe(MSR_EFER
, &host_efer
);
11178 if (boot_cpu_has(X86_FEATURE_XSAVES
))
11179 rdmsrl(MSR_IA32_XSS
, host_xss
);
11181 r
= ops
->hardware_setup();
11185 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
11186 kvm_ops_static_call_update();
11188 if (ops
->intel_pt_intr_in_guest
&& ops
->intel_pt_intr_in_guest())
11189 kvm_guest_cbs
.handle_intel_pt_intr
= kvm_handle_intel_pt_intr
;
11190 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
11192 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
11195 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11196 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
11197 #undef __kvm_cpu_cap_has
11199 if (kvm_has_tsc_control
) {
11201 * Make sure the user can only configure tsc_khz values that
11202 * fit into a signed integer.
11203 * A min value is not calculated because it will always
11204 * be 1 on all machines.
11206 u64 max
= min(0x7fffffffULL
,
11207 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
11208 kvm_max_guest_tsc_khz
= max
;
11210 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
11213 kvm_init_msr_list();
11217 void kvm_arch_hardware_unsetup(void)
11219 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
11220 kvm_guest_cbs
.handle_intel_pt_intr
= NULL
;
11222 static_call(kvm_x86_hardware_unsetup
)();
11225 int kvm_arch_check_processor_compat(void *opaque
)
11227 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
11228 struct kvm_x86_init_ops
*ops
= opaque
;
11230 WARN_ON(!irqs_disabled());
11232 if (__cr4_reserved_bits(cpu_has
, c
) !=
11233 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
11236 return ops
->check_processor_compatibility();
11239 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
11241 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
11243 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
11245 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
11247 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
11250 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
11251 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
11253 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
11255 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
11257 vcpu
->arch
.l1tf_flush_l1d
= true;
11258 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
11259 pmu
->need_cleanup
= true;
11260 kvm_make_request(KVM_REQ_PMU
, vcpu
);
11262 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
11265 void kvm_arch_free_vm(struct kvm
*kvm
)
11267 kfree(to_kvm_hv(kvm
)->hv_pa_pg
);
11272 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
11279 ret
= kvm_page_track_init(kvm
);
11283 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
11284 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
11285 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
11286 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
11287 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
11288 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
11290 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11291 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
11292 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11293 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
11294 &kvm
->arch
.irq_sources_bitmap
);
11296 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
11297 mutex_init(&kvm
->arch
.apic_map_lock
);
11298 raw_spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
11300 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
11301 pvclock_update_vm_gtod_copy(kvm
);
11303 kvm
->arch
.guest_can_read_msr_platform_info
= true;
11305 #if IS_ENABLED(CONFIG_HYPERV)
11306 spin_lock_init(&kvm
->arch
.hv_root_tdp_lock
);
11307 kvm
->arch
.hv_root_tdp
= INVALID_PAGE
;
11310 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
11311 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
11313 kvm_apicv_init(kvm
);
11314 kvm_hv_init_vm(kvm
);
11315 kvm_mmu_init_vm(kvm
);
11316 kvm_xen_init_vm(kvm
);
11318 return static_call(kvm_x86_vm_init
)(kvm
);
11321 int kvm_arch_post_init_vm(struct kvm
*kvm
)
11323 return kvm_mmu_post_init_vm(kvm
);
11326 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
11329 kvm_mmu_unload(vcpu
);
11333 static void kvm_free_vcpus(struct kvm
*kvm
)
11336 struct kvm_vcpu
*vcpu
;
11339 * Unpin any mmu pages first.
11341 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11342 kvm_clear_async_pf_completion_queue(vcpu
);
11343 kvm_unload_vcpu_mmu(vcpu
);
11345 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11346 kvm_vcpu_destroy(vcpu
);
11348 mutex_lock(&kvm
->lock
);
11349 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
11350 kvm
->vcpus
[i
] = NULL
;
11352 atomic_set(&kvm
->online_vcpus
, 0);
11353 mutex_unlock(&kvm
->lock
);
11356 void kvm_arch_sync_events(struct kvm
*kvm
)
11358 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
11359 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
11363 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
11366 * __x86_set_memory_region: Setup KVM internal memory slot
11368 * @kvm: the kvm pointer to the VM.
11369 * @id: the slot ID to setup.
11370 * @gpa: the GPA to install the slot (unused when @size == 0).
11371 * @size: the size of the slot. Set to zero to uninstall a slot.
11373 * This function helps to setup a KVM internal memory slot. Specify
11374 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11375 * slot. The return code can be one of the following:
11377 * HVA: on success (uninstall will return a bogus HVA)
11380 * The caller should always use IS_ERR() to check the return value
11381 * before use. Note, the KVM internal memory slots are guaranteed to
11382 * remain valid and unchanged until the VM is destroyed, i.e., the
11383 * GPA->HVA translation will not change. However, the HVA is a user
11384 * address, i.e. its accessibility is not guaranteed, and must be
11385 * accessed via __copy_{to,from}_user().
11387 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
11391 unsigned long hva
, old_npages
;
11392 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
11393 struct kvm_memory_slot
*slot
;
11395 /* Called with kvm->slots_lock held. */
11396 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
11397 return ERR_PTR_USR(-EINVAL
);
11399 slot
= id_to_memslot(slots
, id
);
11401 if (slot
&& slot
->npages
)
11402 return ERR_PTR_USR(-EEXIST
);
11405 * MAP_SHARED to prevent internal slot pages from being moved
11408 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
11409 MAP_SHARED
| MAP_ANONYMOUS
, 0);
11410 if (IS_ERR((void *)hva
))
11411 return (void __user
*)hva
;
11413 if (!slot
|| !slot
->npages
)
11416 old_npages
= slot
->npages
;
11417 hva
= slot
->userspace_addr
;
11420 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11421 struct kvm_userspace_memory_region m
;
11423 m
.slot
= id
| (i
<< 16);
11425 m
.guest_phys_addr
= gpa
;
11426 m
.userspace_addr
= hva
;
11427 m
.memory_size
= size
;
11428 r
= __kvm_set_memory_region(kvm
, &m
);
11430 return ERR_PTR_USR(r
);
11434 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
11436 return (void __user
*)hva
;
11438 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
11440 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
11442 kvm_mmu_pre_destroy_vm(kvm
);
11445 void kvm_arch_destroy_vm(struct kvm
*kvm
)
11447 if (current
->mm
== kvm
->mm
) {
11449 * Free memory regions allocated on behalf of userspace,
11450 * unless the the memory map has changed due to process exit
11453 mutex_lock(&kvm
->slots_lock
);
11454 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
11456 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
11458 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
11459 mutex_unlock(&kvm
->slots_lock
);
11461 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
11462 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
11463 kvm_pic_destroy(kvm
);
11464 kvm_ioapic_destroy(kvm
);
11465 kvm_free_vcpus(kvm
);
11466 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
11467 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
11468 kvm_mmu_uninit_vm(kvm
);
11469 kvm_page_track_cleanup(kvm
);
11470 kvm_xen_destroy_vm(kvm
);
11471 kvm_hv_destroy_vm(kvm
);
11474 static void memslot_rmap_free(struct kvm_memory_slot
*slot
)
11478 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11479 kvfree(slot
->arch
.rmap
[i
]);
11480 slot
->arch
.rmap
[i
] = NULL
;
11484 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
11488 memslot_rmap_free(slot
);
11490 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11491 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11492 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11495 kvm_page_track_free_memslot(slot
);
11498 static int memslot_rmap_alloc(struct kvm_memory_slot
*slot
,
11499 unsigned long npages
)
11501 const int sz
= sizeof(*slot
->arch
.rmap
[0]);
11504 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11506 int lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11508 if (slot
->arch
.rmap
[i
])
11511 slot
->arch
.rmap
[i
] = kvcalloc(lpages
, sz
, GFP_KERNEL_ACCOUNT
);
11512 if (!slot
->arch
.rmap
[i
]) {
11513 memslot_rmap_free(slot
);
11521 int alloc_all_memslots_rmaps(struct kvm
*kvm
)
11523 struct kvm_memslots
*slots
;
11524 struct kvm_memory_slot
*slot
;
11528 * Check if memslots alreday have rmaps early before acquiring
11529 * the slots_arch_lock below.
11531 if (kvm_memslots_have_rmaps(kvm
))
11534 mutex_lock(&kvm
->slots_arch_lock
);
11537 * Read memslots_have_rmaps again, under the slots arch lock,
11538 * before allocating the rmaps
11540 if (kvm_memslots_have_rmaps(kvm
)) {
11541 mutex_unlock(&kvm
->slots_arch_lock
);
11545 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11546 slots
= __kvm_memslots(kvm
, i
);
11547 kvm_for_each_memslot(slot
, slots
) {
11548 r
= memslot_rmap_alloc(slot
, slot
->npages
);
11550 mutex_unlock(&kvm
->slots_arch_lock
);
11557 * Ensure that memslots_have_rmaps becomes true strictly after
11558 * all the rmap pointers are set.
11560 smp_store_release(&kvm
->arch
.memslots_have_rmaps
, true);
11561 mutex_unlock(&kvm
->slots_arch_lock
);
11565 static int kvm_alloc_memslot_metadata(struct kvm
*kvm
,
11566 struct kvm_memory_slot
*slot
,
11567 unsigned long npages
)
11572 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11573 * old arrays will be freed by __kvm_set_memory_region() if installing
11574 * the new memslot is successful.
11576 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
11578 if (kvm_memslots_have_rmaps(kvm
)) {
11579 r
= memslot_rmap_alloc(slot
, npages
);
11584 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11585 struct kvm_lpage_info
*linfo
;
11586 unsigned long ugfn
;
11590 lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
11592 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
11596 slot
->arch
.lpage_info
[i
- 1] = linfo
;
11598 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
11599 linfo
[0].disallow_lpage
= 1;
11600 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
11601 linfo
[lpages
- 1].disallow_lpage
= 1;
11602 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
11604 * If the gfn and userspace address are not aligned wrt each
11605 * other, disable large page support for this slot.
11607 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
11610 for (j
= 0; j
< lpages
; ++j
)
11611 linfo
[j
].disallow_lpage
= 1;
11615 if (kvm_page_track_create_memslot(slot
, npages
))
11621 memslot_rmap_free(slot
);
11623 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11624 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11625 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11630 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
11632 struct kvm_vcpu
*vcpu
;
11636 * memslots->generation has been incremented.
11637 * mmio generation may have reached its maximum value.
11639 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
11641 /* Force re-initialization of steal_time cache */
11642 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11643 kvm_vcpu_kick(vcpu
);
11646 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
11647 struct kvm_memory_slot
*memslot
,
11648 const struct kvm_userspace_memory_region
*mem
,
11649 enum kvm_mr_change change
)
11651 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
11652 return kvm_alloc_memslot_metadata(kvm
, memslot
,
11653 mem
->memory_size
>> PAGE_SHIFT
);
11658 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
11660 struct kvm_arch
*ka
= &kvm
->arch
;
11662 if (!kvm_x86_ops
.cpu_dirty_log_size
)
11665 if ((enable
&& ++ka
->cpu_dirty_logging_count
== 1) ||
11666 (!enable
&& --ka
->cpu_dirty_logging_count
== 0))
11667 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
11669 WARN_ON_ONCE(ka
->cpu_dirty_logging_count
< 0);
11672 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
11673 struct kvm_memory_slot
*old
,
11674 const struct kvm_memory_slot
*new,
11675 enum kvm_mr_change change
)
11677 bool log_dirty_pages
= new->flags
& KVM_MEM_LOG_DIRTY_PAGES
;
11680 * Update CPU dirty logging if dirty logging is being toggled. This
11681 * applies to all operations.
11683 if ((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
11684 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
11687 * Nothing more to do for RO slots (which can't be dirtied and can't be
11688 * made writable) or CREATE/MOVE/DELETE of a slot.
11690 * For a memslot with dirty logging disabled:
11691 * CREATE: No dirty mappings will already exist.
11692 * MOVE/DELETE: The old mappings will already have been cleaned up by
11693 * kvm_arch_flush_shadow_memslot()
11695 * For a memslot with dirty logging enabled:
11696 * CREATE: No shadow pages exist, thus nothing to write-protect
11697 * and no dirty bits to clear.
11698 * MOVE/DELETE: The old mappings will already have been cleaned up by
11699 * kvm_arch_flush_shadow_memslot().
11701 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new->flags
& KVM_MEM_READONLY
))
11705 * READONLY and non-flags changes were filtered out above, and the only
11706 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11707 * logging isn't being toggled on or off.
11709 if (WARN_ON_ONCE(!((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
11712 if (!log_dirty_pages
) {
11714 * Dirty logging tracks sptes in 4k granularity, meaning that
11715 * large sptes have to be split. If live migration succeeds,
11716 * the guest in the source machine will be destroyed and large
11717 * sptes will be created in the destination. However, if the
11718 * guest continues to run in the source machine (for example if
11719 * live migration fails), small sptes will remain around and
11720 * cause bad performance.
11722 * Scan sptes if dirty logging has been stopped, dropping those
11723 * which can be collapsed into a single large-page spte. Later
11724 * page faults will create the large-page sptes.
11726 kvm_mmu_zap_collapsible_sptes(kvm
, new);
11729 * Initially-all-set does not require write protecting any page,
11730 * because they're all assumed to be dirty.
11732 if (kvm_dirty_log_manual_protect_and_init_set(kvm
))
11735 if (kvm_x86_ops
.cpu_dirty_log_size
) {
11736 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
11737 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_2M
);
11739 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_4K
);
11744 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
11745 const struct kvm_userspace_memory_region
*mem
,
11746 struct kvm_memory_slot
*old
,
11747 const struct kvm_memory_slot
*new,
11748 enum kvm_mr_change change
)
11750 if (!kvm
->arch
.n_requested_mmu_pages
)
11751 kvm_mmu_change_mmu_pages(kvm
,
11752 kvm_mmu_calculate_default_mmu_pages(kvm
));
11754 kvm_mmu_slot_apply_flags(kvm
, old
, new, change
);
11756 /* Free the arrays associated with the old memslot. */
11757 if (change
== KVM_MR_MOVE
)
11758 kvm_arch_free_memslot(kvm
, old
);
11761 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
11763 kvm_mmu_zap_all(kvm
);
11766 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
11767 struct kvm_memory_slot
*slot
)
11769 kvm_page_track_flush_slot(kvm
, slot
);
11772 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
11774 return (is_guest_mode(vcpu
) &&
11775 kvm_x86_ops
.guest_apic_has_interrupt
&&
11776 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
11779 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
11781 if (!list_empty_careful(&vcpu
->async_pf
.done
))
11784 if (kvm_apic_has_events(vcpu
))
11787 if (vcpu
->arch
.pv
.pv_unhalted
)
11790 if (vcpu
->arch
.exception
.pending
)
11793 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11794 (vcpu
->arch
.nmi_pending
&&
11795 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
11798 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11799 (vcpu
->arch
.smi_pending
&&
11800 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
11803 if (kvm_arch_interrupt_allowed(vcpu
) &&
11804 (kvm_cpu_has_interrupt(vcpu
) ||
11805 kvm_guest_apic_has_interrupt(vcpu
)))
11808 if (kvm_hv_has_stimer_pending(vcpu
))
11811 if (is_guest_mode(vcpu
) &&
11812 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
11813 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
11819 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
11821 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
11824 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
11826 if (vcpu
->arch
.apicv_active
&& static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
11832 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
11834 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
11837 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11838 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11839 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
11842 return kvm_arch_dy_has_pending_interrupt(vcpu
);
11845 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
11847 if (vcpu
->arch
.guest_state_protected
)
11850 return vcpu
->arch
.preempted_in_kernel
;
11853 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
11855 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
11858 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
11860 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
11863 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
11865 /* Can't read the RIP when guest state is protected, just return 0 */
11866 if (vcpu
->arch
.guest_state_protected
)
11869 if (is_64_bit_mode(vcpu
))
11870 return kvm_rip_read(vcpu
);
11871 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
11872 kvm_rip_read(vcpu
));
11874 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
11876 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
11878 return kvm_get_linear_rip(vcpu
) == linear_rip
;
11880 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
11882 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
11884 unsigned long rflags
;
11886 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
11887 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11888 rflags
&= ~X86_EFLAGS_TF
;
11891 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
11893 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11895 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
11896 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
11897 rflags
|= X86_EFLAGS_TF
;
11898 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
11901 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11903 __kvm_set_rflags(vcpu
, rflags
);
11904 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11906 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
11908 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
11912 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
11916 r
= kvm_mmu_reload(vcpu
);
11920 if (!vcpu
->arch
.mmu
->direct_map
&&
11921 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
11924 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
11927 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
11929 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
11931 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
11934 static inline u32
kvm_async_pf_next_probe(u32 key
)
11936 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
11939 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11941 u32 key
= kvm_async_pf_hash_fn(gfn
);
11943 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
11944 key
= kvm_async_pf_next_probe(key
);
11946 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
11949 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11952 u32 key
= kvm_async_pf_hash_fn(gfn
);
11954 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
11955 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
11956 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
11957 key
= kvm_async_pf_next_probe(key
);
11962 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11964 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
11967 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11971 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
11973 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
11977 vcpu
->arch
.apf
.gfns
[i
] = ~0;
11979 j
= kvm_async_pf_next_probe(j
);
11980 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
11982 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
11984 * k lies cyclically in ]i,j]
11986 * |....j i.k.| or |.k..j i...|
11988 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
11989 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
11994 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
11996 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
11998 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
12002 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
12004 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
12006 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
12007 &token
, offset
, sizeof(token
));
12010 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
12012 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
12015 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
12016 &val
, offset
, sizeof(val
)))
12022 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
12024 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
12027 if (!kvm_pv_async_pf_enabled(vcpu
) ||
12028 (vcpu
->arch
.apf
.send_user_only
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 0))
12034 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
12036 if (unlikely(!lapic_in_kernel(vcpu
) ||
12037 kvm_event_needs_reinjection(vcpu
) ||
12038 vcpu
->arch
.exception
.pending
))
12041 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
12045 * If interrupts are off we cannot even use an artificial
12048 return kvm_arch_interrupt_allowed(vcpu
);
12051 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
12052 struct kvm_async_pf
*work
)
12054 struct x86_exception fault
;
12056 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
12057 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12059 if (kvm_can_deliver_async_pf(vcpu
) &&
12060 !apf_put_user_notpresent(vcpu
)) {
12061 fault
.vector
= PF_VECTOR
;
12062 fault
.error_code_valid
= true;
12063 fault
.error_code
= 0;
12064 fault
.nested_page_fault
= false;
12065 fault
.address
= work
->arch
.token
;
12066 fault
.async_page_fault
= true;
12067 kvm_inject_page_fault(vcpu
, &fault
);
12071 * It is not possible to deliver a paravirtualized asynchronous
12072 * page fault, but putting the guest in an artificial halt state
12073 * can be beneficial nevertheless: if an interrupt arrives, we
12074 * can deliver it timely and perhaps the guest will schedule
12075 * another process. When the instruction that triggered a page
12076 * fault is retried, hopefully the page will be ready in the host.
12078 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
12083 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
12084 struct kvm_async_pf
*work
)
12086 struct kvm_lapic_irq irq
= {
12087 .delivery_mode
= APIC_DM_FIXED
,
12088 .vector
= vcpu
->arch
.apf
.vec
12091 if (work
->wakeup_all
)
12092 work
->arch
.token
= ~0; /* broadcast wakeup */
12094 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12095 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
12097 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
12098 kvm_pv_async_pf_enabled(vcpu
) &&
12099 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
12100 vcpu
->arch
.apf
.pageready_pending
= true;
12101 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
12104 vcpu
->arch
.apf
.halted
= false;
12105 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
12108 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
12110 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
12111 if (!vcpu
->arch
.apf
.pageready_pending
)
12112 kvm_vcpu_kick(vcpu
);
12115 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
12117 if (!kvm_pv_async_pf_enabled(vcpu
))
12120 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
12123 void kvm_arch_start_assignment(struct kvm
*kvm
)
12125 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
12126 static_call_cond(kvm_x86_start_assignment
)(kvm
);
12128 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
12130 void kvm_arch_end_assignment(struct kvm
*kvm
)
12132 atomic_dec(&kvm
->arch
.assigned_device_count
);
12134 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
12136 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
12138 return atomic_read(&kvm
->arch
.assigned_device_count
);
12140 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
12142 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
12144 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
12146 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
12148 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
12150 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
12152 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
12154 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
12156 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
12158 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
12160 bool kvm_arch_has_irq_bypass(void)
12165 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
12166 struct irq_bypass_producer
*prod
)
12168 struct kvm_kernel_irqfd
*irqfd
=
12169 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12172 irqfd
->producer
= prod
;
12173 kvm_arch_start_assignment(irqfd
->kvm
);
12174 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
,
12175 prod
->irq
, irqfd
->gsi
, 1);
12178 kvm_arch_end_assignment(irqfd
->kvm
);
12183 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
12184 struct irq_bypass_producer
*prod
)
12187 struct kvm_kernel_irqfd
*irqfd
=
12188 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12190 WARN_ON(irqfd
->producer
!= prod
);
12191 irqfd
->producer
= NULL
;
12194 * When producer of consumer is unregistered, we change back to
12195 * remapped mode, so we can re-use the current implementation
12196 * when the irq is masked/disabled or the consumer side (KVM
12197 * int this case doesn't want to receive the interrupts.
12199 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
12201 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
12202 " fails: %d\n", irqfd
->consumer
.token
, ret
);
12204 kvm_arch_end_assignment(irqfd
->kvm
);
12207 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
12208 uint32_t guest_irq
, bool set
)
12210 return static_call(kvm_x86_update_pi_irte
)(kvm
, host_irq
, guest_irq
, set
);
12213 bool kvm_vector_hashing_enabled(void)
12215 return vector_hashing
;
12218 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
12220 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
12222 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
12225 int kvm_spec_ctrl_test_value(u64 value
)
12228 * test that setting IA32_SPEC_CTRL to given value
12229 * is allowed by the host processor
12233 unsigned long flags
;
12236 local_irq_save(flags
);
12238 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
12240 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
12243 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
12245 local_irq_restore(flags
);
12249 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
12251 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
12253 struct x86_exception fault
;
12254 u32 access
= error_code
&
12255 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
12257 if (!(error_code
& PFERR_PRESENT_MASK
) ||
12258 vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
12260 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12261 * tables probably do not match the TLB. Just proceed
12262 * with the error code that the processor gave.
12264 fault
.vector
= PF_VECTOR
;
12265 fault
.error_code_valid
= true;
12266 fault
.error_code
= error_code
;
12267 fault
.nested_page_fault
= false;
12268 fault
.address
= gva
;
12270 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
12272 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
12275 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12276 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12277 * indicates whether exit to userspace is needed.
12279 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
12280 struct x86_exception
*e
)
12282 if (r
== X86EMUL_PROPAGATE_FAULT
) {
12283 kvm_inject_emulated_page_fault(vcpu
, e
);
12288 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12289 * while handling a VMX instruction KVM could've handled the request
12290 * correctly by exiting to userspace and performing I/O but there
12291 * doesn't seem to be a real use-case behind such requests, just return
12292 * KVM_EXIT_INTERNAL_ERROR for now.
12294 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
12295 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
12296 vcpu
->run
->internal
.ndata
= 0;
12300 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
12302 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
12305 struct x86_exception e
;
12312 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
12313 if (r
!= X86EMUL_CONTINUE
)
12314 return kvm_handle_memory_failure(vcpu
, r
, &e
);
12316 if (operand
.pcid
>> 12 != 0) {
12317 kvm_inject_gp(vcpu
, 0);
12321 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
12324 case INVPCID_TYPE_INDIV_ADDR
:
12325 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
12326 is_noncanonical_address(operand
.gla
, vcpu
)) {
12327 kvm_inject_gp(vcpu
, 0);
12330 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
12331 return kvm_skip_emulated_instruction(vcpu
);
12333 case INVPCID_TYPE_SINGLE_CTXT
:
12334 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
12335 kvm_inject_gp(vcpu
, 0);
12339 kvm_invalidate_pcid(vcpu
, operand
.pcid
);
12340 return kvm_skip_emulated_instruction(vcpu
);
12342 case INVPCID_TYPE_ALL_NON_GLOBAL
:
12344 * Currently, KVM doesn't mark global entries in the shadow
12345 * page tables, so a non-global flush just degenerates to a
12346 * global flush. If needed, we could optimize this later by
12347 * keeping track of global entries in shadow page tables.
12351 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
12352 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12353 return kvm_skip_emulated_instruction(vcpu
);
12356 BUG(); /* We have already checked above that type <= 3 */
12359 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
12361 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
12363 struct kvm_run
*run
= vcpu
->run
;
12364 struct kvm_mmio_fragment
*frag
;
12367 BUG_ON(!vcpu
->mmio_needed
);
12369 /* Complete previous fragment */
12370 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
12371 len
= min(8u, frag
->len
);
12372 if (!vcpu
->mmio_is_write
)
12373 memcpy(frag
->data
, run
->mmio
.data
, len
);
12375 if (frag
->len
<= 8) {
12376 /* Switch to the next fragment. */
12378 vcpu
->mmio_cur_fragment
++;
12380 /* Go forward to the next mmio piece. */
12386 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
12387 vcpu
->mmio_needed
= 0;
12389 // VMG change, at this point, we're always done
12390 // RIP has already been advanced
12394 // More MMIO is needed
12395 run
->mmio
.phys_addr
= frag
->gpa
;
12396 run
->mmio
.len
= min(8u, frag
->len
);
12397 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
12398 if (run
->mmio
.is_write
)
12399 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12400 run
->exit_reason
= KVM_EXIT_MMIO
;
12402 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12407 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12411 struct kvm_mmio_fragment
*frag
;
12416 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12417 if (handled
== bytes
)
12424 /*TODO: Check if need to increment number of frags */
12425 frag
= vcpu
->mmio_fragments
;
12426 vcpu
->mmio_nr_fragments
= 1;
12431 vcpu
->mmio_needed
= 1;
12432 vcpu
->mmio_cur_fragment
= 0;
12434 vcpu
->run
->mmio
.phys_addr
= gpa
;
12435 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12436 vcpu
->run
->mmio
.is_write
= 1;
12437 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12438 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12440 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12444 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
12446 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12450 struct kvm_mmio_fragment
*frag
;
12455 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12456 if (handled
== bytes
)
12463 /*TODO: Check if need to increment number of frags */
12464 frag
= vcpu
->mmio_fragments
;
12465 vcpu
->mmio_nr_fragments
= 1;
12470 vcpu
->mmio_needed
= 1;
12471 vcpu
->mmio_cur_fragment
= 0;
12473 vcpu
->run
->mmio
.phys_addr
= gpa
;
12474 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12475 vcpu
->run
->mmio
.is_write
= 0;
12476 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12478 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12482 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
12484 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12485 unsigned int port
);
12487 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
12489 int size
= vcpu
->arch
.pio
.size
;
12490 int port
= vcpu
->arch
.pio
.port
;
12492 vcpu
->arch
.pio
.count
= 0;
12493 if (vcpu
->arch
.sev_pio_count
)
12494 return kvm_sev_es_outs(vcpu
, size
, port
);
12498 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12502 unsigned int count
=
12503 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12504 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
12506 /* memcpy done already by emulator_pio_out. */
12507 vcpu
->arch
.sev_pio_count
-= count
;
12508 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12512 /* Emulation done by the kernel. */
12513 if (!vcpu
->arch
.sev_pio_count
)
12517 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
12521 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12522 unsigned int port
);
12524 static void advance_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12526 unsigned count
= vcpu
->arch
.pio
.count
;
12527 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
12528 vcpu
->arch
.sev_pio_count
-= count
;
12529 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12532 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12534 int size
= vcpu
->arch
.pio
.size
;
12535 int port
= vcpu
->arch
.pio
.port
;
12537 advance_sev_es_emulated_ins(vcpu
);
12538 if (vcpu
->arch
.sev_pio_count
)
12539 return kvm_sev_es_ins(vcpu
, size
, port
);
12543 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12547 unsigned int count
=
12548 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12549 if (!__emulator_pio_in(vcpu
, size
, port
, count
))
12552 /* Emulation done by the kernel. */
12553 advance_sev_es_emulated_ins(vcpu
);
12554 if (!vcpu
->arch
.sev_pio_count
)
12558 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
12562 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
12563 unsigned int port
, void *data
, unsigned int count
,
12566 vcpu
->arch
.sev_pio_data
= data
;
12567 vcpu
->arch
.sev_pio_count
= count
;
12568 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
12569 : kvm_sev_es_outs(vcpu
, size
, port
);
12571 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
12573 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
12574 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
12575 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
12576 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
12577 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
12578 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
12579 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
12580 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
12581 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
12582 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
12583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
12584 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
12585 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
12586 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
12587 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
12588 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
12589 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
12590 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
12591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
12592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
12593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
12594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
12595 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);
12596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
12597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
12598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
12599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);