2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
58 #include <trace/events/kvm.h>
60 #include <asm/debugreg.h>
64 #include <linux/kernel_stat.h>
65 #include <asm/fpu/internal.h> /* Ugh! */
66 #include <asm/pvclock.h>
67 #include <asm/div64.h>
68 #include <asm/irq_remapping.h>
70 #define CREATE_TRACE_POINTS
73 #define MAX_IO_MSRS 256
74 #define KVM_MAX_MCE_BANKS 32
75 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
78 #define emul_to_vcpu(ctxt) \
79 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
82 * - enable syscall per default because its emulated by KVM
83 * - enable LME and LMA per default on 64 bit KVM
87 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
89 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
96 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
98 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
99 static void process_nmi(struct kvm_vcpu
*vcpu
);
100 static void enter_smm(struct kvm_vcpu
*vcpu
);
101 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
103 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
104 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
106 static bool __read_mostly ignore_msrs
= 0;
107 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
109 unsigned int min_timer_period_us
= 500;
110 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
112 static bool __read_mostly kvmclock_periodic_sync
= true;
113 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
115 bool __read_mostly kvm_has_tsc_control
;
116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
117 u32 __read_mostly kvm_max_guest_tsc_khz
;
118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
119 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
121 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
123 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
127 static u32 __read_mostly tsc_tolerance_ppm
= 250;
128 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
131 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
132 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
134 static bool __read_mostly vector_hashing
= true;
135 module_param(vector_hashing
, bool, S_IRUGO
);
137 static bool __read_mostly backwards_tsc_observed
= false;
139 #define KVM_NR_SHARED_MSRS 16
141 struct kvm_shared_msrs_global
{
143 u32 msrs
[KVM_NR_SHARED_MSRS
];
146 struct kvm_shared_msrs
{
147 struct user_return_notifier urn
;
149 struct kvm_shared_msr_values
{
152 } values
[KVM_NR_SHARED_MSRS
];
155 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
156 static struct kvm_shared_msrs __percpu
*shared_msrs
;
158 struct kvm_stats_debugfs_item debugfs_entries
[] = {
159 { "pf_fixed", VCPU_STAT(pf_fixed
) },
160 { "pf_guest", VCPU_STAT(pf_guest
) },
161 { "tlb_flush", VCPU_STAT(tlb_flush
) },
162 { "invlpg", VCPU_STAT(invlpg
) },
163 { "exits", VCPU_STAT(exits
) },
164 { "io_exits", VCPU_STAT(io_exits
) },
165 { "mmio_exits", VCPU_STAT(mmio_exits
) },
166 { "signal_exits", VCPU_STAT(signal_exits
) },
167 { "irq_window", VCPU_STAT(irq_window_exits
) },
168 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
169 { "halt_exits", VCPU_STAT(halt_exits
) },
170 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
171 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
172 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
173 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
174 { "hypercalls", VCPU_STAT(hypercalls
) },
175 { "request_irq", VCPU_STAT(request_irq_exits
) },
176 { "irq_exits", VCPU_STAT(irq_exits
) },
177 { "host_state_reload", VCPU_STAT(host_state_reload
) },
178 { "efer_reload", VCPU_STAT(efer_reload
) },
179 { "fpu_reload", VCPU_STAT(fpu_reload
) },
180 { "insn_emulation", VCPU_STAT(insn_emulation
) },
181 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
182 { "irq_injections", VCPU_STAT(irq_injections
) },
183 { "nmi_injections", VCPU_STAT(nmi_injections
) },
184 { "req_event", VCPU_STAT(req_event
) },
185 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
186 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
187 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
188 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
189 { "mmu_flooded", VM_STAT(mmu_flooded
) },
190 { "mmu_recycled", VM_STAT(mmu_recycled
) },
191 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
192 { "mmu_unsync", VM_STAT(mmu_unsync
) },
193 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
194 { "largepages", VM_STAT(lpages
) },
195 { "max_mmu_page_hash_collisions",
196 VM_STAT(max_mmu_page_hash_collisions
) },
200 u64 __read_mostly host_xcr0
;
202 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
204 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
207 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
208 vcpu
->arch
.apf
.gfns
[i
] = ~0;
211 static void kvm_on_user_return(struct user_return_notifier
*urn
)
214 struct kvm_shared_msrs
*locals
215 = container_of(urn
, struct kvm_shared_msrs
, urn
);
216 struct kvm_shared_msr_values
*values
;
220 * Disabling irqs at this point since the following code could be
221 * interrupted and executed through kvm_arch_hardware_disable()
223 local_irq_save(flags
);
224 if (locals
->registered
) {
225 locals
->registered
= false;
226 user_return_notifier_unregister(urn
);
228 local_irq_restore(flags
);
229 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
230 values
= &locals
->values
[slot
];
231 if (values
->host
!= values
->curr
) {
232 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
233 values
->curr
= values
->host
;
238 static void shared_msr_update(unsigned slot
, u32 msr
)
241 unsigned int cpu
= smp_processor_id();
242 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
244 /* only read, and nobody should modify it at this time,
245 * so don't need lock */
246 if (slot
>= shared_msrs_global
.nr
) {
247 printk(KERN_ERR
"kvm: invalid MSR slot!");
250 rdmsrl_safe(msr
, &value
);
251 smsr
->values
[slot
].host
= value
;
252 smsr
->values
[slot
].curr
= value
;
255 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
257 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
258 shared_msrs_global
.msrs
[slot
] = msr
;
259 if (slot
>= shared_msrs_global
.nr
)
260 shared_msrs_global
.nr
= slot
+ 1;
262 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
264 static void kvm_shared_msr_cpu_online(void)
268 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
269 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
272 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
274 unsigned int cpu
= smp_processor_id();
275 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
278 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
280 smsr
->values
[slot
].curr
= value
;
281 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
285 if (!smsr
->registered
) {
286 smsr
->urn
.on_user_return
= kvm_on_user_return
;
287 user_return_notifier_register(&smsr
->urn
);
288 smsr
->registered
= true;
292 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
294 static void drop_user_return_notifiers(void)
296 unsigned int cpu
= smp_processor_id();
297 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
299 if (smsr
->registered
)
300 kvm_on_user_return(&smsr
->urn
);
303 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
305 return vcpu
->arch
.apic_base
;
307 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
309 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
311 u64 old_state
= vcpu
->arch
.apic_base
&
312 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
313 u64 new_state
= msr_info
->data
&
314 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
315 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
316 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
318 if (!msr_info
->host_initiated
&&
319 ((msr_info
->data
& reserved_bits
) != 0 ||
320 new_state
== X2APIC_ENABLE
||
321 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
322 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
323 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
327 kvm_lapic_set_base(vcpu
, msr_info
->data
);
330 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
332 asmlinkage __visible
void kvm_spurious_fault(void)
334 /* Fault while not rebooting. We want the trace. */
337 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
339 #define EXCPT_BENIGN 0
340 #define EXCPT_CONTRIBUTORY 1
343 static int exception_class(int vector
)
353 return EXCPT_CONTRIBUTORY
;
360 #define EXCPT_FAULT 0
362 #define EXCPT_ABORT 2
363 #define EXCPT_INTERRUPT 3
365 static int exception_type(int vector
)
369 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
370 return EXCPT_INTERRUPT
;
374 /* #DB is trap, as instruction watchpoints are handled elsewhere */
375 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
378 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
381 /* Reserved exceptions will result in fault */
385 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
386 unsigned nr
, bool has_error
, u32 error_code
,
392 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
394 if (!vcpu
->arch
.exception
.pending
) {
396 if (has_error
&& !is_protmode(vcpu
))
398 vcpu
->arch
.exception
.pending
= true;
399 vcpu
->arch
.exception
.has_error_code
= has_error
;
400 vcpu
->arch
.exception
.nr
= nr
;
401 vcpu
->arch
.exception
.error_code
= error_code
;
402 vcpu
->arch
.exception
.reinject
= reinject
;
406 /* to check exception */
407 prev_nr
= vcpu
->arch
.exception
.nr
;
408 if (prev_nr
== DF_VECTOR
) {
409 /* triple fault -> shutdown */
410 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
413 class1
= exception_class(prev_nr
);
414 class2
= exception_class(nr
);
415 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
416 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
417 /* generate double fault per SDM Table 5-5 */
418 vcpu
->arch
.exception
.pending
= true;
419 vcpu
->arch
.exception
.has_error_code
= true;
420 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
421 vcpu
->arch
.exception
.error_code
= 0;
423 /* replace previous exception with a new one in a hope
424 that instruction re-execution will regenerate lost
429 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
431 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
433 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
435 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
437 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
439 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
441 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
444 kvm_inject_gp(vcpu
, 0);
446 return kvm_skip_emulated_instruction(vcpu
);
450 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
452 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
454 ++vcpu
->stat
.pf_guest
;
455 vcpu
->arch
.cr2
= fault
->address
;
456 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
458 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
460 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
462 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
463 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
465 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
467 return fault
->nested_page_fault
;
470 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
472 atomic_inc(&vcpu
->arch
.nmi_queued
);
473 kvm_make_request(KVM_REQ_NMI
, vcpu
);
475 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
477 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
479 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
481 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
483 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
485 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
487 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
490 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
491 * a #GP and return false.
493 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
495 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
497 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
500 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
502 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
504 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
507 kvm_queue_exception(vcpu
, UD_VECTOR
);
510 EXPORT_SYMBOL_GPL(kvm_require_dr
);
513 * This function will be used to read from the physical memory of the currently
514 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
515 * can read from guest physical or from the guest's guest physical memory.
517 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
518 gfn_t ngfn
, void *data
, int offset
, int len
,
521 struct x86_exception exception
;
525 ngpa
= gfn_to_gpa(ngfn
);
526 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
527 if (real_gfn
== UNMAPPED_GVA
)
530 real_gfn
= gpa_to_gfn(real_gfn
);
532 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
534 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
536 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
537 void *data
, int offset
, int len
, u32 access
)
539 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
540 data
, offset
, len
, access
);
544 * Load the pae pdptrs. Return true is they are all valid.
546 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
548 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
549 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
552 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
554 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
555 offset
* sizeof(u64
), sizeof(pdpte
),
556 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
561 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
562 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
564 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
571 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
572 __set_bit(VCPU_EXREG_PDPTR
,
573 (unsigned long *)&vcpu
->arch
.regs_avail
);
574 __set_bit(VCPU_EXREG_PDPTR
,
575 (unsigned long *)&vcpu
->arch
.regs_dirty
);
580 EXPORT_SYMBOL_GPL(load_pdptrs
);
582 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
584 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
590 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
593 if (!test_bit(VCPU_EXREG_PDPTR
,
594 (unsigned long *)&vcpu
->arch
.regs_avail
))
597 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
598 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
599 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
600 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
603 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
608 EXPORT_SYMBOL_GPL(pdptrs_changed
);
610 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
612 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
613 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
618 if (cr0
& 0xffffffff00000000UL
)
622 cr0
&= ~CR0_RESERVED_BITS
;
624 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
627 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
630 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
632 if ((vcpu
->arch
.efer
& EFER_LME
)) {
637 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
642 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
647 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
650 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
652 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
653 kvm_clear_async_pf_completion_queue(vcpu
);
654 kvm_async_pf_hash_reset(vcpu
);
657 if ((cr0
^ old_cr0
) & update_bits
)
658 kvm_mmu_reset_context(vcpu
);
660 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
661 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
662 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
663 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
667 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
669 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
671 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
673 EXPORT_SYMBOL_GPL(kvm_lmsw
);
675 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
677 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
678 !vcpu
->guest_xcr0_loaded
) {
679 /* kvm_set_xcr() also depends on this */
680 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
681 vcpu
->guest_xcr0_loaded
= 1;
685 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
687 if (vcpu
->guest_xcr0_loaded
) {
688 if (vcpu
->arch
.xcr0
!= host_xcr0
)
689 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
690 vcpu
->guest_xcr0_loaded
= 0;
694 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
697 u64 old_xcr0
= vcpu
->arch
.xcr0
;
700 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
701 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
703 if (!(xcr0
& XFEATURE_MASK_FP
))
705 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
709 * Do not allow the guest to set bits that we do not support
710 * saving. However, xcr0 bit 0 is always set, even if the
711 * emulated CPU does not support XSAVE (see fx_init).
713 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
714 if (xcr0
& ~valid_bits
)
717 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
718 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
721 if (xcr0
& XFEATURE_MASK_AVX512
) {
722 if (!(xcr0
& XFEATURE_MASK_YMM
))
724 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
727 vcpu
->arch
.xcr0
= xcr0
;
729 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
730 kvm_update_cpuid(vcpu
);
734 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
736 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
737 __kvm_set_xcr(vcpu
, index
, xcr
)) {
738 kvm_inject_gp(vcpu
, 0);
743 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
745 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
747 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
748 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
749 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
751 if (cr4
& CR4_RESERVED_BITS
)
754 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
757 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
760 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
763 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
766 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
769 if (is_long_mode(vcpu
)) {
770 if (!(cr4
& X86_CR4_PAE
))
772 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
773 && ((cr4
^ old_cr4
) & pdptr_bits
)
774 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
778 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
779 if (!guest_cpuid_has_pcid(vcpu
))
782 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
783 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
787 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
790 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
791 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
792 kvm_mmu_reset_context(vcpu
);
794 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
795 kvm_update_cpuid(vcpu
);
799 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
801 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
804 cr3
&= ~CR3_PCID_INVD
;
807 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
808 kvm_mmu_sync_roots(vcpu
);
809 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
813 if (is_long_mode(vcpu
)) {
814 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
816 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
817 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
820 vcpu
->arch
.cr3
= cr3
;
821 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
822 kvm_mmu_new_cr3(vcpu
);
825 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
827 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
829 if (cr8
& CR8_RESERVED_BITS
)
831 if (lapic_in_kernel(vcpu
))
832 kvm_lapic_set_tpr(vcpu
, cr8
);
834 vcpu
->arch
.cr8
= cr8
;
837 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
839 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
841 if (lapic_in_kernel(vcpu
))
842 return kvm_lapic_get_cr8(vcpu
);
844 return vcpu
->arch
.cr8
;
846 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
848 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
852 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
853 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
854 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
855 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
859 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
861 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
862 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
865 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
869 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
870 dr7
= vcpu
->arch
.guest_debug_dr7
;
872 dr7
= vcpu
->arch
.dr7
;
873 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
874 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
875 if (dr7
& DR7_BP_EN_MASK
)
876 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
879 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
881 u64 fixed
= DR6_FIXED_1
;
883 if (!guest_cpuid_has_rtm(vcpu
))
888 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
892 vcpu
->arch
.db
[dr
] = val
;
893 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
894 vcpu
->arch
.eff_db
[dr
] = val
;
899 if (val
& 0xffffffff00000000ULL
)
901 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
902 kvm_update_dr6(vcpu
);
907 if (val
& 0xffffffff00000000ULL
)
909 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
910 kvm_update_dr7(vcpu
);
917 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
919 if (__kvm_set_dr(vcpu
, dr
, val
)) {
920 kvm_inject_gp(vcpu
, 0);
925 EXPORT_SYMBOL_GPL(kvm_set_dr
);
927 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
931 *val
= vcpu
->arch
.db
[dr
];
936 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
937 *val
= vcpu
->arch
.dr6
;
939 *val
= kvm_x86_ops
->get_dr6(vcpu
);
944 *val
= vcpu
->arch
.dr7
;
949 EXPORT_SYMBOL_GPL(kvm_get_dr
);
951 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
953 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
957 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
960 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
961 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
964 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
967 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
968 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
970 * This list is modified at module load time to reflect the
971 * capabilities of the host cpu. This capabilities test skips MSRs that are
972 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
973 * may depend on host virtualization features rather than host cpu features.
976 static u32 msrs_to_save
[] = {
977 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
980 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
982 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
983 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
986 static unsigned num_msrs_to_save
;
988 static u32 emulated_msrs
[] = {
989 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
990 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
991 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
992 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
993 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
994 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
997 HV_X64_MSR_VP_RUNTIME
,
999 HV_X64_MSR_STIMER0_CONFIG
,
1000 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1003 MSR_IA32_TSC_ADJUST
,
1004 MSR_IA32_TSCDEADLINE
,
1005 MSR_IA32_MISC_ENABLE
,
1006 MSR_IA32_MCG_STATUS
,
1008 MSR_IA32_MCG_EXT_CTL
,
1012 static unsigned num_emulated_msrs
;
1014 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1016 if (efer
& efer_reserved_bits
)
1019 if (efer
& EFER_FFXSR
) {
1020 struct kvm_cpuid_entry2
*feat
;
1022 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1023 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1027 if (efer
& EFER_SVME
) {
1028 struct kvm_cpuid_entry2
*feat
;
1030 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1031 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1037 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1039 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1041 u64 old_efer
= vcpu
->arch
.efer
;
1043 if (!kvm_valid_efer(vcpu
, efer
))
1047 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1051 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1053 kvm_x86_ops
->set_efer(vcpu
, efer
);
1055 /* Update reserved bits */
1056 if ((efer
^ old_efer
) & EFER_NX
)
1057 kvm_mmu_reset_context(vcpu
);
1062 void kvm_enable_efer_bits(u64 mask
)
1064 efer_reserved_bits
&= ~mask
;
1066 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1069 * Writes msr value into into the appropriate "register".
1070 * Returns 0 on success, non-0 otherwise.
1071 * Assumes vcpu_load() was already called.
1073 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1075 switch (msr
->index
) {
1078 case MSR_KERNEL_GS_BASE
:
1081 if (is_noncanonical_address(msr
->data
))
1084 case MSR_IA32_SYSENTER_EIP
:
1085 case MSR_IA32_SYSENTER_ESP
:
1087 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1088 * non-canonical address is written on Intel but not on
1089 * AMD (which ignores the top 32-bits, because it does
1090 * not implement 64-bit SYSENTER).
1092 * 64-bit code should hence be able to write a non-canonical
1093 * value on AMD. Making the address canonical ensures that
1094 * vmentry does not fail on Intel after writing a non-canonical
1095 * value, and that something deterministic happens if the guest
1096 * invokes 64-bit SYSENTER.
1098 msr
->data
= get_canonical(msr
->data
);
1100 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1102 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1105 * Adapt set_msr() to msr_io()'s calling convention
1107 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1109 struct msr_data msr
;
1113 msr
.host_initiated
= true;
1114 r
= kvm_get_msr(vcpu
, &msr
);
1122 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1124 struct msr_data msr
;
1128 msr
.host_initiated
= true;
1129 return kvm_set_msr(vcpu
, &msr
);
1132 #ifdef CONFIG_X86_64
1133 struct pvclock_gtod_data
{
1136 struct { /* extract of a clocksource struct */
1149 static struct pvclock_gtod_data pvclock_gtod_data
;
1151 static void update_pvclock_gtod(struct timekeeper
*tk
)
1153 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1156 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1158 write_seqcount_begin(&vdata
->seq
);
1160 /* copy pvclock gtod data */
1161 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1162 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1163 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1164 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1165 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1167 vdata
->boot_ns
= boot_ns
;
1168 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1170 vdata
->wall_time_sec
= tk
->xtime_sec
;
1172 write_seqcount_end(&vdata
->seq
);
1176 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1179 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1180 * vcpu_enter_guest. This function is only called from
1181 * the physical CPU that is running vcpu.
1183 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1186 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1190 struct pvclock_wall_clock wc
;
1191 struct timespec64 boot
;
1196 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1201 ++version
; /* first time write, random junk */
1205 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1209 * The guest calculates current wall clock time by adding
1210 * system time (updated by kvm_guest_time_update below) to the
1211 * wall clock specified here. guest system time equals host
1212 * system time for us, thus we must fill in host boot time here.
1214 getboottime64(&boot
);
1216 if (kvm
->arch
.kvmclock_offset
) {
1217 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1218 boot
= timespec64_sub(boot
, ts
);
1220 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1221 wc
.nsec
= boot
.tv_nsec
;
1222 wc
.version
= version
;
1224 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1227 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1230 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1232 do_shl32_div32(dividend
, divisor
);
1236 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1237 s8
*pshift
, u32
*pmultiplier
)
1245 scaled64
= scaled_hz
;
1246 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1251 tps32
= (uint32_t)tps64
;
1252 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1253 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1261 *pmultiplier
= div_frac(scaled64
, tps32
);
1263 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1264 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1267 #ifdef CONFIG_X86_64
1268 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1271 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1272 static unsigned long max_tsc_khz
;
1274 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1276 u64 v
= (u64
)khz
* (1000000 + ppm
);
1281 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1285 /* Guest TSC same frequency as host TSC? */
1287 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1291 /* TSC scaling supported? */
1292 if (!kvm_has_tsc_control
) {
1293 if (user_tsc_khz
> tsc_khz
) {
1294 vcpu
->arch
.tsc_catchup
= 1;
1295 vcpu
->arch
.tsc_always_catchup
= 1;
1298 WARN(1, "user requested TSC rate below hardware speed\n");
1303 /* TSC scaling required - calculate ratio */
1304 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1305 user_tsc_khz
, tsc_khz
);
1307 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1308 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1313 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1317 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1319 u32 thresh_lo
, thresh_hi
;
1320 int use_scaling
= 0;
1322 /* tsc_khz can be zero if TSC calibration fails */
1323 if (user_tsc_khz
== 0) {
1324 /* set tsc_scaling_ratio to a safe value */
1325 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1329 /* Compute a scale to convert nanoseconds in TSC cycles */
1330 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1331 &vcpu
->arch
.virtual_tsc_shift
,
1332 &vcpu
->arch
.virtual_tsc_mult
);
1333 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1336 * Compute the variation in TSC rate which is acceptable
1337 * within the range of tolerance and decide if the
1338 * rate being applied is within that bounds of the hardware
1339 * rate. If so, no scaling or compensation need be done.
1341 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1342 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1343 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1344 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1347 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1350 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1352 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1353 vcpu
->arch
.virtual_tsc_mult
,
1354 vcpu
->arch
.virtual_tsc_shift
);
1355 tsc
+= vcpu
->arch
.this_tsc_write
;
1359 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1361 #ifdef CONFIG_X86_64
1363 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1364 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1366 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1367 atomic_read(&vcpu
->kvm
->online_vcpus
));
1370 * Once the masterclock is enabled, always perform request in
1371 * order to update it.
1373 * In order to enable masterclock, the host clocksource must be TSC
1374 * and the vcpus need to have matched TSCs. When that happens,
1375 * perform request to enable masterclock.
1377 if (ka
->use_master_clock
||
1378 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1379 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1381 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1382 atomic_read(&vcpu
->kvm
->online_vcpus
),
1383 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1387 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1389 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1390 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1394 * Multiply tsc by a fixed point number represented by ratio.
1396 * The most significant 64-N bits (mult) of ratio represent the
1397 * integral part of the fixed point number; the remaining N bits
1398 * (frac) represent the fractional part, ie. ratio represents a fixed
1399 * point number (mult + frac * 2^(-N)).
1401 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1403 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1405 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1408 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1411 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1413 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1414 _tsc
= __scale_tsc(ratio
, tsc
);
1418 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1420 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1424 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1426 return target_tsc
- tsc
;
1429 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1431 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1433 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1435 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1437 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1438 vcpu
->arch
.tsc_offset
= offset
;
1441 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1443 struct kvm
*kvm
= vcpu
->kvm
;
1444 u64 offset
, ns
, elapsed
;
1445 unsigned long flags
;
1447 bool already_matched
;
1448 u64 data
= msr
->data
;
1449 bool synchronizing
= false;
1451 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1452 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1453 ns
= ktime_get_boot_ns();
1454 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1456 if (vcpu
->arch
.virtual_tsc_khz
) {
1457 if (data
== 0 && msr
->host_initiated
) {
1459 * detection of vcpu initialization -- need to sync
1460 * with other vCPUs. This particularly helps to keep
1461 * kvm_clock stable after CPU hotplug
1463 synchronizing
= true;
1465 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1466 nsec_to_cycles(vcpu
, elapsed
);
1467 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1469 * Special case: TSC write with a small delta (1 second)
1470 * of virtual cycle time against real time is
1471 * interpreted as an attempt to synchronize the CPU.
1473 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1474 data
+ tsc_hz
> tsc_exp
;
1479 * For a reliable TSC, we can match TSC offsets, and for an unstable
1480 * TSC, we add elapsed time in this computation. We could let the
1481 * compensation code attempt to catch up if we fall behind, but
1482 * it's better to try to match offsets from the beginning.
1484 if (synchronizing
&&
1485 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1486 if (!check_tsc_unstable()) {
1487 offset
= kvm
->arch
.cur_tsc_offset
;
1488 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1490 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1492 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1493 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1496 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1499 * We split periods of matched TSC writes into generations.
1500 * For each generation, we track the original measured
1501 * nanosecond time, offset, and write, so if TSCs are in
1502 * sync, we can match exact offset, and if not, we can match
1503 * exact software computation in compute_guest_tsc()
1505 * These values are tracked in kvm->arch.cur_xxx variables.
1507 kvm
->arch
.cur_tsc_generation
++;
1508 kvm
->arch
.cur_tsc_nsec
= ns
;
1509 kvm
->arch
.cur_tsc_write
= data
;
1510 kvm
->arch
.cur_tsc_offset
= offset
;
1512 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1513 kvm
->arch
.cur_tsc_generation
, data
);
1517 * We also track th most recent recorded KHZ, write and time to
1518 * allow the matching interval to be extended at each write.
1520 kvm
->arch
.last_tsc_nsec
= ns
;
1521 kvm
->arch
.last_tsc_write
= data
;
1522 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1524 vcpu
->arch
.last_guest_tsc
= data
;
1526 /* Keep track of which generation this VCPU has synchronized to */
1527 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1528 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1529 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1531 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1532 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1533 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1534 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1536 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1538 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1539 } else if (!already_matched
) {
1540 kvm
->arch
.nr_vcpus_matched_tsc
++;
1543 kvm_track_tsc_matching(vcpu
);
1544 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1547 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1549 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1552 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1555 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1557 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1558 WARN_ON(adjustment
< 0);
1559 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1560 adjust_tsc_offset_guest(vcpu
, adjustment
);
1563 #ifdef CONFIG_X86_64
1565 static u64
read_tsc(void)
1567 u64 ret
= (u64
)rdtsc_ordered();
1568 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1570 if (likely(ret
>= last
))
1574 * GCC likes to generate cmov here, but this branch is extremely
1575 * predictable (it's just a function of time and the likely is
1576 * very likely) and there's a data dependence, so force GCC
1577 * to generate a branch instead. I don't barrier() because
1578 * we don't actually need a barrier, and if this function
1579 * ever gets inlined it will generate worse code.
1585 static inline u64
vgettsc(u64
*cycle_now
)
1588 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1590 *cycle_now
= read_tsc();
1592 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1593 return v
* gtod
->clock
.mult
;
1596 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1598 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1604 seq
= read_seqcount_begin(>od
->seq
);
1605 mode
= gtod
->clock
.vclock_mode
;
1606 ns
= gtod
->nsec_base
;
1607 ns
+= vgettsc(cycle_now
);
1608 ns
>>= gtod
->clock
.shift
;
1609 ns
+= gtod
->boot_ns
;
1610 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1616 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1618 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1624 seq
= read_seqcount_begin(>od
->seq
);
1625 mode
= gtod
->clock
.vclock_mode
;
1626 ts
->tv_sec
= gtod
->wall_time_sec
;
1627 ns
= gtod
->nsec_base
;
1628 ns
+= vgettsc(cycle_now
);
1629 ns
>>= gtod
->clock
.shift
;
1630 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1632 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1638 /* returns true if host is using tsc clocksource */
1639 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1641 /* checked again under seqlock below */
1642 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1645 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1648 /* returns true if host is using tsc clocksource */
1649 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1652 /* checked again under seqlock below */
1653 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1656 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1662 * Assuming a stable TSC across physical CPUS, and a stable TSC
1663 * across virtual CPUs, the following condition is possible.
1664 * Each numbered line represents an event visible to both
1665 * CPUs at the next numbered event.
1667 * "timespecX" represents host monotonic time. "tscX" represents
1670 * VCPU0 on CPU0 | VCPU1 on CPU1
1672 * 1. read timespec0,tsc0
1673 * 2. | timespec1 = timespec0 + N
1675 * 3. transition to guest | transition to guest
1676 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1677 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1678 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1680 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1683 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1685 * - 0 < N - M => M < N
1687 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1688 * always the case (the difference between two distinct xtime instances
1689 * might be smaller then the difference between corresponding TSC reads,
1690 * when updating guest vcpus pvclock areas).
1692 * To avoid that problem, do not allow visibility of distinct
1693 * system_timestamp/tsc_timestamp values simultaneously: use a master
1694 * copy of host monotonic time values. Update that master copy
1697 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1701 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1703 #ifdef CONFIG_X86_64
1704 struct kvm_arch
*ka
= &kvm
->arch
;
1706 bool host_tsc_clocksource
, vcpus_matched
;
1708 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1709 atomic_read(&kvm
->online_vcpus
));
1712 * If the host uses TSC clock, then passthrough TSC as stable
1715 host_tsc_clocksource
= kvm_get_time_and_clockread(
1716 &ka
->master_kernel_ns
,
1717 &ka
->master_cycle_now
);
1719 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1720 && !backwards_tsc_observed
1721 && !ka
->boot_vcpu_runs_old_kvmclock
;
1723 if (ka
->use_master_clock
)
1724 atomic_set(&kvm_guest_has_master_clock
, 1);
1726 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1727 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1732 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1734 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1737 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1739 #ifdef CONFIG_X86_64
1741 struct kvm_vcpu
*vcpu
;
1742 struct kvm_arch
*ka
= &kvm
->arch
;
1744 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1745 kvm_make_mclock_inprogress_request(kvm
);
1746 /* no guest entries from this point */
1747 pvclock_update_vm_gtod_copy(kvm
);
1749 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1750 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1752 /* guest entries allowed */
1753 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1754 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1756 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1760 static u64
__get_kvmclock_ns(struct kvm
*kvm
)
1762 struct kvm_arch
*ka
= &kvm
->arch
;
1763 struct pvclock_vcpu_time_info hv_clock
;
1765 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1766 if (!ka
->use_master_clock
) {
1767 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1768 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1771 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1772 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1773 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1775 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1776 &hv_clock
.tsc_shift
,
1777 &hv_clock
.tsc_to_system_mul
);
1778 return __pvclock_read_cycles(&hv_clock
, rdtsc());
1781 u64
get_kvmclock_ns(struct kvm
*kvm
)
1783 unsigned long flags
;
1786 local_irq_save(flags
);
1787 ns
= __get_kvmclock_ns(kvm
);
1788 local_irq_restore(flags
);
1793 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1795 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1796 struct pvclock_vcpu_time_info guest_hv_clock
;
1798 if (unlikely(kvm_vcpu_read_guest_cached(v
, &vcpu
->pv_time
,
1799 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1802 /* This VCPU is paused, but it's legal for a guest to read another
1803 * VCPU's kvmclock, so we really have to follow the specification where
1804 * it says that version is odd if data is being modified, and even after
1807 * Version field updates must be kept separate. This is because
1808 * kvm_write_guest_cached might use a "rep movs" instruction, and
1809 * writes within a string instruction are weakly ordered. So there
1810 * are three writes overall.
1812 * As a small optimization, only write the version field in the first
1813 * and third write. The vcpu->pv_time cache is still valid, because the
1814 * version field is the first in the struct.
1816 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1818 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1819 kvm_vcpu_write_guest_cached(v
, &vcpu
->pv_time
,
1821 sizeof(vcpu
->hv_clock
.version
));
1825 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1826 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1828 if (vcpu
->pvclock_set_guest_stopped_request
) {
1829 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1830 vcpu
->pvclock_set_guest_stopped_request
= false;
1833 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1835 kvm_vcpu_write_guest_cached(v
, &vcpu
->pv_time
,
1837 sizeof(vcpu
->hv_clock
));
1841 vcpu
->hv_clock
.version
++;
1842 kvm_vcpu_write_guest_cached(v
, &vcpu
->pv_time
,
1844 sizeof(vcpu
->hv_clock
.version
));
1847 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1849 unsigned long flags
, tgt_tsc_khz
;
1850 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1851 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1853 u64 tsc_timestamp
, host_tsc
;
1855 bool use_master_clock
;
1861 * If the host uses TSC clock, then passthrough TSC as stable
1864 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1865 use_master_clock
= ka
->use_master_clock
;
1866 if (use_master_clock
) {
1867 host_tsc
= ka
->master_cycle_now
;
1868 kernel_ns
= ka
->master_kernel_ns
;
1870 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1872 /* Keep irq disabled to prevent changes to the clock */
1873 local_irq_save(flags
);
1874 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1875 if (unlikely(tgt_tsc_khz
== 0)) {
1876 local_irq_restore(flags
);
1877 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1880 if (!use_master_clock
) {
1882 kernel_ns
= ktime_get_boot_ns();
1885 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1888 * We may have to catch up the TSC to match elapsed wall clock
1889 * time for two reasons, even if kvmclock is used.
1890 * 1) CPU could have been running below the maximum TSC rate
1891 * 2) Broken TSC compensation resets the base at each VCPU
1892 * entry to avoid unknown leaps of TSC even when running
1893 * again on the same CPU. This may cause apparent elapsed
1894 * time to disappear, and the guest to stand still or run
1897 if (vcpu
->tsc_catchup
) {
1898 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1899 if (tsc
> tsc_timestamp
) {
1900 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1901 tsc_timestamp
= tsc
;
1905 local_irq_restore(flags
);
1907 /* With all the info we got, fill in the values */
1909 if (kvm_has_tsc_control
)
1910 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1912 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1913 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1914 &vcpu
->hv_clock
.tsc_shift
,
1915 &vcpu
->hv_clock
.tsc_to_system_mul
);
1916 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1919 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1920 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1921 vcpu
->last_guest_tsc
= tsc_timestamp
;
1923 /* If the host uses TSC clocksource, then it is stable */
1925 if (use_master_clock
)
1926 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1928 vcpu
->hv_clock
.flags
= pvclock_flags
;
1930 if (vcpu
->pv_time_enabled
)
1931 kvm_setup_pvclock_page(v
);
1932 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1933 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1938 * kvmclock updates which are isolated to a given vcpu, such as
1939 * vcpu->cpu migration, should not allow system_timestamp from
1940 * the rest of the vcpus to remain static. Otherwise ntp frequency
1941 * correction applies to one vcpu's system_timestamp but not
1944 * So in those cases, request a kvmclock update for all vcpus.
1945 * We need to rate-limit these requests though, as they can
1946 * considerably slow guests that have a large number of vcpus.
1947 * The time for a remote vcpu to update its kvmclock is bound
1948 * by the delay we use to rate-limit the updates.
1951 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1953 static void kvmclock_update_fn(struct work_struct
*work
)
1956 struct delayed_work
*dwork
= to_delayed_work(work
);
1957 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1958 kvmclock_update_work
);
1959 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1960 struct kvm_vcpu
*vcpu
;
1962 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1963 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1964 kvm_vcpu_kick(vcpu
);
1968 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1970 struct kvm
*kvm
= v
->kvm
;
1972 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1973 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1974 KVMCLOCK_UPDATE_DELAY
);
1977 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1979 static void kvmclock_sync_fn(struct work_struct
*work
)
1981 struct delayed_work
*dwork
= to_delayed_work(work
);
1982 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1983 kvmclock_sync_work
);
1984 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1986 if (!kvmclock_periodic_sync
)
1989 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1990 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1991 KVMCLOCK_SYNC_PERIOD
);
1994 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1996 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1997 unsigned bank_num
= mcg_cap
& 0xff;
2000 case MSR_IA32_MCG_STATUS
:
2001 vcpu
->arch
.mcg_status
= data
;
2003 case MSR_IA32_MCG_CTL
:
2004 if (!(mcg_cap
& MCG_CTL_P
))
2006 if (data
!= 0 && data
!= ~(u64
)0)
2008 vcpu
->arch
.mcg_ctl
= data
;
2011 if (msr
>= MSR_IA32_MC0_CTL
&&
2012 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2013 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2014 /* only 0 or all 1s can be written to IA32_MCi_CTL
2015 * some Linux kernels though clear bit 10 in bank 4 to
2016 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2017 * this to avoid an uncatched #GP in the guest
2019 if ((offset
& 0x3) == 0 &&
2020 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2022 vcpu
->arch
.mce_banks
[offset
] = data
;
2030 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2032 struct kvm
*kvm
= vcpu
->kvm
;
2033 int lm
= is_long_mode(vcpu
);
2034 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2035 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2036 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2037 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2038 u32 page_num
= data
& ~PAGE_MASK
;
2039 u64 page_addr
= data
& PAGE_MASK
;
2044 if (page_num
>= blob_size
)
2047 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2052 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2061 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2063 gpa_t gpa
= data
& ~0x3f;
2065 /* Bits 2:5 are reserved, Should be zero */
2069 vcpu
->arch
.apf
.msr_val
= data
;
2071 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2072 kvm_clear_async_pf_completion_queue(vcpu
);
2073 kvm_async_pf_hash_reset(vcpu
);
2077 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu
, &vcpu
->arch
.apf
.data
, gpa
,
2081 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2082 kvm_async_pf_wakeup_all(vcpu
);
2086 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2088 vcpu
->arch
.pv_time_enabled
= false;
2091 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2093 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2096 if (unlikely(kvm_vcpu_read_guest_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2097 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2100 vcpu
->arch
.st
.steal
.preempted
= 0;
2102 if (vcpu
->arch
.st
.steal
.version
& 1)
2103 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2105 vcpu
->arch
.st
.steal
.version
+= 1;
2107 kvm_vcpu_write_guest_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2108 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2112 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2113 vcpu
->arch
.st
.last_steal
;
2114 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2116 kvm_vcpu_write_guest_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2117 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2121 vcpu
->arch
.st
.steal
.version
+= 1;
2123 kvm_vcpu_write_guest_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2124 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2127 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2130 u32 msr
= msr_info
->index
;
2131 u64 data
= msr_info
->data
;
2134 case MSR_AMD64_NB_CFG
:
2135 case MSR_IA32_UCODE_REV
:
2136 case MSR_IA32_UCODE_WRITE
:
2137 case MSR_VM_HSAVE_PA
:
2138 case MSR_AMD64_PATCH_LOADER
:
2139 case MSR_AMD64_BU_CFG2
:
2140 case MSR_AMD64_DC_CFG
:
2144 return set_efer(vcpu
, data
);
2146 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2147 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2148 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2149 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2151 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2156 case MSR_FAM10H_MMIO_CONF_BASE
:
2158 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2163 case MSR_IA32_DEBUGCTLMSR
:
2165 /* We support the non-activated case already */
2167 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2168 /* Values other than LBR and BTF are vendor-specific,
2169 thus reserved and should throw a #GP */
2172 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2175 case 0x200 ... 0x2ff:
2176 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2177 case MSR_IA32_APICBASE
:
2178 return kvm_set_apic_base(vcpu
, msr_info
);
2179 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2180 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2181 case MSR_IA32_TSCDEADLINE
:
2182 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2184 case MSR_IA32_TSC_ADJUST
:
2185 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2186 if (!msr_info
->host_initiated
) {
2187 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2188 adjust_tsc_offset_guest(vcpu
, adj
);
2190 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2193 case MSR_IA32_MISC_ENABLE
:
2194 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2196 case MSR_IA32_SMBASE
:
2197 if (!msr_info
->host_initiated
)
2199 vcpu
->arch
.smbase
= data
;
2201 case MSR_KVM_WALL_CLOCK_NEW
:
2202 case MSR_KVM_WALL_CLOCK
:
2203 vcpu
->kvm
->arch
.wall_clock
= data
;
2204 kvm_write_wall_clock(vcpu
->kvm
, data
);
2206 case MSR_KVM_SYSTEM_TIME_NEW
:
2207 case MSR_KVM_SYSTEM_TIME
: {
2208 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2210 kvmclock_reset(vcpu
);
2212 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2213 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2215 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2216 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2219 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2222 vcpu
->arch
.time
= data
;
2223 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2225 /* we verify if the enable bit is set... */
2229 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu
,
2230 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2231 sizeof(struct pvclock_vcpu_time_info
)))
2232 vcpu
->arch
.pv_time_enabled
= false;
2234 vcpu
->arch
.pv_time_enabled
= true;
2238 case MSR_KVM_ASYNC_PF_EN
:
2239 if (kvm_pv_enable_async_pf(vcpu
, data
))
2242 case MSR_KVM_STEAL_TIME
:
2244 if (unlikely(!sched_info_on()))
2247 if (data
& KVM_STEAL_RESERVED_MASK
)
2250 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu
, &vcpu
->arch
.st
.stime
,
2251 data
& KVM_STEAL_VALID_BITS
,
2252 sizeof(struct kvm_steal_time
)))
2255 vcpu
->arch
.st
.msr_val
= data
;
2257 if (!(data
& KVM_MSR_ENABLED
))
2260 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2263 case MSR_KVM_PV_EOI_EN
:
2264 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2268 case MSR_IA32_MCG_CTL
:
2269 case MSR_IA32_MCG_STATUS
:
2270 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2271 return set_msr_mce(vcpu
, msr
, data
);
2273 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2274 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2275 pr
= true; /* fall through */
2276 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2277 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2278 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2279 return kvm_pmu_set_msr(vcpu
, msr_info
);
2281 if (pr
|| data
!= 0)
2282 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2283 "0x%x data 0x%llx\n", msr
, data
);
2285 case MSR_K7_CLK_CTL
:
2287 * Ignore all writes to this no longer documented MSR.
2288 * Writes are only relevant for old K7 processors,
2289 * all pre-dating SVM, but a recommended workaround from
2290 * AMD for these chips. It is possible to specify the
2291 * affected processor models on the command line, hence
2292 * the need to ignore the workaround.
2295 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2296 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2297 case HV_X64_MSR_CRASH_CTL
:
2298 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2299 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2300 msr_info
->host_initiated
);
2301 case MSR_IA32_BBL_CR_CTL3
:
2302 /* Drop writes to this legacy MSR -- see rdmsr
2303 * counterpart for further detail.
2305 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2307 case MSR_AMD64_OSVW_ID_LENGTH
:
2308 if (!guest_cpuid_has_osvw(vcpu
))
2310 vcpu
->arch
.osvw
.length
= data
;
2312 case MSR_AMD64_OSVW_STATUS
:
2313 if (!guest_cpuid_has_osvw(vcpu
))
2315 vcpu
->arch
.osvw
.status
= data
;
2318 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2319 return xen_hvm_config(vcpu
, data
);
2320 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2321 return kvm_pmu_set_msr(vcpu
, msr_info
);
2323 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2327 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2334 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2338 * Reads an msr value (of 'msr_index') into 'pdata'.
2339 * Returns 0 on success, non-0 otherwise.
2340 * Assumes vcpu_load() was already called.
2342 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2344 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2346 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2348 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2351 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2352 unsigned bank_num
= mcg_cap
& 0xff;
2355 case MSR_IA32_P5_MC_ADDR
:
2356 case MSR_IA32_P5_MC_TYPE
:
2359 case MSR_IA32_MCG_CAP
:
2360 data
= vcpu
->arch
.mcg_cap
;
2362 case MSR_IA32_MCG_CTL
:
2363 if (!(mcg_cap
& MCG_CTL_P
))
2365 data
= vcpu
->arch
.mcg_ctl
;
2367 case MSR_IA32_MCG_STATUS
:
2368 data
= vcpu
->arch
.mcg_status
;
2371 if (msr
>= MSR_IA32_MC0_CTL
&&
2372 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2373 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2374 data
= vcpu
->arch
.mce_banks
[offset
];
2383 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2385 switch (msr_info
->index
) {
2386 case MSR_IA32_PLATFORM_ID
:
2387 case MSR_IA32_EBL_CR_POWERON
:
2388 case MSR_IA32_DEBUGCTLMSR
:
2389 case MSR_IA32_LASTBRANCHFROMIP
:
2390 case MSR_IA32_LASTBRANCHTOIP
:
2391 case MSR_IA32_LASTINTFROMIP
:
2392 case MSR_IA32_LASTINTTOIP
:
2394 case MSR_K8_TSEG_ADDR
:
2395 case MSR_K8_TSEG_MASK
:
2397 case MSR_VM_HSAVE_PA
:
2398 case MSR_K8_INT_PENDING_MSG
:
2399 case MSR_AMD64_NB_CFG
:
2400 case MSR_FAM10H_MMIO_CONF_BASE
:
2401 case MSR_AMD64_BU_CFG2
:
2402 case MSR_IA32_PERF_CTL
:
2403 case MSR_AMD64_DC_CFG
:
2406 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2407 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2408 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2409 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2410 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2411 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2414 case MSR_IA32_UCODE_REV
:
2415 msr_info
->data
= 0x100000000ULL
;
2418 case 0x200 ... 0x2ff:
2419 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2420 case 0xcd: /* fsb frequency */
2424 * MSR_EBC_FREQUENCY_ID
2425 * Conservative value valid for even the basic CPU models.
2426 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2427 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2428 * and 266MHz for model 3, or 4. Set Core Clock
2429 * Frequency to System Bus Frequency Ratio to 1 (bits
2430 * 31:24) even though these are only valid for CPU
2431 * models > 2, however guests may end up dividing or
2432 * multiplying by zero otherwise.
2434 case MSR_EBC_FREQUENCY_ID
:
2435 msr_info
->data
= 1 << 24;
2437 case MSR_IA32_APICBASE
:
2438 msr_info
->data
= kvm_get_apic_base(vcpu
);
2440 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2441 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2443 case MSR_IA32_TSCDEADLINE
:
2444 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2446 case MSR_IA32_TSC_ADJUST
:
2447 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2449 case MSR_IA32_MISC_ENABLE
:
2450 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2452 case MSR_IA32_SMBASE
:
2453 if (!msr_info
->host_initiated
)
2455 msr_info
->data
= vcpu
->arch
.smbase
;
2457 case MSR_IA32_PERF_STATUS
:
2458 /* TSC increment by tick */
2459 msr_info
->data
= 1000ULL;
2460 /* CPU multiplier */
2461 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2464 msr_info
->data
= vcpu
->arch
.efer
;
2466 case MSR_KVM_WALL_CLOCK
:
2467 case MSR_KVM_WALL_CLOCK_NEW
:
2468 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2470 case MSR_KVM_SYSTEM_TIME
:
2471 case MSR_KVM_SYSTEM_TIME_NEW
:
2472 msr_info
->data
= vcpu
->arch
.time
;
2474 case MSR_KVM_ASYNC_PF_EN
:
2475 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2477 case MSR_KVM_STEAL_TIME
:
2478 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2480 case MSR_KVM_PV_EOI_EN
:
2481 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2483 case MSR_IA32_P5_MC_ADDR
:
2484 case MSR_IA32_P5_MC_TYPE
:
2485 case MSR_IA32_MCG_CAP
:
2486 case MSR_IA32_MCG_CTL
:
2487 case MSR_IA32_MCG_STATUS
:
2488 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2489 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2490 case MSR_K7_CLK_CTL
:
2492 * Provide expected ramp-up count for K7. All other
2493 * are set to zero, indicating minimum divisors for
2496 * This prevents guest kernels on AMD host with CPU
2497 * type 6, model 8 and higher from exploding due to
2498 * the rdmsr failing.
2500 msr_info
->data
= 0x20000000;
2502 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2503 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2504 case HV_X64_MSR_CRASH_CTL
:
2505 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2506 return kvm_hv_get_msr_common(vcpu
,
2507 msr_info
->index
, &msr_info
->data
);
2509 case MSR_IA32_BBL_CR_CTL3
:
2510 /* This legacy MSR exists but isn't fully documented in current
2511 * silicon. It is however accessed by winxp in very narrow
2512 * scenarios where it sets bit #19, itself documented as
2513 * a "reserved" bit. Best effort attempt to source coherent
2514 * read data here should the balance of the register be
2515 * interpreted by the guest:
2517 * L2 cache control register 3: 64GB range, 256KB size,
2518 * enabled, latency 0x1, configured
2520 msr_info
->data
= 0xbe702111;
2522 case MSR_AMD64_OSVW_ID_LENGTH
:
2523 if (!guest_cpuid_has_osvw(vcpu
))
2525 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2527 case MSR_AMD64_OSVW_STATUS
:
2528 if (!guest_cpuid_has_osvw(vcpu
))
2530 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2533 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2534 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2536 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2540 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2547 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2550 * Read or write a bunch of msrs. All parameters are kernel addresses.
2552 * @return number of msrs set successfully.
2554 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2555 struct kvm_msr_entry
*entries
,
2556 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2557 unsigned index
, u64
*data
))
2561 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2562 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2563 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2565 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2571 * Read or write a bunch of msrs. Parameters are user addresses.
2573 * @return number of msrs set successfully.
2575 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2576 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2577 unsigned index
, u64
*data
),
2580 struct kvm_msrs msrs
;
2581 struct kvm_msr_entry
*entries
;
2586 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2590 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2593 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2594 entries
= memdup_user(user_msrs
->entries
, size
);
2595 if (IS_ERR(entries
)) {
2596 r
= PTR_ERR(entries
);
2600 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2605 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2616 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2621 case KVM_CAP_IRQCHIP
:
2623 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2624 case KVM_CAP_SET_TSS_ADDR
:
2625 case KVM_CAP_EXT_CPUID
:
2626 case KVM_CAP_EXT_EMUL_CPUID
:
2627 case KVM_CAP_CLOCKSOURCE
:
2629 case KVM_CAP_NOP_IO_DELAY
:
2630 case KVM_CAP_MP_STATE
:
2631 case KVM_CAP_SYNC_MMU
:
2632 case KVM_CAP_USER_NMI
:
2633 case KVM_CAP_REINJECT_CONTROL
:
2634 case KVM_CAP_IRQ_INJECT_STATUS
:
2635 case KVM_CAP_IOEVENTFD
:
2636 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2638 case KVM_CAP_PIT_STATE2
:
2639 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2640 case KVM_CAP_XEN_HVM
:
2641 case KVM_CAP_VCPU_EVENTS
:
2642 case KVM_CAP_HYPERV
:
2643 case KVM_CAP_HYPERV_VAPIC
:
2644 case KVM_CAP_HYPERV_SPIN
:
2645 case KVM_CAP_HYPERV_SYNIC
:
2646 case KVM_CAP_PCI_SEGMENT
:
2647 case KVM_CAP_DEBUGREGS
:
2648 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2650 case KVM_CAP_ASYNC_PF
:
2651 case KVM_CAP_GET_TSC_KHZ
:
2652 case KVM_CAP_KVMCLOCK_CTRL
:
2653 case KVM_CAP_READONLY_MEM
:
2654 case KVM_CAP_HYPERV_TIME
:
2655 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2656 case KVM_CAP_TSC_DEADLINE_TIMER
:
2657 case KVM_CAP_ENABLE_CAP_VM
:
2658 case KVM_CAP_DISABLE_QUIRKS
:
2659 case KVM_CAP_SET_BOOT_CPU_ID
:
2660 case KVM_CAP_SPLIT_IRQCHIP
:
2661 case KVM_CAP_IMMEDIATE_EXIT
:
2664 case KVM_CAP_ADJUST_CLOCK
:
2665 r
= KVM_CLOCK_TSC_STABLE
;
2667 case KVM_CAP_X86_SMM
:
2668 /* SMBASE is usually relocated above 1M on modern chipsets,
2669 * and SMM handlers might indeed rely on 4G segment limits,
2670 * so do not report SMM to be available if real mode is
2671 * emulated via vm86 mode. Still, do not go to great lengths
2672 * to avoid userspace's usage of the feature, because it is a
2673 * fringe case that is not enabled except via specific settings
2674 * of the module parameters.
2676 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2679 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2681 case KVM_CAP_NR_VCPUS
:
2682 r
= KVM_SOFT_MAX_VCPUS
;
2684 case KVM_CAP_MAX_VCPUS
:
2687 case KVM_CAP_NR_MEMSLOTS
:
2688 r
= KVM_USER_MEM_SLOTS
;
2690 case KVM_CAP_PV_MMU
: /* obsolete */
2694 r
= KVM_MAX_MCE_BANKS
;
2697 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2699 case KVM_CAP_TSC_CONTROL
:
2700 r
= kvm_has_tsc_control
;
2702 case KVM_CAP_X2APIC_API
:
2703 r
= KVM_X2APIC_API_VALID_FLAGS
;
2713 long kvm_arch_dev_ioctl(struct file
*filp
,
2714 unsigned int ioctl
, unsigned long arg
)
2716 void __user
*argp
= (void __user
*)arg
;
2720 case KVM_GET_MSR_INDEX_LIST
: {
2721 struct kvm_msr_list __user
*user_msr_list
= argp
;
2722 struct kvm_msr_list msr_list
;
2726 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2729 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2730 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2733 if (n
< msr_list
.nmsrs
)
2736 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2737 num_msrs_to_save
* sizeof(u32
)))
2739 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2741 num_emulated_msrs
* sizeof(u32
)))
2746 case KVM_GET_SUPPORTED_CPUID
:
2747 case KVM_GET_EMULATED_CPUID
: {
2748 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2749 struct kvm_cpuid2 cpuid
;
2752 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2755 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2761 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2766 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2768 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2769 sizeof(kvm_mce_cap_supported
)))
2781 static void wbinvd_ipi(void *garbage
)
2786 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2788 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2791 static inline void kvm_migrate_timers(struct kvm_vcpu
*vcpu
)
2793 set_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
);
2796 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2798 /* Address WBINVD may be executed by guest */
2799 if (need_emulate_wbinvd(vcpu
)) {
2800 if (kvm_x86_ops
->has_wbinvd_exit())
2801 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2802 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2803 smp_call_function_single(vcpu
->cpu
,
2804 wbinvd_ipi
, NULL
, 1);
2807 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2809 /* Apply any externally detected TSC adjustments (due to suspend) */
2810 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2811 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2812 vcpu
->arch
.tsc_offset_adjustment
= 0;
2813 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2816 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2817 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2818 rdtsc() - vcpu
->arch
.last_host_tsc
;
2820 mark_tsc_unstable("KVM discovered backwards TSC");
2822 if (check_tsc_unstable()) {
2823 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2824 vcpu
->arch
.last_guest_tsc
);
2825 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2826 vcpu
->arch
.tsc_catchup
= 1;
2828 if (kvm_lapic_hv_timer_in_use(vcpu
) &&
2829 kvm_x86_ops
->set_hv_timer(vcpu
,
2830 kvm_get_lapic_target_expiration_tsc(vcpu
)))
2831 kvm_lapic_switch_to_sw_timer(vcpu
);
2833 * On a host with synchronized TSC, there is no need to update
2834 * kvmclock on vcpu->cpu migration
2836 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2837 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2838 if (vcpu
->cpu
!= cpu
)
2839 kvm_migrate_timers(vcpu
);
2843 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2846 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2848 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2851 vcpu
->arch
.st
.steal
.preempted
= 1;
2853 kvm_vcpu_write_guest_offset_cached(vcpu
, &vcpu
->arch
.st
.stime
,
2854 &vcpu
->arch
.st
.steal
.preempted
,
2855 offsetof(struct kvm_steal_time
, preempted
),
2856 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2859 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2863 * Disable page faults because we're in atomic context here.
2864 * kvm_write_guest_offset_cached() would call might_fault()
2865 * that relies on pagefault_disable() to tell if there's a
2866 * bug. NOTE: the write to guest memory may not go through if
2867 * during postcopy live migration or if there's heavy guest
2870 pagefault_disable();
2872 * kvm_memslots() will be called by
2873 * kvm_write_guest_offset_cached() so take the srcu lock.
2875 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2876 kvm_steal_time_set_preempted(vcpu
);
2877 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2879 kvm_x86_ops
->vcpu_put(vcpu
);
2880 kvm_put_guest_fpu(vcpu
);
2881 vcpu
->arch
.last_host_tsc
= rdtsc();
2884 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2885 struct kvm_lapic_state
*s
)
2887 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2888 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2890 return kvm_apic_get_state(vcpu
, s
);
2893 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2894 struct kvm_lapic_state
*s
)
2898 r
= kvm_apic_set_state(vcpu
, s
);
2901 update_cr8_intercept(vcpu
);
2906 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2908 return (!lapic_in_kernel(vcpu
) ||
2909 kvm_apic_accept_pic_intr(vcpu
));
2913 * if userspace requested an interrupt window, check that the
2914 * interrupt window is open.
2916 * No need to exit to userspace if we already have an interrupt queued.
2918 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2920 return kvm_arch_interrupt_allowed(vcpu
) &&
2921 !kvm_cpu_has_interrupt(vcpu
) &&
2922 !kvm_event_needs_reinjection(vcpu
) &&
2923 kvm_cpu_accept_dm_intr(vcpu
);
2926 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2927 struct kvm_interrupt
*irq
)
2929 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2932 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2933 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2934 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2939 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2940 * fail for in-kernel 8259.
2942 if (pic_in_kernel(vcpu
->kvm
))
2945 if (vcpu
->arch
.pending_external_vector
!= -1)
2948 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2949 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2953 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2955 kvm_inject_nmi(vcpu
);
2960 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2962 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2967 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2968 struct kvm_tpr_access_ctl
*tac
)
2972 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2976 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2980 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2983 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2985 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
2988 vcpu
->arch
.mcg_cap
= mcg_cap
;
2989 /* Init IA32_MCG_CTL to all 1s */
2990 if (mcg_cap
& MCG_CTL_P
)
2991 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2992 /* Init IA32_MCi_CTL to all 1s */
2993 for (bank
= 0; bank
< bank_num
; bank
++)
2994 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2996 if (kvm_x86_ops
->setup_mce
)
2997 kvm_x86_ops
->setup_mce(vcpu
);
3002 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3003 struct kvm_x86_mce
*mce
)
3005 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3006 unsigned bank_num
= mcg_cap
& 0xff;
3007 u64
*banks
= vcpu
->arch
.mce_banks
;
3009 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3012 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3013 * reporting is disabled
3015 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3016 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3018 banks
+= 4 * mce
->bank
;
3020 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3021 * reporting is disabled for the bank
3023 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3025 if (mce
->status
& MCI_STATUS_UC
) {
3026 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3027 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3028 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3031 if (banks
[1] & MCI_STATUS_VAL
)
3032 mce
->status
|= MCI_STATUS_OVER
;
3033 banks
[2] = mce
->addr
;
3034 banks
[3] = mce
->misc
;
3035 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3036 banks
[1] = mce
->status
;
3037 kvm_queue_exception(vcpu
, MC_VECTOR
);
3038 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3039 || !(banks
[1] & MCI_STATUS_UC
)) {
3040 if (banks
[1] & MCI_STATUS_VAL
)
3041 mce
->status
|= MCI_STATUS_OVER
;
3042 banks
[2] = mce
->addr
;
3043 banks
[3] = mce
->misc
;
3044 banks
[1] = mce
->status
;
3046 banks
[1] |= MCI_STATUS_OVER
;
3050 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3051 struct kvm_vcpu_events
*events
)
3054 events
->exception
.injected
=
3055 vcpu
->arch
.exception
.pending
&&
3056 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3057 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3058 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3059 events
->exception
.pad
= 0;
3060 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3062 events
->interrupt
.injected
=
3063 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3064 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3065 events
->interrupt
.soft
= 0;
3066 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3068 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3069 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3070 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3071 events
->nmi
.pad
= 0;
3073 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3075 events
->smi
.smm
= is_smm(vcpu
);
3076 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3077 events
->smi
.smm_inside_nmi
=
3078 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3079 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3081 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3082 | KVM_VCPUEVENT_VALID_SHADOW
3083 | KVM_VCPUEVENT_VALID_SMM
);
3084 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3087 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3089 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3090 struct kvm_vcpu_events
*events
)
3092 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3093 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3094 | KVM_VCPUEVENT_VALID_SHADOW
3095 | KVM_VCPUEVENT_VALID_SMM
))
3098 if (events
->exception
.injected
&&
3099 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3100 is_guest_mode(vcpu
)))
3103 /* INITs are latched while in SMM */
3104 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3105 (events
->smi
.smm
|| events
->smi
.pending
) &&
3106 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3110 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3111 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3112 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3113 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3115 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3116 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3117 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3118 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3119 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3120 events
->interrupt
.shadow
);
3122 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3123 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3124 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3125 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3127 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3128 lapic_in_kernel(vcpu
))
3129 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3131 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3132 u32 hflags
= vcpu
->arch
.hflags
;
3133 if (events
->smi
.smm
)
3134 hflags
|= HF_SMM_MASK
;
3136 hflags
&= ~HF_SMM_MASK
;
3137 kvm_set_hflags(vcpu
, hflags
);
3139 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3140 if (events
->smi
.smm_inside_nmi
)
3141 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3143 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3144 if (lapic_in_kernel(vcpu
)) {
3145 if (events
->smi
.latched_init
)
3146 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3148 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3152 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3157 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3158 struct kvm_debugregs
*dbgregs
)
3162 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3163 kvm_get_dr(vcpu
, 6, &val
);
3165 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3167 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3170 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3171 struct kvm_debugregs
*dbgregs
)
3176 if (dbgregs
->dr6
& ~0xffffffffull
)
3178 if (dbgregs
->dr7
& ~0xffffffffull
)
3181 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3182 kvm_update_dr0123(vcpu
);
3183 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3184 kvm_update_dr6(vcpu
);
3185 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3186 kvm_update_dr7(vcpu
);
3191 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3193 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3195 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3196 u64 xstate_bv
= xsave
->header
.xfeatures
;
3200 * Copy legacy XSAVE area, to avoid complications with CPUID
3201 * leaves 0 and 1 in the loop below.
3203 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3206 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3207 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3210 * Copy each region from the possibly compacted offset to the
3211 * non-compacted offset.
3213 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3215 u64 feature
= valid
& -valid
;
3216 int index
= fls64(feature
) - 1;
3217 void *src
= get_xsave_addr(xsave
, feature
);
3220 u32 size
, offset
, ecx
, edx
;
3221 cpuid_count(XSTATE_CPUID
, index
,
3222 &size
, &offset
, &ecx
, &edx
);
3223 memcpy(dest
+ offset
, src
, size
);
3230 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3232 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3233 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3237 * Copy legacy XSAVE area, to avoid complications with CPUID
3238 * leaves 0 and 1 in the loop below.
3240 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3242 /* Set XSTATE_BV and possibly XCOMP_BV. */
3243 xsave
->header
.xfeatures
= xstate_bv
;
3244 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3245 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3248 * Copy each region from the non-compacted offset to the
3249 * possibly compacted offset.
3251 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3253 u64 feature
= valid
& -valid
;
3254 int index
= fls64(feature
) - 1;
3255 void *dest
= get_xsave_addr(xsave
, feature
);
3258 u32 size
, offset
, ecx
, edx
;
3259 cpuid_count(XSTATE_CPUID
, index
,
3260 &size
, &offset
, &ecx
, &edx
);
3261 memcpy(dest
, src
+ offset
, size
);
3268 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3269 struct kvm_xsave
*guest_xsave
)
3271 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3272 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3273 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3275 memcpy(guest_xsave
->region
,
3276 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3277 sizeof(struct fxregs_state
));
3278 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3279 XFEATURE_MASK_FPSSE
;
3283 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3284 struct kvm_xsave
*guest_xsave
)
3287 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3289 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3291 * Here we allow setting states that are not present in
3292 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3293 * with old userspace.
3295 if (xstate_bv
& ~kvm_supported_xcr0())
3297 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3299 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
)
3301 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3302 guest_xsave
->region
, sizeof(struct fxregs_state
));
3307 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3308 struct kvm_xcrs
*guest_xcrs
)
3310 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3311 guest_xcrs
->nr_xcrs
= 0;
3315 guest_xcrs
->nr_xcrs
= 1;
3316 guest_xcrs
->flags
= 0;
3317 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3318 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3321 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3322 struct kvm_xcrs
*guest_xcrs
)
3326 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3329 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3332 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3333 /* Only support XCR0 currently */
3334 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3335 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3336 guest_xcrs
->xcrs
[i
].value
);
3345 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3346 * stopped by the hypervisor. This function will be called from the host only.
3347 * EINVAL is returned when the host attempts to set the flag for a guest that
3348 * does not support pv clocks.
3350 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3352 if (!vcpu
->arch
.pv_time_enabled
)
3354 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3355 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3359 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3360 struct kvm_enable_cap
*cap
)
3366 case KVM_CAP_HYPERV_SYNIC
:
3367 if (!irqchip_in_kernel(vcpu
->kvm
))
3369 return kvm_hv_activate_synic(vcpu
);
3375 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3376 unsigned int ioctl
, unsigned long arg
)
3378 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3379 void __user
*argp
= (void __user
*)arg
;
3382 struct kvm_lapic_state
*lapic
;
3383 struct kvm_xsave
*xsave
;
3384 struct kvm_xcrs
*xcrs
;
3390 case KVM_GET_LAPIC
: {
3392 if (!lapic_in_kernel(vcpu
))
3394 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3399 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3403 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3408 case KVM_SET_LAPIC
: {
3410 if (!lapic_in_kernel(vcpu
))
3412 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3413 if (IS_ERR(u
.lapic
))
3414 return PTR_ERR(u
.lapic
);
3416 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3419 case KVM_INTERRUPT
: {
3420 struct kvm_interrupt irq
;
3423 if (copy_from_user(&irq
, argp
, sizeof irq
))
3425 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3429 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3433 r
= kvm_vcpu_ioctl_smi(vcpu
);
3436 case KVM_SET_CPUID
: {
3437 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3438 struct kvm_cpuid cpuid
;
3441 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3443 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3446 case KVM_SET_CPUID2
: {
3447 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3448 struct kvm_cpuid2 cpuid
;
3451 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3453 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3454 cpuid_arg
->entries
);
3457 case KVM_GET_CPUID2
: {
3458 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3459 struct kvm_cpuid2 cpuid
;
3462 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3464 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3465 cpuid_arg
->entries
);
3469 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3475 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3478 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3480 case KVM_TPR_ACCESS_REPORTING
: {
3481 struct kvm_tpr_access_ctl tac
;
3484 if (copy_from_user(&tac
, argp
, sizeof tac
))
3486 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3490 if (copy_to_user(argp
, &tac
, sizeof tac
))
3495 case KVM_SET_VAPIC_ADDR
: {
3496 struct kvm_vapic_addr va
;
3500 if (!lapic_in_kernel(vcpu
))
3503 if (copy_from_user(&va
, argp
, sizeof va
))
3505 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3506 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3507 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3510 case KVM_X86_SETUP_MCE
: {
3514 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3516 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3519 case KVM_X86_SET_MCE
: {
3520 struct kvm_x86_mce mce
;
3523 if (copy_from_user(&mce
, argp
, sizeof mce
))
3525 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3528 case KVM_GET_VCPU_EVENTS
: {
3529 struct kvm_vcpu_events events
;
3531 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3534 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3539 case KVM_SET_VCPU_EVENTS
: {
3540 struct kvm_vcpu_events events
;
3543 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3546 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3549 case KVM_GET_DEBUGREGS
: {
3550 struct kvm_debugregs dbgregs
;
3552 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3555 if (copy_to_user(argp
, &dbgregs
,
3556 sizeof(struct kvm_debugregs
)))
3561 case KVM_SET_DEBUGREGS
: {
3562 struct kvm_debugregs dbgregs
;
3565 if (copy_from_user(&dbgregs
, argp
,
3566 sizeof(struct kvm_debugregs
)))
3569 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3572 case KVM_GET_XSAVE
: {
3573 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3578 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3581 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3586 case KVM_SET_XSAVE
: {
3587 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3588 if (IS_ERR(u
.xsave
))
3589 return PTR_ERR(u
.xsave
);
3591 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3594 case KVM_GET_XCRS
: {
3595 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3600 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3603 if (copy_to_user(argp
, u
.xcrs
,
3604 sizeof(struct kvm_xcrs
)))
3609 case KVM_SET_XCRS
: {
3610 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3612 return PTR_ERR(u
.xcrs
);
3614 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3617 case KVM_SET_TSC_KHZ
: {
3621 user_tsc_khz
= (u32
)arg
;
3623 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3626 if (user_tsc_khz
== 0)
3627 user_tsc_khz
= tsc_khz
;
3629 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3634 case KVM_GET_TSC_KHZ
: {
3635 r
= vcpu
->arch
.virtual_tsc_khz
;
3638 case KVM_KVMCLOCK_CTRL
: {
3639 r
= kvm_set_guest_paused(vcpu
);
3642 case KVM_ENABLE_CAP
: {
3643 struct kvm_enable_cap cap
;
3646 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3648 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3659 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3661 return VM_FAULT_SIGBUS
;
3664 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3668 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3670 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3674 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3677 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3681 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3682 u32 kvm_nr_mmu_pages
)
3684 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3687 mutex_lock(&kvm
->slots_lock
);
3689 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3690 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3692 mutex_unlock(&kvm
->slots_lock
);
3696 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3698 return kvm
->arch
.n_max_mmu_pages
;
3701 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3703 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3707 switch (chip
->chip_id
) {
3708 case KVM_IRQCHIP_PIC_MASTER
:
3709 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3710 sizeof(struct kvm_pic_state
));
3712 case KVM_IRQCHIP_PIC_SLAVE
:
3713 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3714 sizeof(struct kvm_pic_state
));
3716 case KVM_IRQCHIP_IOAPIC
:
3717 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3726 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3728 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3732 switch (chip
->chip_id
) {
3733 case KVM_IRQCHIP_PIC_MASTER
:
3734 spin_lock(&pic
->lock
);
3735 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3736 sizeof(struct kvm_pic_state
));
3737 spin_unlock(&pic
->lock
);
3739 case KVM_IRQCHIP_PIC_SLAVE
:
3740 spin_lock(&pic
->lock
);
3741 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3742 sizeof(struct kvm_pic_state
));
3743 spin_unlock(&pic
->lock
);
3745 case KVM_IRQCHIP_IOAPIC
:
3746 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3752 kvm_pic_update_irq(pic
);
3756 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3758 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3760 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3762 mutex_lock(&kps
->lock
);
3763 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3764 mutex_unlock(&kps
->lock
);
3768 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3771 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3773 mutex_lock(&pit
->pit_state
.lock
);
3774 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3775 for (i
= 0; i
< 3; i
++)
3776 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3777 mutex_unlock(&pit
->pit_state
.lock
);
3781 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3783 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3784 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3785 sizeof(ps
->channels
));
3786 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3787 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3788 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3792 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3796 u32 prev_legacy
, cur_legacy
;
3797 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3799 mutex_lock(&pit
->pit_state
.lock
);
3800 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3801 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3802 if (!prev_legacy
&& cur_legacy
)
3804 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3805 sizeof(pit
->pit_state
.channels
));
3806 pit
->pit_state
.flags
= ps
->flags
;
3807 for (i
= 0; i
< 3; i
++)
3808 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3810 mutex_unlock(&pit
->pit_state
.lock
);
3814 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3815 struct kvm_reinject_control
*control
)
3817 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3822 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3823 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3824 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3826 mutex_lock(&pit
->pit_state
.lock
);
3827 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3828 mutex_unlock(&pit
->pit_state
.lock
);
3834 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3835 * @kvm: kvm instance
3836 * @log: slot id and address to which we copy the log
3838 * Steps 1-4 below provide general overview of dirty page logging. See
3839 * kvm_get_dirty_log_protect() function description for additional details.
3841 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3842 * always flush the TLB (step 4) even if previous step failed and the dirty
3843 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3844 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3845 * writes will be marked dirty for next log read.
3847 * 1. Take a snapshot of the bit and clear it if needed.
3848 * 2. Write protect the corresponding page.
3849 * 3. Copy the snapshot to the userspace.
3850 * 4. Flush TLB's if needed.
3852 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3854 bool is_dirty
= false;
3857 mutex_lock(&kvm
->slots_lock
);
3860 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3862 if (kvm_x86_ops
->flush_log_dirty
)
3863 kvm_x86_ops
->flush_log_dirty(kvm
);
3865 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3868 * All the TLBs can be flushed out of mmu lock, see the comments in
3869 * kvm_mmu_slot_remove_write_access().
3871 lockdep_assert_held(&kvm
->slots_lock
);
3873 kvm_flush_remote_tlbs(kvm
);
3875 mutex_unlock(&kvm
->slots_lock
);
3879 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3882 if (!irqchip_in_kernel(kvm
))
3885 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3886 irq_event
->irq
, irq_event
->level
,
3891 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3892 struct kvm_enable_cap
*cap
)
3900 case KVM_CAP_DISABLE_QUIRKS
:
3901 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3904 case KVM_CAP_SPLIT_IRQCHIP
: {
3905 mutex_lock(&kvm
->lock
);
3907 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3908 goto split_irqchip_unlock
;
3910 if (irqchip_in_kernel(kvm
))
3911 goto split_irqchip_unlock
;
3912 if (kvm
->created_vcpus
)
3913 goto split_irqchip_unlock
;
3914 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_INIT_IN_PROGRESS
;
3915 r
= kvm_setup_empty_irq_routing(kvm
);
3917 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_NONE
;
3918 /* Pairs with smp_rmb() when reading irqchip_mode */
3920 goto split_irqchip_unlock
;
3922 /* Pairs with irqchip_in_kernel. */
3924 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
3925 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3927 split_irqchip_unlock
:
3928 mutex_unlock(&kvm
->lock
);
3931 case KVM_CAP_X2APIC_API
:
3933 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3936 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3937 kvm
->arch
.x2apic_format
= true;
3938 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3939 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3950 long kvm_arch_vm_ioctl(struct file
*filp
,
3951 unsigned int ioctl
, unsigned long arg
)
3953 struct kvm
*kvm
= filp
->private_data
;
3954 void __user
*argp
= (void __user
*)arg
;
3957 * This union makes it completely explicit to gcc-3.x
3958 * that these two variables' stack usage should be
3959 * combined, not added together.
3962 struct kvm_pit_state ps
;
3963 struct kvm_pit_state2 ps2
;
3964 struct kvm_pit_config pit_config
;
3968 case KVM_SET_TSS_ADDR
:
3969 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3971 case KVM_SET_IDENTITY_MAP_ADDR
: {
3975 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3977 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3980 case KVM_SET_NR_MMU_PAGES
:
3981 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3983 case KVM_GET_NR_MMU_PAGES
:
3984 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3986 case KVM_CREATE_IRQCHIP
: {
3987 mutex_lock(&kvm
->lock
);
3990 if (irqchip_in_kernel(kvm
))
3991 goto create_irqchip_unlock
;
3994 if (kvm
->created_vcpus
)
3995 goto create_irqchip_unlock
;
3997 r
= kvm_pic_init(kvm
);
3999 goto create_irqchip_unlock
;
4001 r
= kvm_ioapic_init(kvm
);
4003 kvm_pic_destroy(kvm
);
4004 goto create_irqchip_unlock
;
4007 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_INIT_IN_PROGRESS
;
4008 r
= kvm_setup_default_irq_routing(kvm
);
4010 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_NONE
;
4011 /* Pairs with smp_rmb() when reading irqchip_mode */
4013 kvm_ioapic_destroy(kvm
);
4014 kvm_pic_destroy(kvm
);
4015 goto create_irqchip_unlock
;
4017 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4019 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4020 create_irqchip_unlock
:
4021 mutex_unlock(&kvm
->lock
);
4024 case KVM_CREATE_PIT
:
4025 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4027 case KVM_CREATE_PIT2
:
4029 if (copy_from_user(&u
.pit_config
, argp
,
4030 sizeof(struct kvm_pit_config
)))
4033 mutex_lock(&kvm
->lock
);
4036 goto create_pit_unlock
;
4038 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4042 mutex_unlock(&kvm
->lock
);
4044 case KVM_GET_IRQCHIP
: {
4045 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4046 struct kvm_irqchip
*chip
;
4048 chip
= memdup_user(argp
, sizeof(*chip
));
4055 if (!irqchip_kernel(kvm
))
4056 goto get_irqchip_out
;
4057 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4059 goto get_irqchip_out
;
4061 if (copy_to_user(argp
, chip
, sizeof *chip
))
4062 goto get_irqchip_out
;
4068 case KVM_SET_IRQCHIP
: {
4069 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4070 struct kvm_irqchip
*chip
;
4072 chip
= memdup_user(argp
, sizeof(*chip
));
4079 if (!irqchip_kernel(kvm
))
4080 goto set_irqchip_out
;
4081 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4083 goto set_irqchip_out
;
4091 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4094 if (!kvm
->arch
.vpit
)
4096 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4100 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4107 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4110 if (!kvm
->arch
.vpit
)
4112 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4115 case KVM_GET_PIT2
: {
4117 if (!kvm
->arch
.vpit
)
4119 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4123 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4128 case KVM_SET_PIT2
: {
4130 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4133 if (!kvm
->arch
.vpit
)
4135 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4138 case KVM_REINJECT_CONTROL
: {
4139 struct kvm_reinject_control control
;
4141 if (copy_from_user(&control
, argp
, sizeof(control
)))
4143 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4146 case KVM_SET_BOOT_CPU_ID
:
4148 mutex_lock(&kvm
->lock
);
4149 if (kvm
->created_vcpus
)
4152 kvm
->arch
.bsp_vcpu_id
= arg
;
4153 mutex_unlock(&kvm
->lock
);
4155 case KVM_XEN_HVM_CONFIG
: {
4157 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4158 sizeof(struct kvm_xen_hvm_config
)))
4161 if (kvm
->arch
.xen_hvm_config
.flags
)
4166 case KVM_SET_CLOCK
: {
4167 struct kvm_clock_data user_ns
;
4171 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4179 local_irq_disable();
4180 now_ns
= __get_kvmclock_ns(kvm
);
4181 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4183 kvm_gen_update_masterclock(kvm
);
4186 case KVM_GET_CLOCK
: {
4187 struct kvm_clock_data user_ns
;
4190 local_irq_disable();
4191 now_ns
= __get_kvmclock_ns(kvm
);
4192 user_ns
.clock
= now_ns
;
4193 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4195 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4198 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4203 case KVM_ENABLE_CAP
: {
4204 struct kvm_enable_cap cap
;
4207 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4209 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4219 static void kvm_init_msr_list(void)
4224 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4225 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4229 * Even MSRs that are valid in the host may not be exposed
4230 * to the guests in some cases.
4232 switch (msrs_to_save
[i
]) {
4233 case MSR_IA32_BNDCFGS
:
4234 if (!kvm_x86_ops
->mpx_supported())
4238 if (!kvm_x86_ops
->rdtscp_supported())
4246 msrs_to_save
[j
] = msrs_to_save
[i
];
4249 num_msrs_to_save
= j
;
4251 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4252 switch (emulated_msrs
[i
]) {
4253 case MSR_IA32_SMBASE
:
4254 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4262 emulated_msrs
[j
] = emulated_msrs
[i
];
4265 num_emulated_msrs
= j
;
4268 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4276 if (!(lapic_in_kernel(vcpu
) &&
4277 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4278 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4289 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4296 if (!(lapic_in_kernel(vcpu
) &&
4297 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4299 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4301 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4311 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4312 struct kvm_segment
*var
, int seg
)
4314 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4317 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4318 struct kvm_segment
*var
, int seg
)
4320 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4323 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4324 struct x86_exception
*exception
)
4328 BUG_ON(!mmu_is_nested(vcpu
));
4330 /* NPT walks are always user-walks */
4331 access
|= PFERR_USER_MASK
;
4332 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4337 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4338 struct x86_exception
*exception
)
4340 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4341 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4344 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4345 struct x86_exception
*exception
)
4347 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4348 access
|= PFERR_FETCH_MASK
;
4349 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4352 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4353 struct x86_exception
*exception
)
4355 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4356 access
|= PFERR_WRITE_MASK
;
4357 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4360 /* uses this to access any guest's mapped memory without checking CPL */
4361 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4362 struct x86_exception
*exception
)
4364 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4367 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4368 struct kvm_vcpu
*vcpu
, u32 access
,
4369 struct x86_exception
*exception
)
4372 int r
= X86EMUL_CONTINUE
;
4375 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4377 unsigned offset
= addr
& (PAGE_SIZE
-1);
4378 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4381 if (gpa
== UNMAPPED_GVA
)
4382 return X86EMUL_PROPAGATE_FAULT
;
4383 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4386 r
= X86EMUL_IO_NEEDED
;
4398 /* used for instruction fetching */
4399 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4400 gva_t addr
, void *val
, unsigned int bytes
,
4401 struct x86_exception
*exception
)
4403 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4404 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4408 /* Inline kvm_read_guest_virt_helper for speed. */
4409 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4411 if (unlikely(gpa
== UNMAPPED_GVA
))
4412 return X86EMUL_PROPAGATE_FAULT
;
4414 offset
= addr
& (PAGE_SIZE
-1);
4415 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4416 bytes
= (unsigned)PAGE_SIZE
- offset
;
4417 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4419 if (unlikely(ret
< 0))
4420 return X86EMUL_IO_NEEDED
;
4422 return X86EMUL_CONTINUE
;
4425 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4426 gva_t addr
, void *val
, unsigned int bytes
,
4427 struct x86_exception
*exception
)
4429 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4430 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4432 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4435 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4437 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4438 gva_t addr
, void *val
, unsigned int bytes
,
4439 struct x86_exception
*exception
)
4441 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4442 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4445 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4446 unsigned long addr
, void *val
, unsigned int bytes
)
4448 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4449 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4451 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4454 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4455 gva_t addr
, void *val
,
4457 struct x86_exception
*exception
)
4459 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4461 int r
= X86EMUL_CONTINUE
;
4464 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4467 unsigned offset
= addr
& (PAGE_SIZE
-1);
4468 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4471 if (gpa
== UNMAPPED_GVA
)
4472 return X86EMUL_PROPAGATE_FAULT
;
4473 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4475 r
= X86EMUL_IO_NEEDED
;
4486 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4488 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4489 gpa_t gpa
, bool write
)
4491 /* For APIC access vmexit */
4492 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4495 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4496 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4503 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4504 gpa_t
*gpa
, struct x86_exception
*exception
,
4507 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4508 | (write
? PFERR_WRITE_MASK
: 0);
4511 * currently PKRU is only applied to ept enabled guest so
4512 * there is no pkey in EPT page table for L1 guest or EPT
4513 * shadow page table for L2 guest.
4515 if (vcpu_match_mmio_gva(vcpu
, gva
)
4516 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4517 vcpu
->arch
.access
, 0, access
)) {
4518 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4519 (gva
& (PAGE_SIZE
- 1));
4520 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4524 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4526 if (*gpa
== UNMAPPED_GVA
)
4529 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4532 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4533 const void *val
, int bytes
)
4537 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4540 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4544 struct read_write_emulator_ops
{
4545 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4547 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4548 void *val
, int bytes
);
4549 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4550 int bytes
, void *val
);
4551 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4552 void *val
, int bytes
);
4556 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4558 if (vcpu
->mmio_read_completed
) {
4559 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4560 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4561 vcpu
->mmio_read_completed
= 0;
4568 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4569 void *val
, int bytes
)
4571 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4574 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4575 void *val
, int bytes
)
4577 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4580 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4582 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4583 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4586 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4587 void *val
, int bytes
)
4589 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4590 return X86EMUL_IO_NEEDED
;
4593 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4594 void *val
, int bytes
)
4596 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4598 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4599 return X86EMUL_CONTINUE
;
4602 static const struct read_write_emulator_ops read_emultor
= {
4603 .read_write_prepare
= read_prepare
,
4604 .read_write_emulate
= read_emulate
,
4605 .read_write_mmio
= vcpu_mmio_read
,
4606 .read_write_exit_mmio
= read_exit_mmio
,
4609 static const struct read_write_emulator_ops write_emultor
= {
4610 .read_write_emulate
= write_emulate
,
4611 .read_write_mmio
= write_mmio
,
4612 .read_write_exit_mmio
= write_exit_mmio
,
4616 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4618 struct x86_exception
*exception
,
4619 struct kvm_vcpu
*vcpu
,
4620 const struct read_write_emulator_ops
*ops
)
4624 bool write
= ops
->write
;
4625 struct kvm_mmio_fragment
*frag
;
4626 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4629 * If the exit was due to a NPF we may already have a GPA.
4630 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4631 * Note, this cannot be used on string operations since string
4632 * operation using rep will only have the initial GPA from the NPF
4635 if (vcpu
->arch
.gpa_available
&&
4636 emulator_can_use_gpa(ctxt
) &&
4637 vcpu_is_mmio_gpa(vcpu
, addr
, exception
->address
, write
) &&
4638 (addr
& ~PAGE_MASK
) == (exception
->address
& ~PAGE_MASK
)) {
4639 gpa
= exception
->address
;
4643 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4646 return X86EMUL_PROPAGATE_FAULT
;
4648 /* For APIC access vmexit */
4652 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4653 return X86EMUL_CONTINUE
;
4657 * Is this MMIO handled locally?
4659 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4660 if (handled
== bytes
)
4661 return X86EMUL_CONTINUE
;
4667 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4668 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4672 return X86EMUL_CONTINUE
;
4675 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4677 void *val
, unsigned int bytes
,
4678 struct x86_exception
*exception
,
4679 const struct read_write_emulator_ops
*ops
)
4681 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4685 if (ops
->read_write_prepare
&&
4686 ops
->read_write_prepare(vcpu
, val
, bytes
))
4687 return X86EMUL_CONTINUE
;
4689 vcpu
->mmio_nr_fragments
= 0;
4691 /* Crossing a page boundary? */
4692 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4695 now
= -addr
& ~PAGE_MASK
;
4696 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4699 if (rc
!= X86EMUL_CONTINUE
)
4702 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4708 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4710 if (rc
!= X86EMUL_CONTINUE
)
4713 if (!vcpu
->mmio_nr_fragments
)
4716 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4718 vcpu
->mmio_needed
= 1;
4719 vcpu
->mmio_cur_fragment
= 0;
4721 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4722 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4723 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4724 vcpu
->run
->mmio
.phys_addr
= gpa
;
4726 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4729 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4733 struct x86_exception
*exception
)
4735 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4736 exception
, &read_emultor
);
4739 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4743 struct x86_exception
*exception
)
4745 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4746 exception
, &write_emultor
);
4749 #define CMPXCHG_TYPE(t, ptr, old, new) \
4750 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4752 #ifdef CONFIG_X86_64
4753 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4755 # define CMPXCHG64(ptr, old, new) \
4756 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4759 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4764 struct x86_exception
*exception
)
4766 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4772 /* guests cmpxchg8b have to be emulated atomically */
4773 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4776 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4778 if (gpa
== UNMAPPED_GVA
||
4779 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4782 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4785 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4786 if (is_error_page(page
))
4789 kaddr
= kmap_atomic(page
);
4790 kaddr
+= offset_in_page(gpa
);
4793 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4796 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4799 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4802 exchanged
= CMPXCHG64(kaddr
, old
, new);
4807 kunmap_atomic(kaddr
);
4808 kvm_release_page_dirty(page
);
4811 return X86EMUL_CMPXCHG_FAILED
;
4813 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4814 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4816 return X86EMUL_CONTINUE
;
4819 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4821 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4824 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4826 /* TODO: String I/O for in kernel device */
4829 if (vcpu
->arch
.pio
.in
)
4830 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4831 vcpu
->arch
.pio
.size
, pd
);
4833 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4834 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4839 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4840 unsigned short port
, void *val
,
4841 unsigned int count
, bool in
)
4843 vcpu
->arch
.pio
.port
= port
;
4844 vcpu
->arch
.pio
.in
= in
;
4845 vcpu
->arch
.pio
.count
= count
;
4846 vcpu
->arch
.pio
.size
= size
;
4848 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4849 vcpu
->arch
.pio
.count
= 0;
4853 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4854 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4855 vcpu
->run
->io
.size
= size
;
4856 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4857 vcpu
->run
->io
.count
= count
;
4858 vcpu
->run
->io
.port
= port
;
4863 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4864 int size
, unsigned short port
, void *val
,
4867 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4870 if (vcpu
->arch
.pio
.count
)
4873 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4876 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4877 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4878 vcpu
->arch
.pio
.count
= 0;
4885 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4886 int size
, unsigned short port
,
4887 const void *val
, unsigned int count
)
4889 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4891 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4892 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4893 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4896 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4898 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4901 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4903 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4906 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4908 if (!need_emulate_wbinvd(vcpu
))
4909 return X86EMUL_CONTINUE
;
4911 if (kvm_x86_ops
->has_wbinvd_exit()) {
4912 int cpu
= get_cpu();
4914 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4915 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4916 wbinvd_ipi
, NULL
, 1);
4918 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4921 return X86EMUL_CONTINUE
;
4924 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4926 kvm_emulate_wbinvd_noskip(vcpu
);
4927 return kvm_skip_emulated_instruction(vcpu
);
4929 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4933 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4935 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4938 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4939 unsigned long *dest
)
4941 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4944 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4945 unsigned long value
)
4948 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4951 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4953 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4956 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4958 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4959 unsigned long value
;
4963 value
= kvm_read_cr0(vcpu
);
4966 value
= vcpu
->arch
.cr2
;
4969 value
= kvm_read_cr3(vcpu
);
4972 value
= kvm_read_cr4(vcpu
);
4975 value
= kvm_get_cr8(vcpu
);
4978 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4985 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4987 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4992 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4995 vcpu
->arch
.cr2
= val
;
4998 res
= kvm_set_cr3(vcpu
, val
);
5001 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5004 res
= kvm_set_cr8(vcpu
, val
);
5007 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5014 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5016 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5019 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5021 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5024 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5026 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5029 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5031 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5034 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5036 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5039 static unsigned long emulator_get_cached_segment_base(
5040 struct x86_emulate_ctxt
*ctxt
, int seg
)
5042 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5045 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5046 struct desc_struct
*desc
, u32
*base3
,
5049 struct kvm_segment var
;
5051 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5052 *selector
= var
.selector
;
5055 memset(desc
, 0, sizeof(*desc
));
5061 set_desc_limit(desc
, var
.limit
);
5062 set_desc_base(desc
, (unsigned long)var
.base
);
5063 #ifdef CONFIG_X86_64
5065 *base3
= var
.base
>> 32;
5067 desc
->type
= var
.type
;
5069 desc
->dpl
= var
.dpl
;
5070 desc
->p
= var
.present
;
5071 desc
->avl
= var
.avl
;
5079 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5080 struct desc_struct
*desc
, u32 base3
,
5083 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5084 struct kvm_segment var
;
5086 var
.selector
= selector
;
5087 var
.base
= get_desc_base(desc
);
5088 #ifdef CONFIG_X86_64
5089 var
.base
|= ((u64
)base3
) << 32;
5091 var
.limit
= get_desc_limit(desc
);
5093 var
.limit
= (var
.limit
<< 12) | 0xfff;
5094 var
.type
= desc
->type
;
5095 var
.dpl
= desc
->dpl
;
5100 var
.avl
= desc
->avl
;
5101 var
.present
= desc
->p
;
5102 var
.unusable
= !var
.present
;
5105 kvm_set_segment(vcpu
, &var
, seg
);
5109 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5110 u32 msr_index
, u64
*pdata
)
5112 struct msr_data msr
;
5115 msr
.index
= msr_index
;
5116 msr
.host_initiated
= false;
5117 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5125 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5126 u32 msr_index
, u64 data
)
5128 struct msr_data msr
;
5131 msr
.index
= msr_index
;
5132 msr
.host_initiated
= false;
5133 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5136 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5138 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5140 return vcpu
->arch
.smbase
;
5143 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5145 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5147 vcpu
->arch
.smbase
= smbase
;
5150 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5153 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5156 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5157 u32 pmc
, u64
*pdata
)
5159 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5162 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5164 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5167 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5170 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5173 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5178 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5179 struct x86_instruction_info
*info
,
5180 enum x86_intercept_stage stage
)
5182 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5185 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5186 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5188 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5191 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5193 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5196 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5198 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5201 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5203 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5206 static const struct x86_emulate_ops emulate_ops
= {
5207 .read_gpr
= emulator_read_gpr
,
5208 .write_gpr
= emulator_write_gpr
,
5209 .read_std
= kvm_read_guest_virt_system
,
5210 .write_std
= kvm_write_guest_virt_system
,
5211 .read_phys
= kvm_read_guest_phys_system
,
5212 .fetch
= kvm_fetch_guest_virt
,
5213 .read_emulated
= emulator_read_emulated
,
5214 .write_emulated
= emulator_write_emulated
,
5215 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5216 .invlpg
= emulator_invlpg
,
5217 .pio_in_emulated
= emulator_pio_in_emulated
,
5218 .pio_out_emulated
= emulator_pio_out_emulated
,
5219 .get_segment
= emulator_get_segment
,
5220 .set_segment
= emulator_set_segment
,
5221 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5222 .get_gdt
= emulator_get_gdt
,
5223 .get_idt
= emulator_get_idt
,
5224 .set_gdt
= emulator_set_gdt
,
5225 .set_idt
= emulator_set_idt
,
5226 .get_cr
= emulator_get_cr
,
5227 .set_cr
= emulator_set_cr
,
5228 .cpl
= emulator_get_cpl
,
5229 .get_dr
= emulator_get_dr
,
5230 .set_dr
= emulator_set_dr
,
5231 .get_smbase
= emulator_get_smbase
,
5232 .set_smbase
= emulator_set_smbase
,
5233 .set_msr
= emulator_set_msr
,
5234 .get_msr
= emulator_get_msr
,
5235 .check_pmc
= emulator_check_pmc
,
5236 .read_pmc
= emulator_read_pmc
,
5237 .halt
= emulator_halt
,
5238 .wbinvd
= emulator_wbinvd
,
5239 .fix_hypercall
= emulator_fix_hypercall
,
5240 .get_fpu
= emulator_get_fpu
,
5241 .put_fpu
= emulator_put_fpu
,
5242 .intercept
= emulator_intercept
,
5243 .get_cpuid
= emulator_get_cpuid
,
5244 .set_nmi_mask
= emulator_set_nmi_mask
,
5247 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5249 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5251 * an sti; sti; sequence only disable interrupts for the first
5252 * instruction. So, if the last instruction, be it emulated or
5253 * not, left the system with the INT_STI flag enabled, it
5254 * means that the last instruction is an sti. We should not
5255 * leave the flag on in this case. The same goes for mov ss
5257 if (int_shadow
& mask
)
5259 if (unlikely(int_shadow
|| mask
)) {
5260 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5262 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5266 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5268 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5269 if (ctxt
->exception
.vector
== PF_VECTOR
)
5270 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5272 if (ctxt
->exception
.error_code_valid
)
5273 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5274 ctxt
->exception
.error_code
);
5276 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5280 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5282 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5285 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5287 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5288 ctxt
->eip
= kvm_rip_read(vcpu
);
5289 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5290 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5291 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5292 cs_db
? X86EMUL_MODE_PROT32
:
5293 X86EMUL_MODE_PROT16
;
5294 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5295 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5296 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5297 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5299 init_decode_cache(ctxt
);
5300 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5303 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5305 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5308 init_emulate_ctxt(vcpu
);
5312 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5313 ret
= emulate_int_real(ctxt
, irq
);
5315 if (ret
!= X86EMUL_CONTINUE
)
5316 return EMULATE_FAIL
;
5318 ctxt
->eip
= ctxt
->_eip
;
5319 kvm_rip_write(vcpu
, ctxt
->eip
);
5320 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5322 if (irq
== NMI_VECTOR
)
5323 vcpu
->arch
.nmi_pending
= 0;
5325 vcpu
->arch
.interrupt
.pending
= false;
5327 return EMULATE_DONE
;
5329 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5331 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5333 int r
= EMULATE_DONE
;
5335 ++vcpu
->stat
.insn_emulation_fail
;
5336 trace_kvm_emulate_insn_failed(vcpu
);
5337 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5338 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5339 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5340 vcpu
->run
->internal
.ndata
= 0;
5343 kvm_queue_exception(vcpu
, UD_VECTOR
);
5348 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5349 bool write_fault_to_shadow_pgtable
,
5355 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5358 if (!vcpu
->arch
.mmu
.direct_map
) {
5360 * Write permission should be allowed since only
5361 * write access need to be emulated.
5363 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5366 * If the mapping is invalid in guest, let cpu retry
5367 * it to generate fault.
5369 if (gpa
== UNMAPPED_GVA
)
5374 * Do not retry the unhandleable instruction if it faults on the
5375 * readonly host memory, otherwise it will goto a infinite loop:
5376 * retry instruction -> write #PF -> emulation fail -> retry
5377 * instruction -> ...
5379 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5382 * If the instruction failed on the error pfn, it can not be fixed,
5383 * report the error to userspace.
5385 if (is_error_noslot_pfn(pfn
))
5388 kvm_release_pfn_clean(pfn
);
5390 /* The instructions are well-emulated on direct mmu. */
5391 if (vcpu
->arch
.mmu
.direct_map
) {
5392 unsigned int indirect_shadow_pages
;
5394 spin_lock(&vcpu
->kvm
->mmu_lock
);
5395 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5396 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5398 if (indirect_shadow_pages
)
5399 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5405 * if emulation was due to access to shadowed page table
5406 * and it failed try to unshadow page and re-enter the
5407 * guest to let CPU execute the instruction.
5409 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5412 * If the access faults on its page table, it can not
5413 * be fixed by unprotecting shadow page and it should
5414 * be reported to userspace.
5416 return !write_fault_to_shadow_pgtable
;
5419 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5420 unsigned long cr2
, int emulation_type
)
5422 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5423 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5425 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5426 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5429 * If the emulation is caused by #PF and it is non-page_table
5430 * writing instruction, it means the VM-EXIT is caused by shadow
5431 * page protected, we can zap the shadow page and retry this
5432 * instruction directly.
5434 * Note: if the guest uses a non-page-table modifying instruction
5435 * on the PDE that points to the instruction, then we will unmap
5436 * the instruction and go to an infinite loop. So, we cache the
5437 * last retried eip and the last fault address, if we meet the eip
5438 * and the address again, we can break out of the potential infinite
5441 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5443 if (!(emulation_type
& EMULTYPE_RETRY
))
5446 if (x86_page_table_writing_insn(ctxt
))
5449 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5452 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5453 vcpu
->arch
.last_retry_addr
= cr2
;
5455 if (!vcpu
->arch
.mmu
.direct_map
)
5456 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5458 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5463 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5464 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5466 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5468 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5469 /* This is a good place to trace that we are exiting SMM. */
5470 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5472 /* Process a latched INIT or SMI, if any. */
5473 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5476 kvm_mmu_reset_context(vcpu
);
5479 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5481 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5483 vcpu
->arch
.hflags
= emul_flags
;
5485 if (changed
& HF_SMM_MASK
)
5486 kvm_smm_changed(vcpu
);
5489 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5498 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5499 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5504 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5506 struct kvm_run
*kvm_run
= vcpu
->run
;
5509 * rflags is the old, "raw" value of the flags. The new value has
5510 * not been saved yet.
5512 * This is correct even for TF set by the guest, because "the
5513 * processor will not generate this exception after the instruction
5514 * that sets the TF flag".
5516 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5517 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5518 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5520 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5521 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5522 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5523 *r
= EMULATE_USER_EXIT
;
5526 * "Certain debug exceptions may clear bit 0-3. The
5527 * remaining contents of the DR6 register are never
5528 * cleared by the processor".
5530 vcpu
->arch
.dr6
&= ~15;
5531 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5532 kvm_queue_exception(vcpu
, DB_VECTOR
);
5537 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5539 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5540 int r
= EMULATE_DONE
;
5542 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5543 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5544 return r
== EMULATE_DONE
;
5546 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5548 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5550 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5551 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5552 struct kvm_run
*kvm_run
= vcpu
->run
;
5553 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5554 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5555 vcpu
->arch
.guest_debug_dr7
,
5559 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5560 kvm_run
->debug
.arch
.pc
= eip
;
5561 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5562 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5563 *r
= EMULATE_USER_EXIT
;
5568 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5569 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5570 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5571 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5576 vcpu
->arch
.dr6
&= ~15;
5577 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5578 kvm_queue_exception(vcpu
, DB_VECTOR
);
5587 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5594 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5595 bool writeback
= true;
5596 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5599 * Clear write_fault_to_shadow_pgtable here to ensure it is
5602 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5603 kvm_clear_exception_queue(vcpu
);
5605 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5606 init_emulate_ctxt(vcpu
);
5609 * We will reenter on the same instruction since
5610 * we do not set complete_userspace_io. This does not
5611 * handle watchpoints yet, those would be handled in
5614 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5617 ctxt
->interruptibility
= 0;
5618 ctxt
->have_exception
= false;
5619 ctxt
->exception
.vector
= -1;
5620 ctxt
->perm_ok
= false;
5622 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5624 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5626 trace_kvm_emulate_insn_start(vcpu
);
5627 ++vcpu
->stat
.insn_emulation
;
5628 if (r
!= EMULATION_OK
) {
5629 if (emulation_type
& EMULTYPE_TRAP_UD
)
5630 return EMULATE_FAIL
;
5631 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5633 return EMULATE_DONE
;
5634 if (emulation_type
& EMULTYPE_SKIP
)
5635 return EMULATE_FAIL
;
5636 return handle_emulation_failure(vcpu
);
5640 if (emulation_type
& EMULTYPE_SKIP
) {
5641 kvm_rip_write(vcpu
, ctxt
->_eip
);
5642 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5643 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5644 return EMULATE_DONE
;
5647 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5648 return EMULATE_DONE
;
5650 /* this is needed for vmware backdoor interface to work since it
5651 changes registers values during IO operation */
5652 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5653 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5654 emulator_invalidate_register_cache(ctxt
);
5658 /* Save the faulting GPA (cr2) in the address field */
5659 ctxt
->exception
.address
= cr2
;
5661 r
= x86_emulate_insn(ctxt
);
5663 if (r
== EMULATION_INTERCEPTED
)
5664 return EMULATE_DONE
;
5666 if (r
== EMULATION_FAILED
) {
5667 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5669 return EMULATE_DONE
;
5671 return handle_emulation_failure(vcpu
);
5674 if (ctxt
->have_exception
) {
5676 if (inject_emulated_exception(vcpu
))
5678 } else if (vcpu
->arch
.pio
.count
) {
5679 if (!vcpu
->arch
.pio
.in
) {
5680 /* FIXME: return into emulator if single-stepping. */
5681 vcpu
->arch
.pio
.count
= 0;
5684 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5686 r
= EMULATE_USER_EXIT
;
5687 } else if (vcpu
->mmio_needed
) {
5688 if (!vcpu
->mmio_is_write
)
5690 r
= EMULATE_USER_EXIT
;
5691 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5692 } else if (r
== EMULATION_RESTART
)
5698 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5699 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5700 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5701 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5702 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5703 kvm_rip_write(vcpu
, ctxt
->eip
);
5704 if (r
== EMULATE_DONE
)
5705 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5706 if (!ctxt
->have_exception
||
5707 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5708 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5711 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5712 * do nothing, and it will be requested again as soon as
5713 * the shadow expires. But we still need to check here,
5714 * because POPF has no interrupt shadow.
5716 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5717 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5719 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5723 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5725 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5727 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5728 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5729 size
, port
, &val
, 1);
5730 /* do not return to emulator after return from userspace */
5731 vcpu
->arch
.pio
.count
= 0;
5734 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5736 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5740 /* We should only ever be called with arch.pio.count equal to 1 */
5741 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5743 /* For size less than 4 we merge, else we zero extend */
5744 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5748 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5749 * the copy and tracing
5751 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5752 vcpu
->arch
.pio
.port
, &val
, 1);
5753 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5758 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5763 /* For size less than 4 we merge, else we zero extend */
5764 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5766 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5769 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5773 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5777 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5779 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5781 __this_cpu_write(cpu_tsc_khz
, 0);
5785 static void tsc_khz_changed(void *data
)
5787 struct cpufreq_freqs
*freq
= data
;
5788 unsigned long khz
= 0;
5792 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5793 khz
= cpufreq_quick_get(raw_smp_processor_id());
5796 __this_cpu_write(cpu_tsc_khz
, khz
);
5799 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5802 struct cpufreq_freqs
*freq
= data
;
5804 struct kvm_vcpu
*vcpu
;
5805 int i
, send_ipi
= 0;
5808 * We allow guests to temporarily run on slowing clocks,
5809 * provided we notify them after, or to run on accelerating
5810 * clocks, provided we notify them before. Thus time never
5813 * However, we have a problem. We can't atomically update
5814 * the frequency of a given CPU from this function; it is
5815 * merely a notifier, which can be called from any CPU.
5816 * Changing the TSC frequency at arbitrary points in time
5817 * requires a recomputation of local variables related to
5818 * the TSC for each VCPU. We must flag these local variables
5819 * to be updated and be sure the update takes place with the
5820 * new frequency before any guests proceed.
5822 * Unfortunately, the combination of hotplug CPU and frequency
5823 * change creates an intractable locking scenario; the order
5824 * of when these callouts happen is undefined with respect to
5825 * CPU hotplug, and they can race with each other. As such,
5826 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5827 * undefined; you can actually have a CPU frequency change take
5828 * place in between the computation of X and the setting of the
5829 * variable. To protect against this problem, all updates of
5830 * the per_cpu tsc_khz variable are done in an interrupt
5831 * protected IPI, and all callers wishing to update the value
5832 * must wait for a synchronous IPI to complete (which is trivial
5833 * if the caller is on the CPU already). This establishes the
5834 * necessary total order on variable updates.
5836 * Note that because a guest time update may take place
5837 * anytime after the setting of the VCPU's request bit, the
5838 * correct TSC value must be set before the request. However,
5839 * to ensure the update actually makes it to any guest which
5840 * starts running in hardware virtualization between the set
5841 * and the acquisition of the spinlock, we must also ping the
5842 * CPU after setting the request bit.
5846 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5848 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5851 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5853 spin_lock(&kvm_lock
);
5854 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5855 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5856 if (vcpu
->cpu
!= freq
->cpu
)
5858 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5859 if (vcpu
->cpu
!= smp_processor_id())
5863 spin_unlock(&kvm_lock
);
5865 if (freq
->old
< freq
->new && send_ipi
) {
5867 * We upscale the frequency. Must make the guest
5868 * doesn't see old kvmclock values while running with
5869 * the new frequency, otherwise we risk the guest sees
5870 * time go backwards.
5872 * In case we update the frequency for another cpu
5873 * (which might be in guest context) send an interrupt
5874 * to kick the cpu out of guest context. Next time
5875 * guest context is entered kvmclock will be updated,
5876 * so the guest will not see stale values.
5878 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5883 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5884 .notifier_call
= kvmclock_cpufreq_notifier
5887 static int kvmclock_cpu_online(unsigned int cpu
)
5889 tsc_khz_changed(NULL
);
5893 static void kvm_timer_init(void)
5895 max_tsc_khz
= tsc_khz
;
5897 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5898 #ifdef CONFIG_CPU_FREQ
5899 struct cpufreq_policy policy
;
5902 memset(&policy
, 0, sizeof(policy
));
5904 cpufreq_get_policy(&policy
, cpu
);
5905 if (policy
.cpuinfo
.max_freq
)
5906 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5909 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5910 CPUFREQ_TRANSITION_NOTIFIER
);
5912 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5914 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5915 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5918 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5920 int kvm_is_in_guest(void)
5922 return __this_cpu_read(current_vcpu
) != NULL
;
5925 static int kvm_is_user_mode(void)
5929 if (__this_cpu_read(current_vcpu
))
5930 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5932 return user_mode
!= 0;
5935 static unsigned long kvm_get_guest_ip(void)
5937 unsigned long ip
= 0;
5939 if (__this_cpu_read(current_vcpu
))
5940 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5945 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5946 .is_in_guest
= kvm_is_in_guest
,
5947 .is_user_mode
= kvm_is_user_mode
,
5948 .get_guest_ip
= kvm_get_guest_ip
,
5951 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5953 __this_cpu_write(current_vcpu
, vcpu
);
5955 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5957 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5959 __this_cpu_write(current_vcpu
, NULL
);
5961 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5963 static void kvm_set_mmio_spte_mask(void)
5966 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5969 * Set the reserved bits and the present bit of an paging-structure
5970 * entry to generate page fault with PFER.RSV = 1.
5972 /* Mask the reserved physical address bits. */
5973 mask
= rsvd_bits(maxphyaddr
, 51);
5975 /* Set the present bit. */
5978 #ifdef CONFIG_X86_64
5980 * If reserved bit is not supported, clear the present bit to disable
5983 if (maxphyaddr
== 52)
5987 kvm_mmu_set_mmio_spte_mask(mask
);
5990 #ifdef CONFIG_X86_64
5991 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5995 struct kvm_vcpu
*vcpu
;
5998 spin_lock(&kvm_lock
);
5999 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6000 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6001 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6002 atomic_set(&kvm_guest_has_master_clock
, 0);
6003 spin_unlock(&kvm_lock
);
6006 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6009 * Notification about pvclock gtod data update.
6011 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6014 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6015 struct timekeeper
*tk
= priv
;
6017 update_pvclock_gtod(tk
);
6019 /* disable master clock if host does not trust, or does not
6020 * use, TSC clocksource
6022 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6023 atomic_read(&kvm_guest_has_master_clock
) != 0)
6024 queue_work(system_long_wq
, &pvclock_gtod_work
);
6029 static struct notifier_block pvclock_gtod_notifier
= {
6030 .notifier_call
= pvclock_gtod_notify
,
6034 int kvm_arch_init(void *opaque
)
6037 struct kvm_x86_ops
*ops
= opaque
;
6040 printk(KERN_ERR
"kvm: already loaded the other module\n");
6045 if (!ops
->cpu_has_kvm_support()) {
6046 printk(KERN_ERR
"kvm: no hardware support\n");
6050 if (ops
->disabled_by_bios()) {
6051 printk(KERN_ERR
"kvm: disabled by bios\n");
6057 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6059 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6063 r
= kvm_mmu_module_init();
6065 goto out_free_percpu
;
6067 kvm_set_mmio_spte_mask();
6071 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6072 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6073 PT_PRESENT_MASK
, 0);
6076 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6078 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6079 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6082 #ifdef CONFIG_X86_64
6083 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6089 free_percpu(shared_msrs
);
6094 void kvm_arch_exit(void)
6097 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6099 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6100 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6101 CPUFREQ_TRANSITION_NOTIFIER
);
6102 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6103 #ifdef CONFIG_X86_64
6104 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6107 kvm_mmu_module_exit();
6108 free_percpu(shared_msrs
);
6111 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6113 ++vcpu
->stat
.halt_exits
;
6114 if (lapic_in_kernel(vcpu
)) {
6115 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6118 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6122 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6124 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6126 int ret
= kvm_skip_emulated_instruction(vcpu
);
6128 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6129 * KVM_EXIT_DEBUG here.
6131 return kvm_vcpu_halt(vcpu
) && ret
;
6133 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6135 #ifdef CONFIG_X86_64
6136 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6137 unsigned long clock_type
)
6139 struct kvm_clock_pairing clock_pairing
;
6144 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6145 return -KVM_EOPNOTSUPP
;
6147 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6148 return -KVM_EOPNOTSUPP
;
6150 clock_pairing
.sec
= ts
.tv_sec
;
6151 clock_pairing
.nsec
= ts
.tv_nsec
;
6152 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6153 clock_pairing
.flags
= 0;
6156 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6157 sizeof(struct kvm_clock_pairing
)))
6165 * kvm_pv_kick_cpu_op: Kick a vcpu.
6167 * @apicid - apicid of vcpu to be kicked.
6169 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6171 struct kvm_lapic_irq lapic_irq
;
6173 lapic_irq
.shorthand
= 0;
6174 lapic_irq
.dest_mode
= 0;
6175 lapic_irq
.dest_id
= apicid
;
6176 lapic_irq
.msi_redir_hint
= false;
6178 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6179 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6182 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6184 vcpu
->arch
.apicv_active
= false;
6185 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6188 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6190 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6193 r
= kvm_skip_emulated_instruction(vcpu
);
6195 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6196 return kvm_hv_hypercall(vcpu
);
6198 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6199 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6200 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6201 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6202 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6204 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6206 op_64_bit
= is_64_bit_mode(vcpu
);
6215 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6221 case KVM_HC_VAPIC_POLL_IRQ
:
6224 case KVM_HC_KICK_CPU
:
6225 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6228 #ifdef CONFIG_X86_64
6229 case KVM_HC_CLOCK_PAIRING
:
6230 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6240 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6241 ++vcpu
->stat
.hypercalls
;
6244 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6246 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6248 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6249 char instruction
[3];
6250 unsigned long rip
= kvm_rip_read(vcpu
);
6252 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6254 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6258 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6260 return vcpu
->run
->request_interrupt_window
&&
6261 likely(!pic_in_kernel(vcpu
->kvm
));
6264 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6266 struct kvm_run
*kvm_run
= vcpu
->run
;
6268 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6269 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6270 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6271 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6272 kvm_run
->ready_for_interrupt_injection
=
6273 pic_in_kernel(vcpu
->kvm
) ||
6274 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6277 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6281 if (!kvm_x86_ops
->update_cr8_intercept
)
6284 if (!lapic_in_kernel(vcpu
))
6287 if (vcpu
->arch
.apicv_active
)
6290 if (!vcpu
->arch
.apic
->vapic_addr
)
6291 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6298 tpr
= kvm_lapic_get_cr8(vcpu
);
6300 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6303 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6307 /* try to reinject previous events if any */
6308 if (vcpu
->arch
.exception
.pending
) {
6309 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6310 vcpu
->arch
.exception
.has_error_code
,
6311 vcpu
->arch
.exception
.error_code
);
6313 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6314 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6317 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6318 (vcpu
->arch
.dr7
& DR7_GD
)) {
6319 vcpu
->arch
.dr7
&= ~DR7_GD
;
6320 kvm_update_dr7(vcpu
);
6323 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6324 vcpu
->arch
.exception
.has_error_code
,
6325 vcpu
->arch
.exception
.error_code
,
6326 vcpu
->arch
.exception
.reinject
);
6330 if (vcpu
->arch
.nmi_injected
) {
6331 kvm_x86_ops
->set_nmi(vcpu
);
6335 if (vcpu
->arch
.interrupt
.pending
) {
6336 kvm_x86_ops
->set_irq(vcpu
);
6340 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6341 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6346 /* try to inject new event if pending */
6347 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6348 vcpu
->arch
.smi_pending
= false;
6350 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6351 --vcpu
->arch
.nmi_pending
;
6352 vcpu
->arch
.nmi_injected
= true;
6353 kvm_x86_ops
->set_nmi(vcpu
);
6354 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6356 * Because interrupts can be injected asynchronously, we are
6357 * calling check_nested_events again here to avoid a race condition.
6358 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6359 * proposal and current concerns. Perhaps we should be setting
6360 * KVM_REQ_EVENT only on certain events and not unconditionally?
6362 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6363 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6367 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6368 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6370 kvm_x86_ops
->set_irq(vcpu
);
6377 static void process_nmi(struct kvm_vcpu
*vcpu
)
6382 * x86 is limited to one NMI running, and one NMI pending after it.
6383 * If an NMI is already in progress, limit further NMIs to just one.
6384 * Otherwise, allow two (and we'll inject the first one immediately).
6386 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6389 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6390 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6391 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6394 #define put_smstate(type, buf, offset, val) \
6395 *(type *)((buf) + (offset) - 0x7e00) = val
6397 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6400 flags
|= seg
->g
<< 23;
6401 flags
|= seg
->db
<< 22;
6402 flags
|= seg
->l
<< 21;
6403 flags
|= seg
->avl
<< 20;
6404 flags
|= seg
->present
<< 15;
6405 flags
|= seg
->dpl
<< 13;
6406 flags
|= seg
->s
<< 12;
6407 flags
|= seg
->type
<< 8;
6411 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6413 struct kvm_segment seg
;
6416 kvm_get_segment(vcpu
, &seg
, n
);
6417 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6420 offset
= 0x7f84 + n
* 12;
6422 offset
= 0x7f2c + (n
- 3) * 12;
6424 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6425 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6426 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6429 #ifdef CONFIG_X86_64
6430 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6432 struct kvm_segment seg
;
6436 kvm_get_segment(vcpu
, &seg
, n
);
6437 offset
= 0x7e00 + n
* 16;
6439 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6440 put_smstate(u16
, buf
, offset
, seg
.selector
);
6441 put_smstate(u16
, buf
, offset
+ 2, flags
);
6442 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6443 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6447 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6450 struct kvm_segment seg
;
6454 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6455 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6456 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6457 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6459 for (i
= 0; i
< 8; i
++)
6460 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6462 kvm_get_dr(vcpu
, 6, &val
);
6463 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6464 kvm_get_dr(vcpu
, 7, &val
);
6465 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6467 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6468 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6469 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6470 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6471 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6473 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6474 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6475 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6476 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6477 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6479 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6480 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6481 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6483 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6484 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6485 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6487 for (i
= 0; i
< 6; i
++)
6488 enter_smm_save_seg_32(vcpu
, buf
, i
);
6490 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6493 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6494 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6497 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6499 #ifdef CONFIG_X86_64
6501 struct kvm_segment seg
;
6505 for (i
= 0; i
< 16; i
++)
6506 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6508 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6509 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6511 kvm_get_dr(vcpu
, 6, &val
);
6512 put_smstate(u64
, buf
, 0x7f68, val
);
6513 kvm_get_dr(vcpu
, 7, &val
);
6514 put_smstate(u64
, buf
, 0x7f60, val
);
6516 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6517 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6518 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6520 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6523 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6525 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6527 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6528 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6529 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6530 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6531 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6533 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6534 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6535 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6537 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6538 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6539 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6540 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6541 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6543 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6544 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6545 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6547 for (i
= 0; i
< 6; i
++)
6548 enter_smm_save_seg_64(vcpu
, buf
, i
);
6554 static void enter_smm(struct kvm_vcpu
*vcpu
)
6556 struct kvm_segment cs
, ds
;
6561 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6562 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6563 memset(buf
, 0, 512);
6564 if (guest_cpuid_has_longmode(vcpu
))
6565 enter_smm_save_state_64(vcpu
, buf
);
6567 enter_smm_save_state_32(vcpu
, buf
);
6569 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6571 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6572 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6574 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6576 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6577 kvm_rip_write(vcpu
, 0x8000);
6579 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6580 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6581 vcpu
->arch
.cr0
= cr0
;
6583 kvm_x86_ops
->set_cr4(vcpu
, 0);
6585 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6586 dt
.address
= dt
.size
= 0;
6587 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6589 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6591 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6592 cs
.base
= vcpu
->arch
.smbase
;
6597 cs
.limit
= ds
.limit
= 0xffffffff;
6598 cs
.type
= ds
.type
= 0x3;
6599 cs
.dpl
= ds
.dpl
= 0;
6604 cs
.avl
= ds
.avl
= 0;
6605 cs
.present
= ds
.present
= 1;
6606 cs
.unusable
= ds
.unusable
= 0;
6607 cs
.padding
= ds
.padding
= 0;
6609 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6610 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6611 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6612 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6613 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6614 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6616 if (guest_cpuid_has_longmode(vcpu
))
6617 kvm_x86_ops
->set_efer(vcpu
, 0);
6619 kvm_update_cpuid(vcpu
);
6620 kvm_mmu_reset_context(vcpu
);
6623 static void process_smi(struct kvm_vcpu
*vcpu
)
6625 vcpu
->arch
.smi_pending
= true;
6626 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6629 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6631 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6634 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6636 u64 eoi_exit_bitmap
[4];
6638 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6641 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6643 if (irqchip_split(vcpu
->kvm
))
6644 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6646 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6647 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6648 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6650 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6651 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6652 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6655 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6657 ++vcpu
->stat
.tlb_flush
;
6658 kvm_x86_ops
->tlb_flush(vcpu
);
6661 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6663 struct page
*page
= NULL
;
6665 if (!lapic_in_kernel(vcpu
))
6668 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6671 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6672 if (is_error_page(page
))
6674 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6677 * Do not pin apic access page in memory, the MMU notifier
6678 * will call us again if it is migrated or swapped out.
6682 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6684 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6685 unsigned long address
)
6688 * The physical address of apic access page is stored in the VMCS.
6689 * Update it when it becomes invalid.
6691 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6692 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6696 * Returns 1 to let vcpu_run() continue the guest execution loop without
6697 * exiting to the userspace. Otherwise, the value will be returned to the
6700 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6704 dm_request_for_irq_injection(vcpu
) &&
6705 kvm_cpu_accept_dm_intr(vcpu
);
6707 bool req_immediate_exit
= false;
6709 if (vcpu
->requests
) {
6710 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6711 kvm_mmu_unload(vcpu
);
6712 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6713 __kvm_migrate_timers(vcpu
);
6714 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6715 kvm_gen_update_masterclock(vcpu
->kvm
);
6716 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6717 kvm_gen_kvmclock_update(vcpu
);
6718 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6719 r
= kvm_guest_time_update(vcpu
);
6723 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6724 kvm_mmu_sync_roots(vcpu
);
6725 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6726 kvm_vcpu_flush_tlb(vcpu
);
6727 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6728 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6732 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6733 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6737 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6738 /* Page is swapped out. Do synthetic halt */
6739 vcpu
->arch
.apf
.halted
= true;
6743 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6744 record_steal_time(vcpu
);
6745 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6747 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6749 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6750 kvm_pmu_handle_event(vcpu
);
6751 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6752 kvm_pmu_deliver_pmi(vcpu
);
6753 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6754 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6755 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6756 vcpu
->arch
.ioapic_handled_vectors
)) {
6757 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6758 vcpu
->run
->eoi
.vector
=
6759 vcpu
->arch
.pending_ioapic_eoi
;
6764 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6765 vcpu_scan_ioapic(vcpu
);
6766 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6767 kvm_vcpu_reload_apic_access_page(vcpu
);
6768 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6769 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6770 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6774 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6775 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6776 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6780 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6781 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6782 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6788 * KVM_REQ_HV_STIMER has to be processed after
6789 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6790 * depend on the guest clock being up-to-date
6792 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6793 kvm_hv_process_stimers(vcpu
);
6796 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6797 ++vcpu
->stat
.req_event
;
6798 kvm_apic_accept_events(vcpu
);
6799 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6804 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6805 req_immediate_exit
= true;
6807 /* Enable NMI/IRQ window open exits if needed.
6809 * SMIs have two cases: 1) they can be nested, and
6810 * then there is nothing to do here because RSM will
6811 * cause a vmexit anyway; 2) or the SMI can be pending
6812 * because inject_pending_event has completed the
6813 * injection of an IRQ or NMI from the previous vmexit,
6814 * and then we request an immediate exit to inject the SMI.
6816 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6817 req_immediate_exit
= true;
6818 if (vcpu
->arch
.nmi_pending
)
6819 kvm_x86_ops
->enable_nmi_window(vcpu
);
6820 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6821 kvm_x86_ops
->enable_irq_window(vcpu
);
6824 if (kvm_lapic_enabled(vcpu
)) {
6825 update_cr8_intercept(vcpu
);
6826 kvm_lapic_sync_to_vapic(vcpu
);
6830 r
= kvm_mmu_reload(vcpu
);
6832 goto cancel_injection
;
6837 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6838 kvm_load_guest_fpu(vcpu
);
6841 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6842 * IPI are then delayed after guest entry, which ensures that they
6843 * result in virtual interrupt delivery.
6845 local_irq_disable();
6846 vcpu
->mode
= IN_GUEST_MODE
;
6848 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6851 * 1) We should set ->mode before checking ->requests. Please see
6852 * the comment in kvm_make_all_cpus_request.
6854 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6855 * pairs with the memory barrier implicit in pi_test_and_set_on
6856 * (see vmx_deliver_posted_interrupt).
6858 * 3) This also orders the write to mode from any reads to the page
6859 * tables done while the VCPU is running. Please see the comment
6860 * in kvm_flush_remote_tlbs.
6862 smp_mb__after_srcu_read_unlock();
6865 * This handles the case where a posted interrupt was
6866 * notified with kvm_vcpu_kick.
6868 if (kvm_lapic_enabled(vcpu
)) {
6869 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6870 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6873 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6874 || need_resched() || signal_pending(current
)) {
6875 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6879 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6881 goto cancel_injection
;
6884 kvm_load_guest_xcr0(vcpu
);
6886 if (req_immediate_exit
) {
6887 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6888 smp_send_reschedule(vcpu
->cpu
);
6891 trace_kvm_entry(vcpu
->vcpu_id
);
6892 wait_lapic_expire(vcpu
);
6893 guest_enter_irqoff();
6895 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6897 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6898 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6899 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6900 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6901 set_debugreg(vcpu
->arch
.dr6
, 6);
6902 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6905 kvm_x86_ops
->run(vcpu
);
6908 * Do this here before restoring debug registers on the host. And
6909 * since we do this before handling the vmexit, a DR access vmexit
6910 * can (a) read the correct value of the debug registers, (b) set
6911 * KVM_DEBUGREG_WONT_EXIT again.
6913 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6914 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6915 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6916 kvm_update_dr0123(vcpu
);
6917 kvm_update_dr6(vcpu
);
6918 kvm_update_dr7(vcpu
);
6919 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6923 * If the guest has used debug registers, at least dr7
6924 * will be disabled while returning to the host.
6925 * If we don't have active breakpoints in the host, we don't
6926 * care about the messed up debug address registers. But if
6927 * we have some of them active, restore the old state.
6929 if (hw_breakpoint_active())
6930 hw_breakpoint_restore();
6932 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6934 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6937 kvm_put_guest_xcr0(vcpu
);
6939 kvm_x86_ops
->handle_external_intr(vcpu
);
6943 guest_exit_irqoff();
6948 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6951 * Profile KVM exit RIPs:
6953 if (unlikely(prof_on
== KVM_PROFILING
)) {
6954 unsigned long rip
= kvm_rip_read(vcpu
);
6955 profile_hit(KVM_PROFILING
, (void *)rip
);
6958 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6959 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6961 if (vcpu
->arch
.apic_attention
)
6962 kvm_lapic_sync_from_vapic(vcpu
);
6964 r
= kvm_x86_ops
->handle_exit(vcpu
);
6968 kvm_x86_ops
->cancel_injection(vcpu
);
6969 if (unlikely(vcpu
->arch
.apic_attention
))
6970 kvm_lapic_sync_from_vapic(vcpu
);
6975 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6977 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6978 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6979 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6980 kvm_vcpu_block(vcpu
);
6981 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6983 if (kvm_x86_ops
->post_block
)
6984 kvm_x86_ops
->post_block(vcpu
);
6986 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6990 kvm_apic_accept_events(vcpu
);
6991 switch(vcpu
->arch
.mp_state
) {
6992 case KVM_MP_STATE_HALTED
:
6993 vcpu
->arch
.pv
.pv_unhalted
= false;
6994 vcpu
->arch
.mp_state
=
6995 KVM_MP_STATE_RUNNABLE
;
6996 case KVM_MP_STATE_RUNNABLE
:
6997 vcpu
->arch
.apf
.halted
= false;
6999 case KVM_MP_STATE_INIT_RECEIVED
:
7008 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7010 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7011 kvm_x86_ops
->check_nested_events(vcpu
, false);
7013 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7014 !vcpu
->arch
.apf
.halted
);
7017 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7020 struct kvm
*kvm
= vcpu
->kvm
;
7022 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7025 if (kvm_vcpu_running(vcpu
)) {
7026 r
= vcpu_enter_guest(vcpu
);
7028 r
= vcpu_block(kvm
, vcpu
);
7034 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
7035 if (kvm_cpu_has_pending_timer(vcpu
))
7036 kvm_inject_pending_timer_irqs(vcpu
);
7038 if (dm_request_for_irq_injection(vcpu
) &&
7039 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7041 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7042 ++vcpu
->stat
.request_irq_exits
;
7046 kvm_check_async_pf_completion(vcpu
);
7048 if (signal_pending(current
)) {
7050 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7051 ++vcpu
->stat
.signal_exits
;
7054 if (need_resched()) {
7055 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7057 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7061 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7066 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7069 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7070 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7071 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7072 if (r
!= EMULATE_DONE
)
7077 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7079 BUG_ON(!vcpu
->arch
.pio
.count
);
7081 return complete_emulated_io(vcpu
);
7085 * Implements the following, as a state machine:
7089 * for each mmio piece in the fragment
7097 * for each mmio piece in the fragment
7102 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7104 struct kvm_run
*run
= vcpu
->run
;
7105 struct kvm_mmio_fragment
*frag
;
7108 BUG_ON(!vcpu
->mmio_needed
);
7110 /* Complete previous fragment */
7111 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7112 len
= min(8u, frag
->len
);
7113 if (!vcpu
->mmio_is_write
)
7114 memcpy(frag
->data
, run
->mmio
.data
, len
);
7116 if (frag
->len
<= 8) {
7117 /* Switch to the next fragment. */
7119 vcpu
->mmio_cur_fragment
++;
7121 /* Go forward to the next mmio piece. */
7127 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7128 vcpu
->mmio_needed
= 0;
7130 /* FIXME: return into emulator if single-stepping. */
7131 if (vcpu
->mmio_is_write
)
7133 vcpu
->mmio_read_completed
= 1;
7134 return complete_emulated_io(vcpu
);
7137 run
->exit_reason
= KVM_EXIT_MMIO
;
7138 run
->mmio
.phys_addr
= frag
->gpa
;
7139 if (vcpu
->mmio_is_write
)
7140 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7141 run
->mmio
.len
= min(8u, frag
->len
);
7142 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7143 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7148 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7150 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7154 fpu__activate_curr(fpu
);
7156 if (vcpu
->sigset_active
)
7157 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7159 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7160 kvm_vcpu_block(vcpu
);
7161 kvm_apic_accept_events(vcpu
);
7162 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
7167 /* re-sync apic's tpr */
7168 if (!lapic_in_kernel(vcpu
)) {
7169 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7175 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7176 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7177 vcpu
->arch
.complete_userspace_io
= NULL
;
7182 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7184 if (kvm_run
->immediate_exit
)
7190 post_kvm_run_save(vcpu
);
7191 if (vcpu
->sigset_active
)
7192 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7197 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7199 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7201 * We are here if userspace calls get_regs() in the middle of
7202 * instruction emulation. Registers state needs to be copied
7203 * back from emulation context to vcpu. Userspace shouldn't do
7204 * that usually, but some bad designed PV devices (vmware
7205 * backdoor interface) need this to work
7207 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7208 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7210 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7211 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7212 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7213 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7214 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7215 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7216 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7217 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7218 #ifdef CONFIG_X86_64
7219 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7220 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7221 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7222 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7223 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7224 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7225 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7226 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7229 regs
->rip
= kvm_rip_read(vcpu
);
7230 regs
->rflags
= kvm_get_rflags(vcpu
);
7235 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7237 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7238 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7240 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7241 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7242 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7243 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7244 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7245 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7246 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7247 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7248 #ifdef CONFIG_X86_64
7249 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7250 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7251 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7252 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7253 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7254 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7255 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7256 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7259 kvm_rip_write(vcpu
, regs
->rip
);
7260 kvm_set_rflags(vcpu
, regs
->rflags
);
7262 vcpu
->arch
.exception
.pending
= false;
7264 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7269 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7271 struct kvm_segment cs
;
7273 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7277 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7279 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7280 struct kvm_sregs
*sregs
)
7284 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7285 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7286 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7287 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7288 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7289 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7291 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7292 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7294 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7295 sregs
->idt
.limit
= dt
.size
;
7296 sregs
->idt
.base
= dt
.address
;
7297 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7298 sregs
->gdt
.limit
= dt
.size
;
7299 sregs
->gdt
.base
= dt
.address
;
7301 sregs
->cr0
= kvm_read_cr0(vcpu
);
7302 sregs
->cr2
= vcpu
->arch
.cr2
;
7303 sregs
->cr3
= kvm_read_cr3(vcpu
);
7304 sregs
->cr4
= kvm_read_cr4(vcpu
);
7305 sregs
->cr8
= kvm_get_cr8(vcpu
);
7306 sregs
->efer
= vcpu
->arch
.efer
;
7307 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7309 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7311 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7312 set_bit(vcpu
->arch
.interrupt
.nr
,
7313 (unsigned long *)sregs
->interrupt_bitmap
);
7318 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7319 struct kvm_mp_state
*mp_state
)
7321 kvm_apic_accept_events(vcpu
);
7322 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7323 vcpu
->arch
.pv
.pv_unhalted
)
7324 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7326 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7331 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7332 struct kvm_mp_state
*mp_state
)
7334 if (!lapic_in_kernel(vcpu
) &&
7335 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7338 /* INITs are latched while in SMM */
7339 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7340 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7341 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7344 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7345 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7346 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7348 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7349 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7353 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7354 int reason
, bool has_error_code
, u32 error_code
)
7356 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7359 init_emulate_ctxt(vcpu
);
7361 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7362 has_error_code
, error_code
);
7365 return EMULATE_FAIL
;
7367 kvm_rip_write(vcpu
, ctxt
->eip
);
7368 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7369 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7370 return EMULATE_DONE
;
7372 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7374 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7375 struct kvm_sregs
*sregs
)
7377 struct msr_data apic_base_msr
;
7378 int mmu_reset_needed
= 0;
7379 int pending_vec
, max_bits
, idx
;
7382 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7385 dt
.size
= sregs
->idt
.limit
;
7386 dt
.address
= sregs
->idt
.base
;
7387 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7388 dt
.size
= sregs
->gdt
.limit
;
7389 dt
.address
= sregs
->gdt
.base
;
7390 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7392 vcpu
->arch
.cr2
= sregs
->cr2
;
7393 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7394 vcpu
->arch
.cr3
= sregs
->cr3
;
7395 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7397 kvm_set_cr8(vcpu
, sregs
->cr8
);
7399 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7400 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7401 apic_base_msr
.data
= sregs
->apic_base
;
7402 apic_base_msr
.host_initiated
= true;
7403 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7405 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7406 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7407 vcpu
->arch
.cr0
= sregs
->cr0
;
7409 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7410 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7411 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7412 kvm_update_cpuid(vcpu
);
7414 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7415 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7416 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7417 mmu_reset_needed
= 1;
7419 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7421 if (mmu_reset_needed
)
7422 kvm_mmu_reset_context(vcpu
);
7424 max_bits
= KVM_NR_INTERRUPTS
;
7425 pending_vec
= find_first_bit(
7426 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7427 if (pending_vec
< max_bits
) {
7428 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7429 pr_debug("Set back pending irq %d\n", pending_vec
);
7432 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7433 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7434 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7435 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7436 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7437 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7439 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7440 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7442 update_cr8_intercept(vcpu
);
7444 /* Older userspace won't unhalt the vcpu on reset. */
7445 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7446 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7448 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7450 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7455 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7456 struct kvm_guest_debug
*dbg
)
7458 unsigned long rflags
;
7461 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7463 if (vcpu
->arch
.exception
.pending
)
7465 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7466 kvm_queue_exception(vcpu
, DB_VECTOR
);
7468 kvm_queue_exception(vcpu
, BP_VECTOR
);
7472 * Read rflags as long as potentially injected trace flags are still
7475 rflags
= kvm_get_rflags(vcpu
);
7477 vcpu
->guest_debug
= dbg
->control
;
7478 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7479 vcpu
->guest_debug
= 0;
7481 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7482 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7483 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7484 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7486 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7487 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7489 kvm_update_dr7(vcpu
);
7491 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7492 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7493 get_segment_base(vcpu
, VCPU_SREG_CS
);
7496 * Trigger an rflags update that will inject or remove the trace
7499 kvm_set_rflags(vcpu
, rflags
);
7501 kvm_x86_ops
->update_bp_intercept(vcpu
);
7511 * Translate a guest virtual address to a guest physical address.
7513 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7514 struct kvm_translation
*tr
)
7516 unsigned long vaddr
= tr
->linear_address
;
7520 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7521 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7522 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7523 tr
->physical_address
= gpa
;
7524 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7531 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7533 struct fxregs_state
*fxsave
=
7534 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7536 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7537 fpu
->fcw
= fxsave
->cwd
;
7538 fpu
->fsw
= fxsave
->swd
;
7539 fpu
->ftwx
= fxsave
->twd
;
7540 fpu
->last_opcode
= fxsave
->fop
;
7541 fpu
->last_ip
= fxsave
->rip
;
7542 fpu
->last_dp
= fxsave
->rdp
;
7543 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7548 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7550 struct fxregs_state
*fxsave
=
7551 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7553 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7554 fxsave
->cwd
= fpu
->fcw
;
7555 fxsave
->swd
= fpu
->fsw
;
7556 fxsave
->twd
= fpu
->ftwx
;
7557 fxsave
->fop
= fpu
->last_opcode
;
7558 fxsave
->rip
= fpu
->last_ip
;
7559 fxsave
->rdp
= fpu
->last_dp
;
7560 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7565 static void fx_init(struct kvm_vcpu
*vcpu
)
7567 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7568 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7569 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7570 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7573 * Ensure guest xcr0 is valid for loading
7575 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7577 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7580 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7582 if (vcpu
->guest_fpu_loaded
)
7586 * Restore all possible states in the guest,
7587 * and assume host would use all available bits.
7588 * Guest xcr0 would be loaded later.
7590 vcpu
->guest_fpu_loaded
= 1;
7591 __kernel_fpu_begin();
7592 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7596 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7598 if (!vcpu
->guest_fpu_loaded
)
7601 vcpu
->guest_fpu_loaded
= 0;
7602 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7604 ++vcpu
->stat
.fpu_reload
;
7608 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7610 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7612 kvmclock_reset(vcpu
);
7614 kvm_x86_ops
->vcpu_free(vcpu
);
7615 free_cpumask_var(wbinvd_dirty_mask
);
7618 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7621 struct kvm_vcpu
*vcpu
;
7623 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7624 printk_once(KERN_WARNING
7625 "kvm: SMP vm created on host with unstable TSC; "
7626 "guest TSC will not be reliable\n");
7628 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7633 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7637 kvm_vcpu_mtrr_init(vcpu
);
7638 r
= vcpu_load(vcpu
);
7641 kvm_vcpu_reset(vcpu
, false);
7642 kvm_mmu_setup(vcpu
);
7647 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7649 struct msr_data msr
;
7650 struct kvm
*kvm
= vcpu
->kvm
;
7652 if (vcpu_load(vcpu
))
7655 msr
.index
= MSR_IA32_TSC
;
7656 msr
.host_initiated
= true;
7657 kvm_write_tsc(vcpu
, &msr
);
7660 if (!kvmclock_periodic_sync
)
7663 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7664 KVMCLOCK_SYNC_PERIOD
);
7667 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7670 vcpu
->arch
.apf
.msr_val
= 0;
7672 r
= vcpu_load(vcpu
);
7674 kvm_mmu_unload(vcpu
);
7677 kvm_x86_ops
->vcpu_free(vcpu
);
7680 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7682 vcpu
->arch
.hflags
= 0;
7684 vcpu
->arch
.smi_pending
= 0;
7685 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7686 vcpu
->arch
.nmi_pending
= 0;
7687 vcpu
->arch
.nmi_injected
= false;
7688 kvm_clear_interrupt_queue(vcpu
);
7689 kvm_clear_exception_queue(vcpu
);
7691 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7692 kvm_update_dr0123(vcpu
);
7693 vcpu
->arch
.dr6
= DR6_INIT
;
7694 kvm_update_dr6(vcpu
);
7695 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7696 kvm_update_dr7(vcpu
);
7700 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7701 vcpu
->arch
.apf
.msr_val
= 0;
7702 vcpu
->arch
.st
.msr_val
= 0;
7704 kvmclock_reset(vcpu
);
7706 kvm_clear_async_pf_completion_queue(vcpu
);
7707 kvm_async_pf_hash_reset(vcpu
);
7708 vcpu
->arch
.apf
.halted
= false;
7711 kvm_pmu_reset(vcpu
);
7712 vcpu
->arch
.smbase
= 0x30000;
7715 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7716 vcpu
->arch
.regs_avail
= ~0;
7717 vcpu
->arch
.regs_dirty
= ~0;
7719 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7722 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7724 struct kvm_segment cs
;
7726 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7727 cs
.selector
= vector
<< 8;
7728 cs
.base
= vector
<< 12;
7729 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7730 kvm_rip_write(vcpu
, 0);
7733 int kvm_arch_hardware_enable(void)
7736 struct kvm_vcpu
*vcpu
;
7741 bool stable
, backwards_tsc
= false;
7743 kvm_shared_msr_cpu_online();
7744 ret
= kvm_x86_ops
->hardware_enable();
7748 local_tsc
= rdtsc();
7749 stable
= !check_tsc_unstable();
7750 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7751 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7752 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7753 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7754 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7755 backwards_tsc
= true;
7756 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7757 max_tsc
= vcpu
->arch
.last_host_tsc
;
7763 * Sometimes, even reliable TSCs go backwards. This happens on
7764 * platforms that reset TSC during suspend or hibernate actions, but
7765 * maintain synchronization. We must compensate. Fortunately, we can
7766 * detect that condition here, which happens early in CPU bringup,
7767 * before any KVM threads can be running. Unfortunately, we can't
7768 * bring the TSCs fully up to date with real time, as we aren't yet far
7769 * enough into CPU bringup that we know how much real time has actually
7770 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7771 * variables that haven't been updated yet.
7773 * So we simply find the maximum observed TSC above, then record the
7774 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7775 * the adjustment will be applied. Note that we accumulate
7776 * adjustments, in case multiple suspend cycles happen before some VCPU
7777 * gets a chance to run again. In the event that no KVM threads get a
7778 * chance to run, we will miss the entire elapsed period, as we'll have
7779 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7780 * loose cycle time. This isn't too big a deal, since the loss will be
7781 * uniform across all VCPUs (not to mention the scenario is extremely
7782 * unlikely). It is possible that a second hibernate recovery happens
7783 * much faster than a first, causing the observed TSC here to be
7784 * smaller; this would require additional padding adjustment, which is
7785 * why we set last_host_tsc to the local tsc observed here.
7787 * N.B. - this code below runs only on platforms with reliable TSC,
7788 * as that is the only way backwards_tsc is set above. Also note
7789 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7790 * have the same delta_cyc adjustment applied if backwards_tsc
7791 * is detected. Note further, this adjustment is only done once,
7792 * as we reset last_host_tsc on all VCPUs to stop this from being
7793 * called multiple times (one for each physical CPU bringup).
7795 * Platforms with unreliable TSCs don't have to deal with this, they
7796 * will be compensated by the logic in vcpu_load, which sets the TSC to
7797 * catchup mode. This will catchup all VCPUs to real time, but cannot
7798 * guarantee that they stay in perfect synchronization.
7800 if (backwards_tsc
) {
7801 u64 delta_cyc
= max_tsc
- local_tsc
;
7802 backwards_tsc_observed
= true;
7803 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7804 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7805 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7806 vcpu
->arch
.last_host_tsc
= local_tsc
;
7807 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7811 * We have to disable TSC offset matching.. if you were
7812 * booting a VM while issuing an S4 host suspend....
7813 * you may have some problem. Solving this issue is
7814 * left as an exercise to the reader.
7816 kvm
->arch
.last_tsc_nsec
= 0;
7817 kvm
->arch
.last_tsc_write
= 0;
7824 void kvm_arch_hardware_disable(void)
7826 kvm_x86_ops
->hardware_disable();
7827 drop_user_return_notifiers();
7830 int kvm_arch_hardware_setup(void)
7834 r
= kvm_x86_ops
->hardware_setup();
7838 if (kvm_has_tsc_control
) {
7840 * Make sure the user can only configure tsc_khz values that
7841 * fit into a signed integer.
7842 * A min value is not calculated needed because it will always
7843 * be 1 on all machines.
7845 u64 max
= min(0x7fffffffULL
,
7846 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7847 kvm_max_guest_tsc_khz
= max
;
7849 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7852 kvm_init_msr_list();
7856 void kvm_arch_hardware_unsetup(void)
7858 kvm_x86_ops
->hardware_unsetup();
7861 void kvm_arch_check_processor_compat(void *rtn
)
7863 kvm_x86_ops
->check_processor_compatibility(rtn
);
7866 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7868 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7870 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7872 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7874 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7877 struct static_key kvm_no_apic_vcpu __read_mostly
;
7878 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7880 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7886 BUG_ON(vcpu
->kvm
== NULL
);
7889 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7890 vcpu
->arch
.pv
.pv_unhalted
= false;
7891 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7892 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7893 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7895 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7897 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7902 vcpu
->arch
.pio_data
= page_address(page
);
7904 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7906 r
= kvm_mmu_create(vcpu
);
7908 goto fail_free_pio_data
;
7910 if (irqchip_in_kernel(kvm
)) {
7911 r
= kvm_create_lapic(vcpu
);
7913 goto fail_mmu_destroy
;
7915 static_key_slow_inc(&kvm_no_apic_vcpu
);
7917 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7919 if (!vcpu
->arch
.mce_banks
) {
7921 goto fail_free_lapic
;
7923 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7925 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7927 goto fail_free_mce_banks
;
7932 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7933 vcpu
->arch
.pv_time_enabled
= false;
7935 vcpu
->arch
.guest_supported_xcr0
= 0;
7936 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7938 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7940 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7942 kvm_async_pf_hash_reset(vcpu
);
7945 vcpu
->arch
.pending_external_vector
= -1;
7947 kvm_hv_vcpu_init(vcpu
);
7951 fail_free_mce_banks
:
7952 kfree(vcpu
->arch
.mce_banks
);
7954 kvm_free_lapic(vcpu
);
7956 kvm_mmu_destroy(vcpu
);
7958 free_page((unsigned long)vcpu
->arch
.pio_data
);
7963 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7967 kvm_hv_vcpu_uninit(vcpu
);
7968 kvm_pmu_destroy(vcpu
);
7969 kfree(vcpu
->arch
.mce_banks
);
7970 kvm_free_lapic(vcpu
);
7971 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7972 kvm_mmu_destroy(vcpu
);
7973 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7974 free_page((unsigned long)vcpu
->arch
.pio_data
);
7975 if (!lapic_in_kernel(vcpu
))
7976 static_key_slow_dec(&kvm_no_apic_vcpu
);
7979 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7981 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7984 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7989 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7990 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7991 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7992 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7993 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7995 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7996 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7997 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7998 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7999 &kvm
->arch
.irq_sources_bitmap
);
8001 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8002 mutex_init(&kvm
->arch
.apic_map_lock
);
8003 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8004 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8006 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8007 pvclock_update_vm_gtod_copy(kvm
);
8009 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8010 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8012 kvm_page_track_init(kvm
);
8013 kvm_mmu_init_vm(kvm
);
8015 if (kvm_x86_ops
->vm_init
)
8016 return kvm_x86_ops
->vm_init(kvm
);
8021 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8024 r
= vcpu_load(vcpu
);
8026 kvm_mmu_unload(vcpu
);
8030 static void kvm_free_vcpus(struct kvm
*kvm
)
8033 struct kvm_vcpu
*vcpu
;
8036 * Unpin any mmu pages first.
8038 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8039 kvm_clear_async_pf_completion_queue(vcpu
);
8040 kvm_unload_vcpu_mmu(vcpu
);
8042 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8043 kvm_arch_vcpu_free(vcpu
);
8045 mutex_lock(&kvm
->lock
);
8046 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8047 kvm
->vcpus
[i
] = NULL
;
8049 atomic_set(&kvm
->online_vcpus
, 0);
8050 mutex_unlock(&kvm
->lock
);
8053 void kvm_arch_sync_events(struct kvm
*kvm
)
8055 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8056 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8060 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8064 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8065 struct kvm_memory_slot
*slot
, old
;
8067 /* Called with kvm->slots_lock held. */
8068 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8071 slot
= id_to_memslot(slots
, id
);
8077 * MAP_SHARED to prevent internal slot pages from being moved
8080 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8081 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8082 if (IS_ERR((void *)hva
))
8083 return PTR_ERR((void *)hva
);
8092 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8093 struct kvm_userspace_memory_region m
;
8095 m
.slot
= id
| (i
<< 16);
8097 m
.guest_phys_addr
= gpa
;
8098 m
.userspace_addr
= hva
;
8099 m
.memory_size
= size
;
8100 r
= __kvm_set_memory_region(kvm
, &m
);
8106 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8112 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8114 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8118 mutex_lock(&kvm
->slots_lock
);
8119 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8120 mutex_unlock(&kvm
->slots_lock
);
8124 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8126 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8128 if (current
->mm
== kvm
->mm
) {
8130 * Free memory regions allocated on behalf of userspace,
8131 * unless the the memory map has changed due to process exit
8134 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8135 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8136 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8138 if (kvm_x86_ops
->vm_destroy
)
8139 kvm_x86_ops
->vm_destroy(kvm
);
8140 kvm_pic_destroy(kvm
);
8141 kvm_ioapic_destroy(kvm
);
8142 kvm_free_vcpus(kvm
);
8143 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8144 kvm_mmu_uninit_vm(kvm
);
8145 kvm_page_track_cleanup(kvm
);
8148 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8149 struct kvm_memory_slot
*dont
)
8153 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8154 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8155 kvfree(free
->arch
.rmap
[i
]);
8156 free
->arch
.rmap
[i
] = NULL
;
8161 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8162 dont
->arch
.lpage_info
[i
- 1]) {
8163 kvfree(free
->arch
.lpage_info
[i
- 1]);
8164 free
->arch
.lpage_info
[i
- 1] = NULL
;
8168 kvm_page_track_free_memslot(free
, dont
);
8171 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8172 unsigned long npages
)
8176 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8177 struct kvm_lpage_info
*linfo
;
8182 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8183 slot
->base_gfn
, level
) + 1;
8185 slot
->arch
.rmap
[i
] =
8186 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
8187 if (!slot
->arch
.rmap
[i
])
8192 linfo
= kvm_kvzalloc(lpages
* sizeof(*linfo
));
8196 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8198 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8199 linfo
[0].disallow_lpage
= 1;
8200 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8201 linfo
[lpages
- 1].disallow_lpage
= 1;
8202 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8204 * If the gfn and userspace address are not aligned wrt each
8205 * other, or if explicitly asked to, disable large page
8206 * support for this slot
8208 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8209 !kvm_largepages_enabled()) {
8212 for (j
= 0; j
< lpages
; ++j
)
8213 linfo
[j
].disallow_lpage
= 1;
8217 if (kvm_page_track_create_memslot(slot
, npages
))
8223 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8224 kvfree(slot
->arch
.rmap
[i
]);
8225 slot
->arch
.rmap
[i
] = NULL
;
8229 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8230 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8235 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8238 * memslots->generation has been incremented.
8239 * mmio generation may have reached its maximum value.
8241 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8244 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8245 struct kvm_memory_slot
*memslot
,
8246 const struct kvm_userspace_memory_region
*mem
,
8247 enum kvm_mr_change change
)
8252 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8253 struct kvm_memory_slot
*new)
8255 /* Still write protect RO slot */
8256 if (new->flags
& KVM_MEM_READONLY
) {
8257 kvm_mmu_slot_remove_write_access(kvm
, new);
8262 * Call kvm_x86_ops dirty logging hooks when they are valid.
8264 * kvm_x86_ops->slot_disable_log_dirty is called when:
8266 * - KVM_MR_CREATE with dirty logging is disabled
8267 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8269 * The reason is, in case of PML, we need to set D-bit for any slots
8270 * with dirty logging disabled in order to eliminate unnecessary GPA
8271 * logging in PML buffer (and potential PML buffer full VMEXT). This
8272 * guarantees leaving PML enabled during guest's lifetime won't have
8273 * any additonal overhead from PML when guest is running with dirty
8274 * logging disabled for memory slots.
8276 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8277 * to dirty logging mode.
8279 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8281 * In case of write protect:
8283 * Write protect all pages for dirty logging.
8285 * All the sptes including the large sptes which point to this
8286 * slot are set to readonly. We can not create any new large
8287 * spte on this slot until the end of the logging.
8289 * See the comments in fast_page_fault().
8291 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8292 if (kvm_x86_ops
->slot_enable_log_dirty
)
8293 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8295 kvm_mmu_slot_remove_write_access(kvm
, new);
8297 if (kvm_x86_ops
->slot_disable_log_dirty
)
8298 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8302 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8303 const struct kvm_userspace_memory_region
*mem
,
8304 const struct kvm_memory_slot
*old
,
8305 const struct kvm_memory_slot
*new,
8306 enum kvm_mr_change change
)
8308 int nr_mmu_pages
= 0;
8310 if (!kvm
->arch
.n_requested_mmu_pages
)
8311 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8314 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8317 * Dirty logging tracks sptes in 4k granularity, meaning that large
8318 * sptes have to be split. If live migration is successful, the guest
8319 * in the source machine will be destroyed and large sptes will be
8320 * created in the destination. However, if the guest continues to run
8321 * in the source machine (for example if live migration fails), small
8322 * sptes will remain around and cause bad performance.
8324 * Scan sptes if dirty logging has been stopped, dropping those
8325 * which can be collapsed into a single large-page spte. Later
8326 * page faults will create the large-page sptes.
8328 if ((change
!= KVM_MR_DELETE
) &&
8329 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8330 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8331 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8334 * Set up write protection and/or dirty logging for the new slot.
8336 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8337 * been zapped so no dirty logging staff is needed for old slot. For
8338 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8339 * new and it's also covered when dealing with the new slot.
8341 * FIXME: const-ify all uses of struct kvm_memory_slot.
8343 if (change
!= KVM_MR_DELETE
)
8344 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8347 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8349 kvm_mmu_invalidate_zap_all_pages(kvm
);
8352 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8353 struct kvm_memory_slot
*slot
)
8355 kvm_page_track_flush_slot(kvm
, slot
);
8358 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8360 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8363 if (kvm_apic_has_events(vcpu
))
8366 if (vcpu
->arch
.pv
.pv_unhalted
)
8369 if (atomic_read(&vcpu
->arch
.nmi_queued
))
8372 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
8375 if (kvm_arch_interrupt_allowed(vcpu
) &&
8376 kvm_cpu_has_interrupt(vcpu
))
8379 if (kvm_hv_has_stimer_pending(vcpu
))
8385 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8387 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8390 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8392 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8395 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8397 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8400 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8402 if (is_64_bit_mode(vcpu
))
8403 return kvm_rip_read(vcpu
);
8404 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8405 kvm_rip_read(vcpu
));
8407 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8409 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8411 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8413 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8415 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8417 unsigned long rflags
;
8419 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8420 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8421 rflags
&= ~X86_EFLAGS_TF
;
8424 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8426 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8428 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8429 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8430 rflags
|= X86_EFLAGS_TF
;
8431 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8434 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8436 __kvm_set_rflags(vcpu
, rflags
);
8437 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8439 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8441 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8445 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8449 r
= kvm_mmu_reload(vcpu
);
8453 if (!vcpu
->arch
.mmu
.direct_map
&&
8454 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8457 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8460 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8462 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8465 static inline u32
kvm_async_pf_next_probe(u32 key
)
8467 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8470 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8472 u32 key
= kvm_async_pf_hash_fn(gfn
);
8474 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8475 key
= kvm_async_pf_next_probe(key
);
8477 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8480 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8483 u32 key
= kvm_async_pf_hash_fn(gfn
);
8485 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8486 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8487 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8488 key
= kvm_async_pf_next_probe(key
);
8493 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8495 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8498 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8502 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8504 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8506 j
= kvm_async_pf_next_probe(j
);
8507 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8509 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8511 * k lies cyclically in ]i,j]
8513 * |....j i.k.| or |.k..j i...|
8515 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8516 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8521 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8523 return kvm_vcpu_write_guest_cached(vcpu
, &vcpu
->arch
.apf
.data
, &val
,
8527 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8528 struct kvm_async_pf
*work
)
8530 struct x86_exception fault
;
8532 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8533 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8535 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8536 (vcpu
->arch
.apf
.send_user_only
&&
8537 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8538 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8539 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8540 fault
.vector
= PF_VECTOR
;
8541 fault
.error_code_valid
= true;
8542 fault
.error_code
= 0;
8543 fault
.nested_page_fault
= false;
8544 fault
.address
= work
->arch
.token
;
8545 kvm_inject_page_fault(vcpu
, &fault
);
8549 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8550 struct kvm_async_pf
*work
)
8552 struct x86_exception fault
;
8554 if (work
->wakeup_all
)
8555 work
->arch
.token
= ~0; /* broadcast wakeup */
8557 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8558 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8560 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8561 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8562 fault
.vector
= PF_VECTOR
;
8563 fault
.error_code_valid
= true;
8564 fault
.error_code
= 0;
8565 fault
.nested_page_fault
= false;
8566 fault
.address
= work
->arch
.token
;
8567 kvm_inject_page_fault(vcpu
, &fault
);
8569 vcpu
->arch
.apf
.halted
= false;
8570 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8573 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8575 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8578 return !kvm_event_needs_reinjection(vcpu
) &&
8579 kvm_x86_ops
->interrupt_allowed(vcpu
);
8582 void kvm_arch_start_assignment(struct kvm
*kvm
)
8584 atomic_inc(&kvm
->arch
.assigned_device_count
);
8586 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8588 void kvm_arch_end_assignment(struct kvm
*kvm
)
8590 atomic_dec(&kvm
->arch
.assigned_device_count
);
8592 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8594 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8596 return atomic_read(&kvm
->arch
.assigned_device_count
);
8598 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8600 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8602 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8604 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8606 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8608 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8610 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8612 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8614 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8616 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8618 bool kvm_arch_has_irq_bypass(void)
8620 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8623 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8624 struct irq_bypass_producer
*prod
)
8626 struct kvm_kernel_irqfd
*irqfd
=
8627 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8629 irqfd
->producer
= prod
;
8631 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8632 prod
->irq
, irqfd
->gsi
, 1);
8635 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8636 struct irq_bypass_producer
*prod
)
8639 struct kvm_kernel_irqfd
*irqfd
=
8640 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8642 WARN_ON(irqfd
->producer
!= prod
);
8643 irqfd
->producer
= NULL
;
8646 * When producer of consumer is unregistered, we change back to
8647 * remapped mode, so we can re-use the current implementation
8648 * when the irq is masked/disabled or the consumer side (KVM
8649 * int this case doesn't want to receive the interrupts.
8651 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8653 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8654 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8657 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8658 uint32_t guest_irq
, bool set
)
8660 if (!kvm_x86_ops
->update_pi_irte
)
8663 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8666 bool kvm_vector_hashing_enabled(void)
8668 return vector_hashing
;
8670 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8672 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8673 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8674 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8675 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8676 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8677 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8678 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8679 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8680 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8681 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8682 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8683 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8684 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8685 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8686 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8687 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);