2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
48 #define CREATE_TRACE_POINTS
51 #include <asm/debugreg.h>
58 #include <asm/pvclock.h>
59 #include <asm/div64.h>
61 #define MAX_IO_MSRS 256
62 #define CR0_RESERVED_BITS \
63 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
64 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
65 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
66 #define CR4_RESERVED_BITS \
67 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
68 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
69 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
71 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
75 #define KVM_MAX_MCE_BANKS 32
76 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
83 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
85 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
91 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
93 struct kvm_cpuid_entry2 __user
*entries
);
95 struct kvm_x86_ops
*kvm_x86_ops
;
96 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
99 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
101 #define KVM_NR_SHARED_MSRS 16
103 struct kvm_shared_msrs_global
{
105 u32 msrs
[KVM_NR_SHARED_MSRS
];
108 struct kvm_shared_msrs
{
109 struct user_return_notifier urn
;
111 struct kvm_shared_msr_values
{
114 } values
[KVM_NR_SHARED_MSRS
];
117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
118 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
120 struct kvm_stats_debugfs_item debugfs_entries
[] = {
121 { "pf_fixed", VCPU_STAT(pf_fixed
) },
122 { "pf_guest", VCPU_STAT(pf_guest
) },
123 { "tlb_flush", VCPU_STAT(tlb_flush
) },
124 { "invlpg", VCPU_STAT(invlpg
) },
125 { "exits", VCPU_STAT(exits
) },
126 { "io_exits", VCPU_STAT(io_exits
) },
127 { "mmio_exits", VCPU_STAT(mmio_exits
) },
128 { "signal_exits", VCPU_STAT(signal_exits
) },
129 { "irq_window", VCPU_STAT(irq_window_exits
) },
130 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
131 { "halt_exits", VCPU_STAT(halt_exits
) },
132 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
133 { "hypercalls", VCPU_STAT(hypercalls
) },
134 { "request_irq", VCPU_STAT(request_irq_exits
) },
135 { "irq_exits", VCPU_STAT(irq_exits
) },
136 { "host_state_reload", VCPU_STAT(host_state_reload
) },
137 { "efer_reload", VCPU_STAT(efer_reload
) },
138 { "fpu_reload", VCPU_STAT(fpu_reload
) },
139 { "insn_emulation", VCPU_STAT(insn_emulation
) },
140 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
141 { "irq_injections", VCPU_STAT(irq_injections
) },
142 { "nmi_injections", VCPU_STAT(nmi_injections
) },
143 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
144 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
145 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
146 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
147 { "mmu_flooded", VM_STAT(mmu_flooded
) },
148 { "mmu_recycled", VM_STAT(mmu_recycled
) },
149 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
150 { "mmu_unsync", VM_STAT(mmu_unsync
) },
151 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
152 { "largepages", VM_STAT(lpages
) },
156 u64 __read_mostly host_xcr0
;
158 static inline u32
bit(int bitno
)
160 return 1 << (bitno
& 31);
163 static void kvm_on_user_return(struct user_return_notifier
*urn
)
166 struct kvm_shared_msrs
*locals
167 = container_of(urn
, struct kvm_shared_msrs
, urn
);
168 struct kvm_shared_msr_values
*values
;
170 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
171 values
= &locals
->values
[slot
];
172 if (values
->host
!= values
->curr
) {
173 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
174 values
->curr
= values
->host
;
177 locals
->registered
= false;
178 user_return_notifier_unregister(urn
);
181 static void shared_msr_update(unsigned slot
, u32 msr
)
183 struct kvm_shared_msrs
*smsr
;
186 smsr
= &__get_cpu_var(shared_msrs
);
187 /* only read, and nobody should modify it at this time,
188 * so don't need lock */
189 if (slot
>= shared_msrs_global
.nr
) {
190 printk(KERN_ERR
"kvm: invalid MSR slot!");
193 rdmsrl_safe(msr
, &value
);
194 smsr
->values
[slot
].host
= value
;
195 smsr
->values
[slot
].curr
= value
;
198 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
200 if (slot
>= shared_msrs_global
.nr
)
201 shared_msrs_global
.nr
= slot
+ 1;
202 shared_msrs_global
.msrs
[slot
] = msr
;
203 /* we need ensured the shared_msr_global have been updated */
206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
208 static void kvm_shared_msr_cpu_online(void)
212 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
213 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
216 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
218 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
220 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
222 smsr
->values
[slot
].curr
= value
;
223 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
224 if (!smsr
->registered
) {
225 smsr
->urn
.on_user_return
= kvm_on_user_return
;
226 user_return_notifier_register(&smsr
->urn
);
227 smsr
->registered
= true;
230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
232 static void drop_user_return_notifiers(void *ignore
)
234 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
236 if (smsr
->registered
)
237 kvm_on_user_return(&smsr
->urn
);
240 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
242 if (irqchip_in_kernel(vcpu
->kvm
))
243 return vcpu
->arch
.apic_base
;
245 return vcpu
->arch
.apic_base
;
247 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
249 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
251 /* TODO: reserve bits check */
252 if (irqchip_in_kernel(vcpu
->kvm
))
253 kvm_lapic_set_base(vcpu
, data
);
255 vcpu
->arch
.apic_base
= data
;
257 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
259 #define EXCPT_BENIGN 0
260 #define EXCPT_CONTRIBUTORY 1
263 static int exception_class(int vector
)
273 return EXCPT_CONTRIBUTORY
;
280 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
281 unsigned nr
, bool has_error
, u32 error_code
,
287 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
289 if (!vcpu
->arch
.exception
.pending
) {
291 vcpu
->arch
.exception
.pending
= true;
292 vcpu
->arch
.exception
.has_error_code
= has_error
;
293 vcpu
->arch
.exception
.nr
= nr
;
294 vcpu
->arch
.exception
.error_code
= error_code
;
295 vcpu
->arch
.exception
.reinject
= reinject
;
299 /* to check exception */
300 prev_nr
= vcpu
->arch
.exception
.nr
;
301 if (prev_nr
== DF_VECTOR
) {
302 /* triple fault -> shutdown */
303 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
306 class1
= exception_class(prev_nr
);
307 class2
= exception_class(nr
);
308 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
309 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
310 /* generate double fault per SDM Table 5-5 */
311 vcpu
->arch
.exception
.pending
= true;
312 vcpu
->arch
.exception
.has_error_code
= true;
313 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
314 vcpu
->arch
.exception
.error_code
= 0;
316 /* replace previous exception with a new one in a hope
317 that instruction re-execution will regenerate lost
322 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
324 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
326 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
328 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
330 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
332 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
334 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
)
336 unsigned error_code
= vcpu
->arch
.fault
.error_code
;
338 ++vcpu
->stat
.pf_guest
;
339 vcpu
->arch
.cr2
= vcpu
->arch
.fault
.address
;
340 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
343 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
)
345 if (mmu_is_nested(vcpu
) && !vcpu
->arch
.fault
.nested
)
346 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
);
348 vcpu
->arch
.mmu
.inject_page_fault(vcpu
);
350 vcpu
->arch
.fault
.nested
= false;
353 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
355 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
356 vcpu
->arch
.nmi_pending
= 1;
358 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
360 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
362 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
364 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
366 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
368 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
370 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
373 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
374 * a #GP and return false.
376 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
378 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
380 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
383 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
386 * This function will be used to read from the physical memory of the currently
387 * running guest. The difference to kvm_read_guest_page is that this function
388 * can read from guest physical or from the guest's guest physical memory.
390 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
391 gfn_t ngfn
, void *data
, int offset
, int len
,
397 ngpa
= gfn_to_gpa(ngfn
);
398 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
399 if (real_gfn
== UNMAPPED_GVA
)
402 real_gfn
= gpa_to_gfn(real_gfn
);
404 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
406 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
408 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
409 void *data
, int offset
, int len
, u32 access
)
411 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
412 data
, offset
, len
, access
);
416 * Load the pae pdptrs. Return true is they are all valid.
418 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
420 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
421 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
424 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
426 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
427 offset
* sizeof(u64
), sizeof(pdpte
),
428 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
433 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
434 if (is_present_gpte(pdpte
[i
]) &&
435 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
442 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
443 __set_bit(VCPU_EXREG_PDPTR
,
444 (unsigned long *)&vcpu
->arch
.regs_avail
);
445 __set_bit(VCPU_EXREG_PDPTR
,
446 (unsigned long *)&vcpu
->arch
.regs_dirty
);
451 EXPORT_SYMBOL_GPL(load_pdptrs
);
453 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
455 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
461 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
464 if (!test_bit(VCPU_EXREG_PDPTR
,
465 (unsigned long *)&vcpu
->arch
.regs_avail
))
468 gfn
= (vcpu
->arch
.cr3
& ~31u) >> PAGE_SHIFT
;
469 offset
= (vcpu
->arch
.cr3
& ~31u) & (PAGE_SIZE
- 1);
470 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
471 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
474 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
480 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
482 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
483 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
484 X86_CR0_CD
| X86_CR0_NW
;
489 if (cr0
& 0xffffffff00000000UL
)
493 cr0
&= ~CR0_RESERVED_BITS
;
495 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
498 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
501 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
503 if ((vcpu
->arch
.efer
& EFER_LME
)) {
508 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
513 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
518 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
520 if ((cr0
^ old_cr0
) & update_bits
)
521 kvm_mmu_reset_context(vcpu
);
524 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
526 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
528 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
530 EXPORT_SYMBOL_GPL(kvm_lmsw
);
532 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
536 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
537 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
540 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
542 if (!(xcr0
& XSTATE_FP
))
544 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
546 if (xcr0
& ~host_xcr0
)
548 vcpu
->arch
.xcr0
= xcr0
;
549 vcpu
->guest_xcr0_loaded
= 0;
553 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
555 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
556 kvm_inject_gp(vcpu
, 0);
561 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
563 static bool guest_cpuid_has_xsave(struct kvm_vcpu
*vcpu
)
565 struct kvm_cpuid_entry2
*best
;
567 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
568 return best
&& (best
->ecx
& bit(X86_FEATURE_XSAVE
));
571 static void update_cpuid(struct kvm_vcpu
*vcpu
)
573 struct kvm_cpuid_entry2
*best
;
575 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
579 /* Update OSXSAVE bit */
580 if (cpu_has_xsave
&& best
->function
== 0x1) {
581 best
->ecx
&= ~(bit(X86_FEATURE_OSXSAVE
));
582 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
))
583 best
->ecx
|= bit(X86_FEATURE_OSXSAVE
);
587 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
589 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
590 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
592 if (cr4
& CR4_RESERVED_BITS
)
595 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
598 if (is_long_mode(vcpu
)) {
599 if (!(cr4
& X86_CR4_PAE
))
601 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
602 && ((cr4
^ old_cr4
) & pdptr_bits
)
603 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
))
606 if (cr4
& X86_CR4_VMXE
)
609 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
611 if ((cr4
^ old_cr4
) & pdptr_bits
)
612 kvm_mmu_reset_context(vcpu
);
614 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
619 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
621 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
623 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
624 kvm_mmu_sync_roots(vcpu
);
625 kvm_mmu_flush_tlb(vcpu
);
629 if (is_long_mode(vcpu
)) {
630 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
634 if (cr3
& CR3_PAE_RESERVED_BITS
)
636 if (is_paging(vcpu
) &&
637 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
641 * We don't check reserved bits in nonpae mode, because
642 * this isn't enforced, and VMware depends on this.
647 * Does the new cr3 value map to physical memory? (Note, we
648 * catch an invalid cr3 even in real-mode, because it would
649 * cause trouble later on when we turn on paging anyway.)
651 * A real CPU would silently accept an invalid cr3 and would
652 * attempt to use it - with largely undefined (and often hard
653 * to debug) behavior on the guest side.
655 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
657 vcpu
->arch
.cr3
= cr3
;
658 vcpu
->arch
.mmu
.new_cr3(vcpu
);
661 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
663 int __kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
665 if (cr8
& CR8_RESERVED_BITS
)
667 if (irqchip_in_kernel(vcpu
->kvm
))
668 kvm_lapic_set_tpr(vcpu
, cr8
);
670 vcpu
->arch
.cr8
= cr8
;
674 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
676 if (__kvm_set_cr8(vcpu
, cr8
))
677 kvm_inject_gp(vcpu
, 0);
679 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
681 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
683 if (irqchip_in_kernel(vcpu
->kvm
))
684 return kvm_lapic_get_cr8(vcpu
);
686 return vcpu
->arch
.cr8
;
688 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
690 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
694 vcpu
->arch
.db
[dr
] = val
;
695 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
696 vcpu
->arch
.eff_db
[dr
] = val
;
699 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
703 if (val
& 0xffffffff00000000ULL
)
705 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
708 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
712 if (val
& 0xffffffff00000000ULL
)
714 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
715 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
716 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
717 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
725 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
729 res
= __kvm_set_dr(vcpu
, dr
, val
);
731 kvm_queue_exception(vcpu
, UD_VECTOR
);
733 kvm_inject_gp(vcpu
, 0);
737 EXPORT_SYMBOL_GPL(kvm_set_dr
);
739 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
743 *val
= vcpu
->arch
.db
[dr
];
746 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
750 *val
= vcpu
->arch
.dr6
;
753 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
757 *val
= vcpu
->arch
.dr7
;
764 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
766 if (_kvm_get_dr(vcpu
, dr
, val
)) {
767 kvm_queue_exception(vcpu
, UD_VECTOR
);
772 EXPORT_SYMBOL_GPL(kvm_get_dr
);
775 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
776 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
778 * This list is modified at module load time to reflect the
779 * capabilities of the host cpu. This capabilities test skips MSRs that are
780 * kvm-specific. Those are put in the beginning of the list.
783 #define KVM_SAVE_MSRS_BEGIN 7
784 static u32 msrs_to_save
[] = {
785 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
786 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
787 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
788 HV_X64_MSR_APIC_ASSIST_PAGE
,
789 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
792 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
794 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
797 static unsigned num_msrs_to_save
;
799 static u32 emulated_msrs
[] = {
800 MSR_IA32_MISC_ENABLE
,
805 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
807 u64 old_efer
= vcpu
->arch
.efer
;
809 if (efer
& efer_reserved_bits
)
813 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
816 if (efer
& EFER_FFXSR
) {
817 struct kvm_cpuid_entry2
*feat
;
819 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
820 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
824 if (efer
& EFER_SVME
) {
825 struct kvm_cpuid_entry2
*feat
;
827 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
828 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
833 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
835 kvm_x86_ops
->set_efer(vcpu
, efer
);
837 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
838 kvm_mmu_reset_context(vcpu
);
840 /* Update reserved bits */
841 if ((efer
^ old_efer
) & EFER_NX
)
842 kvm_mmu_reset_context(vcpu
);
847 void kvm_enable_efer_bits(u64 mask
)
849 efer_reserved_bits
&= ~mask
;
851 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
855 * Writes msr value into into the appropriate "register".
856 * Returns 0 on success, non-0 otherwise.
857 * Assumes vcpu_load() was already called.
859 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
861 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
865 * Adapt set_msr() to msr_io()'s calling convention
867 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
869 return kvm_set_msr(vcpu
, index
, *data
);
872 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
876 struct pvclock_wall_clock wc
;
877 struct timespec boot
;
882 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
887 ++version
; /* first time write, random junk */
891 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
894 * The guest calculates current wall clock time by adding
895 * system time (updated by kvm_guest_time_update below) to the
896 * wall clock specified here. guest system time equals host
897 * system time for us, thus we must fill in host boot time here.
901 wc
.sec
= boot
.tv_sec
;
902 wc
.nsec
= boot
.tv_nsec
;
903 wc
.version
= version
;
905 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
908 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
911 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
913 uint32_t quotient
, remainder
;
915 /* Don't try to replace with do_div(), this one calculates
916 * "(dividend << 32) / divisor" */
918 : "=a" (quotient
), "=d" (remainder
)
919 : "0" (0), "1" (dividend
), "r" (divisor
) );
923 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
924 s8
*pshift
, u32
*pmultiplier
)
931 tps64
= base_khz
* 1000LL;
932 scaled64
= scaled_khz
* 1000LL;
933 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
938 tps32
= (uint32_t)tps64
;
939 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
940 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
948 *pmultiplier
= div_frac(scaled64
, tps32
);
950 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
951 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
954 static inline u64
get_kernel_ns(void)
958 WARN_ON(preemptible());
960 monotonic_to_bootbased(&ts
);
961 return timespec_to_ns(&ts
);
964 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
965 unsigned long max_tsc_khz
;
967 static inline int kvm_tsc_changes_freq(void)
970 int ret
= !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) &&
971 cpufreq_quick_get(cpu
) != 0;
976 static inline u64
nsec_to_cycles(u64 nsec
)
980 WARN_ON(preemptible());
981 if (kvm_tsc_changes_freq())
982 printk_once(KERN_WARNING
983 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
984 ret
= nsec
* __get_cpu_var(cpu_tsc_khz
);
985 do_div(ret
, USEC_PER_SEC
);
989 static void kvm_arch_set_tsc_khz(struct kvm
*kvm
, u32 this_tsc_khz
)
991 /* Compute a scale to convert nanoseconds in TSC cycles */
992 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
993 &kvm
->arch
.virtual_tsc_shift
,
994 &kvm
->arch
.virtual_tsc_mult
);
995 kvm
->arch
.virtual_tsc_khz
= this_tsc_khz
;
998 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1000 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.last_tsc_nsec
,
1001 vcpu
->kvm
->arch
.virtual_tsc_mult
,
1002 vcpu
->kvm
->arch
.virtual_tsc_shift
);
1003 tsc
+= vcpu
->arch
.last_tsc_write
;
1007 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1009 struct kvm
*kvm
= vcpu
->kvm
;
1010 u64 offset
, ns
, elapsed
;
1011 unsigned long flags
;
1014 spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1015 offset
= data
- native_read_tsc();
1016 ns
= get_kernel_ns();
1017 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1018 sdiff
= data
- kvm
->arch
.last_tsc_write
;
1023 * Special case: close write to TSC within 5 seconds of
1024 * another CPU is interpreted as an attempt to synchronize
1025 * The 5 seconds is to accomodate host load / swapping as
1026 * well as any reset of TSC during the boot process.
1028 * In that case, for a reliable TSC, we can match TSC offsets,
1029 * or make a best guest using elapsed value.
1031 if (sdiff
< nsec_to_cycles(5ULL * NSEC_PER_SEC
) &&
1032 elapsed
< 5ULL * NSEC_PER_SEC
) {
1033 if (!check_tsc_unstable()) {
1034 offset
= kvm
->arch
.last_tsc_offset
;
1035 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1037 u64 delta
= nsec_to_cycles(elapsed
);
1039 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1041 ns
= kvm
->arch
.last_tsc_nsec
;
1043 kvm
->arch
.last_tsc_nsec
= ns
;
1044 kvm
->arch
.last_tsc_write
= data
;
1045 kvm
->arch
.last_tsc_offset
= offset
;
1046 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1047 spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1049 /* Reset of TSC must disable overshoot protection below */
1050 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1051 vcpu
->arch
.last_tsc_write
= data
;
1052 vcpu
->arch
.last_tsc_nsec
= ns
;
1054 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1056 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1058 unsigned long flags
;
1059 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1061 unsigned long this_tsc_khz
;
1062 s64 kernel_ns
, max_kernel_ns
;
1065 /* Keep irq disabled to prevent changes to the clock */
1066 local_irq_save(flags
);
1067 kvm_get_msr(v
, MSR_IA32_TSC
, &tsc_timestamp
);
1068 kernel_ns
= get_kernel_ns();
1069 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1071 if (unlikely(this_tsc_khz
== 0)) {
1072 local_irq_restore(flags
);
1073 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1078 * We may have to catch up the TSC to match elapsed wall clock
1079 * time for two reasons, even if kvmclock is used.
1080 * 1) CPU could have been running below the maximum TSC rate
1081 * 2) Broken TSC compensation resets the base at each VCPU
1082 * entry to avoid unknown leaps of TSC even when running
1083 * again on the same CPU. This may cause apparent elapsed
1084 * time to disappear, and the guest to stand still or run
1087 if (vcpu
->tsc_catchup
) {
1088 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1089 if (tsc
> tsc_timestamp
) {
1090 kvm_x86_ops
->adjust_tsc_offset(v
, tsc
- tsc_timestamp
);
1091 tsc_timestamp
= tsc
;
1095 local_irq_restore(flags
);
1097 if (!vcpu
->time_page
)
1101 * Time as measured by the TSC may go backwards when resetting the base
1102 * tsc_timestamp. The reason for this is that the TSC resolution is
1103 * higher than the resolution of the other clock scales. Thus, many
1104 * possible measurments of the TSC correspond to one measurement of any
1105 * other clock, and so a spread of values is possible. This is not a
1106 * problem for the computation of the nanosecond clock; with TSC rates
1107 * around 1GHZ, there can only be a few cycles which correspond to one
1108 * nanosecond value, and any path through this code will inevitably
1109 * take longer than that. However, with the kernel_ns value itself,
1110 * the precision may be much lower, down to HZ granularity. If the
1111 * first sampling of TSC against kernel_ns ends in the low part of the
1112 * range, and the second in the high end of the range, we can get:
1114 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1116 * As the sampling errors potentially range in the thousands of cycles,
1117 * it is possible such a time value has already been observed by the
1118 * guest. To protect against this, we must compute the system time as
1119 * observed by the guest and ensure the new system time is greater.
1122 if (vcpu
->hv_clock
.tsc_timestamp
&& vcpu
->last_guest_tsc
) {
1123 max_kernel_ns
= vcpu
->last_guest_tsc
-
1124 vcpu
->hv_clock
.tsc_timestamp
;
1125 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1126 vcpu
->hv_clock
.tsc_to_system_mul
,
1127 vcpu
->hv_clock
.tsc_shift
);
1128 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1131 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1132 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1133 &vcpu
->hv_clock
.tsc_shift
,
1134 &vcpu
->hv_clock
.tsc_to_system_mul
);
1135 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1138 if (max_kernel_ns
> kernel_ns
)
1139 kernel_ns
= max_kernel_ns
;
1141 /* With all the info we got, fill in the values */
1142 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1143 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1144 vcpu
->last_kernel_ns
= kernel_ns
;
1145 vcpu
->last_guest_tsc
= tsc_timestamp
;
1146 vcpu
->hv_clock
.flags
= 0;
1149 * The interface expects us to write an even number signaling that the
1150 * update is finished. Since the guest won't see the intermediate
1151 * state, we just increase by 2 at the end.
1153 vcpu
->hv_clock
.version
+= 2;
1155 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
1157 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1158 sizeof(vcpu
->hv_clock
));
1160 kunmap_atomic(shared_kaddr
, KM_USER0
);
1162 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1166 static bool msr_mtrr_valid(unsigned msr
)
1169 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1170 case MSR_MTRRfix64K_00000
:
1171 case MSR_MTRRfix16K_80000
:
1172 case MSR_MTRRfix16K_A0000
:
1173 case MSR_MTRRfix4K_C0000
:
1174 case MSR_MTRRfix4K_C8000
:
1175 case MSR_MTRRfix4K_D0000
:
1176 case MSR_MTRRfix4K_D8000
:
1177 case MSR_MTRRfix4K_E0000
:
1178 case MSR_MTRRfix4K_E8000
:
1179 case MSR_MTRRfix4K_F0000
:
1180 case MSR_MTRRfix4K_F8000
:
1181 case MSR_MTRRdefType
:
1182 case MSR_IA32_CR_PAT
:
1190 static bool valid_pat_type(unsigned t
)
1192 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1195 static bool valid_mtrr_type(unsigned t
)
1197 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1200 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1204 if (!msr_mtrr_valid(msr
))
1207 if (msr
== MSR_IA32_CR_PAT
) {
1208 for (i
= 0; i
< 8; i
++)
1209 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1212 } else if (msr
== MSR_MTRRdefType
) {
1215 return valid_mtrr_type(data
& 0xff);
1216 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1217 for (i
= 0; i
< 8 ; i
++)
1218 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1223 /* variable MTRRs */
1224 return valid_mtrr_type(data
& 0xff);
1227 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1229 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1231 if (!mtrr_valid(vcpu
, msr
, data
))
1234 if (msr
== MSR_MTRRdefType
) {
1235 vcpu
->arch
.mtrr_state
.def_type
= data
;
1236 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1237 } else if (msr
== MSR_MTRRfix64K_00000
)
1239 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1240 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1241 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1242 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1243 else if (msr
== MSR_IA32_CR_PAT
)
1244 vcpu
->arch
.pat
= data
;
1245 else { /* Variable MTRRs */
1246 int idx
, is_mtrr_mask
;
1249 idx
= (msr
- 0x200) / 2;
1250 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1253 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1256 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1260 kvm_mmu_reset_context(vcpu
);
1264 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1266 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1267 unsigned bank_num
= mcg_cap
& 0xff;
1270 case MSR_IA32_MCG_STATUS
:
1271 vcpu
->arch
.mcg_status
= data
;
1273 case MSR_IA32_MCG_CTL
:
1274 if (!(mcg_cap
& MCG_CTL_P
))
1276 if (data
!= 0 && data
!= ~(u64
)0)
1278 vcpu
->arch
.mcg_ctl
= data
;
1281 if (msr
>= MSR_IA32_MC0_CTL
&&
1282 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1283 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1284 /* only 0 or all 1s can be written to IA32_MCi_CTL
1285 * some Linux kernels though clear bit 10 in bank 4 to
1286 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1287 * this to avoid an uncatched #GP in the guest
1289 if ((offset
& 0x3) == 0 &&
1290 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1292 vcpu
->arch
.mce_banks
[offset
] = data
;
1300 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1302 struct kvm
*kvm
= vcpu
->kvm
;
1303 int lm
= is_long_mode(vcpu
);
1304 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1305 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1306 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1307 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1308 u32 page_num
= data
& ~PAGE_MASK
;
1309 u64 page_addr
= data
& PAGE_MASK
;
1314 if (page_num
>= blob_size
)
1317 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1321 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1323 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1332 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1334 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1337 static bool kvm_hv_msr_partition_wide(u32 msr
)
1341 case HV_X64_MSR_GUEST_OS_ID
:
1342 case HV_X64_MSR_HYPERCALL
:
1350 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1352 struct kvm
*kvm
= vcpu
->kvm
;
1355 case HV_X64_MSR_GUEST_OS_ID
:
1356 kvm
->arch
.hv_guest_os_id
= data
;
1357 /* setting guest os id to zero disables hypercall page */
1358 if (!kvm
->arch
.hv_guest_os_id
)
1359 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1361 case HV_X64_MSR_HYPERCALL
: {
1366 /* if guest os id is not set hypercall should remain disabled */
1367 if (!kvm
->arch
.hv_guest_os_id
)
1369 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1370 kvm
->arch
.hv_hypercall
= data
;
1373 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1374 addr
= gfn_to_hva(kvm
, gfn
);
1375 if (kvm_is_error_hva(addr
))
1377 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1378 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1379 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1381 kvm
->arch
.hv_hypercall
= data
;
1385 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1386 "data 0x%llx\n", msr
, data
);
1392 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1395 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1398 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1399 vcpu
->arch
.hv_vapic
= data
;
1402 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1403 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1404 if (kvm_is_error_hva(addr
))
1406 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1408 vcpu
->arch
.hv_vapic
= data
;
1411 case HV_X64_MSR_EOI
:
1412 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1413 case HV_X64_MSR_ICR
:
1414 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1415 case HV_X64_MSR_TPR
:
1416 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1418 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1419 "data 0x%llx\n", msr
, data
);
1426 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1430 return set_efer(vcpu
, data
);
1432 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1433 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1435 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1440 case MSR_FAM10H_MMIO_CONF_BASE
:
1442 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1447 case MSR_AMD64_NB_CFG
:
1449 case MSR_IA32_DEBUGCTLMSR
:
1451 /* We support the non-activated case already */
1453 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1454 /* Values other than LBR and BTF are vendor-specific,
1455 thus reserved and should throw a #GP */
1458 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1461 case MSR_IA32_UCODE_REV
:
1462 case MSR_IA32_UCODE_WRITE
:
1463 case MSR_VM_HSAVE_PA
:
1464 case MSR_AMD64_PATCH_LOADER
:
1466 case 0x200 ... 0x2ff:
1467 return set_msr_mtrr(vcpu
, msr
, data
);
1468 case MSR_IA32_APICBASE
:
1469 kvm_set_apic_base(vcpu
, data
);
1471 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1472 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1473 case MSR_IA32_MISC_ENABLE
:
1474 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1476 case MSR_KVM_WALL_CLOCK_NEW
:
1477 case MSR_KVM_WALL_CLOCK
:
1478 vcpu
->kvm
->arch
.wall_clock
= data
;
1479 kvm_write_wall_clock(vcpu
->kvm
, data
);
1481 case MSR_KVM_SYSTEM_TIME_NEW
:
1482 case MSR_KVM_SYSTEM_TIME
: {
1483 if (vcpu
->arch
.time_page
) {
1484 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1485 vcpu
->arch
.time_page
= NULL
;
1488 vcpu
->arch
.time
= data
;
1489 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1491 /* we verify if the enable bit is set... */
1495 /* ...but clean it before doing the actual write */
1496 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1498 vcpu
->arch
.time_page
=
1499 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1501 if (is_error_page(vcpu
->arch
.time_page
)) {
1502 kvm_release_page_clean(vcpu
->arch
.time_page
);
1503 vcpu
->arch
.time_page
= NULL
;
1507 case MSR_IA32_MCG_CTL
:
1508 case MSR_IA32_MCG_STATUS
:
1509 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1510 return set_msr_mce(vcpu
, msr
, data
);
1512 /* Performance counters are not protected by a CPUID bit,
1513 * so we should check all of them in the generic path for the sake of
1514 * cross vendor migration.
1515 * Writing a zero into the event select MSRs disables them,
1516 * which we perfectly emulate ;-). Any other value should be at least
1517 * reported, some guests depend on them.
1519 case MSR_P6_EVNTSEL0
:
1520 case MSR_P6_EVNTSEL1
:
1521 case MSR_K7_EVNTSEL0
:
1522 case MSR_K7_EVNTSEL1
:
1523 case MSR_K7_EVNTSEL2
:
1524 case MSR_K7_EVNTSEL3
:
1526 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1527 "0x%x data 0x%llx\n", msr
, data
);
1529 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1530 * so we ignore writes to make it happy.
1532 case MSR_P6_PERFCTR0
:
1533 case MSR_P6_PERFCTR1
:
1534 case MSR_K7_PERFCTR0
:
1535 case MSR_K7_PERFCTR1
:
1536 case MSR_K7_PERFCTR2
:
1537 case MSR_K7_PERFCTR3
:
1538 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1539 "0x%x data 0x%llx\n", msr
, data
);
1541 case MSR_K7_CLK_CTL
:
1543 * Ignore all writes to this no longer documented MSR.
1544 * Writes are only relevant for old K7 processors,
1545 * all pre-dating SVM, but a recommended workaround from
1546 * AMD for these chips. It is possible to speicify the
1547 * affected processor models on the command line, hence
1548 * the need to ignore the workaround.
1551 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1552 if (kvm_hv_msr_partition_wide(msr
)) {
1554 mutex_lock(&vcpu
->kvm
->lock
);
1555 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1556 mutex_unlock(&vcpu
->kvm
->lock
);
1559 return set_msr_hyperv(vcpu
, msr
, data
);
1562 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1563 return xen_hvm_config(vcpu
, data
);
1565 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1569 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1576 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1580 * Reads an msr value (of 'msr_index') into 'pdata'.
1581 * Returns 0 on success, non-0 otherwise.
1582 * Assumes vcpu_load() was already called.
1584 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1586 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1589 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1591 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1593 if (!msr_mtrr_valid(msr
))
1596 if (msr
== MSR_MTRRdefType
)
1597 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1598 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1599 else if (msr
== MSR_MTRRfix64K_00000
)
1601 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1602 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1603 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1604 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1605 else if (msr
== MSR_IA32_CR_PAT
)
1606 *pdata
= vcpu
->arch
.pat
;
1607 else { /* Variable MTRRs */
1608 int idx
, is_mtrr_mask
;
1611 idx
= (msr
- 0x200) / 2;
1612 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1615 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1618 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1625 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1628 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1629 unsigned bank_num
= mcg_cap
& 0xff;
1632 case MSR_IA32_P5_MC_ADDR
:
1633 case MSR_IA32_P5_MC_TYPE
:
1636 case MSR_IA32_MCG_CAP
:
1637 data
= vcpu
->arch
.mcg_cap
;
1639 case MSR_IA32_MCG_CTL
:
1640 if (!(mcg_cap
& MCG_CTL_P
))
1642 data
= vcpu
->arch
.mcg_ctl
;
1644 case MSR_IA32_MCG_STATUS
:
1645 data
= vcpu
->arch
.mcg_status
;
1648 if (msr
>= MSR_IA32_MC0_CTL
&&
1649 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1650 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1651 data
= vcpu
->arch
.mce_banks
[offset
];
1660 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1663 struct kvm
*kvm
= vcpu
->kvm
;
1666 case HV_X64_MSR_GUEST_OS_ID
:
1667 data
= kvm
->arch
.hv_guest_os_id
;
1669 case HV_X64_MSR_HYPERCALL
:
1670 data
= kvm
->arch
.hv_hypercall
;
1673 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1681 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1686 case HV_X64_MSR_VP_INDEX
: {
1689 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1694 case HV_X64_MSR_EOI
:
1695 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1696 case HV_X64_MSR_ICR
:
1697 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1698 case HV_X64_MSR_TPR
:
1699 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1701 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1708 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1713 case MSR_IA32_PLATFORM_ID
:
1714 case MSR_IA32_UCODE_REV
:
1715 case MSR_IA32_EBL_CR_POWERON
:
1716 case MSR_IA32_DEBUGCTLMSR
:
1717 case MSR_IA32_LASTBRANCHFROMIP
:
1718 case MSR_IA32_LASTBRANCHTOIP
:
1719 case MSR_IA32_LASTINTFROMIP
:
1720 case MSR_IA32_LASTINTTOIP
:
1723 case MSR_VM_HSAVE_PA
:
1724 case MSR_P6_PERFCTR0
:
1725 case MSR_P6_PERFCTR1
:
1726 case MSR_P6_EVNTSEL0
:
1727 case MSR_P6_EVNTSEL1
:
1728 case MSR_K7_EVNTSEL0
:
1729 case MSR_K7_PERFCTR0
:
1730 case MSR_K8_INT_PENDING_MSG
:
1731 case MSR_AMD64_NB_CFG
:
1732 case MSR_FAM10H_MMIO_CONF_BASE
:
1736 data
= 0x500 | KVM_NR_VAR_MTRR
;
1738 case 0x200 ... 0x2ff:
1739 return get_msr_mtrr(vcpu
, msr
, pdata
);
1740 case 0xcd: /* fsb frequency */
1744 * MSR_EBC_FREQUENCY_ID
1745 * Conservative value valid for even the basic CPU models.
1746 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1747 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1748 * and 266MHz for model 3, or 4. Set Core Clock
1749 * Frequency to System Bus Frequency Ratio to 1 (bits
1750 * 31:24) even though these are only valid for CPU
1751 * models > 2, however guests may end up dividing or
1752 * multiplying by zero otherwise.
1754 case MSR_EBC_FREQUENCY_ID
:
1757 case MSR_IA32_APICBASE
:
1758 data
= kvm_get_apic_base(vcpu
);
1760 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1761 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1763 case MSR_IA32_MISC_ENABLE
:
1764 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1766 case MSR_IA32_PERF_STATUS
:
1767 /* TSC increment by tick */
1769 /* CPU multiplier */
1770 data
|= (((uint64_t)4ULL) << 40);
1773 data
= vcpu
->arch
.efer
;
1775 case MSR_KVM_WALL_CLOCK
:
1776 case MSR_KVM_WALL_CLOCK_NEW
:
1777 data
= vcpu
->kvm
->arch
.wall_clock
;
1779 case MSR_KVM_SYSTEM_TIME
:
1780 case MSR_KVM_SYSTEM_TIME_NEW
:
1781 data
= vcpu
->arch
.time
;
1783 case MSR_IA32_P5_MC_ADDR
:
1784 case MSR_IA32_P5_MC_TYPE
:
1785 case MSR_IA32_MCG_CAP
:
1786 case MSR_IA32_MCG_CTL
:
1787 case MSR_IA32_MCG_STATUS
:
1788 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1789 return get_msr_mce(vcpu
, msr
, pdata
);
1790 case MSR_K7_CLK_CTL
:
1792 * Provide expected ramp-up count for K7. All other
1793 * are set to zero, indicating minimum divisors for
1796 * This prevents guest kernels on AMD host with CPU
1797 * type 6, model 8 and higher from exploding due to
1798 * the rdmsr failing.
1802 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1803 if (kvm_hv_msr_partition_wide(msr
)) {
1805 mutex_lock(&vcpu
->kvm
->lock
);
1806 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1807 mutex_unlock(&vcpu
->kvm
->lock
);
1810 return get_msr_hyperv(vcpu
, msr
, pdata
);
1814 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1817 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1825 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1828 * Read or write a bunch of msrs. All parameters are kernel addresses.
1830 * @return number of msrs set successfully.
1832 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1833 struct kvm_msr_entry
*entries
,
1834 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1835 unsigned index
, u64
*data
))
1839 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1840 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1841 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1843 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1849 * Read or write a bunch of msrs. Parameters are user addresses.
1851 * @return number of msrs set successfully.
1853 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1854 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1855 unsigned index
, u64
*data
),
1858 struct kvm_msrs msrs
;
1859 struct kvm_msr_entry
*entries
;
1864 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1868 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1872 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1873 entries
= kmalloc(size
, GFP_KERNEL
);
1878 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1881 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1886 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1897 int kvm_dev_ioctl_check_extension(long ext
)
1902 case KVM_CAP_IRQCHIP
:
1904 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1905 case KVM_CAP_SET_TSS_ADDR
:
1906 case KVM_CAP_EXT_CPUID
:
1907 case KVM_CAP_CLOCKSOURCE
:
1909 case KVM_CAP_NOP_IO_DELAY
:
1910 case KVM_CAP_MP_STATE
:
1911 case KVM_CAP_SYNC_MMU
:
1912 case KVM_CAP_REINJECT_CONTROL
:
1913 case KVM_CAP_IRQ_INJECT_STATUS
:
1914 case KVM_CAP_ASSIGN_DEV_IRQ
:
1916 case KVM_CAP_IOEVENTFD
:
1918 case KVM_CAP_PIT_STATE2
:
1919 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1920 case KVM_CAP_XEN_HVM
:
1921 case KVM_CAP_ADJUST_CLOCK
:
1922 case KVM_CAP_VCPU_EVENTS
:
1923 case KVM_CAP_HYPERV
:
1924 case KVM_CAP_HYPERV_VAPIC
:
1925 case KVM_CAP_HYPERV_SPIN
:
1926 case KVM_CAP_PCI_SEGMENT
:
1927 case KVM_CAP_DEBUGREGS
:
1928 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1932 case KVM_CAP_COALESCED_MMIO
:
1933 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1936 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1938 case KVM_CAP_NR_VCPUS
:
1941 case KVM_CAP_NR_MEMSLOTS
:
1942 r
= KVM_MEMORY_SLOTS
;
1944 case KVM_CAP_PV_MMU
: /* obsolete */
1951 r
= KVM_MAX_MCE_BANKS
;
1964 long kvm_arch_dev_ioctl(struct file
*filp
,
1965 unsigned int ioctl
, unsigned long arg
)
1967 void __user
*argp
= (void __user
*)arg
;
1971 case KVM_GET_MSR_INDEX_LIST
: {
1972 struct kvm_msr_list __user
*user_msr_list
= argp
;
1973 struct kvm_msr_list msr_list
;
1977 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1980 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1981 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1984 if (n
< msr_list
.nmsrs
)
1987 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1988 num_msrs_to_save
* sizeof(u32
)))
1990 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1992 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1997 case KVM_GET_SUPPORTED_CPUID
: {
1998 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1999 struct kvm_cpuid2 cpuid
;
2002 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2004 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2005 cpuid_arg
->entries
);
2010 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2015 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2018 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2020 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2032 static void wbinvd_ipi(void *garbage
)
2037 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2039 return vcpu
->kvm
->arch
.iommu_domain
&&
2040 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2043 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2045 /* Address WBINVD may be executed by guest */
2046 if (need_emulate_wbinvd(vcpu
)) {
2047 if (kvm_x86_ops
->has_wbinvd_exit())
2048 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2049 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2050 smp_call_function_single(vcpu
->cpu
,
2051 wbinvd_ipi
, NULL
, 1);
2054 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2055 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2056 /* Make sure TSC doesn't go backwards */
2057 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2058 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2060 mark_tsc_unstable("KVM discovered backwards TSC");
2061 if (check_tsc_unstable()) {
2062 kvm_x86_ops
->adjust_tsc_offset(vcpu
, -tsc_delta
);
2063 vcpu
->arch
.tsc_catchup
= 1;
2064 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2066 if (vcpu
->cpu
!= cpu
)
2067 kvm_migrate_timers(vcpu
);
2072 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2074 kvm_x86_ops
->vcpu_put(vcpu
);
2075 kvm_put_guest_fpu(vcpu
);
2076 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2079 static int is_efer_nx(void)
2081 unsigned long long efer
= 0;
2083 rdmsrl_safe(MSR_EFER
, &efer
);
2084 return efer
& EFER_NX
;
2087 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
2090 struct kvm_cpuid_entry2
*e
, *entry
;
2093 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
2094 e
= &vcpu
->arch
.cpuid_entries
[i
];
2095 if (e
->function
== 0x80000001) {
2100 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
2101 entry
->edx
&= ~(1 << 20);
2102 printk(KERN_INFO
"kvm: guest NX capability removed\n");
2106 /* when an old userspace process fills a new kernel module */
2107 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
2108 struct kvm_cpuid
*cpuid
,
2109 struct kvm_cpuid_entry __user
*entries
)
2112 struct kvm_cpuid_entry
*cpuid_entries
;
2115 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2118 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
2122 if (copy_from_user(cpuid_entries
, entries
,
2123 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
2125 for (i
= 0; i
< cpuid
->nent
; i
++) {
2126 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
2127 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
2128 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
2129 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
2130 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
2131 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
2132 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
2133 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
2134 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
2135 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
2137 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2138 cpuid_fix_nx_cap(vcpu
);
2140 kvm_apic_set_version(vcpu
);
2141 kvm_x86_ops
->cpuid_update(vcpu
);
2145 vfree(cpuid_entries
);
2150 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
2151 struct kvm_cpuid2
*cpuid
,
2152 struct kvm_cpuid_entry2 __user
*entries
)
2157 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2160 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
2161 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
2163 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2164 kvm_apic_set_version(vcpu
);
2165 kvm_x86_ops
->cpuid_update(vcpu
);
2173 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
2174 struct kvm_cpuid2
*cpuid
,
2175 struct kvm_cpuid_entry2 __user
*entries
)
2180 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
2183 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
2184 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
2189 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
2193 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2196 entry
->function
= function
;
2197 entry
->index
= index
;
2198 cpuid_count(entry
->function
, entry
->index
,
2199 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
2203 #define F(x) bit(X86_FEATURE_##x)
2205 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2206 u32 index
, int *nent
, int maxnent
)
2208 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
2209 #ifdef CONFIG_X86_64
2210 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
2212 unsigned f_lm
= F(LM
);
2214 unsigned f_gbpages
= 0;
2217 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
2220 const u32 kvm_supported_word0_x86_features
=
2221 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2222 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2223 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
2224 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2225 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
2226 0 /* Reserved, DS, ACPI */ | F(MMX
) |
2227 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
2228 0 /* HTT, TM, Reserved, PBE */;
2229 /* cpuid 0x80000001.edx */
2230 const u32 kvm_supported_word1_x86_features
=
2231 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2232 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2233 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
2234 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2235 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
2236 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
2237 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
2238 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
2240 const u32 kvm_supported_word4_x86_features
=
2241 F(XMM3
) | F(PCLMULQDQ
) | 0 /* DTES64, MONITOR */ |
2242 0 /* DS-CPL, VMX, SMX, EST */ |
2243 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2244 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
2245 0 /* Reserved, DCA */ | F(XMM4_1
) |
2246 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
2247 0 /* Reserved*/ | F(AES
) | F(XSAVE
) | 0 /* OSXSAVE */ | F(AVX
) |
2249 /* cpuid 0x80000001.ecx */
2250 const u32 kvm_supported_word6_x86_features
=
2251 F(LAHF_LM
) | F(CMP_LEGACY
) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2252 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
2253 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP
) |
2254 0 /* SKINIT, WDT, LWP */ | F(FMA4
) | F(TBM
);
2256 /* all calls to cpuid_count() should be made on the same cpu */
2258 do_cpuid_1_ent(entry
, function
, index
);
2263 entry
->eax
= min(entry
->eax
, (u32
)0xd);
2266 entry
->edx
&= kvm_supported_word0_x86_features
;
2267 entry
->ecx
&= kvm_supported_word4_x86_features
;
2268 /* we support x2apic emulation even if host does not support
2269 * it since we emulate x2apic in software */
2270 entry
->ecx
|= F(X2APIC
);
2272 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2273 * may return different values. This forces us to get_cpu() before
2274 * issuing the first command, and also to emulate this annoying behavior
2275 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2277 int t
, times
= entry
->eax
& 0xff;
2279 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2280 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
2281 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
2282 do_cpuid_1_ent(&entry
[t
], function
, 0);
2283 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2288 /* function 4 and 0xb have additional index. */
2292 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2293 /* read more entries until cache_type is zero */
2294 for (i
= 1; *nent
< maxnent
; ++i
) {
2295 cache_type
= entry
[i
- 1].eax
& 0x1f;
2298 do_cpuid_1_ent(&entry
[i
], function
, i
);
2300 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2308 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2309 /* read more entries until level_type is zero */
2310 for (i
= 1; *nent
< maxnent
; ++i
) {
2311 level_type
= entry
[i
- 1].ecx
& 0xff00;
2314 do_cpuid_1_ent(&entry
[i
], function
, i
);
2316 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2324 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2325 for (i
= 1; *nent
< maxnent
; ++i
) {
2326 if (entry
[i
- 1].eax
== 0 && i
!= 2)
2328 do_cpuid_1_ent(&entry
[i
], function
, i
);
2330 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2335 case KVM_CPUID_SIGNATURE
: {
2336 char signature
[12] = "KVMKVMKVM\0\0";
2337 u32
*sigptr
= (u32
*)signature
;
2339 entry
->ebx
= sigptr
[0];
2340 entry
->ecx
= sigptr
[1];
2341 entry
->edx
= sigptr
[2];
2344 case KVM_CPUID_FEATURES
:
2345 entry
->eax
= (1 << KVM_FEATURE_CLOCKSOURCE
) |
2346 (1 << KVM_FEATURE_NOP_IO_DELAY
) |
2347 (1 << KVM_FEATURE_CLOCKSOURCE2
) |
2348 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT
);
2354 entry
->eax
= min(entry
->eax
, 0x8000001a);
2357 entry
->edx
&= kvm_supported_word1_x86_features
;
2358 entry
->ecx
&= kvm_supported_word6_x86_features
;
2362 kvm_x86_ops
->set_supported_cpuid(function
, entry
);
2369 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
2370 struct kvm_cpuid_entry2 __user
*entries
)
2372 struct kvm_cpuid_entry2
*cpuid_entries
;
2373 int limit
, nent
= 0, r
= -E2BIG
;
2376 if (cpuid
->nent
< 1)
2378 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2379 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
2381 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
2385 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
2386 limit
= cpuid_entries
[0].eax
;
2387 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2388 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2389 &nent
, cpuid
->nent
);
2391 if (nent
>= cpuid
->nent
)
2394 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
2395 limit
= cpuid_entries
[nent
- 1].eax
;
2396 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2397 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2398 &nent
, cpuid
->nent
);
2403 if (nent
>= cpuid
->nent
)
2406 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_SIGNATURE
, 0, &nent
,
2410 if (nent
>= cpuid
->nent
)
2413 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_FEATURES
, 0, &nent
,
2417 if (nent
>= cpuid
->nent
)
2421 if (copy_to_user(entries
, cpuid_entries
,
2422 nent
* sizeof(struct kvm_cpuid_entry2
)))
2428 vfree(cpuid_entries
);
2433 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2434 struct kvm_lapic_state
*s
)
2436 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2441 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2442 struct kvm_lapic_state
*s
)
2444 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2445 kvm_apic_post_state_restore(vcpu
);
2446 update_cr8_intercept(vcpu
);
2451 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2452 struct kvm_interrupt
*irq
)
2454 if (irq
->irq
< 0 || irq
->irq
>= 256)
2456 if (irqchip_in_kernel(vcpu
->kvm
))
2459 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2460 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2465 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2467 kvm_inject_nmi(vcpu
);
2472 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2473 struct kvm_tpr_access_ctl
*tac
)
2477 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2481 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2485 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2488 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2490 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2493 vcpu
->arch
.mcg_cap
= mcg_cap
;
2494 /* Init IA32_MCG_CTL to all 1s */
2495 if (mcg_cap
& MCG_CTL_P
)
2496 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2497 /* Init IA32_MCi_CTL to all 1s */
2498 for (bank
= 0; bank
< bank_num
; bank
++)
2499 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2504 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2505 struct kvm_x86_mce
*mce
)
2507 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2508 unsigned bank_num
= mcg_cap
& 0xff;
2509 u64
*banks
= vcpu
->arch
.mce_banks
;
2511 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2514 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2515 * reporting is disabled
2517 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2518 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2520 banks
+= 4 * mce
->bank
;
2522 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2523 * reporting is disabled for the bank
2525 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2527 if (mce
->status
& MCI_STATUS_UC
) {
2528 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2529 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2530 printk(KERN_DEBUG
"kvm: set_mce: "
2531 "injects mce exception while "
2532 "previous one is in progress!\n");
2533 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2536 if (banks
[1] & MCI_STATUS_VAL
)
2537 mce
->status
|= MCI_STATUS_OVER
;
2538 banks
[2] = mce
->addr
;
2539 banks
[3] = mce
->misc
;
2540 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2541 banks
[1] = mce
->status
;
2542 kvm_queue_exception(vcpu
, MC_VECTOR
);
2543 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2544 || !(banks
[1] & MCI_STATUS_UC
)) {
2545 if (banks
[1] & MCI_STATUS_VAL
)
2546 mce
->status
|= MCI_STATUS_OVER
;
2547 banks
[2] = mce
->addr
;
2548 banks
[3] = mce
->misc
;
2549 banks
[1] = mce
->status
;
2551 banks
[1] |= MCI_STATUS_OVER
;
2555 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2556 struct kvm_vcpu_events
*events
)
2558 events
->exception
.injected
=
2559 vcpu
->arch
.exception
.pending
&&
2560 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2561 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2562 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2563 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2565 events
->interrupt
.injected
=
2566 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2567 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2568 events
->interrupt
.soft
= 0;
2569 events
->interrupt
.shadow
=
2570 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2571 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2573 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2574 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2575 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2577 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2579 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2580 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2581 | KVM_VCPUEVENT_VALID_SHADOW
);
2584 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2585 struct kvm_vcpu_events
*events
)
2587 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2588 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2589 | KVM_VCPUEVENT_VALID_SHADOW
))
2592 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2593 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2594 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2595 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2597 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2598 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2599 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2600 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2601 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2602 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2603 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2604 events
->interrupt
.shadow
);
2606 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2607 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2608 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2609 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2611 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2612 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2614 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2619 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2620 struct kvm_debugregs
*dbgregs
)
2622 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2623 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2624 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2628 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2629 struct kvm_debugregs
*dbgregs
)
2634 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2635 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2636 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2641 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2642 struct kvm_xsave
*guest_xsave
)
2645 memcpy(guest_xsave
->region
,
2646 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2649 memcpy(guest_xsave
->region
,
2650 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2651 sizeof(struct i387_fxsave_struct
));
2652 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2657 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2658 struct kvm_xsave
*guest_xsave
)
2661 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2664 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2665 guest_xsave
->region
, xstate_size
);
2667 if (xstate_bv
& ~XSTATE_FPSSE
)
2669 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2670 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2675 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2676 struct kvm_xcrs
*guest_xcrs
)
2678 if (!cpu_has_xsave
) {
2679 guest_xcrs
->nr_xcrs
= 0;
2683 guest_xcrs
->nr_xcrs
= 1;
2684 guest_xcrs
->flags
= 0;
2685 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2686 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2689 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2690 struct kvm_xcrs
*guest_xcrs
)
2697 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2700 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2701 /* Only support XCR0 currently */
2702 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2703 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2704 guest_xcrs
->xcrs
[0].value
);
2712 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2713 unsigned int ioctl
, unsigned long arg
)
2715 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2716 void __user
*argp
= (void __user
*)arg
;
2719 struct kvm_lapic_state
*lapic
;
2720 struct kvm_xsave
*xsave
;
2721 struct kvm_xcrs
*xcrs
;
2727 case KVM_GET_LAPIC
: {
2729 if (!vcpu
->arch
.apic
)
2731 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2736 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2740 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2745 case KVM_SET_LAPIC
: {
2747 if (!vcpu
->arch
.apic
)
2749 u
.lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2754 if (copy_from_user(u
.lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2756 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2762 case KVM_INTERRUPT
: {
2763 struct kvm_interrupt irq
;
2766 if (copy_from_user(&irq
, argp
, sizeof irq
))
2768 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2775 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2781 case KVM_SET_CPUID
: {
2782 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2783 struct kvm_cpuid cpuid
;
2786 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2788 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2793 case KVM_SET_CPUID2
: {
2794 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2795 struct kvm_cpuid2 cpuid
;
2798 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2800 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2801 cpuid_arg
->entries
);
2806 case KVM_GET_CPUID2
: {
2807 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2808 struct kvm_cpuid2 cpuid
;
2811 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2813 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2814 cpuid_arg
->entries
);
2818 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2824 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2827 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2829 case KVM_TPR_ACCESS_REPORTING
: {
2830 struct kvm_tpr_access_ctl tac
;
2833 if (copy_from_user(&tac
, argp
, sizeof tac
))
2835 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2839 if (copy_to_user(argp
, &tac
, sizeof tac
))
2844 case KVM_SET_VAPIC_ADDR
: {
2845 struct kvm_vapic_addr va
;
2848 if (!irqchip_in_kernel(vcpu
->kvm
))
2851 if (copy_from_user(&va
, argp
, sizeof va
))
2854 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2857 case KVM_X86_SETUP_MCE
: {
2861 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2863 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2866 case KVM_X86_SET_MCE
: {
2867 struct kvm_x86_mce mce
;
2870 if (copy_from_user(&mce
, argp
, sizeof mce
))
2872 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2875 case KVM_GET_VCPU_EVENTS
: {
2876 struct kvm_vcpu_events events
;
2878 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2881 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2886 case KVM_SET_VCPU_EVENTS
: {
2887 struct kvm_vcpu_events events
;
2890 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2893 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2896 case KVM_GET_DEBUGREGS
: {
2897 struct kvm_debugregs dbgregs
;
2899 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2902 if (copy_to_user(argp
, &dbgregs
,
2903 sizeof(struct kvm_debugregs
)))
2908 case KVM_SET_DEBUGREGS
: {
2909 struct kvm_debugregs dbgregs
;
2912 if (copy_from_user(&dbgregs
, argp
,
2913 sizeof(struct kvm_debugregs
)))
2916 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2919 case KVM_GET_XSAVE
: {
2920 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2925 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2928 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
2933 case KVM_SET_XSAVE
: {
2934 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2940 if (copy_from_user(u
.xsave
, argp
, sizeof(struct kvm_xsave
)))
2943 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
2946 case KVM_GET_XCRS
: {
2947 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2952 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
2955 if (copy_to_user(argp
, u
.xcrs
,
2956 sizeof(struct kvm_xcrs
)))
2961 case KVM_SET_XCRS
: {
2962 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2968 if (copy_from_user(u
.xcrs
, argp
,
2969 sizeof(struct kvm_xcrs
)))
2972 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
2983 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2987 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2989 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2993 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2996 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3000 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3001 u32 kvm_nr_mmu_pages
)
3003 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3006 mutex_lock(&kvm
->slots_lock
);
3007 spin_lock(&kvm
->mmu_lock
);
3009 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3010 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3012 spin_unlock(&kvm
->mmu_lock
);
3013 mutex_unlock(&kvm
->slots_lock
);
3017 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3019 return kvm
->arch
.n_max_mmu_pages
;
3022 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3027 switch (chip
->chip_id
) {
3028 case KVM_IRQCHIP_PIC_MASTER
:
3029 memcpy(&chip
->chip
.pic
,
3030 &pic_irqchip(kvm
)->pics
[0],
3031 sizeof(struct kvm_pic_state
));
3033 case KVM_IRQCHIP_PIC_SLAVE
:
3034 memcpy(&chip
->chip
.pic
,
3035 &pic_irqchip(kvm
)->pics
[1],
3036 sizeof(struct kvm_pic_state
));
3038 case KVM_IRQCHIP_IOAPIC
:
3039 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3048 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3053 switch (chip
->chip_id
) {
3054 case KVM_IRQCHIP_PIC_MASTER
:
3055 spin_lock(&pic_irqchip(kvm
)->lock
);
3056 memcpy(&pic_irqchip(kvm
)->pics
[0],
3058 sizeof(struct kvm_pic_state
));
3059 spin_unlock(&pic_irqchip(kvm
)->lock
);
3061 case KVM_IRQCHIP_PIC_SLAVE
:
3062 spin_lock(&pic_irqchip(kvm
)->lock
);
3063 memcpy(&pic_irqchip(kvm
)->pics
[1],
3065 sizeof(struct kvm_pic_state
));
3066 spin_unlock(&pic_irqchip(kvm
)->lock
);
3068 case KVM_IRQCHIP_IOAPIC
:
3069 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3075 kvm_pic_update_irq(pic_irqchip(kvm
));
3079 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3083 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3084 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3085 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3089 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3093 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3094 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3095 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3096 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3100 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3104 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3105 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3106 sizeof(ps
->channels
));
3107 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3108 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3112 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3114 int r
= 0, start
= 0;
3115 u32 prev_legacy
, cur_legacy
;
3116 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3117 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3118 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3119 if (!prev_legacy
&& cur_legacy
)
3121 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3122 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3123 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3124 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3125 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3129 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3130 struct kvm_reinject_control
*control
)
3132 if (!kvm
->arch
.vpit
)
3134 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3135 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3136 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3141 * Get (and clear) the dirty memory log for a memory slot.
3143 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
3144 struct kvm_dirty_log
*log
)
3147 struct kvm_memory_slot
*memslot
;
3149 unsigned long is_dirty
= 0;
3151 mutex_lock(&kvm
->slots_lock
);
3154 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3157 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
3159 if (!memslot
->dirty_bitmap
)
3162 n
= kvm_dirty_bitmap_bytes(memslot
);
3164 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
3165 is_dirty
= memslot
->dirty_bitmap
[i
];
3167 /* If nothing is dirty, don't bother messing with page tables. */
3169 struct kvm_memslots
*slots
, *old_slots
;
3170 unsigned long *dirty_bitmap
;
3172 spin_lock(&kvm
->mmu_lock
);
3173 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
3174 spin_unlock(&kvm
->mmu_lock
);
3177 dirty_bitmap
= vmalloc(n
);
3180 memset(dirty_bitmap
, 0, n
);
3183 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
3185 vfree(dirty_bitmap
);
3188 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
3189 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
3191 old_slots
= kvm
->memslots
;
3192 rcu_assign_pointer(kvm
->memslots
, slots
);
3193 synchronize_srcu_expedited(&kvm
->srcu
);
3194 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
3198 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
)) {
3199 vfree(dirty_bitmap
);
3202 vfree(dirty_bitmap
);
3205 if (clear_user(log
->dirty_bitmap
, n
))
3211 mutex_unlock(&kvm
->slots_lock
);
3215 long kvm_arch_vm_ioctl(struct file
*filp
,
3216 unsigned int ioctl
, unsigned long arg
)
3218 struct kvm
*kvm
= filp
->private_data
;
3219 void __user
*argp
= (void __user
*)arg
;
3222 * This union makes it completely explicit to gcc-3.x
3223 * that these two variables' stack usage should be
3224 * combined, not added together.
3227 struct kvm_pit_state ps
;
3228 struct kvm_pit_state2 ps2
;
3229 struct kvm_pit_config pit_config
;
3233 case KVM_SET_TSS_ADDR
:
3234 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3238 case KVM_SET_IDENTITY_MAP_ADDR
: {
3242 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3244 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3249 case KVM_SET_NR_MMU_PAGES
:
3250 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3254 case KVM_GET_NR_MMU_PAGES
:
3255 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3257 case KVM_CREATE_IRQCHIP
: {
3258 struct kvm_pic
*vpic
;
3260 mutex_lock(&kvm
->lock
);
3263 goto create_irqchip_unlock
;
3265 vpic
= kvm_create_pic(kvm
);
3267 r
= kvm_ioapic_init(kvm
);
3269 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3272 goto create_irqchip_unlock
;
3275 goto create_irqchip_unlock
;
3277 kvm
->arch
.vpic
= vpic
;
3279 r
= kvm_setup_default_irq_routing(kvm
);
3281 mutex_lock(&kvm
->irq_lock
);
3282 kvm_ioapic_destroy(kvm
);
3283 kvm_destroy_pic(kvm
);
3284 mutex_unlock(&kvm
->irq_lock
);
3286 create_irqchip_unlock
:
3287 mutex_unlock(&kvm
->lock
);
3290 case KVM_CREATE_PIT
:
3291 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3293 case KVM_CREATE_PIT2
:
3295 if (copy_from_user(&u
.pit_config
, argp
,
3296 sizeof(struct kvm_pit_config
)))
3299 mutex_lock(&kvm
->slots_lock
);
3302 goto create_pit_unlock
;
3304 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3308 mutex_unlock(&kvm
->slots_lock
);
3310 case KVM_IRQ_LINE_STATUS
:
3311 case KVM_IRQ_LINE
: {
3312 struct kvm_irq_level irq_event
;
3315 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3318 if (irqchip_in_kernel(kvm
)) {
3320 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3321 irq_event
.irq
, irq_event
.level
);
3322 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3324 irq_event
.status
= status
;
3325 if (copy_to_user(argp
, &irq_event
,
3333 case KVM_GET_IRQCHIP
: {
3334 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3335 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3341 if (copy_from_user(chip
, argp
, sizeof *chip
))
3342 goto get_irqchip_out
;
3344 if (!irqchip_in_kernel(kvm
))
3345 goto get_irqchip_out
;
3346 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3348 goto get_irqchip_out
;
3350 if (copy_to_user(argp
, chip
, sizeof *chip
))
3351 goto get_irqchip_out
;
3359 case KVM_SET_IRQCHIP
: {
3360 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3361 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3367 if (copy_from_user(chip
, argp
, sizeof *chip
))
3368 goto set_irqchip_out
;
3370 if (!irqchip_in_kernel(kvm
))
3371 goto set_irqchip_out
;
3372 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3374 goto set_irqchip_out
;
3384 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3387 if (!kvm
->arch
.vpit
)
3389 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3393 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3400 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3403 if (!kvm
->arch
.vpit
)
3405 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3411 case KVM_GET_PIT2
: {
3413 if (!kvm
->arch
.vpit
)
3415 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3419 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3424 case KVM_SET_PIT2
: {
3426 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3429 if (!kvm
->arch
.vpit
)
3431 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3437 case KVM_REINJECT_CONTROL
: {
3438 struct kvm_reinject_control control
;
3440 if (copy_from_user(&control
, argp
, sizeof(control
)))
3442 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3448 case KVM_XEN_HVM_CONFIG
: {
3450 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3451 sizeof(struct kvm_xen_hvm_config
)))
3454 if (kvm
->arch
.xen_hvm_config
.flags
)
3459 case KVM_SET_CLOCK
: {
3460 struct kvm_clock_data user_ns
;
3465 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3473 local_irq_disable();
3474 now_ns
= get_kernel_ns();
3475 delta
= user_ns
.clock
- now_ns
;
3477 kvm
->arch
.kvmclock_offset
= delta
;
3480 case KVM_GET_CLOCK
: {
3481 struct kvm_clock_data user_ns
;
3484 local_irq_disable();
3485 now_ns
= get_kernel_ns();
3486 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3491 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3504 static void kvm_init_msr_list(void)
3509 /* skip the first msrs in the list. KVM-specific */
3510 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3511 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3514 msrs_to_save
[j
] = msrs_to_save
[i
];
3517 num_msrs_to_save
= j
;
3520 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3523 if (vcpu
->arch
.apic
&&
3524 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3527 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3530 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3532 if (vcpu
->arch
.apic
&&
3533 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3536 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3539 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3540 struct kvm_segment
*var
, int seg
)
3542 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3545 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3546 struct kvm_segment
*var
, int seg
)
3548 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3551 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3556 static gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3561 BUG_ON(!mmu_is_nested(vcpu
));
3563 /* NPT walks are always user-walks */
3564 access
|= PFERR_USER_MASK
;
3565 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &error
);
3566 if (t_gpa
== UNMAPPED_GVA
)
3567 vcpu
->arch
.fault
.nested
= true;
3572 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3574 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3575 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3578 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3580 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3581 access
|= PFERR_FETCH_MASK
;
3582 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3585 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3587 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3588 access
|= PFERR_WRITE_MASK
;
3589 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3592 /* uses this to access any guest's mapped memory without checking CPL */
3593 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3595 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, error
);
3598 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3599 struct kvm_vcpu
*vcpu
, u32 access
,
3603 int r
= X86EMUL_CONTINUE
;
3606 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3608 unsigned offset
= addr
& (PAGE_SIZE
-1);
3609 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3612 if (gpa
== UNMAPPED_GVA
) {
3613 r
= X86EMUL_PROPAGATE_FAULT
;
3616 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3618 r
= X86EMUL_IO_NEEDED
;
3630 /* used for instruction fetching */
3631 static int kvm_fetch_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3632 struct kvm_vcpu
*vcpu
, u32
*error
)
3634 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3635 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3636 access
| PFERR_FETCH_MASK
, error
);
3639 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3640 struct kvm_vcpu
*vcpu
, u32
*error
)
3642 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3643 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3647 static int kvm_read_guest_virt_system(gva_t addr
, void *val
, unsigned int bytes
,
3648 struct kvm_vcpu
*vcpu
, u32
*error
)
3650 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, error
);
3653 static int kvm_write_guest_virt_system(gva_t addr
, void *val
,
3655 struct kvm_vcpu
*vcpu
,
3659 int r
= X86EMUL_CONTINUE
;
3662 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3665 unsigned offset
= addr
& (PAGE_SIZE
-1);
3666 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3669 if (gpa
== UNMAPPED_GVA
) {
3670 r
= X86EMUL_PROPAGATE_FAULT
;
3673 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3675 r
= X86EMUL_IO_NEEDED
;
3687 static int emulator_read_emulated(unsigned long addr
,
3690 unsigned int *error_code
,
3691 struct kvm_vcpu
*vcpu
)
3695 if (vcpu
->mmio_read_completed
) {
3696 memcpy(val
, vcpu
->mmio_data
, bytes
);
3697 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3698 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3699 vcpu
->mmio_read_completed
= 0;
3700 return X86EMUL_CONTINUE
;
3703 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, error_code
);
3705 if (gpa
== UNMAPPED_GVA
)
3706 return X86EMUL_PROPAGATE_FAULT
;
3708 /* For APIC access vmexit */
3709 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3712 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
, NULL
)
3713 == X86EMUL_CONTINUE
)
3714 return X86EMUL_CONTINUE
;
3718 * Is this MMIO handled locally?
3720 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3721 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3722 return X86EMUL_CONTINUE
;
3725 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3727 vcpu
->mmio_needed
= 1;
3728 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3729 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3730 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3731 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 0;
3733 return X86EMUL_IO_NEEDED
;
3736 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3737 const void *val
, int bytes
)
3741 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3744 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3748 static int emulator_write_emulated_onepage(unsigned long addr
,
3751 unsigned int *error_code
,
3752 struct kvm_vcpu
*vcpu
)
3756 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, error_code
);
3758 if (gpa
== UNMAPPED_GVA
)
3759 return X86EMUL_PROPAGATE_FAULT
;
3761 /* For APIC access vmexit */
3762 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3765 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3766 return X86EMUL_CONTINUE
;
3769 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3771 * Is this MMIO handled locally?
3773 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3774 return X86EMUL_CONTINUE
;
3776 vcpu
->mmio_needed
= 1;
3777 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3778 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3779 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3780 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 1;
3781 memcpy(vcpu
->run
->mmio
.data
, val
, bytes
);
3783 return X86EMUL_CONTINUE
;
3786 int emulator_write_emulated(unsigned long addr
,
3789 unsigned int *error_code
,
3790 struct kvm_vcpu
*vcpu
)
3792 /* Crossing a page boundary? */
3793 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3796 now
= -addr
& ~PAGE_MASK
;
3797 rc
= emulator_write_emulated_onepage(addr
, val
, now
, error_code
,
3799 if (rc
!= X86EMUL_CONTINUE
)
3805 return emulator_write_emulated_onepage(addr
, val
, bytes
, error_code
,
3809 #define CMPXCHG_TYPE(t, ptr, old, new) \
3810 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3812 #ifdef CONFIG_X86_64
3813 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3815 # define CMPXCHG64(ptr, old, new) \
3816 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3819 static int emulator_cmpxchg_emulated(unsigned long addr
,
3823 unsigned int *error_code
,
3824 struct kvm_vcpu
*vcpu
)
3831 /* guests cmpxchg8b have to be emulated atomically */
3832 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3835 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3837 if (gpa
== UNMAPPED_GVA
||
3838 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3841 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3844 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3845 if (is_error_page(page
)) {
3846 kvm_release_page_clean(page
);
3850 kaddr
= kmap_atomic(page
, KM_USER0
);
3851 kaddr
+= offset_in_page(gpa
);
3854 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3857 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3860 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3863 exchanged
= CMPXCHG64(kaddr
, old
, new);
3868 kunmap_atomic(kaddr
, KM_USER0
);
3869 kvm_release_page_dirty(page
);
3872 return X86EMUL_CMPXCHG_FAILED
;
3874 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
, 1);
3876 return X86EMUL_CONTINUE
;
3879 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3881 return emulator_write_emulated(addr
, new, bytes
, error_code
, vcpu
);
3884 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3886 /* TODO: String I/O for in kernel device */
3889 if (vcpu
->arch
.pio
.in
)
3890 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3891 vcpu
->arch
.pio
.size
, pd
);
3893 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3894 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3900 static int emulator_pio_in_emulated(int size
, unsigned short port
, void *val
,
3901 unsigned int count
, struct kvm_vcpu
*vcpu
)
3903 if (vcpu
->arch
.pio
.count
)
3906 trace_kvm_pio(0, port
, size
, 1);
3908 vcpu
->arch
.pio
.port
= port
;
3909 vcpu
->arch
.pio
.in
= 1;
3910 vcpu
->arch
.pio
.count
= count
;
3911 vcpu
->arch
.pio
.size
= size
;
3913 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3915 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
3916 vcpu
->arch
.pio
.count
= 0;
3920 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3921 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
3922 vcpu
->run
->io
.size
= size
;
3923 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3924 vcpu
->run
->io
.count
= count
;
3925 vcpu
->run
->io
.port
= port
;
3930 static int emulator_pio_out_emulated(int size
, unsigned short port
,
3931 const void *val
, unsigned int count
,
3932 struct kvm_vcpu
*vcpu
)
3934 trace_kvm_pio(1, port
, size
, 1);
3936 vcpu
->arch
.pio
.port
= port
;
3937 vcpu
->arch
.pio
.in
= 0;
3938 vcpu
->arch
.pio
.count
= count
;
3939 vcpu
->arch
.pio
.size
= size
;
3941 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
3943 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3944 vcpu
->arch
.pio
.count
= 0;
3948 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3949 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
3950 vcpu
->run
->io
.size
= size
;
3951 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3952 vcpu
->run
->io
.count
= count
;
3953 vcpu
->run
->io
.port
= port
;
3958 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
3960 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
3963 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
3965 kvm_mmu_invlpg(vcpu
, address
);
3966 return X86EMUL_CONTINUE
;
3969 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3971 if (!need_emulate_wbinvd(vcpu
))
3972 return X86EMUL_CONTINUE
;
3974 if (kvm_x86_ops
->has_wbinvd_exit()) {
3975 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
3976 wbinvd_ipi
, NULL
, 1);
3977 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
3980 return X86EMUL_CONTINUE
;
3982 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
3984 int emulate_clts(struct kvm_vcpu
*vcpu
)
3986 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
3987 kvm_x86_ops
->fpu_activate(vcpu
);
3988 return X86EMUL_CONTINUE
;
3991 int emulator_get_dr(int dr
, unsigned long *dest
, struct kvm_vcpu
*vcpu
)
3993 return _kvm_get_dr(vcpu
, dr
, dest
);
3996 int emulator_set_dr(int dr
, unsigned long value
, struct kvm_vcpu
*vcpu
)
3999 return __kvm_set_dr(vcpu
, dr
, value
);
4002 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4004 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4007 static unsigned long emulator_get_cr(int cr
, struct kvm_vcpu
*vcpu
)
4009 unsigned long value
;
4013 value
= kvm_read_cr0(vcpu
);
4016 value
= vcpu
->arch
.cr2
;
4019 value
= vcpu
->arch
.cr3
;
4022 value
= kvm_read_cr4(vcpu
);
4025 value
= kvm_get_cr8(vcpu
);
4028 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4035 static int emulator_set_cr(int cr
, unsigned long val
, struct kvm_vcpu
*vcpu
)
4041 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4044 vcpu
->arch
.cr2
= val
;
4047 res
= kvm_set_cr3(vcpu
, val
);
4050 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4053 res
= __kvm_set_cr8(vcpu
, val
& 0xfUL
);
4056 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4063 static int emulator_get_cpl(struct kvm_vcpu
*vcpu
)
4065 return kvm_x86_ops
->get_cpl(vcpu
);
4068 static void emulator_get_gdt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4070 kvm_x86_ops
->get_gdt(vcpu
, dt
);
4073 static void emulator_get_idt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4075 kvm_x86_ops
->get_idt(vcpu
, dt
);
4078 static unsigned long emulator_get_cached_segment_base(int seg
,
4079 struct kvm_vcpu
*vcpu
)
4081 return get_segment_base(vcpu
, seg
);
4084 static bool emulator_get_cached_descriptor(struct desc_struct
*desc
, int seg
,
4085 struct kvm_vcpu
*vcpu
)
4087 struct kvm_segment var
;
4089 kvm_get_segment(vcpu
, &var
, seg
);
4096 set_desc_limit(desc
, var
.limit
);
4097 set_desc_base(desc
, (unsigned long)var
.base
);
4098 desc
->type
= var
.type
;
4100 desc
->dpl
= var
.dpl
;
4101 desc
->p
= var
.present
;
4102 desc
->avl
= var
.avl
;
4110 static void emulator_set_cached_descriptor(struct desc_struct
*desc
, int seg
,
4111 struct kvm_vcpu
*vcpu
)
4113 struct kvm_segment var
;
4115 /* needed to preserve selector */
4116 kvm_get_segment(vcpu
, &var
, seg
);
4118 var
.base
= get_desc_base(desc
);
4119 var
.limit
= get_desc_limit(desc
);
4121 var
.limit
= (var
.limit
<< 12) | 0xfff;
4122 var
.type
= desc
->type
;
4123 var
.present
= desc
->p
;
4124 var
.dpl
= desc
->dpl
;
4129 var
.avl
= desc
->avl
;
4130 var
.present
= desc
->p
;
4131 var
.unusable
= !var
.present
;
4134 kvm_set_segment(vcpu
, &var
, seg
);
4138 static u16
emulator_get_segment_selector(int seg
, struct kvm_vcpu
*vcpu
)
4140 struct kvm_segment kvm_seg
;
4142 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4143 return kvm_seg
.selector
;
4146 static void emulator_set_segment_selector(u16 sel
, int seg
,
4147 struct kvm_vcpu
*vcpu
)
4149 struct kvm_segment kvm_seg
;
4151 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4152 kvm_seg
.selector
= sel
;
4153 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4156 static struct x86_emulate_ops emulate_ops
= {
4157 .read_std
= kvm_read_guest_virt_system
,
4158 .write_std
= kvm_write_guest_virt_system
,
4159 .fetch
= kvm_fetch_guest_virt
,
4160 .read_emulated
= emulator_read_emulated
,
4161 .write_emulated
= emulator_write_emulated
,
4162 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4163 .pio_in_emulated
= emulator_pio_in_emulated
,
4164 .pio_out_emulated
= emulator_pio_out_emulated
,
4165 .get_cached_descriptor
= emulator_get_cached_descriptor
,
4166 .set_cached_descriptor
= emulator_set_cached_descriptor
,
4167 .get_segment_selector
= emulator_get_segment_selector
,
4168 .set_segment_selector
= emulator_set_segment_selector
,
4169 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4170 .get_gdt
= emulator_get_gdt
,
4171 .get_idt
= emulator_get_idt
,
4172 .get_cr
= emulator_get_cr
,
4173 .set_cr
= emulator_set_cr
,
4174 .cpl
= emulator_get_cpl
,
4175 .get_dr
= emulator_get_dr
,
4176 .set_dr
= emulator_set_dr
,
4177 .set_msr
= kvm_set_msr
,
4178 .get_msr
= kvm_get_msr
,
4181 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4183 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4184 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4185 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4186 vcpu
->arch
.regs_dirty
= ~0;
4189 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4191 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4193 * an sti; sti; sequence only disable interrupts for the first
4194 * instruction. So, if the last instruction, be it emulated or
4195 * not, left the system with the INT_STI flag enabled, it
4196 * means that the last instruction is an sti. We should not
4197 * leave the flag on in this case. The same goes for mov ss
4199 if (!(int_shadow
& mask
))
4200 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4203 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4205 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4206 if (ctxt
->exception
== PF_VECTOR
)
4207 kvm_propagate_fault(vcpu
);
4208 else if (ctxt
->error_code_valid
)
4209 kvm_queue_exception_e(vcpu
, ctxt
->exception
, ctxt
->error_code
);
4211 kvm_queue_exception(vcpu
, ctxt
->exception
);
4214 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4216 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4219 cache_all_regs(vcpu
);
4221 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4223 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
4224 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4225 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
4226 vcpu
->arch
.emulate_ctxt
.mode
=
4227 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4228 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
4229 ? X86EMUL_MODE_VM86
: cs_l
4230 ? X86EMUL_MODE_PROT64
: cs_db
4231 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
4232 memset(c
, 0, sizeof(struct decode_cache
));
4233 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4236 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
)
4238 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4241 init_emulate_ctxt(vcpu
);
4243 vcpu
->arch
.emulate_ctxt
.decode
.op_bytes
= 2;
4244 vcpu
->arch
.emulate_ctxt
.decode
.ad_bytes
= 2;
4245 vcpu
->arch
.emulate_ctxt
.decode
.eip
= vcpu
->arch
.emulate_ctxt
.eip
;
4246 ret
= emulate_int_real(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
, irq
);
4248 if (ret
!= X86EMUL_CONTINUE
)
4249 return EMULATE_FAIL
;
4251 vcpu
->arch
.emulate_ctxt
.eip
= c
->eip
;
4252 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4253 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4254 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4256 if (irq
== NMI_VECTOR
)
4257 vcpu
->arch
.nmi_pending
= false;
4259 vcpu
->arch
.interrupt
.pending
= false;
4261 return EMULATE_DONE
;
4263 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4265 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4267 ++vcpu
->stat
.insn_emulation_fail
;
4268 trace_kvm_emulate_insn_failed(vcpu
);
4269 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4270 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4271 vcpu
->run
->internal
.ndata
= 0;
4272 kvm_queue_exception(vcpu
, UD_VECTOR
);
4273 return EMULATE_FAIL
;
4276 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4284 * if emulation was due to access to shadowed page table
4285 * and it failed try to unshadow page and re-entetr the
4286 * guest to let CPU execute the instruction.
4288 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4291 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4293 if (gpa
== UNMAPPED_GVA
)
4294 return true; /* let cpu generate fault */
4296 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4302 int emulate_instruction(struct kvm_vcpu
*vcpu
,
4308 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4310 kvm_clear_exception_queue(vcpu
);
4311 vcpu
->arch
.mmio_fault_cr2
= cr2
;
4313 * TODO: fix emulate.c to use guest_read/write_register
4314 * instead of direct ->regs accesses, can save hundred cycles
4315 * on Intel for instructions that don't read/change RSP, for
4318 cache_all_regs(vcpu
);
4320 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4321 init_emulate_ctxt(vcpu
);
4322 vcpu
->arch
.emulate_ctxt
.interruptibility
= 0;
4323 vcpu
->arch
.emulate_ctxt
.exception
= -1;
4324 vcpu
->arch
.emulate_ctxt
.perm_ok
= false;
4326 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
);
4327 if (r
== X86EMUL_PROPAGATE_FAULT
)
4330 trace_kvm_emulate_insn_start(vcpu
);
4332 /* Only allow emulation of specific instructions on #UD
4333 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4334 if (emulation_type
& EMULTYPE_TRAP_UD
) {
4336 return EMULATE_FAIL
;
4338 case 0x01: /* VMMCALL */
4339 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
4340 return EMULATE_FAIL
;
4342 case 0x34: /* sysenter */
4343 case 0x35: /* sysexit */
4344 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4345 return EMULATE_FAIL
;
4347 case 0x05: /* syscall */
4348 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4349 return EMULATE_FAIL
;
4352 return EMULATE_FAIL
;
4355 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
4356 return EMULATE_FAIL
;
4359 ++vcpu
->stat
.insn_emulation
;
4361 if (reexecute_instruction(vcpu
, cr2
))
4362 return EMULATE_DONE
;
4363 if (emulation_type
& EMULTYPE_SKIP
)
4364 return EMULATE_FAIL
;
4365 return handle_emulation_failure(vcpu
);
4369 if (emulation_type
& EMULTYPE_SKIP
) {
4370 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
4371 return EMULATE_DONE
;
4374 /* this is needed for vmware backdor interface to work since it
4375 changes registers values during IO operation */
4376 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4379 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
);
4381 if (r
== EMULATION_FAILED
) {
4382 if (reexecute_instruction(vcpu
, cr2
))
4383 return EMULATE_DONE
;
4385 return handle_emulation_failure(vcpu
);
4389 if (vcpu
->arch
.emulate_ctxt
.exception
>= 0) {
4390 inject_emulated_exception(vcpu
);
4392 } else if (vcpu
->arch
.pio
.count
) {
4393 if (!vcpu
->arch
.pio
.in
)
4394 vcpu
->arch
.pio
.count
= 0;
4395 r
= EMULATE_DO_MMIO
;
4396 } else if (vcpu
->mmio_needed
) {
4397 if (vcpu
->mmio_is_write
)
4398 vcpu
->mmio_needed
= 0;
4399 r
= EMULATE_DO_MMIO
;
4400 } else if (r
== EMULATION_RESTART
)
4405 toggle_interruptibility(vcpu
, vcpu
->arch
.emulate_ctxt
.interruptibility
);
4406 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4407 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4408 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4409 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4413 EXPORT_SYMBOL_GPL(emulate_instruction
);
4415 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4417 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4418 int ret
= emulator_pio_out_emulated(size
, port
, &val
, 1, vcpu
);
4419 /* do not return to emulator after return from userspace */
4420 vcpu
->arch
.pio
.count
= 0;
4423 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4425 static void tsc_bad(void *info
)
4427 __get_cpu_var(cpu_tsc_khz
) = 0;
4430 static void tsc_khz_changed(void *data
)
4432 struct cpufreq_freqs
*freq
= data
;
4433 unsigned long khz
= 0;
4437 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4438 khz
= cpufreq_quick_get(raw_smp_processor_id());
4441 __get_cpu_var(cpu_tsc_khz
) = khz
;
4444 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4447 struct cpufreq_freqs
*freq
= data
;
4449 struct kvm_vcpu
*vcpu
;
4450 int i
, send_ipi
= 0;
4453 * We allow guests to temporarily run on slowing clocks,
4454 * provided we notify them after, or to run on accelerating
4455 * clocks, provided we notify them before. Thus time never
4458 * However, we have a problem. We can't atomically update
4459 * the frequency of a given CPU from this function; it is
4460 * merely a notifier, which can be called from any CPU.
4461 * Changing the TSC frequency at arbitrary points in time
4462 * requires a recomputation of local variables related to
4463 * the TSC for each VCPU. We must flag these local variables
4464 * to be updated and be sure the update takes place with the
4465 * new frequency before any guests proceed.
4467 * Unfortunately, the combination of hotplug CPU and frequency
4468 * change creates an intractable locking scenario; the order
4469 * of when these callouts happen is undefined with respect to
4470 * CPU hotplug, and they can race with each other. As such,
4471 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4472 * undefined; you can actually have a CPU frequency change take
4473 * place in between the computation of X and the setting of the
4474 * variable. To protect against this problem, all updates of
4475 * the per_cpu tsc_khz variable are done in an interrupt
4476 * protected IPI, and all callers wishing to update the value
4477 * must wait for a synchronous IPI to complete (which is trivial
4478 * if the caller is on the CPU already). This establishes the
4479 * necessary total order on variable updates.
4481 * Note that because a guest time update may take place
4482 * anytime after the setting of the VCPU's request bit, the
4483 * correct TSC value must be set before the request. However,
4484 * to ensure the update actually makes it to any guest which
4485 * starts running in hardware virtualization between the set
4486 * and the acquisition of the spinlock, we must also ping the
4487 * CPU after setting the request bit.
4491 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4493 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4496 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4498 spin_lock(&kvm_lock
);
4499 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4500 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4501 if (vcpu
->cpu
!= freq
->cpu
)
4503 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4504 if (vcpu
->cpu
!= smp_processor_id())
4508 spin_unlock(&kvm_lock
);
4510 if (freq
->old
< freq
->new && send_ipi
) {
4512 * We upscale the frequency. Must make the guest
4513 * doesn't see old kvmclock values while running with
4514 * the new frequency, otherwise we risk the guest sees
4515 * time go backwards.
4517 * In case we update the frequency for another cpu
4518 * (which might be in guest context) send an interrupt
4519 * to kick the cpu out of guest context. Next time
4520 * guest context is entered kvmclock will be updated,
4521 * so the guest will not see stale values.
4523 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4528 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4529 .notifier_call
= kvmclock_cpufreq_notifier
4532 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4533 unsigned long action
, void *hcpu
)
4535 unsigned int cpu
= (unsigned long)hcpu
;
4539 case CPU_DOWN_FAILED
:
4540 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4542 case CPU_DOWN_PREPARE
:
4543 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4549 static struct notifier_block kvmclock_cpu_notifier_block
= {
4550 .notifier_call
= kvmclock_cpu_notifier
,
4551 .priority
= -INT_MAX
4554 static void kvm_timer_init(void)
4558 max_tsc_khz
= tsc_khz
;
4559 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4560 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4561 #ifdef CONFIG_CPU_FREQ
4562 struct cpufreq_policy policy
;
4563 memset(&policy
, 0, sizeof(policy
));
4564 cpufreq_get_policy(&policy
, get_cpu());
4565 if (policy
.cpuinfo
.max_freq
)
4566 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4568 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4569 CPUFREQ_TRANSITION_NOTIFIER
);
4571 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4572 for_each_online_cpu(cpu
)
4573 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4576 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4578 static int kvm_is_in_guest(void)
4580 return percpu_read(current_vcpu
) != NULL
;
4583 static int kvm_is_user_mode(void)
4587 if (percpu_read(current_vcpu
))
4588 user_mode
= kvm_x86_ops
->get_cpl(percpu_read(current_vcpu
));
4590 return user_mode
!= 0;
4593 static unsigned long kvm_get_guest_ip(void)
4595 unsigned long ip
= 0;
4597 if (percpu_read(current_vcpu
))
4598 ip
= kvm_rip_read(percpu_read(current_vcpu
));
4603 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4604 .is_in_guest
= kvm_is_in_guest
,
4605 .is_user_mode
= kvm_is_user_mode
,
4606 .get_guest_ip
= kvm_get_guest_ip
,
4609 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4611 percpu_write(current_vcpu
, vcpu
);
4613 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4615 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4617 percpu_write(current_vcpu
, NULL
);
4619 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4621 int kvm_arch_init(void *opaque
)
4624 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4627 printk(KERN_ERR
"kvm: already loaded the other module\n");
4632 if (!ops
->cpu_has_kvm_support()) {
4633 printk(KERN_ERR
"kvm: no hardware support\n");
4637 if (ops
->disabled_by_bios()) {
4638 printk(KERN_ERR
"kvm: disabled by bios\n");
4643 r
= kvm_mmu_module_init();
4647 kvm_init_msr_list();
4650 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4651 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
4652 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4653 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4657 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4660 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4668 void kvm_arch_exit(void)
4670 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4672 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4673 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4674 CPUFREQ_TRANSITION_NOTIFIER
);
4675 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4677 kvm_mmu_module_exit();
4680 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4682 ++vcpu
->stat
.halt_exits
;
4683 if (irqchip_in_kernel(vcpu
->kvm
)) {
4684 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4687 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4691 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4693 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
4696 if (is_long_mode(vcpu
))
4699 return a0
| ((gpa_t
)a1
<< 32);
4702 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4704 u64 param
, ingpa
, outgpa
, ret
;
4705 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4706 bool fast
, longmode
;
4710 * hypercall generates UD from non zero cpl and real mode
4713 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4714 kvm_queue_exception(vcpu
, UD_VECTOR
);
4718 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4719 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4722 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4723 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4724 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4725 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4726 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4727 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4729 #ifdef CONFIG_X86_64
4731 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4732 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4733 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4737 code
= param
& 0xffff;
4738 fast
= (param
>> 16) & 0x1;
4739 rep_cnt
= (param
>> 32) & 0xfff;
4740 rep_idx
= (param
>> 48) & 0xfff;
4742 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
4745 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
4746 kvm_vcpu_on_spin(vcpu
);
4749 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
4753 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
4755 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4757 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
4758 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
4764 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
4766 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
4769 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
4770 return kvm_hv_hypercall(vcpu
);
4772 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4773 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4774 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4775 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4776 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4778 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
4780 if (!is_long_mode(vcpu
)) {
4788 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
4794 case KVM_HC_VAPIC_POLL_IRQ
:
4798 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
4805 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4806 ++vcpu
->stat
.hypercalls
;
4809 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
4811 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
4813 char instruction
[3];
4814 unsigned long rip
= kvm_rip_read(vcpu
);
4817 * Blow out the MMU to ensure that no other VCPU has an active mapping
4818 * to ensure that the updated hypercall appears atomically across all
4821 kvm_mmu_zap_all(vcpu
->kvm
);
4823 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
4825 return emulator_write_emulated(rip
, instruction
, 3, NULL
, vcpu
);
4828 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4830 struct desc_ptr dt
= { limit
, base
};
4832 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4835 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4837 struct desc_ptr dt
= { limit
, base
};
4839 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4842 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
4844 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
4845 int j
, nent
= vcpu
->arch
.cpuid_nent
;
4847 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
4848 /* when no next entry is found, the current entry[i] is reselected */
4849 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
4850 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
4851 if (ej
->function
== e
->function
) {
4852 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
4856 return 0; /* silence gcc, even though control never reaches here */
4859 /* find an entry with matching function, matching index (if needed), and that
4860 * should be read next (if it's stateful) */
4861 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
4862 u32 function
, u32 index
)
4864 if (e
->function
!= function
)
4866 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
4868 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
4869 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
4874 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
4875 u32 function
, u32 index
)
4878 struct kvm_cpuid_entry2
*best
= NULL
;
4880 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
4881 struct kvm_cpuid_entry2
*e
;
4883 e
= &vcpu
->arch
.cpuid_entries
[i
];
4884 if (is_matching_cpuid_entry(e
, function
, index
)) {
4885 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4886 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4891 * Both basic or both extended?
4893 if (((e
->function
^ function
) & 0x80000000) == 0)
4894 if (!best
|| e
->function
> best
->function
)
4899 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4901 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4903 struct kvm_cpuid_entry2
*best
;
4905 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
4906 if (!best
|| best
->eax
< 0x80000008)
4908 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4910 return best
->eax
& 0xff;
4915 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
4917 u32 function
, index
;
4918 struct kvm_cpuid_entry2
*best
;
4920 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4921 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4922 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
4923 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
4924 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
4925 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
4926 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
4928 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
4929 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
4930 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
4931 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
4933 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4934 trace_kvm_cpuid(function
,
4935 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
4936 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
4937 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
4938 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
4940 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
4943 * Check if userspace requested an interrupt window, and that the
4944 * interrupt window is open.
4946 * No need to exit to userspace if we already have an interrupt queued.
4948 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
4950 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
4951 vcpu
->run
->request_interrupt_window
&&
4952 kvm_arch_interrupt_allowed(vcpu
));
4955 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
4957 struct kvm_run
*kvm_run
= vcpu
->run
;
4959 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
4960 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
4961 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
4962 if (irqchip_in_kernel(vcpu
->kvm
))
4963 kvm_run
->ready_for_interrupt_injection
= 1;
4965 kvm_run
->ready_for_interrupt_injection
=
4966 kvm_arch_interrupt_allowed(vcpu
) &&
4967 !kvm_cpu_has_interrupt(vcpu
) &&
4968 !kvm_event_needs_reinjection(vcpu
);
4971 static void vapic_enter(struct kvm_vcpu
*vcpu
)
4973 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4976 if (!apic
|| !apic
->vapic_addr
)
4979 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4981 vcpu
->arch
.apic
->vapic_page
= page
;
4984 static void vapic_exit(struct kvm_vcpu
*vcpu
)
4986 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4989 if (!apic
|| !apic
->vapic_addr
)
4992 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4993 kvm_release_page_dirty(apic
->vapic_page
);
4994 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4995 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4998 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5002 if (!kvm_x86_ops
->update_cr8_intercept
)
5005 if (!vcpu
->arch
.apic
)
5008 if (!vcpu
->arch
.apic
->vapic_addr
)
5009 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5016 tpr
= kvm_lapic_get_cr8(vcpu
);
5018 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5021 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5023 /* try to reinject previous events if any */
5024 if (vcpu
->arch
.exception
.pending
) {
5025 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5026 vcpu
->arch
.exception
.has_error_code
,
5027 vcpu
->arch
.exception
.error_code
);
5028 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5029 vcpu
->arch
.exception
.has_error_code
,
5030 vcpu
->arch
.exception
.error_code
,
5031 vcpu
->arch
.exception
.reinject
);
5035 if (vcpu
->arch
.nmi_injected
) {
5036 kvm_x86_ops
->set_nmi(vcpu
);
5040 if (vcpu
->arch
.interrupt
.pending
) {
5041 kvm_x86_ops
->set_irq(vcpu
);
5045 /* try to inject new event if pending */
5046 if (vcpu
->arch
.nmi_pending
) {
5047 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5048 vcpu
->arch
.nmi_pending
= false;
5049 vcpu
->arch
.nmi_injected
= true;
5050 kvm_x86_ops
->set_nmi(vcpu
);
5052 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5053 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5054 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5056 kvm_x86_ops
->set_irq(vcpu
);
5061 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5063 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5064 !vcpu
->guest_xcr0_loaded
) {
5065 /* kvm_set_xcr() also depends on this */
5066 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5067 vcpu
->guest_xcr0_loaded
= 1;
5071 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5073 if (vcpu
->guest_xcr0_loaded
) {
5074 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5075 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5076 vcpu
->guest_xcr0_loaded
= 0;
5080 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5083 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5084 vcpu
->run
->request_interrupt_window
;
5086 if (vcpu
->requests
) {
5087 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5088 kvm_mmu_unload(vcpu
);
5089 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5090 __kvm_migrate_timers(vcpu
);
5091 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5092 r
= kvm_guest_time_update(vcpu
);
5096 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5097 kvm_mmu_sync_roots(vcpu
);
5098 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5099 kvm_x86_ops
->tlb_flush(vcpu
);
5100 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5101 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5105 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5106 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5110 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5111 vcpu
->fpu_active
= 0;
5112 kvm_x86_ops
->fpu_deactivate(vcpu
);
5116 r
= kvm_mmu_reload(vcpu
);
5120 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5121 inject_pending_event(vcpu
);
5123 /* enable NMI/IRQ window open exits if needed */
5124 if (vcpu
->arch
.nmi_pending
)
5125 kvm_x86_ops
->enable_nmi_window(vcpu
);
5126 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5127 kvm_x86_ops
->enable_irq_window(vcpu
);
5129 if (kvm_lapic_enabled(vcpu
)) {
5130 update_cr8_intercept(vcpu
);
5131 kvm_lapic_sync_to_vapic(vcpu
);
5137 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5138 if (vcpu
->fpu_active
)
5139 kvm_load_guest_fpu(vcpu
);
5140 kvm_load_guest_xcr0(vcpu
);
5142 atomic_set(&vcpu
->guest_mode
, 1);
5145 local_irq_disable();
5147 if (!atomic_read(&vcpu
->guest_mode
) || vcpu
->requests
5148 || need_resched() || signal_pending(current
)) {
5149 atomic_set(&vcpu
->guest_mode
, 0);
5153 kvm_x86_ops
->cancel_injection(vcpu
);
5158 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5162 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5164 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5165 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5166 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5167 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5170 trace_kvm_entry(vcpu
->vcpu_id
);
5171 kvm_x86_ops
->run(vcpu
);
5174 * If the guest has used debug registers, at least dr7
5175 * will be disabled while returning to the host.
5176 * If we don't have active breakpoints in the host, we don't
5177 * care about the messed up debug address registers. But if
5178 * we have some of them active, restore the old state.
5180 if (hw_breakpoint_active())
5181 hw_breakpoint_restore();
5183 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
5185 atomic_set(&vcpu
->guest_mode
, 0);
5192 * We must have an instruction between local_irq_enable() and
5193 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5194 * the interrupt shadow. The stat.exits increment will do nicely.
5195 * But we need to prevent reordering, hence this barrier():
5203 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5206 * Profile KVM exit RIPs:
5208 if (unlikely(prof_on
== KVM_PROFILING
)) {
5209 unsigned long rip
= kvm_rip_read(vcpu
);
5210 profile_hit(KVM_PROFILING
, (void *)rip
);
5214 kvm_lapic_sync_from_vapic(vcpu
);
5216 r
= kvm_x86_ops
->handle_exit(vcpu
);
5222 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5225 struct kvm
*kvm
= vcpu
->kvm
;
5227 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5228 pr_debug("vcpu %d received sipi with vector # %x\n",
5229 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5230 kvm_lapic_reset(vcpu
);
5231 r
= kvm_arch_vcpu_reset(vcpu
);
5234 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5237 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5242 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
5243 r
= vcpu_enter_guest(vcpu
);
5245 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5246 kvm_vcpu_block(vcpu
);
5247 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5248 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5250 switch(vcpu
->arch
.mp_state
) {
5251 case KVM_MP_STATE_HALTED
:
5252 vcpu
->arch
.mp_state
=
5253 KVM_MP_STATE_RUNNABLE
;
5254 case KVM_MP_STATE_RUNNABLE
:
5256 case KVM_MP_STATE_SIPI_RECEIVED
:
5267 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5268 if (kvm_cpu_has_pending_timer(vcpu
))
5269 kvm_inject_pending_timer_irqs(vcpu
);
5271 if (dm_request_for_irq_injection(vcpu
)) {
5273 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5274 ++vcpu
->stat
.request_irq_exits
;
5276 if (signal_pending(current
)) {
5278 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5279 ++vcpu
->stat
.signal_exits
;
5281 if (need_resched()) {
5282 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5284 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5288 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5295 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5300 if (vcpu
->sigset_active
)
5301 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5303 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5304 kvm_vcpu_block(vcpu
);
5305 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5310 /* re-sync apic's tpr */
5311 if (!irqchip_in_kernel(vcpu
->kvm
))
5312 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
5314 if (vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
) {
5315 if (vcpu
->mmio_needed
) {
5316 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
5317 vcpu
->mmio_read_completed
= 1;
5318 vcpu
->mmio_needed
= 0;
5320 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5321 r
= emulate_instruction(vcpu
, 0, 0, EMULTYPE_NO_DECODE
);
5322 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5323 if (r
!= EMULATE_DONE
) {
5328 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
5329 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
5330 kvm_run
->hypercall
.ret
);
5332 r
= __vcpu_run(vcpu
);
5335 post_kvm_run_save(vcpu
);
5336 if (vcpu
->sigset_active
)
5337 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5342 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5344 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5345 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5346 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5347 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5348 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5349 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5350 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5351 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5352 #ifdef CONFIG_X86_64
5353 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5354 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5355 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5356 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5357 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5358 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5359 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5360 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5363 regs
->rip
= kvm_rip_read(vcpu
);
5364 regs
->rflags
= kvm_get_rflags(vcpu
);
5369 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5371 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5372 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5373 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5374 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5375 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5376 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5377 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5378 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5379 #ifdef CONFIG_X86_64
5380 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5381 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5382 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5383 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5384 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5385 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5386 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5387 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5390 kvm_rip_write(vcpu
, regs
->rip
);
5391 kvm_set_rflags(vcpu
, regs
->rflags
);
5393 vcpu
->arch
.exception
.pending
= false;
5395 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5400 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5402 struct kvm_segment cs
;
5404 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5408 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5410 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5411 struct kvm_sregs
*sregs
)
5415 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5416 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5417 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5418 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5419 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5420 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5422 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5423 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5425 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5426 sregs
->idt
.limit
= dt
.size
;
5427 sregs
->idt
.base
= dt
.address
;
5428 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5429 sregs
->gdt
.limit
= dt
.size
;
5430 sregs
->gdt
.base
= dt
.address
;
5432 sregs
->cr0
= kvm_read_cr0(vcpu
);
5433 sregs
->cr2
= vcpu
->arch
.cr2
;
5434 sregs
->cr3
= vcpu
->arch
.cr3
;
5435 sregs
->cr4
= kvm_read_cr4(vcpu
);
5436 sregs
->cr8
= kvm_get_cr8(vcpu
);
5437 sregs
->efer
= vcpu
->arch
.efer
;
5438 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5440 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5442 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5443 set_bit(vcpu
->arch
.interrupt
.nr
,
5444 (unsigned long *)sregs
->interrupt_bitmap
);
5449 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5450 struct kvm_mp_state
*mp_state
)
5452 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5456 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5457 struct kvm_mp_state
*mp_state
)
5459 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5460 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5464 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
,
5465 bool has_error_code
, u32 error_code
)
5467 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
5470 init_emulate_ctxt(vcpu
);
5472 ret
= emulator_task_switch(&vcpu
->arch
.emulate_ctxt
,
5473 tss_selector
, reason
, has_error_code
,
5477 return EMULATE_FAIL
;
5479 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
5480 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
5481 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
5482 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5483 return EMULATE_DONE
;
5485 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5487 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5488 struct kvm_sregs
*sregs
)
5490 int mmu_reset_needed
= 0;
5491 int pending_vec
, max_bits
;
5494 dt
.size
= sregs
->idt
.limit
;
5495 dt
.address
= sregs
->idt
.base
;
5496 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5497 dt
.size
= sregs
->gdt
.limit
;
5498 dt
.address
= sregs
->gdt
.base
;
5499 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5501 vcpu
->arch
.cr2
= sregs
->cr2
;
5502 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
5503 vcpu
->arch
.cr3
= sregs
->cr3
;
5505 kvm_set_cr8(vcpu
, sregs
->cr8
);
5507 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5508 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5509 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5511 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5512 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5513 vcpu
->arch
.cr0
= sregs
->cr0
;
5515 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5516 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5517 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5518 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
);
5519 mmu_reset_needed
= 1;
5522 if (mmu_reset_needed
)
5523 kvm_mmu_reset_context(vcpu
);
5525 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5526 pending_vec
= find_first_bit(
5527 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5528 if (pending_vec
< max_bits
) {
5529 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5530 pr_debug("Set back pending irq %d\n", pending_vec
);
5531 if (irqchip_in_kernel(vcpu
->kvm
))
5532 kvm_pic_clear_isr_ack(vcpu
->kvm
);
5535 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5536 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5537 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5538 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5539 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5540 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5542 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5543 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5545 update_cr8_intercept(vcpu
);
5547 /* Older userspace won't unhalt the vcpu on reset. */
5548 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5549 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5551 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5553 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5558 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5559 struct kvm_guest_debug
*dbg
)
5561 unsigned long rflags
;
5564 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5566 if (vcpu
->arch
.exception
.pending
)
5568 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5569 kvm_queue_exception(vcpu
, DB_VECTOR
);
5571 kvm_queue_exception(vcpu
, BP_VECTOR
);
5575 * Read rflags as long as potentially injected trace flags are still
5578 rflags
= kvm_get_rflags(vcpu
);
5580 vcpu
->guest_debug
= dbg
->control
;
5581 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5582 vcpu
->guest_debug
= 0;
5584 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5585 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5586 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5587 vcpu
->arch
.switch_db_regs
=
5588 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5590 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5591 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5592 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5595 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5596 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5597 get_segment_base(vcpu
, VCPU_SREG_CS
);
5600 * Trigger an rflags update that will inject or remove the trace
5603 kvm_set_rflags(vcpu
, rflags
);
5605 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5615 * Translate a guest virtual address to a guest physical address.
5617 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5618 struct kvm_translation
*tr
)
5620 unsigned long vaddr
= tr
->linear_address
;
5624 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5625 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5626 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5627 tr
->physical_address
= gpa
;
5628 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5635 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5637 struct i387_fxsave_struct
*fxsave
=
5638 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5640 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5641 fpu
->fcw
= fxsave
->cwd
;
5642 fpu
->fsw
= fxsave
->swd
;
5643 fpu
->ftwx
= fxsave
->twd
;
5644 fpu
->last_opcode
= fxsave
->fop
;
5645 fpu
->last_ip
= fxsave
->rip
;
5646 fpu
->last_dp
= fxsave
->rdp
;
5647 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5652 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5654 struct i387_fxsave_struct
*fxsave
=
5655 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5657 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5658 fxsave
->cwd
= fpu
->fcw
;
5659 fxsave
->swd
= fpu
->fsw
;
5660 fxsave
->twd
= fpu
->ftwx
;
5661 fxsave
->fop
= fpu
->last_opcode
;
5662 fxsave
->rip
= fpu
->last_ip
;
5663 fxsave
->rdp
= fpu
->last_dp
;
5664 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5669 int fx_init(struct kvm_vcpu
*vcpu
)
5673 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5677 fpu_finit(&vcpu
->arch
.guest_fpu
);
5680 * Ensure guest xcr0 is valid for loading
5682 vcpu
->arch
.xcr0
= XSTATE_FP
;
5684 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5688 EXPORT_SYMBOL_GPL(fx_init
);
5690 static void fx_free(struct kvm_vcpu
*vcpu
)
5692 fpu_free(&vcpu
->arch
.guest_fpu
);
5695 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5697 if (vcpu
->guest_fpu_loaded
)
5701 * Restore all possible states in the guest,
5702 * and assume host would use all available bits.
5703 * Guest xcr0 would be loaded later.
5705 kvm_put_guest_xcr0(vcpu
);
5706 vcpu
->guest_fpu_loaded
= 1;
5707 unlazy_fpu(current
);
5708 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5712 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5714 kvm_put_guest_xcr0(vcpu
);
5716 if (!vcpu
->guest_fpu_loaded
)
5719 vcpu
->guest_fpu_loaded
= 0;
5720 fpu_save_init(&vcpu
->arch
.guest_fpu
);
5721 ++vcpu
->stat
.fpu_reload
;
5722 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
5726 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5728 if (vcpu
->arch
.time_page
) {
5729 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5730 vcpu
->arch
.time_page
= NULL
;
5733 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
5735 kvm_x86_ops
->vcpu_free(vcpu
);
5738 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5741 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
5742 printk_once(KERN_WARNING
5743 "kvm: SMP vm created on host with unstable TSC; "
5744 "guest TSC will not be reliable\n");
5745 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5748 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5752 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5754 r
= kvm_arch_vcpu_reset(vcpu
);
5756 r
= kvm_mmu_setup(vcpu
);
5763 kvm_x86_ops
->vcpu_free(vcpu
);
5767 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5770 kvm_mmu_unload(vcpu
);
5774 kvm_x86_ops
->vcpu_free(vcpu
);
5777 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5779 vcpu
->arch
.nmi_pending
= false;
5780 vcpu
->arch
.nmi_injected
= false;
5782 vcpu
->arch
.switch_db_regs
= 0;
5783 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5784 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5785 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5787 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5789 return kvm_x86_ops
->vcpu_reset(vcpu
);
5792 int kvm_arch_hardware_enable(void *garbage
)
5795 struct kvm_vcpu
*vcpu
;
5798 kvm_shared_msr_cpu_online();
5799 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5800 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5801 if (vcpu
->cpu
== smp_processor_id())
5802 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5803 return kvm_x86_ops
->hardware_enable(garbage
);
5806 void kvm_arch_hardware_disable(void *garbage
)
5808 kvm_x86_ops
->hardware_disable(garbage
);
5809 drop_user_return_notifiers(garbage
);
5812 int kvm_arch_hardware_setup(void)
5814 return kvm_x86_ops
->hardware_setup();
5817 void kvm_arch_hardware_unsetup(void)
5819 kvm_x86_ops
->hardware_unsetup();
5822 void kvm_arch_check_processor_compat(void *rtn
)
5824 kvm_x86_ops
->check_processor_compatibility(rtn
);
5827 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5833 BUG_ON(vcpu
->kvm
== NULL
);
5836 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
5837 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
5838 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5839 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
5840 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
5841 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5842 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5844 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5846 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5851 vcpu
->arch
.pio_data
= page_address(page
);
5853 if (!kvm
->arch
.virtual_tsc_khz
)
5854 kvm_arch_set_tsc_khz(kvm
, max_tsc_khz
);
5856 r
= kvm_mmu_create(vcpu
);
5858 goto fail_free_pio_data
;
5860 if (irqchip_in_kernel(kvm
)) {
5861 r
= kvm_create_lapic(vcpu
);
5863 goto fail_mmu_destroy
;
5866 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5868 if (!vcpu
->arch
.mce_banks
) {
5870 goto fail_free_lapic
;
5872 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5874 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
5875 goto fail_free_mce_banks
;
5878 fail_free_mce_banks
:
5879 kfree(vcpu
->arch
.mce_banks
);
5881 kvm_free_lapic(vcpu
);
5883 kvm_mmu_destroy(vcpu
);
5885 free_page((unsigned long)vcpu
->arch
.pio_data
);
5890 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5894 kfree(vcpu
->arch
.mce_banks
);
5895 kvm_free_lapic(vcpu
);
5896 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5897 kvm_mmu_destroy(vcpu
);
5898 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5899 free_page((unsigned long)vcpu
->arch
.pio_data
);
5902 struct kvm
*kvm_arch_create_vm(void)
5904 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
5907 return ERR_PTR(-ENOMEM
);
5909 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5910 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5912 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5913 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5915 spin_lock_init(&kvm
->arch
.tsc_write_lock
);
5920 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5923 kvm_mmu_unload(vcpu
);
5927 static void kvm_free_vcpus(struct kvm
*kvm
)
5930 struct kvm_vcpu
*vcpu
;
5933 * Unpin any mmu pages first.
5935 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5936 kvm_unload_vcpu_mmu(vcpu
);
5937 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5938 kvm_arch_vcpu_free(vcpu
);
5940 mutex_lock(&kvm
->lock
);
5941 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5942 kvm
->vcpus
[i
] = NULL
;
5944 atomic_set(&kvm
->online_vcpus
, 0);
5945 mutex_unlock(&kvm
->lock
);
5948 void kvm_arch_sync_events(struct kvm
*kvm
)
5950 kvm_free_all_assigned_devices(kvm
);
5954 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5956 kvm_iommu_unmap_guest(kvm
);
5957 kfree(kvm
->arch
.vpic
);
5958 kfree(kvm
->arch
.vioapic
);
5959 kvm_free_vcpus(kvm
);
5960 kvm_free_physmem(kvm
);
5961 if (kvm
->arch
.apic_access_page
)
5962 put_page(kvm
->arch
.apic_access_page
);
5963 if (kvm
->arch
.ept_identity_pagetable
)
5964 put_page(kvm
->arch
.ept_identity_pagetable
);
5965 cleanup_srcu_struct(&kvm
->srcu
);
5969 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
5970 struct kvm_memory_slot
*memslot
,
5971 struct kvm_memory_slot old
,
5972 struct kvm_userspace_memory_region
*mem
,
5975 int npages
= memslot
->npages
;
5976 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
5978 /* Prevent internal slot pages from being moved by fork()/COW. */
5979 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
5980 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
5982 /*To keep backward compatibility with older userspace,
5983 *x86 needs to hanlde !user_alloc case.
5986 if (npages
&& !old
.rmap
) {
5987 unsigned long userspace_addr
;
5989 down_write(¤t
->mm
->mmap_sem
);
5990 userspace_addr
= do_mmap(NULL
, 0,
5992 PROT_READ
| PROT_WRITE
,
5995 up_write(¤t
->mm
->mmap_sem
);
5997 if (IS_ERR((void *)userspace_addr
))
5998 return PTR_ERR((void *)userspace_addr
);
6000 memslot
->userspace_addr
= userspace_addr
;
6008 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6009 struct kvm_userspace_memory_region
*mem
,
6010 struct kvm_memory_slot old
,
6014 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
6016 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
6019 down_write(¤t
->mm
->mmap_sem
);
6020 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
6021 old
.npages
* PAGE_SIZE
);
6022 up_write(¤t
->mm
->mmap_sem
);
6025 "kvm_vm_ioctl_set_memory_region: "
6026 "failed to munmap memory\n");
6029 spin_lock(&kvm
->mmu_lock
);
6030 if (!kvm
->arch
.n_requested_mmu_pages
) {
6031 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6032 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6035 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6036 spin_unlock(&kvm
->mmu_lock
);
6039 void kvm_arch_flush_shadow(struct kvm
*kvm
)
6041 kvm_mmu_zap_all(kvm
);
6042 kvm_reload_remote_mmus(kvm
);
6045 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6047 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
6048 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6049 || vcpu
->arch
.nmi_pending
||
6050 (kvm_arch_interrupt_allowed(vcpu
) &&
6051 kvm_cpu_has_interrupt(vcpu
));
6054 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
6057 int cpu
= vcpu
->cpu
;
6059 if (waitqueue_active(&vcpu
->wq
)) {
6060 wake_up_interruptible(&vcpu
->wq
);
6061 ++vcpu
->stat
.halt_wakeup
;
6065 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
6066 if (atomic_xchg(&vcpu
->guest_mode
, 0))
6067 smp_send_reschedule(cpu
);
6071 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6073 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6076 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6078 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6079 get_segment_base(vcpu
, VCPU_SREG_CS
);
6081 return current_rip
== linear_rip
;
6083 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6085 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6087 unsigned long rflags
;
6089 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6090 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6091 rflags
&= ~X86_EFLAGS_TF
;
6094 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6096 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6098 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6099 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6100 rflags
|= X86_EFLAGS_TF
;
6101 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6102 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6104 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6106 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6107 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6108 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6109 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6110 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6111 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6112 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6113 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6114 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6115 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6116 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6117 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);