2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <trace/events/kvm.h>
44 #undef TRACE_INCLUDE_FILE
45 #define CREATE_TRACE_POINTS
48 #include <asm/debugreg.h>
49 #include <asm/uaccess.h>
55 #define MAX_IO_MSRS 256
56 #define CR0_RESERVED_BITS \
57 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
58 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
59 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
60 #define CR4_RESERVED_BITS \
61 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
62 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
63 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
64 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
66 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
72 * - enable syscall per default because its emulated by KVM
73 * - enable LME and LMA per default on 64 bit KVM
76 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
78 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
84 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
86 struct kvm_cpuid_entry2 __user
*entries
);
88 struct kvm_x86_ops
*kvm_x86_ops
;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
92 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
94 #define KVM_NR_SHARED_MSRS 16
96 struct kvm_shared_msrs_global
{
98 u32 msrs
[KVM_NR_SHARED_MSRS
];
101 struct kvm_shared_msrs
{
102 struct user_return_notifier urn
;
104 struct kvm_shared_msr_values
{
107 } values
[KVM_NR_SHARED_MSRS
];
110 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
111 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
113 struct kvm_stats_debugfs_item debugfs_entries
[] = {
114 { "pf_fixed", VCPU_STAT(pf_fixed
) },
115 { "pf_guest", VCPU_STAT(pf_guest
) },
116 { "tlb_flush", VCPU_STAT(tlb_flush
) },
117 { "invlpg", VCPU_STAT(invlpg
) },
118 { "exits", VCPU_STAT(exits
) },
119 { "io_exits", VCPU_STAT(io_exits
) },
120 { "mmio_exits", VCPU_STAT(mmio_exits
) },
121 { "signal_exits", VCPU_STAT(signal_exits
) },
122 { "irq_window", VCPU_STAT(irq_window_exits
) },
123 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
124 { "halt_exits", VCPU_STAT(halt_exits
) },
125 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
126 { "hypercalls", VCPU_STAT(hypercalls
) },
127 { "request_irq", VCPU_STAT(request_irq_exits
) },
128 { "irq_exits", VCPU_STAT(irq_exits
) },
129 { "host_state_reload", VCPU_STAT(host_state_reload
) },
130 { "efer_reload", VCPU_STAT(efer_reload
) },
131 { "fpu_reload", VCPU_STAT(fpu_reload
) },
132 { "insn_emulation", VCPU_STAT(insn_emulation
) },
133 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
134 { "irq_injections", VCPU_STAT(irq_injections
) },
135 { "nmi_injections", VCPU_STAT(nmi_injections
) },
136 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
137 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
138 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
139 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
140 { "mmu_flooded", VM_STAT(mmu_flooded
) },
141 { "mmu_recycled", VM_STAT(mmu_recycled
) },
142 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
143 { "mmu_unsync", VM_STAT(mmu_unsync
) },
144 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
145 { "largepages", VM_STAT(lpages
) },
149 static void kvm_on_user_return(struct user_return_notifier
*urn
)
152 struct kvm_shared_msrs
*locals
153 = container_of(urn
, struct kvm_shared_msrs
, urn
);
154 struct kvm_shared_msr_values
*values
;
156 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
157 values
= &locals
->values
[slot
];
158 if (values
->host
!= values
->curr
) {
159 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
160 values
->curr
= values
->host
;
163 locals
->registered
= false;
164 user_return_notifier_unregister(urn
);
167 static void shared_msr_update(unsigned slot
, u32 msr
)
169 struct kvm_shared_msrs
*smsr
;
172 smsr
= &__get_cpu_var(shared_msrs
);
173 /* only read, and nobody should modify it at this time,
174 * so don't need lock */
175 if (slot
>= shared_msrs_global
.nr
) {
176 printk(KERN_ERR
"kvm: invalid MSR slot!");
179 rdmsrl_safe(msr
, &value
);
180 smsr
->values
[slot
].host
= value
;
181 smsr
->values
[slot
].curr
= value
;
184 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
186 if (slot
>= shared_msrs_global
.nr
)
187 shared_msrs_global
.nr
= slot
+ 1;
188 shared_msrs_global
.msrs
[slot
] = msr
;
189 /* we need ensured the shared_msr_global have been updated */
192 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
194 static void kvm_shared_msr_cpu_online(void)
198 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
199 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
202 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
204 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
206 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
208 smsr
->values
[slot
].curr
= value
;
209 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
210 if (!smsr
->registered
) {
211 smsr
->urn
.on_user_return
= kvm_on_user_return
;
212 user_return_notifier_register(&smsr
->urn
);
213 smsr
->registered
= true;
216 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
218 static void drop_user_return_notifiers(void *ignore
)
220 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
222 if (smsr
->registered
)
223 kvm_on_user_return(&smsr
->urn
);
226 unsigned long segment_base(u16 selector
)
228 struct descriptor_table gdt
;
229 struct desc_struct
*d
;
230 unsigned long table_base
;
237 table_base
= gdt
.base
;
239 if (selector
& 4) { /* from ldt */
240 u16 ldt_selector
= kvm_read_ldt();
242 table_base
= segment_base(ldt_selector
);
244 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
245 v
= get_desc_base(d
);
247 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
248 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
252 EXPORT_SYMBOL_GPL(segment_base
);
254 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
256 if (irqchip_in_kernel(vcpu
->kvm
))
257 return vcpu
->arch
.apic_base
;
259 return vcpu
->arch
.apic_base
;
261 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
263 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
265 /* TODO: reserve bits check */
266 if (irqchip_in_kernel(vcpu
->kvm
))
267 kvm_lapic_set_base(vcpu
, data
);
269 vcpu
->arch
.apic_base
= data
;
271 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
273 #define EXCPT_BENIGN 0
274 #define EXCPT_CONTRIBUTORY 1
277 static int exception_class(int vector
)
287 return EXCPT_CONTRIBUTORY
;
294 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
295 unsigned nr
, bool has_error
, u32 error_code
)
300 if (!vcpu
->arch
.exception
.pending
) {
302 vcpu
->arch
.exception
.pending
= true;
303 vcpu
->arch
.exception
.has_error_code
= has_error
;
304 vcpu
->arch
.exception
.nr
= nr
;
305 vcpu
->arch
.exception
.error_code
= error_code
;
309 /* to check exception */
310 prev_nr
= vcpu
->arch
.exception
.nr
;
311 if (prev_nr
== DF_VECTOR
) {
312 /* triple fault -> shutdown */
313 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
316 class1
= exception_class(prev_nr
);
317 class2
= exception_class(nr
);
318 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
319 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
320 /* generate double fault per SDM Table 5-5 */
321 vcpu
->arch
.exception
.pending
= true;
322 vcpu
->arch
.exception
.has_error_code
= true;
323 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
324 vcpu
->arch
.exception
.error_code
= 0;
326 /* replace previous exception with a new one in a hope
327 that instruction re-execution will regenerate lost
332 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
334 kvm_multiple_exception(vcpu
, nr
, false, 0);
336 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
338 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
341 ++vcpu
->stat
.pf_guest
;
342 vcpu
->arch
.cr2
= addr
;
343 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
346 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
348 vcpu
->arch
.nmi_pending
= 1;
350 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
352 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
354 kvm_multiple_exception(vcpu
, nr
, true, error_code
);
356 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
359 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
360 * a #GP and return false.
362 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
364 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
366 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
369 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
372 * Load the pae pdptrs. Return true is they are all valid.
374 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
376 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
377 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
380 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
382 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
383 offset
* sizeof(u64
), sizeof(pdpte
));
388 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
389 if (is_present_gpte(pdpte
[i
]) &&
390 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
397 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
398 __set_bit(VCPU_EXREG_PDPTR
,
399 (unsigned long *)&vcpu
->arch
.regs_avail
);
400 __set_bit(VCPU_EXREG_PDPTR
,
401 (unsigned long *)&vcpu
->arch
.regs_dirty
);
406 EXPORT_SYMBOL_GPL(load_pdptrs
);
408 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
410 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
414 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
417 if (!test_bit(VCPU_EXREG_PDPTR
,
418 (unsigned long *)&vcpu
->arch
.regs_avail
))
421 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
424 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
430 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
435 if (cr0
& 0xffffffff00000000UL
) {
436 kvm_inject_gp(vcpu
, 0);
441 cr0
&= ~CR0_RESERVED_BITS
;
443 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
444 kvm_inject_gp(vcpu
, 0);
448 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
449 kvm_inject_gp(vcpu
, 0);
453 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
455 if ((vcpu
->arch
.efer
& EFER_LME
)) {
459 kvm_inject_gp(vcpu
, 0);
462 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
464 kvm_inject_gp(vcpu
, 0);
470 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
471 kvm_inject_gp(vcpu
, 0);
477 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
478 vcpu
->arch
.cr0
= cr0
;
480 kvm_mmu_reset_context(vcpu
);
483 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
485 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
487 kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0ful
) | (msw
& 0x0f));
489 EXPORT_SYMBOL_GPL(kvm_lmsw
);
491 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
493 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
494 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
496 if (cr4
& CR4_RESERVED_BITS
) {
497 kvm_inject_gp(vcpu
, 0);
501 if (is_long_mode(vcpu
)) {
502 if (!(cr4
& X86_CR4_PAE
)) {
503 kvm_inject_gp(vcpu
, 0);
506 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
507 && ((cr4
^ old_cr4
) & pdptr_bits
)
508 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
509 kvm_inject_gp(vcpu
, 0);
513 if (cr4
& X86_CR4_VMXE
) {
514 kvm_inject_gp(vcpu
, 0);
517 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
518 vcpu
->arch
.cr4
= cr4
;
519 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
520 kvm_mmu_reset_context(vcpu
);
522 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
524 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
526 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
527 kvm_mmu_sync_roots(vcpu
);
528 kvm_mmu_flush_tlb(vcpu
);
532 if (is_long_mode(vcpu
)) {
533 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
534 kvm_inject_gp(vcpu
, 0);
539 if (cr3
& CR3_PAE_RESERVED_BITS
) {
540 kvm_inject_gp(vcpu
, 0);
543 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
544 kvm_inject_gp(vcpu
, 0);
549 * We don't check reserved bits in nonpae mode, because
550 * this isn't enforced, and VMware depends on this.
555 * Does the new cr3 value map to physical memory? (Note, we
556 * catch an invalid cr3 even in real-mode, because it would
557 * cause trouble later on when we turn on paging anyway.)
559 * A real CPU would silently accept an invalid cr3 and would
560 * attempt to use it - with largely undefined (and often hard
561 * to debug) behavior on the guest side.
563 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
564 kvm_inject_gp(vcpu
, 0);
566 vcpu
->arch
.cr3
= cr3
;
567 vcpu
->arch
.mmu
.new_cr3(vcpu
);
570 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
572 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
574 if (cr8
& CR8_RESERVED_BITS
) {
575 kvm_inject_gp(vcpu
, 0);
578 if (irqchip_in_kernel(vcpu
->kvm
))
579 kvm_lapic_set_tpr(vcpu
, cr8
);
581 vcpu
->arch
.cr8
= cr8
;
583 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
585 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
587 if (irqchip_in_kernel(vcpu
->kvm
))
588 return kvm_lapic_get_cr8(vcpu
);
590 return vcpu
->arch
.cr8
;
592 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
594 static inline u32
bit(int bitno
)
596 return 1 << (bitno
& 31);
600 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
601 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
603 * This list is modified at module load time to reflect the
604 * capabilities of the host cpu. This capabilities test skips MSRs that are
605 * kvm-specific. Those are put in the beginning of the list.
608 #define KVM_SAVE_MSRS_BEGIN 5
609 static u32 msrs_to_save
[] = {
610 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
611 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
612 HV_X64_MSR_APIC_ASSIST_PAGE
,
613 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
616 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
618 MSR_IA32_TSC
, MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
621 static unsigned num_msrs_to_save
;
623 static u32 emulated_msrs
[] = {
624 MSR_IA32_MISC_ENABLE
,
627 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
629 if (efer
& efer_reserved_bits
) {
630 kvm_inject_gp(vcpu
, 0);
635 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
)) {
636 kvm_inject_gp(vcpu
, 0);
640 if (efer
& EFER_FFXSR
) {
641 struct kvm_cpuid_entry2
*feat
;
643 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
644 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
645 kvm_inject_gp(vcpu
, 0);
650 if (efer
& EFER_SVME
) {
651 struct kvm_cpuid_entry2
*feat
;
653 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
654 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
655 kvm_inject_gp(vcpu
, 0);
660 kvm_x86_ops
->set_efer(vcpu
, efer
);
663 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
665 vcpu
->arch
.efer
= efer
;
667 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
668 kvm_mmu_reset_context(vcpu
);
671 void kvm_enable_efer_bits(u64 mask
)
673 efer_reserved_bits
&= ~mask
;
675 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
679 * Writes msr value into into the appropriate "register".
680 * Returns 0 on success, non-0 otherwise.
681 * Assumes vcpu_load() was already called.
683 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
685 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
689 * Adapt set_msr() to msr_io()'s calling convention
691 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
693 return kvm_set_msr(vcpu
, index
, *data
);
696 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
699 struct pvclock_wall_clock wc
;
700 struct timespec boot
;
707 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
710 * The guest calculates current wall clock time by adding
711 * system time (updated by kvm_write_guest_time below) to the
712 * wall clock specified here. guest system time equals host
713 * system time for us, thus we must fill in host boot time here.
717 wc
.sec
= boot
.tv_sec
;
718 wc
.nsec
= boot
.tv_nsec
;
719 wc
.version
= version
;
721 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
724 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
727 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
729 uint32_t quotient
, remainder
;
731 /* Don't try to replace with do_div(), this one calculates
732 * "(dividend << 32) / divisor" */
734 : "=a" (quotient
), "=d" (remainder
)
735 : "0" (0), "1" (dividend
), "r" (divisor
) );
739 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
741 uint64_t nsecs
= 1000000000LL;
746 tps64
= tsc_khz
* 1000LL;
747 while (tps64
> nsecs
*2) {
752 tps32
= (uint32_t)tps64
;
753 while (tps32
<= (uint32_t)nsecs
) {
758 hv_clock
->tsc_shift
= shift
;
759 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
761 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
762 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
763 hv_clock
->tsc_to_system_mul
);
766 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
768 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
772 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
774 unsigned long this_tsc_khz
;
776 if ((!vcpu
->time_page
))
779 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
780 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
781 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
782 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
784 put_cpu_var(cpu_tsc_khz
);
786 /* Keep irq disabled to prevent changes to the clock */
787 local_irq_save(flags
);
788 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
790 monotonic_to_bootbased(&ts
);
791 local_irq_restore(flags
);
793 /* With all the info we got, fill in the values */
795 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
796 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
) + v
->kvm
->arch
.kvmclock_offset
;
799 * The interface expects us to write an even number signaling that the
800 * update is finished. Since the guest won't see the intermediate
801 * state, we just increase by 2 at the end.
803 vcpu
->hv_clock
.version
+= 2;
805 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
807 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
808 sizeof(vcpu
->hv_clock
));
810 kunmap_atomic(shared_kaddr
, KM_USER0
);
812 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
815 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
817 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
819 if (!vcpu
->time_page
)
821 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
825 static bool msr_mtrr_valid(unsigned msr
)
828 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
829 case MSR_MTRRfix64K_00000
:
830 case MSR_MTRRfix16K_80000
:
831 case MSR_MTRRfix16K_A0000
:
832 case MSR_MTRRfix4K_C0000
:
833 case MSR_MTRRfix4K_C8000
:
834 case MSR_MTRRfix4K_D0000
:
835 case MSR_MTRRfix4K_D8000
:
836 case MSR_MTRRfix4K_E0000
:
837 case MSR_MTRRfix4K_E8000
:
838 case MSR_MTRRfix4K_F0000
:
839 case MSR_MTRRfix4K_F8000
:
840 case MSR_MTRRdefType
:
841 case MSR_IA32_CR_PAT
:
849 static bool valid_pat_type(unsigned t
)
851 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
854 static bool valid_mtrr_type(unsigned t
)
856 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
859 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
863 if (!msr_mtrr_valid(msr
))
866 if (msr
== MSR_IA32_CR_PAT
) {
867 for (i
= 0; i
< 8; i
++)
868 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
871 } else if (msr
== MSR_MTRRdefType
) {
874 return valid_mtrr_type(data
& 0xff);
875 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
876 for (i
= 0; i
< 8 ; i
++)
877 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
883 return valid_mtrr_type(data
& 0xff);
886 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
888 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
890 if (!mtrr_valid(vcpu
, msr
, data
))
893 if (msr
== MSR_MTRRdefType
) {
894 vcpu
->arch
.mtrr_state
.def_type
= data
;
895 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
896 } else if (msr
== MSR_MTRRfix64K_00000
)
898 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
899 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
900 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
901 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
902 else if (msr
== MSR_IA32_CR_PAT
)
903 vcpu
->arch
.pat
= data
;
904 else { /* Variable MTRRs */
905 int idx
, is_mtrr_mask
;
908 idx
= (msr
- 0x200) / 2;
909 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
912 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
915 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
919 kvm_mmu_reset_context(vcpu
);
923 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
925 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
926 unsigned bank_num
= mcg_cap
& 0xff;
929 case MSR_IA32_MCG_STATUS
:
930 vcpu
->arch
.mcg_status
= data
;
932 case MSR_IA32_MCG_CTL
:
933 if (!(mcg_cap
& MCG_CTL_P
))
935 if (data
!= 0 && data
!= ~(u64
)0)
937 vcpu
->arch
.mcg_ctl
= data
;
940 if (msr
>= MSR_IA32_MC0_CTL
&&
941 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
942 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
943 /* only 0 or all 1s can be written to IA32_MCi_CTL
944 * some Linux kernels though clear bit 10 in bank 4 to
945 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
946 * this to avoid an uncatched #GP in the guest
948 if ((offset
& 0x3) == 0 &&
949 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
951 vcpu
->arch
.mce_banks
[offset
] = data
;
959 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
961 struct kvm
*kvm
= vcpu
->kvm
;
962 int lm
= is_long_mode(vcpu
);
963 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
964 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
965 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
966 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
967 u32 page_num
= data
& ~PAGE_MASK
;
968 u64 page_addr
= data
& PAGE_MASK
;
973 if (page_num
>= blob_size
)
976 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
980 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
982 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
991 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
993 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
996 static bool kvm_hv_msr_partition_wide(u32 msr
)
1000 case HV_X64_MSR_GUEST_OS_ID
:
1001 case HV_X64_MSR_HYPERCALL
:
1009 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1011 struct kvm
*kvm
= vcpu
->kvm
;
1014 case HV_X64_MSR_GUEST_OS_ID
:
1015 kvm
->arch
.hv_guest_os_id
= data
;
1016 /* setting guest os id to zero disables hypercall page */
1017 if (!kvm
->arch
.hv_guest_os_id
)
1018 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1020 case HV_X64_MSR_HYPERCALL
: {
1025 /* if guest os id is not set hypercall should remain disabled */
1026 if (!kvm
->arch
.hv_guest_os_id
)
1028 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1029 kvm
->arch
.hv_hypercall
= data
;
1032 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1033 addr
= gfn_to_hva(kvm
, gfn
);
1034 if (kvm_is_error_hva(addr
))
1036 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1037 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1038 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1040 kvm
->arch
.hv_hypercall
= data
;
1044 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1045 "data 0x%llx\n", msr
, data
);
1051 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1054 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1057 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1058 vcpu
->arch
.hv_vapic
= data
;
1061 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1062 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1063 if (kvm_is_error_hva(addr
))
1065 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1067 vcpu
->arch
.hv_vapic
= data
;
1070 case HV_X64_MSR_EOI
:
1071 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1072 case HV_X64_MSR_ICR
:
1073 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1074 case HV_X64_MSR_TPR
:
1075 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1077 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1078 "data 0x%llx\n", msr
, data
);
1085 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1089 set_efer(vcpu
, data
);
1092 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1094 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1099 case MSR_FAM10H_MMIO_CONF_BASE
:
1101 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1106 case MSR_AMD64_NB_CFG
:
1108 case MSR_IA32_DEBUGCTLMSR
:
1110 /* We support the non-activated case already */
1112 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1113 /* Values other than LBR and BTF are vendor-specific,
1114 thus reserved and should throw a #GP */
1117 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1120 case MSR_IA32_UCODE_REV
:
1121 case MSR_IA32_UCODE_WRITE
:
1122 case MSR_VM_HSAVE_PA
:
1123 case MSR_AMD64_PATCH_LOADER
:
1125 case 0x200 ... 0x2ff:
1126 return set_msr_mtrr(vcpu
, msr
, data
);
1127 case MSR_IA32_APICBASE
:
1128 kvm_set_apic_base(vcpu
, data
);
1130 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1131 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1132 case MSR_IA32_MISC_ENABLE
:
1133 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1135 case MSR_KVM_WALL_CLOCK
:
1136 vcpu
->kvm
->arch
.wall_clock
= data
;
1137 kvm_write_wall_clock(vcpu
->kvm
, data
);
1139 case MSR_KVM_SYSTEM_TIME
: {
1140 if (vcpu
->arch
.time_page
) {
1141 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1142 vcpu
->arch
.time_page
= NULL
;
1145 vcpu
->arch
.time
= data
;
1147 /* we verify if the enable bit is set... */
1151 /* ...but clean it before doing the actual write */
1152 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1154 vcpu
->arch
.time_page
=
1155 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1157 if (is_error_page(vcpu
->arch
.time_page
)) {
1158 kvm_release_page_clean(vcpu
->arch
.time_page
);
1159 vcpu
->arch
.time_page
= NULL
;
1162 kvm_request_guest_time_update(vcpu
);
1165 case MSR_IA32_MCG_CTL
:
1166 case MSR_IA32_MCG_STATUS
:
1167 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1168 return set_msr_mce(vcpu
, msr
, data
);
1170 /* Performance counters are not protected by a CPUID bit,
1171 * so we should check all of them in the generic path for the sake of
1172 * cross vendor migration.
1173 * Writing a zero into the event select MSRs disables them,
1174 * which we perfectly emulate ;-). Any other value should be at least
1175 * reported, some guests depend on them.
1177 case MSR_P6_EVNTSEL0
:
1178 case MSR_P6_EVNTSEL1
:
1179 case MSR_K7_EVNTSEL0
:
1180 case MSR_K7_EVNTSEL1
:
1181 case MSR_K7_EVNTSEL2
:
1182 case MSR_K7_EVNTSEL3
:
1184 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1185 "0x%x data 0x%llx\n", msr
, data
);
1187 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1188 * so we ignore writes to make it happy.
1190 case MSR_P6_PERFCTR0
:
1191 case MSR_P6_PERFCTR1
:
1192 case MSR_K7_PERFCTR0
:
1193 case MSR_K7_PERFCTR1
:
1194 case MSR_K7_PERFCTR2
:
1195 case MSR_K7_PERFCTR3
:
1196 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1197 "0x%x data 0x%llx\n", msr
, data
);
1199 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1200 if (kvm_hv_msr_partition_wide(msr
)) {
1202 mutex_lock(&vcpu
->kvm
->lock
);
1203 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1204 mutex_unlock(&vcpu
->kvm
->lock
);
1207 return set_msr_hyperv(vcpu
, msr
, data
);
1210 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1211 return xen_hvm_config(vcpu
, data
);
1213 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1217 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1224 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1228 * Reads an msr value (of 'msr_index') into 'pdata'.
1229 * Returns 0 on success, non-0 otherwise.
1230 * Assumes vcpu_load() was already called.
1232 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1234 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1237 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1239 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1241 if (!msr_mtrr_valid(msr
))
1244 if (msr
== MSR_MTRRdefType
)
1245 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1246 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1247 else if (msr
== MSR_MTRRfix64K_00000
)
1249 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1250 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1251 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1252 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1253 else if (msr
== MSR_IA32_CR_PAT
)
1254 *pdata
= vcpu
->arch
.pat
;
1255 else { /* Variable MTRRs */
1256 int idx
, is_mtrr_mask
;
1259 idx
= (msr
- 0x200) / 2;
1260 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1263 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1266 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1273 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1276 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1277 unsigned bank_num
= mcg_cap
& 0xff;
1280 case MSR_IA32_P5_MC_ADDR
:
1281 case MSR_IA32_P5_MC_TYPE
:
1284 case MSR_IA32_MCG_CAP
:
1285 data
= vcpu
->arch
.mcg_cap
;
1287 case MSR_IA32_MCG_CTL
:
1288 if (!(mcg_cap
& MCG_CTL_P
))
1290 data
= vcpu
->arch
.mcg_ctl
;
1292 case MSR_IA32_MCG_STATUS
:
1293 data
= vcpu
->arch
.mcg_status
;
1296 if (msr
>= MSR_IA32_MC0_CTL
&&
1297 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1298 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1299 data
= vcpu
->arch
.mce_banks
[offset
];
1308 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1311 struct kvm
*kvm
= vcpu
->kvm
;
1314 case HV_X64_MSR_GUEST_OS_ID
:
1315 data
= kvm
->arch
.hv_guest_os_id
;
1317 case HV_X64_MSR_HYPERCALL
:
1318 data
= kvm
->arch
.hv_hypercall
;
1321 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1329 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1334 case HV_X64_MSR_VP_INDEX
: {
1337 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1342 case HV_X64_MSR_EOI
:
1343 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1344 case HV_X64_MSR_ICR
:
1345 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1346 case HV_X64_MSR_TPR
:
1347 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1349 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1356 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1361 case MSR_IA32_PLATFORM_ID
:
1362 case MSR_IA32_UCODE_REV
:
1363 case MSR_IA32_EBL_CR_POWERON
:
1364 case MSR_IA32_DEBUGCTLMSR
:
1365 case MSR_IA32_LASTBRANCHFROMIP
:
1366 case MSR_IA32_LASTBRANCHTOIP
:
1367 case MSR_IA32_LASTINTFROMIP
:
1368 case MSR_IA32_LASTINTTOIP
:
1371 case MSR_VM_HSAVE_PA
:
1372 case MSR_P6_PERFCTR0
:
1373 case MSR_P6_PERFCTR1
:
1374 case MSR_P6_EVNTSEL0
:
1375 case MSR_P6_EVNTSEL1
:
1376 case MSR_K7_EVNTSEL0
:
1377 case MSR_K7_PERFCTR0
:
1378 case MSR_K8_INT_PENDING_MSG
:
1379 case MSR_AMD64_NB_CFG
:
1380 case MSR_FAM10H_MMIO_CONF_BASE
:
1384 data
= 0x500 | KVM_NR_VAR_MTRR
;
1386 case 0x200 ... 0x2ff:
1387 return get_msr_mtrr(vcpu
, msr
, pdata
);
1388 case 0xcd: /* fsb frequency */
1391 case MSR_IA32_APICBASE
:
1392 data
= kvm_get_apic_base(vcpu
);
1394 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1395 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1397 case MSR_IA32_MISC_ENABLE
:
1398 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1400 case MSR_IA32_PERF_STATUS
:
1401 /* TSC increment by tick */
1403 /* CPU multiplier */
1404 data
|= (((uint64_t)4ULL) << 40);
1407 data
= vcpu
->arch
.efer
;
1409 case MSR_KVM_WALL_CLOCK
:
1410 data
= vcpu
->kvm
->arch
.wall_clock
;
1412 case MSR_KVM_SYSTEM_TIME
:
1413 data
= vcpu
->arch
.time
;
1415 case MSR_IA32_P5_MC_ADDR
:
1416 case MSR_IA32_P5_MC_TYPE
:
1417 case MSR_IA32_MCG_CAP
:
1418 case MSR_IA32_MCG_CTL
:
1419 case MSR_IA32_MCG_STATUS
:
1420 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1421 return get_msr_mce(vcpu
, msr
, pdata
);
1422 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1423 if (kvm_hv_msr_partition_wide(msr
)) {
1425 mutex_lock(&vcpu
->kvm
->lock
);
1426 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1427 mutex_unlock(&vcpu
->kvm
->lock
);
1430 return get_msr_hyperv(vcpu
, msr
, pdata
);
1434 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1437 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1445 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1448 * Read or write a bunch of msrs. All parameters are kernel addresses.
1450 * @return number of msrs set successfully.
1452 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1453 struct kvm_msr_entry
*entries
,
1454 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1455 unsigned index
, u64
*data
))
1461 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1462 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1463 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1465 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1473 * Read or write a bunch of msrs. Parameters are user addresses.
1475 * @return number of msrs set successfully.
1477 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1478 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1479 unsigned index
, u64
*data
),
1482 struct kvm_msrs msrs
;
1483 struct kvm_msr_entry
*entries
;
1488 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1492 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1496 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1497 entries
= vmalloc(size
);
1502 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1505 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1510 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1521 int kvm_dev_ioctl_check_extension(long ext
)
1526 case KVM_CAP_IRQCHIP
:
1528 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1529 case KVM_CAP_SET_TSS_ADDR
:
1530 case KVM_CAP_EXT_CPUID
:
1531 case KVM_CAP_CLOCKSOURCE
:
1533 case KVM_CAP_NOP_IO_DELAY
:
1534 case KVM_CAP_MP_STATE
:
1535 case KVM_CAP_SYNC_MMU
:
1536 case KVM_CAP_REINJECT_CONTROL
:
1537 case KVM_CAP_IRQ_INJECT_STATUS
:
1538 case KVM_CAP_ASSIGN_DEV_IRQ
:
1540 case KVM_CAP_IOEVENTFD
:
1542 case KVM_CAP_PIT_STATE2
:
1543 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1544 case KVM_CAP_XEN_HVM
:
1545 case KVM_CAP_ADJUST_CLOCK
:
1546 case KVM_CAP_VCPU_EVENTS
:
1547 case KVM_CAP_HYPERV
:
1548 case KVM_CAP_HYPERV_VAPIC
:
1549 case KVM_CAP_HYPERV_SPIN
:
1550 case KVM_CAP_PCI_SEGMENT
:
1551 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1554 case KVM_CAP_COALESCED_MMIO
:
1555 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1558 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1560 case KVM_CAP_NR_VCPUS
:
1563 case KVM_CAP_NR_MEMSLOTS
:
1564 r
= KVM_MEMORY_SLOTS
;
1566 case KVM_CAP_PV_MMU
: /* obsolete */
1573 r
= KVM_MAX_MCE_BANKS
;
1583 long kvm_arch_dev_ioctl(struct file
*filp
,
1584 unsigned int ioctl
, unsigned long arg
)
1586 void __user
*argp
= (void __user
*)arg
;
1590 case KVM_GET_MSR_INDEX_LIST
: {
1591 struct kvm_msr_list __user
*user_msr_list
= argp
;
1592 struct kvm_msr_list msr_list
;
1596 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1599 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1600 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1603 if (n
< msr_list
.nmsrs
)
1606 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1607 num_msrs_to_save
* sizeof(u32
)))
1609 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1611 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1616 case KVM_GET_SUPPORTED_CPUID
: {
1617 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1618 struct kvm_cpuid2 cpuid
;
1621 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1623 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1624 cpuid_arg
->entries
);
1629 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1634 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1637 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1639 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1651 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1653 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1654 if (unlikely(per_cpu(cpu_tsc_khz
, cpu
) == 0)) {
1655 unsigned long khz
= cpufreq_quick_get(cpu
);
1658 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
1660 kvm_request_guest_time_update(vcpu
);
1663 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1665 kvm_put_guest_fpu(vcpu
);
1666 kvm_x86_ops
->vcpu_put(vcpu
);
1669 static int is_efer_nx(void)
1671 unsigned long long efer
= 0;
1673 rdmsrl_safe(MSR_EFER
, &efer
);
1674 return efer
& EFER_NX
;
1677 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1680 struct kvm_cpuid_entry2
*e
, *entry
;
1683 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1684 e
= &vcpu
->arch
.cpuid_entries
[i
];
1685 if (e
->function
== 0x80000001) {
1690 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1691 entry
->edx
&= ~(1 << 20);
1692 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1696 /* when an old userspace process fills a new kernel module */
1697 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1698 struct kvm_cpuid
*cpuid
,
1699 struct kvm_cpuid_entry __user
*entries
)
1702 struct kvm_cpuid_entry
*cpuid_entries
;
1705 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1708 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1712 if (copy_from_user(cpuid_entries
, entries
,
1713 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1715 for (i
= 0; i
< cpuid
->nent
; i
++) {
1716 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1717 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1718 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1719 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1720 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1721 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1722 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1723 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1724 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1725 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1727 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1728 cpuid_fix_nx_cap(vcpu
);
1730 kvm_apic_set_version(vcpu
);
1731 kvm_x86_ops
->cpuid_update(vcpu
);
1734 vfree(cpuid_entries
);
1739 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1740 struct kvm_cpuid2
*cpuid
,
1741 struct kvm_cpuid_entry2 __user
*entries
)
1746 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1749 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1750 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1752 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1753 kvm_apic_set_version(vcpu
);
1754 kvm_x86_ops
->cpuid_update(vcpu
);
1761 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1762 struct kvm_cpuid2
*cpuid
,
1763 struct kvm_cpuid_entry2 __user
*entries
)
1768 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1771 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1772 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1777 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1781 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1784 entry
->function
= function
;
1785 entry
->index
= index
;
1786 cpuid_count(entry
->function
, entry
->index
,
1787 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1791 #define F(x) bit(X86_FEATURE_##x)
1793 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1794 u32 index
, int *nent
, int maxnent
)
1796 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1797 #ifdef CONFIG_X86_64
1798 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
1800 unsigned f_lm
= F(LM
);
1802 unsigned f_gbpages
= 0;
1805 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
1808 const u32 kvm_supported_word0_x86_features
=
1809 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1810 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1811 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1812 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1813 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1814 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1815 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1816 0 /* HTT, TM, Reserved, PBE */;
1817 /* cpuid 0x80000001.edx */
1818 const u32 kvm_supported_word1_x86_features
=
1819 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1820 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1821 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1822 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1823 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1824 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1825 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
1826 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1828 const u32 kvm_supported_word4_x86_features
=
1829 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1830 0 /* DS-CPL, VMX, SMX, EST */ |
1831 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1832 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1833 0 /* Reserved, DCA */ | F(XMM4_1
) |
1834 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1835 0 /* Reserved, XSAVE, OSXSAVE */;
1836 /* cpuid 0x80000001.ecx */
1837 const u32 kvm_supported_word6_x86_features
=
1838 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1839 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1840 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1841 0 /* SKINIT */ | 0 /* WDT */;
1843 /* all calls to cpuid_count() should be made on the same cpu */
1845 do_cpuid_1_ent(entry
, function
, index
);
1850 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1853 entry
->edx
&= kvm_supported_word0_x86_features
;
1854 entry
->ecx
&= kvm_supported_word4_x86_features
;
1855 /* we support x2apic emulation even if host does not support
1856 * it since we emulate x2apic in software */
1857 entry
->ecx
|= F(X2APIC
);
1859 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1860 * may return different values. This forces us to get_cpu() before
1861 * issuing the first command, and also to emulate this annoying behavior
1862 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1864 int t
, times
= entry
->eax
& 0xff;
1866 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1867 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1868 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1869 do_cpuid_1_ent(&entry
[t
], function
, 0);
1870 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1875 /* function 4 and 0xb have additional index. */
1879 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1880 /* read more entries until cache_type is zero */
1881 for (i
= 1; *nent
< maxnent
; ++i
) {
1882 cache_type
= entry
[i
- 1].eax
& 0x1f;
1885 do_cpuid_1_ent(&entry
[i
], function
, i
);
1887 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1895 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1896 /* read more entries until level_type is zero */
1897 for (i
= 1; *nent
< maxnent
; ++i
) {
1898 level_type
= entry
[i
- 1].ecx
& 0xff00;
1901 do_cpuid_1_ent(&entry
[i
], function
, i
);
1903 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1909 entry
->eax
= min(entry
->eax
, 0x8000001a);
1912 entry
->edx
&= kvm_supported_word1_x86_features
;
1913 entry
->ecx
&= kvm_supported_word6_x86_features
;
1921 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1922 struct kvm_cpuid_entry2 __user
*entries
)
1924 struct kvm_cpuid_entry2
*cpuid_entries
;
1925 int limit
, nent
= 0, r
= -E2BIG
;
1928 if (cpuid
->nent
< 1)
1930 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1931 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
1933 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1937 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1938 limit
= cpuid_entries
[0].eax
;
1939 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1940 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1941 &nent
, cpuid
->nent
);
1943 if (nent
>= cpuid
->nent
)
1946 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1947 limit
= cpuid_entries
[nent
- 1].eax
;
1948 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1949 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1950 &nent
, cpuid
->nent
);
1952 if (nent
>= cpuid
->nent
)
1956 if (copy_to_user(entries
, cpuid_entries
,
1957 nent
* sizeof(struct kvm_cpuid_entry2
)))
1963 vfree(cpuid_entries
);
1968 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1969 struct kvm_lapic_state
*s
)
1972 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1978 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1979 struct kvm_lapic_state
*s
)
1982 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1983 kvm_apic_post_state_restore(vcpu
);
1984 update_cr8_intercept(vcpu
);
1990 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1991 struct kvm_interrupt
*irq
)
1993 if (irq
->irq
< 0 || irq
->irq
>= 256)
1995 if (irqchip_in_kernel(vcpu
->kvm
))
1999 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2006 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2009 kvm_inject_nmi(vcpu
);
2015 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2016 struct kvm_tpr_access_ctl
*tac
)
2020 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2024 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2028 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2031 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2033 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2036 vcpu
->arch
.mcg_cap
= mcg_cap
;
2037 /* Init IA32_MCG_CTL to all 1s */
2038 if (mcg_cap
& MCG_CTL_P
)
2039 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2040 /* Init IA32_MCi_CTL to all 1s */
2041 for (bank
= 0; bank
< bank_num
; bank
++)
2042 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2047 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2048 struct kvm_x86_mce
*mce
)
2050 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2051 unsigned bank_num
= mcg_cap
& 0xff;
2052 u64
*banks
= vcpu
->arch
.mce_banks
;
2054 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2057 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2058 * reporting is disabled
2060 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2061 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2063 banks
+= 4 * mce
->bank
;
2065 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2066 * reporting is disabled for the bank
2068 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2070 if (mce
->status
& MCI_STATUS_UC
) {
2071 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2072 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2073 printk(KERN_DEBUG
"kvm: set_mce: "
2074 "injects mce exception while "
2075 "previous one is in progress!\n");
2076 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
2079 if (banks
[1] & MCI_STATUS_VAL
)
2080 mce
->status
|= MCI_STATUS_OVER
;
2081 banks
[2] = mce
->addr
;
2082 banks
[3] = mce
->misc
;
2083 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2084 banks
[1] = mce
->status
;
2085 kvm_queue_exception(vcpu
, MC_VECTOR
);
2086 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2087 || !(banks
[1] & MCI_STATUS_UC
)) {
2088 if (banks
[1] & MCI_STATUS_VAL
)
2089 mce
->status
|= MCI_STATUS_OVER
;
2090 banks
[2] = mce
->addr
;
2091 banks
[3] = mce
->misc
;
2092 banks
[1] = mce
->status
;
2094 banks
[1] |= MCI_STATUS_OVER
;
2098 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2099 struct kvm_vcpu_events
*events
)
2103 events
->exception
.injected
= vcpu
->arch
.exception
.pending
;
2104 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2105 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2106 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2108 events
->interrupt
.injected
= vcpu
->arch
.interrupt
.pending
;
2109 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2110 events
->interrupt
.soft
= vcpu
->arch
.interrupt
.soft
;
2112 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2113 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2114 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2116 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2118 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2119 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
);
2124 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2125 struct kvm_vcpu_events
*events
)
2127 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2128 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
))
2133 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2134 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2135 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2136 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2138 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2139 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2140 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2141 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2142 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2144 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2145 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2146 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2147 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2149 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2150 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2157 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2158 unsigned int ioctl
, unsigned long arg
)
2160 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2161 void __user
*argp
= (void __user
*)arg
;
2163 struct kvm_lapic_state
*lapic
= NULL
;
2166 case KVM_GET_LAPIC
: {
2168 if (!vcpu
->arch
.apic
)
2170 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2175 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
2179 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
2184 case KVM_SET_LAPIC
: {
2186 if (!vcpu
->arch
.apic
)
2188 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2193 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2195 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
2201 case KVM_INTERRUPT
: {
2202 struct kvm_interrupt irq
;
2205 if (copy_from_user(&irq
, argp
, sizeof irq
))
2207 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2214 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2220 case KVM_SET_CPUID
: {
2221 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2222 struct kvm_cpuid cpuid
;
2225 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2227 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2232 case KVM_SET_CPUID2
: {
2233 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2234 struct kvm_cpuid2 cpuid
;
2237 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2239 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2240 cpuid_arg
->entries
);
2245 case KVM_GET_CPUID2
: {
2246 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2247 struct kvm_cpuid2 cpuid
;
2250 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2252 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2253 cpuid_arg
->entries
);
2257 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2263 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2266 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2268 case KVM_TPR_ACCESS_REPORTING
: {
2269 struct kvm_tpr_access_ctl tac
;
2272 if (copy_from_user(&tac
, argp
, sizeof tac
))
2274 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2278 if (copy_to_user(argp
, &tac
, sizeof tac
))
2283 case KVM_SET_VAPIC_ADDR
: {
2284 struct kvm_vapic_addr va
;
2287 if (!irqchip_in_kernel(vcpu
->kvm
))
2290 if (copy_from_user(&va
, argp
, sizeof va
))
2293 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2296 case KVM_X86_SETUP_MCE
: {
2300 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2302 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2305 case KVM_X86_SET_MCE
: {
2306 struct kvm_x86_mce mce
;
2309 if (copy_from_user(&mce
, argp
, sizeof mce
))
2311 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2314 case KVM_GET_VCPU_EVENTS
: {
2315 struct kvm_vcpu_events events
;
2317 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2320 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2325 case KVM_SET_VCPU_EVENTS
: {
2326 struct kvm_vcpu_events events
;
2329 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2332 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2343 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2347 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2349 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2353 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2356 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2360 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2361 u32 kvm_nr_mmu_pages
)
2363 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2366 mutex_lock(&kvm
->slots_lock
);
2367 spin_lock(&kvm
->mmu_lock
);
2369 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2370 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2372 spin_unlock(&kvm
->mmu_lock
);
2373 mutex_unlock(&kvm
->slots_lock
);
2377 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2379 return kvm
->arch
.n_alloc_mmu_pages
;
2382 gfn_t
unalias_gfn_instantiation(struct kvm
*kvm
, gfn_t gfn
)
2385 struct kvm_mem_alias
*alias
;
2386 struct kvm_mem_aliases
*aliases
;
2388 aliases
= rcu_dereference(kvm
->arch
.aliases
);
2390 for (i
= 0; i
< aliases
->naliases
; ++i
) {
2391 alias
= &aliases
->aliases
[i
];
2392 if (alias
->flags
& KVM_ALIAS_INVALID
)
2394 if (gfn
>= alias
->base_gfn
2395 && gfn
< alias
->base_gfn
+ alias
->npages
)
2396 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2401 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
2404 struct kvm_mem_alias
*alias
;
2405 struct kvm_mem_aliases
*aliases
;
2407 aliases
= rcu_dereference(kvm
->arch
.aliases
);
2409 for (i
= 0; i
< aliases
->naliases
; ++i
) {
2410 alias
= &aliases
->aliases
[i
];
2411 if (gfn
>= alias
->base_gfn
2412 && gfn
< alias
->base_gfn
+ alias
->npages
)
2413 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2419 * Set a new alias region. Aliases map a portion of physical memory into
2420 * another portion. This is useful for memory windows, for example the PC
2423 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
2424 struct kvm_memory_alias
*alias
)
2427 struct kvm_mem_alias
*p
;
2428 struct kvm_mem_aliases
*aliases
, *old_aliases
;
2431 /* General sanity checks */
2432 if (alias
->memory_size
& (PAGE_SIZE
- 1))
2434 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
2436 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
2438 if (alias
->guest_phys_addr
+ alias
->memory_size
2439 < alias
->guest_phys_addr
)
2441 if (alias
->target_phys_addr
+ alias
->memory_size
2442 < alias
->target_phys_addr
)
2446 aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
2450 mutex_lock(&kvm
->slots_lock
);
2452 /* invalidate any gfn reference in case of deletion/shrinking */
2453 memcpy(aliases
, kvm
->arch
.aliases
, sizeof(struct kvm_mem_aliases
));
2454 aliases
->aliases
[alias
->slot
].flags
|= KVM_ALIAS_INVALID
;
2455 old_aliases
= kvm
->arch
.aliases
;
2456 rcu_assign_pointer(kvm
->arch
.aliases
, aliases
);
2457 synchronize_srcu_expedited(&kvm
->srcu
);
2458 kvm_mmu_zap_all(kvm
);
2462 aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
2466 memcpy(aliases
, kvm
->arch
.aliases
, sizeof(struct kvm_mem_aliases
));
2468 p
= &aliases
->aliases
[alias
->slot
];
2469 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
2470 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
2471 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
2472 p
->flags
&= ~(KVM_ALIAS_INVALID
);
2474 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
2475 if (aliases
->aliases
[n
- 1].npages
)
2477 aliases
->naliases
= n
;
2479 old_aliases
= kvm
->arch
.aliases
;
2480 rcu_assign_pointer(kvm
->arch
.aliases
, aliases
);
2481 synchronize_srcu_expedited(&kvm
->srcu
);
2486 mutex_unlock(&kvm
->slots_lock
);
2491 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2496 switch (chip
->chip_id
) {
2497 case KVM_IRQCHIP_PIC_MASTER
:
2498 memcpy(&chip
->chip
.pic
,
2499 &pic_irqchip(kvm
)->pics
[0],
2500 sizeof(struct kvm_pic_state
));
2502 case KVM_IRQCHIP_PIC_SLAVE
:
2503 memcpy(&chip
->chip
.pic
,
2504 &pic_irqchip(kvm
)->pics
[1],
2505 sizeof(struct kvm_pic_state
));
2507 case KVM_IRQCHIP_IOAPIC
:
2508 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2517 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2522 switch (chip
->chip_id
) {
2523 case KVM_IRQCHIP_PIC_MASTER
:
2524 raw_spin_lock(&pic_irqchip(kvm
)->lock
);
2525 memcpy(&pic_irqchip(kvm
)->pics
[0],
2527 sizeof(struct kvm_pic_state
));
2528 raw_spin_unlock(&pic_irqchip(kvm
)->lock
);
2530 case KVM_IRQCHIP_PIC_SLAVE
:
2531 raw_spin_lock(&pic_irqchip(kvm
)->lock
);
2532 memcpy(&pic_irqchip(kvm
)->pics
[1],
2534 sizeof(struct kvm_pic_state
));
2535 raw_spin_unlock(&pic_irqchip(kvm
)->lock
);
2537 case KVM_IRQCHIP_IOAPIC
:
2538 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
2544 kvm_pic_update_irq(pic_irqchip(kvm
));
2548 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2552 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2553 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2554 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2558 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2562 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2563 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2564 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2565 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2569 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2573 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2574 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2575 sizeof(ps
->channels
));
2576 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2577 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2581 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2583 int r
= 0, start
= 0;
2584 u32 prev_legacy
, cur_legacy
;
2585 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2586 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2587 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2588 if (!prev_legacy
&& cur_legacy
)
2590 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2591 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2592 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2593 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2594 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2598 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2599 struct kvm_reinject_control
*control
)
2601 if (!kvm
->arch
.vpit
)
2603 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2604 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2605 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2610 * Get (and clear) the dirty memory log for a memory slot.
2612 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2613 struct kvm_dirty_log
*log
)
2616 struct kvm_memory_slot
*memslot
;
2618 unsigned long is_dirty
= 0;
2619 unsigned long *dirty_bitmap
= NULL
;
2621 mutex_lock(&kvm
->slots_lock
);
2624 if (log
->slot
>= KVM_MEMORY_SLOTS
)
2627 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
2629 if (!memslot
->dirty_bitmap
)
2632 n
= kvm_dirty_bitmap_bytes(memslot
);
2635 dirty_bitmap
= vmalloc(n
);
2638 memset(dirty_bitmap
, 0, n
);
2640 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
2641 is_dirty
= memslot
->dirty_bitmap
[i
];
2643 /* If nothing is dirty, don't bother messing with page tables. */
2645 struct kvm_memslots
*slots
, *old_slots
;
2647 spin_lock(&kvm
->mmu_lock
);
2648 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2649 spin_unlock(&kvm
->mmu_lock
);
2651 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
2655 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
2656 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
2658 old_slots
= kvm
->memslots
;
2659 rcu_assign_pointer(kvm
->memslots
, slots
);
2660 synchronize_srcu_expedited(&kvm
->srcu
);
2661 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
2666 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
2669 vfree(dirty_bitmap
);
2671 mutex_unlock(&kvm
->slots_lock
);
2675 long kvm_arch_vm_ioctl(struct file
*filp
,
2676 unsigned int ioctl
, unsigned long arg
)
2678 struct kvm
*kvm
= filp
->private_data
;
2679 void __user
*argp
= (void __user
*)arg
;
2682 * This union makes it completely explicit to gcc-3.x
2683 * that these two variables' stack usage should be
2684 * combined, not added together.
2687 struct kvm_pit_state ps
;
2688 struct kvm_pit_state2 ps2
;
2689 struct kvm_memory_alias alias
;
2690 struct kvm_pit_config pit_config
;
2694 case KVM_SET_TSS_ADDR
:
2695 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2699 case KVM_SET_IDENTITY_MAP_ADDR
: {
2703 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2705 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2710 case KVM_SET_MEMORY_REGION
: {
2711 struct kvm_memory_region kvm_mem
;
2712 struct kvm_userspace_memory_region kvm_userspace_mem
;
2715 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2717 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2718 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2719 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2720 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2721 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2726 case KVM_SET_NR_MMU_PAGES
:
2727 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2731 case KVM_GET_NR_MMU_PAGES
:
2732 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2734 case KVM_SET_MEMORY_ALIAS
:
2736 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2738 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2742 case KVM_CREATE_IRQCHIP
: {
2743 struct kvm_pic
*vpic
;
2745 mutex_lock(&kvm
->lock
);
2748 goto create_irqchip_unlock
;
2750 vpic
= kvm_create_pic(kvm
);
2752 r
= kvm_ioapic_init(kvm
);
2754 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
2757 goto create_irqchip_unlock
;
2760 goto create_irqchip_unlock
;
2762 kvm
->arch
.vpic
= vpic
;
2764 r
= kvm_setup_default_irq_routing(kvm
);
2766 mutex_lock(&kvm
->irq_lock
);
2767 kvm_ioapic_destroy(kvm
);
2768 kvm_destroy_pic(kvm
);
2769 mutex_unlock(&kvm
->irq_lock
);
2771 create_irqchip_unlock
:
2772 mutex_unlock(&kvm
->lock
);
2775 case KVM_CREATE_PIT
:
2776 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2778 case KVM_CREATE_PIT2
:
2780 if (copy_from_user(&u
.pit_config
, argp
,
2781 sizeof(struct kvm_pit_config
)))
2784 mutex_lock(&kvm
->slots_lock
);
2787 goto create_pit_unlock
;
2789 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2793 mutex_unlock(&kvm
->slots_lock
);
2795 case KVM_IRQ_LINE_STATUS
:
2796 case KVM_IRQ_LINE
: {
2797 struct kvm_irq_level irq_event
;
2800 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2802 if (irqchip_in_kernel(kvm
)) {
2804 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2805 irq_event
.irq
, irq_event
.level
);
2806 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2807 irq_event
.status
= status
;
2808 if (copy_to_user(argp
, &irq_event
,
2816 case KVM_GET_IRQCHIP
: {
2817 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2818 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2824 if (copy_from_user(chip
, argp
, sizeof *chip
))
2825 goto get_irqchip_out
;
2827 if (!irqchip_in_kernel(kvm
))
2828 goto get_irqchip_out
;
2829 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2831 goto get_irqchip_out
;
2833 if (copy_to_user(argp
, chip
, sizeof *chip
))
2834 goto get_irqchip_out
;
2842 case KVM_SET_IRQCHIP
: {
2843 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2844 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2850 if (copy_from_user(chip
, argp
, sizeof *chip
))
2851 goto set_irqchip_out
;
2853 if (!irqchip_in_kernel(kvm
))
2854 goto set_irqchip_out
;
2855 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2857 goto set_irqchip_out
;
2867 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2870 if (!kvm
->arch
.vpit
)
2872 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2876 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2883 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2886 if (!kvm
->arch
.vpit
)
2888 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2894 case KVM_GET_PIT2
: {
2896 if (!kvm
->arch
.vpit
)
2898 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2902 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2907 case KVM_SET_PIT2
: {
2909 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2912 if (!kvm
->arch
.vpit
)
2914 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2920 case KVM_REINJECT_CONTROL
: {
2921 struct kvm_reinject_control control
;
2923 if (copy_from_user(&control
, argp
, sizeof(control
)))
2925 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2931 case KVM_XEN_HVM_CONFIG
: {
2933 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
2934 sizeof(struct kvm_xen_hvm_config
)))
2937 if (kvm
->arch
.xen_hvm_config
.flags
)
2942 case KVM_SET_CLOCK
: {
2943 struct timespec now
;
2944 struct kvm_clock_data user_ns
;
2949 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
2958 now_ns
= timespec_to_ns(&now
);
2959 delta
= user_ns
.clock
- now_ns
;
2960 kvm
->arch
.kvmclock_offset
= delta
;
2963 case KVM_GET_CLOCK
: {
2964 struct timespec now
;
2965 struct kvm_clock_data user_ns
;
2969 now_ns
= timespec_to_ns(&now
);
2970 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
2974 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
2987 static void kvm_init_msr_list(void)
2992 /* skip the first msrs in the list. KVM-specific */
2993 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2994 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2997 msrs_to_save
[j
] = msrs_to_save
[i
];
3000 num_msrs_to_save
= j
;
3003 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3006 if (vcpu
->arch
.apic
&&
3007 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3010 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3013 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3015 if (vcpu
->arch
.apic
&&
3016 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3019 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3022 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3024 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3025 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gva
, access
, error
);
3028 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3030 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3031 access
|= PFERR_FETCH_MASK
;
3032 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gva
, access
, error
);
3035 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3037 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3038 access
|= PFERR_WRITE_MASK
;
3039 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gva
, access
, error
);
3042 /* uses this to access any guest's mapped memory without checking CPL */
3043 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3045 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gva
, 0, error
);
3048 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3049 struct kvm_vcpu
*vcpu
, u32 access
,
3053 int r
= X86EMUL_CONTINUE
;
3056 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
, access
, error
);
3057 unsigned offset
= addr
& (PAGE_SIZE
-1);
3058 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3061 if (gpa
== UNMAPPED_GVA
) {
3062 r
= X86EMUL_PROPAGATE_FAULT
;
3065 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3067 r
= X86EMUL_UNHANDLEABLE
;
3079 /* used for instruction fetching */
3080 static int kvm_fetch_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3081 struct kvm_vcpu
*vcpu
, u32
*error
)
3083 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3084 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3085 access
| PFERR_FETCH_MASK
, error
);
3088 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3089 struct kvm_vcpu
*vcpu
, u32
*error
)
3091 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3092 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3096 static int kvm_read_guest_virt_system(gva_t addr
, void *val
, unsigned int bytes
,
3097 struct kvm_vcpu
*vcpu
, u32
*error
)
3099 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, error
);
3102 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3103 struct kvm_vcpu
*vcpu
, u32
*error
)
3106 int r
= X86EMUL_CONTINUE
;
3109 gpa_t gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, error
);
3110 unsigned offset
= addr
& (PAGE_SIZE
-1);
3111 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3114 if (gpa
== UNMAPPED_GVA
) {
3115 r
= X86EMUL_PROPAGATE_FAULT
;
3118 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3120 r
= X86EMUL_UNHANDLEABLE
;
3133 static int emulator_read_emulated(unsigned long addr
,
3136 struct kvm_vcpu
*vcpu
)
3141 if (vcpu
->mmio_read_completed
) {
3142 memcpy(val
, vcpu
->mmio_data
, bytes
);
3143 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3144 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3145 vcpu
->mmio_read_completed
= 0;
3146 return X86EMUL_CONTINUE
;
3149 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, &error_code
);
3151 if (gpa
== UNMAPPED_GVA
) {
3152 kvm_inject_page_fault(vcpu
, addr
, error_code
);
3153 return X86EMUL_PROPAGATE_FAULT
;
3156 /* For APIC access vmexit */
3157 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3160 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
, NULL
)
3161 == X86EMUL_CONTINUE
)
3162 return X86EMUL_CONTINUE
;
3166 * Is this MMIO handled locally?
3168 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3169 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3170 return X86EMUL_CONTINUE
;
3173 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3175 vcpu
->mmio_needed
= 1;
3176 vcpu
->mmio_phys_addr
= gpa
;
3177 vcpu
->mmio_size
= bytes
;
3178 vcpu
->mmio_is_write
= 0;
3180 return X86EMUL_UNHANDLEABLE
;
3183 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3184 const void *val
, int bytes
)
3188 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3191 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3195 static int emulator_write_emulated_onepage(unsigned long addr
,
3198 struct kvm_vcpu
*vcpu
)
3203 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, &error_code
);
3205 if (gpa
== UNMAPPED_GVA
) {
3206 kvm_inject_page_fault(vcpu
, addr
, error_code
);
3207 return X86EMUL_PROPAGATE_FAULT
;
3210 /* For APIC access vmexit */
3211 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3214 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3215 return X86EMUL_CONTINUE
;
3218 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3220 * Is this MMIO handled locally?
3222 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3223 return X86EMUL_CONTINUE
;
3225 vcpu
->mmio_needed
= 1;
3226 vcpu
->mmio_phys_addr
= gpa
;
3227 vcpu
->mmio_size
= bytes
;
3228 vcpu
->mmio_is_write
= 1;
3229 memcpy(vcpu
->mmio_data
, val
, bytes
);
3231 return X86EMUL_CONTINUE
;
3234 int emulator_write_emulated(unsigned long addr
,
3237 struct kvm_vcpu
*vcpu
)
3239 /* Crossing a page boundary? */
3240 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3243 now
= -addr
& ~PAGE_MASK
;
3244 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
3245 if (rc
!= X86EMUL_CONTINUE
)
3251 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
3253 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
3255 static int emulator_cmpxchg_emulated(unsigned long addr
,
3259 struct kvm_vcpu
*vcpu
)
3261 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3262 #ifndef CONFIG_X86_64
3263 /* guests cmpxchg8b have to be emulated atomically */
3270 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3272 if (gpa
== UNMAPPED_GVA
||
3273 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3276 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3281 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3283 kaddr
= kmap_atomic(page
, KM_USER0
);
3284 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
3285 kunmap_atomic(kaddr
, KM_USER0
);
3286 kvm_release_page_dirty(page
);
3291 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
3294 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
3296 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
3299 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
3301 kvm_mmu_invlpg(vcpu
, address
);
3302 return X86EMUL_CONTINUE
;
3305 int emulate_clts(struct kvm_vcpu
*vcpu
)
3307 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
3308 kvm_x86_ops
->fpu_activate(vcpu
);
3309 return X86EMUL_CONTINUE
;
3312 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
3314 return kvm_x86_ops
->get_dr(ctxt
->vcpu
, dr
, dest
);
3317 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
3319 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
3321 return kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
);
3324 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
3327 unsigned long rip
= kvm_rip_read(vcpu
);
3328 unsigned long rip_linear
;
3330 if (!printk_ratelimit())
3333 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
3335 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
, NULL
);
3337 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3338 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
3340 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
3342 static struct x86_emulate_ops emulate_ops
= {
3343 .read_std
= kvm_read_guest_virt_system
,
3344 .fetch
= kvm_fetch_guest_virt
,
3345 .read_emulated
= emulator_read_emulated
,
3346 .write_emulated
= emulator_write_emulated
,
3347 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
3350 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
3352 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3353 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3354 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
3355 vcpu
->arch
.regs_dirty
= ~0;
3358 int emulate_instruction(struct kvm_vcpu
*vcpu
,
3364 struct decode_cache
*c
;
3365 struct kvm_run
*run
= vcpu
->run
;
3367 kvm_clear_exception_queue(vcpu
);
3368 vcpu
->arch
.mmio_fault_cr2
= cr2
;
3370 * TODO: fix emulate.c to use guest_read/write_register
3371 * instead of direct ->regs accesses, can save hundred cycles
3372 * on Intel for instructions that don't read/change RSP, for
3375 cache_all_regs(vcpu
);
3377 vcpu
->mmio_is_write
= 0;
3378 vcpu
->arch
.pio
.string
= 0;
3380 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
3382 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
3384 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
3385 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_get_rflags(vcpu
);
3386 vcpu
->arch
.emulate_ctxt
.mode
=
3387 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
3388 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
3389 ? X86EMUL_MODE_VM86
: cs_l
3390 ? X86EMUL_MODE_PROT64
: cs_db
3391 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
3393 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3395 /* Only allow emulation of specific instructions on #UD
3396 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3397 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
3398 if (emulation_type
& EMULTYPE_TRAP_UD
) {
3400 return EMULATE_FAIL
;
3402 case 0x01: /* VMMCALL */
3403 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
3404 return EMULATE_FAIL
;
3406 case 0x34: /* sysenter */
3407 case 0x35: /* sysexit */
3408 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3409 return EMULATE_FAIL
;
3411 case 0x05: /* syscall */
3412 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3413 return EMULATE_FAIL
;
3416 return EMULATE_FAIL
;
3419 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
3420 return EMULATE_FAIL
;
3423 ++vcpu
->stat
.insn_emulation
;
3425 ++vcpu
->stat
.insn_emulation_fail
;
3426 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3427 return EMULATE_DONE
;
3428 return EMULATE_FAIL
;
3432 if (emulation_type
& EMULTYPE_SKIP
) {
3433 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
3434 return EMULATE_DONE
;
3437 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3438 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
3441 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
3443 if (vcpu
->arch
.pio
.string
)
3444 return EMULATE_DO_MMIO
;
3446 if ((r
|| vcpu
->mmio_is_write
) && run
) {
3447 run
->exit_reason
= KVM_EXIT_MMIO
;
3448 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
3449 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
3450 run
->mmio
.len
= vcpu
->mmio_size
;
3451 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
3455 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3456 return EMULATE_DONE
;
3457 if (!vcpu
->mmio_needed
) {
3458 kvm_report_emulation_failure(vcpu
, "mmio");
3459 return EMULATE_FAIL
;
3461 return EMULATE_DO_MMIO
;
3464 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
3466 if (vcpu
->mmio_is_write
) {
3467 vcpu
->mmio_needed
= 0;
3468 return EMULATE_DO_MMIO
;
3471 return EMULATE_DONE
;
3473 EXPORT_SYMBOL_GPL(emulate_instruction
);
3475 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
3477 void *p
= vcpu
->arch
.pio_data
;
3478 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
3483 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
3484 if (vcpu
->arch
.pio
.in
)
3485 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
, &error_code
);
3487 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
, &error_code
);
3489 if (ret
== X86EMUL_PROPAGATE_FAULT
)
3490 kvm_inject_page_fault(vcpu
, q
, error_code
);
3495 int complete_pio(struct kvm_vcpu
*vcpu
)
3497 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3504 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3505 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
3506 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
3510 r
= pio_copy_data(vcpu
);
3517 delta
*= io
->cur_count
;
3519 * The size of the register should really depend on
3520 * current address size.
3522 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3524 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
3530 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3532 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
3534 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3536 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
3540 io
->count
-= io
->cur_count
;
3546 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3548 /* TODO: String I/O for in kernel device */
3551 if (vcpu
->arch
.pio
.in
)
3552 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3553 vcpu
->arch
.pio
.size
, pd
);
3555 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3556 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3561 static int pio_string_write(struct kvm_vcpu
*vcpu
)
3563 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3564 void *pd
= vcpu
->arch
.pio_data
;
3567 for (i
= 0; i
< io
->cur_count
; i
++) {
3568 if (kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3569 io
->port
, io
->size
, pd
)) {
3578 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, int in
, int size
, unsigned port
)
3582 trace_kvm_pio(!in
, port
, size
, 1);
3584 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3585 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3586 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3587 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3588 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
3589 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3590 vcpu
->arch
.pio
.in
= in
;
3591 vcpu
->arch
.pio
.string
= 0;
3592 vcpu
->arch
.pio
.down
= 0;
3593 vcpu
->arch
.pio
.rep
= 0;
3595 if (!vcpu
->arch
.pio
.in
) {
3596 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3597 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
3600 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3606 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
3608 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, int in
,
3609 int size
, unsigned long count
, int down
,
3610 gva_t address
, int rep
, unsigned port
)
3612 unsigned now
, in_page
;
3615 trace_kvm_pio(!in
, port
, size
, count
);
3617 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3618 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3619 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3620 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3621 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
3622 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3623 vcpu
->arch
.pio
.in
= in
;
3624 vcpu
->arch
.pio
.string
= 1;
3625 vcpu
->arch
.pio
.down
= down
;
3626 vcpu
->arch
.pio
.rep
= rep
;
3629 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3634 in_page
= PAGE_SIZE
- offset_in_page(address
);
3636 in_page
= offset_in_page(address
) + size
;
3637 now
= min(count
, (unsigned long)in_page
/ size
);
3642 * String I/O in reverse. Yuck. Kill the guest, fix later.
3644 pr_unimpl(vcpu
, "guest string pio down\n");
3645 kvm_inject_gp(vcpu
, 0);
3648 vcpu
->run
->io
.count
= now
;
3649 vcpu
->arch
.pio
.cur_count
= now
;
3651 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3652 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3654 vcpu
->arch
.pio
.guest_gva
= address
;
3656 if (!vcpu
->arch
.pio
.in
) {
3657 /* string PIO write */
3658 ret
= pio_copy_data(vcpu
);
3659 if (ret
== X86EMUL_PROPAGATE_FAULT
)
3661 if (ret
== 0 && !pio_string_write(vcpu
)) {
3663 if (vcpu
->arch
.pio
.count
== 0)
3667 /* no string PIO read support yet */
3671 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3673 static void bounce_off(void *info
)
3678 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3681 struct cpufreq_freqs
*freq
= data
;
3683 struct kvm_vcpu
*vcpu
;
3684 int i
, send_ipi
= 0;
3686 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3688 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3690 per_cpu(cpu_tsc_khz
, freq
->cpu
) = freq
->new;
3692 spin_lock(&kvm_lock
);
3693 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3694 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3695 if (vcpu
->cpu
!= freq
->cpu
)
3697 if (!kvm_request_guest_time_update(vcpu
))
3699 if (vcpu
->cpu
!= smp_processor_id())
3703 spin_unlock(&kvm_lock
);
3705 if (freq
->old
< freq
->new && send_ipi
) {
3707 * We upscale the frequency. Must make the guest
3708 * doesn't see old kvmclock values while running with
3709 * the new frequency, otherwise we risk the guest sees
3710 * time go backwards.
3712 * In case we update the frequency for another cpu
3713 * (which might be in guest context) send an interrupt
3714 * to kick the cpu out of guest context. Next time
3715 * guest context is entered kvmclock will be updated,
3716 * so the guest will not see stale values.
3718 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3723 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3724 .notifier_call
= kvmclock_cpufreq_notifier
3727 static void kvm_timer_init(void)
3731 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3732 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3733 CPUFREQ_TRANSITION_NOTIFIER
);
3734 for_each_online_cpu(cpu
) {
3735 unsigned long khz
= cpufreq_get(cpu
);
3738 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
3741 for_each_possible_cpu(cpu
)
3742 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3746 int kvm_arch_init(void *opaque
)
3749 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3752 printk(KERN_ERR
"kvm: already loaded the other module\n");
3757 if (!ops
->cpu_has_kvm_support()) {
3758 printk(KERN_ERR
"kvm: no hardware support\n");
3762 if (ops
->disabled_by_bios()) {
3763 printk(KERN_ERR
"kvm: disabled by bios\n");
3768 r
= kvm_mmu_module_init();
3772 kvm_init_msr_list();
3775 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3776 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3777 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3778 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3788 void kvm_arch_exit(void)
3790 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3791 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3792 CPUFREQ_TRANSITION_NOTIFIER
);
3794 kvm_mmu_module_exit();
3797 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3799 ++vcpu
->stat
.halt_exits
;
3800 if (irqchip_in_kernel(vcpu
->kvm
)) {
3801 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3804 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3808 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3810 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3813 if (is_long_mode(vcpu
))
3816 return a0
| ((gpa_t
)a1
<< 32);
3819 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
3821 u64 param
, ingpa
, outgpa
, ret
;
3822 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
3823 bool fast
, longmode
;
3827 * hypercall generates UD from non zero cpl and real mode
3830 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
3831 kvm_queue_exception(vcpu
, UD_VECTOR
);
3835 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
3836 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
3839 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
3840 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
3841 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
3842 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
3843 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
3844 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
3846 #ifdef CONFIG_X86_64
3848 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3849 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3850 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
3854 code
= param
& 0xffff;
3855 fast
= (param
>> 16) & 0x1;
3856 rep_cnt
= (param
>> 32) & 0xfff;
3857 rep_idx
= (param
>> 48) & 0xfff;
3859 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
3862 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
3863 kvm_vcpu_on_spin(vcpu
);
3866 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
3870 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
3872 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3874 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
3875 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
3881 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3883 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3886 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
3887 return kvm_hv_hypercall(vcpu
);
3889 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3890 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3891 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3892 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3893 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3895 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3897 if (!is_long_mode(vcpu
)) {
3905 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
3911 case KVM_HC_VAPIC_POLL_IRQ
:
3915 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3922 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3923 ++vcpu
->stat
.hypercalls
;
3926 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3928 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3930 char instruction
[3];
3931 unsigned long rip
= kvm_rip_read(vcpu
);
3934 * Blow out the MMU to ensure that no other VCPU has an active mapping
3935 * to ensure that the updated hypercall appears atomically across all
3938 kvm_mmu_zap_all(vcpu
->kvm
);
3940 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3942 return emulator_write_emulated(rip
, instruction
, 3, vcpu
);
3945 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3947 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3950 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3952 struct descriptor_table dt
= { limit
, base
};
3954 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3957 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3959 struct descriptor_table dt
= { limit
, base
};
3961 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3964 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3965 unsigned long *rflags
)
3967 kvm_lmsw(vcpu
, msw
);
3968 *rflags
= kvm_get_rflags(vcpu
);
3971 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3973 unsigned long value
;
3977 value
= kvm_read_cr0(vcpu
);
3980 value
= vcpu
->arch
.cr2
;
3983 value
= vcpu
->arch
.cr3
;
3986 value
= kvm_read_cr4(vcpu
);
3989 value
= kvm_get_cr8(vcpu
);
3992 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3999 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
4000 unsigned long *rflags
)
4004 kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4005 *rflags
= kvm_get_rflags(vcpu
);
4008 vcpu
->arch
.cr2
= val
;
4011 kvm_set_cr3(vcpu
, val
);
4014 kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4017 kvm_set_cr8(vcpu
, val
& 0xfUL
);
4020 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4024 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
4026 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
4027 int j
, nent
= vcpu
->arch
.cpuid_nent
;
4029 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
4030 /* when no next entry is found, the current entry[i] is reselected */
4031 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
4032 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
4033 if (ej
->function
== e
->function
) {
4034 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
4038 return 0; /* silence gcc, even though control never reaches here */
4041 /* find an entry with matching function, matching index (if needed), and that
4042 * should be read next (if it's stateful) */
4043 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
4044 u32 function
, u32 index
)
4046 if (e
->function
!= function
)
4048 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
4050 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
4051 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
4056 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
4057 u32 function
, u32 index
)
4060 struct kvm_cpuid_entry2
*best
= NULL
;
4062 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
4063 struct kvm_cpuid_entry2
*e
;
4065 e
= &vcpu
->arch
.cpuid_entries
[i
];
4066 if (is_matching_cpuid_entry(e
, function
, index
)) {
4067 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4068 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4073 * Both basic or both extended?
4075 if (((e
->function
^ function
) & 0x80000000) == 0)
4076 if (!best
|| e
->function
> best
->function
)
4081 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4083 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4085 struct kvm_cpuid_entry2
*best
;
4087 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4089 return best
->eax
& 0xff;
4093 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
4095 u32 function
, index
;
4096 struct kvm_cpuid_entry2
*best
;
4098 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4099 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4100 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
4101 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
4102 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
4103 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
4104 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
4106 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
4107 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
4108 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
4109 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
4111 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4112 trace_kvm_cpuid(function
,
4113 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
4114 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
4115 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
4116 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
4118 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
4121 * Check if userspace requested an interrupt window, and that the
4122 * interrupt window is open.
4124 * No need to exit to userspace if we already have an interrupt queued.
4126 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
4128 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
4129 vcpu
->run
->request_interrupt_window
&&
4130 kvm_arch_interrupt_allowed(vcpu
));
4133 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
4135 struct kvm_run
*kvm_run
= vcpu
->run
;
4137 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
4138 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
4139 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
4140 if (irqchip_in_kernel(vcpu
->kvm
))
4141 kvm_run
->ready_for_interrupt_injection
= 1;
4143 kvm_run
->ready_for_interrupt_injection
=
4144 kvm_arch_interrupt_allowed(vcpu
) &&
4145 !kvm_cpu_has_interrupt(vcpu
) &&
4146 !kvm_event_needs_reinjection(vcpu
);
4149 static void vapic_enter(struct kvm_vcpu
*vcpu
)
4151 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4154 if (!apic
|| !apic
->vapic_addr
)
4157 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4159 vcpu
->arch
.apic
->vapic_page
= page
;
4162 static void vapic_exit(struct kvm_vcpu
*vcpu
)
4164 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4167 if (!apic
|| !apic
->vapic_addr
)
4170 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4171 kvm_release_page_dirty(apic
->vapic_page
);
4172 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4173 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4176 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
4180 if (!kvm_x86_ops
->update_cr8_intercept
)
4183 if (!vcpu
->arch
.apic
)
4186 if (!vcpu
->arch
.apic
->vapic_addr
)
4187 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
4194 tpr
= kvm_lapic_get_cr8(vcpu
);
4196 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
4199 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
4201 /* try to reinject previous events if any */
4202 if (vcpu
->arch
.exception
.pending
) {
4203 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
4204 vcpu
->arch
.exception
.has_error_code
,
4205 vcpu
->arch
.exception
.error_code
);
4209 if (vcpu
->arch
.nmi_injected
) {
4210 kvm_x86_ops
->set_nmi(vcpu
);
4214 if (vcpu
->arch
.interrupt
.pending
) {
4215 kvm_x86_ops
->set_irq(vcpu
);
4219 /* try to inject new event if pending */
4220 if (vcpu
->arch
.nmi_pending
) {
4221 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
4222 vcpu
->arch
.nmi_pending
= false;
4223 vcpu
->arch
.nmi_injected
= true;
4224 kvm_x86_ops
->set_nmi(vcpu
);
4226 } else if (kvm_cpu_has_interrupt(vcpu
)) {
4227 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
4228 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
4230 kvm_x86_ops
->set_irq(vcpu
);
4235 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
4238 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
4239 vcpu
->run
->request_interrupt_window
;
4242 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
4243 kvm_mmu_unload(vcpu
);
4245 r
= kvm_mmu_reload(vcpu
);
4249 if (vcpu
->requests
) {
4250 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
4251 __kvm_migrate_timers(vcpu
);
4252 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
4253 kvm_write_guest_time(vcpu
);
4254 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
4255 kvm_mmu_sync_roots(vcpu
);
4256 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
4257 kvm_x86_ops
->tlb_flush(vcpu
);
4258 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
4260 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
4264 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
4265 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
4269 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU
, &vcpu
->requests
)) {
4270 vcpu
->fpu_active
= 0;
4271 kvm_x86_ops
->fpu_deactivate(vcpu
);
4277 kvm_x86_ops
->prepare_guest_switch(vcpu
);
4278 if (vcpu
->fpu_active
)
4279 kvm_load_guest_fpu(vcpu
);
4281 local_irq_disable();
4283 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4284 smp_mb__after_clear_bit();
4286 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
4287 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4294 inject_pending_event(vcpu
);
4296 /* enable NMI/IRQ window open exits if needed */
4297 if (vcpu
->arch
.nmi_pending
)
4298 kvm_x86_ops
->enable_nmi_window(vcpu
);
4299 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
4300 kvm_x86_ops
->enable_irq_window(vcpu
);
4302 if (kvm_lapic_enabled(vcpu
)) {
4303 update_cr8_intercept(vcpu
);
4304 kvm_lapic_sync_to_vapic(vcpu
);
4307 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
4311 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
4313 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
4314 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
4315 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
4316 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
4319 trace_kvm_entry(vcpu
->vcpu_id
);
4320 kvm_x86_ops
->run(vcpu
);
4323 * If the guest has used debug registers, at least dr7
4324 * will be disabled while returning to the host.
4325 * If we don't have active breakpoints in the host, we don't
4326 * care about the messed up debug address registers. But if
4327 * we have some of them active, restore the old state.
4329 if (hw_breakpoint_active())
4330 hw_breakpoint_restore();
4332 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4338 * We must have an instruction between local_irq_enable() and
4339 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4340 * the interrupt shadow. The stat.exits increment will do nicely.
4341 * But we need to prevent reordering, hence this barrier():
4349 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4352 * Profile KVM exit RIPs:
4354 if (unlikely(prof_on
== KVM_PROFILING
)) {
4355 unsigned long rip
= kvm_rip_read(vcpu
);
4356 profile_hit(KVM_PROFILING
, (void *)rip
);
4360 kvm_lapic_sync_from_vapic(vcpu
);
4362 r
= kvm_x86_ops
->handle_exit(vcpu
);
4368 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
4371 struct kvm
*kvm
= vcpu
->kvm
;
4373 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
4374 pr_debug("vcpu %d received sipi with vector # %x\n",
4375 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
4376 kvm_lapic_reset(vcpu
);
4377 r
= kvm_arch_vcpu_reset(vcpu
);
4380 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4383 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4388 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
4389 r
= vcpu_enter_guest(vcpu
);
4391 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4392 kvm_vcpu_block(vcpu
);
4393 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4394 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
4396 switch(vcpu
->arch
.mp_state
) {
4397 case KVM_MP_STATE_HALTED
:
4398 vcpu
->arch
.mp_state
=
4399 KVM_MP_STATE_RUNNABLE
;
4400 case KVM_MP_STATE_RUNNABLE
:
4402 case KVM_MP_STATE_SIPI_RECEIVED
:
4413 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
4414 if (kvm_cpu_has_pending_timer(vcpu
))
4415 kvm_inject_pending_timer_irqs(vcpu
);
4417 if (dm_request_for_irq_injection(vcpu
)) {
4419 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4420 ++vcpu
->stat
.request_irq_exits
;
4422 if (signal_pending(current
)) {
4424 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4425 ++vcpu
->stat
.signal_exits
;
4427 if (need_resched()) {
4428 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4430 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4434 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4435 post_kvm_run_save(vcpu
);
4442 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
4449 if (vcpu
->sigset_active
)
4450 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
4452 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
4453 kvm_vcpu_block(vcpu
);
4454 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
4459 /* re-sync apic's tpr */
4460 if (!irqchip_in_kernel(vcpu
->kvm
))
4461 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
4463 if (vcpu
->arch
.pio
.cur_count
) {
4464 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4465 r
= complete_pio(vcpu
);
4466 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
4470 if (vcpu
->mmio_needed
) {
4471 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
4472 vcpu
->mmio_read_completed
= 1;
4473 vcpu
->mmio_needed
= 0;
4475 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4476 r
= emulate_instruction(vcpu
, vcpu
->arch
.mmio_fault_cr2
, 0,
4477 EMULTYPE_NO_DECODE
);
4478 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
4479 if (r
== EMULATE_DO_MMIO
) {
4481 * Read-modify-write. Back to userspace.
4487 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
4488 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
4489 kvm_run
->hypercall
.ret
);
4491 r
= __vcpu_run(vcpu
);
4494 if (vcpu
->sigset_active
)
4495 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
4501 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4505 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4506 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4507 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4508 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4509 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4510 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4511 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4512 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4513 #ifdef CONFIG_X86_64
4514 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4515 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
4516 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
4517 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
4518 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
4519 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
4520 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
4521 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
4524 regs
->rip
= kvm_rip_read(vcpu
);
4525 regs
->rflags
= kvm_get_rflags(vcpu
);
4532 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4536 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
4537 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
4538 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
4539 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
4540 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
4541 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
4542 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
4543 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
4544 #ifdef CONFIG_X86_64
4545 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
4546 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
4547 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
4548 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
4549 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
4550 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
4551 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
4552 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
4555 kvm_rip_write(vcpu
, regs
->rip
);
4556 kvm_set_rflags(vcpu
, regs
->rflags
);
4558 vcpu
->arch
.exception
.pending
= false;
4565 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4566 struct kvm_segment
*var
, int seg
)
4568 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4571 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
4573 struct kvm_segment cs
;
4575 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
4579 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
4581 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
4582 struct kvm_sregs
*sregs
)
4584 struct descriptor_table dt
;
4588 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4589 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4590 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4591 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4592 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4593 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4595 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4596 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4598 kvm_x86_ops
->get_idt(vcpu
, &dt
);
4599 sregs
->idt
.limit
= dt
.limit
;
4600 sregs
->idt
.base
= dt
.base
;
4601 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
4602 sregs
->gdt
.limit
= dt
.limit
;
4603 sregs
->gdt
.base
= dt
.base
;
4605 sregs
->cr0
= kvm_read_cr0(vcpu
);
4606 sregs
->cr2
= vcpu
->arch
.cr2
;
4607 sregs
->cr3
= vcpu
->arch
.cr3
;
4608 sregs
->cr4
= kvm_read_cr4(vcpu
);
4609 sregs
->cr8
= kvm_get_cr8(vcpu
);
4610 sregs
->efer
= vcpu
->arch
.efer
;
4611 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
4613 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
4615 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
4616 set_bit(vcpu
->arch
.interrupt
.nr
,
4617 (unsigned long *)sregs
->interrupt_bitmap
);
4624 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
4625 struct kvm_mp_state
*mp_state
)
4628 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
4633 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
4634 struct kvm_mp_state
*mp_state
)
4637 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
4642 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4643 struct kvm_segment
*var
, int seg
)
4645 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4648 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
4649 struct kvm_segment
*kvm_desct
)
4651 kvm_desct
->base
= get_desc_base(seg_desc
);
4652 kvm_desct
->limit
= get_desc_limit(seg_desc
);
4654 kvm_desct
->limit
<<= 12;
4655 kvm_desct
->limit
|= 0xfff;
4657 kvm_desct
->selector
= selector
;
4658 kvm_desct
->type
= seg_desc
->type
;
4659 kvm_desct
->present
= seg_desc
->p
;
4660 kvm_desct
->dpl
= seg_desc
->dpl
;
4661 kvm_desct
->db
= seg_desc
->d
;
4662 kvm_desct
->s
= seg_desc
->s
;
4663 kvm_desct
->l
= seg_desc
->l
;
4664 kvm_desct
->g
= seg_desc
->g
;
4665 kvm_desct
->avl
= seg_desc
->avl
;
4667 kvm_desct
->unusable
= 1;
4669 kvm_desct
->unusable
= 0;
4670 kvm_desct
->padding
= 0;
4673 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
4675 struct descriptor_table
*dtable
)
4677 if (selector
& 1 << 2) {
4678 struct kvm_segment kvm_seg
;
4680 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
4682 if (kvm_seg
.unusable
)
4685 dtable
->limit
= kvm_seg
.limit
;
4686 dtable
->base
= kvm_seg
.base
;
4689 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
4692 /* allowed just for 8 bytes segments */
4693 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4694 struct desc_struct
*seg_desc
)
4696 struct descriptor_table dtable
;
4697 u16 index
= selector
>> 3;
4702 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4704 if (dtable
.limit
< index
* 8 + 7) {
4705 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4706 return X86EMUL_PROPAGATE_FAULT
;
4708 addr
= dtable
.base
+ index
* 8;
4709 ret
= kvm_read_guest_virt_system(addr
, seg_desc
, sizeof(*seg_desc
),
4711 if (ret
== X86EMUL_PROPAGATE_FAULT
)
4712 kvm_inject_page_fault(vcpu
, addr
, err
);
4717 /* allowed just for 8 bytes segments */
4718 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4719 struct desc_struct
*seg_desc
)
4721 struct descriptor_table dtable
;
4722 u16 index
= selector
>> 3;
4724 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4726 if (dtable
.limit
< index
* 8 + 7)
4728 return kvm_write_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
, NULL
);
4731 static gpa_t
get_tss_base_addr_write(struct kvm_vcpu
*vcpu
,
4732 struct desc_struct
*seg_desc
)
4734 u32 base_addr
= get_desc_base(seg_desc
);
4736 return kvm_mmu_gva_to_gpa_write(vcpu
, base_addr
, NULL
);
4739 static gpa_t
get_tss_base_addr_read(struct kvm_vcpu
*vcpu
,
4740 struct desc_struct
*seg_desc
)
4742 u32 base_addr
= get_desc_base(seg_desc
);
4744 return kvm_mmu_gva_to_gpa_read(vcpu
, base_addr
, NULL
);
4747 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4749 struct kvm_segment kvm_seg
;
4751 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4752 return kvm_seg
.selector
;
4755 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4757 struct kvm_segment segvar
= {
4758 .base
= selector
<< 4,
4760 .selector
= selector
,
4771 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4772 return X86EMUL_CONTINUE
;
4775 static int is_vm86_segment(struct kvm_vcpu
*vcpu
, int seg
)
4777 return (seg
!= VCPU_SREG_LDTR
) &&
4778 (seg
!= VCPU_SREG_TR
) &&
4779 (kvm_get_rflags(vcpu
) & X86_EFLAGS_VM
);
4782 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4784 struct kvm_segment kvm_seg
;
4785 struct desc_struct seg_desc
;
4787 unsigned err_vec
= GP_VECTOR
;
4789 bool null_selector
= !(selector
& ~0x3); /* 0000-0003 are null */
4792 if (is_vm86_segment(vcpu
, seg
) || !is_protmode(vcpu
))
4793 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4795 /* NULL selector is not valid for TR, CS and SS */
4796 if ((seg
== VCPU_SREG_CS
|| seg
== VCPU_SREG_SS
|| seg
== VCPU_SREG_TR
)
4800 /* TR should be in GDT only */
4801 if (seg
== VCPU_SREG_TR
&& (selector
& (1 << 2)))
4804 ret
= load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
);
4808 seg_desct_to_kvm_desct(&seg_desc
, selector
, &kvm_seg
);
4810 if (null_selector
) { /* for NULL selector skip all following checks */
4811 kvm_seg
.unusable
= 1;
4815 err_code
= selector
& 0xfffc;
4816 err_vec
= GP_VECTOR
;
4818 /* can't load system descriptor into segment selecor */
4819 if (seg
<= VCPU_SREG_GS
&& !kvm_seg
.s
)
4822 if (!kvm_seg
.present
) {
4823 err_vec
= (seg
== VCPU_SREG_SS
) ? SS_VECTOR
: NP_VECTOR
;
4829 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4834 * segment is not a writable data segment or segment
4835 * selector's RPL != CPL or segment selector's RPL != CPL
4837 if (rpl
!= cpl
|| (kvm_seg
.type
& 0xa) != 0x2 || dpl
!= cpl
)
4841 if (!(kvm_seg
.type
& 8))
4844 if (kvm_seg
.type
& 4) {
4850 if (rpl
> cpl
|| dpl
!= cpl
)
4853 /* CS(RPL) <- CPL */
4854 selector
= (selector
& 0xfffc) | cpl
;
4857 if (kvm_seg
.s
|| (kvm_seg
.type
!= 1 && kvm_seg
.type
!= 9))
4860 case VCPU_SREG_LDTR
:
4861 if (kvm_seg
.s
|| kvm_seg
.type
!= 2)
4864 default: /* DS, ES, FS, or GS */
4866 * segment is not a data or readable code segment or
4867 * ((segment is a data or nonconforming code segment)
4868 * and (both RPL and CPL > DPL))
4870 if ((kvm_seg
.type
& 0xa) == 0x8 ||
4871 (((kvm_seg
.type
& 0xc) != 0xc) && (rpl
> dpl
&& cpl
> dpl
)))
4876 if (!kvm_seg
.unusable
&& kvm_seg
.s
) {
4877 /* mark segment as accessed */
4880 save_guest_segment_descriptor(vcpu
, selector
, &seg_desc
);
4883 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4884 return X86EMUL_CONTINUE
;
4886 kvm_queue_exception_e(vcpu
, err_vec
, err_code
);
4887 return X86EMUL_PROPAGATE_FAULT
;
4890 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4891 struct tss_segment_32
*tss
)
4893 tss
->cr3
= vcpu
->arch
.cr3
;
4894 tss
->eip
= kvm_rip_read(vcpu
);
4895 tss
->eflags
= kvm_get_rflags(vcpu
);
4896 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4897 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4898 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4899 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4900 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4901 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4902 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4903 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4904 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4905 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4906 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4907 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4908 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4909 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4910 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4913 static void kvm_load_segment_selector(struct kvm_vcpu
*vcpu
, u16 sel
, int seg
)
4915 struct kvm_segment kvm_seg
;
4916 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4917 kvm_seg
.selector
= sel
;
4918 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4921 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4922 struct tss_segment_32
*tss
)
4924 kvm_set_cr3(vcpu
, tss
->cr3
);
4926 kvm_rip_write(vcpu
, tss
->eip
);
4927 kvm_set_rflags(vcpu
, tss
->eflags
| 2);
4929 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4930 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4931 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4932 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4933 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4934 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4935 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4936 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4939 * SDM says that segment selectors are loaded before segment
4942 kvm_load_segment_selector(vcpu
, tss
->ldt_selector
, VCPU_SREG_LDTR
);
4943 kvm_load_segment_selector(vcpu
, tss
->es
, VCPU_SREG_ES
);
4944 kvm_load_segment_selector(vcpu
, tss
->cs
, VCPU_SREG_CS
);
4945 kvm_load_segment_selector(vcpu
, tss
->ss
, VCPU_SREG_SS
);
4946 kvm_load_segment_selector(vcpu
, tss
->ds
, VCPU_SREG_DS
);
4947 kvm_load_segment_selector(vcpu
, tss
->fs
, VCPU_SREG_FS
);
4948 kvm_load_segment_selector(vcpu
, tss
->gs
, VCPU_SREG_GS
);
4951 * Now load segment descriptors. If fault happenes at this stage
4952 * it is handled in a context of new task
4954 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, VCPU_SREG_LDTR
))
4957 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, VCPU_SREG_ES
))
4960 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, VCPU_SREG_CS
))
4963 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, VCPU_SREG_SS
))
4966 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, VCPU_SREG_DS
))
4969 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, VCPU_SREG_FS
))
4972 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, VCPU_SREG_GS
))
4977 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4978 struct tss_segment_16
*tss
)
4980 tss
->ip
= kvm_rip_read(vcpu
);
4981 tss
->flag
= kvm_get_rflags(vcpu
);
4982 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4983 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4984 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4985 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4986 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4987 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4988 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4989 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4991 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4992 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4993 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4994 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4995 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4998 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4999 struct tss_segment_16
*tss
)
5001 kvm_rip_write(vcpu
, tss
->ip
);
5002 kvm_set_rflags(vcpu
, tss
->flag
| 2);
5003 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
5004 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
5005 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
5006 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
5007 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
5008 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
5009 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
5010 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
5013 * SDM says that segment selectors are loaded before segment
5016 kvm_load_segment_selector(vcpu
, tss
->ldt
, VCPU_SREG_LDTR
);
5017 kvm_load_segment_selector(vcpu
, tss
->es
, VCPU_SREG_ES
);
5018 kvm_load_segment_selector(vcpu
, tss
->cs
, VCPU_SREG_CS
);
5019 kvm_load_segment_selector(vcpu
, tss
->ss
, VCPU_SREG_SS
);
5020 kvm_load_segment_selector(vcpu
, tss
->ds
, VCPU_SREG_DS
);
5023 * Now load segment descriptors. If fault happenes at this stage
5024 * it is handled in a context of new task
5026 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, VCPU_SREG_LDTR
))
5029 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, VCPU_SREG_ES
))
5032 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, VCPU_SREG_CS
))
5035 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, VCPU_SREG_SS
))
5038 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, VCPU_SREG_DS
))
5043 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
5044 u16 old_tss_sel
, u32 old_tss_base
,
5045 struct desc_struct
*nseg_desc
)
5047 struct tss_segment_16 tss_segment_16
;
5050 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
5051 sizeof tss_segment_16
))
5054 save_state_to_tss16(vcpu
, &tss_segment_16
);
5056 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
5057 sizeof tss_segment_16
))
5060 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr_read(vcpu
, nseg_desc
),
5061 &tss_segment_16
, sizeof tss_segment_16
))
5064 if (old_tss_sel
!= 0xffff) {
5065 tss_segment_16
.prev_task_link
= old_tss_sel
;
5067 if (kvm_write_guest(vcpu
->kvm
,
5068 get_tss_base_addr_write(vcpu
, nseg_desc
),
5069 &tss_segment_16
.prev_task_link
,
5070 sizeof tss_segment_16
.prev_task_link
))
5074 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
5082 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
5083 u16 old_tss_sel
, u32 old_tss_base
,
5084 struct desc_struct
*nseg_desc
)
5086 struct tss_segment_32 tss_segment_32
;
5089 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
5090 sizeof tss_segment_32
))
5093 save_state_to_tss32(vcpu
, &tss_segment_32
);
5095 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
5096 sizeof tss_segment_32
))
5099 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr_read(vcpu
, nseg_desc
),
5100 &tss_segment_32
, sizeof tss_segment_32
))
5103 if (old_tss_sel
!= 0xffff) {
5104 tss_segment_32
.prev_task_link
= old_tss_sel
;
5106 if (kvm_write_guest(vcpu
->kvm
,
5107 get_tss_base_addr_write(vcpu
, nseg_desc
),
5108 &tss_segment_32
.prev_task_link
,
5109 sizeof tss_segment_32
.prev_task_link
))
5113 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
5121 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
5123 struct kvm_segment tr_seg
;
5124 struct desc_struct cseg_desc
;
5125 struct desc_struct nseg_desc
;
5127 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
5128 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
5131 old_tss_base
= kvm_mmu_gva_to_gpa_write(vcpu
, old_tss_base
, NULL
);
5133 /* FIXME: Handle errors. Failure to read either TSS or their
5134 * descriptors should generate a pagefault.
5136 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
5139 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
5142 if (reason
!= TASK_SWITCH_IRET
) {
5145 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
5146 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
5147 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
5152 desc_limit
= get_desc_limit(&nseg_desc
);
5154 ((desc_limit
< 0x67 && (nseg_desc
.type
& 8)) ||
5155 desc_limit
< 0x2b)) {
5156 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
5160 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
5161 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
5162 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
5165 if (reason
== TASK_SWITCH_IRET
) {
5166 u32 eflags
= kvm_get_rflags(vcpu
);
5167 kvm_set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
5170 /* set back link to prev task only if NT bit is set in eflags
5171 note that old_tss_sel is not used afetr this point */
5172 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
5173 old_tss_sel
= 0xffff;
5175 if (nseg_desc
.type
& 8)
5176 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
5177 old_tss_base
, &nseg_desc
);
5179 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
5180 old_tss_base
, &nseg_desc
);
5182 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
5183 u32 eflags
= kvm_get_rflags(vcpu
);
5184 kvm_set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
5187 if (reason
!= TASK_SWITCH_IRET
) {
5188 nseg_desc
.type
|= (1 << 1);
5189 save_guest_segment_descriptor(vcpu
, tss_selector
,
5193 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0(vcpu
) | X86_CR0_TS
);
5194 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
5196 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
5200 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5202 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5203 struct kvm_sregs
*sregs
)
5205 int mmu_reset_needed
= 0;
5206 int pending_vec
, max_bits
;
5207 struct descriptor_table dt
;
5211 dt
.limit
= sregs
->idt
.limit
;
5212 dt
.base
= sregs
->idt
.base
;
5213 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5214 dt
.limit
= sregs
->gdt
.limit
;
5215 dt
.base
= sregs
->gdt
.base
;
5216 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5218 vcpu
->arch
.cr2
= sregs
->cr2
;
5219 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
5220 vcpu
->arch
.cr3
= sregs
->cr3
;
5222 kvm_set_cr8(vcpu
, sregs
->cr8
);
5224 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5225 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5226 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5228 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5229 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5230 vcpu
->arch
.cr0
= sregs
->cr0
;
5232 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5233 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5234 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5235 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
5236 mmu_reset_needed
= 1;
5239 if (mmu_reset_needed
)
5240 kvm_mmu_reset_context(vcpu
);
5242 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5243 pending_vec
= find_first_bit(
5244 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5245 if (pending_vec
< max_bits
) {
5246 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5247 pr_debug("Set back pending irq %d\n", pending_vec
);
5248 if (irqchip_in_kernel(vcpu
->kvm
))
5249 kvm_pic_clear_isr_ack(vcpu
->kvm
);
5252 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5253 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5254 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5255 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5256 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5257 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5259 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5260 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5262 update_cr8_intercept(vcpu
);
5264 /* Older userspace won't unhalt the vcpu on reset. */
5265 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5266 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5268 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5275 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5276 struct kvm_guest_debug
*dbg
)
5278 unsigned long rflags
;
5283 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5285 if (vcpu
->arch
.exception
.pending
)
5287 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5288 kvm_queue_exception(vcpu
, DB_VECTOR
);
5290 kvm_queue_exception(vcpu
, BP_VECTOR
);
5294 * Read rflags as long as potentially injected trace flags are still
5297 rflags
= kvm_get_rflags(vcpu
);
5299 vcpu
->guest_debug
= dbg
->control
;
5300 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5301 vcpu
->guest_debug
= 0;
5303 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5304 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5305 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5306 vcpu
->arch
.switch_db_regs
=
5307 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5309 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5310 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5311 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5314 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5315 vcpu
->arch
.singlestep_cs
=
5316 get_segment_selector(vcpu
, VCPU_SREG_CS
);
5317 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
);
5321 * Trigger an rflags update that will inject or remove the trace
5324 kvm_set_rflags(vcpu
, rflags
);
5326 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5337 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5338 * we have asm/x86/processor.h
5349 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5350 #ifdef CONFIG_X86_64
5351 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5353 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5358 * Translate a guest virtual address to a guest physical address.
5360 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5361 struct kvm_translation
*tr
)
5363 unsigned long vaddr
= tr
->linear_address
;
5368 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5369 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5370 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5371 tr
->physical_address
= gpa
;
5372 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5380 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5382 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
5386 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5387 fpu
->fcw
= fxsave
->cwd
;
5388 fpu
->fsw
= fxsave
->swd
;
5389 fpu
->ftwx
= fxsave
->twd
;
5390 fpu
->last_opcode
= fxsave
->fop
;
5391 fpu
->last_ip
= fxsave
->rip
;
5392 fpu
->last_dp
= fxsave
->rdp
;
5393 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5400 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5402 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
5406 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5407 fxsave
->cwd
= fpu
->fcw
;
5408 fxsave
->swd
= fpu
->fsw
;
5409 fxsave
->twd
= fpu
->ftwx
;
5410 fxsave
->fop
= fpu
->last_opcode
;
5411 fxsave
->rip
= fpu
->last_ip
;
5412 fxsave
->rdp
= fpu
->last_dp
;
5413 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5420 void fx_init(struct kvm_vcpu
*vcpu
)
5422 unsigned after_mxcsr_mask
;
5425 * Touch the fpu the first time in non atomic context as if
5426 * this is the first fpu instruction the exception handler
5427 * will fire before the instruction returns and it'll have to
5428 * allocate ram with GFP_KERNEL.
5431 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5433 /* Initialize guest FPU by resetting ours and saving into guest's */
5435 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5437 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
5438 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
5441 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5442 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
5443 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
5444 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
5445 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
5447 EXPORT_SYMBOL_GPL(fx_init
);
5449 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5451 if (vcpu
->guest_fpu_loaded
)
5454 vcpu
->guest_fpu_loaded
= 1;
5455 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5456 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
5460 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5462 if (!vcpu
->guest_fpu_loaded
)
5465 vcpu
->guest_fpu_loaded
= 0;
5466 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
5467 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
5468 ++vcpu
->stat
.fpu_reload
;
5469 set_bit(KVM_REQ_DEACTIVATE_FPU
, &vcpu
->requests
);
5473 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5475 if (vcpu
->arch
.time_page
) {
5476 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5477 vcpu
->arch
.time_page
= NULL
;
5480 kvm_x86_ops
->vcpu_free(vcpu
);
5483 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5486 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5489 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5493 /* We do fxsave: this must be aligned. */
5494 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
5496 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5498 r
= kvm_arch_vcpu_reset(vcpu
);
5500 r
= kvm_mmu_setup(vcpu
);
5507 kvm_x86_ops
->vcpu_free(vcpu
);
5511 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5514 kvm_mmu_unload(vcpu
);
5517 kvm_x86_ops
->vcpu_free(vcpu
);
5520 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5522 vcpu
->arch
.nmi_pending
= false;
5523 vcpu
->arch
.nmi_injected
= false;
5525 vcpu
->arch
.switch_db_regs
= 0;
5526 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5527 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5528 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5530 return kvm_x86_ops
->vcpu_reset(vcpu
);
5533 int kvm_arch_hardware_enable(void *garbage
)
5536 * Since this may be called from a hotplug notifcation,
5537 * we can't get the CPU frequency directly.
5539 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5540 int cpu
= raw_smp_processor_id();
5541 per_cpu(cpu_tsc_khz
, cpu
) = 0;
5544 kvm_shared_msr_cpu_online();
5546 return kvm_x86_ops
->hardware_enable(garbage
);
5549 void kvm_arch_hardware_disable(void *garbage
)
5551 kvm_x86_ops
->hardware_disable(garbage
);
5552 drop_user_return_notifiers(garbage
);
5555 int kvm_arch_hardware_setup(void)
5557 return kvm_x86_ops
->hardware_setup();
5560 void kvm_arch_hardware_unsetup(void)
5562 kvm_x86_ops
->hardware_unsetup();
5565 void kvm_arch_check_processor_compat(void *rtn
)
5567 kvm_x86_ops
->check_processor_compatibility(rtn
);
5570 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5576 BUG_ON(vcpu
->kvm
== NULL
);
5579 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5580 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5581 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5583 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5585 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5590 vcpu
->arch
.pio_data
= page_address(page
);
5592 r
= kvm_mmu_create(vcpu
);
5594 goto fail_free_pio_data
;
5596 if (irqchip_in_kernel(kvm
)) {
5597 r
= kvm_create_lapic(vcpu
);
5599 goto fail_mmu_destroy
;
5602 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5604 if (!vcpu
->arch
.mce_banks
) {
5606 goto fail_free_lapic
;
5608 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5612 kvm_free_lapic(vcpu
);
5614 kvm_mmu_destroy(vcpu
);
5616 free_page((unsigned long)vcpu
->arch
.pio_data
);
5621 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5625 kfree(vcpu
->arch
.mce_banks
);
5626 kvm_free_lapic(vcpu
);
5627 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5628 kvm_mmu_destroy(vcpu
);
5629 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5630 free_page((unsigned long)vcpu
->arch
.pio_data
);
5633 struct kvm
*kvm_arch_create_vm(void)
5635 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
5638 return ERR_PTR(-ENOMEM
);
5640 kvm
->arch
.aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
5641 if (!kvm
->arch
.aliases
) {
5643 return ERR_PTR(-ENOMEM
);
5646 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5647 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5649 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5650 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5652 rdtscll(kvm
->arch
.vm_init_tsc
);
5657 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5660 kvm_mmu_unload(vcpu
);
5664 static void kvm_free_vcpus(struct kvm
*kvm
)
5667 struct kvm_vcpu
*vcpu
;
5670 * Unpin any mmu pages first.
5672 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5673 kvm_unload_vcpu_mmu(vcpu
);
5674 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5675 kvm_arch_vcpu_free(vcpu
);
5677 mutex_lock(&kvm
->lock
);
5678 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5679 kvm
->vcpus
[i
] = NULL
;
5681 atomic_set(&kvm
->online_vcpus
, 0);
5682 mutex_unlock(&kvm
->lock
);
5685 void kvm_arch_sync_events(struct kvm
*kvm
)
5687 kvm_free_all_assigned_devices(kvm
);
5690 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5692 kvm_iommu_unmap_guest(kvm
);
5694 kfree(kvm
->arch
.vpic
);
5695 kfree(kvm
->arch
.vioapic
);
5696 kvm_free_vcpus(kvm
);
5697 kvm_free_physmem(kvm
);
5698 if (kvm
->arch
.apic_access_page
)
5699 put_page(kvm
->arch
.apic_access_page
);
5700 if (kvm
->arch
.ept_identity_pagetable
)
5701 put_page(kvm
->arch
.ept_identity_pagetable
);
5702 cleanup_srcu_struct(&kvm
->srcu
);
5703 kfree(kvm
->arch
.aliases
);
5707 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
5708 struct kvm_memory_slot
*memslot
,
5709 struct kvm_memory_slot old
,
5710 struct kvm_userspace_memory_region
*mem
,
5713 int npages
= memslot
->npages
;
5715 /*To keep backward compatibility with older userspace,
5716 *x86 needs to hanlde !user_alloc case.
5719 if (npages
&& !old
.rmap
) {
5720 unsigned long userspace_addr
;
5722 down_write(¤t
->mm
->mmap_sem
);
5723 userspace_addr
= do_mmap(NULL
, 0,
5725 PROT_READ
| PROT_WRITE
,
5726 MAP_PRIVATE
| MAP_ANONYMOUS
,
5728 up_write(¤t
->mm
->mmap_sem
);
5730 if (IS_ERR((void *)userspace_addr
))
5731 return PTR_ERR((void *)userspace_addr
);
5733 memslot
->userspace_addr
= userspace_addr
;
5741 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
5742 struct kvm_userspace_memory_region
*mem
,
5743 struct kvm_memory_slot old
,
5747 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
5749 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
5752 down_write(¤t
->mm
->mmap_sem
);
5753 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
5754 old
.npages
* PAGE_SIZE
);
5755 up_write(¤t
->mm
->mmap_sem
);
5758 "kvm_vm_ioctl_set_memory_region: "
5759 "failed to munmap memory\n");
5762 spin_lock(&kvm
->mmu_lock
);
5763 if (!kvm
->arch
.n_requested_mmu_pages
) {
5764 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
5765 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
5768 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
5769 spin_unlock(&kvm
->mmu_lock
);
5772 void kvm_arch_flush_shadow(struct kvm
*kvm
)
5774 kvm_mmu_zap_all(kvm
);
5775 kvm_reload_remote_mmus(kvm
);
5778 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
5780 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
5781 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
5782 || vcpu
->arch
.nmi_pending
||
5783 (kvm_arch_interrupt_allowed(vcpu
) &&
5784 kvm_cpu_has_interrupt(vcpu
));
5787 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
5790 int cpu
= vcpu
->cpu
;
5792 if (waitqueue_active(&vcpu
->wq
)) {
5793 wake_up_interruptible(&vcpu
->wq
);
5794 ++vcpu
->stat
.halt_wakeup
;
5798 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
5799 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
5800 smp_send_reschedule(cpu
);
5804 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
5806 return kvm_x86_ops
->interrupt_allowed(vcpu
);
5809 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
5811 unsigned long rflags
;
5813 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5814 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5815 rflags
&= ~(unsigned long)(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
5818 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
5820 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
5822 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
5823 vcpu
->arch
.singlestep_cs
==
5824 get_segment_selector(vcpu
, VCPU_SREG_CS
) &&
5825 vcpu
->arch
.singlestep_rip
== kvm_rip_read(vcpu
))
5826 rflags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
5827 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
5829 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
5831 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
5832 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
5833 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
5834 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
5835 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
5836 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
5837 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
5838 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
5839 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
5840 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
5841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);