1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/sched/isolation.h>
58 #include <linux/mem_encrypt.h>
59 #include <linux/entry-kvm.h>
61 #include <trace/events/kvm.h>
63 #include <asm/debugreg.h>
67 #include <linux/kernel_stat.h>
68 #include <asm/fpu/internal.h> /* Ugh! */
69 #include <asm/pvclock.h>
70 #include <asm/div64.h>
71 #include <asm/irq_remapping.h>
72 #include <asm/mshyperv.h>
73 #include <asm/hypervisor.h>
74 #include <asm/tlbflush.h>
75 #include <asm/intel_pt.h>
76 #include <asm/emulate_prefix.h>
77 #include <clocksource/hyperv_timer.h>
79 #define CREATE_TRACE_POINTS
82 #define MAX_IO_MSRS 256
83 #define KVM_MAX_MCE_BANKS 32
84 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
87 #define emul_to_vcpu(ctxt) \
88 ((struct kvm_vcpu *)(ctxt)->vcpu)
91 * - enable syscall per default because its emulated by KVM
92 * - enable LME and LMA per default on 64 bit KVM
96 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
98 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
101 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
104 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
106 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
107 static void process_nmi(struct kvm_vcpu
*vcpu
);
108 static void process_smi(struct kvm_vcpu
*vcpu
);
109 static void enter_smm(struct kvm_vcpu
*vcpu
);
110 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
111 static void store_regs(struct kvm_vcpu
*vcpu
);
112 static int sync_regs(struct kvm_vcpu
*vcpu
);
114 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
115 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
117 static bool __read_mostly ignore_msrs
= 0;
118 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
120 bool __read_mostly report_ignored_msrs
= true;
121 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
122 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
124 unsigned int min_timer_period_us
= 200;
125 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
127 static bool __read_mostly kvmclock_periodic_sync
= true;
128 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
130 bool __read_mostly kvm_has_tsc_control
;
131 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
132 u32 __read_mostly kvm_max_guest_tsc_khz
;
133 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
134 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
135 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
136 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
137 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
138 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
139 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
140 bool __read_mostly kvm_has_bus_lock_exit
;
141 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit
);
143 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
144 static u32 __read_mostly tsc_tolerance_ppm
= 250;
145 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
148 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
149 * adaptive tuning starting from default advancment of 1000ns. '0' disables
150 * advancement entirely. Any other value is used as-is and disables adaptive
151 * tuning, i.e. allows priveleged userspace to set an exact advancement time.
153 static int __read_mostly lapic_timer_advance_ns
= -1;
154 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
156 static bool __read_mostly vector_hashing
= true;
157 module_param(vector_hashing
, bool, S_IRUGO
);
159 bool __read_mostly enable_vmware_backdoor
= false;
160 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
161 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
163 static bool __read_mostly force_emulation_prefix
= false;
164 module_param(force_emulation_prefix
, bool, S_IRUGO
);
166 int __read_mostly pi_inject_timer
= -1;
167 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
170 * Restoring the host value for MSRs that are only consumed when running in
171 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
172 * returns to userspace, i.e. the kernel can run with the guest's value.
174 #define KVM_MAX_NR_USER_RETURN_MSRS 16
176 struct kvm_user_return_msrs_global
{
178 u32 msrs
[KVM_MAX_NR_USER_RETURN_MSRS
];
181 struct kvm_user_return_msrs
{
182 struct user_return_notifier urn
;
184 struct kvm_user_return_msr_values
{
187 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
190 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global
;
191 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
193 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
194 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
195 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
196 | XFEATURE_MASK_PKRU)
198 u64 __read_mostly host_efer
;
199 EXPORT_SYMBOL_GPL(host_efer
);
201 bool __read_mostly allow_smaller_maxphyaddr
= 0;
202 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
204 u64 __read_mostly host_xss
;
205 EXPORT_SYMBOL_GPL(host_xss
);
206 u64 __read_mostly supported_xss
;
207 EXPORT_SYMBOL_GPL(supported_xss
);
209 struct kvm_stats_debugfs_item debugfs_entries
[] = {
210 VCPU_STAT("pf_fixed", pf_fixed
),
211 VCPU_STAT("pf_guest", pf_guest
),
212 VCPU_STAT("tlb_flush", tlb_flush
),
213 VCPU_STAT("invlpg", invlpg
),
214 VCPU_STAT("exits", exits
),
215 VCPU_STAT("io_exits", io_exits
),
216 VCPU_STAT("mmio_exits", mmio_exits
),
217 VCPU_STAT("signal_exits", signal_exits
),
218 VCPU_STAT("irq_window", irq_window_exits
),
219 VCPU_STAT("nmi_window", nmi_window_exits
),
220 VCPU_STAT("halt_exits", halt_exits
),
221 VCPU_STAT("halt_successful_poll", halt_successful_poll
),
222 VCPU_STAT("halt_attempted_poll", halt_attempted_poll
),
223 VCPU_STAT("halt_poll_invalid", halt_poll_invalid
),
224 VCPU_STAT("halt_wakeup", halt_wakeup
),
225 VCPU_STAT("hypercalls", hypercalls
),
226 VCPU_STAT("request_irq", request_irq_exits
),
227 VCPU_STAT("irq_exits", irq_exits
),
228 VCPU_STAT("host_state_reload", host_state_reload
),
229 VCPU_STAT("fpu_reload", fpu_reload
),
230 VCPU_STAT("insn_emulation", insn_emulation
),
231 VCPU_STAT("insn_emulation_fail", insn_emulation_fail
),
232 VCPU_STAT("irq_injections", irq_injections
),
233 VCPU_STAT("nmi_injections", nmi_injections
),
234 VCPU_STAT("req_event", req_event
),
235 VCPU_STAT("l1d_flush", l1d_flush
),
236 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns
),
237 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns
),
238 VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped
),
239 VM_STAT("mmu_pte_write", mmu_pte_write
),
240 VM_STAT("mmu_pde_zapped", mmu_pde_zapped
),
241 VM_STAT("mmu_flooded", mmu_flooded
),
242 VM_STAT("mmu_recycled", mmu_recycled
),
243 VM_STAT("mmu_cache_miss", mmu_cache_miss
),
244 VM_STAT("mmu_unsync", mmu_unsync
),
245 VM_STAT("remote_tlb_flush", remote_tlb_flush
),
246 VM_STAT("largepages", lpages
, .mode
= 0444),
247 VM_STAT("nx_largepages_splitted", nx_lpage_splits
, .mode
= 0444),
248 VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions
),
252 u64 __read_mostly host_xcr0
;
253 u64 __read_mostly supported_xcr0
;
254 EXPORT_SYMBOL_GPL(supported_xcr0
);
256 static struct kmem_cache
*x86_fpu_cache
;
258 static struct kmem_cache
*x86_emulator_cache
;
261 * When called, it means the previous get/set msr reached an invalid msr.
262 * Return true if we want to ignore/silent this failed msr access.
264 static bool kvm_msr_ignored_check(struct kvm_vcpu
*vcpu
, u32 msr
,
265 u64 data
, bool write
)
267 const char *op
= write
? "wrmsr" : "rdmsr";
270 if (report_ignored_msrs
)
271 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
276 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
282 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
284 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
285 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
287 return kmem_cache_create_usercopy("x86_emulator", size
,
288 __alignof__(struct x86_emulate_ctxt
),
289 SLAB_ACCOUNT
, useroffset
,
290 size
- useroffset
, NULL
);
293 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
295 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
298 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
299 vcpu
->arch
.apf
.gfns
[i
] = ~0;
302 static void kvm_on_user_return(struct user_return_notifier
*urn
)
305 struct kvm_user_return_msrs
*msrs
306 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
307 struct kvm_user_return_msr_values
*values
;
311 * Disabling irqs at this point since the following code could be
312 * interrupted and executed through kvm_arch_hardware_disable()
314 local_irq_save(flags
);
315 if (msrs
->registered
) {
316 msrs
->registered
= false;
317 user_return_notifier_unregister(urn
);
319 local_irq_restore(flags
);
320 for (slot
= 0; slot
< user_return_msrs_global
.nr
; ++slot
) {
321 values
= &msrs
->values
[slot
];
322 if (values
->host
!= values
->curr
) {
323 wrmsrl(user_return_msrs_global
.msrs
[slot
], values
->host
);
324 values
->curr
= values
->host
;
329 void kvm_define_user_return_msr(unsigned slot
, u32 msr
)
331 BUG_ON(slot
>= KVM_MAX_NR_USER_RETURN_MSRS
);
332 user_return_msrs_global
.msrs
[slot
] = msr
;
333 if (slot
>= user_return_msrs_global
.nr
)
334 user_return_msrs_global
.nr
= slot
+ 1;
336 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr
);
338 static void kvm_user_return_msr_cpu_online(void)
340 unsigned int cpu
= smp_processor_id();
341 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
345 for (i
= 0; i
< user_return_msrs_global
.nr
; ++i
) {
346 rdmsrl_safe(user_return_msrs_global
.msrs
[i
], &value
);
347 msrs
->values
[i
].host
= value
;
348 msrs
->values
[i
].curr
= value
;
352 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
354 unsigned int cpu
= smp_processor_id();
355 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
358 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
359 if (value
== msrs
->values
[slot
].curr
)
361 err
= wrmsrl_safe(user_return_msrs_global
.msrs
[slot
], value
);
365 msrs
->values
[slot
].curr
= value
;
366 if (!msrs
->registered
) {
367 msrs
->urn
.on_user_return
= kvm_on_user_return
;
368 user_return_notifier_register(&msrs
->urn
);
369 msrs
->registered
= true;
373 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
375 static void drop_user_return_notifiers(void)
377 unsigned int cpu
= smp_processor_id();
378 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
380 if (msrs
->registered
)
381 kvm_on_user_return(&msrs
->urn
);
384 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
386 return vcpu
->arch
.apic_base
;
388 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
390 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
392 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
394 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
396 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
398 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
399 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
400 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
401 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
403 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
405 if (!msr_info
->host_initiated
) {
406 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
408 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
412 kvm_lapic_set_base(vcpu
, msr_info
->data
);
413 kvm_recalculate_apic_map(vcpu
->kvm
);
416 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
418 asmlinkage __visible noinstr
void kvm_spurious_fault(void)
420 /* Fault while not rebooting. We want the trace. */
421 BUG_ON(!kvm_rebooting
);
423 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
425 #define EXCPT_BENIGN 0
426 #define EXCPT_CONTRIBUTORY 1
429 static int exception_class(int vector
)
439 return EXCPT_CONTRIBUTORY
;
446 #define EXCPT_FAULT 0
448 #define EXCPT_ABORT 2
449 #define EXCPT_INTERRUPT 3
451 static int exception_type(int vector
)
455 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
456 return EXCPT_INTERRUPT
;
460 /* #DB is trap, as instruction watchpoints are handled elsewhere */
461 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
464 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
467 /* Reserved exceptions will result in fault */
471 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
473 unsigned nr
= vcpu
->arch
.exception
.nr
;
474 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
475 unsigned long payload
= vcpu
->arch
.exception
.payload
;
483 * "Certain debug exceptions may clear bit 0-3. The
484 * remaining contents of the DR6 register are never
485 * cleared by the processor".
487 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
489 * DR6.RTM is set by all #DB exceptions that don't clear it.
491 vcpu
->arch
.dr6
|= DR6_RTM
;
492 vcpu
->arch
.dr6
|= payload
;
494 * Bit 16 should be set in the payload whenever the #DB
495 * exception should clear DR6.RTM. This makes the payload
496 * compatible with the pending debug exceptions under VMX.
497 * Though not currently documented in the SDM, this also
498 * makes the payload compatible with the exit qualification
499 * for #DB exceptions under VMX.
501 vcpu
->arch
.dr6
^= payload
& DR6_RTM
;
504 * The #DB payload is defined as compatible with the 'pending
505 * debug exceptions' field under VMX, not DR6. While bit 12 is
506 * defined in the 'pending debug exceptions' field (enabled
507 * breakpoint), it is reserved and must be zero in DR6.
509 vcpu
->arch
.dr6
&= ~BIT(12);
512 vcpu
->arch
.cr2
= payload
;
516 vcpu
->arch
.exception
.has_payload
= false;
517 vcpu
->arch
.exception
.payload
= 0;
519 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
521 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
522 unsigned nr
, bool has_error
, u32 error_code
,
523 bool has_payload
, unsigned long payload
, bool reinject
)
528 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
530 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
532 if (has_error
&& !is_protmode(vcpu
))
536 * On vmentry, vcpu->arch.exception.pending is only
537 * true if an event injection was blocked by
538 * nested_run_pending. In that case, however,
539 * vcpu_enter_guest requests an immediate exit,
540 * and the guest shouldn't proceed far enough to
543 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
544 vcpu
->arch
.exception
.injected
= true;
545 if (WARN_ON_ONCE(has_payload
)) {
547 * A reinjected event has already
548 * delivered its payload.
554 vcpu
->arch
.exception
.pending
= true;
555 vcpu
->arch
.exception
.injected
= false;
557 vcpu
->arch
.exception
.has_error_code
= has_error
;
558 vcpu
->arch
.exception
.nr
= nr
;
559 vcpu
->arch
.exception
.error_code
= error_code
;
560 vcpu
->arch
.exception
.has_payload
= has_payload
;
561 vcpu
->arch
.exception
.payload
= payload
;
562 if (!is_guest_mode(vcpu
))
563 kvm_deliver_exception_payload(vcpu
);
567 /* to check exception */
568 prev_nr
= vcpu
->arch
.exception
.nr
;
569 if (prev_nr
== DF_VECTOR
) {
570 /* triple fault -> shutdown */
571 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
574 class1
= exception_class(prev_nr
);
575 class2
= exception_class(nr
);
576 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
577 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
579 * Generate double fault per SDM Table 5-5. Set
580 * exception.pending = true so that the double fault
581 * can trigger a nested vmexit.
583 vcpu
->arch
.exception
.pending
= true;
584 vcpu
->arch
.exception
.injected
= false;
585 vcpu
->arch
.exception
.has_error_code
= true;
586 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
587 vcpu
->arch
.exception
.error_code
= 0;
588 vcpu
->arch
.exception
.has_payload
= false;
589 vcpu
->arch
.exception
.payload
= 0;
591 /* replace previous exception with a new one in a hope
592 that instruction re-execution will regenerate lost
597 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
599 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
601 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
603 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
605 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
607 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
609 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
610 unsigned long payload
)
612 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
614 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
616 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
617 u32 error_code
, unsigned long payload
)
619 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
620 true, payload
, false);
623 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
626 kvm_inject_gp(vcpu
, 0);
628 return kvm_skip_emulated_instruction(vcpu
);
632 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
634 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
636 ++vcpu
->stat
.pf_guest
;
637 vcpu
->arch
.exception
.nested_apf
=
638 is_guest_mode(vcpu
) && fault
->async_page_fault
;
639 if (vcpu
->arch
.exception
.nested_apf
) {
640 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
641 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
643 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
647 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
649 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
650 struct x86_exception
*fault
)
652 struct kvm_mmu
*fault_mmu
;
653 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
655 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
659 * Invalidate the TLB entry for the faulting address, if it exists,
660 * else the access will fault indefinitely (and to emulate hardware).
662 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
663 !(fault
->error_code
& PFERR_RSVD_MASK
))
664 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
665 fault_mmu
->root_hpa
);
667 fault_mmu
->inject_page_fault(vcpu
, fault
);
668 return fault
->nested_page_fault
;
670 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
672 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
674 atomic_inc(&vcpu
->arch
.nmi_queued
);
675 kvm_make_request(KVM_REQ_NMI
, vcpu
);
677 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
679 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
681 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
683 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
685 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
687 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
689 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
692 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
693 * a #GP and return false.
695 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
697 if (kvm_x86_ops
.get_cpl(vcpu
) <= required_cpl
)
699 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
702 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
704 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
706 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
709 kvm_queue_exception(vcpu
, UD_VECTOR
);
712 EXPORT_SYMBOL_GPL(kvm_require_dr
);
715 * This function will be used to read from the physical memory of the currently
716 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
717 * can read from guest physical or from the guest's guest physical memory.
719 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
720 gfn_t ngfn
, void *data
, int offset
, int len
,
723 struct x86_exception exception
;
727 ngpa
= gfn_to_gpa(ngfn
);
728 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
729 if (real_gfn
== UNMAPPED_GVA
)
732 real_gfn
= gpa_to_gfn(real_gfn
);
734 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
736 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
738 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
739 void *data
, int offset
, int len
, u32 access
)
741 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
742 data
, offset
, len
, access
);
745 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
747 return rsvd_bits(cpuid_maxphyaddr(vcpu
), 63) | rsvd_bits(5, 8) |
752 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
754 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
756 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
757 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
760 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
762 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
763 offset
* sizeof(u64
), sizeof(pdpte
),
764 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
769 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
770 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
771 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
778 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
779 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
785 EXPORT_SYMBOL_GPL(load_pdptrs
);
787 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
789 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
794 if (!is_pae_paging(vcpu
))
797 if (!kvm_register_is_available(vcpu
, VCPU_EXREG_PDPTR
))
800 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
801 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
802 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
803 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
807 return memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
809 EXPORT_SYMBOL_GPL(pdptrs_changed
);
811 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
813 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
815 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
816 kvm_clear_async_pf_completion_queue(vcpu
);
817 kvm_async_pf_hash_reset(vcpu
);
820 if ((cr0
^ old_cr0
) & update_bits
)
821 kvm_mmu_reset_context(vcpu
);
823 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
824 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
825 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
826 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
828 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
830 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
832 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
833 unsigned long pdptr_bits
= X86_CR0_CD
| X86_CR0_NW
| X86_CR0_PG
;
838 if (cr0
& 0xffffffff00000000UL
)
842 cr0
&= ~CR0_RESERVED_BITS
;
844 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
847 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
851 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
852 (cr0
& X86_CR0_PG
)) {
857 kvm_x86_ops
.get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
862 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
863 is_pae(vcpu
) && ((cr0
^ old_cr0
) & pdptr_bits
) &&
864 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
)))
867 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
870 kvm_x86_ops
.set_cr0(vcpu
, cr0
);
872 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
876 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
878 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
880 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
882 EXPORT_SYMBOL_GPL(kvm_lmsw
);
884 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
886 if (vcpu
->arch
.guest_state_protected
)
889 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
891 if (vcpu
->arch
.xcr0
!= host_xcr0
)
892 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
894 if (vcpu
->arch
.xsaves_enabled
&&
895 vcpu
->arch
.ia32_xss
!= host_xss
)
896 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
899 if (static_cpu_has(X86_FEATURE_PKU
) &&
900 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
901 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
902 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
903 __write_pkru(vcpu
->arch
.pkru
);
905 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
907 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
909 if (vcpu
->arch
.guest_state_protected
)
912 if (static_cpu_has(X86_FEATURE_PKU
) &&
913 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
914 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
915 vcpu
->arch
.pkru
= rdpkru();
916 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
917 __write_pkru(vcpu
->arch
.host_pkru
);
920 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
922 if (vcpu
->arch
.xcr0
!= host_xcr0
)
923 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
925 if (vcpu
->arch
.xsaves_enabled
&&
926 vcpu
->arch
.ia32_xss
!= host_xss
)
927 wrmsrl(MSR_IA32_XSS
, host_xss
);
931 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
933 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
936 u64 old_xcr0
= vcpu
->arch
.xcr0
;
939 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
940 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
942 if (!(xcr0
& XFEATURE_MASK_FP
))
944 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
948 * Do not allow the guest to set bits that we do not support
949 * saving. However, xcr0 bit 0 is always set, even if the
950 * emulated CPU does not support XSAVE (see fx_init).
952 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
953 if (xcr0
& ~valid_bits
)
956 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
957 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
960 if (xcr0
& XFEATURE_MASK_AVX512
) {
961 if (!(xcr0
& XFEATURE_MASK_YMM
))
963 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
966 vcpu
->arch
.xcr0
= xcr0
;
968 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
969 kvm_update_cpuid_runtime(vcpu
);
973 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
975 if (kvm_x86_ops
.get_cpl(vcpu
) != 0 ||
976 __kvm_set_xcr(vcpu
, index
, xcr
)) {
977 kvm_inject_gp(vcpu
, 0);
982 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
984 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
986 if (cr4
& cr4_reserved_bits
)
989 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
992 return kvm_x86_ops
.is_valid_cr4(vcpu
, cr4
);
994 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
996 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
998 unsigned long mmu_role_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
999 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
1001 if (((cr4
^ old_cr4
) & mmu_role_bits
) ||
1002 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1003 kvm_mmu_reset_context(vcpu
);
1005 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1007 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1009 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1010 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1013 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1016 if (is_long_mode(vcpu
)) {
1017 if (!(cr4
& X86_CR4_PAE
))
1019 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1021 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1022 && ((cr4
^ old_cr4
) & pdptr_bits
)
1023 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
1024 kvm_read_cr3(vcpu
)))
1027 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1028 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1031 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1032 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1036 kvm_x86_ops
.set_cr4(vcpu
, cr4
);
1038 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1042 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1044 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1046 bool skip_tlb_flush
= false;
1047 #ifdef CONFIG_X86_64
1048 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1051 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1052 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1056 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
1057 if (!skip_tlb_flush
) {
1058 kvm_mmu_sync_roots(vcpu
);
1059 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1064 if (is_long_mode(vcpu
) &&
1065 (cr3
& vcpu
->arch
.cr3_lm_rsvd_bits
))
1067 else if (is_pae_paging(vcpu
) &&
1068 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1071 kvm_mmu_new_pgd(vcpu
, cr3
, skip_tlb_flush
, skip_tlb_flush
);
1072 vcpu
->arch
.cr3
= cr3
;
1073 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1077 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1079 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1081 if (cr8
& CR8_RESERVED_BITS
)
1083 if (lapic_in_kernel(vcpu
))
1084 kvm_lapic_set_tpr(vcpu
, cr8
);
1086 vcpu
->arch
.cr8
= cr8
;
1089 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1091 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1093 if (lapic_in_kernel(vcpu
))
1094 return kvm_lapic_get_cr8(vcpu
);
1096 return vcpu
->arch
.cr8
;
1098 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1100 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1104 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1105 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1106 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1107 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
1111 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1115 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1116 dr7
= vcpu
->arch
.guest_debug_dr7
;
1118 dr7
= vcpu
->arch
.dr7
;
1119 kvm_x86_ops
.set_dr7(vcpu
, dr7
);
1120 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1121 if (dr7
& DR7_BP_EN_MASK
)
1122 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1124 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1126 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1128 u64 fixed
= DR6_FIXED_1
;
1130 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1135 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1137 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1141 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1142 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1143 vcpu
->arch
.eff_db
[dr
] = val
;
1147 if (!kvm_dr6_valid(val
))
1148 return -1; /* #GP */
1149 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1153 if (!kvm_dr7_valid(val
))
1154 return -1; /* #GP */
1155 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1156 kvm_update_dr7(vcpu
);
1163 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1165 if (__kvm_set_dr(vcpu
, dr
, val
)) {
1166 kvm_inject_gp(vcpu
, 0);
1171 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1173 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1175 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1179 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1183 *val
= vcpu
->arch
.dr6
;
1187 *val
= vcpu
->arch
.dr7
;
1192 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1194 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
1196 u32 ecx
= kvm_rcx_read(vcpu
);
1200 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
1203 kvm_rax_write(vcpu
, (u32
)data
);
1204 kvm_rdx_write(vcpu
, data
>> 32);
1207 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
1210 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1211 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1213 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1214 * extract the supported MSRs from the related const lists.
1215 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1216 * capabilities of the host cpu. This capabilities test skips MSRs that are
1217 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1218 * may depend on host virtualization features rather than host cpu features.
1221 static const u32 msrs_to_save_all
[] = {
1222 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1224 #ifdef CONFIG_X86_64
1225 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1227 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1228 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1230 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1231 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1232 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1233 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1234 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1235 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1236 MSR_IA32_UMWAIT_CONTROL
,
1238 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1239 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2, MSR_ARCH_PERFMON_FIXED_CTR0
+ 3,
1240 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1241 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1242 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1243 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1244 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1245 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1246 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1247 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1248 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1249 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1250 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1251 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1252 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1253 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1254 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1255 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1256 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1257 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1258 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1259 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1262 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1263 static unsigned num_msrs_to_save
;
1265 static const u32 emulated_msrs_all
[] = {
1266 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1267 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1268 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1269 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1270 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1271 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1272 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1274 HV_X64_MSR_VP_INDEX
,
1275 HV_X64_MSR_VP_RUNTIME
,
1276 HV_X64_MSR_SCONTROL
,
1277 HV_X64_MSR_STIMER0_CONFIG
,
1278 HV_X64_MSR_VP_ASSIST_PAGE
,
1279 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1280 HV_X64_MSR_TSC_EMULATION_STATUS
,
1281 HV_X64_MSR_SYNDBG_OPTIONS
,
1282 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1283 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1284 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1286 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1287 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1289 MSR_IA32_TSC_ADJUST
,
1290 MSR_IA32_TSCDEADLINE
,
1291 MSR_IA32_ARCH_CAPABILITIES
,
1292 MSR_IA32_PERF_CAPABILITIES
,
1293 MSR_IA32_MISC_ENABLE
,
1294 MSR_IA32_MCG_STATUS
,
1296 MSR_IA32_MCG_EXT_CTL
,
1300 MSR_MISC_FEATURES_ENABLES
,
1301 MSR_AMD64_VIRT_SPEC_CTRL
,
1306 * The following list leaves out MSRs whose values are determined
1307 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1308 * We always support the "true" VMX control MSRs, even if the host
1309 * processor does not, so I am putting these registers here rather
1310 * than in msrs_to_save_all.
1313 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1314 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1315 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1316 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1318 MSR_IA32_VMX_CR0_FIXED0
,
1319 MSR_IA32_VMX_CR4_FIXED0
,
1320 MSR_IA32_VMX_VMCS_ENUM
,
1321 MSR_IA32_VMX_PROCBASED_CTLS2
,
1322 MSR_IA32_VMX_EPT_VPID_CAP
,
1323 MSR_IA32_VMX_VMFUNC
,
1326 MSR_KVM_POLL_CONTROL
,
1329 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1330 static unsigned num_emulated_msrs
;
1333 * List of msr numbers which are used to expose MSR-based features that
1334 * can be used by a hypervisor to validate requested CPU features.
1336 static const u32 msr_based_features_all
[] = {
1338 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1339 MSR_IA32_VMX_PINBASED_CTLS
,
1340 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1341 MSR_IA32_VMX_PROCBASED_CTLS
,
1342 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1343 MSR_IA32_VMX_EXIT_CTLS
,
1344 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1345 MSR_IA32_VMX_ENTRY_CTLS
,
1347 MSR_IA32_VMX_CR0_FIXED0
,
1348 MSR_IA32_VMX_CR0_FIXED1
,
1349 MSR_IA32_VMX_CR4_FIXED0
,
1350 MSR_IA32_VMX_CR4_FIXED1
,
1351 MSR_IA32_VMX_VMCS_ENUM
,
1352 MSR_IA32_VMX_PROCBASED_CTLS2
,
1353 MSR_IA32_VMX_EPT_VPID_CAP
,
1354 MSR_IA32_VMX_VMFUNC
,
1358 MSR_IA32_ARCH_CAPABILITIES
,
1359 MSR_IA32_PERF_CAPABILITIES
,
1362 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1363 static unsigned int num_msr_based_features
;
1365 static u64
kvm_get_arch_capabilities(void)
1369 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1370 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1373 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1374 * the nested hypervisor runs with NX huge pages. If it is not,
1375 * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1376 * L1 guests, so it need not worry about its own (L2) guests.
1378 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1381 * If we're doing cache flushes (either "always" or "cond")
1382 * we will do one whenever the guest does a vmlaunch/vmresume.
1383 * If an outer hypervisor is doing the cache flush for us
1384 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1385 * capability to the guest too, and if EPT is disabled we're not
1386 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1387 * require a nested hypervisor to do a flush of its own.
1389 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1390 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1392 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1393 data
|= ARCH_CAP_RDCL_NO
;
1394 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1395 data
|= ARCH_CAP_SSB_NO
;
1396 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1397 data
|= ARCH_CAP_MDS_NO
;
1399 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1401 * If RTM=0 because the kernel has disabled TSX, the host might
1402 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1403 * and therefore knows that there cannot be TAA) but keep
1404 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1405 * and we want to allow migrating those guests to tsx=off hosts.
1407 data
&= ~ARCH_CAP_TAA_NO
;
1408 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1409 data
|= ARCH_CAP_TAA_NO
;
1412 * Nothing to do here; we emulate TSX_CTRL if present on the
1413 * host so the guest can choose between disabling TSX or
1414 * using VERW to clear CPU buffers.
1421 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1423 switch (msr
->index
) {
1424 case MSR_IA32_ARCH_CAPABILITIES
:
1425 msr
->data
= kvm_get_arch_capabilities();
1427 case MSR_IA32_UCODE_REV
:
1428 rdmsrl_safe(msr
->index
, &msr
->data
);
1431 return kvm_x86_ops
.get_msr_feature(msr
);
1436 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1438 struct kvm_msr_entry msr
;
1442 r
= kvm_get_msr_feature(&msr
);
1444 if (r
== KVM_MSR_RET_INVALID
) {
1445 /* Unconditionally clear the output for simplicity */
1447 if (kvm_msr_ignored_check(vcpu
, index
, 0, false))
1459 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1461 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1464 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1467 if (efer
& (EFER_LME
| EFER_LMA
) &&
1468 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1471 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1477 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1479 if (efer
& efer_reserved_bits
)
1482 return __kvm_valid_efer(vcpu
, efer
);
1484 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1486 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1488 u64 old_efer
= vcpu
->arch
.efer
;
1489 u64 efer
= msr_info
->data
;
1492 if (efer
& efer_reserved_bits
)
1495 if (!msr_info
->host_initiated
) {
1496 if (!__kvm_valid_efer(vcpu
, efer
))
1499 if (is_paging(vcpu
) &&
1500 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1505 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1507 r
= kvm_x86_ops
.set_efer(vcpu
, efer
);
1513 /* Update reserved bits */
1514 if ((efer
^ old_efer
) & EFER_NX
)
1515 kvm_mmu_reset_context(vcpu
);
1520 void kvm_enable_efer_bits(u64 mask
)
1522 efer_reserved_bits
&= ~mask
;
1524 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1526 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1528 struct kvm
*kvm
= vcpu
->kvm
;
1529 struct msr_bitmap_range
*ranges
= kvm
->arch
.msr_filter
.ranges
;
1530 u32 count
= kvm
->arch
.msr_filter
.count
;
1532 bool r
= kvm
->arch
.msr_filter
.default_allow
;
1535 /* MSR filtering not set up or x2APIC enabled, allow everything */
1536 if (!count
|| (index
>= 0x800 && index
<= 0x8ff))
1539 /* Prevent collision with set_msr_filter */
1540 idx
= srcu_read_lock(&kvm
->srcu
);
1542 for (i
= 0; i
< count
; i
++) {
1543 u32 start
= ranges
[i
].base
;
1544 u32 end
= start
+ ranges
[i
].nmsrs
;
1545 u32 flags
= ranges
[i
].flags
;
1546 unsigned long *bitmap
= ranges
[i
].bitmap
;
1548 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1549 r
= !!test_bit(index
- start
, bitmap
);
1554 srcu_read_unlock(&kvm
->srcu
, idx
);
1558 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1561 * Write @data into the MSR specified by @index. Select MSR specific fault
1562 * checks are bypassed if @host_initiated is %true.
1563 * Returns 0 on success, non-0 otherwise.
1564 * Assumes vcpu_load() was already called.
1566 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1567 bool host_initiated
)
1569 struct msr_data msr
;
1571 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1572 return KVM_MSR_RET_FILTERED
;
1577 case MSR_KERNEL_GS_BASE
:
1580 if (is_noncanonical_address(data
, vcpu
))
1583 case MSR_IA32_SYSENTER_EIP
:
1584 case MSR_IA32_SYSENTER_ESP
:
1586 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1587 * non-canonical address is written on Intel but not on
1588 * AMD (which ignores the top 32-bits, because it does
1589 * not implement 64-bit SYSENTER).
1591 * 64-bit code should hence be able to write a non-canonical
1592 * value on AMD. Making the address canonical ensures that
1593 * vmentry does not fail on Intel after writing a non-canonical
1594 * value, and that something deterministic happens if the guest
1595 * invokes 64-bit SYSENTER.
1597 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1602 msr
.host_initiated
= host_initiated
;
1604 return kvm_x86_ops
.set_msr(vcpu
, &msr
);
1607 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1608 u32 index
, u64 data
, bool host_initiated
)
1610 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1612 if (ret
== KVM_MSR_RET_INVALID
)
1613 if (kvm_msr_ignored_check(vcpu
, index
, data
, true))
1620 * Read the MSR specified by @index into @data. Select MSR specific fault
1621 * checks are bypassed if @host_initiated is %true.
1622 * Returns 0 on success, non-0 otherwise.
1623 * Assumes vcpu_load() was already called.
1625 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1626 bool host_initiated
)
1628 struct msr_data msr
;
1631 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1632 return KVM_MSR_RET_FILTERED
;
1635 msr
.host_initiated
= host_initiated
;
1637 ret
= kvm_x86_ops
.get_msr(vcpu
, &msr
);
1643 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1644 u32 index
, u64
*data
, bool host_initiated
)
1646 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1648 if (ret
== KVM_MSR_RET_INVALID
) {
1649 /* Unconditionally clear *data for simplicity */
1651 if (kvm_msr_ignored_check(vcpu
, index
, 0, false))
1658 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1660 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1662 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1664 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1666 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1668 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1670 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1672 int err
= vcpu
->run
->msr
.error
;
1674 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1675 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1678 return kvm_x86_ops
.complete_emulated_msr(vcpu
, err
);
1681 static int complete_emulated_wrmsr(struct kvm_vcpu
*vcpu
)
1683 return kvm_x86_ops
.complete_emulated_msr(vcpu
, vcpu
->run
->msr
.error
);
1686 static u64
kvm_msr_reason(int r
)
1689 case KVM_MSR_RET_INVALID
:
1690 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1691 case KVM_MSR_RET_FILTERED
:
1692 return KVM_MSR_EXIT_REASON_FILTER
;
1694 return KVM_MSR_EXIT_REASON_INVAL
;
1698 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1699 u32 exit_reason
, u64 data
,
1700 int (*completion
)(struct kvm_vcpu
*vcpu
),
1703 u64 msr_reason
= kvm_msr_reason(r
);
1705 /* Check if the user wanted to know about this MSR fault */
1706 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1709 vcpu
->run
->exit_reason
= exit_reason
;
1710 vcpu
->run
->msr
.error
= 0;
1711 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1712 vcpu
->run
->msr
.reason
= msr_reason
;
1713 vcpu
->run
->msr
.index
= index
;
1714 vcpu
->run
->msr
.data
= data
;
1715 vcpu
->arch
.complete_userspace_io
= completion
;
1720 static int kvm_get_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, int r
)
1722 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_RDMSR
, 0,
1723 complete_emulated_rdmsr
, r
);
1726 static int kvm_set_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
, int r
)
1728 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_WRMSR
, data
,
1729 complete_emulated_wrmsr
, r
);
1732 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1734 u32 ecx
= kvm_rcx_read(vcpu
);
1738 r
= kvm_get_msr(vcpu
, ecx
, &data
);
1740 /* MSR read failed? See if we should ask user space */
1741 if (r
&& kvm_get_msr_user_space(vcpu
, ecx
, r
)) {
1742 /* Bounce to user space */
1747 trace_kvm_msr_read(ecx
, data
);
1749 kvm_rax_write(vcpu
, data
& -1u);
1750 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1752 trace_kvm_msr_read_ex(ecx
);
1755 return kvm_x86_ops
.complete_emulated_msr(vcpu
, r
);
1757 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1759 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1761 u32 ecx
= kvm_rcx_read(vcpu
);
1762 u64 data
= kvm_read_edx_eax(vcpu
);
1765 r
= kvm_set_msr(vcpu
, ecx
, data
);
1767 /* MSR write failed? See if we should ask user space */
1768 if (r
&& kvm_set_msr_user_space(vcpu
, ecx
, data
, r
))
1769 /* Bounce to user space */
1772 /* Signal all other negative errors to userspace */
1777 trace_kvm_msr_write(ecx
, data
);
1779 trace_kvm_msr_write_ex(ecx
, data
);
1781 return kvm_x86_ops
.complete_emulated_msr(vcpu
, r
);
1783 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1785 bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
1787 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
1788 xfer_to_guest_mode_work_pending();
1790 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request
);
1793 * The fast path for frequent and performance sensitive wrmsr emulation,
1794 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1795 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1796 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1797 * other cases which must be called after interrupts are enabled on the host.
1799 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1801 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1804 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1805 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1806 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1807 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1810 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1811 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1812 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1813 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1820 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
1822 if (!kvm_can_use_hv_timer(vcpu
))
1825 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1829 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
1831 u32 msr
= kvm_rcx_read(vcpu
);
1833 fastpath_t ret
= EXIT_FASTPATH_NONE
;
1836 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
1837 data
= kvm_read_edx_eax(vcpu
);
1838 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
1839 kvm_skip_emulated_instruction(vcpu
);
1840 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
1843 case MSR_IA32_TSCDEADLINE
:
1844 data
= kvm_read_edx_eax(vcpu
);
1845 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
1846 kvm_skip_emulated_instruction(vcpu
);
1847 ret
= EXIT_FASTPATH_REENTER_GUEST
;
1854 if (ret
!= EXIT_FASTPATH_NONE
)
1855 trace_kvm_msr_write(msr
, data
);
1859 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
1862 * Adapt set_msr() to msr_io()'s calling convention
1864 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1866 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
1869 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1871 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
1874 #ifdef CONFIG_X86_64
1875 struct pvclock_clock
{
1885 struct pvclock_gtod_data
{
1888 struct pvclock_clock clock
; /* extract of a clocksource struct */
1889 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
1895 static struct pvclock_gtod_data pvclock_gtod_data
;
1897 static void update_pvclock_gtod(struct timekeeper
*tk
)
1899 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1901 write_seqcount_begin(&vdata
->seq
);
1903 /* copy pvclock gtod data */
1904 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
1905 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1906 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1907 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1908 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1909 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
1910 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
1912 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
1913 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
1914 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
1915 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
1916 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
1917 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
1918 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
1920 vdata
->wall_time_sec
= tk
->xtime_sec
;
1922 vdata
->offs_boot
= tk
->offs_boot
;
1924 write_seqcount_end(&vdata
->seq
);
1927 static s64
get_kvmclock_base_ns(void)
1929 /* Count up from boot time, but with the frequency of the raw clock. */
1930 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
1933 static s64
get_kvmclock_base_ns(void)
1935 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
1936 return ktime_get_boottime_ns();
1940 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1944 struct pvclock_wall_clock wc
;
1947 kvm
->arch
.wall_clock
= wall_clock
;
1952 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1957 ++version
; /* first time write, random junk */
1961 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1965 * The guest calculates current wall clock time by adding
1966 * system time (updated by kvm_guest_time_update below) to the
1967 * wall clock specified here. We do the reverse here.
1969 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
1971 wc
.nsec
= do_div(wall_nsec
, 1000000000);
1972 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
1973 wc
.version
= version
;
1975 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1978 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1981 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
1982 bool old_msr
, bool host_initiated
)
1984 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1986 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
1987 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
1988 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1990 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
1993 vcpu
->arch
.time
= system_time
;
1994 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
1996 /* we verify if the enable bit is set... */
1997 vcpu
->arch
.pv_time_enabled
= false;
1998 if (!(system_time
& 1))
2001 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2002 &vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2003 sizeof(struct pvclock_vcpu_time_info
)))
2004 vcpu
->arch
.pv_time_enabled
= true;
2009 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2011 do_shl32_div32(dividend
, divisor
);
2015 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2016 s8
*pshift
, u32
*pmultiplier
)
2024 scaled64
= scaled_hz
;
2025 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2030 tps32
= (uint32_t)tps64
;
2031 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2032 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2040 *pmultiplier
= div_frac(scaled64
, tps32
);
2043 #ifdef CONFIG_X86_64
2044 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2047 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2048 static unsigned long max_tsc_khz
;
2050 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2052 u64 v
= (u64
)khz
* (1000000 + ppm
);
2057 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2061 /* Guest TSC same frequency as host TSC? */
2063 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
2067 /* TSC scaling supported? */
2068 if (!kvm_has_tsc_control
) {
2069 if (user_tsc_khz
> tsc_khz
) {
2070 vcpu
->arch
.tsc_catchup
= 1;
2071 vcpu
->arch
.tsc_always_catchup
= 1;
2074 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2079 /* TSC scaling required - calculate ratio */
2080 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2081 user_tsc_khz
, tsc_khz
);
2083 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2084 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2089 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
2093 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2095 u32 thresh_lo
, thresh_hi
;
2096 int use_scaling
= 0;
2098 /* tsc_khz can be zero if TSC calibration fails */
2099 if (user_tsc_khz
== 0) {
2100 /* set tsc_scaling_ratio to a safe value */
2101 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
2105 /* Compute a scale to convert nanoseconds in TSC cycles */
2106 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2107 &vcpu
->arch
.virtual_tsc_shift
,
2108 &vcpu
->arch
.virtual_tsc_mult
);
2109 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2112 * Compute the variation in TSC rate which is acceptable
2113 * within the range of tolerance and decide if the
2114 * rate being applied is within that bounds of the hardware
2115 * rate. If so, no scaling or compensation need be done.
2117 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2118 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2119 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2120 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2123 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2126 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2128 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2129 vcpu
->arch
.virtual_tsc_mult
,
2130 vcpu
->arch
.virtual_tsc_shift
);
2131 tsc
+= vcpu
->arch
.this_tsc_write
;
2135 static inline int gtod_is_based_on_tsc(int mode
)
2137 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2140 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2142 #ifdef CONFIG_X86_64
2144 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2145 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2147 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2148 atomic_read(&vcpu
->kvm
->online_vcpus
));
2151 * Once the masterclock is enabled, always perform request in
2152 * order to update it.
2154 * In order to enable masterclock, the host clocksource must be TSC
2155 * and the vcpus need to have matched TSCs. When that happens,
2156 * perform request to enable masterclock.
2158 if (ka
->use_master_clock
||
2159 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2160 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2162 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2163 atomic_read(&vcpu
->kvm
->online_vcpus
),
2164 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2169 * Multiply tsc by a fixed point number represented by ratio.
2171 * The most significant 64-N bits (mult) of ratio represent the
2172 * integral part of the fixed point number; the remaining N bits
2173 * (frac) represent the fractional part, ie. ratio represents a fixed
2174 * point number (mult + frac * 2^(-N)).
2176 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2178 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2180 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2183 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
2186 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
2188 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2189 _tsc
= __scale_tsc(ratio
, tsc
);
2193 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2195 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2199 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
2201 return target_tsc
- tsc
;
2204 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2206 return vcpu
->arch
.l1_tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
2208 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2210 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
2212 vcpu
->arch
.l1_tsc_offset
= offset
;
2213 vcpu
->arch
.tsc_offset
= kvm_x86_ops
.write_l1_tsc_offset(vcpu
, offset
);
2216 static inline bool kvm_check_tsc_unstable(void)
2218 #ifdef CONFIG_X86_64
2220 * TSC is marked unstable when we're running on Hyper-V,
2221 * 'TSC page' clocksource is good.
2223 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2226 return check_tsc_unstable();
2229 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2231 struct kvm
*kvm
= vcpu
->kvm
;
2232 u64 offset
, ns
, elapsed
;
2233 unsigned long flags
;
2235 bool already_matched
;
2236 bool synchronizing
= false;
2238 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2239 offset
= kvm_compute_tsc_offset(vcpu
, data
);
2240 ns
= get_kvmclock_base_ns();
2241 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2243 if (vcpu
->arch
.virtual_tsc_khz
) {
2246 * detection of vcpu initialization -- need to sync
2247 * with other vCPUs. This particularly helps to keep
2248 * kvm_clock stable after CPU hotplug
2250 synchronizing
= true;
2252 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2253 nsec_to_cycles(vcpu
, elapsed
);
2254 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2256 * Special case: TSC write with a small delta (1 second)
2257 * of virtual cycle time against real time is
2258 * interpreted as an attempt to synchronize the CPU.
2260 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2261 data
+ tsc_hz
> tsc_exp
;
2266 * For a reliable TSC, we can match TSC offsets, and for an unstable
2267 * TSC, we add elapsed time in this computation. We could let the
2268 * compensation code attempt to catch up if we fall behind, but
2269 * it's better to try to match offsets from the beginning.
2271 if (synchronizing
&&
2272 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2273 if (!kvm_check_tsc_unstable()) {
2274 offset
= kvm
->arch
.cur_tsc_offset
;
2276 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2278 offset
= kvm_compute_tsc_offset(vcpu
, data
);
2281 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2284 * We split periods of matched TSC writes into generations.
2285 * For each generation, we track the original measured
2286 * nanosecond time, offset, and write, so if TSCs are in
2287 * sync, we can match exact offset, and if not, we can match
2288 * exact software computation in compute_guest_tsc()
2290 * These values are tracked in kvm->arch.cur_xxx variables.
2292 kvm
->arch
.cur_tsc_generation
++;
2293 kvm
->arch
.cur_tsc_nsec
= ns
;
2294 kvm
->arch
.cur_tsc_write
= data
;
2295 kvm
->arch
.cur_tsc_offset
= offset
;
2300 * We also track th most recent recorded KHZ, write and time to
2301 * allow the matching interval to be extended at each write.
2303 kvm
->arch
.last_tsc_nsec
= ns
;
2304 kvm
->arch
.last_tsc_write
= data
;
2305 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2307 vcpu
->arch
.last_guest_tsc
= data
;
2309 /* Keep track of which generation this VCPU has synchronized to */
2310 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2311 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2312 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2314 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2315 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2317 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
2319 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2320 } else if (!already_matched
) {
2321 kvm
->arch
.nr_vcpus_matched_tsc
++;
2324 kvm_track_tsc_matching(vcpu
);
2325 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
2328 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2331 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2332 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2335 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2337 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2338 WARN_ON(adjustment
< 0);
2339 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
2340 adjust_tsc_offset_guest(vcpu
, adjustment
);
2343 #ifdef CONFIG_X86_64
2345 static u64
read_tsc(void)
2347 u64 ret
= (u64
)rdtsc_ordered();
2348 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2350 if (likely(ret
>= last
))
2354 * GCC likes to generate cmov here, but this branch is extremely
2355 * predictable (it's just a function of time and the likely is
2356 * very likely) and there's a data dependence, so force GCC
2357 * to generate a branch instead. I don't barrier() because
2358 * we don't actually need a barrier, and if this function
2359 * ever gets inlined it will generate worse code.
2365 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2371 switch (clock
->vclock_mode
) {
2372 case VDSO_CLOCKMODE_HVCLOCK
:
2373 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2375 if (tsc_pg_val
!= U64_MAX
) {
2376 /* TSC page valid */
2377 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2378 v
= (tsc_pg_val
- clock
->cycle_last
) &
2381 /* TSC page invalid */
2382 *mode
= VDSO_CLOCKMODE_NONE
;
2385 case VDSO_CLOCKMODE_TSC
:
2386 *mode
= VDSO_CLOCKMODE_TSC
;
2387 *tsc_timestamp
= read_tsc();
2388 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2392 *mode
= VDSO_CLOCKMODE_NONE
;
2395 if (*mode
== VDSO_CLOCKMODE_NONE
)
2396 *tsc_timestamp
= v
= 0;
2398 return v
* clock
->mult
;
2401 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2403 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2409 seq
= read_seqcount_begin(>od
->seq
);
2410 ns
= gtod
->raw_clock
.base_cycles
;
2411 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2412 ns
>>= gtod
->raw_clock
.shift
;
2413 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2414 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2420 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2422 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2428 seq
= read_seqcount_begin(>od
->seq
);
2429 ts
->tv_sec
= gtod
->wall_time_sec
;
2430 ns
= gtod
->clock
.base_cycles
;
2431 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2432 ns
>>= gtod
->clock
.shift
;
2433 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2435 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2441 /* returns true if host is using TSC based clocksource */
2442 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2444 /* checked again under seqlock below */
2445 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2448 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2452 /* returns true if host is using TSC based clocksource */
2453 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2456 /* checked again under seqlock below */
2457 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2460 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2466 * Assuming a stable TSC across physical CPUS, and a stable TSC
2467 * across virtual CPUs, the following condition is possible.
2468 * Each numbered line represents an event visible to both
2469 * CPUs at the next numbered event.
2471 * "timespecX" represents host monotonic time. "tscX" represents
2474 * VCPU0 on CPU0 | VCPU1 on CPU1
2476 * 1. read timespec0,tsc0
2477 * 2. | timespec1 = timespec0 + N
2479 * 3. transition to guest | transition to guest
2480 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2481 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2482 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2484 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2487 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2489 * - 0 < N - M => M < N
2491 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2492 * always the case (the difference between two distinct xtime instances
2493 * might be smaller then the difference between corresponding TSC reads,
2494 * when updating guest vcpus pvclock areas).
2496 * To avoid that problem, do not allow visibility of distinct
2497 * system_timestamp/tsc_timestamp values simultaneously: use a master
2498 * copy of host monotonic time values. Update that master copy
2501 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2505 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2507 #ifdef CONFIG_X86_64
2508 struct kvm_arch
*ka
= &kvm
->arch
;
2510 bool host_tsc_clocksource
, vcpus_matched
;
2512 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2513 atomic_read(&kvm
->online_vcpus
));
2516 * If the host uses TSC clock, then passthrough TSC as stable
2519 host_tsc_clocksource
= kvm_get_time_and_clockread(
2520 &ka
->master_kernel_ns
,
2521 &ka
->master_cycle_now
);
2523 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2524 && !ka
->backwards_tsc_observed
2525 && !ka
->boot_vcpu_runs_old_kvmclock
;
2527 if (ka
->use_master_clock
)
2528 atomic_set(&kvm_guest_has_master_clock
, 1);
2530 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2531 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2536 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2538 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2541 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2543 #ifdef CONFIG_X86_64
2545 struct kvm_vcpu
*vcpu
;
2546 struct kvm_arch
*ka
= &kvm
->arch
;
2548 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2549 kvm_make_mclock_inprogress_request(kvm
);
2550 /* no guest entries from this point */
2551 pvclock_update_vm_gtod_copy(kvm
);
2553 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2554 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2556 /* guest entries allowed */
2557 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2558 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2560 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2564 u64
get_kvmclock_ns(struct kvm
*kvm
)
2566 struct kvm_arch
*ka
= &kvm
->arch
;
2567 struct pvclock_vcpu_time_info hv_clock
;
2570 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2571 if (!ka
->use_master_clock
) {
2572 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2573 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2576 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2577 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2578 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2580 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2583 if (__this_cpu_read(cpu_tsc_khz
)) {
2584 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2585 &hv_clock
.tsc_shift
,
2586 &hv_clock
.tsc_to_system_mul
);
2587 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2589 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2596 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
2598 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2599 struct pvclock_vcpu_time_info guest_hv_clock
;
2601 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2602 &guest_hv_clock
, sizeof(guest_hv_clock
))))
2605 /* This VCPU is paused, but it's legal for a guest to read another
2606 * VCPU's kvmclock, so we really have to follow the specification where
2607 * it says that version is odd if data is being modified, and even after
2610 * Version field updates must be kept separate. This is because
2611 * kvm_write_guest_cached might use a "rep movs" instruction, and
2612 * writes within a string instruction are weakly ordered. So there
2613 * are three writes overall.
2615 * As a small optimization, only write the version field in the first
2616 * and third write. The vcpu->pv_time cache is still valid, because the
2617 * version field is the first in the struct.
2619 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2621 if (guest_hv_clock
.version
& 1)
2622 ++guest_hv_clock
.version
; /* first time write, random junk */
2624 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2625 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2627 sizeof(vcpu
->hv_clock
.version
));
2631 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2632 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2634 if (vcpu
->pvclock_set_guest_stopped_request
) {
2635 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2636 vcpu
->pvclock_set_guest_stopped_request
= false;
2639 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2641 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2643 sizeof(vcpu
->hv_clock
));
2647 vcpu
->hv_clock
.version
++;
2648 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2650 sizeof(vcpu
->hv_clock
.version
));
2653 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2655 unsigned long flags
, tgt_tsc_khz
;
2656 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2657 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2659 u64 tsc_timestamp
, host_tsc
;
2661 bool use_master_clock
;
2667 * If the host uses TSC clock, then passthrough TSC as stable
2670 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2671 use_master_clock
= ka
->use_master_clock
;
2672 if (use_master_clock
) {
2673 host_tsc
= ka
->master_cycle_now
;
2674 kernel_ns
= ka
->master_kernel_ns
;
2676 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2678 /* Keep irq disabled to prevent changes to the clock */
2679 local_irq_save(flags
);
2680 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2681 if (unlikely(tgt_tsc_khz
== 0)) {
2682 local_irq_restore(flags
);
2683 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2686 if (!use_master_clock
) {
2688 kernel_ns
= get_kvmclock_base_ns();
2691 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2694 * We may have to catch up the TSC to match elapsed wall clock
2695 * time for two reasons, even if kvmclock is used.
2696 * 1) CPU could have been running below the maximum TSC rate
2697 * 2) Broken TSC compensation resets the base at each VCPU
2698 * entry to avoid unknown leaps of TSC even when running
2699 * again on the same CPU. This may cause apparent elapsed
2700 * time to disappear, and the guest to stand still or run
2703 if (vcpu
->tsc_catchup
) {
2704 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2705 if (tsc
> tsc_timestamp
) {
2706 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2707 tsc_timestamp
= tsc
;
2711 local_irq_restore(flags
);
2713 /* With all the info we got, fill in the values */
2715 if (kvm_has_tsc_control
)
2716 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2718 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2719 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2720 &vcpu
->hv_clock
.tsc_shift
,
2721 &vcpu
->hv_clock
.tsc_to_system_mul
);
2722 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2725 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2726 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2727 vcpu
->last_guest_tsc
= tsc_timestamp
;
2729 /* If the host uses TSC clocksource, then it is stable */
2731 if (use_master_clock
)
2732 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2734 vcpu
->hv_clock
.flags
= pvclock_flags
;
2736 if (vcpu
->pv_time_enabled
)
2737 kvm_setup_pvclock_page(v
);
2738 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2739 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2744 * kvmclock updates which are isolated to a given vcpu, such as
2745 * vcpu->cpu migration, should not allow system_timestamp from
2746 * the rest of the vcpus to remain static. Otherwise ntp frequency
2747 * correction applies to one vcpu's system_timestamp but not
2750 * So in those cases, request a kvmclock update for all vcpus.
2751 * We need to rate-limit these requests though, as they can
2752 * considerably slow guests that have a large number of vcpus.
2753 * The time for a remote vcpu to update its kvmclock is bound
2754 * by the delay we use to rate-limit the updates.
2757 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2759 static void kvmclock_update_fn(struct work_struct
*work
)
2762 struct delayed_work
*dwork
= to_delayed_work(work
);
2763 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2764 kvmclock_update_work
);
2765 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2766 struct kvm_vcpu
*vcpu
;
2768 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2769 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2770 kvm_vcpu_kick(vcpu
);
2774 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2776 struct kvm
*kvm
= v
->kvm
;
2778 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2779 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2780 KVMCLOCK_UPDATE_DELAY
);
2783 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2785 static void kvmclock_sync_fn(struct work_struct
*work
)
2787 struct delayed_work
*dwork
= to_delayed_work(work
);
2788 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2789 kvmclock_sync_work
);
2790 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2792 if (!kvmclock_periodic_sync
)
2795 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2796 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2797 KVMCLOCK_SYNC_PERIOD
);
2801 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2803 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
2805 /* McStatusWrEn enabled? */
2806 if (guest_cpuid_is_amd_or_hygon(vcpu
))
2807 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
2812 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2814 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2815 unsigned bank_num
= mcg_cap
& 0xff;
2816 u32 msr
= msr_info
->index
;
2817 u64 data
= msr_info
->data
;
2820 case MSR_IA32_MCG_STATUS
:
2821 vcpu
->arch
.mcg_status
= data
;
2823 case MSR_IA32_MCG_CTL
:
2824 if (!(mcg_cap
& MCG_CTL_P
) &&
2825 (data
|| !msr_info
->host_initiated
))
2827 if (data
!= 0 && data
!= ~(u64
)0)
2829 vcpu
->arch
.mcg_ctl
= data
;
2832 if (msr
>= MSR_IA32_MC0_CTL
&&
2833 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2834 u32 offset
= array_index_nospec(
2835 msr
- MSR_IA32_MC0_CTL
,
2836 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
2838 /* only 0 or all 1s can be written to IA32_MCi_CTL
2839 * some Linux kernels though clear bit 10 in bank 4 to
2840 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2841 * this to avoid an uncatched #GP in the guest
2843 if ((offset
& 0x3) == 0 &&
2844 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2848 if (!msr_info
->host_initiated
&&
2849 (offset
& 0x3) == 1 && data
!= 0) {
2850 if (!can_set_mci_status(vcpu
))
2854 vcpu
->arch
.mce_banks
[offset
] = data
;
2862 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2864 struct kvm
*kvm
= vcpu
->kvm
;
2865 int lm
= is_long_mode(vcpu
);
2866 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2867 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2868 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2869 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2870 u32 page_num
= data
& ~PAGE_MASK
;
2871 u64 page_addr
= data
& PAGE_MASK
;
2874 if (page_num
>= blob_size
)
2877 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2879 return PTR_ERR(page
);
2881 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
)) {
2888 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
2890 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
2892 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
2895 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2897 gpa_t gpa
= data
& ~0x3f;
2899 /* Bits 4:5 are reserved, Should be zero */
2903 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
2904 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
2907 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
2908 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
2911 if (!lapic_in_kernel(vcpu
))
2912 return data
? 1 : 0;
2914 vcpu
->arch
.apf
.msr_en_val
= data
;
2916 if (!kvm_pv_async_pf_enabled(vcpu
)) {
2917 kvm_clear_async_pf_completion_queue(vcpu
);
2918 kvm_async_pf_hash_reset(vcpu
);
2922 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2926 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2927 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2929 kvm_async_pf_wakeup_all(vcpu
);
2934 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
2936 /* Bits 8-63 are reserved */
2940 if (!lapic_in_kernel(vcpu
))
2943 vcpu
->arch
.apf
.msr_int_val
= data
;
2945 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
2950 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2952 vcpu
->arch
.pv_time_enabled
= false;
2953 vcpu
->arch
.time
= 0;
2956 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
2958 ++vcpu
->stat
.tlb_flush
;
2959 kvm_x86_ops
.tlb_flush_all(vcpu
);
2962 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
2964 ++vcpu
->stat
.tlb_flush
;
2965 kvm_x86_ops
.tlb_flush_guest(vcpu
);
2968 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2970 struct kvm_host_map map
;
2971 struct kvm_steal_time
*st
;
2973 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2976 /* -EAGAIN is returned in atomic context so we can just return. */
2977 if (kvm_map_gfn(vcpu
, vcpu
->arch
.st
.msr_val
>> PAGE_SHIFT
,
2978 &map
, &vcpu
->arch
.st
.cache
, false))
2982 offset_in_page(vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
);
2985 * Doing a TLB flush here, on the guest's behalf, can avoid
2988 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
2989 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
2990 st
->preempted
& KVM_VCPU_FLUSH_TLB
);
2991 if (xchg(&st
->preempted
, 0) & KVM_VCPU_FLUSH_TLB
)
2992 kvm_vcpu_flush_tlb_guest(vcpu
);
2995 vcpu
->arch
.st
.preempted
= 0;
2997 if (st
->version
& 1)
2998 st
->version
+= 1; /* first time write, random junk */
3004 st
->steal
+= current
->sched_info
.run_delay
-
3005 vcpu
->arch
.st
.last_steal
;
3006 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3012 kvm_unmap_gfn(vcpu
, &map
, &vcpu
->arch
.st
.cache
, true, false);
3015 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3018 u32 msr
= msr_info
->index
;
3019 u64 data
= msr_info
->data
;
3022 case MSR_AMD64_NB_CFG
:
3023 case MSR_IA32_UCODE_WRITE
:
3024 case MSR_VM_HSAVE_PA
:
3025 case MSR_AMD64_PATCH_LOADER
:
3026 case MSR_AMD64_BU_CFG2
:
3027 case MSR_AMD64_DC_CFG
:
3028 case MSR_F15H_EX_CFG
:
3031 case MSR_IA32_UCODE_REV
:
3032 if (msr_info
->host_initiated
)
3033 vcpu
->arch
.microcode_version
= data
;
3035 case MSR_IA32_ARCH_CAPABILITIES
:
3036 if (!msr_info
->host_initiated
)
3038 vcpu
->arch
.arch_capabilities
= data
;
3040 case MSR_IA32_PERF_CAPABILITIES
: {
3041 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3043 if (!msr_info
->host_initiated
)
3045 if (guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
) && kvm_get_msr_feature(&msr_ent
))
3047 if (data
& ~msr_ent
.data
)
3050 vcpu
->arch
.perf_capabilities
= data
;
3055 return set_efer(vcpu
, msr_info
);
3057 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3058 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3059 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3061 /* Handle McStatusWrEn */
3062 if (data
== BIT_ULL(18)) {
3063 vcpu
->arch
.msr_hwcr
= data
;
3064 } else if (data
!= 0) {
3065 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3070 case MSR_FAM10H_MMIO_CONF_BASE
:
3072 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3077 case 0x200 ... 0x2ff:
3078 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3079 case MSR_IA32_APICBASE
:
3080 return kvm_set_apic_base(vcpu
, msr_info
);
3081 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3082 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3083 case MSR_IA32_TSCDEADLINE
:
3084 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3086 case MSR_IA32_TSC_ADJUST
:
3087 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3088 if (!msr_info
->host_initiated
) {
3089 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3090 adjust_tsc_offset_guest(vcpu
, adj
);
3092 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3095 case MSR_IA32_MISC_ENABLE
:
3096 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3097 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3098 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3100 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3101 kvm_update_cpuid_runtime(vcpu
);
3103 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3106 case MSR_IA32_SMBASE
:
3107 if (!msr_info
->host_initiated
)
3109 vcpu
->arch
.smbase
= data
;
3111 case MSR_IA32_POWER_CTL
:
3112 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3115 if (msr_info
->host_initiated
) {
3116 kvm_synchronize_tsc(vcpu
, data
);
3118 u64 adj
= kvm_compute_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3119 adjust_tsc_offset_guest(vcpu
, adj
);
3120 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3124 if (!msr_info
->host_initiated
&&
3125 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3128 * KVM supports exposing PT to the guest, but does not support
3129 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3130 * XSAVES/XRSTORS to save/restore PT MSRs.
3132 if (data
& ~supported_xss
)
3134 vcpu
->arch
.ia32_xss
= data
;
3137 if (!msr_info
->host_initiated
)
3139 vcpu
->arch
.smi_count
= data
;
3141 case MSR_KVM_WALL_CLOCK_NEW
:
3142 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3145 kvm_write_wall_clock(vcpu
->kvm
, data
);
3147 case MSR_KVM_WALL_CLOCK
:
3148 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3151 kvm_write_wall_clock(vcpu
->kvm
, data
);
3153 case MSR_KVM_SYSTEM_TIME_NEW
:
3154 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3157 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3159 case MSR_KVM_SYSTEM_TIME
:
3160 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3163 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3165 case MSR_KVM_ASYNC_PF_EN
:
3166 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3169 if (kvm_pv_enable_async_pf(vcpu
, data
))
3172 case MSR_KVM_ASYNC_PF_INT
:
3173 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3176 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3179 case MSR_KVM_ASYNC_PF_ACK
:
3180 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3183 vcpu
->arch
.apf
.pageready_pending
= false;
3184 kvm_check_async_pf_completion(vcpu
);
3187 case MSR_KVM_STEAL_TIME
:
3188 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3191 if (unlikely(!sched_info_on()))
3194 if (data
& KVM_STEAL_RESERVED_MASK
)
3197 vcpu
->arch
.st
.msr_val
= data
;
3199 if (!(data
& KVM_MSR_ENABLED
))
3202 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3205 case MSR_KVM_PV_EOI_EN
:
3206 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3209 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
3213 case MSR_KVM_POLL_CONTROL
:
3214 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3217 /* only enable bit supported */
3218 if (data
& (-1ULL << 1))
3221 vcpu
->arch
.msr_kvm_poll_control
= data
;
3224 case MSR_IA32_MCG_CTL
:
3225 case MSR_IA32_MCG_STATUS
:
3226 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3227 return set_msr_mce(vcpu
, msr_info
);
3229 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3230 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3233 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3234 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3235 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3236 return kvm_pmu_set_msr(vcpu
, msr_info
);
3238 if (pr
|| data
!= 0)
3239 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3240 "0x%x data 0x%llx\n", msr
, data
);
3242 case MSR_K7_CLK_CTL
:
3244 * Ignore all writes to this no longer documented MSR.
3245 * Writes are only relevant for old K7 processors,
3246 * all pre-dating SVM, but a recommended workaround from
3247 * AMD for these chips. It is possible to specify the
3248 * affected processor models on the command line, hence
3249 * the need to ignore the workaround.
3252 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3253 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3254 case HV_X64_MSR_SYNDBG_OPTIONS
:
3255 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3256 case HV_X64_MSR_CRASH_CTL
:
3257 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3258 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3259 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3260 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3261 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3262 msr_info
->host_initiated
);
3263 case MSR_IA32_BBL_CR_CTL3
:
3264 /* Drop writes to this legacy MSR -- see rdmsr
3265 * counterpart for further detail.
3267 if (report_ignored_msrs
)
3268 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3271 case MSR_AMD64_OSVW_ID_LENGTH
:
3272 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3274 vcpu
->arch
.osvw
.length
= data
;
3276 case MSR_AMD64_OSVW_STATUS
:
3277 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3279 vcpu
->arch
.osvw
.status
= data
;
3281 case MSR_PLATFORM_INFO
:
3282 if (!msr_info
->host_initiated
||
3283 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3284 cpuid_fault_enabled(vcpu
)))
3286 vcpu
->arch
.msr_platform_info
= data
;
3288 case MSR_MISC_FEATURES_ENABLES
:
3289 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3290 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3291 !supports_cpuid_fault(vcpu
)))
3293 vcpu
->arch
.msr_misc_features_enables
= data
;
3296 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
3297 return xen_hvm_config(vcpu
, data
);
3298 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3299 return kvm_pmu_set_msr(vcpu
, msr_info
);
3300 return KVM_MSR_RET_INVALID
;
3304 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3306 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3309 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3310 unsigned bank_num
= mcg_cap
& 0xff;
3313 case MSR_IA32_P5_MC_ADDR
:
3314 case MSR_IA32_P5_MC_TYPE
:
3317 case MSR_IA32_MCG_CAP
:
3318 data
= vcpu
->arch
.mcg_cap
;
3320 case MSR_IA32_MCG_CTL
:
3321 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3323 data
= vcpu
->arch
.mcg_ctl
;
3325 case MSR_IA32_MCG_STATUS
:
3326 data
= vcpu
->arch
.mcg_status
;
3329 if (msr
>= MSR_IA32_MC0_CTL
&&
3330 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3331 u32 offset
= array_index_nospec(
3332 msr
- MSR_IA32_MC0_CTL
,
3333 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3335 data
= vcpu
->arch
.mce_banks
[offset
];
3344 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3346 switch (msr_info
->index
) {
3347 case MSR_IA32_PLATFORM_ID
:
3348 case MSR_IA32_EBL_CR_POWERON
:
3349 case MSR_IA32_LASTBRANCHFROMIP
:
3350 case MSR_IA32_LASTBRANCHTOIP
:
3351 case MSR_IA32_LASTINTFROMIP
:
3352 case MSR_IA32_LASTINTTOIP
:
3354 case MSR_K8_TSEG_ADDR
:
3355 case MSR_K8_TSEG_MASK
:
3356 case MSR_VM_HSAVE_PA
:
3357 case MSR_K8_INT_PENDING_MSG
:
3358 case MSR_AMD64_NB_CFG
:
3359 case MSR_FAM10H_MMIO_CONF_BASE
:
3360 case MSR_AMD64_BU_CFG2
:
3361 case MSR_IA32_PERF_CTL
:
3362 case MSR_AMD64_DC_CFG
:
3363 case MSR_F15H_EX_CFG
:
3365 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3366 * limit) MSRs. Just return 0, as we do not want to expose the host
3367 * data here. Do not conditionalize this on CPUID, as KVM does not do
3368 * so for existing CPU-specific MSRs.
3370 case MSR_RAPL_POWER_UNIT
:
3371 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3372 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3373 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3374 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3377 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3378 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3379 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3380 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3381 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3382 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3383 return kvm_pmu_get_msr(vcpu
, msr_info
);
3386 case MSR_IA32_UCODE_REV
:
3387 msr_info
->data
= vcpu
->arch
.microcode_version
;
3389 case MSR_IA32_ARCH_CAPABILITIES
:
3390 if (!msr_info
->host_initiated
&&
3391 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3393 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3395 case MSR_IA32_PERF_CAPABILITIES
:
3396 if (!msr_info
->host_initiated
&&
3397 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3399 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3401 case MSR_IA32_POWER_CTL
:
3402 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3404 case MSR_IA32_TSC
: {
3406 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3407 * even when not intercepted. AMD manual doesn't explicitly
3408 * state this but appears to behave the same.
3410 * On userspace reads and writes, however, we unconditionally
3411 * return L1's TSC value to ensure backwards-compatible
3412 * behavior for migration.
3414 u64 tsc_offset
= msr_info
->host_initiated
? vcpu
->arch
.l1_tsc_offset
:
3415 vcpu
->arch
.tsc_offset
;
3417 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + tsc_offset
;
3421 case 0x200 ... 0x2ff:
3422 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3423 case 0xcd: /* fsb frequency */
3427 * MSR_EBC_FREQUENCY_ID
3428 * Conservative value valid for even the basic CPU models.
3429 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3430 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3431 * and 266MHz for model 3, or 4. Set Core Clock
3432 * Frequency to System Bus Frequency Ratio to 1 (bits
3433 * 31:24) even though these are only valid for CPU
3434 * models > 2, however guests may end up dividing or
3435 * multiplying by zero otherwise.
3437 case MSR_EBC_FREQUENCY_ID
:
3438 msr_info
->data
= 1 << 24;
3440 case MSR_IA32_APICBASE
:
3441 msr_info
->data
= kvm_get_apic_base(vcpu
);
3443 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3444 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3445 case MSR_IA32_TSCDEADLINE
:
3446 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3448 case MSR_IA32_TSC_ADJUST
:
3449 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3451 case MSR_IA32_MISC_ENABLE
:
3452 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3454 case MSR_IA32_SMBASE
:
3455 if (!msr_info
->host_initiated
)
3457 msr_info
->data
= vcpu
->arch
.smbase
;
3460 msr_info
->data
= vcpu
->arch
.smi_count
;
3462 case MSR_IA32_PERF_STATUS
:
3463 /* TSC increment by tick */
3464 msr_info
->data
= 1000ULL;
3465 /* CPU multiplier */
3466 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3469 msr_info
->data
= vcpu
->arch
.efer
;
3471 case MSR_KVM_WALL_CLOCK
:
3472 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3475 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3477 case MSR_KVM_WALL_CLOCK_NEW
:
3478 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3481 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3483 case MSR_KVM_SYSTEM_TIME
:
3484 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3487 msr_info
->data
= vcpu
->arch
.time
;
3489 case MSR_KVM_SYSTEM_TIME_NEW
:
3490 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3493 msr_info
->data
= vcpu
->arch
.time
;
3495 case MSR_KVM_ASYNC_PF_EN
:
3496 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3499 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
3501 case MSR_KVM_ASYNC_PF_INT
:
3502 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3505 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
3507 case MSR_KVM_ASYNC_PF_ACK
:
3508 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3513 case MSR_KVM_STEAL_TIME
:
3514 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3517 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3519 case MSR_KVM_PV_EOI_EN
:
3520 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3523 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3525 case MSR_KVM_POLL_CONTROL
:
3526 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3529 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3531 case MSR_IA32_P5_MC_ADDR
:
3532 case MSR_IA32_P5_MC_TYPE
:
3533 case MSR_IA32_MCG_CAP
:
3534 case MSR_IA32_MCG_CTL
:
3535 case MSR_IA32_MCG_STATUS
:
3536 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3537 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3538 msr_info
->host_initiated
);
3540 if (!msr_info
->host_initiated
&&
3541 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3543 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3545 case MSR_K7_CLK_CTL
:
3547 * Provide expected ramp-up count for K7. All other
3548 * are set to zero, indicating minimum divisors for
3551 * This prevents guest kernels on AMD host with CPU
3552 * type 6, model 8 and higher from exploding due to
3553 * the rdmsr failing.
3555 msr_info
->data
= 0x20000000;
3557 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3558 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3559 case HV_X64_MSR_SYNDBG_OPTIONS
:
3560 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3561 case HV_X64_MSR_CRASH_CTL
:
3562 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3563 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3564 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3565 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3566 return kvm_hv_get_msr_common(vcpu
,
3567 msr_info
->index
, &msr_info
->data
,
3568 msr_info
->host_initiated
);
3569 case MSR_IA32_BBL_CR_CTL3
:
3570 /* This legacy MSR exists but isn't fully documented in current
3571 * silicon. It is however accessed by winxp in very narrow
3572 * scenarios where it sets bit #19, itself documented as
3573 * a "reserved" bit. Best effort attempt to source coherent
3574 * read data here should the balance of the register be
3575 * interpreted by the guest:
3577 * L2 cache control register 3: 64GB range, 256KB size,
3578 * enabled, latency 0x1, configured
3580 msr_info
->data
= 0xbe702111;
3582 case MSR_AMD64_OSVW_ID_LENGTH
:
3583 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3585 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3587 case MSR_AMD64_OSVW_STATUS
:
3588 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3590 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3592 case MSR_PLATFORM_INFO
:
3593 if (!msr_info
->host_initiated
&&
3594 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3596 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3598 case MSR_MISC_FEATURES_ENABLES
:
3599 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3602 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3605 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3606 return kvm_pmu_get_msr(vcpu
, msr_info
);
3607 return KVM_MSR_RET_INVALID
;
3611 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3614 * Read or write a bunch of msrs. All parameters are kernel addresses.
3616 * @return number of msrs set successfully.
3618 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3619 struct kvm_msr_entry
*entries
,
3620 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3621 unsigned index
, u64
*data
))
3625 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3626 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3633 * Read or write a bunch of msrs. Parameters are user addresses.
3635 * @return number of msrs set successfully.
3637 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3638 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3639 unsigned index
, u64
*data
),
3642 struct kvm_msrs msrs
;
3643 struct kvm_msr_entry
*entries
;
3648 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3652 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3655 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3656 entries
= memdup_user(user_msrs
->entries
, size
);
3657 if (IS_ERR(entries
)) {
3658 r
= PTR_ERR(entries
);
3662 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
3667 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
3678 static inline bool kvm_can_mwait_in_guest(void)
3680 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
3681 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
3682 boot_cpu_has(X86_FEATURE_ARAT
);
3685 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
3686 struct kvm_cpuid2 __user
*cpuid_arg
)
3688 struct kvm_cpuid2 cpuid
;
3692 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3695 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3700 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
3706 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
3711 case KVM_CAP_IRQCHIP
:
3713 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
3714 case KVM_CAP_SET_TSS_ADDR
:
3715 case KVM_CAP_EXT_CPUID
:
3716 case KVM_CAP_EXT_EMUL_CPUID
:
3717 case KVM_CAP_CLOCKSOURCE
:
3719 case KVM_CAP_NOP_IO_DELAY
:
3720 case KVM_CAP_MP_STATE
:
3721 case KVM_CAP_SYNC_MMU
:
3722 case KVM_CAP_USER_NMI
:
3723 case KVM_CAP_REINJECT_CONTROL
:
3724 case KVM_CAP_IRQ_INJECT_STATUS
:
3725 case KVM_CAP_IOEVENTFD
:
3726 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
3728 case KVM_CAP_PIT_STATE2
:
3729 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
3730 case KVM_CAP_XEN_HVM
:
3731 case KVM_CAP_VCPU_EVENTS
:
3732 case KVM_CAP_HYPERV
:
3733 case KVM_CAP_HYPERV_VAPIC
:
3734 case KVM_CAP_HYPERV_SPIN
:
3735 case KVM_CAP_HYPERV_SYNIC
:
3736 case KVM_CAP_HYPERV_SYNIC2
:
3737 case KVM_CAP_HYPERV_VP_INDEX
:
3738 case KVM_CAP_HYPERV_EVENTFD
:
3739 case KVM_CAP_HYPERV_TLBFLUSH
:
3740 case KVM_CAP_HYPERV_SEND_IPI
:
3741 case KVM_CAP_HYPERV_CPUID
:
3742 case KVM_CAP_SYS_HYPERV_CPUID
:
3743 case KVM_CAP_PCI_SEGMENT
:
3744 case KVM_CAP_DEBUGREGS
:
3745 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
3747 case KVM_CAP_ASYNC_PF
:
3748 case KVM_CAP_ASYNC_PF_INT
:
3749 case KVM_CAP_GET_TSC_KHZ
:
3750 case KVM_CAP_KVMCLOCK_CTRL
:
3751 case KVM_CAP_READONLY_MEM
:
3752 case KVM_CAP_HYPERV_TIME
:
3753 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
3754 case KVM_CAP_TSC_DEADLINE_TIMER
:
3755 case KVM_CAP_DISABLE_QUIRKS
:
3756 case KVM_CAP_SET_BOOT_CPU_ID
:
3757 case KVM_CAP_SPLIT_IRQCHIP
:
3758 case KVM_CAP_IMMEDIATE_EXIT
:
3759 case KVM_CAP_PMU_EVENT_FILTER
:
3760 case KVM_CAP_GET_MSR_FEATURES
:
3761 case KVM_CAP_MSR_PLATFORM_INFO
:
3762 case KVM_CAP_EXCEPTION_PAYLOAD
:
3763 case KVM_CAP_SET_GUEST_DEBUG
:
3764 case KVM_CAP_LAST_CPU
:
3765 case KVM_CAP_X86_USER_SPACE_MSR
:
3766 case KVM_CAP_X86_MSR_FILTER
:
3767 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
3770 case KVM_CAP_SYNC_REGS
:
3771 r
= KVM_SYNC_X86_VALID_FIELDS
;
3773 case KVM_CAP_ADJUST_CLOCK
:
3774 r
= KVM_CLOCK_TSC_STABLE
;
3776 case KVM_CAP_X86_DISABLE_EXITS
:
3777 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
3778 KVM_X86_DISABLE_EXITS_CSTATE
;
3779 if(kvm_can_mwait_in_guest())
3780 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
3782 case KVM_CAP_X86_SMM
:
3783 /* SMBASE is usually relocated above 1M on modern chipsets,
3784 * and SMM handlers might indeed rely on 4G segment limits,
3785 * so do not report SMM to be available if real mode is
3786 * emulated via vm86 mode. Still, do not go to great lengths
3787 * to avoid userspace's usage of the feature, because it is a
3788 * fringe case that is not enabled except via specific settings
3789 * of the module parameters.
3791 r
= kvm_x86_ops
.has_emulated_msr(kvm
, MSR_IA32_SMBASE
);
3794 r
= !kvm_x86_ops
.cpu_has_accelerated_tpr();
3796 case KVM_CAP_NR_VCPUS
:
3797 r
= KVM_SOFT_MAX_VCPUS
;
3799 case KVM_CAP_MAX_VCPUS
:
3802 case KVM_CAP_MAX_VCPU_ID
:
3803 r
= KVM_MAX_VCPU_ID
;
3805 case KVM_CAP_PV_MMU
: /* obsolete */
3809 r
= KVM_MAX_MCE_BANKS
;
3812 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
3814 case KVM_CAP_TSC_CONTROL
:
3815 r
= kvm_has_tsc_control
;
3817 case KVM_CAP_X2APIC_API
:
3818 r
= KVM_X2APIC_API_VALID_FLAGS
;
3820 case KVM_CAP_NESTED_STATE
:
3821 r
= kvm_x86_ops
.nested_ops
->get_state
?
3822 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
3824 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
3825 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
3827 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
3828 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
3830 case KVM_CAP_SMALLER_MAXPHYADDR
:
3831 r
= (int) allow_smaller_maxphyaddr
;
3833 case KVM_CAP_STEAL_TIME
:
3834 r
= sched_info_on();
3836 case KVM_CAP_X86_BUS_LOCK_EXIT
:
3837 if (kvm_has_bus_lock_exit
)
3838 r
= KVM_BUS_LOCK_DETECTION_OFF
|
3839 KVM_BUS_LOCK_DETECTION_EXIT
;
3850 long kvm_arch_dev_ioctl(struct file
*filp
,
3851 unsigned int ioctl
, unsigned long arg
)
3853 void __user
*argp
= (void __user
*)arg
;
3857 case KVM_GET_MSR_INDEX_LIST
: {
3858 struct kvm_msr_list __user
*user_msr_list
= argp
;
3859 struct kvm_msr_list msr_list
;
3863 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3866 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
3867 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3870 if (n
< msr_list
.nmsrs
)
3873 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
3874 num_msrs_to_save
* sizeof(u32
)))
3876 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
3878 num_emulated_msrs
* sizeof(u32
)))
3883 case KVM_GET_SUPPORTED_CPUID
:
3884 case KVM_GET_EMULATED_CPUID
: {
3885 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3886 struct kvm_cpuid2 cpuid
;
3889 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3892 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
3898 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
3903 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
3905 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
3906 sizeof(kvm_mce_cap_supported
)))
3910 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
3911 struct kvm_msr_list __user
*user_msr_list
= argp
;
3912 struct kvm_msr_list msr_list
;
3916 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3919 msr_list
.nmsrs
= num_msr_based_features
;
3920 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3923 if (n
< msr_list
.nmsrs
)
3926 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
3927 num_msr_based_features
* sizeof(u32
)))
3933 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
3935 case KVM_GET_SUPPORTED_HV_CPUID
:
3936 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
3946 static void wbinvd_ipi(void *garbage
)
3951 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3953 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
3956 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
3958 /* Address WBINVD may be executed by guest */
3959 if (need_emulate_wbinvd(vcpu
)) {
3960 if (kvm_x86_ops
.has_wbinvd_exit())
3961 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
3962 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
3963 smp_call_function_single(vcpu
->cpu
,
3964 wbinvd_ipi
, NULL
, 1);
3967 kvm_x86_ops
.vcpu_load(vcpu
, cpu
);
3969 /* Save host pkru register if supported */
3970 vcpu
->arch
.host_pkru
= read_pkru();
3972 /* Apply any externally detected TSC adjustments (due to suspend) */
3973 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
3974 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
3975 vcpu
->arch
.tsc_offset_adjustment
= 0;
3976 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3979 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
3980 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3981 rdtsc() - vcpu
->arch
.last_host_tsc
;
3983 mark_tsc_unstable("KVM discovered backwards TSC");
3985 if (kvm_check_tsc_unstable()) {
3986 u64 offset
= kvm_compute_tsc_offset(vcpu
,
3987 vcpu
->arch
.last_guest_tsc
);
3988 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
3989 vcpu
->arch
.tsc_catchup
= 1;
3992 if (kvm_lapic_hv_timer_in_use(vcpu
))
3993 kvm_lapic_restart_hv_timer(vcpu
);
3996 * On a host with synchronized TSC, there is no need to update
3997 * kvmclock on vcpu->cpu migration
3999 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4000 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4001 if (vcpu
->cpu
!= cpu
)
4002 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4006 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4009 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4011 struct kvm_host_map map
;
4012 struct kvm_steal_time
*st
;
4015 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4018 if (vcpu
->arch
.st
.preempted
)
4022 * Take the srcu lock as memslots will be accessed to check the gfn
4023 * cache generation against the memslots generation.
4025 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4027 if (kvm_map_gfn(vcpu
, vcpu
->arch
.st
.msr_val
>> PAGE_SHIFT
, &map
,
4028 &vcpu
->arch
.st
.cache
, true))
4032 offset_in_page(vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
);
4034 st
->preempted
= vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4036 kvm_unmap_gfn(vcpu
, &map
, &vcpu
->arch
.st
.cache
, true, true);
4039 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4042 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4044 if (vcpu
->preempted
&& !vcpu
->arch
.guest_state_protected
)
4045 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
.get_cpl(vcpu
);
4047 kvm_steal_time_set_preempted(vcpu
);
4048 kvm_x86_ops
.vcpu_put(vcpu
);
4049 vcpu
->arch
.last_host_tsc
= rdtsc();
4051 * If userspace has set any breakpoints or watchpoints, dr6 is restored
4052 * on every vmexit, but if not, we might have a stale dr6 from the
4053 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4058 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4059 struct kvm_lapic_state
*s
)
4061 if (vcpu
->arch
.apicv_active
)
4062 kvm_x86_ops
.sync_pir_to_irr(vcpu
);
4064 return kvm_apic_get_state(vcpu
, s
);
4067 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4068 struct kvm_lapic_state
*s
)
4072 r
= kvm_apic_set_state(vcpu
, s
);
4075 update_cr8_intercept(vcpu
);
4080 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4083 * We can accept userspace's request for interrupt injection
4084 * as long as we have a place to store the interrupt number.
4085 * The actual injection will happen when the CPU is able to
4086 * deliver the interrupt.
4088 if (kvm_cpu_has_extint(vcpu
))
4091 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4092 return (!lapic_in_kernel(vcpu
) ||
4093 kvm_apic_accept_pic_intr(vcpu
));
4096 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4098 return kvm_arch_interrupt_allowed(vcpu
) &&
4099 kvm_cpu_accept_dm_intr(vcpu
);
4102 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4103 struct kvm_interrupt
*irq
)
4105 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4108 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4109 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4110 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4115 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4116 * fail for in-kernel 8259.
4118 if (pic_in_kernel(vcpu
->kvm
))
4121 if (vcpu
->arch
.pending_external_vector
!= -1)
4124 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4125 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4129 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4131 kvm_inject_nmi(vcpu
);
4136 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4138 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4143 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4144 struct kvm_tpr_access_ctl
*tac
)
4148 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4152 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4156 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4159 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4161 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4164 vcpu
->arch
.mcg_cap
= mcg_cap
;
4165 /* Init IA32_MCG_CTL to all 1s */
4166 if (mcg_cap
& MCG_CTL_P
)
4167 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4168 /* Init IA32_MCi_CTL to all 1s */
4169 for (bank
= 0; bank
< bank_num
; bank
++)
4170 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4172 kvm_x86_ops
.setup_mce(vcpu
);
4177 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4178 struct kvm_x86_mce
*mce
)
4180 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4181 unsigned bank_num
= mcg_cap
& 0xff;
4182 u64
*banks
= vcpu
->arch
.mce_banks
;
4184 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4187 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4188 * reporting is disabled
4190 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4191 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4193 banks
+= 4 * mce
->bank
;
4195 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4196 * reporting is disabled for the bank
4198 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4200 if (mce
->status
& MCI_STATUS_UC
) {
4201 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4202 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4203 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4206 if (banks
[1] & MCI_STATUS_VAL
)
4207 mce
->status
|= MCI_STATUS_OVER
;
4208 banks
[2] = mce
->addr
;
4209 banks
[3] = mce
->misc
;
4210 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4211 banks
[1] = mce
->status
;
4212 kvm_queue_exception(vcpu
, MC_VECTOR
);
4213 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4214 || !(banks
[1] & MCI_STATUS_UC
)) {
4215 if (banks
[1] & MCI_STATUS_VAL
)
4216 mce
->status
|= MCI_STATUS_OVER
;
4217 banks
[2] = mce
->addr
;
4218 banks
[3] = mce
->misc
;
4219 banks
[1] = mce
->status
;
4221 banks
[1] |= MCI_STATUS_OVER
;
4225 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4226 struct kvm_vcpu_events
*events
)
4230 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
4234 * In guest mode, payload delivery should be deferred,
4235 * so that the L1 hypervisor can intercept #PF before
4236 * CR2 is modified (or intercept #DB before DR6 is
4237 * modified under nVMX). Unless the per-VM capability,
4238 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4239 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4240 * opportunistically defer the exception payload, deliver it if the
4241 * capability hasn't been requested before processing a
4242 * KVM_GET_VCPU_EVENTS.
4244 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4245 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4246 kvm_deliver_exception_payload(vcpu
);
4249 * The API doesn't provide the instruction length for software
4250 * exceptions, so don't report them. As long as the guest RIP
4251 * isn't advanced, we should expect to encounter the exception
4254 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4255 events
->exception
.injected
= 0;
4256 events
->exception
.pending
= 0;
4258 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4259 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4261 * For ABI compatibility, deliberately conflate
4262 * pending and injected exceptions when
4263 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4265 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4266 events
->exception
.injected
|=
4267 vcpu
->arch
.exception
.pending
;
4269 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4270 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4271 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4272 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4273 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4275 events
->interrupt
.injected
=
4276 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4277 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4278 events
->interrupt
.soft
= 0;
4279 events
->interrupt
.shadow
= kvm_x86_ops
.get_interrupt_shadow(vcpu
);
4281 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4282 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4283 events
->nmi
.masked
= kvm_x86_ops
.get_nmi_mask(vcpu
);
4284 events
->nmi
.pad
= 0;
4286 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4288 events
->smi
.smm
= is_smm(vcpu
);
4289 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4290 events
->smi
.smm_inside_nmi
=
4291 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4292 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4294 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4295 | KVM_VCPUEVENT_VALID_SHADOW
4296 | KVM_VCPUEVENT_VALID_SMM
);
4297 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4298 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4300 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4303 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
);
4305 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4306 struct kvm_vcpu_events
*events
)
4308 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4309 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4310 | KVM_VCPUEVENT_VALID_SHADOW
4311 | KVM_VCPUEVENT_VALID_SMM
4312 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4315 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4316 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4318 if (events
->exception
.pending
)
4319 events
->exception
.injected
= 0;
4321 events
->exception_has_payload
= 0;
4323 events
->exception
.pending
= 0;
4324 events
->exception_has_payload
= 0;
4327 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4328 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4331 /* INITs are latched while in SMM */
4332 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4333 (events
->smi
.smm
|| events
->smi
.pending
) &&
4334 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4338 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4339 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4340 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4341 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4342 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4343 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4344 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4346 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4347 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4348 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4349 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4350 kvm_x86_ops
.set_interrupt_shadow(vcpu
,
4351 events
->interrupt
.shadow
);
4353 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4354 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
4355 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
4356 kvm_x86_ops
.set_nmi_mask(vcpu
, events
->nmi
.masked
);
4358 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
4359 lapic_in_kernel(vcpu
))
4360 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
4362 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
4363 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
4364 if (events
->smi
.smm
)
4365 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
4367 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
4368 kvm_smm_changed(vcpu
);
4371 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
4373 if (events
->smi
.smm
) {
4374 if (events
->smi
.smm_inside_nmi
)
4375 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
4377 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
4380 if (lapic_in_kernel(vcpu
)) {
4381 if (events
->smi
.latched_init
)
4382 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4384 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4388 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4393 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
4394 struct kvm_debugregs
*dbgregs
)
4398 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
4399 kvm_get_dr(vcpu
, 6, &val
);
4401 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4403 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4406 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4407 struct kvm_debugregs
*dbgregs
)
4412 if (dbgregs
->dr6
& ~0xffffffffull
)
4414 if (dbgregs
->dr7
& ~0xffffffffull
)
4417 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4418 kvm_update_dr0123(vcpu
);
4419 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4420 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4421 kvm_update_dr7(vcpu
);
4426 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4428 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
4430 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4431 u64 xstate_bv
= xsave
->header
.xfeatures
;
4435 * Copy legacy XSAVE area, to avoid complications with CPUID
4436 * leaves 0 and 1 in the loop below.
4438 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
4441 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
4442 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
4445 * Copy each region from the possibly compacted offset to the
4446 * non-compacted offset.
4448 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4450 u64 xfeature_mask
= valid
& -valid
;
4451 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4452 void *src
= get_xsave_addr(xsave
, xfeature_nr
);
4455 u32 size
, offset
, ecx
, edx
;
4456 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4457 &size
, &offset
, &ecx
, &edx
);
4458 if (xfeature_nr
== XFEATURE_PKRU
)
4459 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
4460 sizeof(vcpu
->arch
.pkru
));
4462 memcpy(dest
+ offset
, src
, size
);
4466 valid
-= xfeature_mask
;
4470 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
4472 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4473 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
4477 * Copy legacy XSAVE area, to avoid complications with CPUID
4478 * leaves 0 and 1 in the loop below.
4480 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
4482 /* Set XSTATE_BV and possibly XCOMP_BV. */
4483 xsave
->header
.xfeatures
= xstate_bv
;
4484 if (boot_cpu_has(X86_FEATURE_XSAVES
))
4485 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
4488 * Copy each region from the non-compacted offset to the
4489 * possibly compacted offset.
4491 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4493 u64 xfeature_mask
= valid
& -valid
;
4494 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4495 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
4498 u32 size
, offset
, ecx
, edx
;
4499 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4500 &size
, &offset
, &ecx
, &edx
);
4501 if (xfeature_nr
== XFEATURE_PKRU
)
4502 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
4503 sizeof(vcpu
->arch
.pkru
));
4505 memcpy(dest
, src
+ offset
, size
);
4508 valid
-= xfeature_mask
;
4512 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4513 struct kvm_xsave
*guest_xsave
)
4515 if (!vcpu
->arch
.guest_fpu
)
4518 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4519 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
4520 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
4522 memcpy(guest_xsave
->region
,
4523 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
4524 sizeof(struct fxregs_state
));
4525 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
4526 XFEATURE_MASK_FPSSE
;
4530 #define XSAVE_MXCSR_OFFSET 24
4532 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4533 struct kvm_xsave
*guest_xsave
)
4538 if (!vcpu
->arch
.guest_fpu
)
4541 xstate_bv
= *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
4542 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
4544 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4546 * Here we allow setting states that are not present in
4547 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4548 * with old userspace.
4550 if (xstate_bv
& ~supported_xcr0
|| mxcsr
& ~mxcsr_feature_mask
)
4552 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
4554 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
4555 mxcsr
& ~mxcsr_feature_mask
)
4557 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
4558 guest_xsave
->region
, sizeof(struct fxregs_state
));
4563 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4564 struct kvm_xcrs
*guest_xcrs
)
4566 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4567 guest_xcrs
->nr_xcrs
= 0;
4571 guest_xcrs
->nr_xcrs
= 1;
4572 guest_xcrs
->flags
= 0;
4573 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4574 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4577 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4578 struct kvm_xcrs
*guest_xcrs
)
4582 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4585 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4588 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4589 /* Only support XCR0 currently */
4590 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4591 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4592 guest_xcrs
->xcrs
[i
].value
);
4601 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4602 * stopped by the hypervisor. This function will be called from the host only.
4603 * EINVAL is returned when the host attempts to set the flag for a guest that
4604 * does not support pv clocks.
4606 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4608 if (!vcpu
->arch
.pv_time_enabled
)
4610 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4611 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4615 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4616 struct kvm_enable_cap
*cap
)
4619 uint16_t vmcs_version
;
4620 void __user
*user_ptr
;
4626 case KVM_CAP_HYPERV_SYNIC2
:
4631 case KVM_CAP_HYPERV_SYNIC
:
4632 if (!irqchip_in_kernel(vcpu
->kvm
))
4634 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
4635 KVM_CAP_HYPERV_SYNIC2
);
4636 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4637 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
4639 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
4641 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
4642 if (copy_to_user(user_ptr
, &vmcs_version
,
4643 sizeof(vmcs_version
)))
4647 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4648 if (!kvm_x86_ops
.enable_direct_tlbflush
)
4651 return kvm_x86_ops
.enable_direct_tlbflush(vcpu
);
4653 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4654 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
4655 if (vcpu
->arch
.pv_cpuid
.enforce
)
4656 kvm_update_pv_runtime(vcpu
);
4665 long kvm_arch_vcpu_ioctl(struct file
*filp
,
4666 unsigned int ioctl
, unsigned long arg
)
4668 struct kvm_vcpu
*vcpu
= filp
->private_data
;
4669 void __user
*argp
= (void __user
*)arg
;
4672 struct kvm_lapic_state
*lapic
;
4673 struct kvm_xsave
*xsave
;
4674 struct kvm_xcrs
*xcrs
;
4682 case KVM_GET_LAPIC
: {
4684 if (!lapic_in_kernel(vcpu
))
4686 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
4687 GFP_KERNEL_ACCOUNT
);
4692 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
4696 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
4701 case KVM_SET_LAPIC
: {
4703 if (!lapic_in_kernel(vcpu
))
4705 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
4706 if (IS_ERR(u
.lapic
)) {
4707 r
= PTR_ERR(u
.lapic
);
4711 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
4714 case KVM_INTERRUPT
: {
4715 struct kvm_interrupt irq
;
4718 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
4720 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
4724 r
= kvm_vcpu_ioctl_nmi(vcpu
);
4728 r
= kvm_vcpu_ioctl_smi(vcpu
);
4731 case KVM_SET_CPUID
: {
4732 struct kvm_cpuid __user
*cpuid_arg
= argp
;
4733 struct kvm_cpuid cpuid
;
4736 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4738 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4741 case KVM_SET_CPUID2
: {
4742 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4743 struct kvm_cpuid2 cpuid
;
4746 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4748 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
4749 cpuid_arg
->entries
);
4752 case KVM_GET_CPUID2
: {
4753 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4754 struct kvm_cpuid2 cpuid
;
4757 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4759 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
4760 cpuid_arg
->entries
);
4764 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4769 case KVM_GET_MSRS
: {
4770 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4771 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
4772 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4775 case KVM_SET_MSRS
: {
4776 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4777 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
4778 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4781 case KVM_TPR_ACCESS_REPORTING
: {
4782 struct kvm_tpr_access_ctl tac
;
4785 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
4787 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
4791 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
4796 case KVM_SET_VAPIC_ADDR
: {
4797 struct kvm_vapic_addr va
;
4801 if (!lapic_in_kernel(vcpu
))
4804 if (copy_from_user(&va
, argp
, sizeof(va
)))
4806 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4807 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
4808 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4811 case KVM_X86_SETUP_MCE
: {
4815 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
4817 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
4820 case KVM_X86_SET_MCE
: {
4821 struct kvm_x86_mce mce
;
4824 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
4826 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
4829 case KVM_GET_VCPU_EVENTS
: {
4830 struct kvm_vcpu_events events
;
4832 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
4835 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
4840 case KVM_SET_VCPU_EVENTS
: {
4841 struct kvm_vcpu_events events
;
4844 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
4847 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
4850 case KVM_GET_DEBUGREGS
: {
4851 struct kvm_debugregs dbgregs
;
4853 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
4856 if (copy_to_user(argp
, &dbgregs
,
4857 sizeof(struct kvm_debugregs
)))
4862 case KVM_SET_DEBUGREGS
: {
4863 struct kvm_debugregs dbgregs
;
4866 if (copy_from_user(&dbgregs
, argp
,
4867 sizeof(struct kvm_debugregs
)))
4870 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
4873 case KVM_GET_XSAVE
: {
4874 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
4879 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
4882 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
4887 case KVM_SET_XSAVE
: {
4888 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
4889 if (IS_ERR(u
.xsave
)) {
4890 r
= PTR_ERR(u
.xsave
);
4894 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
4897 case KVM_GET_XCRS
: {
4898 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
4903 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
4906 if (copy_to_user(argp
, u
.xcrs
,
4907 sizeof(struct kvm_xcrs
)))
4912 case KVM_SET_XCRS
: {
4913 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
4914 if (IS_ERR(u
.xcrs
)) {
4915 r
= PTR_ERR(u
.xcrs
);
4919 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
4922 case KVM_SET_TSC_KHZ
: {
4926 user_tsc_khz
= (u32
)arg
;
4928 if (kvm_has_tsc_control
&&
4929 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
4932 if (user_tsc_khz
== 0)
4933 user_tsc_khz
= tsc_khz
;
4935 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
4940 case KVM_GET_TSC_KHZ
: {
4941 r
= vcpu
->arch
.virtual_tsc_khz
;
4944 case KVM_KVMCLOCK_CTRL
: {
4945 r
= kvm_set_guest_paused(vcpu
);
4948 case KVM_ENABLE_CAP
: {
4949 struct kvm_enable_cap cap
;
4952 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4954 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
4957 case KVM_GET_NESTED_STATE
: {
4958 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
4962 if (!kvm_x86_ops
.nested_ops
->get_state
)
4965 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
4967 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
4970 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
4975 if (r
> user_data_size
) {
4976 if (put_user(r
, &user_kvm_nested_state
->size
))
4986 case KVM_SET_NESTED_STATE
: {
4987 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
4988 struct kvm_nested_state kvm_state
;
4992 if (!kvm_x86_ops
.nested_ops
->set_state
)
4996 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5000 if (kvm_state
.size
< sizeof(kvm_state
))
5003 if (kvm_state
.flags
&
5004 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5005 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5006 | KVM_STATE_NESTED_GIF_SET
))
5009 /* nested_run_pending implies guest_mode. */
5010 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5011 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5014 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5015 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5016 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5019 case KVM_GET_SUPPORTED_HV_CPUID
:
5020 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5032 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5034 return VM_FAULT_SIGBUS
;
5037 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5041 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5043 ret
= kvm_x86_ops
.set_tss_addr(kvm
, addr
);
5047 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5050 return kvm_x86_ops
.set_identity_map_addr(kvm
, ident_addr
);
5053 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5054 unsigned long kvm_nr_mmu_pages
)
5056 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5059 mutex_lock(&kvm
->slots_lock
);
5061 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5062 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5064 mutex_unlock(&kvm
->slots_lock
);
5068 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5070 return kvm
->arch
.n_max_mmu_pages
;
5073 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5075 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5079 switch (chip
->chip_id
) {
5080 case KVM_IRQCHIP_PIC_MASTER
:
5081 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5082 sizeof(struct kvm_pic_state
));
5084 case KVM_IRQCHIP_PIC_SLAVE
:
5085 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5086 sizeof(struct kvm_pic_state
));
5088 case KVM_IRQCHIP_IOAPIC
:
5089 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5098 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5100 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5104 switch (chip
->chip_id
) {
5105 case KVM_IRQCHIP_PIC_MASTER
:
5106 spin_lock(&pic
->lock
);
5107 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5108 sizeof(struct kvm_pic_state
));
5109 spin_unlock(&pic
->lock
);
5111 case KVM_IRQCHIP_PIC_SLAVE
:
5112 spin_lock(&pic
->lock
);
5113 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5114 sizeof(struct kvm_pic_state
));
5115 spin_unlock(&pic
->lock
);
5117 case KVM_IRQCHIP_IOAPIC
:
5118 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5124 kvm_pic_update_irq(pic
);
5128 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5130 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5132 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5134 mutex_lock(&kps
->lock
);
5135 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5136 mutex_unlock(&kps
->lock
);
5140 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5143 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5145 mutex_lock(&pit
->pit_state
.lock
);
5146 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5147 for (i
= 0; i
< 3; i
++)
5148 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5149 mutex_unlock(&pit
->pit_state
.lock
);
5153 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5155 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5156 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5157 sizeof(ps
->channels
));
5158 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5159 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5160 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5164 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5168 u32 prev_legacy
, cur_legacy
;
5169 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5171 mutex_lock(&pit
->pit_state
.lock
);
5172 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5173 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5174 if (!prev_legacy
&& cur_legacy
)
5176 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5177 sizeof(pit
->pit_state
.channels
));
5178 pit
->pit_state
.flags
= ps
->flags
;
5179 for (i
= 0; i
< 3; i
++)
5180 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5182 mutex_unlock(&pit
->pit_state
.lock
);
5186 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5187 struct kvm_reinject_control
*control
)
5189 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5191 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5192 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5193 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5195 mutex_lock(&pit
->pit_state
.lock
);
5196 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5197 mutex_unlock(&pit
->pit_state
.lock
);
5202 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5205 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5207 if (kvm_x86_ops
.flush_log_dirty
)
5208 kvm_x86_ops
.flush_log_dirty(kvm
);
5211 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5214 if (!irqchip_in_kernel(kvm
))
5217 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5218 irq_event
->irq
, irq_event
->level
,
5223 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5224 struct kvm_enable_cap
*cap
)
5232 case KVM_CAP_DISABLE_QUIRKS
:
5233 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5236 case KVM_CAP_SPLIT_IRQCHIP
: {
5237 mutex_lock(&kvm
->lock
);
5239 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5240 goto split_irqchip_unlock
;
5242 if (irqchip_in_kernel(kvm
))
5243 goto split_irqchip_unlock
;
5244 if (kvm
->created_vcpus
)
5245 goto split_irqchip_unlock
;
5246 r
= kvm_setup_empty_irq_routing(kvm
);
5248 goto split_irqchip_unlock
;
5249 /* Pairs with irqchip_in_kernel. */
5251 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5252 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5254 split_irqchip_unlock
:
5255 mutex_unlock(&kvm
->lock
);
5258 case KVM_CAP_X2APIC_API
:
5260 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
5263 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
5264 kvm
->arch
.x2apic_format
= true;
5265 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
5266 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
5270 case KVM_CAP_X86_DISABLE_EXITS
:
5272 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
5275 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
5276 kvm_can_mwait_in_guest())
5277 kvm
->arch
.mwait_in_guest
= true;
5278 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
5279 kvm
->arch
.hlt_in_guest
= true;
5280 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
5281 kvm
->arch
.pause_in_guest
= true;
5282 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
5283 kvm
->arch
.cstate_in_guest
= true;
5286 case KVM_CAP_MSR_PLATFORM_INFO
:
5287 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
5290 case KVM_CAP_EXCEPTION_PAYLOAD
:
5291 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
5294 case KVM_CAP_X86_USER_SPACE_MSR
:
5295 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
5298 case KVM_CAP_X86_BUS_LOCK_EXIT
:
5300 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
5303 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
5304 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
5307 if (kvm_has_bus_lock_exit
&&
5308 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
5309 kvm
->arch
.bus_lock_detection_enabled
= true;
5319 static void kvm_clear_msr_filter(struct kvm
*kvm
)
5322 u32 count
= kvm
->arch
.msr_filter
.count
;
5323 struct msr_bitmap_range ranges
[16];
5325 mutex_lock(&kvm
->lock
);
5326 kvm
->arch
.msr_filter
.count
= 0;
5327 memcpy(ranges
, kvm
->arch
.msr_filter
.ranges
, count
* sizeof(ranges
[0]));
5328 mutex_unlock(&kvm
->lock
);
5329 synchronize_srcu(&kvm
->srcu
);
5331 for (i
= 0; i
< count
; i
++)
5332 kfree(ranges
[i
].bitmap
);
5335 static int kvm_add_msr_filter(struct kvm
*kvm
, struct kvm_msr_filter_range
*user_range
)
5337 struct msr_bitmap_range
*ranges
= kvm
->arch
.msr_filter
.ranges
;
5338 struct msr_bitmap_range range
;
5339 unsigned long *bitmap
= NULL
;
5343 if (!user_range
->nmsrs
)
5346 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
5347 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
5350 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
5352 return PTR_ERR(bitmap
);
5354 range
= (struct msr_bitmap_range
) {
5355 .flags
= user_range
->flags
,
5356 .base
= user_range
->base
,
5357 .nmsrs
= user_range
->nmsrs
,
5361 if (range
.flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
)) {
5371 /* Everything ok, add this range identifier to our global pool */
5372 ranges
[kvm
->arch
.msr_filter
.count
] = range
;
5373 /* Make sure we filled the array before we tell anyone to walk it */
5375 kvm
->arch
.msr_filter
.count
++;
5383 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
5385 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
5386 struct kvm_msr_filter filter
;
5392 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
5395 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
5396 empty
&= !filter
.ranges
[i
].nmsrs
;
5398 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
5399 if (empty
&& !default_allow
)
5402 kvm_clear_msr_filter(kvm
);
5404 kvm
->arch
.msr_filter
.default_allow
= default_allow
;
5407 * Protect from concurrent calls to this function that could trigger
5408 * a TOCTOU violation on kvm->arch.msr_filter.count.
5410 mutex_lock(&kvm
->lock
);
5411 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
5412 r
= kvm_add_msr_filter(kvm
, &filter
.ranges
[i
]);
5417 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
5418 mutex_unlock(&kvm
->lock
);
5423 long kvm_arch_vm_ioctl(struct file
*filp
,
5424 unsigned int ioctl
, unsigned long arg
)
5426 struct kvm
*kvm
= filp
->private_data
;
5427 void __user
*argp
= (void __user
*)arg
;
5430 * This union makes it completely explicit to gcc-3.x
5431 * that these two variables' stack usage should be
5432 * combined, not added together.
5435 struct kvm_pit_state ps
;
5436 struct kvm_pit_state2 ps2
;
5437 struct kvm_pit_config pit_config
;
5441 case KVM_SET_TSS_ADDR
:
5442 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
5444 case KVM_SET_IDENTITY_MAP_ADDR
: {
5447 mutex_lock(&kvm
->lock
);
5449 if (kvm
->created_vcpus
)
5450 goto set_identity_unlock
;
5452 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
5453 goto set_identity_unlock
;
5454 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
5455 set_identity_unlock
:
5456 mutex_unlock(&kvm
->lock
);
5459 case KVM_SET_NR_MMU_PAGES
:
5460 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
5462 case KVM_GET_NR_MMU_PAGES
:
5463 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
5465 case KVM_CREATE_IRQCHIP
: {
5466 mutex_lock(&kvm
->lock
);
5469 if (irqchip_in_kernel(kvm
))
5470 goto create_irqchip_unlock
;
5473 if (kvm
->created_vcpus
)
5474 goto create_irqchip_unlock
;
5476 r
= kvm_pic_init(kvm
);
5478 goto create_irqchip_unlock
;
5480 r
= kvm_ioapic_init(kvm
);
5482 kvm_pic_destroy(kvm
);
5483 goto create_irqchip_unlock
;
5486 r
= kvm_setup_default_irq_routing(kvm
);
5488 kvm_ioapic_destroy(kvm
);
5489 kvm_pic_destroy(kvm
);
5490 goto create_irqchip_unlock
;
5492 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5494 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
5495 create_irqchip_unlock
:
5496 mutex_unlock(&kvm
->lock
);
5499 case KVM_CREATE_PIT
:
5500 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
5502 case KVM_CREATE_PIT2
:
5504 if (copy_from_user(&u
.pit_config
, argp
,
5505 sizeof(struct kvm_pit_config
)))
5508 mutex_lock(&kvm
->lock
);
5511 goto create_pit_unlock
;
5513 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
5517 mutex_unlock(&kvm
->lock
);
5519 case KVM_GET_IRQCHIP
: {
5520 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5521 struct kvm_irqchip
*chip
;
5523 chip
= memdup_user(argp
, sizeof(*chip
));
5530 if (!irqchip_kernel(kvm
))
5531 goto get_irqchip_out
;
5532 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
5534 goto get_irqchip_out
;
5536 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
5537 goto get_irqchip_out
;
5543 case KVM_SET_IRQCHIP
: {
5544 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5545 struct kvm_irqchip
*chip
;
5547 chip
= memdup_user(argp
, sizeof(*chip
));
5554 if (!irqchip_kernel(kvm
))
5555 goto set_irqchip_out
;
5556 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
5563 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
5566 if (!kvm
->arch
.vpit
)
5568 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
5572 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
5579 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
5581 mutex_lock(&kvm
->lock
);
5583 if (!kvm
->arch
.vpit
)
5585 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
5587 mutex_unlock(&kvm
->lock
);
5590 case KVM_GET_PIT2
: {
5592 if (!kvm
->arch
.vpit
)
5594 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
5598 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
5603 case KVM_SET_PIT2
: {
5605 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
5607 mutex_lock(&kvm
->lock
);
5609 if (!kvm
->arch
.vpit
)
5611 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
5613 mutex_unlock(&kvm
->lock
);
5616 case KVM_REINJECT_CONTROL
: {
5617 struct kvm_reinject_control control
;
5619 if (copy_from_user(&control
, argp
, sizeof(control
)))
5622 if (!kvm
->arch
.vpit
)
5624 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
5627 case KVM_SET_BOOT_CPU_ID
:
5629 mutex_lock(&kvm
->lock
);
5630 if (kvm
->created_vcpus
)
5633 kvm
->arch
.bsp_vcpu_id
= arg
;
5634 mutex_unlock(&kvm
->lock
);
5636 case KVM_XEN_HVM_CONFIG
: {
5637 struct kvm_xen_hvm_config xhc
;
5639 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
5644 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
5648 case KVM_SET_CLOCK
: {
5649 struct kvm_clock_data user_ns
;
5653 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
5662 * TODO: userspace has to take care of races with VCPU_RUN, so
5663 * kvm_gen_update_masterclock() can be cut down to locked
5664 * pvclock_update_vm_gtod_copy().
5666 kvm_gen_update_masterclock(kvm
);
5667 now_ns
= get_kvmclock_ns(kvm
);
5668 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
5669 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
5672 case KVM_GET_CLOCK
: {
5673 struct kvm_clock_data user_ns
;
5676 now_ns
= get_kvmclock_ns(kvm
);
5677 user_ns
.clock
= now_ns
;
5678 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
5679 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
5682 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
5687 case KVM_MEMORY_ENCRYPT_OP
: {
5689 if (kvm_x86_ops
.mem_enc_op
)
5690 r
= kvm_x86_ops
.mem_enc_op(kvm
, argp
);
5693 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
5694 struct kvm_enc_region region
;
5697 if (copy_from_user(®ion
, argp
, sizeof(region
)))
5701 if (kvm_x86_ops
.mem_enc_reg_region
)
5702 r
= kvm_x86_ops
.mem_enc_reg_region(kvm
, ®ion
);
5705 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
5706 struct kvm_enc_region region
;
5709 if (copy_from_user(®ion
, argp
, sizeof(region
)))
5713 if (kvm_x86_ops
.mem_enc_unreg_region
)
5714 r
= kvm_x86_ops
.mem_enc_unreg_region(kvm
, ®ion
);
5717 case KVM_HYPERV_EVENTFD
: {
5718 struct kvm_hyperv_eventfd hvevfd
;
5721 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
5723 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
5726 case KVM_SET_PMU_EVENT_FILTER
:
5727 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
5729 case KVM_X86_SET_MSR_FILTER
:
5730 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
5739 static void kvm_init_msr_list(void)
5741 struct x86_pmu_capability x86_pmu
;
5745 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
5746 "Please update the fixed PMCs in msrs_to_saved_all[]");
5748 perf_get_x86_pmu_capability(&x86_pmu
);
5750 num_msrs_to_save
= 0;
5751 num_emulated_msrs
= 0;
5752 num_msr_based_features
= 0;
5754 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
5755 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
5759 * Even MSRs that are valid in the host may not be exposed
5760 * to the guests in some cases.
5762 switch (msrs_to_save_all
[i
]) {
5763 case MSR_IA32_BNDCFGS
:
5764 if (!kvm_mpx_supported())
5768 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
))
5771 case MSR_IA32_UMWAIT_CONTROL
:
5772 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
5775 case MSR_IA32_RTIT_CTL
:
5776 case MSR_IA32_RTIT_STATUS
:
5777 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
5780 case MSR_IA32_RTIT_CR3_MATCH
:
5781 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5782 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
5785 case MSR_IA32_RTIT_OUTPUT_BASE
:
5786 case MSR_IA32_RTIT_OUTPUT_MASK
:
5787 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5788 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
5789 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
5792 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
5793 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5794 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
5795 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
5798 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
5799 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
5800 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
5803 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
5804 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
5805 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
5812 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
5815 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
5816 if (!kvm_x86_ops
.has_emulated_msr(NULL
, emulated_msrs_all
[i
]))
5819 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
5822 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
5823 struct kvm_msr_entry msr
;
5825 msr
.index
= msr_based_features_all
[i
];
5826 if (kvm_get_msr_feature(&msr
))
5829 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
5833 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
5841 if (!(lapic_in_kernel(vcpu
) &&
5842 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
5843 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5854 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
5861 if (!(lapic_in_kernel(vcpu
) &&
5862 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
5864 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5866 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
5876 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
5877 struct kvm_segment
*var
, int seg
)
5879 kvm_x86_ops
.set_segment(vcpu
, var
, seg
);
5882 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
5883 struct kvm_segment
*var
, int seg
)
5885 kvm_x86_ops
.get_segment(vcpu
, var
, seg
);
5888 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
5889 struct x86_exception
*exception
)
5893 BUG_ON(!mmu_is_nested(vcpu
));
5895 /* NPT walks are always user-walks */
5896 access
|= PFERR_USER_MASK
;
5897 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
5902 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
5903 struct x86_exception
*exception
)
5905 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5906 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5909 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
5910 struct x86_exception
*exception
)
5912 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5913 access
|= PFERR_FETCH_MASK
;
5914 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5917 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
5918 struct x86_exception
*exception
)
5920 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5921 access
|= PFERR_WRITE_MASK
;
5922 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5925 /* uses this to access any guest's mapped memory without checking CPL */
5926 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
5927 struct x86_exception
*exception
)
5929 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
5932 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
5933 struct kvm_vcpu
*vcpu
, u32 access
,
5934 struct x86_exception
*exception
)
5937 int r
= X86EMUL_CONTINUE
;
5940 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
5942 unsigned offset
= addr
& (PAGE_SIZE
-1);
5943 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
5946 if (gpa
== UNMAPPED_GVA
)
5947 return X86EMUL_PROPAGATE_FAULT
;
5948 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
5951 r
= X86EMUL_IO_NEEDED
;
5963 /* used for instruction fetching */
5964 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
5965 gva_t addr
, void *val
, unsigned int bytes
,
5966 struct x86_exception
*exception
)
5968 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5969 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5973 /* Inline kvm_read_guest_virt_helper for speed. */
5974 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
5976 if (unlikely(gpa
== UNMAPPED_GVA
))
5977 return X86EMUL_PROPAGATE_FAULT
;
5979 offset
= addr
& (PAGE_SIZE
-1);
5980 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
5981 bytes
= (unsigned)PAGE_SIZE
- offset
;
5982 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
5984 if (unlikely(ret
< 0))
5985 return X86EMUL_IO_NEEDED
;
5987 return X86EMUL_CONTINUE
;
5990 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
5991 gva_t addr
, void *val
, unsigned int bytes
,
5992 struct x86_exception
*exception
)
5994 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5997 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5998 * is returned, but our callers are not ready for that and they blindly
5999 * call kvm_inject_page_fault. Ensure that they at least do not leak
6000 * uninitialized kernel stack memory into cr2 and error code.
6002 memset(exception
, 0, sizeof(*exception
));
6003 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
6006 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
6008 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
6009 gva_t addr
, void *val
, unsigned int bytes
,
6010 struct x86_exception
*exception
, bool system
)
6012 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6015 if (!system
&& kvm_x86_ops
.get_cpl(vcpu
) == 3)
6016 access
|= PFERR_USER_MASK
;
6018 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6021 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6022 unsigned long addr
, void *val
, unsigned int bytes
)
6024 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6025 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6027 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6030 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6031 struct kvm_vcpu
*vcpu
, u32 access
,
6032 struct x86_exception
*exception
)
6035 int r
= X86EMUL_CONTINUE
;
6038 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
6041 unsigned offset
= addr
& (PAGE_SIZE
-1);
6042 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6045 if (gpa
== UNMAPPED_GVA
)
6046 return X86EMUL_PROPAGATE_FAULT
;
6047 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6049 r
= X86EMUL_IO_NEEDED
;
6061 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6062 unsigned int bytes
, struct x86_exception
*exception
,
6065 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6066 u32 access
= PFERR_WRITE_MASK
;
6068 if (!system
&& kvm_x86_ops
.get_cpl(vcpu
) == 3)
6069 access
|= PFERR_USER_MASK
;
6071 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6075 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
6076 unsigned int bytes
, struct x86_exception
*exception
)
6078 /* kvm_write_guest_virt_system can pull in tons of pages. */
6079 vcpu
->arch
.l1tf_flush_l1d
= true;
6081 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6082 PFERR_WRITE_MASK
, exception
);
6084 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
6086 int handle_ud(struct kvm_vcpu
*vcpu
)
6088 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
6089 int emul_type
= EMULTYPE_TRAP_UD
;
6090 char sig
[5]; /* ud2; .ascii "kvm" */
6091 struct x86_exception e
;
6093 if (unlikely(!kvm_x86_ops
.can_emulate_instruction(vcpu
, NULL
, 0)))
6096 if (force_emulation_prefix
&&
6097 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
6098 sig
, sizeof(sig
), &e
) == 0 &&
6099 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
6100 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
6101 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
6104 return kvm_emulate_instruction(vcpu
, emul_type
);
6106 EXPORT_SYMBOL_GPL(handle_ud
);
6108 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6109 gpa_t gpa
, bool write
)
6111 /* For APIC access vmexit */
6112 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6115 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
6116 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
6123 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6124 gpa_t
*gpa
, struct x86_exception
*exception
,
6127 u32 access
= ((kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
6128 | (write
? PFERR_WRITE_MASK
: 0);
6131 * currently PKRU is only applied to ept enabled guest so
6132 * there is no pkey in EPT page table for L1 guest or EPT
6133 * shadow page table for L2 guest.
6135 if (vcpu_match_mmio_gva(vcpu
, gva
)
6136 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
6137 vcpu
->arch
.mmio_access
, 0, access
)) {
6138 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
6139 (gva
& (PAGE_SIZE
- 1));
6140 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
6144 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6146 if (*gpa
== UNMAPPED_GVA
)
6149 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
6152 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6153 const void *val
, int bytes
)
6157 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
6160 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
6164 struct read_write_emulator_ops
{
6165 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
6167 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6168 void *val
, int bytes
);
6169 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6170 int bytes
, void *val
);
6171 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6172 void *val
, int bytes
);
6176 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
6178 if (vcpu
->mmio_read_completed
) {
6179 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
6180 vcpu
->mmio_fragments
[0].gpa
, val
);
6181 vcpu
->mmio_read_completed
= 0;
6188 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6189 void *val
, int bytes
)
6191 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
6194 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6195 void *val
, int bytes
)
6197 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
6200 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
6202 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
6203 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
6206 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6207 void *val
, int bytes
)
6209 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
6210 return X86EMUL_IO_NEEDED
;
6213 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6214 void *val
, int bytes
)
6216 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
6218 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6219 return X86EMUL_CONTINUE
;
6222 static const struct read_write_emulator_ops read_emultor
= {
6223 .read_write_prepare
= read_prepare
,
6224 .read_write_emulate
= read_emulate
,
6225 .read_write_mmio
= vcpu_mmio_read
,
6226 .read_write_exit_mmio
= read_exit_mmio
,
6229 static const struct read_write_emulator_ops write_emultor
= {
6230 .read_write_emulate
= write_emulate
,
6231 .read_write_mmio
= write_mmio
,
6232 .read_write_exit_mmio
= write_exit_mmio
,
6236 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
6238 struct x86_exception
*exception
,
6239 struct kvm_vcpu
*vcpu
,
6240 const struct read_write_emulator_ops
*ops
)
6244 bool write
= ops
->write
;
6245 struct kvm_mmio_fragment
*frag
;
6246 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6249 * If the exit was due to a NPF we may already have a GPA.
6250 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6251 * Note, this cannot be used on string operations since string
6252 * operation using rep will only have the initial GPA from the NPF
6255 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
6256 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
6257 gpa
= ctxt
->gpa_val
;
6258 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
6260 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
6262 return X86EMUL_PROPAGATE_FAULT
;
6265 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
6266 return X86EMUL_CONTINUE
;
6269 * Is this MMIO handled locally?
6271 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
6272 if (handled
== bytes
)
6273 return X86EMUL_CONTINUE
;
6279 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
6280 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
6284 return X86EMUL_CONTINUE
;
6287 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
6289 void *val
, unsigned int bytes
,
6290 struct x86_exception
*exception
,
6291 const struct read_write_emulator_ops
*ops
)
6293 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6297 if (ops
->read_write_prepare
&&
6298 ops
->read_write_prepare(vcpu
, val
, bytes
))
6299 return X86EMUL_CONTINUE
;
6301 vcpu
->mmio_nr_fragments
= 0;
6303 /* Crossing a page boundary? */
6304 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
6307 now
= -addr
& ~PAGE_MASK
;
6308 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
6311 if (rc
!= X86EMUL_CONTINUE
)
6314 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
6320 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
6322 if (rc
!= X86EMUL_CONTINUE
)
6325 if (!vcpu
->mmio_nr_fragments
)
6328 gpa
= vcpu
->mmio_fragments
[0].gpa
;
6330 vcpu
->mmio_needed
= 1;
6331 vcpu
->mmio_cur_fragment
= 0;
6333 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
6334 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
6335 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
6336 vcpu
->run
->mmio
.phys_addr
= gpa
;
6338 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
6341 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
6345 struct x86_exception
*exception
)
6347 return emulator_read_write(ctxt
, addr
, val
, bytes
,
6348 exception
, &read_emultor
);
6351 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
6355 struct x86_exception
*exception
)
6357 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
6358 exception
, &write_emultor
);
6361 #define CMPXCHG_TYPE(t, ptr, old, new) \
6362 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6364 #ifdef CONFIG_X86_64
6365 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6367 # define CMPXCHG64(ptr, old, new) \
6368 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6371 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
6376 struct x86_exception
*exception
)
6378 struct kvm_host_map map
;
6379 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6385 /* guests cmpxchg8b have to be emulated atomically */
6386 if (bytes
> 8 || (bytes
& (bytes
- 1)))
6389 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
6391 if (gpa
== UNMAPPED_GVA
||
6392 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6396 * Emulate the atomic as a straight write to avoid #AC if SLD is
6397 * enabled in the host and the access splits a cache line.
6399 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
6400 page_line_mask
= ~(cache_line_size() - 1);
6402 page_line_mask
= PAGE_MASK
;
6404 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
6407 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
6410 kaddr
= map
.hva
+ offset_in_page(gpa
);
6414 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
6417 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
6420 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
6423 exchanged
= CMPXCHG64(kaddr
, old
, new);
6429 kvm_vcpu_unmap(vcpu
, &map
, true);
6432 return X86EMUL_CMPXCHG_FAILED
;
6434 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
6436 return X86EMUL_CONTINUE
;
6439 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
6441 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
6444 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
6448 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
6449 if (vcpu
->arch
.pio
.in
)
6450 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
6451 vcpu
->arch
.pio
.size
, pd
);
6453 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
6454 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
6458 pd
+= vcpu
->arch
.pio
.size
;
6463 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
6464 unsigned short port
, void *val
,
6465 unsigned int count
, bool in
)
6467 vcpu
->arch
.pio
.port
= port
;
6468 vcpu
->arch
.pio
.in
= in
;
6469 vcpu
->arch
.pio
.count
= count
;
6470 vcpu
->arch
.pio
.size
= size
;
6472 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
6473 vcpu
->arch
.pio
.count
= 0;
6477 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
6478 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
6479 vcpu
->run
->io
.size
= size
;
6480 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
6481 vcpu
->run
->io
.count
= count
;
6482 vcpu
->run
->io
.port
= port
;
6487 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6488 unsigned short port
, void *val
, unsigned int count
)
6492 if (vcpu
->arch
.pio
.count
)
6495 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
6497 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
6500 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
6501 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
6502 vcpu
->arch
.pio
.count
= 0;
6509 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
6510 int size
, unsigned short port
, void *val
,
6513 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6517 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
6518 unsigned short port
, const void *val
,
6521 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
6522 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
6523 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
6526 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
6527 int size
, unsigned short port
,
6528 const void *val
, unsigned int count
)
6530 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6533 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
6535 return kvm_x86_ops
.get_segment_base(vcpu
, seg
);
6538 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
6540 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
6543 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
6545 if (!need_emulate_wbinvd(vcpu
))
6546 return X86EMUL_CONTINUE
;
6548 if (kvm_x86_ops
.has_wbinvd_exit()) {
6549 int cpu
= get_cpu();
6551 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
6552 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
6553 wbinvd_ipi
, NULL
, 1);
6555 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
6558 return X86EMUL_CONTINUE
;
6561 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
6563 kvm_emulate_wbinvd_noskip(vcpu
);
6564 return kvm_skip_emulated_instruction(vcpu
);
6566 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
6570 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
6572 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
6575 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6576 unsigned long *dest
)
6578 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
6581 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6582 unsigned long value
)
6585 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
6588 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
6590 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
6593 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
6595 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6596 unsigned long value
;
6600 value
= kvm_read_cr0(vcpu
);
6603 value
= vcpu
->arch
.cr2
;
6606 value
= kvm_read_cr3(vcpu
);
6609 value
= kvm_read_cr4(vcpu
);
6612 value
= kvm_get_cr8(vcpu
);
6615 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
6622 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
6624 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6629 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
6632 vcpu
->arch
.cr2
= val
;
6635 res
= kvm_set_cr3(vcpu
, val
);
6638 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
6641 res
= kvm_set_cr8(vcpu
, val
);
6644 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
6651 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
6653 return kvm_x86_ops
.get_cpl(emul_to_vcpu(ctxt
));
6656 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6658 kvm_x86_ops
.get_gdt(emul_to_vcpu(ctxt
), dt
);
6661 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6663 kvm_x86_ops
.get_idt(emul_to_vcpu(ctxt
), dt
);
6666 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6668 kvm_x86_ops
.set_gdt(emul_to_vcpu(ctxt
), dt
);
6671 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6673 kvm_x86_ops
.set_idt(emul_to_vcpu(ctxt
), dt
);
6676 static unsigned long emulator_get_cached_segment_base(
6677 struct x86_emulate_ctxt
*ctxt
, int seg
)
6679 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
6682 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
6683 struct desc_struct
*desc
, u32
*base3
,
6686 struct kvm_segment var
;
6688 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
6689 *selector
= var
.selector
;
6692 memset(desc
, 0, sizeof(*desc
));
6700 set_desc_limit(desc
, var
.limit
);
6701 set_desc_base(desc
, (unsigned long)var
.base
);
6702 #ifdef CONFIG_X86_64
6704 *base3
= var
.base
>> 32;
6706 desc
->type
= var
.type
;
6708 desc
->dpl
= var
.dpl
;
6709 desc
->p
= var
.present
;
6710 desc
->avl
= var
.avl
;
6718 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
6719 struct desc_struct
*desc
, u32 base3
,
6722 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6723 struct kvm_segment var
;
6725 var
.selector
= selector
;
6726 var
.base
= get_desc_base(desc
);
6727 #ifdef CONFIG_X86_64
6728 var
.base
|= ((u64
)base3
) << 32;
6730 var
.limit
= get_desc_limit(desc
);
6732 var
.limit
= (var
.limit
<< 12) | 0xfff;
6733 var
.type
= desc
->type
;
6734 var
.dpl
= desc
->dpl
;
6739 var
.avl
= desc
->avl
;
6740 var
.present
= desc
->p
;
6741 var
.unusable
= !var
.present
;
6744 kvm_set_segment(vcpu
, &var
, seg
);
6748 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
6749 u32 msr_index
, u64
*pdata
)
6751 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6754 r
= kvm_get_msr(vcpu
, msr_index
, pdata
);
6756 if (r
&& kvm_get_msr_user_space(vcpu
, msr_index
, r
)) {
6757 /* Bounce to user space */
6758 return X86EMUL_IO_NEEDED
;
6764 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
6765 u32 msr_index
, u64 data
)
6767 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6770 r
= kvm_set_msr(vcpu
, msr_index
, data
);
6772 if (r
&& kvm_set_msr_user_space(vcpu
, msr_index
, data
, r
)) {
6773 /* Bounce to user space */
6774 return X86EMUL_IO_NEEDED
;
6780 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
6782 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6784 return vcpu
->arch
.smbase
;
6787 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
6789 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6791 vcpu
->arch
.smbase
= smbase
;
6794 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
6797 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
6800 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
6801 u32 pmc
, u64
*pdata
)
6803 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
6806 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
6808 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
6811 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
6812 struct x86_instruction_info
*info
,
6813 enum x86_intercept_stage stage
)
6815 return kvm_x86_ops
.check_intercept(emul_to_vcpu(ctxt
), info
, stage
,
6819 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
6820 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
6823 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
6826 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
6828 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
6831 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
6833 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
6836 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
6838 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
6841 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
6843 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
6846 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
6848 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
6851 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
6853 kvm_x86_ops
.set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
6856 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
6858 return emul_to_vcpu(ctxt
)->arch
.hflags
;
6861 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
6863 emul_to_vcpu(ctxt
)->arch
.hflags
= emul_flags
;
6866 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
,
6867 const char *smstate
)
6869 return kvm_x86_ops
.pre_leave_smm(emul_to_vcpu(ctxt
), smstate
);
6872 static void emulator_post_leave_smm(struct x86_emulate_ctxt
*ctxt
)
6874 kvm_smm_changed(emul_to_vcpu(ctxt
));
6877 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
6879 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
6882 static const struct x86_emulate_ops emulate_ops
= {
6883 .read_gpr
= emulator_read_gpr
,
6884 .write_gpr
= emulator_write_gpr
,
6885 .read_std
= emulator_read_std
,
6886 .write_std
= emulator_write_std
,
6887 .read_phys
= kvm_read_guest_phys_system
,
6888 .fetch
= kvm_fetch_guest_virt
,
6889 .read_emulated
= emulator_read_emulated
,
6890 .write_emulated
= emulator_write_emulated
,
6891 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
6892 .invlpg
= emulator_invlpg
,
6893 .pio_in_emulated
= emulator_pio_in_emulated
,
6894 .pio_out_emulated
= emulator_pio_out_emulated
,
6895 .get_segment
= emulator_get_segment
,
6896 .set_segment
= emulator_set_segment
,
6897 .get_cached_segment_base
= emulator_get_cached_segment_base
,
6898 .get_gdt
= emulator_get_gdt
,
6899 .get_idt
= emulator_get_idt
,
6900 .set_gdt
= emulator_set_gdt
,
6901 .set_idt
= emulator_set_idt
,
6902 .get_cr
= emulator_get_cr
,
6903 .set_cr
= emulator_set_cr
,
6904 .cpl
= emulator_get_cpl
,
6905 .get_dr
= emulator_get_dr
,
6906 .set_dr
= emulator_set_dr
,
6907 .get_smbase
= emulator_get_smbase
,
6908 .set_smbase
= emulator_set_smbase
,
6909 .set_msr
= emulator_set_msr
,
6910 .get_msr
= emulator_get_msr
,
6911 .check_pmc
= emulator_check_pmc
,
6912 .read_pmc
= emulator_read_pmc
,
6913 .halt
= emulator_halt
,
6914 .wbinvd
= emulator_wbinvd
,
6915 .fix_hypercall
= emulator_fix_hypercall
,
6916 .intercept
= emulator_intercept
,
6917 .get_cpuid
= emulator_get_cpuid
,
6918 .guest_has_long_mode
= emulator_guest_has_long_mode
,
6919 .guest_has_movbe
= emulator_guest_has_movbe
,
6920 .guest_has_fxsr
= emulator_guest_has_fxsr
,
6921 .set_nmi_mask
= emulator_set_nmi_mask
,
6922 .get_hflags
= emulator_get_hflags
,
6923 .set_hflags
= emulator_set_hflags
,
6924 .pre_leave_smm
= emulator_pre_leave_smm
,
6925 .post_leave_smm
= emulator_post_leave_smm
,
6926 .set_xcr
= emulator_set_xcr
,
6929 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
6931 u32 int_shadow
= kvm_x86_ops
.get_interrupt_shadow(vcpu
);
6933 * an sti; sti; sequence only disable interrupts for the first
6934 * instruction. So, if the last instruction, be it emulated or
6935 * not, left the system with the INT_STI flag enabled, it
6936 * means that the last instruction is an sti. We should not
6937 * leave the flag on in this case. The same goes for mov ss
6939 if (int_shadow
& mask
)
6941 if (unlikely(int_shadow
|| mask
)) {
6942 kvm_x86_ops
.set_interrupt_shadow(vcpu
, mask
);
6944 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6948 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
6950 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6951 if (ctxt
->exception
.vector
== PF_VECTOR
)
6952 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
6954 if (ctxt
->exception
.error_code_valid
)
6955 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
6956 ctxt
->exception
.error_code
);
6958 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
6962 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
6964 struct x86_emulate_ctxt
*ctxt
;
6966 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
6968 pr_err("kvm: failed to allocate vcpu's emulator\n");
6973 ctxt
->ops
= &emulate_ops
;
6974 vcpu
->arch
.emulate_ctxt
= ctxt
;
6979 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
6981 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6984 kvm_x86_ops
.get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
6986 ctxt
->gpa_available
= false;
6987 ctxt
->eflags
= kvm_get_rflags(vcpu
);
6988 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
6990 ctxt
->eip
= kvm_rip_read(vcpu
);
6991 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
6992 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
6993 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
6994 cs_db
? X86EMUL_MODE_PROT32
:
6995 X86EMUL_MODE_PROT16
;
6996 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
6997 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
6998 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
7000 init_decode_cache(ctxt
);
7001 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7004 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
7006 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7009 init_emulate_ctxt(vcpu
);
7013 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
7014 ret
= emulate_int_real(ctxt
, irq
);
7016 if (ret
!= X86EMUL_CONTINUE
) {
7017 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
7019 ctxt
->eip
= ctxt
->_eip
;
7020 kvm_rip_write(vcpu
, ctxt
->eip
);
7021 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7024 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
7026 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
7028 ++vcpu
->stat
.insn_emulation_fail
;
7029 trace_kvm_emulate_insn_failed(vcpu
);
7031 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
7032 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7036 if (emulation_type
& EMULTYPE_SKIP
) {
7037 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7038 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7039 vcpu
->run
->internal
.ndata
= 0;
7043 kvm_queue_exception(vcpu
, UD_VECTOR
);
7045 if (!is_guest_mode(vcpu
) && kvm_x86_ops
.get_cpl(vcpu
) == 0) {
7046 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7047 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7048 vcpu
->run
->internal
.ndata
= 0;
7055 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7056 bool write_fault_to_shadow_pgtable
,
7059 gpa_t gpa
= cr2_or_gpa
;
7062 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7065 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7066 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7069 if (!vcpu
->arch
.mmu
->direct_map
) {
7071 * Write permission should be allowed since only
7072 * write access need to be emulated.
7074 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7077 * If the mapping is invalid in guest, let cpu retry
7078 * it to generate fault.
7080 if (gpa
== UNMAPPED_GVA
)
7085 * Do not retry the unhandleable instruction if it faults on the
7086 * readonly host memory, otherwise it will goto a infinite loop:
7087 * retry instruction -> write #PF -> emulation fail -> retry
7088 * instruction -> ...
7090 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
7093 * If the instruction failed on the error pfn, it can not be fixed,
7094 * report the error to userspace.
7096 if (is_error_noslot_pfn(pfn
))
7099 kvm_release_pfn_clean(pfn
);
7101 /* The instructions are well-emulated on direct mmu. */
7102 if (vcpu
->arch
.mmu
->direct_map
) {
7103 unsigned int indirect_shadow_pages
;
7105 spin_lock(&vcpu
->kvm
->mmu_lock
);
7106 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
7107 spin_unlock(&vcpu
->kvm
->mmu_lock
);
7109 if (indirect_shadow_pages
)
7110 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7116 * if emulation was due to access to shadowed page table
7117 * and it failed try to unshadow page and re-enter the
7118 * guest to let CPU execute the instruction.
7120 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7123 * If the access faults on its page table, it can not
7124 * be fixed by unprotecting shadow page and it should
7125 * be reported to userspace.
7127 return !write_fault_to_shadow_pgtable
;
7130 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
7131 gpa_t cr2_or_gpa
, int emulation_type
)
7133 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7134 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
7136 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
7137 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
7140 * If the emulation is caused by #PF and it is non-page_table
7141 * writing instruction, it means the VM-EXIT is caused by shadow
7142 * page protected, we can zap the shadow page and retry this
7143 * instruction directly.
7145 * Note: if the guest uses a non-page-table modifying instruction
7146 * on the PDE that points to the instruction, then we will unmap
7147 * the instruction and go to an infinite loop. So, we cache the
7148 * last retried eip and the last fault address, if we meet the eip
7149 * and the address again, we can break out of the potential infinite
7152 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
7154 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7157 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7158 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7161 if (x86_page_table_writing_insn(ctxt
))
7164 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
7167 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
7168 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
7170 if (!vcpu
->arch
.mmu
->direct_map
)
7171 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7173 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7178 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
7179 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
7181 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
7183 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
7184 /* This is a good place to trace that we are exiting SMM. */
7185 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
7187 /* Process a latched INIT or SMI, if any. */
7188 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7191 kvm_mmu_reset_context(vcpu
);
7194 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
7203 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
7204 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
7209 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
7211 struct kvm_run
*kvm_run
= vcpu
->run
;
7213 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
7214 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
7215 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
7216 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7217 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7220 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
7224 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
7226 unsigned long rflags
= kvm_x86_ops
.get_rflags(vcpu
);
7229 r
= kvm_x86_ops
.skip_emulated_instruction(vcpu
);
7234 * rflags is the old, "raw" value of the flags. The new value has
7235 * not been saved yet.
7237 * This is correct even for TF set by the guest, because "the
7238 * processor will not generate this exception after the instruction
7239 * that sets the TF flag".
7241 if (unlikely(rflags
& X86_EFLAGS_TF
))
7242 r
= kvm_vcpu_do_singlestep(vcpu
);
7245 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
7247 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
7249 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
7250 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
7251 struct kvm_run
*kvm_run
= vcpu
->run
;
7252 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7253 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7254 vcpu
->arch
.guest_debug_dr7
,
7258 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
7259 kvm_run
->debug
.arch
.pc
= eip
;
7260 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7261 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7267 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
7268 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
7269 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7270 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7275 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
7284 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
7286 switch (ctxt
->opcode_len
) {
7293 case 0xe6: /* OUT */
7297 case 0x6c: /* INS */
7299 case 0x6e: /* OUTS */
7306 case 0x33: /* RDPMC */
7315 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7316 int emulation_type
, void *insn
, int insn_len
)
7319 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7320 bool writeback
= true;
7321 bool write_fault_to_spt
;
7323 if (unlikely(!kvm_x86_ops
.can_emulate_instruction(vcpu
, insn
, insn_len
)))
7326 vcpu
->arch
.l1tf_flush_l1d
= true;
7329 * Clear write_fault_to_shadow_pgtable here to ensure it is
7332 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
7333 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
7334 kvm_clear_exception_queue(vcpu
);
7336 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
7337 init_emulate_ctxt(vcpu
);
7340 * We will reenter on the same instruction since
7341 * we do not set complete_userspace_io. This does not
7342 * handle watchpoints yet, those would be handled in
7345 if (!(emulation_type
& EMULTYPE_SKIP
) &&
7346 kvm_vcpu_check_breakpoint(vcpu
, &r
))
7349 ctxt
->interruptibility
= 0;
7350 ctxt
->have_exception
= false;
7351 ctxt
->exception
.vector
= -1;
7352 ctxt
->perm_ok
= false;
7354 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
7356 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
7358 trace_kvm_emulate_insn_start(vcpu
);
7359 ++vcpu
->stat
.insn_emulation
;
7360 if (r
!= EMULATION_OK
) {
7361 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
7362 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
7363 kvm_queue_exception(vcpu
, UD_VECTOR
);
7366 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
7370 if (ctxt
->have_exception
) {
7372 * #UD should result in just EMULATION_FAILED, and trap-like
7373 * exception should not be encountered during decode.
7375 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
7376 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
7377 inject_emulated_exception(vcpu
);
7380 return handle_emulation_failure(vcpu
, emulation_type
);
7384 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
7385 !is_vmware_backdoor_opcode(ctxt
)) {
7386 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7391 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7392 * for kvm_skip_emulated_instruction(). The caller is responsible for
7393 * updating interruptibility state and injecting single-step #DBs.
7395 if (emulation_type
& EMULTYPE_SKIP
) {
7396 kvm_rip_write(vcpu
, ctxt
->_eip
);
7397 if (ctxt
->eflags
& X86_EFLAGS_RF
)
7398 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
7402 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
7405 /* this is needed for vmware backdoor interface to work since it
7406 changes registers values during IO operation */
7407 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
7408 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7409 emulator_invalidate_register_cache(ctxt
);
7413 if (emulation_type
& EMULTYPE_PF
) {
7414 /* Save the faulting GPA (cr2) in the address field */
7415 ctxt
->exception
.address
= cr2_or_gpa
;
7417 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7418 if (vcpu
->arch
.mmu
->direct_map
) {
7419 ctxt
->gpa_available
= true;
7420 ctxt
->gpa_val
= cr2_or_gpa
;
7423 /* Sanitize the address out of an abundance of paranoia. */
7424 ctxt
->exception
.address
= 0;
7427 r
= x86_emulate_insn(ctxt
);
7429 if (r
== EMULATION_INTERCEPTED
)
7432 if (r
== EMULATION_FAILED
) {
7433 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
7437 return handle_emulation_failure(vcpu
, emulation_type
);
7440 if (ctxt
->have_exception
) {
7442 if (inject_emulated_exception(vcpu
))
7444 } else if (vcpu
->arch
.pio
.count
) {
7445 if (!vcpu
->arch
.pio
.in
) {
7446 /* FIXME: return into emulator if single-stepping. */
7447 vcpu
->arch
.pio
.count
= 0;
7450 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
7453 } else if (vcpu
->mmio_needed
) {
7454 ++vcpu
->stat
.mmio_exits
;
7456 if (!vcpu
->mmio_is_write
)
7459 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7460 } else if (r
== EMULATION_RESTART
)
7466 unsigned long rflags
= kvm_x86_ops
.get_rflags(vcpu
);
7467 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
7468 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7469 if (!ctxt
->have_exception
||
7470 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
7471 kvm_rip_write(vcpu
, ctxt
->eip
);
7472 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
7473 r
= kvm_vcpu_do_singlestep(vcpu
);
7474 if (kvm_x86_ops
.update_emulated_instruction
)
7475 kvm_x86_ops
.update_emulated_instruction(vcpu
);
7476 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
7480 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7481 * do nothing, and it will be requested again as soon as
7482 * the shadow expires. But we still need to check here,
7483 * because POPF has no interrupt shadow.
7485 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
7486 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7488 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
7493 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
7495 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
7497 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
7499 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
7500 void *insn
, int insn_len
)
7502 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
7504 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
7506 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
7508 vcpu
->arch
.pio
.count
= 0;
7512 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
7514 vcpu
->arch
.pio
.count
= 0;
7516 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
7519 return kvm_skip_emulated_instruction(vcpu
);
7522 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7523 unsigned short port
)
7525 unsigned long val
= kvm_rax_read(vcpu
);
7526 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
7532 * Workaround userspace that relies on old KVM behavior of %rip being
7533 * incremented prior to exiting to userspace to handle "OUT 0x7e".
7536 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
7537 vcpu
->arch
.complete_userspace_io
=
7538 complete_fast_pio_out_port_0x7e
;
7539 kvm_skip_emulated_instruction(vcpu
);
7541 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
7542 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
7547 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
7551 /* We should only ever be called with arch.pio.count equal to 1 */
7552 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
7554 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
7555 vcpu
->arch
.pio
.count
= 0;
7559 /* For size less than 4 we merge, else we zero extend */
7560 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
7563 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7564 * the copy and tracing
7566 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
7567 kvm_rax_write(vcpu
, val
);
7569 return kvm_skip_emulated_instruction(vcpu
);
7572 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7573 unsigned short port
)
7578 /* For size less than 4 we merge, else we zero extend */
7579 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
7581 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
7583 kvm_rax_write(vcpu
, val
);
7587 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
7588 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
7593 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
7598 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
7600 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
7601 return ret
&& kvm_skip_emulated_instruction(vcpu
);
7603 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
7605 static int kvmclock_cpu_down_prep(unsigned int cpu
)
7607 __this_cpu_write(cpu_tsc_khz
, 0);
7611 static void tsc_khz_changed(void *data
)
7613 struct cpufreq_freqs
*freq
= data
;
7614 unsigned long khz
= 0;
7618 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
7619 khz
= cpufreq_quick_get(raw_smp_processor_id());
7622 __this_cpu_write(cpu_tsc_khz
, khz
);
7625 #ifdef CONFIG_X86_64
7626 static void kvm_hyperv_tsc_notifier(void)
7629 struct kvm_vcpu
*vcpu
;
7632 mutex_lock(&kvm_lock
);
7633 list_for_each_entry(kvm
, &vm_list
, vm_list
)
7634 kvm_make_mclock_inprogress_request(kvm
);
7636 hyperv_stop_tsc_emulation();
7638 /* TSC frequency always matches when on Hyper-V */
7639 for_each_present_cpu(cpu
)
7640 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
7641 kvm_max_guest_tsc_khz
= tsc_khz
;
7643 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7644 struct kvm_arch
*ka
= &kvm
->arch
;
7646 spin_lock(&ka
->pvclock_gtod_sync_lock
);
7648 pvclock_update_vm_gtod_copy(kvm
);
7650 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
7651 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7653 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
7654 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
7656 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
7658 mutex_unlock(&kvm_lock
);
7662 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
7665 struct kvm_vcpu
*vcpu
;
7666 int i
, send_ipi
= 0;
7669 * We allow guests to temporarily run on slowing clocks,
7670 * provided we notify them after, or to run on accelerating
7671 * clocks, provided we notify them before. Thus time never
7674 * However, we have a problem. We can't atomically update
7675 * the frequency of a given CPU from this function; it is
7676 * merely a notifier, which can be called from any CPU.
7677 * Changing the TSC frequency at arbitrary points in time
7678 * requires a recomputation of local variables related to
7679 * the TSC for each VCPU. We must flag these local variables
7680 * to be updated and be sure the update takes place with the
7681 * new frequency before any guests proceed.
7683 * Unfortunately, the combination of hotplug CPU and frequency
7684 * change creates an intractable locking scenario; the order
7685 * of when these callouts happen is undefined with respect to
7686 * CPU hotplug, and they can race with each other. As such,
7687 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7688 * undefined; you can actually have a CPU frequency change take
7689 * place in between the computation of X and the setting of the
7690 * variable. To protect against this problem, all updates of
7691 * the per_cpu tsc_khz variable are done in an interrupt
7692 * protected IPI, and all callers wishing to update the value
7693 * must wait for a synchronous IPI to complete (which is trivial
7694 * if the caller is on the CPU already). This establishes the
7695 * necessary total order on variable updates.
7697 * Note that because a guest time update may take place
7698 * anytime after the setting of the VCPU's request bit, the
7699 * correct TSC value must be set before the request. However,
7700 * to ensure the update actually makes it to any guest which
7701 * starts running in hardware virtualization between the set
7702 * and the acquisition of the spinlock, we must also ping the
7703 * CPU after setting the request bit.
7707 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
7709 mutex_lock(&kvm_lock
);
7710 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7711 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7712 if (vcpu
->cpu
!= cpu
)
7714 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7715 if (vcpu
->cpu
!= raw_smp_processor_id())
7719 mutex_unlock(&kvm_lock
);
7721 if (freq
->old
< freq
->new && send_ipi
) {
7723 * We upscale the frequency. Must make the guest
7724 * doesn't see old kvmclock values while running with
7725 * the new frequency, otherwise we risk the guest sees
7726 * time go backwards.
7728 * In case we update the frequency for another cpu
7729 * (which might be in guest context) send an interrupt
7730 * to kick the cpu out of guest context. Next time
7731 * guest context is entered kvmclock will be updated,
7732 * so the guest will not see stale values.
7734 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
7738 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
7741 struct cpufreq_freqs
*freq
= data
;
7744 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
7746 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
7749 for_each_cpu(cpu
, freq
->policy
->cpus
)
7750 __kvmclock_cpufreq_notifier(freq
, cpu
);
7755 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
7756 .notifier_call
= kvmclock_cpufreq_notifier
7759 static int kvmclock_cpu_online(unsigned int cpu
)
7761 tsc_khz_changed(NULL
);
7765 static void kvm_timer_init(void)
7767 max_tsc_khz
= tsc_khz
;
7769 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
7770 #ifdef CONFIG_CPU_FREQ
7771 struct cpufreq_policy
*policy
;
7775 policy
= cpufreq_cpu_get(cpu
);
7777 if (policy
->cpuinfo
.max_freq
)
7778 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
7779 cpufreq_cpu_put(policy
);
7783 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
7784 CPUFREQ_TRANSITION_NOTIFIER
);
7787 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
7788 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
7791 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
7792 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
7794 int kvm_is_in_guest(void)
7796 return __this_cpu_read(current_vcpu
) != NULL
;
7799 static int kvm_is_user_mode(void)
7803 if (__this_cpu_read(current_vcpu
))
7804 user_mode
= kvm_x86_ops
.get_cpl(__this_cpu_read(current_vcpu
));
7806 return user_mode
!= 0;
7809 static unsigned long kvm_get_guest_ip(void)
7811 unsigned long ip
= 0;
7813 if (__this_cpu_read(current_vcpu
))
7814 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
7819 static void kvm_handle_intel_pt_intr(void)
7821 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
7823 kvm_make_request(KVM_REQ_PMI
, vcpu
);
7824 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
7825 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
7828 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
7829 .is_in_guest
= kvm_is_in_guest
,
7830 .is_user_mode
= kvm_is_user_mode
,
7831 .get_guest_ip
= kvm_get_guest_ip
,
7832 .handle_intel_pt_intr
= kvm_handle_intel_pt_intr
,
7835 #ifdef CONFIG_X86_64
7836 static void pvclock_gtod_update_fn(struct work_struct
*work
)
7840 struct kvm_vcpu
*vcpu
;
7843 mutex_lock(&kvm_lock
);
7844 list_for_each_entry(kvm
, &vm_list
, vm_list
)
7845 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7846 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7847 atomic_set(&kvm_guest_has_master_clock
, 0);
7848 mutex_unlock(&kvm_lock
);
7851 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
7854 * Notification about pvclock gtod data update.
7856 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
7859 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
7860 struct timekeeper
*tk
= priv
;
7862 update_pvclock_gtod(tk
);
7864 /* disable master clock if host does not trust, or does not
7865 * use, TSC based clocksource.
7867 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
7868 atomic_read(&kvm_guest_has_master_clock
) != 0)
7869 queue_work(system_long_wq
, &pvclock_gtod_work
);
7874 static struct notifier_block pvclock_gtod_notifier
= {
7875 .notifier_call
= pvclock_gtod_notify
,
7879 int kvm_arch_init(void *opaque
)
7881 struct kvm_x86_init_ops
*ops
= opaque
;
7884 if (kvm_x86_ops
.hardware_enable
) {
7885 printk(KERN_ERR
"kvm: already loaded the other module\n");
7890 if (!ops
->cpu_has_kvm_support()) {
7891 pr_err_ratelimited("kvm: no hardware support\n");
7895 if (ops
->disabled_by_bios()) {
7896 pr_err_ratelimited("kvm: disabled by bios\n");
7902 * KVM explicitly assumes that the guest has an FPU and
7903 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7904 * vCPU's FPU state as a fxregs_state struct.
7906 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
7907 printk(KERN_ERR
"kvm: inadequate fpu\n");
7913 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
7914 __alignof__(struct fpu
), SLAB_ACCOUNT
,
7916 if (!x86_fpu_cache
) {
7917 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
7921 x86_emulator_cache
= kvm_alloc_emulator_cache();
7922 if (!x86_emulator_cache
) {
7923 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7924 goto out_free_x86_fpu_cache
;
7927 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
7928 if (!user_return_msrs
) {
7929 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
7930 goto out_free_x86_emulator_cache
;
7933 r
= kvm_mmu_module_init();
7935 goto out_free_percpu
;
7937 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
7938 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
7939 PT_PRESENT_MASK
, 0, sme_me_mask
);
7942 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
7944 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
7945 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
7946 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
7950 if (pi_inject_timer
== -1)
7951 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
7952 #ifdef CONFIG_X86_64
7953 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
7955 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
7956 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
7962 free_percpu(user_return_msrs
);
7963 out_free_x86_emulator_cache
:
7964 kmem_cache_destroy(x86_emulator_cache
);
7965 out_free_x86_fpu_cache
:
7966 kmem_cache_destroy(x86_fpu_cache
);
7971 void kvm_arch_exit(void)
7973 #ifdef CONFIG_X86_64
7974 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
7975 clear_hv_tscchange_cb();
7978 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
7980 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
7981 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
7982 CPUFREQ_TRANSITION_NOTIFIER
);
7983 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
7984 #ifdef CONFIG_X86_64
7985 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
7987 kvm_x86_ops
.hardware_enable
= NULL
;
7988 kvm_mmu_module_exit();
7989 free_percpu(user_return_msrs
);
7990 kmem_cache_destroy(x86_fpu_cache
);
7993 static int __kvm_vcpu_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
7995 ++vcpu
->stat
.halt_exits
;
7996 if (lapic_in_kernel(vcpu
)) {
7997 vcpu
->arch
.mp_state
= state
;
8000 vcpu
->run
->exit_reason
= reason
;
8005 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
8007 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
8009 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
8011 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
8013 int ret
= kvm_skip_emulated_instruction(vcpu
);
8015 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8016 * KVM_EXIT_DEBUG here.
8018 return kvm_vcpu_halt(vcpu
) && ret
;
8020 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
8022 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
8024 int ret
= kvm_skip_emulated_instruction(vcpu
);
8026 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
, KVM_EXIT_AP_RESET_HOLD
) && ret
;
8028 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
8030 #ifdef CONFIG_X86_64
8031 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
8032 unsigned long clock_type
)
8034 struct kvm_clock_pairing clock_pairing
;
8035 struct timespec64 ts
;
8039 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
8040 return -KVM_EOPNOTSUPP
;
8042 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
8043 return -KVM_EOPNOTSUPP
;
8045 clock_pairing
.sec
= ts
.tv_sec
;
8046 clock_pairing
.nsec
= ts
.tv_nsec
;
8047 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
8048 clock_pairing
.flags
= 0;
8049 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
8052 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
8053 sizeof(struct kvm_clock_pairing
)))
8061 * kvm_pv_kick_cpu_op: Kick a vcpu.
8063 * @apicid - apicid of vcpu to be kicked.
8065 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
8067 struct kvm_lapic_irq lapic_irq
;
8069 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
8070 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
8071 lapic_irq
.level
= 0;
8072 lapic_irq
.dest_id
= apicid
;
8073 lapic_irq
.msi_redir_hint
= false;
8075 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
8076 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
8079 bool kvm_apicv_activated(struct kvm
*kvm
)
8081 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
8083 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
8085 void kvm_apicv_init(struct kvm
*kvm
, bool enable
)
8088 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
8089 &kvm
->arch
.apicv_inhibit_reasons
);
8091 set_bit(APICV_INHIBIT_REASON_DISABLE
,
8092 &kvm
->arch
.apicv_inhibit_reasons
);
8094 EXPORT_SYMBOL_GPL(kvm_apicv_init
);
8096 static void kvm_sched_yield(struct kvm
*kvm
, unsigned long dest_id
)
8098 struct kvm_vcpu
*target
= NULL
;
8099 struct kvm_apic_map
*map
;
8102 map
= rcu_dereference(kvm
->arch
.apic_map
);
8104 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
8105 target
= map
->phys_map
[dest_id
]->vcpu
;
8109 if (target
&& READ_ONCE(target
->ready
))
8110 kvm_vcpu_yield_to(target
);
8113 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
8115 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
8118 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
8119 return kvm_hv_hypercall(vcpu
);
8121 nr
= kvm_rax_read(vcpu
);
8122 a0
= kvm_rbx_read(vcpu
);
8123 a1
= kvm_rcx_read(vcpu
);
8124 a2
= kvm_rdx_read(vcpu
);
8125 a3
= kvm_rsi_read(vcpu
);
8127 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
8129 op_64_bit
= is_64_bit_mode(vcpu
);
8138 if (kvm_x86_ops
.get_cpl(vcpu
) != 0) {
8146 case KVM_HC_VAPIC_POLL_IRQ
:
8149 case KVM_HC_KICK_CPU
:
8150 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
8153 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
8154 kvm_sched_yield(vcpu
->kvm
, a1
);
8157 #ifdef CONFIG_X86_64
8158 case KVM_HC_CLOCK_PAIRING
:
8159 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
8162 case KVM_HC_SEND_IPI
:
8163 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
8166 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
8168 case KVM_HC_SCHED_YIELD
:
8169 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
8172 kvm_sched_yield(vcpu
->kvm
, a0
);
8182 kvm_rax_write(vcpu
, ret
);
8184 ++vcpu
->stat
.hypercalls
;
8185 return kvm_skip_emulated_instruction(vcpu
);
8187 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
8189 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
8191 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8192 char instruction
[3];
8193 unsigned long rip
= kvm_rip_read(vcpu
);
8195 kvm_x86_ops
.patch_hypercall(vcpu
, instruction
);
8197 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
8201 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
8203 return vcpu
->run
->request_interrupt_window
&&
8204 likely(!pic_in_kernel(vcpu
->kvm
));
8207 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
8209 struct kvm_run
*kvm_run
= vcpu
->run
;
8212 * if_flag is obsolete and useless, so do not bother
8213 * setting it for SEV-ES guests. Userspace can just
8214 * use kvm_run->ready_for_interrupt_injection.
8216 kvm_run
->if_flag
= !vcpu
->arch
.guest_state_protected
8217 && (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
8219 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
8220 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
8221 kvm_run
->ready_for_interrupt_injection
=
8222 pic_in_kernel(vcpu
->kvm
) ||
8223 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
8226 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
8229 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
8233 if (!kvm_x86_ops
.update_cr8_intercept
)
8236 if (!lapic_in_kernel(vcpu
))
8239 if (vcpu
->arch
.apicv_active
)
8242 if (!vcpu
->arch
.apic
->vapic_addr
)
8243 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
8250 tpr
= kvm_lapic_get_cr8(vcpu
);
8252 kvm_x86_ops
.update_cr8_intercept(vcpu
, tpr
, max_irr
);
8255 static void inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
8258 bool can_inject
= true;
8260 /* try to reinject previous events if any */
8262 if (vcpu
->arch
.exception
.injected
) {
8263 kvm_x86_ops
.queue_exception(vcpu
);
8267 * Do not inject an NMI or interrupt if there is a pending
8268 * exception. Exceptions and interrupts are recognized at
8269 * instruction boundaries, i.e. the start of an instruction.
8270 * Trap-like exceptions, e.g. #DB, have higher priority than
8271 * NMIs and interrupts, i.e. traps are recognized before an
8272 * NMI/interrupt that's pending on the same instruction.
8273 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8274 * priority, but are only generated (pended) during instruction
8275 * execution, i.e. a pending fault-like exception means the
8276 * fault occurred on the *previous* instruction and must be
8277 * serviced prior to recognizing any new events in order to
8278 * fully complete the previous instruction.
8280 else if (!vcpu
->arch
.exception
.pending
) {
8281 if (vcpu
->arch
.nmi_injected
) {
8282 kvm_x86_ops
.set_nmi(vcpu
);
8284 } else if (vcpu
->arch
.interrupt
.injected
) {
8285 kvm_x86_ops
.set_irq(vcpu
);
8290 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
8291 vcpu
->arch
.exception
.pending
);
8294 * Call check_nested_events() even if we reinjected a previous event
8295 * in order for caller to determine if it should require immediate-exit
8296 * from L2 to L1 due to pending L1 events which require exit
8299 if (is_guest_mode(vcpu
)) {
8300 r
= kvm_x86_ops
.nested_ops
->check_events(vcpu
);
8305 /* try to inject new event if pending */
8306 if (vcpu
->arch
.exception
.pending
) {
8307 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
8308 vcpu
->arch
.exception
.has_error_code
,
8309 vcpu
->arch
.exception
.error_code
);
8311 vcpu
->arch
.exception
.pending
= false;
8312 vcpu
->arch
.exception
.injected
= true;
8314 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
8315 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
8318 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
8319 kvm_deliver_exception_payload(vcpu
);
8320 if (vcpu
->arch
.dr7
& DR7_GD
) {
8321 vcpu
->arch
.dr7
&= ~DR7_GD
;
8322 kvm_update_dr7(vcpu
);
8326 kvm_x86_ops
.queue_exception(vcpu
);
8331 * Finally, inject interrupt events. If an event cannot be injected
8332 * due to architectural conditions (e.g. IF=0) a window-open exit
8333 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
8334 * and can architecturally be injected, but we cannot do it right now:
8335 * an interrupt could have arrived just now and we have to inject it
8336 * as a vmexit, or there could already an event in the queue, which is
8337 * indicated by can_inject. In that case we request an immediate exit
8338 * in order to make progress and get back here for another iteration.
8339 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8341 if (vcpu
->arch
.smi_pending
) {
8342 r
= can_inject
? kvm_x86_ops
.smi_allowed(vcpu
, true) : -EBUSY
;
8346 vcpu
->arch
.smi_pending
= false;
8347 ++vcpu
->arch
.smi_count
;
8351 kvm_x86_ops
.enable_smi_window(vcpu
);
8354 if (vcpu
->arch
.nmi_pending
) {
8355 r
= can_inject
? kvm_x86_ops
.nmi_allowed(vcpu
, true) : -EBUSY
;
8359 --vcpu
->arch
.nmi_pending
;
8360 vcpu
->arch
.nmi_injected
= true;
8361 kvm_x86_ops
.set_nmi(vcpu
);
8363 WARN_ON(kvm_x86_ops
.nmi_allowed(vcpu
, true) < 0);
8365 if (vcpu
->arch
.nmi_pending
)
8366 kvm_x86_ops
.enable_nmi_window(vcpu
);
8369 if (kvm_cpu_has_injectable_intr(vcpu
)) {
8370 r
= can_inject
? kvm_x86_ops
.interrupt_allowed(vcpu
, true) : -EBUSY
;
8374 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
8375 kvm_x86_ops
.set_irq(vcpu
);
8376 WARN_ON(kvm_x86_ops
.interrupt_allowed(vcpu
, true) < 0);
8378 if (kvm_cpu_has_injectable_intr(vcpu
))
8379 kvm_x86_ops
.enable_irq_window(vcpu
);
8382 if (is_guest_mode(vcpu
) &&
8383 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
8384 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
8385 *req_immediate_exit
= true;
8387 WARN_ON(vcpu
->arch
.exception
.pending
);
8391 *req_immediate_exit
= true;
8395 static void process_nmi(struct kvm_vcpu
*vcpu
)
8400 * x86 is limited to one NMI running, and one NMI pending after it.
8401 * If an NMI is already in progress, limit further NMIs to just one.
8402 * Otherwise, allow two (and we'll inject the first one immediately).
8404 if (kvm_x86_ops
.get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
8407 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
8408 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
8409 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8412 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
8415 flags
|= seg
->g
<< 23;
8416 flags
|= seg
->db
<< 22;
8417 flags
|= seg
->l
<< 21;
8418 flags
|= seg
->avl
<< 20;
8419 flags
|= seg
->present
<< 15;
8420 flags
|= seg
->dpl
<< 13;
8421 flags
|= seg
->s
<< 12;
8422 flags
|= seg
->type
<< 8;
8426 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
8428 struct kvm_segment seg
;
8431 kvm_get_segment(vcpu
, &seg
, n
);
8432 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
8435 offset
= 0x7f84 + n
* 12;
8437 offset
= 0x7f2c + (n
- 3) * 12;
8439 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
8440 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
8441 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
8444 #ifdef CONFIG_X86_64
8445 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
8447 struct kvm_segment seg
;
8451 kvm_get_segment(vcpu
, &seg
, n
);
8452 offset
= 0x7e00 + n
* 16;
8454 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
8455 put_smstate(u16
, buf
, offset
, seg
.selector
);
8456 put_smstate(u16
, buf
, offset
+ 2, flags
);
8457 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
8458 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
8462 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
8465 struct kvm_segment seg
;
8469 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
8470 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
8471 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
8472 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
8474 for (i
= 0; i
< 8; i
++)
8475 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
8477 kvm_get_dr(vcpu
, 6, &val
);
8478 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
8479 kvm_get_dr(vcpu
, 7, &val
);
8480 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
8482 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
8483 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
8484 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
8485 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
8486 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
8488 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
8489 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
8490 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
8491 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
8492 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
8494 kvm_x86_ops
.get_gdt(vcpu
, &dt
);
8495 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
8496 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
8498 kvm_x86_ops
.get_idt(vcpu
, &dt
);
8499 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
8500 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
8502 for (i
= 0; i
< 6; i
++)
8503 enter_smm_save_seg_32(vcpu
, buf
, i
);
8505 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
8508 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
8509 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
8512 #ifdef CONFIG_X86_64
8513 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
8516 struct kvm_segment seg
;
8520 for (i
= 0; i
< 16; i
++)
8521 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
8523 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
8524 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
8526 kvm_get_dr(vcpu
, 6, &val
);
8527 put_smstate(u64
, buf
, 0x7f68, val
);
8528 kvm_get_dr(vcpu
, 7, &val
);
8529 put_smstate(u64
, buf
, 0x7f60, val
);
8531 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
8532 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
8533 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
8535 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
8538 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
8540 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
8542 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
8543 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
8544 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
8545 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
8546 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
8548 kvm_x86_ops
.get_idt(vcpu
, &dt
);
8549 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
8550 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
8552 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
8553 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
8554 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
8555 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
8556 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
8558 kvm_x86_ops
.get_gdt(vcpu
, &dt
);
8559 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
8560 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
8562 for (i
= 0; i
< 6; i
++)
8563 enter_smm_save_seg_64(vcpu
, buf
, i
);
8567 static void enter_smm(struct kvm_vcpu
*vcpu
)
8569 struct kvm_segment cs
, ds
;
8574 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
8575 memset(buf
, 0, 512);
8576 #ifdef CONFIG_X86_64
8577 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
8578 enter_smm_save_state_64(vcpu
, buf
);
8581 enter_smm_save_state_32(vcpu
, buf
);
8584 * Give pre_enter_smm() a chance to make ISA-specific changes to the
8585 * vCPU state (e.g. leave guest mode) after we've saved the state into
8586 * the SMM state-save area.
8588 kvm_x86_ops
.pre_enter_smm(vcpu
, buf
);
8590 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
8591 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
8593 if (kvm_x86_ops
.get_nmi_mask(vcpu
))
8594 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
8596 kvm_x86_ops
.set_nmi_mask(vcpu
, true);
8598 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
8599 kvm_rip_write(vcpu
, 0x8000);
8601 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
8602 kvm_x86_ops
.set_cr0(vcpu
, cr0
);
8603 vcpu
->arch
.cr0
= cr0
;
8605 kvm_x86_ops
.set_cr4(vcpu
, 0);
8607 /* Undocumented: IDT limit is set to zero on entry to SMM. */
8608 dt
.address
= dt
.size
= 0;
8609 kvm_x86_ops
.set_idt(vcpu
, &dt
);
8611 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
8613 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
8614 cs
.base
= vcpu
->arch
.smbase
;
8619 cs
.limit
= ds
.limit
= 0xffffffff;
8620 cs
.type
= ds
.type
= 0x3;
8621 cs
.dpl
= ds
.dpl
= 0;
8626 cs
.avl
= ds
.avl
= 0;
8627 cs
.present
= ds
.present
= 1;
8628 cs
.unusable
= ds
.unusable
= 0;
8629 cs
.padding
= ds
.padding
= 0;
8631 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8632 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
8633 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
8634 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
8635 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
8636 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
8638 #ifdef CONFIG_X86_64
8639 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
8640 kvm_x86_ops
.set_efer(vcpu
, 0);
8643 kvm_update_cpuid_runtime(vcpu
);
8644 kvm_mmu_reset_context(vcpu
);
8647 static void process_smi(struct kvm_vcpu
*vcpu
)
8649 vcpu
->arch
.smi_pending
= true;
8650 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8653 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
8654 unsigned long *vcpu_bitmap
)
8658 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
8660 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
8661 NULL
, vcpu_bitmap
, cpus
);
8663 free_cpumask_var(cpus
);
8666 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
8668 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
8671 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
8673 if (!lapic_in_kernel(vcpu
))
8676 vcpu
->arch
.apicv_active
= kvm_apicv_activated(vcpu
->kvm
);
8677 kvm_apic_update_apicv(vcpu
);
8678 kvm_x86_ops
.refresh_apicv_exec_ctrl(vcpu
);
8680 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
8683 * NOTE: Do not hold any lock prior to calling this.
8685 * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8686 * locked, because it calls __x86_set_memory_region() which does
8687 * synchronize_srcu(&kvm->srcu).
8689 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
8691 struct kvm_vcpu
*except
;
8692 unsigned long old
, new, expected
;
8694 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
8695 !kvm_x86_ops
.check_apicv_inhibit_reasons(bit
))
8698 old
= READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
);
8700 expected
= new = old
;
8702 __clear_bit(bit
, &new);
8704 __set_bit(bit
, &new);
8707 old
= cmpxchg(&kvm
->arch
.apicv_inhibit_reasons
, expected
, new);
8708 } while (old
!= expected
);
8713 trace_kvm_apicv_update_request(activate
, bit
);
8714 if (kvm_x86_ops
.pre_update_apicv_exec_ctrl
)
8715 kvm_x86_ops
.pre_update_apicv_exec_ctrl(kvm
, activate
);
8718 * Sending request to update APICV for all other vcpus,
8719 * while update the calling vcpu immediately instead of
8720 * waiting for another #VMEXIT to handle the request.
8722 except
= kvm_get_running_vcpu();
8723 kvm_make_all_cpus_request_except(kvm
, KVM_REQ_APICV_UPDATE
,
8726 kvm_vcpu_update_apicv(except
);
8728 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
8730 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
8732 if (!kvm_apic_present(vcpu
))
8735 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
8737 if (irqchip_split(vcpu
->kvm
))
8738 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
8740 if (vcpu
->arch
.apicv_active
)
8741 kvm_x86_ops
.sync_pir_to_irr(vcpu
);
8742 if (ioapic_in_kernel(vcpu
->kvm
))
8743 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
8746 if (is_guest_mode(vcpu
))
8747 vcpu
->arch
.load_eoi_exitmap_pending
= true;
8749 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
8752 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
8754 u64 eoi_exit_bitmap
[4];
8756 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
8759 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
8760 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
8761 kvm_x86_ops
.load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
8764 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
8765 unsigned long start
, unsigned long end
)
8767 unsigned long apic_address
;
8770 * The physical address of apic access page is stored in the VMCS.
8771 * Update it when it becomes invalid.
8773 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
8774 if (start
<= apic_address
&& apic_address
< end
)
8775 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
8778 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
8780 if (!lapic_in_kernel(vcpu
))
8783 if (!kvm_x86_ops
.set_apic_access_page_addr
)
8786 kvm_x86_ops
.set_apic_access_page_addr(vcpu
);
8789 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
8791 smp_send_reschedule(vcpu
->cpu
);
8793 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
8796 * Returns 1 to let vcpu_run() continue the guest execution loop without
8797 * exiting to the userspace. Otherwise, the value will be returned to the
8800 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
8804 dm_request_for_irq_injection(vcpu
) &&
8805 kvm_cpu_accept_dm_intr(vcpu
);
8806 fastpath_t exit_fastpath
;
8808 bool req_immediate_exit
= false;
8810 /* Forbid vmenter if vcpu dirty ring is soft-full */
8811 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
8812 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
8813 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
8814 trace_kvm_dirty_ring_exit(vcpu
);
8819 if (kvm_request_pending(vcpu
)) {
8820 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
8821 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
8826 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
8827 kvm_mmu_unload(vcpu
);
8828 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
8829 __kvm_migrate_timers(vcpu
);
8830 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
8831 kvm_gen_update_masterclock(vcpu
->kvm
);
8832 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
8833 kvm_gen_kvmclock_update(vcpu
);
8834 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
8835 r
= kvm_guest_time_update(vcpu
);
8839 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
8840 kvm_mmu_sync_roots(vcpu
);
8841 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
8842 kvm_mmu_load_pgd(vcpu
);
8843 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
8844 kvm_vcpu_flush_tlb_all(vcpu
);
8846 /* Flushing all ASIDs flushes the current ASID... */
8847 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
8849 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
8850 kvm_vcpu_flush_tlb_current(vcpu
);
8851 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH
, vcpu
))
8852 kvm_vcpu_flush_tlb_guest(vcpu
);
8854 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
8855 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
8859 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8860 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
8861 vcpu
->mmio_needed
= 0;
8865 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
8866 /* Page is swapped out. Do synthetic halt */
8867 vcpu
->arch
.apf
.halted
= true;
8871 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
8872 record_steal_time(vcpu
);
8873 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
8875 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
8877 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
8878 kvm_pmu_handle_event(vcpu
);
8879 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
8880 kvm_pmu_deliver_pmi(vcpu
);
8881 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
8882 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
8883 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
8884 vcpu
->arch
.ioapic_handled_vectors
)) {
8885 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
8886 vcpu
->run
->eoi
.vector
=
8887 vcpu
->arch
.pending_ioapic_eoi
;
8892 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
8893 vcpu_scan_ioapic(vcpu
);
8894 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
8895 vcpu_load_eoi_exitmap(vcpu
);
8896 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
8897 kvm_vcpu_reload_apic_access_page(vcpu
);
8898 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
8899 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
8900 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
8904 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
8905 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
8906 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
8910 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
8911 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
8912 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
8918 * KVM_REQ_HV_STIMER has to be processed after
8919 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8920 * depend on the guest clock being up-to-date
8922 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
8923 kvm_hv_process_stimers(vcpu
);
8924 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
8925 kvm_vcpu_update_apicv(vcpu
);
8926 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
8927 kvm_check_async_pf_completion(vcpu
);
8928 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
8929 kvm_x86_ops
.msr_filter_changed(vcpu
);
8932 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
8933 ++vcpu
->stat
.req_event
;
8934 kvm_apic_accept_events(vcpu
);
8935 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
8940 inject_pending_event(vcpu
, &req_immediate_exit
);
8942 kvm_x86_ops
.enable_irq_window(vcpu
);
8944 if (kvm_lapic_enabled(vcpu
)) {
8945 update_cr8_intercept(vcpu
);
8946 kvm_lapic_sync_to_vapic(vcpu
);
8950 r
= kvm_mmu_reload(vcpu
);
8952 goto cancel_injection
;
8957 kvm_x86_ops
.prepare_guest_switch(vcpu
);
8960 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
8961 * IPI are then delayed after guest entry, which ensures that they
8962 * result in virtual interrupt delivery.
8964 local_irq_disable();
8965 vcpu
->mode
= IN_GUEST_MODE
;
8967 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8970 * 1) We should set ->mode before checking ->requests. Please see
8971 * the comment in kvm_vcpu_exiting_guest_mode().
8973 * 2) For APICv, we should set ->mode before checking PID.ON. This
8974 * pairs with the memory barrier implicit in pi_test_and_set_on
8975 * (see vmx_deliver_posted_interrupt).
8977 * 3) This also orders the write to mode from any reads to the page
8978 * tables done while the VCPU is running. Please see the comment
8979 * in kvm_flush_remote_tlbs.
8981 smp_mb__after_srcu_read_unlock();
8984 * This handles the case where a posted interrupt was
8985 * notified with kvm_vcpu_kick.
8987 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
8988 kvm_x86_ops
.sync_pir_to_irr(vcpu
);
8990 if (kvm_vcpu_exit_request(vcpu
)) {
8991 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
8995 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8997 goto cancel_injection
;
9000 if (req_immediate_exit
) {
9001 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9002 kvm_x86_ops
.request_immediate_exit(vcpu
);
9005 fpregs_assert_state_consistent();
9006 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9007 switch_fpu_return();
9009 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
9011 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
9012 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
9013 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
9014 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
9015 set_debugreg(vcpu
->arch
.dr6
, 6);
9016 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
9019 exit_fastpath
= kvm_x86_ops
.run(vcpu
);
9022 * Do this here before restoring debug registers on the host. And
9023 * since we do this before handling the vmexit, a DR access vmexit
9024 * can (a) read the correct value of the debug registers, (b) set
9025 * KVM_DEBUGREG_WONT_EXIT again.
9027 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
9028 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
9029 kvm_x86_ops
.sync_dirty_debug_regs(vcpu
);
9030 kvm_update_dr0123(vcpu
);
9031 kvm_update_dr7(vcpu
);
9032 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
9036 * If the guest has used debug registers, at least dr7
9037 * will be disabled while returning to the host.
9038 * If we don't have active breakpoints in the host, we don't
9039 * care about the messed up debug address registers. But if
9040 * we have some of them active, restore the old state.
9042 if (hw_breakpoint_active())
9043 hw_breakpoint_restore();
9045 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
9046 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
9048 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9051 kvm_x86_ops
.handle_exit_irqoff(vcpu
);
9054 * Consume any pending interrupts, including the possible source of
9055 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9056 * An instruction is required after local_irq_enable() to fully unblock
9057 * interrupts on processors that implement an interrupt shadow, the
9058 * stat.exits increment will do nicely.
9060 kvm_before_interrupt(vcpu
);
9063 local_irq_disable();
9064 kvm_after_interrupt(vcpu
);
9066 if (lapic_in_kernel(vcpu
)) {
9067 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
9068 if (delta
!= S64_MIN
) {
9069 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
9070 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
9077 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9080 * Profile KVM exit RIPs:
9082 if (unlikely(prof_on
== KVM_PROFILING
)) {
9083 unsigned long rip
= kvm_rip_read(vcpu
);
9084 profile_hit(KVM_PROFILING
, (void *)rip
);
9087 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
9088 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9090 if (vcpu
->arch
.apic_attention
)
9091 kvm_lapic_sync_from_vapic(vcpu
);
9093 r
= kvm_x86_ops
.handle_exit(vcpu
, exit_fastpath
);
9097 if (req_immediate_exit
)
9098 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9099 kvm_x86_ops
.cancel_injection(vcpu
);
9100 if (unlikely(vcpu
->arch
.apic_attention
))
9101 kvm_lapic_sync_from_vapic(vcpu
);
9106 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
9108 if (!kvm_arch_vcpu_runnable(vcpu
) &&
9109 (!kvm_x86_ops
.pre_block
|| kvm_x86_ops
.pre_block(vcpu
) == 0)) {
9110 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9111 kvm_vcpu_block(vcpu
);
9112 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9114 if (kvm_x86_ops
.post_block
)
9115 kvm_x86_ops
.post_block(vcpu
);
9117 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
9121 kvm_apic_accept_events(vcpu
);
9122 switch(vcpu
->arch
.mp_state
) {
9123 case KVM_MP_STATE_HALTED
:
9124 case KVM_MP_STATE_AP_RESET_HOLD
:
9125 vcpu
->arch
.pv
.pv_unhalted
= false;
9126 vcpu
->arch
.mp_state
=
9127 KVM_MP_STATE_RUNNABLE
;
9129 case KVM_MP_STATE_RUNNABLE
:
9130 vcpu
->arch
.apf
.halted
= false;
9132 case KVM_MP_STATE_INIT_RECEIVED
:
9140 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
9142 if (is_guest_mode(vcpu
))
9143 kvm_x86_ops
.nested_ops
->check_events(vcpu
);
9145 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
9146 !vcpu
->arch
.apf
.halted
);
9149 static int vcpu_run(struct kvm_vcpu
*vcpu
)
9152 struct kvm
*kvm
= vcpu
->kvm
;
9154 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9155 vcpu
->arch
.l1tf_flush_l1d
= true;
9158 if (kvm_vcpu_running(vcpu
)) {
9159 r
= vcpu_enter_guest(vcpu
);
9161 r
= vcpu_block(kvm
, vcpu
);
9167 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
9168 if (kvm_cpu_has_pending_timer(vcpu
))
9169 kvm_inject_pending_timer_irqs(vcpu
);
9171 if (dm_request_for_irq_injection(vcpu
) &&
9172 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
9174 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
9175 ++vcpu
->stat
.request_irq_exits
;
9179 if (__xfer_to_guest_mode_work_pending()) {
9180 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9181 r
= xfer_to_guest_mode_handle_work(vcpu
);
9184 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9188 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9193 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
9197 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9198 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
9199 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9203 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
9205 BUG_ON(!vcpu
->arch
.pio
.count
);
9207 return complete_emulated_io(vcpu
);
9211 * Implements the following, as a state machine:
9215 * for each mmio piece in the fragment
9223 * for each mmio piece in the fragment
9228 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
9230 struct kvm_run
*run
= vcpu
->run
;
9231 struct kvm_mmio_fragment
*frag
;
9234 BUG_ON(!vcpu
->mmio_needed
);
9236 /* Complete previous fragment */
9237 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
9238 len
= min(8u, frag
->len
);
9239 if (!vcpu
->mmio_is_write
)
9240 memcpy(frag
->data
, run
->mmio
.data
, len
);
9242 if (frag
->len
<= 8) {
9243 /* Switch to the next fragment. */
9245 vcpu
->mmio_cur_fragment
++;
9247 /* Go forward to the next mmio piece. */
9253 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
9254 vcpu
->mmio_needed
= 0;
9256 /* FIXME: return into emulator if single-stepping. */
9257 if (vcpu
->mmio_is_write
)
9259 vcpu
->mmio_read_completed
= 1;
9260 return complete_emulated_io(vcpu
);
9263 run
->exit_reason
= KVM_EXIT_MMIO
;
9264 run
->mmio
.phys_addr
= frag
->gpa
;
9265 if (vcpu
->mmio_is_write
)
9266 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
9267 run
->mmio
.len
= min(8u, frag
->len
);
9268 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
9269 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
9273 static void kvm_save_current_fpu(struct fpu
*fpu
)
9276 * If the target FPU state is not resident in the CPU registers, just
9277 * memcpy() from current, else save CPU state directly to the target.
9279 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9280 memcpy(&fpu
->state
, ¤t
->thread
.fpu
.state
,
9281 fpu_kernel_xstate_size
);
9283 copy_fpregs_to_fpstate(fpu
);
9286 /* Swap (qemu) user FPU context for the guest FPU context. */
9287 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
9291 kvm_save_current_fpu(vcpu
->arch
.user_fpu
);
9294 * Guests with protected state can't have it set by the hypervisor,
9295 * so skip trying to set it.
9297 if (vcpu
->arch
.guest_fpu
)
9298 /* PKRU is separately restored in kvm_x86_ops.run. */
9299 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
->state
,
9300 ~XFEATURE_MASK_PKRU
);
9302 fpregs_mark_activate();
9308 /* When vcpu_run ends, restore user space FPU context. */
9309 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
9314 * Guests with protected state can't have it read by the hypervisor,
9315 * so skip trying to save it.
9317 if (vcpu
->arch
.guest_fpu
)
9318 kvm_save_current_fpu(vcpu
->arch
.guest_fpu
);
9320 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
->state
);
9322 fpregs_mark_activate();
9325 ++vcpu
->stat
.fpu_reload
;
9329 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
9331 struct kvm_run
*kvm_run
= vcpu
->run
;
9335 kvm_sigset_activate(vcpu
);
9337 kvm_load_guest_fpu(vcpu
);
9339 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
9340 if (kvm_run
->immediate_exit
) {
9344 kvm_vcpu_block(vcpu
);
9345 kvm_apic_accept_events(vcpu
);
9346 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
9348 if (signal_pending(current
)) {
9350 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
9351 ++vcpu
->stat
.signal_exits
;
9356 if (kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) {
9361 if (kvm_run
->kvm_dirty_regs
) {
9362 r
= sync_regs(vcpu
);
9367 /* re-sync apic's tpr */
9368 if (!lapic_in_kernel(vcpu
)) {
9369 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
9375 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
9376 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
9377 vcpu
->arch
.complete_userspace_io
= NULL
;
9382 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
9384 if (kvm_run
->immediate_exit
)
9390 kvm_put_guest_fpu(vcpu
);
9391 if (kvm_run
->kvm_valid_regs
)
9393 post_kvm_run_save(vcpu
);
9394 kvm_sigset_deactivate(vcpu
);
9400 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9402 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
9404 * We are here if userspace calls get_regs() in the middle of
9405 * instruction emulation. Registers state needs to be copied
9406 * back from emulation context to vcpu. Userspace shouldn't do
9407 * that usually, but some bad designed PV devices (vmware
9408 * backdoor interface) need this to work
9410 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
9411 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9413 regs
->rax
= kvm_rax_read(vcpu
);
9414 regs
->rbx
= kvm_rbx_read(vcpu
);
9415 regs
->rcx
= kvm_rcx_read(vcpu
);
9416 regs
->rdx
= kvm_rdx_read(vcpu
);
9417 regs
->rsi
= kvm_rsi_read(vcpu
);
9418 regs
->rdi
= kvm_rdi_read(vcpu
);
9419 regs
->rsp
= kvm_rsp_read(vcpu
);
9420 regs
->rbp
= kvm_rbp_read(vcpu
);
9421 #ifdef CONFIG_X86_64
9422 regs
->r8
= kvm_r8_read(vcpu
);
9423 regs
->r9
= kvm_r9_read(vcpu
);
9424 regs
->r10
= kvm_r10_read(vcpu
);
9425 regs
->r11
= kvm_r11_read(vcpu
);
9426 regs
->r12
= kvm_r12_read(vcpu
);
9427 regs
->r13
= kvm_r13_read(vcpu
);
9428 regs
->r14
= kvm_r14_read(vcpu
);
9429 regs
->r15
= kvm_r15_read(vcpu
);
9432 regs
->rip
= kvm_rip_read(vcpu
);
9433 regs
->rflags
= kvm_get_rflags(vcpu
);
9436 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9439 __get_regs(vcpu
, regs
);
9444 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9446 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
9447 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9449 kvm_rax_write(vcpu
, regs
->rax
);
9450 kvm_rbx_write(vcpu
, regs
->rbx
);
9451 kvm_rcx_write(vcpu
, regs
->rcx
);
9452 kvm_rdx_write(vcpu
, regs
->rdx
);
9453 kvm_rsi_write(vcpu
, regs
->rsi
);
9454 kvm_rdi_write(vcpu
, regs
->rdi
);
9455 kvm_rsp_write(vcpu
, regs
->rsp
);
9456 kvm_rbp_write(vcpu
, regs
->rbp
);
9457 #ifdef CONFIG_X86_64
9458 kvm_r8_write(vcpu
, regs
->r8
);
9459 kvm_r9_write(vcpu
, regs
->r9
);
9460 kvm_r10_write(vcpu
, regs
->r10
);
9461 kvm_r11_write(vcpu
, regs
->r11
);
9462 kvm_r12_write(vcpu
, regs
->r12
);
9463 kvm_r13_write(vcpu
, regs
->r13
);
9464 kvm_r14_write(vcpu
, regs
->r14
);
9465 kvm_r15_write(vcpu
, regs
->r15
);
9468 kvm_rip_write(vcpu
, regs
->rip
);
9469 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
9471 vcpu
->arch
.exception
.pending
= false;
9473 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9476 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9479 __set_regs(vcpu
, regs
);
9484 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
9486 struct kvm_segment cs
;
9488 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9492 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
9494 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9498 if (vcpu
->arch
.guest_state_protected
)
9499 goto skip_protected_regs
;
9501 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
9502 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
9503 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
9504 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
9505 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
9506 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
9508 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
9509 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
9511 kvm_x86_ops
.get_idt(vcpu
, &dt
);
9512 sregs
->idt
.limit
= dt
.size
;
9513 sregs
->idt
.base
= dt
.address
;
9514 kvm_x86_ops
.get_gdt(vcpu
, &dt
);
9515 sregs
->gdt
.limit
= dt
.size
;
9516 sregs
->gdt
.base
= dt
.address
;
9518 sregs
->cr2
= vcpu
->arch
.cr2
;
9519 sregs
->cr3
= kvm_read_cr3(vcpu
);
9521 skip_protected_regs
:
9522 sregs
->cr0
= kvm_read_cr0(vcpu
);
9523 sregs
->cr4
= kvm_read_cr4(vcpu
);
9524 sregs
->cr8
= kvm_get_cr8(vcpu
);
9525 sregs
->efer
= vcpu
->arch
.efer
;
9526 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
9528 memset(sregs
->interrupt_bitmap
, 0, sizeof(sregs
->interrupt_bitmap
));
9530 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
9531 set_bit(vcpu
->arch
.interrupt
.nr
,
9532 (unsigned long *)sregs
->interrupt_bitmap
);
9535 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
9536 struct kvm_sregs
*sregs
)
9539 __get_sregs(vcpu
, sregs
);
9544 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
9545 struct kvm_mp_state
*mp_state
)
9548 if (kvm_mpx_supported())
9549 kvm_load_guest_fpu(vcpu
);
9551 kvm_apic_accept_events(vcpu
);
9552 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
9553 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
9554 vcpu
->arch
.pv
.pv_unhalted
)
9555 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
9557 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
9559 if (kvm_mpx_supported())
9560 kvm_put_guest_fpu(vcpu
);
9565 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
9566 struct kvm_mp_state
*mp_state
)
9572 if (!lapic_in_kernel(vcpu
) &&
9573 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
9577 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9578 * INIT state; latched init should be reported using
9579 * KVM_SET_VCPU_EVENTS, so reject it here.
9581 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
9582 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
9583 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
9586 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
9587 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
9588 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
9590 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
9591 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9599 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
9600 int reason
, bool has_error_code
, u32 error_code
)
9602 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
9605 init_emulate_ctxt(vcpu
);
9607 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
9608 has_error_code
, error_code
);
9610 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
9611 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
9612 vcpu
->run
->internal
.ndata
= 0;
9616 kvm_rip_write(vcpu
, ctxt
->eip
);
9617 kvm_set_rflags(vcpu
, ctxt
->eflags
);
9620 EXPORT_SYMBOL_GPL(kvm_task_switch
);
9622 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9624 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
9626 * When EFER.LME and CR0.PG are set, the processor is in
9627 * 64-bit mode (though maybe in a 32-bit code segment).
9628 * CR4.PAE and EFER.LMA must be set.
9630 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
9632 if (sregs
->cr3
& vcpu
->arch
.cr3_lm_rsvd_bits
)
9636 * Not in 64-bit mode: EFER.LMA is clear and the code
9637 * segment cannot be 64-bit.
9639 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
9643 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
9646 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9648 struct msr_data apic_base_msr
;
9649 int mmu_reset_needed
= 0;
9650 int pending_vec
, max_bits
, idx
;
9654 if (!kvm_is_valid_sregs(vcpu
, sregs
))
9657 apic_base_msr
.data
= sregs
->apic_base
;
9658 apic_base_msr
.host_initiated
= true;
9659 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
9662 if (vcpu
->arch
.guest_state_protected
)
9663 goto skip_protected_regs
;
9665 dt
.size
= sregs
->idt
.limit
;
9666 dt
.address
= sregs
->idt
.base
;
9667 kvm_x86_ops
.set_idt(vcpu
, &dt
);
9668 dt
.size
= sregs
->gdt
.limit
;
9669 dt
.address
= sregs
->gdt
.base
;
9670 kvm_x86_ops
.set_gdt(vcpu
, &dt
);
9672 vcpu
->arch
.cr2
= sregs
->cr2
;
9673 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
9674 vcpu
->arch
.cr3
= sregs
->cr3
;
9675 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
9677 kvm_set_cr8(vcpu
, sregs
->cr8
);
9679 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
9680 kvm_x86_ops
.set_efer(vcpu
, sregs
->efer
);
9682 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
9683 kvm_x86_ops
.set_cr0(vcpu
, sregs
->cr0
);
9684 vcpu
->arch
.cr0
= sregs
->cr0
;
9686 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
9687 kvm_x86_ops
.set_cr4(vcpu
, sregs
->cr4
);
9689 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9690 if (is_pae_paging(vcpu
)) {
9691 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
9692 mmu_reset_needed
= 1;
9694 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9696 if (mmu_reset_needed
)
9697 kvm_mmu_reset_context(vcpu
);
9699 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
9700 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
9701 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
9702 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
9703 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
9704 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
9706 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
9707 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
9709 update_cr8_intercept(vcpu
);
9711 /* Older userspace won't unhalt the vcpu on reset. */
9712 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
9713 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
9715 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9717 skip_protected_regs
:
9718 max_bits
= KVM_NR_INTERRUPTS
;
9719 pending_vec
= find_first_bit(
9720 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
9721 if (pending_vec
< max_bits
) {
9722 kvm_queue_interrupt(vcpu
, pending_vec
, false);
9723 pr_debug("Set back pending irq %d\n", pending_vec
);
9726 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9733 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
9734 struct kvm_sregs
*sregs
)
9739 ret
= __set_sregs(vcpu
, sregs
);
9744 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
9745 struct kvm_guest_debug
*dbg
)
9747 unsigned long rflags
;
9750 if (vcpu
->arch
.guest_state_protected
)
9755 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
9757 if (vcpu
->arch
.exception
.pending
)
9759 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
9760 kvm_queue_exception(vcpu
, DB_VECTOR
);
9762 kvm_queue_exception(vcpu
, BP_VECTOR
);
9766 * Read rflags as long as potentially injected trace flags are still
9769 rflags
= kvm_get_rflags(vcpu
);
9771 vcpu
->guest_debug
= dbg
->control
;
9772 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
9773 vcpu
->guest_debug
= 0;
9775 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
9776 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
9777 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
9778 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
9780 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
9781 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
9783 kvm_update_dr7(vcpu
);
9785 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
9786 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
9787 get_segment_base(vcpu
, VCPU_SREG_CS
);
9790 * Trigger an rflags update that will inject or remove the trace
9793 kvm_set_rflags(vcpu
, rflags
);
9795 kvm_x86_ops
.update_exception_bitmap(vcpu
);
9805 * Translate a guest virtual address to a guest physical address.
9807 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
9808 struct kvm_translation
*tr
)
9810 unsigned long vaddr
= tr
->linear_address
;
9816 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9817 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
9818 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9819 tr
->physical_address
= gpa
;
9820 tr
->valid
= gpa
!= UNMAPPED_GVA
;
9828 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
9830 struct fxregs_state
*fxsave
;
9832 if (!vcpu
->arch
.guest_fpu
)
9837 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
9838 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
9839 fpu
->fcw
= fxsave
->cwd
;
9840 fpu
->fsw
= fxsave
->swd
;
9841 fpu
->ftwx
= fxsave
->twd
;
9842 fpu
->last_opcode
= fxsave
->fop
;
9843 fpu
->last_ip
= fxsave
->rip
;
9844 fpu
->last_dp
= fxsave
->rdp
;
9845 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
9851 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
9853 struct fxregs_state
*fxsave
;
9855 if (!vcpu
->arch
.guest_fpu
)
9860 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
9862 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
9863 fxsave
->cwd
= fpu
->fcw
;
9864 fxsave
->swd
= fpu
->fsw
;
9865 fxsave
->twd
= fpu
->ftwx
;
9866 fxsave
->fop
= fpu
->last_opcode
;
9867 fxsave
->rip
= fpu
->last_ip
;
9868 fxsave
->rdp
= fpu
->last_dp
;
9869 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
9875 static void store_regs(struct kvm_vcpu
*vcpu
)
9877 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
9879 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
9880 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
9882 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
9883 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
9885 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
9886 kvm_vcpu_ioctl_x86_get_vcpu_events(
9887 vcpu
, &vcpu
->run
->s
.regs
.events
);
9890 static int sync_regs(struct kvm_vcpu
*vcpu
)
9892 if (vcpu
->run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)
9895 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
9896 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
9897 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
9899 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
9900 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
9902 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
9904 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
9905 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9906 vcpu
, &vcpu
->run
->s
.regs
.events
))
9908 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
9914 static void fx_init(struct kvm_vcpu
*vcpu
)
9916 if (!vcpu
->arch
.guest_fpu
)
9919 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
9920 if (boot_cpu_has(X86_FEATURE_XSAVES
))
9921 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
9922 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
9925 * Ensure guest xcr0 is valid for loading
9927 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
9929 vcpu
->arch
.cr0
|= X86_CR0_ET
;
9932 void kvm_free_guest_fpu(struct kvm_vcpu
*vcpu
)
9934 if (vcpu
->arch
.guest_fpu
) {
9935 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
9936 vcpu
->arch
.guest_fpu
= NULL
;
9939 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu
);
9941 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
9943 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
9944 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9945 "guest TSC will not be reliable\n");
9950 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
9955 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
9956 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9958 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
9960 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
9962 r
= kvm_mmu_create(vcpu
);
9966 if (irqchip_in_kernel(vcpu
->kvm
)) {
9967 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
9969 goto fail_mmu_destroy
;
9970 if (kvm_apicv_activated(vcpu
->kvm
))
9971 vcpu
->arch
.apicv_active
= true;
9973 static_key_slow_inc(&kvm_no_apic_vcpu
);
9977 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
9979 goto fail_free_lapic
;
9980 vcpu
->arch
.pio_data
= page_address(page
);
9982 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
9983 GFP_KERNEL_ACCOUNT
);
9984 if (!vcpu
->arch
.mce_banks
)
9985 goto fail_free_pio_data
;
9986 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
9988 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
9989 GFP_KERNEL_ACCOUNT
))
9990 goto fail_free_mce_banks
;
9992 if (!alloc_emulate_ctxt(vcpu
))
9993 goto free_wbinvd_dirty_mask
;
9995 vcpu
->arch
.user_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
9996 GFP_KERNEL_ACCOUNT
);
9997 if (!vcpu
->arch
.user_fpu
) {
9998 pr_err("kvm: failed to allocate userspace's fpu\n");
9999 goto free_emulate_ctxt
;
10002 vcpu
->arch
.guest_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10003 GFP_KERNEL_ACCOUNT
);
10004 if (!vcpu
->arch
.guest_fpu
) {
10005 pr_err("kvm: failed to allocate vcpu's fpu\n");
10006 goto free_user_fpu
;
10010 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
10012 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
10014 kvm_async_pf_hash_reset(vcpu
);
10015 kvm_pmu_init(vcpu
);
10017 vcpu
->arch
.pending_external_vector
= -1;
10018 vcpu
->arch
.preempted_in_kernel
= false;
10020 kvm_hv_vcpu_init(vcpu
);
10022 r
= kvm_x86_ops
.vcpu_create(vcpu
);
10024 goto free_guest_fpu
;
10026 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
10027 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
10028 kvm_vcpu_mtrr_init(vcpu
);
10030 kvm_vcpu_reset(vcpu
, false);
10031 kvm_init_mmu(vcpu
, false);
10036 kvm_free_guest_fpu(vcpu
);
10038 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10040 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10041 free_wbinvd_dirty_mask
:
10042 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10043 fail_free_mce_banks
:
10044 kfree(vcpu
->arch
.mce_banks
);
10045 fail_free_pio_data
:
10046 free_page((unsigned long)vcpu
->arch
.pio_data
);
10048 kvm_free_lapic(vcpu
);
10050 kvm_mmu_destroy(vcpu
);
10054 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
10056 struct kvm
*kvm
= vcpu
->kvm
;
10058 kvm_hv_vcpu_postcreate(vcpu
);
10060 if (mutex_lock_killable(&vcpu
->mutex
))
10063 kvm_synchronize_tsc(vcpu
, 0);
10066 /* poll control enabled by default */
10067 vcpu
->arch
.msr_kvm_poll_control
= 1;
10069 mutex_unlock(&vcpu
->mutex
);
10071 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
10072 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
10073 KVMCLOCK_SYNC_PERIOD
);
10076 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
10078 struct gfn_to_pfn_cache
*cache
= &vcpu
->arch
.st
.cache
;
10081 kvm_release_pfn(cache
->pfn
, cache
->dirty
, cache
);
10083 kvmclock_reset(vcpu
);
10085 kvm_x86_ops
.vcpu_free(vcpu
);
10087 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10088 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10089 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10090 kvm_free_guest_fpu(vcpu
);
10092 kvm_hv_vcpu_uninit(vcpu
);
10093 kvm_pmu_destroy(vcpu
);
10094 kfree(vcpu
->arch
.mce_banks
);
10095 kvm_free_lapic(vcpu
);
10096 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10097 kvm_mmu_destroy(vcpu
);
10098 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10099 free_page((unsigned long)vcpu
->arch
.pio_data
);
10100 kvfree(vcpu
->arch
.cpuid_entries
);
10101 if (!lapic_in_kernel(vcpu
))
10102 static_key_slow_dec(&kvm_no_apic_vcpu
);
10105 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
10107 kvm_lapic_reset(vcpu
, init_event
);
10109 vcpu
->arch
.hflags
= 0;
10111 vcpu
->arch
.smi_pending
= 0;
10112 vcpu
->arch
.smi_count
= 0;
10113 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
10114 vcpu
->arch
.nmi_pending
= 0;
10115 vcpu
->arch
.nmi_injected
= false;
10116 kvm_clear_interrupt_queue(vcpu
);
10117 kvm_clear_exception_queue(vcpu
);
10119 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
10120 kvm_update_dr0123(vcpu
);
10121 vcpu
->arch
.dr6
= DR6_INIT
;
10122 vcpu
->arch
.dr7
= DR7_FIXED_1
;
10123 kvm_update_dr7(vcpu
);
10125 vcpu
->arch
.cr2
= 0;
10127 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10128 vcpu
->arch
.apf
.msr_en_val
= 0;
10129 vcpu
->arch
.apf
.msr_int_val
= 0;
10130 vcpu
->arch
.st
.msr_val
= 0;
10132 kvmclock_reset(vcpu
);
10134 kvm_clear_async_pf_completion_queue(vcpu
);
10135 kvm_async_pf_hash_reset(vcpu
);
10136 vcpu
->arch
.apf
.halted
= false;
10138 if (vcpu
->arch
.guest_fpu
&& kvm_mpx_supported()) {
10139 void *mpx_state_buffer
;
10142 * To avoid have the INIT path from kvm_apic_has_events() that be
10143 * called with loaded FPU and does not let userspace fix the state.
10146 kvm_put_guest_fpu(vcpu
);
10147 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10149 if (mpx_state_buffer
)
10150 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
10151 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10153 if (mpx_state_buffer
)
10154 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
10156 kvm_load_guest_fpu(vcpu
);
10160 kvm_pmu_reset(vcpu
);
10161 vcpu
->arch
.smbase
= 0x30000;
10163 vcpu
->arch
.msr_misc_features_enables
= 0;
10165 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10168 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
10169 vcpu
->arch
.regs_avail
= ~0;
10170 vcpu
->arch
.regs_dirty
= ~0;
10172 vcpu
->arch
.ia32_xss
= 0;
10174 kvm_x86_ops
.vcpu_reset(vcpu
, init_event
);
10177 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
10179 struct kvm_segment cs
;
10181 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10182 cs
.selector
= vector
<< 8;
10183 cs
.base
= vector
<< 12;
10184 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10185 kvm_rip_write(vcpu
, 0);
10187 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
10189 int kvm_arch_hardware_enable(void)
10192 struct kvm_vcpu
*vcpu
;
10197 bool stable
, backwards_tsc
= false;
10199 kvm_user_return_msr_cpu_online();
10200 ret
= kvm_x86_ops
.hardware_enable();
10204 local_tsc
= rdtsc();
10205 stable
= !kvm_check_tsc_unstable();
10206 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10207 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10208 if (!stable
&& vcpu
->cpu
== smp_processor_id())
10209 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
10210 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
10211 backwards_tsc
= true;
10212 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
10213 max_tsc
= vcpu
->arch
.last_host_tsc
;
10219 * Sometimes, even reliable TSCs go backwards. This happens on
10220 * platforms that reset TSC during suspend or hibernate actions, but
10221 * maintain synchronization. We must compensate. Fortunately, we can
10222 * detect that condition here, which happens early in CPU bringup,
10223 * before any KVM threads can be running. Unfortunately, we can't
10224 * bring the TSCs fully up to date with real time, as we aren't yet far
10225 * enough into CPU bringup that we know how much real time has actually
10226 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10227 * variables that haven't been updated yet.
10229 * So we simply find the maximum observed TSC above, then record the
10230 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
10231 * the adjustment will be applied. Note that we accumulate
10232 * adjustments, in case multiple suspend cycles happen before some VCPU
10233 * gets a chance to run again. In the event that no KVM threads get a
10234 * chance to run, we will miss the entire elapsed period, as we'll have
10235 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10236 * loose cycle time. This isn't too big a deal, since the loss will be
10237 * uniform across all VCPUs (not to mention the scenario is extremely
10238 * unlikely). It is possible that a second hibernate recovery happens
10239 * much faster than a first, causing the observed TSC here to be
10240 * smaller; this would require additional padding adjustment, which is
10241 * why we set last_host_tsc to the local tsc observed here.
10243 * N.B. - this code below runs only on platforms with reliable TSC,
10244 * as that is the only way backwards_tsc is set above. Also note
10245 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10246 * have the same delta_cyc adjustment applied if backwards_tsc
10247 * is detected. Note further, this adjustment is only done once,
10248 * as we reset last_host_tsc on all VCPUs to stop this from being
10249 * called multiple times (one for each physical CPU bringup).
10251 * Platforms with unreliable TSCs don't have to deal with this, they
10252 * will be compensated by the logic in vcpu_load, which sets the TSC to
10253 * catchup mode. This will catchup all VCPUs to real time, but cannot
10254 * guarantee that they stay in perfect synchronization.
10256 if (backwards_tsc
) {
10257 u64 delta_cyc
= max_tsc
- local_tsc
;
10258 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10259 kvm
->arch
.backwards_tsc_observed
= true;
10260 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10261 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
10262 vcpu
->arch
.last_host_tsc
= local_tsc
;
10263 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
10267 * We have to disable TSC offset matching.. if you were
10268 * booting a VM while issuing an S4 host suspend....
10269 * you may have some problem. Solving this issue is
10270 * left as an exercise to the reader.
10272 kvm
->arch
.last_tsc_nsec
= 0;
10273 kvm
->arch
.last_tsc_write
= 0;
10280 void kvm_arch_hardware_disable(void)
10282 kvm_x86_ops
.hardware_disable();
10283 drop_user_return_notifiers();
10286 int kvm_arch_hardware_setup(void *opaque
)
10288 struct kvm_x86_init_ops
*ops
= opaque
;
10291 rdmsrl_safe(MSR_EFER
, &host_efer
);
10293 if (boot_cpu_has(X86_FEATURE_XSAVES
))
10294 rdmsrl(MSR_IA32_XSS
, host_xss
);
10296 r
= ops
->hardware_setup();
10300 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
10302 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
10305 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10306 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
10307 #undef __kvm_cpu_cap_has
10309 if (kvm_has_tsc_control
) {
10311 * Make sure the user can only configure tsc_khz values that
10312 * fit into a signed integer.
10313 * A min value is not calculated because it will always
10314 * be 1 on all machines.
10316 u64 max
= min(0x7fffffffULL
,
10317 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
10318 kvm_max_guest_tsc_khz
= max
;
10320 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
10323 kvm_init_msr_list();
10327 void kvm_arch_hardware_unsetup(void)
10329 kvm_x86_ops
.hardware_unsetup();
10332 int kvm_arch_check_processor_compat(void *opaque
)
10334 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
10335 struct kvm_x86_init_ops
*ops
= opaque
;
10337 WARN_ON(!irqs_disabled());
10339 if (__cr4_reserved_bits(cpu_has
, c
) !=
10340 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
10343 return ops
->check_processor_compatibility();
10346 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
10348 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
10350 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
10352 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
10354 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
10357 struct static_key kvm_no_apic_vcpu __read_mostly
;
10358 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
10360 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
10362 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
10364 vcpu
->arch
.l1tf_flush_l1d
= true;
10365 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
10366 pmu
->need_cleanup
= true;
10367 kvm_make_request(KVM_REQ_PMU
, vcpu
);
10369 kvm_x86_ops
.sched_in(vcpu
, cpu
);
10372 void kvm_arch_free_vm(struct kvm
*kvm
)
10374 kfree(kvm
->arch
.hyperv
.hv_pa_pg
);
10379 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
10384 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
10385 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
10386 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
10387 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
10388 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
10389 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
10391 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10392 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
10393 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10394 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
10395 &kvm
->arch
.irq_sources_bitmap
);
10397 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
10398 mutex_init(&kvm
->arch
.apic_map_lock
);
10399 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
10401 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
10402 pvclock_update_vm_gtod_copy(kvm
);
10404 kvm
->arch
.guest_can_read_msr_platform_info
= true;
10406 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
10407 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
10409 kvm_hv_init_vm(kvm
);
10410 kvm_page_track_init(kvm
);
10411 kvm_mmu_init_vm(kvm
);
10413 return kvm_x86_ops
.vm_init(kvm
);
10416 int kvm_arch_post_init_vm(struct kvm
*kvm
)
10418 return kvm_mmu_post_init_vm(kvm
);
10421 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
10424 kvm_mmu_unload(vcpu
);
10428 static void kvm_free_vcpus(struct kvm
*kvm
)
10431 struct kvm_vcpu
*vcpu
;
10434 * Unpin any mmu pages first.
10436 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10437 kvm_clear_async_pf_completion_queue(vcpu
);
10438 kvm_unload_vcpu_mmu(vcpu
);
10440 kvm_for_each_vcpu(i
, vcpu
, kvm
)
10441 kvm_vcpu_destroy(vcpu
);
10443 mutex_lock(&kvm
->lock
);
10444 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
10445 kvm
->vcpus
[i
] = NULL
;
10447 atomic_set(&kvm
->online_vcpus
, 0);
10448 mutex_unlock(&kvm
->lock
);
10451 void kvm_arch_sync_events(struct kvm
*kvm
)
10453 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
10454 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
10458 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
10461 * __x86_set_memory_region: Setup KVM internal memory slot
10463 * @kvm: the kvm pointer to the VM.
10464 * @id: the slot ID to setup.
10465 * @gpa: the GPA to install the slot (unused when @size == 0).
10466 * @size: the size of the slot. Set to zero to uninstall a slot.
10468 * This function helps to setup a KVM internal memory slot. Specify
10469 * @size > 0 to install a new slot, while @size == 0 to uninstall a
10470 * slot. The return code can be one of the following:
10472 * HVA: on success (uninstall will return a bogus HVA)
10475 * The caller should always use IS_ERR() to check the return value
10476 * before use. Note, the KVM internal memory slots are guaranteed to
10477 * remain valid and unchanged until the VM is destroyed, i.e., the
10478 * GPA->HVA translation will not change. However, the HVA is a user
10479 * address, i.e. its accessibility is not guaranteed, and must be
10480 * accessed via __copy_{to,from}_user().
10482 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
10486 unsigned long hva
, old_npages
;
10487 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
10488 struct kvm_memory_slot
*slot
;
10490 /* Called with kvm->slots_lock held. */
10491 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
10492 return ERR_PTR_USR(-EINVAL
);
10494 slot
= id_to_memslot(slots
, id
);
10496 if (slot
&& slot
->npages
)
10497 return ERR_PTR_USR(-EEXIST
);
10500 * MAP_SHARED to prevent internal slot pages from being moved
10503 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
10504 MAP_SHARED
| MAP_ANONYMOUS
, 0);
10505 if (IS_ERR((void *)hva
))
10506 return (void __user
*)hva
;
10508 if (!slot
|| !slot
->npages
)
10511 old_npages
= slot
->npages
;
10512 hva
= slot
->userspace_addr
;
10515 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
10516 struct kvm_userspace_memory_region m
;
10518 m
.slot
= id
| (i
<< 16);
10520 m
.guest_phys_addr
= gpa
;
10521 m
.userspace_addr
= hva
;
10522 m
.memory_size
= size
;
10523 r
= __kvm_set_memory_region(kvm
, &m
);
10525 return ERR_PTR_USR(r
);
10529 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
10531 return (void __user
*)hva
;
10533 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
10535 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
10537 kvm_mmu_pre_destroy_vm(kvm
);
10540 void kvm_arch_destroy_vm(struct kvm
*kvm
)
10544 if (current
->mm
== kvm
->mm
) {
10546 * Free memory regions allocated on behalf of userspace,
10547 * unless the the memory map has changed due to process exit
10550 mutex_lock(&kvm
->slots_lock
);
10551 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
10553 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
10555 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
10556 mutex_unlock(&kvm
->slots_lock
);
10558 if (kvm_x86_ops
.vm_destroy
)
10559 kvm_x86_ops
.vm_destroy(kvm
);
10560 for (i
= 0; i
< kvm
->arch
.msr_filter
.count
; i
++)
10561 kfree(kvm
->arch
.msr_filter
.ranges
[i
].bitmap
);
10562 kvm_pic_destroy(kvm
);
10563 kvm_ioapic_destroy(kvm
);
10564 kvm_free_vcpus(kvm
);
10565 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
10566 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
10567 kvm_mmu_uninit_vm(kvm
);
10568 kvm_page_track_cleanup(kvm
);
10569 kvm_hv_destroy_vm(kvm
);
10572 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
10576 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10577 kvfree(slot
->arch
.rmap
[i
]);
10578 slot
->arch
.rmap
[i
] = NULL
;
10583 kvfree(slot
->arch
.lpage_info
[i
- 1]);
10584 slot
->arch
.lpage_info
[i
- 1] = NULL
;
10587 kvm_page_track_free_memslot(slot
);
10590 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot
*slot
,
10591 unsigned long npages
)
10596 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
10597 * old arrays will be freed by __kvm_set_memory_region() if installing
10598 * the new memslot is successful.
10600 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
10602 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10603 struct kvm_lpage_info
*linfo
;
10604 unsigned long ugfn
;
10608 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
10609 slot
->base_gfn
, level
) + 1;
10611 slot
->arch
.rmap
[i
] =
10612 kvcalloc(lpages
, sizeof(*slot
->arch
.rmap
[i
]),
10613 GFP_KERNEL_ACCOUNT
);
10614 if (!slot
->arch
.rmap
[i
])
10619 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
10623 slot
->arch
.lpage_info
[i
- 1] = linfo
;
10625 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
10626 linfo
[0].disallow_lpage
= 1;
10627 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
10628 linfo
[lpages
- 1].disallow_lpage
= 1;
10629 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
10631 * If the gfn and userspace address are not aligned wrt each
10632 * other, disable large page support for this slot.
10634 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
10637 for (j
= 0; j
< lpages
; ++j
)
10638 linfo
[j
].disallow_lpage
= 1;
10642 if (kvm_page_track_create_memslot(slot
, npages
))
10648 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10649 kvfree(slot
->arch
.rmap
[i
]);
10650 slot
->arch
.rmap
[i
] = NULL
;
10654 kvfree(slot
->arch
.lpage_info
[i
- 1]);
10655 slot
->arch
.lpage_info
[i
- 1] = NULL
;
10660 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
10662 struct kvm_vcpu
*vcpu
;
10666 * memslots->generation has been incremented.
10667 * mmio generation may have reached its maximum value.
10669 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
10671 /* Force re-initialization of steal_time cache */
10672 kvm_for_each_vcpu(i
, vcpu
, kvm
)
10673 kvm_vcpu_kick(vcpu
);
10676 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
10677 struct kvm_memory_slot
*memslot
,
10678 const struct kvm_userspace_memory_region
*mem
,
10679 enum kvm_mr_change change
)
10681 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
10682 return kvm_alloc_memslot_metadata(memslot
,
10683 mem
->memory_size
>> PAGE_SHIFT
);
10687 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
10688 struct kvm_memory_slot
*old
,
10689 struct kvm_memory_slot
*new,
10690 enum kvm_mr_change change
)
10693 * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10694 * See comments below.
10696 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new->flags
& KVM_MEM_READONLY
))
10700 * Dirty logging tracks sptes in 4k granularity, meaning that large
10701 * sptes have to be split. If live migration is successful, the guest
10702 * in the source machine will be destroyed and large sptes will be
10703 * created in the destination. However, if the guest continues to run
10704 * in the source machine (for example if live migration fails), small
10705 * sptes will remain around and cause bad performance.
10707 * Scan sptes if dirty logging has been stopped, dropping those
10708 * which can be collapsed into a single large-page spte. Later
10709 * page faults will create the large-page sptes.
10711 * There is no need to do this in any of the following cases:
10712 * CREATE: No dirty mappings will already exist.
10713 * MOVE/DELETE: The old mappings will already have been cleaned up by
10714 * kvm_arch_flush_shadow_memslot()
10716 if ((old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
10717 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
10718 kvm_mmu_zap_collapsible_sptes(kvm
, new);
10721 * Enable or disable dirty logging for the slot.
10723 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10724 * slot have been zapped so no dirty logging updates are needed for
10726 * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10727 * any mappings that might be created in it will consume the
10728 * properties of the new slot and do not need to be updated here.
10730 * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10731 * called to enable/disable dirty logging.
10733 * When disabling dirty logging with PML enabled, the D-bit is set
10734 * for sptes in the slot in order to prevent unnecessary GPA
10735 * logging in the PML buffer (and potential PML buffer full VMEXIT).
10736 * This guarantees leaving PML enabled for the guest's lifetime
10737 * won't have any additional overhead from PML when the guest is
10738 * running with dirty logging disabled.
10740 * When enabling dirty logging, large sptes are write-protected
10741 * so they can be split on first write. New large sptes cannot
10742 * be created for this slot until the end of the logging.
10743 * See the comments in fast_page_fault().
10744 * For small sptes, nothing is done if the dirty log is in the
10745 * initial-all-set state. Otherwise, depending on whether pml
10746 * is enabled the D-bit or the W-bit will be cleared.
10748 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
10749 if (kvm_x86_ops
.slot_enable_log_dirty
) {
10750 kvm_x86_ops
.slot_enable_log_dirty(kvm
, new);
10753 kvm_dirty_log_manual_protect_and_init_set(kvm
) ?
10754 PG_LEVEL_2M
: PG_LEVEL_4K
;
10757 * If we're with initial-all-set, we don't need
10758 * to write protect any small page because
10759 * they're reported as dirty already. However
10760 * we still need to write-protect huge pages
10761 * so that the page split can happen lazily on
10762 * the first write to the huge page.
10764 kvm_mmu_slot_remove_write_access(kvm
, new, level
);
10767 if (kvm_x86_ops
.slot_disable_log_dirty
)
10768 kvm_x86_ops
.slot_disable_log_dirty(kvm
, new);
10772 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
10773 const struct kvm_userspace_memory_region
*mem
,
10774 struct kvm_memory_slot
*old
,
10775 const struct kvm_memory_slot
*new,
10776 enum kvm_mr_change change
)
10778 if (!kvm
->arch
.n_requested_mmu_pages
)
10779 kvm_mmu_change_mmu_pages(kvm
,
10780 kvm_mmu_calculate_default_mmu_pages(kvm
));
10783 * FIXME: const-ify all uses of struct kvm_memory_slot.
10785 kvm_mmu_slot_apply_flags(kvm
, old
, (struct kvm_memory_slot
*) new, change
);
10787 /* Free the arrays associated with the old memslot. */
10788 if (change
== KVM_MR_MOVE
)
10789 kvm_arch_free_memslot(kvm
, old
);
10792 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
10794 kvm_mmu_zap_all(kvm
);
10797 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
10798 struct kvm_memory_slot
*slot
)
10800 kvm_page_track_flush_slot(kvm
, slot
);
10803 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
10805 return (is_guest_mode(vcpu
) &&
10806 kvm_x86_ops
.guest_apic_has_interrupt
&&
10807 kvm_x86_ops
.guest_apic_has_interrupt(vcpu
));
10810 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
10812 if (!list_empty_careful(&vcpu
->async_pf
.done
))
10815 if (kvm_apic_has_events(vcpu
))
10818 if (vcpu
->arch
.pv
.pv_unhalted
)
10821 if (vcpu
->arch
.exception
.pending
)
10824 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
10825 (vcpu
->arch
.nmi_pending
&&
10826 kvm_x86_ops
.nmi_allowed(vcpu
, false)))
10829 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
10830 (vcpu
->arch
.smi_pending
&&
10831 kvm_x86_ops
.smi_allowed(vcpu
, false)))
10834 if (kvm_arch_interrupt_allowed(vcpu
) &&
10835 (kvm_cpu_has_interrupt(vcpu
) ||
10836 kvm_guest_apic_has_interrupt(vcpu
)))
10839 if (kvm_hv_has_stimer_pending(vcpu
))
10842 if (is_guest_mode(vcpu
) &&
10843 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
10844 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
10850 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
10852 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
10855 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
10857 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
10860 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
10861 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
10862 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
10865 if (vcpu
->arch
.apicv_active
&& kvm_x86_ops
.dy_apicv_has_pending_interrupt(vcpu
))
10871 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
10873 return vcpu
->arch
.preempted_in_kernel
;
10876 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
10878 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
10881 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
10883 return kvm_x86_ops
.interrupt_allowed(vcpu
, false);
10886 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
10888 /* Can't read the RIP when guest state is protected, just return 0 */
10889 if (vcpu
->arch
.guest_state_protected
)
10892 if (is_64_bit_mode(vcpu
))
10893 return kvm_rip_read(vcpu
);
10894 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
10895 kvm_rip_read(vcpu
));
10897 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
10899 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
10901 return kvm_get_linear_rip(vcpu
) == linear_rip
;
10903 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
10905 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
10907 unsigned long rflags
;
10909 rflags
= kvm_x86_ops
.get_rflags(vcpu
);
10910 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10911 rflags
&= ~X86_EFLAGS_TF
;
10914 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
10916 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
10918 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
10919 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
10920 rflags
|= X86_EFLAGS_TF
;
10921 kvm_x86_ops
.set_rflags(vcpu
, rflags
);
10924 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
10926 __kvm_set_rflags(vcpu
, rflags
);
10927 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10929 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
10931 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
10935 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
10939 r
= kvm_mmu_reload(vcpu
);
10943 if (!vcpu
->arch
.mmu
->direct_map
&&
10944 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
10947 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
10950 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
10952 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
10954 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
10957 static inline u32
kvm_async_pf_next_probe(u32 key
)
10959 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
10962 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10964 u32 key
= kvm_async_pf_hash_fn(gfn
);
10966 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
10967 key
= kvm_async_pf_next_probe(key
);
10969 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
10972 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10975 u32 key
= kvm_async_pf_hash_fn(gfn
);
10977 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
10978 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
10979 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
10980 key
= kvm_async_pf_next_probe(key
);
10985 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10987 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
10990 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10994 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
10996 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
11000 vcpu
->arch
.apf
.gfns
[i
] = ~0;
11002 j
= kvm_async_pf_next_probe(j
);
11003 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
11005 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
11007 * k lies cyclically in ]i,j]
11009 * |....j i.k.| or |.k..j i...|
11011 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
11012 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
11017 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
11019 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
11021 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
11025 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
11027 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11029 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11030 &token
, offset
, sizeof(token
));
11033 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
11035 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11038 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11039 &val
, offset
, sizeof(val
)))
11045 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
11047 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
11050 if (!kvm_pv_async_pf_enabled(vcpu
) ||
11051 (vcpu
->arch
.apf
.send_user_only
&& kvm_x86_ops
.get_cpl(vcpu
) == 0))
11057 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
11059 if (unlikely(!lapic_in_kernel(vcpu
) ||
11060 kvm_event_needs_reinjection(vcpu
) ||
11061 vcpu
->arch
.exception
.pending
))
11064 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
11068 * If interrupts are off we cannot even use an artificial
11071 return kvm_arch_interrupt_allowed(vcpu
);
11074 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
11075 struct kvm_async_pf
*work
)
11077 struct x86_exception fault
;
11079 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
11080 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11082 if (kvm_can_deliver_async_pf(vcpu
) &&
11083 !apf_put_user_notpresent(vcpu
)) {
11084 fault
.vector
= PF_VECTOR
;
11085 fault
.error_code_valid
= true;
11086 fault
.error_code
= 0;
11087 fault
.nested_page_fault
= false;
11088 fault
.address
= work
->arch
.token
;
11089 fault
.async_page_fault
= true;
11090 kvm_inject_page_fault(vcpu
, &fault
);
11094 * It is not possible to deliver a paravirtualized asynchronous
11095 * page fault, but putting the guest in an artificial halt state
11096 * can be beneficial nevertheless: if an interrupt arrives, we
11097 * can deliver it timely and perhaps the guest will schedule
11098 * another process. When the instruction that triggered a page
11099 * fault is retried, hopefully the page will be ready in the host.
11101 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
11106 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
11107 struct kvm_async_pf
*work
)
11109 struct kvm_lapic_irq irq
= {
11110 .delivery_mode
= APIC_DM_FIXED
,
11111 .vector
= vcpu
->arch
.apf
.vec
11114 if (work
->wakeup_all
)
11115 work
->arch
.token
= ~0; /* broadcast wakeup */
11117 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11118 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
11120 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
11121 kvm_pv_async_pf_enabled(vcpu
) &&
11122 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
11123 vcpu
->arch
.apf
.pageready_pending
= true;
11124 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
11127 vcpu
->arch
.apf
.halted
= false;
11128 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11131 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
11133 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
11134 if (!vcpu
->arch
.apf
.pageready_pending
)
11135 kvm_vcpu_kick(vcpu
);
11138 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
11140 if (!kvm_pv_async_pf_enabled(vcpu
))
11143 return apf_pageready_slot_free(vcpu
);
11146 void kvm_arch_start_assignment(struct kvm
*kvm
)
11148 atomic_inc(&kvm
->arch
.assigned_device_count
);
11150 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
11152 void kvm_arch_end_assignment(struct kvm
*kvm
)
11154 atomic_dec(&kvm
->arch
.assigned_device_count
);
11156 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
11158 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
11160 return atomic_read(&kvm
->arch
.assigned_device_count
);
11162 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
11164 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
11166 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
11168 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
11170 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
11172 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
11174 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
11176 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
11178 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
11180 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
11182 bool kvm_arch_has_irq_bypass(void)
11187 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
11188 struct irq_bypass_producer
*prod
)
11190 struct kvm_kernel_irqfd
*irqfd
=
11191 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
11194 irqfd
->producer
= prod
;
11195 kvm_arch_start_assignment(irqfd
->kvm
);
11196 ret
= kvm_x86_ops
.update_pi_irte(irqfd
->kvm
,
11197 prod
->irq
, irqfd
->gsi
, 1);
11200 kvm_arch_end_assignment(irqfd
->kvm
);
11205 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
11206 struct irq_bypass_producer
*prod
)
11209 struct kvm_kernel_irqfd
*irqfd
=
11210 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
11212 WARN_ON(irqfd
->producer
!= prod
);
11213 irqfd
->producer
= NULL
;
11216 * When producer of consumer is unregistered, we change back to
11217 * remapped mode, so we can re-use the current implementation
11218 * when the irq is masked/disabled or the consumer side (KVM
11219 * int this case doesn't want to receive the interrupts.
11221 ret
= kvm_x86_ops
.update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
11223 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
11224 " fails: %d\n", irqfd
->consumer
.token
, ret
);
11226 kvm_arch_end_assignment(irqfd
->kvm
);
11229 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
11230 uint32_t guest_irq
, bool set
)
11232 return kvm_x86_ops
.update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
11235 bool kvm_vector_hashing_enabled(void)
11237 return vector_hashing
;
11240 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
11242 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
11244 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
11247 int kvm_spec_ctrl_test_value(u64 value
)
11250 * test that setting IA32_SPEC_CTRL to given value
11251 * is allowed by the host processor
11255 unsigned long flags
;
11258 local_irq_save(flags
);
11260 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
11262 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
11265 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
11267 local_irq_restore(flags
);
11271 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
11273 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
11275 struct x86_exception fault
;
11276 u32 access
= error_code
&
11277 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
11279 if (!(error_code
& PFERR_PRESENT_MASK
) ||
11280 vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
11282 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11283 * tables probably do not match the TLB. Just proceed
11284 * with the error code that the processor gave.
11286 fault
.vector
= PF_VECTOR
;
11287 fault
.error_code_valid
= true;
11288 fault
.error_code
= error_code
;
11289 fault
.nested_page_fault
= false;
11290 fault
.address
= gva
;
11292 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
11294 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
11297 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11298 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11299 * indicates whether exit to userspace is needed.
11301 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
11302 struct x86_exception
*e
)
11304 if (r
== X86EMUL_PROPAGATE_FAULT
) {
11305 kvm_inject_emulated_page_fault(vcpu
, e
);
11310 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11311 * while handling a VMX instruction KVM could've handled the request
11312 * correctly by exiting to userspace and performing I/O but there
11313 * doesn't seem to be a real use-case behind such requests, just return
11314 * KVM_EXIT_INTERNAL_ERROR for now.
11316 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
11317 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
11318 vcpu
->run
->internal
.ndata
= 0;
11322 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
11324 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
11327 struct x86_exception e
;
11329 unsigned long roots_to_free
= 0;
11336 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
11337 if (r
!= X86EMUL_CONTINUE
)
11338 return kvm_handle_memory_failure(vcpu
, r
, &e
);
11340 if (operand
.pcid
>> 12 != 0) {
11341 kvm_inject_gp(vcpu
, 0);
11345 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
11348 case INVPCID_TYPE_INDIV_ADDR
:
11349 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
11350 is_noncanonical_address(operand
.gla
, vcpu
)) {
11351 kvm_inject_gp(vcpu
, 0);
11354 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
11355 return kvm_skip_emulated_instruction(vcpu
);
11357 case INVPCID_TYPE_SINGLE_CTXT
:
11358 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
11359 kvm_inject_gp(vcpu
, 0);
11363 if (kvm_get_active_pcid(vcpu
) == operand
.pcid
) {
11364 kvm_mmu_sync_roots(vcpu
);
11365 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
11368 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
11369 if (kvm_get_pcid(vcpu
, vcpu
->arch
.mmu
->prev_roots
[i
].pgd
)
11371 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
11373 kvm_mmu_free_roots(vcpu
, vcpu
->arch
.mmu
, roots_to_free
);
11375 * If neither the current cr3 nor any of the prev_roots use the
11376 * given PCID, then nothing needs to be done here because a
11377 * resync will happen anyway before switching to any other CR3.
11380 return kvm_skip_emulated_instruction(vcpu
);
11382 case INVPCID_TYPE_ALL_NON_GLOBAL
:
11384 * Currently, KVM doesn't mark global entries in the shadow
11385 * page tables, so a non-global flush just degenerates to a
11386 * global flush. If needed, we could optimize this later by
11387 * keeping track of global entries in shadow page tables.
11391 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
11392 kvm_mmu_unload(vcpu
);
11393 return kvm_skip_emulated_instruction(vcpu
);
11396 BUG(); /* We have already checked above that type <= 3 */
11399 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
11401 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
11403 struct kvm_run
*run
= vcpu
->run
;
11404 struct kvm_mmio_fragment
*frag
;
11407 BUG_ON(!vcpu
->mmio_needed
);
11409 /* Complete previous fragment */
11410 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
11411 len
= min(8u, frag
->len
);
11412 if (!vcpu
->mmio_is_write
)
11413 memcpy(frag
->data
, run
->mmio
.data
, len
);
11415 if (frag
->len
<= 8) {
11416 /* Switch to the next fragment. */
11418 vcpu
->mmio_cur_fragment
++;
11420 /* Go forward to the next mmio piece. */
11426 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
11427 vcpu
->mmio_needed
= 0;
11429 // VMG change, at this point, we're always done
11430 // RIP has already been advanced
11434 // More MMIO is needed
11435 run
->mmio
.phys_addr
= frag
->gpa
;
11436 run
->mmio
.len
= min(8u, frag
->len
);
11437 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
11438 if (run
->mmio
.is_write
)
11439 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11440 run
->exit_reason
= KVM_EXIT_MMIO
;
11442 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11447 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
11451 struct kvm_mmio_fragment
*frag
;
11456 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
11457 if (handled
== bytes
)
11464 /*TODO: Check if need to increment number of frags */
11465 frag
= vcpu
->mmio_fragments
;
11466 vcpu
->mmio_nr_fragments
= 1;
11471 vcpu
->mmio_needed
= 1;
11472 vcpu
->mmio_cur_fragment
= 0;
11474 vcpu
->run
->mmio
.phys_addr
= gpa
;
11475 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
11476 vcpu
->run
->mmio
.is_write
= 1;
11477 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11478 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
11480 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11484 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
11486 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
11490 struct kvm_mmio_fragment
*frag
;
11495 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
11496 if (handled
== bytes
)
11503 /*TODO: Check if need to increment number of frags */
11504 frag
= vcpu
->mmio_fragments
;
11505 vcpu
->mmio_nr_fragments
= 1;
11510 vcpu
->mmio_needed
= 1;
11511 vcpu
->mmio_cur_fragment
= 0;
11513 vcpu
->run
->mmio
.phys_addr
= gpa
;
11514 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
11515 vcpu
->run
->mmio
.is_write
= 0;
11516 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
11518 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11522 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
11524 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
11526 memcpy(vcpu
->arch
.guest_ins_data
, vcpu
->arch
.pio_data
,
11527 vcpu
->arch
.pio
.count
* vcpu
->arch
.pio
.size
);
11528 vcpu
->arch
.pio
.count
= 0;
11533 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
11534 unsigned int port
, void *data
, unsigned int count
)
11538 ret
= emulator_pio_out_emulated(vcpu
->arch
.emulate_ctxt
, size
, port
,
11543 vcpu
->arch
.pio
.count
= 0;
11548 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
11549 unsigned int port
, void *data
, unsigned int count
)
11553 ret
= emulator_pio_in_emulated(vcpu
->arch
.emulate_ctxt
, size
, port
,
11556 vcpu
->arch
.pio
.count
= 0;
11558 vcpu
->arch
.guest_ins_data
= data
;
11559 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
11565 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
11566 unsigned int port
, void *data
, unsigned int count
,
11569 return in
? kvm_sev_es_ins(vcpu
, size
, port
, data
, count
)
11570 : kvm_sev_es_outs(vcpu
, size
, port
, data
, count
);
11572 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
11574 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
11575 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
11576 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
11577 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
11578 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
11579 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
11580 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
11581 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
11582 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
11583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
11584 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
11585 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
11586 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
11587 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
11588 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
11589 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
11590 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
11591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
11592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
11593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
11594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
11595 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
11596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);
11597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
11598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
11599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
11600 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);