1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/sched/isolation.h>
58 #include <linux/mem_encrypt.h>
59 #include <linux/entry-kvm.h>
61 #include <trace/events/kvm.h>
63 #include <asm/debugreg.h>
67 #include <linux/kernel_stat.h>
68 #include <asm/fpu/internal.h> /* Ugh! */
69 #include <asm/pvclock.h>
70 #include <asm/div64.h>
71 #include <asm/irq_remapping.h>
72 #include <asm/mshyperv.h>
73 #include <asm/hypervisor.h>
74 #include <asm/tlbflush.h>
75 #include <asm/intel_pt.h>
76 #include <asm/emulate_prefix.h>
77 #include <clocksource/hyperv_timer.h>
79 #define CREATE_TRACE_POINTS
82 #define MAX_IO_MSRS 256
83 #define KVM_MAX_MCE_BANKS 32
84 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
87 #define emul_to_vcpu(ctxt) \
88 ((struct kvm_vcpu *)(ctxt)->vcpu)
91 * - enable syscall per default because its emulated by KVM
92 * - enable LME and LMA per default on 64 bit KVM
96 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
98 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
101 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
104 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
106 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
107 static void process_nmi(struct kvm_vcpu
*vcpu
);
108 static void process_smi(struct kvm_vcpu
*vcpu
);
109 static void enter_smm(struct kvm_vcpu
*vcpu
);
110 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
111 static void store_regs(struct kvm_vcpu
*vcpu
);
112 static int sync_regs(struct kvm_vcpu
*vcpu
);
114 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
115 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
117 #define KVM_X86_OP(func) \
118 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
119 *(((struct kvm_x86_ops *)0)->func));
120 #define KVM_X86_OP_NULL KVM_X86_OP
121 #include <asm/kvm-x86-ops.h>
122 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
123 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
124 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current
);
126 static bool __read_mostly ignore_msrs
= 0;
127 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
129 bool __read_mostly report_ignored_msrs
= true;
130 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
131 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
133 unsigned int min_timer_period_us
= 200;
134 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
136 static bool __read_mostly kvmclock_periodic_sync
= true;
137 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
139 bool __read_mostly kvm_has_tsc_control
;
140 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
141 u32 __read_mostly kvm_max_guest_tsc_khz
;
142 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
143 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
144 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
145 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
146 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
147 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
148 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
149 bool __read_mostly kvm_has_bus_lock_exit
;
150 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit
);
152 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
153 static u32 __read_mostly tsc_tolerance_ppm
= 250;
154 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
157 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
158 * adaptive tuning starting from default advancment of 1000ns. '0' disables
159 * advancement entirely. Any other value is used as-is and disables adaptive
160 * tuning, i.e. allows priveleged userspace to set an exact advancement time.
162 static int __read_mostly lapic_timer_advance_ns
= -1;
163 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
165 static bool __read_mostly vector_hashing
= true;
166 module_param(vector_hashing
, bool, S_IRUGO
);
168 bool __read_mostly enable_vmware_backdoor
= false;
169 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
170 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
172 static bool __read_mostly force_emulation_prefix
= false;
173 module_param(force_emulation_prefix
, bool, S_IRUGO
);
175 int __read_mostly pi_inject_timer
= -1;
176 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
179 * Restoring the host value for MSRs that are only consumed when running in
180 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
181 * returns to userspace, i.e. the kernel can run with the guest's value.
183 #define KVM_MAX_NR_USER_RETURN_MSRS 16
185 struct kvm_user_return_msrs_global
{
187 u32 msrs
[KVM_MAX_NR_USER_RETURN_MSRS
];
190 struct kvm_user_return_msrs
{
191 struct user_return_notifier urn
;
193 struct kvm_user_return_msr_values
{
196 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
199 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global
;
200 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
202 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
203 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
204 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
205 | XFEATURE_MASK_PKRU)
207 u64 __read_mostly host_efer
;
208 EXPORT_SYMBOL_GPL(host_efer
);
210 bool __read_mostly allow_smaller_maxphyaddr
= 0;
211 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
213 u64 __read_mostly host_xss
;
214 EXPORT_SYMBOL_GPL(host_xss
);
215 u64 __read_mostly supported_xss
;
216 EXPORT_SYMBOL_GPL(supported_xss
);
218 struct kvm_stats_debugfs_item debugfs_entries
[] = {
219 VCPU_STAT("pf_fixed", pf_fixed
),
220 VCPU_STAT("pf_guest", pf_guest
),
221 VCPU_STAT("tlb_flush", tlb_flush
),
222 VCPU_STAT("invlpg", invlpg
),
223 VCPU_STAT("exits", exits
),
224 VCPU_STAT("io_exits", io_exits
),
225 VCPU_STAT("mmio_exits", mmio_exits
),
226 VCPU_STAT("signal_exits", signal_exits
),
227 VCPU_STAT("irq_window", irq_window_exits
),
228 VCPU_STAT("nmi_window", nmi_window_exits
),
229 VCPU_STAT("halt_exits", halt_exits
),
230 VCPU_STAT("halt_successful_poll", halt_successful_poll
),
231 VCPU_STAT("halt_attempted_poll", halt_attempted_poll
),
232 VCPU_STAT("halt_poll_invalid", halt_poll_invalid
),
233 VCPU_STAT("halt_wakeup", halt_wakeup
),
234 VCPU_STAT("hypercalls", hypercalls
),
235 VCPU_STAT("request_irq", request_irq_exits
),
236 VCPU_STAT("irq_exits", irq_exits
),
237 VCPU_STAT("host_state_reload", host_state_reload
),
238 VCPU_STAT("fpu_reload", fpu_reload
),
239 VCPU_STAT("insn_emulation", insn_emulation
),
240 VCPU_STAT("insn_emulation_fail", insn_emulation_fail
),
241 VCPU_STAT("irq_injections", irq_injections
),
242 VCPU_STAT("nmi_injections", nmi_injections
),
243 VCPU_STAT("req_event", req_event
),
244 VCPU_STAT("l1d_flush", l1d_flush
),
245 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns
),
246 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns
),
247 VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped
),
248 VM_STAT("mmu_pte_write", mmu_pte_write
),
249 VM_STAT("mmu_pde_zapped", mmu_pde_zapped
),
250 VM_STAT("mmu_flooded", mmu_flooded
),
251 VM_STAT("mmu_recycled", mmu_recycled
),
252 VM_STAT("mmu_cache_miss", mmu_cache_miss
),
253 VM_STAT("mmu_unsync", mmu_unsync
),
254 VM_STAT("remote_tlb_flush", remote_tlb_flush
),
255 VM_STAT("largepages", lpages
, .mode
= 0444),
256 VM_STAT("nx_largepages_splitted", nx_lpage_splits
, .mode
= 0444),
257 VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions
),
261 u64 __read_mostly host_xcr0
;
262 u64 __read_mostly supported_xcr0
;
263 EXPORT_SYMBOL_GPL(supported_xcr0
);
265 static struct kmem_cache
*x86_fpu_cache
;
267 static struct kmem_cache
*x86_emulator_cache
;
270 * When called, it means the previous get/set msr reached an invalid msr.
271 * Return true if we want to ignore/silent this failed msr access.
273 static bool kvm_msr_ignored_check(struct kvm_vcpu
*vcpu
, u32 msr
,
274 u64 data
, bool write
)
276 const char *op
= write
? "wrmsr" : "rdmsr";
279 if (report_ignored_msrs
)
280 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
285 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
291 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
293 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
294 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
296 return kmem_cache_create_usercopy("x86_emulator", size
,
297 __alignof__(struct x86_emulate_ctxt
),
298 SLAB_ACCOUNT
, useroffset
,
299 size
- useroffset
, NULL
);
302 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
304 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
307 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
308 vcpu
->arch
.apf
.gfns
[i
] = ~0;
311 static void kvm_on_user_return(struct user_return_notifier
*urn
)
314 struct kvm_user_return_msrs
*msrs
315 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
316 struct kvm_user_return_msr_values
*values
;
320 * Disabling irqs at this point since the following code could be
321 * interrupted and executed through kvm_arch_hardware_disable()
323 local_irq_save(flags
);
324 if (msrs
->registered
) {
325 msrs
->registered
= false;
326 user_return_notifier_unregister(urn
);
328 local_irq_restore(flags
);
329 for (slot
= 0; slot
< user_return_msrs_global
.nr
; ++slot
) {
330 values
= &msrs
->values
[slot
];
331 if (values
->host
!= values
->curr
) {
332 wrmsrl(user_return_msrs_global
.msrs
[slot
], values
->host
);
333 values
->curr
= values
->host
;
338 void kvm_define_user_return_msr(unsigned slot
, u32 msr
)
340 BUG_ON(slot
>= KVM_MAX_NR_USER_RETURN_MSRS
);
341 user_return_msrs_global
.msrs
[slot
] = msr
;
342 if (slot
>= user_return_msrs_global
.nr
)
343 user_return_msrs_global
.nr
= slot
+ 1;
345 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr
);
347 static void kvm_user_return_msr_cpu_online(void)
349 unsigned int cpu
= smp_processor_id();
350 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
354 for (i
= 0; i
< user_return_msrs_global
.nr
; ++i
) {
355 rdmsrl_safe(user_return_msrs_global
.msrs
[i
], &value
);
356 msrs
->values
[i
].host
= value
;
357 msrs
->values
[i
].curr
= value
;
361 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
363 unsigned int cpu
= smp_processor_id();
364 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
367 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
368 if (value
== msrs
->values
[slot
].curr
)
370 err
= wrmsrl_safe(user_return_msrs_global
.msrs
[slot
], value
);
374 msrs
->values
[slot
].curr
= value
;
375 if (!msrs
->registered
) {
376 msrs
->urn
.on_user_return
= kvm_on_user_return
;
377 user_return_notifier_register(&msrs
->urn
);
378 msrs
->registered
= true;
382 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
384 static void drop_user_return_notifiers(void)
386 unsigned int cpu
= smp_processor_id();
387 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
389 if (msrs
->registered
)
390 kvm_on_user_return(&msrs
->urn
);
393 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
395 return vcpu
->arch
.apic_base
;
397 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
399 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
401 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
403 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
405 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
407 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
408 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
409 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
410 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
412 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
414 if (!msr_info
->host_initiated
) {
415 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
417 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
421 kvm_lapic_set_base(vcpu
, msr_info
->data
);
422 kvm_recalculate_apic_map(vcpu
->kvm
);
425 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
427 asmlinkage __visible noinstr
void kvm_spurious_fault(void)
429 /* Fault while not rebooting. We want the trace. */
430 BUG_ON(!kvm_rebooting
);
432 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
434 #define EXCPT_BENIGN 0
435 #define EXCPT_CONTRIBUTORY 1
438 static int exception_class(int vector
)
448 return EXCPT_CONTRIBUTORY
;
455 #define EXCPT_FAULT 0
457 #define EXCPT_ABORT 2
458 #define EXCPT_INTERRUPT 3
460 static int exception_type(int vector
)
464 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
465 return EXCPT_INTERRUPT
;
469 /* #DB is trap, as instruction watchpoints are handled elsewhere */
470 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
473 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
476 /* Reserved exceptions will result in fault */
480 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
482 unsigned nr
= vcpu
->arch
.exception
.nr
;
483 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
484 unsigned long payload
= vcpu
->arch
.exception
.payload
;
492 * "Certain debug exceptions may clear bit 0-3. The
493 * remaining contents of the DR6 register are never
494 * cleared by the processor".
496 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
498 * In order to reflect the #DB exception payload in guest
499 * dr6, three components need to be considered: active low
500 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
502 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
503 * In the target guest dr6:
504 * FIXED_1 bits should always be set.
505 * Active low bits should be cleared if 1-setting in payload.
506 * Active high bits should be set if 1-setting in payload.
508 * Note, the payload is compatible with the pending debug
509 * exceptions/exit qualification under VMX, that active_low bits
510 * are active high in payload.
511 * So they need to be flipped for DR6.
513 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
514 vcpu
->arch
.dr6
|= payload
;
515 vcpu
->arch
.dr6
^= payload
& DR6_ACTIVE_LOW
;
518 * The #DB payload is defined as compatible with the 'pending
519 * debug exceptions' field under VMX, not DR6. While bit 12 is
520 * defined in the 'pending debug exceptions' field (enabled
521 * breakpoint), it is reserved and must be zero in DR6.
523 vcpu
->arch
.dr6
&= ~BIT(12);
526 vcpu
->arch
.cr2
= payload
;
530 vcpu
->arch
.exception
.has_payload
= false;
531 vcpu
->arch
.exception
.payload
= 0;
533 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
535 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
536 unsigned nr
, bool has_error
, u32 error_code
,
537 bool has_payload
, unsigned long payload
, bool reinject
)
542 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
544 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
546 if (has_error
&& !is_protmode(vcpu
))
550 * On vmentry, vcpu->arch.exception.pending is only
551 * true if an event injection was blocked by
552 * nested_run_pending. In that case, however,
553 * vcpu_enter_guest requests an immediate exit,
554 * and the guest shouldn't proceed far enough to
557 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
558 vcpu
->arch
.exception
.injected
= true;
559 if (WARN_ON_ONCE(has_payload
)) {
561 * A reinjected event has already
562 * delivered its payload.
568 vcpu
->arch
.exception
.pending
= true;
569 vcpu
->arch
.exception
.injected
= false;
571 vcpu
->arch
.exception
.has_error_code
= has_error
;
572 vcpu
->arch
.exception
.nr
= nr
;
573 vcpu
->arch
.exception
.error_code
= error_code
;
574 vcpu
->arch
.exception
.has_payload
= has_payload
;
575 vcpu
->arch
.exception
.payload
= payload
;
576 if (!is_guest_mode(vcpu
))
577 kvm_deliver_exception_payload(vcpu
);
581 /* to check exception */
582 prev_nr
= vcpu
->arch
.exception
.nr
;
583 if (prev_nr
== DF_VECTOR
) {
584 /* triple fault -> shutdown */
585 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
588 class1
= exception_class(prev_nr
);
589 class2
= exception_class(nr
);
590 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
591 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
593 * Generate double fault per SDM Table 5-5. Set
594 * exception.pending = true so that the double fault
595 * can trigger a nested vmexit.
597 vcpu
->arch
.exception
.pending
= true;
598 vcpu
->arch
.exception
.injected
= false;
599 vcpu
->arch
.exception
.has_error_code
= true;
600 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
601 vcpu
->arch
.exception
.error_code
= 0;
602 vcpu
->arch
.exception
.has_payload
= false;
603 vcpu
->arch
.exception
.payload
= 0;
605 /* replace previous exception with a new one in a hope
606 that instruction re-execution will regenerate lost
611 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
613 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
615 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
617 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
619 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
621 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
623 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
624 unsigned long payload
)
626 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
628 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
630 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
631 u32 error_code
, unsigned long payload
)
633 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
634 true, payload
, false);
637 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
640 kvm_inject_gp(vcpu
, 0);
642 return kvm_skip_emulated_instruction(vcpu
);
646 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
648 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
650 ++vcpu
->stat
.pf_guest
;
651 vcpu
->arch
.exception
.nested_apf
=
652 is_guest_mode(vcpu
) && fault
->async_page_fault
;
653 if (vcpu
->arch
.exception
.nested_apf
) {
654 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
655 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
657 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
661 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
663 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
664 struct x86_exception
*fault
)
666 struct kvm_mmu
*fault_mmu
;
667 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
669 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
673 * Invalidate the TLB entry for the faulting address, if it exists,
674 * else the access will fault indefinitely (and to emulate hardware).
676 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
677 !(fault
->error_code
& PFERR_RSVD_MASK
))
678 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
679 fault_mmu
->root_hpa
);
681 fault_mmu
->inject_page_fault(vcpu
, fault
);
682 return fault
->nested_page_fault
;
684 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
686 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
688 atomic_inc(&vcpu
->arch
.nmi_queued
);
689 kvm_make_request(KVM_REQ_NMI
, vcpu
);
691 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
693 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
695 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
697 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
699 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
701 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
703 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
706 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
707 * a #GP and return false.
709 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
711 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
713 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
716 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
718 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
720 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
723 kvm_queue_exception(vcpu
, UD_VECTOR
);
726 EXPORT_SYMBOL_GPL(kvm_require_dr
);
729 * This function will be used to read from the physical memory of the currently
730 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
731 * can read from guest physical or from the guest's guest physical memory.
733 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
734 gfn_t ngfn
, void *data
, int offset
, int len
,
737 struct x86_exception exception
;
741 ngpa
= gfn_to_gpa(ngfn
);
742 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
743 if (real_gfn
== UNMAPPED_GVA
)
746 real_gfn
= gpa_to_gfn(real_gfn
);
748 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
750 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
752 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
753 void *data
, int offset
, int len
, u32 access
)
755 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
756 data
, offset
, len
, access
);
759 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
761 return rsvd_bits(cpuid_maxphyaddr(vcpu
), 63) | rsvd_bits(5, 8) |
766 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
768 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
770 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
771 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
774 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
776 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
777 offset
* sizeof(u64
), sizeof(pdpte
),
778 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
783 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
784 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
785 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
792 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
793 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
799 EXPORT_SYMBOL_GPL(load_pdptrs
);
801 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
803 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
808 if (!is_pae_paging(vcpu
))
811 if (!kvm_register_is_available(vcpu
, VCPU_EXREG_PDPTR
))
814 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
815 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
816 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
817 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
821 return memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
823 EXPORT_SYMBOL_GPL(pdptrs_changed
);
825 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
827 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
829 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
830 kvm_clear_async_pf_completion_queue(vcpu
);
831 kvm_async_pf_hash_reset(vcpu
);
834 if ((cr0
^ old_cr0
) & update_bits
)
835 kvm_mmu_reset_context(vcpu
);
837 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
838 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
839 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
840 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
842 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
844 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
846 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
847 unsigned long pdptr_bits
= X86_CR0_CD
| X86_CR0_NW
| X86_CR0_PG
;
852 if (cr0
& 0xffffffff00000000UL
)
856 cr0
&= ~CR0_RESERVED_BITS
;
858 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
861 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
865 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
866 (cr0
& X86_CR0_PG
)) {
871 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
876 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
877 is_pae(vcpu
) && ((cr0
^ old_cr0
) & pdptr_bits
) &&
878 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
)))
881 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
884 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
886 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
890 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
892 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
894 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
896 EXPORT_SYMBOL_GPL(kvm_lmsw
);
898 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
900 if (vcpu
->arch
.guest_state_protected
)
903 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
905 if (vcpu
->arch
.xcr0
!= host_xcr0
)
906 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
908 if (vcpu
->arch
.xsaves_enabled
&&
909 vcpu
->arch
.ia32_xss
!= host_xss
)
910 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
913 if (static_cpu_has(X86_FEATURE_PKU
) &&
914 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
915 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
916 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
917 __write_pkru(vcpu
->arch
.pkru
);
919 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
921 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
923 if (vcpu
->arch
.guest_state_protected
)
926 if (static_cpu_has(X86_FEATURE_PKU
) &&
927 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
928 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
929 vcpu
->arch
.pkru
= rdpkru();
930 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
931 __write_pkru(vcpu
->arch
.host_pkru
);
934 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
936 if (vcpu
->arch
.xcr0
!= host_xcr0
)
937 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
939 if (vcpu
->arch
.xsaves_enabled
&&
940 vcpu
->arch
.ia32_xss
!= host_xss
)
941 wrmsrl(MSR_IA32_XSS
, host_xss
);
945 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
947 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
950 u64 old_xcr0
= vcpu
->arch
.xcr0
;
953 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
954 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
956 if (!(xcr0
& XFEATURE_MASK_FP
))
958 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
962 * Do not allow the guest to set bits that we do not support
963 * saving. However, xcr0 bit 0 is always set, even if the
964 * emulated CPU does not support XSAVE (see fx_init).
966 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
967 if (xcr0
& ~valid_bits
)
970 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
971 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
974 if (xcr0
& XFEATURE_MASK_AVX512
) {
975 if (!(xcr0
& XFEATURE_MASK_YMM
))
977 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
980 vcpu
->arch
.xcr0
= xcr0
;
982 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
983 kvm_update_cpuid_runtime(vcpu
);
987 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
989 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
990 __kvm_set_xcr(vcpu
, index
, xcr
)) {
991 kvm_inject_gp(vcpu
, 0);
996 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
998 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1000 if (cr4
& cr4_reserved_bits
)
1003 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1006 return static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1008 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
1010 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1012 unsigned long mmu_role_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1013 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
1015 if (((cr4
^ old_cr4
) & mmu_role_bits
) ||
1016 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1017 kvm_mmu_reset_context(vcpu
);
1019 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1021 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1023 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1024 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1027 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1030 if (is_long_mode(vcpu
)) {
1031 if (!(cr4
& X86_CR4_PAE
))
1033 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1035 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1036 && ((cr4
^ old_cr4
) & pdptr_bits
)
1037 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
1038 kvm_read_cr3(vcpu
)))
1041 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1042 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1045 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1046 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1050 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1052 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1056 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1058 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1060 bool skip_tlb_flush
= false;
1061 #ifdef CONFIG_X86_64
1062 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1065 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1066 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1070 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
1071 if (!skip_tlb_flush
) {
1072 kvm_mmu_sync_roots(vcpu
);
1073 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1078 if (is_long_mode(vcpu
) &&
1079 (cr3
& vcpu
->arch
.cr3_lm_rsvd_bits
))
1081 else if (is_pae_paging(vcpu
) &&
1082 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1085 kvm_mmu_new_pgd(vcpu
, cr3
, skip_tlb_flush
, skip_tlb_flush
);
1086 vcpu
->arch
.cr3
= cr3
;
1087 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1091 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1093 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1095 if (cr8
& CR8_RESERVED_BITS
)
1097 if (lapic_in_kernel(vcpu
))
1098 kvm_lapic_set_tpr(vcpu
, cr8
);
1100 vcpu
->arch
.cr8
= cr8
;
1103 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1105 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1107 if (lapic_in_kernel(vcpu
))
1108 return kvm_lapic_get_cr8(vcpu
);
1110 return vcpu
->arch
.cr8
;
1112 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1114 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1118 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1119 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1120 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1121 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
1125 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1129 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1130 dr7
= vcpu
->arch
.guest_debug_dr7
;
1132 dr7
= vcpu
->arch
.dr7
;
1133 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1134 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1135 if (dr7
& DR7_BP_EN_MASK
)
1136 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1138 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1140 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1142 u64 fixed
= DR6_FIXED_1
;
1144 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1149 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1151 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1155 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1156 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1157 vcpu
->arch
.eff_db
[dr
] = val
;
1161 if (!kvm_dr6_valid(val
))
1162 return -1; /* #GP */
1163 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1167 if (!kvm_dr7_valid(val
))
1168 return -1; /* #GP */
1169 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1170 kvm_update_dr7(vcpu
);
1177 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1179 if (__kvm_set_dr(vcpu
, dr
, val
)) {
1180 kvm_inject_gp(vcpu
, 0);
1185 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1187 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1189 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1193 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1197 *val
= vcpu
->arch
.dr6
;
1201 *val
= vcpu
->arch
.dr7
;
1206 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1208 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
1210 u32 ecx
= kvm_rcx_read(vcpu
);
1214 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
1217 kvm_rax_write(vcpu
, (u32
)data
);
1218 kvm_rdx_write(vcpu
, data
>> 32);
1221 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
1224 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1225 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1227 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1228 * extract the supported MSRs from the related const lists.
1229 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1230 * capabilities of the host cpu. This capabilities test skips MSRs that are
1231 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1232 * may depend on host virtualization features rather than host cpu features.
1235 static const u32 msrs_to_save_all
[] = {
1236 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1238 #ifdef CONFIG_X86_64
1239 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1241 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1242 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1244 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1245 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1246 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1247 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1248 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1249 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1250 MSR_IA32_UMWAIT_CONTROL
,
1252 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1253 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2, MSR_ARCH_PERFMON_FIXED_CTR0
+ 3,
1254 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1255 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1256 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1257 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1258 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1259 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1260 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1261 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1262 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1263 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1264 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1265 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1266 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1267 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1268 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1269 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1270 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1271 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1272 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1273 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1276 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1277 static unsigned num_msrs_to_save
;
1279 static const u32 emulated_msrs_all
[] = {
1280 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1281 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1282 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1283 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1284 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1285 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1286 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1288 HV_X64_MSR_VP_INDEX
,
1289 HV_X64_MSR_VP_RUNTIME
,
1290 HV_X64_MSR_SCONTROL
,
1291 HV_X64_MSR_STIMER0_CONFIG
,
1292 HV_X64_MSR_VP_ASSIST_PAGE
,
1293 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1294 HV_X64_MSR_TSC_EMULATION_STATUS
,
1295 HV_X64_MSR_SYNDBG_OPTIONS
,
1296 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1297 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1298 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1300 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1301 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1303 MSR_IA32_TSC_ADJUST
,
1304 MSR_IA32_TSCDEADLINE
,
1305 MSR_IA32_ARCH_CAPABILITIES
,
1306 MSR_IA32_PERF_CAPABILITIES
,
1307 MSR_IA32_MISC_ENABLE
,
1308 MSR_IA32_MCG_STATUS
,
1310 MSR_IA32_MCG_EXT_CTL
,
1314 MSR_MISC_FEATURES_ENABLES
,
1315 MSR_AMD64_VIRT_SPEC_CTRL
,
1320 * The following list leaves out MSRs whose values are determined
1321 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1322 * We always support the "true" VMX control MSRs, even if the host
1323 * processor does not, so I am putting these registers here rather
1324 * than in msrs_to_save_all.
1327 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1328 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1329 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1330 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1332 MSR_IA32_VMX_CR0_FIXED0
,
1333 MSR_IA32_VMX_CR4_FIXED0
,
1334 MSR_IA32_VMX_VMCS_ENUM
,
1335 MSR_IA32_VMX_PROCBASED_CTLS2
,
1336 MSR_IA32_VMX_EPT_VPID_CAP
,
1337 MSR_IA32_VMX_VMFUNC
,
1340 MSR_KVM_POLL_CONTROL
,
1343 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1344 static unsigned num_emulated_msrs
;
1347 * List of msr numbers which are used to expose MSR-based features that
1348 * can be used by a hypervisor to validate requested CPU features.
1350 static const u32 msr_based_features_all
[] = {
1352 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1353 MSR_IA32_VMX_PINBASED_CTLS
,
1354 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1355 MSR_IA32_VMX_PROCBASED_CTLS
,
1356 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1357 MSR_IA32_VMX_EXIT_CTLS
,
1358 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1359 MSR_IA32_VMX_ENTRY_CTLS
,
1361 MSR_IA32_VMX_CR0_FIXED0
,
1362 MSR_IA32_VMX_CR0_FIXED1
,
1363 MSR_IA32_VMX_CR4_FIXED0
,
1364 MSR_IA32_VMX_CR4_FIXED1
,
1365 MSR_IA32_VMX_VMCS_ENUM
,
1366 MSR_IA32_VMX_PROCBASED_CTLS2
,
1367 MSR_IA32_VMX_EPT_VPID_CAP
,
1368 MSR_IA32_VMX_VMFUNC
,
1372 MSR_IA32_ARCH_CAPABILITIES
,
1373 MSR_IA32_PERF_CAPABILITIES
,
1376 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1377 static unsigned int num_msr_based_features
;
1379 static u64
kvm_get_arch_capabilities(void)
1383 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1384 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1387 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1388 * the nested hypervisor runs with NX huge pages. If it is not,
1389 * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1390 * L1 guests, so it need not worry about its own (L2) guests.
1392 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1395 * If we're doing cache flushes (either "always" or "cond")
1396 * we will do one whenever the guest does a vmlaunch/vmresume.
1397 * If an outer hypervisor is doing the cache flush for us
1398 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1399 * capability to the guest too, and if EPT is disabled we're not
1400 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1401 * require a nested hypervisor to do a flush of its own.
1403 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1404 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1406 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1407 data
|= ARCH_CAP_RDCL_NO
;
1408 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1409 data
|= ARCH_CAP_SSB_NO
;
1410 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1411 data
|= ARCH_CAP_MDS_NO
;
1413 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1415 * If RTM=0 because the kernel has disabled TSX, the host might
1416 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1417 * and therefore knows that there cannot be TAA) but keep
1418 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1419 * and we want to allow migrating those guests to tsx=off hosts.
1421 data
&= ~ARCH_CAP_TAA_NO
;
1422 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1423 data
|= ARCH_CAP_TAA_NO
;
1426 * Nothing to do here; we emulate TSX_CTRL if present on the
1427 * host so the guest can choose between disabling TSX or
1428 * using VERW to clear CPU buffers.
1435 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1437 switch (msr
->index
) {
1438 case MSR_IA32_ARCH_CAPABILITIES
:
1439 msr
->data
= kvm_get_arch_capabilities();
1441 case MSR_IA32_UCODE_REV
:
1442 rdmsrl_safe(msr
->index
, &msr
->data
);
1445 return static_call(kvm_x86_get_msr_feature
)(msr
);
1450 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1452 struct kvm_msr_entry msr
;
1456 r
= kvm_get_msr_feature(&msr
);
1458 if (r
== KVM_MSR_RET_INVALID
) {
1459 /* Unconditionally clear the output for simplicity */
1461 if (kvm_msr_ignored_check(vcpu
, index
, 0, false))
1473 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1475 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1478 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1481 if (efer
& (EFER_LME
| EFER_LMA
) &&
1482 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1485 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1491 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1493 if (efer
& efer_reserved_bits
)
1496 return __kvm_valid_efer(vcpu
, efer
);
1498 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1500 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1502 u64 old_efer
= vcpu
->arch
.efer
;
1503 u64 efer
= msr_info
->data
;
1506 if (efer
& efer_reserved_bits
)
1509 if (!msr_info
->host_initiated
) {
1510 if (!__kvm_valid_efer(vcpu
, efer
))
1513 if (is_paging(vcpu
) &&
1514 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1519 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1521 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1527 /* Update reserved bits */
1528 if ((efer
^ old_efer
) & EFER_NX
)
1529 kvm_mmu_reset_context(vcpu
);
1534 void kvm_enable_efer_bits(u64 mask
)
1536 efer_reserved_bits
&= ~mask
;
1538 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1540 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1542 struct kvm
*kvm
= vcpu
->kvm
;
1543 struct msr_bitmap_range
*ranges
= kvm
->arch
.msr_filter
.ranges
;
1544 u32 count
= kvm
->arch
.msr_filter
.count
;
1546 bool r
= kvm
->arch
.msr_filter
.default_allow
;
1549 /* MSR filtering not set up or x2APIC enabled, allow everything */
1550 if (!count
|| (index
>= 0x800 && index
<= 0x8ff))
1553 /* Prevent collision with set_msr_filter */
1554 idx
= srcu_read_lock(&kvm
->srcu
);
1556 for (i
= 0; i
< count
; i
++) {
1557 u32 start
= ranges
[i
].base
;
1558 u32 end
= start
+ ranges
[i
].nmsrs
;
1559 u32 flags
= ranges
[i
].flags
;
1560 unsigned long *bitmap
= ranges
[i
].bitmap
;
1562 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1563 r
= !!test_bit(index
- start
, bitmap
);
1568 srcu_read_unlock(&kvm
->srcu
, idx
);
1572 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1575 * Write @data into the MSR specified by @index. Select MSR specific fault
1576 * checks are bypassed if @host_initiated is %true.
1577 * Returns 0 on success, non-0 otherwise.
1578 * Assumes vcpu_load() was already called.
1580 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1581 bool host_initiated
)
1583 struct msr_data msr
;
1585 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1586 return KVM_MSR_RET_FILTERED
;
1591 case MSR_KERNEL_GS_BASE
:
1594 if (is_noncanonical_address(data
, vcpu
))
1597 case MSR_IA32_SYSENTER_EIP
:
1598 case MSR_IA32_SYSENTER_ESP
:
1600 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1601 * non-canonical address is written on Intel but not on
1602 * AMD (which ignores the top 32-bits, because it does
1603 * not implement 64-bit SYSENTER).
1605 * 64-bit code should hence be able to write a non-canonical
1606 * value on AMD. Making the address canonical ensures that
1607 * vmentry does not fail on Intel after writing a non-canonical
1608 * value, and that something deterministic happens if the guest
1609 * invokes 64-bit SYSENTER.
1611 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1616 msr
.host_initiated
= host_initiated
;
1618 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1621 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1622 u32 index
, u64 data
, bool host_initiated
)
1624 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1626 if (ret
== KVM_MSR_RET_INVALID
)
1627 if (kvm_msr_ignored_check(vcpu
, index
, data
, true))
1634 * Read the MSR specified by @index into @data. Select MSR specific fault
1635 * checks are bypassed if @host_initiated is %true.
1636 * Returns 0 on success, non-0 otherwise.
1637 * Assumes vcpu_load() was already called.
1639 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1640 bool host_initiated
)
1642 struct msr_data msr
;
1645 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1646 return KVM_MSR_RET_FILTERED
;
1649 msr
.host_initiated
= host_initiated
;
1651 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1657 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1658 u32 index
, u64
*data
, bool host_initiated
)
1660 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1662 if (ret
== KVM_MSR_RET_INVALID
) {
1663 /* Unconditionally clear *data for simplicity */
1665 if (kvm_msr_ignored_check(vcpu
, index
, 0, false))
1672 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1674 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1676 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1678 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1680 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1682 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1684 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1686 int err
= vcpu
->run
->msr
.error
;
1688 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1689 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1692 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, err
);
1695 static int complete_emulated_wrmsr(struct kvm_vcpu
*vcpu
)
1697 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
1700 static u64
kvm_msr_reason(int r
)
1703 case KVM_MSR_RET_INVALID
:
1704 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1705 case KVM_MSR_RET_FILTERED
:
1706 return KVM_MSR_EXIT_REASON_FILTER
;
1708 return KVM_MSR_EXIT_REASON_INVAL
;
1712 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1713 u32 exit_reason
, u64 data
,
1714 int (*completion
)(struct kvm_vcpu
*vcpu
),
1717 u64 msr_reason
= kvm_msr_reason(r
);
1719 /* Check if the user wanted to know about this MSR fault */
1720 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1723 vcpu
->run
->exit_reason
= exit_reason
;
1724 vcpu
->run
->msr
.error
= 0;
1725 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1726 vcpu
->run
->msr
.reason
= msr_reason
;
1727 vcpu
->run
->msr
.index
= index
;
1728 vcpu
->run
->msr
.data
= data
;
1729 vcpu
->arch
.complete_userspace_io
= completion
;
1734 static int kvm_get_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, int r
)
1736 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_RDMSR
, 0,
1737 complete_emulated_rdmsr
, r
);
1740 static int kvm_set_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
, int r
)
1742 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_WRMSR
, data
,
1743 complete_emulated_wrmsr
, r
);
1746 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1748 u32 ecx
= kvm_rcx_read(vcpu
);
1752 r
= kvm_get_msr(vcpu
, ecx
, &data
);
1754 /* MSR read failed? See if we should ask user space */
1755 if (r
&& kvm_get_msr_user_space(vcpu
, ecx
, r
)) {
1756 /* Bounce to user space */
1761 trace_kvm_msr_read(ecx
, data
);
1763 kvm_rax_write(vcpu
, data
& -1u);
1764 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1766 trace_kvm_msr_read_ex(ecx
);
1769 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1771 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1773 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1775 u32 ecx
= kvm_rcx_read(vcpu
);
1776 u64 data
= kvm_read_edx_eax(vcpu
);
1779 r
= kvm_set_msr(vcpu
, ecx
, data
);
1781 /* MSR write failed? See if we should ask user space */
1782 if (r
&& kvm_set_msr_user_space(vcpu
, ecx
, data
, r
))
1783 /* Bounce to user space */
1786 /* Signal all other negative errors to userspace */
1791 trace_kvm_msr_write(ecx
, data
);
1793 trace_kvm_msr_write_ex(ecx
, data
);
1795 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1797 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1799 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
1801 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
1802 xfer_to_guest_mode_work_pending();
1806 * The fast path for frequent and performance sensitive wrmsr emulation,
1807 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1808 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1809 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1810 * other cases which must be called after interrupts are enabled on the host.
1812 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1814 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1817 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1818 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1819 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1820 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1823 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1824 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1825 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1826 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1833 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
1835 if (!kvm_can_use_hv_timer(vcpu
))
1838 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1842 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
1844 u32 msr
= kvm_rcx_read(vcpu
);
1846 fastpath_t ret
= EXIT_FASTPATH_NONE
;
1849 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
1850 data
= kvm_read_edx_eax(vcpu
);
1851 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
1852 kvm_skip_emulated_instruction(vcpu
);
1853 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
1856 case MSR_IA32_TSCDEADLINE
:
1857 data
= kvm_read_edx_eax(vcpu
);
1858 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
1859 kvm_skip_emulated_instruction(vcpu
);
1860 ret
= EXIT_FASTPATH_REENTER_GUEST
;
1867 if (ret
!= EXIT_FASTPATH_NONE
)
1868 trace_kvm_msr_write(msr
, data
);
1872 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
1875 * Adapt set_msr() to msr_io()'s calling convention
1877 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1879 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
1882 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1884 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
1887 #ifdef CONFIG_X86_64
1888 struct pvclock_clock
{
1898 struct pvclock_gtod_data
{
1901 struct pvclock_clock clock
; /* extract of a clocksource struct */
1902 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
1908 static struct pvclock_gtod_data pvclock_gtod_data
;
1910 static void update_pvclock_gtod(struct timekeeper
*tk
)
1912 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1914 write_seqcount_begin(&vdata
->seq
);
1916 /* copy pvclock gtod data */
1917 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
1918 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1919 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1920 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1921 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1922 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
1923 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
1925 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
1926 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
1927 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
1928 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
1929 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
1930 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
1931 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
1933 vdata
->wall_time_sec
= tk
->xtime_sec
;
1935 vdata
->offs_boot
= tk
->offs_boot
;
1937 write_seqcount_end(&vdata
->seq
);
1940 static s64
get_kvmclock_base_ns(void)
1942 /* Count up from boot time, but with the frequency of the raw clock. */
1943 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
1946 static s64
get_kvmclock_base_ns(void)
1948 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
1949 return ktime_get_boottime_ns();
1953 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1957 struct pvclock_wall_clock wc
;
1960 kvm
->arch
.wall_clock
= wall_clock
;
1965 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1970 ++version
; /* first time write, random junk */
1974 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1978 * The guest calculates current wall clock time by adding
1979 * system time (updated by kvm_guest_time_update below) to the
1980 * wall clock specified here. We do the reverse here.
1982 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
1984 wc
.nsec
= do_div(wall_nsec
, 1000000000);
1985 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
1986 wc
.version
= version
;
1988 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1991 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1994 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
1995 bool old_msr
, bool host_initiated
)
1997 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1999 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2000 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2001 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2003 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2006 vcpu
->arch
.time
= system_time
;
2007 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2009 /* we verify if the enable bit is set... */
2010 vcpu
->arch
.pv_time_enabled
= false;
2011 if (!(system_time
& 1))
2014 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2015 &vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2016 sizeof(struct pvclock_vcpu_time_info
)))
2017 vcpu
->arch
.pv_time_enabled
= true;
2022 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2024 do_shl32_div32(dividend
, divisor
);
2028 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2029 s8
*pshift
, u32
*pmultiplier
)
2037 scaled64
= scaled_hz
;
2038 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2043 tps32
= (uint32_t)tps64
;
2044 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2045 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2053 *pmultiplier
= div_frac(scaled64
, tps32
);
2056 #ifdef CONFIG_X86_64
2057 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2060 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2061 static unsigned long max_tsc_khz
;
2063 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2065 u64 v
= (u64
)khz
* (1000000 + ppm
);
2070 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2074 /* Guest TSC same frequency as host TSC? */
2076 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
2080 /* TSC scaling supported? */
2081 if (!kvm_has_tsc_control
) {
2082 if (user_tsc_khz
> tsc_khz
) {
2083 vcpu
->arch
.tsc_catchup
= 1;
2084 vcpu
->arch
.tsc_always_catchup
= 1;
2087 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2092 /* TSC scaling required - calculate ratio */
2093 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2094 user_tsc_khz
, tsc_khz
);
2096 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2097 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2102 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
2106 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2108 u32 thresh_lo
, thresh_hi
;
2109 int use_scaling
= 0;
2111 /* tsc_khz can be zero if TSC calibration fails */
2112 if (user_tsc_khz
== 0) {
2113 /* set tsc_scaling_ratio to a safe value */
2114 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
2118 /* Compute a scale to convert nanoseconds in TSC cycles */
2119 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2120 &vcpu
->arch
.virtual_tsc_shift
,
2121 &vcpu
->arch
.virtual_tsc_mult
);
2122 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2125 * Compute the variation in TSC rate which is acceptable
2126 * within the range of tolerance and decide if the
2127 * rate being applied is within that bounds of the hardware
2128 * rate. If so, no scaling or compensation need be done.
2130 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2131 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2132 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2133 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2136 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2139 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2141 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2142 vcpu
->arch
.virtual_tsc_mult
,
2143 vcpu
->arch
.virtual_tsc_shift
);
2144 tsc
+= vcpu
->arch
.this_tsc_write
;
2148 static inline int gtod_is_based_on_tsc(int mode
)
2150 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2153 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2155 #ifdef CONFIG_X86_64
2157 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2158 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2160 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2161 atomic_read(&vcpu
->kvm
->online_vcpus
));
2164 * Once the masterclock is enabled, always perform request in
2165 * order to update it.
2167 * In order to enable masterclock, the host clocksource must be TSC
2168 * and the vcpus need to have matched TSCs. When that happens,
2169 * perform request to enable masterclock.
2171 if (ka
->use_master_clock
||
2172 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2173 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2175 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2176 atomic_read(&vcpu
->kvm
->online_vcpus
),
2177 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2182 * Multiply tsc by a fixed point number represented by ratio.
2184 * The most significant 64-N bits (mult) of ratio represent the
2185 * integral part of the fixed point number; the remaining N bits
2186 * (frac) represent the fractional part, ie. ratio represents a fixed
2187 * point number (mult + frac * 2^(-N)).
2189 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2191 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2193 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2196 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
2199 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
2201 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2202 _tsc
= __scale_tsc(ratio
, tsc
);
2206 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2208 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2212 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
2214 return target_tsc
- tsc
;
2217 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2219 return vcpu
->arch
.l1_tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
2221 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2223 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
2225 vcpu
->arch
.l1_tsc_offset
= offset
;
2226 vcpu
->arch
.tsc_offset
= static_call(kvm_x86_write_l1_tsc_offset
)(vcpu
, offset
);
2229 static inline bool kvm_check_tsc_unstable(void)
2231 #ifdef CONFIG_X86_64
2233 * TSC is marked unstable when we're running on Hyper-V,
2234 * 'TSC page' clocksource is good.
2236 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2239 return check_tsc_unstable();
2242 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2244 struct kvm
*kvm
= vcpu
->kvm
;
2245 u64 offset
, ns
, elapsed
;
2246 unsigned long flags
;
2248 bool already_matched
;
2249 bool synchronizing
= false;
2251 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2252 offset
= kvm_compute_tsc_offset(vcpu
, data
);
2253 ns
= get_kvmclock_base_ns();
2254 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2256 if (vcpu
->arch
.virtual_tsc_khz
) {
2259 * detection of vcpu initialization -- need to sync
2260 * with other vCPUs. This particularly helps to keep
2261 * kvm_clock stable after CPU hotplug
2263 synchronizing
= true;
2265 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2266 nsec_to_cycles(vcpu
, elapsed
);
2267 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2269 * Special case: TSC write with a small delta (1 second)
2270 * of virtual cycle time against real time is
2271 * interpreted as an attempt to synchronize the CPU.
2273 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2274 data
+ tsc_hz
> tsc_exp
;
2279 * For a reliable TSC, we can match TSC offsets, and for an unstable
2280 * TSC, we add elapsed time in this computation. We could let the
2281 * compensation code attempt to catch up if we fall behind, but
2282 * it's better to try to match offsets from the beginning.
2284 if (synchronizing
&&
2285 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2286 if (!kvm_check_tsc_unstable()) {
2287 offset
= kvm
->arch
.cur_tsc_offset
;
2289 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2291 offset
= kvm_compute_tsc_offset(vcpu
, data
);
2294 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2297 * We split periods of matched TSC writes into generations.
2298 * For each generation, we track the original measured
2299 * nanosecond time, offset, and write, so if TSCs are in
2300 * sync, we can match exact offset, and if not, we can match
2301 * exact software computation in compute_guest_tsc()
2303 * These values are tracked in kvm->arch.cur_xxx variables.
2305 kvm
->arch
.cur_tsc_generation
++;
2306 kvm
->arch
.cur_tsc_nsec
= ns
;
2307 kvm
->arch
.cur_tsc_write
= data
;
2308 kvm
->arch
.cur_tsc_offset
= offset
;
2313 * We also track th most recent recorded KHZ, write and time to
2314 * allow the matching interval to be extended at each write.
2316 kvm
->arch
.last_tsc_nsec
= ns
;
2317 kvm
->arch
.last_tsc_write
= data
;
2318 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2320 vcpu
->arch
.last_guest_tsc
= data
;
2322 /* Keep track of which generation this VCPU has synchronized to */
2323 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2324 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2325 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2327 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2328 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2330 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
2332 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2333 } else if (!already_matched
) {
2334 kvm
->arch
.nr_vcpus_matched_tsc
++;
2337 kvm_track_tsc_matching(vcpu
);
2338 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
2341 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2344 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2345 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2348 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2350 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2351 WARN_ON(adjustment
< 0);
2352 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
2353 adjust_tsc_offset_guest(vcpu
, adjustment
);
2356 #ifdef CONFIG_X86_64
2358 static u64
read_tsc(void)
2360 u64 ret
= (u64
)rdtsc_ordered();
2361 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2363 if (likely(ret
>= last
))
2367 * GCC likes to generate cmov here, but this branch is extremely
2368 * predictable (it's just a function of time and the likely is
2369 * very likely) and there's a data dependence, so force GCC
2370 * to generate a branch instead. I don't barrier() because
2371 * we don't actually need a barrier, and if this function
2372 * ever gets inlined it will generate worse code.
2378 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2384 switch (clock
->vclock_mode
) {
2385 case VDSO_CLOCKMODE_HVCLOCK
:
2386 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2388 if (tsc_pg_val
!= U64_MAX
) {
2389 /* TSC page valid */
2390 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2391 v
= (tsc_pg_val
- clock
->cycle_last
) &
2394 /* TSC page invalid */
2395 *mode
= VDSO_CLOCKMODE_NONE
;
2398 case VDSO_CLOCKMODE_TSC
:
2399 *mode
= VDSO_CLOCKMODE_TSC
;
2400 *tsc_timestamp
= read_tsc();
2401 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2405 *mode
= VDSO_CLOCKMODE_NONE
;
2408 if (*mode
== VDSO_CLOCKMODE_NONE
)
2409 *tsc_timestamp
= v
= 0;
2411 return v
* clock
->mult
;
2414 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2416 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2422 seq
= read_seqcount_begin(>od
->seq
);
2423 ns
= gtod
->raw_clock
.base_cycles
;
2424 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2425 ns
>>= gtod
->raw_clock
.shift
;
2426 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2427 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2433 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2435 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2441 seq
= read_seqcount_begin(>od
->seq
);
2442 ts
->tv_sec
= gtod
->wall_time_sec
;
2443 ns
= gtod
->clock
.base_cycles
;
2444 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2445 ns
>>= gtod
->clock
.shift
;
2446 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2448 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2454 /* returns true if host is using TSC based clocksource */
2455 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2457 /* checked again under seqlock below */
2458 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2461 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2465 /* returns true if host is using TSC based clocksource */
2466 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2469 /* checked again under seqlock below */
2470 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2473 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2479 * Assuming a stable TSC across physical CPUS, and a stable TSC
2480 * across virtual CPUs, the following condition is possible.
2481 * Each numbered line represents an event visible to both
2482 * CPUs at the next numbered event.
2484 * "timespecX" represents host monotonic time. "tscX" represents
2487 * VCPU0 on CPU0 | VCPU1 on CPU1
2489 * 1. read timespec0,tsc0
2490 * 2. | timespec1 = timespec0 + N
2492 * 3. transition to guest | transition to guest
2493 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2494 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2495 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2497 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2500 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2502 * - 0 < N - M => M < N
2504 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2505 * always the case (the difference between two distinct xtime instances
2506 * might be smaller then the difference between corresponding TSC reads,
2507 * when updating guest vcpus pvclock areas).
2509 * To avoid that problem, do not allow visibility of distinct
2510 * system_timestamp/tsc_timestamp values simultaneously: use a master
2511 * copy of host monotonic time values. Update that master copy
2514 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2518 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2520 #ifdef CONFIG_X86_64
2521 struct kvm_arch
*ka
= &kvm
->arch
;
2523 bool host_tsc_clocksource
, vcpus_matched
;
2525 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2526 atomic_read(&kvm
->online_vcpus
));
2529 * If the host uses TSC clock, then passthrough TSC as stable
2532 host_tsc_clocksource
= kvm_get_time_and_clockread(
2533 &ka
->master_kernel_ns
,
2534 &ka
->master_cycle_now
);
2536 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2537 && !ka
->backwards_tsc_observed
2538 && !ka
->boot_vcpu_runs_old_kvmclock
;
2540 if (ka
->use_master_clock
)
2541 atomic_set(&kvm_guest_has_master_clock
, 1);
2543 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2544 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2549 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2551 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2554 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2556 #ifdef CONFIG_X86_64
2558 struct kvm_vcpu
*vcpu
;
2559 struct kvm_arch
*ka
= &kvm
->arch
;
2561 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2562 kvm_make_mclock_inprogress_request(kvm
);
2563 /* no guest entries from this point */
2564 pvclock_update_vm_gtod_copy(kvm
);
2566 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2567 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2569 /* guest entries allowed */
2570 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2571 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2573 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2577 u64
get_kvmclock_ns(struct kvm
*kvm
)
2579 struct kvm_arch
*ka
= &kvm
->arch
;
2580 struct pvclock_vcpu_time_info hv_clock
;
2583 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2584 if (!ka
->use_master_clock
) {
2585 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2586 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2589 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2590 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2591 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2593 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2596 if (__this_cpu_read(cpu_tsc_khz
)) {
2597 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2598 &hv_clock
.tsc_shift
,
2599 &hv_clock
.tsc_to_system_mul
);
2600 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2602 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2609 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
2611 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2612 struct pvclock_vcpu_time_info guest_hv_clock
;
2614 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2615 &guest_hv_clock
, sizeof(guest_hv_clock
))))
2618 /* This VCPU is paused, but it's legal for a guest to read another
2619 * VCPU's kvmclock, so we really have to follow the specification where
2620 * it says that version is odd if data is being modified, and even after
2623 * Version field updates must be kept separate. This is because
2624 * kvm_write_guest_cached might use a "rep movs" instruction, and
2625 * writes within a string instruction are weakly ordered. So there
2626 * are three writes overall.
2628 * As a small optimization, only write the version field in the first
2629 * and third write. The vcpu->pv_time cache is still valid, because the
2630 * version field is the first in the struct.
2632 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2634 if (guest_hv_clock
.version
& 1)
2635 ++guest_hv_clock
.version
; /* first time write, random junk */
2637 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2638 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2640 sizeof(vcpu
->hv_clock
.version
));
2644 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2645 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2647 if (vcpu
->pvclock_set_guest_stopped_request
) {
2648 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2649 vcpu
->pvclock_set_guest_stopped_request
= false;
2652 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2654 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2656 sizeof(vcpu
->hv_clock
));
2660 vcpu
->hv_clock
.version
++;
2661 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2663 sizeof(vcpu
->hv_clock
.version
));
2666 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2668 unsigned long flags
, tgt_tsc_khz
;
2669 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2670 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2672 u64 tsc_timestamp
, host_tsc
;
2674 bool use_master_clock
;
2680 * If the host uses TSC clock, then passthrough TSC as stable
2683 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2684 use_master_clock
= ka
->use_master_clock
;
2685 if (use_master_clock
) {
2686 host_tsc
= ka
->master_cycle_now
;
2687 kernel_ns
= ka
->master_kernel_ns
;
2689 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2691 /* Keep irq disabled to prevent changes to the clock */
2692 local_irq_save(flags
);
2693 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2694 if (unlikely(tgt_tsc_khz
== 0)) {
2695 local_irq_restore(flags
);
2696 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2699 if (!use_master_clock
) {
2701 kernel_ns
= get_kvmclock_base_ns();
2704 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2707 * We may have to catch up the TSC to match elapsed wall clock
2708 * time for two reasons, even if kvmclock is used.
2709 * 1) CPU could have been running below the maximum TSC rate
2710 * 2) Broken TSC compensation resets the base at each VCPU
2711 * entry to avoid unknown leaps of TSC even when running
2712 * again on the same CPU. This may cause apparent elapsed
2713 * time to disappear, and the guest to stand still or run
2716 if (vcpu
->tsc_catchup
) {
2717 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2718 if (tsc
> tsc_timestamp
) {
2719 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2720 tsc_timestamp
= tsc
;
2724 local_irq_restore(flags
);
2726 /* With all the info we got, fill in the values */
2728 if (kvm_has_tsc_control
)
2729 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2731 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2732 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2733 &vcpu
->hv_clock
.tsc_shift
,
2734 &vcpu
->hv_clock
.tsc_to_system_mul
);
2735 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2738 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2739 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2740 vcpu
->last_guest_tsc
= tsc_timestamp
;
2742 /* If the host uses TSC clocksource, then it is stable */
2744 if (use_master_clock
)
2745 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2747 vcpu
->hv_clock
.flags
= pvclock_flags
;
2749 if (vcpu
->pv_time_enabled
)
2750 kvm_setup_pvclock_page(v
);
2751 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2752 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2757 * kvmclock updates which are isolated to a given vcpu, such as
2758 * vcpu->cpu migration, should not allow system_timestamp from
2759 * the rest of the vcpus to remain static. Otherwise ntp frequency
2760 * correction applies to one vcpu's system_timestamp but not
2763 * So in those cases, request a kvmclock update for all vcpus.
2764 * We need to rate-limit these requests though, as they can
2765 * considerably slow guests that have a large number of vcpus.
2766 * The time for a remote vcpu to update its kvmclock is bound
2767 * by the delay we use to rate-limit the updates.
2770 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2772 static void kvmclock_update_fn(struct work_struct
*work
)
2775 struct delayed_work
*dwork
= to_delayed_work(work
);
2776 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2777 kvmclock_update_work
);
2778 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2779 struct kvm_vcpu
*vcpu
;
2781 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2782 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2783 kvm_vcpu_kick(vcpu
);
2787 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2789 struct kvm
*kvm
= v
->kvm
;
2791 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2792 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2793 KVMCLOCK_UPDATE_DELAY
);
2796 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2798 static void kvmclock_sync_fn(struct work_struct
*work
)
2800 struct delayed_work
*dwork
= to_delayed_work(work
);
2801 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2802 kvmclock_sync_work
);
2803 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2805 if (!kvmclock_periodic_sync
)
2808 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2809 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2810 KVMCLOCK_SYNC_PERIOD
);
2814 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2816 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
2818 /* McStatusWrEn enabled? */
2819 if (guest_cpuid_is_amd_or_hygon(vcpu
))
2820 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
2825 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2827 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2828 unsigned bank_num
= mcg_cap
& 0xff;
2829 u32 msr
= msr_info
->index
;
2830 u64 data
= msr_info
->data
;
2833 case MSR_IA32_MCG_STATUS
:
2834 vcpu
->arch
.mcg_status
= data
;
2836 case MSR_IA32_MCG_CTL
:
2837 if (!(mcg_cap
& MCG_CTL_P
) &&
2838 (data
|| !msr_info
->host_initiated
))
2840 if (data
!= 0 && data
!= ~(u64
)0)
2842 vcpu
->arch
.mcg_ctl
= data
;
2845 if (msr
>= MSR_IA32_MC0_CTL
&&
2846 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2847 u32 offset
= array_index_nospec(
2848 msr
- MSR_IA32_MC0_CTL
,
2849 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
2851 /* only 0 or all 1s can be written to IA32_MCi_CTL
2852 * some Linux kernels though clear bit 10 in bank 4 to
2853 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2854 * this to avoid an uncatched #GP in the guest
2856 if ((offset
& 0x3) == 0 &&
2857 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2861 if (!msr_info
->host_initiated
&&
2862 (offset
& 0x3) == 1 && data
!= 0) {
2863 if (!can_set_mci_status(vcpu
))
2867 vcpu
->arch
.mce_banks
[offset
] = data
;
2875 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2877 struct kvm
*kvm
= vcpu
->kvm
;
2878 int lm
= is_long_mode(vcpu
);
2879 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2880 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2881 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2882 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2883 u32 page_num
= data
& ~PAGE_MASK
;
2884 u64 page_addr
= data
& PAGE_MASK
;
2887 if (page_num
>= blob_size
)
2890 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2892 return PTR_ERR(page
);
2894 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
)) {
2901 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
2903 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
2905 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
2908 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2910 gpa_t gpa
= data
& ~0x3f;
2912 /* Bits 4:5 are reserved, Should be zero */
2916 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
2917 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
2920 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
2921 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
2924 if (!lapic_in_kernel(vcpu
))
2925 return data
? 1 : 0;
2927 vcpu
->arch
.apf
.msr_en_val
= data
;
2929 if (!kvm_pv_async_pf_enabled(vcpu
)) {
2930 kvm_clear_async_pf_completion_queue(vcpu
);
2931 kvm_async_pf_hash_reset(vcpu
);
2935 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2939 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2940 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2942 kvm_async_pf_wakeup_all(vcpu
);
2947 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
2949 /* Bits 8-63 are reserved */
2953 if (!lapic_in_kernel(vcpu
))
2956 vcpu
->arch
.apf
.msr_int_val
= data
;
2958 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
2963 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2965 vcpu
->arch
.pv_time_enabled
= false;
2966 vcpu
->arch
.time
= 0;
2969 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
2971 ++vcpu
->stat
.tlb_flush
;
2972 static_call(kvm_x86_tlb_flush_all
)(vcpu
);
2975 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
2977 ++vcpu
->stat
.tlb_flush
;
2978 static_call(kvm_x86_tlb_flush_guest
)(vcpu
);
2981 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2983 struct kvm_host_map map
;
2984 struct kvm_steal_time
*st
;
2986 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2989 /* -EAGAIN is returned in atomic context so we can just return. */
2990 if (kvm_map_gfn(vcpu
, vcpu
->arch
.st
.msr_val
>> PAGE_SHIFT
,
2991 &map
, &vcpu
->arch
.st
.cache
, false))
2995 offset_in_page(vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
);
2998 * Doing a TLB flush here, on the guest's behalf, can avoid
3001 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3002 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3003 st
->preempted
& KVM_VCPU_FLUSH_TLB
);
3004 if (xchg(&st
->preempted
, 0) & KVM_VCPU_FLUSH_TLB
)
3005 kvm_vcpu_flush_tlb_guest(vcpu
);
3008 vcpu
->arch
.st
.preempted
= 0;
3010 if (st
->version
& 1)
3011 st
->version
+= 1; /* first time write, random junk */
3017 st
->steal
+= current
->sched_info
.run_delay
-
3018 vcpu
->arch
.st
.last_steal
;
3019 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3025 kvm_unmap_gfn(vcpu
, &map
, &vcpu
->arch
.st
.cache
, true, false);
3028 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3031 u32 msr
= msr_info
->index
;
3032 u64 data
= msr_info
->data
;
3035 case MSR_AMD64_NB_CFG
:
3036 case MSR_IA32_UCODE_WRITE
:
3037 case MSR_VM_HSAVE_PA
:
3038 case MSR_AMD64_PATCH_LOADER
:
3039 case MSR_AMD64_BU_CFG2
:
3040 case MSR_AMD64_DC_CFG
:
3041 case MSR_F15H_EX_CFG
:
3044 case MSR_IA32_UCODE_REV
:
3045 if (msr_info
->host_initiated
)
3046 vcpu
->arch
.microcode_version
= data
;
3048 case MSR_IA32_ARCH_CAPABILITIES
:
3049 if (!msr_info
->host_initiated
)
3051 vcpu
->arch
.arch_capabilities
= data
;
3053 case MSR_IA32_PERF_CAPABILITIES
: {
3054 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3056 if (!msr_info
->host_initiated
)
3058 if (guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
) && kvm_get_msr_feature(&msr_ent
))
3060 if (data
& ~msr_ent
.data
)
3063 vcpu
->arch
.perf_capabilities
= data
;
3068 return set_efer(vcpu
, msr_info
);
3070 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3071 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3072 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3074 /* Handle McStatusWrEn */
3075 if (data
== BIT_ULL(18)) {
3076 vcpu
->arch
.msr_hwcr
= data
;
3077 } else if (data
!= 0) {
3078 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3083 case MSR_FAM10H_MMIO_CONF_BASE
:
3085 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3090 case 0x200 ... 0x2ff:
3091 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3092 case MSR_IA32_APICBASE
:
3093 return kvm_set_apic_base(vcpu
, msr_info
);
3094 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3095 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3096 case MSR_IA32_TSCDEADLINE
:
3097 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3099 case MSR_IA32_TSC_ADJUST
:
3100 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3101 if (!msr_info
->host_initiated
) {
3102 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3103 adjust_tsc_offset_guest(vcpu
, adj
);
3105 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3108 case MSR_IA32_MISC_ENABLE
:
3109 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3110 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3111 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3113 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3114 kvm_update_cpuid_runtime(vcpu
);
3116 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3119 case MSR_IA32_SMBASE
:
3120 if (!msr_info
->host_initiated
)
3122 vcpu
->arch
.smbase
= data
;
3124 case MSR_IA32_POWER_CTL
:
3125 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3128 if (msr_info
->host_initiated
) {
3129 kvm_synchronize_tsc(vcpu
, data
);
3131 u64 adj
= kvm_compute_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3132 adjust_tsc_offset_guest(vcpu
, adj
);
3133 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3137 if (!msr_info
->host_initiated
&&
3138 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3141 * KVM supports exposing PT to the guest, but does not support
3142 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3143 * XSAVES/XRSTORS to save/restore PT MSRs.
3145 if (data
& ~supported_xss
)
3147 vcpu
->arch
.ia32_xss
= data
;
3150 if (!msr_info
->host_initiated
)
3152 vcpu
->arch
.smi_count
= data
;
3154 case MSR_KVM_WALL_CLOCK_NEW
:
3155 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3158 kvm_write_wall_clock(vcpu
->kvm
, data
);
3160 case MSR_KVM_WALL_CLOCK
:
3161 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3164 kvm_write_wall_clock(vcpu
->kvm
, data
);
3166 case MSR_KVM_SYSTEM_TIME_NEW
:
3167 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3170 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3172 case MSR_KVM_SYSTEM_TIME
:
3173 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3176 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3178 case MSR_KVM_ASYNC_PF_EN
:
3179 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3182 if (kvm_pv_enable_async_pf(vcpu
, data
))
3185 case MSR_KVM_ASYNC_PF_INT
:
3186 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3189 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3192 case MSR_KVM_ASYNC_PF_ACK
:
3193 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3196 vcpu
->arch
.apf
.pageready_pending
= false;
3197 kvm_check_async_pf_completion(vcpu
);
3200 case MSR_KVM_STEAL_TIME
:
3201 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3204 if (unlikely(!sched_info_on()))
3207 if (data
& KVM_STEAL_RESERVED_MASK
)
3210 vcpu
->arch
.st
.msr_val
= data
;
3212 if (!(data
& KVM_MSR_ENABLED
))
3215 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3218 case MSR_KVM_PV_EOI_EN
:
3219 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3222 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
3226 case MSR_KVM_POLL_CONTROL
:
3227 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3230 /* only enable bit supported */
3231 if (data
& (-1ULL << 1))
3234 vcpu
->arch
.msr_kvm_poll_control
= data
;
3237 case MSR_IA32_MCG_CTL
:
3238 case MSR_IA32_MCG_STATUS
:
3239 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3240 return set_msr_mce(vcpu
, msr_info
);
3242 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3243 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3246 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3247 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3248 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3249 return kvm_pmu_set_msr(vcpu
, msr_info
);
3251 if (pr
|| data
!= 0)
3252 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3253 "0x%x data 0x%llx\n", msr
, data
);
3255 case MSR_K7_CLK_CTL
:
3257 * Ignore all writes to this no longer documented MSR.
3258 * Writes are only relevant for old K7 processors,
3259 * all pre-dating SVM, but a recommended workaround from
3260 * AMD for these chips. It is possible to specify the
3261 * affected processor models on the command line, hence
3262 * the need to ignore the workaround.
3265 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3266 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3267 case HV_X64_MSR_SYNDBG_OPTIONS
:
3268 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3269 case HV_X64_MSR_CRASH_CTL
:
3270 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3271 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3272 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3273 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3274 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3275 msr_info
->host_initiated
);
3276 case MSR_IA32_BBL_CR_CTL3
:
3277 /* Drop writes to this legacy MSR -- see rdmsr
3278 * counterpart for further detail.
3280 if (report_ignored_msrs
)
3281 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3284 case MSR_AMD64_OSVW_ID_LENGTH
:
3285 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3287 vcpu
->arch
.osvw
.length
= data
;
3289 case MSR_AMD64_OSVW_STATUS
:
3290 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3292 vcpu
->arch
.osvw
.status
= data
;
3294 case MSR_PLATFORM_INFO
:
3295 if (!msr_info
->host_initiated
||
3296 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3297 cpuid_fault_enabled(vcpu
)))
3299 vcpu
->arch
.msr_platform_info
= data
;
3301 case MSR_MISC_FEATURES_ENABLES
:
3302 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3303 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3304 !supports_cpuid_fault(vcpu
)))
3306 vcpu
->arch
.msr_misc_features_enables
= data
;
3309 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
3310 return xen_hvm_config(vcpu
, data
);
3311 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3312 return kvm_pmu_set_msr(vcpu
, msr_info
);
3313 return KVM_MSR_RET_INVALID
;
3317 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3319 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3322 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3323 unsigned bank_num
= mcg_cap
& 0xff;
3326 case MSR_IA32_P5_MC_ADDR
:
3327 case MSR_IA32_P5_MC_TYPE
:
3330 case MSR_IA32_MCG_CAP
:
3331 data
= vcpu
->arch
.mcg_cap
;
3333 case MSR_IA32_MCG_CTL
:
3334 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3336 data
= vcpu
->arch
.mcg_ctl
;
3338 case MSR_IA32_MCG_STATUS
:
3339 data
= vcpu
->arch
.mcg_status
;
3342 if (msr
>= MSR_IA32_MC0_CTL
&&
3343 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3344 u32 offset
= array_index_nospec(
3345 msr
- MSR_IA32_MC0_CTL
,
3346 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3348 data
= vcpu
->arch
.mce_banks
[offset
];
3357 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3359 switch (msr_info
->index
) {
3360 case MSR_IA32_PLATFORM_ID
:
3361 case MSR_IA32_EBL_CR_POWERON
:
3362 case MSR_IA32_LASTBRANCHFROMIP
:
3363 case MSR_IA32_LASTBRANCHTOIP
:
3364 case MSR_IA32_LASTINTFROMIP
:
3365 case MSR_IA32_LASTINTTOIP
:
3367 case MSR_K8_TSEG_ADDR
:
3368 case MSR_K8_TSEG_MASK
:
3369 case MSR_VM_HSAVE_PA
:
3370 case MSR_K8_INT_PENDING_MSG
:
3371 case MSR_AMD64_NB_CFG
:
3372 case MSR_FAM10H_MMIO_CONF_BASE
:
3373 case MSR_AMD64_BU_CFG2
:
3374 case MSR_IA32_PERF_CTL
:
3375 case MSR_AMD64_DC_CFG
:
3376 case MSR_F15H_EX_CFG
:
3378 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3379 * limit) MSRs. Just return 0, as we do not want to expose the host
3380 * data here. Do not conditionalize this on CPUID, as KVM does not do
3381 * so for existing CPU-specific MSRs.
3383 case MSR_RAPL_POWER_UNIT
:
3384 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3385 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3386 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3387 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3390 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3391 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3392 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3393 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3394 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3395 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3396 return kvm_pmu_get_msr(vcpu
, msr_info
);
3399 case MSR_IA32_UCODE_REV
:
3400 msr_info
->data
= vcpu
->arch
.microcode_version
;
3402 case MSR_IA32_ARCH_CAPABILITIES
:
3403 if (!msr_info
->host_initiated
&&
3404 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3406 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3408 case MSR_IA32_PERF_CAPABILITIES
:
3409 if (!msr_info
->host_initiated
&&
3410 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3412 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3414 case MSR_IA32_POWER_CTL
:
3415 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3417 case MSR_IA32_TSC
: {
3419 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3420 * even when not intercepted. AMD manual doesn't explicitly
3421 * state this but appears to behave the same.
3423 * On userspace reads and writes, however, we unconditionally
3424 * return L1's TSC value to ensure backwards-compatible
3425 * behavior for migration.
3427 u64 tsc_offset
= msr_info
->host_initiated
? vcpu
->arch
.l1_tsc_offset
:
3428 vcpu
->arch
.tsc_offset
;
3430 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + tsc_offset
;
3434 case 0x200 ... 0x2ff:
3435 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3436 case 0xcd: /* fsb frequency */
3440 * MSR_EBC_FREQUENCY_ID
3441 * Conservative value valid for even the basic CPU models.
3442 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3443 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3444 * and 266MHz for model 3, or 4. Set Core Clock
3445 * Frequency to System Bus Frequency Ratio to 1 (bits
3446 * 31:24) even though these are only valid for CPU
3447 * models > 2, however guests may end up dividing or
3448 * multiplying by zero otherwise.
3450 case MSR_EBC_FREQUENCY_ID
:
3451 msr_info
->data
= 1 << 24;
3453 case MSR_IA32_APICBASE
:
3454 msr_info
->data
= kvm_get_apic_base(vcpu
);
3456 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3457 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3458 case MSR_IA32_TSCDEADLINE
:
3459 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3461 case MSR_IA32_TSC_ADJUST
:
3462 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3464 case MSR_IA32_MISC_ENABLE
:
3465 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3467 case MSR_IA32_SMBASE
:
3468 if (!msr_info
->host_initiated
)
3470 msr_info
->data
= vcpu
->arch
.smbase
;
3473 msr_info
->data
= vcpu
->arch
.smi_count
;
3475 case MSR_IA32_PERF_STATUS
:
3476 /* TSC increment by tick */
3477 msr_info
->data
= 1000ULL;
3478 /* CPU multiplier */
3479 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3482 msr_info
->data
= vcpu
->arch
.efer
;
3484 case MSR_KVM_WALL_CLOCK
:
3485 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3488 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3490 case MSR_KVM_WALL_CLOCK_NEW
:
3491 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3494 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3496 case MSR_KVM_SYSTEM_TIME
:
3497 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3500 msr_info
->data
= vcpu
->arch
.time
;
3502 case MSR_KVM_SYSTEM_TIME_NEW
:
3503 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3506 msr_info
->data
= vcpu
->arch
.time
;
3508 case MSR_KVM_ASYNC_PF_EN
:
3509 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3512 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
3514 case MSR_KVM_ASYNC_PF_INT
:
3515 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3518 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
3520 case MSR_KVM_ASYNC_PF_ACK
:
3521 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3526 case MSR_KVM_STEAL_TIME
:
3527 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3530 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3532 case MSR_KVM_PV_EOI_EN
:
3533 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3536 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3538 case MSR_KVM_POLL_CONTROL
:
3539 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3542 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3544 case MSR_IA32_P5_MC_ADDR
:
3545 case MSR_IA32_P5_MC_TYPE
:
3546 case MSR_IA32_MCG_CAP
:
3547 case MSR_IA32_MCG_CTL
:
3548 case MSR_IA32_MCG_STATUS
:
3549 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3550 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3551 msr_info
->host_initiated
);
3553 if (!msr_info
->host_initiated
&&
3554 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3556 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3558 case MSR_K7_CLK_CTL
:
3560 * Provide expected ramp-up count for K7. All other
3561 * are set to zero, indicating minimum divisors for
3564 * This prevents guest kernels on AMD host with CPU
3565 * type 6, model 8 and higher from exploding due to
3566 * the rdmsr failing.
3568 msr_info
->data
= 0x20000000;
3570 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3571 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3572 case HV_X64_MSR_SYNDBG_OPTIONS
:
3573 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3574 case HV_X64_MSR_CRASH_CTL
:
3575 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3576 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3577 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3578 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3579 return kvm_hv_get_msr_common(vcpu
,
3580 msr_info
->index
, &msr_info
->data
,
3581 msr_info
->host_initiated
);
3582 case MSR_IA32_BBL_CR_CTL3
:
3583 /* This legacy MSR exists but isn't fully documented in current
3584 * silicon. It is however accessed by winxp in very narrow
3585 * scenarios where it sets bit #19, itself documented as
3586 * a "reserved" bit. Best effort attempt to source coherent
3587 * read data here should the balance of the register be
3588 * interpreted by the guest:
3590 * L2 cache control register 3: 64GB range, 256KB size,
3591 * enabled, latency 0x1, configured
3593 msr_info
->data
= 0xbe702111;
3595 case MSR_AMD64_OSVW_ID_LENGTH
:
3596 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3598 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3600 case MSR_AMD64_OSVW_STATUS
:
3601 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3603 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3605 case MSR_PLATFORM_INFO
:
3606 if (!msr_info
->host_initiated
&&
3607 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3609 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3611 case MSR_MISC_FEATURES_ENABLES
:
3612 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3615 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3618 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3619 return kvm_pmu_get_msr(vcpu
, msr_info
);
3620 return KVM_MSR_RET_INVALID
;
3624 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3627 * Read or write a bunch of msrs. All parameters are kernel addresses.
3629 * @return number of msrs set successfully.
3631 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3632 struct kvm_msr_entry
*entries
,
3633 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3634 unsigned index
, u64
*data
))
3638 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3639 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3646 * Read or write a bunch of msrs. Parameters are user addresses.
3648 * @return number of msrs set successfully.
3650 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3651 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3652 unsigned index
, u64
*data
),
3655 struct kvm_msrs msrs
;
3656 struct kvm_msr_entry
*entries
;
3661 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3665 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3668 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3669 entries
= memdup_user(user_msrs
->entries
, size
);
3670 if (IS_ERR(entries
)) {
3671 r
= PTR_ERR(entries
);
3675 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
3680 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
3691 static inline bool kvm_can_mwait_in_guest(void)
3693 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
3694 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
3695 boot_cpu_has(X86_FEATURE_ARAT
);
3698 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
3699 struct kvm_cpuid2 __user
*cpuid_arg
)
3701 struct kvm_cpuid2 cpuid
;
3705 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3708 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3713 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
3719 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
3724 case KVM_CAP_IRQCHIP
:
3726 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
3727 case KVM_CAP_SET_TSS_ADDR
:
3728 case KVM_CAP_EXT_CPUID
:
3729 case KVM_CAP_EXT_EMUL_CPUID
:
3730 case KVM_CAP_CLOCKSOURCE
:
3732 case KVM_CAP_NOP_IO_DELAY
:
3733 case KVM_CAP_MP_STATE
:
3734 case KVM_CAP_SYNC_MMU
:
3735 case KVM_CAP_USER_NMI
:
3736 case KVM_CAP_REINJECT_CONTROL
:
3737 case KVM_CAP_IRQ_INJECT_STATUS
:
3738 case KVM_CAP_IOEVENTFD
:
3739 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
3741 case KVM_CAP_PIT_STATE2
:
3742 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
3743 case KVM_CAP_XEN_HVM
:
3744 case KVM_CAP_VCPU_EVENTS
:
3745 case KVM_CAP_HYPERV
:
3746 case KVM_CAP_HYPERV_VAPIC
:
3747 case KVM_CAP_HYPERV_SPIN
:
3748 case KVM_CAP_HYPERV_SYNIC
:
3749 case KVM_CAP_HYPERV_SYNIC2
:
3750 case KVM_CAP_HYPERV_VP_INDEX
:
3751 case KVM_CAP_HYPERV_EVENTFD
:
3752 case KVM_CAP_HYPERV_TLBFLUSH
:
3753 case KVM_CAP_HYPERV_SEND_IPI
:
3754 case KVM_CAP_HYPERV_CPUID
:
3755 case KVM_CAP_SYS_HYPERV_CPUID
:
3756 case KVM_CAP_PCI_SEGMENT
:
3757 case KVM_CAP_DEBUGREGS
:
3758 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
3760 case KVM_CAP_ASYNC_PF
:
3761 case KVM_CAP_ASYNC_PF_INT
:
3762 case KVM_CAP_GET_TSC_KHZ
:
3763 case KVM_CAP_KVMCLOCK_CTRL
:
3764 case KVM_CAP_READONLY_MEM
:
3765 case KVM_CAP_HYPERV_TIME
:
3766 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
3767 case KVM_CAP_TSC_DEADLINE_TIMER
:
3768 case KVM_CAP_DISABLE_QUIRKS
:
3769 case KVM_CAP_SET_BOOT_CPU_ID
:
3770 case KVM_CAP_SPLIT_IRQCHIP
:
3771 case KVM_CAP_IMMEDIATE_EXIT
:
3772 case KVM_CAP_PMU_EVENT_FILTER
:
3773 case KVM_CAP_GET_MSR_FEATURES
:
3774 case KVM_CAP_MSR_PLATFORM_INFO
:
3775 case KVM_CAP_EXCEPTION_PAYLOAD
:
3776 case KVM_CAP_SET_GUEST_DEBUG
:
3777 case KVM_CAP_LAST_CPU
:
3778 case KVM_CAP_X86_USER_SPACE_MSR
:
3779 case KVM_CAP_X86_MSR_FILTER
:
3780 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
3783 case KVM_CAP_SYNC_REGS
:
3784 r
= KVM_SYNC_X86_VALID_FIELDS
;
3786 case KVM_CAP_ADJUST_CLOCK
:
3787 r
= KVM_CLOCK_TSC_STABLE
;
3789 case KVM_CAP_X86_DISABLE_EXITS
:
3790 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
3791 KVM_X86_DISABLE_EXITS_CSTATE
;
3792 if(kvm_can_mwait_in_guest())
3793 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
3795 case KVM_CAP_X86_SMM
:
3796 /* SMBASE is usually relocated above 1M on modern chipsets,
3797 * and SMM handlers might indeed rely on 4G segment limits,
3798 * so do not report SMM to be available if real mode is
3799 * emulated via vm86 mode. Still, do not go to great lengths
3800 * to avoid userspace's usage of the feature, because it is a
3801 * fringe case that is not enabled except via specific settings
3802 * of the module parameters.
3804 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
3807 r
= !static_call(kvm_x86_cpu_has_accelerated_tpr
)();
3809 case KVM_CAP_NR_VCPUS
:
3810 r
= KVM_SOFT_MAX_VCPUS
;
3812 case KVM_CAP_MAX_VCPUS
:
3815 case KVM_CAP_MAX_VCPU_ID
:
3816 r
= KVM_MAX_VCPU_ID
;
3818 case KVM_CAP_PV_MMU
: /* obsolete */
3822 r
= KVM_MAX_MCE_BANKS
;
3825 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
3827 case KVM_CAP_TSC_CONTROL
:
3828 r
= kvm_has_tsc_control
;
3830 case KVM_CAP_X2APIC_API
:
3831 r
= KVM_X2APIC_API_VALID_FLAGS
;
3833 case KVM_CAP_NESTED_STATE
:
3834 r
= kvm_x86_ops
.nested_ops
->get_state
?
3835 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
3837 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
3838 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
3840 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
3841 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
3843 case KVM_CAP_SMALLER_MAXPHYADDR
:
3844 r
= (int) allow_smaller_maxphyaddr
;
3846 case KVM_CAP_STEAL_TIME
:
3847 r
= sched_info_on();
3849 case KVM_CAP_X86_BUS_LOCK_EXIT
:
3850 if (kvm_has_bus_lock_exit
)
3851 r
= KVM_BUS_LOCK_DETECTION_OFF
|
3852 KVM_BUS_LOCK_DETECTION_EXIT
;
3863 long kvm_arch_dev_ioctl(struct file
*filp
,
3864 unsigned int ioctl
, unsigned long arg
)
3866 void __user
*argp
= (void __user
*)arg
;
3870 case KVM_GET_MSR_INDEX_LIST
: {
3871 struct kvm_msr_list __user
*user_msr_list
= argp
;
3872 struct kvm_msr_list msr_list
;
3876 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3879 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
3880 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3883 if (n
< msr_list
.nmsrs
)
3886 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
3887 num_msrs_to_save
* sizeof(u32
)))
3889 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
3891 num_emulated_msrs
* sizeof(u32
)))
3896 case KVM_GET_SUPPORTED_CPUID
:
3897 case KVM_GET_EMULATED_CPUID
: {
3898 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3899 struct kvm_cpuid2 cpuid
;
3902 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3905 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
3911 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
3916 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
3918 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
3919 sizeof(kvm_mce_cap_supported
)))
3923 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
3924 struct kvm_msr_list __user
*user_msr_list
= argp
;
3925 struct kvm_msr_list msr_list
;
3929 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3932 msr_list
.nmsrs
= num_msr_based_features
;
3933 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3936 if (n
< msr_list
.nmsrs
)
3939 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
3940 num_msr_based_features
* sizeof(u32
)))
3946 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
3948 case KVM_GET_SUPPORTED_HV_CPUID
:
3949 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
3959 static void wbinvd_ipi(void *garbage
)
3964 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3966 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
3969 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
3971 /* Address WBINVD may be executed by guest */
3972 if (need_emulate_wbinvd(vcpu
)) {
3973 if (static_call(kvm_x86_has_wbinvd_exit
)())
3974 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
3975 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
3976 smp_call_function_single(vcpu
->cpu
,
3977 wbinvd_ipi
, NULL
, 1);
3980 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
3982 /* Save host pkru register if supported */
3983 vcpu
->arch
.host_pkru
= read_pkru();
3985 /* Apply any externally detected TSC adjustments (due to suspend) */
3986 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
3987 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
3988 vcpu
->arch
.tsc_offset_adjustment
= 0;
3989 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3992 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
3993 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3994 rdtsc() - vcpu
->arch
.last_host_tsc
;
3996 mark_tsc_unstable("KVM discovered backwards TSC");
3998 if (kvm_check_tsc_unstable()) {
3999 u64 offset
= kvm_compute_tsc_offset(vcpu
,
4000 vcpu
->arch
.last_guest_tsc
);
4001 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4002 vcpu
->arch
.tsc_catchup
= 1;
4005 if (kvm_lapic_hv_timer_in_use(vcpu
))
4006 kvm_lapic_restart_hv_timer(vcpu
);
4009 * On a host with synchronized TSC, there is no need to update
4010 * kvmclock on vcpu->cpu migration
4012 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4013 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4014 if (vcpu
->cpu
!= cpu
)
4015 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4019 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4022 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4024 struct kvm_host_map map
;
4025 struct kvm_steal_time
*st
;
4028 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4031 if (vcpu
->arch
.st
.preempted
)
4035 * Take the srcu lock as memslots will be accessed to check the gfn
4036 * cache generation against the memslots generation.
4038 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4040 if (kvm_map_gfn(vcpu
, vcpu
->arch
.st
.msr_val
>> PAGE_SHIFT
, &map
,
4041 &vcpu
->arch
.st
.cache
, true))
4045 offset_in_page(vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
);
4047 st
->preempted
= vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4049 kvm_unmap_gfn(vcpu
, &map
, &vcpu
->arch
.st
.cache
, true, true);
4052 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4055 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4057 if (vcpu
->preempted
&& !vcpu
->arch
.guest_state_protected
)
4058 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
4060 kvm_steal_time_set_preempted(vcpu
);
4061 static_call(kvm_x86_vcpu_put
)(vcpu
);
4062 vcpu
->arch
.last_host_tsc
= rdtsc();
4064 * If userspace has set any breakpoints or watchpoints, dr6 is restored
4065 * on every vmexit, but if not, we might have a stale dr6 from the
4066 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4071 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4072 struct kvm_lapic_state
*s
)
4074 if (vcpu
->arch
.apicv_active
)
4075 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
4077 return kvm_apic_get_state(vcpu
, s
);
4080 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4081 struct kvm_lapic_state
*s
)
4085 r
= kvm_apic_set_state(vcpu
, s
);
4088 update_cr8_intercept(vcpu
);
4093 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4096 * We can accept userspace's request for interrupt injection
4097 * as long as we have a place to store the interrupt number.
4098 * The actual injection will happen when the CPU is able to
4099 * deliver the interrupt.
4101 if (kvm_cpu_has_extint(vcpu
))
4104 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4105 return (!lapic_in_kernel(vcpu
) ||
4106 kvm_apic_accept_pic_intr(vcpu
));
4109 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4111 return kvm_arch_interrupt_allowed(vcpu
) &&
4112 kvm_cpu_accept_dm_intr(vcpu
);
4115 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4116 struct kvm_interrupt
*irq
)
4118 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4121 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4122 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4123 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4128 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4129 * fail for in-kernel 8259.
4131 if (pic_in_kernel(vcpu
->kvm
))
4134 if (vcpu
->arch
.pending_external_vector
!= -1)
4137 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4138 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4142 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4144 kvm_inject_nmi(vcpu
);
4149 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4151 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4156 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4157 struct kvm_tpr_access_ctl
*tac
)
4161 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4165 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4169 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4172 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4174 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4177 vcpu
->arch
.mcg_cap
= mcg_cap
;
4178 /* Init IA32_MCG_CTL to all 1s */
4179 if (mcg_cap
& MCG_CTL_P
)
4180 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4181 /* Init IA32_MCi_CTL to all 1s */
4182 for (bank
= 0; bank
< bank_num
; bank
++)
4183 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4185 static_call(kvm_x86_setup_mce
)(vcpu
);
4190 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4191 struct kvm_x86_mce
*mce
)
4193 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4194 unsigned bank_num
= mcg_cap
& 0xff;
4195 u64
*banks
= vcpu
->arch
.mce_banks
;
4197 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4200 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4201 * reporting is disabled
4203 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4204 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4206 banks
+= 4 * mce
->bank
;
4208 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4209 * reporting is disabled for the bank
4211 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4213 if (mce
->status
& MCI_STATUS_UC
) {
4214 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4215 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4216 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4219 if (banks
[1] & MCI_STATUS_VAL
)
4220 mce
->status
|= MCI_STATUS_OVER
;
4221 banks
[2] = mce
->addr
;
4222 banks
[3] = mce
->misc
;
4223 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4224 banks
[1] = mce
->status
;
4225 kvm_queue_exception(vcpu
, MC_VECTOR
);
4226 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4227 || !(banks
[1] & MCI_STATUS_UC
)) {
4228 if (banks
[1] & MCI_STATUS_VAL
)
4229 mce
->status
|= MCI_STATUS_OVER
;
4230 banks
[2] = mce
->addr
;
4231 banks
[3] = mce
->misc
;
4232 banks
[1] = mce
->status
;
4234 banks
[1] |= MCI_STATUS_OVER
;
4238 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4239 struct kvm_vcpu_events
*events
)
4243 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
4247 * In guest mode, payload delivery should be deferred,
4248 * so that the L1 hypervisor can intercept #PF before
4249 * CR2 is modified (or intercept #DB before DR6 is
4250 * modified under nVMX). Unless the per-VM capability,
4251 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4252 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4253 * opportunistically defer the exception payload, deliver it if the
4254 * capability hasn't been requested before processing a
4255 * KVM_GET_VCPU_EVENTS.
4257 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4258 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4259 kvm_deliver_exception_payload(vcpu
);
4262 * The API doesn't provide the instruction length for software
4263 * exceptions, so don't report them. As long as the guest RIP
4264 * isn't advanced, we should expect to encounter the exception
4267 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4268 events
->exception
.injected
= 0;
4269 events
->exception
.pending
= 0;
4271 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4272 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4274 * For ABI compatibility, deliberately conflate
4275 * pending and injected exceptions when
4276 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4278 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4279 events
->exception
.injected
|=
4280 vcpu
->arch
.exception
.pending
;
4282 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4283 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4284 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4285 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4286 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4288 events
->interrupt
.injected
=
4289 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4290 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4291 events
->interrupt
.soft
= 0;
4292 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
4294 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4295 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4296 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
4297 events
->nmi
.pad
= 0;
4299 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4301 events
->smi
.smm
= is_smm(vcpu
);
4302 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4303 events
->smi
.smm_inside_nmi
=
4304 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4305 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4307 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4308 | KVM_VCPUEVENT_VALID_SHADOW
4309 | KVM_VCPUEVENT_VALID_SMM
);
4310 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4311 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4313 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4316 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
);
4318 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4319 struct kvm_vcpu_events
*events
)
4321 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4322 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4323 | KVM_VCPUEVENT_VALID_SHADOW
4324 | KVM_VCPUEVENT_VALID_SMM
4325 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4328 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4329 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4331 if (events
->exception
.pending
)
4332 events
->exception
.injected
= 0;
4334 events
->exception_has_payload
= 0;
4336 events
->exception
.pending
= 0;
4337 events
->exception_has_payload
= 0;
4340 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4341 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4344 /* INITs are latched while in SMM */
4345 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4346 (events
->smi
.smm
|| events
->smi
.pending
) &&
4347 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4351 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4352 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4353 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4354 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4355 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4356 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4357 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4359 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4360 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4361 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4362 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4363 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
4364 events
->interrupt
.shadow
);
4366 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4367 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
4368 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
4369 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
4371 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
4372 lapic_in_kernel(vcpu
))
4373 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
4375 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
4376 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
4377 if (events
->smi
.smm
)
4378 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
4380 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
4381 kvm_smm_changed(vcpu
);
4384 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
4386 if (events
->smi
.smm
) {
4387 if (events
->smi
.smm_inside_nmi
)
4388 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
4390 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
4393 if (lapic_in_kernel(vcpu
)) {
4394 if (events
->smi
.latched_init
)
4395 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4397 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4401 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4406 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
4407 struct kvm_debugregs
*dbgregs
)
4411 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
4412 kvm_get_dr(vcpu
, 6, &val
);
4414 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4416 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4419 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4420 struct kvm_debugregs
*dbgregs
)
4425 if (dbgregs
->dr6
& ~0xffffffffull
)
4427 if (dbgregs
->dr7
& ~0xffffffffull
)
4430 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4431 kvm_update_dr0123(vcpu
);
4432 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4433 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4434 kvm_update_dr7(vcpu
);
4439 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4441 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
4443 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4444 u64 xstate_bv
= xsave
->header
.xfeatures
;
4448 * Copy legacy XSAVE area, to avoid complications with CPUID
4449 * leaves 0 and 1 in the loop below.
4451 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
4454 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
4455 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
4458 * Copy each region from the possibly compacted offset to the
4459 * non-compacted offset.
4461 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4463 u64 xfeature_mask
= valid
& -valid
;
4464 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4465 void *src
= get_xsave_addr(xsave
, xfeature_nr
);
4468 u32 size
, offset
, ecx
, edx
;
4469 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4470 &size
, &offset
, &ecx
, &edx
);
4471 if (xfeature_nr
== XFEATURE_PKRU
)
4472 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
4473 sizeof(vcpu
->arch
.pkru
));
4475 memcpy(dest
+ offset
, src
, size
);
4479 valid
-= xfeature_mask
;
4483 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
4485 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4486 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
4490 * Copy legacy XSAVE area, to avoid complications with CPUID
4491 * leaves 0 and 1 in the loop below.
4493 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
4495 /* Set XSTATE_BV and possibly XCOMP_BV. */
4496 xsave
->header
.xfeatures
= xstate_bv
;
4497 if (boot_cpu_has(X86_FEATURE_XSAVES
))
4498 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
4501 * Copy each region from the non-compacted offset to the
4502 * possibly compacted offset.
4504 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4506 u64 xfeature_mask
= valid
& -valid
;
4507 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4508 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
4511 u32 size
, offset
, ecx
, edx
;
4512 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4513 &size
, &offset
, &ecx
, &edx
);
4514 if (xfeature_nr
== XFEATURE_PKRU
)
4515 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
4516 sizeof(vcpu
->arch
.pkru
));
4518 memcpy(dest
, src
+ offset
, size
);
4521 valid
-= xfeature_mask
;
4525 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4526 struct kvm_xsave
*guest_xsave
)
4528 if (!vcpu
->arch
.guest_fpu
)
4531 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4532 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
4533 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
4535 memcpy(guest_xsave
->region
,
4536 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
4537 sizeof(struct fxregs_state
));
4538 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
4539 XFEATURE_MASK_FPSSE
;
4543 #define XSAVE_MXCSR_OFFSET 24
4545 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4546 struct kvm_xsave
*guest_xsave
)
4551 if (!vcpu
->arch
.guest_fpu
)
4554 xstate_bv
= *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
4555 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
4557 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4559 * Here we allow setting states that are not present in
4560 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4561 * with old userspace.
4563 if (xstate_bv
& ~supported_xcr0
|| mxcsr
& ~mxcsr_feature_mask
)
4565 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
4567 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
4568 mxcsr
& ~mxcsr_feature_mask
)
4570 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
4571 guest_xsave
->region
, sizeof(struct fxregs_state
));
4576 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4577 struct kvm_xcrs
*guest_xcrs
)
4579 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4580 guest_xcrs
->nr_xcrs
= 0;
4584 guest_xcrs
->nr_xcrs
= 1;
4585 guest_xcrs
->flags
= 0;
4586 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4587 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4590 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4591 struct kvm_xcrs
*guest_xcrs
)
4595 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4598 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4601 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4602 /* Only support XCR0 currently */
4603 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4604 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4605 guest_xcrs
->xcrs
[i
].value
);
4614 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4615 * stopped by the hypervisor. This function will be called from the host only.
4616 * EINVAL is returned when the host attempts to set the flag for a guest that
4617 * does not support pv clocks.
4619 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4621 if (!vcpu
->arch
.pv_time_enabled
)
4623 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4624 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4628 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4629 struct kvm_enable_cap
*cap
)
4632 uint16_t vmcs_version
;
4633 void __user
*user_ptr
;
4639 case KVM_CAP_HYPERV_SYNIC2
:
4644 case KVM_CAP_HYPERV_SYNIC
:
4645 if (!irqchip_in_kernel(vcpu
->kvm
))
4647 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
4648 KVM_CAP_HYPERV_SYNIC2
);
4649 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4650 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
4652 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
4654 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
4655 if (copy_to_user(user_ptr
, &vmcs_version
,
4656 sizeof(vmcs_version
)))
4660 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4661 if (!kvm_x86_ops
.enable_direct_tlbflush
)
4664 return static_call(kvm_x86_enable_direct_tlbflush
)(vcpu
);
4666 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4667 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
4668 if (vcpu
->arch
.pv_cpuid
.enforce
)
4669 kvm_update_pv_runtime(vcpu
);
4678 long kvm_arch_vcpu_ioctl(struct file
*filp
,
4679 unsigned int ioctl
, unsigned long arg
)
4681 struct kvm_vcpu
*vcpu
= filp
->private_data
;
4682 void __user
*argp
= (void __user
*)arg
;
4685 struct kvm_lapic_state
*lapic
;
4686 struct kvm_xsave
*xsave
;
4687 struct kvm_xcrs
*xcrs
;
4695 case KVM_GET_LAPIC
: {
4697 if (!lapic_in_kernel(vcpu
))
4699 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
4700 GFP_KERNEL_ACCOUNT
);
4705 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
4709 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
4714 case KVM_SET_LAPIC
: {
4716 if (!lapic_in_kernel(vcpu
))
4718 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
4719 if (IS_ERR(u
.lapic
)) {
4720 r
= PTR_ERR(u
.lapic
);
4724 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
4727 case KVM_INTERRUPT
: {
4728 struct kvm_interrupt irq
;
4731 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
4733 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
4737 r
= kvm_vcpu_ioctl_nmi(vcpu
);
4741 r
= kvm_vcpu_ioctl_smi(vcpu
);
4744 case KVM_SET_CPUID
: {
4745 struct kvm_cpuid __user
*cpuid_arg
= argp
;
4746 struct kvm_cpuid cpuid
;
4749 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4751 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4754 case KVM_SET_CPUID2
: {
4755 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4756 struct kvm_cpuid2 cpuid
;
4759 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4761 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
4762 cpuid_arg
->entries
);
4765 case KVM_GET_CPUID2
: {
4766 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4767 struct kvm_cpuid2 cpuid
;
4770 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4772 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
4773 cpuid_arg
->entries
);
4777 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4782 case KVM_GET_MSRS
: {
4783 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4784 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
4785 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4788 case KVM_SET_MSRS
: {
4789 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4790 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
4791 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4794 case KVM_TPR_ACCESS_REPORTING
: {
4795 struct kvm_tpr_access_ctl tac
;
4798 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
4800 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
4804 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
4809 case KVM_SET_VAPIC_ADDR
: {
4810 struct kvm_vapic_addr va
;
4814 if (!lapic_in_kernel(vcpu
))
4817 if (copy_from_user(&va
, argp
, sizeof(va
)))
4819 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4820 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
4821 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4824 case KVM_X86_SETUP_MCE
: {
4828 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
4830 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
4833 case KVM_X86_SET_MCE
: {
4834 struct kvm_x86_mce mce
;
4837 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
4839 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
4842 case KVM_GET_VCPU_EVENTS
: {
4843 struct kvm_vcpu_events events
;
4845 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
4848 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
4853 case KVM_SET_VCPU_EVENTS
: {
4854 struct kvm_vcpu_events events
;
4857 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
4860 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
4863 case KVM_GET_DEBUGREGS
: {
4864 struct kvm_debugregs dbgregs
;
4866 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
4869 if (copy_to_user(argp
, &dbgregs
,
4870 sizeof(struct kvm_debugregs
)))
4875 case KVM_SET_DEBUGREGS
: {
4876 struct kvm_debugregs dbgregs
;
4879 if (copy_from_user(&dbgregs
, argp
,
4880 sizeof(struct kvm_debugregs
)))
4883 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
4886 case KVM_GET_XSAVE
: {
4887 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
4892 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
4895 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
4900 case KVM_SET_XSAVE
: {
4901 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
4902 if (IS_ERR(u
.xsave
)) {
4903 r
= PTR_ERR(u
.xsave
);
4907 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
4910 case KVM_GET_XCRS
: {
4911 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
4916 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
4919 if (copy_to_user(argp
, u
.xcrs
,
4920 sizeof(struct kvm_xcrs
)))
4925 case KVM_SET_XCRS
: {
4926 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
4927 if (IS_ERR(u
.xcrs
)) {
4928 r
= PTR_ERR(u
.xcrs
);
4932 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
4935 case KVM_SET_TSC_KHZ
: {
4939 user_tsc_khz
= (u32
)arg
;
4941 if (kvm_has_tsc_control
&&
4942 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
4945 if (user_tsc_khz
== 0)
4946 user_tsc_khz
= tsc_khz
;
4948 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
4953 case KVM_GET_TSC_KHZ
: {
4954 r
= vcpu
->arch
.virtual_tsc_khz
;
4957 case KVM_KVMCLOCK_CTRL
: {
4958 r
= kvm_set_guest_paused(vcpu
);
4961 case KVM_ENABLE_CAP
: {
4962 struct kvm_enable_cap cap
;
4965 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4967 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
4970 case KVM_GET_NESTED_STATE
: {
4971 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
4975 if (!kvm_x86_ops
.nested_ops
->get_state
)
4978 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
4980 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
4983 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
4988 if (r
> user_data_size
) {
4989 if (put_user(r
, &user_kvm_nested_state
->size
))
4999 case KVM_SET_NESTED_STATE
: {
5000 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5001 struct kvm_nested_state kvm_state
;
5005 if (!kvm_x86_ops
.nested_ops
->set_state
)
5009 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5013 if (kvm_state
.size
< sizeof(kvm_state
))
5016 if (kvm_state
.flags
&
5017 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5018 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5019 | KVM_STATE_NESTED_GIF_SET
))
5022 /* nested_run_pending implies guest_mode. */
5023 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5024 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5027 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5028 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5029 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5032 case KVM_GET_SUPPORTED_HV_CPUID
:
5033 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5045 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5047 return VM_FAULT_SIGBUS
;
5050 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5054 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5056 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
5060 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5063 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
5066 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5067 unsigned long kvm_nr_mmu_pages
)
5069 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5072 mutex_lock(&kvm
->slots_lock
);
5074 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5075 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5077 mutex_unlock(&kvm
->slots_lock
);
5081 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5083 return kvm
->arch
.n_max_mmu_pages
;
5086 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5088 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5092 switch (chip
->chip_id
) {
5093 case KVM_IRQCHIP_PIC_MASTER
:
5094 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5095 sizeof(struct kvm_pic_state
));
5097 case KVM_IRQCHIP_PIC_SLAVE
:
5098 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5099 sizeof(struct kvm_pic_state
));
5101 case KVM_IRQCHIP_IOAPIC
:
5102 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5111 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5113 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5117 switch (chip
->chip_id
) {
5118 case KVM_IRQCHIP_PIC_MASTER
:
5119 spin_lock(&pic
->lock
);
5120 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5121 sizeof(struct kvm_pic_state
));
5122 spin_unlock(&pic
->lock
);
5124 case KVM_IRQCHIP_PIC_SLAVE
:
5125 spin_lock(&pic
->lock
);
5126 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5127 sizeof(struct kvm_pic_state
));
5128 spin_unlock(&pic
->lock
);
5130 case KVM_IRQCHIP_IOAPIC
:
5131 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5137 kvm_pic_update_irq(pic
);
5141 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5143 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5145 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5147 mutex_lock(&kps
->lock
);
5148 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5149 mutex_unlock(&kps
->lock
);
5153 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5156 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5158 mutex_lock(&pit
->pit_state
.lock
);
5159 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5160 for (i
= 0; i
< 3; i
++)
5161 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5162 mutex_unlock(&pit
->pit_state
.lock
);
5166 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5168 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5169 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5170 sizeof(ps
->channels
));
5171 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5172 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5173 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5177 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5181 u32 prev_legacy
, cur_legacy
;
5182 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5184 mutex_lock(&pit
->pit_state
.lock
);
5185 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5186 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5187 if (!prev_legacy
&& cur_legacy
)
5189 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5190 sizeof(pit
->pit_state
.channels
));
5191 pit
->pit_state
.flags
= ps
->flags
;
5192 for (i
= 0; i
< 3; i
++)
5193 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5195 mutex_unlock(&pit
->pit_state
.lock
);
5199 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5200 struct kvm_reinject_control
*control
)
5202 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5204 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5205 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5206 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5208 mutex_lock(&pit
->pit_state
.lock
);
5209 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5210 mutex_unlock(&pit
->pit_state
.lock
);
5215 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5218 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5220 static_call_cond(kvm_x86_flush_log_dirty
)(kvm
);
5223 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5226 if (!irqchip_in_kernel(kvm
))
5229 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5230 irq_event
->irq
, irq_event
->level
,
5235 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5236 struct kvm_enable_cap
*cap
)
5244 case KVM_CAP_DISABLE_QUIRKS
:
5245 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5248 case KVM_CAP_SPLIT_IRQCHIP
: {
5249 mutex_lock(&kvm
->lock
);
5251 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5252 goto split_irqchip_unlock
;
5254 if (irqchip_in_kernel(kvm
))
5255 goto split_irqchip_unlock
;
5256 if (kvm
->created_vcpus
)
5257 goto split_irqchip_unlock
;
5258 r
= kvm_setup_empty_irq_routing(kvm
);
5260 goto split_irqchip_unlock
;
5261 /* Pairs with irqchip_in_kernel. */
5263 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5264 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5266 split_irqchip_unlock
:
5267 mutex_unlock(&kvm
->lock
);
5270 case KVM_CAP_X2APIC_API
:
5272 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
5275 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
5276 kvm
->arch
.x2apic_format
= true;
5277 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
5278 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
5282 case KVM_CAP_X86_DISABLE_EXITS
:
5284 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
5287 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
5288 kvm_can_mwait_in_guest())
5289 kvm
->arch
.mwait_in_guest
= true;
5290 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
5291 kvm
->arch
.hlt_in_guest
= true;
5292 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
5293 kvm
->arch
.pause_in_guest
= true;
5294 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
5295 kvm
->arch
.cstate_in_guest
= true;
5298 case KVM_CAP_MSR_PLATFORM_INFO
:
5299 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
5302 case KVM_CAP_EXCEPTION_PAYLOAD
:
5303 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
5306 case KVM_CAP_X86_USER_SPACE_MSR
:
5307 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
5310 case KVM_CAP_X86_BUS_LOCK_EXIT
:
5312 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
5315 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
5316 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
5319 if (kvm_has_bus_lock_exit
&&
5320 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
5321 kvm
->arch
.bus_lock_detection_enabled
= true;
5331 static void kvm_clear_msr_filter(struct kvm
*kvm
)
5334 u32 count
= kvm
->arch
.msr_filter
.count
;
5335 struct msr_bitmap_range ranges
[16];
5337 mutex_lock(&kvm
->lock
);
5338 kvm
->arch
.msr_filter
.count
= 0;
5339 memcpy(ranges
, kvm
->arch
.msr_filter
.ranges
, count
* sizeof(ranges
[0]));
5340 mutex_unlock(&kvm
->lock
);
5341 synchronize_srcu(&kvm
->srcu
);
5343 for (i
= 0; i
< count
; i
++)
5344 kfree(ranges
[i
].bitmap
);
5347 static int kvm_add_msr_filter(struct kvm
*kvm
, struct kvm_msr_filter_range
*user_range
)
5349 struct msr_bitmap_range
*ranges
= kvm
->arch
.msr_filter
.ranges
;
5350 struct msr_bitmap_range range
;
5351 unsigned long *bitmap
= NULL
;
5355 if (!user_range
->nmsrs
)
5358 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
5359 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
5362 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
5364 return PTR_ERR(bitmap
);
5366 range
= (struct msr_bitmap_range
) {
5367 .flags
= user_range
->flags
,
5368 .base
= user_range
->base
,
5369 .nmsrs
= user_range
->nmsrs
,
5373 if (range
.flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
)) {
5383 /* Everything ok, add this range identifier to our global pool */
5384 ranges
[kvm
->arch
.msr_filter
.count
] = range
;
5385 /* Make sure we filled the array before we tell anyone to walk it */
5387 kvm
->arch
.msr_filter
.count
++;
5395 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
5397 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
5398 struct kvm_msr_filter filter
;
5404 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
5407 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
5408 empty
&= !filter
.ranges
[i
].nmsrs
;
5410 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
5411 if (empty
&& !default_allow
)
5414 kvm_clear_msr_filter(kvm
);
5416 kvm
->arch
.msr_filter
.default_allow
= default_allow
;
5419 * Protect from concurrent calls to this function that could trigger
5420 * a TOCTOU violation on kvm->arch.msr_filter.count.
5422 mutex_lock(&kvm
->lock
);
5423 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
5424 r
= kvm_add_msr_filter(kvm
, &filter
.ranges
[i
]);
5429 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
5430 mutex_unlock(&kvm
->lock
);
5435 long kvm_arch_vm_ioctl(struct file
*filp
,
5436 unsigned int ioctl
, unsigned long arg
)
5438 struct kvm
*kvm
= filp
->private_data
;
5439 void __user
*argp
= (void __user
*)arg
;
5442 * This union makes it completely explicit to gcc-3.x
5443 * that these two variables' stack usage should be
5444 * combined, not added together.
5447 struct kvm_pit_state ps
;
5448 struct kvm_pit_state2 ps2
;
5449 struct kvm_pit_config pit_config
;
5453 case KVM_SET_TSS_ADDR
:
5454 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
5456 case KVM_SET_IDENTITY_MAP_ADDR
: {
5459 mutex_lock(&kvm
->lock
);
5461 if (kvm
->created_vcpus
)
5462 goto set_identity_unlock
;
5464 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
5465 goto set_identity_unlock
;
5466 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
5467 set_identity_unlock
:
5468 mutex_unlock(&kvm
->lock
);
5471 case KVM_SET_NR_MMU_PAGES
:
5472 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
5474 case KVM_GET_NR_MMU_PAGES
:
5475 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
5477 case KVM_CREATE_IRQCHIP
: {
5478 mutex_lock(&kvm
->lock
);
5481 if (irqchip_in_kernel(kvm
))
5482 goto create_irqchip_unlock
;
5485 if (kvm
->created_vcpus
)
5486 goto create_irqchip_unlock
;
5488 r
= kvm_pic_init(kvm
);
5490 goto create_irqchip_unlock
;
5492 r
= kvm_ioapic_init(kvm
);
5494 kvm_pic_destroy(kvm
);
5495 goto create_irqchip_unlock
;
5498 r
= kvm_setup_default_irq_routing(kvm
);
5500 kvm_ioapic_destroy(kvm
);
5501 kvm_pic_destroy(kvm
);
5502 goto create_irqchip_unlock
;
5504 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5506 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
5507 create_irqchip_unlock
:
5508 mutex_unlock(&kvm
->lock
);
5511 case KVM_CREATE_PIT
:
5512 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
5514 case KVM_CREATE_PIT2
:
5516 if (copy_from_user(&u
.pit_config
, argp
,
5517 sizeof(struct kvm_pit_config
)))
5520 mutex_lock(&kvm
->lock
);
5523 goto create_pit_unlock
;
5525 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
5529 mutex_unlock(&kvm
->lock
);
5531 case KVM_GET_IRQCHIP
: {
5532 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5533 struct kvm_irqchip
*chip
;
5535 chip
= memdup_user(argp
, sizeof(*chip
));
5542 if (!irqchip_kernel(kvm
))
5543 goto get_irqchip_out
;
5544 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
5546 goto get_irqchip_out
;
5548 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
5549 goto get_irqchip_out
;
5555 case KVM_SET_IRQCHIP
: {
5556 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5557 struct kvm_irqchip
*chip
;
5559 chip
= memdup_user(argp
, sizeof(*chip
));
5566 if (!irqchip_kernel(kvm
))
5567 goto set_irqchip_out
;
5568 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
5575 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
5578 if (!kvm
->arch
.vpit
)
5580 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
5584 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
5591 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
5593 mutex_lock(&kvm
->lock
);
5595 if (!kvm
->arch
.vpit
)
5597 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
5599 mutex_unlock(&kvm
->lock
);
5602 case KVM_GET_PIT2
: {
5604 if (!kvm
->arch
.vpit
)
5606 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
5610 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
5615 case KVM_SET_PIT2
: {
5617 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
5619 mutex_lock(&kvm
->lock
);
5621 if (!kvm
->arch
.vpit
)
5623 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
5625 mutex_unlock(&kvm
->lock
);
5628 case KVM_REINJECT_CONTROL
: {
5629 struct kvm_reinject_control control
;
5631 if (copy_from_user(&control
, argp
, sizeof(control
)))
5634 if (!kvm
->arch
.vpit
)
5636 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
5639 case KVM_SET_BOOT_CPU_ID
:
5641 mutex_lock(&kvm
->lock
);
5642 if (kvm
->created_vcpus
)
5645 kvm
->arch
.bsp_vcpu_id
= arg
;
5646 mutex_unlock(&kvm
->lock
);
5648 case KVM_XEN_HVM_CONFIG
: {
5649 struct kvm_xen_hvm_config xhc
;
5651 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
5656 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
5660 case KVM_SET_CLOCK
: {
5661 struct kvm_clock_data user_ns
;
5665 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
5674 * TODO: userspace has to take care of races with VCPU_RUN, so
5675 * kvm_gen_update_masterclock() can be cut down to locked
5676 * pvclock_update_vm_gtod_copy().
5678 kvm_gen_update_masterclock(kvm
);
5679 now_ns
= get_kvmclock_ns(kvm
);
5680 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
5681 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
5684 case KVM_GET_CLOCK
: {
5685 struct kvm_clock_data user_ns
;
5688 now_ns
= get_kvmclock_ns(kvm
);
5689 user_ns
.clock
= now_ns
;
5690 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
5691 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
5694 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
5699 case KVM_MEMORY_ENCRYPT_OP
: {
5701 if (kvm_x86_ops
.mem_enc_op
)
5702 r
= static_call(kvm_x86_mem_enc_op
)(kvm
, argp
);
5705 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
5706 struct kvm_enc_region region
;
5709 if (copy_from_user(®ion
, argp
, sizeof(region
)))
5713 if (kvm_x86_ops
.mem_enc_reg_region
)
5714 r
= static_call(kvm_x86_mem_enc_reg_region
)(kvm
, ®ion
);
5717 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
5718 struct kvm_enc_region region
;
5721 if (copy_from_user(®ion
, argp
, sizeof(region
)))
5725 if (kvm_x86_ops
.mem_enc_unreg_region
)
5726 r
= static_call(kvm_x86_mem_enc_unreg_region
)(kvm
, ®ion
);
5729 case KVM_HYPERV_EVENTFD
: {
5730 struct kvm_hyperv_eventfd hvevfd
;
5733 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
5735 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
5738 case KVM_SET_PMU_EVENT_FILTER
:
5739 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
5741 case KVM_X86_SET_MSR_FILTER
:
5742 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
5751 static void kvm_init_msr_list(void)
5753 struct x86_pmu_capability x86_pmu
;
5757 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
5758 "Please update the fixed PMCs in msrs_to_saved_all[]");
5760 perf_get_x86_pmu_capability(&x86_pmu
);
5762 num_msrs_to_save
= 0;
5763 num_emulated_msrs
= 0;
5764 num_msr_based_features
= 0;
5766 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
5767 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
5771 * Even MSRs that are valid in the host may not be exposed
5772 * to the guests in some cases.
5774 switch (msrs_to_save_all
[i
]) {
5775 case MSR_IA32_BNDCFGS
:
5776 if (!kvm_mpx_supported())
5780 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
))
5783 case MSR_IA32_UMWAIT_CONTROL
:
5784 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
5787 case MSR_IA32_RTIT_CTL
:
5788 case MSR_IA32_RTIT_STATUS
:
5789 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
5792 case MSR_IA32_RTIT_CR3_MATCH
:
5793 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5794 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
5797 case MSR_IA32_RTIT_OUTPUT_BASE
:
5798 case MSR_IA32_RTIT_OUTPUT_MASK
:
5799 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5800 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
5801 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
5804 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
5805 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5806 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
5807 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
5810 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
5811 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
5812 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
5815 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
5816 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
5817 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
5824 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
5827 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
5828 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
5831 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
5834 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
5835 struct kvm_msr_entry msr
;
5837 msr
.index
= msr_based_features_all
[i
];
5838 if (kvm_get_msr_feature(&msr
))
5841 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
5845 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
5853 if (!(lapic_in_kernel(vcpu
) &&
5854 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
5855 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5866 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
5873 if (!(lapic_in_kernel(vcpu
) &&
5874 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
5876 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5878 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
5888 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
5889 struct kvm_segment
*var
, int seg
)
5891 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
5894 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
5895 struct kvm_segment
*var
, int seg
)
5897 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
5900 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
5901 struct x86_exception
*exception
)
5905 BUG_ON(!mmu_is_nested(vcpu
));
5907 /* NPT walks are always user-walks */
5908 access
|= PFERR_USER_MASK
;
5909 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
5914 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
5915 struct x86_exception
*exception
)
5917 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5918 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5921 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
5922 struct x86_exception
*exception
)
5924 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5925 access
|= PFERR_FETCH_MASK
;
5926 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5929 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
5930 struct x86_exception
*exception
)
5932 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5933 access
|= PFERR_WRITE_MASK
;
5934 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5937 /* uses this to access any guest's mapped memory without checking CPL */
5938 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
5939 struct x86_exception
*exception
)
5941 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
5944 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
5945 struct kvm_vcpu
*vcpu
, u32 access
,
5946 struct x86_exception
*exception
)
5949 int r
= X86EMUL_CONTINUE
;
5952 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
5954 unsigned offset
= addr
& (PAGE_SIZE
-1);
5955 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
5958 if (gpa
== UNMAPPED_GVA
)
5959 return X86EMUL_PROPAGATE_FAULT
;
5960 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
5963 r
= X86EMUL_IO_NEEDED
;
5975 /* used for instruction fetching */
5976 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
5977 gva_t addr
, void *val
, unsigned int bytes
,
5978 struct x86_exception
*exception
)
5980 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5981 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5985 /* Inline kvm_read_guest_virt_helper for speed. */
5986 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
5988 if (unlikely(gpa
== UNMAPPED_GVA
))
5989 return X86EMUL_PROPAGATE_FAULT
;
5991 offset
= addr
& (PAGE_SIZE
-1);
5992 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
5993 bytes
= (unsigned)PAGE_SIZE
- offset
;
5994 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
5996 if (unlikely(ret
< 0))
5997 return X86EMUL_IO_NEEDED
;
5999 return X86EMUL_CONTINUE
;
6002 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
6003 gva_t addr
, void *val
, unsigned int bytes
,
6004 struct x86_exception
*exception
)
6006 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6009 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6010 * is returned, but our callers are not ready for that and they blindly
6011 * call kvm_inject_page_fault. Ensure that they at least do not leak
6012 * uninitialized kernel stack memory into cr2 and error code.
6014 memset(exception
, 0, sizeof(*exception
));
6015 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
6018 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
6020 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
6021 gva_t addr
, void *val
, unsigned int bytes
,
6022 struct x86_exception
*exception
, bool system
)
6024 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6027 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6028 access
|= PFERR_USER_MASK
;
6030 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6033 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6034 unsigned long addr
, void *val
, unsigned int bytes
)
6036 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6037 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6039 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6042 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6043 struct kvm_vcpu
*vcpu
, u32 access
,
6044 struct x86_exception
*exception
)
6047 int r
= X86EMUL_CONTINUE
;
6050 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
6053 unsigned offset
= addr
& (PAGE_SIZE
-1);
6054 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6057 if (gpa
== UNMAPPED_GVA
)
6058 return X86EMUL_PROPAGATE_FAULT
;
6059 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6061 r
= X86EMUL_IO_NEEDED
;
6073 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6074 unsigned int bytes
, struct x86_exception
*exception
,
6077 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6078 u32 access
= PFERR_WRITE_MASK
;
6080 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6081 access
|= PFERR_USER_MASK
;
6083 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6087 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
6088 unsigned int bytes
, struct x86_exception
*exception
)
6090 /* kvm_write_guest_virt_system can pull in tons of pages. */
6091 vcpu
->arch
.l1tf_flush_l1d
= true;
6093 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6094 PFERR_WRITE_MASK
, exception
);
6096 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
6098 int handle_ud(struct kvm_vcpu
*vcpu
)
6100 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
6101 int emul_type
= EMULTYPE_TRAP_UD
;
6102 char sig
[5]; /* ud2; .ascii "kvm" */
6103 struct x86_exception e
;
6105 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, NULL
, 0)))
6108 if (force_emulation_prefix
&&
6109 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
6110 sig
, sizeof(sig
), &e
) == 0 &&
6111 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
6112 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
6113 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
6116 return kvm_emulate_instruction(vcpu
, emul_type
);
6118 EXPORT_SYMBOL_GPL(handle_ud
);
6120 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6121 gpa_t gpa
, bool write
)
6123 /* For APIC access vmexit */
6124 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6127 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
6128 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
6135 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6136 gpa_t
*gpa
, struct x86_exception
*exception
,
6139 u32 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
6140 | (write
? PFERR_WRITE_MASK
: 0);
6143 * currently PKRU is only applied to ept enabled guest so
6144 * there is no pkey in EPT page table for L1 guest or EPT
6145 * shadow page table for L2 guest.
6147 if (vcpu_match_mmio_gva(vcpu
, gva
)
6148 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
6149 vcpu
->arch
.mmio_access
, 0, access
)) {
6150 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
6151 (gva
& (PAGE_SIZE
- 1));
6152 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
6156 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6158 if (*gpa
== UNMAPPED_GVA
)
6161 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
6164 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6165 const void *val
, int bytes
)
6169 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
6172 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
6176 struct read_write_emulator_ops
{
6177 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
6179 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6180 void *val
, int bytes
);
6181 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6182 int bytes
, void *val
);
6183 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6184 void *val
, int bytes
);
6188 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
6190 if (vcpu
->mmio_read_completed
) {
6191 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
6192 vcpu
->mmio_fragments
[0].gpa
, val
);
6193 vcpu
->mmio_read_completed
= 0;
6200 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6201 void *val
, int bytes
)
6203 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
6206 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6207 void *val
, int bytes
)
6209 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
6212 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
6214 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
6215 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
6218 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6219 void *val
, int bytes
)
6221 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
6222 return X86EMUL_IO_NEEDED
;
6225 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6226 void *val
, int bytes
)
6228 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
6230 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6231 return X86EMUL_CONTINUE
;
6234 static const struct read_write_emulator_ops read_emultor
= {
6235 .read_write_prepare
= read_prepare
,
6236 .read_write_emulate
= read_emulate
,
6237 .read_write_mmio
= vcpu_mmio_read
,
6238 .read_write_exit_mmio
= read_exit_mmio
,
6241 static const struct read_write_emulator_ops write_emultor
= {
6242 .read_write_emulate
= write_emulate
,
6243 .read_write_mmio
= write_mmio
,
6244 .read_write_exit_mmio
= write_exit_mmio
,
6248 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
6250 struct x86_exception
*exception
,
6251 struct kvm_vcpu
*vcpu
,
6252 const struct read_write_emulator_ops
*ops
)
6256 bool write
= ops
->write
;
6257 struct kvm_mmio_fragment
*frag
;
6258 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6261 * If the exit was due to a NPF we may already have a GPA.
6262 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6263 * Note, this cannot be used on string operations since string
6264 * operation using rep will only have the initial GPA from the NPF
6267 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
6268 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
6269 gpa
= ctxt
->gpa_val
;
6270 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
6272 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
6274 return X86EMUL_PROPAGATE_FAULT
;
6277 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
6278 return X86EMUL_CONTINUE
;
6281 * Is this MMIO handled locally?
6283 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
6284 if (handled
== bytes
)
6285 return X86EMUL_CONTINUE
;
6291 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
6292 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
6296 return X86EMUL_CONTINUE
;
6299 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
6301 void *val
, unsigned int bytes
,
6302 struct x86_exception
*exception
,
6303 const struct read_write_emulator_ops
*ops
)
6305 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6309 if (ops
->read_write_prepare
&&
6310 ops
->read_write_prepare(vcpu
, val
, bytes
))
6311 return X86EMUL_CONTINUE
;
6313 vcpu
->mmio_nr_fragments
= 0;
6315 /* Crossing a page boundary? */
6316 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
6319 now
= -addr
& ~PAGE_MASK
;
6320 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
6323 if (rc
!= X86EMUL_CONTINUE
)
6326 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
6332 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
6334 if (rc
!= X86EMUL_CONTINUE
)
6337 if (!vcpu
->mmio_nr_fragments
)
6340 gpa
= vcpu
->mmio_fragments
[0].gpa
;
6342 vcpu
->mmio_needed
= 1;
6343 vcpu
->mmio_cur_fragment
= 0;
6345 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
6346 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
6347 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
6348 vcpu
->run
->mmio
.phys_addr
= gpa
;
6350 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
6353 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
6357 struct x86_exception
*exception
)
6359 return emulator_read_write(ctxt
, addr
, val
, bytes
,
6360 exception
, &read_emultor
);
6363 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
6367 struct x86_exception
*exception
)
6369 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
6370 exception
, &write_emultor
);
6373 #define CMPXCHG_TYPE(t, ptr, old, new) \
6374 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6376 #ifdef CONFIG_X86_64
6377 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6379 # define CMPXCHG64(ptr, old, new) \
6380 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6383 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
6388 struct x86_exception
*exception
)
6390 struct kvm_host_map map
;
6391 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6397 /* guests cmpxchg8b have to be emulated atomically */
6398 if (bytes
> 8 || (bytes
& (bytes
- 1)))
6401 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
6403 if (gpa
== UNMAPPED_GVA
||
6404 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6408 * Emulate the atomic as a straight write to avoid #AC if SLD is
6409 * enabled in the host and the access splits a cache line.
6411 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
6412 page_line_mask
= ~(cache_line_size() - 1);
6414 page_line_mask
= PAGE_MASK
;
6416 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
6419 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
6422 kaddr
= map
.hva
+ offset_in_page(gpa
);
6426 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
6429 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
6432 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
6435 exchanged
= CMPXCHG64(kaddr
, old
, new);
6441 kvm_vcpu_unmap(vcpu
, &map
, true);
6444 return X86EMUL_CMPXCHG_FAILED
;
6446 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
6448 return X86EMUL_CONTINUE
;
6451 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
6453 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
6456 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
6460 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
6461 if (vcpu
->arch
.pio
.in
)
6462 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
6463 vcpu
->arch
.pio
.size
, pd
);
6465 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
6466 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
6470 pd
+= vcpu
->arch
.pio
.size
;
6475 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
6476 unsigned short port
, void *val
,
6477 unsigned int count
, bool in
)
6479 vcpu
->arch
.pio
.port
= port
;
6480 vcpu
->arch
.pio
.in
= in
;
6481 vcpu
->arch
.pio
.count
= count
;
6482 vcpu
->arch
.pio
.size
= size
;
6484 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
6485 vcpu
->arch
.pio
.count
= 0;
6489 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
6490 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
6491 vcpu
->run
->io
.size
= size
;
6492 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
6493 vcpu
->run
->io
.count
= count
;
6494 vcpu
->run
->io
.port
= port
;
6499 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6500 unsigned short port
, void *val
, unsigned int count
)
6504 if (vcpu
->arch
.pio
.count
)
6507 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
6509 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
6512 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
6513 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
6514 vcpu
->arch
.pio
.count
= 0;
6521 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
6522 int size
, unsigned short port
, void *val
,
6525 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6529 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
6530 unsigned short port
, const void *val
,
6533 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
6534 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
6535 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
6538 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
6539 int size
, unsigned short port
,
6540 const void *val
, unsigned int count
)
6542 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6545 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
6547 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
6550 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
6552 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
6555 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
6557 if (!need_emulate_wbinvd(vcpu
))
6558 return X86EMUL_CONTINUE
;
6560 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
6561 int cpu
= get_cpu();
6563 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
6564 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
6565 wbinvd_ipi
, NULL
, 1);
6567 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
6570 return X86EMUL_CONTINUE
;
6573 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
6575 kvm_emulate_wbinvd_noskip(vcpu
);
6576 return kvm_skip_emulated_instruction(vcpu
);
6578 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
6582 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
6584 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
6587 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6588 unsigned long *dest
)
6590 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
6593 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6594 unsigned long value
)
6597 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
6600 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
6602 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
6605 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
6607 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6608 unsigned long value
;
6612 value
= kvm_read_cr0(vcpu
);
6615 value
= vcpu
->arch
.cr2
;
6618 value
= kvm_read_cr3(vcpu
);
6621 value
= kvm_read_cr4(vcpu
);
6624 value
= kvm_get_cr8(vcpu
);
6627 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
6634 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
6636 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6641 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
6644 vcpu
->arch
.cr2
= val
;
6647 res
= kvm_set_cr3(vcpu
, val
);
6650 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
6653 res
= kvm_set_cr8(vcpu
, val
);
6656 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
6663 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
6665 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
6668 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6670 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
6673 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6675 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
6678 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6680 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
6683 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6685 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
6688 static unsigned long emulator_get_cached_segment_base(
6689 struct x86_emulate_ctxt
*ctxt
, int seg
)
6691 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
6694 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
6695 struct desc_struct
*desc
, u32
*base3
,
6698 struct kvm_segment var
;
6700 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
6701 *selector
= var
.selector
;
6704 memset(desc
, 0, sizeof(*desc
));
6712 set_desc_limit(desc
, var
.limit
);
6713 set_desc_base(desc
, (unsigned long)var
.base
);
6714 #ifdef CONFIG_X86_64
6716 *base3
= var
.base
>> 32;
6718 desc
->type
= var
.type
;
6720 desc
->dpl
= var
.dpl
;
6721 desc
->p
= var
.present
;
6722 desc
->avl
= var
.avl
;
6730 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
6731 struct desc_struct
*desc
, u32 base3
,
6734 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6735 struct kvm_segment var
;
6737 var
.selector
= selector
;
6738 var
.base
= get_desc_base(desc
);
6739 #ifdef CONFIG_X86_64
6740 var
.base
|= ((u64
)base3
) << 32;
6742 var
.limit
= get_desc_limit(desc
);
6744 var
.limit
= (var
.limit
<< 12) | 0xfff;
6745 var
.type
= desc
->type
;
6746 var
.dpl
= desc
->dpl
;
6751 var
.avl
= desc
->avl
;
6752 var
.present
= desc
->p
;
6753 var
.unusable
= !var
.present
;
6756 kvm_set_segment(vcpu
, &var
, seg
);
6760 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
6761 u32 msr_index
, u64
*pdata
)
6763 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6766 r
= kvm_get_msr(vcpu
, msr_index
, pdata
);
6768 if (r
&& kvm_get_msr_user_space(vcpu
, msr_index
, r
)) {
6769 /* Bounce to user space */
6770 return X86EMUL_IO_NEEDED
;
6776 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
6777 u32 msr_index
, u64 data
)
6779 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6782 r
= kvm_set_msr(vcpu
, msr_index
, data
);
6784 if (r
&& kvm_set_msr_user_space(vcpu
, msr_index
, data
, r
)) {
6785 /* Bounce to user space */
6786 return X86EMUL_IO_NEEDED
;
6792 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
6794 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6796 return vcpu
->arch
.smbase
;
6799 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
6801 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6803 vcpu
->arch
.smbase
= smbase
;
6806 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
6809 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
6812 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
6813 u32 pmc
, u64
*pdata
)
6815 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
6818 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
6820 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
6823 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
6824 struct x86_instruction_info
*info
,
6825 enum x86_intercept_stage stage
)
6827 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
6831 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
6832 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
6835 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
6838 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
6840 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
6843 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
6845 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
6848 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
6850 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
6853 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
6855 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
6858 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
6860 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
6863 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
6865 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
6868 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
6870 return emul_to_vcpu(ctxt
)->arch
.hflags
;
6873 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
6875 emul_to_vcpu(ctxt
)->arch
.hflags
= emul_flags
;
6878 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
,
6879 const char *smstate
)
6881 return static_call(kvm_x86_pre_leave_smm
)(emul_to_vcpu(ctxt
), smstate
);
6884 static void emulator_post_leave_smm(struct x86_emulate_ctxt
*ctxt
)
6886 kvm_smm_changed(emul_to_vcpu(ctxt
));
6889 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
6891 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
6894 static const struct x86_emulate_ops emulate_ops
= {
6895 .read_gpr
= emulator_read_gpr
,
6896 .write_gpr
= emulator_write_gpr
,
6897 .read_std
= emulator_read_std
,
6898 .write_std
= emulator_write_std
,
6899 .read_phys
= kvm_read_guest_phys_system
,
6900 .fetch
= kvm_fetch_guest_virt
,
6901 .read_emulated
= emulator_read_emulated
,
6902 .write_emulated
= emulator_write_emulated
,
6903 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
6904 .invlpg
= emulator_invlpg
,
6905 .pio_in_emulated
= emulator_pio_in_emulated
,
6906 .pio_out_emulated
= emulator_pio_out_emulated
,
6907 .get_segment
= emulator_get_segment
,
6908 .set_segment
= emulator_set_segment
,
6909 .get_cached_segment_base
= emulator_get_cached_segment_base
,
6910 .get_gdt
= emulator_get_gdt
,
6911 .get_idt
= emulator_get_idt
,
6912 .set_gdt
= emulator_set_gdt
,
6913 .set_idt
= emulator_set_idt
,
6914 .get_cr
= emulator_get_cr
,
6915 .set_cr
= emulator_set_cr
,
6916 .cpl
= emulator_get_cpl
,
6917 .get_dr
= emulator_get_dr
,
6918 .set_dr
= emulator_set_dr
,
6919 .get_smbase
= emulator_get_smbase
,
6920 .set_smbase
= emulator_set_smbase
,
6921 .set_msr
= emulator_set_msr
,
6922 .get_msr
= emulator_get_msr
,
6923 .check_pmc
= emulator_check_pmc
,
6924 .read_pmc
= emulator_read_pmc
,
6925 .halt
= emulator_halt
,
6926 .wbinvd
= emulator_wbinvd
,
6927 .fix_hypercall
= emulator_fix_hypercall
,
6928 .intercept
= emulator_intercept
,
6929 .get_cpuid
= emulator_get_cpuid
,
6930 .guest_has_long_mode
= emulator_guest_has_long_mode
,
6931 .guest_has_movbe
= emulator_guest_has_movbe
,
6932 .guest_has_fxsr
= emulator_guest_has_fxsr
,
6933 .set_nmi_mask
= emulator_set_nmi_mask
,
6934 .get_hflags
= emulator_get_hflags
,
6935 .set_hflags
= emulator_set_hflags
,
6936 .pre_leave_smm
= emulator_pre_leave_smm
,
6937 .post_leave_smm
= emulator_post_leave_smm
,
6938 .set_xcr
= emulator_set_xcr
,
6941 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
6943 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
6945 * an sti; sti; sequence only disable interrupts for the first
6946 * instruction. So, if the last instruction, be it emulated or
6947 * not, left the system with the INT_STI flag enabled, it
6948 * means that the last instruction is an sti. We should not
6949 * leave the flag on in this case. The same goes for mov ss
6951 if (int_shadow
& mask
)
6953 if (unlikely(int_shadow
|| mask
)) {
6954 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
6956 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6960 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
6962 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6963 if (ctxt
->exception
.vector
== PF_VECTOR
)
6964 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
6966 if (ctxt
->exception
.error_code_valid
)
6967 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
6968 ctxt
->exception
.error_code
);
6970 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
6974 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
6976 struct x86_emulate_ctxt
*ctxt
;
6978 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
6980 pr_err("kvm: failed to allocate vcpu's emulator\n");
6985 ctxt
->ops
= &emulate_ops
;
6986 vcpu
->arch
.emulate_ctxt
= ctxt
;
6991 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
6993 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6996 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
6998 ctxt
->gpa_available
= false;
6999 ctxt
->eflags
= kvm_get_rflags(vcpu
);
7000 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
7002 ctxt
->eip
= kvm_rip_read(vcpu
);
7003 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
7004 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
7005 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
7006 cs_db
? X86EMUL_MODE_PROT32
:
7007 X86EMUL_MODE_PROT16
;
7008 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
7009 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
7010 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
7012 init_decode_cache(ctxt
);
7013 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7016 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
7018 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7021 init_emulate_ctxt(vcpu
);
7025 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
7026 ret
= emulate_int_real(ctxt
, irq
);
7028 if (ret
!= X86EMUL_CONTINUE
) {
7029 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
7031 ctxt
->eip
= ctxt
->_eip
;
7032 kvm_rip_write(vcpu
, ctxt
->eip
);
7033 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7036 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
7038 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
7040 ++vcpu
->stat
.insn_emulation_fail
;
7041 trace_kvm_emulate_insn_failed(vcpu
);
7043 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
7044 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7048 if (emulation_type
& EMULTYPE_SKIP
) {
7049 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7050 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7051 vcpu
->run
->internal
.ndata
= 0;
7055 kvm_queue_exception(vcpu
, UD_VECTOR
);
7057 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
7058 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7059 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7060 vcpu
->run
->internal
.ndata
= 0;
7067 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7068 bool write_fault_to_shadow_pgtable
,
7071 gpa_t gpa
= cr2_or_gpa
;
7074 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7077 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7078 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7081 if (!vcpu
->arch
.mmu
->direct_map
) {
7083 * Write permission should be allowed since only
7084 * write access need to be emulated.
7086 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7089 * If the mapping is invalid in guest, let cpu retry
7090 * it to generate fault.
7092 if (gpa
== UNMAPPED_GVA
)
7097 * Do not retry the unhandleable instruction if it faults on the
7098 * readonly host memory, otherwise it will goto a infinite loop:
7099 * retry instruction -> write #PF -> emulation fail -> retry
7100 * instruction -> ...
7102 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
7105 * If the instruction failed on the error pfn, it can not be fixed,
7106 * report the error to userspace.
7108 if (is_error_noslot_pfn(pfn
))
7111 kvm_release_pfn_clean(pfn
);
7113 /* The instructions are well-emulated on direct mmu. */
7114 if (vcpu
->arch
.mmu
->direct_map
) {
7115 unsigned int indirect_shadow_pages
;
7117 spin_lock(&vcpu
->kvm
->mmu_lock
);
7118 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
7119 spin_unlock(&vcpu
->kvm
->mmu_lock
);
7121 if (indirect_shadow_pages
)
7122 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7128 * if emulation was due to access to shadowed page table
7129 * and it failed try to unshadow page and re-enter the
7130 * guest to let CPU execute the instruction.
7132 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7135 * If the access faults on its page table, it can not
7136 * be fixed by unprotecting shadow page and it should
7137 * be reported to userspace.
7139 return !write_fault_to_shadow_pgtable
;
7142 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
7143 gpa_t cr2_or_gpa
, int emulation_type
)
7145 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7146 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
7148 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
7149 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
7152 * If the emulation is caused by #PF and it is non-page_table
7153 * writing instruction, it means the VM-EXIT is caused by shadow
7154 * page protected, we can zap the shadow page and retry this
7155 * instruction directly.
7157 * Note: if the guest uses a non-page-table modifying instruction
7158 * on the PDE that points to the instruction, then we will unmap
7159 * the instruction and go to an infinite loop. So, we cache the
7160 * last retried eip and the last fault address, if we meet the eip
7161 * and the address again, we can break out of the potential infinite
7164 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
7166 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7169 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7170 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7173 if (x86_page_table_writing_insn(ctxt
))
7176 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
7179 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
7180 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
7182 if (!vcpu
->arch
.mmu
->direct_map
)
7183 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7185 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7190 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
7191 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
7193 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
7195 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
7196 /* This is a good place to trace that we are exiting SMM. */
7197 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
7199 /* Process a latched INIT or SMI, if any. */
7200 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7203 kvm_mmu_reset_context(vcpu
);
7206 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
7215 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
7216 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
7221 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
7223 struct kvm_run
*kvm_run
= vcpu
->run
;
7225 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
7226 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
7227 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
7228 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7229 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7232 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
7236 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
7238 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7241 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
7246 * rflags is the old, "raw" value of the flags. The new value has
7247 * not been saved yet.
7249 * This is correct even for TF set by the guest, because "the
7250 * processor will not generate this exception after the instruction
7251 * that sets the TF flag".
7253 if (unlikely(rflags
& X86_EFLAGS_TF
))
7254 r
= kvm_vcpu_do_singlestep(vcpu
);
7257 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
7259 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
7261 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
7262 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
7263 struct kvm_run
*kvm_run
= vcpu
->run
;
7264 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7265 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7266 vcpu
->arch
.guest_debug_dr7
,
7270 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
7271 kvm_run
->debug
.arch
.pc
= eip
;
7272 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7273 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7279 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
7280 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
7281 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7282 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7287 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
7296 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
7298 switch (ctxt
->opcode_len
) {
7305 case 0xe6: /* OUT */
7309 case 0x6c: /* INS */
7311 case 0x6e: /* OUTS */
7318 case 0x33: /* RDPMC */
7328 * Decode to be emulated instruction. Return EMULATION_OK if success.
7330 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
7331 void *insn
, int insn_len
)
7333 int r
= EMULATION_OK
;
7334 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7336 init_emulate_ctxt(vcpu
);
7339 * We will reenter on the same instruction since we do not set
7340 * complete_userspace_io. This does not handle watchpoints yet,
7341 * those would be handled in the emulate_ops.
7343 if (!(emulation_type
& EMULTYPE_SKIP
) &&
7344 kvm_vcpu_check_breakpoint(vcpu
, &r
))
7347 ctxt
->interruptibility
= 0;
7348 ctxt
->have_exception
= false;
7349 ctxt
->exception
.vector
= -1;
7350 ctxt
->perm_ok
= false;
7352 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
7354 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
7356 trace_kvm_emulate_insn_start(vcpu
);
7357 ++vcpu
->stat
.insn_emulation
;
7361 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
7363 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7364 int emulation_type
, void *insn
, int insn_len
)
7367 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7368 bool writeback
= true;
7369 bool write_fault_to_spt
;
7371 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, insn
, insn_len
)))
7374 vcpu
->arch
.l1tf_flush_l1d
= true;
7377 * Clear write_fault_to_shadow_pgtable here to ensure it is
7380 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
7381 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
7383 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
7384 kvm_clear_exception_queue(vcpu
);
7386 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
7388 if (r
!= EMULATION_OK
) {
7389 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
7390 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
7391 kvm_queue_exception(vcpu
, UD_VECTOR
);
7394 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
7398 if (ctxt
->have_exception
) {
7400 * #UD should result in just EMULATION_FAILED, and trap-like
7401 * exception should not be encountered during decode.
7403 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
7404 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
7405 inject_emulated_exception(vcpu
);
7408 return handle_emulation_failure(vcpu
, emulation_type
);
7412 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
7413 !is_vmware_backdoor_opcode(ctxt
)) {
7414 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7419 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7420 * for kvm_skip_emulated_instruction(). The caller is responsible for
7421 * updating interruptibility state and injecting single-step #DBs.
7423 if (emulation_type
& EMULTYPE_SKIP
) {
7424 kvm_rip_write(vcpu
, ctxt
->_eip
);
7425 if (ctxt
->eflags
& X86_EFLAGS_RF
)
7426 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
7430 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
7433 /* this is needed for vmware backdoor interface to work since it
7434 changes registers values during IO operation */
7435 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
7436 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7437 emulator_invalidate_register_cache(ctxt
);
7441 if (emulation_type
& EMULTYPE_PF
) {
7442 /* Save the faulting GPA (cr2) in the address field */
7443 ctxt
->exception
.address
= cr2_or_gpa
;
7445 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7446 if (vcpu
->arch
.mmu
->direct_map
) {
7447 ctxt
->gpa_available
= true;
7448 ctxt
->gpa_val
= cr2_or_gpa
;
7451 /* Sanitize the address out of an abundance of paranoia. */
7452 ctxt
->exception
.address
= 0;
7455 r
= x86_emulate_insn(ctxt
);
7457 if (r
== EMULATION_INTERCEPTED
)
7460 if (r
== EMULATION_FAILED
) {
7461 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
7465 return handle_emulation_failure(vcpu
, emulation_type
);
7468 if (ctxt
->have_exception
) {
7470 if (inject_emulated_exception(vcpu
))
7472 } else if (vcpu
->arch
.pio
.count
) {
7473 if (!vcpu
->arch
.pio
.in
) {
7474 /* FIXME: return into emulator if single-stepping. */
7475 vcpu
->arch
.pio
.count
= 0;
7478 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
7481 } else if (vcpu
->mmio_needed
) {
7482 ++vcpu
->stat
.mmio_exits
;
7484 if (!vcpu
->mmio_is_write
)
7487 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7488 } else if (r
== EMULATION_RESTART
)
7494 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7495 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
7496 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7497 if (!ctxt
->have_exception
||
7498 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
7499 kvm_rip_write(vcpu
, ctxt
->eip
);
7500 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
7501 r
= kvm_vcpu_do_singlestep(vcpu
);
7502 if (kvm_x86_ops
.update_emulated_instruction
)
7503 static_call(kvm_x86_update_emulated_instruction
)(vcpu
);
7504 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
7508 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7509 * do nothing, and it will be requested again as soon as
7510 * the shadow expires. But we still need to check here,
7511 * because POPF has no interrupt shadow.
7513 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
7514 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7516 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
7521 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
7523 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
7525 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
7527 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
7528 void *insn
, int insn_len
)
7530 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
7532 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
7534 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
7536 vcpu
->arch
.pio
.count
= 0;
7540 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
7542 vcpu
->arch
.pio
.count
= 0;
7544 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
7547 return kvm_skip_emulated_instruction(vcpu
);
7550 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7551 unsigned short port
)
7553 unsigned long val
= kvm_rax_read(vcpu
);
7554 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
7560 * Workaround userspace that relies on old KVM behavior of %rip being
7561 * incremented prior to exiting to userspace to handle "OUT 0x7e".
7564 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
7565 vcpu
->arch
.complete_userspace_io
=
7566 complete_fast_pio_out_port_0x7e
;
7567 kvm_skip_emulated_instruction(vcpu
);
7569 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
7570 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
7575 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
7579 /* We should only ever be called with arch.pio.count equal to 1 */
7580 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
7582 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
7583 vcpu
->arch
.pio
.count
= 0;
7587 /* For size less than 4 we merge, else we zero extend */
7588 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
7591 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7592 * the copy and tracing
7594 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
7595 kvm_rax_write(vcpu
, val
);
7597 return kvm_skip_emulated_instruction(vcpu
);
7600 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7601 unsigned short port
)
7606 /* For size less than 4 we merge, else we zero extend */
7607 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
7609 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
7611 kvm_rax_write(vcpu
, val
);
7615 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
7616 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
7621 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
7626 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
7628 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
7629 return ret
&& kvm_skip_emulated_instruction(vcpu
);
7631 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
7633 static int kvmclock_cpu_down_prep(unsigned int cpu
)
7635 __this_cpu_write(cpu_tsc_khz
, 0);
7639 static void tsc_khz_changed(void *data
)
7641 struct cpufreq_freqs
*freq
= data
;
7642 unsigned long khz
= 0;
7646 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
7647 khz
= cpufreq_quick_get(raw_smp_processor_id());
7650 __this_cpu_write(cpu_tsc_khz
, khz
);
7653 #ifdef CONFIG_X86_64
7654 static void kvm_hyperv_tsc_notifier(void)
7657 struct kvm_vcpu
*vcpu
;
7660 mutex_lock(&kvm_lock
);
7661 list_for_each_entry(kvm
, &vm_list
, vm_list
)
7662 kvm_make_mclock_inprogress_request(kvm
);
7664 hyperv_stop_tsc_emulation();
7666 /* TSC frequency always matches when on Hyper-V */
7667 for_each_present_cpu(cpu
)
7668 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
7669 kvm_max_guest_tsc_khz
= tsc_khz
;
7671 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7672 struct kvm_arch
*ka
= &kvm
->arch
;
7674 spin_lock(&ka
->pvclock_gtod_sync_lock
);
7676 pvclock_update_vm_gtod_copy(kvm
);
7678 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
7679 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7681 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
7682 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
7684 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
7686 mutex_unlock(&kvm_lock
);
7690 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
7693 struct kvm_vcpu
*vcpu
;
7694 int i
, send_ipi
= 0;
7697 * We allow guests to temporarily run on slowing clocks,
7698 * provided we notify them after, or to run on accelerating
7699 * clocks, provided we notify them before. Thus time never
7702 * However, we have a problem. We can't atomically update
7703 * the frequency of a given CPU from this function; it is
7704 * merely a notifier, which can be called from any CPU.
7705 * Changing the TSC frequency at arbitrary points in time
7706 * requires a recomputation of local variables related to
7707 * the TSC for each VCPU. We must flag these local variables
7708 * to be updated and be sure the update takes place with the
7709 * new frequency before any guests proceed.
7711 * Unfortunately, the combination of hotplug CPU and frequency
7712 * change creates an intractable locking scenario; the order
7713 * of when these callouts happen is undefined with respect to
7714 * CPU hotplug, and they can race with each other. As such,
7715 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7716 * undefined; you can actually have a CPU frequency change take
7717 * place in between the computation of X and the setting of the
7718 * variable. To protect against this problem, all updates of
7719 * the per_cpu tsc_khz variable are done in an interrupt
7720 * protected IPI, and all callers wishing to update the value
7721 * must wait for a synchronous IPI to complete (which is trivial
7722 * if the caller is on the CPU already). This establishes the
7723 * necessary total order on variable updates.
7725 * Note that because a guest time update may take place
7726 * anytime after the setting of the VCPU's request bit, the
7727 * correct TSC value must be set before the request. However,
7728 * to ensure the update actually makes it to any guest which
7729 * starts running in hardware virtualization between the set
7730 * and the acquisition of the spinlock, we must also ping the
7731 * CPU after setting the request bit.
7735 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
7737 mutex_lock(&kvm_lock
);
7738 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7739 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7740 if (vcpu
->cpu
!= cpu
)
7742 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7743 if (vcpu
->cpu
!= raw_smp_processor_id())
7747 mutex_unlock(&kvm_lock
);
7749 if (freq
->old
< freq
->new && send_ipi
) {
7751 * We upscale the frequency. Must make the guest
7752 * doesn't see old kvmclock values while running with
7753 * the new frequency, otherwise we risk the guest sees
7754 * time go backwards.
7756 * In case we update the frequency for another cpu
7757 * (which might be in guest context) send an interrupt
7758 * to kick the cpu out of guest context. Next time
7759 * guest context is entered kvmclock will be updated,
7760 * so the guest will not see stale values.
7762 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
7766 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
7769 struct cpufreq_freqs
*freq
= data
;
7772 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
7774 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
7777 for_each_cpu(cpu
, freq
->policy
->cpus
)
7778 __kvmclock_cpufreq_notifier(freq
, cpu
);
7783 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
7784 .notifier_call
= kvmclock_cpufreq_notifier
7787 static int kvmclock_cpu_online(unsigned int cpu
)
7789 tsc_khz_changed(NULL
);
7793 static void kvm_timer_init(void)
7795 max_tsc_khz
= tsc_khz
;
7797 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
7798 #ifdef CONFIG_CPU_FREQ
7799 struct cpufreq_policy
*policy
;
7803 policy
= cpufreq_cpu_get(cpu
);
7805 if (policy
->cpuinfo
.max_freq
)
7806 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
7807 cpufreq_cpu_put(policy
);
7811 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
7812 CPUFREQ_TRANSITION_NOTIFIER
);
7815 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
7816 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
7819 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
7820 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
7822 int kvm_is_in_guest(void)
7824 return __this_cpu_read(current_vcpu
) != NULL
;
7827 static int kvm_is_user_mode(void)
7831 if (__this_cpu_read(current_vcpu
))
7832 user_mode
= static_call(kvm_x86_get_cpl
)(__this_cpu_read(current_vcpu
));
7834 return user_mode
!= 0;
7837 static unsigned long kvm_get_guest_ip(void)
7839 unsigned long ip
= 0;
7841 if (__this_cpu_read(current_vcpu
))
7842 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
7847 static void kvm_handle_intel_pt_intr(void)
7849 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
7851 kvm_make_request(KVM_REQ_PMI
, vcpu
);
7852 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
7853 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
7856 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
7857 .is_in_guest
= kvm_is_in_guest
,
7858 .is_user_mode
= kvm_is_user_mode
,
7859 .get_guest_ip
= kvm_get_guest_ip
,
7860 .handle_intel_pt_intr
= kvm_handle_intel_pt_intr
,
7863 #ifdef CONFIG_X86_64
7864 static void pvclock_gtod_update_fn(struct work_struct
*work
)
7868 struct kvm_vcpu
*vcpu
;
7871 mutex_lock(&kvm_lock
);
7872 list_for_each_entry(kvm
, &vm_list
, vm_list
)
7873 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7874 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7875 atomic_set(&kvm_guest_has_master_clock
, 0);
7876 mutex_unlock(&kvm_lock
);
7879 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
7882 * Notification about pvclock gtod data update.
7884 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
7887 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
7888 struct timekeeper
*tk
= priv
;
7890 update_pvclock_gtod(tk
);
7892 /* disable master clock if host does not trust, or does not
7893 * use, TSC based clocksource.
7895 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
7896 atomic_read(&kvm_guest_has_master_clock
) != 0)
7897 queue_work(system_long_wq
, &pvclock_gtod_work
);
7902 static struct notifier_block pvclock_gtod_notifier
= {
7903 .notifier_call
= pvclock_gtod_notify
,
7907 int kvm_arch_init(void *opaque
)
7909 struct kvm_x86_init_ops
*ops
= opaque
;
7912 if (kvm_x86_ops
.hardware_enable
) {
7913 printk(KERN_ERR
"kvm: already loaded the other module\n");
7918 if (!ops
->cpu_has_kvm_support()) {
7919 pr_err_ratelimited("kvm: no hardware support\n");
7923 if (ops
->disabled_by_bios()) {
7924 pr_err_ratelimited("kvm: disabled by bios\n");
7930 * KVM explicitly assumes that the guest has an FPU and
7931 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7932 * vCPU's FPU state as a fxregs_state struct.
7934 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
7935 printk(KERN_ERR
"kvm: inadequate fpu\n");
7941 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
7942 __alignof__(struct fpu
), SLAB_ACCOUNT
,
7944 if (!x86_fpu_cache
) {
7945 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
7949 x86_emulator_cache
= kvm_alloc_emulator_cache();
7950 if (!x86_emulator_cache
) {
7951 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7952 goto out_free_x86_fpu_cache
;
7955 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
7956 if (!user_return_msrs
) {
7957 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
7958 goto out_free_x86_emulator_cache
;
7961 r
= kvm_mmu_module_init();
7963 goto out_free_percpu
;
7965 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
7966 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
7967 PT_PRESENT_MASK
, 0, sme_me_mask
);
7970 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
7972 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
7973 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
7974 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
7977 if (pi_inject_timer
== -1)
7978 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
7979 #ifdef CONFIG_X86_64
7980 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
7982 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
7983 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
7989 free_percpu(user_return_msrs
);
7990 out_free_x86_emulator_cache
:
7991 kmem_cache_destroy(x86_emulator_cache
);
7992 out_free_x86_fpu_cache
:
7993 kmem_cache_destroy(x86_fpu_cache
);
7998 void kvm_arch_exit(void)
8000 #ifdef CONFIG_X86_64
8001 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8002 clear_hv_tscchange_cb();
8005 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
8007 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8008 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
8009 CPUFREQ_TRANSITION_NOTIFIER
);
8010 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
8011 #ifdef CONFIG_X86_64
8012 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
8014 kvm_x86_ops
.hardware_enable
= NULL
;
8015 kvm_mmu_module_exit();
8016 free_percpu(user_return_msrs
);
8017 kmem_cache_destroy(x86_fpu_cache
);
8020 static int __kvm_vcpu_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
8022 ++vcpu
->stat
.halt_exits
;
8023 if (lapic_in_kernel(vcpu
)) {
8024 vcpu
->arch
.mp_state
= state
;
8027 vcpu
->run
->exit_reason
= reason
;
8032 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
8034 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
8036 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
8038 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
8040 int ret
= kvm_skip_emulated_instruction(vcpu
);
8042 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8043 * KVM_EXIT_DEBUG here.
8045 return kvm_vcpu_halt(vcpu
) && ret
;
8047 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
8049 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
8051 int ret
= kvm_skip_emulated_instruction(vcpu
);
8053 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
, KVM_EXIT_AP_RESET_HOLD
) && ret
;
8055 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
8057 #ifdef CONFIG_X86_64
8058 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
8059 unsigned long clock_type
)
8061 struct kvm_clock_pairing clock_pairing
;
8062 struct timespec64 ts
;
8066 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
8067 return -KVM_EOPNOTSUPP
;
8069 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
8070 return -KVM_EOPNOTSUPP
;
8072 clock_pairing
.sec
= ts
.tv_sec
;
8073 clock_pairing
.nsec
= ts
.tv_nsec
;
8074 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
8075 clock_pairing
.flags
= 0;
8076 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
8079 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
8080 sizeof(struct kvm_clock_pairing
)))
8088 * kvm_pv_kick_cpu_op: Kick a vcpu.
8090 * @apicid - apicid of vcpu to be kicked.
8092 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
8094 struct kvm_lapic_irq lapic_irq
;
8096 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
8097 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
8098 lapic_irq
.level
= 0;
8099 lapic_irq
.dest_id
= apicid
;
8100 lapic_irq
.msi_redir_hint
= false;
8102 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
8103 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
8106 bool kvm_apicv_activated(struct kvm
*kvm
)
8108 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
8110 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
8112 void kvm_apicv_init(struct kvm
*kvm
, bool enable
)
8115 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
8116 &kvm
->arch
.apicv_inhibit_reasons
);
8118 set_bit(APICV_INHIBIT_REASON_DISABLE
,
8119 &kvm
->arch
.apicv_inhibit_reasons
);
8121 EXPORT_SYMBOL_GPL(kvm_apicv_init
);
8123 static void kvm_sched_yield(struct kvm
*kvm
, unsigned long dest_id
)
8125 struct kvm_vcpu
*target
= NULL
;
8126 struct kvm_apic_map
*map
;
8129 map
= rcu_dereference(kvm
->arch
.apic_map
);
8131 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
8132 target
= map
->phys_map
[dest_id
]->vcpu
;
8136 if (target
&& READ_ONCE(target
->ready
))
8137 kvm_vcpu_yield_to(target
);
8140 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
8142 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
8145 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
8146 return kvm_hv_hypercall(vcpu
);
8148 nr
= kvm_rax_read(vcpu
);
8149 a0
= kvm_rbx_read(vcpu
);
8150 a1
= kvm_rcx_read(vcpu
);
8151 a2
= kvm_rdx_read(vcpu
);
8152 a3
= kvm_rsi_read(vcpu
);
8154 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
8156 op_64_bit
= is_64_bit_mode(vcpu
);
8165 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
8173 case KVM_HC_VAPIC_POLL_IRQ
:
8176 case KVM_HC_KICK_CPU
:
8177 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
8180 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
8181 kvm_sched_yield(vcpu
->kvm
, a1
);
8184 #ifdef CONFIG_X86_64
8185 case KVM_HC_CLOCK_PAIRING
:
8186 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
8189 case KVM_HC_SEND_IPI
:
8190 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
8193 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
8195 case KVM_HC_SCHED_YIELD
:
8196 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
8199 kvm_sched_yield(vcpu
->kvm
, a0
);
8209 kvm_rax_write(vcpu
, ret
);
8211 ++vcpu
->stat
.hypercalls
;
8212 return kvm_skip_emulated_instruction(vcpu
);
8214 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
8216 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
8218 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8219 char instruction
[3];
8220 unsigned long rip
= kvm_rip_read(vcpu
);
8222 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
8224 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
8228 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
8230 return vcpu
->run
->request_interrupt_window
&&
8231 likely(!pic_in_kernel(vcpu
->kvm
));
8234 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
8236 struct kvm_run
*kvm_run
= vcpu
->run
;
8239 * if_flag is obsolete and useless, so do not bother
8240 * setting it for SEV-ES guests. Userspace can just
8241 * use kvm_run->ready_for_interrupt_injection.
8243 kvm_run
->if_flag
= !vcpu
->arch
.guest_state_protected
8244 && (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
8246 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
8247 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
8248 kvm_run
->ready_for_interrupt_injection
=
8249 pic_in_kernel(vcpu
->kvm
) ||
8250 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
8253 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
8256 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
8260 if (!kvm_x86_ops
.update_cr8_intercept
)
8263 if (!lapic_in_kernel(vcpu
))
8266 if (vcpu
->arch
.apicv_active
)
8269 if (!vcpu
->arch
.apic
->vapic_addr
)
8270 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
8277 tpr
= kvm_lapic_get_cr8(vcpu
);
8279 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
8282 static void inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
8285 bool can_inject
= true;
8287 /* try to reinject previous events if any */
8289 if (vcpu
->arch
.exception
.injected
) {
8290 static_call(kvm_x86_queue_exception
)(vcpu
);
8294 * Do not inject an NMI or interrupt if there is a pending
8295 * exception. Exceptions and interrupts are recognized at
8296 * instruction boundaries, i.e. the start of an instruction.
8297 * Trap-like exceptions, e.g. #DB, have higher priority than
8298 * NMIs and interrupts, i.e. traps are recognized before an
8299 * NMI/interrupt that's pending on the same instruction.
8300 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8301 * priority, but are only generated (pended) during instruction
8302 * execution, i.e. a pending fault-like exception means the
8303 * fault occurred on the *previous* instruction and must be
8304 * serviced prior to recognizing any new events in order to
8305 * fully complete the previous instruction.
8307 else if (!vcpu
->arch
.exception
.pending
) {
8308 if (vcpu
->arch
.nmi_injected
) {
8309 static_call(kvm_x86_set_nmi
)(vcpu
);
8311 } else if (vcpu
->arch
.interrupt
.injected
) {
8312 static_call(kvm_x86_set_irq
)(vcpu
);
8317 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
8318 vcpu
->arch
.exception
.pending
);
8321 * Call check_nested_events() even if we reinjected a previous event
8322 * in order for caller to determine if it should require immediate-exit
8323 * from L2 to L1 due to pending L1 events which require exit
8326 if (is_guest_mode(vcpu
)) {
8327 r
= kvm_x86_ops
.nested_ops
->check_events(vcpu
);
8332 /* try to inject new event if pending */
8333 if (vcpu
->arch
.exception
.pending
) {
8334 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
8335 vcpu
->arch
.exception
.has_error_code
,
8336 vcpu
->arch
.exception
.error_code
);
8338 vcpu
->arch
.exception
.pending
= false;
8339 vcpu
->arch
.exception
.injected
= true;
8341 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
8342 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
8345 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
8346 kvm_deliver_exception_payload(vcpu
);
8347 if (vcpu
->arch
.dr7
& DR7_GD
) {
8348 vcpu
->arch
.dr7
&= ~DR7_GD
;
8349 kvm_update_dr7(vcpu
);
8353 static_call(kvm_x86_queue_exception
)(vcpu
);
8358 * Finally, inject interrupt events. If an event cannot be injected
8359 * due to architectural conditions (e.g. IF=0) a window-open exit
8360 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
8361 * and can architecturally be injected, but we cannot do it right now:
8362 * an interrupt could have arrived just now and we have to inject it
8363 * as a vmexit, or there could already an event in the queue, which is
8364 * indicated by can_inject. In that case we request an immediate exit
8365 * in order to make progress and get back here for another iteration.
8366 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8368 if (vcpu
->arch
.smi_pending
) {
8369 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
8373 vcpu
->arch
.smi_pending
= false;
8374 ++vcpu
->arch
.smi_count
;
8378 static_call(kvm_x86_enable_smi_window
)(vcpu
);
8381 if (vcpu
->arch
.nmi_pending
) {
8382 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
8386 --vcpu
->arch
.nmi_pending
;
8387 vcpu
->arch
.nmi_injected
= true;
8388 static_call(kvm_x86_set_nmi
)(vcpu
);
8390 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
8392 if (vcpu
->arch
.nmi_pending
)
8393 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
8396 if (kvm_cpu_has_injectable_intr(vcpu
)) {
8397 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
8401 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
8402 static_call(kvm_x86_set_irq
)(vcpu
);
8403 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
8405 if (kvm_cpu_has_injectable_intr(vcpu
))
8406 static_call(kvm_x86_enable_irq_window
)(vcpu
);
8409 if (is_guest_mode(vcpu
) &&
8410 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
8411 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
8412 *req_immediate_exit
= true;
8414 WARN_ON(vcpu
->arch
.exception
.pending
);
8418 *req_immediate_exit
= true;
8422 static void process_nmi(struct kvm_vcpu
*vcpu
)
8427 * x86 is limited to one NMI running, and one NMI pending after it.
8428 * If an NMI is already in progress, limit further NMIs to just one.
8429 * Otherwise, allow two (and we'll inject the first one immediately).
8431 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
8434 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
8435 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
8436 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8439 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
8442 flags
|= seg
->g
<< 23;
8443 flags
|= seg
->db
<< 22;
8444 flags
|= seg
->l
<< 21;
8445 flags
|= seg
->avl
<< 20;
8446 flags
|= seg
->present
<< 15;
8447 flags
|= seg
->dpl
<< 13;
8448 flags
|= seg
->s
<< 12;
8449 flags
|= seg
->type
<< 8;
8453 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
8455 struct kvm_segment seg
;
8458 kvm_get_segment(vcpu
, &seg
, n
);
8459 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
8462 offset
= 0x7f84 + n
* 12;
8464 offset
= 0x7f2c + (n
- 3) * 12;
8466 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
8467 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
8468 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
8471 #ifdef CONFIG_X86_64
8472 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
8474 struct kvm_segment seg
;
8478 kvm_get_segment(vcpu
, &seg
, n
);
8479 offset
= 0x7e00 + n
* 16;
8481 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
8482 put_smstate(u16
, buf
, offset
, seg
.selector
);
8483 put_smstate(u16
, buf
, offset
+ 2, flags
);
8484 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
8485 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
8489 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
8492 struct kvm_segment seg
;
8496 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
8497 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
8498 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
8499 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
8501 for (i
= 0; i
< 8; i
++)
8502 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
8504 kvm_get_dr(vcpu
, 6, &val
);
8505 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
8506 kvm_get_dr(vcpu
, 7, &val
);
8507 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
8509 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
8510 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
8511 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
8512 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
8513 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
8515 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
8516 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
8517 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
8518 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
8519 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
8521 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
8522 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
8523 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
8525 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
8526 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
8527 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
8529 for (i
= 0; i
< 6; i
++)
8530 enter_smm_save_seg_32(vcpu
, buf
, i
);
8532 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
8535 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
8536 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
8539 #ifdef CONFIG_X86_64
8540 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
8543 struct kvm_segment seg
;
8547 for (i
= 0; i
< 16; i
++)
8548 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
8550 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
8551 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
8553 kvm_get_dr(vcpu
, 6, &val
);
8554 put_smstate(u64
, buf
, 0x7f68, val
);
8555 kvm_get_dr(vcpu
, 7, &val
);
8556 put_smstate(u64
, buf
, 0x7f60, val
);
8558 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
8559 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
8560 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
8562 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
8565 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
8567 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
8569 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
8570 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
8571 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
8572 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
8573 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
8575 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
8576 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
8577 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
8579 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
8580 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
8581 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
8582 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
8583 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
8585 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
8586 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
8587 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
8589 for (i
= 0; i
< 6; i
++)
8590 enter_smm_save_seg_64(vcpu
, buf
, i
);
8594 static void enter_smm(struct kvm_vcpu
*vcpu
)
8596 struct kvm_segment cs
, ds
;
8601 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
8602 memset(buf
, 0, 512);
8603 #ifdef CONFIG_X86_64
8604 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
8605 enter_smm_save_state_64(vcpu
, buf
);
8608 enter_smm_save_state_32(vcpu
, buf
);
8611 * Give pre_enter_smm() a chance to make ISA-specific changes to the
8612 * vCPU state (e.g. leave guest mode) after we've saved the state into
8613 * the SMM state-save area.
8615 static_call(kvm_x86_pre_enter_smm
)(vcpu
, buf
);
8617 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
8618 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
8620 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
))
8621 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
8623 static_call(kvm_x86_set_nmi_mask
)(vcpu
, true);
8625 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
8626 kvm_rip_write(vcpu
, 0x8000);
8628 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
8629 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
8630 vcpu
->arch
.cr0
= cr0
;
8632 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
8634 /* Undocumented: IDT limit is set to zero on entry to SMM. */
8635 dt
.address
= dt
.size
= 0;
8636 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
8638 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
8640 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
8641 cs
.base
= vcpu
->arch
.smbase
;
8646 cs
.limit
= ds
.limit
= 0xffffffff;
8647 cs
.type
= ds
.type
= 0x3;
8648 cs
.dpl
= ds
.dpl
= 0;
8653 cs
.avl
= ds
.avl
= 0;
8654 cs
.present
= ds
.present
= 1;
8655 cs
.unusable
= ds
.unusable
= 0;
8656 cs
.padding
= ds
.padding
= 0;
8658 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8659 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
8660 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
8661 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
8662 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
8663 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
8665 #ifdef CONFIG_X86_64
8666 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
8667 static_call(kvm_x86_set_efer
)(vcpu
, 0);
8670 kvm_update_cpuid_runtime(vcpu
);
8671 kvm_mmu_reset_context(vcpu
);
8674 static void process_smi(struct kvm_vcpu
*vcpu
)
8676 vcpu
->arch
.smi_pending
= true;
8677 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8680 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
8681 unsigned long *vcpu_bitmap
)
8685 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
8687 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
8688 NULL
, vcpu_bitmap
, cpus
);
8690 free_cpumask_var(cpus
);
8693 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
8695 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
8698 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
8700 if (!lapic_in_kernel(vcpu
))
8703 vcpu
->arch
.apicv_active
= kvm_apicv_activated(vcpu
->kvm
);
8704 kvm_apic_update_apicv(vcpu
);
8705 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
8707 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
8710 * NOTE: Do not hold any lock prior to calling this.
8712 * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8713 * locked, because it calls __x86_set_memory_region() which does
8714 * synchronize_srcu(&kvm->srcu).
8716 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
8718 struct kvm_vcpu
*except
;
8719 unsigned long old
, new, expected
;
8721 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
8722 !static_call(kvm_x86_check_apicv_inhibit_reasons
)(bit
))
8725 old
= READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
);
8727 expected
= new = old
;
8729 __clear_bit(bit
, &new);
8731 __set_bit(bit
, &new);
8734 old
= cmpxchg(&kvm
->arch
.apicv_inhibit_reasons
, expected
, new);
8735 } while (old
!= expected
);
8740 trace_kvm_apicv_update_request(activate
, bit
);
8741 if (kvm_x86_ops
.pre_update_apicv_exec_ctrl
)
8742 static_call(kvm_x86_pre_update_apicv_exec_ctrl
)(kvm
, activate
);
8745 * Sending request to update APICV for all other vcpus,
8746 * while update the calling vcpu immediately instead of
8747 * waiting for another #VMEXIT to handle the request.
8749 except
= kvm_get_running_vcpu();
8750 kvm_make_all_cpus_request_except(kvm
, KVM_REQ_APICV_UPDATE
,
8753 kvm_vcpu_update_apicv(except
);
8755 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
8757 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
8759 if (!kvm_apic_present(vcpu
))
8762 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
8764 if (irqchip_split(vcpu
->kvm
))
8765 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
8767 if (vcpu
->arch
.apicv_active
)
8768 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
8769 if (ioapic_in_kernel(vcpu
->kvm
))
8770 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
8773 if (is_guest_mode(vcpu
))
8774 vcpu
->arch
.load_eoi_exitmap_pending
= true;
8776 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
8779 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
8781 u64 eoi_exit_bitmap
[4];
8783 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
8786 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
8787 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
8788 static_call(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
8791 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
8792 unsigned long start
, unsigned long end
)
8794 unsigned long apic_address
;
8797 * The physical address of apic access page is stored in the VMCS.
8798 * Update it when it becomes invalid.
8800 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
8801 if (start
<= apic_address
&& apic_address
< end
)
8802 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
8805 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
8807 if (!lapic_in_kernel(vcpu
))
8810 if (!kvm_x86_ops
.set_apic_access_page_addr
)
8813 static_call(kvm_x86_set_apic_access_page_addr
)(vcpu
);
8816 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
8818 smp_send_reschedule(vcpu
->cpu
);
8820 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
8823 * Returns 1 to let vcpu_run() continue the guest execution loop without
8824 * exiting to the userspace. Otherwise, the value will be returned to the
8827 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
8831 dm_request_for_irq_injection(vcpu
) &&
8832 kvm_cpu_accept_dm_intr(vcpu
);
8833 fastpath_t exit_fastpath
;
8835 bool req_immediate_exit
= false;
8837 /* Forbid vmenter if vcpu dirty ring is soft-full */
8838 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
8839 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
8840 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
8841 trace_kvm_dirty_ring_exit(vcpu
);
8846 if (kvm_request_pending(vcpu
)) {
8847 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
8848 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
8853 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
8854 kvm_mmu_unload(vcpu
);
8855 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
8856 __kvm_migrate_timers(vcpu
);
8857 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
8858 kvm_gen_update_masterclock(vcpu
->kvm
);
8859 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
8860 kvm_gen_kvmclock_update(vcpu
);
8861 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
8862 r
= kvm_guest_time_update(vcpu
);
8866 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
8867 kvm_mmu_sync_roots(vcpu
);
8868 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
8869 kvm_mmu_load_pgd(vcpu
);
8870 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
8871 kvm_vcpu_flush_tlb_all(vcpu
);
8873 /* Flushing all ASIDs flushes the current ASID... */
8874 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
8876 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
8877 kvm_vcpu_flush_tlb_current(vcpu
);
8878 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH
, vcpu
))
8879 kvm_vcpu_flush_tlb_guest(vcpu
);
8881 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
8882 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
8886 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8887 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
8888 vcpu
->mmio_needed
= 0;
8892 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
8893 /* Page is swapped out. Do synthetic halt */
8894 vcpu
->arch
.apf
.halted
= true;
8898 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
8899 record_steal_time(vcpu
);
8900 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
8902 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
8904 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
8905 kvm_pmu_handle_event(vcpu
);
8906 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
8907 kvm_pmu_deliver_pmi(vcpu
);
8908 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
8909 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
8910 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
8911 vcpu
->arch
.ioapic_handled_vectors
)) {
8912 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
8913 vcpu
->run
->eoi
.vector
=
8914 vcpu
->arch
.pending_ioapic_eoi
;
8919 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
8920 vcpu_scan_ioapic(vcpu
);
8921 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
8922 vcpu_load_eoi_exitmap(vcpu
);
8923 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
8924 kvm_vcpu_reload_apic_access_page(vcpu
);
8925 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
8926 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
8927 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
8931 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
8932 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
8933 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
8937 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
8938 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
8939 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
8945 * KVM_REQ_HV_STIMER has to be processed after
8946 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8947 * depend on the guest clock being up-to-date
8949 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
8950 kvm_hv_process_stimers(vcpu
);
8951 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
8952 kvm_vcpu_update_apicv(vcpu
);
8953 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
8954 kvm_check_async_pf_completion(vcpu
);
8955 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
8956 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
8959 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
8960 ++vcpu
->stat
.req_event
;
8961 kvm_apic_accept_events(vcpu
);
8962 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
8967 inject_pending_event(vcpu
, &req_immediate_exit
);
8969 static_call(kvm_x86_enable_irq_window
)(vcpu
);
8971 if (kvm_lapic_enabled(vcpu
)) {
8972 update_cr8_intercept(vcpu
);
8973 kvm_lapic_sync_to_vapic(vcpu
);
8977 r
= kvm_mmu_reload(vcpu
);
8979 goto cancel_injection
;
8984 static_call(kvm_x86_prepare_guest_switch
)(vcpu
);
8987 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
8988 * IPI are then delayed after guest entry, which ensures that they
8989 * result in virtual interrupt delivery.
8991 local_irq_disable();
8992 vcpu
->mode
= IN_GUEST_MODE
;
8994 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8997 * 1) We should set ->mode before checking ->requests. Please see
8998 * the comment in kvm_vcpu_exiting_guest_mode().
9000 * 2) For APICv, we should set ->mode before checking PID.ON. This
9001 * pairs with the memory barrier implicit in pi_test_and_set_on
9002 * (see vmx_deliver_posted_interrupt).
9004 * 3) This also orders the write to mode from any reads to the page
9005 * tables done while the VCPU is running. Please see the comment
9006 * in kvm_flush_remote_tlbs.
9008 smp_mb__after_srcu_read_unlock();
9011 * This handles the case where a posted interrupt was
9012 * notified with kvm_vcpu_kick.
9014 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
9015 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
9017 if (kvm_vcpu_exit_request(vcpu
)) {
9018 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9022 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9024 goto cancel_injection
;
9027 if (req_immediate_exit
) {
9028 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9029 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
9032 fpregs_assert_state_consistent();
9033 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9034 switch_fpu_return();
9036 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
9038 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
9039 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
9040 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
9041 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
9042 set_debugreg(vcpu
->arch
.dr6
, 6);
9043 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
9047 exit_fastpath
= static_call(kvm_x86_run
)(vcpu
);
9048 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
9051 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
9052 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
9056 if (vcpu
->arch
.apicv_active
)
9057 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
9061 * Do this here before restoring debug registers on the host. And
9062 * since we do this before handling the vmexit, a DR access vmexit
9063 * can (a) read the correct value of the debug registers, (b) set
9064 * KVM_DEBUGREG_WONT_EXIT again.
9066 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
9067 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
9068 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
9069 kvm_update_dr0123(vcpu
);
9070 kvm_update_dr7(vcpu
);
9071 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
9075 * If the guest has used debug registers, at least dr7
9076 * will be disabled while returning to the host.
9077 * If we don't have active breakpoints in the host, we don't
9078 * care about the messed up debug address registers. But if
9079 * we have some of them active, restore the old state.
9081 if (hw_breakpoint_active())
9082 hw_breakpoint_restore();
9084 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
9085 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
9087 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9090 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
9093 * Consume any pending interrupts, including the possible source of
9094 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9095 * An instruction is required after local_irq_enable() to fully unblock
9096 * interrupts on processors that implement an interrupt shadow, the
9097 * stat.exits increment will do nicely.
9099 kvm_before_interrupt(vcpu
);
9102 local_irq_disable();
9103 kvm_after_interrupt(vcpu
);
9105 if (lapic_in_kernel(vcpu
)) {
9106 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
9107 if (delta
!= S64_MIN
) {
9108 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
9109 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
9116 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9119 * Profile KVM exit RIPs:
9121 if (unlikely(prof_on
== KVM_PROFILING
)) {
9122 unsigned long rip
= kvm_rip_read(vcpu
);
9123 profile_hit(KVM_PROFILING
, (void *)rip
);
9126 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
9127 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9129 if (vcpu
->arch
.apic_attention
)
9130 kvm_lapic_sync_from_vapic(vcpu
);
9132 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
9136 if (req_immediate_exit
)
9137 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9138 static_call(kvm_x86_cancel_injection
)(vcpu
);
9139 if (unlikely(vcpu
->arch
.apic_attention
))
9140 kvm_lapic_sync_from_vapic(vcpu
);
9145 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
9147 if (!kvm_arch_vcpu_runnable(vcpu
) &&
9148 (!kvm_x86_ops
.pre_block
|| static_call(kvm_x86_pre_block
)(vcpu
) == 0)) {
9149 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9150 kvm_vcpu_block(vcpu
);
9151 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9153 if (kvm_x86_ops
.post_block
)
9154 static_call(kvm_x86_post_block
)(vcpu
);
9156 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
9160 kvm_apic_accept_events(vcpu
);
9161 switch(vcpu
->arch
.mp_state
) {
9162 case KVM_MP_STATE_HALTED
:
9163 case KVM_MP_STATE_AP_RESET_HOLD
:
9164 vcpu
->arch
.pv
.pv_unhalted
= false;
9165 vcpu
->arch
.mp_state
=
9166 KVM_MP_STATE_RUNNABLE
;
9168 case KVM_MP_STATE_RUNNABLE
:
9169 vcpu
->arch
.apf
.halted
= false;
9171 case KVM_MP_STATE_INIT_RECEIVED
:
9179 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
9181 if (is_guest_mode(vcpu
))
9182 kvm_x86_ops
.nested_ops
->check_events(vcpu
);
9184 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
9185 !vcpu
->arch
.apf
.halted
);
9188 static int vcpu_run(struct kvm_vcpu
*vcpu
)
9191 struct kvm
*kvm
= vcpu
->kvm
;
9193 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9194 vcpu
->arch
.l1tf_flush_l1d
= true;
9197 if (kvm_vcpu_running(vcpu
)) {
9198 r
= vcpu_enter_guest(vcpu
);
9200 r
= vcpu_block(kvm
, vcpu
);
9206 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
9207 if (kvm_cpu_has_pending_timer(vcpu
))
9208 kvm_inject_pending_timer_irqs(vcpu
);
9210 if (dm_request_for_irq_injection(vcpu
) &&
9211 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
9213 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
9214 ++vcpu
->stat
.request_irq_exits
;
9218 if (__xfer_to_guest_mode_work_pending()) {
9219 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9220 r
= xfer_to_guest_mode_handle_work(vcpu
);
9223 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9227 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9232 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
9236 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9237 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
9238 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9242 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
9244 BUG_ON(!vcpu
->arch
.pio
.count
);
9246 return complete_emulated_io(vcpu
);
9250 * Implements the following, as a state machine:
9254 * for each mmio piece in the fragment
9262 * for each mmio piece in the fragment
9267 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
9269 struct kvm_run
*run
= vcpu
->run
;
9270 struct kvm_mmio_fragment
*frag
;
9273 BUG_ON(!vcpu
->mmio_needed
);
9275 /* Complete previous fragment */
9276 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
9277 len
= min(8u, frag
->len
);
9278 if (!vcpu
->mmio_is_write
)
9279 memcpy(frag
->data
, run
->mmio
.data
, len
);
9281 if (frag
->len
<= 8) {
9282 /* Switch to the next fragment. */
9284 vcpu
->mmio_cur_fragment
++;
9286 /* Go forward to the next mmio piece. */
9292 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
9293 vcpu
->mmio_needed
= 0;
9295 /* FIXME: return into emulator if single-stepping. */
9296 if (vcpu
->mmio_is_write
)
9298 vcpu
->mmio_read_completed
= 1;
9299 return complete_emulated_io(vcpu
);
9302 run
->exit_reason
= KVM_EXIT_MMIO
;
9303 run
->mmio
.phys_addr
= frag
->gpa
;
9304 if (vcpu
->mmio_is_write
)
9305 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
9306 run
->mmio
.len
= min(8u, frag
->len
);
9307 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
9308 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
9312 static void kvm_save_current_fpu(struct fpu
*fpu
)
9315 * If the target FPU state is not resident in the CPU registers, just
9316 * memcpy() from current, else save CPU state directly to the target.
9318 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9319 memcpy(&fpu
->state
, ¤t
->thread
.fpu
.state
,
9320 fpu_kernel_xstate_size
);
9322 copy_fpregs_to_fpstate(fpu
);
9325 /* Swap (qemu) user FPU context for the guest FPU context. */
9326 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
9330 kvm_save_current_fpu(vcpu
->arch
.user_fpu
);
9333 * Guests with protected state can't have it set by the hypervisor,
9334 * so skip trying to set it.
9336 if (vcpu
->arch
.guest_fpu
)
9337 /* PKRU is separately restored in kvm_x86_ops.run. */
9338 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
->state
,
9339 ~XFEATURE_MASK_PKRU
);
9341 fpregs_mark_activate();
9347 /* When vcpu_run ends, restore user space FPU context. */
9348 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
9353 * Guests with protected state can't have it read by the hypervisor,
9354 * so skip trying to save it.
9356 if (vcpu
->arch
.guest_fpu
)
9357 kvm_save_current_fpu(vcpu
->arch
.guest_fpu
);
9359 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
->state
);
9361 fpregs_mark_activate();
9364 ++vcpu
->stat
.fpu_reload
;
9368 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
9370 struct kvm_run
*kvm_run
= vcpu
->run
;
9374 kvm_sigset_activate(vcpu
);
9376 kvm_load_guest_fpu(vcpu
);
9378 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
9379 if (kvm_run
->immediate_exit
) {
9383 kvm_vcpu_block(vcpu
);
9384 kvm_apic_accept_events(vcpu
);
9385 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
9387 if (signal_pending(current
)) {
9389 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
9390 ++vcpu
->stat
.signal_exits
;
9395 if (kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) {
9400 if (kvm_run
->kvm_dirty_regs
) {
9401 r
= sync_regs(vcpu
);
9406 /* re-sync apic's tpr */
9407 if (!lapic_in_kernel(vcpu
)) {
9408 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
9414 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
9415 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
9416 vcpu
->arch
.complete_userspace_io
= NULL
;
9421 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
9423 if (kvm_run
->immediate_exit
)
9429 kvm_put_guest_fpu(vcpu
);
9430 if (kvm_run
->kvm_valid_regs
)
9432 post_kvm_run_save(vcpu
);
9433 kvm_sigset_deactivate(vcpu
);
9439 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9441 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
9443 * We are here if userspace calls get_regs() in the middle of
9444 * instruction emulation. Registers state needs to be copied
9445 * back from emulation context to vcpu. Userspace shouldn't do
9446 * that usually, but some bad designed PV devices (vmware
9447 * backdoor interface) need this to work
9449 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
9450 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9452 regs
->rax
= kvm_rax_read(vcpu
);
9453 regs
->rbx
= kvm_rbx_read(vcpu
);
9454 regs
->rcx
= kvm_rcx_read(vcpu
);
9455 regs
->rdx
= kvm_rdx_read(vcpu
);
9456 regs
->rsi
= kvm_rsi_read(vcpu
);
9457 regs
->rdi
= kvm_rdi_read(vcpu
);
9458 regs
->rsp
= kvm_rsp_read(vcpu
);
9459 regs
->rbp
= kvm_rbp_read(vcpu
);
9460 #ifdef CONFIG_X86_64
9461 regs
->r8
= kvm_r8_read(vcpu
);
9462 regs
->r9
= kvm_r9_read(vcpu
);
9463 regs
->r10
= kvm_r10_read(vcpu
);
9464 regs
->r11
= kvm_r11_read(vcpu
);
9465 regs
->r12
= kvm_r12_read(vcpu
);
9466 regs
->r13
= kvm_r13_read(vcpu
);
9467 regs
->r14
= kvm_r14_read(vcpu
);
9468 regs
->r15
= kvm_r15_read(vcpu
);
9471 regs
->rip
= kvm_rip_read(vcpu
);
9472 regs
->rflags
= kvm_get_rflags(vcpu
);
9475 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9478 __get_regs(vcpu
, regs
);
9483 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9485 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
9486 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9488 kvm_rax_write(vcpu
, regs
->rax
);
9489 kvm_rbx_write(vcpu
, regs
->rbx
);
9490 kvm_rcx_write(vcpu
, regs
->rcx
);
9491 kvm_rdx_write(vcpu
, regs
->rdx
);
9492 kvm_rsi_write(vcpu
, regs
->rsi
);
9493 kvm_rdi_write(vcpu
, regs
->rdi
);
9494 kvm_rsp_write(vcpu
, regs
->rsp
);
9495 kvm_rbp_write(vcpu
, regs
->rbp
);
9496 #ifdef CONFIG_X86_64
9497 kvm_r8_write(vcpu
, regs
->r8
);
9498 kvm_r9_write(vcpu
, regs
->r9
);
9499 kvm_r10_write(vcpu
, regs
->r10
);
9500 kvm_r11_write(vcpu
, regs
->r11
);
9501 kvm_r12_write(vcpu
, regs
->r12
);
9502 kvm_r13_write(vcpu
, regs
->r13
);
9503 kvm_r14_write(vcpu
, regs
->r14
);
9504 kvm_r15_write(vcpu
, regs
->r15
);
9507 kvm_rip_write(vcpu
, regs
->rip
);
9508 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
9510 vcpu
->arch
.exception
.pending
= false;
9512 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9515 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9518 __set_regs(vcpu
, regs
);
9523 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
9525 struct kvm_segment cs
;
9527 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9531 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
9533 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9537 if (vcpu
->arch
.guest_state_protected
)
9538 goto skip_protected_regs
;
9540 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
9541 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
9542 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
9543 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
9544 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
9545 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
9547 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
9548 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
9550 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9551 sregs
->idt
.limit
= dt
.size
;
9552 sregs
->idt
.base
= dt
.address
;
9553 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9554 sregs
->gdt
.limit
= dt
.size
;
9555 sregs
->gdt
.base
= dt
.address
;
9557 sregs
->cr2
= vcpu
->arch
.cr2
;
9558 sregs
->cr3
= kvm_read_cr3(vcpu
);
9560 skip_protected_regs
:
9561 sregs
->cr0
= kvm_read_cr0(vcpu
);
9562 sregs
->cr4
= kvm_read_cr4(vcpu
);
9563 sregs
->cr8
= kvm_get_cr8(vcpu
);
9564 sregs
->efer
= vcpu
->arch
.efer
;
9565 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
9567 memset(sregs
->interrupt_bitmap
, 0, sizeof(sregs
->interrupt_bitmap
));
9569 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
9570 set_bit(vcpu
->arch
.interrupt
.nr
,
9571 (unsigned long *)sregs
->interrupt_bitmap
);
9574 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
9575 struct kvm_sregs
*sregs
)
9578 __get_sregs(vcpu
, sregs
);
9583 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
9584 struct kvm_mp_state
*mp_state
)
9587 if (kvm_mpx_supported())
9588 kvm_load_guest_fpu(vcpu
);
9590 kvm_apic_accept_events(vcpu
);
9591 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
9592 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
9593 vcpu
->arch
.pv
.pv_unhalted
)
9594 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
9596 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
9598 if (kvm_mpx_supported())
9599 kvm_put_guest_fpu(vcpu
);
9604 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
9605 struct kvm_mp_state
*mp_state
)
9611 if (!lapic_in_kernel(vcpu
) &&
9612 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
9616 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9617 * INIT state; latched init should be reported using
9618 * KVM_SET_VCPU_EVENTS, so reject it here.
9620 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
9621 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
9622 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
9625 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
9626 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
9627 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
9629 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
9630 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9638 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
9639 int reason
, bool has_error_code
, u32 error_code
)
9641 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
9644 init_emulate_ctxt(vcpu
);
9646 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
9647 has_error_code
, error_code
);
9649 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
9650 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
9651 vcpu
->run
->internal
.ndata
= 0;
9655 kvm_rip_write(vcpu
, ctxt
->eip
);
9656 kvm_set_rflags(vcpu
, ctxt
->eflags
);
9659 EXPORT_SYMBOL_GPL(kvm_task_switch
);
9661 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9663 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
9665 * When EFER.LME and CR0.PG are set, the processor is in
9666 * 64-bit mode (though maybe in a 32-bit code segment).
9667 * CR4.PAE and EFER.LMA must be set.
9669 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
9671 if (sregs
->cr3
& vcpu
->arch
.cr3_lm_rsvd_bits
)
9675 * Not in 64-bit mode: EFER.LMA is clear and the code
9676 * segment cannot be 64-bit.
9678 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
9682 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
9685 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9687 struct msr_data apic_base_msr
;
9688 int mmu_reset_needed
= 0;
9689 int pending_vec
, max_bits
, idx
;
9693 if (!kvm_is_valid_sregs(vcpu
, sregs
))
9696 apic_base_msr
.data
= sregs
->apic_base
;
9697 apic_base_msr
.host_initiated
= true;
9698 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
9701 if (vcpu
->arch
.guest_state_protected
)
9702 goto skip_protected_regs
;
9704 dt
.size
= sregs
->idt
.limit
;
9705 dt
.address
= sregs
->idt
.base
;
9706 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
9707 dt
.size
= sregs
->gdt
.limit
;
9708 dt
.address
= sregs
->gdt
.base
;
9709 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
9711 vcpu
->arch
.cr2
= sregs
->cr2
;
9712 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
9713 vcpu
->arch
.cr3
= sregs
->cr3
;
9714 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
9716 kvm_set_cr8(vcpu
, sregs
->cr8
);
9718 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
9719 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
9721 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
9722 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
9723 vcpu
->arch
.cr0
= sregs
->cr0
;
9725 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
9726 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
9728 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9729 if (is_pae_paging(vcpu
)) {
9730 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
9731 mmu_reset_needed
= 1;
9733 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9735 if (mmu_reset_needed
)
9736 kvm_mmu_reset_context(vcpu
);
9738 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
9739 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
9740 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
9741 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
9742 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
9743 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
9745 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
9746 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
9748 update_cr8_intercept(vcpu
);
9750 /* Older userspace won't unhalt the vcpu on reset. */
9751 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
9752 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
9754 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9756 skip_protected_regs
:
9757 max_bits
= KVM_NR_INTERRUPTS
;
9758 pending_vec
= find_first_bit(
9759 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
9760 if (pending_vec
< max_bits
) {
9761 kvm_queue_interrupt(vcpu
, pending_vec
, false);
9762 pr_debug("Set back pending irq %d\n", pending_vec
);
9765 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9772 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
9773 struct kvm_sregs
*sregs
)
9778 ret
= __set_sregs(vcpu
, sregs
);
9783 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
9784 struct kvm_guest_debug
*dbg
)
9786 unsigned long rflags
;
9789 if (vcpu
->arch
.guest_state_protected
)
9794 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
9796 if (vcpu
->arch
.exception
.pending
)
9798 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
9799 kvm_queue_exception(vcpu
, DB_VECTOR
);
9801 kvm_queue_exception(vcpu
, BP_VECTOR
);
9805 * Read rflags as long as potentially injected trace flags are still
9808 rflags
= kvm_get_rflags(vcpu
);
9810 vcpu
->guest_debug
= dbg
->control
;
9811 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
9812 vcpu
->guest_debug
= 0;
9814 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
9815 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
9816 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
9817 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
9819 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
9820 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
9822 kvm_update_dr7(vcpu
);
9824 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
9825 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
9826 get_segment_base(vcpu
, VCPU_SREG_CS
);
9829 * Trigger an rflags update that will inject or remove the trace
9832 kvm_set_rflags(vcpu
, rflags
);
9834 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
9844 * Translate a guest virtual address to a guest physical address.
9846 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
9847 struct kvm_translation
*tr
)
9849 unsigned long vaddr
= tr
->linear_address
;
9855 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9856 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
9857 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9858 tr
->physical_address
= gpa
;
9859 tr
->valid
= gpa
!= UNMAPPED_GVA
;
9867 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
9869 struct fxregs_state
*fxsave
;
9871 if (!vcpu
->arch
.guest_fpu
)
9876 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
9877 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
9878 fpu
->fcw
= fxsave
->cwd
;
9879 fpu
->fsw
= fxsave
->swd
;
9880 fpu
->ftwx
= fxsave
->twd
;
9881 fpu
->last_opcode
= fxsave
->fop
;
9882 fpu
->last_ip
= fxsave
->rip
;
9883 fpu
->last_dp
= fxsave
->rdp
;
9884 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
9890 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
9892 struct fxregs_state
*fxsave
;
9894 if (!vcpu
->arch
.guest_fpu
)
9899 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
9901 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
9902 fxsave
->cwd
= fpu
->fcw
;
9903 fxsave
->swd
= fpu
->fsw
;
9904 fxsave
->twd
= fpu
->ftwx
;
9905 fxsave
->fop
= fpu
->last_opcode
;
9906 fxsave
->rip
= fpu
->last_ip
;
9907 fxsave
->rdp
= fpu
->last_dp
;
9908 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
9914 static void store_regs(struct kvm_vcpu
*vcpu
)
9916 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
9918 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
9919 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
9921 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
9922 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
9924 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
9925 kvm_vcpu_ioctl_x86_get_vcpu_events(
9926 vcpu
, &vcpu
->run
->s
.regs
.events
);
9929 static int sync_regs(struct kvm_vcpu
*vcpu
)
9931 if (vcpu
->run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)
9934 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
9935 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
9936 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
9938 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
9939 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
9941 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
9943 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
9944 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9945 vcpu
, &vcpu
->run
->s
.regs
.events
))
9947 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
9953 static void fx_init(struct kvm_vcpu
*vcpu
)
9955 if (!vcpu
->arch
.guest_fpu
)
9958 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
9959 if (boot_cpu_has(X86_FEATURE_XSAVES
))
9960 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
9961 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
9964 * Ensure guest xcr0 is valid for loading
9966 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
9968 vcpu
->arch
.cr0
|= X86_CR0_ET
;
9971 void kvm_free_guest_fpu(struct kvm_vcpu
*vcpu
)
9973 if (vcpu
->arch
.guest_fpu
) {
9974 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
9975 vcpu
->arch
.guest_fpu
= NULL
;
9978 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu
);
9980 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
9982 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
9983 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9984 "guest TSC will not be reliable\n");
9989 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
9994 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
9995 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9997 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
9999 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
10001 r
= kvm_mmu_create(vcpu
);
10005 if (irqchip_in_kernel(vcpu
->kvm
)) {
10006 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
10008 goto fail_mmu_destroy
;
10009 if (kvm_apicv_activated(vcpu
->kvm
))
10010 vcpu
->arch
.apicv_active
= true;
10012 static_branch_inc(&kvm_has_noapic_vcpu
);
10016 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
10018 goto fail_free_lapic
;
10019 vcpu
->arch
.pio_data
= page_address(page
);
10021 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
10022 GFP_KERNEL_ACCOUNT
);
10023 if (!vcpu
->arch
.mce_banks
)
10024 goto fail_free_pio_data
;
10025 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
10027 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
10028 GFP_KERNEL_ACCOUNT
))
10029 goto fail_free_mce_banks
;
10031 if (!alloc_emulate_ctxt(vcpu
))
10032 goto free_wbinvd_dirty_mask
;
10034 vcpu
->arch
.user_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10035 GFP_KERNEL_ACCOUNT
);
10036 if (!vcpu
->arch
.user_fpu
) {
10037 pr_err("kvm: failed to allocate userspace's fpu\n");
10038 goto free_emulate_ctxt
;
10041 vcpu
->arch
.guest_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10042 GFP_KERNEL_ACCOUNT
);
10043 if (!vcpu
->arch
.guest_fpu
) {
10044 pr_err("kvm: failed to allocate vcpu's fpu\n");
10045 goto free_user_fpu
;
10049 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
10051 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
10053 kvm_async_pf_hash_reset(vcpu
);
10054 kvm_pmu_init(vcpu
);
10056 vcpu
->arch
.pending_external_vector
= -1;
10057 vcpu
->arch
.preempted_in_kernel
= false;
10059 kvm_hv_vcpu_init(vcpu
);
10061 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
10063 goto free_guest_fpu
;
10065 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
10066 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
10067 kvm_vcpu_mtrr_init(vcpu
);
10069 kvm_vcpu_reset(vcpu
, false);
10070 kvm_init_mmu(vcpu
, false);
10075 kvm_free_guest_fpu(vcpu
);
10077 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10079 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10080 free_wbinvd_dirty_mask
:
10081 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10082 fail_free_mce_banks
:
10083 kfree(vcpu
->arch
.mce_banks
);
10084 fail_free_pio_data
:
10085 free_page((unsigned long)vcpu
->arch
.pio_data
);
10087 kvm_free_lapic(vcpu
);
10089 kvm_mmu_destroy(vcpu
);
10093 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
10095 struct kvm
*kvm
= vcpu
->kvm
;
10097 kvm_hv_vcpu_postcreate(vcpu
);
10099 if (mutex_lock_killable(&vcpu
->mutex
))
10102 kvm_synchronize_tsc(vcpu
, 0);
10105 /* poll control enabled by default */
10106 vcpu
->arch
.msr_kvm_poll_control
= 1;
10108 mutex_unlock(&vcpu
->mutex
);
10110 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
10111 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
10112 KVMCLOCK_SYNC_PERIOD
);
10115 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
10117 struct gfn_to_pfn_cache
*cache
= &vcpu
->arch
.st
.cache
;
10120 kvm_release_pfn(cache
->pfn
, cache
->dirty
, cache
);
10122 kvmclock_reset(vcpu
);
10124 static_call(kvm_x86_vcpu_free
)(vcpu
);
10126 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10127 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10128 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10129 kvm_free_guest_fpu(vcpu
);
10131 kvm_hv_vcpu_uninit(vcpu
);
10132 kvm_pmu_destroy(vcpu
);
10133 kfree(vcpu
->arch
.mce_banks
);
10134 kvm_free_lapic(vcpu
);
10135 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10136 kvm_mmu_destroy(vcpu
);
10137 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10138 free_page((unsigned long)vcpu
->arch
.pio_data
);
10139 kvfree(vcpu
->arch
.cpuid_entries
);
10140 if (!lapic_in_kernel(vcpu
))
10141 static_branch_dec(&kvm_has_noapic_vcpu
);
10144 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
10146 kvm_lapic_reset(vcpu
, init_event
);
10148 vcpu
->arch
.hflags
= 0;
10150 vcpu
->arch
.smi_pending
= 0;
10151 vcpu
->arch
.smi_count
= 0;
10152 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
10153 vcpu
->arch
.nmi_pending
= 0;
10154 vcpu
->arch
.nmi_injected
= false;
10155 kvm_clear_interrupt_queue(vcpu
);
10156 kvm_clear_exception_queue(vcpu
);
10158 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
10159 kvm_update_dr0123(vcpu
);
10160 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
10161 vcpu
->arch
.dr7
= DR7_FIXED_1
;
10162 kvm_update_dr7(vcpu
);
10164 vcpu
->arch
.cr2
= 0;
10166 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10167 vcpu
->arch
.apf
.msr_en_val
= 0;
10168 vcpu
->arch
.apf
.msr_int_val
= 0;
10169 vcpu
->arch
.st
.msr_val
= 0;
10171 kvmclock_reset(vcpu
);
10173 kvm_clear_async_pf_completion_queue(vcpu
);
10174 kvm_async_pf_hash_reset(vcpu
);
10175 vcpu
->arch
.apf
.halted
= false;
10177 if (vcpu
->arch
.guest_fpu
&& kvm_mpx_supported()) {
10178 void *mpx_state_buffer
;
10181 * To avoid have the INIT path from kvm_apic_has_events() that be
10182 * called with loaded FPU and does not let userspace fix the state.
10185 kvm_put_guest_fpu(vcpu
);
10186 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10188 if (mpx_state_buffer
)
10189 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
10190 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10192 if (mpx_state_buffer
)
10193 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
10195 kvm_load_guest_fpu(vcpu
);
10199 kvm_pmu_reset(vcpu
);
10200 vcpu
->arch
.smbase
= 0x30000;
10202 vcpu
->arch
.msr_misc_features_enables
= 0;
10204 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10207 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
10208 vcpu
->arch
.regs_avail
= ~0;
10209 vcpu
->arch
.regs_dirty
= ~0;
10211 vcpu
->arch
.ia32_xss
= 0;
10213 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
10216 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
10218 struct kvm_segment cs
;
10220 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10221 cs
.selector
= vector
<< 8;
10222 cs
.base
= vector
<< 12;
10223 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10224 kvm_rip_write(vcpu
, 0);
10226 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
10228 int kvm_arch_hardware_enable(void)
10231 struct kvm_vcpu
*vcpu
;
10236 bool stable
, backwards_tsc
= false;
10238 kvm_user_return_msr_cpu_online();
10239 ret
= static_call(kvm_x86_hardware_enable
)();
10243 local_tsc
= rdtsc();
10244 stable
= !kvm_check_tsc_unstable();
10245 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10246 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10247 if (!stable
&& vcpu
->cpu
== smp_processor_id())
10248 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
10249 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
10250 backwards_tsc
= true;
10251 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
10252 max_tsc
= vcpu
->arch
.last_host_tsc
;
10258 * Sometimes, even reliable TSCs go backwards. This happens on
10259 * platforms that reset TSC during suspend or hibernate actions, but
10260 * maintain synchronization. We must compensate. Fortunately, we can
10261 * detect that condition here, which happens early in CPU bringup,
10262 * before any KVM threads can be running. Unfortunately, we can't
10263 * bring the TSCs fully up to date with real time, as we aren't yet far
10264 * enough into CPU bringup that we know how much real time has actually
10265 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10266 * variables that haven't been updated yet.
10268 * So we simply find the maximum observed TSC above, then record the
10269 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
10270 * the adjustment will be applied. Note that we accumulate
10271 * adjustments, in case multiple suspend cycles happen before some VCPU
10272 * gets a chance to run again. In the event that no KVM threads get a
10273 * chance to run, we will miss the entire elapsed period, as we'll have
10274 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10275 * loose cycle time. This isn't too big a deal, since the loss will be
10276 * uniform across all VCPUs (not to mention the scenario is extremely
10277 * unlikely). It is possible that a second hibernate recovery happens
10278 * much faster than a first, causing the observed TSC here to be
10279 * smaller; this would require additional padding adjustment, which is
10280 * why we set last_host_tsc to the local tsc observed here.
10282 * N.B. - this code below runs only on platforms with reliable TSC,
10283 * as that is the only way backwards_tsc is set above. Also note
10284 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10285 * have the same delta_cyc adjustment applied if backwards_tsc
10286 * is detected. Note further, this adjustment is only done once,
10287 * as we reset last_host_tsc on all VCPUs to stop this from being
10288 * called multiple times (one for each physical CPU bringup).
10290 * Platforms with unreliable TSCs don't have to deal with this, they
10291 * will be compensated by the logic in vcpu_load, which sets the TSC to
10292 * catchup mode. This will catchup all VCPUs to real time, but cannot
10293 * guarantee that they stay in perfect synchronization.
10295 if (backwards_tsc
) {
10296 u64 delta_cyc
= max_tsc
- local_tsc
;
10297 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10298 kvm
->arch
.backwards_tsc_observed
= true;
10299 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10300 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
10301 vcpu
->arch
.last_host_tsc
= local_tsc
;
10302 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
10306 * We have to disable TSC offset matching.. if you were
10307 * booting a VM while issuing an S4 host suspend....
10308 * you may have some problem. Solving this issue is
10309 * left as an exercise to the reader.
10311 kvm
->arch
.last_tsc_nsec
= 0;
10312 kvm
->arch
.last_tsc_write
= 0;
10319 void kvm_arch_hardware_disable(void)
10321 static_call(kvm_x86_hardware_disable
)();
10322 drop_user_return_notifiers();
10325 int kvm_arch_hardware_setup(void *opaque
)
10327 struct kvm_x86_init_ops
*ops
= opaque
;
10330 rdmsrl_safe(MSR_EFER
, &host_efer
);
10332 if (boot_cpu_has(X86_FEATURE_XSAVES
))
10333 rdmsrl(MSR_IA32_XSS
, host_xss
);
10335 r
= ops
->hardware_setup();
10339 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
10340 kvm_ops_static_call_update();
10342 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
10345 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10346 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
10347 #undef __kvm_cpu_cap_has
10349 if (kvm_has_tsc_control
) {
10351 * Make sure the user can only configure tsc_khz values that
10352 * fit into a signed integer.
10353 * A min value is not calculated because it will always
10354 * be 1 on all machines.
10356 u64 max
= min(0x7fffffffULL
,
10357 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
10358 kvm_max_guest_tsc_khz
= max
;
10360 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
10363 kvm_init_msr_list();
10367 void kvm_arch_hardware_unsetup(void)
10369 static_call(kvm_x86_hardware_unsetup
)();
10372 int kvm_arch_check_processor_compat(void *opaque
)
10374 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
10375 struct kvm_x86_init_ops
*ops
= opaque
;
10377 WARN_ON(!irqs_disabled());
10379 if (__cr4_reserved_bits(cpu_has
, c
) !=
10380 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
10383 return ops
->check_processor_compatibility();
10386 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
10388 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
10390 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
10392 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
10394 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
10397 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
10398 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
10400 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
10402 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
10404 vcpu
->arch
.l1tf_flush_l1d
= true;
10405 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
10406 pmu
->need_cleanup
= true;
10407 kvm_make_request(KVM_REQ_PMU
, vcpu
);
10409 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
10412 void kvm_arch_free_vm(struct kvm
*kvm
)
10414 kfree(kvm
->arch
.hyperv
.hv_pa_pg
);
10419 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
10424 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
10425 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
10426 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
10427 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
10428 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
10429 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
10431 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10432 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
10433 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10434 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
10435 &kvm
->arch
.irq_sources_bitmap
);
10437 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
10438 mutex_init(&kvm
->arch
.apic_map_lock
);
10439 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
10441 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
10442 pvclock_update_vm_gtod_copy(kvm
);
10444 kvm
->arch
.guest_can_read_msr_platform_info
= true;
10446 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
10447 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
10449 kvm_hv_init_vm(kvm
);
10450 kvm_page_track_init(kvm
);
10451 kvm_mmu_init_vm(kvm
);
10453 return static_call(kvm_x86_vm_init
)(kvm
);
10456 int kvm_arch_post_init_vm(struct kvm
*kvm
)
10458 return kvm_mmu_post_init_vm(kvm
);
10461 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
10464 kvm_mmu_unload(vcpu
);
10468 static void kvm_free_vcpus(struct kvm
*kvm
)
10471 struct kvm_vcpu
*vcpu
;
10474 * Unpin any mmu pages first.
10476 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10477 kvm_clear_async_pf_completion_queue(vcpu
);
10478 kvm_unload_vcpu_mmu(vcpu
);
10480 kvm_for_each_vcpu(i
, vcpu
, kvm
)
10481 kvm_vcpu_destroy(vcpu
);
10483 mutex_lock(&kvm
->lock
);
10484 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
10485 kvm
->vcpus
[i
] = NULL
;
10487 atomic_set(&kvm
->online_vcpus
, 0);
10488 mutex_unlock(&kvm
->lock
);
10491 void kvm_arch_sync_events(struct kvm
*kvm
)
10493 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
10494 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
10498 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
10501 * __x86_set_memory_region: Setup KVM internal memory slot
10503 * @kvm: the kvm pointer to the VM.
10504 * @id: the slot ID to setup.
10505 * @gpa: the GPA to install the slot (unused when @size == 0).
10506 * @size: the size of the slot. Set to zero to uninstall a slot.
10508 * This function helps to setup a KVM internal memory slot. Specify
10509 * @size > 0 to install a new slot, while @size == 0 to uninstall a
10510 * slot. The return code can be one of the following:
10512 * HVA: on success (uninstall will return a bogus HVA)
10515 * The caller should always use IS_ERR() to check the return value
10516 * before use. Note, the KVM internal memory slots are guaranteed to
10517 * remain valid and unchanged until the VM is destroyed, i.e., the
10518 * GPA->HVA translation will not change. However, the HVA is a user
10519 * address, i.e. its accessibility is not guaranteed, and must be
10520 * accessed via __copy_{to,from}_user().
10522 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
10526 unsigned long hva
, old_npages
;
10527 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
10528 struct kvm_memory_slot
*slot
;
10530 /* Called with kvm->slots_lock held. */
10531 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
10532 return ERR_PTR_USR(-EINVAL
);
10534 slot
= id_to_memslot(slots
, id
);
10536 if (slot
&& slot
->npages
)
10537 return ERR_PTR_USR(-EEXIST
);
10540 * MAP_SHARED to prevent internal slot pages from being moved
10543 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
10544 MAP_SHARED
| MAP_ANONYMOUS
, 0);
10545 if (IS_ERR((void *)hva
))
10546 return (void __user
*)hva
;
10548 if (!slot
|| !slot
->npages
)
10551 old_npages
= slot
->npages
;
10552 hva
= slot
->userspace_addr
;
10555 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
10556 struct kvm_userspace_memory_region m
;
10558 m
.slot
= id
| (i
<< 16);
10560 m
.guest_phys_addr
= gpa
;
10561 m
.userspace_addr
= hva
;
10562 m
.memory_size
= size
;
10563 r
= __kvm_set_memory_region(kvm
, &m
);
10565 return ERR_PTR_USR(r
);
10569 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
10571 return (void __user
*)hva
;
10573 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
10575 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
10577 kvm_mmu_pre_destroy_vm(kvm
);
10580 void kvm_arch_destroy_vm(struct kvm
*kvm
)
10584 if (current
->mm
== kvm
->mm
) {
10586 * Free memory regions allocated on behalf of userspace,
10587 * unless the the memory map has changed due to process exit
10590 mutex_lock(&kvm
->slots_lock
);
10591 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
10593 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
10595 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
10596 mutex_unlock(&kvm
->slots_lock
);
10598 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
10599 for (i
= 0; i
< kvm
->arch
.msr_filter
.count
; i
++)
10600 kfree(kvm
->arch
.msr_filter
.ranges
[i
].bitmap
);
10601 kvm_pic_destroy(kvm
);
10602 kvm_ioapic_destroy(kvm
);
10603 kvm_free_vcpus(kvm
);
10604 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
10605 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
10606 kvm_mmu_uninit_vm(kvm
);
10607 kvm_page_track_cleanup(kvm
);
10608 kvm_hv_destroy_vm(kvm
);
10611 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
10615 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10616 kvfree(slot
->arch
.rmap
[i
]);
10617 slot
->arch
.rmap
[i
] = NULL
;
10622 kvfree(slot
->arch
.lpage_info
[i
- 1]);
10623 slot
->arch
.lpage_info
[i
- 1] = NULL
;
10626 kvm_page_track_free_memslot(slot
);
10629 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot
*slot
,
10630 unsigned long npages
)
10635 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
10636 * old arrays will be freed by __kvm_set_memory_region() if installing
10637 * the new memslot is successful.
10639 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
10641 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10642 struct kvm_lpage_info
*linfo
;
10643 unsigned long ugfn
;
10647 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
10648 slot
->base_gfn
, level
) + 1;
10650 slot
->arch
.rmap
[i
] =
10651 kvcalloc(lpages
, sizeof(*slot
->arch
.rmap
[i
]),
10652 GFP_KERNEL_ACCOUNT
);
10653 if (!slot
->arch
.rmap
[i
])
10658 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
10662 slot
->arch
.lpage_info
[i
- 1] = linfo
;
10664 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
10665 linfo
[0].disallow_lpage
= 1;
10666 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
10667 linfo
[lpages
- 1].disallow_lpage
= 1;
10668 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
10670 * If the gfn and userspace address are not aligned wrt each
10671 * other, disable large page support for this slot.
10673 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
10676 for (j
= 0; j
< lpages
; ++j
)
10677 linfo
[j
].disallow_lpage
= 1;
10681 if (kvm_page_track_create_memslot(slot
, npages
))
10687 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10688 kvfree(slot
->arch
.rmap
[i
]);
10689 slot
->arch
.rmap
[i
] = NULL
;
10693 kvfree(slot
->arch
.lpage_info
[i
- 1]);
10694 slot
->arch
.lpage_info
[i
- 1] = NULL
;
10699 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
10701 struct kvm_vcpu
*vcpu
;
10705 * memslots->generation has been incremented.
10706 * mmio generation may have reached its maximum value.
10708 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
10710 /* Force re-initialization of steal_time cache */
10711 kvm_for_each_vcpu(i
, vcpu
, kvm
)
10712 kvm_vcpu_kick(vcpu
);
10715 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
10716 struct kvm_memory_slot
*memslot
,
10717 const struct kvm_userspace_memory_region
*mem
,
10718 enum kvm_mr_change change
)
10720 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
10721 return kvm_alloc_memslot_metadata(memslot
,
10722 mem
->memory_size
>> PAGE_SHIFT
);
10726 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
10727 struct kvm_memory_slot
*old
,
10728 struct kvm_memory_slot
*new,
10729 enum kvm_mr_change change
)
10732 * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10733 * See comments below.
10735 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new->flags
& KVM_MEM_READONLY
))
10739 * Dirty logging tracks sptes in 4k granularity, meaning that large
10740 * sptes have to be split. If live migration is successful, the guest
10741 * in the source machine will be destroyed and large sptes will be
10742 * created in the destination. However, if the guest continues to run
10743 * in the source machine (for example if live migration fails), small
10744 * sptes will remain around and cause bad performance.
10746 * Scan sptes if dirty logging has been stopped, dropping those
10747 * which can be collapsed into a single large-page spte. Later
10748 * page faults will create the large-page sptes.
10750 * There is no need to do this in any of the following cases:
10751 * CREATE: No dirty mappings will already exist.
10752 * MOVE/DELETE: The old mappings will already have been cleaned up by
10753 * kvm_arch_flush_shadow_memslot()
10755 if ((old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
10756 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
10757 kvm_mmu_zap_collapsible_sptes(kvm
, new);
10760 * Enable or disable dirty logging for the slot.
10762 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10763 * slot have been zapped so no dirty logging updates are needed for
10765 * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10766 * any mappings that might be created in it will consume the
10767 * properties of the new slot and do not need to be updated here.
10769 * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10770 * called to enable/disable dirty logging.
10772 * When disabling dirty logging with PML enabled, the D-bit is set
10773 * for sptes in the slot in order to prevent unnecessary GPA
10774 * logging in the PML buffer (and potential PML buffer full VMEXIT).
10775 * This guarantees leaving PML enabled for the guest's lifetime
10776 * won't have any additional overhead from PML when the guest is
10777 * running with dirty logging disabled.
10779 * When enabling dirty logging, large sptes are write-protected
10780 * so they can be split on first write. New large sptes cannot
10781 * be created for this slot until the end of the logging.
10782 * See the comments in fast_page_fault().
10783 * For small sptes, nothing is done if the dirty log is in the
10784 * initial-all-set state. Otherwise, depending on whether pml
10785 * is enabled the D-bit or the W-bit will be cleared.
10787 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
10788 if (kvm_x86_ops
.slot_enable_log_dirty
) {
10789 static_call(kvm_x86_slot_enable_log_dirty
)(kvm
, new);
10792 kvm_dirty_log_manual_protect_and_init_set(kvm
) ?
10793 PG_LEVEL_2M
: PG_LEVEL_4K
;
10796 * If we're with initial-all-set, we don't need
10797 * to write protect any small page because
10798 * they're reported as dirty already. However
10799 * we still need to write-protect huge pages
10800 * so that the page split can happen lazily on
10801 * the first write to the huge page.
10803 kvm_mmu_slot_remove_write_access(kvm
, new, level
);
10806 static_call_cond(kvm_x86_slot_disable_log_dirty
)(kvm
, new);
10810 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
10811 const struct kvm_userspace_memory_region
*mem
,
10812 struct kvm_memory_slot
*old
,
10813 const struct kvm_memory_slot
*new,
10814 enum kvm_mr_change change
)
10816 if (!kvm
->arch
.n_requested_mmu_pages
)
10817 kvm_mmu_change_mmu_pages(kvm
,
10818 kvm_mmu_calculate_default_mmu_pages(kvm
));
10821 * FIXME: const-ify all uses of struct kvm_memory_slot.
10823 kvm_mmu_slot_apply_flags(kvm
, old
, (struct kvm_memory_slot
*) new, change
);
10825 /* Free the arrays associated with the old memslot. */
10826 if (change
== KVM_MR_MOVE
)
10827 kvm_arch_free_memslot(kvm
, old
);
10830 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
10832 kvm_mmu_zap_all(kvm
);
10835 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
10836 struct kvm_memory_slot
*slot
)
10838 kvm_page_track_flush_slot(kvm
, slot
);
10841 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
10843 return (is_guest_mode(vcpu
) &&
10844 kvm_x86_ops
.guest_apic_has_interrupt
&&
10845 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
10848 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
10850 if (!list_empty_careful(&vcpu
->async_pf
.done
))
10853 if (kvm_apic_has_events(vcpu
))
10856 if (vcpu
->arch
.pv
.pv_unhalted
)
10859 if (vcpu
->arch
.exception
.pending
)
10862 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
10863 (vcpu
->arch
.nmi_pending
&&
10864 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
10867 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
10868 (vcpu
->arch
.smi_pending
&&
10869 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
10872 if (kvm_arch_interrupt_allowed(vcpu
) &&
10873 (kvm_cpu_has_interrupt(vcpu
) ||
10874 kvm_guest_apic_has_interrupt(vcpu
)))
10877 if (kvm_hv_has_stimer_pending(vcpu
))
10880 if (is_guest_mode(vcpu
) &&
10881 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
10882 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
10888 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
10890 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
10893 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
10895 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
10898 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
10899 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
10900 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
10903 if (vcpu
->arch
.apicv_active
&& static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
10909 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
10911 return vcpu
->arch
.preempted_in_kernel
;
10914 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
10916 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
10919 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
10921 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
10924 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
10926 /* Can't read the RIP when guest state is protected, just return 0 */
10927 if (vcpu
->arch
.guest_state_protected
)
10930 if (is_64_bit_mode(vcpu
))
10931 return kvm_rip_read(vcpu
);
10932 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
10933 kvm_rip_read(vcpu
));
10935 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
10937 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
10939 return kvm_get_linear_rip(vcpu
) == linear_rip
;
10941 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
10943 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
10945 unsigned long rflags
;
10947 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
10948 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10949 rflags
&= ~X86_EFLAGS_TF
;
10952 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
10954 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
10956 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
10957 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
10958 rflags
|= X86_EFLAGS_TF
;
10959 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
10962 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
10964 __kvm_set_rflags(vcpu
, rflags
);
10965 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10967 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
10969 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
10973 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
10977 r
= kvm_mmu_reload(vcpu
);
10981 if (!vcpu
->arch
.mmu
->direct_map
&&
10982 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
10985 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
10988 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
10990 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
10992 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
10995 static inline u32
kvm_async_pf_next_probe(u32 key
)
10997 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
11000 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11002 u32 key
= kvm_async_pf_hash_fn(gfn
);
11004 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
11005 key
= kvm_async_pf_next_probe(key
);
11007 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
11010 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11013 u32 key
= kvm_async_pf_hash_fn(gfn
);
11015 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
11016 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
11017 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
11018 key
= kvm_async_pf_next_probe(key
);
11023 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11025 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
11028 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11032 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
11034 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
11038 vcpu
->arch
.apf
.gfns
[i
] = ~0;
11040 j
= kvm_async_pf_next_probe(j
);
11041 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
11043 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
11045 * k lies cyclically in ]i,j]
11047 * |....j i.k.| or |.k..j i...|
11049 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
11050 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
11055 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
11057 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
11059 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
11063 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
11065 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11067 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11068 &token
, offset
, sizeof(token
));
11071 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
11073 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11076 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11077 &val
, offset
, sizeof(val
)))
11083 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
11085 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
11088 if (!kvm_pv_async_pf_enabled(vcpu
) ||
11089 (vcpu
->arch
.apf
.send_user_only
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 0))
11095 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
11097 if (unlikely(!lapic_in_kernel(vcpu
) ||
11098 kvm_event_needs_reinjection(vcpu
) ||
11099 vcpu
->arch
.exception
.pending
))
11102 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
11106 * If interrupts are off we cannot even use an artificial
11109 return kvm_arch_interrupt_allowed(vcpu
);
11112 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
11113 struct kvm_async_pf
*work
)
11115 struct x86_exception fault
;
11117 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
11118 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11120 if (kvm_can_deliver_async_pf(vcpu
) &&
11121 !apf_put_user_notpresent(vcpu
)) {
11122 fault
.vector
= PF_VECTOR
;
11123 fault
.error_code_valid
= true;
11124 fault
.error_code
= 0;
11125 fault
.nested_page_fault
= false;
11126 fault
.address
= work
->arch
.token
;
11127 fault
.async_page_fault
= true;
11128 kvm_inject_page_fault(vcpu
, &fault
);
11132 * It is not possible to deliver a paravirtualized asynchronous
11133 * page fault, but putting the guest in an artificial halt state
11134 * can be beneficial nevertheless: if an interrupt arrives, we
11135 * can deliver it timely and perhaps the guest will schedule
11136 * another process. When the instruction that triggered a page
11137 * fault is retried, hopefully the page will be ready in the host.
11139 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
11144 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
11145 struct kvm_async_pf
*work
)
11147 struct kvm_lapic_irq irq
= {
11148 .delivery_mode
= APIC_DM_FIXED
,
11149 .vector
= vcpu
->arch
.apf
.vec
11152 if (work
->wakeup_all
)
11153 work
->arch
.token
= ~0; /* broadcast wakeup */
11155 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11156 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
11158 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
11159 kvm_pv_async_pf_enabled(vcpu
) &&
11160 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
11161 vcpu
->arch
.apf
.pageready_pending
= true;
11162 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
11165 vcpu
->arch
.apf
.halted
= false;
11166 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11169 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
11171 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
11172 if (!vcpu
->arch
.apf
.pageready_pending
)
11173 kvm_vcpu_kick(vcpu
);
11176 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
11178 if (!kvm_pv_async_pf_enabled(vcpu
))
11181 return apf_pageready_slot_free(vcpu
);
11184 void kvm_arch_start_assignment(struct kvm
*kvm
)
11186 atomic_inc(&kvm
->arch
.assigned_device_count
);
11188 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
11190 void kvm_arch_end_assignment(struct kvm
*kvm
)
11192 atomic_dec(&kvm
->arch
.assigned_device_count
);
11194 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
11196 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
11198 return atomic_read(&kvm
->arch
.assigned_device_count
);
11200 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
11202 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
11204 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
11206 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
11208 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
11210 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
11212 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
11214 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
11216 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
11218 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
11220 bool kvm_arch_has_irq_bypass(void)
11225 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
11226 struct irq_bypass_producer
*prod
)
11228 struct kvm_kernel_irqfd
*irqfd
=
11229 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
11232 irqfd
->producer
= prod
;
11233 kvm_arch_start_assignment(irqfd
->kvm
);
11234 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
,
11235 prod
->irq
, irqfd
->gsi
, 1);
11238 kvm_arch_end_assignment(irqfd
->kvm
);
11243 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
11244 struct irq_bypass_producer
*prod
)
11247 struct kvm_kernel_irqfd
*irqfd
=
11248 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
11250 WARN_ON(irqfd
->producer
!= prod
);
11251 irqfd
->producer
= NULL
;
11254 * When producer of consumer is unregistered, we change back to
11255 * remapped mode, so we can re-use the current implementation
11256 * when the irq is masked/disabled or the consumer side (KVM
11257 * int this case doesn't want to receive the interrupts.
11259 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
11261 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
11262 " fails: %d\n", irqfd
->consumer
.token
, ret
);
11264 kvm_arch_end_assignment(irqfd
->kvm
);
11267 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
11268 uint32_t guest_irq
, bool set
)
11270 return static_call(kvm_x86_update_pi_irte
)(kvm
, host_irq
, guest_irq
, set
);
11273 bool kvm_vector_hashing_enabled(void)
11275 return vector_hashing
;
11278 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
11280 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
11282 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
11285 int kvm_spec_ctrl_test_value(u64 value
)
11288 * test that setting IA32_SPEC_CTRL to given value
11289 * is allowed by the host processor
11293 unsigned long flags
;
11296 local_irq_save(flags
);
11298 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
11300 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
11303 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
11305 local_irq_restore(flags
);
11309 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
11311 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
11313 struct x86_exception fault
;
11314 u32 access
= error_code
&
11315 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
11317 if (!(error_code
& PFERR_PRESENT_MASK
) ||
11318 vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
11320 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11321 * tables probably do not match the TLB. Just proceed
11322 * with the error code that the processor gave.
11324 fault
.vector
= PF_VECTOR
;
11325 fault
.error_code_valid
= true;
11326 fault
.error_code
= error_code
;
11327 fault
.nested_page_fault
= false;
11328 fault
.address
= gva
;
11330 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
11332 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
11335 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11336 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11337 * indicates whether exit to userspace is needed.
11339 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
11340 struct x86_exception
*e
)
11342 if (r
== X86EMUL_PROPAGATE_FAULT
) {
11343 kvm_inject_emulated_page_fault(vcpu
, e
);
11348 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11349 * while handling a VMX instruction KVM could've handled the request
11350 * correctly by exiting to userspace and performing I/O but there
11351 * doesn't seem to be a real use-case behind such requests, just return
11352 * KVM_EXIT_INTERNAL_ERROR for now.
11354 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
11355 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
11356 vcpu
->run
->internal
.ndata
= 0;
11360 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
11362 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
11365 struct x86_exception e
;
11367 unsigned long roots_to_free
= 0;
11374 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
11375 if (r
!= X86EMUL_CONTINUE
)
11376 return kvm_handle_memory_failure(vcpu
, r
, &e
);
11378 if (operand
.pcid
>> 12 != 0) {
11379 kvm_inject_gp(vcpu
, 0);
11383 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
11386 case INVPCID_TYPE_INDIV_ADDR
:
11387 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
11388 is_noncanonical_address(operand
.gla
, vcpu
)) {
11389 kvm_inject_gp(vcpu
, 0);
11392 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
11393 return kvm_skip_emulated_instruction(vcpu
);
11395 case INVPCID_TYPE_SINGLE_CTXT
:
11396 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
11397 kvm_inject_gp(vcpu
, 0);
11401 if (kvm_get_active_pcid(vcpu
) == operand
.pcid
) {
11402 kvm_mmu_sync_roots(vcpu
);
11403 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
11406 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
11407 if (kvm_get_pcid(vcpu
, vcpu
->arch
.mmu
->prev_roots
[i
].pgd
)
11409 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
11411 kvm_mmu_free_roots(vcpu
, vcpu
->arch
.mmu
, roots_to_free
);
11413 * If neither the current cr3 nor any of the prev_roots use the
11414 * given PCID, then nothing needs to be done here because a
11415 * resync will happen anyway before switching to any other CR3.
11418 return kvm_skip_emulated_instruction(vcpu
);
11420 case INVPCID_TYPE_ALL_NON_GLOBAL
:
11422 * Currently, KVM doesn't mark global entries in the shadow
11423 * page tables, so a non-global flush just degenerates to a
11424 * global flush. If needed, we could optimize this later by
11425 * keeping track of global entries in shadow page tables.
11429 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
11430 kvm_mmu_unload(vcpu
);
11431 return kvm_skip_emulated_instruction(vcpu
);
11434 BUG(); /* We have already checked above that type <= 3 */
11437 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
11439 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
11441 struct kvm_run
*run
= vcpu
->run
;
11442 struct kvm_mmio_fragment
*frag
;
11445 BUG_ON(!vcpu
->mmio_needed
);
11447 /* Complete previous fragment */
11448 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
11449 len
= min(8u, frag
->len
);
11450 if (!vcpu
->mmio_is_write
)
11451 memcpy(frag
->data
, run
->mmio
.data
, len
);
11453 if (frag
->len
<= 8) {
11454 /* Switch to the next fragment. */
11456 vcpu
->mmio_cur_fragment
++;
11458 /* Go forward to the next mmio piece. */
11464 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
11465 vcpu
->mmio_needed
= 0;
11467 // VMG change, at this point, we're always done
11468 // RIP has already been advanced
11472 // More MMIO is needed
11473 run
->mmio
.phys_addr
= frag
->gpa
;
11474 run
->mmio
.len
= min(8u, frag
->len
);
11475 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
11476 if (run
->mmio
.is_write
)
11477 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11478 run
->exit_reason
= KVM_EXIT_MMIO
;
11480 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11485 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
11489 struct kvm_mmio_fragment
*frag
;
11494 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
11495 if (handled
== bytes
)
11502 /*TODO: Check if need to increment number of frags */
11503 frag
= vcpu
->mmio_fragments
;
11504 vcpu
->mmio_nr_fragments
= 1;
11509 vcpu
->mmio_needed
= 1;
11510 vcpu
->mmio_cur_fragment
= 0;
11512 vcpu
->run
->mmio
.phys_addr
= gpa
;
11513 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
11514 vcpu
->run
->mmio
.is_write
= 1;
11515 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11516 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
11518 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11522 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
11524 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
11528 struct kvm_mmio_fragment
*frag
;
11533 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
11534 if (handled
== bytes
)
11541 /*TODO: Check if need to increment number of frags */
11542 frag
= vcpu
->mmio_fragments
;
11543 vcpu
->mmio_nr_fragments
= 1;
11548 vcpu
->mmio_needed
= 1;
11549 vcpu
->mmio_cur_fragment
= 0;
11551 vcpu
->run
->mmio
.phys_addr
= gpa
;
11552 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
11553 vcpu
->run
->mmio
.is_write
= 0;
11554 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
11556 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11560 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
11562 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
11564 memcpy(vcpu
->arch
.guest_ins_data
, vcpu
->arch
.pio_data
,
11565 vcpu
->arch
.pio
.count
* vcpu
->arch
.pio
.size
);
11566 vcpu
->arch
.pio
.count
= 0;
11571 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
11572 unsigned int port
, void *data
, unsigned int count
)
11576 ret
= emulator_pio_out_emulated(vcpu
->arch
.emulate_ctxt
, size
, port
,
11581 vcpu
->arch
.pio
.count
= 0;
11586 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
11587 unsigned int port
, void *data
, unsigned int count
)
11591 ret
= emulator_pio_in_emulated(vcpu
->arch
.emulate_ctxt
, size
, port
,
11594 vcpu
->arch
.pio
.count
= 0;
11596 vcpu
->arch
.guest_ins_data
= data
;
11597 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
11603 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
11604 unsigned int port
, void *data
, unsigned int count
,
11607 return in
? kvm_sev_es_ins(vcpu
, size
, port
, data
, count
)
11608 : kvm_sev_es_outs(vcpu
, size
, port
, data
, count
);
11610 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
11612 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
11613 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
11614 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
11615 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
11616 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
11617 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
11618 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
11619 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
11620 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
11621 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
11622 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
11623 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
11624 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
11625 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
11626 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
11627 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
11628 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
11629 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
11630 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
11631 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
11632 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
11633 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
11634 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);
11635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
11636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
11637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
11638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);