2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 static bool __read_mostly report_ignored_msrs
= true;
111 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
113 unsigned int min_timer_period_us
= 500;
114 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
116 static bool __read_mostly kvmclock_periodic_sync
= true;
117 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
119 bool __read_mostly kvm_has_tsc_control
;
120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
121 u32 __read_mostly kvm_max_guest_tsc_khz
;
122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
123 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
125 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
127 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
131 static u32 __read_mostly tsc_tolerance_ppm
= 250;
132 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
135 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
136 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
138 static bool __read_mostly vector_hashing
= true;
139 module_param(vector_hashing
, bool, S_IRUGO
);
141 #define KVM_NR_SHARED_MSRS 16
143 struct kvm_shared_msrs_global
{
145 u32 msrs
[KVM_NR_SHARED_MSRS
];
148 struct kvm_shared_msrs
{
149 struct user_return_notifier urn
;
151 struct kvm_shared_msr_values
{
154 } values
[KVM_NR_SHARED_MSRS
];
157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
158 static struct kvm_shared_msrs __percpu
*shared_msrs
;
160 struct kvm_stats_debugfs_item debugfs_entries
[] = {
161 { "pf_fixed", VCPU_STAT(pf_fixed
) },
162 { "pf_guest", VCPU_STAT(pf_guest
) },
163 { "tlb_flush", VCPU_STAT(tlb_flush
) },
164 { "invlpg", VCPU_STAT(invlpg
) },
165 { "exits", VCPU_STAT(exits
) },
166 { "io_exits", VCPU_STAT(io_exits
) },
167 { "mmio_exits", VCPU_STAT(mmio_exits
) },
168 { "signal_exits", VCPU_STAT(signal_exits
) },
169 { "irq_window", VCPU_STAT(irq_window_exits
) },
170 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
171 { "halt_exits", VCPU_STAT(halt_exits
) },
172 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
173 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
174 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
175 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
176 { "hypercalls", VCPU_STAT(hypercalls
) },
177 { "request_irq", VCPU_STAT(request_irq_exits
) },
178 { "irq_exits", VCPU_STAT(irq_exits
) },
179 { "host_state_reload", VCPU_STAT(host_state_reload
) },
180 { "efer_reload", VCPU_STAT(efer_reload
) },
181 { "fpu_reload", VCPU_STAT(fpu_reload
) },
182 { "insn_emulation", VCPU_STAT(insn_emulation
) },
183 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
184 { "irq_injections", VCPU_STAT(irq_injections
) },
185 { "nmi_injections", VCPU_STAT(nmi_injections
) },
186 { "req_event", VCPU_STAT(req_event
) },
187 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
188 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
189 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
190 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
191 { "mmu_flooded", VM_STAT(mmu_flooded
) },
192 { "mmu_recycled", VM_STAT(mmu_recycled
) },
193 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
194 { "mmu_unsync", VM_STAT(mmu_unsync
) },
195 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
196 { "largepages", VM_STAT(lpages
) },
197 { "max_mmu_page_hash_collisions",
198 VM_STAT(max_mmu_page_hash_collisions
) },
202 u64 __read_mostly host_xcr0
;
204 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
206 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
209 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
210 vcpu
->arch
.apf
.gfns
[i
] = ~0;
213 static void kvm_on_user_return(struct user_return_notifier
*urn
)
216 struct kvm_shared_msrs
*locals
217 = container_of(urn
, struct kvm_shared_msrs
, urn
);
218 struct kvm_shared_msr_values
*values
;
222 * Disabling irqs at this point since the following code could be
223 * interrupted and executed through kvm_arch_hardware_disable()
225 local_irq_save(flags
);
226 if (locals
->registered
) {
227 locals
->registered
= false;
228 user_return_notifier_unregister(urn
);
230 local_irq_restore(flags
);
231 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
232 values
= &locals
->values
[slot
];
233 if (values
->host
!= values
->curr
) {
234 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
235 values
->curr
= values
->host
;
240 static void shared_msr_update(unsigned slot
, u32 msr
)
243 unsigned int cpu
= smp_processor_id();
244 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
246 /* only read, and nobody should modify it at this time,
247 * so don't need lock */
248 if (slot
>= shared_msrs_global
.nr
) {
249 printk(KERN_ERR
"kvm: invalid MSR slot!");
252 rdmsrl_safe(msr
, &value
);
253 smsr
->values
[slot
].host
= value
;
254 smsr
->values
[slot
].curr
= value
;
257 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
259 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
260 shared_msrs_global
.msrs
[slot
] = msr
;
261 if (slot
>= shared_msrs_global
.nr
)
262 shared_msrs_global
.nr
= slot
+ 1;
264 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
266 static void kvm_shared_msr_cpu_online(void)
270 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
271 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
274 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
276 unsigned int cpu
= smp_processor_id();
277 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
280 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
282 smsr
->values
[slot
].curr
= value
;
283 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
287 if (!smsr
->registered
) {
288 smsr
->urn
.on_user_return
= kvm_on_user_return
;
289 user_return_notifier_register(&smsr
->urn
);
290 smsr
->registered
= true;
294 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
296 static void drop_user_return_notifiers(void)
298 unsigned int cpu
= smp_processor_id();
299 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
301 if (smsr
->registered
)
302 kvm_on_user_return(&smsr
->urn
);
305 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
307 return vcpu
->arch
.apic_base
;
309 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
311 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
313 u64 old_state
= vcpu
->arch
.apic_base
&
314 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
315 u64 new_state
= msr_info
->data
&
316 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
317 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
318 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
320 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
322 if (!msr_info
->host_initiated
&&
323 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
324 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
325 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
329 kvm_lapic_set_base(vcpu
, msr_info
->data
);
332 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
334 asmlinkage __visible
void kvm_spurious_fault(void)
336 /* Fault while not rebooting. We want the trace. */
339 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
341 #define EXCPT_BENIGN 0
342 #define EXCPT_CONTRIBUTORY 1
345 static int exception_class(int vector
)
355 return EXCPT_CONTRIBUTORY
;
362 #define EXCPT_FAULT 0
364 #define EXCPT_ABORT 2
365 #define EXCPT_INTERRUPT 3
367 static int exception_type(int vector
)
371 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
372 return EXCPT_INTERRUPT
;
376 /* #DB is trap, as instruction watchpoints are handled elsewhere */
377 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
380 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
383 /* Reserved exceptions will result in fault */
387 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
388 unsigned nr
, bool has_error
, u32 error_code
,
394 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
396 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
398 if (has_error
&& !is_protmode(vcpu
))
402 * On vmentry, vcpu->arch.exception.pending is only
403 * true if an event injection was blocked by
404 * nested_run_pending. In that case, however,
405 * vcpu_enter_guest requests an immediate exit,
406 * and the guest shouldn't proceed far enough to
409 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
410 vcpu
->arch
.exception
.injected
= true;
412 vcpu
->arch
.exception
.pending
= true;
413 vcpu
->arch
.exception
.injected
= false;
415 vcpu
->arch
.exception
.has_error_code
= has_error
;
416 vcpu
->arch
.exception
.nr
= nr
;
417 vcpu
->arch
.exception
.error_code
= error_code
;
421 /* to check exception */
422 prev_nr
= vcpu
->arch
.exception
.nr
;
423 if (prev_nr
== DF_VECTOR
) {
424 /* triple fault -> shutdown */
425 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
428 class1
= exception_class(prev_nr
);
429 class2
= exception_class(nr
);
430 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
431 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
433 * Generate double fault per SDM Table 5-5. Set
434 * exception.pending = true so that the double fault
435 * can trigger a nested vmexit.
437 vcpu
->arch
.exception
.pending
= true;
438 vcpu
->arch
.exception
.injected
= false;
439 vcpu
->arch
.exception
.has_error_code
= true;
440 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
441 vcpu
->arch
.exception
.error_code
= 0;
443 /* replace previous exception with a new one in a hope
444 that instruction re-execution will regenerate lost
449 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
451 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
453 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
455 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
457 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
459 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
461 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
464 kvm_inject_gp(vcpu
, 0);
466 return kvm_skip_emulated_instruction(vcpu
);
470 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
472 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
474 ++vcpu
->stat
.pf_guest
;
475 vcpu
->arch
.exception
.nested_apf
=
476 is_guest_mode(vcpu
) && fault
->async_page_fault
;
477 if (vcpu
->arch
.exception
.nested_apf
)
478 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
480 vcpu
->arch
.cr2
= fault
->address
;
481 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
483 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
485 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
487 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
488 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
490 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
492 return fault
->nested_page_fault
;
495 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
497 atomic_inc(&vcpu
->arch
.nmi_queued
);
498 kvm_make_request(KVM_REQ_NMI
, vcpu
);
500 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
502 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
504 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
506 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
508 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
510 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
512 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
515 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
516 * a #GP and return false.
518 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
520 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
522 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
525 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
527 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
529 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
532 kvm_queue_exception(vcpu
, UD_VECTOR
);
535 EXPORT_SYMBOL_GPL(kvm_require_dr
);
538 * This function will be used to read from the physical memory of the currently
539 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
540 * can read from guest physical or from the guest's guest physical memory.
542 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
543 gfn_t ngfn
, void *data
, int offset
, int len
,
546 struct x86_exception exception
;
550 ngpa
= gfn_to_gpa(ngfn
);
551 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
552 if (real_gfn
== UNMAPPED_GVA
)
555 real_gfn
= gpa_to_gfn(real_gfn
);
557 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
559 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
561 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
562 void *data
, int offset
, int len
, u32 access
)
564 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
565 data
, offset
, len
, access
);
569 * Load the pae pdptrs. Return true is they are all valid.
571 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
573 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
574 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
577 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
579 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
580 offset
* sizeof(u64
), sizeof(pdpte
),
581 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
586 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
587 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
589 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
596 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
597 __set_bit(VCPU_EXREG_PDPTR
,
598 (unsigned long *)&vcpu
->arch
.regs_avail
);
599 __set_bit(VCPU_EXREG_PDPTR
,
600 (unsigned long *)&vcpu
->arch
.regs_dirty
);
605 EXPORT_SYMBOL_GPL(load_pdptrs
);
607 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
609 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
615 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
618 if (!test_bit(VCPU_EXREG_PDPTR
,
619 (unsigned long *)&vcpu
->arch
.regs_avail
))
622 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
623 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
624 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
625 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
628 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
633 EXPORT_SYMBOL_GPL(pdptrs_changed
);
635 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
637 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
638 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
643 if (cr0
& 0xffffffff00000000UL
)
647 cr0
&= ~CR0_RESERVED_BITS
;
649 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
652 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
655 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
657 if ((vcpu
->arch
.efer
& EFER_LME
)) {
662 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
667 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
672 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
675 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
677 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
678 kvm_clear_async_pf_completion_queue(vcpu
);
679 kvm_async_pf_hash_reset(vcpu
);
682 if ((cr0
^ old_cr0
) & update_bits
)
683 kvm_mmu_reset_context(vcpu
);
685 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
686 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
687 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
688 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
692 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
694 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
696 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
698 EXPORT_SYMBOL_GPL(kvm_lmsw
);
700 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
702 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
703 !vcpu
->guest_xcr0_loaded
) {
704 /* kvm_set_xcr() also depends on this */
705 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
706 vcpu
->guest_xcr0_loaded
= 1;
710 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
712 if (vcpu
->guest_xcr0_loaded
) {
713 if (vcpu
->arch
.xcr0
!= host_xcr0
)
714 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
715 vcpu
->guest_xcr0_loaded
= 0;
719 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
722 u64 old_xcr0
= vcpu
->arch
.xcr0
;
725 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
726 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
728 if (!(xcr0
& XFEATURE_MASK_FP
))
730 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
734 * Do not allow the guest to set bits that we do not support
735 * saving. However, xcr0 bit 0 is always set, even if the
736 * emulated CPU does not support XSAVE (see fx_init).
738 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
739 if (xcr0
& ~valid_bits
)
742 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
743 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
746 if (xcr0
& XFEATURE_MASK_AVX512
) {
747 if (!(xcr0
& XFEATURE_MASK_YMM
))
749 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
752 vcpu
->arch
.xcr0
= xcr0
;
754 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
755 kvm_update_cpuid(vcpu
);
759 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
761 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
762 __kvm_set_xcr(vcpu
, index
, xcr
)) {
763 kvm_inject_gp(vcpu
, 0);
768 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
770 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
772 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
773 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
774 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
776 if (cr4
& CR4_RESERVED_BITS
)
779 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
782 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
785 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
788 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
791 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
794 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
797 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
800 if (is_long_mode(vcpu
)) {
801 if (!(cr4
& X86_CR4_PAE
))
803 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
804 && ((cr4
^ old_cr4
) & pdptr_bits
)
805 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
809 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
810 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
813 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
814 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
818 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
821 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
822 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
823 kvm_mmu_reset_context(vcpu
);
825 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
826 kvm_update_cpuid(vcpu
);
830 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
832 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
835 cr3
&= ~CR3_PCID_INVD
;
838 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
839 kvm_mmu_sync_roots(vcpu
);
840 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
844 if (is_long_mode(vcpu
) &&
845 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 62)))
847 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
848 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
851 vcpu
->arch
.cr3
= cr3
;
852 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
853 kvm_mmu_new_cr3(vcpu
);
856 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
858 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
860 if (cr8
& CR8_RESERVED_BITS
)
862 if (lapic_in_kernel(vcpu
))
863 kvm_lapic_set_tpr(vcpu
, cr8
);
865 vcpu
->arch
.cr8
= cr8
;
868 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
870 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
872 if (lapic_in_kernel(vcpu
))
873 return kvm_lapic_get_cr8(vcpu
);
875 return vcpu
->arch
.cr8
;
877 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
879 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
883 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
884 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
885 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
886 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
890 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
892 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
893 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
896 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
900 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
901 dr7
= vcpu
->arch
.guest_debug_dr7
;
903 dr7
= vcpu
->arch
.dr7
;
904 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
905 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
906 if (dr7
& DR7_BP_EN_MASK
)
907 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
910 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
912 u64 fixed
= DR6_FIXED_1
;
914 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
919 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
923 vcpu
->arch
.db
[dr
] = val
;
924 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
925 vcpu
->arch
.eff_db
[dr
] = val
;
930 if (val
& 0xffffffff00000000ULL
)
932 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
933 kvm_update_dr6(vcpu
);
938 if (val
& 0xffffffff00000000ULL
)
940 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
941 kvm_update_dr7(vcpu
);
948 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
950 if (__kvm_set_dr(vcpu
, dr
, val
)) {
951 kvm_inject_gp(vcpu
, 0);
956 EXPORT_SYMBOL_GPL(kvm_set_dr
);
958 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
962 *val
= vcpu
->arch
.db
[dr
];
967 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
968 *val
= vcpu
->arch
.dr6
;
970 *val
= kvm_x86_ops
->get_dr6(vcpu
);
975 *val
= vcpu
->arch
.dr7
;
980 EXPORT_SYMBOL_GPL(kvm_get_dr
);
982 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
984 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
988 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
991 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
992 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
995 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
998 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
999 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1001 * This list is modified at module load time to reflect the
1002 * capabilities of the host cpu. This capabilities test skips MSRs that are
1003 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1004 * may depend on host virtualization features rather than host cpu features.
1007 static u32 msrs_to_save
[] = {
1008 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1010 #ifdef CONFIG_X86_64
1011 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1013 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1014 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1015 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1018 static unsigned num_msrs_to_save
;
1020 static u32 emulated_msrs
[] = {
1021 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1022 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1023 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1024 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1025 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1026 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1027 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1029 HV_X64_MSR_VP_INDEX
,
1030 HV_X64_MSR_VP_RUNTIME
,
1031 HV_X64_MSR_SCONTROL
,
1032 HV_X64_MSR_STIMER0_CONFIG
,
1033 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1036 MSR_IA32_TSC_ADJUST
,
1037 MSR_IA32_TSCDEADLINE
,
1038 MSR_IA32_MISC_ENABLE
,
1039 MSR_IA32_MCG_STATUS
,
1041 MSR_IA32_MCG_EXT_CTL
,
1044 MSR_MISC_FEATURES_ENABLES
,
1047 static unsigned num_emulated_msrs
;
1049 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1051 if (efer
& efer_reserved_bits
)
1054 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1057 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1062 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1064 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1066 u64 old_efer
= vcpu
->arch
.efer
;
1068 if (!kvm_valid_efer(vcpu
, efer
))
1072 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1076 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1078 kvm_x86_ops
->set_efer(vcpu
, efer
);
1080 /* Update reserved bits */
1081 if ((efer
^ old_efer
) & EFER_NX
)
1082 kvm_mmu_reset_context(vcpu
);
1087 void kvm_enable_efer_bits(u64 mask
)
1089 efer_reserved_bits
&= ~mask
;
1091 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1094 * Writes msr value into into the appropriate "register".
1095 * Returns 0 on success, non-0 otherwise.
1096 * Assumes vcpu_load() was already called.
1098 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1100 switch (msr
->index
) {
1103 case MSR_KERNEL_GS_BASE
:
1106 if (is_noncanonical_address(msr
->data
, vcpu
))
1109 case MSR_IA32_SYSENTER_EIP
:
1110 case MSR_IA32_SYSENTER_ESP
:
1112 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1113 * non-canonical address is written on Intel but not on
1114 * AMD (which ignores the top 32-bits, because it does
1115 * not implement 64-bit SYSENTER).
1117 * 64-bit code should hence be able to write a non-canonical
1118 * value on AMD. Making the address canonical ensures that
1119 * vmentry does not fail on Intel after writing a non-canonical
1120 * value, and that something deterministic happens if the guest
1121 * invokes 64-bit SYSENTER.
1123 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1125 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1127 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1130 * Adapt set_msr() to msr_io()'s calling convention
1132 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1134 struct msr_data msr
;
1138 msr
.host_initiated
= true;
1139 r
= kvm_get_msr(vcpu
, &msr
);
1147 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1149 struct msr_data msr
;
1153 msr
.host_initiated
= true;
1154 return kvm_set_msr(vcpu
, &msr
);
1157 #ifdef CONFIG_X86_64
1158 struct pvclock_gtod_data
{
1161 struct { /* extract of a clocksource struct */
1174 static struct pvclock_gtod_data pvclock_gtod_data
;
1176 static void update_pvclock_gtod(struct timekeeper
*tk
)
1178 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1181 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1183 write_seqcount_begin(&vdata
->seq
);
1185 /* copy pvclock gtod data */
1186 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1187 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1188 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1189 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1190 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1192 vdata
->boot_ns
= boot_ns
;
1193 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1195 vdata
->wall_time_sec
= tk
->xtime_sec
;
1197 write_seqcount_end(&vdata
->seq
);
1201 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1204 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1205 * vcpu_enter_guest. This function is only called from
1206 * the physical CPU that is running vcpu.
1208 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1211 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1215 struct pvclock_wall_clock wc
;
1216 struct timespec64 boot
;
1221 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1226 ++version
; /* first time write, random junk */
1230 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1234 * The guest calculates current wall clock time by adding
1235 * system time (updated by kvm_guest_time_update below) to the
1236 * wall clock specified here. guest system time equals host
1237 * system time for us, thus we must fill in host boot time here.
1239 getboottime64(&boot
);
1241 if (kvm
->arch
.kvmclock_offset
) {
1242 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1243 boot
= timespec64_sub(boot
, ts
);
1245 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1246 wc
.nsec
= boot
.tv_nsec
;
1247 wc
.version
= version
;
1249 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1252 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1255 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1257 do_shl32_div32(dividend
, divisor
);
1261 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1262 s8
*pshift
, u32
*pmultiplier
)
1270 scaled64
= scaled_hz
;
1271 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1276 tps32
= (uint32_t)tps64
;
1277 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1278 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1286 *pmultiplier
= div_frac(scaled64
, tps32
);
1288 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1289 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1292 #ifdef CONFIG_X86_64
1293 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1296 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1297 static unsigned long max_tsc_khz
;
1299 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1301 u64 v
= (u64
)khz
* (1000000 + ppm
);
1306 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1310 /* Guest TSC same frequency as host TSC? */
1312 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1316 /* TSC scaling supported? */
1317 if (!kvm_has_tsc_control
) {
1318 if (user_tsc_khz
> tsc_khz
) {
1319 vcpu
->arch
.tsc_catchup
= 1;
1320 vcpu
->arch
.tsc_always_catchup
= 1;
1323 WARN(1, "user requested TSC rate below hardware speed\n");
1328 /* TSC scaling required - calculate ratio */
1329 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1330 user_tsc_khz
, tsc_khz
);
1332 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1333 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1338 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1342 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1344 u32 thresh_lo
, thresh_hi
;
1345 int use_scaling
= 0;
1347 /* tsc_khz can be zero if TSC calibration fails */
1348 if (user_tsc_khz
== 0) {
1349 /* set tsc_scaling_ratio to a safe value */
1350 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1354 /* Compute a scale to convert nanoseconds in TSC cycles */
1355 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1356 &vcpu
->arch
.virtual_tsc_shift
,
1357 &vcpu
->arch
.virtual_tsc_mult
);
1358 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1361 * Compute the variation in TSC rate which is acceptable
1362 * within the range of tolerance and decide if the
1363 * rate being applied is within that bounds of the hardware
1364 * rate. If so, no scaling or compensation need be done.
1366 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1367 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1368 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1369 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1372 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1375 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1377 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1378 vcpu
->arch
.virtual_tsc_mult
,
1379 vcpu
->arch
.virtual_tsc_shift
);
1380 tsc
+= vcpu
->arch
.this_tsc_write
;
1384 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1386 #ifdef CONFIG_X86_64
1388 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1389 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1391 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1392 atomic_read(&vcpu
->kvm
->online_vcpus
));
1395 * Once the masterclock is enabled, always perform request in
1396 * order to update it.
1398 * In order to enable masterclock, the host clocksource must be TSC
1399 * and the vcpus need to have matched TSCs. When that happens,
1400 * perform request to enable masterclock.
1402 if (ka
->use_master_clock
||
1403 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1404 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1406 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1407 atomic_read(&vcpu
->kvm
->online_vcpus
),
1408 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1412 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1414 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1415 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1419 * Multiply tsc by a fixed point number represented by ratio.
1421 * The most significant 64-N bits (mult) of ratio represent the
1422 * integral part of the fixed point number; the remaining N bits
1423 * (frac) represent the fractional part, ie. ratio represents a fixed
1424 * point number (mult + frac * 2^(-N)).
1426 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1428 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1430 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1433 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1436 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1438 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1439 _tsc
= __scale_tsc(ratio
, tsc
);
1443 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1445 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1449 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1451 return target_tsc
- tsc
;
1454 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1456 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1458 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1460 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1462 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1463 vcpu
->arch
.tsc_offset
= offset
;
1466 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1468 struct kvm
*kvm
= vcpu
->kvm
;
1469 u64 offset
, ns
, elapsed
;
1470 unsigned long flags
;
1472 bool already_matched
;
1473 u64 data
= msr
->data
;
1474 bool synchronizing
= false;
1476 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1477 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1478 ns
= ktime_get_boot_ns();
1479 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1481 if (vcpu
->arch
.virtual_tsc_khz
) {
1482 if (data
== 0 && msr
->host_initiated
) {
1484 * detection of vcpu initialization -- need to sync
1485 * with other vCPUs. This particularly helps to keep
1486 * kvm_clock stable after CPU hotplug
1488 synchronizing
= true;
1490 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1491 nsec_to_cycles(vcpu
, elapsed
);
1492 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1494 * Special case: TSC write with a small delta (1 second)
1495 * of virtual cycle time against real time is
1496 * interpreted as an attempt to synchronize the CPU.
1498 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1499 data
+ tsc_hz
> tsc_exp
;
1504 * For a reliable TSC, we can match TSC offsets, and for an unstable
1505 * TSC, we add elapsed time in this computation. We could let the
1506 * compensation code attempt to catch up if we fall behind, but
1507 * it's better to try to match offsets from the beginning.
1509 if (synchronizing
&&
1510 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1511 if (!check_tsc_unstable()) {
1512 offset
= kvm
->arch
.cur_tsc_offset
;
1513 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1515 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1517 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1518 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1521 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1524 * We split periods of matched TSC writes into generations.
1525 * For each generation, we track the original measured
1526 * nanosecond time, offset, and write, so if TSCs are in
1527 * sync, we can match exact offset, and if not, we can match
1528 * exact software computation in compute_guest_tsc()
1530 * These values are tracked in kvm->arch.cur_xxx variables.
1532 kvm
->arch
.cur_tsc_generation
++;
1533 kvm
->arch
.cur_tsc_nsec
= ns
;
1534 kvm
->arch
.cur_tsc_write
= data
;
1535 kvm
->arch
.cur_tsc_offset
= offset
;
1537 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1538 kvm
->arch
.cur_tsc_generation
, data
);
1542 * We also track th most recent recorded KHZ, write and time to
1543 * allow the matching interval to be extended at each write.
1545 kvm
->arch
.last_tsc_nsec
= ns
;
1546 kvm
->arch
.last_tsc_write
= data
;
1547 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1549 vcpu
->arch
.last_guest_tsc
= data
;
1551 /* Keep track of which generation this VCPU has synchronized to */
1552 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1553 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1554 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1556 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1557 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1559 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1560 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1562 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1564 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1565 } else if (!already_matched
) {
1566 kvm
->arch
.nr_vcpus_matched_tsc
++;
1569 kvm_track_tsc_matching(vcpu
);
1570 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1573 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1575 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1578 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1581 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1583 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1584 WARN_ON(adjustment
< 0);
1585 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1586 adjust_tsc_offset_guest(vcpu
, adjustment
);
1589 #ifdef CONFIG_X86_64
1591 static u64
read_tsc(void)
1593 u64 ret
= (u64
)rdtsc_ordered();
1594 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1596 if (likely(ret
>= last
))
1600 * GCC likes to generate cmov here, but this branch is extremely
1601 * predictable (it's just a function of time and the likely is
1602 * very likely) and there's a data dependence, so force GCC
1603 * to generate a branch instead. I don't barrier() because
1604 * we don't actually need a barrier, and if this function
1605 * ever gets inlined it will generate worse code.
1611 static inline u64
vgettsc(u64
*cycle_now
)
1614 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1616 *cycle_now
= read_tsc();
1618 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1619 return v
* gtod
->clock
.mult
;
1622 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1624 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1630 seq
= read_seqcount_begin(>od
->seq
);
1631 mode
= gtod
->clock
.vclock_mode
;
1632 ns
= gtod
->nsec_base
;
1633 ns
+= vgettsc(cycle_now
);
1634 ns
>>= gtod
->clock
.shift
;
1635 ns
+= gtod
->boot_ns
;
1636 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1642 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1644 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1650 seq
= read_seqcount_begin(>od
->seq
);
1651 mode
= gtod
->clock
.vclock_mode
;
1652 ts
->tv_sec
= gtod
->wall_time_sec
;
1653 ns
= gtod
->nsec_base
;
1654 ns
+= vgettsc(cycle_now
);
1655 ns
>>= gtod
->clock
.shift
;
1656 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1658 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1664 /* returns true if host is using tsc clocksource */
1665 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1667 /* checked again under seqlock below */
1668 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1671 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1674 /* returns true if host is using tsc clocksource */
1675 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1678 /* checked again under seqlock below */
1679 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1682 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1688 * Assuming a stable TSC across physical CPUS, and a stable TSC
1689 * across virtual CPUs, the following condition is possible.
1690 * Each numbered line represents an event visible to both
1691 * CPUs at the next numbered event.
1693 * "timespecX" represents host monotonic time. "tscX" represents
1696 * VCPU0 on CPU0 | VCPU1 on CPU1
1698 * 1. read timespec0,tsc0
1699 * 2. | timespec1 = timespec0 + N
1701 * 3. transition to guest | transition to guest
1702 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1703 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1704 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1706 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1709 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1711 * - 0 < N - M => M < N
1713 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1714 * always the case (the difference between two distinct xtime instances
1715 * might be smaller then the difference between corresponding TSC reads,
1716 * when updating guest vcpus pvclock areas).
1718 * To avoid that problem, do not allow visibility of distinct
1719 * system_timestamp/tsc_timestamp values simultaneously: use a master
1720 * copy of host monotonic time values. Update that master copy
1723 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1727 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1729 #ifdef CONFIG_X86_64
1730 struct kvm_arch
*ka
= &kvm
->arch
;
1732 bool host_tsc_clocksource
, vcpus_matched
;
1734 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1735 atomic_read(&kvm
->online_vcpus
));
1738 * If the host uses TSC clock, then passthrough TSC as stable
1741 host_tsc_clocksource
= kvm_get_time_and_clockread(
1742 &ka
->master_kernel_ns
,
1743 &ka
->master_cycle_now
);
1745 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1746 && !ka
->backwards_tsc_observed
1747 && !ka
->boot_vcpu_runs_old_kvmclock
;
1749 if (ka
->use_master_clock
)
1750 atomic_set(&kvm_guest_has_master_clock
, 1);
1752 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1753 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1758 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1760 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1763 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1765 #ifdef CONFIG_X86_64
1767 struct kvm_vcpu
*vcpu
;
1768 struct kvm_arch
*ka
= &kvm
->arch
;
1770 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1771 kvm_make_mclock_inprogress_request(kvm
);
1772 /* no guest entries from this point */
1773 pvclock_update_vm_gtod_copy(kvm
);
1775 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1776 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1778 /* guest entries allowed */
1779 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1780 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1782 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1786 u64
get_kvmclock_ns(struct kvm
*kvm
)
1788 struct kvm_arch
*ka
= &kvm
->arch
;
1789 struct pvclock_vcpu_time_info hv_clock
;
1792 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1793 if (!ka
->use_master_clock
) {
1794 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1795 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1798 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1799 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1800 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1802 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1805 if (__this_cpu_read(cpu_tsc_khz
)) {
1806 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1807 &hv_clock
.tsc_shift
,
1808 &hv_clock
.tsc_to_system_mul
);
1809 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1811 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1818 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1820 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1821 struct pvclock_vcpu_time_info guest_hv_clock
;
1823 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1824 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1827 /* This VCPU is paused, but it's legal for a guest to read another
1828 * VCPU's kvmclock, so we really have to follow the specification where
1829 * it says that version is odd if data is being modified, and even after
1832 * Version field updates must be kept separate. This is because
1833 * kvm_write_guest_cached might use a "rep movs" instruction, and
1834 * writes within a string instruction are weakly ordered. So there
1835 * are three writes overall.
1837 * As a small optimization, only write the version field in the first
1838 * and third write. The vcpu->pv_time cache is still valid, because the
1839 * version field is the first in the struct.
1841 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1843 if (guest_hv_clock
.version
& 1)
1844 ++guest_hv_clock
.version
; /* first time write, random junk */
1846 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1847 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1849 sizeof(vcpu
->hv_clock
.version
));
1853 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1854 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1856 if (vcpu
->pvclock_set_guest_stopped_request
) {
1857 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1858 vcpu
->pvclock_set_guest_stopped_request
= false;
1861 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1863 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1865 sizeof(vcpu
->hv_clock
));
1869 vcpu
->hv_clock
.version
++;
1870 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1872 sizeof(vcpu
->hv_clock
.version
));
1875 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1877 unsigned long flags
, tgt_tsc_khz
;
1878 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1879 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1881 u64 tsc_timestamp
, host_tsc
;
1883 bool use_master_clock
;
1889 * If the host uses TSC clock, then passthrough TSC as stable
1892 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1893 use_master_clock
= ka
->use_master_clock
;
1894 if (use_master_clock
) {
1895 host_tsc
= ka
->master_cycle_now
;
1896 kernel_ns
= ka
->master_kernel_ns
;
1898 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1900 /* Keep irq disabled to prevent changes to the clock */
1901 local_irq_save(flags
);
1902 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1903 if (unlikely(tgt_tsc_khz
== 0)) {
1904 local_irq_restore(flags
);
1905 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1908 if (!use_master_clock
) {
1910 kernel_ns
= ktime_get_boot_ns();
1913 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1916 * We may have to catch up the TSC to match elapsed wall clock
1917 * time for two reasons, even if kvmclock is used.
1918 * 1) CPU could have been running below the maximum TSC rate
1919 * 2) Broken TSC compensation resets the base at each VCPU
1920 * entry to avoid unknown leaps of TSC even when running
1921 * again on the same CPU. This may cause apparent elapsed
1922 * time to disappear, and the guest to stand still or run
1925 if (vcpu
->tsc_catchup
) {
1926 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1927 if (tsc
> tsc_timestamp
) {
1928 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1929 tsc_timestamp
= tsc
;
1933 local_irq_restore(flags
);
1935 /* With all the info we got, fill in the values */
1937 if (kvm_has_tsc_control
)
1938 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1940 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1941 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1942 &vcpu
->hv_clock
.tsc_shift
,
1943 &vcpu
->hv_clock
.tsc_to_system_mul
);
1944 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1947 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1948 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1949 vcpu
->last_guest_tsc
= tsc_timestamp
;
1951 /* If the host uses TSC clocksource, then it is stable */
1953 if (use_master_clock
)
1954 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1956 vcpu
->hv_clock
.flags
= pvclock_flags
;
1958 if (vcpu
->pv_time_enabled
)
1959 kvm_setup_pvclock_page(v
);
1960 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1961 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1966 * kvmclock updates which are isolated to a given vcpu, such as
1967 * vcpu->cpu migration, should not allow system_timestamp from
1968 * the rest of the vcpus to remain static. Otherwise ntp frequency
1969 * correction applies to one vcpu's system_timestamp but not
1972 * So in those cases, request a kvmclock update for all vcpus.
1973 * We need to rate-limit these requests though, as they can
1974 * considerably slow guests that have a large number of vcpus.
1975 * The time for a remote vcpu to update its kvmclock is bound
1976 * by the delay we use to rate-limit the updates.
1979 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1981 static void kvmclock_update_fn(struct work_struct
*work
)
1984 struct delayed_work
*dwork
= to_delayed_work(work
);
1985 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1986 kvmclock_update_work
);
1987 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1988 struct kvm_vcpu
*vcpu
;
1990 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1991 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1992 kvm_vcpu_kick(vcpu
);
1996 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1998 struct kvm
*kvm
= v
->kvm
;
2000 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2001 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2002 KVMCLOCK_UPDATE_DELAY
);
2005 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2007 static void kvmclock_sync_fn(struct work_struct
*work
)
2009 struct delayed_work
*dwork
= to_delayed_work(work
);
2010 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2011 kvmclock_sync_work
);
2012 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2014 if (!kvmclock_periodic_sync
)
2017 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2018 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2019 KVMCLOCK_SYNC_PERIOD
);
2022 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2024 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2025 unsigned bank_num
= mcg_cap
& 0xff;
2026 u32 msr
= msr_info
->index
;
2027 u64 data
= msr_info
->data
;
2030 case MSR_IA32_MCG_STATUS
:
2031 vcpu
->arch
.mcg_status
= data
;
2033 case MSR_IA32_MCG_CTL
:
2034 if (!(mcg_cap
& MCG_CTL_P
))
2036 if (data
!= 0 && data
!= ~(u64
)0)
2038 vcpu
->arch
.mcg_ctl
= data
;
2041 if (msr
>= MSR_IA32_MC0_CTL
&&
2042 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2043 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2044 /* only 0 or all 1s can be written to IA32_MCi_CTL
2045 * some Linux kernels though clear bit 10 in bank 4 to
2046 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2047 * this to avoid an uncatched #GP in the guest
2049 if ((offset
& 0x3) == 0 &&
2050 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2052 if (!msr_info
->host_initiated
&&
2053 (offset
& 0x3) == 1 && data
!= 0)
2055 vcpu
->arch
.mce_banks
[offset
] = data
;
2063 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2065 struct kvm
*kvm
= vcpu
->kvm
;
2066 int lm
= is_long_mode(vcpu
);
2067 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2068 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2069 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2070 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2071 u32 page_num
= data
& ~PAGE_MASK
;
2072 u64 page_addr
= data
& PAGE_MASK
;
2077 if (page_num
>= blob_size
)
2080 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2085 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2094 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2096 gpa_t gpa
= data
& ~0x3f;
2098 /* Bits 3:5 are reserved, Should be zero */
2102 vcpu
->arch
.apf
.msr_val
= data
;
2104 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2105 kvm_clear_async_pf_completion_queue(vcpu
);
2106 kvm_async_pf_hash_reset(vcpu
);
2110 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2114 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2115 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2116 kvm_async_pf_wakeup_all(vcpu
);
2120 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2122 vcpu
->arch
.pv_time_enabled
= false;
2125 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2127 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2130 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2131 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2134 vcpu
->arch
.st
.steal
.preempted
= 0;
2136 if (vcpu
->arch
.st
.steal
.version
& 1)
2137 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2139 vcpu
->arch
.st
.steal
.version
+= 1;
2141 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2142 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2146 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2147 vcpu
->arch
.st
.last_steal
;
2148 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2150 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2151 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2155 vcpu
->arch
.st
.steal
.version
+= 1;
2157 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2158 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2161 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2164 u32 msr
= msr_info
->index
;
2165 u64 data
= msr_info
->data
;
2168 case MSR_AMD64_NB_CFG
:
2169 case MSR_IA32_UCODE_REV
:
2170 case MSR_IA32_UCODE_WRITE
:
2171 case MSR_VM_HSAVE_PA
:
2172 case MSR_AMD64_PATCH_LOADER
:
2173 case MSR_AMD64_BU_CFG2
:
2174 case MSR_AMD64_DC_CFG
:
2178 return set_efer(vcpu
, data
);
2180 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2181 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2182 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2183 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2185 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2190 case MSR_FAM10H_MMIO_CONF_BASE
:
2192 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2197 case MSR_IA32_DEBUGCTLMSR
:
2199 /* We support the non-activated case already */
2201 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2202 /* Values other than LBR and BTF are vendor-specific,
2203 thus reserved and should throw a #GP */
2206 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2209 case 0x200 ... 0x2ff:
2210 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2211 case MSR_IA32_APICBASE
:
2212 return kvm_set_apic_base(vcpu
, msr_info
);
2213 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2214 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2215 case MSR_IA32_TSCDEADLINE
:
2216 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2218 case MSR_IA32_TSC_ADJUST
:
2219 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2220 if (!msr_info
->host_initiated
) {
2221 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2222 adjust_tsc_offset_guest(vcpu
, adj
);
2224 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2227 case MSR_IA32_MISC_ENABLE
:
2228 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2230 case MSR_IA32_SMBASE
:
2231 if (!msr_info
->host_initiated
)
2233 vcpu
->arch
.smbase
= data
;
2235 case MSR_KVM_WALL_CLOCK_NEW
:
2236 case MSR_KVM_WALL_CLOCK
:
2237 vcpu
->kvm
->arch
.wall_clock
= data
;
2238 kvm_write_wall_clock(vcpu
->kvm
, data
);
2240 case MSR_KVM_SYSTEM_TIME_NEW
:
2241 case MSR_KVM_SYSTEM_TIME
: {
2242 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2244 kvmclock_reset(vcpu
);
2246 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2247 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2249 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2250 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2252 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2255 vcpu
->arch
.time
= data
;
2256 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2258 /* we verify if the enable bit is set... */
2262 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2263 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2264 sizeof(struct pvclock_vcpu_time_info
)))
2265 vcpu
->arch
.pv_time_enabled
= false;
2267 vcpu
->arch
.pv_time_enabled
= true;
2271 case MSR_KVM_ASYNC_PF_EN
:
2272 if (kvm_pv_enable_async_pf(vcpu
, data
))
2275 case MSR_KVM_STEAL_TIME
:
2277 if (unlikely(!sched_info_on()))
2280 if (data
& KVM_STEAL_RESERVED_MASK
)
2283 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2284 data
& KVM_STEAL_VALID_BITS
,
2285 sizeof(struct kvm_steal_time
)))
2288 vcpu
->arch
.st
.msr_val
= data
;
2290 if (!(data
& KVM_MSR_ENABLED
))
2293 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2296 case MSR_KVM_PV_EOI_EN
:
2297 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2301 case MSR_IA32_MCG_CTL
:
2302 case MSR_IA32_MCG_STATUS
:
2303 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2304 return set_msr_mce(vcpu
, msr_info
);
2306 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2307 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2308 pr
= true; /* fall through */
2309 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2310 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2311 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2312 return kvm_pmu_set_msr(vcpu
, msr_info
);
2314 if (pr
|| data
!= 0)
2315 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2316 "0x%x data 0x%llx\n", msr
, data
);
2318 case MSR_K7_CLK_CTL
:
2320 * Ignore all writes to this no longer documented MSR.
2321 * Writes are only relevant for old K7 processors,
2322 * all pre-dating SVM, but a recommended workaround from
2323 * AMD for these chips. It is possible to specify the
2324 * affected processor models on the command line, hence
2325 * the need to ignore the workaround.
2328 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2329 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2330 case HV_X64_MSR_CRASH_CTL
:
2331 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2332 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2333 msr_info
->host_initiated
);
2334 case MSR_IA32_BBL_CR_CTL3
:
2335 /* Drop writes to this legacy MSR -- see rdmsr
2336 * counterpart for further detail.
2338 if (report_ignored_msrs
)
2339 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2342 case MSR_AMD64_OSVW_ID_LENGTH
:
2343 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2345 vcpu
->arch
.osvw
.length
= data
;
2347 case MSR_AMD64_OSVW_STATUS
:
2348 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2350 vcpu
->arch
.osvw
.status
= data
;
2352 case MSR_PLATFORM_INFO
:
2353 if (!msr_info
->host_initiated
||
2354 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2355 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2356 cpuid_fault_enabled(vcpu
)))
2358 vcpu
->arch
.msr_platform_info
= data
;
2360 case MSR_MISC_FEATURES_ENABLES
:
2361 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2362 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2363 !supports_cpuid_fault(vcpu
)))
2365 vcpu
->arch
.msr_misc_features_enables
= data
;
2368 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2369 return xen_hvm_config(vcpu
, data
);
2370 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2371 return kvm_pmu_set_msr(vcpu
, msr_info
);
2373 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2377 if (report_ignored_msrs
)
2379 "ignored wrmsr: 0x%x data 0x%llx\n",
2386 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2390 * Reads an msr value (of 'msr_index') into 'pdata'.
2391 * Returns 0 on success, non-0 otherwise.
2392 * Assumes vcpu_load() was already called.
2394 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2396 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2398 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2400 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2403 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2404 unsigned bank_num
= mcg_cap
& 0xff;
2407 case MSR_IA32_P5_MC_ADDR
:
2408 case MSR_IA32_P5_MC_TYPE
:
2411 case MSR_IA32_MCG_CAP
:
2412 data
= vcpu
->arch
.mcg_cap
;
2414 case MSR_IA32_MCG_CTL
:
2415 if (!(mcg_cap
& MCG_CTL_P
))
2417 data
= vcpu
->arch
.mcg_ctl
;
2419 case MSR_IA32_MCG_STATUS
:
2420 data
= vcpu
->arch
.mcg_status
;
2423 if (msr
>= MSR_IA32_MC0_CTL
&&
2424 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2425 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2426 data
= vcpu
->arch
.mce_banks
[offset
];
2435 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2437 switch (msr_info
->index
) {
2438 case MSR_IA32_PLATFORM_ID
:
2439 case MSR_IA32_EBL_CR_POWERON
:
2440 case MSR_IA32_DEBUGCTLMSR
:
2441 case MSR_IA32_LASTBRANCHFROMIP
:
2442 case MSR_IA32_LASTBRANCHTOIP
:
2443 case MSR_IA32_LASTINTFROMIP
:
2444 case MSR_IA32_LASTINTTOIP
:
2446 case MSR_K8_TSEG_ADDR
:
2447 case MSR_K8_TSEG_MASK
:
2449 case MSR_VM_HSAVE_PA
:
2450 case MSR_K8_INT_PENDING_MSG
:
2451 case MSR_AMD64_NB_CFG
:
2452 case MSR_FAM10H_MMIO_CONF_BASE
:
2453 case MSR_AMD64_BU_CFG2
:
2454 case MSR_IA32_PERF_CTL
:
2455 case MSR_AMD64_DC_CFG
:
2458 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2459 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2460 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2461 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2462 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2463 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2466 case MSR_IA32_UCODE_REV
:
2467 msr_info
->data
= 0x100000000ULL
;
2470 case 0x200 ... 0x2ff:
2471 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2472 case 0xcd: /* fsb frequency */
2476 * MSR_EBC_FREQUENCY_ID
2477 * Conservative value valid for even the basic CPU models.
2478 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2479 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2480 * and 266MHz for model 3, or 4. Set Core Clock
2481 * Frequency to System Bus Frequency Ratio to 1 (bits
2482 * 31:24) even though these are only valid for CPU
2483 * models > 2, however guests may end up dividing or
2484 * multiplying by zero otherwise.
2486 case MSR_EBC_FREQUENCY_ID
:
2487 msr_info
->data
= 1 << 24;
2489 case MSR_IA32_APICBASE
:
2490 msr_info
->data
= kvm_get_apic_base(vcpu
);
2492 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2493 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2495 case MSR_IA32_TSCDEADLINE
:
2496 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2498 case MSR_IA32_TSC_ADJUST
:
2499 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2501 case MSR_IA32_MISC_ENABLE
:
2502 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2504 case MSR_IA32_SMBASE
:
2505 if (!msr_info
->host_initiated
)
2507 msr_info
->data
= vcpu
->arch
.smbase
;
2509 case MSR_IA32_PERF_STATUS
:
2510 /* TSC increment by tick */
2511 msr_info
->data
= 1000ULL;
2512 /* CPU multiplier */
2513 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2516 msr_info
->data
= vcpu
->arch
.efer
;
2518 case MSR_KVM_WALL_CLOCK
:
2519 case MSR_KVM_WALL_CLOCK_NEW
:
2520 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2522 case MSR_KVM_SYSTEM_TIME
:
2523 case MSR_KVM_SYSTEM_TIME_NEW
:
2524 msr_info
->data
= vcpu
->arch
.time
;
2526 case MSR_KVM_ASYNC_PF_EN
:
2527 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2529 case MSR_KVM_STEAL_TIME
:
2530 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2532 case MSR_KVM_PV_EOI_EN
:
2533 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2535 case MSR_IA32_P5_MC_ADDR
:
2536 case MSR_IA32_P5_MC_TYPE
:
2537 case MSR_IA32_MCG_CAP
:
2538 case MSR_IA32_MCG_CTL
:
2539 case MSR_IA32_MCG_STATUS
:
2540 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2541 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2542 case MSR_K7_CLK_CTL
:
2544 * Provide expected ramp-up count for K7. All other
2545 * are set to zero, indicating minimum divisors for
2548 * This prevents guest kernels on AMD host with CPU
2549 * type 6, model 8 and higher from exploding due to
2550 * the rdmsr failing.
2552 msr_info
->data
= 0x20000000;
2554 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2555 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2556 case HV_X64_MSR_CRASH_CTL
:
2557 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2558 return kvm_hv_get_msr_common(vcpu
,
2559 msr_info
->index
, &msr_info
->data
);
2561 case MSR_IA32_BBL_CR_CTL3
:
2562 /* This legacy MSR exists but isn't fully documented in current
2563 * silicon. It is however accessed by winxp in very narrow
2564 * scenarios where it sets bit #19, itself documented as
2565 * a "reserved" bit. Best effort attempt to source coherent
2566 * read data here should the balance of the register be
2567 * interpreted by the guest:
2569 * L2 cache control register 3: 64GB range, 256KB size,
2570 * enabled, latency 0x1, configured
2572 msr_info
->data
= 0xbe702111;
2574 case MSR_AMD64_OSVW_ID_LENGTH
:
2575 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2577 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2579 case MSR_AMD64_OSVW_STATUS
:
2580 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2582 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2584 case MSR_PLATFORM_INFO
:
2585 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2587 case MSR_MISC_FEATURES_ENABLES
:
2588 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2591 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2592 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2594 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2598 if (report_ignored_msrs
)
2599 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2607 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2610 * Read or write a bunch of msrs. All parameters are kernel addresses.
2612 * @return number of msrs set successfully.
2614 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2615 struct kvm_msr_entry
*entries
,
2616 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2617 unsigned index
, u64
*data
))
2621 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2622 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2623 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2625 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2631 * Read or write a bunch of msrs. Parameters are user addresses.
2633 * @return number of msrs set successfully.
2635 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2636 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2637 unsigned index
, u64
*data
),
2640 struct kvm_msrs msrs
;
2641 struct kvm_msr_entry
*entries
;
2646 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2650 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2653 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2654 entries
= memdup_user(user_msrs
->entries
, size
);
2655 if (IS_ERR(entries
)) {
2656 r
= PTR_ERR(entries
);
2660 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2665 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2676 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2681 case KVM_CAP_IRQCHIP
:
2683 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2684 case KVM_CAP_SET_TSS_ADDR
:
2685 case KVM_CAP_EXT_CPUID
:
2686 case KVM_CAP_EXT_EMUL_CPUID
:
2687 case KVM_CAP_CLOCKSOURCE
:
2689 case KVM_CAP_NOP_IO_DELAY
:
2690 case KVM_CAP_MP_STATE
:
2691 case KVM_CAP_SYNC_MMU
:
2692 case KVM_CAP_USER_NMI
:
2693 case KVM_CAP_REINJECT_CONTROL
:
2694 case KVM_CAP_IRQ_INJECT_STATUS
:
2695 case KVM_CAP_IOEVENTFD
:
2696 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2698 case KVM_CAP_PIT_STATE2
:
2699 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2700 case KVM_CAP_XEN_HVM
:
2701 case KVM_CAP_VCPU_EVENTS
:
2702 case KVM_CAP_HYPERV
:
2703 case KVM_CAP_HYPERV_VAPIC
:
2704 case KVM_CAP_HYPERV_SPIN
:
2705 case KVM_CAP_HYPERV_SYNIC
:
2706 case KVM_CAP_HYPERV_SYNIC2
:
2707 case KVM_CAP_HYPERV_VP_INDEX
:
2708 case KVM_CAP_PCI_SEGMENT
:
2709 case KVM_CAP_DEBUGREGS
:
2710 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2712 case KVM_CAP_ASYNC_PF
:
2713 case KVM_CAP_GET_TSC_KHZ
:
2714 case KVM_CAP_KVMCLOCK_CTRL
:
2715 case KVM_CAP_READONLY_MEM
:
2716 case KVM_CAP_HYPERV_TIME
:
2717 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2718 case KVM_CAP_TSC_DEADLINE_TIMER
:
2719 case KVM_CAP_ENABLE_CAP_VM
:
2720 case KVM_CAP_DISABLE_QUIRKS
:
2721 case KVM_CAP_SET_BOOT_CPU_ID
:
2722 case KVM_CAP_SPLIT_IRQCHIP
:
2723 case KVM_CAP_IMMEDIATE_EXIT
:
2726 case KVM_CAP_ADJUST_CLOCK
:
2727 r
= KVM_CLOCK_TSC_STABLE
;
2729 case KVM_CAP_X86_GUEST_MWAIT
:
2730 r
= kvm_mwait_in_guest();
2732 case KVM_CAP_X86_SMM
:
2733 /* SMBASE is usually relocated above 1M on modern chipsets,
2734 * and SMM handlers might indeed rely on 4G segment limits,
2735 * so do not report SMM to be available if real mode is
2736 * emulated via vm86 mode. Still, do not go to great lengths
2737 * to avoid userspace's usage of the feature, because it is a
2738 * fringe case that is not enabled except via specific settings
2739 * of the module parameters.
2741 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2744 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2746 case KVM_CAP_NR_VCPUS
:
2747 r
= KVM_SOFT_MAX_VCPUS
;
2749 case KVM_CAP_MAX_VCPUS
:
2752 case KVM_CAP_NR_MEMSLOTS
:
2753 r
= KVM_USER_MEM_SLOTS
;
2755 case KVM_CAP_PV_MMU
: /* obsolete */
2759 r
= KVM_MAX_MCE_BANKS
;
2762 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2764 case KVM_CAP_TSC_CONTROL
:
2765 r
= kvm_has_tsc_control
;
2767 case KVM_CAP_X2APIC_API
:
2768 r
= KVM_X2APIC_API_VALID_FLAGS
;
2778 long kvm_arch_dev_ioctl(struct file
*filp
,
2779 unsigned int ioctl
, unsigned long arg
)
2781 void __user
*argp
= (void __user
*)arg
;
2785 case KVM_GET_MSR_INDEX_LIST
: {
2786 struct kvm_msr_list __user
*user_msr_list
= argp
;
2787 struct kvm_msr_list msr_list
;
2791 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2794 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2795 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2798 if (n
< msr_list
.nmsrs
)
2801 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2802 num_msrs_to_save
* sizeof(u32
)))
2804 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2806 num_emulated_msrs
* sizeof(u32
)))
2811 case KVM_GET_SUPPORTED_CPUID
:
2812 case KVM_GET_EMULATED_CPUID
: {
2813 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2814 struct kvm_cpuid2 cpuid
;
2817 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2820 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2826 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2831 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2833 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2834 sizeof(kvm_mce_cap_supported
)))
2846 static void wbinvd_ipi(void *garbage
)
2851 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2853 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2856 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2858 /* Address WBINVD may be executed by guest */
2859 if (need_emulate_wbinvd(vcpu
)) {
2860 if (kvm_x86_ops
->has_wbinvd_exit())
2861 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2862 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2863 smp_call_function_single(vcpu
->cpu
,
2864 wbinvd_ipi
, NULL
, 1);
2867 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2869 /* Apply any externally detected TSC adjustments (due to suspend) */
2870 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2871 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2872 vcpu
->arch
.tsc_offset_adjustment
= 0;
2873 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2876 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2877 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2878 rdtsc() - vcpu
->arch
.last_host_tsc
;
2880 mark_tsc_unstable("KVM discovered backwards TSC");
2882 if (check_tsc_unstable()) {
2883 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2884 vcpu
->arch
.last_guest_tsc
);
2885 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2886 vcpu
->arch
.tsc_catchup
= 1;
2889 if (kvm_lapic_hv_timer_in_use(vcpu
))
2890 kvm_lapic_restart_hv_timer(vcpu
);
2893 * On a host with synchronized TSC, there is no need to update
2894 * kvmclock on vcpu->cpu migration
2896 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2897 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2898 if (vcpu
->cpu
!= cpu
)
2899 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2903 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2906 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2908 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2911 vcpu
->arch
.st
.steal
.preempted
= 1;
2913 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2914 &vcpu
->arch
.st
.steal
.preempted
,
2915 offsetof(struct kvm_steal_time
, preempted
),
2916 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2919 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2923 if (vcpu
->preempted
)
2924 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
2927 * Disable page faults because we're in atomic context here.
2928 * kvm_write_guest_offset_cached() would call might_fault()
2929 * that relies on pagefault_disable() to tell if there's a
2930 * bug. NOTE: the write to guest memory may not go through if
2931 * during postcopy live migration or if there's heavy guest
2934 pagefault_disable();
2936 * kvm_memslots() will be called by
2937 * kvm_write_guest_offset_cached() so take the srcu lock.
2939 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2940 kvm_steal_time_set_preempted(vcpu
);
2941 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2943 kvm_x86_ops
->vcpu_put(vcpu
);
2944 vcpu
->arch
.last_host_tsc
= rdtsc();
2946 * If userspace has set any breakpoints or watchpoints, dr6 is restored
2947 * on every vmexit, but if not, we might have a stale dr6 from the
2948 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
2953 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2954 struct kvm_lapic_state
*s
)
2956 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2957 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2959 return kvm_apic_get_state(vcpu
, s
);
2962 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2963 struct kvm_lapic_state
*s
)
2967 r
= kvm_apic_set_state(vcpu
, s
);
2970 update_cr8_intercept(vcpu
);
2975 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2977 return (!lapic_in_kernel(vcpu
) ||
2978 kvm_apic_accept_pic_intr(vcpu
));
2982 * if userspace requested an interrupt window, check that the
2983 * interrupt window is open.
2985 * No need to exit to userspace if we already have an interrupt queued.
2987 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2989 return kvm_arch_interrupt_allowed(vcpu
) &&
2990 !kvm_cpu_has_interrupt(vcpu
) &&
2991 !kvm_event_needs_reinjection(vcpu
) &&
2992 kvm_cpu_accept_dm_intr(vcpu
);
2995 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2996 struct kvm_interrupt
*irq
)
2998 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3001 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3002 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3003 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3008 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3009 * fail for in-kernel 8259.
3011 if (pic_in_kernel(vcpu
->kvm
))
3014 if (vcpu
->arch
.pending_external_vector
!= -1)
3017 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3018 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3022 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3024 kvm_inject_nmi(vcpu
);
3029 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3031 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3036 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3037 struct kvm_tpr_access_ctl
*tac
)
3041 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3045 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3049 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3052 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3054 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3057 vcpu
->arch
.mcg_cap
= mcg_cap
;
3058 /* Init IA32_MCG_CTL to all 1s */
3059 if (mcg_cap
& MCG_CTL_P
)
3060 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3061 /* Init IA32_MCi_CTL to all 1s */
3062 for (bank
= 0; bank
< bank_num
; bank
++)
3063 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3065 if (kvm_x86_ops
->setup_mce
)
3066 kvm_x86_ops
->setup_mce(vcpu
);
3071 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3072 struct kvm_x86_mce
*mce
)
3074 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3075 unsigned bank_num
= mcg_cap
& 0xff;
3076 u64
*banks
= vcpu
->arch
.mce_banks
;
3078 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3081 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3082 * reporting is disabled
3084 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3085 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3087 banks
+= 4 * mce
->bank
;
3089 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3090 * reporting is disabled for the bank
3092 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3094 if (mce
->status
& MCI_STATUS_UC
) {
3095 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3096 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3097 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3100 if (banks
[1] & MCI_STATUS_VAL
)
3101 mce
->status
|= MCI_STATUS_OVER
;
3102 banks
[2] = mce
->addr
;
3103 banks
[3] = mce
->misc
;
3104 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3105 banks
[1] = mce
->status
;
3106 kvm_queue_exception(vcpu
, MC_VECTOR
);
3107 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3108 || !(banks
[1] & MCI_STATUS_UC
)) {
3109 if (banks
[1] & MCI_STATUS_VAL
)
3110 mce
->status
|= MCI_STATUS_OVER
;
3111 banks
[2] = mce
->addr
;
3112 banks
[3] = mce
->misc
;
3113 banks
[1] = mce
->status
;
3115 banks
[1] |= MCI_STATUS_OVER
;
3119 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3120 struct kvm_vcpu_events
*events
)
3124 * FIXME: pass injected and pending separately. This is only
3125 * needed for nested virtualization, whose state cannot be
3126 * migrated yet. For now we can combine them.
3128 events
->exception
.injected
=
3129 (vcpu
->arch
.exception
.pending
||
3130 vcpu
->arch
.exception
.injected
) &&
3131 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3132 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3133 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3134 events
->exception
.pad
= 0;
3135 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3137 events
->interrupt
.injected
=
3138 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3139 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3140 events
->interrupt
.soft
= 0;
3141 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3143 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3144 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3145 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3146 events
->nmi
.pad
= 0;
3148 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3150 events
->smi
.smm
= is_smm(vcpu
);
3151 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3152 events
->smi
.smm_inside_nmi
=
3153 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3154 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3156 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3157 | KVM_VCPUEVENT_VALID_SHADOW
3158 | KVM_VCPUEVENT_VALID_SMM
);
3159 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3162 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3164 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3165 struct kvm_vcpu_events
*events
)
3167 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3168 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3169 | KVM_VCPUEVENT_VALID_SHADOW
3170 | KVM_VCPUEVENT_VALID_SMM
))
3173 if (events
->exception
.injected
&&
3174 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3175 is_guest_mode(vcpu
)))
3178 /* INITs are latched while in SMM */
3179 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3180 (events
->smi
.smm
|| events
->smi
.pending
) &&
3181 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3185 vcpu
->arch
.exception
.injected
= false;
3186 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3187 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3188 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3189 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3191 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3192 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3193 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3194 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3195 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3196 events
->interrupt
.shadow
);
3198 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3199 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3200 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3201 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3203 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3204 lapic_in_kernel(vcpu
))
3205 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3207 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3208 u32 hflags
= vcpu
->arch
.hflags
;
3209 if (events
->smi
.smm
)
3210 hflags
|= HF_SMM_MASK
;
3212 hflags
&= ~HF_SMM_MASK
;
3213 kvm_set_hflags(vcpu
, hflags
);
3215 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3217 if (events
->smi
.smm
) {
3218 if (events
->smi
.smm_inside_nmi
)
3219 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3221 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3222 if (lapic_in_kernel(vcpu
)) {
3223 if (events
->smi
.latched_init
)
3224 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3226 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3231 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3236 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3237 struct kvm_debugregs
*dbgregs
)
3241 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3242 kvm_get_dr(vcpu
, 6, &val
);
3244 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3246 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3249 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3250 struct kvm_debugregs
*dbgregs
)
3255 if (dbgregs
->dr6
& ~0xffffffffull
)
3257 if (dbgregs
->dr7
& ~0xffffffffull
)
3260 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3261 kvm_update_dr0123(vcpu
);
3262 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3263 kvm_update_dr6(vcpu
);
3264 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3265 kvm_update_dr7(vcpu
);
3270 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3272 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3274 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3275 u64 xstate_bv
= xsave
->header
.xfeatures
;
3279 * Copy legacy XSAVE area, to avoid complications with CPUID
3280 * leaves 0 and 1 in the loop below.
3282 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3285 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3286 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3289 * Copy each region from the possibly compacted offset to the
3290 * non-compacted offset.
3292 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3294 u64 feature
= valid
& -valid
;
3295 int index
= fls64(feature
) - 1;
3296 void *src
= get_xsave_addr(xsave
, feature
);
3299 u32 size
, offset
, ecx
, edx
;
3300 cpuid_count(XSTATE_CPUID
, index
,
3301 &size
, &offset
, &ecx
, &edx
);
3302 if (feature
== XFEATURE_MASK_PKRU
)
3303 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3304 sizeof(vcpu
->arch
.pkru
));
3306 memcpy(dest
+ offset
, src
, size
);
3314 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3316 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3317 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3321 * Copy legacy XSAVE area, to avoid complications with CPUID
3322 * leaves 0 and 1 in the loop below.
3324 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3326 /* Set XSTATE_BV and possibly XCOMP_BV. */
3327 xsave
->header
.xfeatures
= xstate_bv
;
3328 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3329 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3332 * Copy each region from the non-compacted offset to the
3333 * possibly compacted offset.
3335 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3337 u64 feature
= valid
& -valid
;
3338 int index
= fls64(feature
) - 1;
3339 void *dest
= get_xsave_addr(xsave
, feature
);
3342 u32 size
, offset
, ecx
, edx
;
3343 cpuid_count(XSTATE_CPUID
, index
,
3344 &size
, &offset
, &ecx
, &edx
);
3345 if (feature
== XFEATURE_MASK_PKRU
)
3346 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3347 sizeof(vcpu
->arch
.pkru
));
3349 memcpy(dest
, src
+ offset
, size
);
3356 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3357 struct kvm_xsave
*guest_xsave
)
3359 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3360 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3361 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3363 memcpy(guest_xsave
->region
,
3364 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3365 sizeof(struct fxregs_state
));
3366 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3367 XFEATURE_MASK_FPSSE
;
3371 #define XSAVE_MXCSR_OFFSET 24
3373 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3374 struct kvm_xsave
*guest_xsave
)
3377 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3378 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3380 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3382 * Here we allow setting states that are not present in
3383 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3384 * with old userspace.
3386 if (xstate_bv
& ~kvm_supported_xcr0() ||
3387 mxcsr
& ~mxcsr_feature_mask
)
3389 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3391 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3392 mxcsr
& ~mxcsr_feature_mask
)
3394 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3395 guest_xsave
->region
, sizeof(struct fxregs_state
));
3400 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3401 struct kvm_xcrs
*guest_xcrs
)
3403 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3404 guest_xcrs
->nr_xcrs
= 0;
3408 guest_xcrs
->nr_xcrs
= 1;
3409 guest_xcrs
->flags
= 0;
3410 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3411 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3414 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3415 struct kvm_xcrs
*guest_xcrs
)
3419 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3422 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3425 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3426 /* Only support XCR0 currently */
3427 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3428 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3429 guest_xcrs
->xcrs
[i
].value
);
3438 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3439 * stopped by the hypervisor. This function will be called from the host only.
3440 * EINVAL is returned when the host attempts to set the flag for a guest that
3441 * does not support pv clocks.
3443 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3445 if (!vcpu
->arch
.pv_time_enabled
)
3447 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3448 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3452 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3453 struct kvm_enable_cap
*cap
)
3459 case KVM_CAP_HYPERV_SYNIC2
:
3462 case KVM_CAP_HYPERV_SYNIC
:
3463 if (!irqchip_in_kernel(vcpu
->kvm
))
3465 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3466 KVM_CAP_HYPERV_SYNIC2
);
3472 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3473 unsigned int ioctl
, unsigned long arg
)
3475 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3476 void __user
*argp
= (void __user
*)arg
;
3479 struct kvm_lapic_state
*lapic
;
3480 struct kvm_xsave
*xsave
;
3481 struct kvm_xcrs
*xcrs
;
3487 case KVM_GET_LAPIC
: {
3489 if (!lapic_in_kernel(vcpu
))
3491 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3496 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3500 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3505 case KVM_SET_LAPIC
: {
3507 if (!lapic_in_kernel(vcpu
))
3509 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3510 if (IS_ERR(u
.lapic
))
3511 return PTR_ERR(u
.lapic
);
3513 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3516 case KVM_INTERRUPT
: {
3517 struct kvm_interrupt irq
;
3520 if (copy_from_user(&irq
, argp
, sizeof irq
))
3522 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3526 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3530 r
= kvm_vcpu_ioctl_smi(vcpu
);
3533 case KVM_SET_CPUID
: {
3534 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3535 struct kvm_cpuid cpuid
;
3538 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3540 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3543 case KVM_SET_CPUID2
: {
3544 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3545 struct kvm_cpuid2 cpuid
;
3548 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3550 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3551 cpuid_arg
->entries
);
3554 case KVM_GET_CPUID2
: {
3555 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3556 struct kvm_cpuid2 cpuid
;
3559 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3561 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3562 cpuid_arg
->entries
);
3566 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3572 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3575 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3577 case KVM_TPR_ACCESS_REPORTING
: {
3578 struct kvm_tpr_access_ctl tac
;
3581 if (copy_from_user(&tac
, argp
, sizeof tac
))
3583 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3587 if (copy_to_user(argp
, &tac
, sizeof tac
))
3592 case KVM_SET_VAPIC_ADDR
: {
3593 struct kvm_vapic_addr va
;
3597 if (!lapic_in_kernel(vcpu
))
3600 if (copy_from_user(&va
, argp
, sizeof va
))
3602 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3603 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3604 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3607 case KVM_X86_SETUP_MCE
: {
3611 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3613 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3616 case KVM_X86_SET_MCE
: {
3617 struct kvm_x86_mce mce
;
3620 if (copy_from_user(&mce
, argp
, sizeof mce
))
3622 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3625 case KVM_GET_VCPU_EVENTS
: {
3626 struct kvm_vcpu_events events
;
3628 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3631 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3636 case KVM_SET_VCPU_EVENTS
: {
3637 struct kvm_vcpu_events events
;
3640 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3643 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3646 case KVM_GET_DEBUGREGS
: {
3647 struct kvm_debugregs dbgregs
;
3649 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3652 if (copy_to_user(argp
, &dbgregs
,
3653 sizeof(struct kvm_debugregs
)))
3658 case KVM_SET_DEBUGREGS
: {
3659 struct kvm_debugregs dbgregs
;
3662 if (copy_from_user(&dbgregs
, argp
,
3663 sizeof(struct kvm_debugregs
)))
3666 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3669 case KVM_GET_XSAVE
: {
3670 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3675 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3678 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3683 case KVM_SET_XSAVE
: {
3684 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3685 if (IS_ERR(u
.xsave
))
3686 return PTR_ERR(u
.xsave
);
3688 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3691 case KVM_GET_XCRS
: {
3692 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3697 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3700 if (copy_to_user(argp
, u
.xcrs
,
3701 sizeof(struct kvm_xcrs
)))
3706 case KVM_SET_XCRS
: {
3707 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3709 return PTR_ERR(u
.xcrs
);
3711 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3714 case KVM_SET_TSC_KHZ
: {
3718 user_tsc_khz
= (u32
)arg
;
3720 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3723 if (user_tsc_khz
== 0)
3724 user_tsc_khz
= tsc_khz
;
3726 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3731 case KVM_GET_TSC_KHZ
: {
3732 r
= vcpu
->arch
.virtual_tsc_khz
;
3735 case KVM_KVMCLOCK_CTRL
: {
3736 r
= kvm_set_guest_paused(vcpu
);
3739 case KVM_ENABLE_CAP
: {
3740 struct kvm_enable_cap cap
;
3743 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3745 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3756 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3758 return VM_FAULT_SIGBUS
;
3761 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3765 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3767 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3771 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3774 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3778 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3779 u32 kvm_nr_mmu_pages
)
3781 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3784 mutex_lock(&kvm
->slots_lock
);
3786 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3787 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3789 mutex_unlock(&kvm
->slots_lock
);
3793 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3795 return kvm
->arch
.n_max_mmu_pages
;
3798 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3800 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3804 switch (chip
->chip_id
) {
3805 case KVM_IRQCHIP_PIC_MASTER
:
3806 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3807 sizeof(struct kvm_pic_state
));
3809 case KVM_IRQCHIP_PIC_SLAVE
:
3810 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3811 sizeof(struct kvm_pic_state
));
3813 case KVM_IRQCHIP_IOAPIC
:
3814 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3823 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3825 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3829 switch (chip
->chip_id
) {
3830 case KVM_IRQCHIP_PIC_MASTER
:
3831 spin_lock(&pic
->lock
);
3832 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3833 sizeof(struct kvm_pic_state
));
3834 spin_unlock(&pic
->lock
);
3836 case KVM_IRQCHIP_PIC_SLAVE
:
3837 spin_lock(&pic
->lock
);
3838 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3839 sizeof(struct kvm_pic_state
));
3840 spin_unlock(&pic
->lock
);
3842 case KVM_IRQCHIP_IOAPIC
:
3843 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3849 kvm_pic_update_irq(pic
);
3853 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3855 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3857 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3859 mutex_lock(&kps
->lock
);
3860 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3861 mutex_unlock(&kps
->lock
);
3865 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3868 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3870 mutex_lock(&pit
->pit_state
.lock
);
3871 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3872 for (i
= 0; i
< 3; i
++)
3873 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3874 mutex_unlock(&pit
->pit_state
.lock
);
3878 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3880 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3881 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3882 sizeof(ps
->channels
));
3883 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3884 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3885 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3889 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3893 u32 prev_legacy
, cur_legacy
;
3894 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3896 mutex_lock(&pit
->pit_state
.lock
);
3897 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3898 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3899 if (!prev_legacy
&& cur_legacy
)
3901 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3902 sizeof(pit
->pit_state
.channels
));
3903 pit
->pit_state
.flags
= ps
->flags
;
3904 for (i
= 0; i
< 3; i
++)
3905 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3907 mutex_unlock(&pit
->pit_state
.lock
);
3911 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3912 struct kvm_reinject_control
*control
)
3914 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3919 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3920 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3921 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3923 mutex_lock(&pit
->pit_state
.lock
);
3924 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3925 mutex_unlock(&pit
->pit_state
.lock
);
3931 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3932 * @kvm: kvm instance
3933 * @log: slot id and address to which we copy the log
3935 * Steps 1-4 below provide general overview of dirty page logging. See
3936 * kvm_get_dirty_log_protect() function description for additional details.
3938 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3939 * always flush the TLB (step 4) even if previous step failed and the dirty
3940 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3941 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3942 * writes will be marked dirty for next log read.
3944 * 1. Take a snapshot of the bit and clear it if needed.
3945 * 2. Write protect the corresponding page.
3946 * 3. Copy the snapshot to the userspace.
3947 * 4. Flush TLB's if needed.
3949 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3951 bool is_dirty
= false;
3954 mutex_lock(&kvm
->slots_lock
);
3957 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3959 if (kvm_x86_ops
->flush_log_dirty
)
3960 kvm_x86_ops
->flush_log_dirty(kvm
);
3962 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3965 * All the TLBs can be flushed out of mmu lock, see the comments in
3966 * kvm_mmu_slot_remove_write_access().
3968 lockdep_assert_held(&kvm
->slots_lock
);
3970 kvm_flush_remote_tlbs(kvm
);
3972 mutex_unlock(&kvm
->slots_lock
);
3976 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3979 if (!irqchip_in_kernel(kvm
))
3982 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3983 irq_event
->irq
, irq_event
->level
,
3988 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3989 struct kvm_enable_cap
*cap
)
3997 case KVM_CAP_DISABLE_QUIRKS
:
3998 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4001 case KVM_CAP_SPLIT_IRQCHIP
: {
4002 mutex_lock(&kvm
->lock
);
4004 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4005 goto split_irqchip_unlock
;
4007 if (irqchip_in_kernel(kvm
))
4008 goto split_irqchip_unlock
;
4009 if (kvm
->created_vcpus
)
4010 goto split_irqchip_unlock
;
4011 r
= kvm_setup_empty_irq_routing(kvm
);
4013 goto split_irqchip_unlock
;
4014 /* Pairs with irqchip_in_kernel. */
4016 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4017 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4019 split_irqchip_unlock
:
4020 mutex_unlock(&kvm
->lock
);
4023 case KVM_CAP_X2APIC_API
:
4025 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4028 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4029 kvm
->arch
.x2apic_format
= true;
4030 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4031 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4042 long kvm_arch_vm_ioctl(struct file
*filp
,
4043 unsigned int ioctl
, unsigned long arg
)
4045 struct kvm
*kvm
= filp
->private_data
;
4046 void __user
*argp
= (void __user
*)arg
;
4049 * This union makes it completely explicit to gcc-3.x
4050 * that these two variables' stack usage should be
4051 * combined, not added together.
4054 struct kvm_pit_state ps
;
4055 struct kvm_pit_state2 ps2
;
4056 struct kvm_pit_config pit_config
;
4060 case KVM_SET_TSS_ADDR
:
4061 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4063 case KVM_SET_IDENTITY_MAP_ADDR
: {
4066 mutex_lock(&kvm
->lock
);
4068 if (kvm
->created_vcpus
)
4069 goto set_identity_unlock
;
4071 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4072 goto set_identity_unlock
;
4073 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4074 set_identity_unlock
:
4075 mutex_unlock(&kvm
->lock
);
4078 case KVM_SET_NR_MMU_PAGES
:
4079 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4081 case KVM_GET_NR_MMU_PAGES
:
4082 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4084 case KVM_CREATE_IRQCHIP
: {
4085 mutex_lock(&kvm
->lock
);
4088 if (irqchip_in_kernel(kvm
))
4089 goto create_irqchip_unlock
;
4092 if (kvm
->created_vcpus
)
4093 goto create_irqchip_unlock
;
4095 r
= kvm_pic_init(kvm
);
4097 goto create_irqchip_unlock
;
4099 r
= kvm_ioapic_init(kvm
);
4101 kvm_pic_destroy(kvm
);
4102 goto create_irqchip_unlock
;
4105 r
= kvm_setup_default_irq_routing(kvm
);
4107 kvm_ioapic_destroy(kvm
);
4108 kvm_pic_destroy(kvm
);
4109 goto create_irqchip_unlock
;
4111 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4113 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4114 create_irqchip_unlock
:
4115 mutex_unlock(&kvm
->lock
);
4118 case KVM_CREATE_PIT
:
4119 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4121 case KVM_CREATE_PIT2
:
4123 if (copy_from_user(&u
.pit_config
, argp
,
4124 sizeof(struct kvm_pit_config
)))
4127 mutex_lock(&kvm
->lock
);
4130 goto create_pit_unlock
;
4132 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4136 mutex_unlock(&kvm
->lock
);
4138 case KVM_GET_IRQCHIP
: {
4139 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4140 struct kvm_irqchip
*chip
;
4142 chip
= memdup_user(argp
, sizeof(*chip
));
4149 if (!irqchip_kernel(kvm
))
4150 goto get_irqchip_out
;
4151 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4153 goto get_irqchip_out
;
4155 if (copy_to_user(argp
, chip
, sizeof *chip
))
4156 goto get_irqchip_out
;
4162 case KVM_SET_IRQCHIP
: {
4163 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4164 struct kvm_irqchip
*chip
;
4166 chip
= memdup_user(argp
, sizeof(*chip
));
4173 if (!irqchip_kernel(kvm
))
4174 goto set_irqchip_out
;
4175 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4177 goto set_irqchip_out
;
4185 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4188 if (!kvm
->arch
.vpit
)
4190 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4194 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4201 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4204 if (!kvm
->arch
.vpit
)
4206 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4209 case KVM_GET_PIT2
: {
4211 if (!kvm
->arch
.vpit
)
4213 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4217 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4222 case KVM_SET_PIT2
: {
4224 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4227 if (!kvm
->arch
.vpit
)
4229 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4232 case KVM_REINJECT_CONTROL
: {
4233 struct kvm_reinject_control control
;
4235 if (copy_from_user(&control
, argp
, sizeof(control
)))
4237 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4240 case KVM_SET_BOOT_CPU_ID
:
4242 mutex_lock(&kvm
->lock
);
4243 if (kvm
->created_vcpus
)
4246 kvm
->arch
.bsp_vcpu_id
= arg
;
4247 mutex_unlock(&kvm
->lock
);
4249 case KVM_XEN_HVM_CONFIG
: {
4251 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4252 sizeof(struct kvm_xen_hvm_config
)))
4255 if (kvm
->arch
.xen_hvm_config
.flags
)
4260 case KVM_SET_CLOCK
: {
4261 struct kvm_clock_data user_ns
;
4265 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4274 * TODO: userspace has to take care of races with VCPU_RUN, so
4275 * kvm_gen_update_masterclock() can be cut down to locked
4276 * pvclock_update_vm_gtod_copy().
4278 kvm_gen_update_masterclock(kvm
);
4279 now_ns
= get_kvmclock_ns(kvm
);
4280 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4281 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4284 case KVM_GET_CLOCK
: {
4285 struct kvm_clock_data user_ns
;
4288 now_ns
= get_kvmclock_ns(kvm
);
4289 user_ns
.clock
= now_ns
;
4290 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4291 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4294 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4299 case KVM_ENABLE_CAP
: {
4300 struct kvm_enable_cap cap
;
4303 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4305 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4315 static void kvm_init_msr_list(void)
4320 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4321 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4325 * Even MSRs that are valid in the host may not be exposed
4326 * to the guests in some cases.
4328 switch (msrs_to_save
[i
]) {
4329 case MSR_IA32_BNDCFGS
:
4330 if (!kvm_x86_ops
->mpx_supported())
4334 if (!kvm_x86_ops
->rdtscp_supported())
4342 msrs_to_save
[j
] = msrs_to_save
[i
];
4345 num_msrs_to_save
= j
;
4347 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4348 switch (emulated_msrs
[i
]) {
4349 case MSR_IA32_SMBASE
:
4350 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4358 emulated_msrs
[j
] = emulated_msrs
[i
];
4361 num_emulated_msrs
= j
;
4364 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4372 if (!(lapic_in_kernel(vcpu
) &&
4373 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4374 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4385 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4392 if (!(lapic_in_kernel(vcpu
) &&
4393 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4395 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4397 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4407 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4408 struct kvm_segment
*var
, int seg
)
4410 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4413 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4414 struct kvm_segment
*var
, int seg
)
4416 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4419 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4420 struct x86_exception
*exception
)
4424 BUG_ON(!mmu_is_nested(vcpu
));
4426 /* NPT walks are always user-walks */
4427 access
|= PFERR_USER_MASK
;
4428 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4433 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4434 struct x86_exception
*exception
)
4436 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4437 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4440 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4441 struct x86_exception
*exception
)
4443 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4444 access
|= PFERR_FETCH_MASK
;
4445 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4448 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4449 struct x86_exception
*exception
)
4451 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4452 access
|= PFERR_WRITE_MASK
;
4453 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4456 /* uses this to access any guest's mapped memory without checking CPL */
4457 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4458 struct x86_exception
*exception
)
4460 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4463 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4464 struct kvm_vcpu
*vcpu
, u32 access
,
4465 struct x86_exception
*exception
)
4468 int r
= X86EMUL_CONTINUE
;
4471 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4473 unsigned offset
= addr
& (PAGE_SIZE
-1);
4474 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4477 if (gpa
== UNMAPPED_GVA
)
4478 return X86EMUL_PROPAGATE_FAULT
;
4479 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4482 r
= X86EMUL_IO_NEEDED
;
4494 /* used for instruction fetching */
4495 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4496 gva_t addr
, void *val
, unsigned int bytes
,
4497 struct x86_exception
*exception
)
4499 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4500 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4504 /* Inline kvm_read_guest_virt_helper for speed. */
4505 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4507 if (unlikely(gpa
== UNMAPPED_GVA
))
4508 return X86EMUL_PROPAGATE_FAULT
;
4510 offset
= addr
& (PAGE_SIZE
-1);
4511 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4512 bytes
= (unsigned)PAGE_SIZE
- offset
;
4513 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4515 if (unlikely(ret
< 0))
4516 return X86EMUL_IO_NEEDED
;
4518 return X86EMUL_CONTINUE
;
4521 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4522 gva_t addr
, void *val
, unsigned int bytes
,
4523 struct x86_exception
*exception
)
4525 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4526 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4528 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4531 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4533 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4534 gva_t addr
, void *val
, unsigned int bytes
,
4535 struct x86_exception
*exception
)
4537 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4538 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4541 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4542 unsigned long addr
, void *val
, unsigned int bytes
)
4544 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4545 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4547 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4550 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4551 gva_t addr
, void *val
,
4553 struct x86_exception
*exception
)
4555 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4557 int r
= X86EMUL_CONTINUE
;
4560 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4563 unsigned offset
= addr
& (PAGE_SIZE
-1);
4564 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4567 if (gpa
== UNMAPPED_GVA
)
4568 return X86EMUL_PROPAGATE_FAULT
;
4569 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4571 r
= X86EMUL_IO_NEEDED
;
4582 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4584 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4585 gpa_t gpa
, bool write
)
4587 /* For APIC access vmexit */
4588 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4591 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4592 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4599 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4600 gpa_t
*gpa
, struct x86_exception
*exception
,
4603 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4604 | (write
? PFERR_WRITE_MASK
: 0);
4607 * currently PKRU is only applied to ept enabled guest so
4608 * there is no pkey in EPT page table for L1 guest or EPT
4609 * shadow page table for L2 guest.
4611 if (vcpu_match_mmio_gva(vcpu
, gva
)
4612 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4613 vcpu
->arch
.access
, 0, access
)) {
4614 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4615 (gva
& (PAGE_SIZE
- 1));
4616 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4620 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4622 if (*gpa
== UNMAPPED_GVA
)
4625 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4628 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4629 const void *val
, int bytes
)
4633 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4636 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4640 struct read_write_emulator_ops
{
4641 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4643 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4644 void *val
, int bytes
);
4645 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4646 int bytes
, void *val
);
4647 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4648 void *val
, int bytes
);
4652 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4654 if (vcpu
->mmio_read_completed
) {
4655 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4656 vcpu
->mmio_fragments
[0].gpa
, val
);
4657 vcpu
->mmio_read_completed
= 0;
4664 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4665 void *val
, int bytes
)
4667 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4670 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4671 void *val
, int bytes
)
4673 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4676 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4678 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4679 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4682 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4683 void *val
, int bytes
)
4685 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4686 return X86EMUL_IO_NEEDED
;
4689 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4690 void *val
, int bytes
)
4692 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4694 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4695 return X86EMUL_CONTINUE
;
4698 static const struct read_write_emulator_ops read_emultor
= {
4699 .read_write_prepare
= read_prepare
,
4700 .read_write_emulate
= read_emulate
,
4701 .read_write_mmio
= vcpu_mmio_read
,
4702 .read_write_exit_mmio
= read_exit_mmio
,
4705 static const struct read_write_emulator_ops write_emultor
= {
4706 .read_write_emulate
= write_emulate
,
4707 .read_write_mmio
= write_mmio
,
4708 .read_write_exit_mmio
= write_exit_mmio
,
4712 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4714 struct x86_exception
*exception
,
4715 struct kvm_vcpu
*vcpu
,
4716 const struct read_write_emulator_ops
*ops
)
4720 bool write
= ops
->write
;
4721 struct kvm_mmio_fragment
*frag
;
4722 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4725 * If the exit was due to a NPF we may already have a GPA.
4726 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4727 * Note, this cannot be used on string operations since string
4728 * operation using rep will only have the initial GPA from the NPF
4731 if (vcpu
->arch
.gpa_available
&&
4732 emulator_can_use_gpa(ctxt
) &&
4733 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4734 gpa
= vcpu
->arch
.gpa_val
;
4735 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4737 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4739 return X86EMUL_PROPAGATE_FAULT
;
4742 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4743 return X86EMUL_CONTINUE
;
4746 * Is this MMIO handled locally?
4748 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4749 if (handled
== bytes
)
4750 return X86EMUL_CONTINUE
;
4756 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4757 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4761 return X86EMUL_CONTINUE
;
4764 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4766 void *val
, unsigned int bytes
,
4767 struct x86_exception
*exception
,
4768 const struct read_write_emulator_ops
*ops
)
4770 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4774 if (ops
->read_write_prepare
&&
4775 ops
->read_write_prepare(vcpu
, val
, bytes
))
4776 return X86EMUL_CONTINUE
;
4778 vcpu
->mmio_nr_fragments
= 0;
4780 /* Crossing a page boundary? */
4781 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4784 now
= -addr
& ~PAGE_MASK
;
4785 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4788 if (rc
!= X86EMUL_CONTINUE
)
4791 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4797 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4799 if (rc
!= X86EMUL_CONTINUE
)
4802 if (!vcpu
->mmio_nr_fragments
)
4805 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4807 vcpu
->mmio_needed
= 1;
4808 vcpu
->mmio_cur_fragment
= 0;
4810 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4811 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4812 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4813 vcpu
->run
->mmio
.phys_addr
= gpa
;
4815 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4818 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4822 struct x86_exception
*exception
)
4824 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4825 exception
, &read_emultor
);
4828 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4832 struct x86_exception
*exception
)
4834 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4835 exception
, &write_emultor
);
4838 #define CMPXCHG_TYPE(t, ptr, old, new) \
4839 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4841 #ifdef CONFIG_X86_64
4842 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4844 # define CMPXCHG64(ptr, old, new) \
4845 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4848 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4853 struct x86_exception
*exception
)
4855 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4861 /* guests cmpxchg8b have to be emulated atomically */
4862 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4865 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4867 if (gpa
== UNMAPPED_GVA
||
4868 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4871 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4874 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4875 if (is_error_page(page
))
4878 kaddr
= kmap_atomic(page
);
4879 kaddr
+= offset_in_page(gpa
);
4882 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4885 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4888 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4891 exchanged
= CMPXCHG64(kaddr
, old
, new);
4896 kunmap_atomic(kaddr
);
4897 kvm_release_page_dirty(page
);
4900 return X86EMUL_CMPXCHG_FAILED
;
4902 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4903 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4905 return X86EMUL_CONTINUE
;
4908 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4910 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4913 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4917 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
4918 if (vcpu
->arch
.pio
.in
)
4919 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4920 vcpu
->arch
.pio
.size
, pd
);
4922 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4923 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4927 pd
+= vcpu
->arch
.pio
.size
;
4932 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4933 unsigned short port
, void *val
,
4934 unsigned int count
, bool in
)
4936 vcpu
->arch
.pio
.port
= port
;
4937 vcpu
->arch
.pio
.in
= in
;
4938 vcpu
->arch
.pio
.count
= count
;
4939 vcpu
->arch
.pio
.size
= size
;
4941 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4942 vcpu
->arch
.pio
.count
= 0;
4946 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4947 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4948 vcpu
->run
->io
.size
= size
;
4949 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4950 vcpu
->run
->io
.count
= count
;
4951 vcpu
->run
->io
.port
= port
;
4956 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4957 int size
, unsigned short port
, void *val
,
4960 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4963 if (vcpu
->arch
.pio
.count
)
4966 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
4968 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4971 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4972 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4973 vcpu
->arch
.pio
.count
= 0;
4980 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4981 int size
, unsigned short port
,
4982 const void *val
, unsigned int count
)
4984 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4986 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4987 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4988 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4991 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4993 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4996 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4998 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5001 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5003 if (!need_emulate_wbinvd(vcpu
))
5004 return X86EMUL_CONTINUE
;
5006 if (kvm_x86_ops
->has_wbinvd_exit()) {
5007 int cpu
= get_cpu();
5009 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5010 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5011 wbinvd_ipi
, NULL
, 1);
5013 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5016 return X86EMUL_CONTINUE
;
5019 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5021 kvm_emulate_wbinvd_noskip(vcpu
);
5022 return kvm_skip_emulated_instruction(vcpu
);
5024 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5028 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5030 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5033 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5034 unsigned long *dest
)
5036 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5039 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5040 unsigned long value
)
5043 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5046 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5048 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5051 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5053 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5054 unsigned long value
;
5058 value
= kvm_read_cr0(vcpu
);
5061 value
= vcpu
->arch
.cr2
;
5064 value
= kvm_read_cr3(vcpu
);
5067 value
= kvm_read_cr4(vcpu
);
5070 value
= kvm_get_cr8(vcpu
);
5073 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5080 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5082 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5087 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5090 vcpu
->arch
.cr2
= val
;
5093 res
= kvm_set_cr3(vcpu
, val
);
5096 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5099 res
= kvm_set_cr8(vcpu
, val
);
5102 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5109 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5111 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5114 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5116 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5119 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5121 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5124 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5126 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5129 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5131 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5134 static unsigned long emulator_get_cached_segment_base(
5135 struct x86_emulate_ctxt
*ctxt
, int seg
)
5137 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5140 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5141 struct desc_struct
*desc
, u32
*base3
,
5144 struct kvm_segment var
;
5146 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5147 *selector
= var
.selector
;
5150 memset(desc
, 0, sizeof(*desc
));
5158 set_desc_limit(desc
, var
.limit
);
5159 set_desc_base(desc
, (unsigned long)var
.base
);
5160 #ifdef CONFIG_X86_64
5162 *base3
= var
.base
>> 32;
5164 desc
->type
= var
.type
;
5166 desc
->dpl
= var
.dpl
;
5167 desc
->p
= var
.present
;
5168 desc
->avl
= var
.avl
;
5176 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5177 struct desc_struct
*desc
, u32 base3
,
5180 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5181 struct kvm_segment var
;
5183 var
.selector
= selector
;
5184 var
.base
= get_desc_base(desc
);
5185 #ifdef CONFIG_X86_64
5186 var
.base
|= ((u64
)base3
) << 32;
5188 var
.limit
= get_desc_limit(desc
);
5190 var
.limit
= (var
.limit
<< 12) | 0xfff;
5191 var
.type
= desc
->type
;
5192 var
.dpl
= desc
->dpl
;
5197 var
.avl
= desc
->avl
;
5198 var
.present
= desc
->p
;
5199 var
.unusable
= !var
.present
;
5202 kvm_set_segment(vcpu
, &var
, seg
);
5206 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5207 u32 msr_index
, u64
*pdata
)
5209 struct msr_data msr
;
5212 msr
.index
= msr_index
;
5213 msr
.host_initiated
= false;
5214 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5222 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5223 u32 msr_index
, u64 data
)
5225 struct msr_data msr
;
5228 msr
.index
= msr_index
;
5229 msr
.host_initiated
= false;
5230 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5233 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5235 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5237 return vcpu
->arch
.smbase
;
5240 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5242 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5244 vcpu
->arch
.smbase
= smbase
;
5247 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5250 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5253 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5254 u32 pmc
, u64
*pdata
)
5256 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5259 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5261 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5264 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5265 struct x86_instruction_info
*info
,
5266 enum x86_intercept_stage stage
)
5268 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5271 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5272 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5274 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5277 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5279 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5282 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5284 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5287 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5289 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5292 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5294 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5297 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5299 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5302 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5304 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5307 static const struct x86_emulate_ops emulate_ops
= {
5308 .read_gpr
= emulator_read_gpr
,
5309 .write_gpr
= emulator_write_gpr
,
5310 .read_std
= kvm_read_guest_virt_system
,
5311 .write_std
= kvm_write_guest_virt_system
,
5312 .read_phys
= kvm_read_guest_phys_system
,
5313 .fetch
= kvm_fetch_guest_virt
,
5314 .read_emulated
= emulator_read_emulated
,
5315 .write_emulated
= emulator_write_emulated
,
5316 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5317 .invlpg
= emulator_invlpg
,
5318 .pio_in_emulated
= emulator_pio_in_emulated
,
5319 .pio_out_emulated
= emulator_pio_out_emulated
,
5320 .get_segment
= emulator_get_segment
,
5321 .set_segment
= emulator_set_segment
,
5322 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5323 .get_gdt
= emulator_get_gdt
,
5324 .get_idt
= emulator_get_idt
,
5325 .set_gdt
= emulator_set_gdt
,
5326 .set_idt
= emulator_set_idt
,
5327 .get_cr
= emulator_get_cr
,
5328 .set_cr
= emulator_set_cr
,
5329 .cpl
= emulator_get_cpl
,
5330 .get_dr
= emulator_get_dr
,
5331 .set_dr
= emulator_set_dr
,
5332 .get_smbase
= emulator_get_smbase
,
5333 .set_smbase
= emulator_set_smbase
,
5334 .set_msr
= emulator_set_msr
,
5335 .get_msr
= emulator_get_msr
,
5336 .check_pmc
= emulator_check_pmc
,
5337 .read_pmc
= emulator_read_pmc
,
5338 .halt
= emulator_halt
,
5339 .wbinvd
= emulator_wbinvd
,
5340 .fix_hypercall
= emulator_fix_hypercall
,
5341 .intercept
= emulator_intercept
,
5342 .get_cpuid
= emulator_get_cpuid
,
5343 .set_nmi_mask
= emulator_set_nmi_mask
,
5344 .get_hflags
= emulator_get_hflags
,
5345 .set_hflags
= emulator_set_hflags
,
5346 .pre_leave_smm
= emulator_pre_leave_smm
,
5349 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5351 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5353 * an sti; sti; sequence only disable interrupts for the first
5354 * instruction. So, if the last instruction, be it emulated or
5355 * not, left the system with the INT_STI flag enabled, it
5356 * means that the last instruction is an sti. We should not
5357 * leave the flag on in this case. The same goes for mov ss
5359 if (int_shadow
& mask
)
5361 if (unlikely(int_shadow
|| mask
)) {
5362 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5364 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5368 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5370 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5371 if (ctxt
->exception
.vector
== PF_VECTOR
)
5372 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5374 if (ctxt
->exception
.error_code_valid
)
5375 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5376 ctxt
->exception
.error_code
);
5378 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5382 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5384 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5387 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5389 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5390 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5392 ctxt
->eip
= kvm_rip_read(vcpu
);
5393 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5394 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5395 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5396 cs_db
? X86EMUL_MODE_PROT32
:
5397 X86EMUL_MODE_PROT16
;
5398 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5399 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5400 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5402 init_decode_cache(ctxt
);
5403 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5406 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5408 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5411 init_emulate_ctxt(vcpu
);
5415 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5416 ret
= emulate_int_real(ctxt
, irq
);
5418 if (ret
!= X86EMUL_CONTINUE
)
5419 return EMULATE_FAIL
;
5421 ctxt
->eip
= ctxt
->_eip
;
5422 kvm_rip_write(vcpu
, ctxt
->eip
);
5423 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5425 if (irq
== NMI_VECTOR
)
5426 vcpu
->arch
.nmi_pending
= 0;
5428 vcpu
->arch
.interrupt
.pending
= false;
5430 return EMULATE_DONE
;
5432 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5434 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5436 int r
= EMULATE_DONE
;
5438 ++vcpu
->stat
.insn_emulation_fail
;
5439 trace_kvm_emulate_insn_failed(vcpu
);
5440 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5441 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5442 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5443 vcpu
->run
->internal
.ndata
= 0;
5444 r
= EMULATE_USER_EXIT
;
5446 kvm_queue_exception(vcpu
, UD_VECTOR
);
5451 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5452 bool write_fault_to_shadow_pgtable
,
5458 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5461 if (!vcpu
->arch
.mmu
.direct_map
) {
5463 * Write permission should be allowed since only
5464 * write access need to be emulated.
5466 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5469 * If the mapping is invalid in guest, let cpu retry
5470 * it to generate fault.
5472 if (gpa
== UNMAPPED_GVA
)
5477 * Do not retry the unhandleable instruction if it faults on the
5478 * readonly host memory, otherwise it will goto a infinite loop:
5479 * retry instruction -> write #PF -> emulation fail -> retry
5480 * instruction -> ...
5482 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5485 * If the instruction failed on the error pfn, it can not be fixed,
5486 * report the error to userspace.
5488 if (is_error_noslot_pfn(pfn
))
5491 kvm_release_pfn_clean(pfn
);
5493 /* The instructions are well-emulated on direct mmu. */
5494 if (vcpu
->arch
.mmu
.direct_map
) {
5495 unsigned int indirect_shadow_pages
;
5497 spin_lock(&vcpu
->kvm
->mmu_lock
);
5498 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5499 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5501 if (indirect_shadow_pages
)
5502 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5508 * if emulation was due to access to shadowed page table
5509 * and it failed try to unshadow page and re-enter the
5510 * guest to let CPU execute the instruction.
5512 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5515 * If the access faults on its page table, it can not
5516 * be fixed by unprotecting shadow page and it should
5517 * be reported to userspace.
5519 return !write_fault_to_shadow_pgtable
;
5522 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5523 unsigned long cr2
, int emulation_type
)
5525 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5526 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5528 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5529 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5532 * If the emulation is caused by #PF and it is non-page_table
5533 * writing instruction, it means the VM-EXIT is caused by shadow
5534 * page protected, we can zap the shadow page and retry this
5535 * instruction directly.
5537 * Note: if the guest uses a non-page-table modifying instruction
5538 * on the PDE that points to the instruction, then we will unmap
5539 * the instruction and go to an infinite loop. So, we cache the
5540 * last retried eip and the last fault address, if we meet the eip
5541 * and the address again, we can break out of the potential infinite
5544 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5546 if (!(emulation_type
& EMULTYPE_RETRY
))
5549 if (x86_page_table_writing_insn(ctxt
))
5552 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5555 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5556 vcpu
->arch
.last_retry_addr
= cr2
;
5558 if (!vcpu
->arch
.mmu
.direct_map
)
5559 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5561 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5566 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5567 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5569 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5571 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5572 /* This is a good place to trace that we are exiting SMM. */
5573 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5575 /* Process a latched INIT or SMI, if any. */
5576 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5579 kvm_mmu_reset_context(vcpu
);
5582 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5584 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5586 vcpu
->arch
.hflags
= emul_flags
;
5588 if (changed
& HF_SMM_MASK
)
5589 kvm_smm_changed(vcpu
);
5592 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5601 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5602 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5607 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5609 struct kvm_run
*kvm_run
= vcpu
->run
;
5611 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5612 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5613 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5614 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5615 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5616 *r
= EMULATE_USER_EXIT
;
5619 * "Certain debug exceptions may clear bit 0-3. The
5620 * remaining contents of the DR6 register are never
5621 * cleared by the processor".
5623 vcpu
->arch
.dr6
&= ~15;
5624 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5625 kvm_queue_exception(vcpu
, DB_VECTOR
);
5629 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5631 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5632 int r
= EMULATE_DONE
;
5634 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5637 * rflags is the old, "raw" value of the flags. The new value has
5638 * not been saved yet.
5640 * This is correct even for TF set by the guest, because "the
5641 * processor will not generate this exception after the instruction
5642 * that sets the TF flag".
5644 if (unlikely(rflags
& X86_EFLAGS_TF
))
5645 kvm_vcpu_do_singlestep(vcpu
, &r
);
5646 return r
== EMULATE_DONE
;
5648 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5650 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5652 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5653 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5654 struct kvm_run
*kvm_run
= vcpu
->run
;
5655 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5656 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5657 vcpu
->arch
.guest_debug_dr7
,
5661 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5662 kvm_run
->debug
.arch
.pc
= eip
;
5663 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5664 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5665 *r
= EMULATE_USER_EXIT
;
5670 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5671 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5672 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5673 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5678 vcpu
->arch
.dr6
&= ~15;
5679 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5680 kvm_queue_exception(vcpu
, DB_VECTOR
);
5689 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5696 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5697 bool writeback
= true;
5698 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5701 * Clear write_fault_to_shadow_pgtable here to ensure it is
5704 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5705 kvm_clear_exception_queue(vcpu
);
5707 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5708 init_emulate_ctxt(vcpu
);
5711 * We will reenter on the same instruction since
5712 * we do not set complete_userspace_io. This does not
5713 * handle watchpoints yet, those would be handled in
5716 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5719 ctxt
->interruptibility
= 0;
5720 ctxt
->have_exception
= false;
5721 ctxt
->exception
.vector
= -1;
5722 ctxt
->perm_ok
= false;
5724 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5726 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5728 trace_kvm_emulate_insn_start(vcpu
);
5729 ++vcpu
->stat
.insn_emulation
;
5730 if (r
!= EMULATION_OK
) {
5731 if (emulation_type
& EMULTYPE_TRAP_UD
)
5732 return EMULATE_FAIL
;
5733 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5735 return EMULATE_DONE
;
5736 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
5737 return EMULATE_DONE
;
5738 if (emulation_type
& EMULTYPE_SKIP
)
5739 return EMULATE_FAIL
;
5740 return handle_emulation_failure(vcpu
);
5744 if (emulation_type
& EMULTYPE_SKIP
) {
5745 kvm_rip_write(vcpu
, ctxt
->_eip
);
5746 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5747 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5748 return EMULATE_DONE
;
5751 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5752 return EMULATE_DONE
;
5754 /* this is needed for vmware backdoor interface to work since it
5755 changes registers values during IO operation */
5756 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5757 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5758 emulator_invalidate_register_cache(ctxt
);
5762 /* Save the faulting GPA (cr2) in the address field */
5763 ctxt
->exception
.address
= cr2
;
5765 r
= x86_emulate_insn(ctxt
);
5767 if (r
== EMULATION_INTERCEPTED
)
5768 return EMULATE_DONE
;
5770 if (r
== EMULATION_FAILED
) {
5771 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5773 return EMULATE_DONE
;
5775 return handle_emulation_failure(vcpu
);
5778 if (ctxt
->have_exception
) {
5780 if (inject_emulated_exception(vcpu
))
5782 } else if (vcpu
->arch
.pio
.count
) {
5783 if (!vcpu
->arch
.pio
.in
) {
5784 /* FIXME: return into emulator if single-stepping. */
5785 vcpu
->arch
.pio
.count
= 0;
5788 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5790 r
= EMULATE_USER_EXIT
;
5791 } else if (vcpu
->mmio_needed
) {
5792 if (!vcpu
->mmio_is_write
)
5794 r
= EMULATE_USER_EXIT
;
5795 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5796 } else if (r
== EMULATION_RESTART
)
5802 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5803 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5804 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5805 kvm_rip_write(vcpu
, ctxt
->eip
);
5806 if (r
== EMULATE_DONE
&&
5807 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5808 kvm_vcpu_do_singlestep(vcpu
, &r
);
5809 if (!ctxt
->have_exception
||
5810 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5811 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5814 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5815 * do nothing, and it will be requested again as soon as
5816 * the shadow expires. But we still need to check here,
5817 * because POPF has no interrupt shadow.
5819 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5820 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5822 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5826 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5828 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5830 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5831 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5832 size
, port
, &val
, 1);
5833 /* do not return to emulator after return from userspace */
5834 vcpu
->arch
.pio
.count
= 0;
5837 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5839 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5843 /* We should only ever be called with arch.pio.count equal to 1 */
5844 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5846 /* For size less than 4 we merge, else we zero extend */
5847 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5851 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5852 * the copy and tracing
5854 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5855 vcpu
->arch
.pio
.port
, &val
, 1);
5856 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5861 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5866 /* For size less than 4 we merge, else we zero extend */
5867 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5869 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5872 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5876 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5880 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5882 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5884 __this_cpu_write(cpu_tsc_khz
, 0);
5888 static void tsc_khz_changed(void *data
)
5890 struct cpufreq_freqs
*freq
= data
;
5891 unsigned long khz
= 0;
5895 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5896 khz
= cpufreq_quick_get(raw_smp_processor_id());
5899 __this_cpu_write(cpu_tsc_khz
, khz
);
5902 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5905 struct cpufreq_freqs
*freq
= data
;
5907 struct kvm_vcpu
*vcpu
;
5908 int i
, send_ipi
= 0;
5911 * We allow guests to temporarily run on slowing clocks,
5912 * provided we notify them after, or to run on accelerating
5913 * clocks, provided we notify them before. Thus time never
5916 * However, we have a problem. We can't atomically update
5917 * the frequency of a given CPU from this function; it is
5918 * merely a notifier, which can be called from any CPU.
5919 * Changing the TSC frequency at arbitrary points in time
5920 * requires a recomputation of local variables related to
5921 * the TSC for each VCPU. We must flag these local variables
5922 * to be updated and be sure the update takes place with the
5923 * new frequency before any guests proceed.
5925 * Unfortunately, the combination of hotplug CPU and frequency
5926 * change creates an intractable locking scenario; the order
5927 * of when these callouts happen is undefined with respect to
5928 * CPU hotplug, and they can race with each other. As such,
5929 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5930 * undefined; you can actually have a CPU frequency change take
5931 * place in between the computation of X and the setting of the
5932 * variable. To protect against this problem, all updates of
5933 * the per_cpu tsc_khz variable are done in an interrupt
5934 * protected IPI, and all callers wishing to update the value
5935 * must wait for a synchronous IPI to complete (which is trivial
5936 * if the caller is on the CPU already). This establishes the
5937 * necessary total order on variable updates.
5939 * Note that because a guest time update may take place
5940 * anytime after the setting of the VCPU's request bit, the
5941 * correct TSC value must be set before the request. However,
5942 * to ensure the update actually makes it to any guest which
5943 * starts running in hardware virtualization between the set
5944 * and the acquisition of the spinlock, we must also ping the
5945 * CPU after setting the request bit.
5949 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5951 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5954 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5956 spin_lock(&kvm_lock
);
5957 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5958 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5959 if (vcpu
->cpu
!= freq
->cpu
)
5961 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5962 if (vcpu
->cpu
!= smp_processor_id())
5966 spin_unlock(&kvm_lock
);
5968 if (freq
->old
< freq
->new && send_ipi
) {
5970 * We upscale the frequency. Must make the guest
5971 * doesn't see old kvmclock values while running with
5972 * the new frequency, otherwise we risk the guest sees
5973 * time go backwards.
5975 * In case we update the frequency for another cpu
5976 * (which might be in guest context) send an interrupt
5977 * to kick the cpu out of guest context. Next time
5978 * guest context is entered kvmclock will be updated,
5979 * so the guest will not see stale values.
5981 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5986 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5987 .notifier_call
= kvmclock_cpufreq_notifier
5990 static int kvmclock_cpu_online(unsigned int cpu
)
5992 tsc_khz_changed(NULL
);
5996 static void kvm_timer_init(void)
5998 max_tsc_khz
= tsc_khz
;
6000 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6001 #ifdef CONFIG_CPU_FREQ
6002 struct cpufreq_policy policy
;
6005 memset(&policy
, 0, sizeof(policy
));
6007 cpufreq_get_policy(&policy
, cpu
);
6008 if (policy
.cpuinfo
.max_freq
)
6009 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6012 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6013 CPUFREQ_TRANSITION_NOTIFIER
);
6015 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6017 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6018 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6021 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6023 int kvm_is_in_guest(void)
6025 return __this_cpu_read(current_vcpu
) != NULL
;
6028 static int kvm_is_user_mode(void)
6032 if (__this_cpu_read(current_vcpu
))
6033 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6035 return user_mode
!= 0;
6038 static unsigned long kvm_get_guest_ip(void)
6040 unsigned long ip
= 0;
6042 if (__this_cpu_read(current_vcpu
))
6043 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6048 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6049 .is_in_guest
= kvm_is_in_guest
,
6050 .is_user_mode
= kvm_is_user_mode
,
6051 .get_guest_ip
= kvm_get_guest_ip
,
6054 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6056 __this_cpu_write(current_vcpu
, vcpu
);
6058 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6060 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6062 __this_cpu_write(current_vcpu
, NULL
);
6064 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6066 static void kvm_set_mmio_spte_mask(void)
6069 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6072 * Set the reserved bits and the present bit of an paging-structure
6073 * entry to generate page fault with PFER.RSV = 1.
6075 /* Mask the reserved physical address bits. */
6076 mask
= rsvd_bits(maxphyaddr
, 51);
6078 /* Set the present bit. */
6081 #ifdef CONFIG_X86_64
6083 * If reserved bit is not supported, clear the present bit to disable
6086 if (maxphyaddr
== 52)
6090 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6093 #ifdef CONFIG_X86_64
6094 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6098 struct kvm_vcpu
*vcpu
;
6101 spin_lock(&kvm_lock
);
6102 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6103 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6104 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6105 atomic_set(&kvm_guest_has_master_clock
, 0);
6106 spin_unlock(&kvm_lock
);
6109 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6112 * Notification about pvclock gtod data update.
6114 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6117 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6118 struct timekeeper
*tk
= priv
;
6120 update_pvclock_gtod(tk
);
6122 /* disable master clock if host does not trust, or does not
6123 * use, TSC clocksource
6125 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6126 atomic_read(&kvm_guest_has_master_clock
) != 0)
6127 queue_work(system_long_wq
, &pvclock_gtod_work
);
6132 static struct notifier_block pvclock_gtod_notifier
= {
6133 .notifier_call
= pvclock_gtod_notify
,
6137 int kvm_arch_init(void *opaque
)
6140 struct kvm_x86_ops
*ops
= opaque
;
6143 printk(KERN_ERR
"kvm: already loaded the other module\n");
6148 if (!ops
->cpu_has_kvm_support()) {
6149 printk(KERN_ERR
"kvm: no hardware support\n");
6153 if (ops
->disabled_by_bios()) {
6154 printk(KERN_WARNING
"kvm: disabled by bios\n");
6160 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6162 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6166 r
= kvm_mmu_module_init();
6168 goto out_free_percpu
;
6170 kvm_set_mmio_spte_mask();
6174 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6175 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6176 PT_PRESENT_MASK
, 0, sme_me_mask
);
6179 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6181 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6182 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6185 #ifdef CONFIG_X86_64
6186 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6192 free_percpu(shared_msrs
);
6197 void kvm_arch_exit(void)
6200 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6202 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6203 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6204 CPUFREQ_TRANSITION_NOTIFIER
);
6205 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6206 #ifdef CONFIG_X86_64
6207 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6210 kvm_mmu_module_exit();
6211 free_percpu(shared_msrs
);
6214 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6216 ++vcpu
->stat
.halt_exits
;
6217 if (lapic_in_kernel(vcpu
)) {
6218 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6221 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6225 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6227 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6229 int ret
= kvm_skip_emulated_instruction(vcpu
);
6231 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6232 * KVM_EXIT_DEBUG here.
6234 return kvm_vcpu_halt(vcpu
) && ret
;
6236 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6238 #ifdef CONFIG_X86_64
6239 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6240 unsigned long clock_type
)
6242 struct kvm_clock_pairing clock_pairing
;
6247 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6248 return -KVM_EOPNOTSUPP
;
6250 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6251 return -KVM_EOPNOTSUPP
;
6253 clock_pairing
.sec
= ts
.tv_sec
;
6254 clock_pairing
.nsec
= ts
.tv_nsec
;
6255 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6256 clock_pairing
.flags
= 0;
6259 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6260 sizeof(struct kvm_clock_pairing
)))
6268 * kvm_pv_kick_cpu_op: Kick a vcpu.
6270 * @apicid - apicid of vcpu to be kicked.
6272 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6274 struct kvm_lapic_irq lapic_irq
;
6276 lapic_irq
.shorthand
= 0;
6277 lapic_irq
.dest_mode
= 0;
6278 lapic_irq
.level
= 0;
6279 lapic_irq
.dest_id
= apicid
;
6280 lapic_irq
.msi_redir_hint
= false;
6282 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6283 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6286 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6288 vcpu
->arch
.apicv_active
= false;
6289 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6292 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6294 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6297 r
= kvm_skip_emulated_instruction(vcpu
);
6299 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6300 return kvm_hv_hypercall(vcpu
);
6302 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6303 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6304 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6305 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6306 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6308 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6310 op_64_bit
= is_64_bit_mode(vcpu
);
6319 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6325 case KVM_HC_VAPIC_POLL_IRQ
:
6328 case KVM_HC_KICK_CPU
:
6329 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6332 #ifdef CONFIG_X86_64
6333 case KVM_HC_CLOCK_PAIRING
:
6334 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6344 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6345 ++vcpu
->stat
.hypercalls
;
6348 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6350 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6352 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6353 char instruction
[3];
6354 unsigned long rip
= kvm_rip_read(vcpu
);
6356 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6358 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6362 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6364 return vcpu
->run
->request_interrupt_window
&&
6365 likely(!pic_in_kernel(vcpu
->kvm
));
6368 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6370 struct kvm_run
*kvm_run
= vcpu
->run
;
6372 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6373 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6374 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6375 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6376 kvm_run
->ready_for_interrupt_injection
=
6377 pic_in_kernel(vcpu
->kvm
) ||
6378 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6381 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6385 if (!kvm_x86_ops
->update_cr8_intercept
)
6388 if (!lapic_in_kernel(vcpu
))
6391 if (vcpu
->arch
.apicv_active
)
6394 if (!vcpu
->arch
.apic
->vapic_addr
)
6395 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6402 tpr
= kvm_lapic_get_cr8(vcpu
);
6404 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6407 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6411 /* try to reinject previous events if any */
6412 if (vcpu
->arch
.exception
.injected
) {
6413 kvm_x86_ops
->queue_exception(vcpu
);
6418 * Exceptions must be injected immediately, or the exception
6419 * frame will have the address of the NMI or interrupt handler.
6421 if (!vcpu
->arch
.exception
.pending
) {
6422 if (vcpu
->arch
.nmi_injected
) {
6423 kvm_x86_ops
->set_nmi(vcpu
);
6427 if (vcpu
->arch
.interrupt
.pending
) {
6428 kvm_x86_ops
->set_irq(vcpu
);
6433 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6434 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6439 /* try to inject new event if pending */
6440 if (vcpu
->arch
.exception
.pending
) {
6441 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6442 vcpu
->arch
.exception
.has_error_code
,
6443 vcpu
->arch
.exception
.error_code
);
6445 vcpu
->arch
.exception
.pending
= false;
6446 vcpu
->arch
.exception
.injected
= true;
6448 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6449 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6452 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6453 (vcpu
->arch
.dr7
& DR7_GD
)) {
6454 vcpu
->arch
.dr7
&= ~DR7_GD
;
6455 kvm_update_dr7(vcpu
);
6458 kvm_x86_ops
->queue_exception(vcpu
);
6459 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) && kvm_x86_ops
->smi_allowed(vcpu
)) {
6460 vcpu
->arch
.smi_pending
= false;
6462 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6463 --vcpu
->arch
.nmi_pending
;
6464 vcpu
->arch
.nmi_injected
= true;
6465 kvm_x86_ops
->set_nmi(vcpu
);
6466 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6468 * Because interrupts can be injected asynchronously, we are
6469 * calling check_nested_events again here to avoid a race condition.
6470 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6471 * proposal and current concerns. Perhaps we should be setting
6472 * KVM_REQ_EVENT only on certain events and not unconditionally?
6474 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6475 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6479 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6480 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6482 kvm_x86_ops
->set_irq(vcpu
);
6489 static void process_nmi(struct kvm_vcpu
*vcpu
)
6494 * x86 is limited to one NMI running, and one NMI pending after it.
6495 * If an NMI is already in progress, limit further NMIs to just one.
6496 * Otherwise, allow two (and we'll inject the first one immediately).
6498 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6501 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6502 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6503 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6506 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6509 flags
|= seg
->g
<< 23;
6510 flags
|= seg
->db
<< 22;
6511 flags
|= seg
->l
<< 21;
6512 flags
|= seg
->avl
<< 20;
6513 flags
|= seg
->present
<< 15;
6514 flags
|= seg
->dpl
<< 13;
6515 flags
|= seg
->s
<< 12;
6516 flags
|= seg
->type
<< 8;
6520 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6522 struct kvm_segment seg
;
6525 kvm_get_segment(vcpu
, &seg
, n
);
6526 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6529 offset
= 0x7f84 + n
* 12;
6531 offset
= 0x7f2c + (n
- 3) * 12;
6533 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6534 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6535 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6538 #ifdef CONFIG_X86_64
6539 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6541 struct kvm_segment seg
;
6545 kvm_get_segment(vcpu
, &seg
, n
);
6546 offset
= 0x7e00 + n
* 16;
6548 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6549 put_smstate(u16
, buf
, offset
, seg
.selector
);
6550 put_smstate(u16
, buf
, offset
+ 2, flags
);
6551 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6552 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6556 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6559 struct kvm_segment seg
;
6563 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6564 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6565 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6566 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6568 for (i
= 0; i
< 8; i
++)
6569 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6571 kvm_get_dr(vcpu
, 6, &val
);
6572 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6573 kvm_get_dr(vcpu
, 7, &val
);
6574 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6576 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6577 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6578 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6579 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6580 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6582 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6583 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6584 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6585 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6586 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6588 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6589 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6590 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6592 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6593 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6594 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6596 for (i
= 0; i
< 6; i
++)
6597 enter_smm_save_seg_32(vcpu
, buf
, i
);
6599 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6602 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6603 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6606 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6608 #ifdef CONFIG_X86_64
6610 struct kvm_segment seg
;
6614 for (i
= 0; i
< 16; i
++)
6615 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6617 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6618 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6620 kvm_get_dr(vcpu
, 6, &val
);
6621 put_smstate(u64
, buf
, 0x7f68, val
);
6622 kvm_get_dr(vcpu
, 7, &val
);
6623 put_smstate(u64
, buf
, 0x7f60, val
);
6625 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6626 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6627 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6629 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6632 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6634 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6636 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6637 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6638 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6639 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6640 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6642 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6643 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6644 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6646 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6647 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6648 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6649 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6650 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6652 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6653 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6654 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6656 for (i
= 0; i
< 6; i
++)
6657 enter_smm_save_seg_64(vcpu
, buf
, i
);
6663 static void enter_smm(struct kvm_vcpu
*vcpu
)
6665 struct kvm_segment cs
, ds
;
6670 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6671 memset(buf
, 0, 512);
6672 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6673 enter_smm_save_state_64(vcpu
, buf
);
6675 enter_smm_save_state_32(vcpu
, buf
);
6678 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6679 * vCPU state (e.g. leave guest mode) after we've saved the state into
6680 * the SMM state-save area.
6682 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
6684 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6685 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6687 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6688 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6690 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6692 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6693 kvm_rip_write(vcpu
, 0x8000);
6695 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6696 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6697 vcpu
->arch
.cr0
= cr0
;
6699 kvm_x86_ops
->set_cr4(vcpu
, 0);
6701 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6702 dt
.address
= dt
.size
= 0;
6703 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6705 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6707 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6708 cs
.base
= vcpu
->arch
.smbase
;
6713 cs
.limit
= ds
.limit
= 0xffffffff;
6714 cs
.type
= ds
.type
= 0x3;
6715 cs
.dpl
= ds
.dpl
= 0;
6720 cs
.avl
= ds
.avl
= 0;
6721 cs
.present
= ds
.present
= 1;
6722 cs
.unusable
= ds
.unusable
= 0;
6723 cs
.padding
= ds
.padding
= 0;
6725 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6726 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6727 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6728 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6729 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6730 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6732 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6733 kvm_x86_ops
->set_efer(vcpu
, 0);
6735 kvm_update_cpuid(vcpu
);
6736 kvm_mmu_reset_context(vcpu
);
6739 static void process_smi(struct kvm_vcpu
*vcpu
)
6741 vcpu
->arch
.smi_pending
= true;
6742 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6745 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6747 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6750 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6752 u64 eoi_exit_bitmap
[4];
6754 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6757 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6759 if (irqchip_split(vcpu
->kvm
))
6760 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6762 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6763 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6764 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6766 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6767 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6768 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6771 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6773 ++vcpu
->stat
.tlb_flush
;
6774 kvm_x86_ops
->tlb_flush(vcpu
);
6777 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
6778 unsigned long start
, unsigned long end
)
6780 unsigned long apic_address
;
6783 * The physical address of apic access page is stored in the VMCS.
6784 * Update it when it becomes invalid.
6786 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6787 if (start
<= apic_address
&& apic_address
< end
)
6788 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6791 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6793 struct page
*page
= NULL
;
6795 if (!lapic_in_kernel(vcpu
))
6798 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6801 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6802 if (is_error_page(page
))
6804 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6807 * Do not pin apic access page in memory, the MMU notifier
6808 * will call us again if it is migrated or swapped out.
6812 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6815 * Returns 1 to let vcpu_run() continue the guest execution loop without
6816 * exiting to the userspace. Otherwise, the value will be returned to the
6819 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6823 dm_request_for_irq_injection(vcpu
) &&
6824 kvm_cpu_accept_dm_intr(vcpu
);
6826 bool req_immediate_exit
= false;
6828 if (kvm_request_pending(vcpu
)) {
6829 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6830 kvm_mmu_unload(vcpu
);
6831 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6832 __kvm_migrate_timers(vcpu
);
6833 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6834 kvm_gen_update_masterclock(vcpu
->kvm
);
6835 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6836 kvm_gen_kvmclock_update(vcpu
);
6837 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6838 r
= kvm_guest_time_update(vcpu
);
6842 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6843 kvm_mmu_sync_roots(vcpu
);
6844 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6845 kvm_vcpu_flush_tlb(vcpu
);
6846 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6847 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6851 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6852 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6853 vcpu
->mmio_needed
= 0;
6857 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6858 /* Page is swapped out. Do synthetic halt */
6859 vcpu
->arch
.apf
.halted
= true;
6863 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6864 record_steal_time(vcpu
);
6865 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6867 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6869 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6870 kvm_pmu_handle_event(vcpu
);
6871 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6872 kvm_pmu_deliver_pmi(vcpu
);
6873 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6874 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6875 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6876 vcpu
->arch
.ioapic_handled_vectors
)) {
6877 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6878 vcpu
->run
->eoi
.vector
=
6879 vcpu
->arch
.pending_ioapic_eoi
;
6884 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6885 vcpu_scan_ioapic(vcpu
);
6886 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6887 kvm_vcpu_reload_apic_access_page(vcpu
);
6888 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6889 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6890 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6894 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6895 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6896 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6900 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6901 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6902 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6908 * KVM_REQ_HV_STIMER has to be processed after
6909 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6910 * depend on the guest clock being up-to-date
6912 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6913 kvm_hv_process_stimers(vcpu
);
6916 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6917 ++vcpu
->stat
.req_event
;
6918 kvm_apic_accept_events(vcpu
);
6919 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6924 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6925 req_immediate_exit
= true;
6927 /* Enable SMI/NMI/IRQ window open exits if needed.
6929 * SMIs have three cases:
6930 * 1) They can be nested, and then there is nothing to
6931 * do here because RSM will cause a vmexit anyway.
6932 * 2) There is an ISA-specific reason why SMI cannot be
6933 * injected, and the moment when this changes can be
6935 * 3) Or the SMI can be pending because
6936 * inject_pending_event has completed the injection
6937 * of an IRQ or NMI from the previous vmexit, and
6938 * then we request an immediate exit to inject the
6941 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6942 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
6943 req_immediate_exit
= true;
6944 if (vcpu
->arch
.nmi_pending
)
6945 kvm_x86_ops
->enable_nmi_window(vcpu
);
6946 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6947 kvm_x86_ops
->enable_irq_window(vcpu
);
6948 WARN_ON(vcpu
->arch
.exception
.pending
);
6951 if (kvm_lapic_enabled(vcpu
)) {
6952 update_cr8_intercept(vcpu
);
6953 kvm_lapic_sync_to_vapic(vcpu
);
6957 r
= kvm_mmu_reload(vcpu
);
6959 goto cancel_injection
;
6964 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6967 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6968 * IPI are then delayed after guest entry, which ensures that they
6969 * result in virtual interrupt delivery.
6971 local_irq_disable();
6972 vcpu
->mode
= IN_GUEST_MODE
;
6974 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6977 * 1) We should set ->mode before checking ->requests. Please see
6978 * the comment in kvm_vcpu_exiting_guest_mode().
6980 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6981 * pairs with the memory barrier implicit in pi_test_and_set_on
6982 * (see vmx_deliver_posted_interrupt).
6984 * 3) This also orders the write to mode from any reads to the page
6985 * tables done while the VCPU is running. Please see the comment
6986 * in kvm_flush_remote_tlbs.
6988 smp_mb__after_srcu_read_unlock();
6991 * This handles the case where a posted interrupt was
6992 * notified with kvm_vcpu_kick.
6994 if (kvm_lapic_enabled(vcpu
)) {
6995 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6996 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6999 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7000 || need_resched() || signal_pending(current
)) {
7001 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7005 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7007 goto cancel_injection
;
7010 kvm_load_guest_xcr0(vcpu
);
7012 if (req_immediate_exit
) {
7013 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7014 smp_send_reschedule(vcpu
->cpu
);
7017 trace_kvm_entry(vcpu
->vcpu_id
);
7018 wait_lapic_expire(vcpu
);
7019 guest_enter_irqoff();
7021 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7023 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7024 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7025 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7026 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7027 set_debugreg(vcpu
->arch
.dr6
, 6);
7028 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7031 kvm_x86_ops
->run(vcpu
);
7034 * Do this here before restoring debug registers on the host. And
7035 * since we do this before handling the vmexit, a DR access vmexit
7036 * can (a) read the correct value of the debug registers, (b) set
7037 * KVM_DEBUGREG_WONT_EXIT again.
7039 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7040 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7041 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7042 kvm_update_dr0123(vcpu
);
7043 kvm_update_dr6(vcpu
);
7044 kvm_update_dr7(vcpu
);
7045 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7049 * If the guest has used debug registers, at least dr7
7050 * will be disabled while returning to the host.
7051 * If we don't have active breakpoints in the host, we don't
7052 * care about the messed up debug address registers. But if
7053 * we have some of them active, restore the old state.
7055 if (hw_breakpoint_active())
7056 hw_breakpoint_restore();
7058 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7060 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7063 kvm_put_guest_xcr0(vcpu
);
7065 kvm_x86_ops
->handle_external_intr(vcpu
);
7069 guest_exit_irqoff();
7074 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7077 * Profile KVM exit RIPs:
7079 if (unlikely(prof_on
== KVM_PROFILING
)) {
7080 unsigned long rip
= kvm_rip_read(vcpu
);
7081 profile_hit(KVM_PROFILING
, (void *)rip
);
7084 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7085 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7087 if (vcpu
->arch
.apic_attention
)
7088 kvm_lapic_sync_from_vapic(vcpu
);
7090 vcpu
->arch
.gpa_available
= false;
7091 r
= kvm_x86_ops
->handle_exit(vcpu
);
7095 kvm_x86_ops
->cancel_injection(vcpu
);
7096 if (unlikely(vcpu
->arch
.apic_attention
))
7097 kvm_lapic_sync_from_vapic(vcpu
);
7102 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7104 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7105 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7106 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7107 kvm_vcpu_block(vcpu
);
7108 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7110 if (kvm_x86_ops
->post_block
)
7111 kvm_x86_ops
->post_block(vcpu
);
7113 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7117 kvm_apic_accept_events(vcpu
);
7118 switch(vcpu
->arch
.mp_state
) {
7119 case KVM_MP_STATE_HALTED
:
7120 vcpu
->arch
.pv
.pv_unhalted
= false;
7121 vcpu
->arch
.mp_state
=
7122 KVM_MP_STATE_RUNNABLE
;
7123 case KVM_MP_STATE_RUNNABLE
:
7124 vcpu
->arch
.apf
.halted
= false;
7126 case KVM_MP_STATE_INIT_RECEIVED
:
7135 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7137 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7138 kvm_x86_ops
->check_nested_events(vcpu
, false);
7140 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7141 !vcpu
->arch
.apf
.halted
);
7144 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7147 struct kvm
*kvm
= vcpu
->kvm
;
7149 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7152 if (kvm_vcpu_running(vcpu
)) {
7153 r
= vcpu_enter_guest(vcpu
);
7155 r
= vcpu_block(kvm
, vcpu
);
7161 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7162 if (kvm_cpu_has_pending_timer(vcpu
))
7163 kvm_inject_pending_timer_irqs(vcpu
);
7165 if (dm_request_for_irq_injection(vcpu
) &&
7166 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7168 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7169 ++vcpu
->stat
.request_irq_exits
;
7173 kvm_check_async_pf_completion(vcpu
);
7175 if (signal_pending(current
)) {
7177 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7178 ++vcpu
->stat
.signal_exits
;
7181 if (need_resched()) {
7182 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7184 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7188 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7193 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7196 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7197 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7198 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7199 if (r
!= EMULATE_DONE
)
7204 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7206 BUG_ON(!vcpu
->arch
.pio
.count
);
7208 return complete_emulated_io(vcpu
);
7212 * Implements the following, as a state machine:
7216 * for each mmio piece in the fragment
7224 * for each mmio piece in the fragment
7229 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7231 struct kvm_run
*run
= vcpu
->run
;
7232 struct kvm_mmio_fragment
*frag
;
7235 BUG_ON(!vcpu
->mmio_needed
);
7237 /* Complete previous fragment */
7238 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7239 len
= min(8u, frag
->len
);
7240 if (!vcpu
->mmio_is_write
)
7241 memcpy(frag
->data
, run
->mmio
.data
, len
);
7243 if (frag
->len
<= 8) {
7244 /* Switch to the next fragment. */
7246 vcpu
->mmio_cur_fragment
++;
7248 /* Go forward to the next mmio piece. */
7254 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7255 vcpu
->mmio_needed
= 0;
7257 /* FIXME: return into emulator if single-stepping. */
7258 if (vcpu
->mmio_is_write
)
7260 vcpu
->mmio_read_completed
= 1;
7261 return complete_emulated_io(vcpu
);
7264 run
->exit_reason
= KVM_EXIT_MMIO
;
7265 run
->mmio
.phys_addr
= frag
->gpa
;
7266 if (vcpu
->mmio_is_write
)
7267 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7268 run
->mmio
.len
= min(8u, frag
->len
);
7269 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7270 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7275 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7279 kvm_sigset_activate(vcpu
);
7281 kvm_load_guest_fpu(vcpu
);
7283 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7284 if (kvm_run
->immediate_exit
) {
7288 kvm_vcpu_block(vcpu
);
7289 kvm_apic_accept_events(vcpu
);
7290 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7292 if (signal_pending(current
)) {
7294 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7295 ++vcpu
->stat
.signal_exits
;
7300 /* re-sync apic's tpr */
7301 if (!lapic_in_kernel(vcpu
)) {
7302 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7308 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7309 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7310 vcpu
->arch
.complete_userspace_io
= NULL
;
7315 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7317 if (kvm_run
->immediate_exit
)
7323 kvm_put_guest_fpu(vcpu
);
7324 post_kvm_run_save(vcpu
);
7325 kvm_sigset_deactivate(vcpu
);
7330 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7332 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7334 * We are here if userspace calls get_regs() in the middle of
7335 * instruction emulation. Registers state needs to be copied
7336 * back from emulation context to vcpu. Userspace shouldn't do
7337 * that usually, but some bad designed PV devices (vmware
7338 * backdoor interface) need this to work
7340 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7341 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7343 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7344 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7345 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7346 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7347 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7348 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7349 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7350 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7351 #ifdef CONFIG_X86_64
7352 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7353 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7354 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7355 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7356 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7357 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7358 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7359 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7362 regs
->rip
= kvm_rip_read(vcpu
);
7363 regs
->rflags
= kvm_get_rflags(vcpu
);
7368 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7370 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7371 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7373 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7374 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7375 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7376 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7377 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7378 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7379 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7380 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7381 #ifdef CONFIG_X86_64
7382 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7383 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7384 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7385 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7386 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7387 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7388 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7389 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7392 kvm_rip_write(vcpu
, regs
->rip
);
7393 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7395 vcpu
->arch
.exception
.pending
= false;
7397 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7402 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7404 struct kvm_segment cs
;
7406 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7410 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7412 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7413 struct kvm_sregs
*sregs
)
7417 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7418 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7419 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7420 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7421 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7422 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7424 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7425 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7427 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7428 sregs
->idt
.limit
= dt
.size
;
7429 sregs
->idt
.base
= dt
.address
;
7430 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7431 sregs
->gdt
.limit
= dt
.size
;
7432 sregs
->gdt
.base
= dt
.address
;
7434 sregs
->cr0
= kvm_read_cr0(vcpu
);
7435 sregs
->cr2
= vcpu
->arch
.cr2
;
7436 sregs
->cr3
= kvm_read_cr3(vcpu
);
7437 sregs
->cr4
= kvm_read_cr4(vcpu
);
7438 sregs
->cr8
= kvm_get_cr8(vcpu
);
7439 sregs
->efer
= vcpu
->arch
.efer
;
7440 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7442 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7444 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7445 set_bit(vcpu
->arch
.interrupt
.nr
,
7446 (unsigned long *)sregs
->interrupt_bitmap
);
7451 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7452 struct kvm_mp_state
*mp_state
)
7454 kvm_apic_accept_events(vcpu
);
7455 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7456 vcpu
->arch
.pv
.pv_unhalted
)
7457 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7459 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7464 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7465 struct kvm_mp_state
*mp_state
)
7467 if (!lapic_in_kernel(vcpu
) &&
7468 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7471 /* INITs are latched while in SMM */
7472 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7473 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7474 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7477 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7478 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7479 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7481 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7482 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7486 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7487 int reason
, bool has_error_code
, u32 error_code
)
7489 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7492 init_emulate_ctxt(vcpu
);
7494 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7495 has_error_code
, error_code
);
7498 return EMULATE_FAIL
;
7500 kvm_rip_write(vcpu
, ctxt
->eip
);
7501 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7502 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7503 return EMULATE_DONE
;
7505 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7507 int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7509 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7511 * When EFER.LME and CR0.PG are set, the processor is in
7512 * 64-bit mode (though maybe in a 32-bit code segment).
7513 * CR4.PAE and EFER.LMA must be set.
7515 if (!(sregs
->cr4
& X86_CR4_PAE
)
7516 || !(sregs
->efer
& EFER_LMA
))
7520 * Not in 64-bit mode: EFER.LMA is clear and the code
7521 * segment cannot be 64-bit.
7523 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7530 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7531 struct kvm_sregs
*sregs
)
7533 struct msr_data apic_base_msr
;
7534 int mmu_reset_needed
= 0;
7535 int pending_vec
, max_bits
, idx
;
7538 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7539 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7542 if (kvm_valid_sregs(vcpu
, sregs
))
7545 apic_base_msr
.data
= sregs
->apic_base
;
7546 apic_base_msr
.host_initiated
= true;
7547 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7550 dt
.size
= sregs
->idt
.limit
;
7551 dt
.address
= sregs
->idt
.base
;
7552 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7553 dt
.size
= sregs
->gdt
.limit
;
7554 dt
.address
= sregs
->gdt
.base
;
7555 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7557 vcpu
->arch
.cr2
= sregs
->cr2
;
7558 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7559 vcpu
->arch
.cr3
= sregs
->cr3
;
7560 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7562 kvm_set_cr8(vcpu
, sregs
->cr8
);
7564 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7565 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7567 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7568 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7569 vcpu
->arch
.cr0
= sregs
->cr0
;
7571 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7572 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7573 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7574 kvm_update_cpuid(vcpu
);
7576 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7577 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7578 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7579 mmu_reset_needed
= 1;
7581 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7583 if (mmu_reset_needed
)
7584 kvm_mmu_reset_context(vcpu
);
7586 max_bits
= KVM_NR_INTERRUPTS
;
7587 pending_vec
= find_first_bit(
7588 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7589 if (pending_vec
< max_bits
) {
7590 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7591 pr_debug("Set back pending irq %d\n", pending_vec
);
7594 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7595 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7596 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7597 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7598 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7599 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7601 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7602 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7604 update_cr8_intercept(vcpu
);
7606 /* Older userspace won't unhalt the vcpu on reset. */
7607 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7608 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7610 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7612 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7617 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7618 struct kvm_guest_debug
*dbg
)
7620 unsigned long rflags
;
7623 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7625 if (vcpu
->arch
.exception
.pending
)
7627 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7628 kvm_queue_exception(vcpu
, DB_VECTOR
);
7630 kvm_queue_exception(vcpu
, BP_VECTOR
);
7634 * Read rflags as long as potentially injected trace flags are still
7637 rflags
= kvm_get_rflags(vcpu
);
7639 vcpu
->guest_debug
= dbg
->control
;
7640 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7641 vcpu
->guest_debug
= 0;
7643 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7644 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7645 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7646 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7648 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7649 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7651 kvm_update_dr7(vcpu
);
7653 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7654 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7655 get_segment_base(vcpu
, VCPU_SREG_CS
);
7658 * Trigger an rflags update that will inject or remove the trace
7661 kvm_set_rflags(vcpu
, rflags
);
7663 kvm_x86_ops
->update_bp_intercept(vcpu
);
7673 * Translate a guest virtual address to a guest physical address.
7675 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7676 struct kvm_translation
*tr
)
7678 unsigned long vaddr
= tr
->linear_address
;
7682 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7683 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7684 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7685 tr
->physical_address
= gpa
;
7686 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7693 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7695 struct fxregs_state
*fxsave
=
7696 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7698 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7699 fpu
->fcw
= fxsave
->cwd
;
7700 fpu
->fsw
= fxsave
->swd
;
7701 fpu
->ftwx
= fxsave
->twd
;
7702 fpu
->last_opcode
= fxsave
->fop
;
7703 fpu
->last_ip
= fxsave
->rip
;
7704 fpu
->last_dp
= fxsave
->rdp
;
7705 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7710 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7712 struct fxregs_state
*fxsave
=
7713 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7715 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7716 fxsave
->cwd
= fpu
->fcw
;
7717 fxsave
->swd
= fpu
->fsw
;
7718 fxsave
->twd
= fpu
->ftwx
;
7719 fxsave
->fop
= fpu
->last_opcode
;
7720 fxsave
->rip
= fpu
->last_ip
;
7721 fxsave
->rdp
= fpu
->last_dp
;
7722 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7727 static void fx_init(struct kvm_vcpu
*vcpu
)
7729 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7730 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7731 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7732 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7735 * Ensure guest xcr0 is valid for loading
7737 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7739 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7742 /* Swap (qemu) user FPU context for the guest FPU context. */
7743 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7746 copy_fpregs_to_fpstate(&vcpu
->arch
.user_fpu
);
7747 /* PKRU is separately restored in kvm_x86_ops->run. */
7748 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7749 ~XFEATURE_MASK_PKRU
);
7754 /* When vcpu_run ends, restore user space FPU context. */
7755 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7758 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7759 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
.state
);
7761 ++vcpu
->stat
.fpu_reload
;
7765 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7767 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7769 kvmclock_reset(vcpu
);
7771 kvm_x86_ops
->vcpu_free(vcpu
);
7772 free_cpumask_var(wbinvd_dirty_mask
);
7775 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7778 struct kvm_vcpu
*vcpu
;
7780 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7781 printk_once(KERN_WARNING
7782 "kvm: SMP vm created on host with unstable TSC; "
7783 "guest TSC will not be reliable\n");
7785 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7790 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7794 kvm_vcpu_mtrr_init(vcpu
);
7795 r
= vcpu_load(vcpu
);
7798 kvm_vcpu_reset(vcpu
, false);
7799 kvm_mmu_setup(vcpu
);
7804 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7806 struct msr_data msr
;
7807 struct kvm
*kvm
= vcpu
->kvm
;
7809 kvm_hv_vcpu_postcreate(vcpu
);
7811 if (vcpu_load(vcpu
))
7814 msr
.index
= MSR_IA32_TSC
;
7815 msr
.host_initiated
= true;
7816 kvm_write_tsc(vcpu
, &msr
);
7819 if (!kvmclock_periodic_sync
)
7822 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7823 KVMCLOCK_SYNC_PERIOD
);
7826 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7829 vcpu
->arch
.apf
.msr_val
= 0;
7831 r
= vcpu_load(vcpu
);
7833 kvm_mmu_unload(vcpu
);
7836 kvm_x86_ops
->vcpu_free(vcpu
);
7839 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7841 kvm_lapic_reset(vcpu
, init_event
);
7843 vcpu
->arch
.hflags
= 0;
7845 vcpu
->arch
.smi_pending
= 0;
7846 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7847 vcpu
->arch
.nmi_pending
= 0;
7848 vcpu
->arch
.nmi_injected
= false;
7849 kvm_clear_interrupt_queue(vcpu
);
7850 kvm_clear_exception_queue(vcpu
);
7851 vcpu
->arch
.exception
.pending
= false;
7853 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7854 kvm_update_dr0123(vcpu
);
7855 vcpu
->arch
.dr6
= DR6_INIT
;
7856 kvm_update_dr6(vcpu
);
7857 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7858 kvm_update_dr7(vcpu
);
7862 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7863 vcpu
->arch
.apf
.msr_val
= 0;
7864 vcpu
->arch
.st
.msr_val
= 0;
7866 kvmclock_reset(vcpu
);
7868 kvm_clear_async_pf_completion_queue(vcpu
);
7869 kvm_async_pf_hash_reset(vcpu
);
7870 vcpu
->arch
.apf
.halted
= false;
7872 if (kvm_mpx_supported()) {
7873 void *mpx_state_buffer
;
7876 * To avoid have the INIT path from kvm_apic_has_events() that be
7877 * called with loaded FPU and does not let userspace fix the state.
7880 kvm_put_guest_fpu(vcpu
);
7881 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
7882 XFEATURE_MASK_BNDREGS
);
7883 if (mpx_state_buffer
)
7884 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
7885 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
7886 XFEATURE_MASK_BNDCSR
);
7887 if (mpx_state_buffer
)
7888 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
7890 kvm_load_guest_fpu(vcpu
);
7894 kvm_pmu_reset(vcpu
);
7895 vcpu
->arch
.smbase
= 0x30000;
7897 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7898 vcpu
->arch
.msr_misc_features_enables
= 0;
7900 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7903 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7904 vcpu
->arch
.regs_avail
= ~0;
7905 vcpu
->arch
.regs_dirty
= ~0;
7907 vcpu
->arch
.ia32_xss
= 0;
7909 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7912 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7914 struct kvm_segment cs
;
7916 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7917 cs
.selector
= vector
<< 8;
7918 cs
.base
= vector
<< 12;
7919 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7920 kvm_rip_write(vcpu
, 0);
7923 int kvm_arch_hardware_enable(void)
7926 struct kvm_vcpu
*vcpu
;
7931 bool stable
, backwards_tsc
= false;
7933 kvm_shared_msr_cpu_online();
7934 ret
= kvm_x86_ops
->hardware_enable();
7938 local_tsc
= rdtsc();
7939 stable
= !check_tsc_unstable();
7940 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7941 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7942 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7943 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7944 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7945 backwards_tsc
= true;
7946 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7947 max_tsc
= vcpu
->arch
.last_host_tsc
;
7953 * Sometimes, even reliable TSCs go backwards. This happens on
7954 * platforms that reset TSC during suspend or hibernate actions, but
7955 * maintain synchronization. We must compensate. Fortunately, we can
7956 * detect that condition here, which happens early in CPU bringup,
7957 * before any KVM threads can be running. Unfortunately, we can't
7958 * bring the TSCs fully up to date with real time, as we aren't yet far
7959 * enough into CPU bringup that we know how much real time has actually
7960 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7961 * variables that haven't been updated yet.
7963 * So we simply find the maximum observed TSC above, then record the
7964 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7965 * the adjustment will be applied. Note that we accumulate
7966 * adjustments, in case multiple suspend cycles happen before some VCPU
7967 * gets a chance to run again. In the event that no KVM threads get a
7968 * chance to run, we will miss the entire elapsed period, as we'll have
7969 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7970 * loose cycle time. This isn't too big a deal, since the loss will be
7971 * uniform across all VCPUs (not to mention the scenario is extremely
7972 * unlikely). It is possible that a second hibernate recovery happens
7973 * much faster than a first, causing the observed TSC here to be
7974 * smaller; this would require additional padding adjustment, which is
7975 * why we set last_host_tsc to the local tsc observed here.
7977 * N.B. - this code below runs only on platforms with reliable TSC,
7978 * as that is the only way backwards_tsc is set above. Also note
7979 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7980 * have the same delta_cyc adjustment applied if backwards_tsc
7981 * is detected. Note further, this adjustment is only done once,
7982 * as we reset last_host_tsc on all VCPUs to stop this from being
7983 * called multiple times (one for each physical CPU bringup).
7985 * Platforms with unreliable TSCs don't have to deal with this, they
7986 * will be compensated by the logic in vcpu_load, which sets the TSC to
7987 * catchup mode. This will catchup all VCPUs to real time, but cannot
7988 * guarantee that they stay in perfect synchronization.
7990 if (backwards_tsc
) {
7991 u64 delta_cyc
= max_tsc
- local_tsc
;
7992 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7993 kvm
->arch
.backwards_tsc_observed
= true;
7994 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7995 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7996 vcpu
->arch
.last_host_tsc
= local_tsc
;
7997 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8001 * We have to disable TSC offset matching.. if you were
8002 * booting a VM while issuing an S4 host suspend....
8003 * you may have some problem. Solving this issue is
8004 * left as an exercise to the reader.
8006 kvm
->arch
.last_tsc_nsec
= 0;
8007 kvm
->arch
.last_tsc_write
= 0;
8014 void kvm_arch_hardware_disable(void)
8016 kvm_x86_ops
->hardware_disable();
8017 drop_user_return_notifiers();
8020 int kvm_arch_hardware_setup(void)
8024 r
= kvm_x86_ops
->hardware_setup();
8028 if (kvm_has_tsc_control
) {
8030 * Make sure the user can only configure tsc_khz values that
8031 * fit into a signed integer.
8032 * A min value is not calculated needed because it will always
8033 * be 1 on all machines.
8035 u64 max
= min(0x7fffffffULL
,
8036 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8037 kvm_max_guest_tsc_khz
= max
;
8039 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8042 kvm_init_msr_list();
8046 void kvm_arch_hardware_unsetup(void)
8048 kvm_x86_ops
->hardware_unsetup();
8051 void kvm_arch_check_processor_compat(void *rtn
)
8053 kvm_x86_ops
->check_processor_compatibility(rtn
);
8056 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8058 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8060 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8062 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8064 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8067 struct static_key kvm_no_apic_vcpu __read_mostly
;
8068 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8070 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8075 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8076 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8077 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8078 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8080 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8082 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8087 vcpu
->arch
.pio_data
= page_address(page
);
8089 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8091 r
= kvm_mmu_create(vcpu
);
8093 goto fail_free_pio_data
;
8095 if (irqchip_in_kernel(vcpu
->kvm
)) {
8096 r
= kvm_create_lapic(vcpu
);
8098 goto fail_mmu_destroy
;
8100 static_key_slow_inc(&kvm_no_apic_vcpu
);
8102 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8104 if (!vcpu
->arch
.mce_banks
) {
8106 goto fail_free_lapic
;
8108 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8110 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8112 goto fail_free_mce_banks
;
8117 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8119 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8121 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8123 kvm_async_pf_hash_reset(vcpu
);
8126 vcpu
->arch
.pending_external_vector
= -1;
8127 vcpu
->arch
.preempted_in_kernel
= false;
8129 kvm_hv_vcpu_init(vcpu
);
8133 fail_free_mce_banks
:
8134 kfree(vcpu
->arch
.mce_banks
);
8136 kvm_free_lapic(vcpu
);
8138 kvm_mmu_destroy(vcpu
);
8140 free_page((unsigned long)vcpu
->arch
.pio_data
);
8145 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8149 kvm_hv_vcpu_uninit(vcpu
);
8150 kvm_pmu_destroy(vcpu
);
8151 kfree(vcpu
->arch
.mce_banks
);
8152 kvm_free_lapic(vcpu
);
8153 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8154 kvm_mmu_destroy(vcpu
);
8155 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8156 free_page((unsigned long)vcpu
->arch
.pio_data
);
8157 if (!lapic_in_kernel(vcpu
))
8158 static_key_slow_dec(&kvm_no_apic_vcpu
);
8161 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8163 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8166 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8171 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8172 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8173 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8174 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8175 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8177 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8178 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8179 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8180 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8181 &kvm
->arch
.irq_sources_bitmap
);
8183 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8184 mutex_init(&kvm
->arch
.apic_map_lock
);
8185 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8186 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8188 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8189 pvclock_update_vm_gtod_copy(kvm
);
8191 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8192 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8194 kvm_page_track_init(kvm
);
8195 kvm_mmu_init_vm(kvm
);
8197 if (kvm_x86_ops
->vm_init
)
8198 return kvm_x86_ops
->vm_init(kvm
);
8203 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8206 r
= vcpu_load(vcpu
);
8208 kvm_mmu_unload(vcpu
);
8212 static void kvm_free_vcpus(struct kvm
*kvm
)
8215 struct kvm_vcpu
*vcpu
;
8218 * Unpin any mmu pages first.
8220 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8221 kvm_clear_async_pf_completion_queue(vcpu
);
8222 kvm_unload_vcpu_mmu(vcpu
);
8224 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8225 kvm_arch_vcpu_free(vcpu
);
8227 mutex_lock(&kvm
->lock
);
8228 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8229 kvm
->vcpus
[i
] = NULL
;
8231 atomic_set(&kvm
->online_vcpus
, 0);
8232 mutex_unlock(&kvm
->lock
);
8235 void kvm_arch_sync_events(struct kvm
*kvm
)
8237 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8238 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8242 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8246 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8247 struct kvm_memory_slot
*slot
, old
;
8249 /* Called with kvm->slots_lock held. */
8250 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8253 slot
= id_to_memslot(slots
, id
);
8259 * MAP_SHARED to prevent internal slot pages from being moved
8262 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8263 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8264 if (IS_ERR((void *)hva
))
8265 return PTR_ERR((void *)hva
);
8274 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8275 struct kvm_userspace_memory_region m
;
8277 m
.slot
= id
| (i
<< 16);
8279 m
.guest_phys_addr
= gpa
;
8280 m
.userspace_addr
= hva
;
8281 m
.memory_size
= size
;
8282 r
= __kvm_set_memory_region(kvm
, &m
);
8288 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8292 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8294 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8298 mutex_lock(&kvm
->slots_lock
);
8299 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8300 mutex_unlock(&kvm
->slots_lock
);
8304 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8306 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8308 if (current
->mm
== kvm
->mm
) {
8310 * Free memory regions allocated on behalf of userspace,
8311 * unless the the memory map has changed due to process exit
8314 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8315 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8316 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8318 if (kvm_x86_ops
->vm_destroy
)
8319 kvm_x86_ops
->vm_destroy(kvm
);
8320 kvm_pic_destroy(kvm
);
8321 kvm_ioapic_destroy(kvm
);
8322 kvm_free_vcpus(kvm
);
8323 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8324 kvm_mmu_uninit_vm(kvm
);
8325 kvm_page_track_cleanup(kvm
);
8328 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8329 struct kvm_memory_slot
*dont
)
8333 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8334 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8335 kvfree(free
->arch
.rmap
[i
]);
8336 free
->arch
.rmap
[i
] = NULL
;
8341 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8342 dont
->arch
.lpage_info
[i
- 1]) {
8343 kvfree(free
->arch
.lpage_info
[i
- 1]);
8344 free
->arch
.lpage_info
[i
- 1] = NULL
;
8348 kvm_page_track_free_memslot(free
, dont
);
8351 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8352 unsigned long npages
)
8356 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8357 struct kvm_lpage_info
*linfo
;
8362 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8363 slot
->base_gfn
, level
) + 1;
8365 slot
->arch
.rmap
[i
] =
8366 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8367 if (!slot
->arch
.rmap
[i
])
8372 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8376 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8378 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8379 linfo
[0].disallow_lpage
= 1;
8380 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8381 linfo
[lpages
- 1].disallow_lpage
= 1;
8382 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8384 * If the gfn and userspace address are not aligned wrt each
8385 * other, or if explicitly asked to, disable large page
8386 * support for this slot
8388 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8389 !kvm_largepages_enabled()) {
8392 for (j
= 0; j
< lpages
; ++j
)
8393 linfo
[j
].disallow_lpage
= 1;
8397 if (kvm_page_track_create_memslot(slot
, npages
))
8403 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8404 kvfree(slot
->arch
.rmap
[i
]);
8405 slot
->arch
.rmap
[i
] = NULL
;
8409 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8410 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8415 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8418 * memslots->generation has been incremented.
8419 * mmio generation may have reached its maximum value.
8421 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8424 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8425 struct kvm_memory_slot
*memslot
,
8426 const struct kvm_userspace_memory_region
*mem
,
8427 enum kvm_mr_change change
)
8432 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8433 struct kvm_memory_slot
*new)
8435 /* Still write protect RO slot */
8436 if (new->flags
& KVM_MEM_READONLY
) {
8437 kvm_mmu_slot_remove_write_access(kvm
, new);
8442 * Call kvm_x86_ops dirty logging hooks when they are valid.
8444 * kvm_x86_ops->slot_disable_log_dirty is called when:
8446 * - KVM_MR_CREATE with dirty logging is disabled
8447 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8449 * The reason is, in case of PML, we need to set D-bit for any slots
8450 * with dirty logging disabled in order to eliminate unnecessary GPA
8451 * logging in PML buffer (and potential PML buffer full VMEXT). This
8452 * guarantees leaving PML enabled during guest's lifetime won't have
8453 * any additonal overhead from PML when guest is running with dirty
8454 * logging disabled for memory slots.
8456 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8457 * to dirty logging mode.
8459 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8461 * In case of write protect:
8463 * Write protect all pages for dirty logging.
8465 * All the sptes including the large sptes which point to this
8466 * slot are set to readonly. We can not create any new large
8467 * spte on this slot until the end of the logging.
8469 * See the comments in fast_page_fault().
8471 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8472 if (kvm_x86_ops
->slot_enable_log_dirty
)
8473 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8475 kvm_mmu_slot_remove_write_access(kvm
, new);
8477 if (kvm_x86_ops
->slot_disable_log_dirty
)
8478 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8482 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8483 const struct kvm_userspace_memory_region
*mem
,
8484 const struct kvm_memory_slot
*old
,
8485 const struct kvm_memory_slot
*new,
8486 enum kvm_mr_change change
)
8488 int nr_mmu_pages
= 0;
8490 if (!kvm
->arch
.n_requested_mmu_pages
)
8491 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8494 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8497 * Dirty logging tracks sptes in 4k granularity, meaning that large
8498 * sptes have to be split. If live migration is successful, the guest
8499 * in the source machine will be destroyed and large sptes will be
8500 * created in the destination. However, if the guest continues to run
8501 * in the source machine (for example if live migration fails), small
8502 * sptes will remain around and cause bad performance.
8504 * Scan sptes if dirty logging has been stopped, dropping those
8505 * which can be collapsed into a single large-page spte. Later
8506 * page faults will create the large-page sptes.
8508 if ((change
!= KVM_MR_DELETE
) &&
8509 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8510 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8511 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8514 * Set up write protection and/or dirty logging for the new slot.
8516 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8517 * been zapped so no dirty logging staff is needed for old slot. For
8518 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8519 * new and it's also covered when dealing with the new slot.
8521 * FIXME: const-ify all uses of struct kvm_memory_slot.
8523 if (change
!= KVM_MR_DELETE
)
8524 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8527 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8529 kvm_mmu_invalidate_zap_all_pages(kvm
);
8532 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8533 struct kvm_memory_slot
*slot
)
8535 kvm_page_track_flush_slot(kvm
, slot
);
8538 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8540 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8543 if (kvm_apic_has_events(vcpu
))
8546 if (vcpu
->arch
.pv
.pv_unhalted
)
8549 if (vcpu
->arch
.exception
.pending
)
8552 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8553 (vcpu
->arch
.nmi_pending
&&
8554 kvm_x86_ops
->nmi_allowed(vcpu
)))
8557 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8558 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8561 if (kvm_arch_interrupt_allowed(vcpu
) &&
8562 kvm_cpu_has_interrupt(vcpu
))
8565 if (kvm_hv_has_stimer_pending(vcpu
))
8571 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8573 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8576 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8578 return vcpu
->arch
.preempted_in_kernel
;
8581 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8583 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8586 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8588 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8591 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8593 if (is_64_bit_mode(vcpu
))
8594 return kvm_rip_read(vcpu
);
8595 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8596 kvm_rip_read(vcpu
));
8598 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8600 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8602 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8604 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8606 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8608 unsigned long rflags
;
8610 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8611 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8612 rflags
&= ~X86_EFLAGS_TF
;
8615 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8617 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8619 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8620 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8621 rflags
|= X86_EFLAGS_TF
;
8622 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8625 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8627 __kvm_set_rflags(vcpu
, rflags
);
8628 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8630 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8632 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8636 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8640 r
= kvm_mmu_reload(vcpu
);
8644 if (!vcpu
->arch
.mmu
.direct_map
&&
8645 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8648 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8651 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8653 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8656 static inline u32
kvm_async_pf_next_probe(u32 key
)
8658 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8661 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8663 u32 key
= kvm_async_pf_hash_fn(gfn
);
8665 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8666 key
= kvm_async_pf_next_probe(key
);
8668 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8671 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8674 u32 key
= kvm_async_pf_hash_fn(gfn
);
8676 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8677 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8678 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8679 key
= kvm_async_pf_next_probe(key
);
8684 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8686 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8689 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8693 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8695 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8697 j
= kvm_async_pf_next_probe(j
);
8698 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8700 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8702 * k lies cyclically in ]i,j]
8704 * |....j i.k.| or |.k..j i...|
8706 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8707 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8712 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8715 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8719 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8722 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8726 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8727 struct kvm_async_pf
*work
)
8729 struct x86_exception fault
;
8731 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8732 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8734 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8735 (vcpu
->arch
.apf
.send_user_only
&&
8736 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8737 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8738 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8739 fault
.vector
= PF_VECTOR
;
8740 fault
.error_code_valid
= true;
8741 fault
.error_code
= 0;
8742 fault
.nested_page_fault
= false;
8743 fault
.address
= work
->arch
.token
;
8744 fault
.async_page_fault
= true;
8745 kvm_inject_page_fault(vcpu
, &fault
);
8749 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8750 struct kvm_async_pf
*work
)
8752 struct x86_exception fault
;
8755 if (work
->wakeup_all
)
8756 work
->arch
.token
= ~0; /* broadcast wakeup */
8758 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8759 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8761 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
8762 !apf_get_user(vcpu
, &val
)) {
8763 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
8764 vcpu
->arch
.exception
.pending
&&
8765 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
8766 !apf_put_user(vcpu
, 0)) {
8767 vcpu
->arch
.exception
.injected
= false;
8768 vcpu
->arch
.exception
.pending
= false;
8769 vcpu
->arch
.exception
.nr
= 0;
8770 vcpu
->arch
.exception
.has_error_code
= false;
8771 vcpu
->arch
.exception
.error_code
= 0;
8772 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8773 fault
.vector
= PF_VECTOR
;
8774 fault
.error_code_valid
= true;
8775 fault
.error_code
= 0;
8776 fault
.nested_page_fault
= false;
8777 fault
.address
= work
->arch
.token
;
8778 fault
.async_page_fault
= true;
8779 kvm_inject_page_fault(vcpu
, &fault
);
8782 vcpu
->arch
.apf
.halted
= false;
8783 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8786 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8788 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8791 return kvm_can_do_async_pf(vcpu
);
8794 void kvm_arch_start_assignment(struct kvm
*kvm
)
8796 atomic_inc(&kvm
->arch
.assigned_device_count
);
8798 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8800 void kvm_arch_end_assignment(struct kvm
*kvm
)
8802 atomic_dec(&kvm
->arch
.assigned_device_count
);
8804 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8806 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8808 return atomic_read(&kvm
->arch
.assigned_device_count
);
8810 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8812 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8814 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8816 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8818 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8820 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8822 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8824 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8826 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8828 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8830 bool kvm_arch_has_irq_bypass(void)
8832 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8835 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8836 struct irq_bypass_producer
*prod
)
8838 struct kvm_kernel_irqfd
*irqfd
=
8839 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8841 irqfd
->producer
= prod
;
8843 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8844 prod
->irq
, irqfd
->gsi
, 1);
8847 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8848 struct irq_bypass_producer
*prod
)
8851 struct kvm_kernel_irqfd
*irqfd
=
8852 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8854 WARN_ON(irqfd
->producer
!= prod
);
8855 irqfd
->producer
= NULL
;
8858 * When producer of consumer is unregistered, we change back to
8859 * remapped mode, so we can re-use the current implementation
8860 * when the irq is masked/disabled or the consumer side (KVM
8861 * int this case doesn't want to receive the interrupts.
8863 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8865 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8866 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8869 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8870 uint32_t guest_irq
, bool set
)
8872 if (!kvm_x86_ops
->update_pi_irte
)
8875 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8878 bool kvm_vector_hashing_enabled(void)
8880 return vector_hashing
;
8882 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8884 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8885 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8886 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8887 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8888 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8889 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8890 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8891 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8892 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8893 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8894 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8895 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8896 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8897 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8898 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8899 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8900 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8901 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8902 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);