1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/sched/isolation.h>
58 #include <linux/mem_encrypt.h>
59 #include <linux/entry-kvm.h>
61 #include <trace/events/kvm.h>
63 #include <asm/debugreg.h>
67 #include <linux/kernel_stat.h>
68 #include <asm/fpu/internal.h> /* Ugh! */
69 #include <asm/pvclock.h>
70 #include <asm/div64.h>
71 #include <asm/irq_remapping.h>
72 #include <asm/mshyperv.h>
73 #include <asm/hypervisor.h>
74 #include <asm/tlbflush.h>
75 #include <asm/intel_pt.h>
76 #include <asm/emulate_prefix.h>
77 #include <clocksource/hyperv_timer.h>
79 #define CREATE_TRACE_POINTS
82 #define MAX_IO_MSRS 256
83 #define KVM_MAX_MCE_BANKS 32
84 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
87 #define emul_to_vcpu(ctxt) \
88 ((struct kvm_vcpu *)(ctxt)->vcpu)
91 * - enable syscall per default because its emulated by KVM
92 * - enable LME and LMA per default on 64 bit KVM
96 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
98 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
101 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
104 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
106 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
107 static void process_nmi(struct kvm_vcpu
*vcpu
);
108 static void enter_smm(struct kvm_vcpu
*vcpu
);
109 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
110 static void store_regs(struct kvm_vcpu
*vcpu
);
111 static int sync_regs(struct kvm_vcpu
*vcpu
);
113 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
114 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
116 static bool __read_mostly ignore_msrs
= 0;
117 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
119 static bool __read_mostly report_ignored_msrs
= true;
120 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
122 unsigned int min_timer_period_us
= 200;
123 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
125 static bool __read_mostly kvmclock_periodic_sync
= true;
126 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
128 bool __read_mostly kvm_has_tsc_control
;
129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
130 u32 __read_mostly kvm_max_guest_tsc_khz
;
131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
132 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
134 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
136 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
140 static u32 __read_mostly tsc_tolerance_ppm
= 250;
141 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
144 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
145 * adaptive tuning starting from default advancment of 1000ns. '0' disables
146 * advancement entirely. Any other value is used as-is and disables adaptive
147 * tuning, i.e. allows priveleged userspace to set an exact advancement time.
149 static int __read_mostly lapic_timer_advance_ns
= -1;
150 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
152 static bool __read_mostly vector_hashing
= true;
153 module_param(vector_hashing
, bool, S_IRUGO
);
155 bool __read_mostly enable_vmware_backdoor
= false;
156 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
159 static bool __read_mostly force_emulation_prefix
= false;
160 module_param(force_emulation_prefix
, bool, S_IRUGO
);
162 int __read_mostly pi_inject_timer
= -1;
163 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
166 * Restoring the host value for MSRs that are only consumed when running in
167 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
168 * returns to userspace, i.e. the kernel can run with the guest's value.
170 #define KVM_MAX_NR_USER_RETURN_MSRS 16
172 struct kvm_user_return_msrs_global
{
174 u32 msrs
[KVM_MAX_NR_USER_RETURN_MSRS
];
177 struct kvm_user_return_msrs
{
178 struct user_return_notifier urn
;
180 struct kvm_user_return_msr_values
{
183 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
186 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global
;
187 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
189 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
190 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
191 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
192 | XFEATURE_MASK_PKRU)
194 u64 __read_mostly host_efer
;
195 EXPORT_SYMBOL_GPL(host_efer
);
197 bool __read_mostly allow_smaller_maxphyaddr
= 0;
198 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
200 u64 __read_mostly host_xss
;
201 EXPORT_SYMBOL_GPL(host_xss
);
202 u64 __read_mostly supported_xss
;
203 EXPORT_SYMBOL_GPL(supported_xss
);
205 struct kvm_stats_debugfs_item debugfs_entries
[] = {
206 VCPU_STAT("pf_fixed", pf_fixed
),
207 VCPU_STAT("pf_guest", pf_guest
),
208 VCPU_STAT("tlb_flush", tlb_flush
),
209 VCPU_STAT("invlpg", invlpg
),
210 VCPU_STAT("exits", exits
),
211 VCPU_STAT("io_exits", io_exits
),
212 VCPU_STAT("mmio_exits", mmio_exits
),
213 VCPU_STAT("signal_exits", signal_exits
),
214 VCPU_STAT("irq_window", irq_window_exits
),
215 VCPU_STAT("nmi_window", nmi_window_exits
),
216 VCPU_STAT("halt_exits", halt_exits
),
217 VCPU_STAT("halt_successful_poll", halt_successful_poll
),
218 VCPU_STAT("halt_attempted_poll", halt_attempted_poll
),
219 VCPU_STAT("halt_poll_invalid", halt_poll_invalid
),
220 VCPU_STAT("halt_wakeup", halt_wakeup
),
221 VCPU_STAT("hypercalls", hypercalls
),
222 VCPU_STAT("request_irq", request_irq_exits
),
223 VCPU_STAT("irq_exits", irq_exits
),
224 VCPU_STAT("host_state_reload", host_state_reload
),
225 VCPU_STAT("fpu_reload", fpu_reload
),
226 VCPU_STAT("insn_emulation", insn_emulation
),
227 VCPU_STAT("insn_emulation_fail", insn_emulation_fail
),
228 VCPU_STAT("irq_injections", irq_injections
),
229 VCPU_STAT("nmi_injections", nmi_injections
),
230 VCPU_STAT("req_event", req_event
),
231 VCPU_STAT("l1d_flush", l1d_flush
),
232 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns
),
233 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns
),
234 VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped
),
235 VM_STAT("mmu_pte_write", mmu_pte_write
),
236 VM_STAT("mmu_pte_updated", mmu_pte_updated
),
237 VM_STAT("mmu_pde_zapped", mmu_pde_zapped
),
238 VM_STAT("mmu_flooded", mmu_flooded
),
239 VM_STAT("mmu_recycled", mmu_recycled
),
240 VM_STAT("mmu_cache_miss", mmu_cache_miss
),
241 VM_STAT("mmu_unsync", mmu_unsync
),
242 VM_STAT("remote_tlb_flush", remote_tlb_flush
),
243 VM_STAT("largepages", lpages
, .mode
= 0444),
244 VM_STAT("nx_largepages_splitted", nx_lpage_splits
, .mode
= 0444),
245 VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions
),
249 u64 __read_mostly host_xcr0
;
250 u64 __read_mostly supported_xcr0
;
251 EXPORT_SYMBOL_GPL(supported_xcr0
);
253 static struct kmem_cache
*x86_fpu_cache
;
255 static struct kmem_cache
*x86_emulator_cache
;
258 * When called, it means the previous get/set msr reached an invalid msr.
259 * Return true if we want to ignore/silent this failed msr access.
261 static bool kvm_msr_ignored_check(struct kvm_vcpu
*vcpu
, u32 msr
,
262 u64 data
, bool write
)
264 const char *op
= write
? "wrmsr" : "rdmsr";
267 if (report_ignored_msrs
)
268 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
273 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
279 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
281 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
282 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
284 return kmem_cache_create_usercopy("x86_emulator", size
,
285 __alignof__(struct x86_emulate_ctxt
),
286 SLAB_ACCOUNT
, useroffset
,
287 size
- useroffset
, NULL
);
290 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
292 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
295 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
296 vcpu
->arch
.apf
.gfns
[i
] = ~0;
299 static void kvm_on_user_return(struct user_return_notifier
*urn
)
302 struct kvm_user_return_msrs
*msrs
303 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
304 struct kvm_user_return_msr_values
*values
;
308 * Disabling irqs at this point since the following code could be
309 * interrupted and executed through kvm_arch_hardware_disable()
311 local_irq_save(flags
);
312 if (msrs
->registered
) {
313 msrs
->registered
= false;
314 user_return_notifier_unregister(urn
);
316 local_irq_restore(flags
);
317 for (slot
= 0; slot
< user_return_msrs_global
.nr
; ++slot
) {
318 values
= &msrs
->values
[slot
];
319 if (values
->host
!= values
->curr
) {
320 wrmsrl(user_return_msrs_global
.msrs
[slot
], values
->host
);
321 values
->curr
= values
->host
;
326 void kvm_define_user_return_msr(unsigned slot
, u32 msr
)
328 BUG_ON(slot
>= KVM_MAX_NR_USER_RETURN_MSRS
);
329 user_return_msrs_global
.msrs
[slot
] = msr
;
330 if (slot
>= user_return_msrs_global
.nr
)
331 user_return_msrs_global
.nr
= slot
+ 1;
333 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr
);
335 static void kvm_user_return_msr_cpu_online(void)
337 unsigned int cpu
= smp_processor_id();
338 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
342 for (i
= 0; i
< user_return_msrs_global
.nr
; ++i
) {
343 rdmsrl_safe(user_return_msrs_global
.msrs
[i
], &value
);
344 msrs
->values
[i
].host
= value
;
345 msrs
->values
[i
].curr
= value
;
349 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
351 unsigned int cpu
= smp_processor_id();
352 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
355 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
356 if (value
== msrs
->values
[slot
].curr
)
358 err
= wrmsrl_safe(user_return_msrs_global
.msrs
[slot
], value
);
362 msrs
->values
[slot
].curr
= value
;
363 if (!msrs
->registered
) {
364 msrs
->urn
.on_user_return
= kvm_on_user_return
;
365 user_return_notifier_register(&msrs
->urn
);
366 msrs
->registered
= true;
370 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
372 static void drop_user_return_notifiers(void)
374 unsigned int cpu
= smp_processor_id();
375 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
377 if (msrs
->registered
)
378 kvm_on_user_return(&msrs
->urn
);
381 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
383 return vcpu
->arch
.apic_base
;
385 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
387 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
389 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
391 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
393 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
395 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
396 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
397 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
398 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
400 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
402 if (!msr_info
->host_initiated
) {
403 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
405 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
409 kvm_lapic_set_base(vcpu
, msr_info
->data
);
410 kvm_recalculate_apic_map(vcpu
->kvm
);
413 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
415 asmlinkage __visible noinstr
void kvm_spurious_fault(void)
417 /* Fault while not rebooting. We want the trace. */
418 BUG_ON(!kvm_rebooting
);
420 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
422 #define EXCPT_BENIGN 0
423 #define EXCPT_CONTRIBUTORY 1
426 static int exception_class(int vector
)
436 return EXCPT_CONTRIBUTORY
;
443 #define EXCPT_FAULT 0
445 #define EXCPT_ABORT 2
446 #define EXCPT_INTERRUPT 3
448 static int exception_type(int vector
)
452 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
453 return EXCPT_INTERRUPT
;
457 /* #DB is trap, as instruction watchpoints are handled elsewhere */
458 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
461 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
464 /* Reserved exceptions will result in fault */
468 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
470 unsigned nr
= vcpu
->arch
.exception
.nr
;
471 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
472 unsigned long payload
= vcpu
->arch
.exception
.payload
;
480 * "Certain debug exceptions may clear bit 0-3. The
481 * remaining contents of the DR6 register are never
482 * cleared by the processor".
484 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
486 * DR6.RTM is set by all #DB exceptions that don't clear it.
488 vcpu
->arch
.dr6
|= DR6_RTM
;
489 vcpu
->arch
.dr6
|= payload
;
491 * Bit 16 should be set in the payload whenever the #DB
492 * exception should clear DR6.RTM. This makes the payload
493 * compatible with the pending debug exceptions under VMX.
494 * Though not currently documented in the SDM, this also
495 * makes the payload compatible with the exit qualification
496 * for #DB exceptions under VMX.
498 vcpu
->arch
.dr6
^= payload
& DR6_RTM
;
501 * The #DB payload is defined as compatible with the 'pending
502 * debug exceptions' field under VMX, not DR6. While bit 12 is
503 * defined in the 'pending debug exceptions' field (enabled
504 * breakpoint), it is reserved and must be zero in DR6.
506 vcpu
->arch
.dr6
&= ~BIT(12);
509 vcpu
->arch
.cr2
= payload
;
513 vcpu
->arch
.exception
.has_payload
= false;
514 vcpu
->arch
.exception
.payload
= 0;
516 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
518 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
519 unsigned nr
, bool has_error
, u32 error_code
,
520 bool has_payload
, unsigned long payload
, bool reinject
)
525 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
527 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
529 if (has_error
&& !is_protmode(vcpu
))
533 * On vmentry, vcpu->arch.exception.pending is only
534 * true if an event injection was blocked by
535 * nested_run_pending. In that case, however,
536 * vcpu_enter_guest requests an immediate exit,
537 * and the guest shouldn't proceed far enough to
540 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
541 vcpu
->arch
.exception
.injected
= true;
542 if (WARN_ON_ONCE(has_payload
)) {
544 * A reinjected event has already
545 * delivered its payload.
551 vcpu
->arch
.exception
.pending
= true;
552 vcpu
->arch
.exception
.injected
= false;
554 vcpu
->arch
.exception
.has_error_code
= has_error
;
555 vcpu
->arch
.exception
.nr
= nr
;
556 vcpu
->arch
.exception
.error_code
= error_code
;
557 vcpu
->arch
.exception
.has_payload
= has_payload
;
558 vcpu
->arch
.exception
.payload
= payload
;
559 if (!is_guest_mode(vcpu
))
560 kvm_deliver_exception_payload(vcpu
);
564 /* to check exception */
565 prev_nr
= vcpu
->arch
.exception
.nr
;
566 if (prev_nr
== DF_VECTOR
) {
567 /* triple fault -> shutdown */
568 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
571 class1
= exception_class(prev_nr
);
572 class2
= exception_class(nr
);
573 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
574 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
576 * Generate double fault per SDM Table 5-5. Set
577 * exception.pending = true so that the double fault
578 * can trigger a nested vmexit.
580 vcpu
->arch
.exception
.pending
= true;
581 vcpu
->arch
.exception
.injected
= false;
582 vcpu
->arch
.exception
.has_error_code
= true;
583 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
584 vcpu
->arch
.exception
.error_code
= 0;
585 vcpu
->arch
.exception
.has_payload
= false;
586 vcpu
->arch
.exception
.payload
= 0;
588 /* replace previous exception with a new one in a hope
589 that instruction re-execution will regenerate lost
594 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
596 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
598 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
600 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
602 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
604 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
606 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
607 unsigned long payload
)
609 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
611 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
613 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
614 u32 error_code
, unsigned long payload
)
616 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
617 true, payload
, false);
620 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
623 kvm_inject_gp(vcpu
, 0);
625 return kvm_skip_emulated_instruction(vcpu
);
629 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
631 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
633 ++vcpu
->stat
.pf_guest
;
634 vcpu
->arch
.exception
.nested_apf
=
635 is_guest_mode(vcpu
) && fault
->async_page_fault
;
636 if (vcpu
->arch
.exception
.nested_apf
) {
637 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
638 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
640 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
644 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
646 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
647 struct x86_exception
*fault
)
649 struct kvm_mmu
*fault_mmu
;
650 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
652 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
656 * Invalidate the TLB entry for the faulting address, if it exists,
657 * else the access will fault indefinitely (and to emulate hardware).
659 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
660 !(fault
->error_code
& PFERR_RSVD_MASK
))
661 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
662 fault_mmu
->root_hpa
);
664 fault_mmu
->inject_page_fault(vcpu
, fault
);
665 return fault
->nested_page_fault
;
667 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
669 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
671 atomic_inc(&vcpu
->arch
.nmi_queued
);
672 kvm_make_request(KVM_REQ_NMI
, vcpu
);
674 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
676 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
678 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
680 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
682 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
684 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
686 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
689 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
690 * a #GP and return false.
692 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
694 if (kvm_x86_ops
.get_cpl(vcpu
) <= required_cpl
)
696 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
699 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
701 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
703 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
706 kvm_queue_exception(vcpu
, UD_VECTOR
);
709 EXPORT_SYMBOL_GPL(kvm_require_dr
);
712 * This function will be used to read from the physical memory of the currently
713 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
714 * can read from guest physical or from the guest's guest physical memory.
716 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
717 gfn_t ngfn
, void *data
, int offset
, int len
,
720 struct x86_exception exception
;
724 ngpa
= gfn_to_gpa(ngfn
);
725 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
726 if (real_gfn
== UNMAPPED_GVA
)
729 real_gfn
= gpa_to_gfn(real_gfn
);
731 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
733 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
735 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
736 void *data
, int offset
, int len
, u32 access
)
738 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
739 data
, offset
, len
, access
);
742 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
744 return rsvd_bits(cpuid_maxphyaddr(vcpu
), 63) | rsvd_bits(5, 8) |
749 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
751 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
753 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
754 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
757 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
759 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
760 offset
* sizeof(u64
), sizeof(pdpte
),
761 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
766 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
767 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
768 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
775 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
776 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
782 EXPORT_SYMBOL_GPL(load_pdptrs
);
784 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
786 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
791 if (!is_pae_paging(vcpu
))
794 if (!kvm_register_is_available(vcpu
, VCPU_EXREG_PDPTR
))
797 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
798 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
799 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
800 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
804 return memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
806 EXPORT_SYMBOL_GPL(pdptrs_changed
);
808 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
810 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
812 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
813 kvm_clear_async_pf_completion_queue(vcpu
);
814 kvm_async_pf_hash_reset(vcpu
);
817 if ((cr0
^ old_cr0
) & update_bits
)
818 kvm_mmu_reset_context(vcpu
);
820 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
821 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
822 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
823 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
825 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
827 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
829 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
830 unsigned long pdptr_bits
= X86_CR0_CD
| X86_CR0_NW
| X86_CR0_PG
;
835 if (cr0
& 0xffffffff00000000UL
)
839 cr0
&= ~CR0_RESERVED_BITS
;
841 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
844 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
848 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
849 (cr0
& X86_CR0_PG
)) {
854 kvm_x86_ops
.get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
859 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
860 is_pae(vcpu
) && ((cr0
^ old_cr0
) & pdptr_bits
) &&
861 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
)))
864 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
867 kvm_x86_ops
.set_cr0(vcpu
, cr0
);
869 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
873 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
875 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
877 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
879 EXPORT_SYMBOL_GPL(kvm_lmsw
);
881 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
883 if (vcpu
->arch
.guest_state_protected
)
886 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
888 if (vcpu
->arch
.xcr0
!= host_xcr0
)
889 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
891 if (vcpu
->arch
.xsaves_enabled
&&
892 vcpu
->arch
.ia32_xss
!= host_xss
)
893 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
896 if (static_cpu_has(X86_FEATURE_PKU
) &&
897 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
898 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
899 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
900 __write_pkru(vcpu
->arch
.pkru
);
902 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
904 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
906 if (vcpu
->arch
.guest_state_protected
)
909 if (static_cpu_has(X86_FEATURE_PKU
) &&
910 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
911 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
912 vcpu
->arch
.pkru
= rdpkru();
913 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
914 __write_pkru(vcpu
->arch
.host_pkru
);
917 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
919 if (vcpu
->arch
.xcr0
!= host_xcr0
)
920 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
922 if (vcpu
->arch
.xsaves_enabled
&&
923 vcpu
->arch
.ia32_xss
!= host_xss
)
924 wrmsrl(MSR_IA32_XSS
, host_xss
);
928 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
930 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
933 u64 old_xcr0
= vcpu
->arch
.xcr0
;
936 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
937 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
939 if (!(xcr0
& XFEATURE_MASK_FP
))
941 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
945 * Do not allow the guest to set bits that we do not support
946 * saving. However, xcr0 bit 0 is always set, even if the
947 * emulated CPU does not support XSAVE (see fx_init).
949 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
950 if (xcr0
& ~valid_bits
)
953 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
954 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
957 if (xcr0
& XFEATURE_MASK_AVX512
) {
958 if (!(xcr0
& XFEATURE_MASK_YMM
))
960 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
963 vcpu
->arch
.xcr0
= xcr0
;
965 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
966 kvm_update_cpuid_runtime(vcpu
);
970 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
972 if (kvm_x86_ops
.get_cpl(vcpu
) != 0 ||
973 __kvm_set_xcr(vcpu
, index
, xcr
)) {
974 kvm_inject_gp(vcpu
, 0);
979 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
981 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
983 if (cr4
& cr4_reserved_bits
)
986 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
989 return kvm_x86_ops
.is_valid_cr4(vcpu
, cr4
);
991 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
993 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
995 unsigned long mmu_role_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
996 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
998 if (((cr4
^ old_cr4
) & mmu_role_bits
) ||
999 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1000 kvm_mmu_reset_context(vcpu
);
1002 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1004 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1006 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1007 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1010 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1013 if (is_long_mode(vcpu
)) {
1014 if (!(cr4
& X86_CR4_PAE
))
1016 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1018 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1019 && ((cr4
^ old_cr4
) & pdptr_bits
)
1020 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
1021 kvm_read_cr3(vcpu
)))
1024 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1025 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1028 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1029 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1033 kvm_x86_ops
.set_cr4(vcpu
, cr4
);
1035 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1039 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1041 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1043 bool skip_tlb_flush
= false;
1044 #ifdef CONFIG_X86_64
1045 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1048 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1049 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1053 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
1054 if (!skip_tlb_flush
) {
1055 kvm_mmu_sync_roots(vcpu
);
1056 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1061 if (is_long_mode(vcpu
) &&
1062 (cr3
& vcpu
->arch
.cr3_lm_rsvd_bits
))
1064 else if (is_pae_paging(vcpu
) &&
1065 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1068 kvm_mmu_new_pgd(vcpu
, cr3
, skip_tlb_flush
, skip_tlb_flush
);
1069 vcpu
->arch
.cr3
= cr3
;
1070 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1074 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1076 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1078 if (cr8
& CR8_RESERVED_BITS
)
1080 if (lapic_in_kernel(vcpu
))
1081 kvm_lapic_set_tpr(vcpu
, cr8
);
1083 vcpu
->arch
.cr8
= cr8
;
1086 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1088 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1090 if (lapic_in_kernel(vcpu
))
1091 return kvm_lapic_get_cr8(vcpu
);
1093 return vcpu
->arch
.cr8
;
1095 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1097 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1101 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1102 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1103 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1104 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
1108 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1112 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1113 dr7
= vcpu
->arch
.guest_debug_dr7
;
1115 dr7
= vcpu
->arch
.dr7
;
1116 kvm_x86_ops
.set_dr7(vcpu
, dr7
);
1117 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1118 if (dr7
& DR7_BP_EN_MASK
)
1119 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1121 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1123 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1125 u64 fixed
= DR6_FIXED_1
;
1127 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1132 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1134 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1138 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1139 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1140 vcpu
->arch
.eff_db
[dr
] = val
;
1144 if (!kvm_dr6_valid(val
))
1145 return -1; /* #GP */
1146 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1150 if (!kvm_dr7_valid(val
))
1151 return -1; /* #GP */
1152 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1153 kvm_update_dr7(vcpu
);
1160 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1162 if (__kvm_set_dr(vcpu
, dr
, val
)) {
1163 kvm_inject_gp(vcpu
, 0);
1168 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1170 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1172 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1176 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1180 *val
= vcpu
->arch
.dr6
;
1184 *val
= vcpu
->arch
.dr7
;
1189 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1191 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
1193 u32 ecx
= kvm_rcx_read(vcpu
);
1197 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
1200 kvm_rax_write(vcpu
, (u32
)data
);
1201 kvm_rdx_write(vcpu
, data
>> 32);
1204 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
1207 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1208 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1210 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1211 * extract the supported MSRs from the related const lists.
1212 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1213 * capabilities of the host cpu. This capabilities test skips MSRs that are
1214 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1215 * may depend on host virtualization features rather than host cpu features.
1218 static const u32 msrs_to_save_all
[] = {
1219 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1221 #ifdef CONFIG_X86_64
1222 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1224 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1225 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1227 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1228 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1229 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1230 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1231 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1232 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1233 MSR_IA32_UMWAIT_CONTROL
,
1235 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1236 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2, MSR_ARCH_PERFMON_FIXED_CTR0
+ 3,
1237 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1238 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1239 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1240 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1241 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1242 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1243 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1244 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1245 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1246 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1247 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1248 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1249 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1250 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1251 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1252 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1253 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1254 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1255 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1256 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1259 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1260 static unsigned num_msrs_to_save
;
1262 static const u32 emulated_msrs_all
[] = {
1263 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1264 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1265 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1266 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1267 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1268 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1269 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1271 HV_X64_MSR_VP_INDEX
,
1272 HV_X64_MSR_VP_RUNTIME
,
1273 HV_X64_MSR_SCONTROL
,
1274 HV_X64_MSR_STIMER0_CONFIG
,
1275 HV_X64_MSR_VP_ASSIST_PAGE
,
1276 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1277 HV_X64_MSR_TSC_EMULATION_STATUS
,
1278 HV_X64_MSR_SYNDBG_OPTIONS
,
1279 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1280 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1281 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1283 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1284 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1286 MSR_IA32_TSC_ADJUST
,
1287 MSR_IA32_TSCDEADLINE
,
1288 MSR_IA32_ARCH_CAPABILITIES
,
1289 MSR_IA32_PERF_CAPABILITIES
,
1290 MSR_IA32_MISC_ENABLE
,
1291 MSR_IA32_MCG_STATUS
,
1293 MSR_IA32_MCG_EXT_CTL
,
1297 MSR_MISC_FEATURES_ENABLES
,
1298 MSR_AMD64_VIRT_SPEC_CTRL
,
1303 * The following list leaves out MSRs whose values are determined
1304 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1305 * We always support the "true" VMX control MSRs, even if the host
1306 * processor does not, so I am putting these registers here rather
1307 * than in msrs_to_save_all.
1310 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1311 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1312 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1313 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1315 MSR_IA32_VMX_CR0_FIXED0
,
1316 MSR_IA32_VMX_CR4_FIXED0
,
1317 MSR_IA32_VMX_VMCS_ENUM
,
1318 MSR_IA32_VMX_PROCBASED_CTLS2
,
1319 MSR_IA32_VMX_EPT_VPID_CAP
,
1320 MSR_IA32_VMX_VMFUNC
,
1323 MSR_KVM_POLL_CONTROL
,
1326 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1327 static unsigned num_emulated_msrs
;
1330 * List of msr numbers which are used to expose MSR-based features that
1331 * can be used by a hypervisor to validate requested CPU features.
1333 static const u32 msr_based_features_all
[] = {
1335 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1336 MSR_IA32_VMX_PINBASED_CTLS
,
1337 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1338 MSR_IA32_VMX_PROCBASED_CTLS
,
1339 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1340 MSR_IA32_VMX_EXIT_CTLS
,
1341 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1342 MSR_IA32_VMX_ENTRY_CTLS
,
1344 MSR_IA32_VMX_CR0_FIXED0
,
1345 MSR_IA32_VMX_CR0_FIXED1
,
1346 MSR_IA32_VMX_CR4_FIXED0
,
1347 MSR_IA32_VMX_CR4_FIXED1
,
1348 MSR_IA32_VMX_VMCS_ENUM
,
1349 MSR_IA32_VMX_PROCBASED_CTLS2
,
1350 MSR_IA32_VMX_EPT_VPID_CAP
,
1351 MSR_IA32_VMX_VMFUNC
,
1355 MSR_IA32_ARCH_CAPABILITIES
,
1356 MSR_IA32_PERF_CAPABILITIES
,
1359 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1360 static unsigned int num_msr_based_features
;
1362 static u64
kvm_get_arch_capabilities(void)
1366 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1367 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1370 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1371 * the nested hypervisor runs with NX huge pages. If it is not,
1372 * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1373 * L1 guests, so it need not worry about its own (L2) guests.
1375 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1378 * If we're doing cache flushes (either "always" or "cond")
1379 * we will do one whenever the guest does a vmlaunch/vmresume.
1380 * If an outer hypervisor is doing the cache flush for us
1381 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1382 * capability to the guest too, and if EPT is disabled we're not
1383 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1384 * require a nested hypervisor to do a flush of its own.
1386 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1387 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1389 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1390 data
|= ARCH_CAP_RDCL_NO
;
1391 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1392 data
|= ARCH_CAP_SSB_NO
;
1393 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1394 data
|= ARCH_CAP_MDS_NO
;
1397 * On TAA affected systems:
1398 * - nothing to do if TSX is disabled on the host.
1399 * - we emulate TSX_CTRL if present on the host.
1400 * This lets the guest use VERW to clear CPU buffers.
1402 if (!boot_cpu_has(X86_FEATURE_RTM
))
1403 data
&= ~(ARCH_CAP_TAA_NO
| ARCH_CAP_TSX_CTRL_MSR
);
1404 else if (!boot_cpu_has_bug(X86_BUG_TAA
))
1405 data
|= ARCH_CAP_TAA_NO
;
1410 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1412 switch (msr
->index
) {
1413 case MSR_IA32_ARCH_CAPABILITIES
:
1414 msr
->data
= kvm_get_arch_capabilities();
1416 case MSR_IA32_UCODE_REV
:
1417 rdmsrl_safe(msr
->index
, &msr
->data
);
1420 return kvm_x86_ops
.get_msr_feature(msr
);
1425 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1427 struct kvm_msr_entry msr
;
1431 r
= kvm_get_msr_feature(&msr
);
1433 if (r
== KVM_MSR_RET_INVALID
) {
1434 /* Unconditionally clear the output for simplicity */
1436 if (kvm_msr_ignored_check(vcpu
, index
, 0, false))
1448 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1450 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1453 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1456 if (efer
& (EFER_LME
| EFER_LMA
) &&
1457 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1460 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1466 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1468 if (efer
& efer_reserved_bits
)
1471 return __kvm_valid_efer(vcpu
, efer
);
1473 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1475 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1477 u64 old_efer
= vcpu
->arch
.efer
;
1478 u64 efer
= msr_info
->data
;
1481 if (efer
& efer_reserved_bits
)
1484 if (!msr_info
->host_initiated
) {
1485 if (!__kvm_valid_efer(vcpu
, efer
))
1488 if (is_paging(vcpu
) &&
1489 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1494 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1496 r
= kvm_x86_ops
.set_efer(vcpu
, efer
);
1502 /* Update reserved bits */
1503 if ((efer
^ old_efer
) & EFER_NX
)
1504 kvm_mmu_reset_context(vcpu
);
1509 void kvm_enable_efer_bits(u64 mask
)
1511 efer_reserved_bits
&= ~mask
;
1513 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1515 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1517 struct kvm
*kvm
= vcpu
->kvm
;
1518 struct msr_bitmap_range
*ranges
= kvm
->arch
.msr_filter
.ranges
;
1519 u32 count
= kvm
->arch
.msr_filter
.count
;
1521 bool r
= kvm
->arch
.msr_filter
.default_allow
;
1524 /* MSR filtering not set up or x2APIC enabled, allow everything */
1525 if (!count
|| (index
>= 0x800 && index
<= 0x8ff))
1528 /* Prevent collision with set_msr_filter */
1529 idx
= srcu_read_lock(&kvm
->srcu
);
1531 for (i
= 0; i
< count
; i
++) {
1532 u32 start
= ranges
[i
].base
;
1533 u32 end
= start
+ ranges
[i
].nmsrs
;
1534 u32 flags
= ranges
[i
].flags
;
1535 unsigned long *bitmap
= ranges
[i
].bitmap
;
1537 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1538 r
= !!test_bit(index
- start
, bitmap
);
1543 srcu_read_unlock(&kvm
->srcu
, idx
);
1547 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1550 * Write @data into the MSR specified by @index. Select MSR specific fault
1551 * checks are bypassed if @host_initiated is %true.
1552 * Returns 0 on success, non-0 otherwise.
1553 * Assumes vcpu_load() was already called.
1555 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1556 bool host_initiated
)
1558 struct msr_data msr
;
1560 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1561 return KVM_MSR_RET_FILTERED
;
1566 case MSR_KERNEL_GS_BASE
:
1569 if (is_noncanonical_address(data
, vcpu
))
1572 case MSR_IA32_SYSENTER_EIP
:
1573 case MSR_IA32_SYSENTER_ESP
:
1575 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1576 * non-canonical address is written on Intel but not on
1577 * AMD (which ignores the top 32-bits, because it does
1578 * not implement 64-bit SYSENTER).
1580 * 64-bit code should hence be able to write a non-canonical
1581 * value on AMD. Making the address canonical ensures that
1582 * vmentry does not fail on Intel after writing a non-canonical
1583 * value, and that something deterministic happens if the guest
1584 * invokes 64-bit SYSENTER.
1586 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1591 msr
.host_initiated
= host_initiated
;
1593 return kvm_x86_ops
.set_msr(vcpu
, &msr
);
1596 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1597 u32 index
, u64 data
, bool host_initiated
)
1599 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1601 if (ret
== KVM_MSR_RET_INVALID
)
1602 if (kvm_msr_ignored_check(vcpu
, index
, data
, true))
1609 * Read the MSR specified by @index into @data. Select MSR specific fault
1610 * checks are bypassed if @host_initiated is %true.
1611 * Returns 0 on success, non-0 otherwise.
1612 * Assumes vcpu_load() was already called.
1614 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1615 bool host_initiated
)
1617 struct msr_data msr
;
1620 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1621 return KVM_MSR_RET_FILTERED
;
1624 msr
.host_initiated
= host_initiated
;
1626 ret
= kvm_x86_ops
.get_msr(vcpu
, &msr
);
1632 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1633 u32 index
, u64
*data
, bool host_initiated
)
1635 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1637 if (ret
== KVM_MSR_RET_INVALID
) {
1638 /* Unconditionally clear *data for simplicity */
1640 if (kvm_msr_ignored_check(vcpu
, index
, 0, false))
1647 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1649 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1651 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1653 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1655 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1657 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1659 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1661 int err
= vcpu
->run
->msr
.error
;
1663 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1664 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1667 return kvm_x86_ops
.complete_emulated_msr(vcpu
, err
);
1670 static int complete_emulated_wrmsr(struct kvm_vcpu
*vcpu
)
1672 return kvm_x86_ops
.complete_emulated_msr(vcpu
, vcpu
->run
->msr
.error
);
1675 static u64
kvm_msr_reason(int r
)
1678 case KVM_MSR_RET_INVALID
:
1679 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1680 case KVM_MSR_RET_FILTERED
:
1681 return KVM_MSR_EXIT_REASON_FILTER
;
1683 return KVM_MSR_EXIT_REASON_INVAL
;
1687 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1688 u32 exit_reason
, u64 data
,
1689 int (*completion
)(struct kvm_vcpu
*vcpu
),
1692 u64 msr_reason
= kvm_msr_reason(r
);
1694 /* Check if the user wanted to know about this MSR fault */
1695 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1698 vcpu
->run
->exit_reason
= exit_reason
;
1699 vcpu
->run
->msr
.error
= 0;
1700 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1701 vcpu
->run
->msr
.reason
= msr_reason
;
1702 vcpu
->run
->msr
.index
= index
;
1703 vcpu
->run
->msr
.data
= data
;
1704 vcpu
->arch
.complete_userspace_io
= completion
;
1709 static int kvm_get_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, int r
)
1711 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_RDMSR
, 0,
1712 complete_emulated_rdmsr
, r
);
1715 static int kvm_set_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
, int r
)
1717 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_WRMSR
, data
,
1718 complete_emulated_wrmsr
, r
);
1721 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1723 u32 ecx
= kvm_rcx_read(vcpu
);
1727 r
= kvm_get_msr(vcpu
, ecx
, &data
);
1729 /* MSR read failed? See if we should ask user space */
1730 if (r
&& kvm_get_msr_user_space(vcpu
, ecx
, r
)) {
1731 /* Bounce to user space */
1736 trace_kvm_msr_read(ecx
, data
);
1738 kvm_rax_write(vcpu
, data
& -1u);
1739 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1741 trace_kvm_msr_read_ex(ecx
);
1744 return kvm_x86_ops
.complete_emulated_msr(vcpu
, r
);
1746 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1748 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1750 u32 ecx
= kvm_rcx_read(vcpu
);
1751 u64 data
= kvm_read_edx_eax(vcpu
);
1754 r
= kvm_set_msr(vcpu
, ecx
, data
);
1756 /* MSR write failed? See if we should ask user space */
1757 if (r
&& kvm_set_msr_user_space(vcpu
, ecx
, data
, r
))
1758 /* Bounce to user space */
1761 /* Signal all other negative errors to userspace */
1766 trace_kvm_msr_write(ecx
, data
);
1768 trace_kvm_msr_write_ex(ecx
, data
);
1770 return kvm_x86_ops
.complete_emulated_msr(vcpu
, r
);
1772 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1774 bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
1776 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
1777 xfer_to_guest_mode_work_pending();
1779 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request
);
1782 * The fast path for frequent and performance sensitive wrmsr emulation,
1783 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1784 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1785 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1786 * other cases which must be called after interrupts are enabled on the host.
1788 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1790 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1793 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1794 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1795 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1796 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1799 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1800 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1801 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1802 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1809 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
1811 if (!kvm_can_use_hv_timer(vcpu
))
1814 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1818 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
1820 u32 msr
= kvm_rcx_read(vcpu
);
1822 fastpath_t ret
= EXIT_FASTPATH_NONE
;
1825 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
1826 data
= kvm_read_edx_eax(vcpu
);
1827 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
1828 kvm_skip_emulated_instruction(vcpu
);
1829 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
1832 case MSR_IA32_TSCDEADLINE
:
1833 data
= kvm_read_edx_eax(vcpu
);
1834 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
1835 kvm_skip_emulated_instruction(vcpu
);
1836 ret
= EXIT_FASTPATH_REENTER_GUEST
;
1843 if (ret
!= EXIT_FASTPATH_NONE
)
1844 trace_kvm_msr_write(msr
, data
);
1848 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
1851 * Adapt set_msr() to msr_io()'s calling convention
1853 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1855 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
1858 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1860 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
1863 #ifdef CONFIG_X86_64
1864 struct pvclock_clock
{
1874 struct pvclock_gtod_data
{
1877 struct pvclock_clock clock
; /* extract of a clocksource struct */
1878 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
1884 static struct pvclock_gtod_data pvclock_gtod_data
;
1886 static void update_pvclock_gtod(struct timekeeper
*tk
)
1888 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1890 write_seqcount_begin(&vdata
->seq
);
1892 /* copy pvclock gtod data */
1893 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
1894 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1895 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1896 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1897 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1898 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
1899 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
1901 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
1902 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
1903 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
1904 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
1905 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
1906 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
1907 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
1909 vdata
->wall_time_sec
= tk
->xtime_sec
;
1911 vdata
->offs_boot
= tk
->offs_boot
;
1913 write_seqcount_end(&vdata
->seq
);
1916 static s64
get_kvmclock_base_ns(void)
1918 /* Count up from boot time, but with the frequency of the raw clock. */
1919 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
1922 static s64
get_kvmclock_base_ns(void)
1924 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
1925 return ktime_get_boottime_ns();
1929 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1933 struct pvclock_wall_clock wc
;
1936 kvm
->arch
.wall_clock
= wall_clock
;
1941 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1946 ++version
; /* first time write, random junk */
1950 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1954 * The guest calculates current wall clock time by adding
1955 * system time (updated by kvm_guest_time_update below) to the
1956 * wall clock specified here. We do the reverse here.
1958 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
1960 wc
.nsec
= do_div(wall_nsec
, 1000000000);
1961 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
1962 wc
.version
= version
;
1964 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1967 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1970 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
1971 bool old_msr
, bool host_initiated
)
1973 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1975 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
1976 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
1977 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1979 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
1982 vcpu
->arch
.time
= system_time
;
1983 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
1985 /* we verify if the enable bit is set... */
1986 vcpu
->arch
.pv_time_enabled
= false;
1987 if (!(system_time
& 1))
1990 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
1991 &vcpu
->arch
.pv_time
, system_time
& ~1ULL,
1992 sizeof(struct pvclock_vcpu_time_info
)))
1993 vcpu
->arch
.pv_time_enabled
= true;
1998 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2000 do_shl32_div32(dividend
, divisor
);
2004 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2005 s8
*pshift
, u32
*pmultiplier
)
2013 scaled64
= scaled_hz
;
2014 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2019 tps32
= (uint32_t)tps64
;
2020 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2021 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2029 *pmultiplier
= div_frac(scaled64
, tps32
);
2032 #ifdef CONFIG_X86_64
2033 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2036 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2037 static unsigned long max_tsc_khz
;
2039 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2041 u64 v
= (u64
)khz
* (1000000 + ppm
);
2046 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2050 /* Guest TSC same frequency as host TSC? */
2052 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
2056 /* TSC scaling supported? */
2057 if (!kvm_has_tsc_control
) {
2058 if (user_tsc_khz
> tsc_khz
) {
2059 vcpu
->arch
.tsc_catchup
= 1;
2060 vcpu
->arch
.tsc_always_catchup
= 1;
2063 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2068 /* TSC scaling required - calculate ratio */
2069 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2070 user_tsc_khz
, tsc_khz
);
2072 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2073 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2078 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
2082 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2084 u32 thresh_lo
, thresh_hi
;
2085 int use_scaling
= 0;
2087 /* tsc_khz can be zero if TSC calibration fails */
2088 if (user_tsc_khz
== 0) {
2089 /* set tsc_scaling_ratio to a safe value */
2090 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
2094 /* Compute a scale to convert nanoseconds in TSC cycles */
2095 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2096 &vcpu
->arch
.virtual_tsc_shift
,
2097 &vcpu
->arch
.virtual_tsc_mult
);
2098 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2101 * Compute the variation in TSC rate which is acceptable
2102 * within the range of tolerance and decide if the
2103 * rate being applied is within that bounds of the hardware
2104 * rate. If so, no scaling or compensation need be done.
2106 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2107 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2108 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2109 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2112 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2115 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2117 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2118 vcpu
->arch
.virtual_tsc_mult
,
2119 vcpu
->arch
.virtual_tsc_shift
);
2120 tsc
+= vcpu
->arch
.this_tsc_write
;
2124 static inline int gtod_is_based_on_tsc(int mode
)
2126 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2129 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2131 #ifdef CONFIG_X86_64
2133 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2134 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2136 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2137 atomic_read(&vcpu
->kvm
->online_vcpus
));
2140 * Once the masterclock is enabled, always perform request in
2141 * order to update it.
2143 * In order to enable masterclock, the host clocksource must be TSC
2144 * and the vcpus need to have matched TSCs. When that happens,
2145 * perform request to enable masterclock.
2147 if (ka
->use_master_clock
||
2148 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2149 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2151 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2152 atomic_read(&vcpu
->kvm
->online_vcpus
),
2153 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2158 * Multiply tsc by a fixed point number represented by ratio.
2160 * The most significant 64-N bits (mult) of ratio represent the
2161 * integral part of the fixed point number; the remaining N bits
2162 * (frac) represent the fractional part, ie. ratio represents a fixed
2163 * point number (mult + frac * 2^(-N)).
2165 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2167 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2169 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2172 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
2175 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
2177 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2178 _tsc
= __scale_tsc(ratio
, tsc
);
2182 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2184 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2188 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
2190 return target_tsc
- tsc
;
2193 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2195 return vcpu
->arch
.l1_tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
2197 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2199 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
2201 vcpu
->arch
.l1_tsc_offset
= offset
;
2202 vcpu
->arch
.tsc_offset
= kvm_x86_ops
.write_l1_tsc_offset(vcpu
, offset
);
2205 static inline bool kvm_check_tsc_unstable(void)
2207 #ifdef CONFIG_X86_64
2209 * TSC is marked unstable when we're running on Hyper-V,
2210 * 'TSC page' clocksource is good.
2212 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2215 return check_tsc_unstable();
2218 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2220 struct kvm
*kvm
= vcpu
->kvm
;
2221 u64 offset
, ns
, elapsed
;
2222 unsigned long flags
;
2224 bool already_matched
;
2225 bool synchronizing
= false;
2227 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2228 offset
= kvm_compute_tsc_offset(vcpu
, data
);
2229 ns
= get_kvmclock_base_ns();
2230 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2232 if (vcpu
->arch
.virtual_tsc_khz
) {
2235 * detection of vcpu initialization -- need to sync
2236 * with other vCPUs. This particularly helps to keep
2237 * kvm_clock stable after CPU hotplug
2239 synchronizing
= true;
2241 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2242 nsec_to_cycles(vcpu
, elapsed
);
2243 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2245 * Special case: TSC write with a small delta (1 second)
2246 * of virtual cycle time against real time is
2247 * interpreted as an attempt to synchronize the CPU.
2249 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2250 data
+ tsc_hz
> tsc_exp
;
2255 * For a reliable TSC, we can match TSC offsets, and for an unstable
2256 * TSC, we add elapsed time in this computation. We could let the
2257 * compensation code attempt to catch up if we fall behind, but
2258 * it's better to try to match offsets from the beginning.
2260 if (synchronizing
&&
2261 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2262 if (!kvm_check_tsc_unstable()) {
2263 offset
= kvm
->arch
.cur_tsc_offset
;
2265 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2267 offset
= kvm_compute_tsc_offset(vcpu
, data
);
2270 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2273 * We split periods of matched TSC writes into generations.
2274 * For each generation, we track the original measured
2275 * nanosecond time, offset, and write, so if TSCs are in
2276 * sync, we can match exact offset, and if not, we can match
2277 * exact software computation in compute_guest_tsc()
2279 * These values are tracked in kvm->arch.cur_xxx variables.
2281 kvm
->arch
.cur_tsc_generation
++;
2282 kvm
->arch
.cur_tsc_nsec
= ns
;
2283 kvm
->arch
.cur_tsc_write
= data
;
2284 kvm
->arch
.cur_tsc_offset
= offset
;
2289 * We also track th most recent recorded KHZ, write and time to
2290 * allow the matching interval to be extended at each write.
2292 kvm
->arch
.last_tsc_nsec
= ns
;
2293 kvm
->arch
.last_tsc_write
= data
;
2294 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2296 vcpu
->arch
.last_guest_tsc
= data
;
2298 /* Keep track of which generation this VCPU has synchronized to */
2299 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2300 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2301 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2303 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2304 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2306 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
2308 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2309 } else if (!already_matched
) {
2310 kvm
->arch
.nr_vcpus_matched_tsc
++;
2313 kvm_track_tsc_matching(vcpu
);
2314 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
2317 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2320 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2321 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2324 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2326 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2327 WARN_ON(adjustment
< 0);
2328 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
2329 adjust_tsc_offset_guest(vcpu
, adjustment
);
2332 #ifdef CONFIG_X86_64
2334 static u64
read_tsc(void)
2336 u64 ret
= (u64
)rdtsc_ordered();
2337 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2339 if (likely(ret
>= last
))
2343 * GCC likes to generate cmov here, but this branch is extremely
2344 * predictable (it's just a function of time and the likely is
2345 * very likely) and there's a data dependence, so force GCC
2346 * to generate a branch instead. I don't barrier() because
2347 * we don't actually need a barrier, and if this function
2348 * ever gets inlined it will generate worse code.
2354 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2360 switch (clock
->vclock_mode
) {
2361 case VDSO_CLOCKMODE_HVCLOCK
:
2362 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2364 if (tsc_pg_val
!= U64_MAX
) {
2365 /* TSC page valid */
2366 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2367 v
= (tsc_pg_val
- clock
->cycle_last
) &
2370 /* TSC page invalid */
2371 *mode
= VDSO_CLOCKMODE_NONE
;
2374 case VDSO_CLOCKMODE_TSC
:
2375 *mode
= VDSO_CLOCKMODE_TSC
;
2376 *tsc_timestamp
= read_tsc();
2377 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2381 *mode
= VDSO_CLOCKMODE_NONE
;
2384 if (*mode
== VDSO_CLOCKMODE_NONE
)
2385 *tsc_timestamp
= v
= 0;
2387 return v
* clock
->mult
;
2390 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2392 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2398 seq
= read_seqcount_begin(>od
->seq
);
2399 ns
= gtod
->raw_clock
.base_cycles
;
2400 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2401 ns
>>= gtod
->raw_clock
.shift
;
2402 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2403 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2409 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2411 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2417 seq
= read_seqcount_begin(>od
->seq
);
2418 ts
->tv_sec
= gtod
->wall_time_sec
;
2419 ns
= gtod
->clock
.base_cycles
;
2420 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2421 ns
>>= gtod
->clock
.shift
;
2422 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2424 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2430 /* returns true if host is using TSC based clocksource */
2431 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2433 /* checked again under seqlock below */
2434 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2437 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2441 /* returns true if host is using TSC based clocksource */
2442 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2445 /* checked again under seqlock below */
2446 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2449 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2455 * Assuming a stable TSC across physical CPUS, and a stable TSC
2456 * across virtual CPUs, the following condition is possible.
2457 * Each numbered line represents an event visible to both
2458 * CPUs at the next numbered event.
2460 * "timespecX" represents host monotonic time. "tscX" represents
2463 * VCPU0 on CPU0 | VCPU1 on CPU1
2465 * 1. read timespec0,tsc0
2466 * 2. | timespec1 = timespec0 + N
2468 * 3. transition to guest | transition to guest
2469 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2470 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2471 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2473 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2476 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2478 * - 0 < N - M => M < N
2480 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2481 * always the case (the difference between two distinct xtime instances
2482 * might be smaller then the difference between corresponding TSC reads,
2483 * when updating guest vcpus pvclock areas).
2485 * To avoid that problem, do not allow visibility of distinct
2486 * system_timestamp/tsc_timestamp values simultaneously: use a master
2487 * copy of host monotonic time values. Update that master copy
2490 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2494 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2496 #ifdef CONFIG_X86_64
2497 struct kvm_arch
*ka
= &kvm
->arch
;
2499 bool host_tsc_clocksource
, vcpus_matched
;
2501 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2502 atomic_read(&kvm
->online_vcpus
));
2505 * If the host uses TSC clock, then passthrough TSC as stable
2508 host_tsc_clocksource
= kvm_get_time_and_clockread(
2509 &ka
->master_kernel_ns
,
2510 &ka
->master_cycle_now
);
2512 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2513 && !ka
->backwards_tsc_observed
2514 && !ka
->boot_vcpu_runs_old_kvmclock
;
2516 if (ka
->use_master_clock
)
2517 atomic_set(&kvm_guest_has_master_clock
, 1);
2519 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2520 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2525 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2527 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2530 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2532 #ifdef CONFIG_X86_64
2534 struct kvm_vcpu
*vcpu
;
2535 struct kvm_arch
*ka
= &kvm
->arch
;
2537 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2538 kvm_make_mclock_inprogress_request(kvm
);
2539 /* no guest entries from this point */
2540 pvclock_update_vm_gtod_copy(kvm
);
2542 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2543 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2545 /* guest entries allowed */
2546 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2547 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2549 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2553 u64
get_kvmclock_ns(struct kvm
*kvm
)
2555 struct kvm_arch
*ka
= &kvm
->arch
;
2556 struct pvclock_vcpu_time_info hv_clock
;
2559 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2560 if (!ka
->use_master_clock
) {
2561 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2562 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2565 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2566 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2567 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2569 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2572 if (__this_cpu_read(cpu_tsc_khz
)) {
2573 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2574 &hv_clock
.tsc_shift
,
2575 &hv_clock
.tsc_to_system_mul
);
2576 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2578 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2585 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
2587 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2588 struct pvclock_vcpu_time_info guest_hv_clock
;
2590 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2591 &guest_hv_clock
, sizeof(guest_hv_clock
))))
2594 /* This VCPU is paused, but it's legal for a guest to read another
2595 * VCPU's kvmclock, so we really have to follow the specification where
2596 * it says that version is odd if data is being modified, and even after
2599 * Version field updates must be kept separate. This is because
2600 * kvm_write_guest_cached might use a "rep movs" instruction, and
2601 * writes within a string instruction are weakly ordered. So there
2602 * are three writes overall.
2604 * As a small optimization, only write the version field in the first
2605 * and third write. The vcpu->pv_time cache is still valid, because the
2606 * version field is the first in the struct.
2608 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2610 if (guest_hv_clock
.version
& 1)
2611 ++guest_hv_clock
.version
; /* first time write, random junk */
2613 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2614 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2616 sizeof(vcpu
->hv_clock
.version
));
2620 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2621 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2623 if (vcpu
->pvclock_set_guest_stopped_request
) {
2624 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2625 vcpu
->pvclock_set_guest_stopped_request
= false;
2628 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2630 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2632 sizeof(vcpu
->hv_clock
));
2636 vcpu
->hv_clock
.version
++;
2637 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2639 sizeof(vcpu
->hv_clock
.version
));
2642 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2644 unsigned long flags
, tgt_tsc_khz
;
2645 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2646 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2648 u64 tsc_timestamp
, host_tsc
;
2650 bool use_master_clock
;
2656 * If the host uses TSC clock, then passthrough TSC as stable
2659 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2660 use_master_clock
= ka
->use_master_clock
;
2661 if (use_master_clock
) {
2662 host_tsc
= ka
->master_cycle_now
;
2663 kernel_ns
= ka
->master_kernel_ns
;
2665 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2667 /* Keep irq disabled to prevent changes to the clock */
2668 local_irq_save(flags
);
2669 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2670 if (unlikely(tgt_tsc_khz
== 0)) {
2671 local_irq_restore(flags
);
2672 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2675 if (!use_master_clock
) {
2677 kernel_ns
= get_kvmclock_base_ns();
2680 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2683 * We may have to catch up the TSC to match elapsed wall clock
2684 * time for two reasons, even if kvmclock is used.
2685 * 1) CPU could have been running below the maximum TSC rate
2686 * 2) Broken TSC compensation resets the base at each VCPU
2687 * entry to avoid unknown leaps of TSC even when running
2688 * again on the same CPU. This may cause apparent elapsed
2689 * time to disappear, and the guest to stand still or run
2692 if (vcpu
->tsc_catchup
) {
2693 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2694 if (tsc
> tsc_timestamp
) {
2695 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2696 tsc_timestamp
= tsc
;
2700 local_irq_restore(flags
);
2702 /* With all the info we got, fill in the values */
2704 if (kvm_has_tsc_control
)
2705 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2707 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2708 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2709 &vcpu
->hv_clock
.tsc_shift
,
2710 &vcpu
->hv_clock
.tsc_to_system_mul
);
2711 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2714 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2715 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2716 vcpu
->last_guest_tsc
= tsc_timestamp
;
2718 /* If the host uses TSC clocksource, then it is stable */
2720 if (use_master_clock
)
2721 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2723 vcpu
->hv_clock
.flags
= pvclock_flags
;
2725 if (vcpu
->pv_time_enabled
)
2726 kvm_setup_pvclock_page(v
);
2727 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2728 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2733 * kvmclock updates which are isolated to a given vcpu, such as
2734 * vcpu->cpu migration, should not allow system_timestamp from
2735 * the rest of the vcpus to remain static. Otherwise ntp frequency
2736 * correction applies to one vcpu's system_timestamp but not
2739 * So in those cases, request a kvmclock update for all vcpus.
2740 * We need to rate-limit these requests though, as they can
2741 * considerably slow guests that have a large number of vcpus.
2742 * The time for a remote vcpu to update its kvmclock is bound
2743 * by the delay we use to rate-limit the updates.
2746 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2748 static void kvmclock_update_fn(struct work_struct
*work
)
2751 struct delayed_work
*dwork
= to_delayed_work(work
);
2752 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2753 kvmclock_update_work
);
2754 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2755 struct kvm_vcpu
*vcpu
;
2757 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2758 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2759 kvm_vcpu_kick(vcpu
);
2763 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2765 struct kvm
*kvm
= v
->kvm
;
2767 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2768 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2769 KVMCLOCK_UPDATE_DELAY
);
2772 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2774 static void kvmclock_sync_fn(struct work_struct
*work
)
2776 struct delayed_work
*dwork
= to_delayed_work(work
);
2777 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2778 kvmclock_sync_work
);
2779 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2781 if (!kvmclock_periodic_sync
)
2784 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2785 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2786 KVMCLOCK_SYNC_PERIOD
);
2790 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2792 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
2794 /* McStatusWrEn enabled? */
2795 if (guest_cpuid_is_amd_or_hygon(vcpu
))
2796 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
2801 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2803 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2804 unsigned bank_num
= mcg_cap
& 0xff;
2805 u32 msr
= msr_info
->index
;
2806 u64 data
= msr_info
->data
;
2809 case MSR_IA32_MCG_STATUS
:
2810 vcpu
->arch
.mcg_status
= data
;
2812 case MSR_IA32_MCG_CTL
:
2813 if (!(mcg_cap
& MCG_CTL_P
) &&
2814 (data
|| !msr_info
->host_initiated
))
2816 if (data
!= 0 && data
!= ~(u64
)0)
2818 vcpu
->arch
.mcg_ctl
= data
;
2821 if (msr
>= MSR_IA32_MC0_CTL
&&
2822 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2823 u32 offset
= array_index_nospec(
2824 msr
- MSR_IA32_MC0_CTL
,
2825 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
2827 /* only 0 or all 1s can be written to IA32_MCi_CTL
2828 * some Linux kernels though clear bit 10 in bank 4 to
2829 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2830 * this to avoid an uncatched #GP in the guest
2832 if ((offset
& 0x3) == 0 &&
2833 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2837 if (!msr_info
->host_initiated
&&
2838 (offset
& 0x3) == 1 && data
!= 0) {
2839 if (!can_set_mci_status(vcpu
))
2843 vcpu
->arch
.mce_banks
[offset
] = data
;
2851 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2853 struct kvm
*kvm
= vcpu
->kvm
;
2854 int lm
= is_long_mode(vcpu
);
2855 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2856 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2857 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2858 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2859 u32 page_num
= data
& ~PAGE_MASK
;
2860 u64 page_addr
= data
& PAGE_MASK
;
2863 if (page_num
>= blob_size
)
2866 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2868 return PTR_ERR(page
);
2870 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
)) {
2877 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
2879 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
2881 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
2884 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2886 gpa_t gpa
= data
& ~0x3f;
2888 /* Bits 4:5 are reserved, Should be zero */
2892 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
2893 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
2896 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
2897 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
2900 if (!lapic_in_kernel(vcpu
))
2901 return data
? 1 : 0;
2903 vcpu
->arch
.apf
.msr_en_val
= data
;
2905 if (!kvm_pv_async_pf_enabled(vcpu
)) {
2906 kvm_clear_async_pf_completion_queue(vcpu
);
2907 kvm_async_pf_hash_reset(vcpu
);
2911 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2915 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2916 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2918 kvm_async_pf_wakeup_all(vcpu
);
2923 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
2925 /* Bits 8-63 are reserved */
2929 if (!lapic_in_kernel(vcpu
))
2932 vcpu
->arch
.apf
.msr_int_val
= data
;
2934 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
2939 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2941 vcpu
->arch
.pv_time_enabled
= false;
2942 vcpu
->arch
.time
= 0;
2945 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
2947 ++vcpu
->stat
.tlb_flush
;
2948 kvm_x86_ops
.tlb_flush_all(vcpu
);
2951 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
2953 ++vcpu
->stat
.tlb_flush
;
2954 kvm_x86_ops
.tlb_flush_guest(vcpu
);
2957 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2959 struct kvm_host_map map
;
2960 struct kvm_steal_time
*st
;
2962 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2965 /* -EAGAIN is returned in atomic context so we can just return. */
2966 if (kvm_map_gfn(vcpu
, vcpu
->arch
.st
.msr_val
>> PAGE_SHIFT
,
2967 &map
, &vcpu
->arch
.st
.cache
, false))
2971 offset_in_page(vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
);
2974 * Doing a TLB flush here, on the guest's behalf, can avoid
2977 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
2978 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
2979 st
->preempted
& KVM_VCPU_FLUSH_TLB
);
2980 if (xchg(&st
->preempted
, 0) & KVM_VCPU_FLUSH_TLB
)
2981 kvm_vcpu_flush_tlb_guest(vcpu
);
2984 vcpu
->arch
.st
.preempted
= 0;
2986 if (st
->version
& 1)
2987 st
->version
+= 1; /* first time write, random junk */
2993 st
->steal
+= current
->sched_info
.run_delay
-
2994 vcpu
->arch
.st
.last_steal
;
2995 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3001 kvm_unmap_gfn(vcpu
, &map
, &vcpu
->arch
.st
.cache
, true, false);
3004 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3007 u32 msr
= msr_info
->index
;
3008 u64 data
= msr_info
->data
;
3011 case MSR_AMD64_NB_CFG
:
3012 case MSR_IA32_UCODE_WRITE
:
3013 case MSR_VM_HSAVE_PA
:
3014 case MSR_AMD64_PATCH_LOADER
:
3015 case MSR_AMD64_BU_CFG2
:
3016 case MSR_AMD64_DC_CFG
:
3017 case MSR_F15H_EX_CFG
:
3020 case MSR_IA32_UCODE_REV
:
3021 if (msr_info
->host_initiated
)
3022 vcpu
->arch
.microcode_version
= data
;
3024 case MSR_IA32_ARCH_CAPABILITIES
:
3025 if (!msr_info
->host_initiated
)
3027 vcpu
->arch
.arch_capabilities
= data
;
3029 case MSR_IA32_PERF_CAPABILITIES
: {
3030 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3032 if (!msr_info
->host_initiated
)
3034 if (guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
) && kvm_get_msr_feature(&msr_ent
))
3036 if (data
& ~msr_ent
.data
)
3039 vcpu
->arch
.perf_capabilities
= data
;
3044 return set_efer(vcpu
, msr_info
);
3046 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3047 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3048 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3050 /* Handle McStatusWrEn */
3051 if (data
== BIT_ULL(18)) {
3052 vcpu
->arch
.msr_hwcr
= data
;
3053 } else if (data
!= 0) {
3054 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3059 case MSR_FAM10H_MMIO_CONF_BASE
:
3061 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3066 case MSR_IA32_DEBUGCTLMSR
:
3068 /* We support the non-activated case already */
3070 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
3071 /* Values other than LBR and BTF are vendor-specific,
3072 thus reserved and should throw a #GP */
3074 } else if (report_ignored_msrs
)
3075 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
3078 case 0x200 ... 0x2ff:
3079 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3080 case MSR_IA32_APICBASE
:
3081 return kvm_set_apic_base(vcpu
, msr_info
);
3082 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3083 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3084 case MSR_IA32_TSCDEADLINE
:
3085 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3087 case MSR_IA32_TSC_ADJUST
:
3088 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3089 if (!msr_info
->host_initiated
) {
3090 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3091 adjust_tsc_offset_guest(vcpu
, adj
);
3093 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3096 case MSR_IA32_MISC_ENABLE
:
3097 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3098 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3099 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3101 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3102 kvm_update_cpuid_runtime(vcpu
);
3104 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3107 case MSR_IA32_SMBASE
:
3108 if (!msr_info
->host_initiated
)
3110 vcpu
->arch
.smbase
= data
;
3112 case MSR_IA32_POWER_CTL
:
3113 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3116 if (msr_info
->host_initiated
) {
3117 kvm_synchronize_tsc(vcpu
, data
);
3119 u64 adj
= kvm_compute_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3120 adjust_tsc_offset_guest(vcpu
, adj
);
3121 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3125 if (!msr_info
->host_initiated
&&
3126 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3129 * KVM supports exposing PT to the guest, but does not support
3130 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3131 * XSAVES/XRSTORS to save/restore PT MSRs.
3133 if (data
& ~supported_xss
)
3135 vcpu
->arch
.ia32_xss
= data
;
3138 if (!msr_info
->host_initiated
)
3140 vcpu
->arch
.smi_count
= data
;
3142 case MSR_KVM_WALL_CLOCK_NEW
:
3143 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3146 kvm_write_wall_clock(vcpu
->kvm
, data
);
3148 case MSR_KVM_WALL_CLOCK
:
3149 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3152 kvm_write_wall_clock(vcpu
->kvm
, data
);
3154 case MSR_KVM_SYSTEM_TIME_NEW
:
3155 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3158 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3160 case MSR_KVM_SYSTEM_TIME
:
3161 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3164 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3166 case MSR_KVM_ASYNC_PF_EN
:
3167 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3170 if (kvm_pv_enable_async_pf(vcpu
, data
))
3173 case MSR_KVM_ASYNC_PF_INT
:
3174 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3177 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3180 case MSR_KVM_ASYNC_PF_ACK
:
3181 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3184 vcpu
->arch
.apf
.pageready_pending
= false;
3185 kvm_check_async_pf_completion(vcpu
);
3188 case MSR_KVM_STEAL_TIME
:
3189 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3192 if (unlikely(!sched_info_on()))
3195 if (data
& KVM_STEAL_RESERVED_MASK
)
3198 vcpu
->arch
.st
.msr_val
= data
;
3200 if (!(data
& KVM_MSR_ENABLED
))
3203 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3206 case MSR_KVM_PV_EOI_EN
:
3207 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3210 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
3214 case MSR_KVM_POLL_CONTROL
:
3215 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3218 /* only enable bit supported */
3219 if (data
& (-1ULL << 1))
3222 vcpu
->arch
.msr_kvm_poll_control
= data
;
3225 case MSR_IA32_MCG_CTL
:
3226 case MSR_IA32_MCG_STATUS
:
3227 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3228 return set_msr_mce(vcpu
, msr_info
);
3230 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3231 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3234 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3235 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3236 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3237 return kvm_pmu_set_msr(vcpu
, msr_info
);
3239 if (pr
|| data
!= 0)
3240 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3241 "0x%x data 0x%llx\n", msr
, data
);
3243 case MSR_K7_CLK_CTL
:
3245 * Ignore all writes to this no longer documented MSR.
3246 * Writes are only relevant for old K7 processors,
3247 * all pre-dating SVM, but a recommended workaround from
3248 * AMD for these chips. It is possible to specify the
3249 * affected processor models on the command line, hence
3250 * the need to ignore the workaround.
3253 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3254 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3255 case HV_X64_MSR_SYNDBG_OPTIONS
:
3256 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3257 case HV_X64_MSR_CRASH_CTL
:
3258 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3259 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3260 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3261 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3262 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3263 msr_info
->host_initiated
);
3264 case MSR_IA32_BBL_CR_CTL3
:
3265 /* Drop writes to this legacy MSR -- see rdmsr
3266 * counterpart for further detail.
3268 if (report_ignored_msrs
)
3269 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3272 case MSR_AMD64_OSVW_ID_LENGTH
:
3273 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3275 vcpu
->arch
.osvw
.length
= data
;
3277 case MSR_AMD64_OSVW_STATUS
:
3278 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3280 vcpu
->arch
.osvw
.status
= data
;
3282 case MSR_PLATFORM_INFO
:
3283 if (!msr_info
->host_initiated
||
3284 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3285 cpuid_fault_enabled(vcpu
)))
3287 vcpu
->arch
.msr_platform_info
= data
;
3289 case MSR_MISC_FEATURES_ENABLES
:
3290 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3291 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3292 !supports_cpuid_fault(vcpu
)))
3294 vcpu
->arch
.msr_misc_features_enables
= data
;
3297 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
3298 return xen_hvm_config(vcpu
, data
);
3299 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3300 return kvm_pmu_set_msr(vcpu
, msr_info
);
3301 return KVM_MSR_RET_INVALID
;
3305 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3307 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3310 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3311 unsigned bank_num
= mcg_cap
& 0xff;
3314 case MSR_IA32_P5_MC_ADDR
:
3315 case MSR_IA32_P5_MC_TYPE
:
3318 case MSR_IA32_MCG_CAP
:
3319 data
= vcpu
->arch
.mcg_cap
;
3321 case MSR_IA32_MCG_CTL
:
3322 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3324 data
= vcpu
->arch
.mcg_ctl
;
3326 case MSR_IA32_MCG_STATUS
:
3327 data
= vcpu
->arch
.mcg_status
;
3330 if (msr
>= MSR_IA32_MC0_CTL
&&
3331 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3332 u32 offset
= array_index_nospec(
3333 msr
- MSR_IA32_MC0_CTL
,
3334 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3336 data
= vcpu
->arch
.mce_banks
[offset
];
3345 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3347 switch (msr_info
->index
) {
3348 case MSR_IA32_PLATFORM_ID
:
3349 case MSR_IA32_EBL_CR_POWERON
:
3350 case MSR_IA32_DEBUGCTLMSR
:
3351 case MSR_IA32_LASTBRANCHFROMIP
:
3352 case MSR_IA32_LASTBRANCHTOIP
:
3353 case MSR_IA32_LASTINTFROMIP
:
3354 case MSR_IA32_LASTINTTOIP
:
3356 case MSR_K8_TSEG_ADDR
:
3357 case MSR_K8_TSEG_MASK
:
3358 case MSR_VM_HSAVE_PA
:
3359 case MSR_K8_INT_PENDING_MSG
:
3360 case MSR_AMD64_NB_CFG
:
3361 case MSR_FAM10H_MMIO_CONF_BASE
:
3362 case MSR_AMD64_BU_CFG2
:
3363 case MSR_IA32_PERF_CTL
:
3364 case MSR_AMD64_DC_CFG
:
3365 case MSR_F15H_EX_CFG
:
3367 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3368 * limit) MSRs. Just return 0, as we do not want to expose the host
3369 * data here. Do not conditionalize this on CPUID, as KVM does not do
3370 * so for existing CPU-specific MSRs.
3372 case MSR_RAPL_POWER_UNIT
:
3373 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3374 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3375 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3376 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3379 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3380 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3381 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3382 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3383 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3384 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3385 return kvm_pmu_get_msr(vcpu
, msr_info
);
3388 case MSR_IA32_UCODE_REV
:
3389 msr_info
->data
= vcpu
->arch
.microcode_version
;
3391 case MSR_IA32_ARCH_CAPABILITIES
:
3392 if (!msr_info
->host_initiated
&&
3393 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3395 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3397 case MSR_IA32_PERF_CAPABILITIES
:
3398 if (!msr_info
->host_initiated
&&
3399 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3401 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3403 case MSR_IA32_POWER_CTL
:
3404 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3406 case MSR_IA32_TSC
: {
3408 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3409 * even when not intercepted. AMD manual doesn't explicitly
3410 * state this but appears to behave the same.
3412 * On userspace reads and writes, however, we unconditionally
3413 * return L1's TSC value to ensure backwards-compatible
3414 * behavior for migration.
3416 u64 tsc_offset
= msr_info
->host_initiated
? vcpu
->arch
.l1_tsc_offset
:
3417 vcpu
->arch
.tsc_offset
;
3419 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + tsc_offset
;
3423 case 0x200 ... 0x2ff:
3424 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3425 case 0xcd: /* fsb frequency */
3429 * MSR_EBC_FREQUENCY_ID
3430 * Conservative value valid for even the basic CPU models.
3431 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3432 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3433 * and 266MHz for model 3, or 4. Set Core Clock
3434 * Frequency to System Bus Frequency Ratio to 1 (bits
3435 * 31:24) even though these are only valid for CPU
3436 * models > 2, however guests may end up dividing or
3437 * multiplying by zero otherwise.
3439 case MSR_EBC_FREQUENCY_ID
:
3440 msr_info
->data
= 1 << 24;
3442 case MSR_IA32_APICBASE
:
3443 msr_info
->data
= kvm_get_apic_base(vcpu
);
3445 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3446 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3447 case MSR_IA32_TSCDEADLINE
:
3448 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3450 case MSR_IA32_TSC_ADJUST
:
3451 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3453 case MSR_IA32_MISC_ENABLE
:
3454 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3456 case MSR_IA32_SMBASE
:
3457 if (!msr_info
->host_initiated
)
3459 msr_info
->data
= vcpu
->arch
.smbase
;
3462 msr_info
->data
= vcpu
->arch
.smi_count
;
3464 case MSR_IA32_PERF_STATUS
:
3465 /* TSC increment by tick */
3466 msr_info
->data
= 1000ULL;
3467 /* CPU multiplier */
3468 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3471 msr_info
->data
= vcpu
->arch
.efer
;
3473 case MSR_KVM_WALL_CLOCK
:
3474 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3477 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3479 case MSR_KVM_WALL_CLOCK_NEW
:
3480 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3483 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3485 case MSR_KVM_SYSTEM_TIME
:
3486 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3489 msr_info
->data
= vcpu
->arch
.time
;
3491 case MSR_KVM_SYSTEM_TIME_NEW
:
3492 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3495 msr_info
->data
= vcpu
->arch
.time
;
3497 case MSR_KVM_ASYNC_PF_EN
:
3498 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3501 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
3503 case MSR_KVM_ASYNC_PF_INT
:
3504 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3507 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
3509 case MSR_KVM_ASYNC_PF_ACK
:
3510 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3515 case MSR_KVM_STEAL_TIME
:
3516 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3519 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3521 case MSR_KVM_PV_EOI_EN
:
3522 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3525 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3527 case MSR_KVM_POLL_CONTROL
:
3528 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3531 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3533 case MSR_IA32_P5_MC_ADDR
:
3534 case MSR_IA32_P5_MC_TYPE
:
3535 case MSR_IA32_MCG_CAP
:
3536 case MSR_IA32_MCG_CTL
:
3537 case MSR_IA32_MCG_STATUS
:
3538 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3539 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3540 msr_info
->host_initiated
);
3542 if (!msr_info
->host_initiated
&&
3543 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3545 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3547 case MSR_K7_CLK_CTL
:
3549 * Provide expected ramp-up count for K7. All other
3550 * are set to zero, indicating minimum divisors for
3553 * This prevents guest kernels on AMD host with CPU
3554 * type 6, model 8 and higher from exploding due to
3555 * the rdmsr failing.
3557 msr_info
->data
= 0x20000000;
3559 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3560 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3561 case HV_X64_MSR_SYNDBG_OPTIONS
:
3562 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3563 case HV_X64_MSR_CRASH_CTL
:
3564 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3565 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3566 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3567 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3568 return kvm_hv_get_msr_common(vcpu
,
3569 msr_info
->index
, &msr_info
->data
,
3570 msr_info
->host_initiated
);
3571 case MSR_IA32_BBL_CR_CTL3
:
3572 /* This legacy MSR exists but isn't fully documented in current
3573 * silicon. It is however accessed by winxp in very narrow
3574 * scenarios where it sets bit #19, itself documented as
3575 * a "reserved" bit. Best effort attempt to source coherent
3576 * read data here should the balance of the register be
3577 * interpreted by the guest:
3579 * L2 cache control register 3: 64GB range, 256KB size,
3580 * enabled, latency 0x1, configured
3582 msr_info
->data
= 0xbe702111;
3584 case MSR_AMD64_OSVW_ID_LENGTH
:
3585 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3587 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3589 case MSR_AMD64_OSVW_STATUS
:
3590 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3592 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3594 case MSR_PLATFORM_INFO
:
3595 if (!msr_info
->host_initiated
&&
3596 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3598 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3600 case MSR_MISC_FEATURES_ENABLES
:
3601 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3604 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3607 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3608 return kvm_pmu_get_msr(vcpu
, msr_info
);
3609 return KVM_MSR_RET_INVALID
;
3613 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3616 * Read or write a bunch of msrs. All parameters are kernel addresses.
3618 * @return number of msrs set successfully.
3620 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3621 struct kvm_msr_entry
*entries
,
3622 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3623 unsigned index
, u64
*data
))
3627 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3628 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3635 * Read or write a bunch of msrs. Parameters are user addresses.
3637 * @return number of msrs set successfully.
3639 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3640 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3641 unsigned index
, u64
*data
),
3644 struct kvm_msrs msrs
;
3645 struct kvm_msr_entry
*entries
;
3650 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3654 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3657 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3658 entries
= memdup_user(user_msrs
->entries
, size
);
3659 if (IS_ERR(entries
)) {
3660 r
= PTR_ERR(entries
);
3664 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
3669 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
3680 static inline bool kvm_can_mwait_in_guest(void)
3682 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
3683 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
3684 boot_cpu_has(X86_FEATURE_ARAT
);
3687 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
3688 struct kvm_cpuid2 __user
*cpuid_arg
)
3690 struct kvm_cpuid2 cpuid
;
3694 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3697 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3702 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
3708 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
3713 case KVM_CAP_IRQCHIP
:
3715 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
3716 case KVM_CAP_SET_TSS_ADDR
:
3717 case KVM_CAP_EXT_CPUID
:
3718 case KVM_CAP_EXT_EMUL_CPUID
:
3719 case KVM_CAP_CLOCKSOURCE
:
3721 case KVM_CAP_NOP_IO_DELAY
:
3722 case KVM_CAP_MP_STATE
:
3723 case KVM_CAP_SYNC_MMU
:
3724 case KVM_CAP_USER_NMI
:
3725 case KVM_CAP_REINJECT_CONTROL
:
3726 case KVM_CAP_IRQ_INJECT_STATUS
:
3727 case KVM_CAP_IOEVENTFD
:
3728 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
3730 case KVM_CAP_PIT_STATE2
:
3731 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
3732 case KVM_CAP_XEN_HVM
:
3733 case KVM_CAP_VCPU_EVENTS
:
3734 case KVM_CAP_HYPERV
:
3735 case KVM_CAP_HYPERV_VAPIC
:
3736 case KVM_CAP_HYPERV_SPIN
:
3737 case KVM_CAP_HYPERV_SYNIC
:
3738 case KVM_CAP_HYPERV_SYNIC2
:
3739 case KVM_CAP_HYPERV_VP_INDEX
:
3740 case KVM_CAP_HYPERV_EVENTFD
:
3741 case KVM_CAP_HYPERV_TLBFLUSH
:
3742 case KVM_CAP_HYPERV_SEND_IPI
:
3743 case KVM_CAP_HYPERV_CPUID
:
3744 case KVM_CAP_SYS_HYPERV_CPUID
:
3745 case KVM_CAP_PCI_SEGMENT
:
3746 case KVM_CAP_DEBUGREGS
:
3747 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
3749 case KVM_CAP_ASYNC_PF
:
3750 case KVM_CAP_ASYNC_PF_INT
:
3751 case KVM_CAP_GET_TSC_KHZ
:
3752 case KVM_CAP_KVMCLOCK_CTRL
:
3753 case KVM_CAP_READONLY_MEM
:
3754 case KVM_CAP_HYPERV_TIME
:
3755 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
3756 case KVM_CAP_TSC_DEADLINE_TIMER
:
3757 case KVM_CAP_DISABLE_QUIRKS
:
3758 case KVM_CAP_SET_BOOT_CPU_ID
:
3759 case KVM_CAP_SPLIT_IRQCHIP
:
3760 case KVM_CAP_IMMEDIATE_EXIT
:
3761 case KVM_CAP_PMU_EVENT_FILTER
:
3762 case KVM_CAP_GET_MSR_FEATURES
:
3763 case KVM_CAP_MSR_PLATFORM_INFO
:
3764 case KVM_CAP_EXCEPTION_PAYLOAD
:
3765 case KVM_CAP_SET_GUEST_DEBUG
:
3766 case KVM_CAP_LAST_CPU
:
3767 case KVM_CAP_X86_USER_SPACE_MSR
:
3768 case KVM_CAP_X86_MSR_FILTER
:
3769 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
3772 case KVM_CAP_SYNC_REGS
:
3773 r
= KVM_SYNC_X86_VALID_FIELDS
;
3775 case KVM_CAP_ADJUST_CLOCK
:
3776 r
= KVM_CLOCK_TSC_STABLE
;
3778 case KVM_CAP_X86_DISABLE_EXITS
:
3779 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
3780 KVM_X86_DISABLE_EXITS_CSTATE
;
3781 if(kvm_can_mwait_in_guest())
3782 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
3784 case KVM_CAP_X86_SMM
:
3785 /* SMBASE is usually relocated above 1M on modern chipsets,
3786 * and SMM handlers might indeed rely on 4G segment limits,
3787 * so do not report SMM to be available if real mode is
3788 * emulated via vm86 mode. Still, do not go to great lengths
3789 * to avoid userspace's usage of the feature, because it is a
3790 * fringe case that is not enabled except via specific settings
3791 * of the module parameters.
3793 r
= kvm_x86_ops
.has_emulated_msr(kvm
, MSR_IA32_SMBASE
);
3796 r
= !kvm_x86_ops
.cpu_has_accelerated_tpr();
3798 case KVM_CAP_NR_VCPUS
:
3799 r
= KVM_SOFT_MAX_VCPUS
;
3801 case KVM_CAP_MAX_VCPUS
:
3804 case KVM_CAP_MAX_VCPU_ID
:
3805 r
= KVM_MAX_VCPU_ID
;
3807 case KVM_CAP_PV_MMU
: /* obsolete */
3811 r
= KVM_MAX_MCE_BANKS
;
3814 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
3816 case KVM_CAP_TSC_CONTROL
:
3817 r
= kvm_has_tsc_control
;
3819 case KVM_CAP_X2APIC_API
:
3820 r
= KVM_X2APIC_API_VALID_FLAGS
;
3822 case KVM_CAP_NESTED_STATE
:
3823 r
= kvm_x86_ops
.nested_ops
->get_state
?
3824 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
3826 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
3827 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
3829 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
3830 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
3832 case KVM_CAP_SMALLER_MAXPHYADDR
:
3833 r
= (int) allow_smaller_maxphyaddr
;
3835 case KVM_CAP_STEAL_TIME
:
3836 r
= sched_info_on();
3845 long kvm_arch_dev_ioctl(struct file
*filp
,
3846 unsigned int ioctl
, unsigned long arg
)
3848 void __user
*argp
= (void __user
*)arg
;
3852 case KVM_GET_MSR_INDEX_LIST
: {
3853 struct kvm_msr_list __user
*user_msr_list
= argp
;
3854 struct kvm_msr_list msr_list
;
3858 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3861 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
3862 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3865 if (n
< msr_list
.nmsrs
)
3868 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
3869 num_msrs_to_save
* sizeof(u32
)))
3871 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
3873 num_emulated_msrs
* sizeof(u32
)))
3878 case KVM_GET_SUPPORTED_CPUID
:
3879 case KVM_GET_EMULATED_CPUID
: {
3880 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3881 struct kvm_cpuid2 cpuid
;
3884 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3887 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
3893 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
3898 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
3900 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
3901 sizeof(kvm_mce_cap_supported
)))
3905 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
3906 struct kvm_msr_list __user
*user_msr_list
= argp
;
3907 struct kvm_msr_list msr_list
;
3911 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3914 msr_list
.nmsrs
= num_msr_based_features
;
3915 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3918 if (n
< msr_list
.nmsrs
)
3921 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
3922 num_msr_based_features
* sizeof(u32
)))
3928 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
3930 case KVM_GET_SUPPORTED_HV_CPUID
:
3931 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
3941 static void wbinvd_ipi(void *garbage
)
3946 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3948 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
3951 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
3953 /* Address WBINVD may be executed by guest */
3954 if (need_emulate_wbinvd(vcpu
)) {
3955 if (kvm_x86_ops
.has_wbinvd_exit())
3956 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
3957 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
3958 smp_call_function_single(vcpu
->cpu
,
3959 wbinvd_ipi
, NULL
, 1);
3962 kvm_x86_ops
.vcpu_load(vcpu
, cpu
);
3964 /* Save host pkru register if supported */
3965 vcpu
->arch
.host_pkru
= read_pkru();
3967 /* Apply any externally detected TSC adjustments (due to suspend) */
3968 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
3969 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
3970 vcpu
->arch
.tsc_offset_adjustment
= 0;
3971 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3974 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
3975 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3976 rdtsc() - vcpu
->arch
.last_host_tsc
;
3978 mark_tsc_unstable("KVM discovered backwards TSC");
3980 if (kvm_check_tsc_unstable()) {
3981 u64 offset
= kvm_compute_tsc_offset(vcpu
,
3982 vcpu
->arch
.last_guest_tsc
);
3983 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
3984 vcpu
->arch
.tsc_catchup
= 1;
3987 if (kvm_lapic_hv_timer_in_use(vcpu
))
3988 kvm_lapic_restart_hv_timer(vcpu
);
3991 * On a host with synchronized TSC, there is no need to update
3992 * kvmclock on vcpu->cpu migration
3994 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
3995 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
3996 if (vcpu
->cpu
!= cpu
)
3997 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4001 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4004 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4006 struct kvm_host_map map
;
4007 struct kvm_steal_time
*st
;
4009 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4012 if (vcpu
->arch
.st
.preempted
)
4015 if (kvm_map_gfn(vcpu
, vcpu
->arch
.st
.msr_val
>> PAGE_SHIFT
, &map
,
4016 &vcpu
->arch
.st
.cache
, true))
4020 offset_in_page(vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
);
4022 st
->preempted
= vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4024 kvm_unmap_gfn(vcpu
, &map
, &vcpu
->arch
.st
.cache
, true, true);
4027 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4031 if (vcpu
->preempted
&& !vcpu
->arch
.guest_state_protected
)
4032 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
.get_cpl(vcpu
);
4035 * Disable page faults because we're in atomic context here.
4036 * kvm_write_guest_offset_cached() would call might_fault()
4037 * that relies on pagefault_disable() to tell if there's a
4038 * bug. NOTE: the write to guest memory may not go through if
4039 * during postcopy live migration or if there's heavy guest
4042 pagefault_disable();
4044 * kvm_memslots() will be called by
4045 * kvm_write_guest_offset_cached() so take the srcu lock.
4047 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4048 kvm_steal_time_set_preempted(vcpu
);
4049 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4051 kvm_x86_ops
.vcpu_put(vcpu
);
4052 vcpu
->arch
.last_host_tsc
= rdtsc();
4054 * If userspace has set any breakpoints or watchpoints, dr6 is restored
4055 * on every vmexit, but if not, we might have a stale dr6 from the
4056 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4061 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4062 struct kvm_lapic_state
*s
)
4064 if (vcpu
->arch
.apicv_active
)
4065 kvm_x86_ops
.sync_pir_to_irr(vcpu
);
4067 return kvm_apic_get_state(vcpu
, s
);
4070 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4071 struct kvm_lapic_state
*s
)
4075 r
= kvm_apic_set_state(vcpu
, s
);
4078 update_cr8_intercept(vcpu
);
4083 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4086 * We can accept userspace's request for interrupt injection
4087 * as long as we have a place to store the interrupt number.
4088 * The actual injection will happen when the CPU is able to
4089 * deliver the interrupt.
4091 if (kvm_cpu_has_extint(vcpu
))
4094 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4095 return (!lapic_in_kernel(vcpu
) ||
4096 kvm_apic_accept_pic_intr(vcpu
));
4099 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4101 return kvm_arch_interrupt_allowed(vcpu
) &&
4102 kvm_cpu_accept_dm_intr(vcpu
);
4105 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4106 struct kvm_interrupt
*irq
)
4108 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4111 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4112 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4113 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4118 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4119 * fail for in-kernel 8259.
4121 if (pic_in_kernel(vcpu
->kvm
))
4124 if (vcpu
->arch
.pending_external_vector
!= -1)
4127 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4128 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4132 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4134 kvm_inject_nmi(vcpu
);
4139 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4141 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4146 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4147 struct kvm_tpr_access_ctl
*tac
)
4151 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4155 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4159 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4162 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4164 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4167 vcpu
->arch
.mcg_cap
= mcg_cap
;
4168 /* Init IA32_MCG_CTL to all 1s */
4169 if (mcg_cap
& MCG_CTL_P
)
4170 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4171 /* Init IA32_MCi_CTL to all 1s */
4172 for (bank
= 0; bank
< bank_num
; bank
++)
4173 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4175 kvm_x86_ops
.setup_mce(vcpu
);
4180 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4181 struct kvm_x86_mce
*mce
)
4183 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4184 unsigned bank_num
= mcg_cap
& 0xff;
4185 u64
*banks
= vcpu
->arch
.mce_banks
;
4187 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4190 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4191 * reporting is disabled
4193 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4194 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4196 banks
+= 4 * mce
->bank
;
4198 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4199 * reporting is disabled for the bank
4201 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4203 if (mce
->status
& MCI_STATUS_UC
) {
4204 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4205 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4206 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4209 if (banks
[1] & MCI_STATUS_VAL
)
4210 mce
->status
|= MCI_STATUS_OVER
;
4211 banks
[2] = mce
->addr
;
4212 banks
[3] = mce
->misc
;
4213 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4214 banks
[1] = mce
->status
;
4215 kvm_queue_exception(vcpu
, MC_VECTOR
);
4216 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4217 || !(banks
[1] & MCI_STATUS_UC
)) {
4218 if (banks
[1] & MCI_STATUS_VAL
)
4219 mce
->status
|= MCI_STATUS_OVER
;
4220 banks
[2] = mce
->addr
;
4221 banks
[3] = mce
->misc
;
4222 banks
[1] = mce
->status
;
4224 banks
[1] |= MCI_STATUS_OVER
;
4228 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4229 struct kvm_vcpu_events
*events
)
4234 * In guest mode, payload delivery should be deferred,
4235 * so that the L1 hypervisor can intercept #PF before
4236 * CR2 is modified (or intercept #DB before DR6 is
4237 * modified under nVMX). Unless the per-VM capability,
4238 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4239 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4240 * opportunistically defer the exception payload, deliver it if the
4241 * capability hasn't been requested before processing a
4242 * KVM_GET_VCPU_EVENTS.
4244 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4245 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4246 kvm_deliver_exception_payload(vcpu
);
4249 * The API doesn't provide the instruction length for software
4250 * exceptions, so don't report them. As long as the guest RIP
4251 * isn't advanced, we should expect to encounter the exception
4254 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4255 events
->exception
.injected
= 0;
4256 events
->exception
.pending
= 0;
4258 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4259 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4261 * For ABI compatibility, deliberately conflate
4262 * pending and injected exceptions when
4263 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4265 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4266 events
->exception
.injected
|=
4267 vcpu
->arch
.exception
.pending
;
4269 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4270 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4271 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4272 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4273 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4275 events
->interrupt
.injected
=
4276 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4277 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4278 events
->interrupt
.soft
= 0;
4279 events
->interrupt
.shadow
= kvm_x86_ops
.get_interrupt_shadow(vcpu
);
4281 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4282 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4283 events
->nmi
.masked
= kvm_x86_ops
.get_nmi_mask(vcpu
);
4284 events
->nmi
.pad
= 0;
4286 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4288 events
->smi
.smm
= is_smm(vcpu
);
4289 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4290 events
->smi
.smm_inside_nmi
=
4291 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4292 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4294 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4295 | KVM_VCPUEVENT_VALID_SHADOW
4296 | KVM_VCPUEVENT_VALID_SMM
);
4297 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4298 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4300 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4303 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
);
4305 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4306 struct kvm_vcpu_events
*events
)
4308 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4309 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4310 | KVM_VCPUEVENT_VALID_SHADOW
4311 | KVM_VCPUEVENT_VALID_SMM
4312 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4315 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4316 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4318 if (events
->exception
.pending
)
4319 events
->exception
.injected
= 0;
4321 events
->exception_has_payload
= 0;
4323 events
->exception
.pending
= 0;
4324 events
->exception_has_payload
= 0;
4327 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4328 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4331 /* INITs are latched while in SMM */
4332 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4333 (events
->smi
.smm
|| events
->smi
.pending
) &&
4334 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4338 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4339 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4340 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4341 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4342 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4343 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4344 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4346 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4347 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4348 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4349 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4350 kvm_x86_ops
.set_interrupt_shadow(vcpu
,
4351 events
->interrupt
.shadow
);
4353 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4354 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
4355 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
4356 kvm_x86_ops
.set_nmi_mask(vcpu
, events
->nmi
.masked
);
4358 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
4359 lapic_in_kernel(vcpu
))
4360 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
4362 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
4363 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
4364 if (events
->smi
.smm
)
4365 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
4367 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
4368 kvm_smm_changed(vcpu
);
4371 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
4373 if (events
->smi
.smm
) {
4374 if (events
->smi
.smm_inside_nmi
)
4375 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
4377 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
4380 if (lapic_in_kernel(vcpu
)) {
4381 if (events
->smi
.latched_init
)
4382 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4384 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4388 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4393 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
4394 struct kvm_debugregs
*dbgregs
)
4398 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
4399 kvm_get_dr(vcpu
, 6, &val
);
4401 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4403 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4406 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4407 struct kvm_debugregs
*dbgregs
)
4412 if (dbgregs
->dr6
& ~0xffffffffull
)
4414 if (dbgregs
->dr7
& ~0xffffffffull
)
4417 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4418 kvm_update_dr0123(vcpu
);
4419 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4420 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4421 kvm_update_dr7(vcpu
);
4426 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4428 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
4430 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4431 u64 xstate_bv
= xsave
->header
.xfeatures
;
4435 * Copy legacy XSAVE area, to avoid complications with CPUID
4436 * leaves 0 and 1 in the loop below.
4438 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
4441 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
4442 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
4445 * Copy each region from the possibly compacted offset to the
4446 * non-compacted offset.
4448 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4450 u64 xfeature_mask
= valid
& -valid
;
4451 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4452 void *src
= get_xsave_addr(xsave
, xfeature_nr
);
4455 u32 size
, offset
, ecx
, edx
;
4456 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4457 &size
, &offset
, &ecx
, &edx
);
4458 if (xfeature_nr
== XFEATURE_PKRU
)
4459 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
4460 sizeof(vcpu
->arch
.pkru
));
4462 memcpy(dest
+ offset
, src
, size
);
4466 valid
-= xfeature_mask
;
4470 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
4472 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4473 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
4477 * Copy legacy XSAVE area, to avoid complications with CPUID
4478 * leaves 0 and 1 in the loop below.
4480 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
4482 /* Set XSTATE_BV and possibly XCOMP_BV. */
4483 xsave
->header
.xfeatures
= xstate_bv
;
4484 if (boot_cpu_has(X86_FEATURE_XSAVES
))
4485 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
4488 * Copy each region from the non-compacted offset to the
4489 * possibly compacted offset.
4491 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4493 u64 xfeature_mask
= valid
& -valid
;
4494 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4495 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
4498 u32 size
, offset
, ecx
, edx
;
4499 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4500 &size
, &offset
, &ecx
, &edx
);
4501 if (xfeature_nr
== XFEATURE_PKRU
)
4502 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
4503 sizeof(vcpu
->arch
.pkru
));
4505 memcpy(dest
, src
+ offset
, size
);
4508 valid
-= xfeature_mask
;
4512 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4513 struct kvm_xsave
*guest_xsave
)
4515 if (!vcpu
->arch
.guest_fpu
)
4518 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4519 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
4520 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
4522 memcpy(guest_xsave
->region
,
4523 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
4524 sizeof(struct fxregs_state
));
4525 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
4526 XFEATURE_MASK_FPSSE
;
4530 #define XSAVE_MXCSR_OFFSET 24
4532 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4533 struct kvm_xsave
*guest_xsave
)
4538 if (!vcpu
->arch
.guest_fpu
)
4541 xstate_bv
= *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
4542 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
4544 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4546 * Here we allow setting states that are not present in
4547 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4548 * with old userspace.
4550 if (xstate_bv
& ~supported_xcr0
|| mxcsr
& ~mxcsr_feature_mask
)
4552 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
4554 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
4555 mxcsr
& ~mxcsr_feature_mask
)
4557 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
4558 guest_xsave
->region
, sizeof(struct fxregs_state
));
4563 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4564 struct kvm_xcrs
*guest_xcrs
)
4566 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4567 guest_xcrs
->nr_xcrs
= 0;
4571 guest_xcrs
->nr_xcrs
= 1;
4572 guest_xcrs
->flags
= 0;
4573 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4574 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4577 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4578 struct kvm_xcrs
*guest_xcrs
)
4582 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4585 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4588 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4589 /* Only support XCR0 currently */
4590 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4591 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4592 guest_xcrs
->xcrs
[i
].value
);
4601 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4602 * stopped by the hypervisor. This function will be called from the host only.
4603 * EINVAL is returned when the host attempts to set the flag for a guest that
4604 * does not support pv clocks.
4606 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4608 if (!vcpu
->arch
.pv_time_enabled
)
4610 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4611 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4615 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4616 struct kvm_enable_cap
*cap
)
4619 uint16_t vmcs_version
;
4620 void __user
*user_ptr
;
4626 case KVM_CAP_HYPERV_SYNIC2
:
4631 case KVM_CAP_HYPERV_SYNIC
:
4632 if (!irqchip_in_kernel(vcpu
->kvm
))
4634 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
4635 KVM_CAP_HYPERV_SYNIC2
);
4636 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4637 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
4639 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
4641 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
4642 if (copy_to_user(user_ptr
, &vmcs_version
,
4643 sizeof(vmcs_version
)))
4647 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4648 if (!kvm_x86_ops
.enable_direct_tlbflush
)
4651 return kvm_x86_ops
.enable_direct_tlbflush(vcpu
);
4653 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4654 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
4655 if (vcpu
->arch
.pv_cpuid
.enforce
)
4656 kvm_update_pv_runtime(vcpu
);
4665 long kvm_arch_vcpu_ioctl(struct file
*filp
,
4666 unsigned int ioctl
, unsigned long arg
)
4668 struct kvm_vcpu
*vcpu
= filp
->private_data
;
4669 void __user
*argp
= (void __user
*)arg
;
4672 struct kvm_lapic_state
*lapic
;
4673 struct kvm_xsave
*xsave
;
4674 struct kvm_xcrs
*xcrs
;
4682 case KVM_GET_LAPIC
: {
4684 if (!lapic_in_kernel(vcpu
))
4686 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
4687 GFP_KERNEL_ACCOUNT
);
4692 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
4696 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
4701 case KVM_SET_LAPIC
: {
4703 if (!lapic_in_kernel(vcpu
))
4705 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
4706 if (IS_ERR(u
.lapic
)) {
4707 r
= PTR_ERR(u
.lapic
);
4711 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
4714 case KVM_INTERRUPT
: {
4715 struct kvm_interrupt irq
;
4718 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
4720 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
4724 r
= kvm_vcpu_ioctl_nmi(vcpu
);
4728 r
= kvm_vcpu_ioctl_smi(vcpu
);
4731 case KVM_SET_CPUID
: {
4732 struct kvm_cpuid __user
*cpuid_arg
= argp
;
4733 struct kvm_cpuid cpuid
;
4736 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4738 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4741 case KVM_SET_CPUID2
: {
4742 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4743 struct kvm_cpuid2 cpuid
;
4746 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4748 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
4749 cpuid_arg
->entries
);
4752 case KVM_GET_CPUID2
: {
4753 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4754 struct kvm_cpuid2 cpuid
;
4757 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4759 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
4760 cpuid_arg
->entries
);
4764 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4769 case KVM_GET_MSRS
: {
4770 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4771 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
4772 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4775 case KVM_SET_MSRS
: {
4776 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4777 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
4778 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4781 case KVM_TPR_ACCESS_REPORTING
: {
4782 struct kvm_tpr_access_ctl tac
;
4785 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
4787 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
4791 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
4796 case KVM_SET_VAPIC_ADDR
: {
4797 struct kvm_vapic_addr va
;
4801 if (!lapic_in_kernel(vcpu
))
4804 if (copy_from_user(&va
, argp
, sizeof(va
)))
4806 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4807 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
4808 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4811 case KVM_X86_SETUP_MCE
: {
4815 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
4817 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
4820 case KVM_X86_SET_MCE
: {
4821 struct kvm_x86_mce mce
;
4824 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
4826 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
4829 case KVM_GET_VCPU_EVENTS
: {
4830 struct kvm_vcpu_events events
;
4832 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
4835 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
4840 case KVM_SET_VCPU_EVENTS
: {
4841 struct kvm_vcpu_events events
;
4844 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
4847 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
4850 case KVM_GET_DEBUGREGS
: {
4851 struct kvm_debugregs dbgregs
;
4853 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
4856 if (copy_to_user(argp
, &dbgregs
,
4857 sizeof(struct kvm_debugregs
)))
4862 case KVM_SET_DEBUGREGS
: {
4863 struct kvm_debugregs dbgregs
;
4866 if (copy_from_user(&dbgregs
, argp
,
4867 sizeof(struct kvm_debugregs
)))
4870 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
4873 case KVM_GET_XSAVE
: {
4874 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
4879 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
4882 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
4887 case KVM_SET_XSAVE
: {
4888 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
4889 if (IS_ERR(u
.xsave
)) {
4890 r
= PTR_ERR(u
.xsave
);
4894 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
4897 case KVM_GET_XCRS
: {
4898 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
4903 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
4906 if (copy_to_user(argp
, u
.xcrs
,
4907 sizeof(struct kvm_xcrs
)))
4912 case KVM_SET_XCRS
: {
4913 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
4914 if (IS_ERR(u
.xcrs
)) {
4915 r
= PTR_ERR(u
.xcrs
);
4919 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
4922 case KVM_SET_TSC_KHZ
: {
4926 user_tsc_khz
= (u32
)arg
;
4928 if (kvm_has_tsc_control
&&
4929 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
4932 if (user_tsc_khz
== 0)
4933 user_tsc_khz
= tsc_khz
;
4935 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
4940 case KVM_GET_TSC_KHZ
: {
4941 r
= vcpu
->arch
.virtual_tsc_khz
;
4944 case KVM_KVMCLOCK_CTRL
: {
4945 r
= kvm_set_guest_paused(vcpu
);
4948 case KVM_ENABLE_CAP
: {
4949 struct kvm_enable_cap cap
;
4952 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4954 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
4957 case KVM_GET_NESTED_STATE
: {
4958 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
4962 if (!kvm_x86_ops
.nested_ops
->get_state
)
4965 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
4967 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
4970 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
4975 if (r
> user_data_size
) {
4976 if (put_user(r
, &user_kvm_nested_state
->size
))
4986 case KVM_SET_NESTED_STATE
: {
4987 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
4988 struct kvm_nested_state kvm_state
;
4992 if (!kvm_x86_ops
.nested_ops
->set_state
)
4996 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5000 if (kvm_state
.size
< sizeof(kvm_state
))
5003 if (kvm_state
.flags
&
5004 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5005 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5006 | KVM_STATE_NESTED_GIF_SET
))
5009 /* nested_run_pending implies guest_mode. */
5010 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5011 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5014 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5015 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5016 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5019 case KVM_GET_SUPPORTED_HV_CPUID
:
5020 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5032 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5034 return VM_FAULT_SIGBUS
;
5037 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5041 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5043 ret
= kvm_x86_ops
.set_tss_addr(kvm
, addr
);
5047 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5050 return kvm_x86_ops
.set_identity_map_addr(kvm
, ident_addr
);
5053 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5054 unsigned long kvm_nr_mmu_pages
)
5056 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5059 mutex_lock(&kvm
->slots_lock
);
5061 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5062 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5064 mutex_unlock(&kvm
->slots_lock
);
5068 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5070 return kvm
->arch
.n_max_mmu_pages
;
5073 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5075 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5079 switch (chip
->chip_id
) {
5080 case KVM_IRQCHIP_PIC_MASTER
:
5081 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5082 sizeof(struct kvm_pic_state
));
5084 case KVM_IRQCHIP_PIC_SLAVE
:
5085 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5086 sizeof(struct kvm_pic_state
));
5088 case KVM_IRQCHIP_IOAPIC
:
5089 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5098 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5100 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5104 switch (chip
->chip_id
) {
5105 case KVM_IRQCHIP_PIC_MASTER
:
5106 spin_lock(&pic
->lock
);
5107 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5108 sizeof(struct kvm_pic_state
));
5109 spin_unlock(&pic
->lock
);
5111 case KVM_IRQCHIP_PIC_SLAVE
:
5112 spin_lock(&pic
->lock
);
5113 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5114 sizeof(struct kvm_pic_state
));
5115 spin_unlock(&pic
->lock
);
5117 case KVM_IRQCHIP_IOAPIC
:
5118 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5124 kvm_pic_update_irq(pic
);
5128 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5130 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5132 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5134 mutex_lock(&kps
->lock
);
5135 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5136 mutex_unlock(&kps
->lock
);
5140 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5143 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5145 mutex_lock(&pit
->pit_state
.lock
);
5146 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5147 for (i
= 0; i
< 3; i
++)
5148 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5149 mutex_unlock(&pit
->pit_state
.lock
);
5153 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5155 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5156 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5157 sizeof(ps
->channels
));
5158 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5159 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5160 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5164 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5168 u32 prev_legacy
, cur_legacy
;
5169 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5171 mutex_lock(&pit
->pit_state
.lock
);
5172 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5173 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5174 if (!prev_legacy
&& cur_legacy
)
5176 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5177 sizeof(pit
->pit_state
.channels
));
5178 pit
->pit_state
.flags
= ps
->flags
;
5179 for (i
= 0; i
< 3; i
++)
5180 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5182 mutex_unlock(&pit
->pit_state
.lock
);
5186 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5187 struct kvm_reinject_control
*control
)
5189 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5191 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5192 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5193 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5195 mutex_lock(&pit
->pit_state
.lock
);
5196 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5197 mutex_unlock(&pit
->pit_state
.lock
);
5202 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5205 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5207 if (kvm_x86_ops
.flush_log_dirty
)
5208 kvm_x86_ops
.flush_log_dirty(kvm
);
5211 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5214 if (!irqchip_in_kernel(kvm
))
5217 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5218 irq_event
->irq
, irq_event
->level
,
5223 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5224 struct kvm_enable_cap
*cap
)
5232 case KVM_CAP_DISABLE_QUIRKS
:
5233 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5236 case KVM_CAP_SPLIT_IRQCHIP
: {
5237 mutex_lock(&kvm
->lock
);
5239 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5240 goto split_irqchip_unlock
;
5242 if (irqchip_in_kernel(kvm
))
5243 goto split_irqchip_unlock
;
5244 if (kvm
->created_vcpus
)
5245 goto split_irqchip_unlock
;
5246 r
= kvm_setup_empty_irq_routing(kvm
);
5248 goto split_irqchip_unlock
;
5249 /* Pairs with irqchip_in_kernel. */
5251 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5252 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5254 split_irqchip_unlock
:
5255 mutex_unlock(&kvm
->lock
);
5258 case KVM_CAP_X2APIC_API
:
5260 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
5263 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
5264 kvm
->arch
.x2apic_format
= true;
5265 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
5266 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
5270 case KVM_CAP_X86_DISABLE_EXITS
:
5272 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
5275 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
5276 kvm_can_mwait_in_guest())
5277 kvm
->arch
.mwait_in_guest
= true;
5278 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
5279 kvm
->arch
.hlt_in_guest
= true;
5280 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
5281 kvm
->arch
.pause_in_guest
= true;
5282 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
5283 kvm
->arch
.cstate_in_guest
= true;
5286 case KVM_CAP_MSR_PLATFORM_INFO
:
5287 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
5290 case KVM_CAP_EXCEPTION_PAYLOAD
:
5291 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
5294 case KVM_CAP_X86_USER_SPACE_MSR
:
5295 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
5305 static void kvm_clear_msr_filter(struct kvm
*kvm
)
5308 u32 count
= kvm
->arch
.msr_filter
.count
;
5309 struct msr_bitmap_range ranges
[16];
5311 mutex_lock(&kvm
->lock
);
5312 kvm
->arch
.msr_filter
.count
= 0;
5313 memcpy(ranges
, kvm
->arch
.msr_filter
.ranges
, count
* sizeof(ranges
[0]));
5314 mutex_unlock(&kvm
->lock
);
5315 synchronize_srcu(&kvm
->srcu
);
5317 for (i
= 0; i
< count
; i
++)
5318 kfree(ranges
[i
].bitmap
);
5321 static int kvm_add_msr_filter(struct kvm
*kvm
, struct kvm_msr_filter_range
*user_range
)
5323 struct msr_bitmap_range
*ranges
= kvm
->arch
.msr_filter
.ranges
;
5324 struct msr_bitmap_range range
;
5325 unsigned long *bitmap
= NULL
;
5329 if (!user_range
->nmsrs
)
5332 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
5333 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
5336 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
5338 return PTR_ERR(bitmap
);
5340 range
= (struct msr_bitmap_range
) {
5341 .flags
= user_range
->flags
,
5342 .base
= user_range
->base
,
5343 .nmsrs
= user_range
->nmsrs
,
5347 if (range
.flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
)) {
5357 /* Everything ok, add this range identifier to our global pool */
5358 ranges
[kvm
->arch
.msr_filter
.count
] = range
;
5359 /* Make sure we filled the array before we tell anyone to walk it */
5361 kvm
->arch
.msr_filter
.count
++;
5369 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
5371 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
5372 struct kvm_msr_filter filter
;
5378 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
5381 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
5382 empty
&= !filter
.ranges
[i
].nmsrs
;
5384 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
5385 if (empty
&& !default_allow
)
5388 kvm_clear_msr_filter(kvm
);
5390 kvm
->arch
.msr_filter
.default_allow
= default_allow
;
5393 * Protect from concurrent calls to this function that could trigger
5394 * a TOCTOU violation on kvm->arch.msr_filter.count.
5396 mutex_lock(&kvm
->lock
);
5397 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
5398 r
= kvm_add_msr_filter(kvm
, &filter
.ranges
[i
]);
5403 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
5404 mutex_unlock(&kvm
->lock
);
5409 long kvm_arch_vm_ioctl(struct file
*filp
,
5410 unsigned int ioctl
, unsigned long arg
)
5412 struct kvm
*kvm
= filp
->private_data
;
5413 void __user
*argp
= (void __user
*)arg
;
5416 * This union makes it completely explicit to gcc-3.x
5417 * that these two variables' stack usage should be
5418 * combined, not added together.
5421 struct kvm_pit_state ps
;
5422 struct kvm_pit_state2 ps2
;
5423 struct kvm_pit_config pit_config
;
5427 case KVM_SET_TSS_ADDR
:
5428 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
5430 case KVM_SET_IDENTITY_MAP_ADDR
: {
5433 mutex_lock(&kvm
->lock
);
5435 if (kvm
->created_vcpus
)
5436 goto set_identity_unlock
;
5438 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
5439 goto set_identity_unlock
;
5440 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
5441 set_identity_unlock
:
5442 mutex_unlock(&kvm
->lock
);
5445 case KVM_SET_NR_MMU_PAGES
:
5446 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
5448 case KVM_GET_NR_MMU_PAGES
:
5449 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
5451 case KVM_CREATE_IRQCHIP
: {
5452 mutex_lock(&kvm
->lock
);
5455 if (irqchip_in_kernel(kvm
))
5456 goto create_irqchip_unlock
;
5459 if (kvm
->created_vcpus
)
5460 goto create_irqchip_unlock
;
5462 r
= kvm_pic_init(kvm
);
5464 goto create_irqchip_unlock
;
5466 r
= kvm_ioapic_init(kvm
);
5468 kvm_pic_destroy(kvm
);
5469 goto create_irqchip_unlock
;
5472 r
= kvm_setup_default_irq_routing(kvm
);
5474 kvm_ioapic_destroy(kvm
);
5475 kvm_pic_destroy(kvm
);
5476 goto create_irqchip_unlock
;
5478 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5480 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
5481 create_irqchip_unlock
:
5482 mutex_unlock(&kvm
->lock
);
5485 case KVM_CREATE_PIT
:
5486 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
5488 case KVM_CREATE_PIT2
:
5490 if (copy_from_user(&u
.pit_config
, argp
,
5491 sizeof(struct kvm_pit_config
)))
5494 mutex_lock(&kvm
->lock
);
5497 goto create_pit_unlock
;
5499 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
5503 mutex_unlock(&kvm
->lock
);
5505 case KVM_GET_IRQCHIP
: {
5506 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5507 struct kvm_irqchip
*chip
;
5509 chip
= memdup_user(argp
, sizeof(*chip
));
5516 if (!irqchip_kernel(kvm
))
5517 goto get_irqchip_out
;
5518 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
5520 goto get_irqchip_out
;
5522 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
5523 goto get_irqchip_out
;
5529 case KVM_SET_IRQCHIP
: {
5530 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5531 struct kvm_irqchip
*chip
;
5533 chip
= memdup_user(argp
, sizeof(*chip
));
5540 if (!irqchip_kernel(kvm
))
5541 goto set_irqchip_out
;
5542 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
5549 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
5552 if (!kvm
->arch
.vpit
)
5554 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
5558 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
5565 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
5567 mutex_lock(&kvm
->lock
);
5569 if (!kvm
->arch
.vpit
)
5571 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
5573 mutex_unlock(&kvm
->lock
);
5576 case KVM_GET_PIT2
: {
5578 if (!kvm
->arch
.vpit
)
5580 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
5584 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
5589 case KVM_SET_PIT2
: {
5591 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
5593 mutex_lock(&kvm
->lock
);
5595 if (!kvm
->arch
.vpit
)
5597 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
5599 mutex_unlock(&kvm
->lock
);
5602 case KVM_REINJECT_CONTROL
: {
5603 struct kvm_reinject_control control
;
5605 if (copy_from_user(&control
, argp
, sizeof(control
)))
5608 if (!kvm
->arch
.vpit
)
5610 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
5613 case KVM_SET_BOOT_CPU_ID
:
5615 mutex_lock(&kvm
->lock
);
5616 if (kvm
->created_vcpus
)
5619 kvm
->arch
.bsp_vcpu_id
= arg
;
5620 mutex_unlock(&kvm
->lock
);
5622 case KVM_XEN_HVM_CONFIG
: {
5623 struct kvm_xen_hvm_config xhc
;
5625 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
5630 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
5634 case KVM_SET_CLOCK
: {
5635 struct kvm_clock_data user_ns
;
5639 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
5648 * TODO: userspace has to take care of races with VCPU_RUN, so
5649 * kvm_gen_update_masterclock() can be cut down to locked
5650 * pvclock_update_vm_gtod_copy().
5652 kvm_gen_update_masterclock(kvm
);
5653 now_ns
= get_kvmclock_ns(kvm
);
5654 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
5655 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
5658 case KVM_GET_CLOCK
: {
5659 struct kvm_clock_data user_ns
;
5662 now_ns
= get_kvmclock_ns(kvm
);
5663 user_ns
.clock
= now_ns
;
5664 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
5665 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
5668 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
5673 case KVM_MEMORY_ENCRYPT_OP
: {
5675 if (kvm_x86_ops
.mem_enc_op
)
5676 r
= kvm_x86_ops
.mem_enc_op(kvm
, argp
);
5679 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
5680 struct kvm_enc_region region
;
5683 if (copy_from_user(®ion
, argp
, sizeof(region
)))
5687 if (kvm_x86_ops
.mem_enc_reg_region
)
5688 r
= kvm_x86_ops
.mem_enc_reg_region(kvm
, ®ion
);
5691 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
5692 struct kvm_enc_region region
;
5695 if (copy_from_user(®ion
, argp
, sizeof(region
)))
5699 if (kvm_x86_ops
.mem_enc_unreg_region
)
5700 r
= kvm_x86_ops
.mem_enc_unreg_region(kvm
, ®ion
);
5703 case KVM_HYPERV_EVENTFD
: {
5704 struct kvm_hyperv_eventfd hvevfd
;
5707 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
5709 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
5712 case KVM_SET_PMU_EVENT_FILTER
:
5713 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
5715 case KVM_X86_SET_MSR_FILTER
:
5716 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
5725 static void kvm_init_msr_list(void)
5727 struct x86_pmu_capability x86_pmu
;
5731 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
5732 "Please update the fixed PMCs in msrs_to_saved_all[]");
5734 perf_get_x86_pmu_capability(&x86_pmu
);
5736 num_msrs_to_save
= 0;
5737 num_emulated_msrs
= 0;
5738 num_msr_based_features
= 0;
5740 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
5741 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
5745 * Even MSRs that are valid in the host may not be exposed
5746 * to the guests in some cases.
5748 switch (msrs_to_save_all
[i
]) {
5749 case MSR_IA32_BNDCFGS
:
5750 if (!kvm_mpx_supported())
5754 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
))
5757 case MSR_IA32_UMWAIT_CONTROL
:
5758 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
5761 case MSR_IA32_RTIT_CTL
:
5762 case MSR_IA32_RTIT_STATUS
:
5763 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
5766 case MSR_IA32_RTIT_CR3_MATCH
:
5767 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5768 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
5771 case MSR_IA32_RTIT_OUTPUT_BASE
:
5772 case MSR_IA32_RTIT_OUTPUT_MASK
:
5773 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5774 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
5775 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
5778 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
5779 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5780 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
5781 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
5784 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
5785 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
5786 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
5789 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
5790 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
5791 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
5798 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
5801 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
5802 if (!kvm_x86_ops
.has_emulated_msr(NULL
, emulated_msrs_all
[i
]))
5805 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
5808 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
5809 struct kvm_msr_entry msr
;
5811 msr
.index
= msr_based_features_all
[i
];
5812 if (kvm_get_msr_feature(&msr
))
5815 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
5819 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
5827 if (!(lapic_in_kernel(vcpu
) &&
5828 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
5829 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5840 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
5847 if (!(lapic_in_kernel(vcpu
) &&
5848 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
5850 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5852 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
5862 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
5863 struct kvm_segment
*var
, int seg
)
5865 kvm_x86_ops
.set_segment(vcpu
, var
, seg
);
5868 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
5869 struct kvm_segment
*var
, int seg
)
5871 kvm_x86_ops
.get_segment(vcpu
, var
, seg
);
5874 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
5875 struct x86_exception
*exception
)
5879 BUG_ON(!mmu_is_nested(vcpu
));
5881 /* NPT walks are always user-walks */
5882 access
|= PFERR_USER_MASK
;
5883 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
5888 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
5889 struct x86_exception
*exception
)
5891 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5892 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5895 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
5896 struct x86_exception
*exception
)
5898 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5899 access
|= PFERR_FETCH_MASK
;
5900 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5903 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
5904 struct x86_exception
*exception
)
5906 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5907 access
|= PFERR_WRITE_MASK
;
5908 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5911 /* uses this to access any guest's mapped memory without checking CPL */
5912 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
5913 struct x86_exception
*exception
)
5915 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
5918 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
5919 struct kvm_vcpu
*vcpu
, u32 access
,
5920 struct x86_exception
*exception
)
5923 int r
= X86EMUL_CONTINUE
;
5926 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
5928 unsigned offset
= addr
& (PAGE_SIZE
-1);
5929 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
5932 if (gpa
== UNMAPPED_GVA
)
5933 return X86EMUL_PROPAGATE_FAULT
;
5934 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
5937 r
= X86EMUL_IO_NEEDED
;
5949 /* used for instruction fetching */
5950 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
5951 gva_t addr
, void *val
, unsigned int bytes
,
5952 struct x86_exception
*exception
)
5954 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5955 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5959 /* Inline kvm_read_guest_virt_helper for speed. */
5960 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
5962 if (unlikely(gpa
== UNMAPPED_GVA
))
5963 return X86EMUL_PROPAGATE_FAULT
;
5965 offset
= addr
& (PAGE_SIZE
-1);
5966 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
5967 bytes
= (unsigned)PAGE_SIZE
- offset
;
5968 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
5970 if (unlikely(ret
< 0))
5971 return X86EMUL_IO_NEEDED
;
5973 return X86EMUL_CONTINUE
;
5976 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
5977 gva_t addr
, void *val
, unsigned int bytes
,
5978 struct x86_exception
*exception
)
5980 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5983 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5984 * is returned, but our callers are not ready for that and they blindly
5985 * call kvm_inject_page_fault. Ensure that they at least do not leak
5986 * uninitialized kernel stack memory into cr2 and error code.
5988 memset(exception
, 0, sizeof(*exception
));
5989 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
5992 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
5994 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
5995 gva_t addr
, void *val
, unsigned int bytes
,
5996 struct x86_exception
*exception
, bool system
)
5998 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6001 if (!system
&& kvm_x86_ops
.get_cpl(vcpu
) == 3)
6002 access
|= PFERR_USER_MASK
;
6004 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6007 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6008 unsigned long addr
, void *val
, unsigned int bytes
)
6010 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6011 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6013 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6016 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6017 struct kvm_vcpu
*vcpu
, u32 access
,
6018 struct x86_exception
*exception
)
6021 int r
= X86EMUL_CONTINUE
;
6024 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
6027 unsigned offset
= addr
& (PAGE_SIZE
-1);
6028 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6031 if (gpa
== UNMAPPED_GVA
)
6032 return X86EMUL_PROPAGATE_FAULT
;
6033 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6035 r
= X86EMUL_IO_NEEDED
;
6047 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6048 unsigned int bytes
, struct x86_exception
*exception
,
6051 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6052 u32 access
= PFERR_WRITE_MASK
;
6054 if (!system
&& kvm_x86_ops
.get_cpl(vcpu
) == 3)
6055 access
|= PFERR_USER_MASK
;
6057 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6061 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
6062 unsigned int bytes
, struct x86_exception
*exception
)
6064 /* kvm_write_guest_virt_system can pull in tons of pages. */
6065 vcpu
->arch
.l1tf_flush_l1d
= true;
6067 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6068 PFERR_WRITE_MASK
, exception
);
6070 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
6072 int handle_ud(struct kvm_vcpu
*vcpu
)
6074 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
6075 int emul_type
= EMULTYPE_TRAP_UD
;
6076 char sig
[5]; /* ud2; .ascii "kvm" */
6077 struct x86_exception e
;
6079 if (unlikely(!kvm_x86_ops
.can_emulate_instruction(vcpu
, NULL
, 0)))
6082 if (force_emulation_prefix
&&
6083 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
6084 sig
, sizeof(sig
), &e
) == 0 &&
6085 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
6086 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
6087 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
6090 return kvm_emulate_instruction(vcpu
, emul_type
);
6092 EXPORT_SYMBOL_GPL(handle_ud
);
6094 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6095 gpa_t gpa
, bool write
)
6097 /* For APIC access vmexit */
6098 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6101 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
6102 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
6109 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6110 gpa_t
*gpa
, struct x86_exception
*exception
,
6113 u32 access
= ((kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
6114 | (write
? PFERR_WRITE_MASK
: 0);
6117 * currently PKRU is only applied to ept enabled guest so
6118 * there is no pkey in EPT page table for L1 guest or EPT
6119 * shadow page table for L2 guest.
6121 if (vcpu_match_mmio_gva(vcpu
, gva
)
6122 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
6123 vcpu
->arch
.mmio_access
, 0, access
)) {
6124 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
6125 (gva
& (PAGE_SIZE
- 1));
6126 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
6130 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6132 if (*gpa
== UNMAPPED_GVA
)
6135 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
6138 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6139 const void *val
, int bytes
)
6143 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
6146 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
6150 struct read_write_emulator_ops
{
6151 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
6153 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6154 void *val
, int bytes
);
6155 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6156 int bytes
, void *val
);
6157 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6158 void *val
, int bytes
);
6162 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
6164 if (vcpu
->mmio_read_completed
) {
6165 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
6166 vcpu
->mmio_fragments
[0].gpa
, val
);
6167 vcpu
->mmio_read_completed
= 0;
6174 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6175 void *val
, int bytes
)
6177 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
6180 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6181 void *val
, int bytes
)
6183 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
6186 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
6188 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
6189 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
6192 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6193 void *val
, int bytes
)
6195 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
6196 return X86EMUL_IO_NEEDED
;
6199 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6200 void *val
, int bytes
)
6202 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
6204 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6205 return X86EMUL_CONTINUE
;
6208 static const struct read_write_emulator_ops read_emultor
= {
6209 .read_write_prepare
= read_prepare
,
6210 .read_write_emulate
= read_emulate
,
6211 .read_write_mmio
= vcpu_mmio_read
,
6212 .read_write_exit_mmio
= read_exit_mmio
,
6215 static const struct read_write_emulator_ops write_emultor
= {
6216 .read_write_emulate
= write_emulate
,
6217 .read_write_mmio
= write_mmio
,
6218 .read_write_exit_mmio
= write_exit_mmio
,
6222 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
6224 struct x86_exception
*exception
,
6225 struct kvm_vcpu
*vcpu
,
6226 const struct read_write_emulator_ops
*ops
)
6230 bool write
= ops
->write
;
6231 struct kvm_mmio_fragment
*frag
;
6232 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6235 * If the exit was due to a NPF we may already have a GPA.
6236 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6237 * Note, this cannot be used on string operations since string
6238 * operation using rep will only have the initial GPA from the NPF
6241 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
6242 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
6243 gpa
= ctxt
->gpa_val
;
6244 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
6246 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
6248 return X86EMUL_PROPAGATE_FAULT
;
6251 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
6252 return X86EMUL_CONTINUE
;
6255 * Is this MMIO handled locally?
6257 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
6258 if (handled
== bytes
)
6259 return X86EMUL_CONTINUE
;
6265 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
6266 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
6270 return X86EMUL_CONTINUE
;
6273 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
6275 void *val
, unsigned int bytes
,
6276 struct x86_exception
*exception
,
6277 const struct read_write_emulator_ops
*ops
)
6279 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6283 if (ops
->read_write_prepare
&&
6284 ops
->read_write_prepare(vcpu
, val
, bytes
))
6285 return X86EMUL_CONTINUE
;
6287 vcpu
->mmio_nr_fragments
= 0;
6289 /* Crossing a page boundary? */
6290 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
6293 now
= -addr
& ~PAGE_MASK
;
6294 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
6297 if (rc
!= X86EMUL_CONTINUE
)
6300 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
6306 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
6308 if (rc
!= X86EMUL_CONTINUE
)
6311 if (!vcpu
->mmio_nr_fragments
)
6314 gpa
= vcpu
->mmio_fragments
[0].gpa
;
6316 vcpu
->mmio_needed
= 1;
6317 vcpu
->mmio_cur_fragment
= 0;
6319 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
6320 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
6321 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
6322 vcpu
->run
->mmio
.phys_addr
= gpa
;
6324 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
6327 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
6331 struct x86_exception
*exception
)
6333 return emulator_read_write(ctxt
, addr
, val
, bytes
,
6334 exception
, &read_emultor
);
6337 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
6341 struct x86_exception
*exception
)
6343 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
6344 exception
, &write_emultor
);
6347 #define CMPXCHG_TYPE(t, ptr, old, new) \
6348 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6350 #ifdef CONFIG_X86_64
6351 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6353 # define CMPXCHG64(ptr, old, new) \
6354 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6357 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
6362 struct x86_exception
*exception
)
6364 struct kvm_host_map map
;
6365 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6371 /* guests cmpxchg8b have to be emulated atomically */
6372 if (bytes
> 8 || (bytes
& (bytes
- 1)))
6375 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
6377 if (gpa
== UNMAPPED_GVA
||
6378 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6382 * Emulate the atomic as a straight write to avoid #AC if SLD is
6383 * enabled in the host and the access splits a cache line.
6385 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
6386 page_line_mask
= ~(cache_line_size() - 1);
6388 page_line_mask
= PAGE_MASK
;
6390 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
6393 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
6396 kaddr
= map
.hva
+ offset_in_page(gpa
);
6400 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
6403 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
6406 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
6409 exchanged
= CMPXCHG64(kaddr
, old
, new);
6415 kvm_vcpu_unmap(vcpu
, &map
, true);
6418 return X86EMUL_CMPXCHG_FAILED
;
6420 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
6422 return X86EMUL_CONTINUE
;
6425 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
6427 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
6430 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
6434 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
6435 if (vcpu
->arch
.pio
.in
)
6436 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
6437 vcpu
->arch
.pio
.size
, pd
);
6439 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
6440 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
6444 pd
+= vcpu
->arch
.pio
.size
;
6449 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
6450 unsigned short port
, void *val
,
6451 unsigned int count
, bool in
)
6453 vcpu
->arch
.pio
.port
= port
;
6454 vcpu
->arch
.pio
.in
= in
;
6455 vcpu
->arch
.pio
.count
= count
;
6456 vcpu
->arch
.pio
.size
= size
;
6458 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
6459 vcpu
->arch
.pio
.count
= 0;
6463 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
6464 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
6465 vcpu
->run
->io
.size
= size
;
6466 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
6467 vcpu
->run
->io
.count
= count
;
6468 vcpu
->run
->io
.port
= port
;
6473 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6474 unsigned short port
, void *val
, unsigned int count
)
6478 if (vcpu
->arch
.pio
.count
)
6481 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
6483 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
6486 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
6487 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
6488 vcpu
->arch
.pio
.count
= 0;
6495 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
6496 int size
, unsigned short port
, void *val
,
6499 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6503 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
6504 unsigned short port
, const void *val
,
6507 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
6508 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
6509 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
6512 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
6513 int size
, unsigned short port
,
6514 const void *val
, unsigned int count
)
6516 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6519 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
6521 return kvm_x86_ops
.get_segment_base(vcpu
, seg
);
6524 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
6526 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
6529 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
6531 if (!need_emulate_wbinvd(vcpu
))
6532 return X86EMUL_CONTINUE
;
6534 if (kvm_x86_ops
.has_wbinvd_exit()) {
6535 int cpu
= get_cpu();
6537 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
6538 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
6539 wbinvd_ipi
, NULL
, 1);
6541 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
6544 return X86EMUL_CONTINUE
;
6547 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
6549 kvm_emulate_wbinvd_noskip(vcpu
);
6550 return kvm_skip_emulated_instruction(vcpu
);
6552 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
6556 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
6558 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
6561 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6562 unsigned long *dest
)
6564 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
6567 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6568 unsigned long value
)
6571 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
6574 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
6576 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
6579 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
6581 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6582 unsigned long value
;
6586 value
= kvm_read_cr0(vcpu
);
6589 value
= vcpu
->arch
.cr2
;
6592 value
= kvm_read_cr3(vcpu
);
6595 value
= kvm_read_cr4(vcpu
);
6598 value
= kvm_get_cr8(vcpu
);
6601 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
6608 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
6610 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6615 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
6618 vcpu
->arch
.cr2
= val
;
6621 res
= kvm_set_cr3(vcpu
, val
);
6624 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
6627 res
= kvm_set_cr8(vcpu
, val
);
6630 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
6637 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
6639 return kvm_x86_ops
.get_cpl(emul_to_vcpu(ctxt
));
6642 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6644 kvm_x86_ops
.get_gdt(emul_to_vcpu(ctxt
), dt
);
6647 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6649 kvm_x86_ops
.get_idt(emul_to_vcpu(ctxt
), dt
);
6652 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6654 kvm_x86_ops
.set_gdt(emul_to_vcpu(ctxt
), dt
);
6657 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6659 kvm_x86_ops
.set_idt(emul_to_vcpu(ctxt
), dt
);
6662 static unsigned long emulator_get_cached_segment_base(
6663 struct x86_emulate_ctxt
*ctxt
, int seg
)
6665 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
6668 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
6669 struct desc_struct
*desc
, u32
*base3
,
6672 struct kvm_segment var
;
6674 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
6675 *selector
= var
.selector
;
6678 memset(desc
, 0, sizeof(*desc
));
6686 set_desc_limit(desc
, var
.limit
);
6687 set_desc_base(desc
, (unsigned long)var
.base
);
6688 #ifdef CONFIG_X86_64
6690 *base3
= var
.base
>> 32;
6692 desc
->type
= var
.type
;
6694 desc
->dpl
= var
.dpl
;
6695 desc
->p
= var
.present
;
6696 desc
->avl
= var
.avl
;
6704 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
6705 struct desc_struct
*desc
, u32 base3
,
6708 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6709 struct kvm_segment var
;
6711 var
.selector
= selector
;
6712 var
.base
= get_desc_base(desc
);
6713 #ifdef CONFIG_X86_64
6714 var
.base
|= ((u64
)base3
) << 32;
6716 var
.limit
= get_desc_limit(desc
);
6718 var
.limit
= (var
.limit
<< 12) | 0xfff;
6719 var
.type
= desc
->type
;
6720 var
.dpl
= desc
->dpl
;
6725 var
.avl
= desc
->avl
;
6726 var
.present
= desc
->p
;
6727 var
.unusable
= !var
.present
;
6730 kvm_set_segment(vcpu
, &var
, seg
);
6734 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
6735 u32 msr_index
, u64
*pdata
)
6737 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6740 r
= kvm_get_msr(vcpu
, msr_index
, pdata
);
6742 if (r
&& kvm_get_msr_user_space(vcpu
, msr_index
, r
)) {
6743 /* Bounce to user space */
6744 return X86EMUL_IO_NEEDED
;
6750 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
6751 u32 msr_index
, u64 data
)
6753 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6756 r
= kvm_set_msr(vcpu
, msr_index
, data
);
6758 if (r
&& kvm_set_msr_user_space(vcpu
, msr_index
, data
, r
)) {
6759 /* Bounce to user space */
6760 return X86EMUL_IO_NEEDED
;
6766 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
6768 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6770 return vcpu
->arch
.smbase
;
6773 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
6775 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6777 vcpu
->arch
.smbase
= smbase
;
6780 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
6783 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
6786 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
6787 u32 pmc
, u64
*pdata
)
6789 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
6792 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
6794 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
6797 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
6798 struct x86_instruction_info
*info
,
6799 enum x86_intercept_stage stage
)
6801 return kvm_x86_ops
.check_intercept(emul_to_vcpu(ctxt
), info
, stage
,
6805 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
6806 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
6809 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
6812 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
6814 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
6817 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
6819 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
6822 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
6824 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
6827 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
6829 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
6832 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
6834 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
6837 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
6839 kvm_x86_ops
.set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
6842 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
6844 return emul_to_vcpu(ctxt
)->arch
.hflags
;
6847 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
6849 emul_to_vcpu(ctxt
)->arch
.hflags
= emul_flags
;
6852 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
,
6853 const char *smstate
)
6855 return kvm_x86_ops
.pre_leave_smm(emul_to_vcpu(ctxt
), smstate
);
6858 static void emulator_post_leave_smm(struct x86_emulate_ctxt
*ctxt
)
6860 kvm_smm_changed(emul_to_vcpu(ctxt
));
6863 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
6865 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
6868 static const struct x86_emulate_ops emulate_ops
= {
6869 .read_gpr
= emulator_read_gpr
,
6870 .write_gpr
= emulator_write_gpr
,
6871 .read_std
= emulator_read_std
,
6872 .write_std
= emulator_write_std
,
6873 .read_phys
= kvm_read_guest_phys_system
,
6874 .fetch
= kvm_fetch_guest_virt
,
6875 .read_emulated
= emulator_read_emulated
,
6876 .write_emulated
= emulator_write_emulated
,
6877 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
6878 .invlpg
= emulator_invlpg
,
6879 .pio_in_emulated
= emulator_pio_in_emulated
,
6880 .pio_out_emulated
= emulator_pio_out_emulated
,
6881 .get_segment
= emulator_get_segment
,
6882 .set_segment
= emulator_set_segment
,
6883 .get_cached_segment_base
= emulator_get_cached_segment_base
,
6884 .get_gdt
= emulator_get_gdt
,
6885 .get_idt
= emulator_get_idt
,
6886 .set_gdt
= emulator_set_gdt
,
6887 .set_idt
= emulator_set_idt
,
6888 .get_cr
= emulator_get_cr
,
6889 .set_cr
= emulator_set_cr
,
6890 .cpl
= emulator_get_cpl
,
6891 .get_dr
= emulator_get_dr
,
6892 .set_dr
= emulator_set_dr
,
6893 .get_smbase
= emulator_get_smbase
,
6894 .set_smbase
= emulator_set_smbase
,
6895 .set_msr
= emulator_set_msr
,
6896 .get_msr
= emulator_get_msr
,
6897 .check_pmc
= emulator_check_pmc
,
6898 .read_pmc
= emulator_read_pmc
,
6899 .halt
= emulator_halt
,
6900 .wbinvd
= emulator_wbinvd
,
6901 .fix_hypercall
= emulator_fix_hypercall
,
6902 .intercept
= emulator_intercept
,
6903 .get_cpuid
= emulator_get_cpuid
,
6904 .guest_has_long_mode
= emulator_guest_has_long_mode
,
6905 .guest_has_movbe
= emulator_guest_has_movbe
,
6906 .guest_has_fxsr
= emulator_guest_has_fxsr
,
6907 .set_nmi_mask
= emulator_set_nmi_mask
,
6908 .get_hflags
= emulator_get_hflags
,
6909 .set_hflags
= emulator_set_hflags
,
6910 .pre_leave_smm
= emulator_pre_leave_smm
,
6911 .post_leave_smm
= emulator_post_leave_smm
,
6912 .set_xcr
= emulator_set_xcr
,
6915 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
6917 u32 int_shadow
= kvm_x86_ops
.get_interrupt_shadow(vcpu
);
6919 * an sti; sti; sequence only disable interrupts for the first
6920 * instruction. So, if the last instruction, be it emulated or
6921 * not, left the system with the INT_STI flag enabled, it
6922 * means that the last instruction is an sti. We should not
6923 * leave the flag on in this case. The same goes for mov ss
6925 if (int_shadow
& mask
)
6927 if (unlikely(int_shadow
|| mask
)) {
6928 kvm_x86_ops
.set_interrupt_shadow(vcpu
, mask
);
6930 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6934 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
6936 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6937 if (ctxt
->exception
.vector
== PF_VECTOR
)
6938 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
6940 if (ctxt
->exception
.error_code_valid
)
6941 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
6942 ctxt
->exception
.error_code
);
6944 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
6948 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
6950 struct x86_emulate_ctxt
*ctxt
;
6952 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
6954 pr_err("kvm: failed to allocate vcpu's emulator\n");
6959 ctxt
->ops
= &emulate_ops
;
6960 vcpu
->arch
.emulate_ctxt
= ctxt
;
6965 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
6967 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6970 kvm_x86_ops
.get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
6972 ctxt
->gpa_available
= false;
6973 ctxt
->eflags
= kvm_get_rflags(vcpu
);
6974 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
6976 ctxt
->eip
= kvm_rip_read(vcpu
);
6977 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
6978 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
6979 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
6980 cs_db
? X86EMUL_MODE_PROT32
:
6981 X86EMUL_MODE_PROT16
;
6982 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
6983 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
6984 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
6986 init_decode_cache(ctxt
);
6987 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
6990 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
6992 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6995 init_emulate_ctxt(vcpu
);
6999 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
7000 ret
= emulate_int_real(ctxt
, irq
);
7002 if (ret
!= X86EMUL_CONTINUE
) {
7003 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
7005 ctxt
->eip
= ctxt
->_eip
;
7006 kvm_rip_write(vcpu
, ctxt
->eip
);
7007 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7010 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
7012 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
7014 ++vcpu
->stat
.insn_emulation_fail
;
7015 trace_kvm_emulate_insn_failed(vcpu
);
7017 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
7018 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7022 if (emulation_type
& EMULTYPE_SKIP
) {
7023 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7024 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7025 vcpu
->run
->internal
.ndata
= 0;
7029 kvm_queue_exception(vcpu
, UD_VECTOR
);
7031 if (!is_guest_mode(vcpu
) && kvm_x86_ops
.get_cpl(vcpu
) == 0) {
7032 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7033 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7034 vcpu
->run
->internal
.ndata
= 0;
7041 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7042 bool write_fault_to_shadow_pgtable
,
7045 gpa_t gpa
= cr2_or_gpa
;
7048 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7051 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7052 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7055 if (!vcpu
->arch
.mmu
->direct_map
) {
7057 * Write permission should be allowed since only
7058 * write access need to be emulated.
7060 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7063 * If the mapping is invalid in guest, let cpu retry
7064 * it to generate fault.
7066 if (gpa
== UNMAPPED_GVA
)
7071 * Do not retry the unhandleable instruction if it faults on the
7072 * readonly host memory, otherwise it will goto a infinite loop:
7073 * retry instruction -> write #PF -> emulation fail -> retry
7074 * instruction -> ...
7076 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
7079 * If the instruction failed on the error pfn, it can not be fixed,
7080 * report the error to userspace.
7082 if (is_error_noslot_pfn(pfn
))
7085 kvm_release_pfn_clean(pfn
);
7087 /* The instructions are well-emulated on direct mmu. */
7088 if (vcpu
->arch
.mmu
->direct_map
) {
7089 unsigned int indirect_shadow_pages
;
7091 spin_lock(&vcpu
->kvm
->mmu_lock
);
7092 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
7093 spin_unlock(&vcpu
->kvm
->mmu_lock
);
7095 if (indirect_shadow_pages
)
7096 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7102 * if emulation was due to access to shadowed page table
7103 * and it failed try to unshadow page and re-enter the
7104 * guest to let CPU execute the instruction.
7106 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7109 * If the access faults on its page table, it can not
7110 * be fixed by unprotecting shadow page and it should
7111 * be reported to userspace.
7113 return !write_fault_to_shadow_pgtable
;
7116 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
7117 gpa_t cr2_or_gpa
, int emulation_type
)
7119 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7120 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
7122 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
7123 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
7126 * If the emulation is caused by #PF and it is non-page_table
7127 * writing instruction, it means the VM-EXIT is caused by shadow
7128 * page protected, we can zap the shadow page and retry this
7129 * instruction directly.
7131 * Note: if the guest uses a non-page-table modifying instruction
7132 * on the PDE that points to the instruction, then we will unmap
7133 * the instruction and go to an infinite loop. So, we cache the
7134 * last retried eip and the last fault address, if we meet the eip
7135 * and the address again, we can break out of the potential infinite
7138 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
7140 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7143 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7144 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7147 if (x86_page_table_writing_insn(ctxt
))
7150 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
7153 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
7154 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
7156 if (!vcpu
->arch
.mmu
->direct_map
)
7157 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7159 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7164 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
7165 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
7167 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
7169 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
7170 /* This is a good place to trace that we are exiting SMM. */
7171 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
7173 /* Process a latched INIT or SMI, if any. */
7174 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7177 kvm_mmu_reset_context(vcpu
);
7180 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
7189 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
7190 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
7195 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
7197 struct kvm_run
*kvm_run
= vcpu
->run
;
7199 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
7200 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
7201 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
7202 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7203 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7206 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
7210 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
7212 unsigned long rflags
= kvm_x86_ops
.get_rflags(vcpu
);
7215 r
= kvm_x86_ops
.skip_emulated_instruction(vcpu
);
7220 * rflags is the old, "raw" value of the flags. The new value has
7221 * not been saved yet.
7223 * This is correct even for TF set by the guest, because "the
7224 * processor will not generate this exception after the instruction
7225 * that sets the TF flag".
7227 if (unlikely(rflags
& X86_EFLAGS_TF
))
7228 r
= kvm_vcpu_do_singlestep(vcpu
);
7231 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
7233 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
7235 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
7236 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
7237 struct kvm_run
*kvm_run
= vcpu
->run
;
7238 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7239 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7240 vcpu
->arch
.guest_debug_dr7
,
7244 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
7245 kvm_run
->debug
.arch
.pc
= eip
;
7246 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7247 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7253 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
7254 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
7255 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7256 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7261 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
7270 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
7272 switch (ctxt
->opcode_len
) {
7279 case 0xe6: /* OUT */
7283 case 0x6c: /* INS */
7285 case 0x6e: /* OUTS */
7292 case 0x33: /* RDPMC */
7301 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7302 int emulation_type
, void *insn
, int insn_len
)
7305 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7306 bool writeback
= true;
7307 bool write_fault_to_spt
;
7309 if (unlikely(!kvm_x86_ops
.can_emulate_instruction(vcpu
, insn
, insn_len
)))
7312 vcpu
->arch
.l1tf_flush_l1d
= true;
7315 * Clear write_fault_to_shadow_pgtable here to ensure it is
7318 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
7319 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
7320 kvm_clear_exception_queue(vcpu
);
7322 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
7323 init_emulate_ctxt(vcpu
);
7326 * We will reenter on the same instruction since
7327 * we do not set complete_userspace_io. This does not
7328 * handle watchpoints yet, those would be handled in
7331 if (!(emulation_type
& EMULTYPE_SKIP
) &&
7332 kvm_vcpu_check_breakpoint(vcpu
, &r
))
7335 ctxt
->interruptibility
= 0;
7336 ctxt
->have_exception
= false;
7337 ctxt
->exception
.vector
= -1;
7338 ctxt
->perm_ok
= false;
7340 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
7342 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
7344 trace_kvm_emulate_insn_start(vcpu
);
7345 ++vcpu
->stat
.insn_emulation
;
7346 if (r
!= EMULATION_OK
) {
7347 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
7348 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
7349 kvm_queue_exception(vcpu
, UD_VECTOR
);
7352 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
7356 if (ctxt
->have_exception
) {
7358 * #UD should result in just EMULATION_FAILED, and trap-like
7359 * exception should not be encountered during decode.
7361 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
7362 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
7363 inject_emulated_exception(vcpu
);
7366 return handle_emulation_failure(vcpu
, emulation_type
);
7370 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
7371 !is_vmware_backdoor_opcode(ctxt
)) {
7372 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7377 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7378 * for kvm_skip_emulated_instruction(). The caller is responsible for
7379 * updating interruptibility state and injecting single-step #DBs.
7381 if (emulation_type
& EMULTYPE_SKIP
) {
7382 kvm_rip_write(vcpu
, ctxt
->_eip
);
7383 if (ctxt
->eflags
& X86_EFLAGS_RF
)
7384 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
7388 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
7391 /* this is needed for vmware backdoor interface to work since it
7392 changes registers values during IO operation */
7393 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
7394 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7395 emulator_invalidate_register_cache(ctxt
);
7399 if (emulation_type
& EMULTYPE_PF
) {
7400 /* Save the faulting GPA (cr2) in the address field */
7401 ctxt
->exception
.address
= cr2_or_gpa
;
7403 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7404 if (vcpu
->arch
.mmu
->direct_map
) {
7405 ctxt
->gpa_available
= true;
7406 ctxt
->gpa_val
= cr2_or_gpa
;
7409 /* Sanitize the address out of an abundance of paranoia. */
7410 ctxt
->exception
.address
= 0;
7413 r
= x86_emulate_insn(ctxt
);
7415 if (r
== EMULATION_INTERCEPTED
)
7418 if (r
== EMULATION_FAILED
) {
7419 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
7423 return handle_emulation_failure(vcpu
, emulation_type
);
7426 if (ctxt
->have_exception
) {
7428 if (inject_emulated_exception(vcpu
))
7430 } else if (vcpu
->arch
.pio
.count
) {
7431 if (!vcpu
->arch
.pio
.in
) {
7432 /* FIXME: return into emulator if single-stepping. */
7433 vcpu
->arch
.pio
.count
= 0;
7436 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
7439 } else if (vcpu
->mmio_needed
) {
7440 ++vcpu
->stat
.mmio_exits
;
7442 if (!vcpu
->mmio_is_write
)
7445 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7446 } else if (r
== EMULATION_RESTART
)
7452 unsigned long rflags
= kvm_x86_ops
.get_rflags(vcpu
);
7453 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
7454 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7455 if (!ctxt
->have_exception
||
7456 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
7457 kvm_rip_write(vcpu
, ctxt
->eip
);
7458 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
7459 r
= kvm_vcpu_do_singlestep(vcpu
);
7460 if (kvm_x86_ops
.update_emulated_instruction
)
7461 kvm_x86_ops
.update_emulated_instruction(vcpu
);
7462 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
7466 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7467 * do nothing, and it will be requested again as soon as
7468 * the shadow expires. But we still need to check here,
7469 * because POPF has no interrupt shadow.
7471 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
7472 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7474 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
7479 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
7481 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
7483 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
7485 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
7486 void *insn
, int insn_len
)
7488 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
7490 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
7492 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
7494 vcpu
->arch
.pio
.count
= 0;
7498 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
7500 vcpu
->arch
.pio
.count
= 0;
7502 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
7505 return kvm_skip_emulated_instruction(vcpu
);
7508 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7509 unsigned short port
)
7511 unsigned long val
= kvm_rax_read(vcpu
);
7512 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
7518 * Workaround userspace that relies on old KVM behavior of %rip being
7519 * incremented prior to exiting to userspace to handle "OUT 0x7e".
7522 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
7523 vcpu
->arch
.complete_userspace_io
=
7524 complete_fast_pio_out_port_0x7e
;
7525 kvm_skip_emulated_instruction(vcpu
);
7527 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
7528 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
7533 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
7537 /* We should only ever be called with arch.pio.count equal to 1 */
7538 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
7540 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
7541 vcpu
->arch
.pio
.count
= 0;
7545 /* For size less than 4 we merge, else we zero extend */
7546 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
7549 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7550 * the copy and tracing
7552 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
7553 kvm_rax_write(vcpu
, val
);
7555 return kvm_skip_emulated_instruction(vcpu
);
7558 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7559 unsigned short port
)
7564 /* For size less than 4 we merge, else we zero extend */
7565 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
7567 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
7569 kvm_rax_write(vcpu
, val
);
7573 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
7574 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
7579 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
7584 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
7586 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
7587 return ret
&& kvm_skip_emulated_instruction(vcpu
);
7589 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
7591 static int kvmclock_cpu_down_prep(unsigned int cpu
)
7593 __this_cpu_write(cpu_tsc_khz
, 0);
7597 static void tsc_khz_changed(void *data
)
7599 struct cpufreq_freqs
*freq
= data
;
7600 unsigned long khz
= 0;
7604 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
7605 khz
= cpufreq_quick_get(raw_smp_processor_id());
7608 __this_cpu_write(cpu_tsc_khz
, khz
);
7611 #ifdef CONFIG_X86_64
7612 static void kvm_hyperv_tsc_notifier(void)
7615 struct kvm_vcpu
*vcpu
;
7618 mutex_lock(&kvm_lock
);
7619 list_for_each_entry(kvm
, &vm_list
, vm_list
)
7620 kvm_make_mclock_inprogress_request(kvm
);
7622 hyperv_stop_tsc_emulation();
7624 /* TSC frequency always matches when on Hyper-V */
7625 for_each_present_cpu(cpu
)
7626 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
7627 kvm_max_guest_tsc_khz
= tsc_khz
;
7629 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7630 struct kvm_arch
*ka
= &kvm
->arch
;
7632 spin_lock(&ka
->pvclock_gtod_sync_lock
);
7634 pvclock_update_vm_gtod_copy(kvm
);
7636 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
7637 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7639 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
7640 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
7642 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
7644 mutex_unlock(&kvm_lock
);
7648 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
7651 struct kvm_vcpu
*vcpu
;
7652 int i
, send_ipi
= 0;
7655 * We allow guests to temporarily run on slowing clocks,
7656 * provided we notify them after, or to run on accelerating
7657 * clocks, provided we notify them before. Thus time never
7660 * However, we have a problem. We can't atomically update
7661 * the frequency of a given CPU from this function; it is
7662 * merely a notifier, which can be called from any CPU.
7663 * Changing the TSC frequency at arbitrary points in time
7664 * requires a recomputation of local variables related to
7665 * the TSC for each VCPU. We must flag these local variables
7666 * to be updated and be sure the update takes place with the
7667 * new frequency before any guests proceed.
7669 * Unfortunately, the combination of hotplug CPU and frequency
7670 * change creates an intractable locking scenario; the order
7671 * of when these callouts happen is undefined with respect to
7672 * CPU hotplug, and they can race with each other. As such,
7673 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7674 * undefined; you can actually have a CPU frequency change take
7675 * place in between the computation of X and the setting of the
7676 * variable. To protect against this problem, all updates of
7677 * the per_cpu tsc_khz variable are done in an interrupt
7678 * protected IPI, and all callers wishing to update the value
7679 * must wait for a synchronous IPI to complete (which is trivial
7680 * if the caller is on the CPU already). This establishes the
7681 * necessary total order on variable updates.
7683 * Note that because a guest time update may take place
7684 * anytime after the setting of the VCPU's request bit, the
7685 * correct TSC value must be set before the request. However,
7686 * to ensure the update actually makes it to any guest which
7687 * starts running in hardware virtualization between the set
7688 * and the acquisition of the spinlock, we must also ping the
7689 * CPU after setting the request bit.
7693 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
7695 mutex_lock(&kvm_lock
);
7696 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7697 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7698 if (vcpu
->cpu
!= cpu
)
7700 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7701 if (vcpu
->cpu
!= raw_smp_processor_id())
7705 mutex_unlock(&kvm_lock
);
7707 if (freq
->old
< freq
->new && send_ipi
) {
7709 * We upscale the frequency. Must make the guest
7710 * doesn't see old kvmclock values while running with
7711 * the new frequency, otherwise we risk the guest sees
7712 * time go backwards.
7714 * In case we update the frequency for another cpu
7715 * (which might be in guest context) send an interrupt
7716 * to kick the cpu out of guest context. Next time
7717 * guest context is entered kvmclock will be updated,
7718 * so the guest will not see stale values.
7720 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
7724 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
7727 struct cpufreq_freqs
*freq
= data
;
7730 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
7732 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
7735 for_each_cpu(cpu
, freq
->policy
->cpus
)
7736 __kvmclock_cpufreq_notifier(freq
, cpu
);
7741 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
7742 .notifier_call
= kvmclock_cpufreq_notifier
7745 static int kvmclock_cpu_online(unsigned int cpu
)
7747 tsc_khz_changed(NULL
);
7751 static void kvm_timer_init(void)
7753 max_tsc_khz
= tsc_khz
;
7755 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
7756 #ifdef CONFIG_CPU_FREQ
7757 struct cpufreq_policy
*policy
;
7761 policy
= cpufreq_cpu_get(cpu
);
7763 if (policy
->cpuinfo
.max_freq
)
7764 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
7765 cpufreq_cpu_put(policy
);
7769 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
7770 CPUFREQ_TRANSITION_NOTIFIER
);
7773 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
7774 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
7777 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
7778 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
7780 int kvm_is_in_guest(void)
7782 return __this_cpu_read(current_vcpu
) != NULL
;
7785 static int kvm_is_user_mode(void)
7789 if (__this_cpu_read(current_vcpu
))
7790 user_mode
= kvm_x86_ops
.get_cpl(__this_cpu_read(current_vcpu
));
7792 return user_mode
!= 0;
7795 static unsigned long kvm_get_guest_ip(void)
7797 unsigned long ip
= 0;
7799 if (__this_cpu_read(current_vcpu
))
7800 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
7805 static void kvm_handle_intel_pt_intr(void)
7807 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
7809 kvm_make_request(KVM_REQ_PMI
, vcpu
);
7810 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
7811 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
7814 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
7815 .is_in_guest
= kvm_is_in_guest
,
7816 .is_user_mode
= kvm_is_user_mode
,
7817 .get_guest_ip
= kvm_get_guest_ip
,
7818 .handle_intel_pt_intr
= kvm_handle_intel_pt_intr
,
7821 #ifdef CONFIG_X86_64
7822 static void pvclock_gtod_update_fn(struct work_struct
*work
)
7826 struct kvm_vcpu
*vcpu
;
7829 mutex_lock(&kvm_lock
);
7830 list_for_each_entry(kvm
, &vm_list
, vm_list
)
7831 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7832 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7833 atomic_set(&kvm_guest_has_master_clock
, 0);
7834 mutex_unlock(&kvm_lock
);
7837 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
7840 * Notification about pvclock gtod data update.
7842 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
7845 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
7846 struct timekeeper
*tk
= priv
;
7848 update_pvclock_gtod(tk
);
7850 /* disable master clock if host does not trust, or does not
7851 * use, TSC based clocksource.
7853 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
7854 atomic_read(&kvm_guest_has_master_clock
) != 0)
7855 queue_work(system_long_wq
, &pvclock_gtod_work
);
7860 static struct notifier_block pvclock_gtod_notifier
= {
7861 .notifier_call
= pvclock_gtod_notify
,
7865 int kvm_arch_init(void *opaque
)
7867 struct kvm_x86_init_ops
*ops
= opaque
;
7870 if (kvm_x86_ops
.hardware_enable
) {
7871 printk(KERN_ERR
"kvm: already loaded the other module\n");
7876 if (!ops
->cpu_has_kvm_support()) {
7877 pr_err_ratelimited("kvm: no hardware support\n");
7881 if (ops
->disabled_by_bios()) {
7882 pr_err_ratelimited("kvm: disabled by bios\n");
7888 * KVM explicitly assumes that the guest has an FPU and
7889 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7890 * vCPU's FPU state as a fxregs_state struct.
7892 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
7893 printk(KERN_ERR
"kvm: inadequate fpu\n");
7899 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
7900 __alignof__(struct fpu
), SLAB_ACCOUNT
,
7902 if (!x86_fpu_cache
) {
7903 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
7907 x86_emulator_cache
= kvm_alloc_emulator_cache();
7908 if (!x86_emulator_cache
) {
7909 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7910 goto out_free_x86_fpu_cache
;
7913 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
7914 if (!user_return_msrs
) {
7915 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
7916 goto out_free_x86_emulator_cache
;
7919 r
= kvm_mmu_module_init();
7921 goto out_free_percpu
;
7923 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
7924 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
7925 PT_PRESENT_MASK
, 0, sme_me_mask
);
7928 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
7930 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
7931 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
7932 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
7936 if (pi_inject_timer
== -1)
7937 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
7938 #ifdef CONFIG_X86_64
7939 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
7941 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
7942 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
7948 free_percpu(user_return_msrs
);
7949 out_free_x86_emulator_cache
:
7950 kmem_cache_destroy(x86_emulator_cache
);
7951 out_free_x86_fpu_cache
:
7952 kmem_cache_destroy(x86_fpu_cache
);
7957 void kvm_arch_exit(void)
7959 #ifdef CONFIG_X86_64
7960 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
7961 clear_hv_tscchange_cb();
7964 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
7966 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
7967 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
7968 CPUFREQ_TRANSITION_NOTIFIER
);
7969 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
7970 #ifdef CONFIG_X86_64
7971 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
7973 kvm_x86_ops
.hardware_enable
= NULL
;
7974 kvm_mmu_module_exit();
7975 free_percpu(user_return_msrs
);
7976 kmem_cache_destroy(x86_fpu_cache
);
7979 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
7981 ++vcpu
->stat
.halt_exits
;
7982 if (lapic_in_kernel(vcpu
)) {
7983 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
7986 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
7990 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
7992 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
7994 int ret
= kvm_skip_emulated_instruction(vcpu
);
7996 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7997 * KVM_EXIT_DEBUG here.
7999 return kvm_vcpu_halt(vcpu
) && ret
;
8001 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
8003 #ifdef CONFIG_X86_64
8004 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
8005 unsigned long clock_type
)
8007 struct kvm_clock_pairing clock_pairing
;
8008 struct timespec64 ts
;
8012 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
8013 return -KVM_EOPNOTSUPP
;
8015 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
8016 return -KVM_EOPNOTSUPP
;
8018 clock_pairing
.sec
= ts
.tv_sec
;
8019 clock_pairing
.nsec
= ts
.tv_nsec
;
8020 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
8021 clock_pairing
.flags
= 0;
8022 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
8025 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
8026 sizeof(struct kvm_clock_pairing
)))
8034 * kvm_pv_kick_cpu_op: Kick a vcpu.
8036 * @apicid - apicid of vcpu to be kicked.
8038 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
8040 struct kvm_lapic_irq lapic_irq
;
8042 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
8043 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
8044 lapic_irq
.level
= 0;
8045 lapic_irq
.dest_id
= apicid
;
8046 lapic_irq
.msi_redir_hint
= false;
8048 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
8049 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
8052 bool kvm_apicv_activated(struct kvm
*kvm
)
8054 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
8056 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
8058 void kvm_apicv_init(struct kvm
*kvm
, bool enable
)
8061 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
8062 &kvm
->arch
.apicv_inhibit_reasons
);
8064 set_bit(APICV_INHIBIT_REASON_DISABLE
,
8065 &kvm
->arch
.apicv_inhibit_reasons
);
8067 EXPORT_SYMBOL_GPL(kvm_apicv_init
);
8069 static void kvm_sched_yield(struct kvm
*kvm
, unsigned long dest_id
)
8071 struct kvm_vcpu
*target
= NULL
;
8072 struct kvm_apic_map
*map
;
8075 map
= rcu_dereference(kvm
->arch
.apic_map
);
8077 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
8078 target
= map
->phys_map
[dest_id
]->vcpu
;
8082 if (target
&& READ_ONCE(target
->ready
))
8083 kvm_vcpu_yield_to(target
);
8086 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
8088 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
8091 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
8092 return kvm_hv_hypercall(vcpu
);
8094 nr
= kvm_rax_read(vcpu
);
8095 a0
= kvm_rbx_read(vcpu
);
8096 a1
= kvm_rcx_read(vcpu
);
8097 a2
= kvm_rdx_read(vcpu
);
8098 a3
= kvm_rsi_read(vcpu
);
8100 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
8102 op_64_bit
= is_64_bit_mode(vcpu
);
8111 if (kvm_x86_ops
.get_cpl(vcpu
) != 0) {
8119 case KVM_HC_VAPIC_POLL_IRQ
:
8122 case KVM_HC_KICK_CPU
:
8123 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
8126 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
8127 kvm_sched_yield(vcpu
->kvm
, a1
);
8130 #ifdef CONFIG_X86_64
8131 case KVM_HC_CLOCK_PAIRING
:
8132 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
8135 case KVM_HC_SEND_IPI
:
8136 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
8139 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
8141 case KVM_HC_SCHED_YIELD
:
8142 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
8145 kvm_sched_yield(vcpu
->kvm
, a0
);
8155 kvm_rax_write(vcpu
, ret
);
8157 ++vcpu
->stat
.hypercalls
;
8158 return kvm_skip_emulated_instruction(vcpu
);
8160 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
8162 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
8164 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8165 char instruction
[3];
8166 unsigned long rip
= kvm_rip_read(vcpu
);
8168 kvm_x86_ops
.patch_hypercall(vcpu
, instruction
);
8170 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
8174 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
8176 return vcpu
->run
->request_interrupt_window
&&
8177 likely(!pic_in_kernel(vcpu
->kvm
));
8180 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
8182 struct kvm_run
*kvm_run
= vcpu
->run
;
8185 * if_flag is obsolete and useless, so do not bother
8186 * setting it for SEV-ES guests. Userspace can just
8187 * use kvm_run->ready_for_interrupt_injection.
8189 kvm_run
->if_flag
= !vcpu
->arch
.guest_state_protected
8190 && (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
8192 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
8193 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
8194 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
8195 kvm_run
->ready_for_interrupt_injection
=
8196 pic_in_kernel(vcpu
->kvm
) ||
8197 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
8200 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
8204 if (!kvm_x86_ops
.update_cr8_intercept
)
8207 if (!lapic_in_kernel(vcpu
))
8210 if (vcpu
->arch
.apicv_active
)
8213 if (!vcpu
->arch
.apic
->vapic_addr
)
8214 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
8221 tpr
= kvm_lapic_get_cr8(vcpu
);
8223 kvm_x86_ops
.update_cr8_intercept(vcpu
, tpr
, max_irr
);
8226 static void inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
8229 bool can_inject
= true;
8231 /* try to reinject previous events if any */
8233 if (vcpu
->arch
.exception
.injected
) {
8234 kvm_x86_ops
.queue_exception(vcpu
);
8238 * Do not inject an NMI or interrupt if there is a pending
8239 * exception. Exceptions and interrupts are recognized at
8240 * instruction boundaries, i.e. the start of an instruction.
8241 * Trap-like exceptions, e.g. #DB, have higher priority than
8242 * NMIs and interrupts, i.e. traps are recognized before an
8243 * NMI/interrupt that's pending on the same instruction.
8244 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8245 * priority, but are only generated (pended) during instruction
8246 * execution, i.e. a pending fault-like exception means the
8247 * fault occurred on the *previous* instruction and must be
8248 * serviced prior to recognizing any new events in order to
8249 * fully complete the previous instruction.
8251 else if (!vcpu
->arch
.exception
.pending
) {
8252 if (vcpu
->arch
.nmi_injected
) {
8253 kvm_x86_ops
.set_nmi(vcpu
);
8255 } else if (vcpu
->arch
.interrupt
.injected
) {
8256 kvm_x86_ops
.set_irq(vcpu
);
8261 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
8262 vcpu
->arch
.exception
.pending
);
8265 * Call check_nested_events() even if we reinjected a previous event
8266 * in order for caller to determine if it should require immediate-exit
8267 * from L2 to L1 due to pending L1 events which require exit
8270 if (is_guest_mode(vcpu
)) {
8271 r
= kvm_x86_ops
.nested_ops
->check_events(vcpu
);
8276 /* try to inject new event if pending */
8277 if (vcpu
->arch
.exception
.pending
) {
8278 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
8279 vcpu
->arch
.exception
.has_error_code
,
8280 vcpu
->arch
.exception
.error_code
);
8282 vcpu
->arch
.exception
.pending
= false;
8283 vcpu
->arch
.exception
.injected
= true;
8285 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
8286 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
8289 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
8290 kvm_deliver_exception_payload(vcpu
);
8291 if (vcpu
->arch
.dr7
& DR7_GD
) {
8292 vcpu
->arch
.dr7
&= ~DR7_GD
;
8293 kvm_update_dr7(vcpu
);
8297 kvm_x86_ops
.queue_exception(vcpu
);
8302 * Finally, inject interrupt events. If an event cannot be injected
8303 * due to architectural conditions (e.g. IF=0) a window-open exit
8304 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
8305 * and can architecturally be injected, but we cannot do it right now:
8306 * an interrupt could have arrived just now and we have to inject it
8307 * as a vmexit, or there could already an event in the queue, which is
8308 * indicated by can_inject. In that case we request an immediate exit
8309 * in order to make progress and get back here for another iteration.
8310 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8312 if (vcpu
->arch
.smi_pending
) {
8313 r
= can_inject
? kvm_x86_ops
.smi_allowed(vcpu
, true) : -EBUSY
;
8317 vcpu
->arch
.smi_pending
= false;
8318 ++vcpu
->arch
.smi_count
;
8322 kvm_x86_ops
.enable_smi_window(vcpu
);
8325 if (vcpu
->arch
.nmi_pending
) {
8326 r
= can_inject
? kvm_x86_ops
.nmi_allowed(vcpu
, true) : -EBUSY
;
8330 --vcpu
->arch
.nmi_pending
;
8331 vcpu
->arch
.nmi_injected
= true;
8332 kvm_x86_ops
.set_nmi(vcpu
);
8334 WARN_ON(kvm_x86_ops
.nmi_allowed(vcpu
, true) < 0);
8336 if (vcpu
->arch
.nmi_pending
)
8337 kvm_x86_ops
.enable_nmi_window(vcpu
);
8340 if (kvm_cpu_has_injectable_intr(vcpu
)) {
8341 r
= can_inject
? kvm_x86_ops
.interrupt_allowed(vcpu
, true) : -EBUSY
;
8345 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
8346 kvm_x86_ops
.set_irq(vcpu
);
8347 WARN_ON(kvm_x86_ops
.interrupt_allowed(vcpu
, true) < 0);
8349 if (kvm_cpu_has_injectable_intr(vcpu
))
8350 kvm_x86_ops
.enable_irq_window(vcpu
);
8353 if (is_guest_mode(vcpu
) &&
8354 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
8355 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
8356 *req_immediate_exit
= true;
8358 WARN_ON(vcpu
->arch
.exception
.pending
);
8362 *req_immediate_exit
= true;
8366 static void process_nmi(struct kvm_vcpu
*vcpu
)
8371 * x86 is limited to one NMI running, and one NMI pending after it.
8372 * If an NMI is already in progress, limit further NMIs to just one.
8373 * Otherwise, allow two (and we'll inject the first one immediately).
8375 if (kvm_x86_ops
.get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
8378 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
8379 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
8380 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8383 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
8386 flags
|= seg
->g
<< 23;
8387 flags
|= seg
->db
<< 22;
8388 flags
|= seg
->l
<< 21;
8389 flags
|= seg
->avl
<< 20;
8390 flags
|= seg
->present
<< 15;
8391 flags
|= seg
->dpl
<< 13;
8392 flags
|= seg
->s
<< 12;
8393 flags
|= seg
->type
<< 8;
8397 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
8399 struct kvm_segment seg
;
8402 kvm_get_segment(vcpu
, &seg
, n
);
8403 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
8406 offset
= 0x7f84 + n
* 12;
8408 offset
= 0x7f2c + (n
- 3) * 12;
8410 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
8411 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
8412 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
8415 #ifdef CONFIG_X86_64
8416 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
8418 struct kvm_segment seg
;
8422 kvm_get_segment(vcpu
, &seg
, n
);
8423 offset
= 0x7e00 + n
* 16;
8425 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
8426 put_smstate(u16
, buf
, offset
, seg
.selector
);
8427 put_smstate(u16
, buf
, offset
+ 2, flags
);
8428 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
8429 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
8433 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
8436 struct kvm_segment seg
;
8440 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
8441 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
8442 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
8443 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
8445 for (i
= 0; i
< 8; i
++)
8446 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
8448 kvm_get_dr(vcpu
, 6, &val
);
8449 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
8450 kvm_get_dr(vcpu
, 7, &val
);
8451 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
8453 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
8454 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
8455 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
8456 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
8457 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
8459 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
8460 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
8461 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
8462 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
8463 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
8465 kvm_x86_ops
.get_gdt(vcpu
, &dt
);
8466 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
8467 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
8469 kvm_x86_ops
.get_idt(vcpu
, &dt
);
8470 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
8471 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
8473 for (i
= 0; i
< 6; i
++)
8474 enter_smm_save_seg_32(vcpu
, buf
, i
);
8476 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
8479 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
8480 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
8483 #ifdef CONFIG_X86_64
8484 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
8487 struct kvm_segment seg
;
8491 for (i
= 0; i
< 16; i
++)
8492 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
8494 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
8495 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
8497 kvm_get_dr(vcpu
, 6, &val
);
8498 put_smstate(u64
, buf
, 0x7f68, val
);
8499 kvm_get_dr(vcpu
, 7, &val
);
8500 put_smstate(u64
, buf
, 0x7f60, val
);
8502 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
8503 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
8504 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
8506 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
8509 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
8511 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
8513 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
8514 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
8515 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
8516 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
8517 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
8519 kvm_x86_ops
.get_idt(vcpu
, &dt
);
8520 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
8521 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
8523 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
8524 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
8525 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
8526 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
8527 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
8529 kvm_x86_ops
.get_gdt(vcpu
, &dt
);
8530 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
8531 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
8533 for (i
= 0; i
< 6; i
++)
8534 enter_smm_save_seg_64(vcpu
, buf
, i
);
8538 static void enter_smm(struct kvm_vcpu
*vcpu
)
8540 struct kvm_segment cs
, ds
;
8545 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
8546 memset(buf
, 0, 512);
8547 #ifdef CONFIG_X86_64
8548 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
8549 enter_smm_save_state_64(vcpu
, buf
);
8552 enter_smm_save_state_32(vcpu
, buf
);
8555 * Give pre_enter_smm() a chance to make ISA-specific changes to the
8556 * vCPU state (e.g. leave guest mode) after we've saved the state into
8557 * the SMM state-save area.
8559 kvm_x86_ops
.pre_enter_smm(vcpu
, buf
);
8561 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
8562 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
8564 if (kvm_x86_ops
.get_nmi_mask(vcpu
))
8565 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
8567 kvm_x86_ops
.set_nmi_mask(vcpu
, true);
8569 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
8570 kvm_rip_write(vcpu
, 0x8000);
8572 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
8573 kvm_x86_ops
.set_cr0(vcpu
, cr0
);
8574 vcpu
->arch
.cr0
= cr0
;
8576 kvm_x86_ops
.set_cr4(vcpu
, 0);
8578 /* Undocumented: IDT limit is set to zero on entry to SMM. */
8579 dt
.address
= dt
.size
= 0;
8580 kvm_x86_ops
.set_idt(vcpu
, &dt
);
8582 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
8584 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
8585 cs
.base
= vcpu
->arch
.smbase
;
8590 cs
.limit
= ds
.limit
= 0xffffffff;
8591 cs
.type
= ds
.type
= 0x3;
8592 cs
.dpl
= ds
.dpl
= 0;
8597 cs
.avl
= ds
.avl
= 0;
8598 cs
.present
= ds
.present
= 1;
8599 cs
.unusable
= ds
.unusable
= 0;
8600 cs
.padding
= ds
.padding
= 0;
8602 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8603 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
8604 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
8605 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
8606 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
8607 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
8609 #ifdef CONFIG_X86_64
8610 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
8611 kvm_x86_ops
.set_efer(vcpu
, 0);
8614 kvm_update_cpuid_runtime(vcpu
);
8615 kvm_mmu_reset_context(vcpu
);
8618 static void process_smi(struct kvm_vcpu
*vcpu
)
8620 vcpu
->arch
.smi_pending
= true;
8621 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8624 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
8625 unsigned long *vcpu_bitmap
)
8629 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
8631 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
8632 NULL
, vcpu_bitmap
, cpus
);
8634 free_cpumask_var(cpus
);
8637 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
8639 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
8642 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
8644 if (!lapic_in_kernel(vcpu
))
8647 vcpu
->arch
.apicv_active
= kvm_apicv_activated(vcpu
->kvm
);
8648 kvm_apic_update_apicv(vcpu
);
8649 kvm_x86_ops
.refresh_apicv_exec_ctrl(vcpu
);
8651 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
8654 * NOTE: Do not hold any lock prior to calling this.
8656 * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8657 * locked, because it calls __x86_set_memory_region() which does
8658 * synchronize_srcu(&kvm->srcu).
8660 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
8662 struct kvm_vcpu
*except
;
8663 unsigned long old
, new, expected
;
8665 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
8666 !kvm_x86_ops
.check_apicv_inhibit_reasons(bit
))
8669 old
= READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
);
8671 expected
= new = old
;
8673 __clear_bit(bit
, &new);
8675 __set_bit(bit
, &new);
8678 old
= cmpxchg(&kvm
->arch
.apicv_inhibit_reasons
, expected
, new);
8679 } while (old
!= expected
);
8684 trace_kvm_apicv_update_request(activate
, bit
);
8685 if (kvm_x86_ops
.pre_update_apicv_exec_ctrl
)
8686 kvm_x86_ops
.pre_update_apicv_exec_ctrl(kvm
, activate
);
8689 * Sending request to update APICV for all other vcpus,
8690 * while update the calling vcpu immediately instead of
8691 * waiting for another #VMEXIT to handle the request.
8693 except
= kvm_get_running_vcpu();
8694 kvm_make_all_cpus_request_except(kvm
, KVM_REQ_APICV_UPDATE
,
8697 kvm_vcpu_update_apicv(except
);
8699 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
8701 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
8703 if (!kvm_apic_present(vcpu
))
8706 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
8708 if (irqchip_split(vcpu
->kvm
))
8709 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
8711 if (vcpu
->arch
.apicv_active
)
8712 kvm_x86_ops
.sync_pir_to_irr(vcpu
);
8713 if (ioapic_in_kernel(vcpu
->kvm
))
8714 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
8717 if (is_guest_mode(vcpu
))
8718 vcpu
->arch
.load_eoi_exitmap_pending
= true;
8720 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
8723 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
8725 u64 eoi_exit_bitmap
[4];
8727 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
8730 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
8731 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
8732 kvm_x86_ops
.load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
8735 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
8736 unsigned long start
, unsigned long end
)
8738 unsigned long apic_address
;
8741 * The physical address of apic access page is stored in the VMCS.
8742 * Update it when it becomes invalid.
8744 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
8745 if (start
<= apic_address
&& apic_address
< end
)
8746 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
8749 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
8751 if (!lapic_in_kernel(vcpu
))
8754 if (!kvm_x86_ops
.set_apic_access_page_addr
)
8757 kvm_x86_ops
.set_apic_access_page_addr(vcpu
);
8760 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
8762 smp_send_reschedule(vcpu
->cpu
);
8764 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
8767 * Returns 1 to let vcpu_run() continue the guest execution loop without
8768 * exiting to the userspace. Otherwise, the value will be returned to the
8771 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
8775 dm_request_for_irq_injection(vcpu
) &&
8776 kvm_cpu_accept_dm_intr(vcpu
);
8777 fastpath_t exit_fastpath
;
8779 bool req_immediate_exit
= false;
8781 /* Forbid vmenter if vcpu dirty ring is soft-full */
8782 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
8783 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
8784 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
8785 trace_kvm_dirty_ring_exit(vcpu
);
8790 if (kvm_request_pending(vcpu
)) {
8791 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
8792 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
8797 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
8798 kvm_mmu_unload(vcpu
);
8799 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
8800 __kvm_migrate_timers(vcpu
);
8801 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
8802 kvm_gen_update_masterclock(vcpu
->kvm
);
8803 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
8804 kvm_gen_kvmclock_update(vcpu
);
8805 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
8806 r
= kvm_guest_time_update(vcpu
);
8810 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
8811 kvm_mmu_sync_roots(vcpu
);
8812 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
8813 kvm_mmu_load_pgd(vcpu
);
8814 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
8815 kvm_vcpu_flush_tlb_all(vcpu
);
8817 /* Flushing all ASIDs flushes the current ASID... */
8818 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
8820 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
8821 kvm_vcpu_flush_tlb_current(vcpu
);
8822 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH
, vcpu
))
8823 kvm_vcpu_flush_tlb_guest(vcpu
);
8825 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
8826 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
8830 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8831 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
8832 vcpu
->mmio_needed
= 0;
8836 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
8837 /* Page is swapped out. Do synthetic halt */
8838 vcpu
->arch
.apf
.halted
= true;
8842 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
8843 record_steal_time(vcpu
);
8844 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
8846 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
8848 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
8849 kvm_pmu_handle_event(vcpu
);
8850 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
8851 kvm_pmu_deliver_pmi(vcpu
);
8852 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
8853 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
8854 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
8855 vcpu
->arch
.ioapic_handled_vectors
)) {
8856 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
8857 vcpu
->run
->eoi
.vector
=
8858 vcpu
->arch
.pending_ioapic_eoi
;
8863 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
8864 vcpu_scan_ioapic(vcpu
);
8865 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
8866 vcpu_load_eoi_exitmap(vcpu
);
8867 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
8868 kvm_vcpu_reload_apic_access_page(vcpu
);
8869 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
8870 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
8871 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
8875 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
8876 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
8877 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
8881 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
8882 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
8883 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
8889 * KVM_REQ_HV_STIMER has to be processed after
8890 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8891 * depend on the guest clock being up-to-date
8893 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
8894 kvm_hv_process_stimers(vcpu
);
8895 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
8896 kvm_vcpu_update_apicv(vcpu
);
8897 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
8898 kvm_check_async_pf_completion(vcpu
);
8899 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
8900 kvm_x86_ops
.msr_filter_changed(vcpu
);
8903 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
8904 ++vcpu
->stat
.req_event
;
8905 kvm_apic_accept_events(vcpu
);
8906 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
8911 inject_pending_event(vcpu
, &req_immediate_exit
);
8913 kvm_x86_ops
.enable_irq_window(vcpu
);
8915 if (kvm_lapic_enabled(vcpu
)) {
8916 update_cr8_intercept(vcpu
);
8917 kvm_lapic_sync_to_vapic(vcpu
);
8921 r
= kvm_mmu_reload(vcpu
);
8923 goto cancel_injection
;
8928 kvm_x86_ops
.prepare_guest_switch(vcpu
);
8931 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
8932 * IPI are then delayed after guest entry, which ensures that they
8933 * result in virtual interrupt delivery.
8935 local_irq_disable();
8936 vcpu
->mode
= IN_GUEST_MODE
;
8938 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8941 * 1) We should set ->mode before checking ->requests. Please see
8942 * the comment in kvm_vcpu_exiting_guest_mode().
8944 * 2) For APICv, we should set ->mode before checking PID.ON. This
8945 * pairs with the memory barrier implicit in pi_test_and_set_on
8946 * (see vmx_deliver_posted_interrupt).
8948 * 3) This also orders the write to mode from any reads to the page
8949 * tables done while the VCPU is running. Please see the comment
8950 * in kvm_flush_remote_tlbs.
8952 smp_mb__after_srcu_read_unlock();
8955 * This handles the case where a posted interrupt was
8956 * notified with kvm_vcpu_kick.
8958 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
8959 kvm_x86_ops
.sync_pir_to_irr(vcpu
);
8961 if (kvm_vcpu_exit_request(vcpu
)) {
8962 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
8966 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8968 goto cancel_injection
;
8971 if (req_immediate_exit
) {
8972 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8973 kvm_x86_ops
.request_immediate_exit(vcpu
);
8976 trace_kvm_entry(vcpu
);
8978 fpregs_assert_state_consistent();
8979 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
8980 switch_fpu_return();
8982 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
8984 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
8985 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
8986 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
8987 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
8988 set_debugreg(vcpu
->arch
.dr6
, 6);
8989 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
8992 exit_fastpath
= kvm_x86_ops
.run(vcpu
);
8995 * Do this here before restoring debug registers on the host. And
8996 * since we do this before handling the vmexit, a DR access vmexit
8997 * can (a) read the correct value of the debug registers, (b) set
8998 * KVM_DEBUGREG_WONT_EXIT again.
9000 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
9001 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
9002 kvm_x86_ops
.sync_dirty_debug_regs(vcpu
);
9003 kvm_update_dr0123(vcpu
);
9004 kvm_update_dr7(vcpu
);
9005 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
9009 * If the guest has used debug registers, at least dr7
9010 * will be disabled while returning to the host.
9011 * If we don't have active breakpoints in the host, we don't
9012 * care about the messed up debug address registers. But if
9013 * we have some of them active, restore the old state.
9015 if (hw_breakpoint_active())
9016 hw_breakpoint_restore();
9018 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
9019 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
9021 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9024 kvm_x86_ops
.handle_exit_irqoff(vcpu
);
9027 * Consume any pending interrupts, including the possible source of
9028 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9029 * An instruction is required after local_irq_enable() to fully unblock
9030 * interrupts on processors that implement an interrupt shadow, the
9031 * stat.exits increment will do nicely.
9033 kvm_before_interrupt(vcpu
);
9036 local_irq_disable();
9037 kvm_after_interrupt(vcpu
);
9039 if (lapic_in_kernel(vcpu
)) {
9040 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
9041 if (delta
!= S64_MIN
) {
9042 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
9043 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
9050 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9053 * Profile KVM exit RIPs:
9055 if (unlikely(prof_on
== KVM_PROFILING
)) {
9056 unsigned long rip
= kvm_rip_read(vcpu
);
9057 profile_hit(KVM_PROFILING
, (void *)rip
);
9060 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
9061 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9063 if (vcpu
->arch
.apic_attention
)
9064 kvm_lapic_sync_from_vapic(vcpu
);
9066 r
= kvm_x86_ops
.handle_exit(vcpu
, exit_fastpath
);
9070 if (req_immediate_exit
)
9071 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9072 kvm_x86_ops
.cancel_injection(vcpu
);
9073 if (unlikely(vcpu
->arch
.apic_attention
))
9074 kvm_lapic_sync_from_vapic(vcpu
);
9079 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
9081 if (!kvm_arch_vcpu_runnable(vcpu
) &&
9082 (!kvm_x86_ops
.pre_block
|| kvm_x86_ops
.pre_block(vcpu
) == 0)) {
9083 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9084 kvm_vcpu_block(vcpu
);
9085 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9087 if (kvm_x86_ops
.post_block
)
9088 kvm_x86_ops
.post_block(vcpu
);
9090 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
9094 kvm_apic_accept_events(vcpu
);
9095 switch(vcpu
->arch
.mp_state
) {
9096 case KVM_MP_STATE_HALTED
:
9097 vcpu
->arch
.pv
.pv_unhalted
= false;
9098 vcpu
->arch
.mp_state
=
9099 KVM_MP_STATE_RUNNABLE
;
9101 case KVM_MP_STATE_RUNNABLE
:
9102 vcpu
->arch
.apf
.halted
= false;
9104 case KVM_MP_STATE_INIT_RECEIVED
:
9112 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
9114 if (is_guest_mode(vcpu
))
9115 kvm_x86_ops
.nested_ops
->check_events(vcpu
);
9117 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
9118 !vcpu
->arch
.apf
.halted
);
9121 static int vcpu_run(struct kvm_vcpu
*vcpu
)
9124 struct kvm
*kvm
= vcpu
->kvm
;
9126 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9127 vcpu
->arch
.l1tf_flush_l1d
= true;
9130 if (kvm_vcpu_running(vcpu
)) {
9131 r
= vcpu_enter_guest(vcpu
);
9133 r
= vcpu_block(kvm
, vcpu
);
9139 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
9140 if (kvm_cpu_has_pending_timer(vcpu
))
9141 kvm_inject_pending_timer_irqs(vcpu
);
9143 if (dm_request_for_irq_injection(vcpu
) &&
9144 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
9146 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
9147 ++vcpu
->stat
.request_irq_exits
;
9151 if (__xfer_to_guest_mode_work_pending()) {
9152 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9153 r
= xfer_to_guest_mode_handle_work(vcpu
);
9156 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9160 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9165 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
9169 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9170 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
9171 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9175 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
9177 BUG_ON(!vcpu
->arch
.pio
.count
);
9179 return complete_emulated_io(vcpu
);
9183 * Implements the following, as a state machine:
9187 * for each mmio piece in the fragment
9195 * for each mmio piece in the fragment
9200 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
9202 struct kvm_run
*run
= vcpu
->run
;
9203 struct kvm_mmio_fragment
*frag
;
9206 BUG_ON(!vcpu
->mmio_needed
);
9208 /* Complete previous fragment */
9209 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
9210 len
= min(8u, frag
->len
);
9211 if (!vcpu
->mmio_is_write
)
9212 memcpy(frag
->data
, run
->mmio
.data
, len
);
9214 if (frag
->len
<= 8) {
9215 /* Switch to the next fragment. */
9217 vcpu
->mmio_cur_fragment
++;
9219 /* Go forward to the next mmio piece. */
9225 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
9226 vcpu
->mmio_needed
= 0;
9228 /* FIXME: return into emulator if single-stepping. */
9229 if (vcpu
->mmio_is_write
)
9231 vcpu
->mmio_read_completed
= 1;
9232 return complete_emulated_io(vcpu
);
9235 run
->exit_reason
= KVM_EXIT_MMIO
;
9236 run
->mmio
.phys_addr
= frag
->gpa
;
9237 if (vcpu
->mmio_is_write
)
9238 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
9239 run
->mmio
.len
= min(8u, frag
->len
);
9240 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
9241 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
9245 static void kvm_save_current_fpu(struct fpu
*fpu
)
9248 * If the target FPU state is not resident in the CPU registers, just
9249 * memcpy() from current, else save CPU state directly to the target.
9251 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9252 memcpy(&fpu
->state
, ¤t
->thread
.fpu
.state
,
9253 fpu_kernel_xstate_size
);
9255 copy_fpregs_to_fpstate(fpu
);
9258 /* Swap (qemu) user FPU context for the guest FPU context. */
9259 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
9263 kvm_save_current_fpu(vcpu
->arch
.user_fpu
);
9266 * Guests with protected state can't have it set by the hypervisor,
9267 * so skip trying to set it.
9269 if (vcpu
->arch
.guest_fpu
)
9270 /* PKRU is separately restored in kvm_x86_ops.run. */
9271 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
->state
,
9272 ~XFEATURE_MASK_PKRU
);
9274 fpregs_mark_activate();
9280 /* When vcpu_run ends, restore user space FPU context. */
9281 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
9286 * Guests with protected state can't have it read by the hypervisor,
9287 * so skip trying to save it.
9289 if (vcpu
->arch
.guest_fpu
)
9290 kvm_save_current_fpu(vcpu
->arch
.guest_fpu
);
9292 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
->state
);
9294 fpregs_mark_activate();
9297 ++vcpu
->stat
.fpu_reload
;
9301 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
9303 struct kvm_run
*kvm_run
= vcpu
->run
;
9307 kvm_sigset_activate(vcpu
);
9308 kvm_load_guest_fpu(vcpu
);
9310 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
9311 if (kvm_run
->immediate_exit
) {
9315 kvm_vcpu_block(vcpu
);
9316 kvm_apic_accept_events(vcpu
);
9317 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
9319 if (signal_pending(current
)) {
9321 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
9322 ++vcpu
->stat
.signal_exits
;
9327 if (kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) {
9332 if (kvm_run
->kvm_dirty_regs
) {
9333 r
= sync_regs(vcpu
);
9338 /* re-sync apic's tpr */
9339 if (!lapic_in_kernel(vcpu
)) {
9340 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
9346 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
9347 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
9348 vcpu
->arch
.complete_userspace_io
= NULL
;
9353 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
9355 if (kvm_run
->immediate_exit
)
9361 kvm_put_guest_fpu(vcpu
);
9362 if (kvm_run
->kvm_valid_regs
)
9364 post_kvm_run_save(vcpu
);
9365 kvm_sigset_deactivate(vcpu
);
9371 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9373 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
9375 * We are here if userspace calls get_regs() in the middle of
9376 * instruction emulation. Registers state needs to be copied
9377 * back from emulation context to vcpu. Userspace shouldn't do
9378 * that usually, but some bad designed PV devices (vmware
9379 * backdoor interface) need this to work
9381 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
9382 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9384 regs
->rax
= kvm_rax_read(vcpu
);
9385 regs
->rbx
= kvm_rbx_read(vcpu
);
9386 regs
->rcx
= kvm_rcx_read(vcpu
);
9387 regs
->rdx
= kvm_rdx_read(vcpu
);
9388 regs
->rsi
= kvm_rsi_read(vcpu
);
9389 regs
->rdi
= kvm_rdi_read(vcpu
);
9390 regs
->rsp
= kvm_rsp_read(vcpu
);
9391 regs
->rbp
= kvm_rbp_read(vcpu
);
9392 #ifdef CONFIG_X86_64
9393 regs
->r8
= kvm_r8_read(vcpu
);
9394 regs
->r9
= kvm_r9_read(vcpu
);
9395 regs
->r10
= kvm_r10_read(vcpu
);
9396 regs
->r11
= kvm_r11_read(vcpu
);
9397 regs
->r12
= kvm_r12_read(vcpu
);
9398 regs
->r13
= kvm_r13_read(vcpu
);
9399 regs
->r14
= kvm_r14_read(vcpu
);
9400 regs
->r15
= kvm_r15_read(vcpu
);
9403 regs
->rip
= kvm_rip_read(vcpu
);
9404 regs
->rflags
= kvm_get_rflags(vcpu
);
9407 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9410 __get_regs(vcpu
, regs
);
9415 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9417 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
9418 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9420 kvm_rax_write(vcpu
, regs
->rax
);
9421 kvm_rbx_write(vcpu
, regs
->rbx
);
9422 kvm_rcx_write(vcpu
, regs
->rcx
);
9423 kvm_rdx_write(vcpu
, regs
->rdx
);
9424 kvm_rsi_write(vcpu
, regs
->rsi
);
9425 kvm_rdi_write(vcpu
, regs
->rdi
);
9426 kvm_rsp_write(vcpu
, regs
->rsp
);
9427 kvm_rbp_write(vcpu
, regs
->rbp
);
9428 #ifdef CONFIG_X86_64
9429 kvm_r8_write(vcpu
, regs
->r8
);
9430 kvm_r9_write(vcpu
, regs
->r9
);
9431 kvm_r10_write(vcpu
, regs
->r10
);
9432 kvm_r11_write(vcpu
, regs
->r11
);
9433 kvm_r12_write(vcpu
, regs
->r12
);
9434 kvm_r13_write(vcpu
, regs
->r13
);
9435 kvm_r14_write(vcpu
, regs
->r14
);
9436 kvm_r15_write(vcpu
, regs
->r15
);
9439 kvm_rip_write(vcpu
, regs
->rip
);
9440 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
9442 vcpu
->arch
.exception
.pending
= false;
9444 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9447 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9450 __set_regs(vcpu
, regs
);
9455 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
9457 struct kvm_segment cs
;
9459 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9463 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
9465 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9469 if (vcpu
->arch
.guest_state_protected
)
9470 goto skip_protected_regs
;
9472 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
9473 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
9474 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
9475 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
9476 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
9477 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
9479 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
9480 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
9482 kvm_x86_ops
.get_idt(vcpu
, &dt
);
9483 sregs
->idt
.limit
= dt
.size
;
9484 sregs
->idt
.base
= dt
.address
;
9485 kvm_x86_ops
.get_gdt(vcpu
, &dt
);
9486 sregs
->gdt
.limit
= dt
.size
;
9487 sregs
->gdt
.base
= dt
.address
;
9489 sregs
->cr2
= vcpu
->arch
.cr2
;
9490 sregs
->cr3
= kvm_read_cr3(vcpu
);
9492 skip_protected_regs
:
9493 sregs
->cr0
= kvm_read_cr0(vcpu
);
9494 sregs
->cr4
= kvm_read_cr4(vcpu
);
9495 sregs
->cr8
= kvm_get_cr8(vcpu
);
9496 sregs
->efer
= vcpu
->arch
.efer
;
9497 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
9499 memset(sregs
->interrupt_bitmap
, 0, sizeof(sregs
->interrupt_bitmap
));
9501 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
9502 set_bit(vcpu
->arch
.interrupt
.nr
,
9503 (unsigned long *)sregs
->interrupt_bitmap
);
9506 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
9507 struct kvm_sregs
*sregs
)
9510 __get_sregs(vcpu
, sregs
);
9515 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
9516 struct kvm_mp_state
*mp_state
)
9519 if (kvm_mpx_supported())
9520 kvm_load_guest_fpu(vcpu
);
9522 kvm_apic_accept_events(vcpu
);
9523 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
9524 vcpu
->arch
.pv
.pv_unhalted
)
9525 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
9527 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
9529 if (kvm_mpx_supported())
9530 kvm_put_guest_fpu(vcpu
);
9535 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
9536 struct kvm_mp_state
*mp_state
)
9542 if (!lapic_in_kernel(vcpu
) &&
9543 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
9547 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9548 * INIT state; latched init should be reported using
9549 * KVM_SET_VCPU_EVENTS, so reject it here.
9551 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
9552 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
9553 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
9556 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
9557 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
9558 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
9560 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
9561 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9569 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
9570 int reason
, bool has_error_code
, u32 error_code
)
9572 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
9575 init_emulate_ctxt(vcpu
);
9577 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
9578 has_error_code
, error_code
);
9580 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
9581 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
9582 vcpu
->run
->internal
.ndata
= 0;
9586 kvm_rip_write(vcpu
, ctxt
->eip
);
9587 kvm_set_rflags(vcpu
, ctxt
->eflags
);
9590 EXPORT_SYMBOL_GPL(kvm_task_switch
);
9592 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9594 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
9596 * When EFER.LME and CR0.PG are set, the processor is in
9597 * 64-bit mode (though maybe in a 32-bit code segment).
9598 * CR4.PAE and EFER.LMA must be set.
9600 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
9604 * Not in 64-bit mode: EFER.LMA is clear and the code
9605 * segment cannot be 64-bit.
9607 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
9611 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
9614 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9616 struct msr_data apic_base_msr
;
9617 int mmu_reset_needed
= 0;
9618 int pending_vec
, max_bits
, idx
;
9622 if (!kvm_is_valid_sregs(vcpu
, sregs
))
9625 apic_base_msr
.data
= sregs
->apic_base
;
9626 apic_base_msr
.host_initiated
= true;
9627 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
9630 if (vcpu
->arch
.guest_state_protected
)
9631 goto skip_protected_regs
;
9633 dt
.size
= sregs
->idt
.limit
;
9634 dt
.address
= sregs
->idt
.base
;
9635 kvm_x86_ops
.set_idt(vcpu
, &dt
);
9636 dt
.size
= sregs
->gdt
.limit
;
9637 dt
.address
= sregs
->gdt
.base
;
9638 kvm_x86_ops
.set_gdt(vcpu
, &dt
);
9640 vcpu
->arch
.cr2
= sregs
->cr2
;
9641 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
9642 vcpu
->arch
.cr3
= sregs
->cr3
;
9643 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
9645 kvm_set_cr8(vcpu
, sregs
->cr8
);
9647 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
9648 kvm_x86_ops
.set_efer(vcpu
, sregs
->efer
);
9650 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
9651 kvm_x86_ops
.set_cr0(vcpu
, sregs
->cr0
);
9652 vcpu
->arch
.cr0
= sregs
->cr0
;
9654 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
9655 kvm_x86_ops
.set_cr4(vcpu
, sregs
->cr4
);
9657 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9658 if (is_pae_paging(vcpu
)) {
9659 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
9660 mmu_reset_needed
= 1;
9662 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9664 if (mmu_reset_needed
)
9665 kvm_mmu_reset_context(vcpu
);
9667 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
9668 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
9669 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
9670 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
9671 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
9672 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
9674 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
9675 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
9677 update_cr8_intercept(vcpu
);
9679 /* Older userspace won't unhalt the vcpu on reset. */
9680 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
9681 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
9683 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9685 skip_protected_regs
:
9686 max_bits
= KVM_NR_INTERRUPTS
;
9687 pending_vec
= find_first_bit(
9688 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
9689 if (pending_vec
< max_bits
) {
9690 kvm_queue_interrupt(vcpu
, pending_vec
, false);
9691 pr_debug("Set back pending irq %d\n", pending_vec
);
9694 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9701 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
9702 struct kvm_sregs
*sregs
)
9707 ret
= __set_sregs(vcpu
, sregs
);
9712 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
9713 struct kvm_guest_debug
*dbg
)
9715 unsigned long rflags
;
9718 if (vcpu
->arch
.guest_state_protected
)
9723 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
9725 if (vcpu
->arch
.exception
.pending
)
9727 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
9728 kvm_queue_exception(vcpu
, DB_VECTOR
);
9730 kvm_queue_exception(vcpu
, BP_VECTOR
);
9734 * Read rflags as long as potentially injected trace flags are still
9737 rflags
= kvm_get_rflags(vcpu
);
9739 vcpu
->guest_debug
= dbg
->control
;
9740 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
9741 vcpu
->guest_debug
= 0;
9743 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
9744 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
9745 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
9746 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
9748 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
9749 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
9751 kvm_update_dr7(vcpu
);
9753 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
9754 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
9755 get_segment_base(vcpu
, VCPU_SREG_CS
);
9758 * Trigger an rflags update that will inject or remove the trace
9761 kvm_set_rflags(vcpu
, rflags
);
9763 kvm_x86_ops
.update_exception_bitmap(vcpu
);
9773 * Translate a guest virtual address to a guest physical address.
9775 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
9776 struct kvm_translation
*tr
)
9778 unsigned long vaddr
= tr
->linear_address
;
9784 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9785 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
9786 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9787 tr
->physical_address
= gpa
;
9788 tr
->valid
= gpa
!= UNMAPPED_GVA
;
9796 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
9798 struct fxregs_state
*fxsave
;
9800 if (!vcpu
->arch
.guest_fpu
)
9805 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
9806 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
9807 fpu
->fcw
= fxsave
->cwd
;
9808 fpu
->fsw
= fxsave
->swd
;
9809 fpu
->ftwx
= fxsave
->twd
;
9810 fpu
->last_opcode
= fxsave
->fop
;
9811 fpu
->last_ip
= fxsave
->rip
;
9812 fpu
->last_dp
= fxsave
->rdp
;
9813 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
9819 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
9821 struct fxregs_state
*fxsave
;
9823 if (!vcpu
->arch
.guest_fpu
)
9828 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
9830 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
9831 fxsave
->cwd
= fpu
->fcw
;
9832 fxsave
->swd
= fpu
->fsw
;
9833 fxsave
->twd
= fpu
->ftwx
;
9834 fxsave
->fop
= fpu
->last_opcode
;
9835 fxsave
->rip
= fpu
->last_ip
;
9836 fxsave
->rdp
= fpu
->last_dp
;
9837 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
9843 static void store_regs(struct kvm_vcpu
*vcpu
)
9845 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
9847 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
9848 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
9850 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
9851 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
9853 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
9854 kvm_vcpu_ioctl_x86_get_vcpu_events(
9855 vcpu
, &vcpu
->run
->s
.regs
.events
);
9858 static int sync_regs(struct kvm_vcpu
*vcpu
)
9860 if (vcpu
->run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)
9863 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
9864 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
9865 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
9867 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
9868 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
9870 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
9872 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
9873 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9874 vcpu
, &vcpu
->run
->s
.regs
.events
))
9876 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
9882 static void fx_init(struct kvm_vcpu
*vcpu
)
9884 if (!vcpu
->arch
.guest_fpu
)
9887 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
9888 if (boot_cpu_has(X86_FEATURE_XSAVES
))
9889 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
9890 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
9893 * Ensure guest xcr0 is valid for loading
9895 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
9897 vcpu
->arch
.cr0
|= X86_CR0_ET
;
9900 void kvm_free_guest_fpu(struct kvm_vcpu
*vcpu
)
9902 if (vcpu
->arch
.guest_fpu
) {
9903 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
9904 vcpu
->arch
.guest_fpu
= NULL
;
9907 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu
);
9909 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
9911 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
9912 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9913 "guest TSC will not be reliable\n");
9918 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
9923 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
9924 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9926 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
9928 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
9930 r
= kvm_mmu_create(vcpu
);
9934 if (irqchip_in_kernel(vcpu
->kvm
)) {
9935 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
9937 goto fail_mmu_destroy
;
9938 if (kvm_apicv_activated(vcpu
->kvm
))
9939 vcpu
->arch
.apicv_active
= true;
9941 static_key_slow_inc(&kvm_no_apic_vcpu
);
9945 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
9947 goto fail_free_lapic
;
9948 vcpu
->arch
.pio_data
= page_address(page
);
9950 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
9951 GFP_KERNEL_ACCOUNT
);
9952 if (!vcpu
->arch
.mce_banks
)
9953 goto fail_free_pio_data
;
9954 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
9956 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
9957 GFP_KERNEL_ACCOUNT
))
9958 goto fail_free_mce_banks
;
9960 if (!alloc_emulate_ctxt(vcpu
))
9961 goto free_wbinvd_dirty_mask
;
9963 vcpu
->arch
.user_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
9964 GFP_KERNEL_ACCOUNT
);
9965 if (!vcpu
->arch
.user_fpu
) {
9966 pr_err("kvm: failed to allocate userspace's fpu\n");
9967 goto free_emulate_ctxt
;
9970 vcpu
->arch
.guest_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
9971 GFP_KERNEL_ACCOUNT
);
9972 if (!vcpu
->arch
.guest_fpu
) {
9973 pr_err("kvm: failed to allocate vcpu's fpu\n");
9978 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
9980 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
9982 kvm_async_pf_hash_reset(vcpu
);
9985 vcpu
->arch
.pending_external_vector
= -1;
9986 vcpu
->arch
.preempted_in_kernel
= false;
9988 kvm_hv_vcpu_init(vcpu
);
9990 r
= kvm_x86_ops
.vcpu_create(vcpu
);
9992 goto free_guest_fpu
;
9994 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
9995 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
9996 kvm_vcpu_mtrr_init(vcpu
);
9998 kvm_vcpu_reset(vcpu
, false);
9999 kvm_init_mmu(vcpu
, false);
10004 kvm_free_guest_fpu(vcpu
);
10006 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10008 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10009 free_wbinvd_dirty_mask
:
10010 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10011 fail_free_mce_banks
:
10012 kfree(vcpu
->arch
.mce_banks
);
10013 fail_free_pio_data
:
10014 free_page((unsigned long)vcpu
->arch
.pio_data
);
10016 kvm_free_lapic(vcpu
);
10018 kvm_mmu_destroy(vcpu
);
10022 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
10024 struct kvm
*kvm
= vcpu
->kvm
;
10026 kvm_hv_vcpu_postcreate(vcpu
);
10028 if (mutex_lock_killable(&vcpu
->mutex
))
10031 kvm_synchronize_tsc(vcpu
, 0);
10034 /* poll control enabled by default */
10035 vcpu
->arch
.msr_kvm_poll_control
= 1;
10037 mutex_unlock(&vcpu
->mutex
);
10039 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
10040 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
10041 KVMCLOCK_SYNC_PERIOD
);
10044 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
10046 struct gfn_to_pfn_cache
*cache
= &vcpu
->arch
.st
.cache
;
10049 kvm_release_pfn(cache
->pfn
, cache
->dirty
, cache
);
10051 kvmclock_reset(vcpu
);
10053 kvm_x86_ops
.vcpu_free(vcpu
);
10055 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10056 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10057 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10058 kvm_free_guest_fpu(vcpu
);
10060 kvm_hv_vcpu_uninit(vcpu
);
10061 kvm_pmu_destroy(vcpu
);
10062 kfree(vcpu
->arch
.mce_banks
);
10063 kvm_free_lapic(vcpu
);
10064 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10065 kvm_mmu_destroy(vcpu
);
10066 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10067 free_page((unsigned long)vcpu
->arch
.pio_data
);
10068 kvfree(vcpu
->arch
.cpuid_entries
);
10069 if (!lapic_in_kernel(vcpu
))
10070 static_key_slow_dec(&kvm_no_apic_vcpu
);
10073 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
10075 kvm_lapic_reset(vcpu
, init_event
);
10077 vcpu
->arch
.hflags
= 0;
10079 vcpu
->arch
.smi_pending
= 0;
10080 vcpu
->arch
.smi_count
= 0;
10081 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
10082 vcpu
->arch
.nmi_pending
= 0;
10083 vcpu
->arch
.nmi_injected
= false;
10084 kvm_clear_interrupt_queue(vcpu
);
10085 kvm_clear_exception_queue(vcpu
);
10087 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
10088 kvm_update_dr0123(vcpu
);
10089 vcpu
->arch
.dr6
= DR6_INIT
;
10090 vcpu
->arch
.dr7
= DR7_FIXED_1
;
10091 kvm_update_dr7(vcpu
);
10093 vcpu
->arch
.cr2
= 0;
10095 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10096 vcpu
->arch
.apf
.msr_en_val
= 0;
10097 vcpu
->arch
.apf
.msr_int_val
= 0;
10098 vcpu
->arch
.st
.msr_val
= 0;
10100 kvmclock_reset(vcpu
);
10102 kvm_clear_async_pf_completion_queue(vcpu
);
10103 kvm_async_pf_hash_reset(vcpu
);
10104 vcpu
->arch
.apf
.halted
= false;
10106 if (vcpu
->arch
.guest_fpu
&& kvm_mpx_supported()) {
10107 void *mpx_state_buffer
;
10110 * To avoid have the INIT path from kvm_apic_has_events() that be
10111 * called with loaded FPU and does not let userspace fix the state.
10114 kvm_put_guest_fpu(vcpu
);
10115 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10117 if (mpx_state_buffer
)
10118 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
10119 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10121 if (mpx_state_buffer
)
10122 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
10124 kvm_load_guest_fpu(vcpu
);
10128 kvm_pmu_reset(vcpu
);
10129 vcpu
->arch
.smbase
= 0x30000;
10131 vcpu
->arch
.msr_misc_features_enables
= 0;
10133 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10136 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
10137 vcpu
->arch
.regs_avail
= ~0;
10138 vcpu
->arch
.regs_dirty
= ~0;
10140 vcpu
->arch
.ia32_xss
= 0;
10142 kvm_x86_ops
.vcpu_reset(vcpu
, init_event
);
10145 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
10147 struct kvm_segment cs
;
10149 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10150 cs
.selector
= vector
<< 8;
10151 cs
.base
= vector
<< 12;
10152 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10153 kvm_rip_write(vcpu
, 0);
10156 int kvm_arch_hardware_enable(void)
10159 struct kvm_vcpu
*vcpu
;
10164 bool stable
, backwards_tsc
= false;
10166 kvm_user_return_msr_cpu_online();
10167 ret
= kvm_x86_ops
.hardware_enable();
10171 local_tsc
= rdtsc();
10172 stable
= !kvm_check_tsc_unstable();
10173 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10174 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10175 if (!stable
&& vcpu
->cpu
== smp_processor_id())
10176 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
10177 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
10178 backwards_tsc
= true;
10179 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
10180 max_tsc
= vcpu
->arch
.last_host_tsc
;
10186 * Sometimes, even reliable TSCs go backwards. This happens on
10187 * platforms that reset TSC during suspend or hibernate actions, but
10188 * maintain synchronization. We must compensate. Fortunately, we can
10189 * detect that condition here, which happens early in CPU bringup,
10190 * before any KVM threads can be running. Unfortunately, we can't
10191 * bring the TSCs fully up to date with real time, as we aren't yet far
10192 * enough into CPU bringup that we know how much real time has actually
10193 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10194 * variables that haven't been updated yet.
10196 * So we simply find the maximum observed TSC above, then record the
10197 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
10198 * the adjustment will be applied. Note that we accumulate
10199 * adjustments, in case multiple suspend cycles happen before some VCPU
10200 * gets a chance to run again. In the event that no KVM threads get a
10201 * chance to run, we will miss the entire elapsed period, as we'll have
10202 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10203 * loose cycle time. This isn't too big a deal, since the loss will be
10204 * uniform across all VCPUs (not to mention the scenario is extremely
10205 * unlikely). It is possible that a second hibernate recovery happens
10206 * much faster than a first, causing the observed TSC here to be
10207 * smaller; this would require additional padding adjustment, which is
10208 * why we set last_host_tsc to the local tsc observed here.
10210 * N.B. - this code below runs only on platforms with reliable TSC,
10211 * as that is the only way backwards_tsc is set above. Also note
10212 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10213 * have the same delta_cyc adjustment applied if backwards_tsc
10214 * is detected. Note further, this adjustment is only done once,
10215 * as we reset last_host_tsc on all VCPUs to stop this from being
10216 * called multiple times (one for each physical CPU bringup).
10218 * Platforms with unreliable TSCs don't have to deal with this, they
10219 * will be compensated by the logic in vcpu_load, which sets the TSC to
10220 * catchup mode. This will catchup all VCPUs to real time, but cannot
10221 * guarantee that they stay in perfect synchronization.
10223 if (backwards_tsc
) {
10224 u64 delta_cyc
= max_tsc
- local_tsc
;
10225 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10226 kvm
->arch
.backwards_tsc_observed
= true;
10227 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10228 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
10229 vcpu
->arch
.last_host_tsc
= local_tsc
;
10230 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
10234 * We have to disable TSC offset matching.. if you were
10235 * booting a VM while issuing an S4 host suspend....
10236 * you may have some problem. Solving this issue is
10237 * left as an exercise to the reader.
10239 kvm
->arch
.last_tsc_nsec
= 0;
10240 kvm
->arch
.last_tsc_write
= 0;
10247 void kvm_arch_hardware_disable(void)
10249 kvm_x86_ops
.hardware_disable();
10250 drop_user_return_notifiers();
10253 int kvm_arch_hardware_setup(void *opaque
)
10255 struct kvm_x86_init_ops
*ops
= opaque
;
10258 rdmsrl_safe(MSR_EFER
, &host_efer
);
10260 if (boot_cpu_has(X86_FEATURE_XSAVES
))
10261 rdmsrl(MSR_IA32_XSS
, host_xss
);
10263 r
= ops
->hardware_setup();
10267 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
10269 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
10272 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10273 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
10274 #undef __kvm_cpu_cap_has
10276 if (kvm_has_tsc_control
) {
10278 * Make sure the user can only configure tsc_khz values that
10279 * fit into a signed integer.
10280 * A min value is not calculated because it will always
10281 * be 1 on all machines.
10283 u64 max
= min(0x7fffffffULL
,
10284 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
10285 kvm_max_guest_tsc_khz
= max
;
10287 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
10290 kvm_init_msr_list();
10294 void kvm_arch_hardware_unsetup(void)
10296 kvm_x86_ops
.hardware_unsetup();
10299 int kvm_arch_check_processor_compat(void *opaque
)
10301 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
10302 struct kvm_x86_init_ops
*ops
= opaque
;
10304 WARN_ON(!irqs_disabled());
10306 if (__cr4_reserved_bits(cpu_has
, c
) !=
10307 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
10310 return ops
->check_processor_compatibility();
10313 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
10315 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
10317 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
10319 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
10321 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
10324 struct static_key kvm_no_apic_vcpu __read_mostly
;
10325 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
10327 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
10329 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
10331 vcpu
->arch
.l1tf_flush_l1d
= true;
10332 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
10333 pmu
->need_cleanup
= true;
10334 kvm_make_request(KVM_REQ_PMU
, vcpu
);
10336 kvm_x86_ops
.sched_in(vcpu
, cpu
);
10339 void kvm_arch_free_vm(struct kvm
*kvm
)
10341 kfree(kvm
->arch
.hyperv
.hv_pa_pg
);
10346 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
10351 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
10352 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
10353 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
10354 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
10355 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
10356 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
10358 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10359 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
10360 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10361 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
10362 &kvm
->arch
.irq_sources_bitmap
);
10364 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
10365 mutex_init(&kvm
->arch
.apic_map_lock
);
10366 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
10368 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
10369 pvclock_update_vm_gtod_copy(kvm
);
10371 kvm
->arch
.guest_can_read_msr_platform_info
= true;
10373 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
10374 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
10376 kvm_hv_init_vm(kvm
);
10377 kvm_page_track_init(kvm
);
10378 kvm_mmu_init_vm(kvm
);
10380 return kvm_x86_ops
.vm_init(kvm
);
10383 int kvm_arch_post_init_vm(struct kvm
*kvm
)
10385 return kvm_mmu_post_init_vm(kvm
);
10388 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
10391 kvm_mmu_unload(vcpu
);
10395 static void kvm_free_vcpus(struct kvm
*kvm
)
10398 struct kvm_vcpu
*vcpu
;
10401 * Unpin any mmu pages first.
10403 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10404 kvm_clear_async_pf_completion_queue(vcpu
);
10405 kvm_unload_vcpu_mmu(vcpu
);
10407 kvm_for_each_vcpu(i
, vcpu
, kvm
)
10408 kvm_vcpu_destroy(vcpu
);
10410 mutex_lock(&kvm
->lock
);
10411 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
10412 kvm
->vcpus
[i
] = NULL
;
10414 atomic_set(&kvm
->online_vcpus
, 0);
10415 mutex_unlock(&kvm
->lock
);
10418 void kvm_arch_sync_events(struct kvm
*kvm
)
10420 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
10421 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
10425 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
10428 * __x86_set_memory_region: Setup KVM internal memory slot
10430 * @kvm: the kvm pointer to the VM.
10431 * @id: the slot ID to setup.
10432 * @gpa: the GPA to install the slot (unused when @size == 0).
10433 * @size: the size of the slot. Set to zero to uninstall a slot.
10435 * This function helps to setup a KVM internal memory slot. Specify
10436 * @size > 0 to install a new slot, while @size == 0 to uninstall a
10437 * slot. The return code can be one of the following:
10439 * HVA: on success (uninstall will return a bogus HVA)
10442 * The caller should always use IS_ERR() to check the return value
10443 * before use. Note, the KVM internal memory slots are guaranteed to
10444 * remain valid and unchanged until the VM is destroyed, i.e., the
10445 * GPA->HVA translation will not change. However, the HVA is a user
10446 * address, i.e. its accessibility is not guaranteed, and must be
10447 * accessed via __copy_{to,from}_user().
10449 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
10453 unsigned long hva
, old_npages
;
10454 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
10455 struct kvm_memory_slot
*slot
;
10457 /* Called with kvm->slots_lock held. */
10458 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
10459 return ERR_PTR_USR(-EINVAL
);
10461 slot
= id_to_memslot(slots
, id
);
10463 if (slot
&& slot
->npages
)
10464 return ERR_PTR_USR(-EEXIST
);
10467 * MAP_SHARED to prevent internal slot pages from being moved
10470 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
10471 MAP_SHARED
| MAP_ANONYMOUS
, 0);
10472 if (IS_ERR((void *)hva
))
10473 return (void __user
*)hva
;
10475 if (!slot
|| !slot
->npages
)
10478 old_npages
= slot
->npages
;
10482 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
10483 struct kvm_userspace_memory_region m
;
10485 m
.slot
= id
| (i
<< 16);
10487 m
.guest_phys_addr
= gpa
;
10488 m
.userspace_addr
= hva
;
10489 m
.memory_size
= size
;
10490 r
= __kvm_set_memory_region(kvm
, &m
);
10492 return ERR_PTR_USR(r
);
10496 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
10498 return (void __user
*)hva
;
10500 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
10502 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
10504 kvm_mmu_pre_destroy_vm(kvm
);
10507 void kvm_arch_destroy_vm(struct kvm
*kvm
)
10511 if (current
->mm
== kvm
->mm
) {
10513 * Free memory regions allocated on behalf of userspace,
10514 * unless the the memory map has changed due to process exit
10517 mutex_lock(&kvm
->slots_lock
);
10518 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
10520 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
10522 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
10523 mutex_unlock(&kvm
->slots_lock
);
10525 if (kvm_x86_ops
.vm_destroy
)
10526 kvm_x86_ops
.vm_destroy(kvm
);
10527 for (i
= 0; i
< kvm
->arch
.msr_filter
.count
; i
++)
10528 kfree(kvm
->arch
.msr_filter
.ranges
[i
].bitmap
);
10529 kvm_pic_destroy(kvm
);
10530 kvm_ioapic_destroy(kvm
);
10531 kvm_free_vcpus(kvm
);
10532 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
10533 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
10534 kvm_mmu_uninit_vm(kvm
);
10535 kvm_page_track_cleanup(kvm
);
10536 kvm_hv_destroy_vm(kvm
);
10539 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
10543 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10544 kvfree(slot
->arch
.rmap
[i
]);
10545 slot
->arch
.rmap
[i
] = NULL
;
10550 kvfree(slot
->arch
.lpage_info
[i
- 1]);
10551 slot
->arch
.lpage_info
[i
- 1] = NULL
;
10554 kvm_page_track_free_memslot(slot
);
10557 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot
*slot
,
10558 unsigned long npages
)
10563 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
10564 * old arrays will be freed by __kvm_set_memory_region() if installing
10565 * the new memslot is successful.
10567 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
10569 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10570 struct kvm_lpage_info
*linfo
;
10571 unsigned long ugfn
;
10575 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
10576 slot
->base_gfn
, level
) + 1;
10578 slot
->arch
.rmap
[i
] =
10579 kvcalloc(lpages
, sizeof(*slot
->arch
.rmap
[i
]),
10580 GFP_KERNEL_ACCOUNT
);
10581 if (!slot
->arch
.rmap
[i
])
10586 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
10590 slot
->arch
.lpage_info
[i
- 1] = linfo
;
10592 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
10593 linfo
[0].disallow_lpage
= 1;
10594 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
10595 linfo
[lpages
- 1].disallow_lpage
= 1;
10596 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
10598 * If the gfn and userspace address are not aligned wrt each
10599 * other, disable large page support for this slot.
10601 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
10604 for (j
= 0; j
< lpages
; ++j
)
10605 linfo
[j
].disallow_lpage
= 1;
10609 if (kvm_page_track_create_memslot(slot
, npages
))
10615 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10616 kvfree(slot
->arch
.rmap
[i
]);
10617 slot
->arch
.rmap
[i
] = NULL
;
10621 kvfree(slot
->arch
.lpage_info
[i
- 1]);
10622 slot
->arch
.lpage_info
[i
- 1] = NULL
;
10627 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
10629 struct kvm_vcpu
*vcpu
;
10633 * memslots->generation has been incremented.
10634 * mmio generation may have reached its maximum value.
10636 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
10638 /* Force re-initialization of steal_time cache */
10639 kvm_for_each_vcpu(i
, vcpu
, kvm
)
10640 kvm_vcpu_kick(vcpu
);
10643 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
10644 struct kvm_memory_slot
*memslot
,
10645 const struct kvm_userspace_memory_region
*mem
,
10646 enum kvm_mr_change change
)
10648 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
10649 return kvm_alloc_memslot_metadata(memslot
,
10650 mem
->memory_size
>> PAGE_SHIFT
);
10654 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
10655 struct kvm_memory_slot
*old
,
10656 struct kvm_memory_slot
*new,
10657 enum kvm_mr_change change
)
10660 * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10661 * See comments below.
10663 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new->flags
& KVM_MEM_READONLY
))
10667 * Dirty logging tracks sptes in 4k granularity, meaning that large
10668 * sptes have to be split. If live migration is successful, the guest
10669 * in the source machine will be destroyed and large sptes will be
10670 * created in the destination. However, if the guest continues to run
10671 * in the source machine (for example if live migration fails), small
10672 * sptes will remain around and cause bad performance.
10674 * Scan sptes if dirty logging has been stopped, dropping those
10675 * which can be collapsed into a single large-page spte. Later
10676 * page faults will create the large-page sptes.
10678 * There is no need to do this in any of the following cases:
10679 * CREATE: No dirty mappings will already exist.
10680 * MOVE/DELETE: The old mappings will already have been cleaned up by
10681 * kvm_arch_flush_shadow_memslot()
10683 if ((old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
10684 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
10685 kvm_mmu_zap_collapsible_sptes(kvm
, new);
10688 * Enable or disable dirty logging for the slot.
10690 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10691 * slot have been zapped so no dirty logging updates are needed for
10693 * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10694 * any mappings that might be created in it will consume the
10695 * properties of the new slot and do not need to be updated here.
10697 * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10698 * called to enable/disable dirty logging.
10700 * When disabling dirty logging with PML enabled, the D-bit is set
10701 * for sptes in the slot in order to prevent unnecessary GPA
10702 * logging in the PML buffer (and potential PML buffer full VMEXIT).
10703 * This guarantees leaving PML enabled for the guest's lifetime
10704 * won't have any additional overhead from PML when the guest is
10705 * running with dirty logging disabled.
10707 * When enabling dirty logging, large sptes are write-protected
10708 * so they can be split on first write. New large sptes cannot
10709 * be created for this slot until the end of the logging.
10710 * See the comments in fast_page_fault().
10711 * For small sptes, nothing is done if the dirty log is in the
10712 * initial-all-set state. Otherwise, depending on whether pml
10713 * is enabled the D-bit or the W-bit will be cleared.
10715 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
10716 if (kvm_x86_ops
.slot_enable_log_dirty
) {
10717 kvm_x86_ops
.slot_enable_log_dirty(kvm
, new);
10720 kvm_dirty_log_manual_protect_and_init_set(kvm
) ?
10721 PG_LEVEL_2M
: PG_LEVEL_4K
;
10724 * If we're with initial-all-set, we don't need
10725 * to write protect any small page because
10726 * they're reported as dirty already. However
10727 * we still need to write-protect huge pages
10728 * so that the page split can happen lazily on
10729 * the first write to the huge page.
10731 kvm_mmu_slot_remove_write_access(kvm
, new, level
);
10734 if (kvm_x86_ops
.slot_disable_log_dirty
)
10735 kvm_x86_ops
.slot_disable_log_dirty(kvm
, new);
10739 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
10740 const struct kvm_userspace_memory_region
*mem
,
10741 struct kvm_memory_slot
*old
,
10742 const struct kvm_memory_slot
*new,
10743 enum kvm_mr_change change
)
10745 if (!kvm
->arch
.n_requested_mmu_pages
)
10746 kvm_mmu_change_mmu_pages(kvm
,
10747 kvm_mmu_calculate_default_mmu_pages(kvm
));
10750 * FIXME: const-ify all uses of struct kvm_memory_slot.
10752 kvm_mmu_slot_apply_flags(kvm
, old
, (struct kvm_memory_slot
*) new, change
);
10754 /* Free the arrays associated with the old memslot. */
10755 if (change
== KVM_MR_MOVE
)
10756 kvm_arch_free_memslot(kvm
, old
);
10759 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
10761 kvm_mmu_zap_all(kvm
);
10764 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
10765 struct kvm_memory_slot
*slot
)
10767 kvm_page_track_flush_slot(kvm
, slot
);
10770 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
10772 return (is_guest_mode(vcpu
) &&
10773 kvm_x86_ops
.guest_apic_has_interrupt
&&
10774 kvm_x86_ops
.guest_apic_has_interrupt(vcpu
));
10777 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
10779 if (!list_empty_careful(&vcpu
->async_pf
.done
))
10782 if (kvm_apic_has_events(vcpu
))
10785 if (vcpu
->arch
.pv
.pv_unhalted
)
10788 if (vcpu
->arch
.exception
.pending
)
10791 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
10792 (vcpu
->arch
.nmi_pending
&&
10793 kvm_x86_ops
.nmi_allowed(vcpu
, false)))
10796 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
10797 (vcpu
->arch
.smi_pending
&&
10798 kvm_x86_ops
.smi_allowed(vcpu
, false)))
10801 if (kvm_arch_interrupt_allowed(vcpu
) &&
10802 (kvm_cpu_has_interrupt(vcpu
) ||
10803 kvm_guest_apic_has_interrupt(vcpu
)))
10806 if (kvm_hv_has_stimer_pending(vcpu
))
10809 if (is_guest_mode(vcpu
) &&
10810 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
10811 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
10817 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
10819 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
10822 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
10824 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
10827 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
10828 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
10829 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
10832 if (vcpu
->arch
.apicv_active
&& kvm_x86_ops
.dy_apicv_has_pending_interrupt(vcpu
))
10838 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
10840 return vcpu
->arch
.preempted_in_kernel
;
10843 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
10845 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
10848 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
10850 return kvm_x86_ops
.interrupt_allowed(vcpu
, false);
10853 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
10855 /* Can't read the RIP when guest state is protected, just return 0 */
10856 if (vcpu
->arch
.guest_state_protected
)
10859 if (is_64_bit_mode(vcpu
))
10860 return kvm_rip_read(vcpu
);
10861 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
10862 kvm_rip_read(vcpu
));
10864 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
10866 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
10868 return kvm_get_linear_rip(vcpu
) == linear_rip
;
10870 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
10872 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
10874 unsigned long rflags
;
10876 rflags
= kvm_x86_ops
.get_rflags(vcpu
);
10877 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10878 rflags
&= ~X86_EFLAGS_TF
;
10881 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
10883 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
10885 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
10886 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
10887 rflags
|= X86_EFLAGS_TF
;
10888 kvm_x86_ops
.set_rflags(vcpu
, rflags
);
10891 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
10893 __kvm_set_rflags(vcpu
, rflags
);
10894 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10896 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
10898 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
10902 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
10906 r
= kvm_mmu_reload(vcpu
);
10910 if (!vcpu
->arch
.mmu
->direct_map
&&
10911 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
10914 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
10917 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
10919 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
10921 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
10924 static inline u32
kvm_async_pf_next_probe(u32 key
)
10926 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
10929 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10931 u32 key
= kvm_async_pf_hash_fn(gfn
);
10933 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
10934 key
= kvm_async_pf_next_probe(key
);
10936 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
10939 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10942 u32 key
= kvm_async_pf_hash_fn(gfn
);
10944 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
10945 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
10946 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
10947 key
= kvm_async_pf_next_probe(key
);
10952 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10954 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
10957 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10961 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
10963 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
10967 vcpu
->arch
.apf
.gfns
[i
] = ~0;
10969 j
= kvm_async_pf_next_probe(j
);
10970 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
10972 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
10974 * k lies cyclically in ]i,j]
10976 * |....j i.k.| or |.k..j i...|
10978 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
10979 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
10984 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
10986 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
10988 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
10992 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
10994 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
10996 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
10997 &token
, offset
, sizeof(token
));
11000 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
11002 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11005 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11006 &val
, offset
, sizeof(val
)))
11012 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
11014 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
11017 if (!kvm_pv_async_pf_enabled(vcpu
) ||
11018 (vcpu
->arch
.apf
.send_user_only
&& kvm_x86_ops
.get_cpl(vcpu
) == 0))
11024 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
11026 if (unlikely(!lapic_in_kernel(vcpu
) ||
11027 kvm_event_needs_reinjection(vcpu
) ||
11028 vcpu
->arch
.exception
.pending
))
11031 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
11035 * If interrupts are off we cannot even use an artificial
11038 return kvm_arch_interrupt_allowed(vcpu
);
11041 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
11042 struct kvm_async_pf
*work
)
11044 struct x86_exception fault
;
11046 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
11047 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11049 if (kvm_can_deliver_async_pf(vcpu
) &&
11050 !apf_put_user_notpresent(vcpu
)) {
11051 fault
.vector
= PF_VECTOR
;
11052 fault
.error_code_valid
= true;
11053 fault
.error_code
= 0;
11054 fault
.nested_page_fault
= false;
11055 fault
.address
= work
->arch
.token
;
11056 fault
.async_page_fault
= true;
11057 kvm_inject_page_fault(vcpu
, &fault
);
11061 * It is not possible to deliver a paravirtualized asynchronous
11062 * page fault, but putting the guest in an artificial halt state
11063 * can be beneficial nevertheless: if an interrupt arrives, we
11064 * can deliver it timely and perhaps the guest will schedule
11065 * another process. When the instruction that triggered a page
11066 * fault is retried, hopefully the page will be ready in the host.
11068 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
11073 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
11074 struct kvm_async_pf
*work
)
11076 struct kvm_lapic_irq irq
= {
11077 .delivery_mode
= APIC_DM_FIXED
,
11078 .vector
= vcpu
->arch
.apf
.vec
11081 if (work
->wakeup_all
)
11082 work
->arch
.token
= ~0; /* broadcast wakeup */
11084 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11085 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
11087 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
11088 kvm_pv_async_pf_enabled(vcpu
) &&
11089 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
11090 vcpu
->arch
.apf
.pageready_pending
= true;
11091 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
11094 vcpu
->arch
.apf
.halted
= false;
11095 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11098 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
11100 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
11101 if (!vcpu
->arch
.apf
.pageready_pending
)
11102 kvm_vcpu_kick(vcpu
);
11105 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
11107 if (!kvm_pv_async_pf_enabled(vcpu
))
11110 return apf_pageready_slot_free(vcpu
);
11113 void kvm_arch_start_assignment(struct kvm
*kvm
)
11115 atomic_inc(&kvm
->arch
.assigned_device_count
);
11117 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
11119 void kvm_arch_end_assignment(struct kvm
*kvm
)
11121 atomic_dec(&kvm
->arch
.assigned_device_count
);
11123 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
11125 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
11127 return atomic_read(&kvm
->arch
.assigned_device_count
);
11129 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
11131 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
11133 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
11135 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
11137 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
11139 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
11141 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
11143 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
11145 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
11147 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
11149 bool kvm_arch_has_irq_bypass(void)
11154 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
11155 struct irq_bypass_producer
*prod
)
11157 struct kvm_kernel_irqfd
*irqfd
=
11158 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
11161 irqfd
->producer
= prod
;
11162 kvm_arch_start_assignment(irqfd
->kvm
);
11163 ret
= kvm_x86_ops
.update_pi_irte(irqfd
->kvm
,
11164 prod
->irq
, irqfd
->gsi
, 1);
11167 kvm_arch_end_assignment(irqfd
->kvm
);
11172 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
11173 struct irq_bypass_producer
*prod
)
11176 struct kvm_kernel_irqfd
*irqfd
=
11177 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
11179 WARN_ON(irqfd
->producer
!= prod
);
11180 irqfd
->producer
= NULL
;
11183 * When producer of consumer is unregistered, we change back to
11184 * remapped mode, so we can re-use the current implementation
11185 * when the irq is masked/disabled or the consumer side (KVM
11186 * int this case doesn't want to receive the interrupts.
11188 ret
= kvm_x86_ops
.update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
11190 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
11191 " fails: %d\n", irqfd
->consumer
.token
, ret
);
11193 kvm_arch_end_assignment(irqfd
->kvm
);
11196 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
11197 uint32_t guest_irq
, bool set
)
11199 return kvm_x86_ops
.update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
11202 bool kvm_vector_hashing_enabled(void)
11204 return vector_hashing
;
11207 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
11209 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
11211 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
11214 int kvm_spec_ctrl_test_value(u64 value
)
11217 * test that setting IA32_SPEC_CTRL to given value
11218 * is allowed by the host processor
11222 unsigned long flags
;
11225 local_irq_save(flags
);
11227 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
11229 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
11232 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
11234 local_irq_restore(flags
);
11238 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
11240 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
11242 struct x86_exception fault
;
11243 u32 access
= error_code
&
11244 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
11246 if (!(error_code
& PFERR_PRESENT_MASK
) ||
11247 vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
11249 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11250 * tables probably do not match the TLB. Just proceed
11251 * with the error code that the processor gave.
11253 fault
.vector
= PF_VECTOR
;
11254 fault
.error_code_valid
= true;
11255 fault
.error_code
= error_code
;
11256 fault
.nested_page_fault
= false;
11257 fault
.address
= gva
;
11259 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
11261 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
11264 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11265 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11266 * indicates whether exit to userspace is needed.
11268 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
11269 struct x86_exception
*e
)
11271 if (r
== X86EMUL_PROPAGATE_FAULT
) {
11272 kvm_inject_emulated_page_fault(vcpu
, e
);
11277 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11278 * while handling a VMX instruction KVM could've handled the request
11279 * correctly by exiting to userspace and performing I/O but there
11280 * doesn't seem to be a real use-case behind such requests, just return
11281 * KVM_EXIT_INTERNAL_ERROR for now.
11283 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
11284 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
11285 vcpu
->run
->internal
.ndata
= 0;
11289 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
11291 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
11294 struct x86_exception e
;
11296 unsigned long roots_to_free
= 0;
11303 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
11304 if (r
!= X86EMUL_CONTINUE
)
11305 return kvm_handle_memory_failure(vcpu
, r
, &e
);
11307 if (operand
.pcid
>> 12 != 0) {
11308 kvm_inject_gp(vcpu
, 0);
11312 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
11315 case INVPCID_TYPE_INDIV_ADDR
:
11316 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
11317 is_noncanonical_address(operand
.gla
, vcpu
)) {
11318 kvm_inject_gp(vcpu
, 0);
11321 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
11322 return kvm_skip_emulated_instruction(vcpu
);
11324 case INVPCID_TYPE_SINGLE_CTXT
:
11325 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
11326 kvm_inject_gp(vcpu
, 0);
11330 if (kvm_get_active_pcid(vcpu
) == operand
.pcid
) {
11331 kvm_mmu_sync_roots(vcpu
);
11332 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
11335 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
11336 if (kvm_get_pcid(vcpu
, vcpu
->arch
.mmu
->prev_roots
[i
].pgd
)
11338 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
11340 kvm_mmu_free_roots(vcpu
, vcpu
->arch
.mmu
, roots_to_free
);
11342 * If neither the current cr3 nor any of the prev_roots use the
11343 * given PCID, then nothing needs to be done here because a
11344 * resync will happen anyway before switching to any other CR3.
11347 return kvm_skip_emulated_instruction(vcpu
);
11349 case INVPCID_TYPE_ALL_NON_GLOBAL
:
11351 * Currently, KVM doesn't mark global entries in the shadow
11352 * page tables, so a non-global flush just degenerates to a
11353 * global flush. If needed, we could optimize this later by
11354 * keeping track of global entries in shadow page tables.
11358 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
11359 kvm_mmu_unload(vcpu
);
11360 return kvm_skip_emulated_instruction(vcpu
);
11363 BUG(); /* We have already checked above that type <= 3 */
11366 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
11368 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
11370 struct kvm_run
*run
= vcpu
->run
;
11371 struct kvm_mmio_fragment
*frag
;
11374 BUG_ON(!vcpu
->mmio_needed
);
11376 /* Complete previous fragment */
11377 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
11378 len
= min(8u, frag
->len
);
11379 if (!vcpu
->mmio_is_write
)
11380 memcpy(frag
->data
, run
->mmio
.data
, len
);
11382 if (frag
->len
<= 8) {
11383 /* Switch to the next fragment. */
11385 vcpu
->mmio_cur_fragment
++;
11387 /* Go forward to the next mmio piece. */
11393 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
11394 vcpu
->mmio_needed
= 0;
11396 // VMG change, at this point, we're always done
11397 // RIP has already been advanced
11401 // More MMIO is needed
11402 run
->mmio
.phys_addr
= frag
->gpa
;
11403 run
->mmio
.len
= min(8u, frag
->len
);
11404 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
11405 if (run
->mmio
.is_write
)
11406 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11407 run
->exit_reason
= KVM_EXIT_MMIO
;
11409 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11414 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
11418 struct kvm_mmio_fragment
*frag
;
11423 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
11424 if (handled
== bytes
)
11431 /*TODO: Check if need to increment number of frags */
11432 frag
= vcpu
->mmio_fragments
;
11433 vcpu
->mmio_nr_fragments
= 1;
11438 vcpu
->mmio_needed
= 1;
11439 vcpu
->mmio_cur_fragment
= 0;
11441 vcpu
->run
->mmio
.phys_addr
= gpa
;
11442 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
11443 vcpu
->run
->mmio
.is_write
= 1;
11444 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11445 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
11447 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11451 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
11453 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
11457 struct kvm_mmio_fragment
*frag
;
11462 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
11463 if (handled
== bytes
)
11470 /*TODO: Check if need to increment number of frags */
11471 frag
= vcpu
->mmio_fragments
;
11472 vcpu
->mmio_nr_fragments
= 1;
11477 vcpu
->mmio_needed
= 1;
11478 vcpu
->mmio_cur_fragment
= 0;
11480 vcpu
->run
->mmio
.phys_addr
= gpa
;
11481 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
11482 vcpu
->run
->mmio
.is_write
= 0;
11483 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
11485 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11489 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
11491 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
11493 memcpy(vcpu
->arch
.guest_ins_data
, vcpu
->arch
.pio_data
,
11494 vcpu
->arch
.pio
.count
* vcpu
->arch
.pio
.size
);
11495 vcpu
->arch
.pio
.count
= 0;
11500 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
11501 unsigned int port
, void *data
, unsigned int count
)
11505 ret
= emulator_pio_out_emulated(vcpu
->arch
.emulate_ctxt
, size
, port
,
11510 vcpu
->arch
.pio
.count
= 0;
11515 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
11516 unsigned int port
, void *data
, unsigned int count
)
11520 ret
= emulator_pio_in_emulated(vcpu
->arch
.emulate_ctxt
, size
, port
,
11523 vcpu
->arch
.pio
.count
= 0;
11525 vcpu
->arch
.guest_ins_data
= data
;
11526 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
11532 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
11533 unsigned int port
, void *data
, unsigned int count
,
11536 return in
? kvm_sev_es_ins(vcpu
, size
, port
, data
, count
)
11537 : kvm_sev_es_outs(vcpu
, size
, port
, data
, count
);
11539 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
11541 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
11542 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
11543 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
11544 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
11545 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
11546 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
11547 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
11548 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
11549 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
11550 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
11551 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
11552 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
11553 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
11554 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
11555 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
11556 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
11557 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
11558 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
11559 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
11560 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
11561 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
11562 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);
11563 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
11564 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
11565 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
11566 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);